All Packages

package gnu.targets;
// Package of targets for the GNU gcc code generation tools
package gnu.targets.arm;
// GCC-based code generation targets for Arm
package gnu.targets.arm.rtsv5T;
// Runtime support package for the gnu.targets.arm.GCArmv5T target
package gnu.targets.arm.rtsv6;
// Runtime support package for the gnu.targets.arm.GCArmv6 target
package gnu.targets.arm.rtsv7A;
// Runtime support package for the gnu.targets.arm.GCArmv7A target
package gnu.targets.arm.rtsv7M;
// Runtime support package for the gnu.targets.arm.GCArmv7M target
package gnu.targets.arm.rtsv8A;
// Runtime support package for ARM v8A targets
package gnu.targets.arm.rtsv8M;
// Runtime support package for GNU ARMv8M targets
package gnu.targets.rts86GW;
// Runtime support package for the x86 targets using the mingw codegen tools
package gnu.targets.rts86M;
// Runtime support package for the MacOS x86 targets
package gnu.targets.rts86U;
// Runtime support package for the x86 targets
package host.platforms.PC;
// Platform package for the PC platform
package host.platforms.SUN;
// Platform package for the SUN Sparc platform
package host.platforms.arm;
// Platform package for the ARM-based platforms running an OS with virtual memory
package host.platforms.macos;
// Platform package for the MacOS platform
package iar.targets;
// Package of targets for the IAR code generation tools
package iar.targets.arm;
// IAR-based code generation targets for ARM devices
package iar.targets.arm.rts;
// Runtime support package for ARM devices for use with the IAR toolchain
package iar.targets.msp430;
// IAR-based code generation targets for MSP430 devices
package iar.targets.msp430.rts;
// Runtime support package for MSP430 devices for use with the IAR toolchain
package iar.tools.configuro;
// Command-line configuration tool for IAR Embedded Workbench
package microsoft.targets;
// Targets that wrap Microsoft code generation tools
package microsoft.targets.rts;
// Runtime support package for the x86 targets for use with Microsoft tools
package ti.catalog;
// TI device specifications
package ti.catalog.arm;
// Package of devices for the arm family of Arm processors
package ti.catalog.arm.cortexa15;
// Package of devices for the arm Cortex A15 family of Arm processors
package ti.catalog.arm.cortexa53;
// Package of devices for the Cortex-A53 family of ARM processors
package ti.catalog.arm.cortexa8;
// Package of devices for the Cortex A8 family of Arm processors
package ti.catalog.arm.cortexa9;
// Package of devices for the arm Cortex A9 family of Arm processors
package ti.catalog.arm.cortexm3;
// Package of devices for the arm Cortex M3 family of Arm processors
package ti.catalog.arm.cortexm3.concertoInit;
// Concerto M3 boot time initialization support
package ti.catalog.arm.cortexm33;
// Package of devices for the Cortex-M33 family of ARM processors
package ti.catalog.arm.cortexm4;
// Package of devices for the arm Cortex M4 family of Arm processors
package ti.catalog.arm.cortexm4.tiva.ce;
// Cortex LM3 boot time initialization support
package ti.catalog.arm.cortexr4;
// Package of devices for the arm Cortex R5 family of Arm processors
package ti.catalog.arm.cortexr5;
// Package of devices for the arm Cortex R5 family of Arm processors
package ti.catalog.arm.peripherals.timers;
// Arm timer peripherals
package ti.catalog.arp32;
// Package of devices for the arp32 family of DSPs
package ti.catalog.c2800;
// Package of devices for the c2800 family of DSPs
package ti.catalog.c2800.concertoInit;
// Concerto 28xx boot time initialization support
package ti.catalog.c2800.init;
// C28xx boot time initialization support
package ti.catalog.c2800.initF2837x;
// 2837x and 2807x boot time initialization support
package ti.catalog.c6000;
// Package of devices for the c6000 family of DSPs
package ti.catalog.msp430;
// Package of devices for the msp430 family
package ti.catalog.msp430.f22xx;
// Package of devices for the msp430.f22xx family
package ti.catalog.msp430.f54xx;
// Package of devices for the msp430.f54xx family
package ti.catalog.msp430.f55xx;
// Package of devices for the msp430.f55xx family
package ti.catalog.msp430.init;
// MSP430 boot time initialization support
package ti.catalog.msp430.peripherals.adc;
// MSP430 ADC peripherals
package ti.catalog.msp430.peripherals.clock;
// MSP430 clock peripherals
package ti.catalog.msp430.peripherals.communication;
// MSP430 USCI peripherals
package ti.catalog.msp430.peripherals.comparator;
// MSP430 Flash memory peripheral
package ti.catalog.msp430.peripherals.dac;
// MSP430 DAC peripheral
package ti.catalog.msp430.peripherals.dma;
// MSP430 DMA controller peripheral
package ti.catalog.msp430.peripherals.frctl;
// MSP430 FRAM controller (FRCTL) peripheral
package ti.catalog.msp430.peripherals.gpio;
// MSP430 GPIO peripheral
package ti.catalog.msp430.peripherals.gpio_grace3;
// MSP430 GPIO Grace3 peripheral
package ti.catalog.msp430.peripherals.interrupt;
// MSP430 interrupt support
package ti.catalog.msp430.peripherals.memory;
// MSP430 Flash memory peripheral
package ti.catalog.msp430.peripherals.oa;
// MSP430 Op Amp peripheral
package ti.catalog.msp430.peripherals.pinmux;
//
package ti.catalog.msp430.peripherals.pmm;
// MSP430 PMM (Power Management Module) peripheral
package ti.catalog.msp430.peripherals.ref;
// MSP430 REF (Reference Module) peripheral
package ti.catalog.msp430.peripherals.rtc;
// MSP430 RTC (real time clock) peripheral
package ti.catalog.msp430.peripherals.special_function;
// MSP430 interrupt enable support
package ti.catalog.msp430.peripherals.svs;
// MSP430 SVS peripheral
package ti.catalog.msp430.peripherals.timer;
// MSP430 Timer_A and Timer_B peripherals
package ti.catalog.msp430.peripherals.watchdog;
// MSP430 WDT+ (watchdog timer) peripheral
package ti.catalog.peripherals.hdvicp2;
// HD Video Coprocessor support
package ti.mcu.msp430.include;
// MSP430 headers and default linker command files
package ti.platforms.arm;
// Generic platform for arm
package ti.platforms.arp32;
// Generic platform for arp32
package ti.platforms.beaglebone;
// Platform package for the beaglebone platform
package ti.platforms.c6000;
// Generic platform for c6000
package ti.platforms.c6x;
// Generic platform support for any C6x device
package ti.platforms.concertoC28;
// Platform support for any concerto C28 device
package ti.platforms.concertoM3;
// Platform support for any concerto M3 device
package ti.platforms.control28027;
// Platform package for the 28027 control card
package ti.platforms.control28035;
// Platform package for the 28035 control card
package ti.platforms.control28069;
// Platform package for the 28069 control card and control stick
package ti.platforms.control28335;
// Platform package for the 28335 control card
package ti.platforms.control28346;
// Platform package for the 28346 control card
package ti.platforms.cortexA;
// Generic platform support for any ARMv8 Cortex-A device
package ti.platforms.cortexM;
// Generic platform support for any ARM Cortex-M device
package ti.platforms.cortexR;
// Generic platform support for any Cortex-R device
package ti.platforms.dsk6455;
// Platform package for the dsk6455 platform
package ti.platforms.dskTCI6482;
// Platform package for the dskTCI6482 platform
package ti.platforms.evm3530;
// Platform package for the evm3530 platform
package ti.platforms.evm6424;
// Platform package for the evm6424 platform
package ti.platforms.evm6452;
// Platform package for the evm6452 platform
package ti.platforms.evm6457;
// Platform package for the evm6457 platform
package ti.platforms.evm6472;
// Platform package for the evm6472 platform
package ti.platforms.evm6474;
// Platform package for the evm6474 platform
package ti.platforms.evm6614;
// Platform package for the 6614 EVM
package ti.platforms.evm6657;
// Platform package for the 6657 EVM
package ti.platforms.evm6670;
// Platform package for the 6670 EVM
package ti.platforms.evm6678;
// Platform package for the 6678 EVM
package ti.platforms.evm6747;
// Platform package for the evm6747 platform
package ti.platforms.evm6748;
// Platform package for the evm6748 platform
package ti.platforms.evmAM3359;
// Platform package for the evmAM3359 platform
package ti.platforms.evmAM3505;
// Platform package for the evmAM3505 platform
package ti.platforms.evmAM3517;
// Platform package for the evmAM3517 platform
package ti.platforms.evmAM437X;
// Platform package for the evmAM437X platform
package ti.platforms.evmAM571X;
// Platform package for the AM571X SDP
package ti.platforms.evmAM572X;
// Platform package for the AM572X SDP
package ti.platforms.evmC66AK2E;
// Platform package for the 66AK2E evm
package ti.platforms.evmC6A8149;
// Platform package for the evmC6A8149 platform
package ti.platforms.evmDA830;
// Platform package for the evmDA830 platform
package ti.platforms.evmDA850;
// Platform package for the evmDA850 platform
package ti.platforms.evmDM355;
// Platform package for the evmDM355 platform
package ti.platforms.evmDM365;
// Platform package for the evmDM365 platform
package ti.platforms.evmDM37XX;
// Platform package for the evmDM37XX platform
package ti.platforms.evmDM6437;
// Platform package for the evmDM6437 platform
package ti.platforms.evmDM648;
// Platform package for the evmDM648 platform
package ti.platforms.evmDM8148;
// Platform package for the evmDM8148 platform
package ti.platforms.evmDM8168;
// Platform package for the evmDM8168 platform
package ti.platforms.evmDRA7XX;
// Platform package for the DRA7XX SDP
package ti.platforms.evmOMAPL137;
// Platform package for the evmOMAPL137 platform
package ti.platforms.evmOMAPL138;
// Platform package for the evmOMAPL138 platform
package ti.platforms.evmTCI6484;
// Platform package for the evmTCI6484 platform
package ti.platforms.evmTCI6486;
// Platform package for the evmTCI6486 platform
package ti.platforms.evmTCI6488;
// Platform package for the evmTCI6488 platform
package ti.platforms.evmTCI6630K2L;
// Platform package for the TCI6630 evm
package ti.platforms.evmTCI6636K2H;
// Platform package for the TCI6636 evm
package ti.platforms.evmTCI6638K2K;
// Platform package for the TCI6638 evm
package ti.platforms.evmTCI66AK2G02;
// Platform package for the TCI66AK2G02 evm
package ti.platforms.evmTDA3XX;
// Platform package for the TDA3XX SDP
package ti.platforms.evmTI811X;
// Platform package for the evmTI811X platform
package ti.platforms.evmTI813X;
// Platform package for the evmTI813X platform
package ti.platforms.evmTI814X;
// Platform package for the evmTI814X platform
package ti.platforms.evmTI816X;
// Platform package for the evmTI816X platform
package ti.platforms.evmTNETV107X;
// Platform package for the DaVinci evmTNETV107X platform
package ti.platforms.evmTNETV2685;
// Platform package for the evmTNETV2685 platform
package ti.platforms.ezdsp28235;
// Platform package for the eZdsp28235 platform
package ti.platforms.ezdsp28335;
// Platform package for the eZdsp28335 platform
package ti.platforms.generic;
// Platform package for the generic platform
package ti.platforms.idkAM571X;
// Platform package for the AM571X SDP
package ti.platforms.idkAM572X;
// Platform package for the AM572X SDP
package ti.platforms.load6x;
// Platform package for the load6x platform
package ti.platforms.msp430;
// Platform support for any MSP430 device
package ti.platforms.rf432s0xx;
// Platform support for any RF432Sxx device
package ti.platforms.sdp3430;
// Platform package for the sdp3430 platform
package ti.platforms.sdp4430;
// Platform package for the OMAP4430 SDP
package ti.platforms.sdp5430;
// Platform package for the OMAP5430 SDP
package ti.platforms.sim28xx;
// Platform package for the sim28xx platform
package ti.platforms.sim470xx;
// Platform package for the sim470xx platform
package ti.platforms.sim64Pxx;
// Platform package for the sim64Pxx platform
package ti.platforms.sim6xxx;
// Platform package for the sim6xxx platform
package ti.platforms.simARP32;
// Platform package for the simARP32 platform
package ti.platforms.simArctic;
// Platform package for the simArctic platform
package ti.platforms.simCM3;
// Platform package for the simCM3 platform
package ti.platforms.simDM8168;
// Platform package for the simDM8168 platform
package ti.platforms.simKepler;
// Platform package for the Kepler simulator
package ti.platforms.simTCI6608;
// Platform package for the TCI6608 simulator
package ti.platforms.simTCI6616;
// Platform package for the TCI6616 simulator
package ti.platforms.simTesla;
// Platform package for the Tesla functional simulator
package ti.platforms.simVayu;
// Platform package for the Vayu SDP
package ti.platforms.simplelink;
// Platform support for the SimpleLink devices
package ti.platforms.stellaris;
// Platform support for any Stellaris device
package ti.platforms.tiva;
// Platform support for any Tiva device
package ti.platforms.tms320x28;
// Generic 28xx platform support
package ti.sdoarch.standards.pkg;
// SDO Architecture Team Package Standard
package ti.targets;
// Package of targets for TI code generation tools
package ti.targets.arm.clang;
// Package of Arm targets for TI LLVM based code generation tools for ELF
package ti.targets.arm.elf;
// Package of Arm targets for TI code generation tools for ELF
package ti.targets.arm.rtsarm;
// Runtime support package for all Arm targets
package ti.targets.arp32.elf;
// Package of targets for TI code generation tools for ARP32
package ti.targets.arp32.rts;
// Runtime support package for the arp32 targets
package ti.targets.elf;
// Package of targets for TI code generation tools for ELF
package ti.targets.msp430;
// Package of targets for MSP430 code generation tools
package ti.targets.msp430.elf;
// Package of targets for MSP430 code generation tools
package ti.targets.msp430.rts430;
// Runtime support package for the MSP430 targets
package ti.targets.omf.cof;
// Simple TI COFF parser support
package ti.targets.omf.elf;
// Simple ELF parser support
package ti.targets.rts2800;
// Runtime support package for the c2800 targets
package ti.targets.rts6000;
// Runtime support package for the c6000 targets
package xdc;
// Core interfaces and modules necessary for the XDC runtime
package xdc.bld;
// The XDC Build Model
package xdc.cfg;
// Configuration Object Model elements
package xdc.platform;
// Interfaces and modules necessary for the XDC Platform Model
package xdc.platform.generic;
// Platform package for the generic platform
package xdc.rov;
// Runtime object viewer
package xdc.rov.monserver;
// The xdc.rov.monserver delivers ROV views to clients through the standard IO. The clients access monserver through an ROV module embedded in the TI Cloud Agent, or through a WebSocket server
package xdc.rov.runtime;
// ROV target runtime support
package xdc.rov.testserver;
// The xdc.rov.testserver displays ROV views to clients on the command line. The server expects that a CCS debugger is already started and an application is loaded
package xdc.rta.tools.file;
// Tool for reading and decoding RTA data from a file
package xdc.runtime;
// Basic runtime support for RTSC programs
package xdc.runtime.knl;
// XDC Runtime support for OS-related primitives
package xdc.services.getset;
// Callback notification on RTSC config parameters
package xdc.services.global;
// Common XDC utility classes
package xdc.services.mapping;
// Java classes to support target and platform mapping based on JSON files
package xdc.services.spec;
// Java classes to access XDCspec information
package xdc.shelf;
// Third party open source tools required by XDCtools
package xdc.shelf.local;
// Container for third party jars required to rebuild XDCtools
package xdc.targets.omf;
// ELF parser support
package xdc.tools;
// Command line tool support
package xdc.tools.cdoc;
// RTSC documentation generator
package xdc.tools.cdoc.sg;
// Interactive Package Documentation Browser
package xdc.tools.check;
// Check compatibility of specified packages
package xdc.tools.closure;
// A command line tool that creates 100% self-contained configurations
package xdc.tools.configuro;
// Command-line configuration tool
package xdc.tools.path;
// Package Repository Path Display Tool
package xdc.tools.path.sg;
// Graphical interface to path tool
package xdc.tools.product;
// Interfaces for products contributing RTSC packages
package xdc.tools.product.plugingen;
// Command-line tool for generating eclipse plugins for RTSC content
package xdc.tools.product.trexgen;
// Command-line tool for generating projectspec files for RTSC content
package xdc.tools.repoman;
// Repository Manager tool
package xdc.tools.repoman.sg;
// Graphical interface to repoman tool
generated on Sun, 25 Nov 2018 22:21:27 GMT


package gnu.targets
index URL

Package of targets for the GNU gcc code generation tools

The targets in this package are designed to enable host application development; e.g., the build of the XDCtools product's C-based command line tools.
XDCspec declarations sourced in gnu/targets/package.xdc
requires xdc.bld;
package gnu.targets [1, 0, 1] {
    interface ITarget;
    // Interface to GCC compatible compilers
    module Linux86;
    // Native 32-bit x86 Linux target (ILP32)
    module Mingw;
    // MinGW native Windows target
}
generated on Sun, 25 Nov 2018 22:19:09 GMT


interface gnu.targets.ITarget

metaonly interface gnu.targets.ITarget
index URL

Interface to GCC compatible compilers

XDCspec summary sourced in gnu/targets/ITarget.xdc
metaonly interface ITarget { ...
// inherits xdc.bld.ITarget3
    // inherits xdc.bld.ITarget2
        // inherits xdc.bld.ITarget
XDCspec declarations sourced in gnu/targets/ITarget.xdc
package gnu.targets;
metaonly interface ITarget inherits ITarget3 {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    readonly config Bool CYGWIN// Is the target's compiler a cygwin executable = false;
    readonly config Bool alignDirectiveSupported// The compiler supports an align directive = false;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "$(rootDir)/bin/ar",
        opts: "cr"
    };
    override readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files = {
        cmd: "$(rootDir)/bin/gcc -c -x assembler",
        opts: ""
    };
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    override readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files = {
        cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
        opts: ""
    };
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "$(rootDir)/bin/gcc",
        opts: ""
    };
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    readonly config String sectMap// Output section name to segment type mapping[string];
    override readonly config String stdInclude// Standard C/C++ types header = "gnu/targets/std.h";
    readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 0,
            align: 0
        },
        t_Char: {
            size: 0,
            align: 0
        },
        t_Double: {
            size: 0,
            align: 0
        },
        t_Float: {
            size: 0,
            align: 0
        },
        t_Fxn: {
            size: 0,
            align: 0
        },
        t_Int: {
            size: 0,
            align: 0
        },
        t_Int8: {
            size: 0,
            align: 0
        },
        t_Int16: {
            size: 0,
            align: 0
        },
        t_Int32: {
            size: 0,
            align: 0
        },
        t_Int40: {
            size: 0,
            align: 0
        },
        t_Int64: {
            size: 0,
            align: 0
        },
        t_Long: {
            size: 0,
            align: 0
        },
        t_LDouble: {
            size: 0,
            align: 0
        },
        t_LLong: {
            size: 0,
            align: 0
        },
        t_Ptr: {
            size: 0,
            align: 0
        },
        t_Short: {
            size: 0,
            align: 0
        },
        t_Size: {
            size: 0,
            align: 0
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    config String BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = null;
    config String GCCTARG// The name of the platform executing programs produced by this target = null;
    config String GCCVERS// Version number of the GCC compiler; e.g., "3.2" = null;
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "",
        suffix: ""
    };
    config String bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = null;
    config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    config ITarget.Extension extensions// File extensions recognized by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
    override config String includeOpts// Additional user configurable target-specific include path options = "";
    override config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
    };
    config Bool noStdLinkScript// Don't use the standard linker script = false;
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Profiles supported by this target[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections -fdata-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
    config String rawVersion// The raw version string from the compiler;
    config String remoteHost// Remote host used to run compiler, linker, and archiver tools;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of GCC compiler version numbers to compatibility keys[string] = [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
    String initVers// ();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in gnu/targets/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.Command
index URL

Required command and options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.Options
index URL

User configurable command options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in gnu/targets/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config Bool CYGWIN = false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config Bool alignDirectiveSupported = false;
config ITarget.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override readonly config ITarget2.Command ar = {
    cmd: "$(rootDir)/bin/ar",
    opts: "cr"
};
config ITarget.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override readonly config ITarget2.Command asm = {
    cmd: "$(rootDir)/bin/gcc -c -x assembler",
    opts: ""
};
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override readonly config ITarget2.Command cc = {
    cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
    opts: ""
};
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "$(rootDir)/bin/gcc",
    opts: ""
};
config ITarget.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override readonly config String stdInclude = "gnu/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 0,
        align: 0
    },
    t_Char: {
        size: 0,
        align: 0
    },
    t_Double: {
        size: 0,
        align: 0
    },
    t_Float: {
        size: 0,
        align: 0
    },
    t_Fxn: {
        size: 0,
        align: 0
    },
    t_Int: {
        size: 0,
        align: 0
    },
    t_Int8: {
        size: 0,
        align: 0
    },
    t_Int16: {
        size: 0,
        align: 0
    },
    t_Int32: {
        size: 0,
        align: 0
    },
    t_Int40: {
        size: 0,
        align: 0
    },
    t_Int64: {
        size: 0,
        align: 0
    },
    t_Long: {
        size: 0,
        align: 0
    },
    t_LDouble: {
        size: 0,
        align: 0
    },
    t_LLong: {
        size: 0,
        align: 0
    },
    t_Ptr: {
        size: 0,
        align: 0
    },
    t_Short: {
        size: 0,
        align: 0
    },
    t_Size: {
        size: 0,
        align: 0
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in gnu/targets/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String BINVERS = null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config ITarget.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String GCCTARG = null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config ITarget.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String GCCVERS = null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config ITarget.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config ITarget2.Options asmOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String bspLib = null;
config ITarget.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config ITarget2.Options ccOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

File extensions recognized by this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override config String includeOpts = "";
config ITarget.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
};
config ITarget.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config Bool noStdLinkScript = false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Profiles supported by this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections -fdata-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String remoteHost;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in gnu/targets/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override config String version;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config ITarget.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

XDCspec declarations sourced in gnu/targets/ITarget.xdc
override config String versionMap[string] = [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in gnu/targets/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String asmName(String CName);
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in gnu/targets/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in gnu/targets/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.initVers() // module-wide
index URL
XDCspec declarations sourced in gnu/targets/ITarget.xdc
String initVers();
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in gnu/targets/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in gnu/targets/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in gnu/targets/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:09 GMT


module gnu.targets.Linux86

metaonly module gnu.targets.Linux86
index URL

Native 32-bit x86 Linux target (ILP32)

  • Configuration settings
  • Individual elements
This module defines the native target for 32-bit (ILP32) Linux on an x86 platform.
Configuration settings sourced in gnu/targets/Linux86.xdc
var Linux86 = xdc.useModule('gnu.targets.Linux86');
module-wide constants & types
    var obj = new Linux86.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new Linux86.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new Linux86.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new Linux86.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new Linux86.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new Linux86.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new Linux86.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new Linux86.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new Linux86.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new Linux86.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new Linux86.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new Linux86.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const Linux86.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const Linux86.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const Linux86.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/ar",
        opts: "cr"
    };
    const Linux86.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/gcc -c -x assembler",
        opts: "-m32"
    };
    const Linux86.base// A target that this target is based upon = ITarget.Module computed value;
    const Linux86.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const Linux86.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
        opts: "-m32"
    };
    const Linux86.isa// CPU Instruction Set Architecture (ISA) = String "i686";
    const Linux86.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/gcc",
        opts: "-m32"
    };
    const Linux86.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const Linux86.name// Nickname for this target = String "Linux86";
    const Linux86.os// Name of OS required to run programs built for this target = String "Linux";
    const Linux86.rts// Name of a run-time support package to include = String "gnu.targets.rts86U";
    const Linux86.sectMap// Output section name to segment type mapping = String[string] computed value;
    const Linux86.stdInclude// Standard C/C++ types header = String "gnu/targets/std.h";
    const Linux86.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 12,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const Linux86.suffix// Suffix appended to all objs, libraries, and executable = String "86U";
     Linux86.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     Linux86.GCCTARG// The name of the platform executing programs produced by this target = String null;
     Linux86.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     Linux86.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Linux86.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Linux86.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String null;
     Linux86.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     Linux86.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-fPIC -Wunused",
        suffix: "-Dfar="
    };
     Linux86.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     Linux86.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     Linux86.execExt// Extension for executables = String undefined;
     Linux86.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     Linux86.includeOpts// Additional user configurable target-specific include path options = String "-isystem $(rootDir)/include";
     Linux86.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
    };
     Linux86.noStdLinkScript// Don't use the standard linker script = Bool false;
     Linux86.platform// The default platform name for this target = String "host.platforms.PC";
     Linux86.platforms// A set of platforms that can support this target = String[] [ ];
     Linux86.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections -fdata-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
     Linux86.rawVersion// The raw version string from the compiler = String undefined;
     Linux86.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     Linux86.rootDir// Installation directory for this target's code generation tools = String undefined;
     Linux86.version// The Compatibility Key associated with this target = String undefined;
     Linux86.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     Linux86.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     Linux86.asmName// The function that converts a C name into an assembly name(String CName) returns String
     Linux86.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Linux86.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     Linux86.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     Linux86.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     Linux86.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     Linux86.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     Linux86.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     Linux86.getRawVersion// Get a target-specific raw compiler version string() returns String
     Linux86.getVersion// Get a target-specific Compatibility Key string() returns String
     Linux86.initVers// () returns String
     Linux86.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     Linux86.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Linux86.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct Linux86.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new Linux86.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct Linux86.Command
index URL

Required command and options

Configuration settings
var obj = new Linux86.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct Linux86.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new Linux86.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct Linux86.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new Linux86.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct Linux86.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new Linux86.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct Linux86.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new Linux86.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct Linux86.Extension
index URL

File extension to file type association

Configuration settings
var obj = new Linux86.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct Linux86.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new Linux86.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct Linux86.Model
index URL

Target runtime model

Configuration settings
var obj = new Linux86.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct Linux86.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new Linux86.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct Linux86.Options
index URL

User configurable command options

Configuration settings
var obj = new Linux86.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct Linux86.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new Linux86.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config Linux86.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const Linux86.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config Linux86.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const Linux86.alignDirectiveSupported = Bool false;
config Linux86.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const Linux86.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/ar",
    opts: "cr"
};
config Linux86.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const Linux86.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/gcc -c -x assembler",
    opts: "-m32"
};
config Linux86.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const Linux86.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config Linux86.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const Linux86.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config Linux86.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const Linux86.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
    opts: "-m32"
};
DETAILS
The -m32 flag is required to ensure that this target supports 32-bit Linux systems.
config Linux86.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const Linux86.isa = String "i686";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config Linux86.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const Linux86.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/gcc",
    opts: "-m32"
};
DETAILS
The -m32 flag is required to ensure that this target supports 32-bit Linux systems.
config Linux86.model // module-wide
index URL

Run-time model

Configuration settings
const Linux86.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config Linux86.name // module-wide
index URL

Nickname for this target

Configuration settings
const Linux86.name = String "Linux86";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config Linux86.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const Linux86.os = String "Linux";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config Linux86.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const Linux86.rts = String "gnu.targets.rts86U";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config Linux86.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const Linux86.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config Linux86.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const Linux86.stdInclude = String "gnu/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config Linux86.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const Linux86.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 12,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config Linux86.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const Linux86.suffix = String "86U";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config Linux86.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
Linux86.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config Linux86.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
Linux86.GCCTARG = String null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config Linux86.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
Linux86.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config Linux86.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
Linux86.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Linux86.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
Linux86.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Linux86.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
Linux86.bspLib = String null;
config Linux86.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
Linux86.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config Linux86.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
Linux86.ccOpts = ITarget2.Options {
    prefix: "-fPIC -Wunused",
    suffix: "-Dfar="
};
config Linux86.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
Linux86.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config Linux86.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
Linux86.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config Linux86.execExt // module-wide
index URL

Extension for executables

Configuration settings
Linux86.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config Linux86.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
Linux86.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config Linux86.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
Linux86.includeOpts = String "-isystem $(rootDir)/include";
config Linux86.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
Linux86.lnkOpts = ITarget2.Options {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
};
config Linux86.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
Linux86.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config Linux86.platform // module-wide
index URL

The default platform name for this target

Configuration settings
Linux86.platform = String "host.platforms.PC";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config Linux86.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
Linux86.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config Linux86.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
Linux86.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections -fdata-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config Linux86.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
Linux86.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config Linux86.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
Linux86.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config Linux86.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
Linux86.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config Linux86.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
Linux86.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config Linux86.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
Linux86.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
Linux86.archive() // module-wide
index URL

Create an archive

Configuration settings
Linux86.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Linux86.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
Linux86.asmName(String CName) returns String
Linux86.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
Linux86.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Linux86.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
Linux86.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
Linux86.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
Linux86.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Linux86.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
Linux86.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Linux86.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
Linux86.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
Linux86.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
Linux86.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
Linux86.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
Linux86.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
Linux86.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
Linux86.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
Linux86.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
Linux86.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
Linux86.initVers() // module-wide
index URL
Configuration settings
Linux86.initVers() returns String
Linux86.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
Linux86.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Linux86.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
Linux86.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
Linux86.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
Linux86.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:09 GMT


module gnu.targets.Mingw

metaonly module gnu.targets.Mingw
index URL

MinGW native Windows target

  • Configuration settings
  • Individual elements
This module defines a native target for Windows using the mingw compiler. [ more ... ]
Configuration settings sourced in gnu/targets/Mingw.xdc
var Mingw = xdc.useModule('gnu.targets.Mingw');
module-wide constants & types
    var obj = new Mingw.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new Mingw.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new Mingw.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new Mingw.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new Mingw.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new Mingw.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new Mingw.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new Mingw.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new Mingw.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new Mingw.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new Mingw.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new Mingw.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const Mingw.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const Mingw.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const Mingw.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/ar",
        opts: "cr"
    };
    const Mingw.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/gcc -c -x assembler",
        opts: ""
    };
    const Mingw.base// A target that this target is based upon = ITarget.Module computed value;
    const Mingw.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const Mingw.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
        opts: ""
    };
    const Mingw.isa// CPU Instruction Set Architecture (ISA) = String "x86";
    const Mingw.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/gcc",
        opts: ""
    };
    const Mingw.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const Mingw.name// Nickname for this target = String "Mingw";
    const Mingw.os// Name of OS required to run programs built for this target = String "Windows";
    const Mingw.rts// Name of a run-time support package to include = String "gnu.targets.rts86GW";
    const Mingw.sectMap// Output section name to segment type mapping = String[string] computed value;
    const Mingw.stdInclude// Standard C/C++ types header = String "gnu/targets/std.h";
    const Mingw.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 12,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const Mingw.suffix// Suffix appended to all objs, libraries, and executable = String "86GW";
     Mingw.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     Mingw.GCCTARG// The name of the platform executing programs produced by this target = String null;
     Mingw.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     Mingw.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Mingw.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Mingw.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String null;
     Mingw.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     Mingw.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused",
        suffix: "-Dfar= "
    };
     Mingw.cmdPrefix// Prefix to put in front of each command = String "";
     Mingw.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     Mingw.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     Mingw.execExt// Extension for executables = String undefined;
     Mingw.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     Mingw.includeOpts// Additional user configurable target-specific include path options = String "";
     Mingw.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
    };
     Mingw.noStdLinkScript// Don't use the standard linker script = Bool false;
     Mingw.platform// The default platform name for this target = String "host.platforms.PC";
     Mingw.platforms// A set of platforms that can support this target = String[] [ ];
     Mingw.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections -fdata-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
     Mingw.rawVersion// The raw version string from the compiler = String undefined;
     Mingw.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     Mingw.rootDir// Installation directory for this target's code generation tools = String undefined;
     Mingw.version// The Compatibility Key associated with this target = String undefined;
     Mingw.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     Mingw.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     Mingw.asmName// The function that converts a C name into an assembly name(String CName) returns String
     Mingw.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Mingw.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     Mingw.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     Mingw.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     Mingw.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     Mingw.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     Mingw.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     Mingw.getRawVersion// Get a target-specific raw compiler version string() returns String
     Mingw.getVersion// Get a target-specific Compatibility Key string() returns String
     Mingw.initVers// () returns String
     Mingw.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     Mingw.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Mingw.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
DETAILS
This module defines a native target for Windows using the mingw compiler.
The mingw compiler is a freely available (www.mingw.org) port of GCC that can build Windows compatible libraries, DLLs, and executables.
struct Mingw.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new Mingw.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct Mingw.Command
index URL

Required command and options

Configuration settings
var obj = new Mingw.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct Mingw.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new Mingw.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct Mingw.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new Mingw.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct Mingw.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new Mingw.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct Mingw.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new Mingw.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct Mingw.Extension
index URL

File extension to file type association

Configuration settings
var obj = new Mingw.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct Mingw.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new Mingw.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct Mingw.Model
index URL

Target runtime model

Configuration settings
var obj = new Mingw.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct Mingw.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new Mingw.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct Mingw.Options
index URL

User configurable command options

Configuration settings
var obj = new Mingw.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct Mingw.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new Mingw.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config Mingw.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const Mingw.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config Mingw.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const Mingw.alignDirectiveSupported = Bool false;
config Mingw.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const Mingw.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/ar",
    opts: "cr"
};
config Mingw.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const Mingw.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/gcc -c -x assembler",
    opts: ""
};
config Mingw.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const Mingw.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config Mingw.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const Mingw.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config Mingw.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const Mingw.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
    opts: ""
};
config Mingw.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const Mingw.isa = String "x86";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config Mingw.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const Mingw.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/gcc",
    opts: ""
};
config Mingw.model // module-wide
index URL

Run-time model

Configuration settings
const Mingw.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config Mingw.name // module-wide
index URL

Nickname for this target

Configuration settings
const Mingw.name = String "Mingw";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config Mingw.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const Mingw.os = String "Windows";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config Mingw.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const Mingw.rts = String "gnu.targets.rts86GW";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config Mingw.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const Mingw.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config Mingw.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const Mingw.stdInclude = String "gnu/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config Mingw.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const Mingw.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 12,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config Mingw.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const Mingw.suffix = String "86GW";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config Mingw.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
Mingw.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config Mingw.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
Mingw.GCCTARG = String null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config Mingw.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
Mingw.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config Mingw.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
Mingw.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Mingw.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
Mingw.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Mingw.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
Mingw.bspLib = String null;
config Mingw.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
Mingw.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config Mingw.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
Mingw.ccOpts = ITarget2.Options {
    prefix: "-Wunused",
    suffix: "-Dfar= "
};
config Mingw.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
Mingw.cmdPrefix = String "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config Mingw.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
Mingw.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config Mingw.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
Mingw.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config Mingw.execExt // module-wide
index URL

Extension for executables

Configuration settings
Mingw.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config Mingw.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
Mingw.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config Mingw.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
Mingw.includeOpts = String "";
config Mingw.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
Mingw.lnkOpts = ITarget2.Options {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
};
config Mingw.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
Mingw.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config Mingw.platform // module-wide
index URL

The default platform name for this target

Configuration settings
Mingw.platform = String "host.platforms.PC";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config Mingw.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
Mingw.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config Mingw.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
Mingw.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections -fdata-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config Mingw.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
Mingw.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config Mingw.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
Mingw.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config Mingw.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
Mingw.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config Mingw.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
Mingw.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config Mingw.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
Mingw.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
Mingw.archive() // module-wide
index URL

Create an archive

Configuration settings
Mingw.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Mingw.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
Mingw.asmName(String CName) returns String
Mingw.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
Mingw.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Mingw.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
Mingw.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
Mingw.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
Mingw.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Mingw.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
Mingw.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Mingw.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
Mingw.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
Mingw.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
Mingw.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
Mingw.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
Mingw.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
Mingw.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
Mingw.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
Mingw.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
Mingw.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
Mingw.initVers() // module-wide
index URL
Configuration settings
Mingw.initVers() returns String
Mingw.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
Mingw.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Mingw.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
Mingw.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
Mingw.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
Mingw.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:09 GMT


package gnu.targets.arm
index URL

GCC-based code generation targets for Arm

This package offers a generic support for different GNU Arm compilers.
XDCspec declarations sourced in gnu/targets/arm/package.xdc
requires xdc.bld;
requires gnu.targets;
package gnu.targets.arm [1, 0, 0] {
    interface IM;
    // Common interface for Cortex M bare metal targets
    interface ITarget;
    // Interface to GCC compatible Arm compilers
    module A15F;
    // Embedded Cortex A15, little endian, hard-float, bare metal target
    module A8F;
    // Embedded Cortex A8, little endian, hard-float, bare metal target
    module A9F;
    // Embedded Cortex A9, little endian, hard-float, bare metal target
    module GCArmv5T;
    // Embedded little endian Arm v5TE Linux target
    module GCArmv6;
    // Embedded little endian Arm v6 Linux target
    module GCArmv7A;
    // Embedded little endian Arm v7A Linux target
    module GCArmv7AF;
    // Embedded little endian Arm v7A Linux target with hardware floating point operations
    module M3;
    // Embedded little endian Cortex M3 bare metal target
    module M33F;
    // Embedded Cortex M33F, little endian, bare metal target
    module M4;
    // Embedded Cortex M4, little endian, bare metal target
    module M4F;
    // Embedded Cortex M4F, little endian, bare metal target
}
generated on Sun, 25 Nov 2018 22:19:08 GMT


module gnu.targets.arm.A15F

metaonly module gnu.targets.arm.A15F
index URL

Embedded Cortex A15, little endian, hard-float, bare metal target

  • Configuration settings
  • Individual elements
This module defines an embedded bare metal target on Cortex A15. The target generates code compatible with the "v7A" architecture.
Configuration settings sourced in gnu/targets/arm/A15F.xdc
var A15F = xdc.useModule('gnu.targets.arm.A15F');
module-wide constants & types
    var obj = new A15F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new A15F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new A15F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new A15F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new A15F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new A15F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new A15F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new A15F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new A15F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new A15F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new A15F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new A15F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const A15F.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const A15F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const A15F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const A15F.arBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    const A15F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard"
    };
    const A15F.asmBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard"
    };
    const A15F.base// A target that this target is based upon = ITarget.Module computed value;
    const A15F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const A15F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    };
    const A15F.ccBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    };
    const A15F.isa// CPU Instruction Set Architecture (ISA) = String "v7A15";
    const A15F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const A15F.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: true
    };
    const A15F.name// Nickname for this target = String "A15F";
    const A15F.os// Name of OS required to run programs built for this target = String computed value;
    const A15F.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7A";
    const A15F.sectMap// Output section name to segment type mapping = String[string] computed value;
    const A15F.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const A15F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const A15F.suffix// Suffix appended to all objs, libraries, and executable = String "a15fg";
     A15F.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     A15F.GCCTARG// The name of the platform executing programs produced by this target = String "arm-none-eabi";
     A15F.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     A15F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     A15F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     A15F.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String "nosys";
     A15F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     A15F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    };
     A15F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     A15F.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     A15F.execExt// Extension for executables = String undefined;
     A15F.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     A15F.includeOpts// Additional user configurable target-specific include path options = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
     A15F.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
        suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    };
     A15F.noStdLinkScript// Don't use the standard linker script = Bool false;
     A15F.platform// The default platform name for this target = String "ti.platforms.sdp5430";
     A15F.platforms// A set of platforms that can support this target = String[] [ ];
     A15F.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     A15F.rawVersion// The raw version string from the compiler = String undefined;
     A15F.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     A15F.rootDir// Installation directory for this target's code generation tools = String undefined;
     A15F.version// The Compatibility Key associated with this target = String undefined;
     A15F.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     A15F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     A15F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     A15F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A15F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     A15F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     A15F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     A15F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     A15F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     A15F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     A15F.getRawVersion// Get a target-specific raw compiler version string() returns String
     A15F.getVersion// Get a target-specific Compatibility Key string() returns String
     A15F.initVers// () returns String
     A15F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     A15F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A15F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct A15F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new A15F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct A15F.Command
index URL

Required command and options

Configuration settings
var obj = new A15F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct A15F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new A15F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct A15F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new A15F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct A15F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new A15F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct A15F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new A15F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct A15F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new A15F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct A15F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new A15F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct A15F.Model
index URL

Target runtime model

Configuration settings
var obj = new A15F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct A15F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new A15F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct A15F.Options
index URL

User configurable command options

Configuration settings
var obj = new A15F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct A15F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new A15F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config A15F.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const A15F.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config A15F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const A15F.alignDirectiveSupported = Bool true;
config A15F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const A15F.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config A15F.arBin // module-wide
index URL
Configuration settings
const A15F.arBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config A15F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const A15F.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard"
};
config A15F.asmBin // module-wide
index URL
Configuration settings
const A15F.asmBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard"
};
config A15F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const A15F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config A15F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const A15F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config A15F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const A15F.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
};
config A15F.ccBin // module-wide
index URL
Configuration settings
const A15F.ccBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
};
config A15F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const A15F.isa = String "v7A15";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config A15F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const A15F.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config A15F.model // module-wide
index URL

Run-time model

Configuration settings
const A15F.model = ITarget.Model {
    endian: "little",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config A15F.name // module-wide
index URL

Nickname for this target

Configuration settings
const A15F.name = String "A15F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config A15F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const A15F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config A15F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const A15F.rts = String "gnu.targets.arm.rtsv7A";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config A15F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const A15F.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config A15F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const A15F.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config A15F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const A15F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config A15F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const A15F.suffix = String "a15fg";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config A15F.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
A15F.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config A15F.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
A15F.GCCTARG = String "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config A15F.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
A15F.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config A15F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
A15F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config A15F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
A15F.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config A15F.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
A15F.bspLib = String "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config A15F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
A15F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config A15F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
A15F.ccOpts = ITarget2.Options {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= -D__DYNAMIC_REENT__ "
};
config A15F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
A15F.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config A15F.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
A15F.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config A15F.execExt // module-wide
index URL

Extension for executables

Configuration settings
A15F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config A15F.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
A15F.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config A15F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
A15F.includeOpts = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
DETAILS
This target uses newlib-nano run-time.
config A15F.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
A15F.lnkOpts = ITarget2.Options {
    prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
    suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
};
config A15F.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
A15F.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config A15F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
A15F.platform = String "ti.platforms.sdp5430";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config A15F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
A15F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config A15F.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
A15F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config A15F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
A15F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config A15F.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
A15F.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config A15F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
A15F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config A15F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
A15F.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config A15F.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
A15F.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
A15F.archive() // module-wide
index URL

Create an archive

Configuration settings
A15F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A15F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
A15F.asmName(String CName) returns String
A15F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
A15F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A15F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
A15F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
A15F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
A15F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A15F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
A15F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A15F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
A15F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
A15F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
A15F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
A15F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
A15F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
A15F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
A15F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
A15F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
A15F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
A15F.initVers() // module-wide
index URL
Configuration settings
A15F.initVers() returns String
A15F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
A15F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A15F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
A15F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
A15F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
A15F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:05 GMT


module gnu.targets.arm.A8F

metaonly module gnu.targets.arm.A8F
index URL

Embedded Cortex A8, little endian, hard-float, bare metal target

  • Configuration settings
  • Individual elements
This module defines an embedded bare metal target on Cortex A8. The target generates code compatible with the "v7A" architecture.
Configuration settings sourced in gnu/targets/arm/A8F.xdc
var A8F = xdc.useModule('gnu.targets.arm.A8F');
module-wide constants & types
    var obj = new A8F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new A8F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new A8F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new A8F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new A8F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new A8F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new A8F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new A8F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new A8F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new A8F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new A8F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new A8F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const A8F.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const A8F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const A8F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const A8F.arBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    const A8F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard"
    };
    const A8F.asmBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard"
    };
    const A8F.base// A target that this target is based upon = ITarget.Module computed value;
    const A8F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const A8F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    };
    const A8F.ccBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    };
    const A8F.isa// CPU Instruction Set Architecture (ISA) = String "v7A";
    const A8F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const A8F.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: true
    };
    const A8F.name// Nickname for this target = String "A8F";
    const A8F.os// Name of OS required to run programs built for this target = String computed value;
    const A8F.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7A";
    const A8F.sectMap// Output section name to segment type mapping = String[string] computed value;
    const A8F.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const A8F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const A8F.suffix// Suffix appended to all objs, libraries, and executable = String "a8fg";
     A8F.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     A8F.GCCTARG// The name of the platform executing programs produced by this target = String "arm-none-eabi";
     A8F.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     A8F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     A8F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     A8F.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String "nosys";
     A8F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     A8F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    };
     A8F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     A8F.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     A8F.execExt// Extension for executables = String undefined;
     A8F.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     A8F.includeOpts// Additional user configurable target-specific include path options = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
     A8F.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
        suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    };
     A8F.noStdLinkScript// Don't use the standard linker script = Bool false;
     A8F.platform// The default platform name for this target = String "ti.platforms.evmAM3359";
     A8F.platforms// A set of platforms that can support this target = String[] [ ];
     A8F.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     A8F.rawVersion// The raw version string from the compiler = String undefined;
     A8F.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     A8F.rootDir// Installation directory for this target's code generation tools = String undefined;
     A8F.version// The Compatibility Key associated with this target = String undefined;
     A8F.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     A8F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     A8F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     A8F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A8F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     A8F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     A8F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     A8F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     A8F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     A8F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     A8F.getRawVersion// Get a target-specific raw compiler version string() returns String
     A8F.getVersion// Get a target-specific Compatibility Key string() returns String
     A8F.initVers// () returns String
     A8F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     A8F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A8F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct A8F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new A8F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct A8F.Command
index URL

Required command and options

Configuration settings
var obj = new A8F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct A8F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new A8F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct A8F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new A8F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct A8F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new A8F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct A8F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new A8F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct A8F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new A8F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct A8F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new A8F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct A8F.Model
index URL

Target runtime model

Configuration settings
var obj = new A8F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct A8F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new A8F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct A8F.Options
index URL

User configurable command options

Configuration settings
var obj = new A8F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct A8F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new A8F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config A8F.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const A8F.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config A8F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const A8F.alignDirectiveSupported = Bool true;
config A8F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const A8F.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config A8F.arBin // module-wide
index URL
Configuration settings
const A8F.arBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config A8F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const A8F.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard"
};
config A8F.asmBin // module-wide
index URL
Configuration settings
const A8F.asmBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard"
};
config A8F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const A8F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config A8F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const A8F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config A8F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const A8F.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
};
config A8F.ccBin // module-wide
index URL
Configuration settings
const A8F.ccBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
};
config A8F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const A8F.isa = String "v7A";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config A8F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const A8F.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config A8F.model // module-wide
index URL

Run-time model

Configuration settings
const A8F.model = ITarget.Model {
    endian: "little",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config A8F.name // module-wide
index URL

Nickname for this target

Configuration settings
const A8F.name = String "A8F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config A8F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const A8F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config A8F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const A8F.rts = String "gnu.targets.arm.rtsv7A";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config A8F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const A8F.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config A8F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const A8F.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config A8F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const A8F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config A8F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const A8F.suffix = String "a8fg";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config A8F.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
A8F.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config A8F.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
A8F.GCCTARG = String "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config A8F.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
A8F.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config A8F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
A8F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config A8F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
A8F.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config A8F.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
A8F.bspLib = String "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config A8F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
A8F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config A8F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
A8F.ccOpts = ITarget2.Options {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= -D__DYNAMIC_REENT__ "
};
config A8F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
A8F.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config A8F.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
A8F.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config A8F.execExt // module-wide
index URL

Extension for executables

Configuration settings
A8F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config A8F.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
A8F.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config A8F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
A8F.includeOpts = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
DETAILS
This target uses newlib-nano run-time.
config A8F.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
A8F.lnkOpts = ITarget2.Options {
    prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
    suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
};
config A8F.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
A8F.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config A8F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
A8F.platform = String "ti.platforms.evmAM3359";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config A8F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
A8F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config A8F.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
A8F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config A8F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
A8F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config A8F.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
A8F.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config A8F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
A8F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config A8F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
A8F.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config A8F.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
A8F.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
A8F.archive() // module-wide
index URL

Create an archive

Configuration settings
A8F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A8F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
A8F.asmName(String CName) returns String
A8F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
A8F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A8F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
A8F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
A8F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
A8F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A8F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
A8F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A8F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
A8F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
A8F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
A8F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
A8F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
A8F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
A8F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
A8F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
A8F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
A8F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
A8F.initVers() // module-wide
index URL
Configuration settings
A8F.initVers() returns String
A8F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
A8F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A8F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
A8F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
A8F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
A8F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:05 GMT


module gnu.targets.arm.A9F

metaonly module gnu.targets.arm.A9F
index URL

Embedded Cortex A9, little endian, hard-float, bare metal target

  • Configuration settings
  • Individual elements
This module defines an embedded bare metal target on Cortex A9. The target generates code compatible with the "v7A" architecture.
Configuration settings sourced in gnu/targets/arm/A9F.xdc
var A9F = xdc.useModule('gnu.targets.arm.A9F');
module-wide constants & types
    var obj = new A9F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new A9F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new A9F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new A9F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new A9F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new A9F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new A9F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new A9F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new A9F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new A9F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new A9F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new A9F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const A9F.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const A9F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const A9F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const A9F.arBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    const A9F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard"
    };
    const A9F.asmBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard"
    };
    const A9F.base// A target that this target is based upon = ITarget.Module computed value;
    const A9F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const A9F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    };
    const A9F.ccBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    };
    const A9F.isa// CPU Instruction Set Architecture (ISA) = String "v7A9";
    const A9F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const A9F.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: true
    };
    const A9F.name// Nickname for this target = String "A9F";
    const A9F.os// Name of OS required to run programs built for this target = String computed value;
    const A9F.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7A";
    const A9F.sectMap// Output section name to segment type mapping = String[string] computed value;
    const A9F.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const A9F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const A9F.suffix// Suffix appended to all objs, libraries, and executable = String "a9fg";
     A9F.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     A9F.GCCTARG// The name of the platform executing programs produced by this target = String "arm-none-eabi";
     A9F.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     A9F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     A9F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     A9F.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String "nosys";
     A9F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     A9F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    };
     A9F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     A9F.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     A9F.execExt// Extension for executables = String undefined;
     A9F.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     A9F.includeOpts// Additional user configurable target-specific include path options = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
     A9F.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
        suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    };
     A9F.noStdLinkScript// Don't use the standard linker script = Bool false;
     A9F.platform// The default platform name for this target = String "ti.platforms.sdp4430";
     A9F.platforms// A set of platforms that can support this target = String[] [ ];
     A9F.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     A9F.rawVersion// The raw version string from the compiler = String undefined;
     A9F.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     A9F.rootDir// Installation directory for this target's code generation tools = String undefined;
     A9F.version// The Compatibility Key associated with this target = String undefined;
     A9F.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     A9F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     A9F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     A9F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A9F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     A9F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     A9F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     A9F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     A9F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     A9F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     A9F.getRawVersion// Get a target-specific raw compiler version string() returns String
     A9F.getVersion// Get a target-specific Compatibility Key string() returns String
     A9F.initVers// () returns String
     A9F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     A9F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A9F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct A9F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new A9F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct A9F.Command
index URL

Required command and options

Configuration settings
var obj = new A9F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct A9F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new A9F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct A9F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new A9F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct A9F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new A9F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct A9F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new A9F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct A9F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new A9F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct A9F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new A9F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct A9F.Model
index URL

Target runtime model

Configuration settings
var obj = new A9F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct A9F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new A9F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct A9F.Options
index URL

User configurable command options

Configuration settings
var obj = new A9F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct A9F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new A9F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config A9F.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const A9F.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config A9F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const A9F.alignDirectiveSupported = Bool true;
config A9F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const A9F.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config A9F.arBin // module-wide
index URL
Configuration settings
const A9F.arBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config A9F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const A9F.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard"
};
config A9F.asmBin // module-wide
index URL
Configuration settings
const A9F.asmBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard"
};
config A9F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const A9F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config A9F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const A9F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config A9F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const A9F.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
};
config A9F.ccBin // module-wide
index URL
Configuration settings
const A9F.ccBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
};
config A9F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const A9F.isa = String "v7A9";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config A9F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const A9F.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config A9F.model // module-wide
index URL

Run-time model

Configuration settings
const A9F.model = ITarget.Model {
    endian: "little",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config A9F.name // module-wide
index URL

Nickname for this target

Configuration settings
const A9F.name = String "A9F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config A9F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const A9F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config A9F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const A9F.rts = String "gnu.targets.arm.rtsv7A";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config A9F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const A9F.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config A9F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const A9F.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config A9F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const A9F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config A9F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const A9F.suffix = String "a9fg";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config A9F.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
A9F.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config A9F.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
A9F.GCCTARG = String "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config A9F.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
A9F.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config A9F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
A9F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config A9F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
A9F.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config A9F.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
A9F.bspLib = String "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config A9F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
A9F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config A9F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
A9F.ccOpts = ITarget2.Options {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= -D__DYNAMIC_REENT__ "
};
config A9F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
A9F.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config A9F.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
A9F.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config A9F.execExt // module-wide
index URL

Extension for executables

Configuration settings
A9F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config A9F.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
A9F.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config A9F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
A9F.includeOpts = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
DETAILS
This target uses newlib-nano run-time.
config A9F.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
A9F.lnkOpts = ITarget2.Options {
    prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
    suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
};
config A9F.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
A9F.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config A9F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
A9F.platform = String "ti.platforms.sdp4430";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config A9F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
A9F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config A9F.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
A9F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config A9F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
A9F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config A9F.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
A9F.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config A9F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
A9F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config A9F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
A9F.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config A9F.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
A9F.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
A9F.archive() // module-wide
index URL

Create an archive

Configuration settings
A9F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A9F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
A9F.asmName(String CName) returns String
A9F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
A9F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A9F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
A9F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
A9F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
A9F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A9F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
A9F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A9F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
A9F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
A9F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
A9F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
A9F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
A9F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
A9F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
A9F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
A9F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
A9F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
A9F.initVers() // module-wide
index URL
Configuration settings
A9F.initVers() returns String
A9F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
A9F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A9F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
A9F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
A9F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
A9F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:05 GMT


module gnu.targets.arm.GCArmv5T

metaonly module gnu.targets.arm.GCArmv5T
index URL

Embedded little endian Arm v5TE Linux target

  • Configuration settings
  • Individual elements
This module defines an embedded target for Linux on Arm. The target generates code compatible with the "v5TE" architecture.
Configuration settings sourced in gnu/targets/arm/GCArmv5T.xdc
var GCArmv5T = xdc.useModule('gnu.targets.arm.GCArmv5T');
module-wide constants & types
    var obj = new GCArmv5T.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new GCArmv5T.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new GCArmv5T.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new GCArmv5T.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new GCArmv5T.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new GCArmv5T.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new GCArmv5T.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new GCArmv5T.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new GCArmv5T.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new GCArmv5T.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new GCArmv5T.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new GCArmv5T.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const GCArmv5T.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const GCArmv5T.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const GCArmv5T.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const GCArmv5T.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
        opts: "-march=armv5t"
    };
    const GCArmv5T.base// A target that this target is based upon = ITarget.Module computed value;
    const GCArmv5T.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const GCArmv5T.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-march=armv5t"
    };
    const GCArmv5T.isa// CPU Instruction Set Architecture (ISA) = String "v5T";
    const GCArmv5T.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const GCArmv5T.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const GCArmv5T.name// Nickname for this target = String "GCArmv5T";
    const GCArmv5T.os// Name of OS required to run programs built for this target = String "Linux";
    const GCArmv5T.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv5T";
    const GCArmv5T.sectMap// Output section name to segment type mapping = String[string] computed value;
    const GCArmv5T.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const GCArmv5T.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const GCArmv5T.suffix// Suffix appended to all objs, libraries, and executable = String "v5T";
     GCArmv5T.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     GCArmv5T.GCCTARG// The name of the platform executing programs produced by this target = String null;
     GCArmv5T.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     GCArmv5T.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv5T.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv5T.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String null;
     GCArmv5T.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     GCArmv5T.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-fPIC -Wunused",
        suffix: "-Dfar= "
    };
     GCArmv5T.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "470MV",
        "v5t"
    ];
     GCArmv5T.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     GCArmv5T.execExt// Extension for executables = String undefined;
     GCArmv5T.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     GCArmv5T.includeOpts// Additional user configurable target-specific include path options = String "";
     GCArmv5T.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    };
     GCArmv5T.noStdLinkScript// Don't use the standard linker script = Bool false;
     GCArmv5T.platform// The default platform name for this target = String "host.platforms.arm";
     GCArmv5T.platforms// A set of platforms that can support this target = String[] [ ];
     GCArmv5T.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
     GCArmv5T.rawVersion// The raw version string from the compiler = String undefined;
     GCArmv5T.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     GCArmv5T.rootDir// Installation directory for this target's code generation tools = String undefined;
     GCArmv5T.version// The Compatibility Key associated with this target = String undefined;
     GCArmv5T.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     GCArmv5T.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     GCArmv5T.asmName// The function that converts a C name into an assembly name(String CName) returns String
     GCArmv5T.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv5T.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     GCArmv5T.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     GCArmv5T.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     GCArmv5T.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv5T.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv5T.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     GCArmv5T.getRawVersion// Get a target-specific raw compiler version string() returns String
     GCArmv5T.getVersion// Get a target-specific Compatibility Key string() returns String
     GCArmv5T.initVers// () returns String
     GCArmv5T.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     GCArmv5T.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv5T.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct GCArmv5T.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new GCArmv5T.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct GCArmv5T.Command
index URL

Required command and options

Configuration settings
var obj = new GCArmv5T.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct GCArmv5T.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new GCArmv5T.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct GCArmv5T.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new GCArmv5T.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct GCArmv5T.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new GCArmv5T.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct GCArmv5T.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new GCArmv5T.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct GCArmv5T.Extension
index URL

File extension to file type association

Configuration settings
var obj = new GCArmv5T.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct GCArmv5T.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new GCArmv5T.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct GCArmv5T.Model
index URL

Target runtime model

Configuration settings
var obj = new GCArmv5T.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct GCArmv5T.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new GCArmv5T.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct GCArmv5T.Options
index URL

User configurable command options

Configuration settings
var obj = new GCArmv5T.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct GCArmv5T.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new GCArmv5T.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config GCArmv5T.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const GCArmv5T.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config GCArmv5T.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const GCArmv5T.alignDirectiveSupported = Bool false;
config GCArmv5T.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const GCArmv5T.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config GCArmv5T.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const GCArmv5T.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    opts: "-march=armv5t"
};
config GCArmv5T.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const GCArmv5T.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config GCArmv5T.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const GCArmv5T.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config GCArmv5T.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const GCArmv5T.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-march=armv5t"
};
config GCArmv5T.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const GCArmv5T.isa = String "v5T";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config GCArmv5T.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const GCArmv5T.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config GCArmv5T.model // module-wide
index URL

Run-time model

Configuration settings
const GCArmv5T.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config GCArmv5T.name // module-wide
index URL

Nickname for this target

Configuration settings
const GCArmv5T.name = String "GCArmv5T";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config GCArmv5T.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const GCArmv5T.os = String "Linux";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config GCArmv5T.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const GCArmv5T.rts = String "gnu.targets.arm.rtsv5T";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config GCArmv5T.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const GCArmv5T.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config GCArmv5T.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const GCArmv5T.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config GCArmv5T.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const GCArmv5T.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config GCArmv5T.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const GCArmv5T.suffix = String "v5T";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config GCArmv5T.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
GCArmv5T.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config GCArmv5T.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
GCArmv5T.GCCTARG = String null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config GCArmv5T.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
GCArmv5T.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config GCArmv5T.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
GCArmv5T.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv5T.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
GCArmv5T.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv5T.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
GCArmv5T.bspLib = String null;
config GCArmv5T.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
GCArmv5T.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config GCArmv5T.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
GCArmv5T.ccOpts = ITarget2.Options {
    prefix: "-fPIC -Wunused",
    suffix: "-Dfar= "
};
config GCArmv5T.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
GCArmv5T.compatibleSuffixes = String[] [
    "470MV",
    "v5t"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config GCArmv5T.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
GCArmv5T.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config GCArmv5T.execExt // module-wide
index URL

Extension for executables

Configuration settings
GCArmv5T.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config GCArmv5T.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
GCArmv5T.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config GCArmv5T.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
GCArmv5T.includeOpts = String "";
config GCArmv5T.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
GCArmv5T.lnkOpts = ITarget2.Options {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
};
config GCArmv5T.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
GCArmv5T.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config GCArmv5T.platform // module-wide
index URL

The default platform name for this target

Configuration settings
GCArmv5T.platform = String "host.platforms.arm";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config GCArmv5T.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
GCArmv5T.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config GCArmv5T.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
GCArmv5T.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config GCArmv5T.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
GCArmv5T.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config GCArmv5T.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
GCArmv5T.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config GCArmv5T.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
GCArmv5T.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config GCArmv5T.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
GCArmv5T.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config GCArmv5T.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
GCArmv5T.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
GCArmv5T.archive() // module-wide
index URL

Create an archive

Configuration settings
GCArmv5T.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv5T.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
GCArmv5T.asmName(String CName) returns String
GCArmv5T.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
GCArmv5T.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv5T.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
GCArmv5T.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
GCArmv5T.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
GCArmv5T.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv5T.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
GCArmv5T.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv5T.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
GCArmv5T.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
GCArmv5T.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
GCArmv5T.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
GCArmv5T.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
GCArmv5T.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv5T.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
GCArmv5T.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv5T.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
GCArmv5T.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv5T.initVers() // module-wide
index URL
Configuration settings
GCArmv5T.initVers() returns String
GCArmv5T.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
GCArmv5T.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv5T.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
GCArmv5T.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
GCArmv5T.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
GCArmv5T.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:06 GMT


module gnu.targets.arm.GCArmv6

metaonly module gnu.targets.arm.GCArmv6
index URL

Embedded little endian Arm v6 Linux target

  • Configuration settings
  • Individual elements
This module defines an embedded target for Linux on Arm. The target generates code compatible with the "v6" architecture.
Configuration settings sourced in gnu/targets/arm/GCArmv6.xdc
var GCArmv6 = xdc.useModule('gnu.targets.arm.GCArmv6');
module-wide constants & types
    var obj = new GCArmv6.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new GCArmv6.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new GCArmv6.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new GCArmv6.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new GCArmv6.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new GCArmv6.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new GCArmv6.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new GCArmv6.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new GCArmv6.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new GCArmv6.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new GCArmv6.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new GCArmv6.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const GCArmv6.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const GCArmv6.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const GCArmv6.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const GCArmv6.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
        opts: "-march=armv6"
    };
    const GCArmv6.base// A target that this target is based upon = ITarget.Module computed value;
    const GCArmv6.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const GCArmv6.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-march=armv6"
    };
    const GCArmv6.isa// CPU Instruction Set Architecture (ISA) = String "v6";
    const GCArmv6.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const GCArmv6.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const GCArmv6.name// Nickname for this target = String "GCArmv6";
    const GCArmv6.os// Name of OS required to run programs built for this target = String "Linux";
    const GCArmv6.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv6";
    const GCArmv6.sectMap// Output section name to segment type mapping = String[string] computed value;
    const GCArmv6.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const GCArmv6.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const GCArmv6.suffix// Suffix appended to all objs, libraries, and executable = String "v6";
     GCArmv6.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     GCArmv6.GCCTARG// The name of the platform executing programs produced by this target = String null;
     GCArmv6.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     GCArmv6.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv6.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv6.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String null;
     GCArmv6.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     GCArmv6.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-fPIC -Wunused",
        suffix: "-Dfar= "
    };
     GCArmv6.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "v5T",
        "470MV",
        "v5t"
    ];
     GCArmv6.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     GCArmv6.execExt// Extension for executables = String undefined;
     GCArmv6.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     GCArmv6.includeOpts// Additional user configurable target-specific include path options = String "";
     GCArmv6.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    };
     GCArmv6.noStdLinkScript// Don't use the standard linker script = Bool false;
     GCArmv6.platform// The default platform name for this target = String "host.platforms.arm";
     GCArmv6.platforms// A set of platforms that can support this target = String[] [ ];
     GCArmv6.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
     GCArmv6.rawVersion// The raw version string from the compiler = String undefined;
     GCArmv6.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     GCArmv6.rootDir// Installation directory for this target's code generation tools = String undefined;
     GCArmv6.version// The Compatibility Key associated with this target = String undefined;
     GCArmv6.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     GCArmv6.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     GCArmv6.asmName// The function that converts a C name into an assembly name(String CName) returns String
     GCArmv6.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv6.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     GCArmv6.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     GCArmv6.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     GCArmv6.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv6.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv6.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     GCArmv6.getRawVersion// Get a target-specific raw compiler version string() returns String
     GCArmv6.getVersion// Get a target-specific Compatibility Key string() returns String
     GCArmv6.initVers// () returns String
     GCArmv6.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     GCArmv6.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv6.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct GCArmv6.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new GCArmv6.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct GCArmv6.Command
index URL

Required command and options

Configuration settings
var obj = new GCArmv6.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct GCArmv6.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new GCArmv6.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct GCArmv6.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new GCArmv6.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct GCArmv6.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new GCArmv6.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct GCArmv6.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new GCArmv6.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct GCArmv6.Extension
index URL

File extension to file type association

Configuration settings
var obj = new GCArmv6.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct GCArmv6.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new GCArmv6.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct GCArmv6.Model
index URL

Target runtime model

Configuration settings
var obj = new GCArmv6.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct GCArmv6.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new GCArmv6.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct GCArmv6.Options
index URL

User configurable command options

Configuration settings
var obj = new GCArmv6.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct GCArmv6.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new GCArmv6.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config GCArmv6.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const GCArmv6.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config GCArmv6.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const GCArmv6.alignDirectiveSupported = Bool false;
config GCArmv6.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const GCArmv6.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config GCArmv6.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const GCArmv6.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    opts: "-march=armv6"
};
config GCArmv6.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const GCArmv6.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config GCArmv6.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const GCArmv6.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config GCArmv6.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const GCArmv6.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-march=armv6"
};
config GCArmv6.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const GCArmv6.isa = String "v6";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config GCArmv6.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const GCArmv6.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config GCArmv6.model // module-wide
index URL

Run-time model

Configuration settings
const GCArmv6.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config GCArmv6.name // module-wide
index URL

Nickname for this target

Configuration settings
const GCArmv6.name = String "GCArmv6";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config GCArmv6.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const GCArmv6.os = String "Linux";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config GCArmv6.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const GCArmv6.rts = String "gnu.targets.arm.rtsv6";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config GCArmv6.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const GCArmv6.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config GCArmv6.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const GCArmv6.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config GCArmv6.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const GCArmv6.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config GCArmv6.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const GCArmv6.suffix = String "v6";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config GCArmv6.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
GCArmv6.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config GCArmv6.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
GCArmv6.GCCTARG = String null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config GCArmv6.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
GCArmv6.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config GCArmv6.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
GCArmv6.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv6.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
GCArmv6.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv6.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
GCArmv6.bspLib = String null;
config GCArmv6.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
GCArmv6.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config GCArmv6.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
GCArmv6.ccOpts = ITarget2.Options {
    prefix: "-fPIC -Wunused",
    suffix: "-Dfar= "
};
config GCArmv6.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
GCArmv6.compatibleSuffixes = String[] [
    "v5T",
    "470MV",
    "v5t"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config GCArmv6.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
GCArmv6.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config GCArmv6.execExt // module-wide
index URL

Extension for executables

Configuration settings
GCArmv6.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config GCArmv6.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
GCArmv6.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config GCArmv6.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
GCArmv6.includeOpts = String "";
config GCArmv6.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
GCArmv6.lnkOpts = ITarget2.Options {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
};
config GCArmv6.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
GCArmv6.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config GCArmv6.platform // module-wide
index URL

The default platform name for this target

Configuration settings
GCArmv6.platform = String "host.platforms.arm";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config GCArmv6.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
GCArmv6.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config GCArmv6.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
GCArmv6.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config GCArmv6.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
GCArmv6.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config GCArmv6.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
GCArmv6.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config GCArmv6.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
GCArmv6.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config GCArmv6.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
GCArmv6.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config GCArmv6.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
GCArmv6.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
GCArmv6.archive() // module-wide
index URL

Create an archive

Configuration settings
GCArmv6.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv6.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
GCArmv6.asmName(String CName) returns String
GCArmv6.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
GCArmv6.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv6.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
GCArmv6.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
GCArmv6.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
GCArmv6.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv6.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
GCArmv6.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv6.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
GCArmv6.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
GCArmv6.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
GCArmv6.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
GCArmv6.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
GCArmv6.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv6.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
GCArmv6.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv6.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
GCArmv6.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv6.initVers() // module-wide
index URL
Configuration settings
GCArmv6.initVers() returns String
GCArmv6.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
GCArmv6.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv6.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
GCArmv6.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
GCArmv6.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
GCArmv6.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:06 GMT


module gnu.targets.arm.GCArmv7A

metaonly module gnu.targets.arm.GCArmv7A
index URL

Embedded little endian Arm v7A Linux target

  • Configuration settings
  • Individual elements
This module defines an embedded target for Linux on Arm. The target generates code compatible with the "v7A" architecture.
Configuration settings sourced in gnu/targets/arm/GCArmv7A.xdc
var GCArmv7A = xdc.useModule('gnu.targets.arm.GCArmv7A');
module-wide constants & types
    var obj = new GCArmv7A.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new GCArmv7A.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new GCArmv7A.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new GCArmv7A.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new GCArmv7A.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new GCArmv7A.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new GCArmv7A.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new GCArmv7A.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new GCArmv7A.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new GCArmv7A.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new GCArmv7A.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new GCArmv7A.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const GCArmv7A.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const GCArmv7A.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const GCArmv7A.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const GCArmv7A.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
        opts: "-march=armv7-a"
    };
    const GCArmv7A.base// A target that this target is based upon = ITarget.Module computed value;
    const GCArmv7A.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const GCArmv7A.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-march=armv7-a"
    };
    const GCArmv7A.isa// CPU Instruction Set Architecture (ISA) = String "v7A";
    const GCArmv7A.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const GCArmv7A.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const GCArmv7A.name// Nickname for this target = String "GCArmv7A";
    const GCArmv7A.os// Name of OS required to run programs built for this target = String "Linux";
    const GCArmv7A.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7A";
    const GCArmv7A.sectMap// Output section name to segment type mapping = String[string] computed value;
    const GCArmv7A.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const GCArmv7A.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const GCArmv7A.suffix// Suffix appended to all objs, libraries, and executable = String "v7A";
     GCArmv7A.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     GCArmv7A.GCCTARG// The name of the platform executing programs produced by this target = String null;
     GCArmv7A.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     GCArmv7A.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv7A.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv7A.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String null;
     GCArmv7A.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     GCArmv7A.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-fPIC -Wunused",
        suffix: "-Dfar= "
    };
     GCArmv7A.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "v6",
        "v5T",
        "470MV",
        "v5t"
    ];
     GCArmv7A.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     GCArmv7A.execExt// Extension for executables = String undefined;
     GCArmv7A.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     GCArmv7A.includeOpts// Additional user configurable target-specific include path options = String "";
     GCArmv7A.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    };
     GCArmv7A.noStdLinkScript// Don't use the standard linker script = Bool false;
     GCArmv7A.platform// The default platform name for this target = String "host.platforms.arm";
     GCArmv7A.platforms// A set of platforms that can support this target = String[] [ ];
     GCArmv7A.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
     GCArmv7A.rawVersion// The raw version string from the compiler = String undefined;
     GCArmv7A.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     GCArmv7A.rootDir// Installation directory for this target's code generation tools = String undefined;
     GCArmv7A.version// The Compatibility Key associated with this target = String undefined;
     GCArmv7A.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     GCArmv7A.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     GCArmv7A.asmName// The function that converts a C name into an assembly name(String CName) returns String
     GCArmv7A.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv7A.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     GCArmv7A.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     GCArmv7A.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     GCArmv7A.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv7A.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv7A.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     GCArmv7A.getRawVersion// Get a target-specific raw compiler version string() returns String
     GCArmv7A.getVersion// Get a target-specific Compatibility Key string() returns String
     GCArmv7A.initVers// () returns String
     GCArmv7A.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     GCArmv7A.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv7A.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct GCArmv7A.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new GCArmv7A.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct GCArmv7A.Command
index URL

Required command and options

Configuration settings
var obj = new GCArmv7A.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct GCArmv7A.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new GCArmv7A.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct GCArmv7A.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new GCArmv7A.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct GCArmv7A.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new GCArmv7A.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct GCArmv7A.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new GCArmv7A.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct GCArmv7A.Extension
index URL

File extension to file type association

Configuration settings
var obj = new GCArmv7A.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct GCArmv7A.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new GCArmv7A.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct GCArmv7A.Model
index URL

Target runtime model

Configuration settings
var obj = new GCArmv7A.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct GCArmv7A.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new GCArmv7A.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct GCArmv7A.Options
index URL

User configurable command options

Configuration settings
var obj = new GCArmv7A.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct GCArmv7A.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new GCArmv7A.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config GCArmv7A.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const GCArmv7A.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config GCArmv7A.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const GCArmv7A.alignDirectiveSupported = Bool false;
config GCArmv7A.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const GCArmv7A.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config GCArmv7A.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const GCArmv7A.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    opts: "-march=armv7-a"
};
config GCArmv7A.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const GCArmv7A.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config GCArmv7A.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const GCArmv7A.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config GCArmv7A.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const GCArmv7A.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-march=armv7-a"
};
config GCArmv7A.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const GCArmv7A.isa = String "v7A";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config GCArmv7A.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const GCArmv7A.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config GCArmv7A.model // module-wide
index URL

Run-time model

Configuration settings
const GCArmv7A.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config GCArmv7A.name // module-wide
index URL

Nickname for this target

Configuration settings
const GCArmv7A.name = String "GCArmv7A";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config GCArmv7A.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const GCArmv7A.os = String "Linux";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config GCArmv7A.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const GCArmv7A.rts = String "gnu.targets.arm.rtsv7A";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config GCArmv7A.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const GCArmv7A.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config GCArmv7A.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const GCArmv7A.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config GCArmv7A.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const GCArmv7A.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config GCArmv7A.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const GCArmv7A.suffix = String "v7A";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config GCArmv7A.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
GCArmv7A.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config GCArmv7A.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
GCArmv7A.GCCTARG = String null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config GCArmv7A.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
GCArmv7A.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config GCArmv7A.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
GCArmv7A.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv7A.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
GCArmv7A.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv7A.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
GCArmv7A.bspLib = String null;
config GCArmv7A.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
GCArmv7A.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config GCArmv7A.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
GCArmv7A.ccOpts = ITarget2.Options {
    prefix: "-fPIC -Wunused",
    suffix: "-Dfar= "
};
config GCArmv7A.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
GCArmv7A.compatibleSuffixes = String[] [
    "v6",
    "v5T",
    "470MV",
    "v5t"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config GCArmv7A.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
GCArmv7A.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config GCArmv7A.execExt // module-wide
index URL

Extension for executables

Configuration settings
GCArmv7A.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config GCArmv7A.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
GCArmv7A.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config GCArmv7A.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
GCArmv7A.includeOpts = String "";
config GCArmv7A.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
GCArmv7A.lnkOpts = ITarget2.Options {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
};
config GCArmv7A.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
GCArmv7A.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config GCArmv7A.platform // module-wide
index URL

The default platform name for this target

Configuration settings
GCArmv7A.platform = String "host.platforms.arm";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config GCArmv7A.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
GCArmv7A.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config GCArmv7A.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
GCArmv7A.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config GCArmv7A.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
GCArmv7A.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config GCArmv7A.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
GCArmv7A.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config GCArmv7A.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
GCArmv7A.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config GCArmv7A.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
GCArmv7A.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config GCArmv7A.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
GCArmv7A.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
GCArmv7A.archive() // module-wide
index URL

Create an archive

Configuration settings
GCArmv7A.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7A.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
GCArmv7A.asmName(String CName) returns String
GCArmv7A.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
GCArmv7A.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7A.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
GCArmv7A.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
GCArmv7A.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
GCArmv7A.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv7A.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
GCArmv7A.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv7A.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
GCArmv7A.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
GCArmv7A.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
GCArmv7A.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
GCArmv7A.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
GCArmv7A.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7A.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
GCArmv7A.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7A.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
GCArmv7A.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7A.initVers() // module-wide
index URL
Configuration settings
GCArmv7A.initVers() returns String
GCArmv7A.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
GCArmv7A.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7A.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
GCArmv7A.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7A.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
GCArmv7A.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:06 GMT


module gnu.targets.arm.GCArmv7AF

metaonly module gnu.targets.arm.GCArmv7AF
index URL

Embedded little endian Arm v7A Linux target with hardware floating point operations

  • Configuration settings
  • Individual elements
This module defines an embedded target for Linux on Arm. The target generates code compatible with the "v7A" architecture.
Configuration settings sourced in gnu/targets/arm/GCArmv7AF.xdc
var GCArmv7AF = xdc.useModule('gnu.targets.arm.GCArmv7AF');
module-wide constants & types
    var obj = new GCArmv7AF.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new GCArmv7AF.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new GCArmv7AF.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new GCArmv7AF.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new GCArmv7AF.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new GCArmv7AF.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new GCArmv7AF.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new GCArmv7AF.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new GCArmv7AF.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new GCArmv7AF.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new GCArmv7AF.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new GCArmv7AF.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const GCArmv7AF.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const GCArmv7AF.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const GCArmv7AF.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const GCArmv7AF.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
        opts: "-Wa,-march=armv7-a -Wa,-mfloat-abi=hard"
    };
    const GCArmv7AF.base// A target that this target is based upon = ITarget.Module computed value;
    const GCArmv7AF.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const GCArmv7AF.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-march=armv7-a -mfloat-abi=hard"
    };
    const GCArmv7AF.isa// CPU Instruction Set Architecture (ISA) = String "v7A";
    const GCArmv7AF.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const GCArmv7AF.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const GCArmv7AF.name// Nickname for this target = String "GCArmv7AF";
    const GCArmv7AF.os// Name of OS required to run programs built for this target = String "Linux";
    const GCArmv7AF.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7A";
    const GCArmv7AF.sectMap// Output section name to segment type mapping = String[string] computed value;
    const GCArmv7AF.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const GCArmv7AF.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const GCArmv7AF.suffix// Suffix appended to all objs, libraries, and executable = String "v7AF";
     GCArmv7AF.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     GCArmv7AF.GCCTARG// The name of the platform executing programs produced by this target = String null;
     GCArmv7AF.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     GCArmv7AF.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv7AF.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     GCArmv7AF.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String null;
     GCArmv7AF.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     GCArmv7AF.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-fPIC -Wunused",
        suffix: "-Dfar= "
    };
     GCArmv7AF.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     GCArmv7AF.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     GCArmv7AF.execExt// Extension for executables = String undefined;
     GCArmv7AF.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     GCArmv7AF.includeOpts// Additional user configurable target-specific include path options = String "";
     GCArmv7AF.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    };
     GCArmv7AF.noStdLinkScript// Don't use the standard linker script = Bool false;
     GCArmv7AF.platform// The default platform name for this target = String "host.platforms.arm";
     GCArmv7AF.platforms// A set of platforms that can support this target = String[] [ ];
     GCArmv7AF.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
     GCArmv7AF.rawVersion// The raw version string from the compiler = String undefined;
     GCArmv7AF.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     GCArmv7AF.rootDir// Installation directory for this target's code generation tools = String undefined;
     GCArmv7AF.version// The Compatibility Key associated with this target = String undefined;
     GCArmv7AF.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     GCArmv7AF.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     GCArmv7AF.asmName// The function that converts a C name into an assembly name(String CName) returns String
     GCArmv7AF.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv7AF.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     GCArmv7AF.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     GCArmv7AF.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     GCArmv7AF.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv7AF.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     GCArmv7AF.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     GCArmv7AF.getRawVersion// Get a target-specific raw compiler version string() returns String
     GCArmv7AF.getVersion// Get a target-specific Compatibility Key string() returns String
     GCArmv7AF.initVers// () returns String
     GCArmv7AF.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     GCArmv7AF.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     GCArmv7AF.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct GCArmv7AF.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new GCArmv7AF.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct GCArmv7AF.Command
index URL

Required command and options

Configuration settings
var obj = new GCArmv7AF.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct GCArmv7AF.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new GCArmv7AF.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct GCArmv7AF.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new GCArmv7AF.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct GCArmv7AF.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new GCArmv7AF.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct GCArmv7AF.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new GCArmv7AF.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct GCArmv7AF.Extension
index URL

File extension to file type association

Configuration settings
var obj = new GCArmv7AF.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct GCArmv7AF.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new GCArmv7AF.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct GCArmv7AF.Model
index URL

Target runtime model

Configuration settings
var obj = new GCArmv7AF.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct GCArmv7AF.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new GCArmv7AF.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct GCArmv7AF.Options
index URL

User configurable command options

Configuration settings
var obj = new GCArmv7AF.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct GCArmv7AF.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new GCArmv7AF.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config GCArmv7AF.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const GCArmv7AF.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config GCArmv7AF.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const GCArmv7AF.alignDirectiveSupported = Bool false;
config GCArmv7AF.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const GCArmv7AF.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config GCArmv7AF.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const GCArmv7AF.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    opts: "-Wa,-march=armv7-a -Wa,-mfloat-abi=hard"
};
config GCArmv7AF.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const GCArmv7AF.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config GCArmv7AF.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const GCArmv7AF.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config GCArmv7AF.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const GCArmv7AF.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-march=armv7-a -mfloat-abi=hard"
};
config GCArmv7AF.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const GCArmv7AF.isa = String "v7A";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config GCArmv7AF.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const GCArmv7AF.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config GCArmv7AF.model // module-wide
index URL

Run-time model

Configuration settings
const GCArmv7AF.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config GCArmv7AF.name // module-wide
index URL

Nickname for this target

Configuration settings
const GCArmv7AF.name = String "GCArmv7AF";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config GCArmv7AF.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const GCArmv7AF.os = String "Linux";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config GCArmv7AF.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const GCArmv7AF.rts = String "gnu.targets.arm.rtsv7A";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config GCArmv7AF.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const GCArmv7AF.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config GCArmv7AF.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const GCArmv7AF.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config GCArmv7AF.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const GCArmv7AF.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config GCArmv7AF.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const GCArmv7AF.suffix = String "v7AF";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config GCArmv7AF.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
GCArmv7AF.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config GCArmv7AF.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
GCArmv7AF.GCCTARG = String null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config GCArmv7AF.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
GCArmv7AF.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config GCArmv7AF.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
GCArmv7AF.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv7AF.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
GCArmv7AF.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config GCArmv7AF.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
GCArmv7AF.bspLib = String null;
config GCArmv7AF.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
GCArmv7AF.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config GCArmv7AF.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
GCArmv7AF.ccOpts = ITarget2.Options {
    prefix: "-fPIC -Wunused",
    suffix: "-Dfar= "
};
config GCArmv7AF.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
GCArmv7AF.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config GCArmv7AF.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
GCArmv7AF.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config GCArmv7AF.execExt // module-wide
index URL

Extension for executables

Configuration settings
GCArmv7AF.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config GCArmv7AF.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
GCArmv7AF.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config GCArmv7AF.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
GCArmv7AF.includeOpts = String "";
config GCArmv7AF.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
GCArmv7AF.lnkOpts = ITarget2.Options {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
};
config GCArmv7AF.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
GCArmv7AF.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config GCArmv7AF.platform // module-wide
index URL

The default platform name for this target

Configuration settings
GCArmv7AF.platform = String "host.platforms.arm";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config GCArmv7AF.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
GCArmv7AF.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config GCArmv7AF.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
GCArmv7AF.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config GCArmv7AF.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
GCArmv7AF.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config GCArmv7AF.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
GCArmv7AF.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config GCArmv7AF.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
GCArmv7AF.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config GCArmv7AF.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
GCArmv7AF.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config GCArmv7AF.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
GCArmv7AF.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
GCArmv7AF.archive() // module-wide
index URL

Create an archive

Configuration settings
GCArmv7AF.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7AF.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
GCArmv7AF.asmName(String CName) returns String
GCArmv7AF.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
GCArmv7AF.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7AF.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
GCArmv7AF.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
GCArmv7AF.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
GCArmv7AF.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv7AF.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
GCArmv7AF.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
GCArmv7AF.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
GCArmv7AF.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
GCArmv7AF.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
GCArmv7AF.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
GCArmv7AF.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
GCArmv7AF.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7AF.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
GCArmv7AF.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7AF.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
GCArmv7AF.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7AF.initVers() // module-wide
index URL
Configuration settings
GCArmv7AF.initVers() returns String
GCArmv7AF.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
GCArmv7AF.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7AF.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
GCArmv7AF.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
GCArmv7AF.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
GCArmv7AF.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:07 GMT


interface gnu.targets.arm.IM

metaonly interface gnu.targets.arm.IM
index URL

Common interface for Cortex M bare metal targets

This defines common parameters of Cortex M bare metal targets. The targets generate code compatible with the "v7M" or "v8M" architecture.
XDCspec summary sourced in gnu/targets/arm/IM.xdc
metaonly interface IM { ...
// inherits gnu.targets.arm.ITarget
    // inherits gnu.targets.ITarget
        // inherits xdc.bld.ITarget3
            // inherits xdc.bld.ITarget2
                // inherits xdc.bld.ITarget
XDCspec declarations sourced in gnu/targets/arm/IM.xdc
package gnu.targets.arm;
metaonly interface IM inherits ITarget {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    readonly config Bool CYGWIN// Is the target's compiler a cygwin executable = false;
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    readonly config ITarget2.Command arBin// = {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    override readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
        opts: ""
    };
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    override readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: ""
    };
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    override readonly config ITarget.Model model// Run-time model = {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    override readonly config String rts// Name of a run-time support package to include = "gnu.targets.arm.rtsv7M";
    readonly config String sectMap// Output section name to segment type mapping[string];
    override readonly config String stdInclude// Standard C/C++ types header = "gnu/targets/arm/std.h";
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    config String BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = null;
    override config String GCCTARG// The name of the platform executing programs produced by this target = "arm-none-eabi";
    config String GCCVERS// Version number of the GCC compiler; e.g., "3.2" = null;
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "",
        suffix: ""
    };
    override config String bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = "nosys";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    };
    override config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[] = [ ];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    config ITarget.Extension extensions// File extensions recognized by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
    override config String includeOpts// Additional user configurable target-specific include path options = "";
    override config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
    };
    config Bool noStdLinkScript// Don't use the standard linker script = false;
    override config String platform// The default platform name for this target = "ti.platforms.tiva:TM4C1294NCPDT";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Profiles supported by this target[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
    config String rawVersion// The raw version string from the compiler;
    config String remoteHost// Remote host used to run compiler, linker, and archiver tools;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of GCC compiler version numbers to compatibility keys[string] = [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
    String initVers// ();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IM.StringArray
index URL
XDCspec declarations sourced in gnu/targets/arm/IM.xdc
typedef String StringArray[];
struct IM.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IM.Command
index URL

Required command and options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IM.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IM.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IM.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IM.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IM.Extension
index URL

File extension to file type association

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IM.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IM.Model
index URL

Target runtime model

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IM.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IM.Options
index URL

User configurable command options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IM.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IM.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config Bool CYGWIN = false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config IM.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config Bool alignDirectiveSupported = true;
config IM.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config ITarget2.Command ar = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config IM.arBin // module-wide
index URL
XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config ITarget2.Command arBin = {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config IM.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config ITarget2.Command asm = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    opts: ""
};
config IM.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IM.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IM.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config ITarget2.Command cc = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: ""
};
config IM.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IM.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config IM.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config ITarget.Model model = {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IM.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IM.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IM.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config String rts = "gnu.targets.arm.rtsv7M";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IM.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IM.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config String stdInclude = "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IM.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IM.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IM.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config String BINVERS = null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config IM.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config String GCCTARG = "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config IM.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config String GCCVERS = null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config IM.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IM.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config ITarget2.Options asmOpts = {
    prefix: "",
    suffix: ""
};
config IM.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config String bspLib = "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config IM.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IM.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= -D__DYNAMIC_REENT__ "
};
config IM.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config String compatibleSuffixes[] = [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IM.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config IM.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IM.extensions // module-wide
index URL

File extensions recognized by this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config IM.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config String includeOpts = "";
config IM.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
};
config IM.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config Bool noStdLinkScript = false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config IM.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config String platform = "ti.platforms.tiva:TM4C1294NCPDT";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IM.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IM.profiles // module-wide
index URL

Profiles supported by this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IM.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IM.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config String remoteHost;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config IM.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IM.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config String version;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config IM.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
override config String versionMap[string] = [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
IM.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String asmName(String CName);
IM.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IM.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IM.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IM.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IM.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IM.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IM.initVers() // module-wide
index URL
XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String initVers();
IM.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IM.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in gnu/targets/arm/IM.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:04 GMT


interface gnu.targets.arm.ITarget

metaonly interface gnu.targets.arm.ITarget
index URL

Interface to GCC compatible Arm compilers

XDCspec summary sourced in gnu/targets/arm/ITarget.xdc
metaonly interface ITarget { ...
// inherits gnu.targets.ITarget
    // inherits xdc.bld.ITarget3
        // inherits xdc.bld.ITarget2
            // inherits xdc.bld.ITarget
XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
package gnu.targets.arm;
metaonly interface ITarget inherits ITarget {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    readonly config Bool CYGWIN// Is the target's compiler a cygwin executable = false;
    readonly config Bool alignDirectiveSupported// The compiler supports an align directive = false;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    override readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
        opts: ""
    };
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    override readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: ""
    };
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    readonly config String sectMap// Output section name to segment type mapping[string];
    override readonly config String stdInclude// Standard C/C++ types header = "gnu/targets/std.h";
    readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 0,
            align: 0
        },
        t_Char: {
            size: 0,
            align: 0
        },
        t_Double: {
            size: 0,
            align: 0
        },
        t_Float: {
            size: 0,
            align: 0
        },
        t_Fxn: {
            size: 0,
            align: 0
        },
        t_Int: {
            size: 0,
            align: 0
        },
        t_Int8: {
            size: 0,
            align: 0
        },
        t_Int16: {
            size: 0,
            align: 0
        },
        t_Int32: {
            size: 0,
            align: 0
        },
        t_Int40: {
            size: 0,
            align: 0
        },
        t_Int64: {
            size: 0,
            align: 0
        },
        t_Long: {
            size: 0,
            align: 0
        },
        t_LDouble: {
            size: 0,
            align: 0
        },
        t_LLong: {
            size: 0,
            align: 0
        },
        t_Ptr: {
            size: 0,
            align: 0
        },
        t_Short: {
            size: 0,
            align: 0
        },
        t_Size: {
            size: 0,
            align: 0
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    config String BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = null;
    config String GCCTARG// The name of the platform executing programs produced by this target = null;
    config String GCCVERS// Version number of the GCC compiler; e.g., "3.2" = null;
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "",
        suffix: ""
    };
    config String bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = null;
    config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    config ITarget.Extension extensions// File extensions recognized by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
    override config String includeOpts// Additional user configurable target-specific include path options = "";
    override config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "",
        suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
    };
    config Bool noStdLinkScript// Don't use the standard linker script = false;
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Profiles supported by this target[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -ffunction-sections"
                },
                linkOpts: "-Wl,--gc-sections"
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g -pg"
                },
                linkOpts: "-pg"
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-fprofile-arcs -ftest-coverage"
                },
                linkOpts: "-fprofile-arcs -ftest-coverage"
            }
        ]
    ];
    config String rawVersion// The raw version string from the compiler;
    config String remoteHost// Remote host used to run compiler, linker, and archiver tools;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of GCC compiler version numbers to compatibility keys[string] = [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
    String initVers// ();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.Command
index URL

Required command and options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.Options
index URL

User configurable command options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config Bool CYGWIN = false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config Bool alignDirectiveSupported = false;
config ITarget.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override readonly config ITarget2.Command ar = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config ITarget.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override readonly config ITarget2.Command asm = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    opts: ""
};
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override readonly config ITarget2.Command cc = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: ""
};
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config ITarget.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override readonly config String stdInclude = "gnu/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 0,
        align: 0
    },
    t_Char: {
        size: 0,
        align: 0
    },
    t_Double: {
        size: 0,
        align: 0
    },
    t_Float: {
        size: 0,
        align: 0
    },
    t_Fxn: {
        size: 0,
        align: 0
    },
    t_Int: {
        size: 0,
        align: 0
    },
    t_Int8: {
        size: 0,
        align: 0
    },
    t_Int16: {
        size: 0,
        align: 0
    },
    t_Int32: {
        size: 0,
        align: 0
    },
    t_Int40: {
        size: 0,
        align: 0
    },
    t_Int64: {
        size: 0,
        align: 0
    },
    t_Long: {
        size: 0,
        align: 0
    },
    t_LDouble: {
        size: 0,
        align: 0
    },
    t_LLong: {
        size: 0,
        align: 0
    },
    t_Ptr: {
        size: 0,
        align: 0
    },
    t_Short: {
        size: 0,
        align: 0
    },
    t_Size: {
        size: 0,
        align: 0
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String BINVERS = null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config ITarget.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String GCCTARG = null;
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config ITarget.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String GCCVERS = null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config ITarget.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config ITarget2.Options asmOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String bspLib = null;
config ITarget.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config ITarget2.Options ccOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

File extensions recognized by this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override config String includeOpts = "";
config ITarget.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "",
    suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
};
config ITarget.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config Bool noStdLinkScript = false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Profiles supported by this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -ffunction-sections"
            },
            linkOpts: "-Wl,--gc-sections"
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g -pg"
            },
            linkOpts: "-pg"
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-fprofile-arcs -ftest-coverage"
            },
            linkOpts: "-fprofile-arcs -ftest-coverage"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String remoteHost;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override config String version;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config ITarget.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
override config String versionMap[string] = [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String asmName(String CName);
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.initVers() // module-wide
index URL
XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String initVers();
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in gnu/targets/arm/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:04 GMT


module gnu.targets.arm.M3

metaonly module gnu.targets.arm.M3
index URL

Embedded little endian Cortex M3 bare metal target

  • Configuration settings
  • Individual elements
This module defines an embedded bare metal target on Cortex M3. The target generates code compatible with the "v7M" architecture.
Configuration settings sourced in gnu/targets/arm/M3.xdc
var M3 = xdc.useModule('gnu.targets.arm.M3');
module-wide constants & types
    var obj = new M3.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M3.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M3.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M3.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M3.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M3.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M3.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M3.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M3.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M3.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M3.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M3.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M3.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const M3.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M3.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const M3.arBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    const M3.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-mcpu=cortex-m3 -Wa,-mthumb"
    };
    const M3.asmBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-mcpu=cortex-m3 -Wa,-mthumb"
    };
    const M3.base// A target that this target is based upon = ITarget.Module computed value;
    const M3.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M3.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-m3 -mthumb -mabi=aapcs -g"
    };
    const M3.ccBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-m3 -mthumb -mabi=aapcs -g"
    };
    const M3.isa// CPU Instruction Set Architecture (ISA) = String "v7M";
    const M3.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const M3.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M3.name// Nickname for this target = String "M3";
    const M3.os// Name of OS required to run programs built for this target = String computed value;
    const M3.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7M";
    const M3.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M3.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const M3.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M3.suffix// Suffix appended to all objs, libraries, and executable = String "m3g";
     M3.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     M3.GCCTARG// The name of the platform executing programs produced by this target = String "arm-none-eabi";
     M3.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     M3.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M3.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M3.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String "nosys";
     M3.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M3.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    };
     M3.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     M3.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M3.execExt// Extension for executables = String undefined;
     M3.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     M3.includeOpts// Additional user configurable target-specific include path options = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
     M3.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-mthumb -march=armv7-m -nostartfiles -Wl,-static -Wl,--gc-sections",
        suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7-m -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    };
     M3.noStdLinkScript// Don't use the standard linker script = Bool false;
     M3.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT";
     M3.platforms// A set of platforms that can support this target = String[] [ ];
     M3.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M3.rawVersion// The raw version string from the compiler = String undefined;
     M3.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     M3.rootDir// Installation directory for this target's code generation tools = String undefined;
     M3.version// The Compatibility Key associated with this target = String undefined;
     M3.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     M3.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M3.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M3.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M3.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M3.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M3.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M3.getRawVersion// Get a target-specific raw compiler version string() returns String
     M3.getVersion// Get a target-specific Compatibility Key string() returns String
     M3.initVers// () returns String
     M3.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M3.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M3.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M3.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M3.Command
index URL

Required command and options

Configuration settings
var obj = new M3.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M3.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M3.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M3.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M3.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M3.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M3.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M3.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M3.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M3.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M3.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M3.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M3.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M3.Model
index URL

Target runtime model

Configuration settings
var obj = new M3.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M3.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M3.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M3.Options
index URL

User configurable command options

Configuration settings
var obj = new M3.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M3.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M3.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M3.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const M3.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config M3.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M3.alignDirectiveSupported = Bool true;
config M3.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M3.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config M3.arBin // module-wide
index URL
Configuration settings
const M3.arBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config M3.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M3.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-mcpu=cortex-m3 -Wa,-mthumb"
};
config M3.asmBin // module-wide
index URL
Configuration settings
const M3.asmBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-mcpu=cortex-m3 -Wa,-mthumb"
};
config M3.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M3.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M3.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M3.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M3.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M3.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-m3 -mthumb -mabi=aapcs -g"
};
config M3.ccBin // module-wide
index URL
Configuration settings
const M3.ccBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-m3 -mthumb -mabi=aapcs -g"
};
config M3.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M3.isa = String "v7M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M3.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M3.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config M3.model // module-wide
index URL

Run-time model

Configuration settings
const M3.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M3.name // module-wide
index URL

Nickname for this target

Configuration settings
const M3.name = String "M3";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M3.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M3.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M3.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M3.rts = String "gnu.targets.arm.rtsv7M";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M3.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M3.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M3.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const M3.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M3.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M3.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M3.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M3.suffix = String "m3g";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M3.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
M3.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config M3.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
M3.GCCTARG = String "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config M3.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
M3.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config M3.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M3.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M3.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M3.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M3.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
M3.bspLib = String "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config M3.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M3.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M3.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M3.ccOpts = ITarget2.Options {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= -D__DYNAMIC_REENT__ "
};
config M3.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M3.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M3.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M3.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M3.execExt // module-wide
index URL

Extension for executables

Configuration settings
M3.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M3.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
M3.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M3.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M3.includeOpts = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
DETAILS
This target uses newlib-nano run-time.
config M3.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M3.lnkOpts = ITarget2.Options {
    prefix: "-mthumb -march=armv7-m -nostartfiles -Wl,-static -Wl,--gc-sections",
    suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7-m -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
};
config M3.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
M3.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config M3.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M3.platform = String "ti.platforms.tiva:TM4C1294NCPDT";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M3.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M3.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M3.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
M3.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M3.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M3.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M3.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
M3.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config M3.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M3.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M3.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M3.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config M3.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
M3.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
M3.archive() // module-wide
index URL

Create an archive

Configuration settings
M3.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M3.asmName(String CName) returns String
M3.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M3.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M3.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M3.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M3.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M3.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M3.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M3.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M3.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M3.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M3.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M3.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M3.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M3.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M3.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M3.initVers() // module-wide
index URL
Configuration settings
M3.initVers() returns String
M3.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M3.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M3.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M3.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M3.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:07 GMT


module gnu.targets.arm.M33F

metaonly module gnu.targets.arm.M33F
index URL

Embedded Cortex M33F, little endian, bare metal target

  • Configuration settings
  • Individual elements
This module defines an embedded bare metal target on Cortex M33F. The target generates code compatible with the "v8M" architecture.
Configuration settings sourced in gnu/targets/arm/M33F.xdc
var M33F = xdc.useModule('gnu.targets.arm.M33F');
module-wide constants & types
    var obj = new M33F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M33F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M33F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M33F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M33F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M33F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M33F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M33F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M33F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M33F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M33F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M33F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M33F.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const M33F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M33F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const M33F.arBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    const M33F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-march=armv8-m.main -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv5-sp-d16 "
    };
    const M33F.asmBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-march=armv8-m.main -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv5-sp-d16 "
    };
    const M33F.base// A target that this target is based upon = ITarget.Module computed value;
    const M33F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M33F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mabi=aapcs -g"
    };
    const M33F.ccBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
        opts: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mabi=aapcs -g"
    };
    const M33F.isa// CPU Instruction Set Architecture (ISA) = String "v8M";
    const M33F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const M33F.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M33F.name// Nickname for this target = String "M33F";
    const M33F.os// Name of OS required to run programs built for this target = String computed value;
    const M33F.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv8M";
    const M33F.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M33F.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const M33F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M33F.suffix// Suffix appended to all objs, libraries, and executable = String "m33fg";
     M33F.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     M33F.GCCTARG// The name of the platform executing programs produced by this target = String "arm-none-eabi";
     M33F.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     M33F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M33F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M33F.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String "nosys";
     M33F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M33F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= "
    };
     M33F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     M33F.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M33F.execExt// Extension for executables = String undefined;
     M33F.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     M33F.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/$(GCCTARG)/include/newlib-nano -I$(rootDir)/$(GCCTARG)/include";
     M33F.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -nostartfiles -Wl,-static -Wl,--gc-sections ",
        suffix: "-Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    };
     M33F.noStdLinkScript// Don't use the standard linker script = Bool false;
     M33F.platform// The default platform name for this target = String "ti.platforms.cortexM:FVP_MPS2";
     M33F.platforms// A set of platforms that can support this target = String[] [ ];
     M33F.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M33F.rawVersion// The raw version string from the compiler = String undefined;
     M33F.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     M33F.rootDir// Installation directory for this target's code generation tools = String undefined;
     M33F.version// The Compatibility Key associated with this target = String undefined;
     M33F.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     M33F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M33F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M33F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M33F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M33F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M33F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M33F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M33F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M33F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M33F.getRawVersion// Get a target-specific raw compiler version string() returns String
     M33F.getVersion// Get a target-specific Compatibility Key string() returns String
     M33F.initVers// () returns String
     M33F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M33F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M33F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M33F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M33F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M33F.Command
index URL

Required command and options

Configuration settings
var obj = new M33F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M33F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M33F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M33F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M33F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M33F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M33F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M33F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M33F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M33F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M33F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M33F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M33F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M33F.Model
index URL

Target runtime model

Configuration settings
var obj = new M33F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M33F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M33F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M33F.Options
index URL

User configurable command options

Configuration settings
var obj = new M33F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M33F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M33F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M33F.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const M33F.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config M33F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M33F.alignDirectiveSupported = Bool true;
config M33F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M33F.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config M33F.arBin // module-wide
index URL
Configuration settings
const M33F.arBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config M33F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M33F.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-march=armv8-m.main -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv5-sp-d16 "
};
config M33F.asmBin // module-wide
index URL
Configuration settings
const M33F.asmBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-march=armv8-m.main -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv5-sp-d16 "
};
config M33F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M33F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M33F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M33F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M33F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M33F.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mabi=aapcs -g"
};
config M33F.ccBin // module-wide
index URL
Configuration settings
const M33F.ccBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    opts: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mabi=aapcs -g"
};
config M33F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M33F.isa = String "v8M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M33F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M33F.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config M33F.model // module-wide
index URL

Run-time model

Configuration settings
const M33F.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M33F.name // module-wide
index URL

Nickname for this target

Configuration settings
const M33F.name = String "M33F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M33F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M33F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M33F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M33F.rts = String "gnu.targets.arm.rtsv8M";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M33F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M33F.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M33F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const M33F.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M33F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M33F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M33F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M33F.suffix = String "m33fg";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M33F.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
M33F.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config M33F.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
M33F.GCCTARG = String "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config M33F.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
M33F.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config M33F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M33F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M33F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M33F.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M33F.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
M33F.bspLib = String "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config M33F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M33F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M33F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M33F.ccOpts = ITarget2.Options {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= "
};
config M33F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M33F.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M33F.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M33F.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M33F.execExt // module-wide
index URL

Extension for executables

Configuration settings
M33F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M33F.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
M33F.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M33F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M33F.includeOpts = String "-I$(rootDir)/$(GCCTARG)/include/newlib-nano -I$(rootDir)/$(GCCTARG)/include";
config M33F.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M33F.lnkOpts = ITarget2.Options {
    prefix: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -nostartfiles -Wl,-static -Wl,--gc-sections ",
    suffix: "-Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
};
config M33F.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
M33F.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config M33F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M33F.platform = String "ti.platforms.cortexM:FVP_MPS2";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M33F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M33F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M33F.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
M33F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M33F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M33F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M33F.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
M33F.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config M33F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M33F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M33F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M33F.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config M33F.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
M33F.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
M33F.archive() // module-wide
index URL

Create an archive

Configuration settings
M33F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M33F.asmName(String CName) returns String
M33F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M33F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M33F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M33F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M33F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M33F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M33F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M33F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M33F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M33F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M33F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M33F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M33F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M33F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M33F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M33F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M33F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M33F.initVers() // module-wide
index URL
Configuration settings
M33F.initVers() returns String
M33F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M33F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M33F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M33F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M33F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:07 GMT


module gnu.targets.arm.M4

metaonly module gnu.targets.arm.M4
index URL

Embedded Cortex M4, little endian, bare metal target

  • Configuration settings
  • Individual elements
This module defines an embedded bare metal target on Cortex M4. The target generates code compatible with the "v7M" architecture.
Configuration settings sourced in gnu/targets/arm/M4.xdc
var M4 = xdc.useModule('gnu.targets.arm.M4');
module-wide constants & types
    var obj = new M4.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const M4.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const M4.arBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    const M4.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb"
    };
    const M4.asmBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb"
    };
    const M4.base// A target that this target is based upon = ITarget.Module computed value;
    const M4.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mabi=aapcs -g"
    };
    const M4.ccBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mabi=aapcs -g"
    };
    const M4.isa// CPU Instruction Set Architecture (ISA) = String "v7M4";
    const M4.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const M4.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4.name// Nickname for this target = String "M4";
    const M4.os// Name of OS required to run programs built for this target = String computed value;
    const M4.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7M";
    const M4.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M4.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const M4.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M4.suffix// Suffix appended to all objs, libraries, and executable = String "m4g";
     M4.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     M4.GCCTARG// The name of the platform executing programs produced by this target = String "arm-none-eabi";
     M4.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     M4.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String "nosys";
     M4.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M4.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    };
     M4.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     M4.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M4.execExt// Extension for executables = String undefined;
     M4.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     M4.includeOpts// Additional user configurable target-specific include path options = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
     M4.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-mthumb -march=armv7e-m -nostartfiles -Wl,-static -Wl,--gc-sections ",
        suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7e-m -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    };
     M4.noStdLinkScript// Don't use the standard linker script = Bool false;
     M4.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT";
     M4.platforms// A set of platforms that can support this target = String[] [ ];
     M4.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M4.rawVersion// The raw version string from the compiler = String undefined;
     M4.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     M4.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4.version// The Compatibility Key associated with this target = String undefined;
     M4.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     M4.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M4.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4.getVersion// Get a target-specific Compatibility Key string() returns String
     M4.initVers// () returns String
     M4.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4.Command
index URL

Required command and options

Configuration settings
var obj = new M4.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4.Model
index URL

Target runtime model

Configuration settings
var obj = new M4.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4.Options
index URL

User configurable command options

Configuration settings
var obj = new M4.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const M4.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config M4.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4.alignDirectiveSupported = Bool true;
config M4.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config M4.arBin // module-wide
index URL
Configuration settings
const M4.arBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config M4.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb"
};
config M4.asmBin // module-wide
index URL
Configuration settings
const M4.asmBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb"
};
config M4.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mabi=aapcs -g"
};
config M4.ccBin // module-wide
index URL
Configuration settings
const M4.ccBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mabi=aapcs -g"
};
config M4.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4.isa = String "v7M4";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config M4.model // module-wide
index URL

Run-time model

Configuration settings
const M4.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4.name = String "M4";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4.rts = String "gnu.targets.arm.rtsv7M";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const M4.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4.suffix = String "m4g";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
M4.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config M4.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
M4.GCCTARG = String "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config M4.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
M4.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config M4.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
M4.bspLib = String "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config M4.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M4.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4.ccOpts = ITarget2.Options {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= -D__DYNAMIC_REENT__ "
};
config M4.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M4.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M4.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
M4.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M4.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4.includeOpts = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
DETAILS
This target uses newlib-nano run-time.
config M4.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M4.lnkOpts = ITarget2.Options {
    prefix: "-mthumb -march=armv7e-m -nostartfiles -Wl,-static -Wl,--gc-sections ",
    suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7e-m -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
};
config M4.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
M4.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config M4.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4.platform = String "ti.platforms.tiva:TM4C1294NCPDT";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
M4.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
M4.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config M4.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config M4.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
M4.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
M4.archive() // module-wide
index URL

Create an archive

Configuration settings
M4.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M4.asmName(String CName) returns String
M4.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4.initVers() // module-wide
index URL
Configuration settings
M4.initVers() returns String
M4.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:07 GMT


module gnu.targets.arm.M4F

metaonly module gnu.targets.arm.M4F
index URL

Embedded Cortex M4F, little endian, bare metal target

  • Configuration settings
  • Individual elements
This module defines an embedded bare metal target on Cortex M4F. The target generates code compatible with the "v7M" architecture.
Configuration settings sourced in gnu/targets/arm/M4F.xdc
var M4F = xdc.useModule('gnu.targets.arm.M4F');
module-wide constants & types
    var obj = new M4F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4F.CYGWIN// Is the target's compiler a cygwin executable = Bool false;
    const M4F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
        opts: "cr"
    };
    const M4F.arBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-ar ",
        opts: ""
    };
    const M4F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv4-sp-d16 "
    };
    const M4F.asmBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
        opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv4-sp-d16 "
    };
    const M4F.base// A target that this target is based upon = ITarget.Module computed value;
    const M4F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -g"
    };
    const M4F.ccBin// = ITarget2.Command {
        cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
        opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -g"
    };
    const M4F.isa// CPU Instruction Set Architecture (ISA) = String "v7M4";
    const M4F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
        opts: ""
    };
    const M4F.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4F.name// Nickname for this target = String "M4F";
    const M4F.os// Name of OS required to run programs built for this target = String computed value;
    const M4F.rts// Name of a run-time support package to include = String "gnu.targets.arm.rtsv7M";
    const M4F.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M4F.stdInclude// Standard C/C++ types header = String "gnu/targets/arm/std.h";
    const M4F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M4F.suffix// Suffix appended to all objs, libraries, and executable = String "m4fg";
     M4F.BINVERS// Version number of binutils used with the compiler; e.g., "2.19" = String null;
     M4F.GCCTARG// The name of the platform executing programs produced by this target = String "arm-none-eabi";
     M4F.GCCVERS// Version number of the GCC compiler; e.g., "3.2" = String null;
     M4F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4F.bspLib// bspLib is assigned the name of the BSP library. The specified library is included on the link line = String "nosys";
     M4F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M4F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
        suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    };
     M4F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [ ];
     M4F.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M4F.execExt// Extension for executables = String undefined;
     M4F.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     M4F.includeOpts// Additional user configurable target-specific include path options = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
     M4F.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-mthumb -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -nostartfiles -Wl,-static -Wl,--gc-sections ",
        suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7e-m/fpv4-sp/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    };
     M4F.noStdLinkScript// Don't use the standard linker script = Bool false;
     M4F.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT";
     M4F.platforms// A set of platforms that can support this target = String[] [ ];
     M4F.profiles// Profiles supported by this target = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-g"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M4F.rawVersion// The raw version string from the compiler = String undefined;
     M4F.remoteHost// Remote host used to run compiler, linker, and archiver tools = String undefined;
     M4F.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4F.version// The Compatibility Key associated with this target = String undefined;
     M4F.versionMap// Map of GCC compiler version numbers to compatibility keys = String[string] [
        [
            "gcc3.2",
            "1,0,3.2,0"
        ]
    ];
module-wide functions
     M4F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M4F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4F.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4F.getVersion// Get a target-specific Compatibility Key string() returns String
     M4F.initVers// () returns String
     M4F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4F.Command
index URL

Required command and options

Configuration settings
var obj = new M4F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4F.Model
index URL

Target runtime model

Configuration settings
var obj = new M4F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4F.Options
index URL

User configurable command options

Configuration settings
var obj = new M4F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4F.CYGWIN // module-wide
index URL

Is the target's compiler a cygwin executable

Configuration settings
const M4F.CYGWIN = Bool false;
DETAILS
Since file names produced by cygwin-based tools differ from the names understood by other Windows executables, it is important to avoid using the names output by cygwin tools as input to non-cygwin programs. This property tells the target whether or not it's possible to use the output from gcc -MD -MF, for example.
config M4F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4F.alignDirectiveSupported = Bool true;
config M4F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4F.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    opts: "cr"
};
config M4F.arBin // module-wide
index URL
Configuration settings
const M4F.arBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-ar ",
    opts: ""
};
config M4F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4F.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv4-sp-d16 "
};
config M4F.asmBin // module-wide
index URL
Configuration settings
const M4F.asmBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv4-sp-d16 "
};
config M4F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4F.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -g"
};
config M4F.ccBin // module-wide
index URL
Configuration settings
const M4F.ccBin = ITarget2.Command {
    cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -g"
};
config M4F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4F.isa = String "v7M4";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4F.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    opts: ""
};
config M4F.model // module-wide
index URL

Run-time model

Configuration settings
const M4F.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4F.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4F.name = String "M4F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4F.rts = String "gnu.targets.arm.rtsv7M";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4F.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const M4F.stdInclude = String "gnu/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4F.suffix = String "m4fg";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4F.BINVERS // module-wide
index URL

Version number of binutils used with the compiler; e.g., "2.19"

Configuration settings
M4F.BINVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "ld -v".
config M4F.GCCTARG // module-wide
index URL

The name of the platform executing programs produced by this target

Configuration settings
M4F.GCCTARG = String "arm-none-eabi";
DETAILS
This string can be supplied by the user, otherwise is is obtained from the compiler and follows the GNU standard format (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>); e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
When building a GCC compiler, there are three different execution platforms to consider: the platform used to "build" the compiler, the "host" platform that runs the compiler, and the "target" platform that runs the executables produced by the compiler. All three platforms are identified using a configuration name defined by GNU Autotools. GCCTARG is the name of the "target" platform.
config M4F.GCCVERS // module-wide
index URL

Version number of the GCC compiler; e.g., "3.2"

Configuration settings
M4F.GCCVERS = String null;
DETAILS
This string can be supplied by the user, otherwise it is obtained by running "gcc -dumpversion".
config M4F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4F.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4F.bspLib // module-wide
index URL

bspLib is assigned the name of the BSP library. The specified library is included on the link line

Configuration settings
M4F.bspLib = String "nosys";
DETAILS
Possible values for this field are "nosys" and "rdimon" with the default being "nosys".
config M4F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M4F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4F.ccOpts = ITarget2.Options {
    prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    suffix: "-Dfar= -D__DYNAMIC_REENT__ "
};
config M4F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4F.compatibleSuffixes = String[] [ ];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4F.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M4F.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M4F.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4F.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
M4F.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M4F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4F.includeOpts = String "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
DETAILS
This target uses newlib-nano run-time.
config M4F.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M4F.lnkOpts = ITarget2.Options {
    prefix: "-mthumb -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -nostartfiles -Wl,-static -Wl,--gc-sections ",
    suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7e-m/fpv4-sp/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
};
config M4F.noStdLinkScript // module-wide
index URL

Don't use the standard linker script

Configuration settings
M4F.noStdLinkScript = Bool false;
DETAILS
If true, add a -T flag before the generated package/cfg/*.xdl file passed to the linker. This flag suppresses use of the standard linker script implicit in the GCC flow, which effectively says the generated .xdl file assumes total control for all MEMORY and SECTION directives.
config M4F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4F.platform = String "ti.platforms.tiva:TM4C1294NCPDT";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4F.profiles // module-wide
index URL

Profiles supported by this target

Configuration settings
M4F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-g"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4F.remoteHost // module-wide
index URL

Remote host used to run compiler, linker, and archiver tools

Configuration settings
M4F.remoteHost = String undefined;
DETAILS
If remoteHost is null (or undefined), the configured compiler is run locally; otherwise, remoteHost is taken to be the host name of the machine that that should be used to run the specified compiler.
All target commands are prefixed with a command that uses rsh to run the commands on the specified host. Thus, in order to use this setting, the remote machine must be support rsh and the user must have permission to run commands from the local machine on the remote host named remoteHost. This usually involves adding a line to the user's ~/.rhosts file on the remote machine of the form:
      local-machine-name user-name
where local-machine-name is the name of the local machine and user-name is the user's login name on the local machine.
config M4F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4F.version = String undefined;
DETAILS
The first two components of this target's Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 3.4.6, the Compatibility Key is [1,0,3.4,6].
config M4F.versionMap // module-wide
index URL

Map of GCC compiler version numbers to compatibility keys

Configuration settings
M4F.versionMap = String[string] [
    [
        "gcc3.2",
        "1,0,3.2,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibilty key is used to validate consistency among a collection of packages used in a configuration.
The compiler version string is "gcc<ver>", where <ver> is GCCVERS.
If a compiler version is not found in this map the default is "1,0,<ver>", where <ver> is the compiler version number. Thus, the user only needs to extend this table when a significant incompatibility occurs or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
M4F.archive() // module-wide
index URL

Create an archive

Configuration settings
M4F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M4F.asmName(String CName) returns String
M4F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4F.initVers() // module-wide
index URL
Configuration settings
M4F.initVers() returns String
M4F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:08 GMT


package gnu.targets.arm.rtsv5T
index URL

Runtime support package for the gnu.targets.arm.GCArmv5T target

This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs). [ more ... ]
XDCspec declarations sourced in gnu/targets/arm/rtsv5T/package.xdc
requires xdc.runtime;
package gnu.targets.arm.rtsv5T [1, 0, 0] {
}
DETAILS
This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs).
The compiler used to build the library in this package is Montavista 3.4.3-25.0.24.0500846 compiler.
generated on Sun, 25 Nov 2018 22:19:02 GMT


package gnu.targets.arm.rtsv6
index URL

Runtime support package for the gnu.targets.arm.GCArmv6 target

This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs). [ more ... ]
XDCspec declarations sourced in gnu/targets/arm/rtsv6/package.xdc
requires xdc.runtime;
package gnu.targets.arm.rtsv6 [1, 0, 0] {
}
DETAILS
This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs).
The compiler used to build the library in this package is Codesourcery 4.3.2 (2008q3-72) compiler.
generated on Sun, 25 Nov 2018 22:19:02 GMT


package gnu.targets.arm.rtsv7A
index URL

Runtime support package for the gnu.targets.arm.GCArmv7A target

This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs). [ more ... ]
XDCspec declarations sourced in gnu/targets/arm/rtsv7A/package.xdc
requires xdc.runtime;
package gnu.targets.arm.rtsv7A [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
DETAILS
This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs).
The compiler used to build the library in this package is Codesourcery 4.3.2 (2008q3-72) compiler.
generated on Sun, 25 Nov 2018 22:19:02 GMT


module gnu.targets.arm.rtsv7A.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in gnu/targets/arm/rtsv7A/Settings.xdc
#include <gnu/targets/arm/rtsv7A/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in gnu/targets/arm/rtsv7A/Settings.xdc
var Settings = xdc.useModule('gnu.targets.arm.rtsv7A.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:02 GMT


package gnu.targets.arm.rtsv7M
index URL

Runtime support package for the gnu.targets.arm.GCArmv7M target

This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs).
XDCspec declarations sourced in gnu/targets/arm/rtsv7M/package.xdc
requires xdc.runtime;
package gnu.targets.arm.rtsv7M [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:19:08 GMT


module gnu.targets.arm.rtsv7M.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in gnu/targets/arm/rtsv7M/Settings.xdc
#include <gnu/targets/arm/rtsv7M/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in gnu/targets/arm/rtsv7M/Settings.xdc
var Settings = xdc.useModule('gnu.targets.arm.rtsv7M.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:08 GMT


package gnu.targets.arm.rtsv8A
index URL

Runtime support package for ARM v8A targets

This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs). [ more ... ]
XDCspec declarations sourced in gnu/targets/arm/rtsv8A/package.xdc
requires xdc.runtime;
package gnu.targets.arm.rtsv8A [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
DETAILS
This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs).
The compiler used to build the library in this package is Linaro Aarch64 gcc compiler
generated on Sun, 25 Nov 2018 22:19:03 GMT


module gnu.targets.arm.rtsv8A.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in gnu/targets/arm/rtsv8A/Settings.xdc
#include <gnu/targets/arm/rtsv8A/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in gnu/targets/arm/rtsv8A/Settings.xdc
var Settings = xdc.useModule('gnu.targets.arm.rtsv8A.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:03 GMT


package gnu.targets.arm.rtsv8M
index URL

Runtime support package for GNU ARMv8M targets

This package builds a library of standard XDC system support functions using sources from the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs).
XDCspec declarations sourced in gnu/targets/arm/rtsv8M/package.xdc
requires xdc.runtime;
package gnu.targets.arm.rtsv8M [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:19:03 GMT


module gnu.targets.arm.rtsv8M.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in gnu/targets/arm/rtsv8M/Settings.xdc
#include <gnu/targets/arm/rtsv8M/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in gnu/targets/arm/rtsv8M/Settings.xdc
var Settings = xdc.useModule('gnu.targets.arm.rtsv8M.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:03 GMT


package gnu.targets.rts86GW
index URL

Runtime support package for the x86 targets using the mingw codegen tools

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in gnu/targets/rts86GW/package.xdc
requires xdc.runtime;
package gnu.targets.rts86GW [1, 0, 0] {
}
generated on Sun, 25 Nov 2018 22:19:08 GMT


package gnu.targets.rts86M
index URL

Runtime support package for the MacOS x86 targets

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in gnu/targets/rts86M/package.xdc
requires xdc.runtime;
package gnu.targets.rts86M [1, 0, 0] {
}
generated on Sun, 25 Nov 2018 22:19:02 GMT


package gnu.targets.rts86U
index URL

Runtime support package for the x86 targets

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in gnu/targets/rts86U/package.xdc
requires xdc.runtime;
package gnu.targets.rts86U [1, 0, 0] {
}
generated on Sun, 25 Nov 2018 22:19:02 GMT


package host.platforms.PC
index URL

Platform package for the PC platform

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on a PC platform. This platform supports multiple host operating systems; Linux, Windows, etc.
XDCspec declarations sourced in host/platforms/PC/package.xdc
requires xdc.platform;
package host.platforms.PC [1, 0, 0] {
    module Intel80586;
    // Pentium device data sheet module
    module Platform;
    // Native PC platform support
}
generated on Sun, 25 Nov 2018 22:19:16 GMT


module host.platforms.PC.Intel80586

metaonly module host.platforms.PC.Intel80586
index URL

Pentium device data sheet module

  • Configuration settings
  • Individual elements
This module provides basic data suitable for Intel Pentium based native builds.
Configuration settings sourced in host/platforms/PC/Intel80586.xdc
var Intel80586 = xdc.useModule('host.platforms.PC.Intel80586');
per-instance config parameters
    var params = new Intel80586.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "586";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemeoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Intel80586.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Intel80586.Params;
// Instance config-params object
    params.cpuCore = String "586";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemeoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Intel80586.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Intel80586.Params;
...
params.cpuCore = String "586";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Intel80586.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Intel80586.Params;
...
params.cpuCoreRevision = String "1.0";
config Intel80586.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Intel80586.Params;
...
params.dataWordSize = Int 4;
config Intel80586.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Intel80586.Params;
...
params.deviceHeader = String undefined;
config Intel80586.Params.memMap // instance
index URL

The memory map returned be getMemeoryMap()

Configuration settings
var params = new Intel80586.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config Intel80586.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Intel80586.Params;
...
params.minDataUnitSize = Int 1;
config Intel80586.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Intel80586.Params;
...
params.minProgUnitSize = Int 1;
config Intel80586.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Intel80586.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Intel80586.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Intel80586.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Intel80586.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Intel80586.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:15 GMT


module host.platforms.PC.Platform

metaonly module host.platforms.PC.Platform
index URL

Native PC platform support

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in host/platforms/PC/Platform.xdc
var Platform = xdc.useModule('host.platforms.PC.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:19:16 GMT


package host.platforms.SUN
index URL

Platform package for the SUN Sparc platform

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on a SUN Sparc platform.
XDCspec declarations sourced in host/platforms/SUN/package.xdc
requires xdc.platform;
package host.platforms.SUN [1, 0, 0, 1] {
    module Platform;
    // Native SUN Solaris platform support
    module SunSparc7;
    // Sparc device data sheet module
}
generated on Sun, 25 Nov 2018 22:19:16 GMT


module host.platforms.SUN.Platform

metaonly module host.platforms.SUN.Platform
index URL

Native SUN Solaris platform support

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in host/platforms/SUN/Platform.xdc
var Platform = xdc.useModule('host.platforms.SUN.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.remoteHost// = String undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.remoteHost = String undefined;
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.remoteHost // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.remoteHost = String undefined;
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:19:16 GMT


module host.platforms.SUN.SunSparc7

metaonly module host.platforms.SUN.SunSparc7
index URL

Sparc device data sheet module

  • Configuration settings
  • Individual elements
This module provides basic data suitable for SUN Solaris native builds.
Configuration settings sourced in host/platforms/SUN/SunSparc7.xdc
var SunSparc7 = xdc.useModule('host.platforms.SUN.SunSparc7');
per-instance config parameters
    var params = new SunSparc7.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "sparc7";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemeoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = SunSparc7.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new SunSparc7.Params;
// Instance config-params object
    params.cpuCore = String "sparc7";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemeoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config SunSparc7.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new SunSparc7.Params;
...
params.cpuCore = String "sparc7";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config SunSparc7.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new SunSparc7.Params;
...
params.cpuCoreRevision = String "1.0";
config SunSparc7.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new SunSparc7.Params;
...
params.dataWordSize = Int 4;
config SunSparc7.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new SunSparc7.Params;
...
params.deviceHeader = String undefined;
config SunSparc7.Params.memMap // instance
index URL

The memory map returned be getMemeoryMap()

Configuration settings
var params = new SunSparc7.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config SunSparc7.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new SunSparc7.Params;
...
params.minDataUnitSize = Int 1;
config SunSparc7.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new SunSparc7.Params;
...
params.minProgUnitSize = Int 1;
config SunSparc7.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new SunSparc7.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new SunSparc7.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SunSparc7.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
SunSparc7.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
SunSparc7.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:16 GMT


package host.platforms.arm
index URL

Platform package for the ARM-based platforms running an OS with virtual memory

XDCspec declarations sourced in host/platforms/arm/package.xdc
requires xdc.platform;
package host.platforms.arm [1, 0, 0, 0] {
    module Platform;
    // ARM-on-Linux platform support
}
generated on Sun, 25 Nov 2018 22:19:16 GMT


module host.platforms.arm.Platform

metaonly module host.platforms.arm.Platform
index URL

ARM-on-Linux platform support

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
Configuration settings sourced in host/platforms/arm/Platform.xdc
var Platform = xdc.useModule('host.platforms.arm.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.catalogName// The name of the package that contains the module 'deviceName' = String "ti.catalog.arm";
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.deviceName// The CPU simulated by this platform = String "TMS320CDM6446";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.catalogName = String "ti.catalog.arm";
    // The name of the package that contains the module 'deviceName'
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.deviceName = String "TMS320CDM6446";
    // The CPU simulated by this platform
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.catalogName // instance
index URL

The name of the package that contains the module 'deviceName'

Configuration settings
var params = new Platform.Params;
...
params.catalogName = String "ti.catalog.arm";
DETAILS
This parameter is required.
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU simulated by this platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String "TMS320CDM6446";
DETAILS
This parameter is required.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:19:16 GMT


package host.platforms.macos
index URL

Platform package for the MacOS platform

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on a MacOS platform.
XDCspec declarations sourced in host/platforms/macos/package.xdc
requires xdc.platform;
package host.platforms.macos [1, 0, 0] {
    module Intel80586;
    // Pentium device data sheet module
    module Platform;
    // Native macos platform support
}
generated on Sun, 25 Nov 2018 22:19:16 GMT


module host.platforms.macos.Intel80586

metaonly module host.platforms.macos.Intel80586
index URL

Pentium device data sheet module

  • Configuration settings
  • Individual elements
This module provides basic data suitable for Intel Pentium based native builds.
Configuration settings sourced in host/platforms/macos/Intel80586.xdc
var Intel80586 = xdc.useModule('host.platforms.macos.Intel80586');
per-instance config parameters
    var params = new Intel80586.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "586";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemeoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Intel80586.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Intel80586.Params;
// Instance config-params object
    params.cpuCore = String "586";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemeoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Intel80586.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Intel80586.Params;
...
params.cpuCore = String "586";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Intel80586.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Intel80586.Params;
...
params.cpuCoreRevision = String "1.0";
config Intel80586.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Intel80586.Params;
...
params.dataWordSize = Int 4;
config Intel80586.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Intel80586.Params;
...
params.deviceHeader = String undefined;
config Intel80586.Params.memMap // instance
index URL

The memory map returned be getMemeoryMap()

Configuration settings
var params = new Intel80586.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config Intel80586.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Intel80586.Params;
...
params.minDataUnitSize = Int 1;
config Intel80586.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Intel80586.Params;
...
params.minProgUnitSize = Int 1;
config Intel80586.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Intel80586.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Intel80586.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Intel80586.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Intel80586.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Intel80586.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:16 GMT


module host.platforms.macos.Platform

metaonly module host.platforms.macos.Platform
index URL

Native macos platform support

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in host/platforms/macos/Platform.xdc
var Platform = xdc.useModule('host.platforms.macos.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:19:16 GMT


package iar.targets
index URL

Package of targets for the IAR code generation tools

The targets in this package are designed to enable host application development; e.g., the build of the XDCtools product's C-based command line tools.
XDCspec declarations sourced in iar/targets/package.xdc
requires xdc.bld;
package iar.targets [1, 0, 1] {
}
generated on Sun, 25 Nov 2018 22:19:11 GMT


package iar.targets.arm
index URL

IAR-based code generation targets for ARM devices

XDCspec declarations sourced in iar/targets/arm/package.xdc
package iar.targets.arm [1, 0, 0] {
    interface ITarget;
    // IAR ARM extension to the base xdc.bld.ITarget3 interface
    module M3;
    // IAR M3 target
    module M33;
    // IAR M33 target
    module M4;
    // IAR M4 target
    module M4F;
    // IAR M4F target
}
generated on Sun, 25 Nov 2018 22:19:15 GMT


interface iar.targets.arm.ITarget

metaonly interface iar.targets.arm.ITarget
index URL

IAR ARM extension to the base xdc.bld.ITarget3 interface

XDCspec summary sourced in iar/targets/arm/ITarget.xdc
metaonly interface ITarget { ...
// inherits xdc.bld.ITarget3
    // inherits xdc.bld.ITarget2
        // inherits xdc.bld.ITarget
XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
package iar.targets.arm;
metaonly interface ITarget inherits ITarget3 {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget.Command ar// The command used to create an archive = {
        cmd: "iarchive",
        opts: ""
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    readonly config ITarget2.Command lnk// The command used to link executables;
    override readonly config ITarget.Model model// Little endian, thumb2 model = {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    override readonly config String rts// Name of a run-time support package to include = "iar.targets.arm.rts";
    readonly config String sectMap// Output section name to segment type mapping[string];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    readonly config ITarget.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "iccarm",
        opts: "-v"
    };
    override config ITarget.Options arOpts// User configurable archiver options = {
        prefix: "--silent",
        suffix: ""
    };
    override config ITarget.Options asmOpts// User configurable assembler options = {
        prefix: "-S",
        suffix: ""
    };
    config String binDir// = "$(rootDir)/bin/";
    config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget.Options ccOpts// User configurable compiler options = {
        prefix: "--silent",
        suffix: ""
    };
    config String cmdPrefix// Prefix to put in front of each command = "LC_ALL=C ";
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// The IAR assembly file extension recognised by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s",
            {
                suf: ".s",
                typ: "asm"
            }
        ],
        [
            ".sv7M",
            {
                suf: ".sv7M",
                typ: "asm"
            }
        ],
        [
            ".sv8M",
            {
                suf: ".sv8M",
                typ: "asm"
            }
        ]
    ];
    override config String includeOpts// Additional user configurable target-specific include path options = "";
    override config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "--silent",
        suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
    };
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ]
    ];
    config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "iar/targets/arm/std.h";
    config String version// The Compatibility Key associated with this target;
    config String versionMap// Map of compiler version numbers to compatibility keys[string] = [ ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.Command
index URL

Required command and options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.Options
index URL

User configurable command options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override readonly config Bool alignDirectiveSupported = true;
config ITarget.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override readonly config ITarget.Command ar = {
    cmd: "iarchive",
    opts: ""
};
config ITarget.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config ITarget2.Command asm;
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config ITarget2.Command cc;
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config ITarget2.Command lnk;
config ITarget.model // module-wide
index URL

Little endian, thumb2 model

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override readonly config ITarget.Model model = {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override readonly config String rts = "iar.targets.arm.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
readonly config ITarget.Command vers = {
    cmd: "iccarm",
    opts: "-v"
};
config ITarget.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config ITarget.Options arOpts = {
    prefix: "--silent",
    suffix: ""
};
config ITarget.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config ITarget.Options asmOpts = {
    prefix: "-S",
    suffix: ""
};
config ITarget.binDir // module-wide
index URL
XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String binDir = "$(rootDir)/bin/";
config ITarget.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config ITarget.Options ccOpts = {
    prefix: "--silent",
    suffix: ""
};
config ITarget.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String cmdPrefix = "LC_ALL=C ";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
LC_ALL=C must be set for code gen to run on SUSE
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s",
        {
            suf: ".s",
            typ: "asm"
        }
    ],
    [
        ".sv7M",
        {
            suf: ".sv7M",
            typ: "asm"
        }
    ],
    [
        ".sv8M",
        {
            suf: ".sv8M",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config String includeOpts = "";
config ITarget.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "--silent",
    suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
};
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Standard options profiles

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
override config String stdInclude = "iar/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String version;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
config String versionMap[string] = [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in iar/targets/arm/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:13 GMT


module iar.targets.arm.M3

metaonly module iar.targets.arm.M3
index URL

IAR M3 target

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/arm/M3.xdc
var M3 = xdc.useModule('iar.targets.arm.M3');
module-wide constants & types
    var obj = new M3.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M3.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M3.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M3.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M3.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M3.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M3.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M3.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M3.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M3.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M3.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M3.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M3.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M3.ar// The command used to create an archive = ITarget.Command {
        cmd: "iarchive",
        opts: ""
    };
    const M3.asm// The command used to assembles assembly source files into object files = M3.Command {
        cmd: "iasmarm",
        opts: "--cpu Cortex-M3 --endian little"
    };
    const M3.base// A target that this target is based upon = ITarget.Module computed value;
    const M3.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M3.cc// The command used to compile C/C++ source files into object files = M3.Command {
        cmd: "iccarm",
        opts: "--aeabi --cpu=Cortex-M3 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
    };
    const M3.isa// CPU Instruction Set Architecture (ISA) = String "v7M";
    const M3.lnk// The command used to link executables = M3.Command {
        cmd: "ilinkarm",
        opts: "--cpu=Cortex-M3"
    };
    const M3.model// Little endian, thumb2 model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M3.name// Nickname for this target = String "M3";
    const M3.os// Name of OS required to run programs built for this target = String computed value;
    const M3.rts// Name of a run-time support package to include = String "iar.targets.arm.rts";
    const M3.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M3.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        }
    };
    const M3.suffix// Suffix appended to all objs, libraries, and executable = String "rm3";
    const M3.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "iccarm",
        opts: "-v"
    };
     M3.arOpts// User configurable archiver options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M3.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-S",
        suffix: ""
    };
     M3.binDir// = String "$(rootDir)/bin/";
     M3.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M3.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M3.cmdPrefix// Prefix to put in front of each command = String "LC_ALL=C ";
     M3.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M3.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M3.execExt// Extension for executables = String undefined;
     M3.extensions// The IAR assembly file extension recognised by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s",
            {
                suf: ".s",
                typ: "asm"
            }
        ],
        [
            ".sv7M",
            {
                suf: ".sv7M",
                typ: "asm"
            }
        ],
        [
            ".sv8M",
            {
                suf: ".sv8M",
                typ: "asm"
            }
        ]
    ];
     M3.includeOpts// Additional user configurable target-specific include path options = String "";
     M3.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "--silent",
        suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
    };
     M3.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT:1";
     M3.platforms// A set of platforms that can support this target = String[] [ ];
     M3.profiles// Standard options profiles = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ]
    ];
     M3.rawVersion// The raw version string from the compiler = String undefined;
     M3.rootDir// Installation directory for this target's code generation tools = String undefined;
     M3.stdInclude// Standard C/C++ types header = String "iar/targets/arm/std.h";
     M3.version// The Compatibility Key associated with this target = String undefined;
     M3.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
module-wide functions
     M3.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M3.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M3.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M3.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M3.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M3.getRawVersion// Get a target-specific raw compiler version string() returns String
     M3.getVersion// Get a target-specific Compatibility Key string() returns String
     M3.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M3.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M3.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M3.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M3.Command
index URL

Required command and options

Configuration settings
var obj = new M3.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M3.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M3.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M3.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M3.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M3.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M3.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M3.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M3.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M3.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M3.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M3.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M3.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M3.Model
index URL

Target runtime model

Configuration settings
var obj = new M3.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M3.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M3.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M3.Options
index URL

User configurable command options

Configuration settings
var obj = new M3.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M3.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M3.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M3.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M3.alignDirectiveSupported = Bool true;
config M3.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M3.ar = ITarget.Command {
    cmd: "iarchive",
    opts: ""
};
config M3.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M3.asm = M3.Command {
    cmd: "iasmarm",
    opts: "--cpu Cortex-M3 --endian little"
};
config M3.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M3.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M3.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M3.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M3.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M3.cc = M3.Command {
    cmd: "iccarm",
    opts: "--aeabi --cpu=Cortex-M3 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
};
config M3.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M3.isa = String "v7M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M3.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M3.lnk = M3.Command {
    cmd: "ilinkarm",
    opts: "--cpu=Cortex-M3"
};
config M3.model // module-wide
index URL

Little endian, thumb2 model

Configuration settings
const M3.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M3.name // module-wide
index URL

Nickname for this target

Configuration settings
const M3.name = String "M3";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M3.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M3.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M3.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M3.rts = String "iar.targets.arm.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M3.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M3.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M3.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M3.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M3.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M3.suffix = String "rm3";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M3.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M3.vers = ITarget.Command {
    cmd: "iccarm",
    opts: "-v"
};
config M3.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M3.arOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M3.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M3.asmOpts = ITarget.Options {
    prefix: "-S",
    suffix: ""
};
config M3.binDir // module-wide
index URL
Configuration settings
M3.binDir = String "$(rootDir)/bin/";
config M3.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M3.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M3.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M3.ccOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M3.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
M3.cmdPrefix = String "LC_ALL=C ";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
LC_ALL=C must be set for code gen to run on SUSE
config M3.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M3.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M3.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M3.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M3.execExt // module-wide
index URL

Extension for executables

Configuration settings
M3.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M3.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

Configuration settings
M3.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s",
        {
            suf: ".s",
            typ: "asm"
        }
    ],
    [
        ".sv7M",
        {
            suf: ".sv7M",
            typ: "asm"
        }
    ],
    [
        ".sv8M",
        {
            suf: ".sv8M",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M3.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M3.includeOpts = String "";
config M3.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M3.lnkOpts = ITarget2.Options {
    prefix: "--silent",
    suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
};
config M3.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M3.platform = String "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M3.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M3.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M3.profiles // module-wide
index URL

Standard options profiles

Configuration settings
M3.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M3.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M3.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M3.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M3.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M3.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M3.stdInclude = String "iar/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M3.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M3.version = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config M3.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
M3.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
M3.archive() // module-wide
index URL

Create an archive

Configuration settings
M3.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M3.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M3.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M3.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M3.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M3.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M3.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M3.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M3.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M3.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M3.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M3.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M3.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M3.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M3.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M3.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M3.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M3.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M3.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M3.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:14 GMT


module iar.targets.arm.M33

metaonly module iar.targets.arm.M33
index URL

IAR M33 target

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/arm/M33.xdc
var M33 = xdc.useModule('iar.targets.arm.M33');
module-wide constants & types
    var obj = new M33.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M33.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M33.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M33.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M33.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M33.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M33.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M33.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M33.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M33.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M33.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M33.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M33.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M33.ar// The command used to create an archive = ITarget.Command {
        cmd: "iarchive",
        opts: ""
    };
    const M33.asm// The command used to assembles assembly source files into object files = M33.Command {
        cmd: "iasmarm",
        opts: "--cpu Cortex-M33 --endian little "
    };
    const M33.base// A target that this target is based upon = ITarget.Module computed value;
    const M33.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M33.cc// The command used to compile C/C++ source files into object files = M33.Command {
        cmd: "iccarm",
        opts: "--aeabi --cpu=Cortex-M33 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
    };
    const M33.isa// CPU Instruction Set Architecture (ISA) = String "v8M";
    const M33.lnk// The command used to link executables = M33.Command {
        cmd: "ilinkarm",
        opts: "--cpu=Cortex-M33"
    };
    const M33.model// Little endian, thumb2 model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M33.name// Nickname for this target = String "M33";
    const M33.os// Name of OS required to run programs built for this target = String computed value;
    const M33.rts// Name of a run-time support package to include = String "iar.targets.arm.rts";
    const M33.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M33.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        }
    };
    const M33.suffix// Suffix appended to all objs, libraries, and executable = String "rm33";
    const M33.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "iccarm",
        opts: "-v"
    };
     M33.arOpts// User configurable archiver options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M33.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-S",
        suffix: ""
    };
     M33.binDir// = String "$(rootDir)/bin/";
     M33.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M33.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M33.cmdPrefix// Prefix to put in front of each command = String "LC_ALL=C ";
     M33.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M33.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M33.execExt// Extension for executables = String undefined;
     M33.extensions// The IAR assembly file extension recognised by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s",
            {
                suf: ".s",
                typ: "asm"
            }
        ],
        [
            ".sv7M",
            {
                suf: ".sv7M",
                typ: "asm"
            }
        ],
        [
            ".sv8M",
            {
                suf: ".sv8M",
                typ: "asm"
            }
        ]
    ];
     M33.includeOpts// Additional user configurable target-specific include path options = String "";
     M33.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "--silent",
        suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
    };
     M33.platform// The default platform name for this target = String "ti.platforms.cortexM:FVP_MPS2:1";
     M33.platforms// A set of platforms that can support this target = String[] [ ];
     M33.profiles// Standard options profiles = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ]
    ];
     M33.rawVersion// The raw version string from the compiler = String undefined;
     M33.rootDir// Installation directory for this target's code generation tools = String undefined;
     M33.stdInclude// Standard C/C++ types header = String "iar/targets/arm/std.h";
     M33.version// The Compatibility Key associated with this target = String undefined;
     M33.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
module-wide functions
     M33.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M33.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M33.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M33.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M33.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M33.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M33.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M33.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M33.getRawVersion// Get a target-specific raw compiler version string() returns String
     M33.getVersion// Get a target-specific Compatibility Key string() returns String
     M33.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M33.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M33.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M33.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M33.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M33.Command
index URL

Required command and options

Configuration settings
var obj = new M33.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M33.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M33.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M33.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M33.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M33.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M33.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M33.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M33.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M33.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M33.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M33.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M33.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M33.Model
index URL

Target runtime model

Configuration settings
var obj = new M33.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M33.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M33.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M33.Options
index URL

User configurable command options

Configuration settings
var obj = new M33.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M33.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M33.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M33.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M33.alignDirectiveSupported = Bool true;
config M33.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M33.ar = ITarget.Command {
    cmd: "iarchive",
    opts: ""
};
config M33.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M33.asm = M33.Command {
    cmd: "iasmarm",
    opts: "--cpu Cortex-M33 --endian little "
};
config M33.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M33.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M33.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M33.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M33.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M33.cc = M33.Command {
    cmd: "iccarm",
    opts: "--aeabi --cpu=Cortex-M33 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
};
config M33.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M33.isa = String "v8M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M33.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M33.lnk = M33.Command {
    cmd: "ilinkarm",
    opts: "--cpu=Cortex-M33"
};
config M33.model // module-wide
index URL

Little endian, thumb2 model

Configuration settings
const M33.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M33.name // module-wide
index URL

Nickname for this target

Configuration settings
const M33.name = String "M33";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M33.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M33.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M33.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M33.rts = String "iar.targets.arm.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M33.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M33.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M33.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M33.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M33.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M33.suffix = String "rm33";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M33.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M33.vers = ITarget.Command {
    cmd: "iccarm",
    opts: "-v"
};
config M33.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M33.arOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M33.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M33.asmOpts = ITarget.Options {
    prefix: "-S",
    suffix: ""
};
config M33.binDir // module-wide
index URL
Configuration settings
M33.binDir = String "$(rootDir)/bin/";
config M33.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M33.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M33.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M33.ccOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M33.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
M33.cmdPrefix = String "LC_ALL=C ";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
LC_ALL=C must be set for code gen to run on SUSE
config M33.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M33.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M33.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M33.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M33.execExt // module-wide
index URL

Extension for executables

Configuration settings
M33.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M33.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

Configuration settings
M33.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s",
        {
            suf: ".s",
            typ: "asm"
        }
    ],
    [
        ".sv7M",
        {
            suf: ".sv7M",
            typ: "asm"
        }
    ],
    [
        ".sv8M",
        {
            suf: ".sv8M",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M33.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M33.includeOpts = String "";
config M33.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M33.lnkOpts = ITarget2.Options {
    prefix: "--silent",
    suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
};
config M33.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M33.platform = String "ti.platforms.cortexM:FVP_MPS2:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M33.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M33.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M33.profiles // module-wide
index URL

Standard options profiles

Configuration settings
M33.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M33.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M33.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M33.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M33.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M33.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M33.stdInclude = String "iar/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M33.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M33.version = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config M33.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
M33.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
M33.archive() // module-wide
index URL

Create an archive

Configuration settings
M33.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M33.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M33.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M33.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M33.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M33.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M33.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M33.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M33.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M33.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M33.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M33.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M33.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M33.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M33.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M33.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M33.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M33.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M33.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M33.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M33.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M33.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:14 GMT


module iar.targets.arm.M4

metaonly module iar.targets.arm.M4
index URL

IAR M4 target

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/arm/M4.xdc
var M4 = xdc.useModule('iar.targets.arm.M4');
module-wide constants & types
    var obj = new M4.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4.ar// The command used to create an archive = ITarget.Command {
        cmd: "iarchive",
        opts: ""
    };
    const M4.asm// The command used to assembles assembly source files into object files = M4.Command {
        cmd: "iasmarm",
        opts: "--cpu Cortex-M4 --endian little"
    };
    const M4.base// A target that this target is based upon = ITarget.Module computed value;
    const M4.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4.cc// The command used to compile C/C++ source files into object files = M4.Command {
        cmd: "iccarm",
        opts: "--aeabi --cpu=Cortex-M4 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
    };
    const M4.isa// CPU Instruction Set Architecture (ISA) = String "v7M4";
    const M4.lnk// The command used to link executables = M4.Command {
        cmd: "ilinkarm",
        opts: "--cpu=Cortex-M4"
    };
    const M4.model// Little endian, thumb2 model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4.name// Nickname for this target = String "M4";
    const M4.os// Name of OS required to run programs built for this target = String computed value;
    const M4.rts// Name of a run-time support package to include = String "iar.targets.arm.rts";
    const M4.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M4.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        }
    };
    const M4.suffix// Suffix appended to all objs, libraries, and executable = String "rm4";
    const M4.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "iccarm",
        opts: "-v"
    };
     M4.arOpts// User configurable archiver options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M4.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-S",
        suffix: ""
    };
     M4.binDir// = String "$(rootDir)/bin/";
     M4.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M4.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M4.cmdPrefix// Prefix to put in front of each command = String "LC_ALL=C ";
     M4.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M4.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M4.execExt// Extension for executables = String undefined;
     M4.extensions// The IAR assembly file extension recognised by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s",
            {
                suf: ".s",
                typ: "asm"
            }
        ],
        [
            ".sv7M",
            {
                suf: ".sv7M",
                typ: "asm"
            }
        ],
        [
            ".sv8M",
            {
                suf: ".sv8M",
                typ: "asm"
            }
        ]
    ];
     M4.includeOpts// Additional user configurable target-specific include path options = String "";
     M4.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "--silent",
        suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
    };
     M4.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT:1";
     M4.platforms// A set of platforms that can support this target = String[] [ ];
     M4.profiles// Standard options profiles = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ]
    ];
     M4.rawVersion// The raw version string from the compiler = String undefined;
     M4.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4.stdInclude// Standard C/C++ types header = String "iar/targets/arm/std.h";
     M4.version// The Compatibility Key associated with this target = String undefined;
     M4.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
module-wide functions
     M4.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4.getVersion// Get a target-specific Compatibility Key string() returns String
     M4.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4.Command
index URL

Required command and options

Configuration settings
var obj = new M4.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4.Model
index URL

Target runtime model

Configuration settings
var obj = new M4.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4.Options
index URL

User configurable command options

Configuration settings
var obj = new M4.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4.alignDirectiveSupported = Bool true;
config M4.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4.ar = ITarget.Command {
    cmd: "iarchive",
    opts: ""
};
config M4.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4.asm = M4.Command {
    cmd: "iasmarm",
    opts: "--cpu Cortex-M4 --endian little"
};
config M4.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4.cc = M4.Command {
    cmd: "iccarm",
    opts: "--aeabi --cpu=Cortex-M4 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
};
config M4.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4.isa = String "v7M4";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4.lnk = M4.Command {
    cmd: "ilinkarm",
    opts: "--cpu=Cortex-M4"
};
config M4.model // module-wide
index URL

Little endian, thumb2 model

Configuration settings
const M4.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4.name = String "M4";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4.rts = String "iar.targets.arm.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4.suffix = String "rm4";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M4.vers = ITarget.Command {
    cmd: "iccarm",
    opts: "-v"
};
config M4.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4.arOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M4.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4.asmOpts = ITarget.Options {
    prefix: "-S",
    suffix: ""
};
config M4.binDir // module-wide
index URL
Configuration settings
M4.binDir = String "$(rootDir)/bin/";
config M4.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M4.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4.ccOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M4.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
M4.cmdPrefix = String "LC_ALL=C ";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
LC_ALL=C must be set for code gen to run on SUSE
config M4.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M4.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M4.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

Configuration settings
M4.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s",
        {
            suf: ".s",
            typ: "asm"
        }
    ],
    [
        ".sv7M",
        {
            suf: ".sv7M",
            typ: "asm"
        }
    ],
    [
        ".sv8M",
        {
            suf: ".sv8M",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M4.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4.includeOpts = String "";
config M4.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M4.lnkOpts = ITarget2.Options {
    prefix: "--silent",
    suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
};
config M4.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4.platform = String "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4.profiles // module-wide
index URL

Standard options profiles

Configuration settings
M4.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M4.stdInclude = String "iar/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4.version = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config M4.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
M4.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
M4.archive() // module-wide
index URL

Create an archive

Configuration settings
M4.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:15 GMT


module iar.targets.arm.M4F

metaonly module iar.targets.arm.M4F
index URL

IAR M4F target

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/arm/M4F.xdc
var M4F = xdc.useModule('iar.targets.arm.M4F');
module-wide constants & types
    var obj = new M4F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4F.ar// The command used to create an archive = ITarget.Command {
        cmd: "iarchive",
        opts: ""
    };
    const M4F.asm// The command used to assembles assembly source files into object files = M4F.Command {
        cmd: "iasmarm",
        opts: "--cpu Cortex-M4F --endian little --fpu VFPv4_sp "
    };
    const M4F.base// A target that this target is based upon = ITarget.Module computed value;
    const M4F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4F.cc// The command used to compile C/C++ source files into object files = M4F.Command {
        cmd: "iccarm",
        opts: "--aeabi --cpu=Cortex-M4F --diag_suppress=Pa050,Go005 --endian=little -e --fpu=VFPv4_sp --thumb"
    };
    const M4F.isa// CPU Instruction Set Architecture (ISA) = String "v7M4";
    const M4F.lnk// The command used to link executables = M4F.Command {
        cmd: "ilinkarm",
        opts: "--cpu=Cortex-M4F"
    };
    const M4F.model// Little endian, thumb2 model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4F.name// Nickname for this target = String "M4F";
    const M4F.os// Name of OS required to run programs built for this target = String computed value;
    const M4F.rts// Name of a run-time support package to include = String "iar.targets.arm.rts";
    const M4F.sectMap// Output section name to segment type mapping = String[string] computed value;
    const M4F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        }
    };
    const M4F.suffix// Suffix appended to all objs, libraries, and executable = String "rm4f";
    const M4F.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "iccarm",
        opts: "-v"
    };
     M4F.arOpts// User configurable archiver options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M4F.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-S",
        suffix: ""
    };
     M4F.binDir// = String "$(rootDir)/bin/";
     M4F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M4F.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "--silent",
        suffix: ""
    };
     M4F.cmdPrefix// Prefix to put in front of each command = String "LC_ALL=C ";
     M4F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M4F.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     M4F.execExt// Extension for executables = String undefined;
     M4F.extensions// The IAR assembly file extension recognised by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s",
            {
                suf: ".s",
                typ: "asm"
            }
        ],
        [
            ".sv7M",
            {
                suf: ".sv7M",
                typ: "asm"
            }
        ],
        [
            ".sv8M",
            {
                suf: ".sv8M",
                typ: "asm"
            }
        ]
    ];
     M4F.includeOpts// Additional user configurable target-specific include path options = String "";
     M4F.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "--silent",
        suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
    };
     M4F.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT:1";
     M4F.platforms// A set of platforms that can support this target = String[] [ ];
     M4F.profiles// Standard options profiles = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
                },
                linkOpts: "--semihosting=iar_breakpoint"
            }
        ]
    ];
     M4F.rawVersion// The raw version string from the compiler = String undefined;
     M4F.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4F.stdInclude// Standard C/C++ types header = String "iar/targets/arm/std.h";
     M4F.version// The Compatibility Key associated with this target = String undefined;
     M4F.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
module-wide functions
     M4F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4F.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4F.getVersion// Get a target-specific Compatibility Key string() returns String
     M4F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4F.Command
index URL

Required command and options

Configuration settings
var obj = new M4F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4F.Model
index URL

Target runtime model

Configuration settings
var obj = new M4F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4F.Options
index URL

User configurable command options

Configuration settings
var obj = new M4F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4F.alignDirectiveSupported = Bool true;
config M4F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4F.ar = ITarget.Command {
    cmd: "iarchive",
    opts: ""
};
config M4F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4F.asm = M4F.Command {
    cmd: "iasmarm",
    opts: "--cpu Cortex-M4F --endian little --fpu VFPv4_sp "
};
config M4F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4F.cc = M4F.Command {
    cmd: "iccarm",
    opts: "--aeabi --cpu=Cortex-M4F --diag_suppress=Pa050,Go005 --endian=little -e --fpu=VFPv4_sp --thumb"
};
config M4F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4F.isa = String "v7M4";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4F.lnk = M4F.Command {
    cmd: "ilinkarm",
    opts: "--cpu=Cortex-M4F"
};
config M4F.model // module-wide
index URL

Little endian, thumb2 model

Configuration settings
const M4F.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4F.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4F.name = String "M4F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4F.rts = String "iar.targets.arm.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4F.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4F.suffix = String "rm4f";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4F.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M4F.vers = ITarget.Command {
    cmd: "iccarm",
    opts: "-v"
};
config M4F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4F.arOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M4F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4F.asmOpts = ITarget.Options {
    prefix: "-S",
    suffix: ""
};
config M4F.binDir // module-wide
index URL
Configuration settings
M4F.binDir = String "$(rootDir)/bin/";
config M4F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M4F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4F.ccOpts = ITarget.Options {
    prefix: "--silent",
    suffix: ""
};
config M4F.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
M4F.cmdPrefix = String "LC_ALL=C ";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
LC_ALL=C must be set for code gen to run on SUSE
config M4F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4F.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4F.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
M4F.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config M4F.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4F.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

Configuration settings
M4F.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s",
        {
            suf: ".s",
            typ: "asm"
        }
    ],
    [
        ".sv7M",
        {
            suf: ".sv7M",
            typ: "asm"
        }
    ],
    [
        ".sv8M",
        {
            suf: ".sv8M",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config M4F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4F.includeOpts = String "";
config M4F.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
M4F.lnkOpts = ITarget2.Options {
    prefix: "--silent",
    suffix: "--map $(XDCCFGDIR)/$@.map --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall "
};
config M4F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4F.platform = String "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4F.profiles // module-wide
index URL

Standard options profiles

Configuration settings
M4F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h"
            },
            linkOpts: "--semihosting=iar_breakpoint"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M4F.stdInclude = String "iar/targets/arm/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4F.version = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config M4F.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
M4F.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
M4F.archive() // module-wide
index URL

Create an archive

Configuration settings
M4F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:15 GMT


package iar.targets.arm.rts
index URL

Runtime support package for ARM devices for use with the IAR toolchain

XDCspec declarations sourced in iar/targets/arm/rts/package.xdc
package iar.targets.arm.rts [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
    module VectorTable;
    // IAR's vector table module
}
generated on Sun, 25 Nov 2018 22:19:15 GMT


module iar.targets.arm.rts.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in iar/targets/arm/rts/Settings.xdc
#include <iar/targets/arm/rts/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in iar/targets/arm/rts/Settings.xdc
var Settings = xdc.useModule('iar.targets.arm.rts.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:15 GMT


module iar.targets.arm.rts.VectorTable

metaonly module iar.targets.arm.rts.VectorTable
index URL

IAR's vector table module

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/arm/rts/VectorTable.xdc
var VectorTable = xdc.useModule('iar.targets.arm.rts.VectorTable');
module-wide config parameters
     VectorTable.getVectorTableLib// Configurable vector table library option = Bool true;
config VectorTable.getVectorTableLib // module-wide
index URL

Configurable vector table library option

Configuration settings
VectorTable.getVectorTableLib = Bool true;
DETAILS
By default, the IAR's vector table library in this package is pulled in during link phase. RTOS and other products which define their own vector table can disable using the vector table library provided by this package by setting getVectorTableLib config parameter to false.
generated on Sun, 25 Nov 2018 22:19:15 GMT


package iar.targets.msp430
index URL

IAR-based code generation targets for MSP430 devices

XDCspec declarations sourced in iar/targets/msp430/package.xdc
package iar.targets.msp430 [1, 0, 0] {
    interface ITarget;
    // A IAR extension to the base xdc.bld.ITarget3 interface
    module MSP430;
    // IAR MSP430 little endian, small code model, small data model target
    module MSP430X_large;
    // IAR MSP430X little endian, large code model, large data model target
    module MSP430X_small;
    // IAR MSP430X little endian, large code model, small data model target
}
generated on Sun, 25 Nov 2018 22:19:12 GMT


interface iar.targets.msp430.ITarget

metaonly interface iar.targets.msp430.ITarget
index URL

A IAR extension to the base xdc.bld.ITarget3 interface

XDCspec summary sourced in iar/targets/msp430/ITarget.xdc
metaonly interface ITarget { ...
// inherits xdc.bld.ITarget3
    // inherits xdc.bld.ITarget2
        // inherits xdc.bld.ITarget
XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
package iar.targets.msp430;
metaonly interface ITarget inherits ITarget3 {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget.Command ar// The command used to create an archive = {
        cmd: "xar",
        opts: ""
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    override readonly config ITarget.Command lnk// The command used to link executables = {
        cmd: "xlink",
        opts: ""
    };
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    override readonly config String rts// Name of a run-time support package to include = "iar.targets.msp430.rts";
    readonly config String sectMap// Output section name to segment type mapping[string];
    readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 0,
            align: 0
        },
        t_Char: {
            size: 0,
            align: 0
        },
        t_Double: {
            size: 0,
            align: 0
        },
        t_Float: {
            size: 0,
            align: 0
        },
        t_Fxn: {
            size: 0,
            align: 0
        },
        t_Int: {
            size: 0,
            align: 0
        },
        t_Int8: {
            size: 0,
            align: 0
        },
        t_Int16: {
            size: 0,
            align: 0
        },
        t_Int32: {
            size: 0,
            align: 0
        },
        t_Int40: {
            size: 0,
            align: 0
        },
        t_Int64: {
            size: 0,
            align: 0
        },
        t_Long: {
            size: 0,
            align: 0
        },
        t_LDouble: {
            size: 0,
            align: 0
        },
        t_LLong: {
            size: 0,
            align: 0
        },
        t_Ptr: {
            size: 0,
            align: 0
        },
        t_Short: {
            size: 0,
            align: 0
        },
        t_Size: {
            size: 0,
            align: 0
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    readonly config ITarget.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "icc430",
        opts: "-v"
    };
    readonly config ITarget.Command xlib// The command used to modify a library = {
        cmd: "xlib",
        opts: "-c"
    };
    override config ITarget.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget.Options asmOpts// User configurable assembler options = {
        prefix: "-S",
        suffix: ""
    };
    config String binDir// = "$(rootDir)/bin/";
    config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget.Options ccOpts// User configurable compiler options = {
        prefix: "--silent",
        suffix: "--diag_suppress=Pa050,Go005"
    };
    config String cmdPrefix// Prefix to put in front of each command = "";
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// The IAR assembly file extension recognised by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s43",
            {
                suf: ".s43",
                typ: "asm"
            }
        ]
    ];
    override config String includeOpts// Additional user configurable target-specific include path options = "";
    override config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "-S",
        suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
    };
    override config String platform// The default platform name for this target = "ti.platforms.msp430:MSP430F5438:1";
    config String platforms// A set of platforms that can support this target[] = [ ];
    config ITarget.OptionSet profiles// Profiles supported by this target[string] = [
        [
            "release",
            { }
        ],
        [
            "debug",
            { }
        ]
    ];
    config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "iar/targets/msp430/std.h";
    config String version// The Compatibility Key associated with this target;
    config String versionMap// Map of compiler version numbers to compatibility keys[string] = [ ];
    config ITarget.Options xlibOpts// User configurable xlib options = {
        prefix: "",
        suffix: "\"MAKE-LIBRARY $@\""
    };
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.Command
index URL

Required command and options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.Options
index URL

User configurable command options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override readonly config Bool alignDirectiveSupported = true;
config ITarget.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override readonly config ITarget.Command ar = {
    cmd: "xar",
    opts: ""
};
config ITarget.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config ITarget2.Command asm;
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config ITarget2.Command cc;
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override readonly config ITarget.Command lnk = {
    cmd: "xlink",
    opts: ""
};
config ITarget.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override readonly config String rts = "iar.targets.msp430.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 0,
        align: 0
    },
    t_Char: {
        size: 0,
        align: 0
    },
    t_Double: {
        size: 0,
        align: 0
    },
    t_Float: {
        size: 0,
        align: 0
    },
    t_Fxn: {
        size: 0,
        align: 0
    },
    t_Int: {
        size: 0,
        align: 0
    },
    t_Int8: {
        size: 0,
        align: 0
    },
    t_Int16: {
        size: 0,
        align: 0
    },
    t_Int32: {
        size: 0,
        align: 0
    },
    t_Int40: {
        size: 0,
        align: 0
    },
    t_Int64: {
        size: 0,
        align: 0
    },
    t_Long: {
        size: 0,
        align: 0
    },
    t_LDouble: {
        size: 0,
        align: 0
    },
    t_LLong: {
        size: 0,
        align: 0
    },
    t_Ptr: {
        size: 0,
        align: 0
    },
    t_Short: {
        size: 0,
        align: 0
    },
    t_Size: {
        size: 0,
        align: 0
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config ITarget.Command vers = {
    cmd: "icc430",
    opts: "-v"
};
config ITarget.xlib // module-wide
index URL

The command used to modify a library

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
readonly config ITarget.Command xlib = {
    cmd: "xlib",
    opts: "-c"
};
DETAILS
Defaults:
-c
run command line
config ITarget.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config ITarget.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config ITarget.Options asmOpts = {
    prefix: "-S",
    suffix: ""
};
DETAILS
Defaults:
-S
Silent operation
config ITarget.binDir // module-wide
index URL
XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String binDir = "$(rootDir)/bin/";
config ITarget.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config ITarget.Options ccOpts = {
    prefix: "--silent",
    suffix: "--diag_suppress=Pa050,Go005"
};
DETAILS
Defaults:
--silent
Silent operation
--diag_suppress
Pa050 complains about Unix EOL characters Go005 complains about function inlining
config ITarget.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String cmdPrefix = "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s43",
        {
            suf: ".s43",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config String includeOpts = "";
config ITarget.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-S",
    suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
};
DETAILS
Defaults:
-S
Silent operation
-xens
Cross reference list generated in map file
-l
Generates a map file
-rt
Plugins in IAR debugger low level functions
-e
Redirects function call to another function at link time
-s
Program entry point
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config String platform = "ti.platforms.msp430:MSP430F5438:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Profiles supported by this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config ITarget.OptionSet profiles[string] = [
    [
        "release",
        { }
    ],
    [
        "debug",
        { }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
override config String stdInclude = "iar/targets/msp430/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String version;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config String versionMap[string] = [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
config ITarget.xlibOpts // module-wide
index URL

User configurable xlib options

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
config ITarget.Options xlibOpts = {
    prefix: "",
    suffix: "\"MAKE-LIBRARY $@\""
};
DETAILS
Defaults:
MAKE-LIBRARY
changes a module to library type
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in iar/targets/msp430/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:12 GMT


module iar.targets.msp430.MSP430

metaonly module iar.targets.msp430.MSP430
index URL

IAR MSP430 little endian, small code model, small data model target

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/msp430/MSP430.xdc
var MSP430 = xdc.useModule('iar.targets.msp430.MSP430');
module-wide constants & types
    var obj = new MSP430.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430.ar// The command used to create an archive = ITarget.Command {
        cmd: "xar",
        opts: ""
    };
    const MSP430.asm// The command used to assembles assembly source files into object files = MSP430.Command {
        cmd: "a430",
        opts: "--data_model small"
    };
    const MSP430.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430.cc// The command used to compile C/C++ source files into object files = MSP430.Command {
        cmd: "icc430",
        opts: "-e --core=430 --data_model=small"
    };
    const MSP430.isa// CPU Instruction Set Architecture (ISA) = String "430";
    const MSP430.lnk// The command used to link executables = ITarget.Command {
        cmd: "xlink",
        opts: ""
    };
    const MSP430.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "small",
        dataModel: "small",
        shortEnums: true
    };
    const MSP430.name// Nickname for this target = String "MSP430";
    const MSP430.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430.rts// Name of a run-time support package to include = String "iar.targets.msp430.rts";
    const MSP430.sectMap// Output section name to segment type mapping = String[string] computed value;
    const MSP430.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 2,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 4,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 2,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 4,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 2,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const MSP430.suffix// Suffix appended to all objs, libraries, and executable = String "r430";
    const MSP430.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "icc430",
        opts: "-v"
    };
    const MSP430.xlib// The command used to modify a library = ITarget.Command {
        cmd: "xlib",
        opts: "-c"
    };
     MSP430.arOpts// User configurable archiver options = ITarget.Options {
        prefix: "",
        suffix: ""
    };
     MSP430.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-S",
        suffix: ""
    };
     MSP430.binDir// = String "$(rootDir)/bin/";
     MSP430.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "--silent",
        suffix: "--diag_suppress=Pa050,Go005"
    };
     MSP430.cmdPrefix// Prefix to put in front of each command = String "";
     MSP430.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     MSP430.execExt// Extension for executables = String undefined;
     MSP430.extensions// The IAR assembly file extension recognised by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s43",
            {
                suf: ".s43",
                typ: "asm"
            }
        ]
    ];
     MSP430.includeOpts// Additional user configurable target-specific include path options = String "";
     MSP430.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-S",
        suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
    };
     MSP430.platform// The default platform name for this target = String "ti.platforms.msp430:MSP430F5438:1";
     MSP430.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430.profiles// Standard options profiles for the IAR MSP430 tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430fn.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430fn.r43"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430fn.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430fn.r43"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430ff.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430ff.r43"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430ff.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430ff.r43"
            }
        ]
    ];
     MSP430.rawVersion// The raw version string from the compiler = String undefined;
     MSP430.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430.stdInclude// Standard C/C++ types header = String "iar/targets/msp430/std.h";
     MSP430.version// The Compatibility Key associated with this target = String undefined;
     MSP430.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
     MSP430.xlibOpts// User configurable xlib options = ITarget.Options {
        prefix: "",
        suffix: "\"MAKE-LIBRARY $@\""
    };
module-wide functions
     MSP430.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430.alignDirectiveSupported = Bool true;
config MSP430.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430.ar = ITarget.Command {
    cmd: "xar",
    opts: ""
};
config MSP430.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430.asm = MSP430.Command {
    cmd: "a430",
    opts: "--data_model small"
};
config MSP430.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430.cc = MSP430.Command {
    cmd: "icc430",
    opts: "-e --core=430 --data_model=small"
};
DETAILS
Defaults:
-e
enable compiler extensions so it's possible to get segment start addresses in C, via:
              #pragma segment = "CSTACK"
              isrStack = __segment_begin("CSTACK");
---core=430 MSP430 architecture ---data_model Small data model for 430 core
config MSP430.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430.isa = String "430";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430.lnk = ITarget.Command {
    cmd: "xlink",
    opts: ""
};
config MSP430.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430.model = ITarget.Model {
    endian: "little",
    codeModel: "small",
    dataModel: "small",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430.name = String "MSP430";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430.rts = String "iar.targets.msp430.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 2,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 4,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 2,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 4,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 2,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430.suffix = String "r430";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430.vers = ITarget.Command {
    cmd: "icc430",
    opts: "-v"
};
config MSP430.xlib // module-wide
index URL

The command used to modify a library

Configuration settings
const MSP430.xlib = ITarget.Command {
    cmd: "xlib",
    opts: "-c"
};
DETAILS
Defaults:
-c
run command line
config MSP430.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430.arOpts = ITarget.Options {
    prefix: "",
    suffix: ""
};
config MSP430.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430.asmOpts = ITarget.Options {
    prefix: "-S",
    suffix: ""
};
DETAILS
Defaults:
-S
Silent operation
config MSP430.binDir // module-wide
index URL
Configuration settings
MSP430.binDir = String "$(rootDir)/bin/";
config MSP430.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430.ccOpts = ITarget.Options {
    prefix: "--silent",
    suffix: "--diag_suppress=Pa050,Go005"
};
DETAILS
Defaults:
--silent
Silent operation
--diag_suppress
Pa050 complains about Unix EOL characters Go005 complains about function inlining
config MSP430.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
MSP430.cmdPrefix = String "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config MSP430.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
MSP430.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config MSP430.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

Configuration settings
MSP430.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s43",
        {
            suf: ".s43",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config MSP430.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430.includeOpts = String "";
config MSP430.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
MSP430.lnkOpts = ITarget2.Options {
    prefix: "-S",
    suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
};
DETAILS
Defaults:
-S
Silent operation
-xens
Cross reference list generated in map file
-l
Generates a map file
-rt
Plugins in IAR debugger low level functions
-e
Redirects function call to another function at link time
-s
Program entry point
config MSP430.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430.platform = String "ti.platforms.msp430:MSP430F5438:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430.profiles // module-wide
index URL

Standard options profiles for the IAR MSP430 tool-chain

Configuration settings
MSP430.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430fn.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430fn.r43"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430fn.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430fn.r43"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430ff.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430ff.r43"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430ff.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430ff.r43"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
MSP430.stdInclude = String "iar/targets/msp430/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430.version = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config MSP430.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
MSP430.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
config MSP430.xlibOpts // module-wide
index URL

User configurable xlib options

Configuration settings
MSP430.xlibOpts = ITarget.Options {
    prefix: "",
    suffix: "\"MAKE-LIBRARY $@\""
};
DETAILS
Defaults:
MAKE-LIBRARY
changes a module to library type
MSP430.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:12 GMT


module iar.targets.msp430.MSP430X_large

metaonly module iar.targets.msp430.MSP430X_large
index URL

IAR MSP430X little endian, large code model, large data model target

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/msp430/MSP430X_large.xdc
var MSP430X_large = xdc.useModule('iar.targets.msp430.MSP430X_large');
module-wide constants & types
    var obj = new MSP430X_large.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430X_large.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430X_large.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430X_large.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430X_large.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430X_large.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430X_large.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430X_large.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430X_large.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430X_large.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430X_large.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430X_large.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430X_large.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430X_large.ar// The command used to create an archive = ITarget.Command {
        cmd: "xar",
        opts: ""
    };
    const MSP430X_large.asm// The command used to assembles assembly source files into object files = MSP430X_large.Command {
        cmd: "a430",
        opts: "-v1 --data_model large --code_model large -D__LARGE_DATA_MODEL__ -DUSE_LARGE_CODE_MODEL=1"
    };
    const MSP430X_large.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430X_large.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430X_large.cc// The command used to compile C/C++ source files into object files = MSP430X_large.Command {
        cmd: "icc430",
        opts: "-e --core=430X --data_model=large"
    };
    const MSP430X_large.isa// CPU Instruction Set Architecture (ISA) = String "430X";
    const MSP430X_large.lnk// The command used to link executables = ITarget.Command {
        cmd: "xlink",
        opts: ""
    };
    const MSP430X_large.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "large",
        dataModel: "large",
        shortEnums: true
    };
    const MSP430X_large.name// Nickname for this target = String "MSP430X_large";
    const MSP430X_large.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430X_large.rts// Name of a run-time support package to include = String "iar.targets.msp430.rts";
    const MSP430X_large.sectMap// Output section name to segment type mapping = String[string] computed value;
    const MSP430X_large.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 4,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 4,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 4,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 4,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 2
        }
    };
    const MSP430X_large.suffix// Suffix appended to all objs, libraries, and executable = String "r430XL";
    const MSP430X_large.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "icc430",
        opts: "-v"
    };
    const MSP430X_large.xlib// The command used to modify a library = ITarget.Command {
        cmd: "xlib",
        opts: "-c"
    };
     MSP430X_large.arOpts// User configurable archiver options = ITarget.Options {
        prefix: "",
        suffix: ""
    };
     MSP430X_large.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-S",
        suffix: ""
    };
     MSP430X_large.binDir// = String "$(rootDir)/bin/";
     MSP430X_large.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430X_large.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "--silent",
        suffix: "--diag_suppress=Pa050,Go005"
    };
     MSP430X_large.cmdPrefix// Prefix to put in front of each command = String "";
     MSP430X_large.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430X_large.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     MSP430X_large.execExt// Extension for executables = String undefined;
     MSP430X_large.extensions// The IAR assembly file extension recognised by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s43",
            {
                suf: ".s43",
                typ: "asm"
            }
        ]
    ];
     MSP430X_large.includeOpts// Additional user configurable target-specific include path options = String "";
     MSP430X_large.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-S",
        suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
    };
     MSP430X_large.platform// The default platform name for this target = String "ti.platforms.msp430:MSP430F5438:1";
     MSP430X_large.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430X_large.profiles// Standard options profiles for the IAR MSP430 tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xllfn.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xllfn.r43"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xllfn.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xllfn.r43"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xllff.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xllff.r43"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xllff.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xllff.r43"
            }
        ]
    ];
     MSP430X_large.rawVersion// The raw version string from the compiler = String undefined;
     MSP430X_large.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430X_large.stdInclude// Standard C/C++ types header = String "iar/targets/msp430/std.h";
     MSP430X_large.version// The Compatibility Key associated with this target = String undefined;
     MSP430X_large.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
     MSP430X_large.xlibOpts// User configurable xlib options = ITarget.Options {
        prefix: "",
        suffix: "\"MAKE-LIBRARY $@\""
    };
module-wide functions
     MSP430X_large.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430X_large.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X_large.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430X_large.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430X_large.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430X_large.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X_large.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X_large.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430X_large.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430X_large.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430X_large.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430X_large.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X_large.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430X_large.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430X_large.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430X_large.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430X_large.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430X_large.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430X_large.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430X_large.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430X_large.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430X_large.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430X_large.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430X_large.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430X_large.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430X_large.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430X_large.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430X_large.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430X_large.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430X_large.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430X_large.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430X_large.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430X_large.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430X_large.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430X_large.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430X_large.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430X_large.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430X_large.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430X_large.alignDirectiveSupported = Bool true;
config MSP430X_large.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430X_large.ar = ITarget.Command {
    cmd: "xar",
    opts: ""
};
config MSP430X_large.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430X_large.asm = MSP430X_large.Command {
    cmd: "a430",
    opts: "-v1 --data_model large --code_model large -D__LARGE_DATA_MODEL__ -DUSE_LARGE_CODE_MODEL=1"
};
DETAILS
Defaults:
-v1
MSP430X architecture
-D__LARGE_DATA_MODEL__
indicate that this is large model to assembly code; IAR does currently have any pre-defined macros for this purpose; we use this symbol because it is the same as that used by the TI compiler (so some degree of portability is possible).
config MSP430X_large.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430X_large.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430X_large.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430X_large.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430X_large.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430X_large.cc = MSP430X_large.Command {
    cmd: "icc430",
    opts: "-e --core=430X --data_model=large"
};
DETAILS
Defaults:
-e
enable compiler extensions so it's possible to get segment start addresses in C, via:
              #pragma segment = "CSTACK"
              isrStack = __segment_begin("CSTACK");
---core=430X MSP430X architecture ---data_model Large data model for 430X core
config MSP430X_large.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430X_large.isa = String "430X";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430X_large.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430X_large.lnk = ITarget.Command {
    cmd: "xlink",
    opts: ""
};
config MSP430X_large.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430X_large.model = ITarget.Model {
    endian: "little",
    codeModel: "large",
    dataModel: "large",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430X_large.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430X_large.name = String "MSP430X_large";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430X_large.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430X_large.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430X_large.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430X_large.rts = String "iar.targets.msp430.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430X_large.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430X_large.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430X_large.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430X_large.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 4,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 4,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 4,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 4,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430X_large.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430X_large.suffix = String "r430XL";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430X_large.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430X_large.vers = ITarget.Command {
    cmd: "icc430",
    opts: "-v"
};
config MSP430X_large.xlib // module-wide
index URL

The command used to modify a library

Configuration settings
const MSP430X_large.xlib = ITarget.Command {
    cmd: "xlib",
    opts: "-c"
};
DETAILS
Defaults:
-c
run command line
config MSP430X_large.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430X_large.arOpts = ITarget.Options {
    prefix: "",
    suffix: ""
};
config MSP430X_large.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430X_large.asmOpts = ITarget.Options {
    prefix: "-S",
    suffix: ""
};
DETAILS
Defaults:
-S
Silent operation
config MSP430X_large.binDir // module-wide
index URL
Configuration settings
MSP430X_large.binDir = String "$(rootDir)/bin/";
config MSP430X_large.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430X_large.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430X_large.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430X_large.ccOpts = ITarget.Options {
    prefix: "--silent",
    suffix: "--diag_suppress=Pa050,Go005"
};
DETAILS
Defaults:
--silent
Silent operation
--diag_suppress
Pa050 complains about Unix EOL characters Go005 complains about function inlining
config MSP430X_large.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
MSP430X_large.cmdPrefix = String "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config MSP430X_large.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430X_large.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430X_large.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
MSP430X_large.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config MSP430X_large.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430X_large.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430X_large.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

Configuration settings
MSP430X_large.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s43",
        {
            suf: ".s43",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config MSP430X_large.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430X_large.includeOpts = String "";
config MSP430X_large.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
MSP430X_large.lnkOpts = ITarget2.Options {
    prefix: "-S",
    suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
};
DETAILS
Defaults:
-S
Silent operation
-xens
Cross reference list generated in map file
-l
Generates a map file
-rt
Plugins in IAR debugger low level functions
-e
Redirects function call to another function at link time
-s
Program entry point
config MSP430X_large.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430X_large.platform = String "ti.platforms.msp430:MSP430F5438:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430X_large.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430X_large.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430X_large.profiles // module-wide
index URL

Standard options profiles for the IAR MSP430 tool-chain

Configuration settings
MSP430X_large.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xllfn.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xllfn.r43"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xllfn.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xllfn.r43"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xllff.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xllff.r43"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xllff.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xllff.r43"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430X_large.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430X_large.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430X_large.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430X_large.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430X_large.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
MSP430X_large.stdInclude = String "iar/targets/msp430/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430X_large.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430X_large.version = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config MSP430X_large.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
MSP430X_large.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
config MSP430X_large.xlibOpts // module-wide
index URL

User configurable xlib options

Configuration settings
MSP430X_large.xlibOpts = ITarget.Options {
    prefix: "",
    suffix: "\"MAKE-LIBRARY $@\""
};
DETAILS
Defaults:
MAKE-LIBRARY
changes a module to library type
MSP430X_large.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430X_large.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_large.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430X_large.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_large.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430X_large.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430X_large.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430X_large.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X_large.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430X_large.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X_large.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430X_large.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430X_large.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430X_large.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430X_large.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430X_large.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_large.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430X_large.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_large.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430X_large.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_large.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430X_large.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_large.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430X_large.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_large.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430X_large.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:12 GMT


module iar.targets.msp430.MSP430X_small

metaonly module iar.targets.msp430.MSP430X_small
index URL

IAR MSP430X little endian, large code model, small data model target

  • Configuration settings
  • Individual elements
Configuration settings sourced in iar/targets/msp430/MSP430X_small.xdc
var MSP430X_small = xdc.useModule('iar.targets.msp430.MSP430X_small');
module-wide constants & types
    var obj = new MSP430X_small.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430X_small.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430X_small.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430X_small.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430X_small.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430X_small.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430X_small.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430X_small.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430X_small.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430X_small.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430X_small.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430X_small.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430X_small.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430X_small.ar// The command used to create an archive = ITarget.Command {
        cmd: "xar",
        opts: ""
    };
    const MSP430X_small.asm// The command used to assembles assembly source files into object files = MSP430X_small.Command {
        cmd: "a430",
        opts: "-v1 --data_model small --code_model large -D__SMALL_DATA_MODEL__ -DUSE_LARGE_CODE_MODEL=1"
    };
    const MSP430X_small.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430X_small.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430X_small.cc// The command used to compile C/C++ source files into object files = MSP430X_small.Command {
        cmd: "icc430",
        opts: "-e --core=430X --data_model=small --save_reg20"
    };
    const MSP430X_small.isa// CPU Instruction Set Architecture (ISA) = String "430X";
    const MSP430X_small.lnk// The command used to link executables = ITarget.Command {
        cmd: "xlink",
        opts: ""
    };
    const MSP430X_small.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "large",
        dataModel: "small",
        shortEnums: true
    };
    const MSP430X_small.name// Nickname for this target = String "MSP430X_small";
    const MSP430X_small.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430X_small.rts// Name of a run-time support package to include = String "iar.targets.msp430.rts";
    const MSP430X_small.sectMap// Output section name to segment type mapping = String[string] computed value;
    const MSP430X_small.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 4,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 4,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 4,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 2,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const MSP430X_small.suffix// Suffix appended to all objs, libraries, and executable = String "r430XS";
    const MSP430X_small.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "icc430",
        opts: "-v"
    };
    const MSP430X_small.xlib// The command used to modify a library = ITarget.Command {
        cmd: "xlib",
        opts: "-c"
    };
     MSP430X_small.arOpts// User configurable archiver options = ITarget.Options {
        prefix: "",
        suffix: ""
    };
     MSP430X_small.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-S",
        suffix: ""
    };
     MSP430X_small.binDir// = String "$(rootDir)/bin/";
     MSP430X_small.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430X_small.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "--silent",
        suffix: "--diag_suppress=Pa050,Go005"
    };
     MSP430X_small.cmdPrefix// Prefix to put in front of each command = String "";
     MSP430X_small.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430X_small.debugGen// Debugger/IDE file generation support = ITarget.DebugGen undefined;
     MSP430X_small.execExt// Extension for executables = String undefined;
     MSP430X_small.extensions// The IAR assembly file extension recognised by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ],
        [
            ".s43",
            {
                suf: ".s43",
                typ: "asm"
            }
        ]
    ];
     MSP430X_small.includeOpts// Additional user configurable target-specific include path options = String "";
     MSP430X_small.lnkOpts// User configurable linker options = ITarget2.Options {
        prefix: "-S",
        suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
    };
     MSP430X_small.platform// The default platform name for this target = String "ti.platforms.msp430:MSP430F5438:1";
     MSP430X_small.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430X_small.profiles// Standard options profiles for the IAR MSP430 tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xlsfn.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xlsfn.r43"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xlsfn.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xlsfn.r43"
            }
        ],
        [
            "debug_full",
            {
                compileOpts: {
                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xlsff.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xlsff.r43"
            }
        ],
        [
            "release_full",
            {
                compileOpts: {
                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xlsff.h"
                },
                linkOpts: "$(rootDir)/lib/dlib/dl430xlsff.r43"
            }
        ]
    ];
     MSP430X_small.rawVersion// The raw version string from the compiler = String undefined;
     MSP430X_small.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430X_small.stdInclude// Standard C/C++ types header = String "iar/targets/msp430/std.h";
     MSP430X_small.version// The Compatibility Key associated with this target = String undefined;
     MSP430X_small.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
     MSP430X_small.xlibOpts// User configurable xlib options = ITarget.Options {
        prefix: "",
        suffix: "\"MAKE-LIBRARY $@\""
    };
module-wide functions
     MSP430X_small.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430X_small.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430X_small.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430X_small.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X_small.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X_small.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430X_small.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430X_small.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430X_small.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430X_small.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430X_small.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430X_small.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430X_small.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430X_small.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430X_small.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430X_small.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430X_small.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430X_small.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430X_small.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430X_small.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430X_small.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430X_small.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430X_small.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430X_small.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430X_small.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430X_small.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430X_small.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430X_small.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430X_small.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430X_small.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430X_small.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430X_small.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430X_small.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430X_small.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430X_small.alignDirectiveSupported = Bool true;
config MSP430X_small.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430X_small.ar = ITarget.Command {
    cmd: "xar",
    opts: ""
};
config MSP430X_small.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430X_small.asm = MSP430X_small.Command {
    cmd: "a430",
    opts: "-v1 --data_model small --code_model large -D__SMALL_DATA_MODEL__ -DUSE_LARGE_CODE_MODEL=1"
};
DETAILS
Defaults:
-v1
MSP430X architecture
-D__SMALL_DATA_MODEL__
indicate that this is small model to assembly code; IAR does currently have any pre-defined macros for this purpose; we use this symbol because it is the same as that used by the TI compiler (so some degree of portability is possible).
config MSP430X_small.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430X_small.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430X_small.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430X_small.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430X_small.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430X_small.cc = MSP430X_small.Command {
    cmd: "icc430",
    opts: "-e --core=430X --data_model=small --save_reg20"
};
DETAILS
Defaults:
-e
enable compiler extensions so it's possible to get segment start addresses in C, via:
              #pragma segment = "CSTACK"
              isrStack = __segment_begin("CSTACK");
---core=430X MSP430X architecture ---data_model Small data model for MSP430X architecture ---save_reg20 All 20 bits of registers are preserved in all interrupt functions
config MSP430X_small.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430X_small.isa = String "430X";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430X_small.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430X_small.lnk = ITarget.Command {
    cmd: "xlink",
    opts: ""
};
config MSP430X_small.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430X_small.model = ITarget.Model {
    endian: "little",
    codeModel: "large",
    dataModel: "small",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430X_small.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430X_small.name = String "MSP430X_small";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430X_small.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430X_small.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430X_small.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430X_small.rts = String "iar.targets.msp430.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430X_small.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430X_small.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430X_small.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430X_small.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 4,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 4,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 4,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 2,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430X_small.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430X_small.suffix = String "r430XS";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430X_small.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430X_small.vers = ITarget.Command {
    cmd: "icc430",
    opts: "-v"
};
config MSP430X_small.xlib // module-wide
index URL

The command used to modify a library

Configuration settings
const MSP430X_small.xlib = ITarget.Command {
    cmd: "xlib",
    opts: "-c"
};
DETAILS
Defaults:
-c
run command line
config MSP430X_small.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430X_small.arOpts = ITarget.Options {
    prefix: "",
    suffix: ""
};
config MSP430X_small.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430X_small.asmOpts = ITarget.Options {
    prefix: "-S",
    suffix: ""
};
DETAILS
Defaults:
-S
Silent operation
config MSP430X_small.binDir // module-wide
index URL
Configuration settings
MSP430X_small.binDir = String "$(rootDir)/bin/";
config MSP430X_small.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430X_small.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430X_small.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430X_small.ccOpts = ITarget.Options {
    prefix: "--silent",
    suffix: "--diag_suppress=Pa050,Go005"
};
DETAILS
Defaults:
--silent
Silent operation
--diag_suppress
Pa050 complains about Unix EOL characters Go005 complains about function inlining
config MSP430X_small.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
MSP430X_small.cmdPrefix = String "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config MSP430X_small.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430X_small.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430X_small.debugGen // module-wide
index URL

Debugger/IDE file generation support

Configuration settings
MSP430X_small.debugGen = ITarget.DebugGen undefined;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config MSP430X_small.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430X_small.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430X_small.extensions // module-wide
index URL

The IAR assembly file extension recognised by this target

Configuration settings
MSP430X_small.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ],
    [
        ".s43",
        {
            suf: ".s43",
            typ: "asm"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config MSP430X_small.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430X_small.includeOpts = String "";
config MSP430X_small.lnkOpts // module-wide
index URL

User configurable linker options

Configuration settings
MSP430X_small.lnkOpts = ITarget2.Options {
    prefix: "-S",
    suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start"
};
DETAILS
Defaults:
-S
Silent operation
-xens
Cross reference list generated in map file
-l
Generates a map file
-rt
Plugins in IAR debugger low level functions
-e
Redirects function call to another function at link time
-s
Program entry point
config MSP430X_small.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430X_small.platform = String "ti.platforms.msp430:MSP430F5438:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430X_small.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430X_small.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430X_small.profiles // module-wide
index URL

Standard options profiles for the IAR MSP430 tool-chain

Configuration settings
MSP430X_small.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xlsfn.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xlsfn.r43"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xlsfn.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xlsfn.r43"
        }
    ],
    [
        "debug_full",
        {
            compileOpts: {
                copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xlsff.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xlsff.r43"
        }
    ],
    [
        "release_full",
        {
            compileOpts: {
                copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xlsff.h"
            },
            linkOpts: "$(rootDir)/lib/dlib/dl430xlsff.r43"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430X_small.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430X_small.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430X_small.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430X_small.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430X_small.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
MSP430X_small.stdInclude = String "iar/targets/msp430/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430X_small.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430X_small.version = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config MSP430X_small.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
MSP430X_small.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
config MSP430X_small.xlibOpts // module-wide
index URL

User configurable xlib options

Configuration settings
MSP430X_small.xlibOpts = ITarget.Options {
    prefix: "",
    suffix: "\"MAKE-LIBRARY $@\""
};
DETAILS
Defaults:
MAKE-LIBRARY
changes a module to library type
MSP430X_small.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430X_small.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430X_small.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430X_small.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430X_small.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430X_small.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X_small.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430X_small.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X_small.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430X_small.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430X_small.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430X_small.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430X_small.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430X_small.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430X_small.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430X_small.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430X_small.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430X_small.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430X_small.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:19:12 GMT


package iar.targets.msp430.rts
index URL

Runtime support package for MSP430 devices for use with the IAR toolchain

XDCspec declarations sourced in iar/targets/msp430/rts/package.xdc
package iar.targets.msp430.rts [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:19:13 GMT


module iar.targets.msp430.rts.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in iar/targets/msp430/rts/Settings.xdc
#include <iar/targets/msp430/rts/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in iar/targets/msp430/rts/Settings.xdc
var Settings = xdc.useModule('iar.targets.msp430.rts.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:13 GMT


package iar.tools.configuro
index URL

Command-line configuration tool for IAR Embedded Workbench

  • USAGE
  • OPTIONS
  • DETAILS
  • INPUTS
  • OUTPUTS
This command-line tool computes the appropriate configuro options from the set of options passed from the IAR Workbench (for ex. target/platform from compile options). With these options, the xdc.tools.configuro tool is executed to compute the set of libraries, command-line flags and the other artifacts needed to build the application in IAR Workbench. [ more ... ]
XDCspec declarations sourced in iar/tools/configuro/package.xdc
package iar.tools.configuro [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs iar.tools.configuro [--help]
    [-o outdir (optional)]
    [-c codegen_dir]
    [--cc compiler_name_string]
    [--device device_name]
    [--cfgArgs args_string]
    [--compileOptions compile_options_string]
    [--linkOptions linker_options_string]
    [--profile profile]
    [--projFile project_file (optional)]
    infile.cfg (optional)
OPTIONS
-o
Pathname of the output directory

A directory containing the generated build artifacts, in particular the compiler.defs and linker.cmd files.

The last component of the output directory path must be a valid ANSI C identifier; i.e., it must consist entirely of alphanumeric or '_' characters and must not start with a number. So, the names '0app' and 'app-test' are not valid but '0app/config' and 'app-test/config' are valid.

This is optional parameter. By default, the output directory has the name configPkg and will be within the {#cfgDir} directory.

-c
Root directory of the code generation tools

The path to the installation directory of the compiler and linker for the selected target. The definition of "installation directory" can vary from compiler to compiler, but is most commonly the directory that contains a "bin" subdirectory.

--device
The name of the device

The device name has to be passed to the xdc.tools.configuro tool.

--compileOptions
Compile options used for building C files

The compiler options are required to find the target and platform options for xdc.tools.configuro.

--linkOptions
Linker options used for linking libraries

The linker options are required to pull in the correct libraries during link.

--profile
Build profile
--cfgArgs
Optional arguments passed to configuration script

This option lets the user pass values into the configuration script from the command line. The argument is an expression in JavaScript syntax. Its value is available in the configuration script under the name Program.build.cfgArgs.

The JavaScript expression is evaluated in the configuration domain after the platform package is imported, immediately before calling the user's configuration script.

This string has the same effect as the cfgArgs string in xdc.bld.Executable.Attrs.

You can pass multiple values to configuration scripts using the syntax of a JavaScript Object constant:

      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ... app.cfg

The configuration script can read the various fields as, e.g.:

      if (Program.build.cfgArgs.foo == "hello") {
          :
      }

--projFile
IAR Embedded project file

This file is searched for the RTSC configuration file (.cfg).

DETAILS
This command-line tool computes the appropriate configuro options from the set of options passed from the IAR Workbench (for ex. target/platform from compile options). With these options, the xdc.tools.configuro tool is executed to compute the set of libraries, command-line flags and the other artifacts needed to build the application in IAR Workbench.
INPUTS
-o outdir (Optional)
Optionally an output directory can be provided.
-c codegen_dir
Root directory of the code generation tools.
--device device_name_string
The name of the device.
--compileOptions compile_options_string
The command line options passed to the compiler.
--linkOptions linker_options_string
The command line options passed to the linker.
--profile profile
The build profile.
--projFile project_file (Optional)
IAR Embedded Workbench project file. This is optional when infile.cfg is passed on command line.
infile.cfg (Optional)
A user-supplied configuration script that names a set of RTSC modules, and optionally changes their configuration settings. If provided, it will override the --projFile option.
OUTPUTS
outdir/
A directory containing all generated build artifacts.
outdir/compiler.defs
A file containing C compiler command-line flags. These flags must included on the compiler command line for any C source file that directly accesses the RTSC content. The flags define the header file and include paths to ensure object code compatibility between all all included content.
outdir/linker.cmd
A file containing linker command-line flags. These flags must be included on the linker command line for the final link of the application. The flags list needed libraries and object files, and on some platforms define the embedded system memory map.
For example:
      xs iar.tools.configuro -c "<codegen_dir>" --cc "<compiler>"
         --device "<device_name>" --cfgArgs "<cfg_script_args>"
         --compileOptions "<compiler_options>" --linkOptions "<link_options>"
         --profile "<profile>" infile.cfg
generated on Sun, 25 Nov 2018 22:19:15 GMT


module iar.tools.configuro.Main

metaonly module iar.tools.configuro.Main
index URL

Command implementation

  • DETAILS
  • INPUTS
  • OUTPUTS
  • Configuration settings
  • Individual elements
This command-line tool computes the appropriate configuro options from the set of options passed from the IAR Workbench (for ex. target/platform from compile options). With these options, the xdc.tools.configuro tool is executed to compute the set of libraries, command-line flags and the other artifacts needed to build the application in IAR Workbench. [ more ... ]
Configuration settings sourced in iar/tools/configuro/Main.xdc
var Main = xdc.useModule('iar.tools.configuro.Main');
module-wide config parameters
     Main.usage// usage help message = String[] [
        '[-o outdir (optional)]',
        '[-c codegen_dir]',
        '[--cc compiler_name_string]',
        '[--device device_name]',
        '[--cfgArgs args_string]',
        '[--compileOptions compile_options_string]',
        '[--linkOptions linker_options_string]',
        '[--profile profile]',
        '[--projFile project_file (optional)]',
        'infile.cfg (optional)'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.cfgArgs// Optional arguments passed to configuration script = String "";
        params.compileOptions// Compile options used for building C files = String null;
        params.device// The name of the device = String null;
        params.linkOptions// Linker options used for linking libraries = String null;
        params.output// Pathname of the output directory = String "";
        params.profile// Build profile = String "";
        params.projFile// IAR Embedded project file = String "";
        params.rootDir// Root directory of the code generation tools = String null;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
This command-line tool computes the appropriate configuro options from the set of options passed from the IAR Workbench (for ex. target/platform from compile options). With these options, the xdc.tools.configuro tool is executed to compute the set of libraries, command-line flags and the other artifacts needed to build the application in IAR Workbench.
INPUTS
-o outdir (Optional)
Optionally an output directory can be provided.
-c codegen_dir
Root directory of the code generation tools.
--device device_name_string
The name of the device.
--compileOptions compile_options_string
The command line options passed to the compiler.
--linkOptions linker_options_string
The command line options passed to the linker.
--profile profile
The build profile.
--projFile project_file (Optional)
IAR Embedded Workbench project file. This is optional when infile.cfg is passed on command line.
infile.cfg (Optional)
A user-supplied configuration script that names a set of RTSC modules, and optionally changes their configuration settings. If provided, it will override the --projFile option.
OUTPUTS
outdir/
A directory containing all generated build artifacts.
outdir/compiler.defs
A file containing C compiler command-line flags. These flags must included on the compiler command line for any C source file that directly accesses the RTSC content. The flags define the header file and include paths to ensure object code compatibility between all all included content.
outdir/linker.cmd
A file containing linker command-line flags. These flags must be included on the linker command line for the final link of the application. The flags list needed libraries and object files, and on some platforms define the embedded system memory map.
For example:
      xs iar.tools.configuro -c "<codegen_dir>" --cc "<compiler>"
         --device "<device_name>" --cfgArgs "<cfg_script_args>"
         --compileOptions "<compiler_options>" --linkOptions "<link_options>"
         --profile "<profile>" infile.cfg
config Main.usage // module-wide
index URL

usage help message

Configuration settings
Main.usage = String[] [
    '[-o outdir (optional)]',
    '[-c codegen_dir]',
    '[--cc compiler_name_string]',
    '[--device device_name]',
    '[--cfgArgs args_string]',
    '[--compileOptions compile_options_string]',
    '[--linkOptions linker_options_string]',
    '[--profile profile]',
    '[--projFile project_file (optional)]',
    'infile.cfg (optional)'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.cfgArgs = String "";
    // Optional arguments passed to configuration script
    params.compileOptions = String null;
    // Compile options used for building C files
    params.device = String null;
    // The name of the device
    params.linkOptions = String null;
    // Linker options used for linking libraries
    params.output = String "";
    // Pathname of the output directory
    params.profile = String "";
    // Build profile
    params.projFile = String "";
    // IAR Embedded project file
    params.rootDir = String null;
    // Root directory of the code generation tools
config Main.Params.cfgArgs // instance
index URL

Optional arguments passed to configuration script

Configuration settings
var params = new Main.Params;
...
params.cfgArgs = String "";
DETAILS
This option lets the user pass values into the configuration script from the command line. The argument is an expression in JavaScript syntax. Its value is available in the configuration script under the name Program.build.cfgArgs.
The JavaScript expression is evaluated in the configuration domain after the platform package is imported, immediately before calling the user's configuration script.
This string has the same effect as the cfgArgs string in xdc.bld.Executable.Attrs.
You can pass multiple values to configuration scripts using the syntax of a JavaScript Object constant:
      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ... app.cfg
The configuration script can read the various fields as, e.g.:
      if (Program.build.cfgArgs.foo == "hello") {
          :
      }
NOTE
Different command line shells, such as UNIX bash verses Windows cmd.exe, interpret quotes on the command line very differently. As a result, the syntax necessary to pass a string such as "hello" to configuro can vary depending on the shell you use.
For most UNIX shells, it is possible to use single quotes around the use of double quotes as in the example above. However, since Windows cmd.exe does not treat the single quote as a special character, it is necessary to use a backslash, '\', to ensure that the double quote characters are passed to the configuro tool.
Windows cmd.exe:
      xs xdc.tools.configuro --cfgArgs "{foo:\"hello\", bar:2}" ...
UNIX bash, ksh, csh, ...:
      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ...
SEE
xdc.bld.Executable.Attrs
config Main.Params.compileOptions // instance
index URL

Compile options used for building C files

Configuration settings
var params = new Main.Params;
...
params.compileOptions = String null;
DETAILS
The compiler options are required to find the target and platform options for xdc.tools.configuro.
config Main.Params.device // instance
index URL

The name of the device

Configuration settings
var params = new Main.Params;
...
params.device = String null;
DETAILS
The device name has to be passed to the xdc.tools.configuro tool.
config Main.Params.linkOptions // instance
index URL

Linker options used for linking libraries

Configuration settings
var params = new Main.Params;
...
params.linkOptions = String null;
DETAILS
The linker options are required to pull in the correct libraries during link.
config Main.Params.output // instance
index URL

Pathname of the output directory

Configuration settings
var params = new Main.Params;
...
params.output = String "";
DETAILS
A directory containing the generated build artifacts, in particular the compiler.defs and linker.cmd files.
The last component of the output directory path must be a valid ANSI C identifier; i.e., it must consist entirely of alphanumeric or '_' characters and must not start with a number. So, the names '0app' and 'app-test' are not valid but '0app/config' and 'app-test/config' are valid.
This is optional parameter. By default, the output directory has the name configPkg and will be within the {#cfgDir} directory.
config Main.Params.profile // instance
index URL

Build profile

Configuration settings
var params = new Main.Params;
...
params.profile = String "";
config Main.Params.projFile // instance
index URL

IAR Embedded project file

Configuration settings
var params = new Main.Params;
...
params.projFile = String "";
DETAILS
This file is searched for the RTSC configuration file (.cfg).
config Main.Params.rootDir // instance
index URL

Root directory of the code generation tools

Configuration settings
var params = new Main.Params;
...
params.rootDir = String null;
DETAILS
The path to the installation directory of the compiler and linker for the selected target. The definition of "installation directory" can vary from compiler to compiler, but is most commonly the directory that contains a "bin" subdirectory.
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:19:15 GMT


package microsoft.targets
index URL

Targets that wrap Microsoft code generation tools

XDCspec declarations sourced in microsoft/targets/package.xdc
package microsoft.targets [1, 0, 2, 0] {
    interface ITarget;
    // A Microsoft-specific extension to the base xdc.bld.ITarget3 interface
    module Net32;
    // Microsoft .Net 32-bit native target
    module VC98;
    // Microsoft Windows 32-bit target using the Visual C/C++ 6.x compiler
    module Win32;
    // Microsoft Windows 32-bit target using the Visual C/C++ compiler
}
generated on Sun, 25 Nov 2018 22:19:11 GMT


interface microsoft.targets.ITarget

metaonly interface microsoft.targets.ITarget
index URL

A Microsoft-specific extension to the base xdc.bld.ITarget3 interface

XDCspec summary sourced in microsoft/targets/ITarget.xdc
metaonly interface ITarget { ...
// inherits xdc.bld.ITarget3
    // inherits xdc.bld.ITarget2
        // inherits xdc.bld.ITarget
XDCspec declarations sourced in microsoft/targets/ITarget.xdc
package microsoft.targets;
metaonly interface ITarget inherits ITarget3 {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    readonly config Bool alignDirectiveSupported// The compiler supports an align directive = false;
    readonly config ITarget2.Command ar// The command used to create an archive;
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    readonly config ITarget2.Command lnk// The command used to link executables;
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    readonly config String sectMap// Output section name to segment type mapping[string];
    override readonly config String stdInclude// Standard C/C++ types header = "microsoft/targets/std.h";
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "",
        suffix: ""
    };
    config String cmdPrefix// Prefix to put in front of each command = "";
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    override config ITarget.DebugGen debugGen// Debugger/IDE project file generation support = {
        execTemplate: "microsoft/targets/vc_exec.xdt",
        execPattern: "$(cfgName).vcproj"
    };
    config String execExt// Extension for executables;
    config ITarget.Extension extensions// File extensions recognized by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
    config String includeOpts// Additional user configurable target-specific include path options;
    config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "",
        suffix: ""
    };
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the microsoft tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-Z7 -Odi -MTd",
                    defs: "-D_DEBUG=1"
                },
                linkOpts: "-debug msvcrt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -MT",
                    defs: ""
                },
                linkOpts: "msvcrt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
            }
        ]
    ];
    config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    config Bool strictANSI// Disable Microsoft C/C++ language extensions = true;
    override config String version// The Compatibility Key associated with this target;
    config String versionMap// Map of compiler version numbers to compatibility keys[string] = [ ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
     function setPath// Return path needed to find necessary DLLS();
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in microsoft/targets/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.Command
index URL

Required command and options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.Options
index URL

User configurable command options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config Bool alignDirectiveSupported = false;
config ITarget.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config ITarget2.Command ar;
config ITarget.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config ITarget2.Command asm;
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config ITarget2.Command cc;
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config ITarget2.Command lnk;
config ITarget.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
override readonly config String stdInclude = "microsoft/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config ITarget2.Options asmOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config ITarget2.Options ccOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String cmdPrefix = "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.debugGen // module-wide
index URL

Debugger/IDE project file generation support

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
override config ITarget.DebugGen debugGen = {
    execTemplate: "microsoft/targets/vc_exec.xdt",
    execPattern: "$(cfgName).vcproj"
};
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
The settings below generate VC project files that enable one to debug (and even rebuild) Executables from within the VC GUI.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
      Program.gen.debuggerFiles = true;
It is also possible to control the generation via build options; see xdc.bld.ITarget.DebugGen.
To debug an executable: double click on the generated *.vcproj file, when the debugger comes up, type F11 (step into).
The first time you debug an executable, the VC debugger may prompt you for a "solution file" to save. Click OK (accepting the solution file name), and you will be at the first statement of your executable.
To set command line arguments prior to debugging: open the executable's "Project Properties" dialog (select the executable in the "Solution Explorer" window and pull-down View->"Property Pages" or type shift-F4), select "Debugging" in the left-most pane of the executable's "Property Pages", and enter command line arguments in the "Command Arguments" text box.
SEE
http://msdn.microsoft.com/library/default.asp?url=/library/en-us/vsdebug/html/vxtskdebugginganexecreatedwithoutvisualstudioproject.asp
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

File extensions recognized by this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String includeOpts;
config ITarget.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config ITarget2.Options lnkOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Standard options profiles for the microsoft tool-chain

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "-Z7 -Odi -MTd",
                defs: "-D_DEBUG=1"
            },
            linkOpts: "-debug msvcrt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -MT",
                defs: ""
            },
            linkOpts: "msvcrt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.strictANSI // module-wide
index URL

Disable Microsoft C/C++ language extensions

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config Bool strictANSI = true;
DETAILS
Set to true if you plan to port your program to other environments. The compiler treats extended keywords as simple identifiers, disables the other Microsoft extensions, and automatically defines the __STDC__ predefined macro for C programs. This option shows up as "-Za" on the command line when strictANSI is set to true.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the build number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the Visual C++ 2005 Express Edition, the output of the command cl may contains the compiler version string 14.00.50727.42. The Compatibility Key is [1,0,14.00,50727].
config ITarget.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
config String versionMap[string] = [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
ITarget.setPath() // module-wide
index URL

Return path needed to find necessary DLLS

XDCspec declarations sourced in microsoft/targets/ITarget.xdc
function setPath();
DETAILS
The microsoft compilers often require one or more directories to be in the PATH; this allows the compiler to find necessary DLLs. A target implementing this function returns a string with path components separated by ";".
generated on Sun, 25 Nov 2018 22:19:10 GMT


module microsoft.targets.Net32

metaonly module microsoft.targets.Net32
index URL

Microsoft .Net 32-bit native target

  • Configuration settings
  • Individual elements
This target supports the free Microsoft .Net C/C++ compiler; aka the Microsoft Visual C++ Toolkit 2003 available from http://msdn.microsoft.com/visualc/vctoolkit2003.
Configuration settings sourced in microsoft/targets/Net32.xdc
var Net32 = xdc.useModule('microsoft.targets.Net32');
module-wide constants & types
    var obj = new Net32.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new Net32.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new Net32.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new Net32.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new Net32.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new Net32.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new Net32.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new Net32.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new Net32.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new Net32.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new Net32.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new Net32.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const Net32.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const Net32.ar// The archiver command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/bin/link.exe -lib -nologo",
        opts: ""
    };
    const Net32.asm// The assemble command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/bin/cl",
        opts: "-nologo -c"
    };
    const Net32.base// A target that this target is based upon = ITarget.Module computed value;
    const Net32.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const Net32.cc// The compile command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/bin/cl",
        opts: "-nologo -c"
    };
    const Net32.isa// CPU Instruction Set Architecture (ISA) = String "x86";
    const Net32.lnk// The linker command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/bin/link -nologo",
        opts: ""
    };
    const Net32.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const Net32.name// Nickname for this target = String "Net32";
    const Net32.os// Name of OS required to run programs built for this target = String "Windows";
    const Net32.rts// Name of a run-time support package to include = String "microsoft.targets.rts";
    const Net32.sectMap// Output section name to segment type mapping = String[string] computed value;
    const Net32.stdInclude// Standard C/C++ types header = String "microsoft/targets/std.h";
    const Net32.suffix// Suffix appended to all objs, libraries, and executable = String "86N";
     Net32.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Net32.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Net32.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     Net32.ccOpts// User modifiable default options = ITarget2.Options {
        prefix: "-G5 -W3"
    };
     Net32.cmdPrefix// Prefix to put in front of each command = String "";
     Net32.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     Net32.debugGen// Debugger/IDE project file generation support = ITarget.DebugGen {
        execTemplate: "microsoft/targets/vc_exec.xdt",
        execPattern: "$(cfgName).vcproj"
    };
     Net32.execExt// Extension for executables = String ".exe";
     Net32.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     Net32.includeOpts// User modifiable default include directories = String "-I$(rootDir)/include";
     Net32.lnkOpts// User modifiable linker options = ITarget2.Options {
        prefix: "-libpath:$(rootDir)/lib",
        suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -mapinfo:exports -machine:ix86 -nodefaultlib -incremental:no"
    };
     Net32.platform// The default platform name for this target = String "host.platforms.PC";
     Net32.platforms// A set of platforms that can support this target = String[] [ ];
     Net32.profiles// User modifiable default profiles = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-Z7 -Od -MTd",
                    defs: "-D_DEBUG=1"
                },
                linkOpts: "libcmt.lib kernel32.lib"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-Oxi -MT"
                },
                linkOpts: "libcmt.lib kernel32.lib"
            }
        ]
    ];
     Net32.rawVersion// The raw version string from the compiler = String undefined;
     Net32.rootDir// Installation directory for this target's code generation tools = String undefined;
     Net32.strictANSI// Disable Microsoft C/C++ language extensions = Bool true;
     Net32.version// The Compatibility Key associated with this target = String undefined;
     Net32.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
module-wide functions
     Net32.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     Net32.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Net32.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     Net32.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     Net32.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     Net32.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     Net32.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     Net32.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     Net32.getRawVersion// Get a target-specific raw compiler version string() returns String
     Net32.getVersion// Get a target-specific Compatibility Key string() returns String
     Net32.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     Net32.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Net32.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
     Net32.setPath// Return path needed to find necessary DLLS() returns Any
struct Net32.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new Net32.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct Net32.Command
index URL

Required command and options

Configuration settings
var obj = new Net32.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct Net32.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new Net32.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct Net32.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new Net32.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct Net32.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new Net32.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct Net32.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new Net32.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct Net32.Extension
index URL

File extension to file type association

Configuration settings
var obj = new Net32.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct Net32.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new Net32.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct Net32.Model
index URL

Target runtime model

Configuration settings
var obj = new Net32.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct Net32.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new Net32.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct Net32.Options
index URL

User configurable command options

Configuration settings
var obj = new Net32.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct Net32.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new Net32.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config Net32.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const Net32.alignDirectiveSupported = Bool false;
config Net32.ar // module-wide
index URL

The archiver command and all required options

Configuration settings
const Net32.ar = ITarget2.Command {
    cmd: "$(rootDir)/bin/link.exe -lib -nologo",
    opts: ""
};
DETAILS
-nologo
don't display archiver copyright
config Net32.asm // module-wide
index URL

The assemble command and all required options

Configuration settings
const Net32.asm = ITarget2.Command {
    cmd: "$(rootDir)/bin/cl",
    opts: "-nologo -c"
};
DETAILS
-c
don't link
config Net32.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const Net32.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config Net32.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const Net32.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config Net32.cc // module-wide
index URL

The compile command and all required options

Configuration settings
const Net32.cc = ITarget2.Command {
    cmd: "$(rootDir)/bin/cl",
    opts: "-nologo -c"
};
DETAILS
-c
don't link
-nologo
don't display compiler copyright
config Net32.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const Net32.isa = String "x86";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config Net32.lnk // module-wide
index URL

The linker command and all required options

Configuration settings
const Net32.lnk = ITarget2.Command {
    cmd: "$(rootDir)/bin/link -nologo",
    opts: ""
};
DETAILS
-nologo
Don't display linker copyright
config Net32.model // module-wide
index URL

Run-time model

Configuration settings
const Net32.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config Net32.name // module-wide
index URL

Nickname for this target

Configuration settings
const Net32.name = String "Net32";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config Net32.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const Net32.os = String "Windows";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config Net32.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const Net32.rts = String "microsoft.targets.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config Net32.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const Net32.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config Net32.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const Net32.stdInclude = String "microsoft/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config Net32.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const Net32.suffix = String "86N";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config Net32.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
Net32.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Net32.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
Net32.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Net32.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
Net32.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config Net32.ccOpts // module-wide
index URL

User modifiable default options

Configuration settings
Net32.ccOpts = ITarget2.Options {
    prefix: "-G5 -W3"
};
DETAILS
-G5
Optimizes code to favor the Pentium processor
-W3
enable all warnings recommended for production purposes.
config Net32.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
Net32.cmdPrefix = String "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config Net32.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
Net32.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config Net32.debugGen // module-wide
index URL

Debugger/IDE project file generation support

Configuration settings
Net32.debugGen = ITarget.DebugGen {
    execTemplate: "microsoft/targets/vc_exec.xdt",
    execPattern: "$(cfgName).vcproj"
};
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
The settings below generate VC project files that enable one to debug (and even rebuild) Executables from within the VC GUI.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
      Program.gen.debuggerFiles = true;
It is also possible to control the generation via build options; see xdc.bld.ITarget.DebugGen.
To debug an executable: double click on the generated *.vcproj file, when the debugger comes up, type F11 (step into).
The first time you debug an executable, the VC debugger may prompt you for a "solution file" to save. Click OK (accepting the solution file name), and you will be at the first statement of your executable.
To set command line arguments prior to debugging: open the executable's "Project Properties" dialog (select the executable in the "Solution Explorer" window and pull-down View->"Property Pages" or type shift-F4), select "Debugging" in the left-most pane of the executable's "Property Pages", and enter command line arguments in the "Command Arguments" text box.
SEE
http://msdn.microsoft.com/library/default.asp?url=/library/en-us/vsdebug/html/vxtskdebugginganexecreatedwithoutvisualstudioproject.asp
config Net32.execExt // module-wide
index URL

Extension for executables

Configuration settings
Net32.execExt = String ".exe";
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config Net32.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
Net32.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config Net32.includeOpts // module-wide
index URL

User modifiable default include directories

Configuration settings
Net32.includeOpts = String "-I$(rootDir)/include";
DETAILS
-I$(rootDir)/include
include compiler specific headers
config Net32.lnkOpts // module-wide
index URL

User modifiable linker options

Configuration settings
Net32.lnkOpts = ITarget2.Options {
    prefix: "-libpath:$(rootDir)/lib",
    suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -mapinfo:exports -machine:ix86 -nodefaultlib -incremental:no"
};
DETAILS
-libpath...
directories to search for toolchain specific libraries
-nodefaultlib
don't search for default libraries when linking; all libraries used must be explicitly named
-incremental:no
link for execution (no subsequent link will occur)
-machine:ix86
link for the Intel x86 architecture
-map:$(XDCCFGDIR)/$@.map
output any link map information to the specified file ($(XDCCFGDIR) is usually package/cfg)
-pdb:$(XDCCFGDIR)/$@.pdb
output any program debug information to the specified file ($(XDCCFGDIR) is usually package/cfg)
config Net32.platform // module-wide
index URL

The default platform name for this target

Configuration settings
Net32.platform = String "host.platforms.PC";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config Net32.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
Net32.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config Net32.profiles // module-wide
index URL

User modifiable default profiles

Configuration settings
Net32.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-Z7 -Od -MTd",
                defs: "-D_DEBUG=1"
            },
            linkOpts: "libcmt.lib kernel32.lib"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-Oxi -MT"
            },
            linkOpts: "libcmt.lib kernel32.lib"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config Net32.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
Net32.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config Net32.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
Net32.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config Net32.strictANSI // module-wide
index URL

Disable Microsoft C/C++ language extensions

Configuration settings
Net32.strictANSI = Bool true;
DETAILS
Set to true if you plan to port your program to other environments. The compiler treats extended keywords as simple identifiers, disables the other Microsoft extensions, and automatically defines the __STDC__ predefined macro for C programs. This option shows up as "-Za" on the command line when strictANSI is set to true.
config Net32.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
Net32.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the build number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the Visual C++ 2005 Express Edition, the output of the command cl may contains the compiler version string 14.00.50727.42. The Compatibility Key is [1,0,14.00,50727].
config Net32.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
Net32.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
Net32.archive() // module-wide
index URL

Create an archive

Configuration settings
Net32.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Net32.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
Net32.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Net32.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
Net32.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
Net32.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
Net32.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Net32.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
Net32.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Net32.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
Net32.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
Net32.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
Net32.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
Net32.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
Net32.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
Net32.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
Net32.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
Net32.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
Net32.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
Net32.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
Net32.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Net32.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
Net32.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
Net32.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
Net32.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
Net32.setPath() // module-wide
index URL

Return path needed to find necessary DLLS

Configuration settings
Net32.setPath() returns Any
DETAILS
The microsoft compilers often require one or more directories to be in the PATH; this allows the compiler to find necessary DLLs. A target implementing this function returns a string with path components separated by ";".
generated on Sun, 25 Nov 2018 22:19:10 GMT


module microsoft.targets.VC98

metaonly module microsoft.targets.VC98
index URL

Microsoft Windows 32-bit target using the Visual C/C++ 6.x compiler

  • Configuration settings
  • Individual elements
Configuration settings sourced in microsoft/targets/VC98.xdc
var VC98 = xdc.useModule('microsoft.targets.VC98');
module-wide constants & types
    var obj = new VC98.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new VC98.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new VC98.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new VC98.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new VC98.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new VC98.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new VC98.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new VC98.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new VC98.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new VC98.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new VC98.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new VC98.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const VC98.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const VC98.ar// The archiver command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/vc98/bin/lib",
        opts: "-nologo"
    };
    const VC98.asm// The assemble command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/vc98/bin/cl.exe -nologo -c",
        opts: ""
    };
    const VC98.base// A target that this target is based upon = ITarget.Module computed value;
    const VC98.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const VC98.cc// The compile command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/vc98/bin/cl.exe -nologo -c",
        opts: '-W3 -Zp1 -DWIN32 -D_DLL -D_AFXDLL -DEXPORT=""'
    };
    const VC98.isa// CPU Instruction Set Architecture (ISA) = String "x86";
    const VC98.lnk// The linker command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/vc98/bin/link -nologo",
        opts: ""
    };
    const VC98.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const VC98.name// Nickname for this target = String "VC98";
    const VC98.os// Name of OS required to run programs built for this target = String "Windows";
    const VC98.path// Path components added during execution of commands = String "$(rootDir)/vc98/bin;$(rootDir)/common/msdev98/bin";
    const VC98.rts// Name of a run-time support package to include = String "microsoft.targets.rts";
    const VC98.sectMap// Output section name to segment type mapping = String[string] computed value;
    const VC98.stdInclude// Standard C/C++ types header = String "microsoft/targets/std.h";
    const VC98.suffix// Suffix appended to all objs, libraries, and executable = String "86";
     VC98.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     VC98.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     VC98.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     VC98.ccOpts// User modifiable default options = ITarget2.Options {
        prefix: "-G5 -Ob1 -Gs -GX",
        suffix: "-Dfar= "
    };
     VC98.cmdPrefix// Prefix to put in front of each command = String "";
     VC98.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     VC98.debugGen// Debugger/IDE project file generation support = ITarget.DebugGen {
        execTemplate: "microsoft/targets/vc_exec.xdt",
        execPattern: "$(cfgName).vcproj"
    };
     VC98.execExt// Extension for executables = String ".exe";
     VC98.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     VC98.includeOpts// User modifiable include paths = String "-I$(rootDir)/vc98/include -I$(rootDir)/vc98/mfc/include -I$(rootDir)/vc98/atl/include";
     VC98.lnkOpts// User modifiable linker options = ITarget2.Options {
        prefix: "-libpath:$(rootDir)/vc98/lib -libpath:$(rootDir)/vc98/mfc/lib",
        suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -machine:ix86 -nodefaultlib -incremental:no"
    };
     VC98.platform// The default platform name for this target = String "host.platforms.PC";
     VC98.platforms// A set of platforms that can support this target = String[] [ ];
     VC98.profiles// User modifiable default profiles = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-Z7 -Odi -MTd",
                    defs: "-D_DEBUG=1"
                },
                linkOpts: "-debug mfc42.lib mfcs42.lib msvcrt.lib msvcirt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -MT",
                    defs: ""
                },
                linkOpts: "mfc42.lib mfcs42.lib msvcrt.lib msvcirt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
            }
        ]
    ];
     VC98.rawVersion// The raw version string from the compiler = String undefined;
     VC98.rootDir// Installation directory for this target's code generation tools = String undefined;
     VC98.strictANSI// Disable Microsoft C/C++ language extensions = Bool true;
     VC98.version// The Compatibility Key associated with this target = String undefined;
     VC98.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
module-wide functions
     VC98.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     VC98.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     VC98.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     VC98.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     VC98.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     VC98.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     VC98.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     VC98.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     VC98.getRawVersion// Get a target-specific raw compiler version string() returns String
     VC98.getVersion// Get a target-specific Compatibility Key string() returns String
     VC98.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     VC98.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     VC98.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
     VC98.setPath// Return path needed to find necessary DLLS() returns Any
struct VC98.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new VC98.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct VC98.Command
index URL

Required command and options

Configuration settings
var obj = new VC98.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct VC98.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new VC98.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct VC98.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new VC98.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct VC98.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new VC98.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct VC98.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new VC98.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct VC98.Extension
index URL

File extension to file type association

Configuration settings
var obj = new VC98.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct VC98.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new VC98.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct VC98.Model
index URL

Target runtime model

Configuration settings
var obj = new VC98.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct VC98.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new VC98.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct VC98.Options
index URL

User configurable command options

Configuration settings
var obj = new VC98.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct VC98.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new VC98.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config VC98.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const VC98.alignDirectiveSupported = Bool false;
config VC98.ar // module-wide
index URL

The archiver command and all required options

Configuration settings
const VC98.ar = ITarget2.Command {
    cmd: "$(rootDir)/vc98/bin/lib",
    opts: "-nologo"
};
DETAILS
-nologo
don't display archiver copyright
config VC98.asm // module-wide
index URL

The assemble command and all required options

Configuration settings
const VC98.asm = ITarget2.Command {
    cmd: "$(rootDir)/vc98/bin/cl.exe -nologo -c",
    opts: ""
};
DETAILS
-c
don't link
-nologo
don't display compiler copyright
config VC98.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const VC98.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config VC98.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const VC98.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config VC98.cc // module-wide
index URL

The compile command and all required options

Configuration settings
const VC98.cc = ITarget2.Command {
    cmd: "$(rootDir)/vc98/bin/cl.exe -nologo -c",
    opts: '-W3 -Zp1 -DWIN32 -D_DLL -D_AFXDLL -DEXPORT=""'
};
DETAILS
-W3
enable all warnings recommended for production purposes.
-Zp1
Packs structure members on 1-byte boundry
-c
don't link
-nologo
don't display compiler copyright
config VC98.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const VC98.isa = String "x86";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config VC98.lnk // module-wide
index URL

The linker command and all required options

Configuration settings
const VC98.lnk = ITarget2.Command {
    cmd: "$(rootDir)/vc98/bin/link -nologo",
    opts: ""
};
DETAILS
-nologo
Don't display linker copyright
config VC98.model // module-wide
index URL

Run-time model

Configuration settings
const VC98.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config VC98.name // module-wide
index URL

Nickname for this target

Configuration settings
const VC98.name = String "VC98";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config VC98.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const VC98.os = String "Windows";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config VC98.path // module-wide
index URL

Path components added during execution of commands

Configuration settings
const VC98.path = String "$(rootDir)/vc98/bin;$(rootDir)/common/msdev98/bin";
DETAILS
The VC98 compiler DLLs are located in the vc98/bin subdirectory the pdb DLL is located in $(rootDir)/msdev98/bin.
config VC98.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const VC98.rts = String "microsoft.targets.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config VC98.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const VC98.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config VC98.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const VC98.stdInclude = String "microsoft/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config VC98.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const VC98.suffix = String "86";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config VC98.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
VC98.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config VC98.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
VC98.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config VC98.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
VC98.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config VC98.ccOpts // module-wide
index URL

User modifiable default options

Configuration settings
VC98.ccOpts = ITarget2.Options {
    prefix: "-G5 -Ob1 -Gs -GX",
    suffix: "-Dfar= "
};
DETAILS
-G5
Optimizes code to favor the Pentium processor
-Ob1
Expand only functions marked as inline or, in a C++ member function, defined within a class declaration
-Gs
Probe stack to automatically grow stack as necessary
-GX
Enables synchronous exception handling
-WL
Write errors/warnings on a single output line
config VC98.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
VC98.cmdPrefix = String "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config VC98.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
VC98.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config VC98.debugGen // module-wide
index URL

Debugger/IDE project file generation support

Configuration settings
VC98.debugGen = ITarget.DebugGen {
    execTemplate: "microsoft/targets/vc_exec.xdt",
    execPattern: "$(cfgName).vcproj"
};
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
The settings below generate VC project files that enable one to debug (and even rebuild) Executables from within the VC GUI.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
      Program.gen.debuggerFiles = true;
It is also possible to control the generation via build options; see xdc.bld.ITarget.DebugGen.
To debug an executable: double click on the generated *.vcproj file, when the debugger comes up, type F11 (step into).
The first time you debug an executable, the VC debugger may prompt you for a "solution file" to save. Click OK (accepting the solution file name), and you will be at the first statement of your executable.
To set command line arguments prior to debugging: open the executable's "Project Properties" dialog (select the executable in the "Solution Explorer" window and pull-down View->"Property Pages" or type shift-F4), select "Debugging" in the left-most pane of the executable's "Property Pages", and enter command line arguments in the "Command Arguments" text box.
SEE
http://msdn.microsoft.com/library/default.asp?url=/library/en-us/vsdebug/html/vxtskdebugginganexecreatedwithoutvisualstudioproject.asp
config VC98.execExt // module-wide
index URL

Extension for executables

Configuration settings
VC98.execExt = String ".exe";
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config VC98.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
VC98.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config VC98.includeOpts // module-wide
index URL

User modifiable include paths

Configuration settings
VC98.includeOpts = String "-I$(rootDir)/vc98/include -I$(rootDir)/vc98/mfc/include -I$(rootDir)/vc98/atl/include";
DETAILS
-I$(rootDir)/include
include compiler specific headers
config VC98.lnkOpts // module-wide
index URL

User modifiable linker options

Configuration settings
VC98.lnkOpts = ITarget2.Options {
    prefix: "-libpath:$(rootDir)/vc98/lib -libpath:$(rootDir)/vc98/mfc/lib",
    suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -machine:ix86 -nodefaultlib -incremental:no"
};
DETAILS
-libpath...
directories to search for toolchain specific libraries
-nodefaultlib
don't search for default libraries when linking; all libraries used must be explicitly named
-incremental:no
link for execution (no subsequent link will occur)
-machine:ix86
link for the Intel x86 architecture
-map:$(XDCCFGDIR)/$@.map
output any link map information to the specified file ($(XDCCFGDIR) is usually package/cfg)
-pdb:$(XDCCFGDIR)/$@.pdb
output any program debug information to the specified file ($(XDCCFGDIR) is usually package/cfg)
config VC98.platform // module-wide
index URL

The default platform name for this target

Configuration settings
VC98.platform = String "host.platforms.PC";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config VC98.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
VC98.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config VC98.profiles // module-wide
index URL

User modifiable default profiles

Configuration settings
VC98.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-Z7 -Odi -MTd",
                defs: "-D_DEBUG=1"
            },
            linkOpts: "-debug mfc42.lib mfcs42.lib msvcrt.lib msvcirt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -MT",
                defs: ""
            },
            linkOpts: "mfc42.lib mfcs42.lib msvcrt.lib msvcirt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config VC98.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
VC98.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config VC98.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
VC98.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config VC98.strictANSI // module-wide
index URL

Disable Microsoft C/C++ language extensions

Configuration settings
VC98.strictANSI = Bool true;
DETAILS
Set to true if you plan to port your program to other environments. The compiler treats extended keywords as simple identifiers, disables the other Microsoft extensions, and automatically defines the __STDC__ predefined macro for C programs. This option shows up as "-Za" on the command line when strictANSI is set to true.
config VC98.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
VC98.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the build number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the Visual C++ 2005 Express Edition, the output of the command cl may contains the compiler version string 14.00.50727.42. The Compatibility Key is [1,0,14.00,50727].
config VC98.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
VC98.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
VC98.archive() // module-wide
index URL

Create an archive

Configuration settings
VC98.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
VC98.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
VC98.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
VC98.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
VC98.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
VC98.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
VC98.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
VC98.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
VC98.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
VC98.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
VC98.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
VC98.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
VC98.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
VC98.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
VC98.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
VC98.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
VC98.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
VC98.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
VC98.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
VC98.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
VC98.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
VC98.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
VC98.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
VC98.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
VC98.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
VC98.setPath() // module-wide
index URL

Return path needed to find necessary DLLS

Configuration settings
VC98.setPath() returns Any
DETAILS
The microsoft compilers often require one or more directories to be in the PATH; this allows the compiler to find necessary DLLs. A target implementing this function returns a string with path components separated by ";".
generated on Sun, 25 Nov 2018 22:19:11 GMT


module microsoft.targets.Win32

metaonly module microsoft.targets.Win32
index URL

Microsoft Windows 32-bit target using the Visual C/C++ compiler

  • Configuration settings
  • Individual elements
This target can be configured to be used with different versions of Microsoft Visual C/C++ and different installations of Platform SDK (or a newer equivalent Windows SDK). The optional Platform SDK is needed only for building applications that use Windows API. The target Win32 contains default configurations for Visual C/C++ versions 8.0, and 14.0, but in order to support future versions of Visual C/C++ and different Windows SDK installations, there is a parameter sdkPath, which users can set in their config.bld files to enable usage of this target with their installations. [ more ... ]
Configuration settings sourced in microsoft/targets/Win32.xdc
var Win32 = xdc.useModule('microsoft.targets.Win32');
module-wide constants & types
    var obj = new Win32.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new Win32.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new Win32.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new Win32.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new Win32.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new Win32.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new Win32.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new Win32.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new Win32.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new Win32.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new Win32.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new Win32.SDKPath// A structure type that defines Windows SDK paths to be used for building Windows applications with this target;
        obj.includePath = String[] ...
        obj.libraryPath = String[] ...
        obj.libs = String ...
    var obj = new Win32.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const Win32.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const Win32.ar// The archiver command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/VC/bin/lib.exe -nologo",
        opts: ""
    };
    const Win32.asm// The assemble command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/VC/bin/ml -c",
        opts: "-nologo"
    };
    const Win32.base// A target that this target is based upon = ITarget.Module computed value;
    const Win32.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const Win32.cc// The compile command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/VC/bin/cl.exe -nologo -c",
        opts: '-Zp1 -W3 -D_DLL -DWINVER=_WIN32_WINNT_WIN7 -D_WIN32_WINNT=_WIN32_WINNT_WIN7 -DWIN32 -DEXPORT=""'
    };
    const Win32.isa// CPU Instruction Set Architecture (ISA) = String "x86";
    const Win32.lnk// The linker command and all required options = ITarget2.Command {
        cmd: "$(rootDir)/VC/bin/link",
        opts: "-nologo"
    };
    const Win32.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const Win32.name// Nickname for this target = String "Win32";
    const Win32.os// Name of OS required to run programs built for this target = String "Windows";
    const Win32.path// Path components added during execution of commands = String "$(rootDir)/VC/bin;$(rootDir)/Common7/IDE";
    const Win32.rts// Name of a run-time support package to include = String "microsoft.targets.rts";
    const Win32.sectMap// Output section name to segment type mapping = String[string] computed value;
    const Win32.stdInclude// Standard C/C++ types header = String "microsoft/targets/std.h";
    const Win32.suffix// Suffix appended to all objs, libraries, and executable = String "86W";
     Win32.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Win32.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Win32.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     Win32.ccOpts// User modifiable default options = ITarget2.Options {
        prefix: "-Ob1 -Gs",
        suffix: "-Dfar= "
    };
     Win32.cmdPrefix// Prefix to put in front of each command = String "";
     Win32.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     Win32.debugGen// Debugger/IDE project file generation support = ITarget.DebugGen {
        execTemplate: "microsoft/targets/vc_exec.xdt",
        execPattern: "$(cfgName).vcproj"
    };
     Win32.execExt// Extension for executables = String ".exe";
     Win32.extensions// File extensions recognized by this target = ITarget.Extension[string] [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
     Win32.includeOpts// User modifiable include paths = String "-I$(rootDir)/VC/include -I$(rootDir)/VC/atlmfc/include";
     Win32.lnkOpts// User modifiable linker options = ITarget2.Options {
        prefix: "-libpath:$(rootDir)/VC/lib -libpath:$(rootDir)/VC/atlmfc/lib",
        suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -machine:ix86 -nodefaultlib -incremental:no"
    };
     Win32.platform// The default platform name for this target = String "host.platforms.PC";
     Win32.platforms// A set of platforms that can support this target = String[] [ ];
     Win32.profiles// Standard options profiles are overwritten because we can't use 'MTs' and -D_DEBUG=1. Both of them added the debug version of the C runtime library to the manifest = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-Z7 -Odi -MTd",
                    defs: ""
                },
                linkOpts: "-debug msvcrtd.lib vcruntimed.lib ucrtd.lib oldnames.lib"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -MT",
                    defs: ""
                },
                linkOpts: "msvcrt.lib vcruntime.lib ucrt.lib oldnames.lib"
            }
        ]
    ];
     Win32.rawVersion// The raw version string from the compiler = String undefined;
     Win32.rootDir// Installation directory for this target's code generation tools = String undefined;
     Win32.sdkPath// Location of the header and library files in a Windows SDK installation = Win32.SDKPath {
        includePath: [ ],
        libraryPath: [ ],
        libs: "ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
    };
     Win32.strictANSI// Disable Microsoft C/C++ language extensions = Bool true;
     Win32.version// The Compatibility Key associated with this target = String undefined;
     Win32.versionMap// Map of compiler version numbers to compatibility keys = String[string] [ ];
module-wide functions
     Win32.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     Win32.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Win32.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     Win32.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     Win32.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     Win32.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     Win32.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     Win32.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     Win32.getRawVersion// Get a target-specific raw compiler version string() returns String
     Win32.getVersion// Get a target-specific Compatibility Key string() returns String
     Win32.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     Win32.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Win32.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
     Win32.setPath// Return path needed to find necessary DLLS() returns Any
DETAILS
This target can be configured to be used with different versions of Microsoft Visual C/C++ and different installations of Platform SDK (or a newer equivalent Windows SDK). The optional Platform SDK is needed only for building applications that use Windows API. The target Win32 contains default configurations for Visual C/C++ versions 8.0, and 14.0, but in order to support future versions of Visual C/C++ and different Windows SDK installations, there is a parameter sdkPath, which users can set in their config.bld files to enable usage of this target with their installations.
Unlike the Visual C/C++ 6.x tool chain, this compiler complies very closely with the C/C++ language specification. This target may be necessary in situations that take full advantage of the C++ language.
struct Win32.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new Win32.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct Win32.Command
index URL

Required command and options

Configuration settings
var obj = new Win32.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct Win32.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new Win32.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct Win32.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new Win32.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct Win32.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new Win32.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct Win32.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new Win32.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct Win32.Extension
index URL

File extension to file type association

Configuration settings
var obj = new Win32.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct Win32.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new Win32.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct Win32.Model
index URL

Target runtime model

Configuration settings
var obj = new Win32.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct Win32.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new Win32.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct Win32.Options
index URL

User configurable command options

Configuration settings
var obj = new Win32.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct Win32.SDKPath
index URL

A structure type that defines Windows SDK paths to be used for building Windows applications with this target

Configuration settings
var obj = new Win32.SDKPath;
    obj.includePath = String[] ...
    obj.libraryPath = String[] ...
    obj.libs = String ...
FIELDS
includePath — Absolute path to the Include directory of a Windows SDK installation. Windows SDK is required if the target is used to build executables that use Windows API.
libraryPath — Absolute path to the Lib directory of a Windows SDK installation.
libs — List of Windows SDK libraries to be added to the linker command line.
DETAILS
A Windows SDK installation is needed for building programs that use Windows API. However, Windows SDK installations can be anywhere on the disk and also include SDK version numbers (10.0.10586.0 for example). Therefore, these paths can't be derived from the target's rootDir.
struct Win32.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new Win32.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config Win32.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const Win32.alignDirectiveSupported = Bool false;
config Win32.ar // module-wide
index URL

The archiver command and all required options

Configuration settings
const Win32.ar = ITarget2.Command {
    cmd: "$(rootDir)/VC/bin/lib.exe -nologo",
    opts: ""
};
DETAILS
-nologo
don't display archiver copyright
config Win32.asm // module-wide
index URL

The assemble command and all required options

Configuration settings
const Win32.asm = ITarget2.Command {
    cmd: "$(rootDir)/VC/bin/ml -c",
    opts: "-nologo"
};
DETAILS
-c
don't link
-nologo
don't display macro assembler copyright
config Win32.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const Win32.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config Win32.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const Win32.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config Win32.cc // module-wide
index URL

The compile command and all required options

Configuration settings
const Win32.cc = ITarget2.Command {
    cmd: "$(rootDir)/VC/bin/cl.exe -nologo -c",
    opts: '-Zp1 -W3 -D_DLL -DWINVER=_WIN32_WINNT_WIN7 -D_WIN32_WINNT=_WIN32_WINNT_WIN7 -DWIN32 -DEXPORT=""'
};
DETAILS
-W3
enable all warnings recommended for production purposes.
-c
don't link
-nologo
don't display compiler copyright
-Zp1
Packs structure members on 1-byte boundry
config Win32.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const Win32.isa = String "x86";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config Win32.lnk // module-wide
index URL

The linker command and all required options

Configuration settings
const Win32.lnk = ITarget2.Command {
    cmd: "$(rootDir)/VC/bin/link",
    opts: "-nologo"
};
DETAILS
-nologo
Don't display linker copyright
config Win32.model // module-wide
index URL

Run-time model

Configuration settings
const Win32.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config Win32.name // module-wide
index URL

Nickname for this target

Configuration settings
const Win32.name = String "Win32";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config Win32.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const Win32.os = String "Windows";
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config Win32.path // module-wide
index URL

Path components added during execution of commands

Configuration settings
const Win32.path = String "$(rootDir)/VC/bin;$(rootDir)/Common7/IDE";
config Win32.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const Win32.rts = String "microsoft.targets.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config Win32.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const Win32.sectMap = String[string] computed value;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config Win32.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const Win32.stdInclude = String "microsoft/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config Win32.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const Win32.suffix = String "86W";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config Win32.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
Win32.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Win32.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
Win32.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Win32.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
Win32.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config Win32.ccOpts // module-wide
index URL

User modifiable default options

Configuration settings
Win32.ccOpts = ITarget2.Options {
    prefix: "-Ob1 -Gs",
    suffix: "-Dfar= "
};
DETAILS
-G5 (removed because it is incompatible with VC8.0)
Optimizes code to favor the Pentium processor
-Ob1
Expand only functions marked as inline or, in a C++ member function, defined within a class declaration
-Gs
Probe stack to automatically grow stack as necessary
-GX (removed because it is incompatible with VC8.0)
Enables synchronous exception handling
-WL
Write errors/warnings on a single output line
config Win32.cmdPrefix // module-wide
index URL

Prefix to put in front of each command

Configuration settings
Win32.cmdPrefix = String "";
DETAILS
This string is put in front of every Command before being passed to the shell for execution. This string can be used to run the compiler in emulation environments.
config Win32.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
Win32.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config Win32.debugGen // module-wide
index URL

Debugger/IDE project file generation support

Configuration settings
Win32.debugGen = ITarget.DebugGen {
    execTemplate: "microsoft/targets/vc_exec.xdt",
    execPattern: "$(cfgName).vcproj"
};
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
The settings below generate VC project files that enable one to debug (and even rebuild) Executables from within the VC GUI.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
      Program.gen.debuggerFiles = true;
It is also possible to control the generation via build options; see xdc.bld.ITarget.DebugGen.
To debug an executable: double click on the generated *.vcproj file, when the debugger comes up, type F11 (step into).
The first time you debug an executable, the VC debugger may prompt you for a "solution file" to save. Click OK (accepting the solution file name), and you will be at the first statement of your executable.
To set command line arguments prior to debugging: open the executable's "Project Properties" dialog (select the executable in the "Solution Explorer" window and pull-down View->"Property Pages" or type shift-F4), select "Debugging" in the left-most pane of the executable's "Property Pages", and enter command line arguments in the "Command Arguments" text box.
SEE
http://msdn.microsoft.com/library/default.asp?url=/library/en-us/vsdebug/html/vxtskdebugginganexecreatedwithoutvisualstudioproject.asp
config Win32.execExt // module-wide
index URL

Extension for executables

Configuration settings
Win32.execExt = String ".exe";
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config Win32.extensions // module-wide
index URL

File extensions recognized by this target

Configuration settings
Win32.extensions = ITarget.Extension[string] [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config Win32.includeOpts // module-wide
index URL

User modifiable include paths

Configuration settings
Win32.includeOpts = String "-I$(rootDir)/VC/include -I$(rootDir)/VC/atlmfc/include";
DETAILS
-I$(rootDir)/$(compilerDir)/include
include compiler specific headers
config Win32.lnkOpts // module-wide
index URL

User modifiable linker options

Configuration settings
Win32.lnkOpts = ITarget2.Options {
    prefix: "-libpath:$(rootDir)/VC/lib -libpath:$(rootDir)/VC/atlmfc/lib",
    suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -machine:ix86 -nodefaultlib -incremental:no"
};
DETAILS
-libpath
directories to search for toolchain specific libraries
-nodefaultlib
don't search for default libraries when linking; all libraries used must be explicitly named
-incremental:no
link for execution (no subsequent link will occur)
-machine:ix86
link for the Intel x86 architecture
-map:$(XDCCFGDIR)/$@.map
output any link map information to the specified file ($(XDCCFGDIR) is usually package/cfg)
-pdb:$(XDCCFGDIR)/$@.pdb
output any program debug information to the specified file ($(XDCCFGDIR) is usually package/cfg)
config Win32.platform // module-wide
index URL

The default platform name for this target

Configuration settings
Win32.platform = String "host.platforms.PC";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config Win32.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
Win32.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config Win32.profiles // module-wide
index URL

Standard options profiles are overwritten because we can't use 'MTs' and -D_DEBUG=1. Both of them added the debug version of the C runtime library to the manifest

Configuration settings
Win32.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-Z7 -Odi -MTd",
                defs: ""
            },
            linkOpts: "-debug msvcrtd.lib vcruntimed.lib ucrtd.lib oldnames.lib"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -MT",
                defs: ""
            },
            linkOpts: "msvcrt.lib vcruntime.lib ucrt.lib oldnames.lib"
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config Win32.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
Win32.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config Win32.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
Win32.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config Win32.sdkPath // module-wide
index URL

Location of the header and library files in a Windows SDK installation

Configuration settings
Win32.sdkPath = Win32.SDKPath {
    includePath: [ ],
    libraryPath: [ ],
    libs: "ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
};
DETAILS
This parameter contains paths to the optional Windows SDK.
EXAMPLES
If the content of sdkPath, set in config.bld is
      Win32.sdkPath = {
          includePath: "C:/PROGRA~2/WI3CF2~1/10/Include/10.0.10586.0/ucrt",
          libraryPath: "C:/PROGRA~2/WI3CF2~1/10/Lib/10.0.10586.0/um/x86";
          libs: " libucrt.lib setargv.obj oldnames.lib ole32.lib
 oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib
 advapi32.lib shell32.lib comctl32.lib mfc70.lib ucrt.lib"
      };
  the contents of `includePath`, `libraryPath` and `libs` are added to
  appropriate command lines.

  If Windows SDK is not installed or needed, sdkPath's `includePath` and
  `libraryPath` should be empty.
config Win32.strictANSI // module-wide
index URL

Disable Microsoft C/C++ language extensions

Configuration settings
Win32.strictANSI = Bool true;
DETAILS
Set to true if you plan to port your program to other environments. The compiler treats extended keywords as simple identifiers, disables the other Microsoft extensions, and automatically defines the __STDC__ predefined macro for C programs. This option shows up as "-Za" on the command line when strictANSI is set to true.
config Win32.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
Win32.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the build number.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the Visual C++ 2005 Express Edition, the output of the command cl may contains the compiler version string 14.00.50727.42. The Compatibility Key is [1,0,14.00,50727].
config Win32.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

Configuration settings
Win32.versionMap = String[string] [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
Win32.archive() // module-wide
index URL

Create an archive

Configuration settings
Win32.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Win32.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
Win32.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Win32.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
Win32.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
Win32.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
Win32.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Win32.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
Win32.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Win32.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
Win32.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
Win32.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
Win32.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
Win32.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
Win32.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
Win32.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
Win32.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
Win32.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
Win32.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
Win32.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
Win32.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Win32.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
Win32.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
Win32.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
Win32.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
Win32.setPath() // module-wide
index URL

Return path needed to find necessary DLLS

Configuration settings
Win32.setPath() returns Any
DETAILS
The microsoft compilers often require one or more directories to be in the PATH; this allows the compiler to find necessary DLLs. A target implementing this function returns a string with path components separated by ";".
generated on Sun, 25 Nov 2018 22:19:11 GMT


package microsoft.targets.rts
index URL

Runtime support package for the x86 targets for use with Microsoft tools

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in microsoft/targets/rts/package.xdc
requires xdc.runtime;
package microsoft.targets.rts [1, 0, 0] {
}
generated on Sun, 25 Nov 2018 22:19:09 GMT


package ti.catalog
index URL

TI device specifications

XDCspec declarations sourced in ti/catalog/package.xdc
package ti.catalog [1, 0, 0] {
    interface ICpuDataSheet;
    // TI-specific extensions to xdc.platform.ICpuDataSheet
}
generated on Sun, 25 Nov 2018 22:20:25 GMT


interface ti.catalog.ICpuDataSheet

metaonly interface ti.catalog.ICpuDataSheet
index URL

TI-specific extensions to xdc.platform.ICpuDataSheet

XDCspec summary sourced in ti/catalog/ICpuDataSheet.xdc
metaonly interface ICpuDataSheet { ...
// inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
package ti.catalog;
metaonly interface ICpuDataSheet inherits ICpuDataSheet {
instance:
per-instance config parameters
    config String cpuCore// A string identifying the CPU Core;
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    config Int dataWordSize// The size of an int on the target in 8-bit bytes;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes;
    config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ICpuDataSheet.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
config String cpuCore;
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ICpuDataSheet.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
config String cpuCoreRevision;
config ICpuDataSheet.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
config Int dataWordSize;
config ICpuDataSheet.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
config String deviceHeader;
config ICpuDataSheet.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
config Int minDataUnitSize;
config ICpuDataSheet.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
config Int minProgUnitSize;
config ICpuDataSheet.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ICpuDataSheet.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ICpuDataSheet.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/ICpuDataSheet.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:25 GMT


package ti.catalog.arm
index URL

Package of devices for the arm family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/package.xdc
requires xdc.platform;
requires ti.catalog.arm.peripherals.timers;
package ti.catalog.arm [1, 0, 1] {
    interface IOMAP2x3x;
    interface IOMAP3xxx;
    interface ITMS320DA8xx;
    module AM1705;
    module AM1707;
    module AM1806;
    module AM1808;
    module CortexM3;
    // The CortexM3 device data sheet module
    module OMAP2430;
    module OMAP2431;
    module OMAP2530;
    module OMAP2531;
    module OMAP3403;
    module OMAP3405;
    module OMAP3425;
    module OMAP3503;
    module OMAP3505;
    module OMAP3515;
    module OMAP3517;
    module OMAP3525;
    module OMAP3530;
    module OMAPL108;
    module OMAPL118;
    module OMAPL137;
    module OMAPL138;
    module TMS320C1030;
    module TMS320C3430;
    module TMS320C5912;
    module TMS320CDM510;
    module TMS320CDM6446;
    module TMS320CDM6467;
    module TMS320CDM730;
    // The TMS320CDM730 device data sheet module
    module TMS320CDM740;
    // The TMS320CDM740 device data sheet module
    module TMS320DA828;
    module TMS320DA830;
    module TMS320DA840;
    module TMS320DA850;
    module TMS320DM355;
    module TMS320DM357;
    module TMS320DM365;
    module TMS470R10;
    // The C470 device data sheet module
    module TMS570LS20216;
    // The C470 device data sheet module
    module TMS570PSF762;
    // The C470 device data sheet module
    module TNETV107X;
}
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.AM1705

metaonly module ti.catalog.arm.AM1705
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/AM1705.xdc
var AM1705 = xdc.useModule('ti.catalog.arm.AM1705');
per-instance config parameters
    var params = new AM1705.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM1705.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM1705.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM1705.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM1705.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM1705.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM1705.Params;
...
params.cpuCoreRevision = String "1.0";
config AM1705.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM1705.Params;
...
params.dataWordSize = Int 4;
config AM1705.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM1705.Params;
...
params.deviceHeader = String undefined;
config AM1705.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM1705.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM1705.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM1705.Params;
...
params.minDataUnitSize = Int 1;
config AM1705.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM1705.Params;
...
params.minProgUnitSize = Int 1;
config AM1705.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM1705.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM1705.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM1705.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM1705.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM1705.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:25 GMT


module ti.catalog.arm.AM1707

metaonly module ti.catalog.arm.AM1707
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/AM1707.xdc
var AM1707 = xdc.useModule('ti.catalog.arm.AM1707');
per-instance config parameters
    var params = new AM1707.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM1707.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM1707.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM1707.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM1707.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM1707.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM1707.Params;
...
params.cpuCoreRevision = String "1.0";
config AM1707.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM1707.Params;
...
params.dataWordSize = Int 4;
config AM1707.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM1707.Params;
...
params.deviceHeader = String undefined;
config AM1707.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM1707.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM1707.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM1707.Params;
...
params.minDataUnitSize = Int 1;
config AM1707.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM1707.Params;
...
params.minProgUnitSize = Int 1;
config AM1707.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM1707.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM1707.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM1707.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM1707.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM1707.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:25 GMT


module ti.catalog.arm.AM1806

metaonly module ti.catalog.arm.AM1806
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/AM1806.xdc
var AM1806 = xdc.useModule('ti.catalog.arm.AM1806');
per-instance config parameters
    var params = new AM1806.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM1806.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM1806.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM1806.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM1806.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM1806.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM1806.Params;
...
params.cpuCoreRevision = String "1.0";
config AM1806.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM1806.Params;
...
params.dataWordSize = Int 4;
config AM1806.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM1806.Params;
...
params.deviceHeader = String undefined;
config AM1806.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM1806.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM1806.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM1806.Params;
...
params.minDataUnitSize = Int 1;
config AM1806.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM1806.Params;
...
params.minProgUnitSize = Int 1;
config AM1806.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM1806.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM1806.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM1806.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM1806.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM1806.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:25 GMT


module ti.catalog.arm.AM1808

metaonly module ti.catalog.arm.AM1808
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/AM1808.xdc
var AM1808 = xdc.useModule('ti.catalog.arm.AM1808');
per-instance config parameters
    var params = new AM1808.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM1808.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM1808.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM1808.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM1808.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM1808.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM1808.Params;
...
params.cpuCoreRevision = String "1.0";
config AM1808.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM1808.Params;
...
params.dataWordSize = Int 4;
config AM1808.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM1808.Params;
...
params.deviceHeader = String undefined;
config AM1808.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM1808.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM1808.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM1808.Params;
...
params.minDataUnitSize = Int 1;
config AM1808.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM1808.Params;
...
params.minProgUnitSize = Int 1;
config AM1808.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM1808.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM1808.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM1808.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM1808.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM1808.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.CortexM3

metaonly module ti.catalog.arm.CortexM3
index URL

The CortexM3 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/CortexM3.xdc
var CortexM3 = xdc.useModule('ti.catalog.arm.CortexM3');
per-instance config parameters
    var params = new CortexM3.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CortexM3.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CortexM3.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CortexM3.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CortexM3.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CortexM3.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CortexM3.Params;
...
params.cpuCoreRevision = String "1.0";
config CortexM3.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CortexM3.Params;
...
params.dataWordSize = Int 4;
config CortexM3.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CortexM3.Params;
...
params.deviceHeader = String undefined;
config CortexM3.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new CortexM3.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config CortexM3.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CortexM3.Params;
...
params.minDataUnitSize = Int 1;
config CortexM3.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CortexM3.Params;
...
params.minProgUnitSize = Int 1;
config CortexM3.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CortexM3.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CortexM3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CortexM3.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CortexM3.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CortexM3.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


interface ti.catalog.arm.IOMAP2x3x

metaonly interface ti.catalog.arm.IOMAP2x3x
index URL
XDCspec summary sourced in ti/catalog/arm/IOMAP2x3x.xdc
metaonly interface IOMAP2x3x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
package ti.catalog.arm;
metaonly interface IOMAP2x3x inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v6";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "2.1";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x0000F800,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IOMAP2x3x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
override config String cpuCore = "v6";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IOMAP2x3x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
override config String cpuCoreRevision = "2.1";
config IOMAP2x3x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
override config Int dataWordSize = 4;
config IOMAP2x3x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
config String deviceHeader;
config IOMAP2x3x.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x0000F800,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config IOMAP2x3x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
override config Int minDataUnitSize = 1;
config IOMAP2x3x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
override config Int minProgUnitSize = 1;
config IOMAP2x3x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IOMAP2x3x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IOMAP2x3x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/IOMAP2x3x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:25 GMT


interface ti.catalog.arm.IOMAP3xxx

metaonly interface ti.catalog.arm.IOMAP3xxx
index URL
XDCspec summary sourced in ti/catalog/arm/IOMAP3xxx.xdc
metaonly interface IOMAP3xxx { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
package ti.catalog.arm;
metaonly interface IOMAP3xxx inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IOMAP3xxx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
override config String cpuCore = "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IOMAP3xxx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
override config String cpuCoreRevision = "1.0";
config IOMAP3xxx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
override config Int dataWordSize = 4;
config IOMAP3xxx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
config String deviceHeader;
config IOMAP3xxx.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config IOMAP3xxx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
override config Int minDataUnitSize = 1;
config IOMAP3xxx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
override config Int minProgUnitSize = 1;
config IOMAP3xxx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IOMAP3xxx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IOMAP3xxx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/IOMAP3xxx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:25 GMT


interface ti.catalog.arm.ITMS320DA8xx

metaonly interface ti.catalog.arm.ITMS320DA8xx
index URL
XDCspec summary sourced in ti/catalog/arm/ITMS320DA8xx.xdc
metaonly interface ITMS320DA8xx { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
package ti.catalog.arm;
metaonly interface ITMS320DA8xx inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v5T";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320DA8xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
override config String cpuCore = "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320DA8xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320DA8xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
override config Int dataWordSize = 4;
config ITMS320DA8xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
config String deviceHeader;
config ITMS320DA8xx.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320DA8xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
override config Int minDataUnitSize = 1;
config ITMS320DA8xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
override config Int minProgUnitSize = 1;
config ITMS320DA8xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320DA8xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320DA8xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/ITMS320DA8xx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:25 GMT


module ti.catalog.arm.OMAP2430

metaonly module ti.catalog.arm.OMAP2430
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP2430.xdc
var OMAP2430 = xdc.useModule('ti.catalog.arm.OMAP2430');
per-instance config parameters
    var params = new OMAP2430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v6";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x0000F800,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP2430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP2430.Params;
// Instance config-params object
    params.cpuCore = String "v6";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x0000F800,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP2430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP2430.Params;
...
params.cpuCore = String "v6";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP2430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP2430.Params;
...
params.cpuCoreRevision = String "2.1";
config OMAP2430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP2430.Params;
...
params.dataWordSize = Int 4;
config OMAP2430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP2430.Params;
...
params.deviceHeader = String undefined;
config OMAP2430.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP2430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x0000F800,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP2430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP2430.Params;
...
params.minDataUnitSize = Int 1;
config OMAP2430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP2430.Params;
...
params.minProgUnitSize = Int 1;
config OMAP2430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP2430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP2430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP2430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP2430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP2430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP2431

metaonly module ti.catalog.arm.OMAP2431
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP2431.xdc
var OMAP2431 = xdc.useModule('ti.catalog.arm.OMAP2431');
per-instance config parameters
    var params = new OMAP2431.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v6";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x0000F800,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP2431.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP2431.Params;
// Instance config-params object
    params.cpuCore = String "v6";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x0000F800,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP2431.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP2431.Params;
...
params.cpuCore = String "v6";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP2431.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP2431.Params;
...
params.cpuCoreRevision = String "2.1";
config OMAP2431.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP2431.Params;
...
params.dataWordSize = Int 4;
config OMAP2431.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP2431.Params;
...
params.deviceHeader = String undefined;
config OMAP2431.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP2431.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x0000F800,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP2431.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP2431.Params;
...
params.minDataUnitSize = Int 1;
config OMAP2431.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP2431.Params;
...
params.minProgUnitSize = Int 1;
config OMAP2431.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP2431.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP2431.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP2431.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP2431.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP2431.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP2530

metaonly module ti.catalog.arm.OMAP2530
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP2530.xdc
var OMAP2530 = xdc.useModule('ti.catalog.arm.OMAP2530');
per-instance config parameters
    var params = new OMAP2530.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v6";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x0000F800,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP2530.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP2530.Params;
// Instance config-params object
    params.cpuCore = String "v6";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x0000F800,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP2530.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP2530.Params;
...
params.cpuCore = String "v6";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP2530.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP2530.Params;
...
params.cpuCoreRevision = String "2.1";
config OMAP2530.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP2530.Params;
...
params.dataWordSize = Int 4;
config OMAP2530.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP2530.Params;
...
params.deviceHeader = String undefined;
config OMAP2530.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP2530.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x0000F800,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP2530.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP2530.Params;
...
params.minDataUnitSize = Int 1;
config OMAP2530.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP2530.Params;
...
params.minProgUnitSize = Int 1;
config OMAP2530.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP2530.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP2530.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP2530.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP2530.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP2530.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP2531

metaonly module ti.catalog.arm.OMAP2531
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP2531.xdc
var OMAP2531 = xdc.useModule('ti.catalog.arm.OMAP2531');
per-instance config parameters
    var params = new OMAP2531.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v6";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x0000F800,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP2531.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP2531.Params;
// Instance config-params object
    params.cpuCore = String "v6";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x0000F800,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP2531.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP2531.Params;
...
params.cpuCore = String "v6";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP2531.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP2531.Params;
...
params.cpuCoreRevision = String "2.1";
config OMAP2531.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP2531.Params;
...
params.dataWordSize = Int 4;
config OMAP2531.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP2531.Params;
...
params.deviceHeader = String undefined;
config OMAP2531.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP2531.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x0000F800,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP2531.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP2531.Params;
...
params.minDataUnitSize = Int 1;
config OMAP2531.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP2531.Params;
...
params.minProgUnitSize = Int 1;
config OMAP2531.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP2531.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP2531.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP2531.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP2531.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP2531.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3403

metaonly module ti.catalog.arm.OMAP3403
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3403.xdc
var OMAP3403 = xdc.useModule('ti.catalog.arm.OMAP3403');
per-instance config parameters
    var params = new OMAP3403.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3403.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3403.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3403.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3403.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3403.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3403.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3403.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3403.Params;
...
params.dataWordSize = Int 4;
config OMAP3403.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3403.Params;
...
params.deviceHeader = String undefined;
config OMAP3403.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3403.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3403.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3403.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3403.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3403.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3403.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3403.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3403.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3403.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3403.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3403.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3405

metaonly module ti.catalog.arm.OMAP3405
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3405.xdc
var OMAP3405 = xdc.useModule('ti.catalog.arm.OMAP3405');
per-instance config parameters
    var params = new OMAP3405.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3405.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3405.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3405.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3405.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3405.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3405.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3405.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3405.Params;
...
params.dataWordSize = Int 4;
config OMAP3405.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3405.Params;
...
params.deviceHeader = String undefined;
config OMAP3405.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3405.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3405.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3405.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3405.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3405.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3405.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3405.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3405.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3405.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3405.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3405.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3425

metaonly module ti.catalog.arm.OMAP3425
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3425.xdc
var OMAP3425 = xdc.useModule('ti.catalog.arm.OMAP3425');
per-instance config parameters
    var params = new OMAP3425.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3425.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3425.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3425.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3425.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3425.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3425.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3425.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.dataWordSize = Int 4;
config OMAP3425.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3425.Params;
...
params.deviceHeader = String undefined;
config OMAP3425.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3425.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3425.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3425.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3425.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3425.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3425.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3425.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3425.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3425.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3503

metaonly module ti.catalog.arm.OMAP3503
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3503.xdc
var OMAP3503 = xdc.useModule('ti.catalog.arm.OMAP3503');
per-instance config parameters
    var params = new OMAP3503.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3503.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3503.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3503.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3503.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3503.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3503.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3503.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3503.Params;
...
params.dataWordSize = Int 4;
config OMAP3503.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3503.Params;
...
params.deviceHeader = String undefined;
config OMAP3503.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3503.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3503.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3503.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3503.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3503.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3503.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3503.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3503.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3503.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3503.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3503.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3505

metaonly module ti.catalog.arm.OMAP3505
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3505.xdc
var OMAP3505 = xdc.useModule('ti.catalog.arm.OMAP3505');
per-instance config parameters
    var params = new OMAP3505.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3505.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3505.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3505.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3505.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3505.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3505.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3505.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3505.Params;
...
params.dataWordSize = Int 4;
config OMAP3505.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3505.Params;
...
params.deviceHeader = String undefined;
config OMAP3505.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3505.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3505.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3505.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3505.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3505.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3505.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3505.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3505.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3505.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3505.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3505.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3515

metaonly module ti.catalog.arm.OMAP3515
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3515.xdc
var OMAP3515 = xdc.useModule('ti.catalog.arm.OMAP3515');
per-instance config parameters
    var params = new OMAP3515.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3515.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3515.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3515.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3515.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3515.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3515.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3515.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3515.Params;
...
params.dataWordSize = Int 4;
config OMAP3515.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3515.Params;
...
params.deviceHeader = String undefined;
config OMAP3515.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3515.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3515.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3515.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3515.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3515.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3515.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3515.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3515.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3515.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3515.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3515.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3517

metaonly module ti.catalog.arm.OMAP3517
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3517.xdc
var OMAP3517 = xdc.useModule('ti.catalog.arm.OMAP3517');
per-instance config parameters
    var params = new OMAP3517.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3517.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3517.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3517.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3517.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3517.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3517.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3517.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3517.Params;
...
params.dataWordSize = Int 4;
config OMAP3517.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3517.Params;
...
params.deviceHeader = String undefined;
config OMAP3517.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3517.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3517.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3517.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3517.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3517.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3517.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3517.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3517.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3517.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3517.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3517.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3525

metaonly module ti.catalog.arm.OMAP3525
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3525.xdc
var OMAP3525 = xdc.useModule('ti.catalog.arm.OMAP3525');
per-instance config parameters
    var params = new OMAP3525.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3525.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3525.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3525.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3525.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3525.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3525.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3525.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.dataWordSize = Int 4;
config OMAP3525.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3525.Params;
...
params.deviceHeader = String undefined;
config OMAP3525.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3525.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3525.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3525.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3525.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3525.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3525.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3525.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3525.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3525.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAP3530

metaonly module ti.catalog.arm.OMAP3530
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAP3530.xdc
var OMAP3530 = xdc.useModule('ti.catalog.arm.OMAP3530');
per-instance config parameters
    var params = new OMAP3530.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3530.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3530.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3530.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3530.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3530.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3530.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3530.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.dataWordSize = Int 4;
config OMAP3530.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3530.Params;
...
params.deviceHeader = String undefined;
config OMAP3530.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3530.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3530.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3530.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3530.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3530.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3530.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3530.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3530.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3530.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAPL108

metaonly module ti.catalog.arm.OMAPL108
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAPL108.xdc
var OMAPL108 = xdc.useModule('ti.catalog.arm.OMAPL108');
per-instance config parameters
    var params = new OMAPL108.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAPL108.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAPL108.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAPL108.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAPL108.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAPL108.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAPL108.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAPL108.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAPL108.Params;
...
params.dataWordSize = Int 4;
config OMAPL108.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAPL108.Params;
...
params.deviceHeader = String undefined;
config OMAPL108.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAPL108.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAPL108.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAPL108.Params;
...
params.minDataUnitSize = Int 1;
config OMAPL108.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAPL108.Params;
...
params.minProgUnitSize = Int 1;
config OMAPL108.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAPL108.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAPL108.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAPL108.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAPL108.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAPL108.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAPL118

metaonly module ti.catalog.arm.OMAPL118
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAPL118.xdc
var OMAPL118 = xdc.useModule('ti.catalog.arm.OMAPL118');
per-instance config parameters
    var params = new OMAPL118.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAPL118.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAPL118.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAPL118.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAPL118.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAPL118.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAPL118.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAPL118.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAPL118.Params;
...
params.dataWordSize = Int 4;
config OMAPL118.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAPL118.Params;
...
params.deviceHeader = String undefined;
config OMAPL118.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAPL118.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAPL118.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAPL118.Params;
...
params.minDataUnitSize = Int 1;
config OMAPL118.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAPL118.Params;
...
params.minProgUnitSize = Int 1;
config OMAPL118.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAPL118.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAPL118.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAPL118.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAPL118.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAPL118.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAPL137

metaonly module ti.catalog.arm.OMAPL137
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAPL137.xdc
var OMAPL137 = xdc.useModule('ti.catalog.arm.OMAPL137');
per-instance config parameters
    var params = new OMAPL137.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAPL137.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAPL137.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAPL137.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAPL137.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAPL137.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAPL137.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAPL137.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAPL137.Params;
...
params.dataWordSize = Int 4;
config OMAPL137.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAPL137.Params;
...
params.deviceHeader = String undefined;
config OMAPL137.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAPL137.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAPL137.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAPL137.Params;
...
params.minDataUnitSize = Int 1;
config OMAPL137.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAPL137.Params;
...
params.minProgUnitSize = Int 1;
config OMAPL137.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAPL137.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAPL137.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAPL137.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAPL137.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAPL137.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.OMAPL138

metaonly module ti.catalog.arm.OMAPL138
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/OMAPL138.xdc
var OMAPL138 = xdc.useModule('ti.catalog.arm.OMAPL138');
per-instance config parameters
    var params = new OMAPL138.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAPL138.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAPL138.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAPL138.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAPL138.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAPL138.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAPL138.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAPL138.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAPL138.Params;
...
params.dataWordSize = Int 4;
config OMAPL138.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAPL138.Params;
...
params.deviceHeader = String undefined;
config OMAPL138.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAPL138.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAPL138.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAPL138.Params;
...
params.minDataUnitSize = Int 1;
config OMAPL138.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAPL138.Params;
...
params.minProgUnitSize = Int 1;
config OMAPL138.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAPL138.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAPL138.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAPL138.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAPL138.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAPL138.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.TMS320C1030

metaonly module ti.catalog.arm.TMS320C1030
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320C1030.xdc
var TMS320C1030 = xdc.useModule('ti.catalog.arm.TMS320C1030');
per-instance config parameters
    var params = new TMS320C1030.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C1030.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C1030.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C1030.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C1030.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C1030.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C1030.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C1030.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C1030.Params;
...
params.dataWordSize = Int 4;
config TMS320C1030.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C1030.Params;
...
params.deviceHeader = String undefined;
config TMS320C1030.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C1030.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config TMS320C1030.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C1030.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C1030.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C1030.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C1030.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C1030.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C1030.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C1030.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C1030.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C1030.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.TMS320C3430

metaonly module ti.catalog.arm.TMS320C3430
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320C3430.xdc
var TMS320C3430 = xdc.useModule('ti.catalog.arm.TMS320C3430');
per-instance config parameters
    var params = new TMS320C3430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C3430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C3430.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C3430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C3430.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C3430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C3430.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C3430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.dataWordSize = Int 4;
config TMS320C3430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C3430.Params;
...
params.deviceHeader = String undefined;
config TMS320C3430.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C3430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C3430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C3430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C3430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C3430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C3430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C3430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C3430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C3430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.TMS320C5912

metaonly module ti.catalog.arm.TMS320C5912
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320C5912.xdc
var TMS320C5912 = xdc.useModule('ti.catalog.arm.TMS320C5912');
per-instance config parameters
    var params = new TMS320C5912.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C5912.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C5912.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C5912.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C5912.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C5912.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C5912.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C5912.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C5912.Params;
...
params.dataWordSize = Int 4;
config TMS320C5912.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C5912.Params;
...
params.deviceHeader = String undefined;
config TMS320C5912.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C5912.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config TMS320C5912.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C5912.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C5912.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C5912.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C5912.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C5912.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C5912.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C5912.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C5912.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C5912.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:26 GMT


module ti.catalog.arm.TMS320CDM510

metaonly module ti.catalog.arm.TMS320CDM510
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320CDM510.xdc
var TMS320CDM510 = xdc.useModule('ti.catalog.arm.TMS320CDM510');
per-instance config parameters
    var params = new TMS320CDM510.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal ARM Instruction RAM",
                    name: "IRAM",
                    base: 0x00000004,
                    len: 0x00007ffc,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "DRAM",
                {
                    comment: "Internal ARM Data RAM",
                    name: "DRAM",
                    base: 0x00010004,
                    len: 0x00007ffc,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM510.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM510.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "Internal ARM Instruction RAM",
                name: "IRAM",
                base: 0x00000004,
                len: 0x00007ffc,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "DRAM",
            {
                comment: "Internal ARM Data RAM",
                name: "DRAM",
                base: 0x00010004,
                len: 0x00007ffc,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM510.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM510.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM510.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM510.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM510.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM510.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM510.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM510.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM510.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320CDM510.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal ARM Instruction RAM",
            name: "IRAM",
            base: 0x00000004,
            len: 0x00007ffc,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "DRAM",
        {
            comment: "Internal ARM Data RAM",
            name: "DRAM",
            base: 0x00010004,
            len: 0x00007ffc,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM510.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM510.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM510.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM510.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM510.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM510.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM510.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM510.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM510.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM510.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320CDM6446

metaonly module ti.catalog.arm.TMS320CDM6446
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320CDM6446.xdc
var TMS320CDM6446 = xdc.useModule('ti.catalog.arm.TMS320CDM6446');
per-instance config parameters
    var params = new TMS320CDM6446.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM0",
                {
                    comment: "Internal ARM Instruction RAM0",
                    name: "IRAM0",
                    base: 0x00000000,
                    len: 0x00002000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "IRAM1",
                {
                    comment: "Internal ARM Instruction RAM1",
                    name: "IRAM1",
                    base: 0x00002000,
                    len: 0x00002000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "DRAM0",
                {
                    comment: "Internal ARM Data RAM0",
                    name: "DRAM0",
                    base: 0x00008000,
                    len: 0x00002000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "DRAM1",
                {
                    comment: "Internal ARM Data RAM1",
                    name: "DRAM1",
                    base: 0x0000A000,
                    len: 0x00002000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6446.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6446.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM0",
            {
                comment: "Internal ARM Instruction RAM0",
                name: "IRAM0",
                base: 0x00000000,
                len: 0x00002000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "IRAM1",
            {
                comment: "Internal ARM Instruction RAM1",
                name: "IRAM1",
                base: 0x00002000,
                len: 0x00002000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "DRAM0",
            {
                comment: "Internal ARM Data RAM0",
                name: "DRAM0",
                base: 0x00008000,
                len: 0x00002000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "DRAM1",
            {
                comment: "Internal ARM Data RAM1",
                name: "DRAM1",
                base: 0x0000A000,
                len: 0x00002000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6446.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6446.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6446.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6446.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6446.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM0",
        {
            comment: "Internal ARM Instruction RAM0",
            name: "IRAM0",
            base: 0x00000000,
            len: 0x00002000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "IRAM1",
        {
            comment: "Internal ARM Instruction RAM1",
            name: "IRAM1",
            base: 0x00002000,
            len: 0x00002000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "DRAM0",
        {
            comment: "Internal ARM Data RAM0",
            name: "DRAM0",
            base: 0x00008000,
            len: 0x00002000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "DRAM1",
        {
            comment: "Internal ARM Data RAM1",
            name: "DRAM1",
            base: 0x0000A000,
            len: 0x00002000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6446.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6446.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6446.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6446.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6446.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6446.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6446.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320CDM6467

metaonly module ti.catalog.arm.TMS320CDM6467
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320CDM6467.xdc
var TMS320CDM6467 = xdc.useModule('ti.catalog.arm.TMS320CDM6467');
per-instance config parameters
    var params = new TMS320CDM6467.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM0",
                {
                    comment: "Internal ARM Instruction RAM0",
                    name: "IRAM0",
                    base: 0x00000000,
                    len: 0x00002000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "IRAM1",
                {
                    comment: "Internal ARM Instruction RAM1",
                    name: "IRAM1",
                    base: 0x00002000,
                    len: 0x00002000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "DRAM0",
                {
                    comment: "Internal ARM Data RAM0",
                    name: "DRAM0",
                    base: 0x00008000,
                    len: 0x00002000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "DRAM1",
                {
                    comment: "Internal ARM Data RAM1",
                    name: "DRAM1",
                    base: 0x0000A000,
                    len: 0x00002000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6467.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6467.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM0",
            {
                comment: "Internal ARM Instruction RAM0",
                name: "IRAM0",
                base: 0x00000000,
                len: 0x00002000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "IRAM1",
            {
                comment: "Internal ARM Instruction RAM1",
                name: "IRAM1",
                base: 0x00002000,
                len: 0x00002000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "DRAM0",
            {
                comment: "Internal ARM Data RAM0",
                name: "DRAM0",
                base: 0x00008000,
                len: 0x00002000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "DRAM1",
            {
                comment: "Internal ARM Data RAM1",
                name: "DRAM1",
                base: 0x0000A000,
                len: 0x00002000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6467.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6467.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6467.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6467.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6467.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM0",
        {
            comment: "Internal ARM Instruction RAM0",
            name: "IRAM0",
            base: 0x00000000,
            len: 0x00002000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "IRAM1",
        {
            comment: "Internal ARM Instruction RAM1",
            name: "IRAM1",
            base: 0x00002000,
            len: 0x00002000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "DRAM0",
        {
            comment: "Internal ARM Data RAM0",
            name: "DRAM0",
            base: 0x00008000,
            len: 0x00002000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "DRAM1",
        {
            comment: "Internal ARM Data RAM1",
            name: "DRAM1",
            base: 0x0000A000,
            len: 0x00002000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6467.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6467.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6467.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6467.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6467.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6467.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6467.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320CDM730

metaonly module ti.catalog.arm.TMS320CDM730
index URL

The TMS320CDM730 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/TMS320CDM730.xdc
var TMS320CDM730 = xdc.useModule('ti.catalog.arm.TMS320CDM730');
per-instance config parameters
    var params = new TMS320CDM730.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_ROM",
                {
                    name: "L2_ROM",
                    base: 0x00000000,
                    len: 0x00004000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20000000,
                    len: 0x00040000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM730.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM730.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_ROM",
            {
                name: "L2_ROM",
                base: 0x00000000,
                len: 0x00004000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20000000,
                len: 0x00040000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM730.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM730.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM730.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM730.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM730.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM730.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM730.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM730.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM730.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320CDM730.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_ROM",
        {
            name: "L2_ROM",
            base: 0x00000000,
            len: 0x00004000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20000000,
            len: 0x00040000
        }
    ]
];
config TMS320CDM730.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM730.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM730.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM730.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM730.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM730.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM730.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM730.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM730.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM730.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320CDM740

metaonly module ti.catalog.arm.TMS320CDM740
index URL

The TMS320CDM740 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/TMS320CDM740.xdc
var TMS320CDM740 = xdc.useModule('ti.catalog.arm.TMS320CDM740');
per-instance config parameters
    var params = new TMS320CDM740.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_ROM",
                {
                    name: "L2_ROM",
                    base: 0x00000000,
                    len: 0x00004000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20000000,
                    len: 0x00040000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM740.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM740.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_ROM",
            {
                name: "L2_ROM",
                base: 0x00000000,
                len: 0x00004000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20000000,
                len: 0x00040000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM740.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM740.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM740.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM740.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM740.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM740.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM740.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM740.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM740.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320CDM740.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_ROM",
        {
            name: "L2_ROM",
            base: 0x00000000,
            len: 0x00004000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20000000,
            len: 0x00040000
        }
    ]
];
config TMS320CDM740.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM740.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM740.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM740.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM740.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM740.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM740.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM740.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM740.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM740.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320DA828

metaonly module ti.catalog.arm.TMS320DA828
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320DA828.xdc
var TMS320DA828 = xdc.useModule('ti.catalog.arm.TMS320DA828');
per-instance config parameters
    var params = new TMS320DA828.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA828.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA828.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA828.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA828.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA828.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA828.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA828.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA828.Params;
...
params.dataWordSize = Int 4;
config TMS320DA828.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA828.Params;
...
params.deviceHeader = String undefined;
config TMS320DA828.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DA828.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA828.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA828.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA828.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA828.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA828.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA828.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA828.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA828.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA828.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA828.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320DA830

metaonly module ti.catalog.arm.TMS320DA830
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320DA830.xdc
var TMS320DA830 = xdc.useModule('ti.catalog.arm.TMS320DA830');
per-instance config parameters
    var params = new TMS320DA830.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA830.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA830.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA830.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA830.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA830.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA830.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA830.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA830.Params;
...
params.dataWordSize = Int 4;
config TMS320DA830.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA830.Params;
...
params.deviceHeader = String undefined;
config TMS320DA830.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DA830.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA830.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA830.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA830.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA830.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA830.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA830.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA830.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA830.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA830.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA830.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320DA840

metaonly module ti.catalog.arm.TMS320DA840
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320DA840.xdc
var TMS320DA840 = xdc.useModule('ti.catalog.arm.TMS320DA840');
per-instance config parameters
    var params = new TMS320DA840.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA840.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA840.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA840.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA840.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA840.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA840.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA840.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA840.Params;
...
params.dataWordSize = Int 4;
config TMS320DA840.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA840.Params;
...
params.deviceHeader = String undefined;
config TMS320DA840.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DA840.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA840.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA840.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA840.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA840.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA840.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA840.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA840.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA840.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA840.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA840.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320DA850

metaonly module ti.catalog.arm.TMS320DA850
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320DA850.xdc
var TMS320DA850 = xdc.useModule('ti.catalog.arm.TMS320DA850');
per-instance config parameters
    var params = new TMS320DA850.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v5T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "8KB ARM local RAM",
                    name: "IRAM",
                    base: 0xFFFF0000,
                    len: 0x00002000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA850.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA850.Params;
// Instance config-params object
    params.cpuCore = String "v5T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM",
            {
                comment: "8KB ARM local RAM",
                name: "IRAM",
                base: 0xFFFF0000,
                len: 0x00002000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA850.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA850.Params;
...
params.cpuCore = String "v5T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA850.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA850.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA850.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA850.Params;
...
params.dataWordSize = Int 4;
config TMS320DA850.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA850.Params;
...
params.deviceHeader = String undefined;
config TMS320DA850.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DA850.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "8KB ARM local RAM",
            name: "IRAM",
            base: 0xFFFF0000,
            len: 0x00002000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA850.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA850.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA850.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA850.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA850.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA850.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA850.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA850.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA850.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA850.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320DM355

metaonly module ti.catalog.arm.TMS320DM355
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320DM355.xdc
var TMS320DM355 = xdc.useModule('ti.catalog.arm.TMS320DM355');
per-instance config parameters
    var params = new TMS320DM355.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "IRAM0",
                {
                    comment: "Internal ARM Instruction RAM0",
                    name: "IRAM0",
                    base: 0x00000000,
                    len: 0x00004000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "DRAM1",
                {
                    comment: "Internal ARM Data RAM1",
                    name: "DRAM1",
                    base: 0x00014000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM355.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM355.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "IRAM0",
            {
                comment: "Internal ARM Instruction RAM0",
                name: "IRAM0",
                base: 0x00000000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "DRAM1",
            {
                comment: "Internal ARM Data RAM1",
                name: "DRAM1",
                base: 0x00014000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM355.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM355.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM355.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM355.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM355.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM355.Params;
...
params.dataWordSize = Int 4;
config TMS320DM355.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM355.Params;
...
params.deviceHeader = String undefined;
config TMS320DM355.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DM355.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM0",
        {
            comment: "Internal ARM Instruction RAM0",
            name: "IRAM0",
            base: 0x00000000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "DRAM1",
        {
            comment: "Internal ARM Data RAM1",
            name: "DRAM1",
            base: 0x00014000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320DM355.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM355.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM355.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM355.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM355.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM355.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM355.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM355.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM355.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM355.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320DM357

metaonly module ti.catalog.arm.TMS320DM357
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320DM357.xdc
var TMS320DM357 = xdc.useModule('ti.catalog.arm.TMS320DM357');
per-instance config parameters
    var params = new TMS320DM357.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] TMS320DM355.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM357.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM357.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320DM355.memMap;
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM357.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM357.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM357.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM357.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM357.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM357.Params;
...
params.dataWordSize = Int 4;
config TMS320DM357.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM357.Params;
...
params.deviceHeader = String undefined;
config TMS320DM357.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DM357.Params;
...
params.memMap = IPlatform.Memory[string] TMS320DM355.memMap;
config TMS320DM357.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM357.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM357.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM357.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM357.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM357.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM357.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM357.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM357.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM357.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS320DM365

metaonly module ti.catalog.arm.TMS320DM365
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TMS320DM365.xdc
var TMS320DM365 = xdc.useModule('ti.catalog.arm.TMS320DM365');
per-instance config parameters
    var params = new TMS320DM365.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] TMS320DM355.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM365.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM365.Params;
// Instance config-params object
    params.cpuCore = String "Arm9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320DM355.memMap;
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM365.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM365.Params;
...
params.cpuCore = String "Arm9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM365.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM365.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM365.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM365.Params;
...
params.dataWordSize = Int 4;
config TMS320DM365.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM365.Params;
...
params.deviceHeader = String undefined;
config TMS320DM365.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DM365.Params;
...
params.memMap = IPlatform.Memory[string] TMS320DM355.memMap;
config TMS320DM365.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM365.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM365.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM365.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM365.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM365.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM365.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM365.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM365.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM365.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS470R10

metaonly module ti.catalog.arm.TMS470R10
index URL

The C470 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device. [ more ... ]
Configuration settings sourced in ti/catalog/arm/TMS470R10.xdc
var TMS470R10 = xdc.useModule('ti.catalog.arm.TMS470R10');
per-instance config parameters
    var params = new TMS470R10.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "470";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "P_MEM",
                {
                    comment: "Program Memory (ROM)",
                    name: "P_MEM",
                    base: 0x00000000,
                    len: 0x00030000,
                    space: "code"
                }
            ],
            [
                "D_MEM",
                {
                    comment: "Data Memory (RAM)",
                    name: "D_MEM",
                    base: 0x00030000,
                    len: 0x00050000,
                    space: "data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS470R10.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
DETAILS
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Warning: The data for this module comes from the linker command file shipped with the TI 470 tools and does NOT come from any published data sheet.
Instance Config Parameters
index URL

Configuration settings
var params = new TMS470R10.Params;
// Instance config-params object
    params.cpuCore = String "470";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "P_MEM",
            {
                comment: "Program Memory (ROM)",
                name: "P_MEM",
                base: 0x00000000,
                len: 0x00030000,
                space: "code"
            }
        ],
        [
            "D_MEM",
            {
                comment: "Data Memory (RAM)",
                name: "D_MEM",
                base: 0x00030000,
                len: 0x00050000,
                space: "data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS470R10.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS470R10.Params;
...
params.cpuCore = String "470";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS470R10.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS470R10.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS470R10.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS470R10.Params;
...
params.dataWordSize = Int 4;
config TMS470R10.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS470R10.Params;
...
params.deviceHeader = String undefined;
config TMS470R10.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS470R10.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "P_MEM",
        {
            comment: "Program Memory (ROM)",
            name: "P_MEM",
            base: 0x00000000,
            len: 0x00030000,
            space: "code"
        }
    ],
    [
        "D_MEM",
        {
            comment: "Data Memory (RAM)",
            name: "D_MEM",
            base: 0x00030000,
            len: 0x00050000,
            space: "data"
        }
    ]
];
config TMS470R10.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS470R10.Params;
...
params.minDataUnitSize = Int 1;
config TMS470R10.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS470R10.Params;
...
params.minProgUnitSize = Int 1;
config TMS470R10.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS470R10.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS470R10.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS470R10.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS470R10.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS470R10.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS570LS20216

metaonly module ti.catalog.arm.TMS570LS20216
index URL

The C470 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device. [ more ... ]
Configuration settings sourced in ti/catalog/arm/TMS570LS20216.xdc
var TMS570LS20216 = xdc.useModule('ti.catalog.arm.TMS570LS20216');
per-instance config parameters
    var params = new TMS570LS20216.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "R4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "LO_FLASH",
                {
                    name: "FLASH",
                    base: 0x00000000,
                    len: 0x00200000,
                    space: "code",
                    access: "RX"
                }
            ],
            [
                "HI_IRAM",
                {
                    name: "IRAM",
                    base: 0x08000000,
                    len: 0x00028000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "HI_FLASH",
                {
                    name: "FLASH",
                    base: 0x20000000,
                    len: 0x00080000,
                    space: "code",
                    access: "RX"
                }
            ],
            [
                "LO_IRAM",
                {
                    name: "IRAM",
                    base: 0x00000000,
                    len: 0x00028000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS570LS20216.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
DETAILS
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Warning: The data for this module comes from the linker command file shipped with the TI 470 tools and does NOT come from any published data sheet.
Instance Config Parameters
index URL

Configuration settings
var params = new TMS570LS20216.Params;
// Instance config-params object
    params.cpuCore = String "R4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "LO_FLASH",
            {
                name: "FLASH",
                base: 0x00000000,
                len: 0x00200000,
                space: "code",
                access: "RX"
            }
        ],
        [
            "HI_IRAM",
            {
                name: "IRAM",
                base: 0x08000000,
                len: 0x00028000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "HI_FLASH",
            {
                name: "FLASH",
                base: 0x20000000,
                len: 0x00080000,
                space: "code",
                access: "RX"
            }
        ],
        [
            "LO_IRAM",
            {
                name: "IRAM",
                base: 0x00000000,
                len: 0x00028000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS570LS20216.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS570LS20216.Params;
...
params.cpuCore = String "R4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS570LS20216.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS570LS20216.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS570LS20216.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS570LS20216.Params;
...
params.dataWordSize = Int 4;
config TMS570LS20216.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS570LS20216.Params;
...
params.deviceHeader = String undefined;
config TMS570LS20216.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS570LS20216.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "LO_FLASH",
        {
            name: "FLASH",
            base: 0x00000000,
            len: 0x00200000,
            space: "code",
            access: "RX"
        }
    ],
    [
        "HI_IRAM",
        {
            name: "IRAM",
            base: 0x08000000,
            len: 0x00028000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "HI_FLASH",
        {
            name: "FLASH",
            base: 0x20000000,
            len: 0x00080000,
            space: "code",
            access: "RX"
        }
    ],
    [
        "LO_IRAM",
        {
            name: "IRAM",
            base: 0x00000000,
            len: 0x00028000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS570LS20216.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS570LS20216.Params;
...
params.minDataUnitSize = Int 1;
config TMS570LS20216.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS570LS20216.Params;
...
params.minProgUnitSize = Int 1;
config TMS570LS20216.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS570LS20216.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS570LS20216.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS570LS20216.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS570LS20216.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS570LS20216.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TMS570PSF762

metaonly module ti.catalog.arm.TMS570PSF762
index URL

The C470 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device. [ more ... ]
Configuration settings sourced in ti/catalog/arm/TMS570PSF762.xdc
var TMS570PSF762 = xdc.useModule('ti.catalog.arm.TMS570PSF762');
per-instance config parameters
    var params = new TMS570PSF762.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "R4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "LO_FLASH",
                {
                    name: "FLASH",
                    base: 0x00000000,
                    len: 0x00080000,
                    space: "code",
                    access: "RX"
                }
            ],
            [
                "HI_IRAM",
                {
                    name: "IRAM",
                    base: 0x08000000,
                    len: 0x0000A000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "HI_FLASH",
                {
                    name: "FLASH",
                    base: 0x20000000,
                    len: 0x00080000,
                    space: "code",
                    access: "RX"
                }
            ],
            [
                "LO_IRAM",
                {
                    name: "IRAM",
                    base: 0x00000000,
                    len: 0x0000A000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS570PSF762.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
DETAILS
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Warning: The data for this module comes from the linker command file shipped with the TI 470 tools and does NOT come from any published data sheet.
Instance Config Parameters
index URL

Configuration settings
var params = new TMS570PSF762.Params;
// Instance config-params object
    params.cpuCore = String "R4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "LO_FLASH",
            {
                name: "FLASH",
                base: 0x00000000,
                len: 0x00080000,
                space: "code",
                access: "RX"
            }
        ],
        [
            "HI_IRAM",
            {
                name: "IRAM",
                base: 0x08000000,
                len: 0x0000A000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "HI_FLASH",
            {
                name: "FLASH",
                base: 0x20000000,
                len: 0x00080000,
                space: "code",
                access: "RX"
            }
        ],
        [
            "LO_IRAM",
            {
                name: "IRAM",
                base: 0x00000000,
                len: 0x0000A000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS570PSF762.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS570PSF762.Params;
...
params.cpuCore = String "R4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS570PSF762.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS570PSF762.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS570PSF762.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS570PSF762.Params;
...
params.dataWordSize = Int 4;
config TMS570PSF762.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS570PSF762.Params;
...
params.deviceHeader = String undefined;
config TMS570PSF762.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS570PSF762.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "LO_FLASH",
        {
            name: "FLASH",
            base: 0x00000000,
            len: 0x00080000,
            space: "code",
            access: "RX"
        }
    ],
    [
        "HI_IRAM",
        {
            name: "IRAM",
            base: 0x08000000,
            len: 0x0000A000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "HI_FLASH",
        {
            name: "FLASH",
            base: 0x20000000,
            len: 0x00080000,
            space: "code",
            access: "RX"
        }
    ],
    [
        "LO_IRAM",
        {
            name: "IRAM",
            base: 0x00000000,
            len: 0x0000A000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS570PSF762.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS570PSF762.Params;
...
params.minDataUnitSize = Int 1;
config TMS570PSF762.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS570PSF762.Params;
...
params.minProgUnitSize = Int 1;
config TMS570PSF762.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS570PSF762.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS570PSF762.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS570PSF762.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS570PSF762.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS570PSF762.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


module ti.catalog.arm.TNETV107X

metaonly module ti.catalog.arm.TNETV107X
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/TNETV107X.xdc
var TNETV107X = xdc.useModule('ti.catalog.arm.TNETV107X');
per-instance config parameters
    var params = new TNETV107X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "Arm11";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x20000000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TNETV107X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TNETV107X.Params;
// Instance config-params object
    params.cpuCore = String "Arm11";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x20000000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TNETV107X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TNETV107X.Params;
...
params.cpuCore = String "Arm11";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TNETV107X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TNETV107X.Params;
...
params.cpuCoreRevision = String "1.0";
config TNETV107X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TNETV107X.Params;
...
params.dataWordSize = Int 4;
config TNETV107X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TNETV107X.Params;
...
params.deviceHeader = String undefined;
config TNETV107X.Params.memMap // instance
index URL
Configuration settings
var params = new TNETV107X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x20000000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TNETV107X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TNETV107X.Params;
...
params.minDataUnitSize = Int 1;
config TNETV107X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TNETV107X.Params;
...
params.minProgUnitSize = Int 1;
config TNETV107X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TNETV107X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TNETV107X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TNETV107X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TNETV107X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TNETV107X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:27 GMT


package ti.catalog.arm.cortexa15
index URL

Package of devices for the arm Cortex A15 family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexa15/package.xdc
requires xdc.platform;
requires ti.catalog.peripherals.hdvicp2;
package ti.catalog.arm.cortexa15 [1, 0, 0] {
    interface ITCI663X;
    module C66AK2E05;
    module DRA7XX;
    module OMAP5430;
    module TCI6630K2L;
    module TCI6636K2H;
    module TCI6638K2K;
    module TCI66AK2G02;
    module Vayu;
}
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.C66AK2E05

metaonly module ti.catalog.arm.cortexa15.C66AK2E05
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/C66AK2E05.xdc
var C66AK2E05 = xdc.useModule('ti.catalog.arm.cortexa15.C66AK2E05');
per-instance config parameters
    var params = new C66AK2E05.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = C66AK2E05.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new C66AK2E05.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config C66AK2E05.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new C66AK2E05.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config C66AK2E05.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new C66AK2E05.Params;
...
params.cpuCoreRevision = String "1.0";
config C66AK2E05.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new C66AK2E05.Params;
...
params.dataWordSize = Int 4;
config C66AK2E05.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new C66AK2E05.Params;
...
params.deviceHeader = String undefined;
config C66AK2E05.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new C66AK2E05.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config C66AK2E05.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new C66AK2E05.Params;
...
params.minDataUnitSize = Int 1;
config C66AK2E05.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new C66AK2E05.Params;
...
params.minProgUnitSize = Int 1;
config C66AK2E05.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new C66AK2E05.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new C66AK2E05.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = C66AK2E05.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
C66AK2E05.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
C66AK2E05.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.DRA7XX

metaonly module ti.catalog.arm.cortexa15.DRA7XX
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/DRA7XX.xdc
var DRA7XX = xdc.useModule('ti.catalog.arm.cortexa15.DRA7XX');
per-instance config parameters
    var params = new DRA7XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_RAM1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                    name: "OCMC_RAM1",
                    base: 0x40300000,
                    len: 0x00080000
                }
            ],
            [
                "OCMC_RAM2",
                {
                    comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                    name: "OCMC_RAM2",
                    base: 0x40400000,
                    len: 0x00100000
                }
            ],
            [
                "OCMC_RAM3",
                {
                    comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                    name: "OCMC_RAM3",
                    base: 0x40500000,
                    len: 0x00100000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = DRA7XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new DRA7XX.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_RAM1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                name: "OCMC_RAM1",
                base: 0x40300000,
                len: 0x00080000
            }
        ],
        [
            "OCMC_RAM2",
            {
                comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                name: "OCMC_RAM2",
                base: 0x40400000,
                len: 0x00100000
            }
        ],
        [
            "OCMC_RAM3",
            {
                comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                name: "OCMC_RAM3",
                base: 0x40500000,
                len: 0x00100000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config DRA7XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config DRA7XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCoreRevision = String "1.0";
config DRA7XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.dataWordSize = Int 4;
config DRA7XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new DRA7XX.Params;
...
params.deviceHeader = String undefined;
config DRA7XX.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new DRA7XX.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config DRA7XX.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new DRA7XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_RAM1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
            name: "OCMC_RAM1",
            base: 0x40300000,
            len: 0x00080000
        }
    ],
    [
        "OCMC_RAM2",
        {
            comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
            name: "OCMC_RAM2",
            base: 0x40400000,
            len: 0x00100000
        }
    ],
    [
        "OCMC_RAM3",
        {
            comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
            name: "OCMC_RAM3",
            base: 0x40500000,
            len: 0x00100000
        }
    ]
];
config DRA7XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minDataUnitSize = Int 1;
config DRA7XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minProgUnitSize = Int 1;
config DRA7XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new DRA7XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new DRA7XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DRA7XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
DRA7XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
DRA7XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


interface ti.catalog.arm.cortexa15.ITCI663X

metaonly interface ti.catalog.arm.cortexa15.ITCI663X
index URL
XDCspec summary sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
metaonly interface ITCI663X { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
package ti.catalog.arm.cortexa15;
metaonly interface ITCI663X inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A15";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [ ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITCI663X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
override config String cpuCore = "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITCI663X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
override config String cpuCoreRevision = "1.0";
config ITCI663X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
override config Int dataWordSize = 4;
config ITCI663X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
config String deviceHeader;
config ITCI663X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
config IPlatform.Memory memMap[string] = [ ];
config ITCI663X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
override config Int minDataUnitSize = 1;
config ITCI663X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
override config Int minProgUnitSize = 1;
config ITCI663X.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITCI663X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITCI663X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexa15/ITCI663X.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.OMAP5430

metaonly module ti.catalog.arm.cortexa15.OMAP5430
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/OMAP5430.xdc
var OMAP5430 = xdc.useModule('ti.catalog.arm.cortexa15.OMAP5430');
per-instance config parameters
    var params = new OMAP5430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x00008000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP5430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP5430.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x00008000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP5430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP5430.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP5430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP5430.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP5430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.dataWordSize = Int 4;
config OMAP5430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP5430.Params;
...
params.deviceHeader = String undefined;
config OMAP5430.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new OMAP5430.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config OMAP5430.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP5430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x00008000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP5430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.minDataUnitSize = Int 1;
config OMAP5430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.minProgUnitSize = Int 1;
config OMAP5430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP5430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP5430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP5430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP5430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP5430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.TCI6630K2L

metaonly module ti.catalog.arm.cortexa15.TCI6630K2L
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/TCI6630K2L.xdc
var TCI6630K2L = xdc.useModule('ti.catalog.arm.cortexa15.TCI6630K2L');
per-instance config parameters
    var params = new TCI6630K2L.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TCI6630K2L.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TCI6630K2L.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TCI6630K2L.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TCI6630K2L.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TCI6630K2L.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TCI6630K2L.Params;
...
params.cpuCoreRevision = String "1.0";
config TCI6630K2L.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TCI6630K2L.Params;
...
params.dataWordSize = Int 4;
config TCI6630K2L.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TCI6630K2L.Params;
...
params.deviceHeader = String undefined;
config TCI6630K2L.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TCI6630K2L.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config TCI6630K2L.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TCI6630K2L.Params;
...
params.minDataUnitSize = Int 1;
config TCI6630K2L.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TCI6630K2L.Params;
...
params.minProgUnitSize = Int 1;
config TCI6630K2L.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TCI6630K2L.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TCI6630K2L.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TCI6630K2L.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TCI6630K2L.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TCI6630K2L.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.TCI6636K2H

metaonly module ti.catalog.arm.cortexa15.TCI6636K2H
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/TCI6636K2H.xdc
var TCI6636K2H = xdc.useModule('ti.catalog.arm.cortexa15.TCI6636K2H');
per-instance config parameters
    var params = new TCI6636K2H.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TCI6636K2H.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TCI6636K2H.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TCI6636K2H.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TCI6636K2H.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TCI6636K2H.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TCI6636K2H.Params;
...
params.cpuCoreRevision = String "1.0";
config TCI6636K2H.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TCI6636K2H.Params;
...
params.dataWordSize = Int 4;
config TCI6636K2H.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TCI6636K2H.Params;
...
params.deviceHeader = String undefined;
config TCI6636K2H.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TCI6636K2H.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config TCI6636K2H.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TCI6636K2H.Params;
...
params.minDataUnitSize = Int 1;
config TCI6636K2H.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TCI6636K2H.Params;
...
params.minProgUnitSize = Int 1;
config TCI6636K2H.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TCI6636K2H.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TCI6636K2H.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TCI6636K2H.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TCI6636K2H.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TCI6636K2H.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.TCI6638K2K

metaonly module ti.catalog.arm.cortexa15.TCI6638K2K
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/TCI6638K2K.xdc
var TCI6638K2K = xdc.useModule('ti.catalog.arm.cortexa15.TCI6638K2K');
per-instance config parameters
    var params = new TCI6638K2K.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TCI6638K2K.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TCI6638K2K.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TCI6638K2K.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TCI6638K2K.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TCI6638K2K.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TCI6638K2K.Params;
...
params.cpuCoreRevision = String "1.0";
config TCI6638K2K.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TCI6638K2K.Params;
...
params.dataWordSize = Int 4;
config TCI6638K2K.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TCI6638K2K.Params;
...
params.deviceHeader = String undefined;
config TCI6638K2K.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TCI6638K2K.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config TCI6638K2K.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TCI6638K2K.Params;
...
params.minDataUnitSize = Int 1;
config TCI6638K2K.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TCI6638K2K.Params;
...
params.minProgUnitSize = Int 1;
config TCI6638K2K.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TCI6638K2K.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TCI6638K2K.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TCI6638K2K.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TCI6638K2K.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TCI6638K2K.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.TCI66AK2G02

metaonly module ti.catalog.arm.cortexa15.TCI66AK2G02
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/TCI66AK2G02.xdc
var TCI66AK2G02 = xdc.useModule('ti.catalog.arm.cortexa15.TCI66AK2G02');
per-instance config parameters
    var params = new TCI66AK2G02.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TCI66AK2G02.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TCI66AK2G02.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TCI66AK2G02.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TCI66AK2G02.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.cpuCoreRevision = String "1.0";
config TCI66AK2G02.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.dataWordSize = Int 4;
config TCI66AK2G02.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.deviceHeader = String undefined;
config TCI66AK2G02.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config TCI66AK2G02.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.minDataUnitSize = Int 1;
config TCI66AK2G02.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.minProgUnitSize = Int 1;
config TCI66AK2G02.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TCI66AK2G02.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TCI66AK2G02.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TCI66AK2G02.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TCI66AK2G02.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexa15.Vayu

metaonly module ti.catalog.arm.cortexa15.Vayu
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa15/Vayu.xdc
var Vayu = xdc.useModule('ti.catalog.arm.cortexa15.Vayu');
per-instance config parameters
    var params = new Vayu.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A15";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x00008000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Vayu.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Vayu.Params;
// Instance config-params object
    params.cpuCore = String "v7A15";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x00008000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Vayu.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCore = String "v7A15";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Vayu.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCoreRevision = String "1.0";
config Vayu.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.dataWordSize = Int 4;
config Vayu.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Vayu.Params;
...
params.deviceHeader = String undefined;
config Vayu.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new Vayu.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config Vayu.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new Vayu.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x00008000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config Vayu.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minDataUnitSize = Int 1;
config Vayu.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minProgUnitSize = Int 1;
config Vayu.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Vayu.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Vayu.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Vayu.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Vayu.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Vayu.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


package ti.catalog.arm.cortexa53
index URL

Package of devices for the Cortex-A53 family of ARM processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexa53/package.xdc
requires xdc.platform;
package ti.catalog.arm.cortexa53 [1, 0, 0] {
    module CortexA;
    // Generic Cpu definition
}
generated on Sun, 25 Nov 2018 22:19:23 GMT


module ti.catalog.arm.cortexa53.CortexA

metaonly module ti.catalog.arm.cortexa53.CortexA
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all CortexA devices.
Configuration settings sourced in ti/catalog/arm/cortexa53/CortexA.xdc
var CortexA = xdc.useModule('ti.catalog.arm.cortexa53.CortexA');
per-instance config parameters
    var params = new CortexA.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "A53";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CortexA.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CortexA.Params;
// Instance config-params object
    params.cpuCore = String "A53";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CortexA.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CortexA.Params;
...
params.cpuCore = String "A53";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CortexA.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CortexA.Params;
...
params.cpuCoreRevision = String "1.0";
config CortexA.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CortexA.Params;
...
params.dataWordSize = Int 4;
config CortexA.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CortexA.Params;
...
params.deviceHeader = String undefined;
config CortexA.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CortexA.Params;
...
params.minDataUnitSize = Int 1;
config CortexA.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CortexA.Params;
...
params.minProgUnitSize = Int 1;
config CortexA.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CortexA.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CortexA.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CortexA.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CortexA.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CortexA.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


package ti.catalog.arm.cortexa8
index URL

Package of devices for the Cortex A8 family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexa8/package.xdc
requires xdc.platform;
requires ti.catalog.peripherals.hdvicp2;
package ti.catalog.arm.cortexa8 [1, 0, 0] {
    interface IAM335X;
    // An interface implemented by all TI8168 devices
    interface IOMAP3xxx;
    interface ITI811X;
    // An interface implemented by all TI811X devices
    interface ITI813X;
    // An interface implemented by all TI813X devices
    interface ITI8148;
    // An interface implemented by all TI8148 devices
    interface ITI8168;
    // An interface implemented by all TI8168 devices
    module AM3358;
    module AM3359;
    module AM3505;
    module AM3517;
    module DM37XX;
    module OMAP3403;
    module OMAP3405;
    module OMAP3425;
    module OMAP3503;
    module OMAP3505;
    module OMAP3515;
    module OMAP3517;
    module OMAP3525;
    module OMAP3530;
    module TMS320C3430;
    module TMS320C6A8149;
    module TMS320C6A8168;
    module TMS320DM8148;
    module TMS320DM8168;
    module TMS320TI811X;
    module TMS320TI813X;
    module TMS320TI814X;
    module TMS320TI816X;
}
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.AM3358

metaonly module ti.catalog.arm.cortexa8.AM3358
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/AM3358.xdc
var AM3358 = xdc.useModule('ti.catalog.arm.cortexa8.AM3358');
per-instance config parameters
    var params = new AM3358.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM_LO",
                {
                    comment: "Secure SRAM locked",
                    name: "SRAM_LO",
                    base: 0x402F0000,
                    len: 0x00000400,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "SRAM_HI",
                {
                    comment: "Secure SRAM open",
                    name: "SRAM_HI",
                    base: 0x402F0400,
                    len: 0x0000FC00,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC_SRAM",
                    base: 0x40300000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM3358.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM3358.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM_LO",
            {
                comment: "Secure SRAM locked",
                name: "SRAM_LO",
                base: 0x402F0000,
                len: 0x00000400,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SRAM_HI",
            {
                comment: "Secure SRAM open",
                name: "SRAM_HI",
                base: 0x402F0400,
                len: 0x0000FC00,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC_SRAM",
                base: 0x40300000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM3358.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM3358.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM3358.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM3358.Params;
...
params.cpuCoreRevision = String "1.0";
config AM3358.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM3358.Params;
...
params.dataWordSize = Int 4;
config AM3358.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM3358.Params;
...
params.deviceHeader = String undefined;
config AM3358.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new AM3358.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config AM3358.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new AM3358.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config AM3358.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new AM3358.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config AM3358.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM3358.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM_LO",
        {
            comment: "Secure SRAM locked",
            name: "SRAM_LO",
            base: 0x402F0000,
            len: 0x00000400,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SRAM_HI",
        {
            comment: "Secure SRAM open",
            name: "SRAM_HI",
            base: 0x402F0400,
            len: 0x0000FC00,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC_SRAM",
            base: 0x40300000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM3358.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM3358.Params;
...
params.minDataUnitSize = Int 1;
config AM3358.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM3358.Params;
...
params.minProgUnitSize = Int 1;
config AM3358.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM3358.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM3358.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM3358.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM3358.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM3358.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


module ti.catalog.arm.cortexa8.AM3359

metaonly module ti.catalog.arm.cortexa8.AM3359
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/AM3359.xdc
var AM3359 = xdc.useModule('ti.catalog.arm.cortexa8.AM3359');
per-instance config parameters
    var params = new AM3359.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM_LO",
                {
                    comment: "Secure SRAM locked",
                    name: "SRAM_LO",
                    base: 0x402F0000,
                    len: 0x00000400,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "SRAM_HI",
                {
                    comment: "Secure SRAM open",
                    name: "SRAM_HI",
                    base: 0x402F0400,
                    len: 0x0000FC00,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC_SRAM",
                    base: 0x40300000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM3359.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM3359.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM_LO",
            {
                comment: "Secure SRAM locked",
                name: "SRAM_LO",
                base: 0x402F0000,
                len: 0x00000400,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SRAM_HI",
            {
                comment: "Secure SRAM open",
                name: "SRAM_HI",
                base: 0x402F0400,
                len: 0x0000FC00,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC_SRAM",
                base: 0x40300000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM3359.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM3359.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM3359.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM3359.Params;
...
params.cpuCoreRevision = String "1.0";
config AM3359.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM3359.Params;
...
params.dataWordSize = Int 4;
config AM3359.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM3359.Params;
...
params.deviceHeader = String undefined;
config AM3359.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new AM3359.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config AM3359.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new AM3359.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config AM3359.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new AM3359.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config AM3359.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM3359.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM_LO",
        {
            comment: "Secure SRAM locked",
            name: "SRAM_LO",
            base: 0x402F0000,
            len: 0x00000400,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SRAM_HI",
        {
            comment: "Secure SRAM open",
            name: "SRAM_HI",
            base: 0x402F0400,
            len: 0x0000FC00,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC_SRAM",
            base: 0x40300000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM3359.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM3359.Params;
...
params.minDataUnitSize = Int 1;
config AM3359.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM3359.Params;
...
params.minProgUnitSize = Int 1;
config AM3359.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM3359.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM3359.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM3359.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM3359.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM3359.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


module ti.catalog.arm.cortexa8.AM3505

metaonly module ti.catalog.arm.cortexa8.AM3505
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/AM3505.xdc
var AM3505 = xdc.useModule('ti.catalog.arm.cortexa8.AM3505');
per-instance config parameters
    var params = new AM3505.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM3505.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM3505.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM3505.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM3505.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM3505.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM3505.Params;
...
params.cpuCoreRevision = String "1.0";
config AM3505.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM3505.Params;
...
params.dataWordSize = Int 4;
config AM3505.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM3505.Params;
...
params.deviceHeader = String undefined;
config AM3505.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM3505.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM3505.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM3505.Params;
...
params.minDataUnitSize = Int 1;
config AM3505.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM3505.Params;
...
params.minProgUnitSize = Int 1;
config AM3505.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM3505.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM3505.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM3505.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM3505.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM3505.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


module ti.catalog.arm.cortexa8.AM3517

metaonly module ti.catalog.arm.cortexa8.AM3517
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/AM3517.xdc
var AM3517 = xdc.useModule('ti.catalog.arm.cortexa8.AM3517');
per-instance config parameters
    var params = new AM3517.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM3517.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM3517.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM3517.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM3517.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM3517.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM3517.Params;
...
params.cpuCoreRevision = String "1.0";
config AM3517.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM3517.Params;
...
params.dataWordSize = Int 4;
config AM3517.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM3517.Params;
...
params.deviceHeader = String undefined;
config AM3517.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM3517.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM3517.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM3517.Params;
...
params.minDataUnitSize = Int 1;
config AM3517.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM3517.Params;
...
params.minProgUnitSize = Int 1;
config AM3517.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM3517.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM3517.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM3517.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM3517.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM3517.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


module ti.catalog.arm.cortexa8.DM37XX

metaonly module ti.catalog.arm.cortexa8.DM37XX
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/DM37XX.xdc
var DM37XX = xdc.useModule('ti.catalog.arm.cortexa8.DM37XX');
per-instance config parameters
    var params = new DM37XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = DM37XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new DM37XX.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config DM37XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new DM37XX.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config DM37XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new DM37XX.Params;
...
params.cpuCoreRevision = String "1.0";
config DM37XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new DM37XX.Params;
...
params.dataWordSize = Int 4;
config DM37XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new DM37XX.Params;
...
params.deviceHeader = String undefined;
config DM37XX.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new DM37XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config DM37XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new DM37XX.Params;
...
params.minDataUnitSize = Int 1;
config DM37XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new DM37XX.Params;
...
params.minProgUnitSize = Int 1;
config DM37XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new DM37XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new DM37XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DM37XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
DM37XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
DM37XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


interface ti.catalog.arm.cortexa8.IAM335X

metaonly interface ti.catalog.arm.cortexa8.IAM335X
index URL

An interface implemented by all TI8168 devices

This interface is defined to factor common data about all TI8168 type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
metaonly interface IAM335X { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
package ti.catalog.arm.cortexa8;
metaonly interface IAM335X inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config HDVICP2.Instance hdvicp1// ;
    config HDVICP2.Instance hdvicp2// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM_LO",
            {
                comment: "Secure SRAM locked",
                name: "SRAM_LO",
                base: 0x402F0000,
                len: 0x00000400,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SRAM_HI",
            {
                comment: "Secure SRAM open",
                name: "SRAM_HI",
                base: 0x402F0400,
                len: 0x0000FC00,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC_SRAM",
                base: 0x40300000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IAM335X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
override config String cpuCore = "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IAM335X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
override config String cpuCoreRevision = "1.0";
config IAM335X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
override config Int dataWordSize = 4;
config IAM335X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
config String deviceHeader;
config IAM335X.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
config HDVICP2.Instance hdvicp0;
config IAM335X.Params.hdvicp1 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
config HDVICP2.Instance hdvicp1;
config IAM335X.Params.hdvicp2 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
config HDVICP2.Instance hdvicp2;
config IAM335X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM_LO",
        {
            comment: "Secure SRAM locked",
            name: "SRAM_LO",
            base: 0x402F0000,
            len: 0x00000400,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SRAM_HI",
        {
            comment: "Secure SRAM open",
            name: "SRAM_HI",
            base: 0x402F0400,
            len: 0x0000FC00,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC_SRAM",
            base: 0x40300000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config IAM335X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
override config Int minDataUnitSize = 1;
config IAM335X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
override config Int minProgUnitSize = 1;
config IAM335X.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IAM335X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IAM335X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IAM335X.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


interface ti.catalog.arm.cortexa8.IOMAP3xxx

metaonly interface ti.catalog.arm.cortexa8.IOMAP3xxx
index URL
XDCspec summary sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
metaonly interface IOMAP3xxx { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
package ti.catalog.arm.cortexa8;
metaonly interface IOMAP3xxx inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IOMAP3xxx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
override config String cpuCore = "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IOMAP3xxx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
override config String cpuCoreRevision = "1.0";
config IOMAP3xxx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
override config Int dataWordSize = 4;
config IOMAP3xxx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
config String deviceHeader;
config IOMAP3xxx.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config IOMAP3xxx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
override config Int minDataUnitSize = 1;
config IOMAP3xxx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
override config Int minProgUnitSize = 1;
config IOMAP3xxx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IOMAP3xxx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IOMAP3xxx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexa8/IOMAP3xxx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


interface ti.catalog.arm.cortexa8.ITI811X

metaonly interface ti.catalog.arm.cortexa8.ITI811X
index URL

An interface implemented by all TI811X devices

This interface is defined to factor common data about all TI811X type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
metaonly interface ITI811X { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
package ti.catalog.arm.cortexa8;
metaonly interface ITI811X inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI811X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
override config String cpuCore = "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI811X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
override config String cpuCoreRevision = "1.0";
config ITI811X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
override config Int dataWordSize = 4;
config ITI811X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
config String deviceHeader;
config ITI811X.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
config HDVICP2.Instance hdvicp0;
config ITI811X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config ITI811X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
override config Int minDataUnitSize = 1;
config ITI811X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
override config Int minProgUnitSize = 1;
config ITI811X.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI811X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI811X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI811X.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


interface ti.catalog.arm.cortexa8.ITI813X

metaonly interface ti.catalog.arm.cortexa8.ITI813X
index URL

An interface implemented by all TI813X devices

This interface is defined to factor common data about all TI813X type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
metaonly interface ITI813X { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
package ti.catalog.arm.cortexa8;
metaonly interface ITI813X inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI813X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
override config String cpuCore = "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI813X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
override config String cpuCoreRevision = "1.0";
config ITI813X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
override config Int dataWordSize = 4;
config ITI813X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
config String deviceHeader;
config ITI813X.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
config HDVICP2.Instance hdvicp0;
config ITI813X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config ITI813X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
override config Int minDataUnitSize = 1;
config ITI813X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
override config Int minProgUnitSize = 1;
config ITI813X.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI813X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI813X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI813X.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


interface ti.catalog.arm.cortexa8.ITI8148

metaonly interface ti.catalog.arm.cortexa8.ITI8148
index URL

An interface implemented by all TI8148 devices

This interface is defined to factor common data about all TI8148 type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
metaonly interface ITI8148 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
package ti.catalog.arm.cortexa8;
metaonly interface ITI8148 inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI8148.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
override config String cpuCore = "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI8148.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
override config String cpuCoreRevision = "1.0";
config ITI8148.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
override config Int dataWordSize = 4;
config ITI8148.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
config String deviceHeader;
config ITI8148.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
config HDVICP2.Instance hdvicp0;
config ITI8148.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config ITI8148.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
override config Int minDataUnitSize = 1;
config ITI8148.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
override config Int minProgUnitSize = 1;
config ITI8148.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI8148.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI8148.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8148.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


interface ti.catalog.arm.cortexa8.ITI8168

metaonly interface ti.catalog.arm.cortexa8.ITI8168
index URL

An interface implemented by all TI8168 devices

This interface is defined to factor common data about all TI8168 type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
metaonly interface ITI8168 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
package ti.catalog.arm.cortexa8;
metaonly interface ITI8168 inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "v7A";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config HDVICP2.Instance hdvicp1// ;
    config HDVICP2.Instance hdvicp2// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
override config String cpuCore = "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
override config String cpuCoreRevision = "1.0";
config ITI8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
override config Int dataWordSize = 4;
config ITI8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
config String deviceHeader;
config ITI8168.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
config HDVICP2.Instance hdvicp0;
config ITI8168.Params.hdvicp1 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
config HDVICP2.Instance hdvicp1;
config ITI8168.Params.hdvicp2 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
config HDVICP2.Instance hdvicp2;
config ITI8168.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
config IPlatform.Memory memMap[string] = [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000
        }
    ]
];
config ITI8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
override config Int minDataUnitSize = 1;
config ITI8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
override config Int minProgUnitSize = 1;
config ITI8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexa8/ITI8168.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


module ti.catalog.arm.cortexa8.OMAP3403

metaonly module ti.catalog.arm.cortexa8.OMAP3403
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3403.xdc
var OMAP3403 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3403');
per-instance config parameters
    var params = new OMAP3403.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3403.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3403.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3403.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3403.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3403.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3403.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3403.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3403.Params;
...
params.dataWordSize = Int 4;
config OMAP3403.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3403.Params;
...
params.deviceHeader = String undefined;
config OMAP3403.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3403.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3403.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3403.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3403.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3403.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3403.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3403.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3403.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3403.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3403.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3403.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:30 GMT


module ti.catalog.arm.cortexa8.OMAP3405

metaonly module ti.catalog.arm.cortexa8.OMAP3405
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3405.xdc
var OMAP3405 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3405');
per-instance config parameters
    var params = new OMAP3405.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3405.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3405.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3405.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3405.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3405.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3405.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3405.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3405.Params;
...
params.dataWordSize = Int 4;
config OMAP3405.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3405.Params;
...
params.deviceHeader = String undefined;
config OMAP3405.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3405.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3405.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3405.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3405.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3405.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3405.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3405.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3405.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3405.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3405.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3405.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.OMAP3425

metaonly module ti.catalog.arm.cortexa8.OMAP3425
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3425.xdc
var OMAP3425 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3425');
per-instance config parameters
    var params = new OMAP3425.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3425.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3425.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3425.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3425.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3425.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3425.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3425.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.dataWordSize = Int 4;
config OMAP3425.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3425.Params;
...
params.deviceHeader = String undefined;
config OMAP3425.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3425.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3425.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3425.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3425.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3425.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3425.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3425.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3425.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3425.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.OMAP3503

metaonly module ti.catalog.arm.cortexa8.OMAP3503
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3503.xdc
var OMAP3503 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3503');
per-instance config parameters
    var params = new OMAP3503.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3503.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3503.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3503.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3503.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3503.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3503.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3503.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3503.Params;
...
params.dataWordSize = Int 4;
config OMAP3503.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3503.Params;
...
params.deviceHeader = String undefined;
config OMAP3503.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3503.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3503.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3503.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3503.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3503.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3503.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3503.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3503.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3503.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3503.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3503.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.OMAP3505

metaonly module ti.catalog.arm.cortexa8.OMAP3505
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3505.xdc
var OMAP3505 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3505');
per-instance config parameters
    var params = new OMAP3505.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3505.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3505.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3505.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3505.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3505.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3505.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3505.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3505.Params;
...
params.dataWordSize = Int 4;
config OMAP3505.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3505.Params;
...
params.deviceHeader = String undefined;
config OMAP3505.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3505.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3505.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3505.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3505.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3505.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3505.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3505.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3505.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3505.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3505.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3505.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.OMAP3515

metaonly module ti.catalog.arm.cortexa8.OMAP3515
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3515.xdc
var OMAP3515 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3515');
per-instance config parameters
    var params = new OMAP3515.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3515.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3515.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3515.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3515.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3515.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3515.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3515.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3515.Params;
...
params.dataWordSize = Int 4;
config OMAP3515.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3515.Params;
...
params.deviceHeader = String undefined;
config OMAP3515.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3515.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3515.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3515.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3515.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3515.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3515.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3515.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3515.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3515.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3515.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3515.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.OMAP3517

metaonly module ti.catalog.arm.cortexa8.OMAP3517
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3517.xdc
var OMAP3517 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3517');
per-instance config parameters
    var params = new OMAP3517.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3517.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3517.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3517.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3517.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3517.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3517.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3517.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3517.Params;
...
params.dataWordSize = Int 4;
config OMAP3517.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3517.Params;
...
params.deviceHeader = String undefined;
config OMAP3517.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3517.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3517.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3517.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3517.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3517.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3517.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3517.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3517.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3517.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3517.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3517.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.OMAP3525

metaonly module ti.catalog.arm.cortexa8.OMAP3525
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3525.xdc
var OMAP3525 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3525');
per-instance config parameters
    var params = new OMAP3525.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3525.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3525.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3525.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3525.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3525.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3525.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3525.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.dataWordSize = Int 4;
config OMAP3525.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3525.Params;
...
params.deviceHeader = String undefined;
config OMAP3525.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3525.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3525.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3525.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3525.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3525.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3525.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3525.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3525.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3525.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.OMAP3530

metaonly module ti.catalog.arm.cortexa8.OMAP3530
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/OMAP3530.xdc
var OMAP3530 = xdc.useModule('ti.catalog.arm.cortexa8.OMAP3530');
per-instance config parameters
    var params = new OMAP3530.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3530.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3530.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3530.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3530.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3530.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3530.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP3530.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.dataWordSize = Int 4;
config OMAP3530.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3530.Params;
...
params.deviceHeader = String undefined;
config OMAP3530.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP3530.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP3530.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3530.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3530.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3530.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3530.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3530.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3530.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3530.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320C3430

metaonly module ti.catalog.arm.cortexa8.TMS320C3430
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320C3430.xdc
var TMS320C3430 = xdc.useModule('ti.catalog.arm.cortexa8.TMS320C3430');
per-instance config parameters
    var params = new TMS320C3430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x40200000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C3430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C3430.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x40200000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C3430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C3430.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C3430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C3430.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C3430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.dataWordSize = Int 4;
config TMS320C3430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C3430.Params;
...
params.deviceHeader = String undefined;
config TMS320C3430.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C3430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x40200000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C3430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C3430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C3430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C3430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C3430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C3430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C3430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C3430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320C6A8149

metaonly module ti.catalog.arm.cortexa8.TMS320C6A8149
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320C6A8149.xdc
var TMS320C6A8149 = xdc.useModule('ti.catalog.arm.cortexa8.TMS320C6A8149');
per-instance config parameters
    var params = new TMS320C6A8149.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6A8149.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6A8149.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6A8149.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6A8149.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.dataWordSize = Int 4;
config TMS320C6A8149.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.deviceHeader = String undefined;
config TMS320C6A8149.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320C6A8149.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320C6A8149.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config TMS320C6A8149.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6A8149.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6A8149.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6A8149.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6A8149.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6A8149.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320C6A8168

metaonly module ti.catalog.arm.cortexa8.TMS320C6A8168
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320C6A8168.xdc
var TMS320C6A8168 = xdc.useModule('ti.catalog.arm.cortexa8.TMS320C6A8168');
per-instance config parameters
    var params = new TMS320C6A8168.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_0",
                {
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000
                }
            ],
            [
                "OCMC_1",
                {
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6A8168.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6A8168.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6A8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6A8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6A8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.dataWordSize = Int 4;
config TMS320C6A8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.deviceHeader = String undefined;
config TMS320C6A8168.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000
        }
    ]
];
config TMS320C6A8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6A8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6A8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6A8168.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6A8168.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6A8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6A8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320DM8148

metaonly module ti.catalog.arm.cortexa8.TMS320DM8148
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320DM8148.xdc
var TMS320DM8148 = xdc.useModule('ti.catalog.arm.cortexa8.TMS320DM8148');
per-instance config parameters
    var params = new TMS320DM8148.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM8148.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM8148.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM8148.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM8148.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM8148.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM8148.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM8148.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.dataWordSize = Int 4;
config TMS320DM8148.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM8148.Params;
...
params.deviceHeader = String undefined;
config TMS320DM8148.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320DM8148.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320DM8148.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DM8148.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config TMS320DM8148.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM8148.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM8148.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM8148.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM8148.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM8148.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM8148.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM8148.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320DM8168

metaonly module ti.catalog.arm.cortexa8.TMS320DM8168
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320DM8168.xdc
var TMS320DM8168 = xdc.useModule('ti.catalog.arm.cortexa8.TMS320DM8168');
per-instance config parameters
    var params = new TMS320DM8168.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_0",
                {
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000
                }
            ],
            [
                "OCMC_1",
                {
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM8168.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM8168.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM8168.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM8168.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.dataWordSize = Int 4;
config TMS320DM8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM8168.Params;
...
params.deviceHeader = String undefined;
config TMS320DM8168.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DM8168.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000
        }
    ]
];
config TMS320DM8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM8168.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM8168.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM8168.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320TI811X

metaonly module ti.catalog.arm.cortexa8.TMS320TI811X
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320TI811X.xdc
var TMS320TI811X = xdc.useModule('ti.catalog.arm.cortexa8.TMS320TI811X');
per-instance config parameters
    var params = new TMS320TI811X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI811X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI811X.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI811X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI811X.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI811X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI811X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI811X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI811X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI811X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI811X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI811X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI811X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI811X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config TMS320TI811X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI811X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI811X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI811X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI811X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI811X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI811X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI811X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320TI813X

metaonly module ti.catalog.arm.cortexa8.TMS320TI813X
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320TI813X.xdc
var TMS320TI813X = xdc.useModule('ti.catalog.arm.cortexa8.TMS320TI813X');
per-instance config parameters
    var params = new TMS320TI813X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI813X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI813X.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI813X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI813X.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI813X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI813X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI813X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI813X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI813X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI813X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI813X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI813X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI813X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI813X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config TMS320TI813X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI813X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI813X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI813X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI813X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI813X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI813X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI813X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI813X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI813X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320TI814X

metaonly module ti.catalog.arm.cortexa8.TMS320TI814X
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320TI814X.xdc
var TMS320TI814X = xdc.useModule('ti.catalog.arm.cortexa8.TMS320TI814X');
per-instance config parameters
    var params = new TMS320TI814X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI814X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI814X.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI814X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI814X.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI814X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI814X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI814X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI814X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI814X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI814X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI814X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI814X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI814X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000
        }
    ]
];
config TMS320TI814X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI814X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI814X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI814X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI814X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI814X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI814X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI814X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa8.TMS320TI816X

metaonly module ti.catalog.arm.cortexa8.TMS320TI816X
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa8/TMS320TI816X.xdc
var TMS320TI816X = xdc.useModule('ti.catalog.arm.cortexa8.TMS320TI816X');
per-instance config parameters
    var params = new TMS320TI816X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_0",
                {
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000
                }
            ],
            [
                "OCMC_1",
                {
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI816X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI816X.Params;
// Instance config-params object
    params.cpuCore = String "v7A";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI816X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI816X.Params;
...
params.cpuCore = String "v7A";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI816X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI816X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI816X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI816X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI816X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI816X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI816X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000
        }
    ]
];
config TMS320TI816X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI816X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI816X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI816X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI816X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI816X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI816X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI816X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


package ti.catalog.arm.cortexa9
index URL

Package of devices for the arm Cortex A9 family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexa9/package.xdc
requires xdc.platform;
requires ti.catalog.peripherals.hdvicp2;
package ti.catalog.arm.cortexa9 [1, 0, 0] {
    module AM437X;
    module OMAP4430;
}
generated on Sun, 25 Nov 2018 22:19:32 GMT


module ti.catalog.arm.cortexa9.AM437X

metaonly module ti.catalog.arm.cortexa9.AM437X
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa9/AM437X.xdc
var AM437X = xdc.useModule('ti.catalog.arm.cortexa9.AM437X');
per-instance config parameters
    var params = new AM437X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "OCMCRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "OCMCRAM",
                    base: 0x40300000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L2SRAM",
                {
                    comment: "L2 Cache SRAM",
                    name: "L2SRAM",
                    base: 0x40500000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = AM437X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new AM437X.Params;
// Instance config-params object
    params.cpuCore = String "v7A9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "OCMCRAM",
            {
                comment: "On-Chip SRAM",
                name: "OCMCRAM",
                base: 0x40300000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L2SRAM",
            {
                comment: "L2 Cache SRAM",
                name: "L2SRAM",
                base: 0x40500000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config AM437X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new AM437X.Params;
...
params.cpuCore = String "v7A9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config AM437X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new AM437X.Params;
...
params.cpuCoreRevision = String "1.0";
config AM437X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new AM437X.Params;
...
params.dataWordSize = Int 4;
config AM437X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new AM437X.Params;
...
params.deviceHeader = String undefined;
config AM437X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new AM437X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "OCMCRAM",
        {
            comment: "On-Chip SRAM",
            name: "OCMCRAM",
            base: 0x40300000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L2SRAM",
        {
            comment: "L2 Cache SRAM",
            name: "L2SRAM",
            base: 0x40500000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config AM437X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new AM437X.Params;
...
params.minDataUnitSize = Int 1;
config AM437X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new AM437X.Params;
...
params.minProgUnitSize = Int 1;
config AM437X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new AM437X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new AM437X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = AM437X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
AM437X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
AM437X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:31 GMT


module ti.catalog.arm.cortexa9.OMAP4430

metaonly module ti.catalog.arm.cortexa9.OMAP4430
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/cortexa9/OMAP4430.xdc
var OMAP4430 = xdc.useModule('ti.catalog.arm.cortexa9.OMAP4430');
per-instance config parameters
    var params = new OMAP4430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "v7A9";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    comment: "On-Chip SRAM",
                    name: "SRAM",
                    base: 0x402F0000,
                    len: 0x00008000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP4430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP4430.Params;
// Instance config-params object
    params.cpuCore = String "v7A9";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "SRAM",
            {
                comment: "On-Chip SRAM",
                name: "SRAM",
                base: 0x402F0000,
                len: 0x00008000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP4430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP4430.Params;
...
params.cpuCore = String "v7A9";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP4430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP4430.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP4430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.dataWordSize = Int 4;
config OMAP4430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP4430.Params;
...
params.deviceHeader = String undefined;
config OMAP4430.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new OMAP4430.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config OMAP4430.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP4430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            comment: "On-Chip SRAM",
            name: "SRAM",
            base: 0x402F0000,
            len: 0x00008000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP4430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.minDataUnitSize = Int 1;
config OMAP4430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.minProgUnitSize = Int 1;
config OMAP4430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP4430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP4430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP4430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP4430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP4430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:32 GMT


package ti.catalog.arm.cortexm3
index URL

Package of devices for the arm Cortex M3 family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexm3/package.xdc
requires xdc.platform;
requires ti.catalog.peripherals.hdvicp2;
package ti.catalog.arm.cortexm3 [1, 0, 0] {
    interface ITI811X;
    // An interface implemented by all TI811X devices
    interface ITI813X;
    // An interface implemented by all TI813X devices
    interface ITI8148;
    // An interface implemented by all TI8148 devices
    interface ITI8168;
    // An interface implemented by all TI8168 devices
    module CC13xx;
    // Generic CC13xx Cpu definition
    module CC26xx;
    // Generic CC26xx Cpu definition
    module CortexM;
    // Generic Cpu definition
    module CortexM3;
    // The CortexM3 device data sheet module
    module F28M35x;
    // The F28M35x device data sheet module
    module OMAP4430;
    // The OMAP4430 device data sheet module
    module TMS320C6A8149;
    // The TMS320C6A8149 device data sheet module
    module TMS320C6A8168;
    // The TMS320C6A8168 device data sheet module
    module TMS320DM8148;
    // The TMS320DM8148 device data sheet module
    module TMS320DM8168;
    // The TMS320DM8168 device data sheet module
    module TMS320TI811X;
    // The TMS320TI811X device data sheet module
    module TMS320TI813X;
    // The TMS320TI813X device data sheet module
    module TMS320TI814X;
    // The TMS320TI814X device data sheet module
    module TMS320TI816X;
    // The TMS320TI816X device data sheet module
    module Tiva;
    // Generic Tiva Cpu definition
}
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.CC13xx

metaonly module ti.catalog.arm.cortexm3.CC13xx
index URL

Generic CC13xx Cpu definition

  • Configuration settings
  • Individual elements
This definition represents all CC13xx devices.
Configuration settings sourced in ti/catalog/arm/cortexm3/CC13xx.xdc
var CC13xx = xdc.useModule('ti.catalog.arm.cortexm3.CC13xx');
per-instance config parameters
    var params = new CC13xx.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CC13xx.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CC13xx.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CC13xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CC13xx.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CC13xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CC13xx.Params;
...
params.cpuCoreRevision = String "1.0";
config CC13xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CC13xx.Params;
...
params.dataWordSize = Int 4;
config CC13xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CC13xx.Params;
...
params.deviceHeader = String undefined;
config CC13xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CC13xx.Params;
...
params.minDataUnitSize = Int 1;
config CC13xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CC13xx.Params;
...
params.minProgUnitSize = Int 1;
config CC13xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CC13xx.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CC13xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CC13xx.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CC13xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CC13xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


module ti.catalog.arm.cortexm3.CC26xx

metaonly module ti.catalog.arm.cortexm3.CC26xx
index URL

Generic CC26xx Cpu definition

  • Configuration settings
  • Individual elements
This definition represents all CC26xx devices.
Configuration settings sourced in ti/catalog/arm/cortexm3/CC26xx.xdc
var CC26xx = xdc.useModule('ti.catalog.arm.cortexm3.CC26xx');
per-instance config parameters
    var params = new CC26xx.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CC26xx.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CC26xx.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CC26xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CC26xx.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CC26xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CC26xx.Params;
...
params.cpuCoreRevision = String "1.0";
config CC26xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CC26xx.Params;
...
params.dataWordSize = Int 4;
config CC26xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CC26xx.Params;
...
params.deviceHeader = String undefined;
config CC26xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CC26xx.Params;
...
params.minDataUnitSize = Int 1;
config CC26xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CC26xx.Params;
...
params.minProgUnitSize = Int 1;
config CC26xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CC26xx.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CC26xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CC26xx.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CC26xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CC26xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


module ti.catalog.arm.cortexm3.CortexM

metaonly module ti.catalog.arm.cortexm3.CortexM
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all CortexM devices.
Configuration settings sourced in ti/catalog/arm/cortexm3/CortexM.xdc
var CortexM = xdc.useModule('ti.catalog.arm.cortexm3.CortexM');
per-instance config parameters
    var params = new CortexM.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "M3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CortexM.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CortexM.Params;
// Instance config-params object
    params.cpuCore = String "M3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CortexM.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CortexM.Params;
...
params.cpuCore = String "M3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CortexM.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CortexM.Params;
...
params.cpuCoreRevision = String "1.0";
config CortexM.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CortexM.Params;
...
params.dataWordSize = Int 4;
config CortexM.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CortexM.Params;
...
params.deviceHeader = String undefined;
config CortexM.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CortexM.Params;
...
params.minDataUnitSize = Int 1;
config CortexM.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CortexM.Params;
...
params.minProgUnitSize = Int 1;
config CortexM.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CortexM.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CortexM.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CortexM.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CortexM.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CortexM.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


module ti.catalog.arm.cortexm3.CortexM3

metaonly module ti.catalog.arm.cortexm3.CortexM3
index URL

The CortexM3 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/CortexM3.xdc
var CortexM3 = xdc.useModule('ti.catalog.arm.cortexm3.CortexM3');
per-instance config parameters
    var params = new CortexM3.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [ ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CortexM3.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CortexM3.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [ ];
    // The memory map returned be getMemoryMap()
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CortexM3.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CortexM3.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CortexM3.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CortexM3.Params;
...
params.cpuCoreRevision = String "1.0";
config CortexM3.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CortexM3.Params;
...
params.dataWordSize = Int 4;
config CortexM3.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CortexM3.Params;
...
params.deviceHeader = String undefined;
config CortexM3.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new CortexM3.Params;
...
params.memMap = IPlatform.Memory[string] [ ];
config CortexM3.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CortexM3.Params;
...
params.minDataUnitSize = Int 1;
config CortexM3.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CortexM3.Params;
...
params.minProgUnitSize = Int 1;
config CortexM3.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CortexM3.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CortexM3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CortexM3.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CortexM3.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CortexM3.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


module ti.catalog.arm.cortexm3.F28M35x

metaonly module ti.catalog.arm.cortexm3.F28M35x
index URL

The F28M35x device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/F28M35x.xdc
var F28M35x = xdc.useModule('ti.catalog.arm.cortexm3.F28M35x');
per-instance config parameters
    var params = new F28M35x.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned by getMemoryMap() = IPlatform.Memory[string] [
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x0,
                    len: 0x10000,
                    space: "code",
                    access: "RX"
                }
            ],
            [
                "FLASH_BOOT",
                {
                    comment: "Branch for boot from Flash",
                    name: "FLASH_BOOT",
                    base: 0x200030,
                    len: 0x4,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "512KB Flash memory",
                    name: "FLASH",
                    base: 0x200034,
                    len: 0x7FFC8,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OTP",
                {
                    comment: "4KB OTP memory",
                    name: "OTP",
                    base: 0x680000,
                    len: 0x1000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "C03SRAM",
                {
                    comment: "32KB On-Chip RAM Memory",
                    name: "C03SRAM",
                    base: 0x20000000,
                    len: 0x8000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "S07SHRAM",
                {
                    comment: "64KB On-Chip Shared RAM Memory",
                    name: "S07SHRAM",
                    base: 0x20008000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "CTOMMSGRAM",
                {
                    comment: "C28 to M3 MSG RAM Memory",
                    name: "CTOMMSGRAM",
                    base: 0x2007F000,
                    len: 0x800,
                    space: "data",
                    access: "R"
                }
            ],
            [
                "MTOCMSGRAM",
                {
                    comment: "M3 to C28 MSG RAM Memory",
                    name: "MTOCMSGRAM",
                    base: 0x2007F800,
                    len: 0x800,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.timer0// = Timer.Instance undefined;
        params.timer1// = Timer.Instance undefined;
        params.timer2// = Timer.Instance undefined;
        params.timer3// = Timer.Instance undefined;
per-instance creation
    var inst = F28M35x.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new F28M35x.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned by getMemoryMap()
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x0,
                len: 0x10000,
                space: "code",
                access: "RX"
            }
        ],
        [
            "FLASH_BOOT",
            {
                comment: "Branch for boot from Flash",
                name: "FLASH_BOOT",
                base: 0x200030,
                len: 0x4,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "512KB Flash memory",
                name: "FLASH",
                base: 0x200034,
                len: 0x7FFC8,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OTP",
            {
                comment: "4KB OTP memory",
                name: "OTP",
                base: 0x680000,
                len: 0x1000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "C03SRAM",
            {
                comment: "32KB On-Chip RAM Memory",
                name: "C03SRAM",
                base: 0x20000000,
                len: 0x8000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "S07SHRAM",
            {
                comment: "64KB On-Chip Shared RAM Memory",
                name: "S07SHRAM",
                base: 0x20008000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "CTOMMSGRAM",
            {
                comment: "C28 to M3 MSG RAM Memory",
                name: "CTOMMSGRAM",
                base: 0x2007F000,
                len: 0x800,
                space: "data",
                access: "R"
            }
        ],
        [
            "MTOCMSGRAM",
            {
                comment: "M3 to C28 MSG RAM Memory",
                name: "MTOCMSGRAM",
                base: 0x2007F800,
                len: 0x800,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.timer0 = Timer.Instance undefined;
    //
    params.timer1 = Timer.Instance undefined;
    //
    params.timer2 = Timer.Instance undefined;
    //
    params.timer3 = Timer.Instance undefined;
    //
config F28M35x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new F28M35x.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config F28M35x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new F28M35x.Params;
...
params.cpuCoreRevision = String "1.0";
config F28M35x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new F28M35x.Params;
...
params.dataWordSize = Int 4;
config F28M35x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new F28M35x.Params;
...
params.deviceHeader = String undefined;
config F28M35x.Params.memMap // instance
index URL

The memory map returned by getMemoryMap()

Configuration settings
var params = new F28M35x.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x0,
            len: 0x10000,
            space: "code",
            access: "RX"
        }
    ],
    [
        "FLASH_BOOT",
        {
            comment: "Branch for boot from Flash",
            name: "FLASH_BOOT",
            base: 0x200030,
            len: 0x4,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "512KB Flash memory",
            name: "FLASH",
            base: 0x200034,
            len: 0x7FFC8,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OTP",
        {
            comment: "4KB OTP memory",
            name: "OTP",
            base: 0x680000,
            len: 0x1000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "C03SRAM",
        {
            comment: "32KB On-Chip RAM Memory",
            name: "C03SRAM",
            base: 0x20000000,
            len: 0x8000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "S07SHRAM",
        {
            comment: "64KB On-Chip Shared RAM Memory",
            name: "S07SHRAM",
            base: 0x20008000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "CTOMMSGRAM",
        {
            comment: "C28 to M3 MSG RAM Memory",
            name: "CTOMMSGRAM",
            base: 0x2007F000,
            len: 0x800,
            space: "data",
            access: "R"
        }
    ],
    [
        "MTOCMSGRAM",
        {
            comment: "M3 to C28 MSG RAM Memory",
            name: "MTOCMSGRAM",
            base: 0x2007F800,
            len: 0x800,
            space: "data",
            access: "RW"
        }
    ]
];
config F28M35x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new F28M35x.Params;
...
params.minDataUnitSize = Int 1;
config F28M35x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new F28M35x.Params;
...
params.minProgUnitSize = Int 1;
config F28M35x.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new F28M35x.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config F28M35x.Params.timer0 // instance
index URL
Configuration settings
var params = new F28M35x.Params;
...
params.timer0 = Timer.Instance undefined;
config F28M35x.Params.timer1 // instance
index URL
Configuration settings
var params = new F28M35x.Params;
...
params.timer1 = Timer.Instance undefined;
config F28M35x.Params.timer2 // instance
index URL
Configuration settings
var params = new F28M35x.Params;
...
params.timer2 = Timer.Instance undefined;
config F28M35x.Params.timer3 // instance
index URL
Configuration settings
var params = new F28M35x.Params;
...
params.timer3 = Timer.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new F28M35x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = F28M35x.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
F28M35x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
F28M35x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


interface ti.catalog.arm.cortexm3.ITI811X

metaonly interface ti.catalog.arm.cortexm3.ITI811X
index URL

An interface implemented by all TI811X devices

This interface is defined to factor common data about all TI811X type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
metaonly interface ITI811X { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
package ti.catalog.arm.cortexm3;
metaonly interface ITI811X inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "CM3";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI811X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
override config String cpuCore = "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI811X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
override config String cpuCoreRevision = "1.0";
config ITI811X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
override config Int dataWordSize = 4;
config ITI811X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
config String deviceHeader;
config ITI811X.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
config HDVICP2.Instance hdvicp0;
config ITI811X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config ITI811X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
override config Int minDataUnitSize = 1;
config ITI811X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
override config Int minProgUnitSize = 1;
config ITI811X.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI811X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI811X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI811X.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


interface ti.catalog.arm.cortexm3.ITI813X

metaonly interface ti.catalog.arm.cortexm3.ITI813X
index URL

An interface implemented by all TI813X devices

This interface is defined to factor common data about all TI813X type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
metaonly interface ITI813X { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
package ti.catalog.arm.cortexm3;
metaonly interface ITI813X inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "CM3";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI813X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
override config String cpuCore = "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI813X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
override config String cpuCoreRevision = "1.0";
config ITI813X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
override config Int dataWordSize = 4;
config ITI813X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
config String deviceHeader;
config ITI813X.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
config HDVICP2.Instance hdvicp0;
config ITI813X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config ITI813X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
override config Int minDataUnitSize = 1;
config ITI813X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
override config Int minProgUnitSize = 1;
config ITI813X.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI813X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI813X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI813X.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


interface ti.catalog.arm.cortexm3.ITI8148

metaonly interface ti.catalog.arm.cortexm3.ITI8148
index URL

An interface implemented by all TI8148 devices

This interface is defined to factor common data about all TI8148 type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
metaonly interface ITI8148 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
package ti.catalog.arm.cortexm3;
metaonly interface ITI8148 inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "CM3";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI8148.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
override config String cpuCore = "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI8148.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
override config String cpuCoreRevision = "1.0";
config ITI8148.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
override config Int dataWordSize = 4;
config ITI8148.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
config String deviceHeader;
config ITI8148.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
config HDVICP2.Instance hdvicp0;
config ITI8148.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config ITI8148.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
override config Int minDataUnitSize = 1;
config ITI8148.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
override config Int minProgUnitSize = 1;
config ITI8148.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI8148.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI8148.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8148.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


interface ti.catalog.arm.cortexm3.ITI8168

metaonly interface ti.catalog.arm.cortexm3.ITI8168
index URL

An interface implemented by all TI8168 devices

This interface is defined to factor common data about all TI8168 type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
metaonly interface ITI8168 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
package ti.catalog.arm.cortexm3;
metaonly interface ITI8168 inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "CM3";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config HDVICP2.Instance hdvicp1// ;
    config HDVICP2.Instance hdvicp2// ;
    config IPlatform.Memory memMap// The memory map returned be getMemoryMap()[string] = [
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x00300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x00400000,
                len: 0x40000
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
override config String cpuCore = "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
override config String cpuCoreRevision = "1.0";
config ITI8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
override config Int dataWordSize = 4;
config ITI8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
config String deviceHeader;
config ITI8168.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
config HDVICP2.Instance hdvicp0;
config ITI8168.Params.hdvicp1 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
config HDVICP2.Instance hdvicp1;
config ITI8168.Params.hdvicp2 // instance
index URL
XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
config HDVICP2.Instance hdvicp2;
config ITI8168.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x00300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x00400000,
            len: 0x40000
        }
    ]
];
config ITI8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
override config Int minDataUnitSize = 1;
config ITI8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
override config Int minProgUnitSize = 1;
config ITI8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/arm/cortexm3/ITI8168.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:23 GMT


module ti.catalog.arm.cortexm3.OMAP4430

metaonly module ti.catalog.arm.cortexm3.OMAP4430
index URL

The OMAP4430 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/OMAP4430.xdc
var OMAP4430 = xdc.useModule('ti.catalog.arm.cortexm3.OMAP4430');
per-instance config parameters
    var params = new OMAP4430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_ROM",
                {
                    name: "L2_ROM",
                    base: 0x00000000,
                    len: 0x00004000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20000000,
                    len: 0x00010000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP4430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP4430.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_ROM",
            {
                name: "L2_ROM",
                base: 0x00000000,
                len: 0x00004000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20000000,
                len: 0x00010000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP4430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP4430.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP4430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP4430.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP4430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.dataWordSize = Int 4;
config OMAP4430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP4430.Params;
...
params.deviceHeader = String undefined;
config OMAP4430.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new OMAP4430.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config OMAP4430.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP4430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_ROM",
        {
            name: "L2_ROM",
            base: 0x00000000,
            len: 0x00004000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20000000,
            len: 0x00010000
        }
    ]
];
config OMAP4430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.minDataUnitSize = Int 1;
config OMAP4430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.minProgUnitSize = Int 1;
config OMAP4430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP4430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP4430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP4430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP4430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP4430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.Tiva

metaonly module ti.catalog.arm.cortexm3.Tiva
index URL

Generic Tiva Cpu definition

  • Configuration settings
  • Individual elements
This device represents all Tiva devices independent.
Configuration settings sourced in ti/catalog/arm/cortexm3/Tiva.xdc
var Tiva = xdc.useModule('ti.catalog.arm.cortexm3.Tiva');
per-instance config parameters
    var params = new Tiva.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Tiva.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Tiva.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Tiva.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Tiva.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Tiva.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Tiva.Params;
...
params.cpuCoreRevision = String "1.0";
config Tiva.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Tiva.Params;
...
params.dataWordSize = Int 4;
config Tiva.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Tiva.Params;
...
params.deviceHeader = String undefined;
config Tiva.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Tiva.Params;
...
params.minDataUnitSize = Int 1;
config Tiva.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Tiva.Params;
...
params.minProgUnitSize = Int 1;
config Tiva.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Tiva.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Tiva.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Tiva.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Tiva.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Tiva.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320C6A8149

metaonly module ti.catalog.arm.cortexm3.TMS320C6A8149
index URL

The TMS320C6A8149 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320C6A8149.xdc
var TMS320C6A8149 = xdc.useModule('ti.catalog.arm.cortexm3.TMS320C6A8149');
per-instance config parameters
    var params = new TMS320C6A8149.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x00300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6A8149.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6A8149.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6A8149.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6A8149.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.dataWordSize = Int 4;
config TMS320C6A8149.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.deviceHeader = String undefined;
config TMS320C6A8149.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320C6A8149.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320C6A8149.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config TMS320C6A8149.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6A8149.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6A8149.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6A8149.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6A8149.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6A8149.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320C6A8168

metaonly module ti.catalog.arm.cortexm3.TMS320C6A8168
index URL

The TMS320C6A8168 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320C6A8168.xdc
var TMS320C6A8168 = xdc.useModule('ti.catalog.arm.cortexm3.TMS320C6A8168');
per-instance config parameters
    var params = new TMS320C6A8168.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC_0",
                {
                    name: "OCMC_0",
                    base: 0x00300000,
                    len: 0x40000
                }
            ],
            [
                "OCMC_1",
                {
                    name: "OCMC_1",
                    base: 0x00400000,
                    len: 0x40000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6A8168.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6A8168.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x00300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x00400000,
                len: 0x40000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6A8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6A8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6A8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.dataWordSize = Int 4;
config TMS320C6A8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.deviceHeader = String undefined;
config TMS320C6A8168.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x00300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x00400000,
            len: 0x40000
        }
    ]
];
config TMS320C6A8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6A8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6A8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6A8168.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6A8168.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6A8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6A8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320DM8148

metaonly module ti.catalog.arm.cortexm3.TMS320DM8148
index URL

The TMS320DM8148 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320DM8148.xdc
var TMS320DM8148 = xdc.useModule('ti.catalog.arm.cortexm3.TMS320DM8148');
per-instance config parameters
    var params = new TMS320DM8148.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x00300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM8148.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM8148.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM8148.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM8148.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM8148.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM8148.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM8148.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.dataWordSize = Int 4;
config TMS320DM8148.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM8148.Params;
...
params.deviceHeader = String undefined;
config TMS320DM8148.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320DM8148.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320DM8148.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DM8148.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config TMS320DM8148.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM8148.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM8148.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM8148.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM8148.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM8148.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM8148.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM8148.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320DM8168

metaonly module ti.catalog.arm.cortexm3.TMS320DM8168
index URL

The TMS320DM8168 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320DM8168.xdc
var TMS320DM8168 = xdc.useModule('ti.catalog.arm.cortexm3.TMS320DM8168');
per-instance config parameters
    var params = new TMS320DM8168.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC_0",
                {
                    name: "OCMC_0",
                    base: 0x00300000,
                    len: 0x40000
                }
            ],
            [
                "OCMC_1",
                {
                    name: "OCMC_1",
                    base: 0x00400000,
                    len: 0x40000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM8168.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM8168.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x00300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x00400000,
                len: 0x40000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM8168.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM8168.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.dataWordSize = Int 4;
config TMS320DM8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM8168.Params;
...
params.deviceHeader = String undefined;
config TMS320DM8168.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320DM8168.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x00300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x00400000,
            len: 0x40000
        }
    ]
];
config TMS320DM8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM8168.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM8168.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM8168.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320TI811X

metaonly module ti.catalog.arm.cortexm3.TMS320TI811X
index URL

The TMS320TI811X device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320TI811X.xdc
var TMS320TI811X = xdc.useModule('ti.catalog.arm.cortexm3.TMS320TI811X');
per-instance config parameters
    var params = new TMS320TI811X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x00300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI811X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI811X.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI811X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI811X.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI811X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI811X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI811X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI811X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI811X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI811X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI811X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI811X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI811X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config TMS320TI811X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI811X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI811X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI811X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI811X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI811X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI811X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI811X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320TI813X

metaonly module ti.catalog.arm.cortexm3.TMS320TI813X
index URL

The TMS320TI813X device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320TI813X.xdc
var TMS320TI813X = xdc.useModule('ti.catalog.arm.cortexm3.TMS320TI813X');
per-instance config parameters
    var params = new TMS320TI813X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x00300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI813X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI813X.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI813X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI813X.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI813X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI813X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI813X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI813X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI813X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI813X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI813X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI813X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI813X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI813X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config TMS320TI813X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI813X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI813X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI813X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI813X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI813X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI813X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI813X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI813X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI813X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320TI814X

metaonly module ti.catalog.arm.cortexm3.TMS320TI814X
index URL

The TMS320TI814X device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320TI814X.xdc
var TMS320TI814X = xdc.useModule('ti.catalog.arm.cortexm3.TMS320TI814X');
per-instance config parameters
    var params = new TMS320TI814X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC",
                {
                    name: "OCMC",
                    base: 0x00300000,
                    len: 0x20000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI814X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI814X.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC",
            {
                name: "OCMC",
                base: 0x00300000,
                len: 0x20000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI814X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI814X.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI814X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI814X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI814X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI814X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI814X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI814X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI814X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI814X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI814X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC",
        {
            name: "OCMC",
            base: 0x00300000,
            len: 0x20000
        }
    ]
];
config TMS320TI814X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI814X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI814X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI814X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI814X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI814X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI814X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI814X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.TMS320TI816X

metaonly module ti.catalog.arm.cortexm3.TMS320TI816X
index URL

The TMS320TI816X device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm3/TMS320TI816X.xdc
var TMS320TI816X = xdc.useModule('ti.catalog.arm.cortexm3.TMS320TI816X');
per-instance config parameters
    var params = new TMS320TI816X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM3";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_BOOT",
                {
                    name: "L2_BOOT",
                    base: 0x00000000,
                    len: 0x4000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20004000,
                    len: 0x3C000
                }
            ],
            [
                "OCMC_0",
                {
                    name: "OCMC_0",
                    base: 0x00300000,
                    len: 0x40000
                }
            ],
            [
                "OCMC_1",
                {
                    name: "OCMC_1",
                    base: 0x00400000,
                    len: 0x40000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI816X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI816X.Params;
// Instance config-params object
    params.cpuCore = String "CM3";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_BOOT",
            {
                name: "L2_BOOT",
                base: 0x00000000,
                len: 0x4000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20004000,
                len: 0x3C000
            }
        ],
        [
            "OCMC_0",
            {
                name: "OCMC_0",
                base: 0x00300000,
                len: 0x40000
            }
        ],
        [
            "OCMC_1",
            {
                name: "OCMC_1",
                base: 0x00400000,
                len: 0x40000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI816X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI816X.Params;
...
params.cpuCore = String "CM3";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI816X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI816X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI816X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI816X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI816X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI816X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320TI816X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_BOOT",
        {
            name: "L2_BOOT",
            base: 0x00000000,
            len: 0x4000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20004000,
            len: 0x3C000
        }
    ],
    [
        "OCMC_0",
        {
            name: "OCMC_0",
            base: 0x00300000,
            len: 0x40000
        }
    ],
    [
        "OCMC_1",
        {
            name: "OCMC_1",
            base: 0x00400000,
            len: 0x40000
        }
    ]
];
config TMS320TI816X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI816X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI816X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI816X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI816X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI816X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI816X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI816X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:24 GMT


package ti.catalog.arm.cortexm3.concertoInit
index URL

Concerto M3 boot time initialization support

XDCspec declarations sourced in ti/catalog/arm/cortexm3/concertoInit/package.xdc
package ti.catalog.arm.cortexm3.concertoInit [1, 0, 0] {
    module Boot;
    // Concerto M3 Boot Support
}
generated on Sun, 25 Nov 2018 22:19:24 GMT


module ti.catalog.arm.cortexm3.concertoInit.Boot
index URL

Concerto M3 Boot Support

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The Boot module supports boot initialization for the Concerto M3 core. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing). [ more ... ]
C synopsis target-domain sourced in ti/catalog/arm/cortexm3/concertoInit/Boot.xdc
#include <ti/catalog/arm/cortexm3/concertoInit/Boot.h>
Constants
extern const Bool | Boot_configureClocks// Clock configuration flag, default is false;
extern const Bits32 | Boot_sharedMemoryAccess// Shared RAM M3 write access[8];
extern const Bits32 | Boot_sharedMemoryEnable// Shared RAM memory enable mask;
extern const Bits32 | Boot_sharedMemoryOwnerMask// Shared RAM owner select mask;
DETAILS
The Boot module supports boot initialization for the Concerto M3 core. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
config Boot_configureClocks // module-wide
index URL

Clock configuration flag, default is false

C synopsis target-domain
extern const Bool Boot_configureClocks;
DETAILS
Set to true to configure the PLL and system and M3 subsystem clock dividers.
config Boot_sharedMemoryAccess // module-wide
index URL

Shared RAM M3 write access

C synopsis target-domain
extern const Bits32 Boot_sharedMemoryAccess[8];
DETAILS
This parameter is used for writing the MSxSRCR registers. It determines the M3 write access for each shared RAM segment only when the M3 is the owner of the shared RAM segment. By default, the M3 is allowed to CPU fetch, DMA write, and CPU write.
Bit 0 is for CPU fetch. 0 - fetch allowed, 1 - fetch not allowed Bit 1 is for DMA write. 0 - write allowed, 1 - write not allowed Bit 2 is for CPU write. 0 - write allowed, 1 - write not allowed
config Boot_sharedMemoryEnable // module-wide
index URL

Shared RAM memory enable mask

C synopsis target-domain
extern const Bits32 Boot_sharedMemoryEnable;
DETAILS
This parameter is used for writing the MEMCNF register. By default, all shared RAM segments will be enabled at runtime. To disable a shared RAM segment, set the corresponding bit to 0. If any data is loaded to a shared RAM segment, the segment must be enabled prior to loading the program through other means.
config Boot_sharedMemoryOwnerMask // module-wide
index URL

Shared RAM owner select mask

C synopsis target-domain
extern const Bits32 Boot_sharedMemoryOwnerMask;
DETAILS
This parameter is used for writing the MSxMSEL register. By default, each value of each shared RAM select bit is '0'. This means the M3 is the owner and has write access based upon the sharedMemoryAccess bits. Setting a '1' in any bit position makes the C28 the owner of that shared RAM segment.
Configuration settings sourced in ti/catalog/arm/cortexm3/concertoInit/Boot.xdc
var Boot = xdc.useModule('ti.catalog.arm.cortexm3.concertoInit.Boot');
module-wide constants & types
    values of type Boot.FractMult// System PLL Fractional Multiplier (SPLLFMULT) value
        const Boot.Fract_0// Fractional multiplier is 0;
        const Boot.Fract_25// Fractional multiplier is 0.25;
        const Boot.Fract_50// Fractional multiplier is 0.5;
        const Boot.Fract_75// Fractional multiplier is 0.75;
    values of type Boot.M3Div// M3 Subsystem Clock Divider (M3SSDIVSEL) value
        const Boot.M3Div_1// Divide by 1;
        const Boot.M3Div_2// Divide by 2;
        const Boot.M3Div_4// Divide by 4;
    values of type Boot.SysDiv// System Clock Divider (SYSDIVSEL) value
        const Boot.Div_1// Divide by 1;
        const Boot.Div_2// Divide by 2;
        const Boot.Div_4// Divide by 4;
        const Boot.Div_8// Divide by 8;
    var obj = new Boot.ModuleView// ;
        obj.configureClocks = Bool ...
        obj.OSCCLK = UInt ...
        obj.SPLLIMULT = UInt ...
        obj.SPLLFMULT = String ...
        obj.SYSDIVSEL = String ...
        obj.M3SSDIVSEL = String ...
        obj.bootC28 = Bool ...
module-wide config parameters
     Boot.configureClocks// Clock configuration flag, default is false = Bool false;
     Boot.sharedMemoryAccess// Shared RAM M3 write access = Bits32[8] undefined;
     Boot.sharedMemoryEnable// Shared RAM memory enable mask = Bits32 0xffffffff;
     Boot.sharedMemoryOwnerMask// Shared RAM owner select mask = Bits32 0;
     Boot.M3SSDIVSEL// M3 Subsystem Clock Divider (M3SSDIVSEL) value = Boot.M3Div Boot.M3Div_4;
     Boot.OSCCLK// OSCCLK input frequency to PLL, in MHz. Default is 20 MHz = UInt 20;
     Boot.SPLLFMULT// System PLL Fractional Multiplier (SPLLFMULT) value = Boot.FractMult Boot.Fract_0;
     Boot.SPLLIMULT// System PLL Integer Multiplier (SPLLIMULT) value = UInt 1;
     Boot.SYSDIVSEL// System Clock Divider (SYSDIVSEL) value = Boot.SysDiv Boot.Div_8;
     Boot.bootC28// Initiate booting of the C28 processor. Default is false = Bool false;
     Boot.bootFromFlash// Boot from Flash flag. Default is true = Bool true;
     Boot.configSharedRAMs// Configure Shared RAM regions before booting the C28 processor. Default is true = Bool true;
     Boot.configureFlashController// Flash controller configuration flag, default is true = Bool true;
     Boot.configureFlashWaitStates// Flash controller wait states configuration flag, default is true = Bool true;
     Boot.enableFlashDataCache// Flash controller data cache enable flag, default is true = Bool true;
     Boot.enableFlashProgramCache// Flash controller program cache enable flag, default is true = Bool true;
     Boot.initC28RAMs// Initialize C28 RAM regions before booting the C28 processor. Default is true = Bool true;
     Boot.limpAbortFunction// Function to be called when Limp mode is detected = Fxn undefined;
     Boot.loadSegment// Specifies where to load the flash function = String undefined;
     Boot.rovViewInfo// = ViewInfo.Instance ViewInfo.create;
     Boot.runSegment// Specifies where to run the flash function = String undefined;
metaonly enum Boot.FractMult
index URL

System PLL Fractional Multiplier (SPLLFMULT) value

Configuration settings
values of type Boot.FractMult
    const Boot.Fract_0;
    // Fractional multiplier is 0
    const Boot.Fract_25;
    // Fractional multiplier is 0.25
    const Boot.Fract_50;
    // Fractional multiplier is 0.5
    const Boot.Fract_75;
    // Fractional multiplier is 0.75
metaonly enum Boot.M3Div
index URL

M3 Subsystem Clock Divider (M3SSDIVSEL) value

Configuration settings
values of type Boot.M3Div
    const Boot.M3Div_1;
    // Divide by 1
    const Boot.M3Div_2;
    // Divide by 2
    const Boot.M3Div_4;
    // Divide by 4
metaonly enum Boot.SysDiv
index URL

System Clock Divider (SYSDIVSEL) value

Configuration settings
values of type Boot.SysDiv
    const Boot.Div_1;
    // Divide by 1
    const Boot.Div_2;
    // Divide by 2
    const Boot.Div_4;
    // Divide by 4
    const Boot.Div_8;
    // Divide by 8
metaonly struct Boot.ModuleView
index URL
Configuration settings
var obj = new Boot.ModuleView;
    obj.configureClocks = Bool ...
    obj.OSCCLK = UInt ...
    obj.SPLLIMULT = UInt ...
    obj.SPLLFMULT = String ...
    obj.SYSDIVSEL = String ...
    obj.M3SSDIVSEL = String ...
    obj.bootC28 = Bool ...
config Boot.configureClocks // module-wide
index URL

Clock configuration flag, default is false

Configuration settings
Boot.configureClocks = Bool false;
DETAILS
Set to true to configure the PLL and system and M3 subsystem clock dividers.
C SYNOPSIS
Boot_configureClocks
config Boot.sharedMemoryAccess // module-wide
index URL

Shared RAM M3 write access

Configuration settings
Boot.sharedMemoryAccess = Bits32[8] undefined;
DETAILS
This parameter is used for writing the MSxSRCR registers. It determines the M3 write access for each shared RAM segment only when the M3 is the owner of the shared RAM segment. By default, the M3 is allowed to CPU fetch, DMA write, and CPU write.
Bit 0 is for CPU fetch. 0 - fetch allowed, 1 - fetch not allowed Bit 1 is for DMA write. 0 - write allowed, 1 - write not allowed Bit 2 is for CPU write. 0 - write allowed, 1 - write not allowed
C SYNOPSIS
Boot_sharedMemoryAccess
config Boot.sharedMemoryEnable // module-wide
index URL

Shared RAM memory enable mask

Configuration settings
Boot.sharedMemoryEnable = Bits32 0xffffffff;
DETAILS
This parameter is used for writing the MEMCNF register. By default, all shared RAM segments will be enabled at runtime. To disable a shared RAM segment, set the corresponding bit to 0. If any data is loaded to a shared RAM segment, the segment must be enabled prior to loading the program through other means.
C SYNOPSIS
Boot_sharedMemoryEnable
config Boot.sharedMemoryOwnerMask // module-wide
index URL

Shared RAM owner select mask

Configuration settings
Boot.sharedMemoryOwnerMask = Bits32 0;
DETAILS
This parameter is used for writing the MSxMSEL register. By default, each value of each shared RAM select bit is '0'. This means the M3 is the owner and has write access based upon the sharedMemoryAccess bits. Setting a '1' in any bit position makes the C28 the owner of that shared RAM segment.
C SYNOPSIS
Boot_sharedMemoryOwnerMask
metaonly config Boot.M3SSDIVSEL // module-wide
index URL

M3 Subsystem Clock Divider (M3SSDIVSEL) value

Configuration settings
Boot.M3SSDIVSEL = Boot.M3Div Boot.M3Div_4;
metaonly config Boot.OSCCLK // module-wide
index URL

OSCCLK input frequency to PLL, in MHz. Default is 20 MHz

Configuration settings
Boot.OSCCLK = UInt 20;
DETAILS
This is the frequency of the oscillator clock (OSCCLK) input to the PLL.
metaonly config Boot.SPLLFMULT // module-wide
index URL

System PLL Fractional Multiplier (SPLLFMULT) value

Configuration settings
Boot.SPLLFMULT = Boot.FractMult Boot.Fract_0;
metaonly config Boot.SPLLIMULT // module-wide
index URL

System PLL Integer Multiplier (SPLLIMULT) value

Configuration settings
Boot.SPLLIMULT = UInt 1;
metaonly config Boot.SYSDIVSEL // module-wide
index URL

System Clock Divider (SYSDIVSEL) value

Configuration settings
Boot.SYSDIVSEL = Boot.SysDiv Boot.Div_8;
metaonly config Boot.bootC28 // module-wide
index URL

Initiate booting of the C28 processor. Default is false

Configuration settings
Boot.bootC28 = Bool false;
DETAILS
Set to true to enable the M3 to initiate boot of the C28.
If enabled, this will occur after the optional clock configuration step, enabled by configureClocks.
metaonly config Boot.bootFromFlash // module-wide
index URL

Boot from Flash flag. Default is true

Configuration settings
Boot.bootFromFlash = Bool true;
DETAILS
Set to true to enable booting the M3 from Flash.
metaonly config Boot.configSharedRAMs // module-wide
index URL

Configure Shared RAM regions before booting the C28 processor. Default is true

Configuration settings
Boot.configSharedRAMs = Bool true;
DETAILS
Set to true to enable Shared RAM regions S0-S7, to set the owner of each region and the write access permissions for the onwer.
metaonly config Boot.configureFlashController // module-wide
index URL

Flash controller configuration flag, default is true

Configuration settings
Boot.configureFlashController = Bool true;
DETAILS
Set to true to enable the configuration of the Flash controller wait states, program and data cache.
metaonly config Boot.configureFlashWaitStates // module-wide
index URL

Flash controller wait states configuration flag, default is true

Configuration settings
Boot.configureFlashWaitStates = Bool true;
DETAILS
Set to true to configure the Flash controller wait states. The number of wait states is computed based upon the CPU frequency.
metaonly config Boot.enableFlashDataCache // module-wide
index URL

Flash controller data cache enable flag, default is true

Configuration settings
Boot.enableFlashDataCache = Bool true;
DETAILS
Set to true to enable the Flash controller's data cache.
metaonly config Boot.enableFlashProgramCache // module-wide
index URL

Flash controller program cache enable flag, default is true

Configuration settings
Boot.enableFlashProgramCache = Bool true;
DETAILS
Set to true to enable the Flash controller's program cache.
metaonly config Boot.initC28RAMs // module-wide
index URL

Initialize C28 RAM regions before booting the C28 processor. Default is true

Configuration settings
Boot.initC28RAMs = Bool true;
DETAILS
Set to true to enable initialization of these C28 RAM regions: M1, CtoM, LO, L1, L2, and L3. RAM locations will be zeroed, and the ECC or parity bits will be initialized.
metaonly config Boot.limpAbortFunction // module-wide
index URL

Function to be called when Limp mode is detected

Configuration settings
Boot.limpAbortFunction = Fxn undefined;
DETAILS
This function is called when the Boot module is about to configure the PLL, but finds the device operating in Limp mode (i.e., the mode when a missing OSCCLK input has been detected).
If this function is not specified by the application, a default function will be used, which spins in an infinite loop.
metaonly config Boot.loadSegment // module-wide
index URL

Specifies where to load the flash function

Configuration settings
Boot.loadSegment = String undefined;
DETAILS
If 'configureFlashWaitStates' is true, then this parameter determines where the ".ti_catalog_c2800_initF2837x_flashfuncs" section gets loaded.
metaonly config Boot.rovViewInfo // module-wide
index URL
Configuration settings
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
metaonly config Boot.runSegment // module-wide
index URL

Specifies where to run the flash function

Configuration settings
Boot.runSegment = String undefined;
DETAILS
If 'configureFlashWaitStates' is true then this parameter determines where the ".ti_catalog_c2800_initF2837x_flashfuncs" section gets executed at runtime.
generated on Sun, 25 Nov 2018 22:19:24 GMT


package ti.catalog.arm.cortexm33
index URL

Package of devices for the Cortex-M33 family of ARM processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexm33/package.xdc
requires xdc.platform;
package ti.catalog.arm.cortexm33 [1, 0, 0] {
    module CortexM;
    // Generic Cpu definition
}
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm33.CortexM

metaonly module ti.catalog.arm.cortexm33.CortexM
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all CortexM devices.
Configuration settings sourced in ti/catalog/arm/cortexm33/CortexM.xdc
var CortexM = xdc.useModule('ti.catalog.arm.cortexm33.CortexM');
per-instance config parameters
    var params = new CortexM.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "M33";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CortexM.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CortexM.Params;
// Instance config-params object
    params.cpuCore = String "M33";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CortexM.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CortexM.Params;
...
params.cpuCore = String "M33";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CortexM.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CortexM.Params;
...
params.cpuCoreRevision = String "1.0";
config CortexM.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CortexM.Params;
...
params.dataWordSize = Int 4;
config CortexM.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CortexM.Params;
...
params.deviceHeader = String undefined;
config CortexM.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CortexM.Params;
...
params.minDataUnitSize = Int 1;
config CortexM.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CortexM.Params;
...
params.minProgUnitSize = Int 1;
config CortexM.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CortexM.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CortexM.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CortexM.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CortexM.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CortexM.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


package ti.catalog.arm.cortexm4
index URL

Package of devices for the arm Cortex M4 family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexm4/package.xdc
package ti.catalog.arm.cortexm4 [1, 0, 0] {
    module CC13xx;
    // Generic CC13xx Cpu definition
    module CC26xx;
    // Generic CC26xx Cpu definition
    module CC32xx;
    // Generic Cpu definition
    module DRA7XX;
    // The DRA7XX device data sheet module
    module MSP432;
    // Generic MSP432 definition
    module MSP432E;
    // Generic MSP432E Cpu definition
    module OMAP5430;
    // The OMAP5430 device data sheet module
    module TDA3XX;
    // The TDA3XX device data sheet module
    module Tiva;
    // Generic Tiva Cpu definition
    module Vayu;
    // The Vayu device data sheet module
}
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.CC13xx

metaonly module ti.catalog.arm.cortexm4.CC13xx
index URL

Generic CC13xx Cpu definition

  • Configuration settings
  • Individual elements
This definition represents all CC13xx devices.
Configuration settings sourced in ti/catalog/arm/cortexm4/CC13xx.xdc
var CC13xx = xdc.useModule('ti.catalog.arm.cortexm4.CC13xx');
per-instance config parameters
    var params = new CC13xx.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CC13xx.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CC13xx.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CC13xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CC13xx.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CC13xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CC13xx.Params;
...
params.cpuCoreRevision = String "1.0";
config CC13xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CC13xx.Params;
...
params.dataWordSize = Int 4;
config CC13xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CC13xx.Params;
...
params.deviceHeader = String undefined;
config CC13xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CC13xx.Params;
...
params.minDataUnitSize = Int 1;
config CC13xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CC13xx.Params;
...
params.minProgUnitSize = Int 1;
config CC13xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CC13xx.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CC13xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CC13xx.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CC13xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CC13xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexm4.CC26xx

metaonly module ti.catalog.arm.cortexm4.CC26xx
index URL

Generic CC26xx Cpu definition

  • Configuration settings
  • Individual elements
This definition represents all CC26xx devices.
Configuration settings sourced in ti/catalog/arm/cortexm4/CC26xx.xdc
var CC26xx = xdc.useModule('ti.catalog.arm.cortexm4.CC26xx');
per-instance config parameters
    var params = new CC26xx.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CC26xx.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CC26xx.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CC26xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CC26xx.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CC26xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CC26xx.Params;
...
params.cpuCoreRevision = String "1.0";
config CC26xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CC26xx.Params;
...
params.dataWordSize = Int 4;
config CC26xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CC26xx.Params;
...
params.deviceHeader = String undefined;
config CC26xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CC26xx.Params;
...
params.minDataUnitSize = Int 1;
config CC26xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CC26xx.Params;
...
params.minProgUnitSize = Int 1;
config CC26xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CC26xx.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CC26xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CC26xx.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CC26xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CC26xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexm4.CC32xx

metaonly module ti.catalog.arm.cortexm4.CC32xx
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all CC32xx devices independent.
Configuration settings sourced in ti/catalog/arm/cortexm4/CC32xx.xdc
var CC32xx = xdc.useModule('ti.catalog.arm.cortexm4.CC32xx');
per-instance config parameters
    var params = new CC32xx.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CC32xx.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CC32xx.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CC32xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CC32xx.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CC32xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CC32xx.Params;
...
params.cpuCoreRevision = String "1.0";
config CC32xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CC32xx.Params;
...
params.dataWordSize = Int 4;
config CC32xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CC32xx.Params;
...
params.deviceHeader = String undefined;
config CC32xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CC32xx.Params;
...
params.minDataUnitSize = Int 1;
config CC32xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CC32xx.Params;
...
params.minProgUnitSize = Int 1;
config CC32xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CC32xx.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CC32xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CC32xx.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CC32xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CC32xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexm4.DRA7XX

metaonly module ti.catalog.arm.cortexm4.DRA7XX
index URL

The DRA7XX device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm4/DRA7XX.xdc
var DRA7XX = xdc.useModule('ti.catalog.arm.cortexm4.DRA7XX');
per-instance config parameters
    var params = new DRA7XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_ROM",
                {
                    name: "L2_ROM",
                    base: 0x00000000,
                    len: 0x00004000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20000000,
                    len: 0x00010000
                }
            ],
            [
                "OCMC_RAM1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                    name: "OCMC_RAM1",
                    base: 0x40300000,
                    len: 0x00080000
                }
            ],
            [
                "OCMC_RAM2",
                {
                    comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                    name: "OCMC_RAM2",
                    base: 0x40400000,
                    len: 0x00100000
                }
            ],
            [
                "OCMC_RAM3",
                {
                    comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                    name: "OCMC_RAM3",
                    base: 0x40500000,
                    len: 0x00100000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = DRA7XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new DRA7XX.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_ROM",
            {
                name: "L2_ROM",
                base: 0x00000000,
                len: 0x00004000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20000000,
                len: 0x00010000
            }
        ],
        [
            "OCMC_RAM1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                name: "OCMC_RAM1",
                base: 0x40300000,
                len: 0x00080000
            }
        ],
        [
            "OCMC_RAM2",
            {
                comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                name: "OCMC_RAM2",
                base: 0x40400000,
                len: 0x00100000
            }
        ],
        [
            "OCMC_RAM3",
            {
                comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                name: "OCMC_RAM3",
                base: 0x40500000,
                len: 0x00100000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config DRA7XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config DRA7XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCoreRevision = String "1.0";
config DRA7XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.dataWordSize = Int 4;
config DRA7XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new DRA7XX.Params;
...
params.deviceHeader = String undefined;
config DRA7XX.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new DRA7XX.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config DRA7XX.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new DRA7XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_ROM",
        {
            name: "L2_ROM",
            base: 0x00000000,
            len: 0x00004000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20000000,
            len: 0x00010000
        }
    ],
    [
        "OCMC_RAM1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
            name: "OCMC_RAM1",
            base: 0x40300000,
            len: 0x00080000
        }
    ],
    [
        "OCMC_RAM2",
        {
            comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
            name: "OCMC_RAM2",
            base: 0x40400000,
            len: 0x00100000
        }
    ],
    [
        "OCMC_RAM3",
        {
            comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
            name: "OCMC_RAM3",
            base: 0x40500000,
            len: 0x00100000
        }
    ]
];
config DRA7XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minDataUnitSize = Int 1;
config DRA7XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minProgUnitSize = Int 1;
config DRA7XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new DRA7XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new DRA7XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DRA7XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
DRA7XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
DRA7XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.MSP432

metaonly module ti.catalog.arm.cortexm4.MSP432
index URL

Generic MSP432 definition

  • Configuration settings
  • Individual elements
This generic device represents all MSP432 devices.
Configuration settings sourced in ti/catalog/arm/cortexm4/MSP432.xdc
var MSP432 = xdc.useModule('ti.catalog.arm.cortexm4.MSP432');
per-instance config parameters
    var params = new MSP432.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = MSP432.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP432.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config MSP432.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP432.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP432.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP432.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP432.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP432.Params;
...
params.dataWordSize = Int 4;
config MSP432.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP432.Params;
...
params.deviceHeader = String undefined;
config MSP432.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP432.Params;
...
params.minDataUnitSize = Int 1;
config MSP432.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP432.Params;
...
params.minProgUnitSize = Int 1;
config MSP432.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP432.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP432.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP432.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP432.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP432.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.MSP432E

metaonly module ti.catalog.arm.cortexm4.MSP432E
index URL

Generic MSP432E Cpu definition

  • Configuration settings
  • Individual elements
This device represents all MSP432E devices independent.
Configuration settings sourced in ti/catalog/arm/cortexm4/MSP432E.xdc
var MSP432E = xdc.useModule('ti.catalog.arm.cortexm4.MSP432E');
per-instance config parameters
    var params = new MSP432E.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = MSP432E.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP432E.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config MSP432E.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP432E.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP432E.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP432E.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP432E.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP432E.Params;
...
params.dataWordSize = Int 4;
config MSP432E.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP432E.Params;
...
params.deviceHeader = String undefined;
config MSP432E.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP432E.Params;
...
params.minDataUnitSize = Int 1;
config MSP432E.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP432E.Params;
...
params.minProgUnitSize = Int 1;
config MSP432E.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP432E.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP432E.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP432E.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP432E.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP432E.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.OMAP5430

metaonly module ti.catalog.arm.cortexm4.OMAP5430
index URL

The OMAP5430 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm4/OMAP5430.xdc
var OMAP5430 = xdc.useModule('ti.catalog.arm.cortexm4.OMAP5430');
per-instance config parameters
    var params = new OMAP5430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_ROM",
                {
                    name: "L2_ROM",
                    base: 0x00000000,
                    len: 0x00004000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20000000,
                    len: 0x00010000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP5430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP5430.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_ROM",
            {
                name: "L2_ROM",
                base: 0x00000000,
                len: 0x00004000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20000000,
                len: 0x00010000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP5430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP5430.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP5430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP5430.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP5430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.dataWordSize = Int 4;
config OMAP5430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP5430.Params;
...
params.deviceHeader = String undefined;
config OMAP5430.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new OMAP5430.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config OMAP5430.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new OMAP5430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_ROM",
        {
            name: "L2_ROM",
            base: 0x00000000,
            len: 0x00004000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20000000,
            len: 0x00010000
        }
    ]
];
config OMAP5430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.minDataUnitSize = Int 1;
config OMAP5430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.minProgUnitSize = Int 1;
config OMAP5430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP5430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP5430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP5430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP5430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP5430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.TDA3XX

metaonly module ti.catalog.arm.cortexm4.TDA3XX
index URL

The TDA3XX device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm4/TDA3XX.xdc
var TDA3XX = xdc.useModule('ti.catalog.arm.cortexm4.TDA3XX');
per-instance config parameters
    var params = new TDA3XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_ROM",
                {
                    name: "L2_ROM",
                    base: 0x00000000,
                    len: 0x00004000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20000000,
                    len: 0x00010000
                }
            ],
            [
                "OCMC_RAM",
                {
                    name: "OCMC_RAM",
                    base: 0x40300000,
                    len: 0x00080000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TDA3XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TDA3XX.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_ROM",
            {
                name: "L2_ROM",
                base: 0x00000000,
                len: 0x00004000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20000000,
                len: 0x00010000
            }
        ],
        [
            "OCMC_RAM",
            {
                name: "OCMC_RAM",
                base: 0x40300000,
                len: 0x00080000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TDA3XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TDA3XX.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TDA3XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TDA3XX.Params;
...
params.cpuCoreRevision = String "1.0";
config TDA3XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.dataWordSize = Int 4;
config TDA3XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TDA3XX.Params;
...
params.deviceHeader = String undefined;
config TDA3XX.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TDA3XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_ROM",
        {
            name: "L2_ROM",
            base: 0x00000000,
            len: 0x00004000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20000000,
            len: 0x00010000
        }
    ],
    [
        "OCMC_RAM",
        {
            name: "OCMC_RAM",
            base: 0x40300000,
            len: 0x00080000
        }
    ]
];
config TDA3XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.minDataUnitSize = Int 1;
config TDA3XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.minProgUnitSize = Int 1;
config TDA3XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TDA3XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TDA3XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TDA3XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TDA3XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TDA3XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.Tiva

metaonly module ti.catalog.arm.cortexm4.Tiva
index URL

Generic Tiva Cpu definition

  • Configuration settings
  • Individual elements
This device represents all Tiva devices independent.
Configuration settings sourced in ti/catalog/arm/cortexm4/Tiva.xdc
var Tiva = xdc.useModule('ti.catalog.arm.cortexm4.Tiva');
per-instance config parameters
    var params = new Tiva.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Tiva.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Tiva.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Tiva.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Tiva.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Tiva.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Tiva.Params;
...
params.cpuCoreRevision = String "1.0";
config Tiva.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Tiva.Params;
...
params.dataWordSize = Int 4;
config Tiva.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Tiva.Params;
...
params.deviceHeader = String undefined;
config Tiva.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Tiva.Params;
...
params.minDataUnitSize = Int 1;
config Tiva.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Tiva.Params;
...
params.minProgUnitSize = Int 1;
config Tiva.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Tiva.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Tiva.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Tiva.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Tiva.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Tiva.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.Vayu

metaonly module ti.catalog.arm.cortexm4.Vayu
index URL

The Vayu device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arm/cortexm4/Vayu.xdc
var Vayu = xdc.useModule('ti.catalog.arm.cortexm4.Vayu');
per-instance config parameters
    var params = new Vayu.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "CM4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "L2_ROM",
                {
                    name: "L2_ROM",
                    base: 0x00000000,
                    len: 0x00004000
                }
            ],
            [
                "L2_RAM",
                {
                    name: "L2_RAM",
                    base: 0x20000000,
                    len: 0x00010000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Vayu.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Vayu.Params;
// Instance config-params object
    params.cpuCore = String "CM4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "L2_ROM",
            {
                name: "L2_ROM",
                base: 0x00000000,
                len: 0x00004000
            }
        ],
        [
            "L2_RAM",
            {
                name: "L2_RAM",
                base: 0x20000000,
                len: 0x00010000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Vayu.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCore = String "CM4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Vayu.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCoreRevision = String "1.0";
config Vayu.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.dataWordSize = Int 4;
config Vayu.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Vayu.Params;
...
params.deviceHeader = String undefined;
config Vayu.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new Vayu.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config Vayu.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new Vayu.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2_ROM",
        {
            name: "L2_ROM",
            base: 0x00000000,
            len: 0x00004000
        }
    ],
    [
        "L2_RAM",
        {
            name: "L2_RAM",
            base: 0x20000000,
            len: 0x00010000
        }
    ]
];
config Vayu.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minDataUnitSize = Int 1;
config Vayu.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minProgUnitSize = Int 1;
config Vayu.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Vayu.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Vayu.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Vayu.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Vayu.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Vayu.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:29 GMT


package ti.catalog.arm.cortexm4.tiva.ce
index URL

Cortex LM3 boot time initialization support

XDCspec declarations sourced in ti/catalog/arm/cortexm4/tiva/ce/package.xdc
package ti.catalog.arm.cortexm4.tiva.ce [1, 0, 0] {
    module Boot;
    // Stellaris M3 Boot Support
}
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.cortexm4.tiva.ce.Boot
index URL

Stellaris M3 Boot Support

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The Boot module supports boot initialization for the Stellaris M3 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing). [ more ... ]
C synopsis target-domain sourced in ti/catalog/arm/cortexm4/tiva/ce/Boot.xdc
#include <ti/catalog/arm/cortexm4/tiva/ce/Boot.h>
Functions
ULong | Boot_sysCtlClockFreqSet// (ULong ulConfig, ULong ulSysClock);
Void | Boot_sysCtlClockSet// (ULong ulConfig);
Functions common to all target modules
 | Boot_Module_getMask// Returns the diagnostics mask for this module, Boot_Module_hasMask// Test whether this module has a diagnostics mask, Boot_Module_heap// The heap from which this module allocates memory, Boot_Module_id// Get this module's unique id, Boot_Module_setMask// Set the diagnostics mask for this module, Boot_Module_startupDone// Test if this module has completed startup
Constants
extern const Assert_Id | Boot_A_mustNotUseEnhancedClockMode// Asserted in Boot_sysCtlClockFreqSet;
extern const Assert_Id | Boot_A_mustUseEnhancedClockMode// Asserted in Boot_sysCtlClockSet;
DETAILS
The Boot module supports boot initialization for the Stellaris M3 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
config Boot_A_mustNotUseEnhancedClockMode // module-wide
index URL

Asserted in Boot_sysCtlClockFreqSet

C synopsis target-domain
extern const Assert_Id Boot_A_mustNotUseEnhancedClockMode;
config Boot_A_mustUseEnhancedClockMode // module-wide
index URL

Asserted in Boot_sysCtlClockSet

C synopsis target-domain
extern const Assert_Id Boot_A_mustUseEnhancedClockMode;
Boot_sysCtlClockFreqSet() // module-wide
index URL
C synopsis target-domain
ULong Boot_sysCtlClockFreqSet(ULong ulConfig, ULong ulSysClock);
Boot_sysCtlClockSet() // module-wide
index URL
C synopsis target-domain
Void Boot_sysCtlClockSet(ULong ulConfig);
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Boot_Module_id();
// Get this module's unique id
Bool Boot_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Boot_Module_heap();
// The heap from which this module allocates memory
Bool Boot_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Boot_Module_getMask();
// Returns the diagnostics mask for this module
Void Boot_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in ti/catalog/arm/cortexm4/tiva/ce/Boot.xdc
var Boot = xdc.useModule('ti.catalog.arm.cortexm4.tiva.ce.Boot');
module-wide constants & types
    values of type Boot.LdoOut//
        const Boot.LDOPCTL_2_55V;
        const Boot.LDOPCTL_2_60V;
        const Boot.LDOPCTL_2_65V;
        const Boot.LDOPCTL_2_70V;
        const Boot.LDOPCTL_2_75V;
        const Boot.LDOPCTL_2_25V;
        const Boot.LDOPCTL_2_30V;
        const Boot.LDOPCTL_2_35V;
        const Boot.LDOPCTL_2_40V;
        const Boot.LDOPCTL_2_45V;
        const Boot.LDOPCTL_2_50V;
    values of type Boot.OscSrc//
        const Boot.OSCSRC_MAIN// Main oscillator;
        const Boot.OSCSRC_INT// Internal oscillator;
        const Boot.OSCSRC_INT4// Internal oscillator / 4;
        const Boot.OSCSRC_INT30// Internal 30 KHz oscillator;
        const Boot.OSCSRC_EXT4_19// External 4.19 MHz;
        const Boot.OSCSRC_EXT32// External 32 KHz;
    values of type Boot.PwmDiv//
        const Boot.PWMDIV_1// PWM clock /1;
        const Boot.PWMDIV_2// PWM clock /2;
        const Boot.PWMDIV_4// PWM clock /4;
        const Boot.PWMDIV_8// PWM clock /8;
        const Boot.PWMDIV_16// PWM clock /16;
        const Boot.PWMDIV_32// PWM clock /32;
        const Boot.PWMDIV_64// PWM clock /64;
    values of type Boot.SysDiv//
        const Boot.SYSDIV_1// CPU clock is osc/pll / 1;
        const Boot.SYSDIV_2// CPU clock is osc/pll / 2;
        const Boot.SYSDIV_3// CPU clock is osc/pll / 3;
        const Boot.SYSDIV_4// CPU clock is osc/pll / 4;
        const Boot.SYSDIV_5// CPU clock is osc/pll / 5;
        const Boot.SYSDIV_6// CPU clock is osc/pll / 6;
        const Boot.SYSDIV_7// CPU clock is osc/pll / 7;
        const Boot.SYSDIV_8// CPU clock is osc/pll / 8;
        const Boot.SYSDIV_9// CPU clock is osc/pll / 9;
        const Boot.SYSDIV_10// CPU clock is osc/pll / 10;
        const Boot.SYSDIV_11// CPU clock is osc/pll / 11;
        const Boot.SYSDIV_12// CPU clock is osc/pll / 12;
        const Boot.SYSDIV_13// CPU clock is osc/pll / 13;
        const Boot.SYSDIV_14// CPU clock is osc/pll / 14;
        const Boot.SYSDIV_15// CPU clock is osc/pll / 15;
        const Boot.SYSDIV_16// CPU clock is osc/pll / 16;
        const Boot.SYSDIV_17// CPU clock is osc/pll / 17;
        const Boot.SYSDIV_18// CPU clock is osc/pll / 18;
        const Boot.SYSDIV_19// CPU clock is osc/pll / 19;
        const Boot.SYSDIV_20// CPU clock is osc/pll / 20;
        const Boot.SYSDIV_21// CPU clock is osc/pll / 21;
        const Boot.SYSDIV_22// CPU clock is osc/pll / 22;
        const Boot.SYSDIV_23// CPU clock is osc/pll / 23;
        const Boot.SYSDIV_24// CPU clock is osc/pll / 24;
        const Boot.SYSDIV_25// CPU clock is osc/pll / 25;
        const Boot.SYSDIV_26// CPU clock is osc/pll / 26;
        const Boot.SYSDIV_27// CPU clock is osc/pll / 27;
        const Boot.SYSDIV_28// CPU clock is osc/pll / 28;
        const Boot.SYSDIV_29// CPU clock is osc/pll / 29;
        const Boot.SYSDIV_30// CPU clock is osc/pll / 30;
        const Boot.SYSDIV_31// CPU clock is osc/pll / 31;
        const Boot.SYSDIV_32// CPU clock is osc/pll / 32;
        const Boot.SYSDIV_33// CPU clock is osc/pll / 33;
        const Boot.SYSDIV_34// CPU clock is osc/pll / 34;
        const Boot.SYSDIV_35// CPU clock is osc/pll / 35;
        const Boot.SYSDIV_36// CPU clock is osc/pll / 36;
        const Boot.SYSDIV_37// CPU clock is osc/pll / 37;
        const Boot.SYSDIV_38// CPU clock is osc/pll / 38;
        const Boot.SYSDIV_39// CPU clock is osc/pll / 39;
        const Boot.SYSDIV_40// CPU clock is osc/pll / 40;
        const Boot.SYSDIV_41// CPU clock is osc/pll / 41;
        const Boot.SYSDIV_42// CPU clock is osc/pll / 42;
        const Boot.SYSDIV_43// CPU clock is osc/pll / 43;
        const Boot.SYSDIV_44// CPU clock is osc/pll / 44;
        const Boot.SYSDIV_45// CPU clock is osc/pll / 45;
        const Boot.SYSDIV_46// CPU clock is osc/pll / 46;
        const Boot.SYSDIV_47// CPU clock is osc/pll / 47;
        const Boot.SYSDIV_48// CPU clock is osc/pll / 48;
        const Boot.SYSDIV_49// CPU clock is osc/pll / 49;
        const Boot.SYSDIV_50// CPU clock is osc/pll / 50;
        const Boot.SYSDIV_51// CPU clock is osc/pll / 51;
        const Boot.SYSDIV_52// CPU clock is osc/pll / 52;
        const Boot.SYSDIV_53// CPU clock is osc/pll / 53;
        const Boot.SYSDIV_54// CPU clock is osc/pll / 54;
        const Boot.SYSDIV_55// CPU clock is osc/pll / 55;
        const Boot.SYSDIV_56// CPU clock is osc/pll / 56;
        const Boot.SYSDIV_57// CPU clock is osc/pll / 57;
        const Boot.SYSDIV_58// CPU clock is osc/pll / 58;
        const Boot.SYSDIV_59// CPU clock is osc/pll / 59;
        const Boot.SYSDIV_60// CPU clock is osc/pll / 60;
        const Boot.SYSDIV_61// CPU clock is osc/pll / 61;
        const Boot.SYSDIV_62// CPU clock is osc/pll / 62;
        const Boot.SYSDIV_63// CPU clock is osc/pll / 63;
        const Boot.SYSDIV_64// CPU clock is osc/pll / 64;
        const Boot.SYSDIV_2_5// CPU clock is osc/pll / 2.5;
        const Boot.SYSDIV_3_5// CPU clock is osc/pll / 3.5;
        const Boot.SYSDIV_4_5// CPU clock is osc/pll / 4.5;
        const Boot.SYSDIV_5_5// CPU clock is osc/pll / 5.5;
        const Boot.SYSDIV_6_5// CPU clock is osc/pll / 6.5;
        const Boot.SYSDIV_7_5// CPU clock is osc/pll / 7.5;
        const Boot.SYSDIV_8_5// CPU clock is osc/pll / 8.5;
        const Boot.SYSDIV_9_5// CPU clock is osc/pll / 9.5;
        const Boot.SYSDIV_10_5// CPU clock is osc/pll / 10.5;
        const Boot.SYSDIV_11_5// CPU clock is osc/pll / 11.5;
        const Boot.SYSDIV_12_5// CPU clock is osc/pll / 12.5;
        const Boot.SYSDIV_13_5// CPU clock is osc/pll / 13.5;
        const Boot.SYSDIV_14_5// CPU clock is osc/pll / 14.5;
        const Boot.SYSDIV_15_5// CPU clock is osc/pll / 15.5;
        const Boot.SYSDIV_16_5// CPU clock is osc/pll / 16.5;
        const Boot.SYSDIV_17_5// CPU clock is osc/pll / 17.5;
        const Boot.SYSDIV_18_5// CPU clock is osc/pll / 18.5;
        const Boot.SYSDIV_19_5// CPU clock is osc/pll / 19.5;
        const Boot.SYSDIV_20_5// CPU clock is osc/pll / 20.5;
        const Boot.SYSDIV_21_5// CPU clock is osc/pll / 21.5;
        const Boot.SYSDIV_22_5// CPU clock is osc/pll / 22.5;
        const Boot.SYSDIV_23_5// CPU clock is osc/pll / 23.5;
        const Boot.SYSDIV_24_5// CPU clock is osc/pll / 24.5;
        const Boot.SYSDIV_25_5// CPU clock is osc/pll / 25.5;
        const Boot.SYSDIV_26_5// CPU clock is osc/pll / 26.5;
        const Boot.SYSDIV_27_5// CPU clock is osc/pll / 27.5;
        const Boot.SYSDIV_28_5// CPU clock is osc/pll / 28.5;
        const Boot.SYSDIV_29_5// CPU clock is osc/pll / 29.5;
        const Boot.SYSDIV_30_5// CPU clock is osc/pll / 30.5;
        const Boot.SYSDIV_31_5// CPU clock is osc/pll / 31.5;
        const Boot.SYSDIV_32_5// CPU clock is osc/pll / 32.5;
        const Boot.SYSDIV_33_5// CPU clock is osc/pll / 33.5;
        const Boot.SYSDIV_34_5// CPU clock is osc/pll / 34.5;
        const Boot.SYSDIV_35_5// CPU clock is osc/pll / 35.5;
        const Boot.SYSDIV_36_5// CPU clock is osc/pll / 36.5;
        const Boot.SYSDIV_37_5// CPU clock is osc/pll / 37.5;
        const Boot.SYSDIV_38_5// CPU clock is osc/pll / 38.5;
        const Boot.SYSDIV_39_5// CPU clock is osc/pll / 39.5;
        const Boot.SYSDIV_40_5// CPU clock is osc/pll / 40.5;
        const Boot.SYSDIV_41_5// CPU clock is osc/pll / 41.5;
        const Boot.SYSDIV_42_5// CPU clock is osc/pll / 42.5;
        const Boot.SYSDIV_43_5// CPU clock is osc/pll / 43.5;
        const Boot.SYSDIV_44_5// CPU clock is osc/pll / 44.5;
        const Boot.SYSDIV_45_5// CPU clock is osc/pll / 45.5;
        const Boot.SYSDIV_46_5// CPU clock is osc/pll / 46.5;
        const Boot.SYSDIV_47_5// CPU clock is osc/pll / 47.5;
        const Boot.SYSDIV_48_5// CPU clock is osc/pll / 48.5;
        const Boot.SYSDIV_49_5// CPU clock is osc/pll / 49.5;
        const Boot.SYSDIV_50_5// CPU clock is osc/pll / 50.5;
        const Boot.SYSDIV_51_5// CPU clock is osc/pll / 51.5;
        const Boot.SYSDIV_52_5// CPU clock is osc/pll / 52.5;
        const Boot.SYSDIV_53_5// CPU clock is osc/pll / 53.5;
        const Boot.SYSDIV_54_5// CPU clock is osc/pll / 54.5;
        const Boot.SYSDIV_55_5// CPU clock is osc/pll / 55.5;
        const Boot.SYSDIV_56_5// CPU clock is osc/pll / 56.5;
        const Boot.SYSDIV_57_5// CPU clock is osc/pll / 57.5;
        const Boot.SYSDIV_58_5// CPU clock is osc/pll / 58.5;
        const Boot.SYSDIV_59_5// CPU clock is osc/pll / 59.5;
        const Boot.SYSDIV_60_5// CPU clock is osc/pll / 60.5;
        const Boot.SYSDIV_61_5// CPU clock is osc/pll / 61.5;
        const Boot.SYSDIV_62_5// CPU clock is osc/pll / 62.5;
        const Boot.SYSDIV_63_5// CPU clock is osc/pll / 63.5;
    values of type Boot.VcoFreq//
        const Boot.VCO_480// VCO is 480 MHz;
        const Boot.VCO_320// VCO is 320 MHz;
    values of type Boot.XtalFreq//
        const Boot.XTAL_1MHZ// 1.0 MHz;
        const Boot.XTAL_1_84MHZ// 1.8432 MHz;
        const Boot.XTAL_2MHZ// 2.0 MHz;
        const Boot.XTAL_2_45MHZ// 2.4576 MHz;
        const Boot.XTAL_3_57MHZ// 3.579545 MHz;
        const Boot.XTAL_3_68MHZ// 3.6864 MHz;
        const Boot.XTAL_4MHZ// 4.0 MHz;
        const Boot.XTAL_4_09MHZ// 4.096 MHz;
        const Boot.XTAL_4_91MHZ// 4.9152 MHz;
        const Boot.XTAL_5MHZ// 5.0 MHz;
        const Boot.XTAL_5_12MHZ// 5.12 MHz;
        const Boot.XTAL_6MHZ// 6.0 MHz;
        const Boot.XTAL_6_14MHZ// 6.144 MHz;
        const Boot.XTAL_7_37MHZ// 7.3728 MHz;
        const Boot.XTAL_8MHZ// 8.0 MHz;
        const Boot.XTAL_8_19MHZ// 8.192 MHz;
        const Boot.XTAL_10MHZ// 10.0 MHz (USB);
        const Boot.XTAL_12MHZ// 12.0 MHz (USB);
        const Boot.XTAL_12_2MHZ// 12.288 MHz;
        const Boot.XTAL_13_5MHZ// 13.56 MHz;
        const Boot.XTAL_14_3MHZ// 14.31818 MHz;
        const Boot.XTAL_16MHZ// 16.0 MHz (USB);
        const Boot.XTAL_16_3MHZ// 16.384 MHz;
        const Boot.XTAL_18MHZ// 18.0 MHz;
        const Boot.XTAL_20MHZ// 20.0 MHz;
        const Boot.XTAL_24MHZ// 24.0 MHz;
        const Boot.XTAL_25MHZ// 25.0 MHz;
    var obj = new Boot.ModuleView// ;
        obj.configureClock = Bool ...
        obj.sysClockDivEnable = Bool ...
        obj.sysClockDiv = String ...
        obj.pwmClockDivEnable = Bool ...
        obj.pwmClockDiv = String ...
        obj.xtal = String ...
        obj.oscSrc = String ...
        obj.pllBypass = Bool ...
        obj.ioscDisable = Bool ...
        obj.moscDisable = Bool ...
module-wide config parameters
     Boot.A_mustNotUseEnhancedClockMode// Asserted in Boot_sysCtlClockFreqSet = Assert.Desc {
        msg: "A_mustNotUseEnhancedClockMode: This device does not support the Enhanced Clock Mode."
    };
     Boot.A_mustUseEnhancedClockMode// Asserted in Boot_sysCtlClockSet = Assert.Desc {
        msg: "A_mustUseEnhancedClockMode: This device requires the Enhanced Clock Mode."
    };
     Boot.common$// Common module configuration parameters = Types.Common$ undefined;
     Boot.configureClock// Clock configuration flag, default is false = Bool false;
     Boot.cpuFrequency// Desired CPU Clock Frequency in Hz = UInt 40000000;
     Boot.enhancedClockMode// Enahnced Clocking Mode = Bool false;
     Boot.ioscDisable// Internal Oscillator Disable flag = Bool false;
     Boot.moscDisable// Main Oscillator Disable flag = Bool false;
     Boot.oscSrc// Oscillator Source = Boot.OscSrc Boot.OSCSRC_MAIN;
     Boot.pllBypass// PLL Bypass flag = Bool false;
     Boot.pwmClockDiv// PWM Clock Divisor = Boot.PwmDiv Boot.PWMDIV_1;
     Boot.rovViewInfo// = ViewInfo.Instance ViewInfo.create;
     Boot.sysClockDiv// SYS Clock Divisor = Boot.SysDiv Boot.SYSDIV_1;
     Boot.vcoFreq// VCO frequency = Boot.VcoFreq Boot.VCO_320;
     Boot.xtal// Crystal Value = Boot.XtalFreq Boot.XTAL_1MHZ;
metaonly enum Boot.LdoOut
index URL
Configuration settings
values of type Boot.LdoOut
    const Boot.LDOPCTL_2_55V;
    const Boot.LDOPCTL_2_60V;
    const Boot.LDOPCTL_2_65V;
    const Boot.LDOPCTL_2_70V;
    const Boot.LDOPCTL_2_75V;
    const Boot.LDOPCTL_2_25V;
    const Boot.LDOPCTL_2_30V;
    const Boot.LDOPCTL_2_35V;
    const Boot.LDOPCTL_2_40V;
    const Boot.LDOPCTL_2_45V;
    const Boot.LDOPCTL_2_50V;
metaonly enum Boot.OscSrc
index URL
Configuration settings
values of type Boot.OscSrc
    const Boot.OSCSRC_MAIN;
    // Main oscillator
    const Boot.OSCSRC_INT;
    // Internal oscillator
    const Boot.OSCSRC_INT4;
    // Internal oscillator / 4
    const Boot.OSCSRC_INT30;
    // Internal 30 KHz oscillator
    const Boot.OSCSRC_EXT4_19;
    // External 4.19 MHz
    const Boot.OSCSRC_EXT32;
    // External 32 KHz
metaonly enum Boot.PwmDiv
index URL
Configuration settings
values of type Boot.PwmDiv
    const Boot.PWMDIV_1;
    // PWM clock /1
    const Boot.PWMDIV_2;
    // PWM clock /2
    const Boot.PWMDIV_4;
    // PWM clock /4
    const Boot.PWMDIV_8;
    // PWM clock /8
    const Boot.PWMDIV_16;
    // PWM clock /16
    const Boot.PWMDIV_32;
    // PWM clock /32
    const Boot.PWMDIV_64;
    // PWM clock /64
metaonly enum Boot.SysDiv
index URL
Configuration settings
values of type Boot.SysDiv
    const Boot.SYSDIV_1;
    // CPU clock is osc/pll / 1
    const Boot.SYSDIV_2;
    // CPU clock is osc/pll / 2
    const Boot.SYSDIV_3;
    // CPU clock is osc/pll / 3
    const Boot.SYSDIV_4;
    // CPU clock is osc/pll / 4
    const Boot.SYSDIV_5;
    // CPU clock is osc/pll / 5
    const Boot.SYSDIV_6;
    // CPU clock is osc/pll / 6
    const Boot.SYSDIV_7;
    // CPU clock is osc/pll / 7
    const Boot.SYSDIV_8;
    // CPU clock is osc/pll / 8
    const Boot.SYSDIV_9;
    // CPU clock is osc/pll / 9
    const Boot.SYSDIV_10;
    // CPU clock is osc/pll / 10
    const Boot.SYSDIV_11;
    // CPU clock is osc/pll / 11
    const Boot.SYSDIV_12;
    // CPU clock is osc/pll / 12
    const Boot.SYSDIV_13;
    // CPU clock is osc/pll / 13
    const Boot.SYSDIV_14;
    // CPU clock is osc/pll / 14
    const Boot.SYSDIV_15;
    // CPU clock is osc/pll / 15
    const Boot.SYSDIV_16;
    // CPU clock is osc/pll / 16
    const Boot.SYSDIV_17;
    // CPU clock is osc/pll / 17
    const Boot.SYSDIV_18;
    // CPU clock is osc/pll / 18
    const Boot.SYSDIV_19;
    // CPU clock is osc/pll / 19
    const Boot.SYSDIV_20;
    // CPU clock is osc/pll / 20
    const Boot.SYSDIV_21;
    // CPU clock is osc/pll / 21
    const Boot.SYSDIV_22;
    // CPU clock is osc/pll / 22
    const Boot.SYSDIV_23;
    // CPU clock is osc/pll / 23
    const Boot.SYSDIV_24;
    // CPU clock is osc/pll / 24
    const Boot.SYSDIV_25;
    // CPU clock is osc/pll / 25
    const Boot.SYSDIV_26;
    // CPU clock is osc/pll / 26
    const Boot.SYSDIV_27;
    // CPU clock is osc/pll / 27
    const Boot.SYSDIV_28;
    // CPU clock is osc/pll / 28
    const Boot.SYSDIV_29;
    // CPU clock is osc/pll / 29
    const Boot.SYSDIV_30;
    // CPU clock is osc/pll / 30
    const Boot.SYSDIV_31;
    // CPU clock is osc/pll / 31
    const Boot.SYSDIV_32;
    // CPU clock is osc/pll / 32
    const Boot.SYSDIV_33;
    // CPU clock is osc/pll / 33
    const Boot.SYSDIV_34;
    // CPU clock is osc/pll / 34
    const Boot.SYSDIV_35;
    // CPU clock is osc/pll / 35
    const Boot.SYSDIV_36;
    // CPU clock is osc/pll / 36
    const Boot.SYSDIV_37;
    // CPU clock is osc/pll / 37
    const Boot.SYSDIV_38;
    // CPU clock is osc/pll / 38
    const Boot.SYSDIV_39;
    // CPU clock is osc/pll / 39
    const Boot.SYSDIV_40;
    // CPU clock is osc/pll / 40
    const Boot.SYSDIV_41;
    // CPU clock is osc/pll / 41
    const Boot.SYSDIV_42;
    // CPU clock is osc/pll / 42
    const Boot.SYSDIV_43;
    // CPU clock is osc/pll / 43
    const Boot.SYSDIV_44;
    // CPU clock is osc/pll / 44
    const Boot.SYSDIV_45;
    // CPU clock is osc/pll / 45
    const Boot.SYSDIV_46;
    // CPU clock is osc/pll / 46
    const Boot.SYSDIV_47;
    // CPU clock is osc/pll / 47
    const Boot.SYSDIV_48;
    // CPU clock is osc/pll / 48
    const Boot.SYSDIV_49;
    // CPU clock is osc/pll / 49
    const Boot.SYSDIV_50;
    // CPU clock is osc/pll / 50
    const Boot.SYSDIV_51;
    // CPU clock is osc/pll / 51
    const Boot.SYSDIV_52;
    // CPU clock is osc/pll / 52
    const Boot.SYSDIV_53;
    // CPU clock is osc/pll / 53
    const Boot.SYSDIV_54;
    // CPU clock is osc/pll / 54
    const Boot.SYSDIV_55;
    // CPU clock is osc/pll / 55
    const Boot.SYSDIV_56;
    // CPU clock is osc/pll / 56
    const Boot.SYSDIV_57;
    // CPU clock is osc/pll / 57
    const Boot.SYSDIV_58;
    // CPU clock is osc/pll / 58
    const Boot.SYSDIV_59;
    // CPU clock is osc/pll / 59
    const Boot.SYSDIV_60;
    // CPU clock is osc/pll / 60
    const Boot.SYSDIV_61;
    // CPU clock is osc/pll / 61
    const Boot.SYSDIV_62;
    // CPU clock is osc/pll / 62
    const Boot.SYSDIV_63;
    // CPU clock is osc/pll / 63
    const Boot.SYSDIV_64;
    // CPU clock is osc/pll / 64
    const Boot.SYSDIV_2_5;
    // CPU clock is osc/pll / 2.5
    const Boot.SYSDIV_3_5;
    // CPU clock is osc/pll / 3.5
    const Boot.SYSDIV_4_5;
    // CPU clock is osc/pll / 4.5
    const Boot.SYSDIV_5_5;
    // CPU clock is osc/pll / 5.5
    const Boot.SYSDIV_6_5;
    // CPU clock is osc/pll / 6.5
    const Boot.SYSDIV_7_5;
    // CPU clock is osc/pll / 7.5
    const Boot.SYSDIV_8_5;
    // CPU clock is osc/pll / 8.5
    const Boot.SYSDIV_9_5;
    // CPU clock is osc/pll / 9.5
    const Boot.SYSDIV_10_5;
    // CPU clock is osc/pll / 10.5
    const Boot.SYSDIV_11_5;
    // CPU clock is osc/pll / 11.5
    const Boot.SYSDIV_12_5;
    // CPU clock is osc/pll / 12.5
    const Boot.SYSDIV_13_5;
    // CPU clock is osc/pll / 13.5
    const Boot.SYSDIV_14_5;
    // CPU clock is osc/pll / 14.5
    const Boot.SYSDIV_15_5;
    // CPU clock is osc/pll / 15.5
    const Boot.SYSDIV_16_5;
    // CPU clock is osc/pll / 16.5
    const Boot.SYSDIV_17_5;
    // CPU clock is osc/pll / 17.5
    const Boot.SYSDIV_18_5;
    // CPU clock is osc/pll / 18.5
    const Boot.SYSDIV_19_5;
    // CPU clock is osc/pll / 19.5
    const Boot.SYSDIV_20_5;
    // CPU clock is osc/pll / 20.5
    const Boot.SYSDIV_21_5;
    // CPU clock is osc/pll / 21.5
    const Boot.SYSDIV_22_5;
    // CPU clock is osc/pll / 22.5
    const Boot.SYSDIV_23_5;
    // CPU clock is osc/pll / 23.5
    const Boot.SYSDIV_24_5;
    // CPU clock is osc/pll / 24.5
    const Boot.SYSDIV_25_5;
    // CPU clock is osc/pll / 25.5
    const Boot.SYSDIV_26_5;
    // CPU clock is osc/pll / 26.5
    const Boot.SYSDIV_27_5;
    // CPU clock is osc/pll / 27.5
    const Boot.SYSDIV_28_5;
    // CPU clock is osc/pll / 28.5
    const Boot.SYSDIV_29_5;
    // CPU clock is osc/pll / 29.5
    const Boot.SYSDIV_30_5;
    // CPU clock is osc/pll / 30.5
    const Boot.SYSDIV_31_5;
    // CPU clock is osc/pll / 31.5
    const Boot.SYSDIV_32_5;
    // CPU clock is osc/pll / 32.5
    const Boot.SYSDIV_33_5;
    // CPU clock is osc/pll / 33.5
    const Boot.SYSDIV_34_5;
    // CPU clock is osc/pll / 34.5
    const Boot.SYSDIV_35_5;
    // CPU clock is osc/pll / 35.5
    const Boot.SYSDIV_36_5;
    // CPU clock is osc/pll / 36.5
    const Boot.SYSDIV_37_5;
    // CPU clock is osc/pll / 37.5
    const Boot.SYSDIV_38_5;
    // CPU clock is osc/pll / 38.5
    const Boot.SYSDIV_39_5;
    // CPU clock is osc/pll / 39.5
    const Boot.SYSDIV_40_5;
    // CPU clock is osc/pll / 40.5
    const Boot.SYSDIV_41_5;
    // CPU clock is osc/pll / 41.5
    const Boot.SYSDIV_42_5;
    // CPU clock is osc/pll / 42.5
    const Boot.SYSDIV_43_5;
    // CPU clock is osc/pll / 43.5
    const Boot.SYSDIV_44_5;
    // CPU clock is osc/pll / 44.5
    const Boot.SYSDIV_45_5;
    // CPU clock is osc/pll / 45.5
    const Boot.SYSDIV_46_5;
    // CPU clock is osc/pll / 46.5
    const Boot.SYSDIV_47_5;
    // CPU clock is osc/pll / 47.5
    const Boot.SYSDIV_48_5;
    // CPU clock is osc/pll / 48.5
    const Boot.SYSDIV_49_5;
    // CPU clock is osc/pll / 49.5
    const Boot.SYSDIV_50_5;
    // CPU clock is osc/pll / 50.5
    const Boot.SYSDIV_51_5;
    // CPU clock is osc/pll / 51.5
    const Boot.SYSDIV_52_5;
    // CPU clock is osc/pll / 52.5
    const Boot.SYSDIV_53_5;
    // CPU clock is osc/pll / 53.5
    const Boot.SYSDIV_54_5;
    // CPU clock is osc/pll / 54.5
    const Boot.SYSDIV_55_5;
    // CPU clock is osc/pll / 55.5
    const Boot.SYSDIV_56_5;
    // CPU clock is osc/pll / 56.5
    const Boot.SYSDIV_57_5;
    // CPU clock is osc/pll / 57.5
    const Boot.SYSDIV_58_5;
    // CPU clock is osc/pll / 58.5
    const Boot.SYSDIV_59_5;
    // CPU clock is osc/pll / 59.5
    const Boot.SYSDIV_60_5;
    // CPU clock is osc/pll / 60.5
    const Boot.SYSDIV_61_5;
    // CPU clock is osc/pll / 61.5
    const Boot.SYSDIV_62_5;
    // CPU clock is osc/pll / 62.5
    const Boot.SYSDIV_63_5;
    // CPU clock is osc/pll / 63.5
metaonly enum Boot.VcoFreq
index URL
Configuration settings
values of type Boot.VcoFreq
    const Boot.VCO_480;
    // VCO is 480 MHz
    const Boot.VCO_320;
    // VCO is 320 MHz
metaonly enum Boot.XtalFreq
index URL
Configuration settings
values of type Boot.XtalFreq
    const Boot.XTAL_1MHZ;
    // 1.0 MHz
    const Boot.XTAL_1_84MHZ;
    // 1.8432 MHz
    const Boot.XTAL_2MHZ;
    // 2.0 MHz
    const Boot.XTAL_2_45MHZ;
    // 2.4576 MHz
    const Boot.XTAL_3_57MHZ;
    // 3.579545 MHz
    const Boot.XTAL_3_68MHZ;
    // 3.6864 MHz
    const Boot.XTAL_4MHZ;
    // 4.0 MHz
    const Boot.XTAL_4_09MHZ;
    // 4.096 MHz
    const Boot.XTAL_4_91MHZ;
    // 4.9152 MHz
    const Boot.XTAL_5MHZ;
    // 5.0 MHz
    const Boot.XTAL_5_12MHZ;
    // 5.12 MHz
    const Boot.XTAL_6MHZ;
    // 6.0 MHz
    const Boot.XTAL_6_14MHZ;
    // 6.144 MHz
    const Boot.XTAL_7_37MHZ;
    // 7.3728 MHz
    const Boot.XTAL_8MHZ;
    // 8.0 MHz
    const Boot.XTAL_8_19MHZ;
    // 8.192 MHz
    const Boot.XTAL_10MHZ;
    // 10.0 MHz (USB)
    const Boot.XTAL_12MHZ;
    // 12.0 MHz (USB)
    const Boot.XTAL_12_2MHZ;
    // 12.288 MHz
    const Boot.XTAL_13_5MHZ;
    // 13.56 MHz
    const Boot.XTAL_14_3MHZ;
    // 14.31818 MHz
    const Boot.XTAL_16MHZ;
    // 16.0 MHz (USB)
    const Boot.XTAL_16_3MHZ;
    // 16.384 MHz
    const Boot.XTAL_18MHZ;
    // 18.0 MHz
    const Boot.XTAL_20MHZ;
    // 20.0 MHz
    const Boot.XTAL_24MHZ;
    // 24.0 MHz
    const Boot.XTAL_25MHZ;
    // 25.0 MHz
metaonly struct Boot.ModuleView
index URL
Configuration settings
var obj = new Boot.ModuleView;
    obj.configureClock = Bool ...
    obj.sysClockDivEnable = Bool ...
    obj.sysClockDiv = String ...
    obj.pwmClockDivEnable = Bool ...
    obj.pwmClockDiv = String ...
    obj.xtal = String ...
    obj.oscSrc = String ...
    obj.pllBypass = Bool ...
    obj.ioscDisable = Bool ...
    obj.moscDisable = Bool ...
config Boot.A_mustNotUseEnhancedClockMode // module-wide
index URL

Asserted in Boot_sysCtlClockFreqSet

Configuration settings
Boot.A_mustNotUseEnhancedClockMode = Assert.Desc {
    msg: "A_mustNotUseEnhancedClockMode: This device does not support the Enhanced Clock Mode."
};
C SYNOPSIS
Boot_A_mustNotUseEnhancedClockMode
config Boot.A_mustUseEnhancedClockMode // module-wide
index URL

Asserted in Boot_sysCtlClockSet

Configuration settings
Boot.A_mustUseEnhancedClockMode = Assert.Desc {
    msg: "A_mustUseEnhancedClockMode: This device requires the Enhanced Clock Mode."
};
C SYNOPSIS
Boot_A_mustUseEnhancedClockMode
metaonly config Boot.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Boot.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly config Boot.configureClock // module-wide
index URL

Clock configuration flag, default is false

Configuration settings
Boot.configureClock = Bool false;
DETAILS
Set to true to automatically configure the Clock.
metaonly config Boot.cpuFrequency // module-wide
index URL

Desired CPU Clock Frequency in Hz

Configuration settings
Boot.cpuFrequency = UInt 40000000;
DETAILS
Configurable only on devices with "Enhanced Clocking Mode" support.
metaonly config Boot.enhancedClockMode // module-wide
index URL

Enahnced Clocking Mode

Configuration settings
Boot.enhancedClockMode = Bool false;
DETAILS
Must be set to true for OneMCU devices that support this feature.
metaonly config Boot.ioscDisable // module-wide
index URL

Internal Oscillator Disable flag

Configuration settings
Boot.ioscDisable = Bool false;
metaonly config Boot.moscDisable // module-wide
index URL

Main Oscillator Disable flag

Configuration settings
Boot.moscDisable = Bool false;
metaonly config Boot.oscSrc // module-wide
index URL

Oscillator Source

Configuration settings
Boot.oscSrc = Boot.OscSrc Boot.OSCSRC_MAIN;
metaonly config Boot.pllBypass // module-wide
index URL

PLL Bypass flag

Configuration settings
Boot.pllBypass = Bool false;
metaonly config Boot.pwmClockDiv // module-wide
index URL

PWM Clock Divisor

Configuration settings
Boot.pwmClockDiv = Boot.PwmDiv Boot.PWMDIV_1;
metaonly config Boot.rovViewInfo // module-wide
index URL
Configuration settings
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
metaonly config Boot.sysClockDiv // module-wide
index URL

SYS Clock Divisor

Configuration settings
Boot.sysClockDiv = Boot.SysDiv Boot.SYSDIV_1;
metaonly config Boot.vcoFreq // module-wide
index URL

VCO frequency

Configuration settings
Boot.vcoFreq = Boot.VcoFreq Boot.VCO_320;
metaonly config Boot.xtal // module-wide
index URL

Crystal Value

Configuration settings
Boot.xtal = Boot.XtalFreq Boot.XTAL_1MHZ;
generated on Sun, 25 Nov 2018 22:19:29 GMT


package ti.catalog.arm.cortexr4
index URL

Package of devices for the arm Cortex R5 family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexr4/package.xdc
requires xdc.platform;
package ti.catalog.arm.cortexr4 [1, 0, 0] {
    module CortexR;
    // Generic Cpu definition
}
generated on Sun, 25 Nov 2018 22:19:28 GMT


module ti.catalog.arm.cortexr4.CortexR

metaonly module ti.catalog.arm.cortexr4.CortexR
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all CortexR devices.
Configuration settings sourced in ti/catalog/arm/cortexr4/CortexR.xdc
var CortexR = xdc.useModule('ti.catalog.arm.cortexr4.CortexR');
per-instance config parameters
    var params = new CortexR.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "R4";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CortexR.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CortexR.Params;
// Instance config-params object
    params.cpuCore = String "R4";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CortexR.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CortexR.Params;
...
params.cpuCore = String "R4";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CortexR.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CortexR.Params;
...
params.cpuCoreRevision = String "1.0";
config CortexR.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CortexR.Params;
...
params.dataWordSize = Int 4;
config CortexR.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CortexR.Params;
...
params.deviceHeader = String undefined;
config CortexR.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CortexR.Params;
...
params.minDataUnitSize = Int 1;
config CortexR.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CortexR.Params;
...
params.minProgUnitSize = Int 1;
config CortexR.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CortexR.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CortexR.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CortexR.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CortexR.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CortexR.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:28 GMT


package ti.catalog.arm.cortexr5
index URL

Package of devices for the arm Cortex R5 family of Arm processors

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arm/cortexr5/package.xdc
requires xdc.platform;
package ti.catalog.arm.cortexr5 [1, 0, 0] {
    module CortexR;
    // Generic Cpu definition
}
generated on Sun, 25 Nov 2018 22:19:32 GMT


module ti.catalog.arm.cortexr5.CortexR

metaonly module ti.catalog.arm.cortexr5.CortexR
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all CortexR devices.
Configuration settings sourced in ti/catalog/arm/cortexr5/CortexR.xdc
var CortexR = xdc.useModule('ti.catalog.arm.cortexr5.CortexR');
per-instance config parameters
    var params = new CortexR.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "R5";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = CortexR.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CortexR.Params;
// Instance config-params object
    params.cpuCore = String "R5";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config CortexR.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CortexR.Params;
...
params.cpuCore = String "R5";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CortexR.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CortexR.Params;
...
params.cpuCoreRevision = String "1.0";
config CortexR.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CortexR.Params;
...
params.dataWordSize = Int 4;
config CortexR.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CortexR.Params;
...
params.deviceHeader = String undefined;
config CortexR.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CortexR.Params;
...
params.minDataUnitSize = Int 1;
config CortexR.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CortexR.Params;
...
params.minProgUnitSize = Int 1;
config CortexR.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CortexR.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CortexR.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CortexR.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CortexR.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CortexR.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:32 GMT


package ti.catalog.arm.peripherals.timers
index URL

Arm timer peripherals

XDCspec declarations sourced in ti/catalog/arm/peripherals/timers/package.xdc
package ti.catalog.arm.peripherals.timers {
    module Timer;
    // Minimal timer definition
}
generated on Sun, 25 Nov 2018 22:19:29 GMT


module ti.catalog.arm.peripherals.timers.Timer

metaonly module ti.catalog.arm.peripherals.timers.Timer
index URL

Minimal timer definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/arm/peripherals/timers/Timer.xdc
var Timer = xdc.useModule('ti.catalog.arm.peripherals.timers.Timer');
module-wide functions
     Timer.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.intNum// Interrupt source number = UInt undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
Timer.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.intNum = UInt undefined;
    // Interrupt source number
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer.Params;
...
params.intNum = UInt undefined;
config Timer.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:19:29 GMT


package ti.catalog.arp32
index URL

Package of devices for the arp32 family of DSPs

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/arp32/package.xdc
requires xdc.platform;
package ti.catalog.arp32 [1, 0, 0, 0] {
    module Arctic;
    // The Arctic device data sheet module
    module DRA7XX;
    // The DRA7XX device data sheet module
    module TDA3XX;
    // The TDA3XX device data sheet module
    module TMS320C6A8149;
    // The TMS320C6A8149 device data sheet module
    module Vayu;
    // The Vayu device data sheet module
}
generated on Sun, 25 Nov 2018 22:20:49 GMT


module ti.catalog.arp32.Arctic

metaonly module ti.catalog.arp32.Arctic
index URL

The Arctic device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arp32/Arctic.xdc
var Arctic = xdc.useModule('ti.catalog.arp32.Arctic');
per-instance config parameters
    var params = new Arctic.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "ARP32";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "DMEM",
                {
                    comment: "32KB data memory",
                    name: "DMEM",
                    base: 0x40020000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "WBUF",
                {
                    comment: "VCOP work buffer",
                    name: "WBUF",
                    base: 0x40040000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLA",
                {
                    comment: "Image buffer low copy A",
                    name: "IBUFLA",
                    base: 0x40050000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHA",
                {
                    comment: "Image buffer high copy A",
                    name: "IBUFHA",
                    base: 0x40054000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLB",
                {
                    comment: "Image buffer low copy B",
                    name: "IBUFLB",
                    base: 0x40070000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHB",
                {
                    comment: "Image buffer high copy B",
                    name: "IBUFHB",
                    base: 0x40074000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "L3MEM",
                {
                    comment: "1MB L3 Memory",
                    name: "L3MEM",
                    base: 0x40300000,
                    len: 0x00100000,
                    space: "code/data",
                    page: 1,
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Arctic.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Arctic.Params;
// Instance config-params object
    params.cpuCore = String "ARP32";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "DMEM",
            {
                comment: "32KB data memory",
                name: "DMEM",
                base: 0x40020000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "WBUF",
            {
                comment: "VCOP work buffer",
                name: "WBUF",
                base: 0x40040000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLA",
            {
                comment: "Image buffer low copy A",
                name: "IBUFLA",
                base: 0x40050000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHA",
            {
                comment: "Image buffer high copy A",
                name: "IBUFHA",
                base: 0x40054000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLB",
            {
                comment: "Image buffer low copy B",
                name: "IBUFLB",
                base: 0x40070000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHB",
            {
                comment: "Image buffer high copy B",
                name: "IBUFHB",
                base: 0x40074000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "L3MEM",
            {
                comment: "1MB L3 Memory",
                name: "L3MEM",
                base: 0x40300000,
                len: 0x00100000,
                space: "code/data",
                page: 1,
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Arctic.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Arctic.Params;
...
params.cpuCore = String "ARP32";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Arctic.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Arctic.Params;
...
params.cpuCoreRevision = String "1.0";
config Arctic.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Arctic.Params;
...
params.dataWordSize = Int 4;
config Arctic.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Arctic.Params;
...
params.deviceHeader = String undefined;
config Arctic.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new Arctic.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "DMEM",
        {
            comment: "32KB data memory",
            name: "DMEM",
            base: 0x40020000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "WBUF",
        {
            comment: "VCOP work buffer",
            name: "WBUF",
            base: 0x40040000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLA",
        {
            comment: "Image buffer low copy A",
            name: "IBUFLA",
            base: 0x40050000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHA",
        {
            comment: "Image buffer high copy A",
            name: "IBUFHA",
            base: 0x40054000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLB",
        {
            comment: "Image buffer low copy B",
            name: "IBUFLB",
            base: 0x40070000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHB",
        {
            comment: "Image buffer high copy B",
            name: "IBUFHB",
            base: 0x40074000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "L3MEM",
        {
            comment: "1MB L3 Memory",
            name: "L3MEM",
            base: 0x40300000,
            len: 0x00100000,
            space: "code/data",
            page: 1,
            access: "RWX"
        }
    ]
];
config Arctic.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Arctic.Params;
...
params.minDataUnitSize = Int 1;
config Arctic.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Arctic.Params;
...
params.minProgUnitSize = Int 1;
config Arctic.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Arctic.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Arctic.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Arctic.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Arctic.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Arctic.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:49 GMT


module ti.catalog.arp32.DRA7XX

metaonly module ti.catalog.arp32.DRA7XX
index URL

The DRA7XX device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arp32/DRA7XX.xdc
var DRA7XX = xdc.useModule('ti.catalog.arp32.DRA7XX');
per-instance config parameters
    var params = new DRA7XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "ARP32";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "DMEM",
                {
                    comment: "32KB data memory",
                    name: "DMEM",
                    base: 0x40020000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "WBUF",
                {
                    comment: "VCOP work buffer",
                    name: "WBUF",
                    base: 0x40040000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLA",
                {
                    comment: "Image buffer low copy A",
                    name: "IBUFLA",
                    base: 0x40050000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHA",
                {
                    comment: "Image buffer high copy A",
                    name: "IBUFHA",
                    base: 0x40054000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLB",
                {
                    comment: "Image buffer low copy B",
                    name: "IBUFLB",
                    base: 0x40070000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHB",
                {
                    comment: "Image buffer high copy B",
                    name: "IBUFHB",
                    base: 0x40074000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "OCMC_RAM1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                    name: "OCMC_RAM1",
                    base: 0x40300000,
                    len: 0x00080000,
                    space: "code/data",
                    page: 1,
                    access: "RWX"
                }
            ],
            [
                "OCMC_RAM2",
                {
                    comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                    name: "OCMC_RAM2",
                    base: 0x40400000,
                    len: 0x00100000,
                    space: "code/data",
                    page: 1,
                    access: "RWX"
                }
            ],
            [
                "OCMC_RAM3",
                {
                    comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                    name: "OCMC_RAM3",
                    base: 0x40500000,
                    len: 0x00100000,
                    space: "code/data",
                    page: 1,
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = DRA7XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new DRA7XX.Params;
// Instance config-params object
    params.cpuCore = String "ARP32";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "DMEM",
            {
                comment: "32KB data memory",
                name: "DMEM",
                base: 0x40020000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "WBUF",
            {
                comment: "VCOP work buffer",
                name: "WBUF",
                base: 0x40040000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLA",
            {
                comment: "Image buffer low copy A",
                name: "IBUFLA",
                base: 0x40050000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHA",
            {
                comment: "Image buffer high copy A",
                name: "IBUFHA",
                base: 0x40054000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLB",
            {
                comment: "Image buffer low copy B",
                name: "IBUFLB",
                base: 0x40070000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHB",
            {
                comment: "Image buffer high copy B",
                name: "IBUFHB",
                base: 0x40074000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "OCMC_RAM1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                name: "OCMC_RAM1",
                base: 0x40300000,
                len: 0x00080000,
                space: "code/data",
                page: 1,
                access: "RWX"
            }
        ],
        [
            "OCMC_RAM2",
            {
                comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                name: "OCMC_RAM2",
                base: 0x40400000,
                len: 0x00100000,
                space: "code/data",
                page: 1,
                access: "RWX"
            }
        ],
        [
            "OCMC_RAM3",
            {
                comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                name: "OCMC_RAM3",
                base: 0x40500000,
                len: 0x00100000,
                space: "code/data",
                page: 1,
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config DRA7XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCore = String "ARP32";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config DRA7XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCoreRevision = String "1.0";
config DRA7XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.dataWordSize = Int 4;
config DRA7XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new DRA7XX.Params;
...
params.deviceHeader = String undefined;
config DRA7XX.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new DRA7XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "DMEM",
        {
            comment: "32KB data memory",
            name: "DMEM",
            base: 0x40020000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "WBUF",
        {
            comment: "VCOP work buffer",
            name: "WBUF",
            base: 0x40040000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLA",
        {
            comment: "Image buffer low copy A",
            name: "IBUFLA",
            base: 0x40050000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHA",
        {
            comment: "Image buffer high copy A",
            name: "IBUFHA",
            base: 0x40054000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLB",
        {
            comment: "Image buffer low copy B",
            name: "IBUFLB",
            base: 0x40070000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHB",
        {
            comment: "Image buffer high copy B",
            name: "IBUFHB",
            base: 0x40074000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "OCMC_RAM1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
            name: "OCMC_RAM1",
            base: 0x40300000,
            len: 0x00080000,
            space: "code/data",
            page: 1,
            access: "RWX"
        }
    ],
    [
        "OCMC_RAM2",
        {
            comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
            name: "OCMC_RAM2",
            base: 0x40400000,
            len: 0x00100000,
            space: "code/data",
            page: 1,
            access: "RWX"
        }
    ],
    [
        "OCMC_RAM3",
        {
            comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
            name: "OCMC_RAM3",
            base: 0x40500000,
            len: 0x00100000,
            space: "code/data",
            page: 1,
            access: "RWX"
        }
    ]
];
config DRA7XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minDataUnitSize = Int 1;
config DRA7XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minProgUnitSize = Int 1;
config DRA7XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new DRA7XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new DRA7XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DRA7XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
DRA7XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
DRA7XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:49 GMT


module ti.catalog.arp32.TDA3XX

metaonly module ti.catalog.arp32.TDA3XX
index URL

The TDA3XX device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arp32/TDA3XX.xdc
var TDA3XX = xdc.useModule('ti.catalog.arp32.TDA3XX');
per-instance config parameters
    var params = new TDA3XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "ARP32";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "DMEM",
                {
                    comment: "32KB data memory",
                    name: "DMEM",
                    base: 0x40020000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "WBUF",
                {
                    comment: "VCOP work buffer",
                    name: "WBUF",
                    base: 0x40040000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLA",
                {
                    comment: "Image buffer low copy A",
                    name: "IBUFLA",
                    base: 0x40050000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHA",
                {
                    comment: "Image buffer high copy A",
                    name: "IBUFHA",
                    base: 0x40054000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLB",
                {
                    comment: "Image buffer low copy B",
                    name: "IBUFLB",
                    base: 0x40070000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHB",
                {
                    comment: "Image buffer high copy B",
                    name: "IBUFHB",
                    base: 0x40074000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TDA3XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TDA3XX.Params;
// Instance config-params object
    params.cpuCore = String "ARP32";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "DMEM",
            {
                comment: "32KB data memory",
                name: "DMEM",
                base: 0x40020000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "WBUF",
            {
                comment: "VCOP work buffer",
                name: "WBUF",
                base: 0x40040000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLA",
            {
                comment: "Image buffer low copy A",
                name: "IBUFLA",
                base: 0x40050000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHA",
            {
                comment: "Image buffer high copy A",
                name: "IBUFHA",
                base: 0x40054000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLB",
            {
                comment: "Image buffer low copy B",
                name: "IBUFLB",
                base: 0x40070000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHB",
            {
                comment: "Image buffer high copy B",
                name: "IBUFHB",
                base: 0x40074000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TDA3XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TDA3XX.Params;
...
params.cpuCore = String "ARP32";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TDA3XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TDA3XX.Params;
...
params.cpuCoreRevision = String "1.0";
config TDA3XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.dataWordSize = Int 4;
config TDA3XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TDA3XX.Params;
...
params.deviceHeader = String undefined;
config TDA3XX.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TDA3XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "DMEM",
        {
            comment: "32KB data memory",
            name: "DMEM",
            base: 0x40020000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "WBUF",
        {
            comment: "VCOP work buffer",
            name: "WBUF",
            base: 0x40040000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLA",
        {
            comment: "Image buffer low copy A",
            name: "IBUFLA",
            base: 0x40050000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHA",
        {
            comment: "Image buffer high copy A",
            name: "IBUFHA",
            base: 0x40054000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLB",
        {
            comment: "Image buffer low copy B",
            name: "IBUFLB",
            base: 0x40070000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHB",
        {
            comment: "Image buffer high copy B",
            name: "IBUFHB",
            base: 0x40074000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ]
];
config TDA3XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.minDataUnitSize = Int 1;
config TDA3XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.minProgUnitSize = Int 1;
config TDA3XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TDA3XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TDA3XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TDA3XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TDA3XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TDA3XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:49 GMT


module ti.catalog.arp32.TMS320C6A8149

metaonly module ti.catalog.arp32.TMS320C6A8149
index URL

The TMS320C6A8149 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arp32/TMS320C6A8149.xdc
var TMS320C6A8149 = xdc.useModule('ti.catalog.arp32.TMS320C6A8149');
per-instance config parameters
    var params = new TMS320C6A8149.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "ARP32";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "DMEM",
                {
                    comment: "32KB data memory",
                    name: "DMEM",
                    base: 0x40020000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "WBUF",
                {
                    comment: "VCOP work buffer",
                    name: "WBUF",
                    base: 0x40040000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLA",
                {
                    comment: "Image buffer low copy A",
                    name: "IBUFLA",
                    base: 0x40050000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHA",
                {
                    comment: "Image buffer high copy A",
                    name: "IBUFHA",
                    base: 0x40054000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLB",
                {
                    comment: "Image buffer low copy B",
                    name: "IBUFLB",
                    base: 0x40070000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHB",
                {
                    comment: "Image buffer high copy B",
                    name: "IBUFHB",
                    base: 0x40074000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "OCMC",
                {
                    comment: "128KB L3 OCMC Memory",
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x00020000,
                    space: "code/data",
                    page: 1,
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6A8149.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Instance config-params object
    params.cpuCore = String "ARP32";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "DMEM",
            {
                comment: "32KB data memory",
                name: "DMEM",
                base: 0x40020000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "WBUF",
            {
                comment: "VCOP work buffer",
                name: "WBUF",
                base: 0x40040000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLA",
            {
                comment: "Image buffer low copy A",
                name: "IBUFLA",
                base: 0x40050000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHA",
            {
                comment: "Image buffer high copy A",
                name: "IBUFHA",
                base: 0x40054000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLB",
            {
                comment: "Image buffer low copy B",
                name: "IBUFLB",
                base: 0x40070000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHB",
            {
                comment: "Image buffer high copy B",
                name: "IBUFHB",
                base: 0x40074000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "OCMC",
            {
                comment: "128KB L3 OCMC Memory",
                name: "OCMC",
                base: 0x40300000,
                len: 0x00020000,
                space: "code/data",
                page: 1,
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6A8149.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCore = String "ARP32";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6A8149.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6A8149.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.dataWordSize = Int 4;
config TMS320C6A8149.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.deviceHeader = String undefined;
config TMS320C6A8149.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "DMEM",
        {
            comment: "32KB data memory",
            name: "DMEM",
            base: 0x40020000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "WBUF",
        {
            comment: "VCOP work buffer",
            name: "WBUF",
            base: 0x40040000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLA",
        {
            comment: "Image buffer low copy A",
            name: "IBUFLA",
            base: 0x40050000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHA",
        {
            comment: "Image buffer high copy A",
            name: "IBUFHA",
            base: 0x40054000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLB",
        {
            comment: "Image buffer low copy B",
            name: "IBUFLB",
            base: 0x40070000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHB",
        {
            comment: "Image buffer high copy B",
            name: "IBUFHB",
            base: 0x40074000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "OCMC",
        {
            comment: "128KB L3 OCMC Memory",
            name: "OCMC",
            base: 0x40300000,
            len: 0x00020000,
            space: "code/data",
            page: 1,
            access: "RWX"
        }
    ]
];
config TMS320C6A8149.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6A8149.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6A8149.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6A8149.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6A8149.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6A8149.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:49 GMT


module ti.catalog.arp32.Vayu

metaonly module ti.catalog.arp32.Vayu
index URL

The Vayu device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/arp32/Vayu.xdc
var Vayu = xdc.useModule('ti.catalog.arp32.Vayu');
per-instance config parameters
    var params = new Vayu.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "ARP32";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The memory map returned be getMemoryMap() = IPlatform.Memory[string] [
            [
                "DMEM",
                {
                    comment: "32KB data memory",
                    name: "DMEM",
                    base: 0x40020000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "WBUF",
                {
                    comment: "VCOP work buffer",
                    name: "WBUF",
                    base: 0x40040000,
                    len: 0x8000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLA",
                {
                    comment: "Image buffer low copy A",
                    name: "IBUFLA",
                    base: 0x40050000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHA",
                {
                    comment: "Image buffer high copy A",
                    name: "IBUFHA",
                    base: 0x40054000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFLB",
                {
                    comment: "Image buffer low copy B",
                    name: "IBUFLB",
                    base: 0x40070000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ],
            [
                "IBUFHB",
                {
                    comment: "Image buffer high copy B",
                    name: "IBUFHB",
                    base: 0x40074000,
                    len: 0x4000,
                    space: "data",
                    page: 1,
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Vayu.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new Vayu.Params;
// Instance config-params object
    params.cpuCore = String "ARP32";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The memory map returned be getMemoryMap()
        [
            "DMEM",
            {
                comment: "32KB data memory",
                name: "DMEM",
                base: 0x40020000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "WBUF",
            {
                comment: "VCOP work buffer",
                name: "WBUF",
                base: 0x40040000,
                len: 0x8000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLA",
            {
                comment: "Image buffer low copy A",
                name: "IBUFLA",
                base: 0x40050000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHA",
            {
                comment: "Image buffer high copy A",
                name: "IBUFHA",
                base: 0x40054000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFLB",
            {
                comment: "Image buffer low copy B",
                name: "IBUFLB",
                base: 0x40070000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ],
        [
            "IBUFHB",
            {
                comment: "Image buffer high copy B",
                name: "IBUFHB",
                base: 0x40074000,
                len: 0x4000,
                space: "data",
                page: 1,
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Vayu.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCore = String "ARP32";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Vayu.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCoreRevision = String "1.0";
config Vayu.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.dataWordSize = Int 4;
config Vayu.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Vayu.Params;
...
params.deviceHeader = String undefined;
config Vayu.Params.memMap // instance
index URL

The memory map returned be getMemoryMap()

Configuration settings
var params = new Vayu.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "DMEM",
        {
            comment: "32KB data memory",
            name: "DMEM",
            base: 0x40020000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "WBUF",
        {
            comment: "VCOP work buffer",
            name: "WBUF",
            base: 0x40040000,
            len: 0x8000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLA",
        {
            comment: "Image buffer low copy A",
            name: "IBUFLA",
            base: 0x40050000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHA",
        {
            comment: "Image buffer high copy A",
            name: "IBUFHA",
            base: 0x40054000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFLB",
        {
            comment: "Image buffer low copy B",
            name: "IBUFLB",
            base: 0x40070000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ],
    [
        "IBUFHB",
        {
            comment: "Image buffer high copy B",
            name: "IBUFHB",
            base: 0x40074000,
            len: 0x4000,
            space: "data",
            page: 1,
            access: "RW"
        }
    ]
];
config Vayu.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minDataUnitSize = Int 1;
config Vayu.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minProgUnitSize = Int 1;
config Vayu.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Vayu.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Vayu.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Vayu.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Vayu.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Vayu.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:49 GMT


package ti.catalog.c2800
index URL

Package of devices for the c2800 family of DSPs

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/c2800/package.xdc
requires xdc.platform;
package ti.catalog.c2800 [1, 0, 0, 0] {
    interface ITMS320C28026;
    // The C28026 device data sheet module
    interface ITMS320C28027;
    // The C28027 device data sheet module
    interface ITMS320C28032;
    // The C28032 device data sheet module
    interface ITMS320C28034;
    // The C28034 device data sheet module
    interface ITMS320C28342;
    // The C28342 device data sheet module
    interface ITMS320C28344;
    // The C28344 device data sheet module
    interface ITMS320C28346;
    // The C28346 device data sheet module
    interface ITMS320C283xx;
    // An interface implemented by all TMS320C28xx devices
    interface ITMS320C28xx;
    // An interface implemented by all TMS320C28xx devices
    interface ITMS320F28065;
    interface ITMS320F28069;
    module F28M35x;
    // The F28M35x device data sheet module
    module TMS320C2801;
    // The C2801 device data sheet module
    module TMS320C28015;
    // The C28015 device data sheet module
    module TMS320C28016;
    // The C28016 device data sheet module
    module TMS320C2802;
    // The C2802 device data sheet module
    module TMS320C28020;
    // The C28020 device data sheet module
    module TMS320C28021;
    // The C28021 device data sheet module
    module TMS320C28022;
    module TMS320C28023;
    module TMS320C28026;
    module TMS320C28027;
    module TMS320C28030;
    // The C28030 device data sheet module
    module TMS320C28031;
    // The C28031 device data sheet module
    module TMS320C28032;
    module TMS320C28033;
    module TMS320C28034;
    module TMS320C28035;
    module TMS320C28044;
    // The C28044 device data sheet module
    module TMS320C2806;
    // The C2806 device data sheet module
    module TMS320C2808;
    // The C2808 device data sheet module
    module TMS320C2809;
    // The C2809 device data sheet module
    module TMS320C2810;
    // The C2810 device data sheet module
    module TMS320C2811;
    // The C2811 device data sheet module
    module TMS320C2812;
    // The C2812 device data sheet module
    module TMS320C28232;
    // The 28232 device data sheet module
    module TMS320C28234;
    // The 28234 device data sheet module
    module TMS320C28235;
    // The C28235 device data sheet module
    module TMS320C28332;
    // The C28332 device data sheet module
    module TMS320C28334;
    // The C28334 device data sheet module
    module TMS320C28335;
    // The C28335 device data sheet module
    module TMS320C28341;
    module TMS320C28342;
    module TMS320C28343;
    module TMS320C28344;
    module TMS320C28345;
    module TMS320C28346;
    module TMS320F28062;
    // The F28062 device data sheet module
    module TMS320F28063;
    // The F28063 device data sheet module
    module TMS320F28064;
    // The F28064 device data sheet module
    module TMS320F28065;
    // The F28065 device data sheet module
    module TMS320F28066;
    // The F28066 device data sheet module
    module TMS320F28067;
    // The F28067 device data sheet module
    module TMS320F28068;
    // The F28068 device data sheet module
    module TMS320F28069;
    // The F28069 device data sheet module
}
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.F28M35x

metaonly module ti.catalog.c2800.F28M35x
index URL

The F28M35x device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/F28M35x.xdc
var F28M35x = xdc.useModule('ti.catalog.c2800.F28M35x');
per-instance config parameters
    var params = new F28M35x.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "M01SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "M01SARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 1,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 0,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x4000,
                    page: 1,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "S07SHRAM",
                {
                    comment: "On-Chip Shared RAM Memory",
                    name: "S07SHRAM",
                    base: 0xC000,
                    len: 0x8000,
                    page: 1,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "CTOMMSGRAM",
                {
                    comment: "C28 to M3 MSG RAM Memory",
                    name: "CTOMMSGRAM",
                    base: 0x3F800,
                    len: 0x00400,
                    page: 1,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MTOCMSGRAM",
                {
                    comment: "M3 to C28 MSG RAM Memory",
                    name: "MTOCMSGRAM",
                    base: 0x3FC00,
                    len: 0x00400,
                    page: 1,
                    space: "data",
                    access: "R"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x240400,
                    len: 0x000400,
                    page: 0,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "256K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x100000,
                    len: 0x03fffe,
                    page: 0,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "Used for Flash boot",
                    name: "BEGIN",
                    base: 0x13fffe,
                    len: 0x000002,
                    page: 0,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3f8000,
                    len: 0x008000,
                    page: 0,
                    space: "code",
                    access: "RX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = F28M35x.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new F28M35x.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "M01SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "M01SARAM",
                base: 0x0,
                len: 0x800,
                page: 1,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 0,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x4000,
                page: 1,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "S07SHRAM",
            {
                comment: "On-Chip Shared RAM Memory",
                name: "S07SHRAM",
                base: 0xC000,
                len: 0x8000,
                page: 1,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "CTOMMSGRAM",
            {
                comment: "C28 to M3 MSG RAM Memory",
                name: "CTOMMSGRAM",
                base: 0x3F800,
                len: 0x00400,
                page: 1,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MTOCMSGRAM",
            {
                comment: "M3 to C28 MSG RAM Memory",
                name: "MTOCMSGRAM",
                base: 0x3FC00,
                len: 0x00400,
                page: 1,
                space: "data",
                access: "R"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x240400,
                len: 0x000400,
                page: 0,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "256K X 16 Flash memory",
                name: "FLASH",
                base: 0x100000,
                len: 0x03fffe,
                page: 0,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "BEGIN",
            {
                comment: "Used for Flash boot",
                name: "BEGIN",
                base: 0x13fffe,
                len: 0x000002,
                page: 0,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3f8000,
                len: 0x008000,
                page: 0,
                space: "code",
                access: "RX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config F28M35x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new F28M35x.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config F28M35x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new F28M35x.Params;
...
params.cpuCoreRevision = String "1.0";
config F28M35x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new F28M35x.Params;
...
params.dataWordSize = Int 2;
config F28M35x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new F28M35x.Params;
...
params.deviceHeader = String undefined;
config F28M35x.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new F28M35x.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "M01SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "M01SARAM",
            base: 0x0,
            len: 0x800,
            page: 1,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 0,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x4000,
            page: 1,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "S07SHRAM",
        {
            comment: "On-Chip Shared RAM Memory",
            name: "S07SHRAM",
            base: 0xC000,
            len: 0x8000,
            page: 1,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "CTOMMSGRAM",
        {
            comment: "C28 to M3 MSG RAM Memory",
            name: "CTOMMSGRAM",
            base: 0x3F800,
            len: 0x00400,
            page: 1,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MTOCMSGRAM",
        {
            comment: "M3 to C28 MSG RAM Memory",
            name: "MTOCMSGRAM",
            base: 0x3FC00,
            len: 0x00400,
            page: 1,
            space: "data",
            access: "R"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x240400,
            len: 0x000400,
            page: 0,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "256K X 16 Flash memory",
            name: "FLASH",
            base: 0x100000,
            len: 0x03fffe,
            page: 0,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "BEGIN",
        {
            comment: "Used for Flash boot",
            name: "BEGIN",
            base: 0x13fffe,
            len: 0x000002,
            page: 0,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3f8000,
            len: 0x008000,
            page: 0,
            space: "code",
            access: "RX"
        }
    ]
];
config F28M35x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new F28M35x.Params;
...
params.minDataUnitSize = Int 1;
config F28M35x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new F28M35x.Params;
...
params.minProgUnitSize = Int 2;
config F28M35x.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new F28M35x.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new F28M35x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = F28M35x.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
F28M35x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
F28M35x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


interface ti.catalog.c2800.ITMS320C28026

metaonly interface ti.catalog.c2800.ITMS320C28026
index URL

The C28026 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28026.xdc
metaonly interface ITMS320C28026 { ...
// inherits ti.catalog.c2800.ITMS320C28xx
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28026 inherits ITMS320C28xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (4K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f4000,
                len: 0x003f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28026.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28026.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C28026.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
override config Int dataWordSize = 2;
config ITMS320C28026.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
config String deviceHeader;
config ITMS320C28026.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (4K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f4000,
            len: 0x003f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320C28026.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28026.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28026.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28026.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28026.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28026.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:18 GMT


interface ti.catalog.c2800.ITMS320C28027

metaonly interface ti.catalog.c2800.ITMS320C28027
index URL

The C28027 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28027.xdc
metaonly interface ITMS320C28027 { ...
// inherits ti.catalog.c2800.ITMS320C28xx
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28027 inherits ITMS320C28xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (4K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f0000,
                len: 0x007f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28027.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28027.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C28027.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
override config Int dataWordSize = 2;
config ITMS320C28027.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
config String deviceHeader;
config ITMS320C28027.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (4K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f0000,
            len: 0x007f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320C28027.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28027.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28027.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28027.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28027.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28027.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:18 GMT


interface ti.catalog.c2800.ITMS320C28032

metaonly interface ti.catalog.c2800.ITMS320C28032
index URL

The C28032 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28032.xdc
metaonly interface ITMS320C28032 { ...
// inherits ti.catalog.c2800.ITMS320C28xx
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28032 inherits ITMS320C28xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "DPSARAM (6K x 16)",
                name: "DPSARAM",
                base: 0x8800,
                len: 0xa000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f0000,
                len: 0x007f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28032.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28032.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C28032.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
override config Int dataWordSize = 2;
config ITMS320C28032.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
config String deviceHeader;
config ITMS320C28032.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "DPSARAM (6K x 16)",
            name: "DPSARAM",
            base: 0x8800,
            len: 0xa000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f0000,
            len: 0x007f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320C28032.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28032.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28032.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28032.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28032.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28032.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:18 GMT


interface ti.catalog.c2800.ITMS320C28034

metaonly interface ti.catalog.c2800.ITMS320C28034
index URL

The C28034 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28034.xdc
metaonly interface ITMS320C28034 { ...
// inherits ti.catalog.c2800.ITMS320C28xx
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28034 inherits ITMS320C28xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "LSARAM (2K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x0800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "DPSARAM (6K x 16)",
                name: "DPSARAM",
                base: 0x8800,
                len: 0x1800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3e8000,
                len: 0x00ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28034.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28034.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C28034.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
override config Int dataWordSize = 2;
config ITMS320C28034.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
config String deviceHeader;
config ITMS320C28034.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "LSARAM (2K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x0800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "DPSARAM (6K x 16)",
            name: "DPSARAM",
            base: 0x8800,
            len: 0x1800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3e8000,
            len: 0x00ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320C28034.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28034.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28034.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28034.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28034.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28034.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:18 GMT


interface ti.catalog.c2800.ITMS320C28342

metaonly interface ti.catalog.c2800.ITMS320C28342
index URL

The C28342 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28342.xdc
metaonly interface ITMS320C28342 { ...
// inherits ti.catalog.c2800.ITMS320C283xx
    // inherits ti.catalog.c2800.ITMS320C28xx
        // inherits ti.catalog.ICpuDataSheet
            // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28342 inherits ITMS320C283xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H01SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H01SARAM",
                base: 0x300000,
                len: 0x010000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28342.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28342.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C28342.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
override config Int dataWordSize = 2;
config ITMS320C28342.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
config String deviceHeader;
config ITMS320C28342.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H01SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H01SARAM",
            base: 0x300000,
            len: 0x010000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320C28342.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28342.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28342.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28342.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28342.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28342.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:18 GMT


interface ti.catalog.c2800.ITMS320C28344

metaonly interface ti.catalog.c2800.ITMS320C28344
index URL

The C28344 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28344.xdc
metaonly interface ITMS320C28344 { ...
// inherits ti.catalog.c2800.ITMS320C283xx
    // inherits ti.catalog.c2800.ITMS320C28xx
        // inherits ti.catalog.ICpuDataSheet
            // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28344 inherits ITMS320C283xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0x10000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H01SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H01SARAM",
                base: 0x300000,
                len: 0x010000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28344.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28344.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C28344.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
override config Int dataWordSize = 2;
config ITMS320C28344.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
config String deviceHeader;
config ITMS320C28344.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0x10000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H01SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H01SARAM",
            base: 0x300000,
            len: 0x010000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320C28344.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28344.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28344.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28344.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28344.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28344.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:18 GMT


interface ti.catalog.c2800.ITMS320C28346

metaonly interface ti.catalog.c2800.ITMS320C28346
index URL

The C28346 device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28346.xdc
metaonly interface ITMS320C28346 { ...
// inherits ti.catalog.c2800.ITMS320C283xx
    // inherits ti.catalog.c2800.ITMS320C28xx
        // inherits ti.catalog.ICpuDataSheet
            // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28346 inherits ITMS320C283xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0x10000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H05SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H05SARAM",
                base: 0x300000,
                len: 0x030000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28346.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28346.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C28346.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
override config Int dataWordSize = 2;
config ITMS320C28346.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
config String deviceHeader;
config ITMS320C28346.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0x10000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H05SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H05SARAM",
            base: 0x300000,
            len: 0x030000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320C28346.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28346.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28346.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28346.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28346.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28346.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


interface ti.catalog.c2800.ITMS320C283xx

metaonly interface ti.catalog.c2800.ITMS320C283xx
index URL

An interface implemented by all TMS320C28xx devices

This interface is defined to factor common data about this family into a single place; all TMS320C28xx devices extend this interface.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C283xx.xdc
metaonly interface ITMS320C283xx { ...
// inherits ti.catalog.c2800.ITMS320C28xx
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C283xx inherits ITMS320C28xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C283xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C283xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
config String cpuCoreRevision;
config ITMS320C283xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
override config Int dataWordSize = 2;
config ITMS320C283xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
config String deviceHeader;
config ITMS320C283xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
override config Int minDataUnitSize = 1;
config ITMS320C283xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
override config Int minProgUnitSize = 2;
config ITMS320C283xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C283xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C283xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C283xx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


interface ti.catalog.c2800.ITMS320C28xx

metaonly interface ti.catalog.c2800.ITMS320C28xx
index URL

An interface implemented by all TMS320C28xx devices

This interface is defined to factor common data about this family into a single place; all TMS320C28xx devices extend this interface.
XDCspec summary sourced in ti/catalog/c2800/ITMS320C28xx.xdc
metaonly interface ITMS320C28xx { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
package ti.catalog.c2800;
metaonly interface ITMS320C28xx inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C28xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C28xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
config String cpuCoreRevision;
config ITMS320C28xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
override config Int dataWordSize = 2;
config ITMS320C28xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
config String deviceHeader;
config ITMS320C28xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
override config Int minDataUnitSize = 1;
config ITMS320C28xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
override config Int minProgUnitSize = 2;
config ITMS320C28xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C28xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C28xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320C28xx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


interface ti.catalog.c2800.ITMS320F28065

metaonly interface ti.catalog.c2800.ITMS320F28065
index URL
XDCspec summary sourced in ti/catalog/c2800/ITMS320F28065.xdc
metaonly interface ITMS320F28065 { ...
// inherits ti.catalog.c2800.ITMS320C283xx
    // inherits ti.catalog.c2800.ITMS320C28xx
        // inherits ti.catalog.ICpuDataSheet
            // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
package ti.catalog.c2800;
metaonly interface ITMS320F28065 inherits ITMS320C283xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L78DPSARAM",
            {
                comment: "L7-L8 DPSARAM (16K x 16)",
                name: "L78DPSARAM",
                base: 0x10000,
                len: 0x04000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3E8000,
                len: 0x00FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320F28065.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320F28065.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320F28065.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
override config Int dataWordSize = 2;
config ITMS320F28065.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
config String deviceHeader;
config ITMS320F28065.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L78DPSARAM",
        {
            comment: "L7-L8 DPSARAM (16K x 16)",
            name: "L78DPSARAM",
            base: 0x10000,
            len: 0x04000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3E8000,
            len: 0x00FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320F28065.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
override config Int minDataUnitSize = 1;
config ITMS320F28065.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
override config Int minProgUnitSize = 2;
config ITMS320F28065.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320F28065.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320F28065.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28065.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


interface ti.catalog.c2800.ITMS320F28069

metaonly interface ti.catalog.c2800.ITMS320F28069
index URL
XDCspec summary sourced in ti/catalog/c2800/ITMS320F28069.xdc
metaonly interface ITMS320F28069 { ...
// inherits ti.catalog.c2800.ITMS320C283xx
    // inherits ti.catalog.c2800.ITMS320C28xx
        // inherits ti.catalog.ICpuDataSheet
            // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
package ti.catalog.c2800;
metaonly interface ITMS320F28069 inherits ITMS320C283xx {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "2800";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L78DPSARAM",
            {
                comment: "L7-L8 DPSARAM (16K x 16)",
                name: "L78DPSARAM",
                base: 0x10000,
                len: 0x04000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x3D8000,
                len: 0x01FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 2;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320F28069.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
override config String cpuCore = "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320F28069.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320F28069.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
override config Int dataWordSize = 2;
config ITMS320F28069.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
config String deviceHeader;
config ITMS320F28069.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
config IPlatform.Memory memMap[string] = [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L78DPSARAM",
        {
            comment: "L7-L8 DPSARAM (16K x 16)",
            name: "L78DPSARAM",
            base: 0x10000,
            len: 0x04000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x3D8000,
            len: 0x01FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config ITMS320F28069.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
override config Int minDataUnitSize = 1;
config ITMS320F28069.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
override config Int minProgUnitSize = 2;
config ITMS320F28069.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320F28069.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320F28069.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c2800/ITMS320F28069.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C2801

metaonly module ti.catalog.c2800.TMS320C2801
index URL

The C2801 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2801.xdc
var TMS320C2801 = xdc.useModule('ti.catalog.c2800.TMS320C2801');
per-instance config parameters
    var params = new TMS320C2801.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "16K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3F4000,
                    len: 0x004000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FF000,
                    len: 0x000FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2801.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2801.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3F4000,
                len: 0x004000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FF000,
                len: 0x000FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2801.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2801.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2801.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2801.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2801.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2801.Params;
...
params.dataWordSize = Int 2;
config TMS320C2801.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2801.Params;
...
params.deviceHeader = String undefined;
config TMS320C2801.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2801.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3F4000,
            len: 0x004000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FF000,
            len: 0x000FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C2801.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2801.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2801.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2801.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2801.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2801.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2801.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2801.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2801.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2801.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C28015

metaonly module ti.catalog.c2800.TMS320C28015
index URL

The C28015 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28015.xdc
var TMS320C28015 = xdc.useModule('ti.catalog.c2800.TMS320C28015');
per-instance config parameters
    var params = new TMS320C28015.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "16K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3F4000,
                    len: 0x003f80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FF000,
                    len: 0x000FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28015.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28015.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3F4000,
                len: 0x003f80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FF000,
                len: 0x000FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28015.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28015.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28015.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28015.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28015.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28015.Params;
...
params.dataWordSize = Int 2;
config TMS320C28015.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28015.Params;
...
params.deviceHeader = String undefined;
config TMS320C28015.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28015.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3F4000,
            len: 0x003f80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FF000,
            len: 0x000FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C28015.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28015.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28015.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28015.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28015.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28015.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28015.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28015.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28015.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28015.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C28016

metaonly module ti.catalog.c2800.TMS320C28016
index URL

The C28016 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28016.xdc
var TMS320C28016 = xdc.useModule('ti.catalog.c2800.TMS320C28016');
per-instance config parameters
    var params = new TMS320C28016.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "16K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3F4000,
                    len: 0x003f80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FF000,
                    len: 0x000FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28016.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28016.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3F4000,
                len: 0x003f80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FF000,
                len: 0x000FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28016.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28016.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28016.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28016.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28016.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28016.Params;
...
params.dataWordSize = Int 2;
config TMS320C28016.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28016.Params;
...
params.deviceHeader = String undefined;
config TMS320C28016.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28016.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3F4000,
            len: 0x003f80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FF000,
            len: 0x000FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C28016.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28016.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28016.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28016.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28016.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28016.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28016.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28016.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28016.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28016.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C2802

metaonly module ti.catalog.c2800.TMS320C2802
index URL

The C2802 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2802.xdc
var TMS320C2802 = xdc.useModule('ti.catalog.c2800.TMS320C2802');
per-instance config parameters
    var params = new TMS320C2802.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3F0000,
                    len: 0x008000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FF000,
                    len: 0x000FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2802.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2802.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3F0000,
                len: 0x008000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FF000,
                len: 0x000FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2802.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2802.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2802.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2802.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2802.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2802.Params;
...
params.dataWordSize = Int 2;
config TMS320C2802.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2802.Params;
...
params.deviceHeader = String undefined;
config TMS320C2802.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2802.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3F0000,
            len: 0x008000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FF000,
            len: 0x000FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C2802.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2802.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2802.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2802.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2802.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2802.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2802.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2802.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2802.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2802.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C28020

metaonly module ti.catalog.c2800.TMS320C28020
index URL

The C28020 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28020.xdc
var TMS320C28020 = xdc.useModule('ti.catalog.c2800.TMS320C28020');
per-instance config parameters
    var params = new TMS320C28020.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "L0 SARAM (1K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x0400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "16K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f4000,
                    len: 0x003f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28020.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28020.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (1K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x0400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f4000,
                len: 0x003f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28020.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28020.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28020.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28020.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28020.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28020.Params;
...
params.dataWordSize = Int 2;
config TMS320C28020.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28020.Params;
...
params.deviceHeader = String undefined;
config TMS320C28020.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28020.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (1K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x0400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f4000,
            len: 0x003f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28020.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28020.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28020.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28020.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28020.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28020.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28020.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28020.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28020.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28020.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C28021

metaonly module ti.catalog.c2800.TMS320C28021
index URL

The C28021 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28021.xdc
var TMS320C28021 = xdc.useModule('ti.catalog.c2800.TMS320C28021');
per-instance config parameters
    var params = new TMS320C28021.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "L0 SARAM (3K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x0c00,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f0000,
                    len: 0x007f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28021.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28021.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (3K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x0c00,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f0000,
                len: 0x007f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28021.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28021.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28021.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28021.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28021.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28021.Params;
...
params.dataWordSize = Int 2;
config TMS320C28021.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28021.Params;
...
params.deviceHeader = String undefined;
config TMS320C28021.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28021.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (3K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x0c00,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f0000,
            len: 0x007f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28021.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28021.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28021.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28021.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28021.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28021.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28021.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28021.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28021.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28021.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C28022

metaonly module ti.catalog.c2800.TMS320C28022
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28022.xdc
var TMS320C28022 = xdc.useModule('ti.catalog.c2800.TMS320C28022');
per-instance config parameters
    var params = new TMS320C28022.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "L0 SARAM (4K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "16K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f4000,
                    len: 0x003f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28022.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28022.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (4K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f4000,
                len: 0x003f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28022.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28022.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28022.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28022.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28022.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28022.Params;
...
params.dataWordSize = Int 2;
config TMS320C28022.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28022.Params;
...
params.deviceHeader = String undefined;
config TMS320C28022.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28022.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (4K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f4000,
            len: 0x003f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28022.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28022.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28022.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28022.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28022.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28022.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28022.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28022.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28022.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28022.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C28023

metaonly module ti.catalog.c2800.TMS320C28023
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28023.xdc
var TMS320C28023 = xdc.useModule('ti.catalog.c2800.TMS320C28023');
per-instance config parameters
    var params = new TMS320C28023.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "L0 SARAM (4K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f0000,
                    len: 0x007f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28023.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28023.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (4K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f0000,
                len: 0x007f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28023.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28023.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28023.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28023.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28023.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28023.Params;
...
params.dataWordSize = Int 2;
config TMS320C28023.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28023.Params;
...
params.deviceHeader = String undefined;
config TMS320C28023.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28023.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (4K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f0000,
            len: 0x007f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28023.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28023.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28023.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28023.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28023.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28023.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28023.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28023.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28023.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28023.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:19 GMT


module ti.catalog.c2800.TMS320C28026

metaonly module ti.catalog.c2800.TMS320C28026
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28026.xdc
var TMS320C28026 = xdc.useModule('ti.catalog.c2800.TMS320C28026');
per-instance config parameters
    var params = new TMS320C28026.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "L0 SARAM (4K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "16K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f4000,
                    len: 0x003f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28026.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28026.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (4K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f4000,
                len: 0x003f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28026.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28026.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28026.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28026.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28026.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28026.Params;
...
params.dataWordSize = Int 2;
config TMS320C28026.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28026.Params;
...
params.deviceHeader = String undefined;
config TMS320C28026.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28026.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (4K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f4000,
            len: 0x003f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28026.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28026.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28026.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28026.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28026.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28026.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28026.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28026.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28026.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28026.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28027

metaonly module ti.catalog.c2800.TMS320C28027
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28027.xdc
var TMS320C28027 = xdc.useModule('ti.catalog.c2800.TMS320C28027');
per-instance config parameters
    var params = new TMS320C28027.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "L0 SARAM (4K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f0000,
                    len: 0x007f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28027.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28027.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "L0 SARAM (4K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f0000,
                len: 0x007f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28027.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28027.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28027.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28027.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28027.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28027.Params;
...
params.dataWordSize = Int 2;
config TMS320C28027.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28027.Params;
...
params.deviceHeader = String undefined;
config TMS320C28027.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28027.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "L0 SARAM (4K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f0000,
            len: 0x007f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28027.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28027.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28027.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28027.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28027.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28027.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28027.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28027.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28027.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28027.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28030

metaonly module ti.catalog.c2800.TMS320C28030
index URL

The C28030 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28030.xdc
var TMS320C28030 = xdc.useModule('ti.catalog.c2800.TMS320C28030');
per-instance config parameters
    var params = new TMS320C28030.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "DPSARAM",
                {
                    comment: "On-Chip DPSARAM Memory",
                    name: "DPSARAM",
                    base: 0x9000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "16K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3F4000,
                    len: 0x003f80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "L0SARAM",
                {
                    comment: "On-Chip L0 SARAM Memory",
                    name: "L0SARAM",
                    base: 0x3F8000,
                    len: 0x000800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FE000,
                    len: 0x001FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28030.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28030.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "On-Chip DPSARAM Memory",
                name: "DPSARAM",
                base: 0x9000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "16K X 16 Flash memory",
                name: "FLASH",
                base: 0x3F4000,
                len: 0x003f80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "L0SARAM",
            {
                comment: "On-Chip L0 SARAM Memory",
                name: "L0SARAM",
                base: 0x3F8000,
                len: 0x000800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FE000,
                len: 0x001FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28030.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28030.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28030.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28030.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28030.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28030.Params;
...
params.dataWordSize = Int 2;
config TMS320C28030.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28030.Params;
...
params.deviceHeader = String undefined;
config TMS320C28030.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28030.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "On-Chip DPSARAM Memory",
            name: "DPSARAM",
            base: 0x9000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "16K X 16 Flash memory",
            name: "FLASH",
            base: 0x3F4000,
            len: 0x003f80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "L0SARAM",
        {
            comment: "On-Chip L0 SARAM Memory",
            name: "L0SARAM",
            base: 0x3F8000,
            len: 0x000800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FE000,
            len: 0x001FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C28030.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28030.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28030.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28030.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28030.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28030.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28030.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28030.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28030.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28030.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28031

metaonly module ti.catalog.c2800.TMS320C28031
index URL

The C28031 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28031.xdc
var TMS320C28031 = xdc.useModule('ti.catalog.c2800.TMS320C28031');
per-instance config parameters
    var params = new TMS320C28031.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "DPSARAM",
                {
                    comment: "On-Chip DPSARAM Memory",
                    name: "DPSARAM",
                    base: 0x8800,
                    len: 0x1800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3F0000,
                    len: 0x007f80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "L0SARAM",
                {
                    comment: "On-Chip L0 SARAM Memory",
                    name: "L0SARAM",
                    base: 0x3F8000,
                    len: 0x000800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FE000,
                    len: 0x001FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28031.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28031.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "On-Chip DPSARAM Memory",
                name: "DPSARAM",
                base: 0x8800,
                len: 0x1800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3F0000,
                len: 0x007f80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "L0SARAM",
            {
                comment: "On-Chip L0 SARAM Memory",
                name: "L0SARAM",
                base: 0x3F8000,
                len: 0x000800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FE000,
                len: 0x001FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28031.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28031.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28031.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28031.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28031.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28031.Params;
...
params.dataWordSize = Int 2;
config TMS320C28031.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28031.Params;
...
params.deviceHeader = String undefined;
config TMS320C28031.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28031.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "On-Chip DPSARAM Memory",
            name: "DPSARAM",
            base: 0x8800,
            len: 0x1800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3F0000,
            len: 0x007f80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "L0SARAM",
        {
            comment: "On-Chip L0 SARAM Memory",
            name: "L0SARAM",
            base: 0x3F8000,
            len: 0x000800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FE000,
            len: 0x001FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C28031.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28031.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28031.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28031.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28031.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28031.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28031.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28031.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28031.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28031.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28032

metaonly module ti.catalog.c2800.TMS320C28032
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28032.xdc
var TMS320C28032 = xdc.useModule('ti.catalog.c2800.TMS320C28032');
per-instance config parameters
    var params = new TMS320C28032.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "DPSARAM",
                {
                    comment: "DPSARAM (6K x 16)",
                    name: "DPSARAM",
                    base: 0x8800,
                    len: 0xa000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f0000,
                    len: 0x007f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28032.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28032.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "DPSARAM (6K x 16)",
                name: "DPSARAM",
                base: 0x8800,
                len: 0xa000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f0000,
                len: 0x007f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28032.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28032.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28032.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28032.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28032.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28032.Params;
...
params.dataWordSize = Int 2;
config TMS320C28032.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28032.Params;
...
params.deviceHeader = String undefined;
config TMS320C28032.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28032.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "DPSARAM (6K x 16)",
            name: "DPSARAM",
            base: 0x8800,
            len: 0xa000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f0000,
            len: 0x007f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28032.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28032.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28032.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28032.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28032.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28032.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28032.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28032.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28032.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28032.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28033

metaonly module ti.catalog.c2800.TMS320C28033
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28033.xdc
var TMS320C28033 = xdc.useModule('ti.catalog.c2800.TMS320C28033');
per-instance config parameters
    var params = new TMS320C28033.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "DPSARAM",
                {
                    comment: "DPSARAM (6K x 16)",
                    name: "DPSARAM",
                    base: 0x8800,
                    len: 0xa000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3f0000,
                    len: 0x007f80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28033.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28033.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "DPSARAM (6K x 16)",
                name: "DPSARAM",
                base: 0x8800,
                len: 0xa000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3f0000,
                len: 0x007f80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28033.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28033.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28033.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28033.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28033.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28033.Params;
...
params.dataWordSize = Int 2;
config TMS320C28033.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28033.Params;
...
params.deviceHeader = String undefined;
config TMS320C28033.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28033.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "DPSARAM (6K x 16)",
            name: "DPSARAM",
            base: 0x8800,
            len: 0xa000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3f0000,
            len: 0x007f80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28033.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28033.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28033.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28033.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28033.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28033.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28033.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28033.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28033.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28033.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28034

metaonly module ti.catalog.c2800.TMS320C28034
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28034.xdc
var TMS320C28034 = xdc.useModule('ti.catalog.c2800.TMS320C28034');
per-instance config parameters
    var params = new TMS320C28034.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "LSARAM (2K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x0800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "DPSARAM",
                {
                    comment: "DPSARAM (6K x 16)",
                    name: "DPSARAM",
                    base: 0x8800,
                    len: 0x1800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3e8000,
                    len: 0x00ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28034.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28034.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "LSARAM (2K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x0800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "DPSARAM (6K x 16)",
                name: "DPSARAM",
                base: 0x8800,
                len: 0x1800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3e8000,
                len: 0x00ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28034.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28034.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28034.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28034.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28034.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28034.Params;
...
params.dataWordSize = Int 2;
config TMS320C28034.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28034.Params;
...
params.deviceHeader = String undefined;
config TMS320C28034.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28034.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "LSARAM (2K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x0800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "DPSARAM (6K x 16)",
            name: "DPSARAM",
            base: 0x8800,
            len: 0x1800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3e8000,
            len: 0x00ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28034.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28034.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28034.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28034.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28034.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28034.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28034.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28034.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28034.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28034.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28035

metaonly module ti.catalog.c2800.TMS320C28035
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28035.xdc
var TMS320C28035 = xdc.useModule('ti.catalog.c2800.TMS320C28035');
per-instance config parameters
    var params = new TMS320C28035.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "LSARAM (2K x 16)",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x0800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "DPSARAM",
                {
                    comment: "DPSARAM (6K x 16)",
                    name: "DPSARAM",
                    base: 0x8800,
                    len: 0x1800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3e8000,
                    len: 0x00ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x001fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28035.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28035.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "LSARAM (2K x 16)",
                name: "LSARAM",
                base: 0x8000,
                len: 0x0800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "DPSARAM",
            {
                comment: "DPSARAM (6K x 16)",
                name: "DPSARAM",
                base: 0x8800,
                len: 0x1800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3e8000,
                len: 0x00ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x001fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28035.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28035.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28035.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28035.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28035.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28035.Params;
...
params.dataWordSize = Int 2;
config TMS320C28035.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28035.Params;
...
params.deviceHeader = String undefined;
config TMS320C28035.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28035.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "LSARAM (2K x 16)",
            name: "LSARAM",
            base: 0x8000,
            len: 0x0800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "DPSARAM",
        {
            comment: "DPSARAM (6K x 16)",
            name: "DPSARAM",
            base: 0x8800,
            len: 0x1800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3e8000,
            len: 0x00ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x001fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28035.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28035.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28035.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28035.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28035.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28035.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28035.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28035.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28035.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28035.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C28044

metaonly module ti.catalog.c2800.TMS320C28044
index URL

The C28044 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28044.xdc
var TMS320C28044 = xdc.useModule('ti.catalog.c2800.TMS320C28044');
per-instance config parameters
    var params = new TMS320C28044.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L0SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L0SARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L1SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L1SARAM",
                    base: 0x9000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3E8000,
                    len: 0x00ff80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FF000,
                    len: 0x000FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28044.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28044.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L0SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L0SARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L1SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L1SARAM",
                base: 0x9000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3E8000,
                len: 0x00ff80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FF000,
                len: 0x000FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28044.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28044.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28044.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28044.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28044.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28044.Params;
...
params.dataWordSize = Int 2;
config TMS320C28044.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28044.Params;
...
params.deviceHeader = String undefined;
config TMS320C28044.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28044.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L0SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L0SARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L1SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L1SARAM",
            base: 0x9000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3E8000,
            len: 0x00ff80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FF000,
            len: 0x000FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C28044.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28044.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28044.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28044.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28044.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28044.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28044.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28044.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28044.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28044.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C2806

metaonly module ti.catalog.c2800.TMS320C2806
index URL

The C2806 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2806.xdc
var TMS320C2806 = xdc.useModule('ti.catalog.c2800.TMS320C2806');
per-instance config parameters
    var params = new TMS320C2806.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L0SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L0SARAM",
                    base: 0x8000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L1SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L1SARAM",
                    base: 0x9000,
                    len: 0x1000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "32K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3F0000,
                    len: 0x007f80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FC000,
                    len: 0x003FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2806.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2806.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L0SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L0SARAM",
                base: 0x8000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L1SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L1SARAM",
                base: 0x9000,
                len: 0x1000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "32K X 16 Flash memory",
                name: "FLASH",
                base: 0x3F0000,
                len: 0x007f80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FC000,
                len: 0x003FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2806.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2806.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2806.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2806.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2806.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2806.Params;
...
params.dataWordSize = Int 2;
config TMS320C2806.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2806.Params;
...
params.deviceHeader = String undefined;
config TMS320C2806.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2806.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L0SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L0SARAM",
            base: 0x8000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L1SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L1SARAM",
            base: 0x9000,
            len: 0x1000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "32K X 16 Flash memory",
            name: "FLASH",
            base: 0x3F0000,
            len: 0x007f80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FC000,
            len: 0x003FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C2806.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2806.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2806.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2806.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2806.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2806.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2806.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2806.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2806.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2806.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C2808

metaonly module ti.catalog.c2800.TMS320C2808
index URL

The C2808 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2808.xdc
var TMS320C2808 = xdc.useModule('ti.catalog.c2800.TMS320C2808');
per-instance config parameters
    var params = new TMS320C2808.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3E8000,
                    len: 0x00ff80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "H0SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H0SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FF000,
                    len: 0x000FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2808.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2808.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3E8000,
                len: 0x00ff80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "H0SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H0SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FF000,
                len: 0x000FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2808.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2808.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2808.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2808.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2808.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2808.Params;
...
params.dataWordSize = Int 2;
config TMS320C2808.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2808.Params;
...
params.deviceHeader = String undefined;
config TMS320C2808.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2808.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3E8000,
            len: 0x00ff80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "H0SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H0SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FF000,
            len: 0x000FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C2808.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2808.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2808.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2808.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2808.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2808.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2808.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2808.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2808.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2808.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C2809

metaonly module ti.catalog.c2800.TMS320C2809
index URL

The C2809 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2809.xdc
var TMS320C2809 = xdc.useModule('ti.catalog.c2800.TMS320C2809');
per-instance config parameters
    var params = new TMS320C2809.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x000400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3D8000,
                    len: 0x01ff80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "H0SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H0SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3FF000,
                    len: 0x000FC0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2809.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2809.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x000400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x3D8000,
                len: 0x01ff80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "H0SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H0SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3FF000,
                len: 0x000FC0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2809.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2809.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2809.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2809.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2809.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2809.Params;
...
params.dataWordSize = Int 2;
config TMS320C2809.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2809.Params;
...
params.deviceHeader = String undefined;
config TMS320C2809.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2809.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x000400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x3D8000,
            len: 0x01ff80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "H0SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H0SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3FF000,
            len: 0x000FC0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C2809.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2809.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2809.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2809.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2809.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2809.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2809.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2809.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2809.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2809.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:20 GMT


module ti.catalog.c2800.TMS320C2810

metaonly module ti.catalog.c2800.TMS320C2810
index URL

The C2810 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2810.xdc
var TMS320C2810 = xdc.useModule('ti.catalog.c2800.TMS320C2810');
per-instance config parameters
    var params = new TMS320C2810.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] TMS320C2812.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2810.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2810.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320C2812.memMap;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2810.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2810.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2810.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2810.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2810.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2810.Params;
...
params.dataWordSize = Int 2;
config TMS320C2810.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2810.Params;
...
params.deviceHeader = String undefined;
config TMS320C2810.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2810.Params;
...
params.memMap = IPlatform.Memory[string] TMS320C2812.memMap;
config TMS320C2810.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2810.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2810.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2810.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2810.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2810.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2810.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2810.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2810.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2810.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C2811

metaonly module ti.catalog.c2800.TMS320C2811
index URL

The C2811 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2811.xdc
var TMS320C2811 = xdc.useModule('ti.catalog.c2800.TMS320C2811');
per-instance config parameters
    var params = new TMS320C2811.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] TMS320C2812.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2811.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2811.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320C2812.memMap;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2811.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2811.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2811.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2811.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2811.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2811.Params;
...
params.dataWordSize = Int 2;
config TMS320C2811.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2811.Params;
...
params.deviceHeader = String undefined;
config TMS320C2811.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2811.Params;
...
params.memMap = IPlatform.Memory[string] TMS320C2812.memMap;
config TMS320C2811.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2811.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2811.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2811.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2811.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2811.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2811.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2811.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2811.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2811.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C2812

metaonly module ti.catalog.c2800.TMS320C2812
index URL

The C2812 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C2812.xdc
var TMS320C2812 = xdc.useModule('ti.catalog.c2800.TMS320C2812');
per-instance config parameters
    var params = new TMS320C2812.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "LSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "LSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "2K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3d7800,
                    len: 0x400,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3d8000,
                    len: 0x1ff80,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "H0SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H0SARAM",
                    base: 0x3f8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3ff000,
                    len: 0xfc0,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2812.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2812.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "LSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "LSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "2K X 16 OTP memory",
                name: "OTP",
                base: 0x3d7800,
                len: 0x400,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x3d8000,
                len: 0x1ff80,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "H0SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H0SARAM",
                base: 0x3f8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3ff000,
                len: 0xfc0,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2812.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2812.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2812.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2812.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2812.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2812.Params;
...
params.dataWordSize = Int 2;
config TMS320C2812.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2812.Params;
...
params.deviceHeader = String undefined;
config TMS320C2812.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C2812.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "LSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "LSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "2K X 16 OTP memory",
            name: "OTP",
            base: 0x3d7800,
            len: 0x400,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x3d8000,
            len: 0x1ff80,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "H0SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H0SARAM",
            base: 0x3f8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3ff000,
            len: 0xfc0,
            page: 0,
            space: "code/data"
        }
    ]
];
config TMS320C2812.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2812.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2812.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2812.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C2812.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2812.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2812.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2812.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2812.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2812.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28232

metaonly module ti.catalog.c2800.TMS320C28232
index URL

The 28232 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28232.xdc
var TMS320C28232 = xdc.useModule('ti.catalog.c2800.TMS320C28232');
per-instance config parameters
    var params = new TMS320C28232.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0xC000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x380400,
                    len: 0x400,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x330000,
                    len: 0x00ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x33fff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28232.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28232.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0xC000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x380400,
                len: 0x400,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x330000,
                len: 0x00ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x33fff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28232.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28232.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28232.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28232.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28232.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28232.Params;
...
params.dataWordSize = Int 2;
config TMS320C28232.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28232.Params;
...
params.deviceHeader = String undefined;
config TMS320C28232.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28232.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0xC000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x380400,
            len: 0x400,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x330000,
            len: 0x00ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x33fff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28232.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28232.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28232.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28232.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28232.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28232.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28232.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28232.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28232.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28232.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28234

metaonly module ti.catalog.c2800.TMS320C28234
index URL

The 28234 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28234.xdc
var TMS320C28234 = xdc.useModule('ti.catalog.c2800.TMS320C28234');
per-instance config parameters
    var params = new TMS320C28234.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x380400,
                    len: 0x400,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x320000,
                    len: 0x01ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x33fff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28234.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28234.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x380400,
                len: 0x400,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x320000,
                len: 0x01ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x33fff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28234.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28234.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28234.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28234.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28234.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28234.Params;
...
params.dataWordSize = Int 2;
config TMS320C28234.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28234.Params;
...
params.deviceHeader = String undefined;
config TMS320C28234.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28234.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x380400,
            len: 0x400,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x320000,
            len: 0x01ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x33fff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28234.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28234.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28234.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28234.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28234.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28234.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28234.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28234.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28234.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28234.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28235

metaonly module ti.catalog.c2800.TMS320C28235
index URL

The C28235 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28235.xdc
var TMS320C28235 = xdc.useModule('ti.catalog.c2800.TMS320C28235');
per-instance config parameters
    var params = new TMS320C28235.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x380400,
                    len: 0x400,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "256K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x300000,
                    len: 0x03ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x33fff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28235.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28235.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x380400,
                len: 0x400,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "256K X 16 Flash memory",
                name: "FLASH",
                base: 0x300000,
                len: 0x03ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x33fff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28235.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28235.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28235.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28235.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28235.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28235.Params;
...
params.dataWordSize = Int 2;
config TMS320C28235.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28235.Params;
...
params.deviceHeader = String undefined;
config TMS320C28235.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28235.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x380400,
            len: 0x400,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "256K X 16 Flash memory",
            name: "FLASH",
            base: 0x300000,
            len: 0x03ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x33fff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28235.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28235.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28235.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28235.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28235.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28235.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28235.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28235.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28235.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28235.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28332

metaonly module ti.catalog.c2800.TMS320C28332
index URL

The C28332 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28332.xdc
var TMS320C28332 = xdc.useModule('ti.catalog.c2800.TMS320C28332');
per-instance config parameters
    var params = new TMS320C28332.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0xC000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x380400,
                    len: 0x400,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x330000,
                    len: 0x00ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x33fff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28332.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28332.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0xC000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x380400,
                len: 0x400,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x330000,
                len: 0x00ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x33fff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28332.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28332.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28332.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28332.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28332.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28332.Params;
...
params.dataWordSize = Int 2;
config TMS320C28332.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28332.Params;
...
params.deviceHeader = String undefined;
config TMS320C28332.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28332.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0xC000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x380400,
            len: 0x400,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x330000,
            len: 0x00ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x33fff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28332.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28332.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28332.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28332.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28332.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28332.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28332.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28332.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28332.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28332.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28334

metaonly module ti.catalog.c2800.TMS320C28334
index URL

The C28334 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28334.xdc
var TMS320C28334 = xdc.useModule('ti.catalog.c2800.TMS320C28334');
per-instance config parameters
    var params = new TMS320C28334.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x380400,
                    len: 0x400,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x320000,
                    len: 0x01ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x33fff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28334.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28334.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x380400,
                len: 0x400,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x320000,
                len: 0x01ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x33fff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28334.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28334.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28334.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28334.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28334.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28334.Params;
...
params.dataWordSize = Int 2;
config TMS320C28334.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28334.Params;
...
params.deviceHeader = String undefined;
config TMS320C28334.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28334.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x380400,
            len: 0x400,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x320000,
            len: 0x01ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x33fff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28334.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28334.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28334.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28334.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28334.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28334.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28334.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28334.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28334.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28334.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28335

metaonly module ti.catalog.c2800.TMS320C28335
index URL

The C28335 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320C28335.xdc
var TMS320C28335 = xdc.useModule('ti.catalog.c2800.TMS320C28335');
per-instance config parameters
    var params = new TMS320C28335.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x380400,
                    len: 0x400,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "256K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x300000,
                    len: 0x03ff80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x33fff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28335.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28335.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x380400,
                len: 0x400,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "256K X 16 Flash memory",
                name: "FLASH",
                base: 0x300000,
                len: 0x03ff80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x33fff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28335.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28335.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28335.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28335.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28335.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28335.Params;
...
params.dataWordSize = Int 2;
config TMS320C28335.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28335.Params;
...
params.deviceHeader = String undefined;
config TMS320C28335.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28335.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x380400,
            len: 0x400,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "256K X 16 Flash memory",
            name: "FLASH",
            base: 0x300000,
            len: 0x03ff80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x33fff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28335.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28335.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28335.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28335.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28335.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28335.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28335.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28335.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28335.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28335.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28341

metaonly module ti.catalog.c2800.TMS320C28341
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28341.xdc
var TMS320C28341 = xdc.useModule('ti.catalog.c2800.TMS320C28341');
per-instance config parameters
    var params = new TMS320C28341.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "H01SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H01SARAM",
                    base: 0x300000,
                    len: 0x010000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28341.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28341.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H01SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H01SARAM",
                base: 0x300000,
                len: 0x010000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28341.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28341.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28341.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28341.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28341.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28341.Params;
...
params.dataWordSize = Int 2;
config TMS320C28341.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28341.Params;
...
params.deviceHeader = String undefined;
config TMS320C28341.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28341.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H01SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H01SARAM",
            base: 0x300000,
            len: 0x010000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28341.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28341.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28341.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28341.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28341.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28341.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28341.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28341.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28341.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28341.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28342

metaonly module ti.catalog.c2800.TMS320C28342
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28342.xdc
var TMS320C28342 = xdc.useModule('ti.catalog.c2800.TMS320C28342');
per-instance config parameters
    var params = new TMS320C28342.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "H01SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H01SARAM",
                    base: 0x300000,
                    len: 0x010000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28342.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28342.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H01SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H01SARAM",
                base: 0x300000,
                len: 0x010000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28342.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28342.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28342.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28342.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28342.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28342.Params;
...
params.dataWordSize = Int 2;
config TMS320C28342.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28342.Params;
...
params.deviceHeader = String undefined;
config TMS320C28342.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28342.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H01SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H01SARAM",
            base: 0x300000,
            len: 0x010000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28342.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28342.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28342.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28342.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28342.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28342.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28342.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28342.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28342.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28342.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28343

metaonly module ti.catalog.c2800.TMS320C28343
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28343.xdc
var TMS320C28343 = xdc.useModule('ti.catalog.c2800.TMS320C28343');
per-instance config parameters
    var params = new TMS320C28343.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0x10000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "H01SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H01SARAM",
                    base: 0x300000,
                    len: 0x010000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28343.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28343.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0x10000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H01SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H01SARAM",
                base: 0x300000,
                len: 0x010000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28343.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28343.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28343.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28343.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28343.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28343.Params;
...
params.dataWordSize = Int 2;
config TMS320C28343.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28343.Params;
...
params.deviceHeader = String undefined;
config TMS320C28343.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28343.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0x10000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H01SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H01SARAM",
            base: 0x300000,
            len: 0x010000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28343.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28343.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28343.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28343.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28343.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28343.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28343.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28343.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28343.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28343.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28344

metaonly module ti.catalog.c2800.TMS320C28344
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28344.xdc
var TMS320C28344 = xdc.useModule('ti.catalog.c2800.TMS320C28344');
per-instance config parameters
    var params = new TMS320C28344.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0x10000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "H01SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H01SARAM",
                    base: 0x300000,
                    len: 0x010000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28344.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28344.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0x10000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H01SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H01SARAM",
                base: 0x300000,
                len: 0x010000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28344.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28344.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28344.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28344.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28344.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28344.Params;
...
params.dataWordSize = Int 2;
config TMS320C28344.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28344.Params;
...
params.deviceHeader = String undefined;
config TMS320C28344.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28344.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0x10000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H01SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H01SARAM",
            base: 0x300000,
            len: 0x010000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28344.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28344.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28344.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28344.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28344.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28344.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28344.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28344.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28344.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28344.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28345

metaonly module ti.catalog.c2800.TMS320C28345
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28345.xdc
var TMS320C28345 = xdc.useModule('ti.catalog.c2800.TMS320C28345');
per-instance config parameters
    var params = new TMS320C28345.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0x10000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "H05SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H05SARAM",
                    base: 0x300000,
                    len: 0x030000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28345.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28345.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0x10000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H05SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H05SARAM",
                base: 0x300000,
                len: 0x030000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28345.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28345.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28345.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28345.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28345.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28345.Params;
...
params.dataWordSize = Int 2;
config TMS320C28345.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28345.Params;
...
params.deviceHeader = String undefined;
config TMS320C28345.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28345.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0x10000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H05SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H05SARAM",
            base: 0x300000,
            len: 0x030000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28345.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28345.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28345.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28345.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28345.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28345.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28345.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28345.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28345.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28345.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:21 GMT


module ti.catalog.c2800.TMS320C28346

metaonly module ti.catalog.c2800.TMS320C28346
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320C28346.xdc
var TMS320C28346 = xdc.useModule('ti.catalog.c2800.TMS320C28346');
per-instance config parameters
    var params = new TMS320C28346.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L03SARAM",
                    base: 0x8000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L47SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "L47SARAM",
                    base: 0x10000,
                    len: 0x8000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "H05SARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "H05SARAM",
                    base: 0x300000,
                    len: 0x030000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3fe000,
                    len: 0x1fc0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C28346.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C28346.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L03SARAM",
                base: 0x8000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L47SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "L47SARAM",
                base: 0x10000,
                len: 0x8000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "H05SARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "H05SARAM",
                base: 0x300000,
                len: 0x030000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3fe000,
                len: 0x1fc0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C28346.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C28346.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C28346.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C28346.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C28346.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C28346.Params;
...
params.dataWordSize = Int 2;
config TMS320C28346.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C28346.Params;
...
params.deviceHeader = String undefined;
config TMS320C28346.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C28346.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L03SARAM",
            base: 0x8000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L47SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "L47SARAM",
            base: 0x10000,
            len: 0x8000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "H05SARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "H05SARAM",
            base: 0x300000,
            len: 0x030000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3fe000,
            len: 0x1fc0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320C28346.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28346.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C28346.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C28346.Params;
...
params.minProgUnitSize = Int 2;
config TMS320C28346.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C28346.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C28346.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C28346.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C28346.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C28346.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28062

metaonly module ti.catalog.c2800.TMS320F28062
index URL

The F28062 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320F28062.xdc
var TMS320F28062 = xdc.useModule('ti.catalog.c2800.TMS320F28062');
per-instance config parameters
    var params = new TMS320F28062.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L5DPSARAM",
                {
                    comment: "L5 DPSARAM (8K x 16)",
                    name: "L5DPSARAM",
                    base: 0xC000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3E8000,
                    len: 0x00FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28062.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28062.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L5DPSARAM",
            {
                comment: "L5 DPSARAM (8K x 16)",
                name: "L5DPSARAM",
                base: 0xC000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3E8000,
                len: 0x00FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28062.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28062.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28062.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28062.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28062.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28062.Params;
...
params.dataWordSize = Int 2;
config TMS320F28062.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28062.Params;
...
params.deviceHeader = String undefined;
config TMS320F28062.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28062.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L5DPSARAM",
        {
            comment: "L5 DPSARAM (8K x 16)",
            name: "L5DPSARAM",
            base: 0xC000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3E8000,
            len: 0x00FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28062.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28062.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28062.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28062.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28062.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28062.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28062.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28062.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28062.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28062.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28063

metaonly module ti.catalog.c2800.TMS320F28063
index URL

The F28063 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320F28063.xdc
var TMS320F28063 = xdc.useModule('ti.catalog.c2800.TMS320F28063');
per-instance config parameters
    var params = new TMS320F28063.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L56DPSARAM",
                {
                    comment: "L5-L6 DPSARAM (16K x 16)",
                    name: "L56DPSARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3E8000,
                    len: 0x00FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28063.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28063.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3E8000,
                len: 0x00FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28063.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28063.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28063.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28063.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28063.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28063.Params;
...
params.dataWordSize = Int 2;
config TMS320F28063.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28063.Params;
...
params.deviceHeader = String undefined;
config TMS320F28063.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28063.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3E8000,
            len: 0x00FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28063.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28063.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28063.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28063.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28063.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28063.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28063.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28063.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28063.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28063.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28064

metaonly module ti.catalog.c2800.TMS320F28064
index URL

The F28064 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320F28064.xdc
var TMS320F28064 = xdc.useModule('ti.catalog.c2800.TMS320F28064');
per-instance config parameters
    var params = new TMS320F28064.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L56DPSARAM",
                {
                    comment: "L5-L6 DPSARAM (16K x 16)",
                    name: "L56DPSARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L78DPSARAM",
                {
                    comment: "L7-L8 DPSARAM (16K x 16)",
                    name: "L78DPSARAM",
                    base: 0x10000,
                    len: 0x04000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3E8000,
                    len: 0x00FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28064.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28064.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L78DPSARAM",
            {
                comment: "L7-L8 DPSARAM (16K x 16)",
                name: "L78DPSARAM",
                base: 0x10000,
                len: 0x04000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3E8000,
                len: 0x00FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28064.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28064.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28064.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28064.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28064.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28064.Params;
...
params.dataWordSize = Int 2;
config TMS320F28064.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28064.Params;
...
params.deviceHeader = String undefined;
config TMS320F28064.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28064.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L78DPSARAM",
        {
            comment: "L7-L8 DPSARAM (16K x 16)",
            name: "L78DPSARAM",
            base: 0x10000,
            len: 0x04000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3E8000,
            len: 0x00FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28064.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28064.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28064.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28064.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28064.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28064.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28064.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28064.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28064.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28064.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28065

metaonly module ti.catalog.c2800.TMS320F28065
index URL

The F28065 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320F28065.xdc
var TMS320F28065 = xdc.useModule('ti.catalog.c2800.TMS320F28065');
per-instance config parameters
    var params = new TMS320F28065.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L56DPSARAM",
                {
                    comment: "L5-L6 DPSARAM (16K x 16)",
                    name: "L56DPSARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L78DPSARAM",
                {
                    comment: "L7-L8 DPSARAM (16K x 16)",
                    name: "L78DPSARAM",
                    base: 0x10000,
                    len: 0x04000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "64K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3E8000,
                    len: 0x00FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28065.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28065.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L78DPSARAM",
            {
                comment: "L7-L8 DPSARAM (16K x 16)",
                name: "L78DPSARAM",
                base: 0x10000,
                len: 0x04000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "64K X 16 Flash memory",
                name: "FLASH",
                base: 0x3E8000,
                len: 0x00FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28065.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28065.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28065.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28065.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28065.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28065.Params;
...
params.dataWordSize = Int 2;
config TMS320F28065.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28065.Params;
...
params.deviceHeader = String undefined;
config TMS320F28065.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28065.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L78DPSARAM",
        {
            comment: "L7-L8 DPSARAM (16K x 16)",
            name: "L78DPSARAM",
            base: 0x10000,
            len: 0x04000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "64K X 16 Flash memory",
            name: "FLASH",
            base: 0x3E8000,
            len: 0x00FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28065.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28065.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28065.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28065.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28065.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28065.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28065.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28065.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28065.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28065.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28066

metaonly module ti.catalog.c2800.TMS320F28066
index URL

The F28066 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c2800/TMS320F28066.xdc
var TMS320F28066 = xdc.useModule('ti.catalog.c2800.TMS320F28066');
per-instance config parameters
    var params = new TMS320F28066.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L56DPSARAM",
                {
                    comment: "L5-L6 DPSARAM (16K x 16)",
                    name: "L56DPSARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3D8000,
                    len: 0x01FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28066.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28066.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x3D8000,
                len: 0x01FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28066.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28066.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28066.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28066.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28066.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28066.Params;
...
params.dataWordSize = Int 2;
config TMS320F28066.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28066.Params;
...
params.deviceHeader = String undefined;
config TMS320F28066.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28066.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x3D8000,
            len: 0x01FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28066.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28066.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28066.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28066.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28066.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28066.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28066.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28066.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28066.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28066.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28067

metaonly module ti.catalog.c2800.TMS320F28067
index URL

The F28067 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320F28067.xdc
var TMS320F28067 = xdc.useModule('ti.catalog.c2800.TMS320F28067');
per-instance config parameters
    var params = new TMS320F28067.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L56DPSARAM",
                {
                    comment: "L5-L6 DPSARAM (16K x 16)",
                    name: "L56DPSARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L78DPSARAM",
                {
                    comment: "L7-L8 DPSARAM (16K x 16)",
                    name: "L78DPSARAM",
                    base: 0x10000,
                    len: 0x04000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3D8000,
                    len: 0x01FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28067.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28067.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L78DPSARAM",
            {
                comment: "L7-L8 DPSARAM (16K x 16)",
                name: "L78DPSARAM",
                base: 0x10000,
                len: 0x04000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x3D8000,
                len: 0x01FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28067.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28067.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28067.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28067.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28067.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28067.Params;
...
params.dataWordSize = Int 2;
config TMS320F28067.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28067.Params;
...
params.deviceHeader = String undefined;
config TMS320F28067.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28067.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L78DPSARAM",
        {
            comment: "L7-L8 DPSARAM (16K x 16)",
            name: "L78DPSARAM",
            base: 0x10000,
            len: 0x04000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x3D8000,
            len: 0x01FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28067.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28067.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28067.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28067.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28067.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28067.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28067.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28067.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28067.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28067.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28068

metaonly module ti.catalog.c2800.TMS320F28068
index URL

The F28068 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320F28068.xdc
var TMS320F28068 = xdc.useModule('ti.catalog.c2800.TMS320F28068');
per-instance config parameters
    var params = new TMS320F28068.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L56DPSARAM",
                {
                    comment: "L5-L6 DPSARAM (16K x 16)",
                    name: "L56DPSARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L78DPSARAM",
                {
                    comment: "L7-L8 DPSARAM (16K x 16)",
                    name: "L78DPSARAM",
                    base: 0x10000,
                    len: 0x04000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3D8000,
                    len: 0x01FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28068.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28068.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L78DPSARAM",
            {
                comment: "L7-L8 DPSARAM (16K x 16)",
                name: "L78DPSARAM",
                base: 0x10000,
                len: 0x04000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x3D8000,
                len: 0x01FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28068.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28068.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28068.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28068.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28068.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28068.Params;
...
params.dataWordSize = Int 2;
config TMS320F28068.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28068.Params;
...
params.deviceHeader = String undefined;
config TMS320F28068.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28068.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L78DPSARAM",
        {
            comment: "L7-L8 DPSARAM (16K x 16)",
            name: "L78DPSARAM",
            base: 0x10000,
            len: 0x04000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x3D8000,
            len: 0x01FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28068.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28068.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28068.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28068.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28068.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28068.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28068.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28068.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28068.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28068.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


module ti.catalog.c2800.TMS320F28069

metaonly module ti.catalog.c2800.TMS320F28069
index URL

The F28069 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c2800/TMS320F28069.xdc
var TMS320F28069 = xdc.useModule('ti.catalog.c2800.TMS320F28069');
per-instance config parameters
    var params = new TMS320F28069.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "2800";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "MSARAM",
                {
                    comment: "On-Chip RAM Memory",
                    name: "MSARAM",
                    base: 0x0,
                    len: 0x800,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "PIEVECT",
                {
                    comment: "On-Chip PIEVECT RAM Memory",
                    name: "PIEVECT",
                    base: 0xD00,
                    len: 0x100,
                    page: 1,
                    space: "data"
                }
            ],
            [
                "L03DPSARAM",
                {
                    comment: "L0-L3 DPSARAM (8K x 16)",
                    name: "L03DPSARAM",
                    base: 0x8000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L4SARAM",
                {
                    comment: "L4 SARAM (8K x 16)",
                    name: "L4SARAM",
                    base: 0xA000,
                    len: 0x2000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L56DPSARAM",
                {
                    comment: "L5-L6 DPSARAM (16K x 16)",
                    name: "L56DPSARAM",
                    base: 0xC000,
                    len: 0x4000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "L78DPSARAM",
                {
                    comment: "L7-L8 DPSARAM (16K x 16)",
                    name: "L78DPSARAM",
                    base: 0x10000,
                    len: 0x04000,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "OTP",
                {
                    comment: "1K X 16 OTP memory",
                    name: "OTP",
                    base: 0x3D7800,
                    len: 0x0003FA,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "FLASH",
                {
                    comment: "128K X 16 Flash memory",
                    name: "FLASH",
                    base: 0x3D8000,
                    len: 0x01FF80,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BEGIN",
                {
                    comment: "FLASH boot entry point",
                    name: "BEGIN",
                    base: 0x3f7ff6,
                    len: 0x000002,
                    page: 0,
                    space: "code"
                }
            ],
            [
                "BOOTROM",
                {
                    comment: "On-Chip Boot ROM",
                    name: "BOOTROM",
                    base: 0x3F8000,
                    len: 0x007FC0,
                    page: 0,
                    space: "code"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 2;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320F28069.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320F28069.Params;
// Instance config-params object
    params.cpuCore = String "2800";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "MSARAM",
            {
                comment: "On-Chip RAM Memory",
                name: "MSARAM",
                base: 0x0,
                len: 0x800,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "PIEVECT",
            {
                comment: "On-Chip PIEVECT RAM Memory",
                name: "PIEVECT",
                base: 0xD00,
                len: 0x100,
                page: 1,
                space: "data"
            }
        ],
        [
            "L03DPSARAM",
            {
                comment: "L0-L3 DPSARAM (8K x 16)",
                name: "L03DPSARAM",
                base: 0x8000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L4SARAM",
            {
                comment: "L4 SARAM (8K x 16)",
                name: "L4SARAM",
                base: 0xA000,
                len: 0x2000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L56DPSARAM",
            {
                comment: "L5-L6 DPSARAM (16K x 16)",
                name: "L56DPSARAM",
                base: 0xC000,
                len: 0x4000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "L78DPSARAM",
            {
                comment: "L7-L8 DPSARAM (16K x 16)",
                name: "L78DPSARAM",
                base: 0x10000,
                len: 0x04000,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "OTP",
            {
                comment: "1K X 16 OTP memory",
                name: "OTP",
                base: 0x3D7800,
                len: 0x0003FA,
                page: 0,
                space: "code"
            }
        ],
        [
            "FLASH",
            {
                comment: "128K X 16 Flash memory",
                name: "FLASH",
                base: 0x3D8000,
                len: 0x01FF80,
                page: 0,
                space: "code"
            }
        ],
        [
            "BEGIN",
            {
                comment: "FLASH boot entry point",
                name: "BEGIN",
                base: 0x3f7ff6,
                len: 0x000002,
                page: 0,
                space: "code"
            }
        ],
        [
            "BOOTROM",
            {
                comment: "On-Chip Boot ROM",
                name: "BOOTROM",
                base: 0x3F8000,
                len: 0x007FC0,
                page: 0,
                space: "code"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 2;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320F28069.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320F28069.Params;
...
params.cpuCore = String "2800";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320F28069.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320F28069.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320F28069.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320F28069.Params;
...
params.dataWordSize = Int 2;
config TMS320F28069.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320F28069.Params;
...
params.deviceHeader = String undefined;
config TMS320F28069.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320F28069.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "MSARAM",
        {
            comment: "On-Chip RAM Memory",
            name: "MSARAM",
            base: 0x0,
            len: 0x800,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "PIEVECT",
        {
            comment: "On-Chip PIEVECT RAM Memory",
            name: "PIEVECT",
            base: 0xD00,
            len: 0x100,
            page: 1,
            space: "data"
        }
    ],
    [
        "L03DPSARAM",
        {
            comment: "L0-L3 DPSARAM (8K x 16)",
            name: "L03DPSARAM",
            base: 0x8000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L4SARAM",
        {
            comment: "L4 SARAM (8K x 16)",
            name: "L4SARAM",
            base: 0xA000,
            len: 0x2000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L56DPSARAM",
        {
            comment: "L5-L6 DPSARAM (16K x 16)",
            name: "L56DPSARAM",
            base: 0xC000,
            len: 0x4000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "L78DPSARAM",
        {
            comment: "L7-L8 DPSARAM (16K x 16)",
            name: "L78DPSARAM",
            base: 0x10000,
            len: 0x04000,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "OTP",
        {
            comment: "1K X 16 OTP memory",
            name: "OTP",
            base: 0x3D7800,
            len: 0x0003FA,
            page: 0,
            space: "code"
        }
    ],
    [
        "FLASH",
        {
            comment: "128K X 16 Flash memory",
            name: "FLASH",
            base: 0x3D8000,
            len: 0x01FF80,
            page: 0,
            space: "code"
        }
    ],
    [
        "BEGIN",
        {
            comment: "FLASH boot entry point",
            name: "BEGIN",
            base: 0x3f7ff6,
            len: 0x000002,
            page: 0,
            space: "code"
        }
    ],
    [
        "BOOTROM",
        {
            comment: "On-Chip Boot ROM",
            name: "BOOTROM",
            base: 0x3F8000,
            len: 0x007FC0,
            page: 0,
            space: "code"
        }
    ]
];
config TMS320F28069.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28069.Params;
...
params.minDataUnitSize = Int 1;
config TMS320F28069.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320F28069.Params;
...
params.minProgUnitSize = Int 2;
config TMS320F28069.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320F28069.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320F28069.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320F28069.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320F28069.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320F28069.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:22 GMT


package ti.catalog.c2800.concertoInit
index URL

Concerto 28xx boot time initialization support

XDCspec declarations sourced in ti/catalog/c2800/concertoInit/package.xdc
package ti.catalog.c2800.concertoInit [1, 0, 0] {
    module Boot;
    // Concerto C28 Boot Support
}
generated on Sun, 25 Nov 2018 22:19:16 GMT


module ti.catalog.c2800.concertoInit.Boot
index URL

Concerto C28 Boot Support

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This Boot module can be used to generate a small section that supports booting the C28 processor from Flash. It consists of a single "LB _c_int00" instruction. [ more ... ]
C synopsis target-domain sourced in ti/catalog/c2800/concertoInit/Boot.xdc
#include <ti/catalog/c2800/concertoInit/Boot.h>
DETAILS
This Boot module can be used to generate a small section that supports booting the C28 processor from Flash. It consists of a single "LB _c_int00" instruction.
When bootFromFlash is true, the instruction will be placed at "BEGIN", as defined in the linker command file.
Boot also supports initializing Flash controller wait states, enabling program prefetches, and data caching within the Flash controller.
Configuration settings sourced in ti/catalog/c2800/concertoInit/Boot.xdc
var Boot = xdc.useModule('ti.catalog.c2800.concertoInit.Boot');
module-wide config parameters
     Boot.bootFromFlash// Boot from Flash flag. Default is true = Bool true;
     Boot.configureFlashController// Flash controller configuration flag, default is true = Bool true;
     Boot.configureFlashWaitStates// Flash controller wait states configuration flag, default is true = Bool true;
     Boot.enableFlashDataCache// Flash controller data cache enable flag, default is true = Bool true;
     Boot.enableFlashProgramPrefetch// Flash controller program prefetch enable flag, default is false = Bool false;
     Boot.loadSegment// Specifies where to load the flash function (include the 'PAGE' number) = String undefined;
     Boot.runSegment// Specifies where to run the flash function (include the 'PAGE' number) = String undefined;
metaonly config Boot.bootFromFlash // module-wide
index URL

Boot from Flash flag. Default is true

Configuration settings
Boot.bootFromFlash = Bool true;
DETAILS
Set to true to enable booting the C28 from Flash.
metaonly config Boot.configureFlashController // module-wide
index URL

Flash controller configuration flag, default is true

Configuration settings
Boot.configureFlashController = Bool true;
DETAILS
Set to true to enable the configuration of the Flash controller wait states, program and data cache.
metaonly config Boot.configureFlashWaitStates // module-wide
index URL

Flash controller wait states configuration flag, default is true

Configuration settings
Boot.configureFlashWaitStates = Bool true;
DETAILS
Set to true to configure the Flash controller wait states. The number of wait states is computed based upon the CPU frequency.
metaonly config Boot.enableFlashDataCache // module-wide
index URL

Flash controller data cache enable flag, default is true

Configuration settings
Boot.enableFlashDataCache = Bool true;
DETAILS
Set to true to enable the Flash controller's data cache.
metaonly config Boot.enableFlashProgramPrefetch // module-wide
index URL

Flash controller program prefetch enable flag, default is false

Configuration settings
Boot.enableFlashProgramPrefetch = Bool false;
DETAILS
Set to true to enable the Flash controller's program prefetch.
WARNING: Program prefetch must not be enabled on pre Revision A devices if there are any fast branch instructions in the program image. See the device errata for more information.
metaonly config Boot.loadSegment // module-wide
index URL

Specifies where to load the flash function (include the 'PAGE' number)

Configuration settings
Boot.loadSegment = String undefined;
DETAILS
If 'configureFlashWaitStates' is true, then this parameter determines where the ".ti_catalog_c2800_initF2837x_flashfuncs" section gets loaded.
metaonly config Boot.runSegment // module-wide
index URL

Specifies where to run the flash function (include the 'PAGE' number)

Configuration settings
Boot.runSegment = String undefined;
DETAILS
If 'configureFlashWaitStates' is true then this parameter determines where the ".ti_catalog_c2800_initF2837x_flashfuncs" section gets executed at runtime.
generated on Sun, 25 Nov 2018 22:19:16 GMT


package ti.catalog.c2800.init
index URL

C28xx boot time initialization support

XDCspec declarations sourced in ti/catalog/c2800/init/package.xdc
package ti.catalog.c2800.init [1, 0, 0] {
    module Boot;
    // 28x Boot Support
}
generated on Sun, 25 Nov 2018 22:19:17 GMT


module ti.catalog.c2800.init.Boot
index URL

28x Boot Support

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The Boot module supports boot initialization for the 28x devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing). [ more ... ]
C synopsis target-domain sourced in ti/catalog/c2800/init/Boot.xdc
#include <ti/catalog/c2800/init/Boot.h>
DETAILS
The Boot module supports boot initialization for the 28x devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
Configuration settings sourced in ti/catalog/c2800/init/Boot.xdc
var Boot = xdc.useModule('ti.catalog.c2800.init.Boot');
module-wide constants & types
    values of type Boot.Type// PLL type
        const Boot.Type_280x// 280x (PLL configuration not supported for this type);
        const Boot.Type_281x// 281x (PLL configuration not supported for this type);
        const Boot.Type_282xx_283xx// 282xx or 283xx;
        const Boot.Type_2802x_2803x_2806x// 2802x or 2803x or 2806x;
        const Boot.Type_2834x// 2834x;
    var obj = new Boot.ModuleView// ;
        obj.disableWatchdog = Bool ...
        obj.configurePll = Bool ...
        obj.pllcrDIV = UInt ...
        obj.pllstsDIVSEL = UInt ...
module-wide config parameters
     Boot.bootFromFlash// Boot from FLASH flag, default is false = Bool false;
     Boot.configurePll// PLL configuration flag, default is false = Bool false;
     Boot.disableWatchdog// Watchdog disable flag, default is false = Bool false;
     Boot.enableEzdspXintfConfig// Configure the external memory interface (XINTF) for eZdsp283xx boards = Bool false;
     Boot.limpAbortFunction// Function to be called when Limp mode is detected = Fxn undefined;
     Boot.pllOSCCLK// OSCCLK input frequency to PLL, in MHz. Default is 10 MHz = UInt 10;
     Boot.pllType// PLL type = Boot.Type undefined;
     Boot.pllcrDIV// PLLCR[DIV] clocking ratio value. Default is 10 = UInt 10;
     Boot.pllstsDIVSEL// PLLSTS[DIVSEL] divide select value. Default is 2 = UInt 2;
     Boot.rovViewInfo// = ViewInfo.Instance ViewInfo.create;
module-wide functions
     Boot.getFrequency// Gets the resulting output frequency (in Hz) given the PLL configuration parameters() returns UInt32
     Boot.registerFreqListener// Register a module to be notified whenever the frequency changes(Any listener) returns Any
metaonly enum Boot.Type
index URL

PLL type

Configuration settings
values of type Boot.Type
    const Boot.Type_280x;
    // 280x (PLL configuration not supported for this type)
    const Boot.Type_281x;
    // 281x (PLL configuration not supported for this type)
    const Boot.Type_282xx_283xx;
    // 282xx or 283xx
    const Boot.Type_2802x_2803x_2806x;
    // 2802x or 2803x or 2806x
    const Boot.Type_2834x;
    // 2834x
metaonly struct Boot.ModuleView
index URL
Configuration settings
var obj = new Boot.ModuleView;
    obj.disableWatchdog = Bool ...
    obj.configurePll = Bool ...
    obj.pllcrDIV = UInt ...
    obj.pllstsDIVSEL = UInt ...
metaonly config Boot.bootFromFlash // module-wide
index URL

Boot from FLASH flag, default is false

Configuration settings
Boot.bootFromFlash = Bool false;
DETAILS
Set to true to enable booting from FLASH. When set to true, a long branch (LB) to the c_int00 entry point will be placed at the BEGIN section address defined in the linker command file.
metaonly config Boot.configurePll // module-wide
index URL

PLL configuration flag, default is false

Configuration settings
Boot.configurePll = Bool false;
DETAILS
Set to true to configure the PLL.
metaonly config Boot.disableWatchdog // module-wide
index URL

Watchdog disable flag, default is false

Configuration settings
Boot.disableWatchdog = Bool false;
DETAILS
Set to true to disable the watchdog timer.
metaonly config Boot.enableEzdspXintfConfig // module-wide
index URL

Configure the external memory interface (XINTF) for eZdsp283xx boards

Configuration settings
Boot.enableEzdspXintfConfig = Bool false;
DETAILS
This external memory interface configuration is applicable only for eZdsp283xx boards; it should not be enabled for any other boards.
metaonly config Boot.limpAbortFunction // module-wide
index URL

Function to be called when Limp mode is detected

Configuration settings
Boot.limpAbortFunction = Fxn undefined;
DETAILS
This function is called when the Boot module is about to configure the PLL, but finds the device operating in Limp mode (i.e., the mode when a missing OSCCLK input has been detected).
If this function is not specified by the application, a default function will be used, which does an ESTOP0 and then enters an infinite loop.
metaonly config Boot.pllOSCCLK // module-wide
index URL

OSCCLK input frequency to PLL, in MHz. Default is 10 MHz

Configuration settings
Boot.pllOSCCLK = UInt 10;
DETAILS
This is the frequency of the oscillator clock (OSCCLK) input to the PLL. On some devices (e.g., TMS320C28346) this will correspond to the frequency of an external crystal or clock input. On others (e.g., TMS320F28069) this will correspond to the frequency of an internal oscillator which is the default OSCCLK coming out of reset.
metaonly config Boot.pllType // module-wide
index URL

PLL type

Configuration settings
Boot.pllType = Boot.Type undefined;
DETAILS
The default will be determined by platform specification, or by the device ID for the generic (tms320c28) platform.
metaonly config Boot.pllcrDIV // module-wide
index URL

PLLCR[DIV] clocking ratio value. Default is 10

Configuration settings
Boot.pllcrDIV = UInt 10;
DETAILS
This is the actual value written to the DIV bits in the PLL Control Register (PLLCR)
metaonly config Boot.pllstsDIVSEL // module-wide
index URL

PLLSTS[DIVSEL] divide select value. Default is 2

Configuration settings
Boot.pllstsDIVSEL = UInt 2;
DETAILS
This is the actual value written to the DIVSEL bits in the PLL Status Register (PLLSTS).
This configuration parameter applies for all of the enumerated PLL types, except for "Type_280x".
metaonly config Boot.rovViewInfo // module-wide
index URL
Configuration settings
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
metaonly Boot.getFrequency() // module-wide
index URL

Gets the resulting output frequency (in Hz) given the PLL configuration parameters

Configuration settings
Boot.getFrequency() returns UInt32
metaonly Boot.registerFreqListener() // module-wide
index URL

Register a module to be notified whenever the frequency changes

Configuration settings
Boot.registerFreqListener(Any listener) returns Any
DETAILS
The registered module must have a function named 'fireFrequencyUpdate' which takes the new frequency as an argument.
generated on Sun, 25 Nov 2018 22:19:17 GMT


package ti.catalog.c2800.initF2837x
index URL

2837x and 2807x boot time initialization support

XDCspec declarations sourced in ti/catalog/c2800/initF2837x/package.xdc
package ti.catalog.c2800.initF2837x [1, 0, 0] {
    module Boot;
    // Soprano Boot Support
}
generated on Sun, 25 Nov 2018 22:19:23 GMT


module ti.catalog.c2800.initF2837x.Boot
index URL

Soprano Boot Support

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The Boot module supports boot initialization for the C28 Soprano cores. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing). [ more ... ]
C synopsis target-domain sourced in ti/catalog/c2800/initF2837x/Boot.xdc
#include <ti/catalog/c2800/initF2837x/Boot.h>
Constants
extern const Bool
Boot_configureClocks// Clock configuration flag, default is false;
DETAILS
The Boot module supports boot initialization for the C28 Soprano cores. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and called very early at boot time (prior to cinit processing).
The code to support the boot module is placed in a separate section named ".text:.bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
config Boot_configureClocks // module-wide
index URL

Clock configuration flag, default is false

C synopsis target-domain
extern const Bool Boot_configureClocks;
DETAILS
Set to true to configure the PLL and system subsystem clock dividers.
Configuration settings sourced in ti/catalog/c2800/initF2837x/Boot.xdc
var Boot = xdc.useModule('ti.catalog.c2800.initF2837x.Boot');
module-wide constants & types
    values of type Boot.FractMult// System PLL Fractional Multiplier (SPLLFMULT) value
        const Boot.Fract_0// Fractional multiplier is 0;
        const Boot.Fract_25// Fractional multiplier is 0.25;
        const Boot.Fract_50// Fractional multiplier is 0.5;
        const Boot.Fract_75// Fractional multiplier is 0.75;
    values of type Boot.OscClk// Oscillator Clock Source Select Bit for OSCCLK
        const Boot.OscClk_INTOSC2// internal oscillator 2 (default on reset);
        const Boot.OscClk_XTAL// external oscillator;
        const Boot.OscClk_INTOSC1// internal oscillator 1;
        const Boot.OscClk_RESERVED// reserved (default to INTOSC1);
    var obj = new Boot.ModuleView// ;
        obj.configureClocks = Bool ...
        obj.OSCCLK = UInt ...
        obj.SPLLIMULT = UInt ...
        obj.SPLLFMULT = String ...
        obj.SYSCLKDIVSEL = String ...
        obj.bootCPU2 = Bool ...
module-wide config parameters
     Boot.configureClocks// Clock configuration flag, default is false = Bool false;
     Boot.OSCCLK// OSCCLK input frequency to PLL, in MHz = UInt 10;
     Boot.OSCCLKSRCSEL// Oscillator Clock source select bit for OSCCLK = Boot.OscClk Boot.OscClk_INTOSC2;
     Boot.SPLLFMULT// System PLL Fractional Multiplier (SPLLFMULT) value = Boot.FractMult Boot.Fract_0;
     Boot.SPLLIMULT// System PLL Integer Multiplier (SPLLIMULT) value = UInt 1;
     Boot.SYSCLKDIVSEL// System Clock Divider Select (SYSCLKDIVSEL) value = UInt 2;
     Boot.bootCPU2// Initiate booting of the CPU2 processor. Default is false = Bool false;
     Boot.bootFromFlash// Boot from Flash flag. Default is true = Bool true;
     Boot.configSharedRAMs// Configure Shared RAM regions before booting the C28 processor. Default is true = Bool true;
     Boot.configureFlashController// Flash controller configuration flag, default is true = Bool true;
     Boot.configureFlashWaitStates// Flash controller wait states configuration flag, default is true = Bool true;
     Boot.disableWatchdog// Watchdog disable flag, default is false = Bool false;
     Boot.enableFlashDataCache// Flash controller data cache enable flag, default is true = Bool true;
     Boot.enableFlashProgramCache// Flash controller program cache enable flag, default is true = Bool true;
     Boot.limpAbortFunction// Function to be called when Limp mode is detected = Fxn undefined;
     Boot.loadSegment// Specifies where to load the flash function (include the 'PAGE' number) = String undefined;
     Boot.rovViewInfo// = ViewInfo.Instance ViewInfo.create;
     Boot.runSegment// Specifies where to run the flash function (include the 'PAGE' number) = String undefined;
     Boot.sharedMemoryOwnerMask// Shared RAM owner select mask = Bits32 0;
metaonly enum Boot.FractMult
index URL

System PLL Fractional Multiplier (SPLLFMULT) value

Configuration settings
values of type Boot.FractMult
    const Boot.Fract_0;
    // Fractional multiplier is 0
    const Boot.Fract_25;
    // Fractional multiplier is 0.25
    const Boot.Fract_50;
    // Fractional multiplier is 0.5
    const Boot.Fract_75;
    // Fractional multiplier is 0.75
metaonly enum Boot.OscClk
index URL

Oscillator Clock Source Select Bit for OSCCLK

Configuration settings
values of type Boot.OscClk
    const Boot.OscClk_INTOSC2;
    // internal oscillator 2 (default on reset)
    const Boot.OscClk_XTAL;
    // external oscillator
    const Boot.OscClk_INTOSC1;
    // internal oscillator 1
    const Boot.OscClk_RESERVED;
    // reserved (default to INTOSC1)
metaonly struct Boot.ModuleView
index URL
Configuration settings
var obj = new Boot.ModuleView;
    obj.configureClocks = Bool ...
    obj.OSCCLK = UInt ...
    obj.SPLLIMULT = UInt ...
    obj.SPLLFMULT = String ...
    obj.SYSCLKDIVSEL = String ...
    obj.bootCPU2 = Bool ...
config Boot.configureClocks // module-wide
index URL

Clock configuration flag, default is false

Configuration settings
Boot.configureClocks = Bool false;
DETAILS
Set to true to configure the PLL and system subsystem clock dividers.
C SYNOPSIS
Boot_configureClocks
metaonly config Boot.OSCCLK // module-wide
index URL

OSCCLK input frequency to PLL, in MHz

Configuration settings
Boot.OSCCLK = UInt 10;
DETAILS
This is the frequency of the oscillator clock (OSCCLK) input to the PLL. The default internal oscillator is 10 Mhz.
metaonly config Boot.OSCCLKSRCSEL // module-wide
index URL

Oscillator Clock source select bit for OSCCLK

Configuration settings
Boot.OSCCLKSRCSEL = Boot.OscClk Boot.OscClk_INTOSC2;
DETAILS
The default on reset is INTOSC2
metaonly config Boot.SPLLFMULT // module-wide
index URL

System PLL Fractional Multiplier (SPLLFMULT) value

Configuration settings
Boot.SPLLFMULT = Boot.FractMult Boot.Fract_0;
metaonly config Boot.SPLLIMULT // module-wide
index URL

System PLL Integer Multiplier (SPLLIMULT) value

Configuration settings
Boot.SPLLIMULT = UInt 1;
metaonly config Boot.SYSCLKDIVSEL // module-wide
index URL

System Clock Divider Select (SYSCLKDIVSEL) value

Configuration settings
Boot.SYSCLKDIVSEL = UInt 2;
metaonly config Boot.bootCPU2 // module-wide
index URL

Initiate booting of the CPU2 processor. Default is false

Configuration settings
Boot.bootCPU2 = Bool false;
DETAILS
Set to true to enable CPU1 to initiate boot of CPU2.
If enabled, this will occur after the optional clock configuration step, enabled by configureClocks.
metaonly config Boot.bootFromFlash // module-wide
index URL

Boot from Flash flag. Default is true

Configuration settings
Boot.bootFromFlash = Bool true;
DETAILS
Set to true to enable booting CPU1 from Flash.
metaonly config Boot.configSharedRAMs // module-wide
index URL

Configure Shared RAM regions before booting the C28 processor. Default is true

Configuration settings
Boot.configSharedRAMs = Bool true;
DETAILS
Set to true to enable Shared RAM regions S0-S7, to set the owner of each region and the write access permissions for the onwer.
metaonly config Boot.configureFlashController // module-wide
index URL

Flash controller configuration flag, default is true

Configuration settings
Boot.configureFlashController = Bool true;
DETAILS
Set to true to enable the configuration of the Flash controller wait states, program and data cache.
metaonly config Boot.configureFlashWaitStates // module-wide
index URL

Flash controller wait states configuration flag, default is true

Configuration settings
Boot.configureFlashWaitStates = Bool true;
DETAILS
Set to true to configure the Flash controller wait states. The number of wait states is computed based upon the CPU frequency.
metaonly config Boot.disableWatchdog // module-wide
index URL

Watchdog disable flag, default is false

Configuration settings
Boot.disableWatchdog = Bool false;
DETAILS
Set to true to disable the watchdog timer.
metaonly config Boot.enableFlashDataCache // module-wide
index URL

Flash controller data cache enable flag, default is true

Configuration settings
Boot.enableFlashDataCache = Bool true;
DETAILS
Set to true to enable the Flash controller's data cache.
metaonly config Boot.enableFlashProgramCache // module-wide
index URL

Flash controller program cache enable flag, default is true

Configuration settings
Boot.enableFlashProgramCache = Bool true;
DETAILS
Set to true to enable the Flash controller's program cache.
metaonly config Boot.limpAbortFunction // module-wide
index URL

Function to be called when Limp mode is detected

Configuration settings
Boot.limpAbortFunction = Fxn undefined;
DETAILS
This function is called when the Boot module is about to configure the PLL, but finds the device operating in Limp mode (i.e., the mode when a missing OSCCLK input has been detected).
If this function is not specified by the application, a default function will be used, which spins in an infinite loop.
metaonly config Boot.loadSegment // module-wide
index URL

Specifies where to load the flash function (include the 'PAGE' number)

Configuration settings
Boot.loadSegment = String undefined;
DETAILS
If 'configureFlashWaitStates' is true, then this parameter determines where the ".ti_catalog_c2800_initF2837x_flashfuncs" section gets loaded.
metaonly config Boot.rovViewInfo // module-wide
index URL
Configuration settings
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
metaonly config Boot.runSegment // module-wide
index URL

Specifies where to run the flash function (include the 'PAGE' number)

Configuration settings
Boot.runSegment = String undefined;
DETAILS
If 'configureFlashWaitStates' is true then this parameter determines where the ".ti_catalog_c2800_initF2837x_flashfuncs" section gets executed at runtime.
metaonly config Boot.sharedMemoryOwnerMask // module-wide
index URL

Shared RAM owner select mask

Configuration settings
Boot.sharedMemoryOwnerMask = Bits32 0;
DETAILS
This parameter is used for writing the GSxMSEL register. By default, each value of each shared RAM select bit is '0'. This means the CPU1 is the owner and has write access. Setting a '1' in any bit position makes CPU2 the owner of that shared RAM segment.
generated on Sun, 25 Nov 2018 22:19:23 GMT


package ti.catalog.c6000
index URL

Package of devices for the c6000 family of DSPs

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/c6000/package.xdc
requires xdc.platform;
package ti.catalog.c6000 [1, 0, 0, 0] {
    interface IAntara;
    // The Antara device data sheet module
    interface IC6x;
    // An interface implemented by all C6x devices
    interface ICacheInfo;
    interface IDaVinci;
    // An interface implemented by all DaVinci devices
    interface IHimalaya;
    // An interface implemented by all Himalaya devices
    interface IOMAP2x3x;
    // An interface implemented by all OMAP2x3x devices
    interface IOMAP3xxx;
    // An interface implemented by all OMAP3xxx devices
    interface ITI811X;
    // An interface implemented by all TI811X devices
    interface ITI8148;
    // An interface implemented by all TI8148 devices
    interface ITI8168;
    // An interface implemented by all TI8168 devices
    interface ITMS320C642x;
    // The C642x device data sheet module
    interface ITMS320C6452;
    // The interface for 6452 and similar devices' data sheet module
    interface ITMS320C64_128K;
    // An interface implemented by all TMS320C64xx devices with 128KB of internal memory
    interface ITMS320C64_1M;
    // An interface implemented by all TMS320C64xx devices with 1MB of internal memory
    interface ITMS320C64_256K;
    // An interface implemented by all TMS320C64xx devices with 256KB of internal memory
    interface ITMS320C64_512K;
    // An interface implemented by all TMS320C64xx devices with 512KB of internal memory
    interface ITMS320C6655;
    interface ITMS320C6x0x;
    // An interface implemented by all TMS320C6x0x devices
    interface ITMS320C6x1x;
    // An interface implemented by all TMS320C6x1x devices
    interface ITMS320CDM6467;
    // An interface implemented by all DaVinci-HD devices
    interface ITMS320CDRA44x;
    // An interface implemented by all DRA44x devices
    interface ITMS320CDRA45x;
    // An interface implemented by all DRA45x devices
    interface ITMS320CDRx40x;
    // An interface implemented by all DRx40x and DRx41x devices
    interface ITMS320CTCI6484;
    interface ITMS320CTCI6486;
    // An interface implemented by TCI6486 like devices
    interface ITMS320CTCI648x;
    // An interface implemented by TCI6487 and TCI6488 devices
    interface ITMS320CTCI6497;
    interface ITMS320DA8xx;
    // An interface implemented by TMS320DA8xx devices
    interface ITMS320TCI6608;
    interface ITMS320TCI6616;
    interface ITMS320TCI663x;
    module Arctic;
    // The Arctic device data sheet module
    module C64;
    // Generic Cpu definition
    module C64P;
    // Generic Cpu definition
    module C66;
    // Generic Cpu definition
    module C67;
    // Generic Cpu definition
    module C674;
    // Generic Cpu definition
    module DM37XX;
    // An interface implemented by DM37XX devices
    module DRA7XX;
    // The DRA7XX device data sheet module
    module Kepler;
    module OMAP2431;
    // OMAP2431 device data sheet module
    module OMAP2530;
    // OMAP2530 device data sheet module
    module OMAP2531;
    // OMAP2531 device data sheet module
    module OMAP3425;
    // OMAP3425 device data sheet module
    module OMAP3525;
    // OMAP3525 device data sheet module
    module OMAP3530;
    // OMAP3530 device data sheet module
    module OMAP4430;
    // The C64T device data sheet module
    module OMAP5430;
    // The C64T device data sheet module
    module OMAPL137;
    // The C64P device data sheet module
    module OMAPL138;
    // The C64P device data sheet module
    module TCI66AK2G02;
    module TDA3XX;
    // The TDA3XX device data sheet module
    module TMS320C2430;
    // The OMAP2430 device data sheet module
    module TMS320C3430;
    // The C64P device data sheet module
    module TMS320C6201;
    // The C6201 device data sheet module
    module TMS320C6202;
    // The C6202 device data sheet module
    module TMS320C6203;
    // The C6203 device data sheet module
    module TMS320C6203B;
    // The C6203B device data sheet module
    module TMS320C6204;
    // The C6204 device data sheet module
    module TMS320C6205;
    // The C6205 device data sheet module
    module TMS320C6211;
    // The C6211 device data sheet module
    module TMS320C6211B;
    // The C6211B device data sheet module
    module TMS320C6410;
    // The 6410 device data sheet module
    module TMS320C6411;
    // The 6411 device data sheet module
    module TMS320C6412;
    // The 6412 device data sheet module
    module TMS320C6413;
    // The 6413 device data sheet module
    module TMS320C6414;
    // The C6414 device data sheet module
    module TMS320C6415;
    // The C6415 device data sheet module
    module TMS320C6416;
    // The C6416 device data sheet module
    module TMS320C6418;
    // The C6418 device data sheet module
    module TMS320C6421;
    // The C6421 device data sheet module
    module TMS320C6424;
    // The C6424 device data sheet module
    module TMS320C6428;
    // The 6428 device data sheet module
    module TMS320C6452;
    // The 6452 device data sheet module
    module TMS320C6454;
    // The 6454 device data sheet module
    module TMS320C6455;
    // The 6455 device data sheet module
    module TMS320C6457;
    // The 6457 device data sheet module
    module TMS320C6472;
    // The 6472 device data sheet module
    module TMS320C6474;
    // The 6474 device data sheet module
    module TMS320C6654;
    module TMS320C6655;
    module TMS320C6657;
    module TMS320C6670;
    module TMS320C6671;
    module TMS320C6672;
    module TMS320C6674;
    module TMS320C6678;
    module TMS320C66AK2E02;
    module TMS320C66AK2E05;
    module TMS320C66AK2H06;
    module TMS320C66AK2H12;
    module TMS320C6701;
    // The C6701 device data sheet module
    module TMS320C6711;
    // The C6711B device data sheet module
    module TMS320C6711B;
    // The C6711B device data sheet module
    module TMS320C6712;
    // The C6712 device data sheet module
    module TMS320C6713;
    // The C6713 device data sheet module
    module TMS320C6722;
    // The C6722 device data sheet module
    module TMS320C6726;
    // The C6726 device data sheet module
    module TMS320C6727;
    // The C6727 device data sheet module
    module TMS320C6742;
    // The C6742 device data sheet module
    module TMS320C6743;
    module TMS320C6745;
    module TMS320C6746;
    // The C6746 device data sheet module
    module TMS320C6747;
    // The C6747 device data sheet module
    module TMS320C6748;
    // The C6748 device data sheet module
    module TMS320C6A8149;
    // The C674 device data sheet module
    module TMS320C6A8168;
    // The C674 device data sheet module
    module TMS320CDA700;
    // The C67P device data sheet module
    module TMS320CDA700SIM;
    // The C67P device data sheet module
    module TMS320CDA705;
    // The DA705 device data sheet module
    module TMS320CDA707;
    // The DA707 device data sheet module
    module TMS320CDA710;
    // The DA710 device data sheet module
    module TMS320CDM415;
    // The DM415 device data sheet module
    module TMS320CDM420;
    // The DM420 device data sheet module
    module TMS320CDM421;
    // The DM421 device data sheet module
    module TMS320CDM425;
    // The DM425 device data sheet module
    module TMS320CDM426;
    // The DM426 device data sheet module
    module TMS320CDM640;
    // The DM640 device data sheet module
    module TMS320CDM641;
    // The DM641 device data sheet module
    module TMS320CDM642;
    // The DM642 device data sheet module
    module TMS320CDM6431;
    // The DM6431 device data sheet module
    module TMS320CDM6433;
    // The DM6433 device data sheet module
    module TMS320CDM6435;
    // The DM6435 device data sheet module
    module TMS320CDM6437;
    // The DM6437 device data sheet module
    module TMS320CDM6441;
    // The DM6441 device data sheet module
    module TMS320CDM6443;
    // The DM6443 device data sheet module
    module TMS320CDM6446;
    // The DM6446 device data sheet module
    module TMS320CDM6467;
    // The DM6467 device data sheet module
    module TMS320CDM647;
    // The DM647 device data sheet module
    module TMS320CDM648;
    // The DM648 device data sheet module
    module TMS320CDM730;
    // The C674 device data sheet module
    module TMS320CDM740;
    // The C674 device data sheet module
    module TMS320CDRA402;
    // The DRA402 device data sheet module
    module TMS320CDRA404;
    // The DRA404 device data sheet module
    module TMS320CDRA406;
    // The DRA406 device data sheet module
    module TMS320CDRA414;
    // The DRA414 device data sheet module
    module TMS320CDRA416;
    // The DRA416 device data sheet module
    module TMS320CDRA442;
    // The DRA442 device data sheet module
    module TMS320CDRA444;
    // The DRA444 device data sheet module
    module TMS320CDRA446;
    // The DRA446 device data sheet module
    module TMS320CDRA447;
    // The DRA447 device data sheet module
    module TMS320CDRA457;
    // The DRA457 device data sheet module
    module TMS320CDRA459;
    // The DRA459 device data sheet module
    module TMS320CDRI300;
    // The DRI300 device data sheet module
    module TMS320CF761990;
    // The C64P device data sheet module
    module TMS320CTCI6482;
    // The TCI6482 device data sheet module
    module TMS320CTCI6484;
    module TMS320CTCI6486;
    // The TCI6486 device data sheet module
    module TMS320CTCI6487;
    // The TCI6487 device data sheet module
    module TMS320CTCI6488;
    // The TCI6488 device data sheet module
    module TMS320CTCI6498;
    module TMS320CTNETV2685;
    // The TNETV2685 device data sheet module
    module TMS320DA802;
    // The DA802 device data sheet module
    module TMS320DA803;
    // The DA803 device data sheet module
    module TMS320DA804;
    // The DA804 device data sheet module
    module TMS320DA805;
    module TMS320DA807;
    module TMS320DA808;
    module TMS320DA810;
    module TMS320DA828;
    // The C64P device data sheet module
    module TMS320DA830;
    // The C64P device data sheet module
    module TMS320DA840;
    // The C64P device data sheet module
    module TMS320DA850;
    // The C64P device data sheet module
    module TMS320DM357;
    // The DM357 device data sheet module
    module TMS320DM8148;
    // The C674 device data sheet module
    module TMS320DM8168;
    // The C674 device data sheet module
    module TMS320TCI6485;
    // The TCI6485 device data sheet module
    module TMS320TCI6489;
    // The TCI6489 device data sheet module
    module TMS320TCI6608;
    module TMS320TCI6614;
    module TMS320TCI6616;
    module TMS320TCI6618;
    module TMS320TCI6630K2L;
    module TMS320TCI6634;
    module TMS320TCI6636;
    module TMS320TCI6638;
    module TMS320TI811X;
    // The C674 device data sheet module
    module TMS320TI814X;
    // The C674 device data sheet module
    module TMS320TI816X;
    // The C674 device data sheet module
    module TNETV107X;
    module Vayu;
    // The Vayu device data sheet module
}
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.c6000.Arctic

metaonly module ti.catalog.c6000.Arctic
index URL

The Arctic device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/Arctic.xdc
var Arctic = xdc.useModule('ti.catalog.c6000.Arctic');
module-wide config parameters
    const Arctic.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ],
                    [
                        "512k",
                        0x80000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     Arctic.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     Arctic.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ],
        [
            "512k",
            0x80000
        ]
    ];
per-instance config parameters
    var params = new Arctic.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 512KB L2 RAM/cache memory",
                    name: "IRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program/cache memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data/cache memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3MEM",
                {
                    comment: "1MB L3 Memory",
                    name: "L3MEM",
                    base: 0x40300000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "DMEM",
                {
                    comment: "ARP32 Internal data memory",
                    name: "DMEM",
                    base: 0x59020000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Arctic.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config Arctic.cacheMap // module-wide
index URL
Configuration settings
const Arctic.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ],
                [
                    "512k",
                    0x80000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config Arctic.cacheSizeL1 // module-wide
index URL
Configuration settings
Arctic.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config Arctic.cacheSizeL2 // module-wide
index URL
Configuration settings
Arctic.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ],
    [
        "512k",
        0x80000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new Arctic.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 512KB L2 RAM/cache memory",
                name: "IRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program/cache memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data/cache memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3MEM",
            {
                comment: "1MB L3 Memory",
                name: "L3MEM",
                base: 0x40300000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "DMEM",
            {
                comment: "ARP32 Internal data memory",
                name: "DMEM",
                base: 0x59020000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Arctic.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Arctic.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Arctic.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Arctic.Params;
...
params.cpuCoreRevision = String "1.0";
config Arctic.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Arctic.Params;
...
params.dataWordSize = Int 4;
config Arctic.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Arctic.Params;
...
params.deviceHeader = String undefined;
config Arctic.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new Arctic.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 512KB L2 RAM/cache memory",
            name: "IRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program/cache memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data/cache memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3MEM",
        {
            comment: "1MB L3 Memory",
            name: "L3MEM",
            base: 0x40300000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "DMEM",
        {
            comment: "ARP32 Internal data memory",
            name: "DMEM",
            base: 0x59020000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ]
];
config Arctic.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Arctic.Params;
...
params.minDataUnitSize = Int 1;
config Arctic.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Arctic.Params;
...
params.minProgUnitSize = Int 1;
config Arctic.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Arctic.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Arctic.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Arctic.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Arctic.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Arctic.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.C64

metaonly module ti.catalog.c6000.C64
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all C64 devices.
Configuration settings sourced in ti/catalog/c6000/C64.xdc
var C64 = xdc.useModule('ti.catalog.c6000.C64');
per-instance config parameters
    var params = new C64.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = C64.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new C64.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config C64.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new C64.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config C64.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new C64.Params;
...
params.cpuCoreRevision = String "1.0";
config C64.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new C64.Params;
...
params.dataWordSize = Int 4;
config C64.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new C64.Params;
...
params.deviceHeader = String undefined;
config C64.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new C64.Params;
...
params.minDataUnitSize = Int 1;
config C64.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new C64.Params;
...
params.minProgUnitSize = Int 1;
config C64.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new C64.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new C64.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = C64.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
C64.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
C64.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.C64P

metaonly module ti.catalog.c6000.C64P
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all C64P devices.
Configuration settings sourced in ti/catalog/c6000/C64P.xdc
var C64P = xdc.useModule('ti.catalog.c6000.C64P');
per-instance config parameters
    var params = new C64P.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = C64P.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new C64P.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config C64P.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new C64P.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config C64P.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new C64P.Params;
...
params.cpuCoreRevision = String "1.0";
config C64P.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new C64P.Params;
...
params.dataWordSize = Int 4;
config C64P.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new C64P.Params;
...
params.deviceHeader = String undefined;
config C64P.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new C64P.Params;
...
params.minDataUnitSize = Int 1;
config C64P.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new C64P.Params;
...
params.minProgUnitSize = Int 1;
config C64P.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new C64P.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new C64P.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = C64P.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
C64P.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
C64P.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.C66

metaonly module ti.catalog.c6000.C66
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all C66 devices.
Configuration settings sourced in ti/catalog/c6000/C66.xdc
var C66 = xdc.useModule('ti.catalog.c6000.C66');
per-instance config parameters
    var params = new C66.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = C66.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new C66.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config C66.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new C66.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config C66.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new C66.Params;
...
params.cpuCoreRevision = String "1.0";
config C66.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new C66.Params;
...
params.dataWordSize = Int 4;
config C66.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new C66.Params;
...
params.deviceHeader = String undefined;
config C66.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new C66.Params;
...
params.minDataUnitSize = Int 1;
config C66.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new C66.Params;
...
params.minProgUnitSize = Int 1;
config C66.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new C66.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new C66.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = C66.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
C66.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
C66.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.C67

metaonly module ti.catalog.c6000.C67
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all C67 devices.
Configuration settings sourced in ti/catalog/c6000/C67.xdc
var C67 = xdc.useModule('ti.catalog.c6000.C67');
per-instance config parameters
    var params = new C67.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6700";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = C67.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new C67.Params;
// Instance config-params object
    params.cpuCore = String "6700";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config C67.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new C67.Params;
...
params.cpuCore = String "6700";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config C67.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new C67.Params;
...
params.cpuCoreRevision = String "1.0";
config C67.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new C67.Params;
...
params.dataWordSize = Int 4;
config C67.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new C67.Params;
...
params.deviceHeader = String undefined;
config C67.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new C67.Params;
...
params.minDataUnitSize = Int 1;
config C67.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new C67.Params;
...
params.minProgUnitSize = Int 1;
config C67.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new C67.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new C67.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = C67.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
C67.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
C67.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.C674

metaonly module ti.catalog.c6000.C674
index URL

Generic Cpu definition

  • Configuration settings
  • Individual elements
This device represents all C674 devices.
Configuration settings sourced in ti/catalog/c6000/C674.xdc
var C674 = xdc.useModule('ti.catalog.c6000.C674');
per-instance config parameters
    var params = new C674.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = C674.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new C674.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config C674.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new C674.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config C674.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new C674.Params;
...
params.cpuCoreRevision = String "1.0";
config C674.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new C674.Params;
...
params.dataWordSize = Int 4;
config C674.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new C674.Params;
...
params.deviceHeader = String undefined;
config C674.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new C674.Params;
...
params.minDataUnitSize = Int 1;
config C674.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new C674.Params;
...
params.minProgUnitSize = Int 1;
config C674.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new C674.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new C674.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = C674.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
C674.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
C674.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.DM37XX

metaonly module ti.catalog.c6000.DM37XX
index URL

An interface implemented by DM37XX devices

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/DM37XX.xdc
var DM37XX = xdc.useModule('ti.catalog.c6000.DM37XX');
module-wide config parameters
    const DM37XX.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     DM37XX.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     DM37XX.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new DM37XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 16KB L2 ROM",
                    name: "IROM",
                    base: 0x007E0000,
                    len: 0x00004000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 96KB L2 memory",
                    name: "IRAM",
                    base: 0x007F8000,
                    len: 0x00018000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = DM37XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config DM37XX.cacheMap // module-wide
index URL
Configuration settings
const DM37XX.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config DM37XX.cacheSizeL1 // module-wide
index URL
Configuration settings
DM37XX.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config DM37XX.cacheSizeL2 // module-wide
index URL
Configuration settings
DM37XX.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new DM37XX.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 16KB L2 ROM",
                name: "IROM",
                base: 0x007E0000,
                len: 0x00004000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 96KB L2 memory",
                name: "IRAM",
                base: 0x007F8000,
                len: 0x00018000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x00F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config DM37XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new DM37XX.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config DM37XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new DM37XX.Params;
...
params.cpuCoreRevision = String "1.0";
config DM37XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new DM37XX.Params;
...
params.dataWordSize = Int 4;
config DM37XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new DM37XX.Params;
...
params.deviceHeader = String undefined;
config DM37XX.Params.memMap // instance
index URL
Configuration settings
var params = new DM37XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 16KB L2 ROM",
            name: "IROM",
            base: 0x007E0000,
            len: 0x00004000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 96KB L2 memory",
            name: "IRAM",
            base: 0x007F8000,
            len: 0x00018000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x00F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config DM37XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new DM37XX.Params;
...
params.minDataUnitSize = Int 1;
config DM37XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new DM37XX.Params;
...
params.minProgUnitSize = Int 1;
config DM37XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new DM37XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new DM37XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DM37XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
DM37XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
DM37XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.DRA7XX

metaonly module ti.catalog.c6000.DRA7XX
index URL

The DRA7XX device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/DRA7XX.xdc
var DRA7XX = xdc.useModule('ti.catalog.c6000.DRA7XX');
module-wide config parameters
    const DRA7XX.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     DRA7XX.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     DRA7XX.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ]
    ];
per-instance config parameters
    var params = new DRA7XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "256KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC_RAM1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                    name: "OCMC_RAM1",
                    base: 0x40300000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_RAM2",
                {
                    comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                    name: "OCMC_RAM2",
                    base: 0x40400000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_RAM3",
                {
                    comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                    name: "OCMC_RAM3",
                    base: 0x40500000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = DRA7XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config DRA7XX.cacheMap // module-wide
index URL
Configuration settings
const DRA7XX.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config DRA7XX.cacheSizeL1 // module-wide
index URL
Configuration settings
DRA7XX.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config DRA7XX.cacheSizeL2 // module-wide
index URL
Configuration settings
DRA7XX.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new DRA7XX.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "256KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_RAM1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
                name: "OCMC_RAM1",
                base: 0x40300000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_RAM2",
            {
                comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
                name: "OCMC_RAM2",
                base: 0x40400000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_RAM3",
            {
                comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
                name: "OCMC_RAM3",
                base: 0x40500000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config DRA7XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config DRA7XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new DRA7XX.Params;
...
params.cpuCoreRevision = String "1.0";
config DRA7XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.dataWordSize = Int 4;
config DRA7XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new DRA7XX.Params;
...
params.deviceHeader = String undefined;
config DRA7XX.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new DRA7XX.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config DRA7XX.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new DRA7XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "256KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_RAM1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (512KB)",
            name: "OCMC_RAM1",
            base: 0x40300000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_RAM2",
        {
            comment: "OCMC (On-chip RAM) Bank 2 (1MB)",
            name: "OCMC_RAM2",
            base: 0x40400000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_RAM3",
        {
            comment: "OCMC (On-chip RAM) Bank 3 (1MB)",
            name: "OCMC_RAM3",
            base: 0x40500000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config DRA7XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minDataUnitSize = Int 1;
config DRA7XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new DRA7XX.Params;
...
params.minProgUnitSize = Int 1;
config DRA7XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new DRA7XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new DRA7XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DRA7XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
DRA7XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
DRA7XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


interface ti.catalog.c6000.IAntara

metaonly interface ti.catalog.c6000.IAntara
index URL

The Antara device data sheet module

This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c6000/IAntara.xdc
metaonly interface IAntara { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
package ti.catalog.c6000;
metaonly interface IAntara inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "67x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// [string] = [
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IAntara.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
override config String cpuCore = "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IAntara.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
override config String cpuCoreRevision = "1.0";
config IAntara.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
override config Int dataWordSize = 4;
config IAntara.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
config String deviceHeader;
config IAntara.Params.memMap // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config IAntara.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
override config Int minDataUnitSize = 1;
config IAntara.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
override config Int minProgUnitSize = 1;
config IAntara.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IAntara.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IAntara.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/IAntara.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:30 GMT


interface ti.catalog.c6000.IC6x

metaonly interface ti.catalog.c6000.IC6x
index URL

An interface implemented by all C6x devices

This interface is defined to factor common data about all C6x type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/c6000/IC6x.xdc
metaonly interface IC6x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
package ti.catalog.c6000;
metaonly interface IC6x inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6600";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IC6x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
override config String cpuCore = "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IC6x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
override config String cpuCoreRevision = "1.0";
config IC6x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
override config Int dataWordSize = 4;
config IC6x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
config String deviceHeader;
config IC6x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
override config Int minDataUnitSize = 1;
config IC6x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
override config Int minProgUnitSize = 1;
config IC6x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IC6x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IC6x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/IC6x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ICacheInfo

metaonly interface ti.catalog.c6000.ICacheInfo
index URL
XDCspec summary sourced in ti/catalog/c6000/ICacheInfo.xdc
metaonly interface ICacheInfo { ...
XDCspec declarations sourced in ti/catalog/c6000/ICacheInfo.xdc
package ti.catalog.c6000;
metaonly interface ICacheInfo {
}
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.IDaVinci

metaonly interface ti.catalog.c6000.IDaVinci
index URL

An interface implemented by all DaVinci devices

This interface is defined to factor common data about all DaVinci devices into a single place; they are all the same from the configuration point of view.
XDCspec summary sourced in ti/catalog/c6000/IDaVinci.xdc
metaonly interface IDaVinci { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
package ti.catalog.c6000;
metaonly interface IDaVinci inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IDaVinci.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config IDaVinci.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config IDaVinci.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
config IDaVinci.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IDaVinci.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
override config String cpuCoreRevision = "1.0";
config IDaVinci.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
override config Int dataWordSize = 4;
config IDaVinci.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
config String deviceHeader;
config IDaVinci.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config IDaVinci.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
override config Int minDataUnitSize = 1;
config IDaVinci.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
override config Int minProgUnitSize = 1;
config IDaVinci.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IDaVinci.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IDaVinci.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/IDaVinci.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.IHimalaya

metaonly interface ti.catalog.c6000.IHimalaya
index URL

An interface implemented by all Himalaya devices

This interface is defined to factor common data about all Himalaya devices into a single place; they are all the same from the configuration point of view.
XDCspec summary sourced in ti/catalog/c6000/IHimalaya.xdc
metaonly interface IHimalaya { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
package ti.catalog.c6000;
metaonly interface IHimalaya inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 2MB UMAP0 memory",
                name: "IRAM",
                base: 0x800000,
                len: 0x200000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IHimalaya.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config IHimalaya.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config IHimalaya.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config IHimalaya.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IHimalaya.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
override config String cpuCoreRevision = "1.0";
config IHimalaya.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
override config Int dataWordSize = 4;
config IHimalaya.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
config String deviceHeader;
config IHimalaya.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 2MB UMAP0 memory",
            name: "IRAM",
            base: 0x800000,
            len: 0x200000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config IHimalaya.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
override config Int minDataUnitSize = 1;
config IHimalaya.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
override config Int minProgUnitSize = 1;
config IHimalaya.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IHimalaya.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IHimalaya.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/IHimalaya.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.IOMAP2x3x

metaonly interface ti.catalog.c6000.IOMAP2x3x
index URL

An interface implemented by all OMAP2x3x devices

This interface is defined to factor common data about all OMAP2x3x devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/c6000/IOMAP2x3x.xdc
metaonly interface IOMAP2x3x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
package ti.catalog.c6000;
metaonly interface IOMAP2x3x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// [string] = [
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IOMAP2x3x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config IOMAP2x3x.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config IOMAP2x3x.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
config IOMAP2x3x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IOMAP2x3x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
config String cpuCoreRevision;
config IOMAP2x3x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
override config Int dataWordSize = 4;
config IOMAP2x3x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
config String deviceHeader;
config IOMAP2x3x.Params.memMap // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config IOMAP2x3x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
override config Int minDataUnitSize = 1;
config IOMAP2x3x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
override config Int minProgUnitSize = 1;
config IOMAP2x3x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IOMAP2x3x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IOMAP2x3x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/IOMAP2x3x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.IOMAP3xxx

metaonly interface ti.catalog.c6000.IOMAP3xxx
index URL

An interface implemented by all OMAP3xxx devices

This interface is defined to factor common data about all OMAP3xxx devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/c6000/IOMAP3xxx.xdc
metaonly interface IOMAP3xxx { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
package ti.catalog.c6000;
metaonly interface IOMAP3xxx inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x107F8000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// [string] = [
        [
            "IRAM",
            {
                comment: "Internal 96KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x107F8000,
                len: 0x00018000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IOMAP3xxx.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x107F8000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config IOMAP3xxx.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config IOMAP3xxx.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
config IOMAP3xxx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IOMAP3xxx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
config String cpuCoreRevision;
config IOMAP3xxx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
override config Int dataWordSize = 4;
config IOMAP3xxx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
config String deviceHeader;
config IOMAP3xxx.Params.memMap // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 96KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x107F8000,
            len: 0x00018000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config IOMAP3xxx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
override config Int minDataUnitSize = 1;
config IOMAP3xxx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
override config Int minProgUnitSize = 1;
config IOMAP3xxx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IOMAP3xxx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IOMAP3xxx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/IOMAP3xxx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ITI811X

metaonly interface ti.catalog.c6000.ITI811X
index URL

An interface implemented by all TI811X devices

This interface is defined to factor common data about all TI811X type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/c6000/ITI811X.xdc
metaonly interface ITI811X { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
package ti.catalog.c6000;
metaonly interface ITI811X inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "674";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// [string] = [
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC",
            {
                comment: "OCMC (On-chip RAM) (128KB)",
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI811X.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITI811X.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITI811X.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITI811X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
override config String cpuCore = "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI811X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
override config String cpuCoreRevision = "1.0";
config ITI811X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
override config Int dataWordSize = 4;
config ITI811X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
config String deviceHeader;
config ITI811X.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
config HDVICP2.Instance hdvicp0;
config ITI811X.Params.memMap // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC",
        {
            comment: "OCMC (On-chip RAM) (128KB)",
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITI811X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
override config Int minDataUnitSize = 1;
config ITI811X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
override config Int minProgUnitSize = 1;
config ITI811X.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI811X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI811X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITI811X.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ITI8148

metaonly interface ti.catalog.c6000.ITI8148
index URL

An interface implemented by all TI8148 devices

This interface is defined to factor common data about all TI8148 type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/c6000/ITI8148.xdc
metaonly interface ITI8148 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
package ti.catalog.c6000;
metaonly interface ITI8148 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "674";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config IPlatform.Memory memMap// [string] = [
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC",
            {
                comment: "OCMC (On-chip RAM) (128KB)",
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI8148.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITI8148.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITI8148.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITI8148.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
override config String cpuCore = "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI8148.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
override config String cpuCoreRevision = "1.0";
config ITI8148.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
override config Int dataWordSize = 4;
config ITI8148.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
config String deviceHeader;
config ITI8148.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
config HDVICP2.Instance hdvicp0;
config ITI8148.Params.memMap // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC",
        {
            comment: "OCMC (On-chip RAM) (128KB)",
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITI8148.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
override config Int minDataUnitSize = 1;
config ITI8148.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
override config Int minProgUnitSize = 1;
config ITI8148.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI8148.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI8148.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITI8148.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ITI8168

metaonly interface ti.catalog.c6000.ITI8168
index URL

An interface implemented by all TI8168 devices

This interface is defined to factor common data about all TI8168 type devices into a single place; they all have the same internal memory.
XDCspec summary sourced in ti/catalog/c6000/ITI8168.xdc
metaonly interface ITI8168 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
package ti.catalog.c6000;
metaonly interface ITI8168 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x00000
                    ],
                    [
                        "32k",
                        0x08000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "674";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config HDVICP2.Instance hdvicp0// ;
    config HDVICP2.Instance hdvicp1// ;
    config HDVICP2.Instance hdvicp2// ;
    config IPlatform.Memory memMap// [string] = [
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_0",
            {
                comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITI8168.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x00000
                ],
                [
                    "32k",
                    0x08000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITI8168.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITI8168.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITI8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
override config String cpuCore = "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITI8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
override config String cpuCoreRevision = "1.0";
config ITI8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
override config Int dataWordSize = 4;
config ITI8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config String deviceHeader;
config ITI8168.Params.hdvicp0 // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config HDVICP2.Instance hdvicp0;
config ITI8168.Params.hdvicp1 // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config HDVICP2.Instance hdvicp1;
config ITI8168.Params.hdvicp2 // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config HDVICP2.Instance hdvicp2;
config ITI8168.Params.memMap // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_0",
        {
            comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITI8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
override config Int minDataUnitSize = 1;
config ITI8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
override config Int minProgUnitSize = 1;
config ITI8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITI8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITI8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITI8168.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ITMS320C642x

metaonly interface ti.catalog.c6000.ITMS320C642x
index URL

The C642x device data sheet module

This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C642x.xdc
metaonly interface ITMS320C642x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C642x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x10E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C642x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320C642x.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320C642x.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
config ITMS320C642x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C642x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C642x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
override config Int dataWordSize = 4;
config ITMS320C642x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
config String deviceHeader;
config ITMS320C642x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x10E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320C642x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
override config Int minDataUnitSize = 1;
config ITMS320C642x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
override config Int minProgUnitSize = 1;
config ITMS320C642x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C642x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C642x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C642x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ITMS320C6452

metaonly interface ti.catalog.c6000.ITMS320C6452
index URL

The interface for 6452 and similar devices' data sheet module

This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C6452.xdc
metaonly interface ITMS320C6452 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C6452 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0xA00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 1408KB L2 RAM/CACHE",
                name: "IRAM",
                base: 0xA00000,
                len: 0x160000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C6452.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0xA00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320C6452.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320C6452.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITMS320C6452.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C6452.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C6452.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
override config Int dataWordSize = 4;
config ITMS320C6452.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
config String deviceHeader;
config ITMS320C6452.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 1408KB L2 RAM/CACHE",
            name: "IRAM",
            base: 0xA00000,
            len: 0x160000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320C6452.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
override config Int minDataUnitSize = 1;
config ITMS320C6452.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
override config Int minProgUnitSize = 1;
config ITMS320C6452.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C6452.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C6452.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6452.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ITMS320C64_128K

metaonly interface ti.catalog.c6000.ITMS320C64_128K
index URL

An interface implemented by all TMS320C64xx devices with 128KB of internal memory

This interface is defined to factor common data about this family into a single place; all TMS320C64xx devices with 128KB of internal memory extend this interface.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
metaonly interface ITMS320C64_128K { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C64_128K inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSize// [string] = [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6400";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C64_128K.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320C64_128K.cacheSize // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
config Long cacheSize[string] = [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
config ITMS320C64_128K.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
override config String cpuCore = "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C64_128K.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C64_128K.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
override config Int dataWordSize = 4;
config ITMS320C64_128K.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
config String deviceHeader;
config ITMS320C64_128K.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320C64_128K.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
override config Int minDataUnitSize = 1;
config ITMS320C64_128K.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
override config Int minProgUnitSize = 1;
config ITMS320C64_128K.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C64_128K.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C64_128K.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_128K.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:31 GMT


interface ti.catalog.c6000.ITMS320C64_1M

metaonly interface ti.catalog.c6000.ITMS320C64_1M
index URL

An interface implemented by all TMS320C64xx devices with 1MB of internal memory

This interface is defined to factor common data about this family into a single place; all TMS320C64xx devices with 1MB of internal memory extend this interface.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
metaonly interface ITMS320C64_1M { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C64_1M inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSize// [string] = [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6400";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x000000,
                len: 0x100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C64_1M.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320C64_1M.cacheSize // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
config Long cacheSize[string] = [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITMS320C64_1M.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
override config String cpuCore = "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C64_1M.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C64_1M.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
override config Int dataWordSize = 4;
config ITMS320C64_1M.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
config String deviceHeader;
config ITMS320C64_1M.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x000000,
            len: 0x100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320C64_1M.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
override config Int minDataUnitSize = 1;
config ITMS320C64_1M.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
override config Int minProgUnitSize = 1;
config ITMS320C64_1M.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C64_1M.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C64_1M.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_1M.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320C64_256K

metaonly interface ti.catalog.c6000.ITMS320C64_256K
index URL

An interface implemented by all TMS320C64xx devices with 256KB of internal memory

This interface is defined to factor common data about this family into a single place; all TMS320C64xx devices with 256KB of internal memory extend this interface.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
metaonly interface ITMS320C64_256K { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C64_256K inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSize// [string] = [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6400";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C64_256K.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320C64_256K.cacheSize // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
config Long cacheSize[string] = [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITMS320C64_256K.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
override config String cpuCore = "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C64_256K.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C64_256K.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
override config Int dataWordSize = 4;
config ITMS320C64_256K.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
config String deviceHeader;
config ITMS320C64_256K.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320C64_256K.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
override config Int minDataUnitSize = 1;
config ITMS320C64_256K.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
override config Int minProgUnitSize = 1;
config ITMS320C64_256K.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C64_256K.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C64_256K.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_256K.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320C64_512K

metaonly interface ti.catalog.c6000.ITMS320C64_512K
index URL

An interface implemented by all TMS320C64xx devices with 512KB of internal memory

This interface is defined to factor common data about this family into a single place; all TMS320C64xx devices with 512KB of internal memory extend this interface.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
metaonly interface ITMS320C64_512K { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C64_512K inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSize// [string] = [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6400";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x80000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C64_512K.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320C64_512K.cacheSize // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
config Long cacheSize[string] = [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITMS320C64_512K.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
override config String cpuCore = "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C64_512K.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C64_512K.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
override config Int dataWordSize = 4;
config ITMS320C64_512K.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
config String deviceHeader;
config ITMS320C64_512K.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x80000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320C64_512K.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
override config Int minDataUnitSize = 1;
config ITMS320C64_512K.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
override config Int minProgUnitSize = 1;
config ITMS320C64_512K.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C64_512K.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C64_512K.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C64_512K.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320C6655

metaonly interface ti.catalog.c6000.ITMS320C6655
index URL
XDCspec summary sourced in ti/catalog/c6000/ITMS320C6655.xdc
metaonly interface ITMS320C6655 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C6655 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6600";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "1MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C6655.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config ITMS320C6655.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320C6655.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
config ITMS320C6655.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
override config String cpuCore = "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C6655.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C6655.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
override config Int dataWordSize = 4;
config ITMS320C6655.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
config String deviceHeader;
config ITMS320C6655.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "1MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320C6655.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
override config Int minDataUnitSize = 1;
config ITMS320C6655.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
override config Int minProgUnitSize = 1;
config ITMS320C6655.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C6655.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C6655.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6655.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320C6x0x

metaonly interface ti.catalog.c6000.ITMS320C6x0x
index URL

An interface implemented by all TMS320C6x0x devices

This interface is defined to factor common data about this family into a single place; all TMS320C6x0x devices extend this interface.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
metaonly interface ITMS320C6x0x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C6x0x inherits ICpuDataSheet {
module-wide config parameters
    config IPlatform.Memory memBlock// [string] = [
        [
            "IPRAM0",
            {
                comment: "Internal Program memory map 0",
                name: "IPRAM",
                base: 0x1400000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IPRAM1",
            {
                comment: "Internal Program memory map 1",
                name: "IPRAM",
                base: 0x0000000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IDRAM",
            {
                comment: "Internal Data memory",
                name: "IDRAM",
                base: 0x80000000,
                len: 0x00010000,
                space: "data"
            }
        ]
    ];
instance:
per-instance config parameters
    config String cpuCore// A string identifying the CPU Core;
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C6x0x.memBlock // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
config IPlatform.Memory memBlock[string] = [
    [
        "IPRAM0",
        {
            comment: "Internal Program memory map 0",
            name: "IPRAM",
            base: 0x1400000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IPRAM1",
        {
            comment: "Internal Program memory map 1",
            name: "IPRAM",
            base: 0x0000000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IDRAM",
        {
            comment: "Internal Data memory",
            name: "IDRAM",
            base: 0x80000000,
            len: 0x00010000,
            space: "data"
        }
    ]
];
config ITMS320C6x0x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
config String cpuCore;
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C6x0x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C6x0x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
override config Int dataWordSize = 4;
config ITMS320C6x0x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
config String deviceHeader;
config ITMS320C6x0x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
config IPlatform.Memory memMap[string];
config ITMS320C6x0x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
override config Int minDataUnitSize = 1;
config ITMS320C6x0x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
override config Int minProgUnitSize = 1;
config ITMS320C6x0x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C6x0x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C6x0x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x0x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320C6x1x

metaonly interface ti.catalog.c6000.ITMS320C6x1x
index URL

An interface implemented by all TMS320C6x1x devices

This interface is defined to factor common data about this family into a single place; all TMS320C6x1x devices extend this interface.
XDCspec summary sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
metaonly interface ITMS320C6x1x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320C6x1x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "SRAM",
                        0x0000
                    ],
                    [
                        "1-way cache",
                        0x4000
                    ],
                    [
                        "2-way cache",
                        0x8000
                    ],
                    [
                        "3-way cache",
                        0xc000
                    ],
                    [
                        "4-way cache",
                        0x10000
                    ]
                ],
                defaultValue: "4-way cache",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSize// [string] = [
        [
            "SRAM",
            0x0000
        ],
        [
            "1-way cache",
            0x4000
        ],
        [
            "2-way cache",
            0x8000
        ],
        [
            "3-way cache",
            0xc000
        ],
        [
            "4-way cache",
            0x10000
        ],
        [
            "0k",
            0x0000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ],
        [
            "48k",
            0xc000
        ],
        [
            "64k",
            0x10000
        ]
    ];
instance:
per-instance config parameters
    config String cpuCore// A string identifying the CPU Core;
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320C6x1x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "SRAM",
                    0x0000
                ],
                [
                    "1-way cache",
                    0x4000
                ],
                [
                    "2-way cache",
                    0x8000
                ],
                [
                    "3-way cache",
                    0xc000
                ],
                [
                    "4-way cache",
                    0x10000
                ]
            ],
            defaultValue: "4-way cache",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320C6x1x.cacheSize // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
config Long cacheSize[string] = [
    [
        "SRAM",
        0x0000
    ],
    [
        "1-way cache",
        0x4000
    ],
    [
        "2-way cache",
        0x8000
    ],
    [
        "3-way cache",
        0xc000
    ],
    [
        "4-way cache",
        0x10000
    ],
    [
        "0k",
        0x0000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ],
    [
        "48k",
        0xc000
    ],
    [
        "64k",
        0x10000
    ]
];
config ITMS320C6x1x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
config String cpuCore;
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320C6x1x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320C6x1x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
override config Int dataWordSize = 4;
config ITMS320C6x1x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
config String deviceHeader;
config ITMS320C6x1x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
config IPlatform.Memory memMap[string];
config ITMS320C6x1x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
override config Int minDataUnitSize = 1;
config ITMS320C6x1x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
override config Int minProgUnitSize = 1;
config ITMS320C6x1x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320C6x1x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320C6x1x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320C6x1x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320CDM6467

metaonly interface ti.catalog.c6000.ITMS320CDM6467
index URL

An interface implemented by all DaVinci-HD devices

This interface is defined to factor common data about all DaVinci-HD devices into a single place; they are all the same from the configuration point of view.
XDCspec summary sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
metaonly interface ITMS320CDM6467 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CDM6467 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11818000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10010000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x11818000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CDM6467.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11818000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320CDM6467.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CDM6467.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
config ITMS320CDM6467.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CDM6467.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CDM6467.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
override config Int dataWordSize = 4;
config ITMS320CDM6467.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
config String deviceHeader;
config ITMS320CDM6467.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
config IPlatform.Memory memMap[string] = [
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10010000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x11818000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320CDM6467.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
override config Int minDataUnitSize = 1;
config ITMS320CDM6467.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
override config Int minProgUnitSize = 1;
config ITMS320CDM6467.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CDM6467.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CDM6467.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDM6467.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320CDRA44x

metaonly interface ti.catalog.c6000.ITMS320CDRA44x
index URL

An interface implemented by all DRA44x devices

This interface is defined to factor common data about all DRA44x devices into a single place; they are all the same from the configuration point of view.
XDCspec summary sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
metaonly interface ITMS320CDRA44x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CDRA44x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CDRA44x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320CDRA44x.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CDRA44x.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
config ITMS320CDRA44x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CDRA44x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CDRA44x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
override config Int dataWordSize = 4;
config ITMS320CDRA44x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
config String deviceHeader;
config ITMS320CDRA44x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320CDRA44x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
override config Int minDataUnitSize = 1;
config ITMS320CDRA44x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
override config Int minProgUnitSize = 1;
config ITMS320CDRA44x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CDRA44x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CDRA44x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA44x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320CDRA45x

metaonly interface ti.catalog.c6000.ITMS320CDRA45x
index URL

An interface implemented by all DRA45x devices

This interface is defined to factor common data about all DRA45x devices into a single place; they are all the same from the configuration point of view.
XDCspec summary sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
metaonly interface ITMS320CDRA45x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CDRA45x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CDRA45x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320CDRA45x.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CDRA45x.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
config ITMS320CDRA45x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CDRA45x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CDRA45x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
override config Int dataWordSize = 4;
config ITMS320CDRA45x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
config String deviceHeader;
config ITMS320CDRA45x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320CDRA45x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
override config Int minDataUnitSize = 1;
config ITMS320CDRA45x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
override config Int minProgUnitSize = 1;
config ITMS320CDRA45x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CDRA45x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CDRA45x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRA45x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320CDRx40x

metaonly interface ti.catalog.c6000.ITMS320CDRx40x
index URL

An interface implemented by all DRx40x and DRx41x devices

This interface is defined to factor common data about all DRA40x and DRA41x devices into a single file; they are all configured in the same way.
XDCspec summary sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
metaonly interface ITMS320CDRx40x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CDRx40x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ]
                ],
                defaultValue: "16k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 192KB UMAP0 memory",
                name: "IRAM",
                base: 0x11810000,
                len: 0x00030000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 16KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CDRx40x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ]
            ],
            defaultValue: "16k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320CDRx40x.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CDRx40x.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
config ITMS320CDRx40x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CDRx40x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CDRx40x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
override config Int dataWordSize = 4;
config ITMS320CDRx40x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
config String deviceHeader;
config ITMS320CDRx40x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 192KB UMAP0 memory",
            name: "IRAM",
            base: 0x11810000,
            len: 0x00030000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 16KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320CDRx40x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
override config Int minDataUnitSize = 1;
config ITMS320CDRx40x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
override config Int minProgUnitSize = 1;
config ITMS320CDRx40x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CDRx40x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CDRx40x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CDRx40x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320CTCI6484

metaonly interface ti.catalog.c6000.ITMS320CTCI6484
index URL
XDCspec summary sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
metaonly interface ITMS320CTCI6484 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CTCI6484 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "IRAM",
            {
                comment: "Internal 2MB L2 memory",
                name: "IRAM",
                base: 0x800000,
                len: 0x200000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CTCI6484.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320CTCI6484.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CTCI6484.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
config ITMS320CTCI6484.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CTCI6484.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CTCI6484.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
override config Int dataWordSize = 4;
config ITMS320CTCI6484.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
config String deviceHeader;
config ITMS320CTCI6484.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IRAM",
        {
            comment: "Internal 2MB L2 memory",
            name: "IRAM",
            base: 0x800000,
            len: 0x200000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320CTCI6484.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
override config Int minDataUnitSize = 1;
config ITMS320CTCI6484.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
override config Int minProgUnitSize = 1;
config ITMS320CTCI6484.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CTCI6484.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CTCI6484.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6484.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320CTCI6486

metaonly interface ti.catalog.c6000.ITMS320CTCI6486
index URL

An interface implemented by TCI6486 like devices

XDCspec summary sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
metaonly interface ITMS320CTCI6486 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CTCI6486 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "LL2RAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "LL2RAM",
            {
                comment: "608K Local L2 RAM/CACHE memory",
                name: "LL2RAM",
                base: 0x00800000,
                len: 0x00098000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "SL2RAM",
            {
                comment: "768K Shared L2 RAM memory",
                name: "SL2RAM",
                base: 0x00200000,
                len: 0x000C0000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CTCI6486.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "LL2RAM"
        }
    ]
];
config ITMS320CTCI6486.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CTCI6486.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITMS320CTCI6486.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CTCI6486.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CTCI6486.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
override config Int dataWordSize = 4;
config ITMS320CTCI6486.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
config String deviceHeader;
config ITMS320CTCI6486.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
config IPlatform.Memory memMap[string] = [
    [
        "LL2RAM",
        {
            comment: "608K Local L2 RAM/CACHE memory",
            name: "LL2RAM",
            base: 0x00800000,
            len: 0x00098000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "SL2RAM",
        {
            comment: "768K Shared L2 RAM memory",
            name: "SL2RAM",
            base: 0x00200000,
            len: 0x000C0000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320CTCI6486.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
override config Int minDataUnitSize = 1;
config ITMS320CTCI6486.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
override config Int minProgUnitSize = 1;
config ITMS320CTCI6486.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CTCI6486.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CTCI6486.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6486.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:32 GMT


interface ti.catalog.c6000.ITMS320CTCI648x

metaonly interface ti.catalog.c6000.ITMS320CTCI648x
index URL

An interface implemented by TCI6487 and TCI6488 devices

This interface is defined to factor common data about TCI6487 and TCI6488 devices into a single place; they are all the same from the configuration point of view.
XDCspec summary sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
metaonly interface ITMS320CTCI648x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CTCI648x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2RAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
    config IPlatform.Memory memBlock// [string] = [
        [
            "ASYMGEM0L2RAM",
            {
                comment: "1536K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00180000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM1L2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM2L2RAM",
            {
                comment: "512K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SYMGEML2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CTCI648x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2RAM"
        }
    ]
];
config ITMS320CTCI648x.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CTCI648x.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITMS320CTCI648x.memBlock // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
config IPlatform.Memory memBlock[string] = [
    [
        "ASYMGEM0L2RAM",
        {
            comment: "1536K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00180000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM1L2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM2L2RAM",
        {
            comment: "512K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SYMGEML2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320CTCI648x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CTCI648x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CTCI648x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
override config Int dataWordSize = 4;
config ITMS320CTCI648x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
config String deviceHeader;
config ITMS320CTCI648x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config ITMS320CTCI648x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
override config Int minDataUnitSize = 1;
config ITMS320CTCI648x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
override config Int minProgUnitSize = 1;
config ITMS320CTCI648x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CTCI648x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CTCI648x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI648x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


interface ti.catalog.c6000.ITMS320CTCI6497

metaonly interface ti.catalog.c6000.ITMS320CTCI6497
index URL
XDCspec summary sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
metaonly interface ITMS320CTCI6497 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
package ti.catalog.c6000;
metaonly interface ITMS320CTCI6497 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "64x+";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320CTCI6497.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config ITMS320CTCI6497.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320CTCI6497.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
config ITMS320CTCI6497.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
override config String cpuCore = "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320CTCI6497.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320CTCI6497.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
override config Int dataWordSize = 4;
config ITMS320CTCI6497.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
config String deviceHeader;
config ITMS320CTCI6497.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320CTCI6497.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
override config Int minDataUnitSize = 1;
config ITMS320CTCI6497.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
override config Int minProgUnitSize = 1;
config ITMS320CTCI6497.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320CTCI6497.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320CTCI6497.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320CTCI6497.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


interface ti.catalog.c6000.ITMS320DA8xx

metaonly interface ti.catalog.c6000.ITMS320DA8xx
index URL

An interface implemented by TMS320DA8xx devices

XDCspec summary sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
metaonly interface ITMS320DA8xx { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
package ti.catalog.c6000;
metaonly interface ITMS320DA8xx inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "C674";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// [string] = [
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320DA8xx.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config ITMS320DA8xx.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320DA8xx.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config ITMS320DA8xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
override config String cpuCore = "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320DA8xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320DA8xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
override config Int dataWordSize = 4;
config ITMS320DA8xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
config String deviceHeader;
config ITMS320DA8xx.Params.memMap // instance
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
config IPlatform.Memory memMap[string] = [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320DA8xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
override config Int minDataUnitSize = 1;
config ITMS320DA8xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
override config Int minProgUnitSize = 1;
config ITMS320DA8xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320DA8xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320DA8xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320DA8xx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


interface ti.catalog.c6000.ITMS320TCI6608

metaonly interface ti.catalog.c6000.ITMS320TCI6608
index URL
XDCspec summary sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
metaonly interface ITMS320TCI6608 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
package ti.catalog.c6000;
metaonly interface ITMS320TCI6608 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6600";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "4MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00400000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320TCI6608.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config ITMS320TCI6608.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320TCI6608.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
config ITMS320TCI6608.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
override config String cpuCore = "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320TCI6608.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320TCI6608.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
override config Int dataWordSize = 4;
config ITMS320TCI6608.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
config String deviceHeader;
config ITMS320TCI6608.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "4MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00400000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320TCI6608.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
override config Int minDataUnitSize = 1;
config ITMS320TCI6608.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
override config Int minProgUnitSize = 1;
config ITMS320TCI6608.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320TCI6608.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320TCI6608.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6608.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


interface ti.catalog.c6000.ITMS320TCI6616

metaonly interface ti.catalog.c6000.ITMS320TCI6616
index URL
XDCspec summary sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
metaonly interface ITMS320TCI6616 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
package ti.catalog.c6000;
metaonly interface ITMS320TCI6616 inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6600";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320TCI6616.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config ITMS320TCI6616.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320TCI6616.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
config ITMS320TCI6616.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
override config String cpuCore = "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320TCI6616.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320TCI6616.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
override config Int dataWordSize = 4;
config ITMS320TCI6616.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
config String deviceHeader;
config ITMS320TCI6616.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320TCI6616.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
override config Int minDataUnitSize = 1;
config ITMS320TCI6616.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
override config Int minProgUnitSize = 1;
config ITMS320TCI6616.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320TCI6616.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320TCI6616.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI6616.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


interface ti.catalog.c6000.ITMS320TCI663x

metaonly interface ti.catalog.c6000.ITMS320TCI663x
index URL
XDCspec summary sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
metaonly interface ITMS320TCI663x { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
package ti.catalog.c6000;
metaonly interface ITMS320TCI663x inherits ICpuDataSheet {
module-wide config parameters
    readonly config ICacheInfo.CacheDesc cacheMap// [string] = [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
    config Long cacheSizeL1// [string] = [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
    config Long cacheSizeL2// [string] = [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "6600";
    override config String cpuCoreRevision// A string that uniquely identifies a revision of the core = "1.0";
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 4;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config IPlatform.Memory memMap// The default memory map for this device[string] = [
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "6MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00600000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config ITMS320TCI663x.cacheMap // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
readonly config ICacheInfo.CacheDesc cacheMap[string] = [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config ITMS320TCI663x.cacheSizeL1 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
config Long cacheSizeL1[string] = [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config ITMS320TCI663x.cacheSizeL2 // module-wide
index URL
XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
config Long cacheSizeL2[string] = [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
config ITMS320TCI663x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
override config String cpuCore = "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ITMS320TCI663x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
override config String cpuCoreRevision = "1.0";
config ITMS320TCI663x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
override config Int dataWordSize = 4;
config ITMS320TCI663x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
config String deviceHeader;
config ITMS320TCI663x.Params.memMap // instance
index URL

The default memory map for this device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
config IPlatform.Memory memMap[string] = [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "6MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00600000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config ITMS320TCI663x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
override config Int minDataUnitSize = 1;
config ITMS320TCI663x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
override config Int minProgUnitSize = 1;
config ITMS320TCI663x.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ITMS320TCI663x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ITMS320TCI663x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/c6000/ITMS320TCI663x.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:33 GMT


module ti.catalog.c6000.Kepler

metaonly module ti.catalog.c6000.Kepler
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/Kepler.xdc
var Kepler = xdc.useModule('ti.catalog.c6000.Kepler');
module-wide config parameters
    const Kepler.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     Kepler.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     Kepler.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new Kepler.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "6MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00600000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Kepler.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config Kepler.cacheMap // module-wide
index URL
Configuration settings
const Kepler.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config Kepler.cacheSizeL1 // module-wide
index URL
Configuration settings
Kepler.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config Kepler.cacheSizeL2 // module-wide
index URL
Configuration settings
Kepler.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new Kepler.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "6MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00600000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Kepler.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Kepler.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Kepler.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Kepler.Params;
...
params.cpuCoreRevision = String "1.0";
config Kepler.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Kepler.Params;
...
params.dataWordSize = Int 4;
config Kepler.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Kepler.Params;
...
params.deviceHeader = String undefined;
config Kepler.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new Kepler.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "6MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00600000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config Kepler.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Kepler.Params;
...
params.minDataUnitSize = Int 1;
config Kepler.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Kepler.Params;
...
params.minProgUnitSize = Int 1;
config Kepler.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Kepler.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Kepler.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Kepler.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Kepler.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Kepler.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP2431

metaonly module ti.catalog.c6000.OMAP2431
index URL

OMAP2431 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/OMAP2431.xdc
var OMAP2431 = xdc.useModule('ti.catalog.c6000.OMAP2431');
module-wide config parameters
    const OMAP2431.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAP2431.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAP2431.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new OMAP2431.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP2431.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAP2431.cacheMap // module-wide
index URL
Configuration settings
const OMAP2431.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAP2431.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAP2431.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAP2431.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAP2431.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP2431.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP2431.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP2431.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP2431.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP2431.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP2431.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP2431.Params;
...
params.dataWordSize = Int 4;
config OMAP2431.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP2431.Params;
...
params.deviceHeader = String undefined;
config OMAP2431.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP2431.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config OMAP2431.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP2431.Params;
...
params.minDataUnitSize = Int 1;
config OMAP2431.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP2431.Params;
...
params.minProgUnitSize = Int 1;
config OMAP2431.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP2431.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP2431.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP2431.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP2431.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP2431.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP2530

metaonly module ti.catalog.c6000.OMAP2530
index URL

OMAP2530 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/OMAP2530.xdc
var OMAP2530 = xdc.useModule('ti.catalog.c6000.OMAP2530');
module-wide config parameters
    const OMAP2530.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAP2530.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAP2530.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new OMAP2530.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP2530.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAP2530.cacheMap // module-wide
index URL
Configuration settings
const OMAP2530.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAP2530.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAP2530.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAP2530.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAP2530.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP2530.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP2530.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP2530.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP2530.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP2530.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP2530.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP2530.Params;
...
params.dataWordSize = Int 4;
config OMAP2530.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP2530.Params;
...
params.deviceHeader = String undefined;
config OMAP2530.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP2530.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config OMAP2530.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP2530.Params;
...
params.minDataUnitSize = Int 1;
config OMAP2530.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP2530.Params;
...
params.minProgUnitSize = Int 1;
config OMAP2530.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP2530.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP2530.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP2530.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP2530.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP2530.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP2531

metaonly module ti.catalog.c6000.OMAP2531
index URL

OMAP2531 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/OMAP2531.xdc
var OMAP2531 = xdc.useModule('ti.catalog.c6000.OMAP2531');
module-wide config parameters
    const OMAP2531.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAP2531.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAP2531.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new OMAP2531.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP2531.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAP2531.cacheMap // module-wide
index URL
Configuration settings
const OMAP2531.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAP2531.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAP2531.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAP2531.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAP2531.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP2531.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP2531.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP2531.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP2531.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP2531.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP2531.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP2531.Params;
...
params.dataWordSize = Int 4;
config OMAP2531.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP2531.Params;
...
params.deviceHeader = String undefined;
config OMAP2531.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP2531.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config OMAP2531.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP2531.Params;
...
params.minDataUnitSize = Int 1;
config OMAP2531.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP2531.Params;
...
params.minProgUnitSize = Int 1;
config OMAP2531.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP2531.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP2531.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP2531.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP2531.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP2531.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP3425

metaonly module ti.catalog.c6000.OMAP3425
index URL

OMAP3425 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/OMAP3425.xdc
var OMAP3425 = xdc.useModule('ti.catalog.c6000.OMAP3425');
module-wide config parameters
    const OMAP3425.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x107F8000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAP3425.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAP3425.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new OMAP3425.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 96KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x107F8000,
                    len: 0x00018000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3425.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAP3425.cacheMap // module-wide
index URL
Configuration settings
const OMAP3425.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x107F8000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAP3425.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAP3425.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAP3425.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAP3425.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3425.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 96KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x107F8000,
                len: 0x00018000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3425.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3425.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3425.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3425.Params;
...
params.cpuCoreRevision = String "2.1";
config OMAP3425.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.dataWordSize = Int 4;
config OMAP3425.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3425.Params;
...
params.deviceHeader = String undefined;
config OMAP3425.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP3425.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 96KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x107F8000,
            len: 0x00018000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config OMAP3425.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3425.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3425.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3425.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3425.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3425.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3425.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3425.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3425.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP3525

metaonly module ti.catalog.c6000.OMAP3525
index URL

OMAP3525 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/OMAP3525.xdc
var OMAP3525 = xdc.useModule('ti.catalog.c6000.OMAP3525');
module-wide config parameters
    const OMAP3525.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x107F8000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAP3525.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAP3525.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new OMAP3525.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 96KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x107F8000,
                    len: 0x00018000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3525.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAP3525.cacheMap // module-wide
index URL
Configuration settings
const OMAP3525.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x107F8000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAP3525.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAP3525.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAP3525.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAP3525.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3525.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 96KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x107F8000,
                len: 0x00018000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3525.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3525.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3525.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3525.Params;
...
params.cpuCoreRevision = String "2.1";
config OMAP3525.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.dataWordSize = Int 4;
config OMAP3525.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3525.Params;
...
params.deviceHeader = String undefined;
config OMAP3525.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP3525.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 96KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x107F8000,
            len: 0x00018000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config OMAP3525.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3525.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3525.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3525.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3525.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3525.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3525.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3525.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3525.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP3530

metaonly module ti.catalog.c6000.OMAP3530
index URL

OMAP3530 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/OMAP3530.xdc
var OMAP3530 = xdc.useModule('ti.catalog.c6000.OMAP3530');
module-wide config parameters
    const OMAP3530.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x107F8000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAP3530.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAP3530.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new OMAP3530.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 96KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x107F8000,
                    len: 0x00018000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP3530.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAP3530.cacheMap // module-wide
index URL
Configuration settings
const OMAP3530.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x107F8000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAP3530.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAP3530.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAP3530.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAP3530.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP3530.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 96KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x107F8000,
                len: 0x00018000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP3530.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP3530.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP3530.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP3530.Params;
...
params.cpuCoreRevision = String "2.1";
config OMAP3530.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.dataWordSize = Int 4;
config OMAP3530.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP3530.Params;
...
params.deviceHeader = String undefined;
config OMAP3530.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP3530.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 96KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x107F8000,
            len: 0x00018000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config OMAP3530.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.minDataUnitSize = Int 1;
config OMAP3530.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP3530.Params;
...
params.minProgUnitSize = Int 1;
config OMAP3530.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP3530.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP3530.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP3530.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP3530.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP3530.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP4430

metaonly module ti.catalog.c6000.OMAP4430
index URL

The C64T device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/OMAP4430.xdc
var OMAP4430 = xdc.useModule('ti.catalog.c6000.OMAP4430');
per-instance config parameters
    var params = new OMAP4430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "Shared 256KB SRAM",
                    name: "L2SRAM",
                    base: 0x10900000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP4430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP4430.Params;
// Instance config-params object
    params.cpuCore = String "64T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "L2SRAM",
            {
                comment: "Shared 256KB SRAM",
                name: "L2SRAM",
                base: 0x10900000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP4430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP4430.Params;
...
params.cpuCore = String "64T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP4430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP4430.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP4430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.dataWordSize = Int 4;
config OMAP4430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP4430.Params;
...
params.deviceHeader = String undefined;
config OMAP4430.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new OMAP4430.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config OMAP4430.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP4430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "Shared 256KB SRAM",
            name: "L2SRAM",
            base: 0x10900000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP4430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.minDataUnitSize = Int 1;
config OMAP4430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP4430.Params;
...
params.minProgUnitSize = Int 1;
config OMAP4430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP4430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP4430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP4430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP4430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP4430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAP5430

metaonly module ti.catalog.c6000.OMAP5430
index URL

The C64T device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/OMAP5430.xdc
var OMAP5430 = xdc.useModule('ti.catalog.c6000.OMAP5430');
per-instance config parameters
    var params = new OMAP5430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64T";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "Shared 256KB SRAM",
                    name: "L2SRAM",
                    base: 0x10900000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAP5430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new OMAP5430.Params;
// Instance config-params object
    params.cpuCore = String "64T";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "L2SRAM",
            {
                comment: "Shared 256KB SRAM",
                name: "L2SRAM",
                base: 0x10900000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAP5430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAP5430.Params;
...
params.cpuCore = String "64T";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAP5430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAP5430.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAP5430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.dataWordSize = Int 4;
config OMAP5430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAP5430.Params;
...
params.deviceHeader = String undefined;
config OMAP5430.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new OMAP5430.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config OMAP5430.Params.memMap // instance
index URL
Configuration settings
var params = new OMAP5430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "Shared 256KB SRAM",
            name: "L2SRAM",
            base: 0x10900000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAP5430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.minDataUnitSize = Int 1;
config OMAP5430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAP5430.Params;
...
params.minProgUnitSize = Int 1;
config OMAP5430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAP5430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAP5430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAP5430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAP5430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAP5430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:34 GMT


module ti.catalog.c6000.OMAPL137

metaonly module ti.catalog.c6000.OMAPL137
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/OMAPL137.xdc
var OMAPL137 = xdc.useModule('ti.catalog.c6000.OMAPL137');
module-wide config parameters
    const OMAPL137.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAPL137.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAPL137.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new OMAPL137.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAPL137.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAPL137.cacheMap // module-wide
index URL
Configuration settings
const OMAPL137.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAPL137.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAPL137.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAPL137.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAPL137.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAPL137.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAPL137.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAPL137.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAPL137.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAPL137.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAPL137.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAPL137.Params;
...
params.dataWordSize = Int 4;
config OMAPL137.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAPL137.Params;
...
params.deviceHeader = String undefined;
config OMAPL137.Params.memMap // instance
index URL
Configuration settings
var params = new OMAPL137.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAPL137.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAPL137.Params;
...
params.minDataUnitSize = Int 1;
config OMAPL137.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAPL137.Params;
...
params.minProgUnitSize = Int 1;
config OMAPL137.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAPL137.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAPL137.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAPL137.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAPL137.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAPL137.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.OMAPL138

metaonly module ti.catalog.c6000.OMAPL138
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/OMAPL138.xdc
var OMAPL138 = xdc.useModule('ti.catalog.c6000.OMAPL138');
module-wide config parameters
    const OMAPL138.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     OMAPL138.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     OMAPL138.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new OMAPL138.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = OMAPL138.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config OMAPL138.cacheMap // module-wide
index URL
Configuration settings
const OMAPL138.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config OMAPL138.cacheSizeL1 // module-wide
index URL
Configuration settings
OMAPL138.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config OMAPL138.cacheSizeL2 // module-wide
index URL
Configuration settings
OMAPL138.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new OMAPL138.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config OMAPL138.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new OMAPL138.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config OMAPL138.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new OMAPL138.Params;
...
params.cpuCoreRevision = String "1.0";
config OMAPL138.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new OMAPL138.Params;
...
params.dataWordSize = Int 4;
config OMAPL138.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new OMAPL138.Params;
...
params.deviceHeader = String undefined;
config OMAPL138.Params.memMap // instance
index URL
Configuration settings
var params = new OMAPL138.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config OMAPL138.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new OMAPL138.Params;
...
params.minDataUnitSize = Int 1;
config OMAPL138.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new OMAPL138.Params;
...
params.minProgUnitSize = Int 1;
config OMAPL138.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new OMAPL138.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OMAPL138.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OMAPL138.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
OMAPL138.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
OMAPL138.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TCI66AK2G02

metaonly module ti.catalog.c6000.TCI66AK2G02
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TCI66AK2G02.xdc
var TCI66AK2G02 = xdc.useModule('ti.catalog.c6000.TCI66AK2G02');
module-wide config parameters
    const TCI66AK2G02.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TCI66AK2G02.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TCI66AK2G02.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TCI66AK2G02.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "1MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TCI66AK2G02.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TCI66AK2G02.cacheMap // module-wide
index URL
Configuration settings
const TCI66AK2G02.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TCI66AK2G02.cacheSizeL1 // module-wide
index URL
Configuration settings
TCI66AK2G02.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TCI66AK2G02.cacheSizeL2 // module-wide
index URL
Configuration settings
TCI66AK2G02.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TCI66AK2G02.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "1MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TCI66AK2G02.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TCI66AK2G02.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.cpuCoreRevision = String "1.0";
config TCI66AK2G02.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.dataWordSize = Int 4;
config TCI66AK2G02.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.deviceHeader = String undefined;
config TCI66AK2G02.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "1MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TCI66AK2G02.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.minDataUnitSize = Int 1;
config TCI66AK2G02.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.minProgUnitSize = Int 1;
config TCI66AK2G02.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TCI66AK2G02.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TCI66AK2G02.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TCI66AK2G02.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TCI66AK2G02.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TCI66AK2G02.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TDA3XX

metaonly module ti.catalog.c6000.TDA3XX
index URL

The TDA3XX device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TDA3XX.xdc
var TDA3XX = xdc.useModule('ti.catalog.c6000.TDA3XX');
module-wide config parameters
    const TDA3XX.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TDA3XX.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TDA3XX.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ]
    ];
per-instance config parameters
    var params = new TDA3XX.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "288KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00048000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB SRAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB SRAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC_RAM",
                {
                    name: "OCMC_RAM",
                    base: 0x40300000,
                    len: 0x00080000
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TDA3XX.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TDA3XX.cacheMap // module-wide
index URL
Configuration settings
const TDA3XX.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TDA3XX.cacheSizeL1 // module-wide
index URL
Configuration settings
TDA3XX.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TDA3XX.cacheSizeL2 // module-wide
index URL
Configuration settings
TDA3XX.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TDA3XX.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "288KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00048000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB SRAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB SRAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_RAM",
            {
                name: "OCMC_RAM",
                base: 0x40300000,
                len: 0x00080000
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TDA3XX.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TDA3XX.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TDA3XX.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TDA3XX.Params;
...
params.cpuCoreRevision = String "1.0";
config TDA3XX.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.dataWordSize = Int 4;
config TDA3XX.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TDA3XX.Params;
...
params.deviceHeader = String undefined;
config TDA3XX.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TDA3XX.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "288KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00048000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB SRAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB SRAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_RAM",
        {
            name: "OCMC_RAM",
            base: 0x40300000,
            len: 0x00080000
        }
    ]
];
config TDA3XX.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.minDataUnitSize = Int 1;
config TDA3XX.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TDA3XX.Params;
...
params.minProgUnitSize = Int 1;
config TDA3XX.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TDA3XX.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TDA3XX.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TDA3XX.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TDA3XX.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TDA3XX.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C2430

metaonly module ti.catalog.c6000.TMS320C2430
index URL

The OMAP2430 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C2430.xdc
var TMS320C2430 = xdc.useModule('ti.catalog.c6000.TMS320C2430');
module-wide config parameters
    const TMS320C2430.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C2430.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C2430.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C2430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C2430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C2430.cacheMap // module-wide
index URL
Configuration settings
const TMS320C2430.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C2430.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C2430.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C2430.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C2430.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C2430.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C2430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C2430.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C2430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C2430.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C2430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C2430.Params;
...
params.dataWordSize = Int 4;
config TMS320C2430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C2430.Params;
...
params.deviceHeader = String undefined;
config TMS320C2430.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C2430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C2430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2430.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C2430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C2430.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C2430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C2430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C2430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C2430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C2430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C2430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C3430

metaonly module ti.catalog.c6000.TMS320C3430
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C3430.xdc
var TMS320C3430 = xdc.useModule('ti.catalog.c6000.TMS320C3430');
module-wide config parameters
    const TMS320C3430.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x107F8000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C3430.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C3430.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C3430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "2.1";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 96KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x107F8000,
                    len: 0x00018000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C3430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C3430.cacheMap // module-wide
index URL
Configuration settings
const TMS320C3430.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x107F8000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C3430.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C3430.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C3430.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C3430.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C3430.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "2.1";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 96KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x107F8000,
                len: 0x00018000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C3430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C3430.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C3430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C3430.Params;
...
params.cpuCoreRevision = String "2.1";
config TMS320C3430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.dataWordSize = Int 4;
config TMS320C3430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C3430.Params;
...
params.deviceHeader = String undefined;
config TMS320C3430.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C3430.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 96KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x107F8000,
            len: 0x00018000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C3430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C3430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C3430.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C3430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C3430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C3430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C3430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C3430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C3430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6201

metaonly module ti.catalog.c6000.TMS320C6201
index URL

The C6201 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6201.xdc
var TMS320C6201 = xdc.useModule('ti.catalog.c6000.TMS320C6201');
module-wide config parameters
     TMS320C6201.memBlock// = IPlatform.Memory[string] [
        [
            "IPRAM0",
            {
                comment: "Internal Program memory map 0",
                name: "IPRAM",
                base: 0x1400000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IPRAM1",
            {
                comment: "Internal Program memory map 1",
                name: "IPRAM",
                base: 0x0000000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IDRAM",
            {
                comment: "Internal Data memory",
                name: "IDRAM",
                base: 0x80000000,
                len: 0x00010000,
                space: "data"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320C6201.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6201.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6201.memBlock // module-wide
index URL
Configuration settings
TMS320C6201.memBlock = IPlatform.Memory[string] [
    [
        "IPRAM0",
        {
            comment: "Internal Program memory map 0",
            name: "IPRAM",
            base: 0x1400000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IPRAM1",
        {
            comment: "Internal Program memory map 1",
            name: "IPRAM",
            base: 0x0000000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IDRAM",
        {
            comment: "Internal Data memory",
            name: "IDRAM",
            base: 0x80000000,
            len: 0x00010000,
            space: "data"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6201.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] undefined;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6201.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6201.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6201.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6201.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6201.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6201.Params;
...
params.dataWordSize = Int 4;
config TMS320C6201.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6201.Params;
...
params.deviceHeader = String undefined;
config TMS320C6201.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6201.Params;
...
params.memMap = IPlatform.Memory[string] undefined;
config TMS320C6201.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6201.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6201.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6201.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6201.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6201.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6201.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6201.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6201.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6201.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6202

metaonly module ti.catalog.c6000.TMS320C6202
index URL

The C6202 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6202.xdc
var TMS320C6202 = xdc.useModule('ti.catalog.c6000.TMS320C6202');
module-wide config parameters
     TMS320C6202.memBlock// = IPlatform.Memory[string] [
        [
            "IPRAM0",
            {
                comment: "Internal Program memory map 0",
                name: "IPRAM",
                base: 0x1400000,
                len: 0x0040000,
                space: "code"
            }
        ],
        [
            "IPRAM1",
            {
                comment: "Internal Program memory map 1",
                name: "IPRAM",
                base: 0x0000000,
                len: 0x0040000,
                space: "code"
            }
        ],
        [
            "IDRAM",
            {
                comment: "Internal Data memory",
                name: "IDRAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "data"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320C6202.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6202.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6202.memBlock // module-wide
index URL
Configuration settings
TMS320C6202.memBlock = IPlatform.Memory[string] [
    [
        "IPRAM0",
        {
            comment: "Internal Program memory map 0",
            name: "IPRAM",
            base: 0x1400000,
            len: 0x0040000,
            space: "code"
        }
    ],
    [
        "IPRAM1",
        {
            comment: "Internal Program memory map 1",
            name: "IPRAM",
            base: 0x0000000,
            len: 0x0040000,
            space: "code"
        }
    ],
    [
        "IDRAM",
        {
            comment: "Internal Data memory",
            name: "IDRAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "data"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6202.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] undefined;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6202.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6202.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6202.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6202.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6202.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6202.Params;
...
params.dataWordSize = Int 4;
config TMS320C6202.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6202.Params;
...
params.deviceHeader = String undefined;
config TMS320C6202.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6202.Params;
...
params.memMap = IPlatform.Memory[string] undefined;
config TMS320C6202.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6202.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6202.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6202.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6202.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6202.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6202.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6202.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6202.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6202.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6203

metaonly module ti.catalog.c6000.TMS320C6203
index URL

The C6203 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6203.xdc
var TMS320C6203 = xdc.useModule('ti.catalog.c6000.TMS320C6203');
module-wide config parameters
     TMS320C6203.memBlock// = IPlatform.Memory[string] [
        [
            "IPRAM0",
            {
                comment: "Internal Program memory map 0",
                name: "IPRAM",
                base: 0x1400000,
                len: 0x0060000,
                space: "code"
            }
        ],
        [
            "IPRAM1",
            {
                comment: "Internal Program memory map 1",
                name: "IPRAM",
                base: 0x0000000,
                len: 0x0060000,
                space: "code"
            }
        ],
        [
            "IDRAM",
            {
                comment: "Internal Data memory",
                name: "IDRAM",
                base: 0x80000000,
                len: 0x00080000,
                space: "data"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320C6203.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6203.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6203.memBlock // module-wide
index URL
Configuration settings
TMS320C6203.memBlock = IPlatform.Memory[string] [
    [
        "IPRAM0",
        {
            comment: "Internal Program memory map 0",
            name: "IPRAM",
            base: 0x1400000,
            len: 0x0060000,
            space: "code"
        }
    ],
    [
        "IPRAM1",
        {
            comment: "Internal Program memory map 1",
            name: "IPRAM",
            base: 0x0000000,
            len: 0x0060000,
            space: "code"
        }
    ],
    [
        "IDRAM",
        {
            comment: "Internal Data memory",
            name: "IDRAM",
            base: 0x80000000,
            len: 0x00080000,
            space: "data"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6203.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] undefined;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6203.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6203.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6203.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6203.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6203.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6203.Params;
...
params.dataWordSize = Int 4;
config TMS320C6203.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6203.Params;
...
params.deviceHeader = String undefined;
config TMS320C6203.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6203.Params;
...
params.memMap = IPlatform.Memory[string] undefined;
config TMS320C6203.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6203.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6203.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6203.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6203.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6203.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6203.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6203.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6203.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6203.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6203B

metaonly module ti.catalog.c6000.TMS320C6203B
index URL

The C6203B device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6203B.xdc
var TMS320C6203B = xdc.useModule('ti.catalog.c6000.TMS320C6203B');
module-wide config parameters
     TMS320C6203B.memBlock// = IPlatform.Memory[string] TMS320C6203.memBlock;
per-instance config parameters
    var params = new TMS320C6203B.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6203B.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6203B.memBlock // module-wide
index URL
Configuration settings
TMS320C6203B.memBlock = IPlatform.Memory[string] TMS320C6203.memBlock;
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6203B.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] undefined;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6203B.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6203B.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6203B.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6203B.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6203B.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6203B.Params;
...
params.dataWordSize = Int 4;
config TMS320C6203B.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6203B.Params;
...
params.deviceHeader = String undefined;
config TMS320C6203B.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6203B.Params;
...
params.memMap = IPlatform.Memory[string] undefined;
config TMS320C6203B.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6203B.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6203B.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6203B.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6203B.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6203B.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6203B.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6203B.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6203B.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6203B.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6204

metaonly module ti.catalog.c6000.TMS320C6204
index URL

The C6204 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6204.xdc
var TMS320C6204 = xdc.useModule('ti.catalog.c6000.TMS320C6204');
module-wide config parameters
     TMS320C6204.memBlock// = IPlatform.Memory[string] [
        [
            "IPRAM0",
            {
                comment: "Internal Program memory map 0",
                name: "IPRAM",
                base: 0x1400000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IPRAM1",
            {
                comment: "Internal Program memory map 1",
                name: "IPRAM",
                base: 0x0000000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IDRAM",
            {
                comment: "Internal Data memory",
                name: "IDRAM",
                base: 0x80000000,
                len: 0x00010000,
                space: "data"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320C6204.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6204.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6204.memBlock // module-wide
index URL
Configuration settings
TMS320C6204.memBlock = IPlatform.Memory[string] [
    [
        "IPRAM0",
        {
            comment: "Internal Program memory map 0",
            name: "IPRAM",
            base: 0x1400000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IPRAM1",
        {
            comment: "Internal Program memory map 1",
            name: "IPRAM",
            base: 0x0000000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IDRAM",
        {
            comment: "Internal Data memory",
            name: "IDRAM",
            base: 0x80000000,
            len: 0x00010000,
            space: "data"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6204.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] undefined;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6204.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6204.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6204.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6204.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6204.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6204.Params;
...
params.dataWordSize = Int 4;
config TMS320C6204.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6204.Params;
...
params.deviceHeader = String undefined;
config TMS320C6204.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6204.Params;
...
params.memMap = IPlatform.Memory[string] undefined;
config TMS320C6204.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6204.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6204.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6204.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6204.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6204.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6204.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6204.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6204.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6204.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6205

metaonly module ti.catalog.c6000.TMS320C6205
index URL

The C6205 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6205.xdc
var TMS320C6205 = xdc.useModule('ti.catalog.c6000.TMS320C6205');
module-wide config parameters
     TMS320C6205.memBlock// = IPlatform.Memory[string] [
        [
            "IPRAM0",
            {
                comment: "Internal Program memory map 0",
                name: "IPRAM",
                base: 0x1400000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IPRAM1",
            {
                comment: "Internal Program memory map 1",
                name: "IPRAM",
                base: 0x0000000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IDRAM",
            {
                comment: "Internal Data memory",
                name: "IDRAM",
                base: 0x80000000,
                len: 0x00010000,
                space: "data"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320C6205.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6205.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6205.memBlock // module-wide
index URL
Configuration settings
TMS320C6205.memBlock = IPlatform.Memory[string] [
    [
        "IPRAM0",
        {
            comment: "Internal Program memory map 0",
            name: "IPRAM",
            base: 0x1400000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IPRAM1",
        {
            comment: "Internal Program memory map 1",
            name: "IPRAM",
            base: 0x0000000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IDRAM",
        {
            comment: "Internal Data memory",
            name: "IDRAM",
            base: 0x80000000,
            len: 0x00010000,
            space: "data"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6205.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] undefined;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6205.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6205.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6205.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6205.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6205.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6205.Params;
...
params.dataWordSize = Int 4;
config TMS320C6205.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6205.Params;
...
params.deviceHeader = String undefined;
config TMS320C6205.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6205.Params;
...
params.memMap = IPlatform.Memory[string] undefined;
config TMS320C6205.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6205.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6205.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6205.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6205.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6205.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6205.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6205.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6205.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6205.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6211

metaonly module ti.catalog.c6000.TMS320C6211
index URL

The C6211 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6211.xdc
var TMS320C6211 = xdc.useModule('ti.catalog.c6000.TMS320C6211');
module-wide config parameters
    const TMS320C6211.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "SRAM",
                        0x0000
                    ],
                    [
                        "1-way cache",
                        0x4000
                    ],
                    [
                        "2-way cache",
                        0x8000
                    ],
                    [
                        "3-way cache",
                        0xc000
                    ],
                    [
                        "4-way cache",
                        0x10000
                    ]
                ],
                defaultValue: "4-way cache",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6211.cacheSize// = Long[string] [
        [
            "SRAM",
            0x0000
        ],
        [
            "1-way cache",
            0x4000
        ],
        [
            "2-way cache",
            0x8000
        ],
        [
            "3-way cache",
            0xc000
        ],
        [
            "4-way cache",
            0x10000
        ],
        [
            "0k",
            0x0000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ],
        [
            "48k",
            0xc000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6211.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x10000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6211.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6211.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6211.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "SRAM",
                    0x0000
                ],
                [
                    "1-way cache",
                    0x4000
                ],
                [
                    "2-way cache",
                    0x8000
                ],
                [
                    "3-way cache",
                    0xc000
                ],
                [
                    "4-way cache",
                    0x10000
                ]
            ],
            defaultValue: "4-way cache",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6211.cacheSize // module-wide
index URL
Configuration settings
TMS320C6211.cacheSize = Long[string] [
    [
        "SRAM",
        0x0000
    ],
    [
        "1-way cache",
        0x4000
    ],
    [
        "2-way cache",
        0x8000
    ],
    [
        "3-way cache",
        0xc000
    ],
    [
        "4-way cache",
        0x10000
    ],
    [
        "0k",
        0x0000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ],
    [
        "48k",
        0xc000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6211.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x10000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6211.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6211.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6211.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6211.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6211.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6211.Params;
...
params.dataWordSize = Int 4;
config TMS320C6211.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6211.Params;
...
params.deviceHeader = String undefined;
config TMS320C6211.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6211.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x10000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6211.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6211.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6211.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6211.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6211.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6211.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6211.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6211.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6211.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6211.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:35 GMT


module ti.catalog.c6000.TMS320C6211B

metaonly module ti.catalog.c6000.TMS320C6211B
index URL

The C6211B device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6211B.xdc
var TMS320C6211B = xdc.useModule('ti.catalog.c6000.TMS320C6211B');
module-wide config parameters
    const TMS320C6211B.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "SRAM",
                        0x0000
                    ],
                    [
                        "1-way cache",
                        0x4000
                    ],
                    [
                        "2-way cache",
                        0x8000
                    ],
                    [
                        "3-way cache",
                        0xc000
                    ],
                    [
                        "4-way cache",
                        0x10000
                    ]
                ],
                defaultValue: "4-way cache",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6211B.cacheSize// = Long[string] [
        [
            "SRAM",
            0x0000
        ],
        [
            "1-way cache",
            0x4000
        ],
        [
            "2-way cache",
            0x8000
        ],
        [
            "3-way cache",
            0xc000
        ],
        [
            "4-way cache",
            0x10000
        ],
        [
            "0k",
            0x0000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ],
        [
            "48k",
            0xc000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6211B.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6200";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] TMS320C6211.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6211B.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6211B.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6211B.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "SRAM",
                    0x0000
                ],
                [
                    "1-way cache",
                    0x4000
                ],
                [
                    "2-way cache",
                    0x8000
                ],
                [
                    "3-way cache",
                    0xc000
                ],
                [
                    "4-way cache",
                    0x10000
                ]
            ],
            defaultValue: "4-way cache",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6211B.cacheSize // module-wide
index URL
Configuration settings
TMS320C6211B.cacheSize = Long[string] [
    [
        "SRAM",
        0x0000
    ],
    [
        "1-way cache",
        0x4000
    ],
    [
        "2-way cache",
        0x8000
    ],
    [
        "3-way cache",
        0xc000
    ],
    [
        "4-way cache",
        0x10000
    ],
    [
        "0k",
        0x0000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ],
    [
        "48k",
        0xc000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6211B.Params;
// Instance config-params object
    params.cpuCore = String "6200";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6211B.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6211B.Params;
...
params.cpuCore = String "6200";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6211B.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6211B.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6211B.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6211B.Params;
...
params.dataWordSize = Int 4;
config TMS320C6211B.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6211B.Params;
...
params.deviceHeader = String undefined;
config TMS320C6211B.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6211B.Params;
...
params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
config TMS320C6211B.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6211B.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6211B.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6211B.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6211B.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6211B.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6211B.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6211B.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6211B.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6211B.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6410

metaonly module ti.catalog.c6000.TMS320C6410
index URL

The 6410 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6410.xdc
var TMS320C6410 = xdc.useModule('ti.catalog.c6000.TMS320C6410');
module-wide config parameters
    const TMS320C6410.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6410.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6410.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x20000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6410.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6410.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6410.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6410.cacheSize // module-wide
index URL
Configuration settings
TMS320C6410.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6410.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6410.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6410.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6410.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6410.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6410.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6410.Params;
...
params.dataWordSize = Int 4;
config TMS320C6410.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6410.Params;
...
params.deviceHeader = String undefined;
config TMS320C6410.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6410.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6410.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6410.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6410.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6410.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6410.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6410.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6410.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6410.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6410.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6410.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6411

metaonly module ti.catalog.c6000.TMS320C6411
index URL

The 6411 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6411.xdc
var TMS320C6411 = xdc.useModule('ti.catalog.c6000.TMS320C6411');
module-wide config parameters
    const TMS320C6411.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6411.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6411.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6411.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6411.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6411.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6411.cacheSize // module-wide
index URL
Configuration settings
TMS320C6411.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6411.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6411.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6411.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6411.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6411.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6411.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6411.Params;
...
params.dataWordSize = Int 4;
config TMS320C6411.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6411.Params;
...
params.deviceHeader = String undefined;
config TMS320C6411.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6411.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6411.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6411.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6411.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6411.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6411.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6411.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6411.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6411.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6411.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6411.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6412

metaonly module ti.catalog.c6000.TMS320C6412
index URL

The 6412 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6412.xdc
var TMS320C6412 = xdc.useModule('ti.catalog.c6000.TMS320C6412');
module-wide config parameters
    const TMS320C6412.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6412.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6412.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6412.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6412.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6412.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6412.cacheSize // module-wide
index URL
Configuration settings
TMS320C6412.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6412.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6412.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6412.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6412.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6412.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6412.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6412.Params;
...
params.dataWordSize = Int 4;
config TMS320C6412.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6412.Params;
...
params.deviceHeader = String undefined;
config TMS320C6412.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6412.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6412.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6412.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6412.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6412.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6412.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6412.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6412.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6412.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6412.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6412.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6413

metaonly module ti.catalog.c6000.TMS320C6413
index URL

The 6413 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6413.xdc
var TMS320C6413 = xdc.useModule('ti.catalog.c6000.TMS320C6413');
module-wide config parameters
    const TMS320C6413.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6413.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6413.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6413.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6413.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6413.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6413.cacheSize // module-wide
index URL
Configuration settings
TMS320C6413.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6413.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6413.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6413.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6413.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6413.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6413.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6413.Params;
...
params.dataWordSize = Int 4;
config TMS320C6413.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6413.Params;
...
params.deviceHeader = String undefined;
config TMS320C6413.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6413.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6413.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6413.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6413.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6413.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6413.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6413.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6413.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6413.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6413.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6413.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6414

metaonly module ti.catalog.c6000.TMS320C6414
index URL

The C6414 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6414.xdc
var TMS320C6414 = xdc.useModule('ti.catalog.c6000.TMS320C6414');
module-wide config parameters
    const TMS320C6414.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6414.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6414.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x000000,
                    len: 0x100000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6414.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6414.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6414.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6414.cacheSize // module-wide
index URL
Configuration settings
TMS320C6414.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6414.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x000000,
                len: 0x100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6414.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6414.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6414.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6414.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6414.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6414.Params;
...
params.dataWordSize = Int 4;
config TMS320C6414.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6414.Params;
...
params.deviceHeader = String undefined;
config TMS320C6414.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6414.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x000000,
            len: 0x100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6414.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6414.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6414.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6414.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6414.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6414.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6414.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6414.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6414.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6414.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6415

metaonly module ti.catalog.c6000.TMS320C6415
index URL

The C6415 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6415.xdc
var TMS320C6415 = xdc.useModule('ti.catalog.c6000.TMS320C6415');
module-wide config parameters
    const TMS320C6415.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6415.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6415.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x000000,
                    len: 0x100000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6415.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6415.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6415.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6415.cacheSize // module-wide
index URL
Configuration settings
TMS320C6415.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6415.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x000000,
                len: 0x100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6415.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6415.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6415.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6415.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6415.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6415.Params;
...
params.dataWordSize = Int 4;
config TMS320C6415.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6415.Params;
...
params.deviceHeader = String undefined;
config TMS320C6415.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6415.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x000000,
            len: 0x100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6415.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6415.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6415.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6415.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6415.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6415.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6415.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6415.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6415.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6415.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6416

metaonly module ti.catalog.c6000.TMS320C6416
index URL

The C6416 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6416.xdc
var TMS320C6416 = xdc.useModule('ti.catalog.c6000.TMS320C6416');
module-wide config parameters
    const TMS320C6416.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6416.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6416.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x000000,
                    len: 0x100000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6416.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6416.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6416.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6416.cacheSize // module-wide
index URL
Configuration settings
TMS320C6416.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6416.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x000000,
                len: 0x100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6416.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6416.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6416.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6416.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6416.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6416.Params;
...
params.dataWordSize = Int 4;
config TMS320C6416.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6416.Params;
...
params.deviceHeader = String undefined;
config TMS320C6416.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6416.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x000000,
            len: 0x100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6416.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6416.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6416.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6416.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6416.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6416.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6416.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6416.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6416.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6416.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6418

metaonly module ti.catalog.c6000.TMS320C6418
index URL

The C6418 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6418.xdc
var TMS320C6418 = xdc.useModule('ti.catalog.c6000.TMS320C6418');
module-wide config parameters
    const TMS320C6418.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6418.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6418.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x80000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6418.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6418.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6418.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6418.cacheSize // module-wide
index URL
Configuration settings
TMS320C6418.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6418.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x80000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6418.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6418.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6418.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6418.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6418.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6418.Params;
...
params.dataWordSize = Int 4;
config TMS320C6418.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6418.Params;
...
params.deviceHeader = String undefined;
config TMS320C6418.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6418.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x80000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6418.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6418.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6418.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6418.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6418.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6418.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6418.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6418.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6418.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6418.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6421

metaonly module ti.catalog.c6000.TMS320C6421
index URL

The C6421 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6421.xdc
var TMS320C6421 = xdc.useModule('ti.catalog.c6000.TMS320C6421');
module-wide config parameters
    const TMS320C6421.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E0C000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F0C000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6421.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x4000
        ]
    ];
     TMS320C6421.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6421.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
                    name: "IRAM",
                    base: 0x10810000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 16KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E0C000,
                    len: 0x00004000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 48KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F0C000,
                    len: 0x0000C000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6421.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6421.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6421.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E0C000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F0C000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6421.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6421.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x4000
    ]
];
config TMS320C6421.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6421.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6421.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
                name: "IRAM",
                base: 0x10810000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 16KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x10E0C000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 48KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x10F0C000,
                len: 0x0000C000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6421.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6421.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6421.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6421.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6421.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6421.Params;
...
params.dataWordSize = Int 4;
config TMS320C6421.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6421.Params;
...
params.deviceHeader = String undefined;
config TMS320C6421.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6421.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
            name: "IRAM",
            base: 0x10810000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 16KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x10E0C000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 48KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x10F0C000,
            len: 0x0000C000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6421.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6421.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6421.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6421.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6421.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6421.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6421.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6421.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6421.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6421.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6424

metaonly module ti.catalog.c6000.TMS320C6424
index URL

The C6424 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6424.xdc
var TMS320C6424 = xdc.useModule('ti.catalog.c6000.TMS320C6424');
module-wide config parameters
    const TMS320C6424.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6424.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6424.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6424.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6424.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6424.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6424.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6424.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6424.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6424.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6424.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6424.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x10E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6424.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6424.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6424.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6424.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6424.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6424.Params;
...
params.dataWordSize = Int 4;
config TMS320C6424.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6424.Params;
...
params.deviceHeader = String undefined;
config TMS320C6424.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6424.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x10E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6424.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6424.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6424.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6424.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6424.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6424.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6424.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6424.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6424.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6424.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:36 GMT


module ti.catalog.c6000.TMS320C6428

metaonly module ti.catalog.c6000.TMS320C6428
index URL

The 6428 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6428.xdc
var TMS320C6428 = xdc.useModule('ti.catalog.c6000.TMS320C6428');
module-wide config parameters
    const TMS320C6428.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0xA00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6428.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6428.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6428.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 512KB L2 RAM/CACHE",
                    name: "IRAM",
                    base: 0xA00000,
                    len: 0x080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6428.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6428.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6428.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0xA00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6428.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6428.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6428.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6428.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6428.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 512KB L2 RAM/CACHE",
                name: "IRAM",
                base: 0xA00000,
                len: 0x080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6428.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6428.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6428.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6428.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6428.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6428.Params;
...
params.dataWordSize = Int 4;
config TMS320C6428.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6428.Params;
...
params.deviceHeader = String undefined;
config TMS320C6428.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6428.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 512KB L2 RAM/CACHE",
            name: "IRAM",
            base: 0xA00000,
            len: 0x080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6428.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6428.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6428.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6428.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6428.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6428.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6428.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6428.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6428.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6428.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6452

metaonly module ti.catalog.c6000.TMS320C6452
index URL

The 6452 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6452.xdc
var TMS320C6452 = xdc.useModule('ti.catalog.c6000.TMS320C6452');
module-wide config parameters
    const TMS320C6452.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0xA00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6452.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6452.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6452.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 1408KB L2 RAM/CACHE",
                    name: "IRAM",
                    base: 0xA00000,
                    len: 0x160000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6452.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6452.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6452.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0xA00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6452.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6452.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6452.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6452.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6452.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 1408KB L2 RAM/CACHE",
                name: "IRAM",
                base: 0xA00000,
                len: 0x160000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6452.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6452.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6452.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6452.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6452.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6452.Params;
...
params.dataWordSize = Int 4;
config TMS320C6452.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6452.Params;
...
params.deviceHeader = String undefined;
config TMS320C6452.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6452.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 1408KB L2 RAM/CACHE",
            name: "IRAM",
            base: 0xA00000,
            len: 0x160000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6452.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6452.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6452.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6452.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6452.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6452.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6452.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6452.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6452.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6452.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6454

metaonly module ti.catalog.c6000.TMS320C6454
index URL

The 6454 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6454.xdc
var TMS320C6454 = xdc.useModule('ti.catalog.c6000.TMS320C6454');
module-wide config parameters
    const TMS320C6454.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6454.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6454.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6454.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 1MB UMAP0 memory",
                    name: "IRAM",
                    base: 0x800000,
                    len: 0x100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6454.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6454.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6454.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6454.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6454.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6454.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6454.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6454.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 1MB UMAP0 memory",
                name: "IRAM",
                base: 0x800000,
                len: 0x100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6454.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6454.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6454.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6454.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6454.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6454.Params;
...
params.dataWordSize = Int 4;
config TMS320C6454.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6454.Params;
...
params.deviceHeader = String undefined;
config TMS320C6454.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6454.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 1MB UMAP0 memory",
            name: "IRAM",
            base: 0x800000,
            len: 0x100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6454.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6454.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6454.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6454.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6454.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6454.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6454.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6454.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6454.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6454.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6455

metaonly module ti.catalog.c6000.TMS320C6455
index URL

The 6455 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6455.xdc
var TMS320C6455 = xdc.useModule('ti.catalog.c6000.TMS320C6455');
module-wide config parameters
    const TMS320C6455.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6455.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6455.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6455.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 2MB UMAP0 memory",
                    name: "IRAM",
                    base: 0x800000,
                    len: 0x200000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6455.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6455.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6455.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6455.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6455.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6455.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6455.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6455.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 2MB UMAP0 memory",
                name: "IRAM",
                base: 0x800000,
                len: 0x200000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6455.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6455.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6455.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6455.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6455.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6455.Params;
...
params.dataWordSize = Int 4;
config TMS320C6455.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6455.Params;
...
params.deviceHeader = String undefined;
config TMS320C6455.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6455.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 2MB UMAP0 memory",
            name: "IRAM",
            base: 0x800000,
            len: 0x200000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6455.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6455.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6455.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6455.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6455.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6455.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6455.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6455.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6455.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6455.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6457

metaonly module ti.catalog.c6000.TMS320C6457
index URL

The 6457 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6457.xdc
var TMS320C6457 = xdc.useModule('ti.catalog.c6000.TMS320C6457');
module-wide config parameters
    const TMS320C6457.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6457.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6457.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6457.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 2MB L2 memory",
                    name: "IRAM",
                    base: 0x800000,
                    len: 0x200000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6457.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6457.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6457.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6457.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6457.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6457.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6457.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6457.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 2MB L2 memory",
                name: "IRAM",
                base: 0x800000,
                len: 0x200000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6457.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6457.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6457.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6457.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6457.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6457.Params;
...
params.dataWordSize = Int 4;
config TMS320C6457.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6457.Params;
...
params.deviceHeader = String undefined;
config TMS320C6457.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6457.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 2MB L2 memory",
            name: "IRAM",
            base: 0x800000,
            len: 0x200000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6457.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6457.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6457.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6457.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6457.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6457.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6457.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6457.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6457.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6457.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6472

metaonly module ti.catalog.c6000.TMS320C6472
index URL

The 6472 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6472.xdc
var TMS320C6472 = xdc.useModule('ti.catalog.c6000.TMS320C6472');
module-wide config parameters
    const TMS320C6472.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "LL2RAM"
            }
        ]
    ];
     TMS320C6472.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6472.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6472.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "LL2RAM",
                {
                    comment: "608K Local L2 RAM/CACHE memory",
                    name: "LL2RAM",
                    base: 0x00800000,
                    len: 0x00098000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "SL2RAM",
                {
                    comment: "768K Shared L2 RAM memory",
                    name: "SL2RAM",
                    base: 0x00200000,
                    len: 0x000C0000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6472.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6472.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6472.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "LL2RAM"
        }
    ]
];
config TMS320C6472.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6472.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6472.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6472.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6472.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "LL2RAM",
            {
                comment: "608K Local L2 RAM/CACHE memory",
                name: "LL2RAM",
                base: 0x00800000,
                len: 0x00098000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "SL2RAM",
            {
                comment: "768K Shared L2 RAM memory",
                name: "SL2RAM",
                base: 0x00200000,
                len: 0x000C0000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6472.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6472.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6472.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6472.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6472.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6472.Params;
...
params.dataWordSize = Int 4;
config TMS320C6472.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6472.Params;
...
params.deviceHeader = String undefined;
config TMS320C6472.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6472.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "LL2RAM",
        {
            comment: "608K Local L2 RAM/CACHE memory",
            name: "LL2RAM",
            base: 0x00800000,
            len: 0x00098000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "SL2RAM",
        {
            comment: "768K Shared L2 RAM memory",
            name: "SL2RAM",
            base: 0x00200000,
            len: 0x000C0000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6472.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6472.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6472.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6472.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6472.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6472.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6472.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6472.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6472.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6472.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6474

metaonly module ti.catalog.c6000.TMS320C6474
index URL

The 6474 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6474.xdc
var TMS320C6474 = xdc.useModule('ti.catalog.c6000.TMS320C6474');
module-wide config parameters
    const TMS320C6474.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2RAM"
            }
        ]
    ];
     TMS320C6474.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6474.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
     TMS320C6474.memBlock// = IPlatform.Memory[string] [
        [
            "ASYMGEM0L2RAM",
            {
                comment: "1536K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00180000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM1L2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM2L2RAM",
            {
                comment: "512K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SYMGEML2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320C6474.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6474.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6474.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6474.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2RAM"
        }
    ]
];
config TMS320C6474.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6474.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6474.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6474.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config TMS320C6474.memBlock // module-wide
index URL
Configuration settings
TMS320C6474.memBlock = IPlatform.Memory[string] [
    [
        "ASYMGEM0L2RAM",
        {
            comment: "1536K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00180000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM1L2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM2L2RAM",
        {
            comment: "512K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SYMGEML2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6474.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6474.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6474.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6474.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6474.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6474.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6474.Params;
...
params.dataWordSize = Int 4;
config TMS320C6474.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6474.Params;
...
params.deviceHeader = String undefined;
config TMS320C6474.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6474.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6474.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6474.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6474.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6474.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6474.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6474.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6474.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6474.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6474.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6474.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6654

metaonly module ti.catalog.c6000.TMS320C6654
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6654.xdc
var TMS320C6654 = xdc.useModule('ti.catalog.c6000.TMS320C6654');
module-wide config parameters
    const TMS320C6654.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6654.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6654.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6654.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6654.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6654.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6654.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6654.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6654.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6654.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6654.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6654.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6654.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6654.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6654.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6654.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6654.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6654.Params;
...
params.dataWordSize = Int 4;
config TMS320C6654.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6654.Params;
...
params.deviceHeader = String undefined;
config TMS320C6654.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6654.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6654.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6654.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6654.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6654.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6654.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6654.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6654.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6654.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6654.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6654.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:37 GMT


module ti.catalog.c6000.TMS320C6655

metaonly module ti.catalog.c6000.TMS320C6655
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6655.xdc
var TMS320C6655 = xdc.useModule('ti.catalog.c6000.TMS320C6655');
module-wide config parameters
    const TMS320C6655.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6655.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6655.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6655.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "1MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6655.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6655.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6655.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6655.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6655.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6655.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6655.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6655.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "1MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6655.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6655.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6655.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6655.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6655.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6655.Params;
...
params.dataWordSize = Int 4;
config TMS320C6655.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6655.Params;
...
params.deviceHeader = String undefined;
config TMS320C6655.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6655.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "1MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6655.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6655.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6655.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6655.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6655.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6655.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6655.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6655.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6655.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6655.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:38 GMT


module ti.catalog.c6000.TMS320C6657

metaonly module ti.catalog.c6000.TMS320C6657
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6657.xdc
var TMS320C6657 = xdc.useModule('ti.catalog.c6000.TMS320C6657');
module-wide config parameters
    const TMS320C6657.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6657.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6657.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6657.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "1MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6657.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6657.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6657.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6657.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6657.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6657.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6657.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6657.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "1MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6657.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6657.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6657.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6657.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6657.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6657.Params;
...
params.dataWordSize = Int 4;
config TMS320C6657.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6657.Params;
...
params.deviceHeader = String undefined;
config TMS320C6657.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6657.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "1MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6657.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6657.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6657.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6657.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6657.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6657.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6657.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6657.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6657.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6657.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:38 GMT


module ti.catalog.c6000.TMS320C6670

metaonly module ti.catalog.c6000.TMS320C6670
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6670.xdc
var TMS320C6670 = xdc.useModule('ti.catalog.c6000.TMS320C6670');
module-wide config parameters
    const TMS320C6670.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6670.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6670.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6670.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6670.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6670.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6670.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6670.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6670.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6670.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6670.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6670.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6670.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6670.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6670.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6670.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6670.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6670.Params;
...
params.dataWordSize = Int 4;
config TMS320C6670.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6670.Params;
...
params.deviceHeader = String undefined;
config TMS320C6670.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6670.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6670.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6670.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6670.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6670.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6670.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6670.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6670.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6670.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6670.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6670.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:38 GMT


module ti.catalog.c6000.TMS320C6671

metaonly module ti.catalog.c6000.TMS320C6671
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6671.xdc
var TMS320C6671 = xdc.useModule('ti.catalog.c6000.TMS320C6671');
module-wide config parameters
    const TMS320C6671.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6671.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6671.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6671.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "512KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "4MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00400000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6671.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6671.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6671.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6671.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6671.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6671.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6671.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6671.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "4MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00400000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6671.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6671.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6671.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6671.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6671.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6671.Params;
...
params.dataWordSize = Int 4;
config TMS320C6671.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6671.Params;
...
params.deviceHeader = String undefined;
config TMS320C6671.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6671.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "4MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00400000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6671.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6671.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6671.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6671.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6671.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6671.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6671.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6671.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6671.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6671.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:38 GMT


module ti.catalog.c6000.TMS320C6672

metaonly module ti.catalog.c6000.TMS320C6672
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6672.xdc
var TMS320C6672 = xdc.useModule('ti.catalog.c6000.TMS320C6672');
module-wide config parameters
    const TMS320C6672.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6672.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6672.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6672.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "512KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "4MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00400000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6672.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6672.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6672.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6672.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6672.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6672.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6672.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6672.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "4MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00400000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6672.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6672.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6672.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6672.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6672.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6672.Params;
...
params.dataWordSize = Int 4;
config TMS320C6672.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6672.Params;
...
params.deviceHeader = String undefined;
config TMS320C6672.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6672.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "4MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00400000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6672.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6672.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6672.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6672.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6672.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6672.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6672.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6672.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6672.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6672.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:38 GMT


module ti.catalog.c6000.TMS320C6674

metaonly module ti.catalog.c6000.TMS320C6674
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6674.xdc
var TMS320C6674 = xdc.useModule('ti.catalog.c6000.TMS320C6674');
module-wide config parameters
    const TMS320C6674.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6674.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6674.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6674.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "512KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "4MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00400000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6674.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6674.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6674.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6674.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6674.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6674.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6674.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6674.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "4MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00400000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6674.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6674.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6674.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6674.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6674.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6674.Params;
...
params.dataWordSize = Int 4;
config TMS320C6674.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6674.Params;
...
params.deviceHeader = String undefined;
config TMS320C6674.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6674.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "4MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00400000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6674.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6674.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6674.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6674.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6674.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6674.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6674.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6674.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6674.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6674.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:38 GMT


module ti.catalog.c6000.TMS320C6678

metaonly module ti.catalog.c6000.TMS320C6678
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6678.xdc
var TMS320C6678 = xdc.useModule('ti.catalog.c6000.TMS320C6678');
module-wide config parameters
    const TMS320C6678.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C6678.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6678.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6678.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "512KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "4MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00400000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6678.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6678.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6678.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C6678.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6678.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6678.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6678.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6678.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "4MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00400000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6678.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6678.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6678.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6678.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6678.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6678.Params;
...
params.dataWordSize = Int 4;
config TMS320C6678.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6678.Params;
...
params.deviceHeader = String undefined;
config TMS320C6678.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6678.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "4MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00400000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6678.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6678.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6678.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6678.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6678.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6678.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6678.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6678.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6678.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6678.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:38 GMT


module ti.catalog.c6000.TMS320C66AK2E02

metaonly module ti.catalog.c6000.TMS320C66AK2E02
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C66AK2E02.xdc
var TMS320C66AK2E02 = xdc.useModule('ti.catalog.c6000.TMS320C66AK2E02');
module-wide config parameters
    const TMS320C66AK2E02.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C66AK2E02.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C66AK2E02.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
per-instance config parameters
    var params = new TMS320C66AK2E02.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "512KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C66AK2E02.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C66AK2E02.cacheMap // module-wide
index URL
Configuration settings
const TMS320C66AK2E02.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C66AK2E02.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C66AK2E02.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C66AK2E02.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C66AK2E02.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C66AK2E02.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C66AK2E02.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C66AK2E02.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C66AK2E02.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.dataWordSize = Int 4;
config TMS320C66AK2E02.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.deviceHeader = String undefined;
config TMS320C66AK2E02.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C66AK2E02.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C66AK2E02.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C66AK2E02.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C66AK2E02.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C66AK2E02.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C66AK2E02.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C66AK2E02.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C66AK2E02.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C66AK2E05

metaonly module ti.catalog.c6000.TMS320C66AK2E05
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C66AK2E05.xdc
var TMS320C66AK2E05 = xdc.useModule('ti.catalog.c6000.TMS320C66AK2E05');
module-wide config parameters
    const TMS320C66AK2E05.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C66AK2E05.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C66AK2E05.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
per-instance config parameters
    var params = new TMS320C66AK2E05.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "512KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C66AK2E05.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C66AK2E05.cacheMap // module-wide
index URL
Configuration settings
const TMS320C66AK2E05.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C66AK2E05.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C66AK2E05.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C66AK2E05.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C66AK2E05.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C66AK2E05.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C66AK2E05.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C66AK2E05.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C66AK2E05.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.dataWordSize = Int 4;
config TMS320C66AK2E05.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.deviceHeader = String undefined;
config TMS320C66AK2E05.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C66AK2E05.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C66AK2E05.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C66AK2E05.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C66AK2E05.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C66AK2E05.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C66AK2E05.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C66AK2E05.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C66AK2E05.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C66AK2H06

metaonly module ti.catalog.c6000.TMS320C66AK2H06
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C66AK2H06.xdc
var TMS320C66AK2H06 = xdc.useModule('ti.catalog.c6000.TMS320C66AK2H06');
module-wide config parameters
    const TMS320C66AK2H06.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C66AK2H06.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C66AK2H06.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320C66AK2H06.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "6MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00600000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C66AK2H06.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C66AK2H06.cacheMap // module-wide
index URL
Configuration settings
const TMS320C66AK2H06.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C66AK2H06.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C66AK2H06.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C66AK2H06.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C66AK2H06.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C66AK2H06.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "6MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00600000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C66AK2H06.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C66AK2H06.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C66AK2H06.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.dataWordSize = Int 4;
config TMS320C66AK2H06.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.deviceHeader = String undefined;
config TMS320C66AK2H06.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "6MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00600000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C66AK2H06.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C66AK2H06.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C66AK2H06.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C66AK2H06.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C66AK2H06.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C66AK2H06.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C66AK2H06.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C66AK2H06.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C66AK2H12

metaonly module ti.catalog.c6000.TMS320C66AK2H12
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C66AK2H12.xdc
var TMS320C66AK2H12 = xdc.useModule('ti.catalog.c6000.TMS320C66AK2H12');
module-wide config parameters
    const TMS320C66AK2H12.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320C66AK2H12.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C66AK2H12.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320C66AK2H12.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "6MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00600000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C66AK2H12.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C66AK2H12.cacheMap // module-wide
index URL
Configuration settings
const TMS320C66AK2H12.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320C66AK2H12.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C66AK2H12.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C66AK2H12.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C66AK2H12.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C66AK2H12.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "6MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00600000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C66AK2H12.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C66AK2H12.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C66AK2H12.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.dataWordSize = Int 4;
config TMS320C66AK2H12.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.deviceHeader = String undefined;
config TMS320C66AK2H12.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "6MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00600000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C66AK2H12.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C66AK2H12.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C66AK2H12.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C66AK2H12.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C66AK2H12.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C66AK2H12.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C66AK2H12.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C66AK2H12.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6701

metaonly module ti.catalog.c6000.TMS320C6701
index URL

The C6701 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6701.xdc
var TMS320C6701 = xdc.useModule('ti.catalog.c6000.TMS320C6701');
module-wide config parameters
     TMS320C6701.memBlock// = IPlatform.Memory[string] [
        [
            "IPRAM0",
            {
                comment: "Internal Program memory map 0",
                name: "IPRAM",
                base: 0x1400000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IPRAM1",
            {
                comment: "Internal Program memory map 1",
                name: "IPRAM",
                base: 0x0000000,
                len: 0x0010000,
                space: "code"
            }
        ],
        [
            "IDRAM",
            {
                comment: "Internal Data memory",
                name: "IDRAM",
                base: 0x80000000,
                len: 0x00010000,
                space: "data"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320C6701.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6700";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6701.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6701.memBlock // module-wide
index URL
Configuration settings
TMS320C6701.memBlock = IPlatform.Memory[string] [
    [
        "IPRAM0",
        {
            comment: "Internal Program memory map 0",
            name: "IPRAM",
            base: 0x1400000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IPRAM1",
        {
            comment: "Internal Program memory map 1",
            name: "IPRAM",
            base: 0x0000000,
            len: 0x0010000,
            space: "code"
        }
    ],
    [
        "IDRAM",
        {
            comment: "Internal Data memory",
            name: "IDRAM",
            base: 0x80000000,
            len: 0x00010000,
            space: "data"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6701.Params;
// Instance config-params object
    params.cpuCore = String "6700";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] undefined;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6701.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6701.Params;
...
params.cpuCore = String "6700";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6701.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6701.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6701.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6701.Params;
...
params.dataWordSize = Int 4;
config TMS320C6701.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6701.Params;
...
params.deviceHeader = String undefined;
config TMS320C6701.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6701.Params;
...
params.memMap = IPlatform.Memory[string] undefined;
config TMS320C6701.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6701.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6701.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6701.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6701.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6701.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6701.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6701.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6701.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6701.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6711

metaonly module ti.catalog.c6000.TMS320C6711
index URL

The C6711B device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6711.xdc
var TMS320C6711 = xdc.useModule('ti.catalog.c6000.TMS320C6711');
module-wide config parameters
    const TMS320C6711.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "SRAM",
                        0x0000
                    ],
                    [
                        "1-way cache",
                        0x4000
                    ],
                    [
                        "2-way cache",
                        0x8000
                    ],
                    [
                        "3-way cache",
                        0xc000
                    ],
                    [
                        "4-way cache",
                        0x10000
                    ]
                ],
                defaultValue: "4-way cache",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6711.cacheSize// = Long[string] [
        [
            "SRAM",
            0x0000
        ],
        [
            "1-way cache",
            0x4000
        ],
        [
            "2-way cache",
            0x8000
        ],
        [
            "3-way cache",
            0xc000
        ],
        [
            "4-way cache",
            0x10000
        ],
        [
            "0k",
            0x0000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ],
        [
            "48k",
            0xc000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6711.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6700";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] TMS320C6211.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6711.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6711.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6711.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "SRAM",
                    0x0000
                ],
                [
                    "1-way cache",
                    0x4000
                ],
                [
                    "2-way cache",
                    0x8000
                ],
                [
                    "3-way cache",
                    0xc000
                ],
                [
                    "4-way cache",
                    0x10000
                ]
            ],
            defaultValue: "4-way cache",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6711.cacheSize // module-wide
index URL
Configuration settings
TMS320C6711.cacheSize = Long[string] [
    [
        "SRAM",
        0x0000
    ],
    [
        "1-way cache",
        0x4000
    ],
    [
        "2-way cache",
        0x8000
    ],
    [
        "3-way cache",
        0xc000
    ],
    [
        "4-way cache",
        0x10000
    ],
    [
        "0k",
        0x0000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ],
    [
        "48k",
        0xc000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6711.Params;
// Instance config-params object
    params.cpuCore = String "6700";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6711.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6711.Params;
...
params.cpuCore = String "6700";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6711.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6711.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6711.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6711.Params;
...
params.dataWordSize = Int 4;
config TMS320C6711.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6711.Params;
...
params.deviceHeader = String undefined;
config TMS320C6711.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6711.Params;
...
params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
config TMS320C6711.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6711.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6711.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6711.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6711.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6711.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6711.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6711.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6711.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6711.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6711B

metaonly module ti.catalog.c6000.TMS320C6711B
index URL

The C6711B device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6711B.xdc
var TMS320C6711B = xdc.useModule('ti.catalog.c6000.TMS320C6711B');
module-wide config parameters
    const TMS320C6711B.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "SRAM",
                        0x0000
                    ],
                    [
                        "1-way cache",
                        0x4000
                    ],
                    [
                        "2-way cache",
                        0x8000
                    ],
                    [
                        "3-way cache",
                        0xc000
                    ],
                    [
                        "4-way cache",
                        0x10000
                    ]
                ],
                defaultValue: "4-way cache",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6711B.cacheSize// = Long[string] [
        [
            "SRAM",
            0x0000
        ],
        [
            "1-way cache",
            0x4000
        ],
        [
            "2-way cache",
            0x8000
        ],
        [
            "3-way cache",
            0xc000
        ],
        [
            "4-way cache",
            0x10000
        ],
        [
            "0k",
            0x0000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ],
        [
            "48k",
            0xc000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6711B.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6700";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] TMS320C6211.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6711B.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6711B.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6711B.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "SRAM",
                    0x0000
                ],
                [
                    "1-way cache",
                    0x4000
                ],
                [
                    "2-way cache",
                    0x8000
                ],
                [
                    "3-way cache",
                    0xc000
                ],
                [
                    "4-way cache",
                    0x10000
                ]
            ],
            defaultValue: "4-way cache",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6711B.cacheSize // module-wide
index URL
Configuration settings
TMS320C6711B.cacheSize = Long[string] [
    [
        "SRAM",
        0x0000
    ],
    [
        "1-way cache",
        0x4000
    ],
    [
        "2-way cache",
        0x8000
    ],
    [
        "3-way cache",
        0xc000
    ],
    [
        "4-way cache",
        0x10000
    ],
    [
        "0k",
        0x0000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ],
    [
        "48k",
        0xc000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6711B.Params;
// Instance config-params object
    params.cpuCore = String "6700";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6711B.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6711B.Params;
...
params.cpuCore = String "6700";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6711B.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6711B.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6711B.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6711B.Params;
...
params.dataWordSize = Int 4;
config TMS320C6711B.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6711B.Params;
...
params.deviceHeader = String undefined;
config TMS320C6711B.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6711B.Params;
...
params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
config TMS320C6711B.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6711B.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6711B.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6711B.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6711B.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6711B.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6711B.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6711B.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6711B.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6711B.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6712

metaonly module ti.catalog.c6000.TMS320C6712
index URL

The C6712 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6712.xdc
var TMS320C6712 = xdc.useModule('ti.catalog.c6000.TMS320C6712');
module-wide config parameters
    const TMS320C6712.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "SRAM",
                        0x0000
                    ],
                    [
                        "1-way cache",
                        0x4000
                    ],
                    [
                        "2-way cache",
                        0x8000
                    ],
                    [
                        "3-way cache",
                        0xc000
                    ],
                    [
                        "4-way cache",
                        0x10000
                    ]
                ],
                defaultValue: "4-way cache",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6712.cacheSize// = Long[string] [
        [
            "SRAM",
            0x0000
        ],
        [
            "1-way cache",
            0x4000
        ],
        [
            "2-way cache",
            0x8000
        ],
        [
            "3-way cache",
            0xc000
        ],
        [
            "4-way cache",
            0x10000
        ],
        [
            "0k",
            0x0000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ],
        [
            "48k",
            0xc000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6712.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6700";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] TMS320C6211.memMap;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6712.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6712.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6712.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "SRAM",
                    0x0000
                ],
                [
                    "1-way cache",
                    0x4000
                ],
                [
                    "2-way cache",
                    0x8000
                ],
                [
                    "3-way cache",
                    0xc000
                ],
                [
                    "4-way cache",
                    0x10000
                ]
            ],
            defaultValue: "4-way cache",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6712.cacheSize // module-wide
index URL
Configuration settings
TMS320C6712.cacheSize = Long[string] [
    [
        "SRAM",
        0x0000
    ],
    [
        "1-way cache",
        0x4000
    ],
    [
        "2-way cache",
        0x8000
    ],
    [
        "3-way cache",
        0xc000
    ],
    [
        "4-way cache",
        0x10000
    ],
    [
        "0k",
        0x0000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ],
    [
        "48k",
        0xc000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6712.Params;
// Instance config-params object
    params.cpuCore = String "6700";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
    // The default memory map for this device
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6712.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6712.Params;
...
params.cpuCore = String "6700";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6712.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6712.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6712.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6712.Params;
...
params.dataWordSize = Int 4;
config TMS320C6712.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6712.Params;
...
params.deviceHeader = String undefined;
config TMS320C6712.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6712.Params;
...
params.memMap = IPlatform.Memory[string] TMS320C6211.memMap;
config TMS320C6712.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6712.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6712.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6712.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6712.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6712.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6712.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6712.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6712.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6712.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6713

metaonly module ti.catalog.c6000.TMS320C6713
index URL

The C6713 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6713.xdc
var TMS320C6713 = xdc.useModule('ti.catalog.c6000.TMS320C6713');
module-wide config parameters
    const TMS320C6713.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "SRAM",
                        0x0000
                    ],
                    [
                        "1-way cache",
                        0x4000
                    ],
                    [
                        "2-way cache",
                        0x8000
                    ],
                    [
                        "3-way cache",
                        0xc000
                    ],
                    [
                        "4-way cache",
                        0x10000
                    ]
                ],
                defaultValue: "4-way cache",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6713.cacheSize// = Long[string] [
        [
            "SRAM",
            0x0000
        ],
        [
            "1-way cache",
            0x4000
        ],
        [
            "2-way cache",
            0x8000
        ],
        [
            "3-way cache",
            0xc000
        ],
        [
            "4-way cache",
            0x10000
        ],
        [
            "0k",
            0x0000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ],
        [
            "48k",
            0xc000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6713.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6700";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x0,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6713.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6713.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6713.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "SRAM",
                    0x0000
                ],
                [
                    "1-way cache",
                    0x4000
                ],
                [
                    "2-way cache",
                    0x8000
                ],
                [
                    "3-way cache",
                    0xc000
                ],
                [
                    "4-way cache",
                    0x10000
                ]
            ],
            defaultValue: "4-way cache",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6713.cacheSize // module-wide
index URL
Configuration settings
TMS320C6713.cacheSize = Long[string] [
    [
        "SRAM",
        0x0000
    ],
    [
        "1-way cache",
        0x4000
    ],
    [
        "2-way cache",
        0x8000
    ],
    [
        "3-way cache",
        0xc000
    ],
    [
        "4-way cache",
        0x10000
    ],
    [
        "0k",
        0x0000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ],
    [
        "48k",
        0xc000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6713.Params;
// Instance config-params object
    params.cpuCore = String "6700";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x0,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6713.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6713.Params;
...
params.cpuCore = String "6700";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6713.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6713.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6713.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6713.Params;
...
params.dataWordSize = Int 4;
config TMS320C6713.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6713.Params;
...
params.deviceHeader = String undefined;
config TMS320C6713.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320C6713.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x0,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6713.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6713.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6713.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6713.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6713.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6713.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6713.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6713.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6713.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6713.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6722

metaonly module ti.catalog.c6000.TMS320C6722
index URL

The C6722 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6722.xdc
var TMS320C6722 = xdc.useModule('ti.catalog.c6000.TMS320C6722');
per-instance config parameters
    var params = new TMS320C6722.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6722.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6722.Params;
// Instance config-params object
    params.cpuCore = String "67x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6722.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6722.Params;
...
params.cpuCore = String "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6722.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6722.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6722.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6722.Params;
...
params.dataWordSize = Int 4;
config TMS320C6722.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6722.Params;
...
params.deviceHeader = String undefined;
config TMS320C6722.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6722.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6722.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6722.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6722.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6722.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6722.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6722.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6722.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6722.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6722.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6722.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6726

metaonly module ti.catalog.c6000.TMS320C6726
index URL

The C6726 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6726.xdc
var TMS320C6726 = xdc.useModule('ti.catalog.c6000.TMS320C6726');
per-instance config parameters
    var params = new TMS320C6726.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6726.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6726.Params;
// Instance config-params object
    params.cpuCore = String "67x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6726.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6726.Params;
...
params.cpuCore = String "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6726.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6726.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6726.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6726.Params;
...
params.dataWordSize = Int 4;
config TMS320C6726.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6726.Params;
...
params.deviceHeader = String undefined;
config TMS320C6726.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6726.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6726.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6726.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6726.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6726.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6726.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6726.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6726.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6726.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6726.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6726.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6727

metaonly module ti.catalog.c6000.TMS320C6727
index URL

The C6727 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6727.xdc
var TMS320C6727 = xdc.useModule('ti.catalog.c6000.TMS320C6727');
per-instance config parameters
    var params = new TMS320C6727.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6727.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6727.Params;
// Instance config-params object
    params.cpuCore = String "67x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6727.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6727.Params;
...
params.cpuCore = String "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6727.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6727.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6727.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6727.Params;
...
params.dataWordSize = Int 4;
config TMS320C6727.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6727.Params;
...
params.deviceHeader = String undefined;
config TMS320C6727.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6727.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6727.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6727.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6727.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6727.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6727.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6727.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6727.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6727.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6727.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6727.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:39 GMT


module ti.catalog.c6000.TMS320C6742

metaonly module ti.catalog.c6000.TMS320C6742
index URL

The C6742 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6742.xdc
var TMS320C6742 = xdc.useModule('ti.catalog.c6000.TMS320C6742');
module-wide config parameters
    const TMS320C6742.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6742.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6742.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6742.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "L2ROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6742.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6742.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6742.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6742.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6742.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6742.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6742.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6742.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "L2ROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6742.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6742.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6742.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6742.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6742.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6742.Params;
...
params.dataWordSize = Int 4;
config TMS320C6742.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6742.Params;
...
params.deviceHeader = String undefined;
config TMS320C6742.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6742.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2ROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6742.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6742.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6742.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6742.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6742.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6742.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6742.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6742.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6742.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6742.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320C6743

metaonly module ti.catalog.c6000.TMS320C6743
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6743.xdc
var TMS320C6743 = xdc.useModule('ti.catalog.c6000.TMS320C6743');
module-wide config parameters
    const TMS320C6743.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6743.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6743.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6743.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "L2ROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 128KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6743.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6743.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6743.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6743.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6743.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6743.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6743.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6743.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "L2ROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 128KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6743.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6743.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6743.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6743.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6743.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6743.Params;
...
params.dataWordSize = Int 4;
config TMS320C6743.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6743.Params;
...
params.deviceHeader = String undefined;
config TMS320C6743.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6743.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2ROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 128KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6743.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6743.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6743.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6743.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6743.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6743.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6743.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6743.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6743.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6743.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320C6745

metaonly module ti.catalog.c6000.TMS320C6745
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6745.xdc
var TMS320C6745 = xdc.useModule('ti.catalog.c6000.TMS320C6745');
module-wide config parameters
    const TMS320C6745.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6745.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6745.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6745.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "L2ROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6745.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6745.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6745.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6745.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6745.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6745.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6745.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6745.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "L2ROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6745.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6745.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6745.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6745.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6745.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6745.Params;
...
params.dataWordSize = Int 4;
config TMS320C6745.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6745.Params;
...
params.deviceHeader = String undefined;
config TMS320C6745.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6745.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2ROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320C6745.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6745.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6745.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6745.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6745.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6745.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6745.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6745.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6745.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6745.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320C6746

metaonly module ti.catalog.c6000.TMS320C6746
index URL

The C6746 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6746.xdc
var TMS320C6746 = xdc.useModule('ti.catalog.c6000.TMS320C6746');
module-wide config parameters
    const TMS320C6746.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6746.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6746.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6746.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6746.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6746.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6746.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6746.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6746.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6746.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6746.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6746.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6746.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6746.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6746.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6746.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6746.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6746.Params;
...
params.dataWordSize = Int 4;
config TMS320C6746.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6746.Params;
...
params.deviceHeader = String undefined;
config TMS320C6746.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6746.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6746.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6746.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6746.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6746.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6746.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6746.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6746.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6746.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6746.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6746.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320C6747

metaonly module ti.catalog.c6000.TMS320C6747
index URL

The C6747 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6747.xdc
var TMS320C6747 = xdc.useModule('ti.catalog.c6000.TMS320C6747');
module-wide config parameters
    const TMS320C6747.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6747.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6747.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6747.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6747.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6747.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6747.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6747.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6747.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6747.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6747.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6747.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6747.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6747.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6747.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6747.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6747.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6747.Params;
...
params.dataWordSize = Int 4;
config TMS320C6747.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6747.Params;
...
params.deviceHeader = String undefined;
config TMS320C6747.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6747.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6747.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6747.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6747.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6747.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6747.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6747.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6747.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6747.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6747.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6747.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320C6748

metaonly module ti.catalog.c6000.TMS320C6748
index URL

The C6748 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320C6748.xdc
var TMS320C6748 = xdc.useModule('ti.catalog.c6000.TMS320C6748');
module-wide config parameters
    const TMS320C6748.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6748.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6748.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6748.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6748.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6748.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6748.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6748.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6748.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6748.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6748.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6748.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6748.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6748.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6748.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6748.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6748.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6748.Params;
...
params.dataWordSize = Int 4;
config TMS320C6748.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6748.Params;
...
params.deviceHeader = String undefined;
config TMS320C6748.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6748.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6748.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6748.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6748.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6748.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6748.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6748.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6748.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6748.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6748.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6748.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320C6A8149

metaonly module ti.catalog.c6000.TMS320C6A8149
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6A8149.xdc
var TMS320C6A8149 = xdc.useModule('ti.catalog.c6000.TMS320C6A8149');
module-wide config parameters
    const TMS320C6A8149.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6A8149.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6A8149.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6A8149.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC",
                {
                    comment: "OCMC (On-chip RAM) (128KB)",
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6A8149.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6A8149.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6A8149.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6A8149.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6A8149.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6A8149.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6A8149.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC",
            {
                comment: "OCMC (On-chip RAM) (128KB)",
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6A8149.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6A8149.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6A8149.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.dataWordSize = Int 4;
config TMS320C6A8149.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.deviceHeader = String undefined;
config TMS320C6A8149.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320C6A8149.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320C6A8149.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6A8149.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC",
        {
            comment: "OCMC (On-chip RAM) (128KB)",
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6A8149.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6A8149.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6A8149.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6A8149.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6A8149.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6A8149.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6A8149.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6A8149.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320C6A8168

metaonly module ti.catalog.c6000.TMS320C6A8168
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320C6A8168.xdc
var TMS320C6A8168 = xdc.useModule('ti.catalog.c6000.TMS320C6A8168');
module-wide config parameters
    const TMS320C6A8168.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x00000
                    ],
                    [
                        "32k",
                        0x08000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320C6A8168.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320C6A8168.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320C6A8168.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC_0",
                {
                    comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320C6A8168.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320C6A8168.cacheMap // module-wide
index URL
Configuration settings
const TMS320C6A8168.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x00000
                ],
                [
                    "32k",
                    0x08000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320C6A8168.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320C6A8168.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320C6A8168.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320C6A8168.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320C6A8168.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_0",
            {
                comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320C6A8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320C6A8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320C6A8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.dataWordSize = Int 4;
config TMS320C6A8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.deviceHeader = String undefined;
config TMS320C6A8168.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320C6A8168.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320C6A8168.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_0",
        {
            comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320C6A8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.minDataUnitSize = Int 1;
config TMS320C6A8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.minProgUnitSize = Int 1;
config TMS320C6A8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320C6A8168.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320C6A8168.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320C6A8168.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320C6A8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320C6A8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320CDA700

metaonly module ti.catalog.c6000.TMS320CDA700
index URL

The C67P device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDA700.xdc
var TMS320CDA700 = xdc.useModule('ti.catalog.c6000.TMS320CDA700');
per-instance config parameters
    var params = new TMS320CDA700.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDA700.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDA700.Params;
// Instance config-params object
    params.cpuCore = String "67x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDA700.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDA700.Params;
...
params.cpuCore = String "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDA700.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDA700.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDA700.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDA700.Params;
...
params.dataWordSize = Int 4;
config TMS320CDA700.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDA700.Params;
...
params.deviceHeader = String undefined;
config TMS320CDA700.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CDA700.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDA700.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA700.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDA700.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA700.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDA700.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDA700.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDA700.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDA700.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDA700.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDA700.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320CDA700SIM

metaonly module ti.catalog.c6000.TMS320CDA700SIM
index URL

The C67P device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDA700SIM.xdc
var TMS320CDA700SIM = xdc.useModule('ti.catalog.c6000.TMS320CDA700SIM');
per-instance config parameters
    var params = new TMS320CDA700SIM.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+SIM";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDA700SIM.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDA700SIM.Params;
// Instance config-params object
    params.cpuCore = String "67x+SIM";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDA700SIM.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.cpuCore = String "67x+SIM";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDA700SIM.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDA700SIM.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.dataWordSize = Int 4;
config TMS320CDA700SIM.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.deviceHeader = String undefined;
config TMS320CDA700SIM.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDA700SIM.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDA700SIM.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDA700SIM.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDA700SIM.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDA700SIM.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDA700SIM.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDA700SIM.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDA700SIM.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320CDA705

metaonly module ti.catalog.c6000.TMS320CDA705
index URL

The DA705 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDA705.xdc
var TMS320CDA705 = xdc.useModule('ti.catalog.c6000.TMS320CDA705');
per-instance config parameters
    var params = new TMS320CDA705.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDA705.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDA705.Params;
// Instance config-params object
    params.cpuCore = String "67x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDA705.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDA705.Params;
...
params.cpuCore = String "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDA705.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDA705.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDA705.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDA705.Params;
...
params.dataWordSize = Int 4;
config TMS320CDA705.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDA705.Params;
...
params.deviceHeader = String undefined;
config TMS320CDA705.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CDA705.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDA705.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA705.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDA705.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA705.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDA705.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDA705.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDA705.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDA705.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDA705.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDA705.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:40 GMT


module ti.catalog.c6000.TMS320CDA707

metaonly module ti.catalog.c6000.TMS320CDA707
index URL

The DA707 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDA707.xdc
var TMS320CDA707 = xdc.useModule('ti.catalog.c6000.TMS320CDA707');
per-instance config parameters
    var params = new TMS320CDA707.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDA707.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDA707.Params;
// Instance config-params object
    params.cpuCore = String "67x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDA707.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDA707.Params;
...
params.cpuCore = String "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDA707.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDA707.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDA707.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDA707.Params;
...
params.dataWordSize = Int 4;
config TMS320CDA707.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDA707.Params;
...
params.deviceHeader = String undefined;
config TMS320CDA707.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CDA707.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDA707.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA707.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDA707.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA707.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDA707.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDA707.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDA707.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDA707.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDA707.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDA707.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDA710

metaonly module ti.catalog.c6000.TMS320CDA710
index URL

The DA710 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDA710.xdc
var TMS320CDA710 = xdc.useModule('ti.catalog.c6000.TMS320CDA710');
per-instance config parameters
    var params = new TMS320CDA710.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "67x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal memory",
                    base: 0x10000000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDA710.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDA710.Params;
// Instance config-params object
    params.cpuCore = String "67x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal memory",
                base: 0x10000000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDA710.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDA710.Params;
...
params.cpuCore = String "67x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDA710.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDA710.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDA710.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDA710.Params;
...
params.dataWordSize = Int 4;
config TMS320CDA710.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDA710.Params;
...
params.deviceHeader = String undefined;
config TMS320CDA710.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CDA710.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal memory",
            base: 0x10000000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDA710.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA710.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDA710.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDA710.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDA710.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDA710.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDA710.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDA710.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDA710.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDA710.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM415

metaonly module ti.catalog.c6000.TMS320CDM415
index URL

The DM415 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM415.xdc
var TMS320CDM415 = xdc.useModule('ti.catalog.c6000.TMS320CDM415');
module-wide config parameters
    const TMS320CDM415.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM415.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM415.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM415.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM415.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM415.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM415.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM415.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM415.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM415.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM415.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM415.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM415.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM415.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM415.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM415.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM415.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM415.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM415.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM415.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM415.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM415.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM415.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM415.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM415.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM415.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM415.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM415.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM415.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM415.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM415.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM415.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM420

metaonly module ti.catalog.c6000.TMS320CDM420
index URL

The DM420 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM420.xdc
var TMS320CDM420 = xdc.useModule('ti.catalog.c6000.TMS320CDM420');
module-wide config parameters
    const TMS320CDM420.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM420.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM420.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM420.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM420.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM420.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM420.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM420.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM420.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM420.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM420.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM420.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM420.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM420.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM420.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM420.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM420.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM420.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM420.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM420.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM420.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM420.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM420.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM420.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM420.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM420.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM420.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM420.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM420.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM420.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM420.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM420.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM421

metaonly module ti.catalog.c6000.TMS320CDM421
index URL

The DM421 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM421.xdc
var TMS320CDM421 = xdc.useModule('ti.catalog.c6000.TMS320CDM421');
module-wide config parameters
    const TMS320CDM421.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM421.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM421.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM421.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM421.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM421.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM421.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM421.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM421.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM421.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM421.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM421.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM421.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM421.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM421.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM421.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM421.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM421.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM421.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM421.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM421.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM421.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM421.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM421.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM421.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM421.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM421.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM421.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM421.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM421.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM421.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM421.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM425

metaonly module ti.catalog.c6000.TMS320CDM425
index URL

The DM425 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM425.xdc
var TMS320CDM425 = xdc.useModule('ti.catalog.c6000.TMS320CDM425');
module-wide config parameters
    const TMS320CDM425.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM425.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM425.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM425.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM425.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM425.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM425.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM425.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM425.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM425.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM425.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM425.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM425.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM425.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM425.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM425.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM425.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM425.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM425.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM425.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM425.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM425.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM425.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM425.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM425.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM425.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM425.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM425.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM425.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM425.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM425.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM425.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM426

metaonly module ti.catalog.c6000.TMS320CDM426
index URL

The DM426 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM426.xdc
var TMS320CDM426 = xdc.useModule('ti.catalog.c6000.TMS320CDM426');
module-wide config parameters
    const TMS320CDM426.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM426.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM426.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM426.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM426.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM426.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM426.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM426.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM426.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM426.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM426.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM426.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM426.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM426.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM426.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM426.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM426.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM426.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM426.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM426.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM426.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM426.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM426.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM426.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM426.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM426.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM426.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM426.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM426.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM426.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM426.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM426.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM640

metaonly module ti.catalog.c6000.TMS320CDM640
index URL

The DM640 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM640.xdc
var TMS320CDM640 = xdc.useModule('ti.catalog.c6000.TMS320CDM640');
module-wide config parameters
    const TMS320CDM640.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM640.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM640.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x20000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM640.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM640.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM640.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM640.cacheSize // module-wide
index URL
Configuration settings
TMS320CDM640.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM640.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM640.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM640.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM640.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM640.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM640.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM640.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM640.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM640.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM640.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM640.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDM640.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM640.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM640.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM640.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM640.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM640.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM640.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM640.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM640.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM640.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM641

metaonly module ti.catalog.c6000.TMS320CDM641
index URL

The DM641 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM641.xdc
var TMS320CDM641 = xdc.useModule('ti.catalog.c6000.TMS320CDM641');
module-wide config parameters
    const TMS320CDM641.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM641.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM641.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x20000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM641.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM641.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM641.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM641.cacheSize // module-wide
index URL
Configuration settings
TMS320CDM641.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM641.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM641.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM641.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM641.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM641.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM641.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM641.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM641.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM641.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM641.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM641.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDM641.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM641.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM641.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM641.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM641.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM641.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM641.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM641.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM641.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM641.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM642

metaonly module ti.catalog.c6000.TMS320CDM642
index URL

The DM642 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM642.xdc
var TMS320CDM642 = xdc.useModule('ti.catalog.c6000.TMS320CDM642');
module-wide config parameters
    const TMS320CDM642.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM642.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM642.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM642.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM642.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM642.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM642.cacheSize // module-wide
index URL
Configuration settings
TMS320CDM642.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM642.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM642.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM642.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM642.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM642.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM642.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM642.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM642.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM642.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM642.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM642.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDM642.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM642.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM642.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM642.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM642.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM642.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM642.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM642.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM642.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM642.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM6431

metaonly module ti.catalog.c6000.TMS320CDM6431
index URL

The DM6431 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6431.xdc
var TMS320CDM6431 = xdc.useModule('ti.catalog.c6000.TMS320CDM6431');
module-wide config parameters
    const TMS320CDM6431.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F10000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6431.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6431.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6431.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
                    name: "IRAM",
                    base: 0x10810000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F10000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6431.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6431.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6431.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F10000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6431.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6431.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6431.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6431.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6431.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
                name: "IRAM",
                base: 0x10810000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x10E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x10F10000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6431.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6431.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6431.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6431.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6431.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
            name: "IRAM",
            base: 0x10810000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x10E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x10F10000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6431.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6431.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6431.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6431.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6431.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6431.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6431.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6431.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:41 GMT


module ti.catalog.c6000.TMS320CDM6433

metaonly module ti.catalog.c6000.TMS320CDM6433
index URL

The DM6433 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6433.xdc
var TMS320CDM6433 = xdc.useModule('ti.catalog.c6000.TMS320CDM6433');
module-wide config parameters
    const TMS320CDM6433.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6433.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6433.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6433.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6433.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6433.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6433.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6433.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6433.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6433.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6433.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6433.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x10E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6433.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6433.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6433.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6433.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6433.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x10E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6433.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6433.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6433.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6433.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6433.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6433.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6433.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6433.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM6435

metaonly module ti.catalog.c6000.TMS320CDM6435
index URL

The DM6435 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6435.xdc
var TMS320CDM6435 = xdc.useModule('ti.catalog.c6000.TMS320CDM6435');
module-wide config parameters
    const TMS320CDM6435.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6435.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6435.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6435.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6435.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6435.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6435.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6435.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6435.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6435.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6435.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6435.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x10E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6435.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6435.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6435.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6435.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6435.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x10E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6435.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6435.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6435.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6435.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6435.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6435.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6435.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6435.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM6437

metaonly module ti.catalog.c6000.TMS320CDM6437
index URL

The DM6437 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6437.xdc
var TMS320CDM6437 = xdc.useModule('ti.catalog.c6000.TMS320CDM6437');
module-wide config parameters
    const TMS320CDM6437.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6437.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6437.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6437.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6437.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6437.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6437.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6437.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6437.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6437.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6437.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6437.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x10E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x10F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6437.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6437.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6437.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6437.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6437.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x10E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x10F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6437.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6437.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6437.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6437.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6437.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6437.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6437.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6437.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM6441

metaonly module ti.catalog.c6000.TMS320CDM6441
index URL

The DM6441 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6441.xdc
var TMS320CDM6441 = xdc.useModule('ti.catalog.c6000.TMS320CDM6441');
module-wide config parameters
    const TMS320CDM6441.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6441.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6441.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6441.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6441.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6441.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6441.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6441.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6441.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6441.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6441.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6441.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6441.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6441.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6441.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6441.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6441.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6441.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6441.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6441.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6441.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6441.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6441.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6441.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6441.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM6443

metaonly module ti.catalog.c6000.TMS320CDM6443
index URL

The DM6443 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6443.xdc
var TMS320CDM6443 = xdc.useModule('ti.catalog.c6000.TMS320CDM6443');
module-wide config parameters
    const TMS320CDM6443.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6443.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6443.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6443.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6443.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6443.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6443.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6443.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6443.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6443.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6443.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6443.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6443.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6443.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6443.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6443.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6443.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6443.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6443.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6443.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6443.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6443.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6443.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6443.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6443.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM6446

metaonly module ti.catalog.c6000.TMS320CDM6446
index URL

The DM6446 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6446.xdc
var TMS320CDM6446 = xdc.useModule('ti.catalog.c6000.TMS320CDM6446');
module-wide config parameters
    const TMS320CDM6446.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6446.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6446.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6446.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6446.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6446.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6446.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6446.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6446.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6446.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6446.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6446.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6446.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6446.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6446.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6446.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6446.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6446.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6446.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6446.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6446.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6446.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6446.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6446.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6446.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM6467

metaonly module ti.catalog.c6000.TMS320CDM6467
index URL

The DM6467 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM6467.xdc
var TMS320CDM6467 = xdc.useModule('ti.catalog.c6000.TMS320CDM6467');
module-wide config parameters
    const TMS320CDM6467.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11818000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM6467.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM6467.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM6467.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10010000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11818000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM6467.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM6467.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM6467.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11818000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM6467.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM6467.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM6467.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM6467.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM6467.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10010000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x11818000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM6467.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM6467.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM6467.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM6467.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM6467.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10010000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x11818000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM6467.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM6467.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM6467.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM6467.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM6467.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM6467.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM6467.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM6467.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM647

metaonly module ti.catalog.c6000.TMS320CDM647
index URL

The DM647 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM647.xdc
var TMS320CDM647 = xdc.useModule('ti.catalog.c6000.TMS320CDM647');
module-wide config parameters
    const TMS320CDM647.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0xA00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM647.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM647.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM647.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 RAM/CACHE",
                    name: "IRAM",
                    base: 0xA00000,
                    len: 0x040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM647.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM647.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM647.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0xA00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM647.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM647.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM647.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM647.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM647.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 RAM/CACHE",
                name: "IRAM",
                base: 0xA00000,
                len: 0x040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM647.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM647.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM647.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM647.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM647.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM647.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM647.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM647.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM647.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM647.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 RAM/CACHE",
            name: "IRAM",
            base: 0xA00000,
            len: 0x040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM647.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM647.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM647.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM647.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM647.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM647.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM647.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM647.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM647.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM647.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM648

metaonly module ti.catalog.c6000.TMS320CDM648
index URL

The DM648 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM648.xdc
var TMS320CDM648 = xdc.useModule('ti.catalog.c6000.TMS320CDM648');
module-wide config parameters
    const TMS320CDM648.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0xA00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM648.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM648.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM648.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 512KB L2 RAM/CACHE",
                    name: "IRAM",
                    base: 0xA00000,
                    len: 0x080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM648.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM648.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM648.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0xA00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM648.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM648.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM648.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM648.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM648.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 512KB L2 RAM/CACHE",
                name: "IRAM",
                base: 0xA00000,
                len: 0x080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM648.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM648.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM648.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM648.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM648.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM648.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM648.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM648.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM648.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDM648.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 512KB L2 RAM/CACHE",
            name: "IRAM",
            base: 0xA00000,
            len: 0x080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDM648.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM648.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM648.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM648.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM648.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM648.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM648.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM648.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM648.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM648.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:42 GMT


module ti.catalog.c6000.TMS320CDM730

metaonly module ti.catalog.c6000.TMS320CDM730
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM730.xdc
var TMS320CDM730 = xdc.useModule('ti.catalog.c6000.TMS320CDM730');
module-wide config parameters
    const TMS320CDM730.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x00000
                    ],
                    [
                        "32k",
                        0x08000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM730.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM730.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM730.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC_0",
                {
                    comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM730.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM730.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM730.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x00000
                ],
                [
                    "32k",
                    0x08000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM730.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM730.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM730.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM730.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM730.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_0",
            {
                comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM730.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM730.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM730.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM730.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM730.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM730.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM730.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM730.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM730.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320CDM730.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320CDM730.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320CDM730.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320CDM730.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320CDM730.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320CDM730.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CDM730.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_0",
        {
            comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDM730.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM730.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM730.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM730.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM730.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM730.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM730.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM730.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM730.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM730.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDM740

metaonly module ti.catalog.c6000.TMS320CDM740
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDM740.xdc
var TMS320CDM740 = xdc.useModule('ti.catalog.c6000.TMS320CDM740');
module-wide config parameters
    const TMS320CDM740.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x00000
                    ],
                    [
                        "32k",
                        0x08000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDM740.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDM740.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDM740.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC_0",
                {
                    comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDM740.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDM740.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDM740.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x00000
                ],
                [
                    "32k",
                    0x08000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDM740.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDM740.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDM740.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDM740.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDM740.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_0",
            {
                comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDM740.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDM740.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDM740.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDM740.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDM740.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDM740.Params;
...
params.dataWordSize = Int 4;
config TMS320CDM740.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDM740.Params;
...
params.deviceHeader = String undefined;
config TMS320CDM740.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320CDM740.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320CDM740.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320CDM740.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320CDM740.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320CDM740.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320CDM740.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CDM740.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_0",
        {
            comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDM740.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM740.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDM740.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDM740.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDM740.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDM740.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDM740.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDM740.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDM740.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDM740.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA402

metaonly module ti.catalog.c6000.TMS320CDRA402
index URL

The DRA402 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA402.xdc
var TMS320CDRA402 = xdc.useModule('ti.catalog.c6000.TMS320CDRA402');
module-wide config parameters
    const TMS320CDRA402.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ]
                ],
                defaultValue: "16k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA402.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA402.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA402.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 192KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11810000,
                    len: 0x00030000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 16KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00004000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA402.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA402.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA402.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ]
            ],
            defaultValue: "16k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA402.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA402.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA402.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA402.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA402.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 192KB UMAP0 memory",
                name: "IRAM",
                base: 0x11810000,
                len: 0x00030000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 16KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA402.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA402.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA402.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA402.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA402.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 192KB UMAP0 memory",
            name: "IRAM",
            base: 0x11810000,
            len: 0x00030000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 16KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA402.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA402.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA402.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA402.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA402.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA402.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA402.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA402.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA404

metaonly module ti.catalog.c6000.TMS320CDRA404
index URL

The DRA404 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA404.xdc
var TMS320CDRA404 = xdc.useModule('ti.catalog.c6000.TMS320CDRA404');
module-wide config parameters
    const TMS320CDRA404.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ]
                ],
                defaultValue: "16k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA404.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA404.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA404.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 192KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11810000,
                    len: 0x00030000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 16KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00004000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA404.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA404.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA404.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ]
            ],
            defaultValue: "16k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA404.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA404.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA404.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA404.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA404.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 192KB UMAP0 memory",
                name: "IRAM",
                base: 0x11810000,
                len: 0x00030000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 16KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA404.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA404.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA404.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA404.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA404.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 192KB UMAP0 memory",
            name: "IRAM",
            base: 0x11810000,
            len: 0x00030000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 16KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA404.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA404.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA404.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA404.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA404.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA404.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA404.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA404.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA406

metaonly module ti.catalog.c6000.TMS320CDRA406
index URL

The DRA406 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA406.xdc
var TMS320CDRA406 = xdc.useModule('ti.catalog.c6000.TMS320CDRA406');
module-wide config parameters
    const TMS320CDRA406.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ]
                ],
                defaultValue: "16k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA406.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA406.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA406.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 192KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11810000,
                    len: 0x00030000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 16KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00004000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA406.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA406.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA406.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ]
            ],
            defaultValue: "16k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA406.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA406.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA406.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA406.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA406.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 192KB UMAP0 memory",
                name: "IRAM",
                base: 0x11810000,
                len: 0x00030000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 16KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA406.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA406.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA406.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA406.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA406.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 192KB UMAP0 memory",
            name: "IRAM",
            base: 0x11810000,
            len: 0x00030000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 16KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA406.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA406.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA406.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA406.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA406.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA406.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA406.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA406.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA414

metaonly module ti.catalog.c6000.TMS320CDRA414
index URL

The DRA414 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA414.xdc
var TMS320CDRA414 = xdc.useModule('ti.catalog.c6000.TMS320CDRA414');
module-wide config parameters
    const TMS320CDRA414.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ]
                ],
                defaultValue: "16k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA414.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA414.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA414.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 192KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11810000,
                    len: 0x00030000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 16KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00004000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA414.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA414.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA414.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ]
            ],
            defaultValue: "16k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA414.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA414.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA414.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA414.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA414.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 192KB UMAP0 memory",
                name: "IRAM",
                base: 0x11810000,
                len: 0x00030000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 16KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA414.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA414.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA414.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA414.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA414.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 192KB UMAP0 memory",
            name: "IRAM",
            base: 0x11810000,
            len: 0x00030000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 16KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA414.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA414.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA414.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA414.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA414.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA414.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA414.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA414.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA416

metaonly module ti.catalog.c6000.TMS320CDRA416
index URL

The DRA416 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA416.xdc
var TMS320CDRA416 = xdc.useModule('ti.catalog.c6000.TMS320CDRA416');
module-wide config parameters
    const TMS320CDRA416.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ]
                ],
                defaultValue: "16k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11810000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA416.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA416.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA416.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 192KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11810000,
                    len: 0x00030000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 16KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00004000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA416.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA416.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA416.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ]
            ],
            defaultValue: "16k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11810000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA416.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA416.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA416.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA416.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA416.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 192KB UMAP0 memory",
                name: "IRAM",
                base: 0x11810000,
                len: 0x00030000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 16KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00004000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA416.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA416.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA416.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA416.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA416.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 192KB UMAP0 memory",
            name: "IRAM",
            base: 0x11810000,
            len: 0x00030000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 16KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00004000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA416.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA416.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA416.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA416.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA416.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA416.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA416.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA416.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA442

metaonly module ti.catalog.c6000.TMS320CDRA442
index URL

The DRA442 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA442.xdc
var TMS320CDRA442 = xdc.useModule('ti.catalog.c6000.TMS320CDRA442');
module-wide config parameters
    const TMS320CDRA442.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA442.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA442.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA442.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA442.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA442.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA442.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA442.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA442.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA442.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA442.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA442.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA442.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA442.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA442.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA442.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA442.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA442.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA442.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA442.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA442.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA442.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA442.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA442.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA442.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA444

metaonly module ti.catalog.c6000.TMS320CDRA444
index URL

The DRA444 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA444.xdc
var TMS320CDRA444 = xdc.useModule('ti.catalog.c6000.TMS320CDRA444');
module-wide config parameters
    const TMS320CDRA444.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA444.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA444.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA444.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA444.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA444.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA444.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA444.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA444.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA444.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA444.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA444.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA444.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA444.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA444.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA444.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA444.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA444.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA444.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA444.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA444.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA444.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA444.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA444.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA444.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:43 GMT


module ti.catalog.c6000.TMS320CDRA446

metaonly module ti.catalog.c6000.TMS320CDRA446
index URL

The DRA446 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA446.xdc
var TMS320CDRA446 = xdc.useModule('ti.catalog.c6000.TMS320CDRA446');
module-wide config parameters
    const TMS320CDRA446.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA446.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA446.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA446.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA446.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA446.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA446.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA446.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA446.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA446.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA446.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA446.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA446.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA446.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA446.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA446.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA446.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA446.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA446.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA446.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA446.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA446.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA446.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA446.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA446.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CDRA447

metaonly module ti.catalog.c6000.TMS320CDRA447
index URL

The DRA447 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA447.xdc
var TMS320CDRA447 = xdc.useModule('ti.catalog.c6000.TMS320CDRA447');
module-wide config parameters
    const TMS320CDRA447.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA447.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA447.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA447.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA447.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA447.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA447.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA447.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA447.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA447.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA447.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA447.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA447.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA447.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA447.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA447.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA447.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA447.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA447.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA447.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA447.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA447.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA447.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA447.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA447.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CDRA457

metaonly module ti.catalog.c6000.TMS320CDRA457
index URL

The DRA457 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA457.xdc
var TMS320CDRA457 = xdc.useModule('ti.catalog.c6000.TMS320CDRA457');
module-wide config parameters
    const TMS320CDRA457.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA457.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA457.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA457.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA457.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA457.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA457.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA457.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA457.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA457.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA457.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA457.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA457.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA457.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA457.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA457.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA457.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA457.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA457.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA457.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA457.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA457.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA457.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA457.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA457.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CDRA459

metaonly module ti.catalog.c6000.TMS320CDRA459
index URL

The DRA459 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRA459.xdc
var TMS320CDRA459 = xdc.useModule('ti.catalog.c6000.TMS320CDRA459');
module-wide config parameters
    const TMS320CDRA459.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRA459.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CDRA459.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRA459.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 128KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRA459.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRA459.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRA459.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRA459.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CDRA459.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CDRA459.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CDRA459.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRA459.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 128KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRA459.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRA459.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRA459.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRA459.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRA459.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 128KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CDRA459.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRA459.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRA459.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRA459.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRA459.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRA459.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRA459.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRA459.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CDRI300

metaonly module ti.catalog.c6000.TMS320CDRI300
index URL

The DRI300 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CDRI300.xdc
var TMS320CDRI300 = xdc.useModule('ti.catalog.c6000.TMS320CDRI300');
module-wide config parameters
    const TMS320CDRI300.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                map: [
                    [
                        "4-way cache (0k)",
                        0x0000
                    ],
                    [
                        "4-way cache (32k)",
                        0x8000
                    ],
                    [
                        "4-way cache (64k)",
                        0x10000
                    ],
                    [
                        "4-way cache (128k)",
                        0x20000
                    ],
                    [
                        "4-way cache (256k)",
                        0x40000
                    ]
                ],
                defaultValue: "4-way cache (0k)",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CDRI300.cacheSize// = Long[string] [
        [
            "4-way cache (0k)",
            0x00000
        ],
        [
            "4-way cache (32k)",
            0x08000
        ],
        [
            "4-way cache (64k)",
            0x10000
        ],
        [
            "4-way cache (128k)",
            0x20000
        ],
        [
            "4-way cache (256k)",
            0x40000
        ],
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CDRI300.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6400";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    name: "IRAM",
                    comment: "Internal L2 memory",
                    base: 0x00000,
                    len: 0x80000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CDRI300.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CDRI300.cacheMap // module-wide
index URL
Configuration settings
const TMS320CDRI300.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            map: [
                [
                    "4-way cache (0k)",
                    0x0000
                ],
                [
                    "4-way cache (32k)",
                    0x8000
                ],
                [
                    "4-way cache (64k)",
                    0x10000
                ],
                [
                    "4-way cache (128k)",
                    0x20000
                ],
                [
                    "4-way cache (256k)",
                    0x40000
                ]
            ],
            defaultValue: "4-way cache (0k)",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CDRI300.cacheSize // module-wide
index URL
Configuration settings
TMS320CDRI300.cacheSize = Long[string] [
    [
        "4-way cache (0k)",
        0x00000
    ],
    [
        "4-way cache (32k)",
        0x08000
    ],
    [
        "4-way cache (64k)",
        0x10000
    ],
    [
        "4-way cache (128k)",
        0x20000
    ],
    [
        "4-way cache (256k)",
        0x40000
    ],
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CDRI300.Params;
// Instance config-params object
    params.cpuCore = String "6400";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                name: "IRAM",
                comment: "Internal L2 memory",
                base: 0x00000,
                len: 0x80000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CDRI300.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.cpuCore = String "6400";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CDRI300.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CDRI300.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.dataWordSize = Int 4;
config TMS320CDRI300.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.deviceHeader = String undefined;
config TMS320CDRI300.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            name: "IRAM",
            comment: "Internal L2 memory",
            base: 0x00000,
            len: 0x80000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CDRI300.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CDRI300.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CDRI300.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CDRI300.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CDRI300.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CDRI300.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CDRI300.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CDRI300.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CF761990

metaonly module ti.catalog.c6000.TMS320CF761990
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CF761990.xdc
var TMS320CF761990 = xdc.useModule('ti.catalog.c6000.TMS320CF761990');
module-wide config parameters
    const TMS320CF761990.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CF761990.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CF761990.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320CF761990.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "F761990";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB L2 UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM0",
                {
                    comment: "Internal ARM RAM instruction memory",
                    name: "ARM_RAM0",
                    base: 0x02000000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "ARM_RAM1",
                {
                    comment: "Internal ARM RAM data memory",
                    name: "ARM_RAM1",
                    base: 0x02008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CF761990.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CF761990.cacheMap // module-wide
index URL
Configuration settings
const TMS320CF761990.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CF761990.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CF761990.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CF761990.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CF761990.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CF761990.Params;
// Instance config-params object
    params.cpuCore = String "F761990";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 64KB L2 UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM0",
            {
                comment: "Internal ARM RAM instruction memory",
                name: "ARM_RAM0",
                base: 0x02000000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "ARM_RAM1",
            {
                comment: "Internal ARM RAM data memory",
                name: "ARM_RAM1",
                base: 0x02008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CF761990.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CF761990.Params;
...
params.cpuCore = String "F761990";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CF761990.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CF761990.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CF761990.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CF761990.Params;
...
params.dataWordSize = Int 4;
config TMS320CF761990.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CF761990.Params;
...
params.deviceHeader = String undefined;
config TMS320CF761990.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320CF761990.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB L2 UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM0",
        {
            comment: "Internal ARM RAM instruction memory",
            name: "ARM_RAM0",
            base: 0x02000000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "ARM_RAM1",
        {
            comment: "Internal ARM RAM data memory",
            name: "ARM_RAM1",
            base: 0x02008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CF761990.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CF761990.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CF761990.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CF761990.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CF761990.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CF761990.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CF761990.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CF761990.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CF761990.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CF761990.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CTCI6482

metaonly module ti.catalog.c6000.TMS320CTCI6482
index URL

The TCI6482 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CTCI6482.xdc
var TMS320CTCI6482 = xdc.useModule('ti.catalog.c6000.TMS320CTCI6482');
module-wide config parameters
    const TMS320CTCI6482.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CTCI6482.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CTCI6482.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CTCI6482.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 2MB UMAP0 memory",
                    name: "IRAM",
                    base: 0x800000,
                    len: 0x200000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CTCI6482.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CTCI6482.cacheMap // module-wide
index URL
Configuration settings
const TMS320CTCI6482.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CTCI6482.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CTCI6482.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CTCI6482.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CTCI6482.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CTCI6482.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 2MB UMAP0 memory",
                name: "IRAM",
                base: 0x800000,
                len: 0x200000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CTCI6482.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CTCI6482.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CTCI6482.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.dataWordSize = Int 4;
config TMS320CTCI6482.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.deviceHeader = String undefined;
config TMS320CTCI6482.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 2MB UMAP0 memory",
            name: "IRAM",
            base: 0x800000,
            len: 0x200000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CTCI6482.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CTCI6482.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CTCI6482.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CTCI6482.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CTCI6482.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CTCI6482.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CTCI6482.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CTCI6482.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CTCI6484

metaonly module ti.catalog.c6000.TMS320CTCI6484
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320CTCI6484.xdc
var TMS320CTCI6484 = xdc.useModule('ti.catalog.c6000.TMS320CTCI6484');
module-wide config parameters
    const TMS320CTCI6484.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CTCI6484.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CTCI6484.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320CTCI6484.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 2MB L2 memory",
                    name: "IRAM",
                    base: 0x800000,
                    len: 0x200000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CTCI6484.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CTCI6484.cacheMap // module-wide
index URL
Configuration settings
const TMS320CTCI6484.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CTCI6484.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CTCI6484.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CTCI6484.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CTCI6484.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CTCI6484.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 2MB L2 memory",
                name: "IRAM",
                base: 0x800000,
                len: 0x200000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CTCI6484.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CTCI6484.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CTCI6484.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.dataWordSize = Int 4;
config TMS320CTCI6484.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.deviceHeader = String undefined;
config TMS320CTCI6484.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 2MB L2 memory",
            name: "IRAM",
            base: 0x800000,
            len: 0x200000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CTCI6484.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CTCI6484.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CTCI6484.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CTCI6484.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CTCI6484.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CTCI6484.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CTCI6484.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CTCI6484.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CTCI6486

metaonly module ti.catalog.c6000.TMS320CTCI6486
index URL

The TCI6486 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320CTCI6486.xdc
var TMS320CTCI6486 = xdc.useModule('ti.catalog.c6000.TMS320CTCI6486');
module-wide config parameters
    const TMS320CTCI6486.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "LL2RAM"
            }
        ]
    ];
     TMS320CTCI6486.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CTCI6486.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CTCI6486.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "LL2RAM",
                {
                    comment: "608K Local L2 RAM/CACHE memory",
                    name: "LL2RAM",
                    base: 0x00800000,
                    len: 0x00098000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "SL2RAM",
                {
                    comment: "768K Shared L2 RAM memory",
                    name: "SL2RAM",
                    base: 0x00200000,
                    len: 0x000C0000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CTCI6486.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CTCI6486.cacheMap // module-wide
index URL
Configuration settings
const TMS320CTCI6486.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "LL2RAM"
        }
    ]
];
config TMS320CTCI6486.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CTCI6486.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CTCI6486.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CTCI6486.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CTCI6486.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "LL2RAM",
            {
                comment: "608K Local L2 RAM/CACHE memory",
                name: "LL2RAM",
                base: 0x00800000,
                len: 0x00098000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "SL2RAM",
            {
                comment: "768K Shared L2 RAM memory",
                name: "SL2RAM",
                base: 0x00200000,
                len: 0x000C0000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CTCI6486.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CTCI6486.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CTCI6486.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.dataWordSize = Int 4;
config TMS320CTCI6486.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.deviceHeader = String undefined;
config TMS320CTCI6486.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "LL2RAM",
        {
            comment: "608K Local L2 RAM/CACHE memory",
            name: "LL2RAM",
            base: 0x00800000,
            len: 0x00098000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "SL2RAM",
        {
            comment: "768K Shared L2 RAM memory",
            name: "SL2RAM",
            base: 0x00200000,
            len: 0x000C0000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CTCI6486.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CTCI6486.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CTCI6486.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CTCI6486.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CTCI6486.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CTCI6486.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CTCI6486.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CTCI6486.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:44 GMT


module ti.catalog.c6000.TMS320CTCI6487

metaonly module ti.catalog.c6000.TMS320CTCI6487
index URL

The TCI6487 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CTCI6487.xdc
var TMS320CTCI6487 = xdc.useModule('ti.catalog.c6000.TMS320CTCI6487');
module-wide config parameters
    const TMS320CTCI6487.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2RAM"
            }
        ]
    ];
     TMS320CTCI6487.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CTCI6487.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
     TMS320CTCI6487.memBlock// = IPlatform.Memory[string] [
        [
            "ASYMGEM0L2RAM",
            {
                comment: "1536K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00180000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM1L2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM2L2RAM",
            {
                comment: "512K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SYMGEML2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320CTCI6487.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CTCI6487.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CTCI6487.cacheMap // module-wide
index URL
Configuration settings
const TMS320CTCI6487.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2RAM"
        }
    ]
];
config TMS320CTCI6487.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CTCI6487.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CTCI6487.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CTCI6487.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config TMS320CTCI6487.memBlock // module-wide
index URL
Configuration settings
TMS320CTCI6487.memBlock = IPlatform.Memory[string] [
    [
        "ASYMGEM0L2RAM",
        {
            comment: "1536K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00180000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM1L2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM2L2RAM",
        {
            comment: "512K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SYMGEML2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CTCI6487.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CTCI6487.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CTCI6487.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CTCI6487.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.dataWordSize = Int 4;
config TMS320CTCI6487.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.deviceHeader = String undefined;
config TMS320CTCI6487.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CTCI6487.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CTCI6487.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CTCI6487.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CTCI6487.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CTCI6487.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CTCI6487.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CTCI6487.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CTCI6487.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320CTCI6488

metaonly module ti.catalog.c6000.TMS320CTCI6488
index URL

The TCI6488 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CTCI6488.xdc
var TMS320CTCI6488 = xdc.useModule('ti.catalog.c6000.TMS320CTCI6488');
module-wide config parameters
    const TMS320CTCI6488.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2RAM"
            }
        ]
    ];
     TMS320CTCI6488.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CTCI6488.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
     TMS320CTCI6488.memBlock// = IPlatform.Memory[string] [
        [
            "ASYMGEM0L2RAM",
            {
                comment: "1536K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00180000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM1L2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM2L2RAM",
            {
                comment: "512K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SYMGEML2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320CTCI6488.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CTCI6488.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CTCI6488.cacheMap // module-wide
index URL
Configuration settings
const TMS320CTCI6488.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2RAM"
        }
    ]
];
config TMS320CTCI6488.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CTCI6488.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CTCI6488.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CTCI6488.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config TMS320CTCI6488.memBlock // module-wide
index URL
Configuration settings
TMS320CTCI6488.memBlock = IPlatform.Memory[string] [
    [
        "ASYMGEM0L2RAM",
        {
            comment: "1536K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00180000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM1L2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM2L2RAM",
        {
            comment: "512K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SYMGEML2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CTCI6488.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CTCI6488.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CTCI6488.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CTCI6488.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.dataWordSize = Int 4;
config TMS320CTCI6488.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.deviceHeader = String undefined;
config TMS320CTCI6488.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CTCI6488.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CTCI6488.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CTCI6488.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CTCI6488.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CTCI6488.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CTCI6488.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CTCI6488.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CTCI6488.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320CTCI6498

metaonly module ti.catalog.c6000.TMS320CTCI6498
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320CTCI6498.xdc
var TMS320CTCI6498 = xdc.useModule('ti.catalog.c6000.TMS320CTCI6498');
module-wide config parameters
    const TMS320CTCI6498.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320CTCI6498.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CTCI6498.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320CTCI6498.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CTCI6498.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CTCI6498.cacheMap // module-wide
index URL
Configuration settings
const TMS320CTCI6498.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320CTCI6498.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CTCI6498.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CTCI6498.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CTCI6498.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CTCI6498.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CTCI6498.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CTCI6498.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CTCI6498.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.dataWordSize = Int 4;
config TMS320CTCI6498.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.deviceHeader = String undefined;
config TMS320CTCI6498.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320CTCI6498.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CTCI6498.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CTCI6498.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CTCI6498.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CTCI6498.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CTCI6498.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CTCI6498.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CTCI6498.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320CTNETV2685

metaonly module ti.catalog.c6000.TMS320CTNETV2685
index URL

The TNETV2685 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320CTNETV2685.xdc
var TMS320CTNETV2685 = xdc.useModule('ti.catalog.c6000.TMS320CTNETV2685');
module-wide config parameters
    const TMS320CTNETV2685.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0xA00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320CTNETV2685.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320CTNETV2685.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320CTNETV2685.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 1408KB L2 RAM/CACHE",
                    name: "IRAM",
                    base: 0xA00000,
                    len: 0x160000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320CTNETV2685.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320CTNETV2685.cacheMap // module-wide
index URL
Configuration settings
const TMS320CTNETV2685.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0xA00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320CTNETV2685.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320CTNETV2685.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320CTNETV2685.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320CTNETV2685.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320CTNETV2685.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 1408KB L2 RAM/CACHE",
                name: "IRAM",
                base: 0xA00000,
                len: 0x160000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320CTNETV2685.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320CTNETV2685.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320CTNETV2685.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.dataWordSize = Int 4;
config TMS320CTNETV2685.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.deviceHeader = String undefined;
config TMS320CTNETV2685.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 1408KB L2 RAM/CACHE",
            name: "IRAM",
            base: 0xA00000,
            len: 0x160000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320CTNETV2685.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.minDataUnitSize = Int 1;
config TMS320CTNETV2685.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.minProgUnitSize = Int 1;
config TMS320CTNETV2685.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320CTNETV2685.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320CTNETV2685.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320CTNETV2685.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320CTNETV2685.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320CTNETV2685.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320DA802

metaonly module ti.catalog.c6000.TMS320DA802
index URL

The DA802 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA802.xdc
var TMS320DA802 = xdc.useModule('ti.catalog.c6000.TMS320DA802');
module-wide config parameters
    const TMS320DA802.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA802.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA802.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA802.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 128KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA802.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA802.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA802.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA802.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA802.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA802.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA802.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA802.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 128KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA802.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA802.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA802.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA802.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA802.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA802.Params;
...
params.dataWordSize = Int 4;
config TMS320DA802.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA802.Params;
...
params.deviceHeader = String undefined;
config TMS320DA802.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320DA802.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 128KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320DA802.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA802.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA802.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA802.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA802.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA802.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA802.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA802.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA802.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA802.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320DA803

metaonly module ti.catalog.c6000.TMS320DA803
index URL

The DA803 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA803.xdc
var TMS320DA803 = xdc.useModule('ti.catalog.c6000.TMS320DA803');
module-wide config parameters
    const TMS320DA803.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA803.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA803.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA803.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA803.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA803.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA803.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA803.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA803.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA803.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA803.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA803.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA803.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA803.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA803.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA803.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA803.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA803.Params;
...
params.dataWordSize = Int 4;
config TMS320DA803.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA803.Params;
...
params.deviceHeader = String undefined;
config TMS320DA803.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320DA803.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320DA803.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA803.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA803.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA803.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA803.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA803.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA803.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA803.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA803.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA803.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320DA804

metaonly module ti.catalog.c6000.TMS320DA804
index URL

The DA804 device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA804.xdc
var TMS320DA804 = xdc.useModule('ti.catalog.c6000.TMS320DA804');
module-wide config parameters
    const TMS320DA804.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA804.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA804.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA804.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA804.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA804.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA804.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA804.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA804.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA804.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA804.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA804.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA804.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA804.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA804.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA804.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA804.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA804.Params;
...
params.dataWordSize = Int 4;
config TMS320DA804.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA804.Params;
...
params.deviceHeader = String undefined;
config TMS320DA804.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA804.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA804.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA804.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA804.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA804.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA804.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA804.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA804.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA804.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA804.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA804.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320DA805

metaonly module ti.catalog.c6000.TMS320DA805
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA805.xdc
var TMS320DA805 = xdc.useModule('ti.catalog.c6000.TMS320DA805');
module-wide config parameters
    const TMS320DA805.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA805.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA805.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA805.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA805.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA805.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA805.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA805.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA805.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA805.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA805.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA805.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA805.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA805.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA805.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA805.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA805.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA805.Params;
...
params.dataWordSize = Int 4;
config TMS320DA805.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA805.Params;
...
params.deviceHeader = String undefined;
config TMS320DA805.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA805.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA805.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA805.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA805.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA805.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA805.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA805.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA805.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA805.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA805.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA805.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320DA807

metaonly module ti.catalog.c6000.TMS320DA807
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA807.xdc
var TMS320DA807 = xdc.useModule('ti.catalog.c6000.TMS320DA807');
module-wide config parameters
    const TMS320DA807.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA807.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA807.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA807.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "L2ROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA807.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA807.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA807.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA807.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA807.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA807.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA807.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA807.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "L2ROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA807.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA807.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA807.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA807.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA807.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA807.Params;
...
params.dataWordSize = Int 4;
config TMS320DA807.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA807.Params;
...
params.deviceHeader = String undefined;
config TMS320DA807.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA807.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2ROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320DA807.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA807.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA807.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA807.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA807.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA807.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA807.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA807.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA807.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA807.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:45 GMT


module ti.catalog.c6000.TMS320DA808

metaonly module ti.catalog.c6000.TMS320DA808
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA808.xdc
var TMS320DA808 = xdc.useModule('ti.catalog.c6000.TMS320DA808');
module-wide config parameters
    const TMS320DA808.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA808.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA808.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA808.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA808.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA808.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA808.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA808.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA808.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA808.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA808.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA808.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA808.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA808.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA808.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA808.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA808.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA808.Params;
...
params.dataWordSize = Int 4;
config TMS320DA808.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA808.Params;
...
params.deviceHeader = String undefined;
config TMS320DA808.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA808.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA808.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA808.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA808.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA808.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA808.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA808.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA808.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA808.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA808.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA808.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DA810

metaonly module ti.catalog.c6000.TMS320DA810
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA810.xdc
var TMS320DA810 = xdc.useModule('ti.catalog.c6000.TMS320DA810');
module-wide config parameters
    const TMS320DA810.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA810.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA810.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA810.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA810.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA810.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA810.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA810.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA810.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA810.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA810.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA810.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA810.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA810.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA810.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA810.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA810.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA810.Params;
...
params.dataWordSize = Int 4;
config TMS320DA810.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA810.Params;
...
params.deviceHeader = String undefined;
config TMS320DA810.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA810.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA810.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA810.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA810.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA810.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA810.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA810.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA810.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA810.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA810.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA810.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DA828

metaonly module ti.catalog.c6000.TMS320DA828
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA828.xdc
var TMS320DA828 = xdc.useModule('ti.catalog.c6000.TMS320DA828');
module-wide config parameters
    const TMS320DA828.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA828.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA828.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA828.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA828.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA828.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA828.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA828.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA828.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA828.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA828.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA828.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA828.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA828.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA828.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA828.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA828.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA828.Params;
...
params.dataWordSize = Int 4;
config TMS320DA828.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA828.Params;
...
params.deviceHeader = String undefined;
config TMS320DA828.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA828.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA828.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA828.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA828.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA828.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA828.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA828.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA828.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA828.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA828.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA828.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DA830

metaonly module ti.catalog.c6000.TMS320DA830
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA830.xdc
var TMS320DA830 = xdc.useModule('ti.catalog.c6000.TMS320DA830');
module-wide config parameters
    const TMS320DA830.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA830.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA830.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA830.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA830.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA830.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA830.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA830.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA830.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA830.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA830.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA830.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA830.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA830.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA830.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA830.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA830.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA830.Params;
...
params.dataWordSize = Int 4;
config TMS320DA830.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA830.Params;
...
params.deviceHeader = String undefined;
config TMS320DA830.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA830.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA830.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA830.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA830.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA830.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA830.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA830.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA830.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA830.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA830.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA830.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DA840

metaonly module ti.catalog.c6000.TMS320DA840
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA840.xdc
var TMS320DA840 = xdc.useModule('ti.catalog.c6000.TMS320DA840');
module-wide config parameters
    const TMS320DA840.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA840.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA840.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA840.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA840.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA840.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA840.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA840.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA840.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA840.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA840.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA840.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA840.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA840.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA840.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA840.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA840.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA840.Params;
...
params.dataWordSize = Int 4;
config TMS320DA840.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA840.Params;
...
params.deviceHeader = String undefined;
config TMS320DA840.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA840.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA840.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA840.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA840.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA840.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA840.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA840.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA840.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA840.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA840.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA840.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DA850

metaonly module ti.catalog.c6000.TMS320DA850
index URL

The C64P device data sheet module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320DA850.xdc
var TMS320DA850 = xdc.useModule('ti.catalog.c6000.TMS320DA850');
module-wide config parameters
    const TMS320DA850.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DA850.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DA850.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DA850.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "C674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IROM",
                {
                    comment: "Internal 1MB L2 ROM",
                    name: "IROM",
                    base: 0x11700000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RX"
                }
            ],
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "L3_CBA_RAM",
                {
                    comment: "128KB ARM/DSP local shared RAM",
                    name: "L3_CBA_RAM",
                    base: 0x80000000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DA850.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DA850.cacheMap // module-wide
index URL
Configuration settings
const TMS320DA850.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DA850.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DA850.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DA850.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DA850.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DA850.Params;
// Instance config-params object
    params.cpuCore = String "C674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IROM",
            {
                comment: "Internal 1MB L2 ROM",
                name: "IROM",
                base: 0x11700000,
                len: 0x00100000,
                space: "code/data",
                access: "RX"
            }
        ],
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "L3_CBA_RAM",
            {
                comment: "128KB ARM/DSP local shared RAM",
                name: "L3_CBA_RAM",
                base: 0x80000000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DA850.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DA850.Params;
...
params.cpuCore = String "C674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DA850.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DA850.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DA850.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DA850.Params;
...
params.dataWordSize = Int 4;
config TMS320DA850.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DA850.Params;
...
params.deviceHeader = String undefined;
config TMS320DA850.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DA850.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IROM",
        {
            comment: "Internal 1MB L2 ROM",
            name: "IROM",
            base: 0x11700000,
            len: 0x00100000,
            space: "code/data",
            access: "RX"
        }
    ],
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "L3_CBA_RAM",
        {
            comment: "128KB ARM/DSP local shared RAM",
            name: "L3_CBA_RAM",
            base: 0x80000000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DA850.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA850.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DA850.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DA850.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DA850.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DA850.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DA850.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DA850.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DA850.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DA850.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DM357

metaonly module ti.catalog.c6000.TMS320DM357
index URL

The DM357 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320DM357.xdc
var TMS320DM357 = xdc.useModule('ti.catalog.c6000.TMS320DM357');
module-wide config parameters
    const TMS320DM357.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DM357.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DM357.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ]
    ];
per-instance config parameters
    var params = new TMS320DM357.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 64KB UMAP0 memory",
                    name: "IRAM",
                    base: 0x11800000,
                    len: 0x00010000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "ARM_RAM",
                {
                    comment: "Internal ARM RAM memory",
                    name: "ARM_RAM",
                    base: 0x10008000,
                    len: 0x00004000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM357.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DM357.cacheMap // module-wide
index URL
Configuration settings
const TMS320DM357.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DM357.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DM357.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DM357.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DM357.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM357.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "IRAM",
            {
                comment: "Internal 64KB UMAP0 memory",
                name: "IRAM",
                base: 0x11800000,
                len: 0x00010000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "ARM_RAM",
            {
                comment: "Internal ARM RAM memory",
                name: "ARM_RAM",
                base: 0x10008000,
                len: 0x00004000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM357.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM357.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM357.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM357.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM357.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM357.Params;
...
params.dataWordSize = Int 4;
config TMS320DM357.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM357.Params;
...
params.deviceHeader = String undefined;
config TMS320DM357.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320DM357.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 64KB UMAP0 memory",
            name: "IRAM",
            base: 0x11800000,
            len: 0x00010000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "ARM_RAM",
        {
            comment: "Internal ARM RAM memory",
            name: "ARM_RAM",
            base: 0x10008000,
            len: 0x00004000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320DM357.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM357.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM357.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM357.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM357.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM357.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM357.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM357.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM357.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM357.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DM8148

metaonly module ti.catalog.c6000.TMS320DM8148
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320DM8148.xdc
var TMS320DM8148 = xdc.useModule('ti.catalog.c6000.TMS320DM8148');
module-wide config parameters
    const TMS320DM8148.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DM8148.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DM8148.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DM8148.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC",
                {
                    comment: "OCMC (On-chip RAM) (128KB)",
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM8148.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DM8148.cacheMap // module-wide
index URL
Configuration settings
const TMS320DM8148.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DM8148.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DM8148.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DM8148.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DM8148.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM8148.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC",
            {
                comment: "OCMC (On-chip RAM) (128KB)",
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM8148.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM8148.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM8148.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM8148.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM8148.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.dataWordSize = Int 4;
config TMS320DM8148.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM8148.Params;
...
params.deviceHeader = String undefined;
config TMS320DM8148.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320DM8148.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320DM8148.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DM8148.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC",
        {
            comment: "OCMC (On-chip RAM) (128KB)",
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DM8148.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM8148.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8148.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM8148.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM8148.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM8148.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM8148.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM8148.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM8148.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:46 GMT


module ti.catalog.c6000.TMS320DM8168

metaonly module ti.catalog.c6000.TMS320DM8168
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320DM8168.xdc
var TMS320DM8168 = xdc.useModule('ti.catalog.c6000.TMS320DM8168');
module-wide config parameters
    const TMS320DM8168.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x00000
                    ],
                    [
                        "32k",
                        0x08000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320DM8168.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320DM8168.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320DM8168.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC_0",
                {
                    comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320DM8168.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320DM8168.cacheMap // module-wide
index URL
Configuration settings
const TMS320DM8168.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x00000
                ],
                [
                    "32k",
                    0x08000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320DM8168.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320DM8168.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320DM8168.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320DM8168.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320DM8168.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_0",
            {
                comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320DM8168.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320DM8168.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320DM8168.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320DM8168.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320DM8168.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.dataWordSize = Int 4;
config TMS320DM8168.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320DM8168.Params;
...
params.deviceHeader = String undefined;
config TMS320DM8168.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320DM8168.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320DM8168.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_0",
        {
            comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320DM8168.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.minDataUnitSize = Int 1;
config TMS320DM8168.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320DM8168.Params;
...
params.minProgUnitSize = Int 1;
config TMS320DM8168.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320DM8168.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320DM8168.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320DM8168.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320DM8168.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320DM8168.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6485

metaonly module ti.catalog.c6000.TMS320TCI6485
index URL

The TCI6485 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6485.xdc
var TMS320TCI6485 = xdc.useModule('ti.catalog.c6000.TMS320TCI6485');
module-wide config parameters
    const TMS320TCI6485.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2RAM"
            }
        ]
    ];
     TMS320TCI6485.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6485.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
     TMS320TCI6485.memBlock// = IPlatform.Memory[string] [
        [
            "ASYMGEM0L2RAM",
            {
                comment: "1536K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00180000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM1L2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM2L2RAM",
            {
                comment: "512K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SYMGEML2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6485.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6485.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6485.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6485.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2RAM"
        }
    ]
];
config TMS320TCI6485.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6485.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6485.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6485.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config TMS320TCI6485.memBlock // module-wide
index URL
Configuration settings
TMS320TCI6485.memBlock = IPlatform.Memory[string] [
    [
        "ASYMGEM0L2RAM",
        {
            comment: "1536K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00180000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM1L2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM2L2RAM",
        {
            comment: "512K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SYMGEML2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6485.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6485.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6485.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6485.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6485.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6485.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320TCI6485.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6485.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6485.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6485.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6485.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6485.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6485.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6485.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6489

metaonly module ti.catalog.c6000.TMS320TCI6489
index URL

The TCI6489 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6489.xdc
var TMS320TCI6489 = xdc.useModule('ti.catalog.c6000.TMS320TCI6489');
module-wide config parameters
    const TMS320TCI6489.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0xE00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0xF00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2RAM"
            }
        ]
    ];
     TMS320TCI6489.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6489.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
     TMS320TCI6489.memBlock// = IPlatform.Memory[string] [
        [
            "ASYMGEM0L2RAM",
            {
                comment: "1536K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00180000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM1L2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "ASYMGEM2L2RAM",
            {
                comment: "512K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "SYMGEML2RAM",
            {
                comment: "1024K L2 RAM/CACHE memory",
                name: "L2RAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6489.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0xE00000,
                    len: 0x008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0xF00000,
                    len: 0x008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6489.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6489.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6489.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0xE00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0xF00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2RAM"
        }
    ]
];
config TMS320TCI6489.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6489.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6489.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6489.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
config TMS320TCI6489.memBlock // module-wide
index URL
Configuration settings
TMS320TCI6489.memBlock = IPlatform.Memory[string] [
    [
        "ASYMGEM0L2RAM",
        {
            comment: "1536K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00180000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM1L2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "ASYMGEM2L2RAM",
        {
            comment: "512K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "SYMGEML2RAM",
        {
            comment: "1024K L2 RAM/CACHE memory",
            name: "L2RAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6489.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0xE00000,
                len: 0x008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0xF00000,
                len: 0x008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6489.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6489.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6489.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6489.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6489.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0xE00000,
            len: 0x008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0xF00000,
            len: 0x008000,
            space: "data",
            access: "RW"
        }
    ]
];
config TMS320TCI6489.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6489.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6489.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6489.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6489.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6489.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6489.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6489.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6608

metaonly module ti.catalog.c6000.TMS320TCI6608
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6608.xdc
var TMS320TCI6608 = xdc.useModule('ti.catalog.c6000.TMS320TCI6608');
module-wide config parameters
    const TMS320TCI6608.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6608.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6608.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6608.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "512KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00080000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "4MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00400000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6608.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6608.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6608.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6608.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6608.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6608.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6608.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6608.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "512KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00080000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "4MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00400000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6608.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6608.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6608.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6608.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6608.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "512KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00080000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "4MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00400000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6608.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6608.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6608.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6608.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6608.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6608.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6608.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6608.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6614

metaonly module ti.catalog.c6000.TMS320TCI6614
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6614.xdc
var TMS320TCI6614 = xdc.useModule('ti.catalog.c6000.TMS320TCI6614');
module-wide config parameters
    const TMS320TCI6614.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6614.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6614.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6614.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6614.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6614.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6614.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6614.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6614.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6614.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6614.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6614.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6614.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6614.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6614.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6614.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6614.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6614.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6614.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6614.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6614.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6614.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6614.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6614.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6614.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6616

metaonly module ti.catalog.c6000.TMS320TCI6616
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6616.xdc
var TMS320TCI6616 = xdc.useModule('ti.catalog.c6000.TMS320TCI6616');
module-wide config parameters
    const TMS320TCI6616.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6616.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6616.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6616.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6616.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6616.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6616.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6616.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6616.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6616.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6616.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6616.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6616.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6616.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6616.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6616.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6616.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6616.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6616.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6616.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6616.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6616.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6616.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6616.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6616.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6618

metaonly module ti.catalog.c6000.TMS320TCI6618
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6618.xdc
var TMS320TCI6618 = xdc.useModule('ti.catalog.c6000.TMS320TCI6618');
module-wide config parameters
    const TMS320TCI6618.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6618.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6618.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6618.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6618.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6618.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6618.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6618.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6618.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6618.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6618.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6618.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6618.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6618.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6618.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6618.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6618.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6618.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6618.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6618.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6618.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6618.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6618.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6618.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6618.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6630K2L

metaonly module ti.catalog.c6000.TMS320TCI6630K2L
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6630K2L.xdc
var TMS320TCI6630K2L = xdc.useModule('ti.catalog.c6000.TMS320TCI6630K2L');
module-wide config parameters
    const TMS320TCI6630K2L.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6630K2L.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6630K2L.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6630K2L.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "2MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00200000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6630K2L.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6630K2L.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6630K2L.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6630K2L.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6630K2L.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6630K2L.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6630K2L.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6630K2L.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "2MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00200000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6630K2L.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6630K2L.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6630K2L.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6630K2L.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6630K2L.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "2MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00200000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6630K2L.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6630K2L.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6630K2L.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6630K2L.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6630K2L.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6630K2L.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6630K2L.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6630K2L.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6634

metaonly module ti.catalog.c6000.TMS320TCI6634
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6634.xdc
var TMS320TCI6634 = xdc.useModule('ti.catalog.c6000.TMS320TCI6634');
module-wide config parameters
    const TMS320TCI6634.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6634.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6634.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6634.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "6MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00600000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6634.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6634.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6634.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6634.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6634.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6634.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6634.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6634.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "6MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00600000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6634.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6634.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6634.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6634.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6634.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "6MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00600000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6634.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6634.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6634.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6634.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6634.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6634.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6634.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6634.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:47 GMT


module ti.catalog.c6000.TMS320TCI6636

metaonly module ti.catalog.c6000.TMS320TCI6636
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6636.xdc
var TMS320TCI6636 = xdc.useModule('ti.catalog.c6000.TMS320TCI6636');
module-wide config parameters
    const TMS320TCI6636.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6636.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6636.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6636.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "6MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00600000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6636.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6636.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6636.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6636.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6636.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6636.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6636.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6636.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "6MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00600000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6636.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6636.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6636.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6636.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6636.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "6MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00600000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6636.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6636.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6636.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6636.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6636.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6636.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6636.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6636.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.c6000.TMS320TCI6638

metaonly module ti.catalog.c6000.TMS320TCI6638
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TMS320TCI6638.xdc
var TMS320TCI6638 = xdc.useModule('ti.catalog.c6000.TMS320TCI6638');
module-wide config parameters
    const TMS320TCI6638.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ],
                    [
                        "512k",
                        0x080000
                    ],
                    [
                        "1024k",
                        0x100000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     TMS320TCI6638.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TCI6638.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ],
        [
            "512k",
            0x080000
        ],
        [
            "1024k",
            0x100000
        ]
    ];
per-instance config parameters
    var params = new TMS320TCI6638.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "1MB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00100000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "MSMCSRAM",
                {
                    comment: "6MB MSMC SRAM",
                    name: "MSMCSRAM",
                    base: 0x0C000000,
                    len: 0x00600000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TCI6638.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TCI6638.cacheMap // module-wide
index URL
Configuration settings
const TMS320TCI6638.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ],
                [
                    "512k",
                    0x080000
                ],
                [
                    "1024k",
                    0x100000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config TMS320TCI6638.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TCI6638.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TCI6638.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TCI6638.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ],
    [
        "512k",
        0x080000
    ],
    [
        "1024k",
        0x100000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TCI6638.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "1MB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00100000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "MSMCSRAM",
            {
                comment: "6MB MSMC SRAM",
                name: "MSMCSRAM",
                base: 0x0C000000,
                len: 0x00600000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TCI6638.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TCI6638.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TCI6638.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.dataWordSize = Int 4;
config TMS320TCI6638.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.deviceHeader = String undefined;
config TMS320TCI6638.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "1MB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00100000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "MSMCSRAM",
        {
            comment: "6MB MSMC SRAM",
            name: "MSMCSRAM",
            base: 0x0C000000,
            len: 0x00600000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TCI6638.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TCI6638.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TCI6638.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TCI6638.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TCI6638.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TCI6638.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TCI6638.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TCI6638.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.c6000.TMS320TI811X

metaonly module ti.catalog.c6000.TMS320TI811X
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320TI811X.xdc
var TMS320TI811X = xdc.useModule('ti.catalog.c6000.TMS320TI811X');
module-wide config parameters
    const TMS320TI811X.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320TI811X.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TI811X.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320TI811X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC",
                {
                    comment: "OCMC (On-chip RAM) (128KB)",
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI811X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TI811X.cacheMap // module-wide
index URL
Configuration settings
const TMS320TI811X.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320TI811X.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TI811X.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TI811X.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TI811X.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI811X.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC",
            {
                comment: "OCMC (On-chip RAM) (128KB)",
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI811X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI811X.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI811X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI811X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI811X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI811X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI811X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI811X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI811X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI811X.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320TI811X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC",
        {
            comment: "OCMC (On-chip RAM) (128KB)",
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TI811X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI811X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI811X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI811X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI811X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI811X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI811X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI811X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI811X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.c6000.TMS320TI814X

metaonly module ti.catalog.c6000.TMS320TI814X
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320TI814X.xdc
var TMS320TI814X = xdc.useModule('ti.catalog.c6000.TMS320TI814X');
module-wide config parameters
    const TMS320TI814X.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320TI814X.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TI814X.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320TI814X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC",
                {
                    comment: "OCMC (On-chip RAM) (128KB)",
                    name: "OCMC",
                    base: 0x40300000,
                    len: 0x20000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI814X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TI814X.cacheMap // module-wide
index URL
Configuration settings
const TMS320TI814X.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320TI814X.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TI814X.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TI814X.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TI814X.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI814X.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC",
            {
                comment: "OCMC (On-chip RAM) (128KB)",
                name: "OCMC",
                base: 0x40300000,
                len: 0x20000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI814X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI814X.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI814X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI814X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI814X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI814X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI814X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI814X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI814X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI814X.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320TI814X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC",
        {
            comment: "OCMC (On-chip RAM) (128KB)",
            name: "OCMC",
            base: 0x40300000,
            len: 0x20000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TI814X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI814X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI814X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI814X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI814X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI814X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI814X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI814X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI814X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.c6000.TMS320TI816X

metaonly module ti.catalog.c6000.TMS320TI816X
index URL

The C674 device data sheet module

  • Configuration settings
  • Individual elements
This module implements the xdc.platform.ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/TMS320TI816X.xdc
var TMS320TI816X = xdc.useModule('ti.catalog.c6000.TMS320TI816X');
module-wide config parameters
    const TMS320TI816X.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x10E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x10F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x10800000,
                map: [
                    [
                        "0k",
                        0x00000
                    ],
                    [
                        "32k",
                        0x08000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ],
                    [
                        "256k",
                        0x40000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "IRAM"
            }
        ]
    ];
     TMS320TI816X.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TMS320TI816X.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ],
        [
            "256k",
            0x40000
        ]
    ];
per-instance config parameters
    var params = new TMS320TI816X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "674";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.hdvicp1// = HDVICP2.Instance undefined;
        params.hdvicp2// = HDVICP2.Instance undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "IRAM",
                {
                    comment: "Internal 256KB L2 memory",
                    name: "IRAM",
                    base: 0x10800000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x10E00000,
                    len: 0x8000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 32KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x10F00000,
                    len: 0x8000,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "OCMC_0",
                {
                    comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                    name: "OCMC_0",
                    base: 0x40300000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "OCMC_1",
                {
                    comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                    name: "OCMC_1",
                    base: 0x40400000,
                    len: 0x40000,
                    space: "code/data",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TMS320TI816X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TMS320TI816X.cacheMap // module-wide
index URL
Configuration settings
const TMS320TI816X.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x10E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x10F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x10800000,
            map: [
                [
                    "0k",
                    0x00000
                ],
                [
                    "32k",
                    0x08000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ],
                [
                    "256k",
                    0x40000
                ]
            ],
            defaultValue: "0k",
            memorySection: "IRAM"
        }
    ]
];
config TMS320TI816X.cacheSizeL1 // module-wide
index URL
Configuration settings
TMS320TI816X.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TMS320TI816X.cacheSizeL2 // module-wide
index URL
Configuration settings
TMS320TI816X.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ],
    [
        "256k",
        0x40000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TMS320TI816X.Params;
// Instance config-params object
    params.cpuCore = String "674";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.hdvicp1 = HDVICP2.Instance undefined;
    //
    params.hdvicp2 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "IRAM",
            {
                comment: "Internal 256KB L2 memory",
                name: "IRAM",
                base: 0x10800000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x10E00000,
                len: 0x8000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 32KB L1 data memory",
                name: "L1DSRAM",
                base: 0x10F00000,
                len: 0x8000,
                space: "data",
                access: "RW"
            }
        ],
        [
            "OCMC_0",
            {
                comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
                name: "OCMC_0",
                base: 0x40300000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "OCMC_1",
            {
                comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
                name: "OCMC_1",
                base: 0x40400000,
                len: 0x40000,
                space: "code/data",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TMS320TI816X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TMS320TI816X.Params;
...
params.cpuCore = String "674";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TMS320TI816X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TMS320TI816X.Params;
...
params.cpuCoreRevision = String "1.0";
config TMS320TI816X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.dataWordSize = Int 4;
config TMS320TI816X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TMS320TI816X.Params;
...
params.deviceHeader = String undefined;
config TMS320TI816X.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.hdvicp1 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp1 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.hdvicp2 // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.hdvicp2 = HDVICP2.Instance undefined;
config TMS320TI816X.Params.memMap // instance
index URL
Configuration settings
var params = new TMS320TI816X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "IRAM",
        {
            comment: "Internal 256KB L2 memory",
            name: "IRAM",
            base: 0x10800000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x10E00000,
            len: 0x8000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 32KB L1 data memory",
            name: "L1DSRAM",
            base: 0x10F00000,
            len: 0x8000,
            space: "data",
            access: "RW"
        }
    ],
    [
        "OCMC_0",
        {
            comment: "OCMC (On-chip RAM) Bank 0 (256KB)",
            name: "OCMC_0",
            base: 0x40300000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "OCMC_1",
        {
            comment: "OCMC (On-chip RAM) Bank 1 (256KB)",
            name: "OCMC_1",
            base: 0x40400000,
            len: 0x40000,
            space: "code/data",
            access: "RWX"
        }
    ]
];
config TMS320TI816X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.minDataUnitSize = Int 1;
config TMS320TI816X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TMS320TI816X.Params;
...
params.minProgUnitSize = Int 1;
config TMS320TI816X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TMS320TI816X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TMS320TI816X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TMS320TI816X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TMS320TI816X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TMS320TI816X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.c6000.TNETV107X

metaonly module ti.catalog.c6000.TNETV107X
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/c6000/TNETV107X.xdc
var TNETV107X = xdc.useModule('ti.catalog.c6000.TNETV107X');
module-wide config parameters
    const TNETV107X.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x11E08000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x11F04000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x11800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x20000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2RAM"
            }
        ]
    ];
     TNETV107X.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     TNETV107X.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x00000
        ],
        [
            "32k",
            0x08000
        ],
        [
            "64k",
            0x10000
        ],
        [
            "128k",
            0x20000
        ]
    ];
per-instance config parameters
    var params = new TNETV107X.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "64x+";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String undefined;
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.memMap// = IPlatform.Memory[string] [
            [
                "L2RAM",
                {
                    comment: "Internal 128KB L2 memory",
                    name: "L2RAM",
                    base: 0x11800000,
                    len: 0x00020000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "Internal 32KB L1 program memory",
                    name: "L1PSRAM",
                    base: 0x11E08000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "Internal 80KB L1 data memory",
                    name: "L1DSRAM",
                    base: 0x11F04000,
                    len: 0x00014000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = TNETV107X.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config TNETV107X.cacheMap // module-wide
index URL
Configuration settings
const TNETV107X.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x11E08000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x11F04000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x11800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x20000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2RAM"
        }
    ]
];
config TNETV107X.cacheSizeL1 // module-wide
index URL
Configuration settings
TNETV107X.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config TNETV107X.cacheSizeL2 // module-wide
index URL
Configuration settings
TNETV107X.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x00000
    ],
    [
        "32k",
        0x08000
    ],
    [
        "64k",
        0x10000
    ],
    [
        "128k",
        0x20000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new TNETV107X.Params;
// Instance config-params object
    params.cpuCore = String "64x+";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String undefined;
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.memMap = IPlatform.Memory[string] [
    //
        [
            "L2RAM",
            {
                comment: "Internal 128KB L2 memory",
                name: "L2RAM",
                base: 0x11800000,
                len: 0x00020000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "Internal 32KB L1 program memory",
                name: "L1PSRAM",
                base: 0x11E08000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "Internal 80KB L1 data memory",
                name: "L1DSRAM",
                base: 0x11F04000,
                len: 0x00014000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config TNETV107X.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new TNETV107X.Params;
...
params.cpuCore = String "64x+";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config TNETV107X.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new TNETV107X.Params;
...
params.cpuCoreRevision = String undefined;
config TNETV107X.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new TNETV107X.Params;
...
params.dataWordSize = Int 4;
config TNETV107X.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new TNETV107X.Params;
...
params.deviceHeader = String undefined;
config TNETV107X.Params.memMap // instance
index URL
Configuration settings
var params = new TNETV107X.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2RAM",
        {
            comment: "Internal 128KB L2 memory",
            name: "L2RAM",
            base: 0x11800000,
            len: 0x00020000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "Internal 32KB L1 program memory",
            name: "L1PSRAM",
            base: 0x11E08000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "Internal 80KB L1 data memory",
            name: "L1DSRAM",
            base: 0x11F04000,
            len: 0x00014000,
            space: "data",
            access: "RW"
        }
    ]
];
config TNETV107X.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new TNETV107X.Params;
...
params.minDataUnitSize = Int 1;
config TNETV107X.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new TNETV107X.Params;
...
params.minProgUnitSize = Int 1;
config TNETV107X.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new TNETV107X.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new TNETV107X.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = TNETV107X.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
TNETV107X.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
TNETV107X.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.c6000.Vayu

metaonly module ti.catalog.c6000.Vayu
index URL

The Vayu device data sheet module

  • Configuration settings
  • Individual elements
This module implements the ICpuDataSheet interface and is used by platforms to obtain "data sheet" information about this device.
Configuration settings sourced in ti/catalog/c6000/Vayu.xdc
var Vayu = xdc.useModule('ti.catalog.c6000.Vayu');
module-wide config parameters
    const Vayu.cacheMap// = ICacheInfo.CacheDesc[string] [
        [
            'l1PMode',
            {
                desc: "L1P Cache",
                base: 0x00E00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1PSRAM"
            }
        ],
        [
            'l1DMode',
            {
                desc: "L1D Cache",
                base: 0x00F00000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "4k",
                        0x1000
                    ],
                    [
                        "8k",
                        0x2000
                    ],
                    [
                        "16k",
                        0x4000
                    ],
                    [
                        "32k",
                        0x8000
                    ]
                ],
                defaultValue: "32k",
                memorySection: "L1DSRAM"
            }
        ],
        [
            'l2Mode',
            {
                desc: "L2 Cache",
                base: 0x00800000,
                map: [
                    [
                        "0k",
                        0x0000
                    ],
                    [
                        "32k",
                        0x8000
                    ],
                    [
                        "64k",
                        0x10000
                    ],
                    [
                        "128k",
                        0x020000
                    ],
                    [
                        "256k",
                        0x040000
                    ]
                ],
                defaultValue: "0k",
                memorySection: "L2SRAM"
            }
        ]
    ];
     Vayu.cacheSizeL1// = Long[string] [
        [
            "0k",
            0x0000
        ],
        [
            "4k",
            0x1000
        ],
        [
            "8k",
            0x2000
        ],
        [
            "16k",
            0x4000
        ],
        [
            "32k",
            0x8000
        ]
    ];
     Vayu.cacheSizeL2// = Long[string] [
        [
            "0k",
            0x000000
        ],
        [
            "32k",
            0x008000
        ],
        [
            "64k",
            0x010000
        ],
        [
            "128k",
            0x020000
        ],
        [
            "256k",
            0x040000
        ]
    ];
per-instance config parameters
    var params = new Vayu.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "6600";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 4;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.hdvicp0// = HDVICP2.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "L2SRAM",
                {
                    comment: "256KB L2 SRAM/CACHE",
                    name: "L2SRAM",
                    base: 0x00800000,
                    len: 0x00040000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "L1PSRAM",
                {
                    comment: "32KB RAM/CACHE L1 program memory",
                    name: "L1PSRAM",
                    base: 0x00E00000,
                    len: 0x00008000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "L1DSRAM",
                {
                    comment: "32KB RAM/CACHE L1 data memory",
                    name: "L1DSRAM",
                    base: 0x00F00000,
                    len: 0x00008000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
per-instance creation
    var inst = Vayu.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
config Vayu.cacheMap // module-wide
index URL
Configuration settings
const Vayu.cacheMap = ICacheInfo.CacheDesc[string] [
    [
        'l1PMode',
        {
            desc: "L1P Cache",
            base: 0x00E00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1PSRAM"
        }
    ],
    [
        'l1DMode',
        {
            desc: "L1D Cache",
            base: 0x00F00000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "4k",
                    0x1000
                ],
                [
                    "8k",
                    0x2000
                ],
                [
                    "16k",
                    0x4000
                ],
                [
                    "32k",
                    0x8000
                ]
            ],
            defaultValue: "32k",
            memorySection: "L1DSRAM"
        }
    ],
    [
        'l2Mode',
        {
            desc: "L2 Cache",
            base: 0x00800000,
            map: [
                [
                    "0k",
                    0x0000
                ],
                [
                    "32k",
                    0x8000
                ],
                [
                    "64k",
                    0x10000
                ],
                [
                    "128k",
                    0x020000
                ],
                [
                    "256k",
                    0x040000
                ]
            ],
            defaultValue: "0k",
            memorySection: "L2SRAM"
        }
    ]
];
config Vayu.cacheSizeL1 // module-wide
index URL
Configuration settings
Vayu.cacheSizeL1 = Long[string] [
    [
        "0k",
        0x0000
    ],
    [
        "4k",
        0x1000
    ],
    [
        "8k",
        0x2000
    ],
    [
        "16k",
        0x4000
    ],
    [
        "32k",
        0x8000
    ]
];
config Vayu.cacheSizeL2 // module-wide
index URL
Configuration settings
Vayu.cacheSizeL2 = Long[string] [
    [
        "0k",
        0x000000
    ],
    [
        "32k",
        0x008000
    ],
    [
        "64k",
        0x010000
    ],
    [
        "128k",
        0x020000
    ],
    [
        "256k",
        0x040000
    ]
];
Instance Config Parameters
index URL

Configuration settings
var params = new Vayu.Params;
// Instance config-params object
    params.cpuCore = String "6600";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 4;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.hdvicp0 = HDVICP2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "L2SRAM",
            {
                comment: "256KB L2 SRAM/CACHE",
                name: "L2SRAM",
                base: 0x00800000,
                len: 0x00040000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "L1PSRAM",
            {
                comment: "32KB RAM/CACHE L1 program memory",
                name: "L1PSRAM",
                base: 0x00E00000,
                len: 0x00008000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "L1DSRAM",
            {
                comment: "32KB RAM/CACHE L1 data memory",
                name: "L1DSRAM",
                base: 0x00F00000,
                len: 0x00008000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
config Vayu.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCore = String "6600";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config Vayu.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new Vayu.Params;
...
params.cpuCoreRevision = String "1.0";
config Vayu.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.dataWordSize = Int 4;
config Vayu.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new Vayu.Params;
...
params.deviceHeader = String undefined;
config Vayu.Params.hdvicp0 // instance
index URL
Configuration settings
var params = new Vayu.Params;
...
params.hdvicp0 = HDVICP2.Instance undefined;
config Vayu.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new Vayu.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "L2SRAM",
        {
            comment: "256KB L2 SRAM/CACHE",
            name: "L2SRAM",
            base: 0x00800000,
            len: 0x00040000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "L1PSRAM",
        {
            comment: "32KB RAM/CACHE L1 program memory",
            name: "L1PSRAM",
            base: 0x00E00000,
            len: 0x00008000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "L1DSRAM",
        {
            comment: "32KB RAM/CACHE L1 data memory",
            name: "L1DSRAM",
            base: 0x00F00000,
            len: 0x00008000,
            space: "data",
            access: "RW"
        }
    ]
];
config Vayu.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minDataUnitSize = Int 1;
config Vayu.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new Vayu.Params;
...
params.minProgUnitSize = Int 1;
config Vayu.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new Vayu.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Vayu.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Vayu.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
Vayu.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
Vayu.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:48 GMT


package ti.catalog.msp430
index URL

Package of devices for the msp430 family

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/msp430/package.xdc
requires xdc.platform;
requires ti.catalog;
package ti.catalog.msp430 [1, 0, 0] {
    interface IMSP430;
    // An interface implemented by all MSP430 devices
    module MSP430;
    // Generic MSP430 Cpu definition
}
generated on Sun, 25 Nov 2018 22:19:32 GMT


interface ti.catalog.msp430.IMSP430

metaonly interface ti.catalog.msp430.IMSP430
index URL

An interface implemented by all MSP430 devices

This interface is defined to factor common data about this family into a single place; all MSP430 devices extend this interface.
XDCspec summary sourced in ti/catalog/msp430/IMSP430.xdc
metaonly interface IMSP430 { ...
// inherits ti.catalog.ICpuDataSheet
    // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
package ti.catalog.msp430;
metaonly interface IMSP430 inherits ICpuDataSheet {
instance:
per-instance config parameters
    override config String cpuCore// A string identifying the CPU Core = "MSP430";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
    config Float vcc// Stores current system VCC value in CFG script = 0;
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IMSP430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
override config String cpuCore = "MSP430";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IMSP430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
config String cpuCoreRevision;
config IMSP430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
override config Int dataWordSize = 2;
config IMSP430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
config String deviceHeader;
config IMSP430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
override config Int minDataUnitSize = 1;
config IMSP430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
override config Int minProgUnitSize = 1;
config IMSP430.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
config IPeripheral.Instance peripherals[string];
config IMSP430.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
config Float vcc = 0;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IMSP430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IMSP430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/msp430/IMSP430.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:32 GMT


module ti.catalog.msp430.MSP430

metaonly module ti.catalog.msp430.MSP430
index URL

Generic MSP430 Cpu definition

  • Configuration settings
  • Individual elements
This device represents all MSP430 devices independent from the ISA. The parameter isa is set to a JavaScript regular expression that covers all MSP430 ISAs.
Configuration settings sourced in ti/catalog/msp430/MSP430.xdc
var MSP430 = xdc.useModule('ti.catalog.msp430.MSP430');
per-instance config parameters
    var params = new MSP430.Params// Instance config-params object;
        params.cpuCore// A string identifying the CPU Core = String "MSP430.*";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String undefined;
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 1.8;
per-instance creation
    var inst = MSP430.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430.Params;
// Instance config-params object
    params.cpuCore = String "MSP430.*";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String undefined;
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 1.8;
    // Stores current system VCC value in CFG script
config MSP430.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430.Params;
...
params.cpuCore = String "MSP430.*";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430.Params;
...
params.cpuCoreRevision = String undefined;
config MSP430.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430.Params;
...
params.dataWordSize = Int 2;
config MSP430.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430.Params;
...
params.deviceHeader = String undefined;
config MSP430.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430.Params;
...
params.minDataUnitSize = Int 1;
config MSP430.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430.Params;
...
params.minProgUnitSize = Int 1;
config MSP430.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430.Params;
...
params.vcc = Float 1.8;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:32 GMT


package ti.catalog.msp430.f22xx
index URL

Package of devices for the msp430.f22xx family

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/msp430/f22xx/package.xdc
requires xdc.platform;
requires ti.catalog;
package ti.catalog.msp430.f22xx [1, 0, 0] {
    interface IMSP430x22xx;
    // Common definition for MSP430x22xx devices
    module MSP430F223x;
    // MSP430F223x Cpu definition
    module MSP430F225x;
    // MSP430F225x Cpu definition
    module MSP430F2274;
    // MSP430F2274 Cpu definition
}
generated on Sun, 25 Nov 2018 22:19:33 GMT


interface ti.catalog.msp430.f22xx.IMSP430x22xx

metaonly interface ti.catalog.msp430.f22xx.IMSP430x22xx
index URL

Common definition for MSP430x22xx devices

XDCspec summary sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
metaonly interface IMSP430x22xx { ...
// inherits ti.catalog.msp430.IMSP430
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
package ti.catalog.msp430.f22xx;
metaonly interface IMSP430x22xx inherits IMSP430 {
instance:
per-instance config parameters
    config ADC10.Instance adc10// ;
    config BCSplus.Instance clock// ;
    config IPlatform.Memory commonMap// Memory map elements shared by all MSP430x22xx devices[string] = [
        [
            "PERIPHERALS_8BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_8BIT",
                base: 0x0010,
                len: 0x00F0,
                space: "io",
                access: "RW"
            }
        ],
        [
            "PERIPHERALS_16BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_16BIT",
                base: 0x0100,
                len: 0x0100,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSLSKEY",
            {
                comment: "Boot loader security key",
                name: "BSLSKEY",
                base: 0xFFDE,
                len: 0x0002,
                space: "data",
                access: "RI"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector (int00)",
                name: "INT00",
                base: 0xFFE0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector (int01)",
                name: "INT01",
                base: 0xFFE2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT02",
            {
                comment: "I/O Port P1 Vector (int02)",
                name: "INT02",
                base: 0xFFE4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT03",
            {
                comment: "I/O Port P2 Vector (int03)",
                name: "INT03",
                base: 0xFFE6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector (int04)",
                name: "INT04",
                base: 0xFFE8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT05",
            {
                comment: "ADC10 Vector (int05)",
                name: "INT05",
                base: 0xFFEA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT06",
            {
                comment: "USCI_A0/B0 Transmit Vector (int06)",
                name: "INT06",
                base: 0xFFEC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT07",
            {
                comment: "USCI_A0/B0 Receive Vector (int07)",
                name: "INT07",
                base: 0xFFEE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT08",
            {
                comment: "Timer_A3 TBCCR1 Vector (int08)",
                name: "INT08",
                base: 0xFFF0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT09",
            {
                comment: "Timer_A3 TBCCR0 Vector (int09)",
                name: "INT09",
                base: 0xFFF2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT10",
            {
                comment: "Watchdog Vector (int10)",
                name: "INT10",
                base: 0xFFF4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector (int11)",
                name: "INT11",
                base: 0xFFF6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT12",
            {
                comment: "Timer_B3 TBCCR1 Vector (int12)",
                name: "INT12",
                base: 0xFFF8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT13",
            {
                comment: "Timer_B3 TBCCR0 Vector (int13)",
                name: "INT13",
                base: 0xFFFA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT14",
            {
                comment: "NMI Vector (int14)",
                name: "INT14",
                base: 0xFFFC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector (int15)",
                name: "RESET",
                base: 0xFFFE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "INFO Flash Memory Segment A",
                name: "INFOA",
                base: 0x10C0,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "INFO Flash Memory Segment B",
                name: "INFOB",
                base: 0x1080,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "INFO Flash Memory Segment C",
                name: "INFOC",
                base: 0x1040,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "INFO Flash Memory Segment D",
                name: "INFOD",
                base: 0x1000,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ]
    ];
    override config String cpuCore// A string identifying the CPU Core = "MSP430";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config Flash_2xx.Instance flash// ;
    config GPIO_MSP430F22x4.Instance gpio// ;
    config Interrupt_Controller.Instance interruptController// ;
    config IE1.Instance interruptEnableRegister1// ;
    config IE2.Instance interruptEnableRegister2// ;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config OA_2.Instance oa// ;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
    config Timer_A3.Instance timer_A3// ;
    config Timer_B3.Instance timer_B3// ;
    config USCI_A0_SPI_2xx.Instance usci_A0_SPI// ;
    config USCI_A0_UART_2xx.Instance usci_A0_UART// ;
    config USCI_B0_I2C_2xx.Instance usci_B0_I2C// ;
    config USCI_B0_SPI_2xx.Instance usci_B0_SPI// ;
    config Float vcc// Stores current system VCC value in CFG script = 0;
    config WDTplus.Instance wdtPlus// ;
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IMSP430x22xx.Params.adc10 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config ADC10.Instance adc10;
config IMSP430x22xx.Params.clock // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config BCSplus.Instance clock;
config IMSP430x22xx.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430x22xx devices

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config IPlatform.Memory commonMap[string] = [
    [
        "PERIPHERALS_8BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_8BIT",
            base: 0x0010,
            len: 0x00F0,
            space: "io",
            access: "RW"
        }
    ],
    [
        "PERIPHERALS_16BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_16BIT",
            base: 0x0100,
            len: 0x0100,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSLSKEY",
        {
            comment: "Boot loader security key",
            name: "BSLSKEY",
            base: 0xFFDE,
            len: 0x0002,
            space: "data",
            access: "RI"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector (int00)",
            name: "INT00",
            base: 0xFFE0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector (int01)",
            name: "INT01",
            base: 0xFFE2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT02",
        {
            comment: "I/O Port P1 Vector (int02)",
            name: "INT02",
            base: 0xFFE4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT03",
        {
            comment: "I/O Port P2 Vector (int03)",
            name: "INT03",
            base: 0xFFE6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector (int04)",
            name: "INT04",
            base: 0xFFE8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT05",
        {
            comment: "ADC10 Vector (int05)",
            name: "INT05",
            base: 0xFFEA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT06",
        {
            comment: "USCI_A0/B0 Transmit Vector (int06)",
            name: "INT06",
            base: 0xFFEC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT07",
        {
            comment: "USCI_A0/B0 Receive Vector (int07)",
            name: "INT07",
            base: 0xFFEE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT08",
        {
            comment: "Timer_A3 TBCCR1 Vector (int08)",
            name: "INT08",
            base: 0xFFF0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT09",
        {
            comment: "Timer_A3 TBCCR0 Vector (int09)",
            name: "INT09",
            base: 0xFFF2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT10",
        {
            comment: "Watchdog Vector (int10)",
            name: "INT10",
            base: 0xFFF4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector (int11)",
            name: "INT11",
            base: 0xFFF6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT12",
        {
            comment: "Timer_B3 TBCCR1 Vector (int12)",
            name: "INT12",
            base: 0xFFF8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT13",
        {
            comment: "Timer_B3 TBCCR0 Vector (int13)",
            name: "INT13",
            base: 0xFFFA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT14",
        {
            comment: "NMI Vector (int14)",
            name: "INT14",
            base: 0xFFFC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector (int15)",
            name: "RESET",
            base: 0xFFFE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "INFO Flash Memory Segment A",
            name: "INFOA",
            base: 0x10C0,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "INFO Flash Memory Segment B",
            name: "INFOB",
            base: 0x1080,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "INFO Flash Memory Segment C",
            name: "INFOC",
            base: 0x1040,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "INFO Flash Memory Segment D",
            name: "INFOD",
            base: 0x1000,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ]
];
config IMSP430x22xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
override config String cpuCore = "MSP430";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IMSP430x22xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config String cpuCoreRevision;
config IMSP430x22xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
override config Int dataWordSize = 2;
config IMSP430x22xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config String deviceHeader;
config IMSP430x22xx.Params.flash // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config Flash_2xx.Instance flash;
config IMSP430x22xx.Params.gpio // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config GPIO_MSP430F22x4.Instance gpio;
config IMSP430x22xx.Params.interruptController // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config Interrupt_Controller.Instance interruptController;
config IMSP430x22xx.Params.interruptEnableRegister1 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config IE1.Instance interruptEnableRegister1;
config IMSP430x22xx.Params.interruptEnableRegister2 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config IE2.Instance interruptEnableRegister2;
config IMSP430x22xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
override config Int minDataUnitSize = 1;
config IMSP430x22xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
override config Int minProgUnitSize = 1;
config IMSP430x22xx.Params.oa // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config OA_2.Instance oa;
config IMSP430x22xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config IPeripheral.Instance peripherals[string];
config IMSP430x22xx.Params.timer_A3 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config Timer_A3.Instance timer_A3;
config IMSP430x22xx.Params.timer_B3 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config Timer_B3.Instance timer_B3;
config IMSP430x22xx.Params.usci_A0_SPI // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config USCI_A0_SPI_2xx.Instance usci_A0_SPI;
config IMSP430x22xx.Params.usci_A0_UART // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config USCI_A0_UART_2xx.Instance usci_A0_UART;
config IMSP430x22xx.Params.usci_B0_I2C // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config USCI_B0_I2C_2xx.Instance usci_B0_I2C;
config IMSP430x22xx.Params.usci_B0_SPI // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config USCI_B0_SPI_2xx.Instance usci_B0_SPI;
config IMSP430x22xx.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config Float vcc = 0;
config IMSP430x22xx.Params.wdtPlus // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
config WDTplus.Instance wdtPlus;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IMSP430x22xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IMSP430x22xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/msp430/f22xx/IMSP430x22xx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:32 GMT


module ti.catalog.msp430.f22xx.MSP430F223x

metaonly module ti.catalog.msp430.f22xx.MSP430F223x
index URL

MSP430F223x Cpu definition

  • Configuration settings
  • Individual elements
This device has 8KB + 256B of Flash Memory and 512B RAM. The MSP430F2234 has two op-amps (OA) whereas the MSP430F2232 has none.
Configuration settings sourced in ti/catalog/msp430/f22xx/MSP430F223x.xdc
var MSP430F223x = xdc.useModule('ti.catalog.msp430.f22xx.MSP430F223x');
per-instance config parameters
    var params = new MSP430F223x.Params// Instance config-params object;
        params.adc10// = ADC10.Instance undefined;
        params.clock// = BCSplus.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430x22xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS_8BIT",
                {
                    comment: "Memory mapped I/O registers",
                    name: "PERIPHERALS_8BIT",
                    base: 0x0010,
                    len: 0x00F0,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "PERIPHERALS_16BIT",
                {
                    comment: "Memory mapped I/O registers",
                    name: "PERIPHERALS_16BIT",
                    base: 0x0100,
                    len: 0x0100,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSLSKEY",
                {
                    comment: "Boot loader security key",
                    name: "BSLSKEY",
                    base: 0xFFDE,
                    len: 0x0002,
                    space: "data",
                    access: "RI"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector (int00)",
                    name: "INT00",
                    base: 0xFFE0,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector (int01)",
                    name: "INT01",
                    base: 0xFFE2,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT02",
                {
                    comment: "I/O Port P1 Vector (int02)",
                    name: "INT02",
                    base: 0xFFE4,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT03",
                {
                    comment: "I/O Port P2 Vector (int03)",
                    name: "INT03",
                    base: 0xFFE6,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector (int04)",
                    name: "INT04",
                    base: 0xFFE8,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT05",
                {
                    comment: "ADC10 Vector (int05)",
                    name: "INT05",
                    base: 0xFFEA,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT06",
                {
                    comment: "USCI_A0/B0 Transmit Vector (int06)",
                    name: "INT06",
                    base: 0xFFEC,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT07",
                {
                    comment: "USCI_A0/B0 Receive Vector (int07)",
                    name: "INT07",
                    base: 0xFFEE,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT08",
                {
                    comment: "Timer_A3 TBCCR1 Vector (int08)",
                    name: "INT08",
                    base: 0xFFF0,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT09",
                {
                    comment: "Timer_A3 TBCCR0 Vector (int09)",
                    name: "INT09",
                    base: 0xFFF2,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT10",
                {
                    comment: "Watchdog Vector (int10)",
                    name: "INT10",
                    base: 0xFFF4,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector (int11)",
                    name: "INT11",
                    base: 0xFFF6,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT12",
                {
                    comment: "Timer_B3 TBCCR1 Vector (int12)",
                    name: "INT12",
                    base: 0xFFF8,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT13",
                {
                    comment: "Timer_B3 TBCCR0 Vector (int13)",
                    name: "INT13",
                    base: 0xFFFA,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT14",
                {
                    comment: "NMI Vector (int14)",
                    name: "INT14",
                    base: 0xFFFC,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector (int15)",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOA",
                {
                    comment: "INFO Flash Memory Segment A",
                    name: "INFOA",
                    base: 0x10C0,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOB",
                {
                    comment: "INFO Flash Memory Segment B",
                    name: "INFOB",
                    base: 0x1080,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOC",
                {
                    comment: "INFO Flash Memory Segment C",
                    name: "INFOC",
                    base: 0x1040,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOD",
                {
                    comment: "INFO Flash Memory Segment D",
                    name: "INFOD",
                    base: 0x1000,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String undefined;
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.deviceMap// Device specific memory blocks = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x200,
                    len: 0x200,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0xE000,
                    len: 0x1FDE,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.flash// = Flash_2xx.Instance undefined;
        params.gpio// = GPIO_MSP430F22x4.Instance undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.interruptEnableRegister2// = IE2.Instance undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.oa// = OA_2.Instance undefined;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.timer_A3// = Timer_A3.Instance undefined;
        params.timer_B3// = Timer_B3.Instance undefined;
        params.usci_A0_SPI// = USCI_A0_SPI_2xx.Instance undefined;
        params.usci_A0_UART// = USCI_A0_UART_2xx.Instance undefined;
        params.usci_B0_I2C// = USCI_B0_I2C_2xx.Instance undefined;
        params.usci_B0_SPI// = USCI_B0_SPI_2xx.Instance undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F223x.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F223x.Params;
// Instance config-params object
    params.adc10 = ADC10.Instance undefined;
    //
    params.clock = BCSplus.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430x22xx devices
        [
            "PERIPHERALS_8BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_8BIT",
                base: 0x0010,
                len: 0x00F0,
                space: "io",
                access: "RW"
            }
        ],
        [
            "PERIPHERALS_16BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_16BIT",
                base: 0x0100,
                len: 0x0100,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSLSKEY",
            {
                comment: "Boot loader security key",
                name: "BSLSKEY",
                base: 0xFFDE,
                len: 0x0002,
                space: "data",
                access: "RI"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector (int00)",
                name: "INT00",
                base: 0xFFE0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector (int01)",
                name: "INT01",
                base: 0xFFE2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT02",
            {
                comment: "I/O Port P1 Vector (int02)",
                name: "INT02",
                base: 0xFFE4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT03",
            {
                comment: "I/O Port P2 Vector (int03)",
                name: "INT03",
                base: 0xFFE6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector (int04)",
                name: "INT04",
                base: 0xFFE8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT05",
            {
                comment: "ADC10 Vector (int05)",
                name: "INT05",
                base: 0xFFEA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT06",
            {
                comment: "USCI_A0/B0 Transmit Vector (int06)",
                name: "INT06",
                base: 0xFFEC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT07",
            {
                comment: "USCI_A0/B0 Receive Vector (int07)",
                name: "INT07",
                base: 0xFFEE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT08",
            {
                comment: "Timer_A3 TBCCR1 Vector (int08)",
                name: "INT08",
                base: 0xFFF0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT09",
            {
                comment: "Timer_A3 TBCCR0 Vector (int09)",
                name: "INT09",
                base: 0xFFF2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT10",
            {
                comment: "Watchdog Vector (int10)",
                name: "INT10",
                base: 0xFFF4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector (int11)",
                name: "INT11",
                base: 0xFFF6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT12",
            {
                comment: "Timer_B3 TBCCR1 Vector (int12)",
                name: "INT12",
                base: 0xFFF8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT13",
            {
                comment: "Timer_B3 TBCCR0 Vector (int13)",
                name: "INT13",
                base: 0xFFFA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT14",
            {
                comment: "NMI Vector (int14)",
                name: "INT14",
                base: 0xFFFC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector (int15)",
                name: "RESET",
                base: 0xFFFE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "INFO Flash Memory Segment A",
                name: "INFOA",
                base: 0x10C0,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "INFO Flash Memory Segment B",
                name: "INFOB",
                base: 0x1080,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "INFO Flash Memory Segment C",
                name: "INFOC",
                base: 0x1040,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "INFO Flash Memory Segment D",
                name: "INFOD",
                base: 0x1000,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.cpuCore = String "MSP430";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String undefined;
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.deviceMap = IPlatform.Memory[string] [
    // Device specific memory blocks
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x200,
                len: 0x200,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0xE000,
                len: 0x1FDE,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.flash = Flash_2xx.Instance undefined;
    //
    params.gpio = GPIO_MSP430F22x4.Instance undefined;
    //
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.interruptEnableRegister2 = IE2.Instance undefined;
    //
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.oa = OA_2.Instance undefined;
    //
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.timer_A3 = Timer_A3.Instance undefined;
    //
    params.timer_B3 = Timer_B3.Instance undefined;
    //
    params.usci_A0_SPI = USCI_A0_SPI_2xx.Instance undefined;
    //
    params.usci_A0_UART = USCI_A0_UART_2xx.Instance undefined;
    //
    params.usci_B0_I2C = USCI_B0_I2C_2xx.Instance undefined;
    //
    params.usci_B0_SPI = USCI_B0_SPI_2xx.Instance undefined;
    //
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F223x.Params.adc10 // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.adc10 = ADC10.Instance undefined;
config MSP430F223x.Params.clock // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.clock = BCSplus.Instance undefined;
config MSP430F223x.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430x22xx devices

Configuration settings
var params = new MSP430F223x.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS_8BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_8BIT",
            base: 0x0010,
            len: 0x00F0,
            space: "io",
            access: "RW"
        }
    ],
    [
        "PERIPHERALS_16BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_16BIT",
            base: 0x0100,
            len: 0x0100,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSLSKEY",
        {
            comment: "Boot loader security key",
            name: "BSLSKEY",
            base: 0xFFDE,
            len: 0x0002,
            space: "data",
            access: "RI"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector (int00)",
            name: "INT00",
            base: 0xFFE0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector (int01)",
            name: "INT01",
            base: 0xFFE2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT02",
        {
            comment: "I/O Port P1 Vector (int02)",
            name: "INT02",
            base: 0xFFE4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT03",
        {
            comment: "I/O Port P2 Vector (int03)",
            name: "INT03",
            base: 0xFFE6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector (int04)",
            name: "INT04",
            base: 0xFFE8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT05",
        {
            comment: "ADC10 Vector (int05)",
            name: "INT05",
            base: 0xFFEA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT06",
        {
            comment: "USCI_A0/B0 Transmit Vector (int06)",
            name: "INT06",
            base: 0xFFEC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT07",
        {
            comment: "USCI_A0/B0 Receive Vector (int07)",
            name: "INT07",
            base: 0xFFEE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT08",
        {
            comment: "Timer_A3 TBCCR1 Vector (int08)",
            name: "INT08",
            base: 0xFFF0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT09",
        {
            comment: "Timer_A3 TBCCR0 Vector (int09)",
            name: "INT09",
            base: 0xFFF2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT10",
        {
            comment: "Watchdog Vector (int10)",
            name: "INT10",
            base: 0xFFF4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector (int11)",
            name: "INT11",
            base: 0xFFF6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT12",
        {
            comment: "Timer_B3 TBCCR1 Vector (int12)",
            name: "INT12",
            base: 0xFFF8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT13",
        {
            comment: "Timer_B3 TBCCR0 Vector (int13)",
            name: "INT13",
            base: 0xFFFA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT14",
        {
            comment: "NMI Vector (int14)",
            name: "INT14",
            base: 0xFFFC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector (int15)",
            name: "RESET",
            base: 0xFFFE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "INFO Flash Memory Segment A",
            name: "INFOA",
            base: 0x10C0,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "INFO Flash Memory Segment B",
            name: "INFOB",
            base: 0x1080,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "INFO Flash Memory Segment C",
            name: "INFOC",
            base: 0x1040,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "INFO Flash Memory Segment D",
            name: "INFOD",
            base: 0x1000,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ]
];
config MSP430F223x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F223x.Params;
...
params.cpuCore = String "MSP430";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F223x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F223x.Params;
...
params.cpuCoreRevision = String undefined;
config MSP430F223x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F223x.Params;
...
params.dataWordSize = Int 2;
config MSP430F223x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F223x.Params;
...
params.deviceHeader = String undefined;
config MSP430F223x.Params.deviceMap // instance
index URL

Device specific memory blocks

Configuration settings
var params = new MSP430F223x.Params;
...
params.deviceMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x200,
            len: 0x200,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0xE000,
            len: 0x1FDE,
            space: "code",
            access: "RWX"
        }
    ]
];
DETAILS
This memory together with the common family memory forms the complete memory map retuned by getMemoryMap().
config MSP430F223x.Params.flash // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.flash = Flash_2xx.Instance undefined;
config MSP430F223x.Params.gpio // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.gpio = GPIO_MSP430F22x4.Instance undefined;
config MSP430F223x.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F223x.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F223x.Params.interruptEnableRegister2 // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.interruptEnableRegister2 = IE2.Instance undefined;
config MSP430F223x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F223x.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F223x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F223x.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F223x.Params.oa // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.oa = OA_2.Instance undefined;
config MSP430F223x.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F223x.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F223x.Params.timer_A3 // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.timer_A3 = Timer_A3.Instance undefined;
config MSP430F223x.Params.timer_B3 // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.timer_B3 = Timer_B3.Instance undefined;
config MSP430F223x.Params.usci_A0_SPI // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.usci_A0_SPI = USCI_A0_SPI_2xx.Instance undefined;
config MSP430F223x.Params.usci_A0_UART // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.usci_A0_UART = USCI_A0_UART_2xx.Instance undefined;
config MSP430F223x.Params.usci_B0_I2C // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.usci_B0_I2C = USCI_B0_I2C_2xx.Instance undefined;
config MSP430F223x.Params.usci_B0_SPI // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.usci_B0_SPI = USCI_B0_SPI_2xx.Instance undefined;
config MSP430F223x.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F223x.Params;
...
params.vcc = Float 0;
config MSP430F223x.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F223x.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F223x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F223x.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F223x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F223x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:33 GMT


module ti.catalog.msp430.f22xx.MSP430F225x

metaonly module ti.catalog.msp430.f22xx.MSP430F225x
index URL

MSP430F225x Cpu definition

  • Configuration settings
  • Individual elements
This device has 16KB + 256B of Flash Memory and 512B RAM. The MSP430F2254 has two op-amps (OA) whereas the MSP430F2252 has none.
Configuration settings sourced in ti/catalog/msp430/f22xx/MSP430F225x.xdc
var MSP430F225x = xdc.useModule('ti.catalog.msp430.f22xx.MSP430F225x');
per-instance config parameters
    var params = new MSP430F225x.Params// Instance config-params object;
        params.adc10// = ADC10.Instance undefined;
        params.clock// = BCSplus.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430x22xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS_8BIT",
                {
                    comment: "Memory mapped I/O registers",
                    name: "PERIPHERALS_8BIT",
                    base: 0x0010,
                    len: 0x00F0,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "PERIPHERALS_16BIT",
                {
                    comment: "Memory mapped I/O registers",
                    name: "PERIPHERALS_16BIT",
                    base: 0x0100,
                    len: 0x0100,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSLSKEY",
                {
                    comment: "Boot loader security key",
                    name: "BSLSKEY",
                    base: 0xFFDE,
                    len: 0x0002,
                    space: "data",
                    access: "RI"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector (int00)",
                    name: "INT00",
                    base: 0xFFE0,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector (int01)",
                    name: "INT01",
                    base: 0xFFE2,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT02",
                {
                    comment: "I/O Port P1 Vector (int02)",
                    name: "INT02",
                    base: 0xFFE4,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT03",
                {
                    comment: "I/O Port P2 Vector (int03)",
                    name: "INT03",
                    base: 0xFFE6,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector (int04)",
                    name: "INT04",
                    base: 0xFFE8,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT05",
                {
                    comment: "ADC10 Vector (int05)",
                    name: "INT05",
                    base: 0xFFEA,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT06",
                {
                    comment: "USCI_A0/B0 Transmit Vector (int06)",
                    name: "INT06",
                    base: 0xFFEC,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT07",
                {
                    comment: "USCI_A0/B0 Receive Vector (int07)",
                    name: "INT07",
                    base: 0xFFEE,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT08",
                {
                    comment: "Timer_A3 TBCCR1 Vector (int08)",
                    name: "INT08",
                    base: 0xFFF0,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT09",
                {
                    comment: "Timer_A3 TBCCR0 Vector (int09)",
                    name: "INT09",
                    base: 0xFFF2,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT10",
                {
                    comment: "Watchdog Vector (int10)",
                    name: "INT10",
                    base: 0xFFF4,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector (int11)",
                    name: "INT11",
                    base: 0xFFF6,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT12",
                {
                    comment: "Timer_B3 TBCCR1 Vector (int12)",
                    name: "INT12",
                    base: 0xFFF8,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT13",
                {
                    comment: "Timer_B3 TBCCR0 Vector (int13)",
                    name: "INT13",
                    base: 0xFFFA,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT14",
                {
                    comment: "NMI Vector (int14)",
                    name: "INT14",
                    base: 0xFFFC,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector (int15)",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOA",
                {
                    comment: "INFO Flash Memory Segment A",
                    name: "INFOA",
                    base: 0x10C0,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOB",
                {
                    comment: "INFO Flash Memory Segment B",
                    name: "INFOB",
                    base: 0x1080,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOC",
                {
                    comment: "INFO Flash Memory Segment C",
                    name: "INFOC",
                    base: 0x1040,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOD",
                {
                    comment: "INFO Flash Memory Segment D",
                    name: "INFOD",
                    base: 0x1000,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String undefined;
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.deviceMap// Device specific memory blocks = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x200,
                    len: 0x200,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0xC000,
                    len: 0x3FDE,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.flash// = Flash_2xx.Instance undefined;
        params.gpio// = GPIO_MSP430F22x4.Instance undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.interruptEnableRegister2// = IE2.Instance undefined;
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.oa// = OA_2.Instance undefined;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.timer_A3// = Timer_A3.Instance undefined;
        params.timer_B3// = Timer_B3.Instance undefined;
        params.usci_A0_SPI// = USCI_A0_SPI_2xx.Instance undefined;
        params.usci_A0_UART// = USCI_A0_UART_2xx.Instance undefined;
        params.usci_B0_I2C// = USCI_B0_I2C_2xx.Instance undefined;
        params.usci_B0_SPI// = USCI_B0_SPI_2xx.Instance undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F225x.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F225x.Params;
// Instance config-params object
    params.adc10 = ADC10.Instance undefined;
    //
    params.clock = BCSplus.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430x22xx devices
        [
            "PERIPHERALS_8BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_8BIT",
                base: 0x0010,
                len: 0x00F0,
                space: "io",
                access: "RW"
            }
        ],
        [
            "PERIPHERALS_16BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_16BIT",
                base: 0x0100,
                len: 0x0100,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSLSKEY",
            {
                comment: "Boot loader security key",
                name: "BSLSKEY",
                base: 0xFFDE,
                len: 0x0002,
                space: "data",
                access: "RI"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector (int00)",
                name: "INT00",
                base: 0xFFE0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector (int01)",
                name: "INT01",
                base: 0xFFE2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT02",
            {
                comment: "I/O Port P1 Vector (int02)",
                name: "INT02",
                base: 0xFFE4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT03",
            {
                comment: "I/O Port P2 Vector (int03)",
                name: "INT03",
                base: 0xFFE6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector (int04)",
                name: "INT04",
                base: 0xFFE8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT05",
            {
                comment: "ADC10 Vector (int05)",
                name: "INT05",
                base: 0xFFEA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT06",
            {
                comment: "USCI_A0/B0 Transmit Vector (int06)",
                name: "INT06",
                base: 0xFFEC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT07",
            {
                comment: "USCI_A0/B0 Receive Vector (int07)",
                name: "INT07",
                base: 0xFFEE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT08",
            {
                comment: "Timer_A3 TBCCR1 Vector (int08)",
                name: "INT08",
                base: 0xFFF0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT09",
            {
                comment: "Timer_A3 TBCCR0 Vector (int09)",
                name: "INT09",
                base: 0xFFF2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT10",
            {
                comment: "Watchdog Vector (int10)",
                name: "INT10",
                base: 0xFFF4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector (int11)",
                name: "INT11",
                base: 0xFFF6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT12",
            {
                comment: "Timer_B3 TBCCR1 Vector (int12)",
                name: "INT12",
                base: 0xFFF8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT13",
            {
                comment: "Timer_B3 TBCCR0 Vector (int13)",
                name: "INT13",
                base: 0xFFFA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT14",
            {
                comment: "NMI Vector (int14)",
                name: "INT14",
                base: 0xFFFC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector (int15)",
                name: "RESET",
                base: 0xFFFE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "INFO Flash Memory Segment A",
                name: "INFOA",
                base: 0x10C0,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "INFO Flash Memory Segment B",
                name: "INFOB",
                base: 0x1080,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "INFO Flash Memory Segment C",
                name: "INFOC",
                base: 0x1040,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "INFO Flash Memory Segment D",
                name: "INFOD",
                base: 0x1000,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.cpuCore = String "MSP430";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String undefined;
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.deviceMap = IPlatform.Memory[string] [
    // Device specific memory blocks
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x200,
                len: 0x200,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0xC000,
                len: 0x3FDE,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.flash = Flash_2xx.Instance undefined;
    //
    params.gpio = GPIO_MSP430F22x4.Instance undefined;
    //
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.interruptEnableRegister2 = IE2.Instance undefined;
    //
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.oa = OA_2.Instance undefined;
    //
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.timer_A3 = Timer_A3.Instance undefined;
    //
    params.timer_B3 = Timer_B3.Instance undefined;
    //
    params.usci_A0_SPI = USCI_A0_SPI_2xx.Instance undefined;
    //
    params.usci_A0_UART = USCI_A0_UART_2xx.Instance undefined;
    //
    params.usci_B0_I2C = USCI_B0_I2C_2xx.Instance undefined;
    //
    params.usci_B0_SPI = USCI_B0_SPI_2xx.Instance undefined;
    //
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F225x.Params.adc10 // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.adc10 = ADC10.Instance undefined;
config MSP430F225x.Params.clock // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.clock = BCSplus.Instance undefined;
config MSP430F225x.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430x22xx devices

Configuration settings
var params = new MSP430F225x.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS_8BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_8BIT",
            base: 0x0010,
            len: 0x00F0,
            space: "io",
            access: "RW"
        }
    ],
    [
        "PERIPHERALS_16BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_16BIT",
            base: 0x0100,
            len: 0x0100,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSLSKEY",
        {
            comment: "Boot loader security key",
            name: "BSLSKEY",
            base: 0xFFDE,
            len: 0x0002,
            space: "data",
            access: "RI"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector (int00)",
            name: "INT00",
            base: 0xFFE0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector (int01)",
            name: "INT01",
            base: 0xFFE2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT02",
        {
            comment: "I/O Port P1 Vector (int02)",
            name: "INT02",
            base: 0xFFE4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT03",
        {
            comment: "I/O Port P2 Vector (int03)",
            name: "INT03",
            base: 0xFFE6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector (int04)",
            name: "INT04",
            base: 0xFFE8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT05",
        {
            comment: "ADC10 Vector (int05)",
            name: "INT05",
            base: 0xFFEA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT06",
        {
            comment: "USCI_A0/B0 Transmit Vector (int06)",
            name: "INT06",
            base: 0xFFEC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT07",
        {
            comment: "USCI_A0/B0 Receive Vector (int07)",
            name: "INT07",
            base: 0xFFEE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT08",
        {
            comment: "Timer_A3 TBCCR1 Vector (int08)",
            name: "INT08",
            base: 0xFFF0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT09",
        {
            comment: "Timer_A3 TBCCR0 Vector (int09)",
            name: "INT09",
            base: 0xFFF2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT10",
        {
            comment: "Watchdog Vector (int10)",
            name: "INT10",
            base: 0xFFF4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector (int11)",
            name: "INT11",
            base: 0xFFF6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT12",
        {
            comment: "Timer_B3 TBCCR1 Vector (int12)",
            name: "INT12",
            base: 0xFFF8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT13",
        {
            comment: "Timer_B3 TBCCR0 Vector (int13)",
            name: "INT13",
            base: 0xFFFA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT14",
        {
            comment: "NMI Vector (int14)",
            name: "INT14",
            base: 0xFFFC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector (int15)",
            name: "RESET",
            base: 0xFFFE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "INFO Flash Memory Segment A",
            name: "INFOA",
            base: 0x10C0,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "INFO Flash Memory Segment B",
            name: "INFOB",
            base: 0x1080,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "INFO Flash Memory Segment C",
            name: "INFOC",
            base: 0x1040,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "INFO Flash Memory Segment D",
            name: "INFOD",
            base: 0x1000,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ]
];
config MSP430F225x.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F225x.Params;
...
params.cpuCore = String "MSP430";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F225x.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F225x.Params;
...
params.cpuCoreRevision = String undefined;
config MSP430F225x.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F225x.Params;
...
params.dataWordSize = Int 2;
config MSP430F225x.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F225x.Params;
...
params.deviceHeader = String undefined;
config MSP430F225x.Params.deviceMap // instance
index URL

Device specific memory blocks

Configuration settings
var params = new MSP430F225x.Params;
...
params.deviceMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x200,
            len: 0x200,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0xC000,
            len: 0x3FDE,
            space: "code",
            access: "RWX"
        }
    ]
];
DETAILS
This memory together with the common family memory forms the complete memory map retuned by getMemoryMap().
config MSP430F225x.Params.flash // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.flash = Flash_2xx.Instance undefined;
config MSP430F225x.Params.gpio // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.gpio = GPIO_MSP430F22x4.Instance undefined;
config MSP430F225x.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F225x.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F225x.Params.interruptEnableRegister2 // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.interruptEnableRegister2 = IE2.Instance undefined;
config MSP430F225x.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F225x.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F225x.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F225x.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F225x.Params.oa // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.oa = OA_2.Instance undefined;
config MSP430F225x.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F225x.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F225x.Params.timer_A3 // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.timer_A3 = Timer_A3.Instance undefined;
config MSP430F225x.Params.timer_B3 // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.timer_B3 = Timer_B3.Instance undefined;
config MSP430F225x.Params.usci_A0_SPI // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.usci_A0_SPI = USCI_A0_SPI_2xx.Instance undefined;
config MSP430F225x.Params.usci_A0_UART // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.usci_A0_UART = USCI_A0_UART_2xx.Instance undefined;
config MSP430F225x.Params.usci_B0_I2C // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.usci_B0_I2C = USCI_B0_I2C_2xx.Instance undefined;
config MSP430F225x.Params.usci_B0_SPI // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.usci_B0_SPI = USCI_B0_SPI_2xx.Instance undefined;
config MSP430F225x.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F225x.Params;
...
params.vcc = Float 0;
config MSP430F225x.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F225x.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F225x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F225x.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F225x.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F225x.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:33 GMT


module ti.catalog.msp430.f22xx.MSP430F2274

metaonly module ti.catalog.msp430.f22xx.MSP430F2274
index URL

MSP430F2274 Cpu definition

  • Configuration settings
  • Individual elements
This device has 32KB + 256B of Flash Memory and 1KB RAM. The MSP430F2274 has two op-amps (OA).
Configuration settings sourced in ti/catalog/msp430/f22xx/MSP430F2274.xdc
var MSP430F2274 = xdc.useModule('ti.catalog.msp430.f22xx.MSP430F2274');
per-instance config parameters
    var params = new MSP430F2274.Params// Instance config-params object;
        params.adc10// = ADC10.Instance undefined;
        params.clock// = BCSplus.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430x22xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS_8BIT",
                {
                    comment: "Memory mapped I/O registers",
                    name: "PERIPHERALS_8BIT",
                    base: 0x0010,
                    len: 0x00F0,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "PERIPHERALS_16BIT",
                {
                    comment: "Memory mapped I/O registers",
                    name: "PERIPHERALS_16BIT",
                    base: 0x0100,
                    len: 0x0100,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSLSKEY",
                {
                    comment: "Boot loader security key",
                    name: "BSLSKEY",
                    base: 0xFFDE,
                    len: 0x0002,
                    space: "data",
                    access: "RI"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector (int00)",
                    name: "INT00",
                    base: 0xFFE0,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector (int01)",
                    name: "INT01",
                    base: 0xFFE2,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT02",
                {
                    comment: "I/O Port P1 Vector (int02)",
                    name: "INT02",
                    base: 0xFFE4,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT03",
                {
                    comment: "I/O Port P2 Vector (int03)",
                    name: "INT03",
                    base: 0xFFE6,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector (int04)",
                    name: "INT04",
                    base: 0xFFE8,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT05",
                {
                    comment: "ADC10 Vector (int05)",
                    name: "INT05",
                    base: 0xFFEA,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT06",
                {
                    comment: "USCI_A0/B0 Transmit Vector (int06)",
                    name: "INT06",
                    base: 0xFFEC,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT07",
                {
                    comment: "USCI_A0/B0 Receive Vector (int07)",
                    name: "INT07",
                    base: 0xFFEE,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT08",
                {
                    comment: "Timer_A3 TBCCR1 Vector (int08)",
                    name: "INT08",
                    base: 0xFFF0,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT09",
                {
                    comment: "Timer_A3 TBCCR0 Vector (int09)",
                    name: "INT09",
                    base: 0xFFF2,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT10",
                {
                    comment: "Watchdog Vector (int10)",
                    name: "INT10",
                    base: 0xFFF4,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector (int11)",
                    name: "INT11",
                    base: 0xFFF6,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT12",
                {
                    comment: "Timer_B3 TBCCR1 Vector (int12)",
                    name: "INT12",
                    base: 0xFFF8,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT13",
                {
                    comment: "Timer_B3 TBCCR0 Vector (int13)",
                    name: "INT13",
                    base: 0xFFFA,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT14",
                {
                    comment: "NMI Vector (int14)",
                    name: "INT14",
                    base: 0xFFFC,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector (int15)",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x0002,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOA",
                {
                    comment: "INFO Flash Memory Segment A",
                    name: "INFOA",
                    base: 0x10C0,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOB",
                {
                    comment: "INFO Flash Memory Segment B",
                    name: "INFOB",
                    base: 0x1080,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOC",
                {
                    comment: "INFO Flash Memory Segment C",
                    name: "INFOC",
                    base: 0x1040,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOD",
                {
                    comment: "INFO Flash Memory Segment D",
                    name: "INFOD",
                    base: 0x1000,
                    len: 0x0040,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.flash// = Flash_2xx.Instance undefined;
        params.gpio// = GPIO_MSP430F22x4.Instance undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.interruptEnableRegister2// = IE2.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x200,
                    len: 0x400,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x8000,
                    len: 0x7FDE,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.oa// = OA_2.Instance undefined;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.timer_A3// = Timer_A3.Instance undefined;
        params.timer_B3// = Timer_B3.Instance undefined;
        params.usci_A0_SPI// = USCI_A0_SPI_2xx.Instance undefined;
        params.usci_A0_UART// = USCI_A0_UART_2xx.Instance undefined;
        params.usci_B0_I2C// = USCI_B0_I2C_2xx.Instance undefined;
        params.usci_B0_SPI// = USCI_B0_SPI_2xx.Instance undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F2274.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F2274.Params;
// Instance config-params object
    params.adc10 = ADC10.Instance undefined;
    //
    params.clock = BCSplus.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430x22xx devices
        [
            "PERIPHERALS_8BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_8BIT",
                base: 0x0010,
                len: 0x00F0,
                space: "io",
                access: "RW"
            }
        ],
        [
            "PERIPHERALS_16BIT",
            {
                comment: "Memory mapped I/O registers",
                name: "PERIPHERALS_16BIT",
                base: 0x0100,
                len: 0x0100,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSLSKEY",
            {
                comment: "Boot loader security key",
                name: "BSLSKEY",
                base: 0xFFDE,
                len: 0x0002,
                space: "data",
                access: "RI"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector (int00)",
                name: "INT00",
                base: 0xFFE0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector (int01)",
                name: "INT01",
                base: 0xFFE2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT02",
            {
                comment: "I/O Port P1 Vector (int02)",
                name: "INT02",
                base: 0xFFE4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT03",
            {
                comment: "I/O Port P2 Vector (int03)",
                name: "INT03",
                base: 0xFFE6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector (int04)",
                name: "INT04",
                base: 0xFFE8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT05",
            {
                comment: "ADC10 Vector (int05)",
                name: "INT05",
                base: 0xFFEA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT06",
            {
                comment: "USCI_A0/B0 Transmit Vector (int06)",
                name: "INT06",
                base: 0xFFEC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT07",
            {
                comment: "USCI_A0/B0 Receive Vector (int07)",
                name: "INT07",
                base: 0xFFEE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT08",
            {
                comment: "Timer_A3 TBCCR1 Vector (int08)",
                name: "INT08",
                base: 0xFFF0,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT09",
            {
                comment: "Timer_A3 TBCCR0 Vector (int09)",
                name: "INT09",
                base: 0xFFF2,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT10",
            {
                comment: "Watchdog Vector (int10)",
                name: "INT10",
                base: 0xFFF4,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector (int11)",
                name: "INT11",
                base: 0xFFF6,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT12",
            {
                comment: "Timer_B3 TBCCR1 Vector (int12)",
                name: "INT12",
                base: 0xFFF8,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT13",
            {
                comment: "Timer_B3 TBCCR0 Vector (int13)",
                name: "INT13",
                base: 0xFFFA,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT14",
            {
                comment: "NMI Vector (int14)",
                name: "INT14",
                base: 0xFFFC,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector (int15)",
                name: "RESET",
                base: 0xFFFE,
                len: 0x0002,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "INFO Flash Memory Segment A",
                name: "INFOA",
                base: 0x10C0,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "INFO Flash Memory Segment B",
                name: "INFOB",
                base: 0x1080,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "INFO Flash Memory Segment C",
                name: "INFOC",
                base: 0x1040,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "INFO Flash Memory Segment D",
                name: "INFOD",
                base: 0x1000,
                len: 0x0040,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.cpuCore = String "MSP430";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.flash = Flash_2xx.Instance undefined;
    //
    params.gpio = GPIO_MSP430F22x4.Instance undefined;
    //
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.interruptEnableRegister2 = IE2.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x200,
                len: 0x400,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x8000,
                len: 0x7FDE,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.oa = OA_2.Instance undefined;
    //
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.timer_A3 = Timer_A3.Instance undefined;
    //
    params.timer_B3 = Timer_B3.Instance undefined;
    //
    params.usci_A0_SPI = USCI_A0_SPI_2xx.Instance undefined;
    //
    params.usci_A0_UART = USCI_A0_UART_2xx.Instance undefined;
    //
    params.usci_B0_I2C = USCI_B0_I2C_2xx.Instance undefined;
    //
    params.usci_B0_SPI = USCI_B0_SPI_2xx.Instance undefined;
    //
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F2274.Params.adc10 // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.adc10 = ADC10.Instance undefined;
config MSP430F2274.Params.clock // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.clock = BCSplus.Instance undefined;
config MSP430F2274.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430x22xx devices

Configuration settings
var params = new MSP430F2274.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS_8BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_8BIT",
            base: 0x0010,
            len: 0x00F0,
            space: "io",
            access: "RW"
        }
    ],
    [
        "PERIPHERALS_16BIT",
        {
            comment: "Memory mapped I/O registers",
            name: "PERIPHERALS_16BIT",
            base: 0x0100,
            len: 0x0100,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSLSKEY",
        {
            comment: "Boot loader security key",
            name: "BSLSKEY",
            base: 0xFFDE,
            len: 0x0002,
            space: "data",
            access: "RI"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector (int00)",
            name: "INT00",
            base: 0xFFE0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector (int01)",
            name: "INT01",
            base: 0xFFE2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT02",
        {
            comment: "I/O Port P1 Vector (int02)",
            name: "INT02",
            base: 0xFFE4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT03",
        {
            comment: "I/O Port P2 Vector (int03)",
            name: "INT03",
            base: 0xFFE6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector (int04)",
            name: "INT04",
            base: 0xFFE8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT05",
        {
            comment: "ADC10 Vector (int05)",
            name: "INT05",
            base: 0xFFEA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT06",
        {
            comment: "USCI_A0/B0 Transmit Vector (int06)",
            name: "INT06",
            base: 0xFFEC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT07",
        {
            comment: "USCI_A0/B0 Receive Vector (int07)",
            name: "INT07",
            base: 0xFFEE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT08",
        {
            comment: "Timer_A3 TBCCR1 Vector (int08)",
            name: "INT08",
            base: 0xFFF0,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT09",
        {
            comment: "Timer_A3 TBCCR0 Vector (int09)",
            name: "INT09",
            base: 0xFFF2,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT10",
        {
            comment: "Watchdog Vector (int10)",
            name: "INT10",
            base: 0xFFF4,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector (int11)",
            name: "INT11",
            base: 0xFFF6,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT12",
        {
            comment: "Timer_B3 TBCCR1 Vector (int12)",
            name: "INT12",
            base: 0xFFF8,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT13",
        {
            comment: "Timer_B3 TBCCR0 Vector (int13)",
            name: "INT13",
            base: 0xFFFA,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT14",
        {
            comment: "NMI Vector (int14)",
            name: "INT14",
            base: 0xFFFC,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector (int15)",
            name: "RESET",
            base: 0xFFFE,
            len: 0x0002,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "INFO Flash Memory Segment A",
            name: "INFOA",
            base: 0x10C0,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "INFO Flash Memory Segment B",
            name: "INFOB",
            base: 0x1080,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "INFO Flash Memory Segment C",
            name: "INFOC",
            base: 0x1040,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "INFO Flash Memory Segment D",
            name: "INFOD",
            base: 0x1000,
            len: 0x0040,
            space: "data",
            access: "RW"
        }
    ]
];
config MSP430F2274.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F2274.Params;
...
params.cpuCore = String "MSP430";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F2274.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F2274.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F2274.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F2274.Params;
...
params.dataWordSize = Int 2;
config MSP430F2274.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F2274.Params;
...
params.deviceHeader = String undefined;
config MSP430F2274.Params.flash // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.flash = Flash_2xx.Instance undefined;
config MSP430F2274.Params.gpio // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.gpio = GPIO_MSP430F22x4.Instance undefined;
config MSP430F2274.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F2274.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F2274.Params.interruptEnableRegister2 // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.interruptEnableRegister2 = IE2.Instance undefined;
config MSP430F2274.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F2274.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x200,
            len: 0x400,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x8000,
            len: 0x7FDE,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F2274.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F2274.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F2274.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F2274.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F2274.Params.oa // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.oa = OA_2.Instance undefined;
config MSP430F2274.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F2274.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F2274.Params.timer_A3 // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.timer_A3 = Timer_A3.Instance undefined;
config MSP430F2274.Params.timer_B3 // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.timer_B3 = Timer_B3.Instance undefined;
config MSP430F2274.Params.usci_A0_SPI // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.usci_A0_SPI = USCI_A0_SPI_2xx.Instance undefined;
config MSP430F2274.Params.usci_A0_UART // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.usci_A0_UART = USCI_A0_UART_2xx.Instance undefined;
config MSP430F2274.Params.usci_B0_I2C // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.usci_B0_I2C = USCI_B0_I2C_2xx.Instance undefined;
config MSP430F2274.Params.usci_B0_SPI // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.usci_B0_SPI = USCI_B0_SPI_2xx.Instance undefined;
config MSP430F2274.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F2274.Params;
...
params.vcc = Float 0;
config MSP430F2274.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F2274.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F2274.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F2274.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F2274.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F2274.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:33 GMT


package ti.catalog.msp430.f54xx
index URL

Package of devices for the msp430.f54xx family

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/msp430/f54xx/package.xdc
requires xdc.platform;
requires ti.catalog;
package ti.catalog.msp430.f54xx [1, 0, 0] {
    interface IMSP430F54xx;
    module MSP430F5418;
    // MSP430F5418 CPU definition
    module MSP430F5419;
    // MSP430F5419 CPU definition
    module MSP430F5435;
    // MSP430F5435 CPU definition
    module MSP430F5436;
    // MSP430F5436 CPU definition
    module MSP430F5437;
    // MSP430F5437 CPU definition
    module MSP430F5438;
    // MSP430F5438 CPU definition
}
generated on Sun, 25 Nov 2018 22:20:25 GMT


interface ti.catalog.msp430.f54xx.IMSP430F54xx

metaonly interface ti.catalog.msp430.f54xx.IMSP430F54xx
index URL
XDCspec summary sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
metaonly interface IMSP430F54xx { ...
// inherits ti.catalog.msp430.IMSP430
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
package ti.catalog.msp430.f54xx;
metaonly interface IMSP430F54xx inherits IMSP430 {
instance:
per-instance config parameters
    config Timer0_A5.Instance TA0// ;
    config Timer1_A3.Instance TA1// ;
    config Timer0_B7.Instance TB0// ;
    config IPlatform.Memory commonMap// Memory map elements shared by all MSP430F54xx devices[string] = [
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFO",
            {
                comment: "Information memory (flash)",
                name: "INFO",
                base: 0x1800,
                len: 0x200,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "USCI_B3 Receive/Transmit Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "USCI_A3 Receive/Transmit Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USCI_B2 Receive/Transmit Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "USCI_A2 Receive/Transmit Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "ADC12_A Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    override config String cpuCore// A string identifying the CPU Core = "MSP430X";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config Interrupt_Controller.Instance interruptController// ;
    config IE1.Instance interruptEnableRegister1// ;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
    config Float vcc// Stores current system VCC value in CFG script = 0;
    config WDTplus.Instance wdtPlus// ;
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IMSP430F54xx.Params.TA0 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config Timer0_A5.Instance TA0;
config IMSP430F54xx.Params.TA1 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config Timer1_A3.Instance TA1;
config IMSP430F54xx.Params.TB0 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config Timer0_B7.Instance TB0;
config IMSP430F54xx.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F54xx devices

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config IPlatform.Memory commonMap[string] = [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFO",
        {
            comment: "Information memory (flash)",
            name: "INFO",
            base: 0x1800,
            len: 0x200,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "USCI_B3 Receive/Transmit Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "USCI_A3 Receive/Transmit Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USCI_B2 Receive/Transmit Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "USCI_A2 Receive/Transmit Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "ADC12_A Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config IMSP430F54xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
override config String cpuCore = "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IMSP430F54xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config String cpuCoreRevision;
config IMSP430F54xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
override config Int dataWordSize = 2;
config IMSP430F54xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config String deviceHeader;
config IMSP430F54xx.Params.interruptController // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config Interrupt_Controller.Instance interruptController;
config IMSP430F54xx.Params.interruptEnableRegister1 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config IE1.Instance interruptEnableRegister1;
config IMSP430F54xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
override config Int minDataUnitSize = 1;
config IMSP430F54xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
override config Int minProgUnitSize = 1;
config IMSP430F54xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config IPeripheral.Instance peripherals[string];
config IMSP430F54xx.Params.vcc // instance
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Stores current system VCC value in CFG script

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config Float vcc = 0;
config IMSP430F54xx.Params.wdtPlus // instance
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XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
config WDTplus.Instance wdtPlus;
Static Instance Creation
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XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IMSP430F54xx.getMemoryMap() // instance
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Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IMSP430F54xx.getRegisterSet() // instance
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The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/msp430/f54xx/IMSP430F54xx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:22 GMT


module ti.catalog.msp430.f54xx.MSP430F5418

metaonly module ti.catalog.msp430.f54xx.MSP430F5418
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MSP430F5418 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f54xx/MSP430F5418.xdc
var MSP430F5418 = xdc.useModule('ti.catalog.msp430.f54xx.MSP430F5418');
per-instance config parameters
    var params = new MSP430F5418.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F54xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFO",
                {
                    comment: "Information memory (flash)",
                    name: "INFO",
                    base: 0x1800,
                    len: 0x200,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "USCI_B3 Receive/Transmit Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "USCI_A3 Receive/Transmit Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USCI_B2 Receive/Transmit Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "USCI_A2 Receive/Transmit Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "ADC12_A Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x1C00,
                    len: 0x4000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x5C00,
                    len: 0xA380,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH2",
                {
                    comment: "Extended Program FLASH",
                    name: "FLASH2",
                    base: 0x10000,
                    len: 0x15C00,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F5418.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F5418.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F54xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFO",
            {
                comment: "Information memory (flash)",
                name: "INFO",
                base: 0x1800,
                len: 0x200,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "USCI_B3 Receive/Transmit Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "USCI_A3 Receive/Transmit Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USCI_B2 Receive/Transmit Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "USCI_A2 Receive/Transmit Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "ADC12_A Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x1C00,
                len: 0x4000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x5C00,
                len: 0xA380,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH2",
            {
                comment: "Extended Program FLASH",
                name: "FLASH2",
                base: 0x10000,
                len: 0x15C00,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F5418.Params.TA0 // instance
index URL
Configuration settings
var params = new MSP430F5418.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config MSP430F5418.Params.TA1 // instance
index URL
Configuration settings
var params = new MSP430F5418.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config MSP430F5418.Params.TB0 // instance
index URL
Configuration settings
var params = new MSP430F5418.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config MSP430F5418.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F54xx devices

Configuration settings
var params = new MSP430F5418.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFO",
        {
            comment: "Information memory (flash)",
            name: "INFO",
            base: 0x1800,
            len: 0x200,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "USCI_B3 Receive/Transmit Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "USCI_A3 Receive/Transmit Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USCI_B2 Receive/Transmit Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "USCI_A2 Receive/Transmit Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "ADC12_A Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config MSP430F5418.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F5418.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F5418.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F5418.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F5418.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F5418.Params;
...
params.dataWordSize = Int 2;
config MSP430F5418.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F5418.Params;
...
params.deviceHeader = String undefined;
config MSP430F5418.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F5418.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F5418.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F5418.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F5418.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F5418.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x1C00,
            len: 0x4000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x5C00,
            len: 0xA380,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH2",
        {
            comment: "Extended Program FLASH",
            name: "FLASH2",
            base: 0x10000,
            len: 0x15C00,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F5418.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5418.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F5418.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5418.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F5418.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F5418.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F5418.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F5418.Params;
...
params.vcc = Float 0;
config MSP430F5418.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F5418.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F5418.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F5418.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F5418.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F5418.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:23 GMT


module ti.catalog.msp430.f54xx.MSP430F5419

metaonly module ti.catalog.msp430.f54xx.MSP430F5419
index URL

MSP430F5419 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f54xx/MSP430F5419.xdc
var MSP430F5419 = xdc.useModule('ti.catalog.msp430.f54xx.MSP430F5419');
per-instance config parameters
    var params = new MSP430F5419.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F54xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFO",
                {
                    comment: "Information memory (flash)",
                    name: "INFO",
                    base: 0x1800,
                    len: 0x200,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "USCI_B3 Receive/Transmit Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "USCI_A3 Receive/Transmit Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USCI_B2 Receive/Transmit Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "USCI_A2 Receive/Transmit Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "ADC12_A Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x1C00,
                    len: 0x4000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x5C00,
                    len: 0xA380,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH2",
                {
                    comment: "Extended Program FLASH",
                    name: "FLASH2",
                    base: 0x10000,
                    len: 0x15C00,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F5419.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F5419.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F54xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFO",
            {
                comment: "Information memory (flash)",
                name: "INFO",
                base: 0x1800,
                len: 0x200,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "USCI_B3 Receive/Transmit Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "USCI_A3 Receive/Transmit Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USCI_B2 Receive/Transmit Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "USCI_A2 Receive/Transmit Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "ADC12_A Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x1C00,
                len: 0x4000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x5C00,
                len: 0xA380,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH2",
            {
                comment: "Extended Program FLASH",
                name: "FLASH2",
                base: 0x10000,
                len: 0x15C00,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F5419.Params.TA0 // instance
index URL
Configuration settings
var params = new MSP430F5419.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config MSP430F5419.Params.TA1 // instance
index URL
Configuration settings
var params = new MSP430F5419.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config MSP430F5419.Params.TB0 // instance
index URL
Configuration settings
var params = new MSP430F5419.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config MSP430F5419.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F54xx devices

Configuration settings
var params = new MSP430F5419.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFO",
        {
            comment: "Information memory (flash)",
            name: "INFO",
            base: 0x1800,
            len: 0x200,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "USCI_B3 Receive/Transmit Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "USCI_A3 Receive/Transmit Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USCI_B2 Receive/Transmit Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "USCI_A2 Receive/Transmit Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "ADC12_A Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config MSP430F5419.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F5419.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F5419.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F5419.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F5419.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F5419.Params;
...
params.dataWordSize = Int 2;
config MSP430F5419.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F5419.Params;
...
params.deviceHeader = String undefined;
config MSP430F5419.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F5419.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F5419.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F5419.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F5419.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F5419.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x1C00,
            len: 0x4000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x5C00,
            len: 0xA380,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH2",
        {
            comment: "Extended Program FLASH",
            name: "FLASH2",
            base: 0x10000,
            len: 0x15C00,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F5419.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5419.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F5419.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5419.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F5419.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F5419.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F5419.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F5419.Params;
...
params.vcc = Float 0;
config MSP430F5419.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F5419.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F5419.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F5419.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F5419.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F5419.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:23 GMT


module ti.catalog.msp430.f54xx.MSP430F5435

metaonly module ti.catalog.msp430.f54xx.MSP430F5435
index URL

MSP430F5435 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f54xx/MSP430F5435.xdc
var MSP430F5435 = xdc.useModule('ti.catalog.msp430.f54xx.MSP430F5435');
per-instance config parameters
    var params = new MSP430F5435.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F54xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFO",
                {
                    comment: "Information memory (flash)",
                    name: "INFO",
                    base: 0x1800,
                    len: 0x200,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "USCI_B3 Receive/Transmit Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "USCI_A3 Receive/Transmit Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USCI_B2 Receive/Transmit Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "USCI_A2 Receive/Transmit Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "ADC12_A Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x1C00,
                    len: 0x4000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x5C00,
                    len: 0xA380,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH2",
                {
                    comment: "Extended Program FLASH",
                    name: "FLASH2",
                    base: 0x10000,
                    len: 0x25C00,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F5435.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F5435.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F54xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFO",
            {
                comment: "Information memory (flash)",
                name: "INFO",
                base: 0x1800,
                len: 0x200,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "USCI_B3 Receive/Transmit Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "USCI_A3 Receive/Transmit Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USCI_B2 Receive/Transmit Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "USCI_A2 Receive/Transmit Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "ADC12_A Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x1C00,
                len: 0x4000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x5C00,
                len: 0xA380,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH2",
            {
                comment: "Extended Program FLASH",
                name: "FLASH2",
                base: 0x10000,
                len: 0x25C00,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F5435.Params.TA0 // instance
index URL
Configuration settings
var params = new MSP430F5435.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config MSP430F5435.Params.TA1 // instance
index URL
Configuration settings
var params = new MSP430F5435.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config MSP430F5435.Params.TB0 // instance
index URL
Configuration settings
var params = new MSP430F5435.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config MSP430F5435.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F54xx devices

Configuration settings
var params = new MSP430F5435.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFO",
        {
            comment: "Information memory (flash)",
            name: "INFO",
            base: 0x1800,
            len: 0x200,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "USCI_B3 Receive/Transmit Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "USCI_A3 Receive/Transmit Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USCI_B2 Receive/Transmit Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "USCI_A2 Receive/Transmit Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "ADC12_A Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config MSP430F5435.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F5435.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F5435.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F5435.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F5435.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F5435.Params;
...
params.dataWordSize = Int 2;
config MSP430F5435.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F5435.Params;
...
params.deviceHeader = String undefined;
config MSP430F5435.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F5435.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F5435.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F5435.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F5435.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F5435.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x1C00,
            len: 0x4000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x5C00,
            len: 0xA380,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH2",
        {
            comment: "Extended Program FLASH",
            name: "FLASH2",
            base: 0x10000,
            len: 0x25C00,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F5435.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5435.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F5435.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5435.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F5435.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F5435.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F5435.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F5435.Params;
...
params.vcc = Float 0;
config MSP430F5435.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F5435.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F5435.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F5435.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F5435.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F5435.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:23 GMT


module ti.catalog.msp430.f54xx.MSP430F5436

metaonly module ti.catalog.msp430.f54xx.MSP430F5436
index URL

MSP430F5436 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f54xx/MSP430F5436.xdc
var MSP430F5436 = xdc.useModule('ti.catalog.msp430.f54xx.MSP430F5436');
per-instance config parameters
    var params = new MSP430F5436.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F54xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFO",
                {
                    comment: "Information memory (flash)",
                    name: "INFO",
                    base: 0x1800,
                    len: 0x200,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "USCI_B3 Receive/Transmit Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "USCI_A3 Receive/Transmit Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USCI_B2 Receive/Transmit Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "USCI_A2 Receive/Transmit Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "ADC12_A Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x1C00,
                    len: 0x4000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x5C00,
                    len: 0xA380,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH2",
                {
                    comment: "Extended Program FLASH",
                    name: "FLASH2",
                    base: 0x10000,
                    len: 0x25C00,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F5436.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F5436.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F54xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFO",
            {
                comment: "Information memory (flash)",
                name: "INFO",
                base: 0x1800,
                len: 0x200,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "USCI_B3 Receive/Transmit Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "USCI_A3 Receive/Transmit Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USCI_B2 Receive/Transmit Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "USCI_A2 Receive/Transmit Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "ADC12_A Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x1C00,
                len: 0x4000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x5C00,
                len: 0xA380,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH2",
            {
                comment: "Extended Program FLASH",
                name: "FLASH2",
                base: 0x10000,
                len: 0x25C00,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F5436.Params.TA0 // instance
index URL
Configuration settings
var params = new MSP430F5436.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config MSP430F5436.Params.TA1 // instance
index URL
Configuration settings
var params = new MSP430F5436.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config MSP430F5436.Params.TB0 // instance
index URL
Configuration settings
var params = new MSP430F5436.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config MSP430F5436.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F54xx devices

Configuration settings
var params = new MSP430F5436.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFO",
        {
            comment: "Information memory (flash)",
            name: "INFO",
            base: 0x1800,
            len: 0x200,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "USCI_B3 Receive/Transmit Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "USCI_A3 Receive/Transmit Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USCI_B2 Receive/Transmit Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "USCI_A2 Receive/Transmit Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "ADC12_A Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config MSP430F5436.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F5436.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F5436.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F5436.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F5436.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F5436.Params;
...
params.dataWordSize = Int 2;
config MSP430F5436.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F5436.Params;
...
params.deviceHeader = String undefined;
config MSP430F5436.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F5436.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F5436.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F5436.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F5436.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F5436.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x1C00,
            len: 0x4000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x5C00,
            len: 0xA380,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH2",
        {
            comment: "Extended Program FLASH",
            name: "FLASH2",
            base: 0x10000,
            len: 0x25C00,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F5436.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5436.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F5436.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5436.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F5436.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F5436.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F5436.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F5436.Params;
...
params.vcc = Float 0;
config MSP430F5436.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F5436.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F5436.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F5436.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F5436.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F5436.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:24 GMT


module ti.catalog.msp430.f54xx.MSP430F5437

metaonly module ti.catalog.msp430.f54xx.MSP430F5437
index URL

MSP430F5437 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f54xx/MSP430F5437.xdc
var MSP430F5437 = xdc.useModule('ti.catalog.msp430.f54xx.MSP430F5437');
per-instance config parameters
    var params = new MSP430F5437.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F54xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFO",
                {
                    comment: "Information memory (flash)",
                    name: "INFO",
                    base: 0x1800,
                    len: 0x200,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "USCI_B3 Receive/Transmit Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "USCI_A3 Receive/Transmit Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USCI_B2 Receive/Transmit Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "USCI_A2 Receive/Transmit Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "ADC12_A Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x1C00,
                    len: 0x4000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x5C00,
                    len: 0xA380,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH2",
                {
                    comment: "Extended Program FLASH",
                    name: "FLASH2",
                    base: 0x10000,
                    len: 0x35C00,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F5437.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F5437.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F54xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFO",
            {
                comment: "Information memory (flash)",
                name: "INFO",
                base: 0x1800,
                len: 0x200,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "USCI_B3 Receive/Transmit Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "USCI_A3 Receive/Transmit Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USCI_B2 Receive/Transmit Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "USCI_A2 Receive/Transmit Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "ADC12_A Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x1C00,
                len: 0x4000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x5C00,
                len: 0xA380,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH2",
            {
                comment: "Extended Program FLASH",
                name: "FLASH2",
                base: 0x10000,
                len: 0x35C00,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F5437.Params.TA0 // instance
index URL
Configuration settings
var params = new MSP430F5437.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config MSP430F5437.Params.TA1 // instance
index URL
Configuration settings
var params = new MSP430F5437.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config MSP430F5437.Params.TB0 // instance
index URL
Configuration settings
var params = new MSP430F5437.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config MSP430F5437.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F54xx devices

Configuration settings
var params = new MSP430F5437.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFO",
        {
            comment: "Information memory (flash)",
            name: "INFO",
            base: 0x1800,
            len: 0x200,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "USCI_B3 Receive/Transmit Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "USCI_A3 Receive/Transmit Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USCI_B2 Receive/Transmit Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "USCI_A2 Receive/Transmit Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "ADC12_A Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config MSP430F5437.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F5437.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F5437.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F5437.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F5437.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F5437.Params;
...
params.dataWordSize = Int 2;
config MSP430F5437.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F5437.Params;
...
params.deviceHeader = String undefined;
config MSP430F5437.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F5437.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F5437.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F5437.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F5437.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F5437.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x1C00,
            len: 0x4000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x5C00,
            len: 0xA380,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH2",
        {
            comment: "Extended Program FLASH",
            name: "FLASH2",
            base: 0x10000,
            len: 0x35C00,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F5437.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5437.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F5437.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5437.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F5437.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F5437.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F5437.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F5437.Params;
...
params.vcc = Float 0;
config MSP430F5437.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F5437.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F5437.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F5437.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F5437.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F5437.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:24 GMT


module ti.catalog.msp430.f54xx.MSP430F5438

metaonly module ti.catalog.msp430.f54xx.MSP430F5438
index URL

MSP430F5438 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f54xx/MSP430F5438.xdc
var MSP430F5438 = xdc.useModule('ti.catalog.msp430.f54xx.MSP430F5438');
per-instance config parameters
    var params = new MSP430F5438.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F54xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFO",
                {
                    comment: "Information memory (flash)",
                    name: "INFO",
                    base: 0x1800,
                    len: 0x200,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "USCI_B3 Receive/Transmit Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "USCI_A3 Receive/Transmit Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USCI_B2 Receive/Transmit Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "USCI_A2 Receive/Transmit Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "ADC12_A Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x1C00,
                    len: 0x4000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x5C00,
                    len: 0xA380,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH2",
                {
                    comment: "Extended Program FLASH",
                    name: "FLASH2",
                    base: 0x10000,
                    len: 0x35C00,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F5438.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F5438.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F54xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFO",
            {
                comment: "Information memory (flash)",
                name: "INFO",
                base: 0x1800,
                len: 0x200,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "USCI_B3 Receive/Transmit Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "USCI_A3 Receive/Transmit Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USCI_B2 Receive/Transmit Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "USCI_A2 Receive/Transmit Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "ADC12_A Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x1C00,
                len: 0x4000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x5C00,
                len: 0xA380,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH2",
            {
                comment: "Extended Program FLASH",
                name: "FLASH2",
                base: 0x10000,
                len: 0x35C00,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F5438.Params.TA0 // instance
index URL
Configuration settings
var params = new MSP430F5438.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config MSP430F5438.Params.TA1 // instance
index URL
Configuration settings
var params = new MSP430F5438.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config MSP430F5438.Params.TB0 // instance
index URL
Configuration settings
var params = new MSP430F5438.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config MSP430F5438.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F54xx devices

Configuration settings
var params = new MSP430F5438.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFO",
        {
            comment: "Information memory (flash)",
            name: "INFO",
            base: 0x1800,
            len: 0x200,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "USCI_B3 Receive/Transmit Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "USCI_A3 Receive/Transmit Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USCI_B2 Receive/Transmit Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "USCI_A2 Receive/Transmit Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "ADC12_A Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config MSP430F5438.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F5438.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F5438.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F5438.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F5438.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F5438.Params;
...
params.dataWordSize = Int 2;
config MSP430F5438.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F5438.Params;
...
params.deviceHeader = String undefined;
config MSP430F5438.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F5438.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F5438.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F5438.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F5438.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F5438.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x1C00,
            len: 0x4000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x5C00,
            len: 0xA380,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH2",
        {
            comment: "Extended Program FLASH",
            name: "FLASH2",
            base: 0x10000,
            len: 0x35C00,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F5438.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5438.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F5438.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5438.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F5438.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F5438.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F5438.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F5438.Params;
...
params.vcc = Float 0;
config MSP430F5438.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F5438.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F5438.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F5438.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F5438.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F5438.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:25 GMT


package ti.catalog.msp430.f55xx
index URL

Package of devices for the msp430.f55xx family

Each module in this package implements the xdc.platform.ICpuDataSheet interface. This interface is used by platforms (modules that implement xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
XDCspec declarations sourced in ti/catalog/msp430/f55xx/package.xdc
requires xdc.platform;
requires ti.catalog;
package ti.catalog.msp430.f55xx [1, 0, 0] {
    interface IMSP430F55xx;
    module CC430F6137;
    // CC430F6137 CPU definition
    module MSP430F5529;
    // MSP430F5529 CPU definition
}
generated on Sun, 25 Nov 2018 22:20:21 GMT


module ti.catalog.msp430.f55xx.CC430F6137

metaonly module ti.catalog.msp430.f55xx.CC430F6137
index URL

CC430F6137 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f55xx/CC430F6137.xdc
var CC430F6137 = xdc.useModule('ti.catalog.msp430.f55xx.CC430F6137');
per-instance config parameters
    var params = new CC430F6137.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TA2// = Timer2_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F55xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFOD",
                {
                    comment: "Information Memory D (flash)",
                    name: "INFOD",
                    base: 0x1800,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOC",
                {
                    comment: "Information Memory C (flash)",
                    name: "INFOC",
                    base: 0x1880,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOB",
                {
                    comment: "Information Memory B (flash)",
                    name: "INFOB",
                    base: 0x1900,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOA",
                {
                    comment: "Information Memory A (flash)",
                    name: "INFOA",
                    base: 0x1980,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "TA2 CCR1-CCR2 Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "TA2 CCR0 Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USB_UBM Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "ADC12_A Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "Comp_B Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x1C00,
                    len: 0x1000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x8000,
                    len: 0x7F80,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = CC430F6137.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new CC430F6137.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TA2 = Timer2_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F55xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "Information Memory D (flash)",
                name: "INFOD",
                base: 0x1800,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "Information Memory C (flash)",
                name: "INFOC",
                base: 0x1880,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "Information Memory B (flash)",
                name: "INFOB",
                base: 0x1900,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "Information Memory A (flash)",
                name: "INFOA",
                base: 0x1980,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "TA2 CCR1-CCR2 Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "TA2 CCR0 Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USB_UBM Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "ADC12_A Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "Comp_B Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x1C00,
                len: 0x1000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x8000,
                len: 0x7F80,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config CC430F6137.Params.TA0 // instance
index URL
Configuration settings
var params = new CC430F6137.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config CC430F6137.Params.TA1 // instance
index URL
Configuration settings
var params = new CC430F6137.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config CC430F6137.Params.TA2 // instance
index URL
Configuration settings
var params = new CC430F6137.Params;
...
params.TA2 = Timer2_A3.Instance undefined;
config CC430F6137.Params.TB0 // instance
index URL
Configuration settings
var params = new CC430F6137.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config CC430F6137.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F55xx devices

Configuration settings
var params = new CC430F6137.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "Information Memory D (flash)",
            name: "INFOD",
            base: 0x1800,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "Information Memory C (flash)",
            name: "INFOC",
            base: 0x1880,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "Information Memory B (flash)",
            name: "INFOB",
            base: 0x1900,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "Information Memory A (flash)",
            name: "INFOA",
            base: 0x1980,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "TA2 CCR1-CCR2 Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "TA2 CCR0 Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USB_UBM Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "ADC12_A Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "Comp_B Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config CC430F6137.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new CC430F6137.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config CC430F6137.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new CC430F6137.Params;
...
params.cpuCoreRevision = String "1.0";
config CC430F6137.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new CC430F6137.Params;
...
params.dataWordSize = Int 2;
config CC430F6137.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new CC430F6137.Params;
...
params.deviceHeader = String undefined;
config CC430F6137.Params.interruptController // instance
index URL
Configuration settings
var params = new CC430F6137.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config CC430F6137.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new CC430F6137.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config CC430F6137.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new CC430F6137.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x1C00,
            len: 0x1000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x8000,
            len: 0x7F80,
            space: "code",
            access: "RWX"
        }
    ]
];
config CC430F6137.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new CC430F6137.Params;
...
params.minDataUnitSize = Int 1;
config CC430F6137.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new CC430F6137.Params;
...
params.minProgUnitSize = Int 1;
config CC430F6137.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new CC430F6137.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config CC430F6137.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new CC430F6137.Params;
...
params.vcc = Float 0;
config CC430F6137.Params.wdtPlus // instance
index URL
Configuration settings
var params = new CC430F6137.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new CC430F6137.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = CC430F6137.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
CC430F6137.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
CC430F6137.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:21 GMT


interface ti.catalog.msp430.f55xx.IMSP430F55xx

metaonly interface ti.catalog.msp430.f55xx.IMSP430F55xx
index URL
XDCspec summary sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
metaonly interface IMSP430F55xx { ...
// inherits ti.catalog.msp430.IMSP430
    // inherits ti.catalog.ICpuDataSheet
        // inherits xdc.platform.ICpuDataSheet
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
package ti.catalog.msp430.f55xx;
metaonly interface IMSP430F55xx inherits IMSP430 {
instance:
per-instance config parameters
    config Timer0_A5.Instance TA0// ;
    config Timer1_A3.Instance TA1// ;
    config Timer2_A3.Instance TA2// ;
    config Timer0_B7.Instance TB0// ;
    config IPlatform.Memory commonMap// Memory map elements shared by all MSP430F55xx devices[string] = [
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "Information Memory D (flash)",
                name: "INFOD",
                base: 0x1800,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "Information Memory C (flash)",
                name: "INFOC",
                base: 0x1880,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "Information Memory B (flash)",
                name: "INFOB",
                base: 0x1900,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "Information Memory A (flash)",
                name: "INFOA",
                base: 0x1980,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "TA2 CCR1-CCR2 Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "TA2 CCR0 Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USB_UBM Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "ADC12_A Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "Comp_B Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    override config String cpuCore// A string identifying the CPU Core = "MSP430X";
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    override config Int dataWordSize// The size of an int on the target in 8-bit bytes = 2;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config Interrupt_Controller.Instance interruptController// ;
    config IE1.Instance interruptEnableRegister1// ;
    override config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = 1;
    override config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = 1;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
    config Float vcc// Stores current system VCC value in CFG script = 0;
    config WDTplus.Instance wdtPlus// ;
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
config IMSP430F55xx.Params.TA0 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config Timer0_A5.Instance TA0;
config IMSP430F55xx.Params.TA1 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config Timer1_A3.Instance TA1;
config IMSP430F55xx.Params.TA2 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config Timer2_A3.Instance TA2;
config IMSP430F55xx.Params.TB0 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config Timer0_B7.Instance TB0;
config IMSP430F55xx.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F55xx devices

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config IPlatform.Memory commonMap[string] = [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "Information Memory D (flash)",
            name: "INFOD",
            base: 0x1800,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "Information Memory C (flash)",
            name: "INFOC",
            base: 0x1880,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "Information Memory B (flash)",
            name: "INFOB",
            base: 0x1900,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "Information Memory A (flash)",
            name: "INFOA",
            base: 0x1980,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "TA2 CCR1-CCR2 Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "TA2 CCR0 Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USB_UBM Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "ADC12_A Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "Comp_B Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config IMSP430F55xx.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
override config String cpuCore = "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config IMSP430F55xx.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config String cpuCoreRevision;
config IMSP430F55xx.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
override config Int dataWordSize = 2;
config IMSP430F55xx.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config String deviceHeader;
config IMSP430F55xx.Params.interruptController // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config Interrupt_Controller.Instance interruptController;
config IMSP430F55xx.Params.interruptEnableRegister1 // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config IE1.Instance interruptEnableRegister1;
config IMSP430F55xx.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
override config Int minDataUnitSize = 1;
config IMSP430F55xx.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
override config Int minProgUnitSize = 1;
config IMSP430F55xx.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config IPeripheral.Instance peripherals[string];
config IMSP430F55xx.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config Float vcc = 0;
config IMSP430F55xx.Params.wdtPlus // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
config WDTplus.Instance wdtPlus;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
IMSP430F55xx.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
IMSP430F55xx.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in ti/catalog/msp430/f55xx/IMSP430F55xx.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:20 GMT


module ti.catalog.msp430.f55xx.MSP430F5529

metaonly module ti.catalog.msp430.f55xx.MSP430F5529
index URL

MSP430F5529 CPU definition

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/f55xx/MSP430F5529.xdc
var MSP430F5529 = xdc.useModule('ti.catalog.msp430.f55xx.MSP430F5529');
per-instance config parameters
    var params = new MSP430F5529.Params// Instance config-params object;
        params.TA0// = Timer0_A5.Instance undefined;
        params.TA1// = Timer1_A3.Instance undefined;
        params.TA2// = Timer2_A3.Instance undefined;
        params.TB0// = Timer0_B7.Instance undefined;
        params.commonMap// Memory map elements shared by all MSP430F55xx devices = IPlatform.Memory[string] [
            [
                "PERIPHERALS",
                {
                    comment: "Memory mapped peripherals",
                    name: "PERIPHERALS",
                    base: 0x0,
                    len: 0x1000,
                    space: "io",
                    access: "RW"
                }
            ],
            [
                "BSL",
                {
                    comment: "Bootstrap loader (flash)",
                    name: "BSL",
                    base: 0x1000,
                    len: 0x800,
                    space: "code",
                    access: "RW"
                }
            ],
            [
                "INFOD",
                {
                    comment: "Information Memory D (flash)",
                    name: "INFOD",
                    base: 0x1800,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOC",
                {
                    comment: "Information Memory C (flash)",
                    name: "INFOC",
                    base: 0x1880,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOB",
                {
                    comment: "Information Memory B (flash)",
                    name: "INFOB",
                    base: 0x1900,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INFOA",
                {
                    comment: "Information Memory A (flash)",
                    name: "INFOA",
                    base: 0x1980,
                    len: 0x80,
                    space: "data",
                    access: "RW"
                }
            ],
            [
                "INT00",
                {
                    comment: "Reserved Vector",
                    name: "INT00",
                    base: 0xFF80,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT01",
                {
                    comment: "Reserved Vector",
                    name: "INT01",
                    base: 0xFF82,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT02",
                {
                    comment: "Reserved Vector",
                    name: "INT02",
                    base: 0xFF84,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT03",
                {
                    comment: "Reserved Vector",
                    name: "INT03",
                    base: 0xFF86,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT04",
                {
                    comment: "Reserved Vector",
                    name: "INT04",
                    base: 0xFF88,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT05",
                {
                    comment: "Reserved Vector",
                    name: "INT05",
                    base: 0xFF8A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT06",
                {
                    comment: "Reserved Vector",
                    name: "INT06",
                    base: 0xFF8C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT07",
                {
                    comment: "Reserved Vector",
                    name: "INT07",
                    base: 0xFF8E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT08",
                {
                    comment: "Reserved Vector",
                    name: "INT08",
                    base: 0xFF90,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT09",
                {
                    comment: "Reserved Vector",
                    name: "INT09",
                    base: 0xFF92,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT10",
                {
                    comment: "Reserved Vector",
                    name: "INT10",
                    base: 0xFF94,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT11",
                {
                    comment: "Reserved Vector",
                    name: "INT11",
                    base: 0xFF96,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT12",
                {
                    comment: "Reserved Vector",
                    name: "INT12",
                    base: 0xFF98,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT13",
                {
                    comment: "Reserved Vector",
                    name: "INT13",
                    base: 0xFF9A,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT14",
                {
                    comment: "Reserved Vector",
                    name: "INT14",
                    base: 0xFF9C,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT15",
                {
                    comment: "Reserved Vector",
                    name: "INT15",
                    base: 0xFF9E,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT16",
                {
                    comment: "Reserved Vector",
                    name: "INT16",
                    base: 0xFFA0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT17",
                {
                    comment: "Reserved Vector",
                    name: "INT17",
                    base: 0xFFA2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT18",
                {
                    comment: "Reserved Vector",
                    name: "INT18",
                    base: 0xFFA4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT19",
                {
                    comment: "Reserved Vector",
                    name: "INT19",
                    base: 0xFFA6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT20",
                {
                    comment: "Reserved Vector",
                    name: "INT20",
                    base: 0xFFA8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT21",
                {
                    comment: "Reserved Vector",
                    name: "INT21",
                    base: 0xFFAA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT22",
                {
                    comment: "Reserved Vector",
                    name: "INT22",
                    base: 0xFFAC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT23",
                {
                    comment: "Reserved Vector",
                    name: "INT23",
                    base: 0xFFAE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT24",
                {
                    comment: "Reserved Vector",
                    name: "INT24",
                    base: 0xFFB0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT25",
                {
                    comment: "Reserved Vector",
                    name: "INT25",
                    base: 0xFFB2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT26",
                {
                    comment: "Reserved Vector",
                    name: "INT26",
                    base: 0xFFB4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT27",
                {
                    comment: "Reserved Vector",
                    name: "INT27",
                    base: 0xFFB6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT28",
                {
                    comment: "Reserved Vector",
                    name: "INT28",
                    base: 0xFFB8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT29",
                {
                    comment: "Reserved Vector",
                    name: "INT29",
                    base: 0xFFBA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT30",
                {
                    comment: "Reserved Vector",
                    name: "INT30",
                    base: 0xFFBC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT31",
                {
                    comment: "Reserved Vector",
                    name: "INT31",
                    base: 0xFFBE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT32",
                {
                    comment: "Reserved Vector",
                    name: "INT32",
                    base: 0xFFC0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT33",
                {
                    comment: "Reserved Vector",
                    name: "INT33",
                    base: 0xFFC2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT34",
                {
                    comment: "Reserved Vector",
                    name: "INT34",
                    base: 0xFFC4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT35",
                {
                    comment: "Reserved Vector",
                    name: "INT35",
                    base: 0xFFC6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT36",
                {
                    comment: "Reserved Vector",
                    name: "INT36",
                    base: 0xFFC8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT37",
                {
                    comment: "Reserved Vector",
                    name: "INT37",
                    base: 0xFFCA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT38",
                {
                    comment: "Reserved Vector",
                    name: "INT38",
                    base: 0xFFCC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT39",
                {
                    comment: "Reserved Vector",
                    name: "INT39",
                    base: 0xFFCE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT40",
                {
                    comment: "Reserved Vector",
                    name: "INT40",
                    base: 0xFFD0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT41",
                {
                    comment: "RTC_A Vector",
                    name: "INT41",
                    base: 0xFFD2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT42",
                {
                    comment: "I/O Port P2 Vector",
                    name: "INT42",
                    base: 0xFFD4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT43",
                {
                    comment: "TA2 CCR1-CCR2 Vector",
                    name: "INT43",
                    base: 0xFFD6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT44",
                {
                    comment: "TA2 CCR0 Vector",
                    name: "INT44",
                    base: 0xFFD8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT45",
                {
                    comment: "USCI_B1 Receive/Transmit Vector",
                    name: "INT45",
                    base: 0xFFDA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT46",
                {
                    comment: "USCI_A1 Receive/Transmit Vector",
                    name: "INT46",
                    base: 0xFFDC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT47",
                {
                    comment: "I/O Port P1 Vector",
                    name: "INT47",
                    base: 0xFFDE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT48",
                {
                    comment: "TA1 CCR1-CCR2 Vector",
                    name: "INT48",
                    base: 0xFFE0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT49",
                {
                    comment: "TA1 CCR0 Vector",
                    name: "INT49",
                    base: 0xFFE2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT50",
                {
                    comment: "DMA Vector",
                    name: "INT50",
                    base: 0xFFE4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT51",
                {
                    comment: "USB_UBM Vector",
                    name: "INT51",
                    base: 0xFFE6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT52",
                {
                    comment: "TA0 CCR1-CCR4 Vector",
                    name: "INT52",
                    base: 0xFFE8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT53",
                {
                    comment: "TA0 CCR0 Vector",
                    name: "INT53",
                    base: 0xFFEA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT54",
                {
                    comment: "ADC12_A Vector",
                    name: "INT54",
                    base: 0xFFEC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT55",
                {
                    comment: "USCI_B0 Receive/Transmit Vector",
                    name: "INT55",
                    base: 0xFFEE,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT56",
                {
                    comment: "USCI_A0 Receive/Transmit Vector",
                    name: "INT56",
                    base: 0xFFF0,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT57",
                {
                    comment: "Watchdog Timer_A Interval Timer Mode Vector",
                    name: "INT57",
                    base: 0xFFF2,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT58",
                {
                    comment: "TB0 CCR1-CCR6 Vector",
                    name: "INT58",
                    base: 0xFFF4,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT59",
                {
                    comment: "TB0 CCR0 Vector",
                    name: "INT59",
                    base: 0xFFF6,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT60",
                {
                    comment: "Comp_B Vector",
                    name: "INT60",
                    base: 0xFFF8,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT61",
                {
                    comment: "User NMI Vector",
                    name: "INT61",
                    base: 0xFFFA,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "INT62",
                {
                    comment: "System NMI Vector",
                    name: "INT62",
                    base: 0xFFFC,
                    len: 0x2,
                    space: "data"
                }
            ],
            [
                "RESET",
                {
                    comment: "Reset Vector",
                    name: "RESET",
                    base: 0xFFFE,
                    len: 0x2,
                    space: "data"
                }
            ]
        ];
        params.cpuCore// A string identifying the CPU Core = String "MSP430X";
        params.cpuCoreRevision// A string that uniquely identifies a revision of the core = String "1.0";
        params.dataWordSize// The size of an int on the target in 8-bit bytes = Int 2;
        params.deviceHeader// The optional header file that define device specific constants and structures = String undefined;
        params.interruptController// = Interrupt_Controller.Instance undefined;
        params.interruptEnableRegister1// = IE1.Instance undefined;
        params.memMap// The default memory map for this device = IPlatform.Memory[string] [
            [
                "RAM",
                {
                    comment: "Data RAM",
                    name: "RAM",
                    base: 0x2400,
                    len: 0x2000,
                    space: "code/data",
                    access: "RWX"
                }
            ],
            [
                "FLASH",
                {
                    comment: "Program FLASH",
                    name: "FLASH",
                    base: 0x4400,
                    len: 0xBB80,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "FLASH2",
                {
                    comment: "Extended Program FLASH",
                    name: "FLASH2",
                    base: 0x10000,
                    len: 0x14400,
                    space: "code",
                    access: "RWX"
                }
            ]
        ];
        params.minDataUnitSize// The minimum addressable data unit size in 8-bit bytes = Int 1;
        params.minProgUnitSize// The minimum addressable program unit size in 8-bit bytes = Int 1;
        params.peripherals// A map of peripherals available on the device = IPeripheral.Instance[string] undefined;
        params.vcc// Stores current system VCC value in CFG script = Float 0;
        params.wdtPlus// = WDTplus.Instance undefined;
per-instance creation
    var inst = MSP430F5529.create// Create an instance-object(String revision, params);
per-instance functions
     inst.getMemoryMap// Get the memory map that corresponds to the values of the specified registers(Any registers) returns Any
     inst.getRegisterSet// The set of valid register names for this CPU() returns Any
Instance Config Parameters
index URL

Configuration settings
var params = new MSP430F5529.Params;
// Instance config-params object
    params.TA0 = Timer0_A5.Instance undefined;
    //
    params.TA1 = Timer1_A3.Instance undefined;
    //
    params.TA2 = Timer2_A3.Instance undefined;
    //
    params.TB0 = Timer0_B7.Instance undefined;
    //
    params.commonMap = IPlatform.Memory[string] [
    // Memory map elements shared by all MSP430F55xx devices
        [
            "PERIPHERALS",
            {
                comment: "Memory mapped peripherals",
                name: "PERIPHERALS",
                base: 0x0,
                len: 0x1000,
                space: "io",
                access: "RW"
            }
        ],
        [
            "BSL",
            {
                comment: "Bootstrap loader (flash)",
                name: "BSL",
                base: 0x1000,
                len: 0x800,
                space: "code",
                access: "RW"
            }
        ],
        [
            "INFOD",
            {
                comment: "Information Memory D (flash)",
                name: "INFOD",
                base: 0x1800,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOC",
            {
                comment: "Information Memory C (flash)",
                name: "INFOC",
                base: 0x1880,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOB",
            {
                comment: "Information Memory B (flash)",
                name: "INFOB",
                base: 0x1900,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INFOA",
            {
                comment: "Information Memory A (flash)",
                name: "INFOA",
                base: 0x1980,
                len: 0x80,
                space: "data",
                access: "RW"
            }
        ],
        [
            "INT00",
            {
                comment: "Reserved Vector",
                name: "INT00",
                base: 0xFF80,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT01",
            {
                comment: "Reserved Vector",
                name: "INT01",
                base: 0xFF82,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT02",
            {
                comment: "Reserved Vector",
                name: "INT02",
                base: 0xFF84,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT03",
            {
                comment: "Reserved Vector",
                name: "INT03",
                base: 0xFF86,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT04",
            {
                comment: "Reserved Vector",
                name: "INT04",
                base: 0xFF88,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT05",
            {
                comment: "Reserved Vector",
                name: "INT05",
                base: 0xFF8A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT06",
            {
                comment: "Reserved Vector",
                name: "INT06",
                base: 0xFF8C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT07",
            {
                comment: "Reserved Vector",
                name: "INT07",
                base: 0xFF8E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT08",
            {
                comment: "Reserved Vector",
                name: "INT08",
                base: 0xFF90,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT09",
            {
                comment: "Reserved Vector",
                name: "INT09",
                base: 0xFF92,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT10",
            {
                comment: "Reserved Vector",
                name: "INT10",
                base: 0xFF94,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT11",
            {
                comment: "Reserved Vector",
                name: "INT11",
                base: 0xFF96,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT12",
            {
                comment: "Reserved Vector",
                name: "INT12",
                base: 0xFF98,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT13",
            {
                comment: "Reserved Vector",
                name: "INT13",
                base: 0xFF9A,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT14",
            {
                comment: "Reserved Vector",
                name: "INT14",
                base: 0xFF9C,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT15",
            {
                comment: "Reserved Vector",
                name: "INT15",
                base: 0xFF9E,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT16",
            {
                comment: "Reserved Vector",
                name: "INT16",
                base: 0xFFA0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT17",
            {
                comment: "Reserved Vector",
                name: "INT17",
                base: 0xFFA2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT18",
            {
                comment: "Reserved Vector",
                name: "INT18",
                base: 0xFFA4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT19",
            {
                comment: "Reserved Vector",
                name: "INT19",
                base: 0xFFA6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT20",
            {
                comment: "Reserved Vector",
                name: "INT20",
                base: 0xFFA8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT21",
            {
                comment: "Reserved Vector",
                name: "INT21",
                base: 0xFFAA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT22",
            {
                comment: "Reserved Vector",
                name: "INT22",
                base: 0xFFAC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT23",
            {
                comment: "Reserved Vector",
                name: "INT23",
                base: 0xFFAE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT24",
            {
                comment: "Reserved Vector",
                name: "INT24",
                base: 0xFFB0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT25",
            {
                comment: "Reserved Vector",
                name: "INT25",
                base: 0xFFB2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT26",
            {
                comment: "Reserved Vector",
                name: "INT26",
                base: 0xFFB4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT27",
            {
                comment: "Reserved Vector",
                name: "INT27",
                base: 0xFFB6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT28",
            {
                comment: "Reserved Vector",
                name: "INT28",
                base: 0xFFB8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT29",
            {
                comment: "Reserved Vector",
                name: "INT29",
                base: 0xFFBA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT30",
            {
                comment: "Reserved Vector",
                name: "INT30",
                base: 0xFFBC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT31",
            {
                comment: "Reserved Vector",
                name: "INT31",
                base: 0xFFBE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT32",
            {
                comment: "Reserved Vector",
                name: "INT32",
                base: 0xFFC0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT33",
            {
                comment: "Reserved Vector",
                name: "INT33",
                base: 0xFFC2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT34",
            {
                comment: "Reserved Vector",
                name: "INT34",
                base: 0xFFC4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT35",
            {
                comment: "Reserved Vector",
                name: "INT35",
                base: 0xFFC6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT36",
            {
                comment: "Reserved Vector",
                name: "INT36",
                base: 0xFFC8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT37",
            {
                comment: "Reserved Vector",
                name: "INT37",
                base: 0xFFCA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT38",
            {
                comment: "Reserved Vector",
                name: "INT38",
                base: 0xFFCC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT39",
            {
                comment: "Reserved Vector",
                name: "INT39",
                base: 0xFFCE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT40",
            {
                comment: "Reserved Vector",
                name: "INT40",
                base: 0xFFD0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT41",
            {
                comment: "RTC_A Vector",
                name: "INT41",
                base: 0xFFD2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT42",
            {
                comment: "I/O Port P2 Vector",
                name: "INT42",
                base: 0xFFD4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT43",
            {
                comment: "TA2 CCR1-CCR2 Vector",
                name: "INT43",
                base: 0xFFD6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT44",
            {
                comment: "TA2 CCR0 Vector",
                name: "INT44",
                base: 0xFFD8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT45",
            {
                comment: "USCI_B1 Receive/Transmit Vector",
                name: "INT45",
                base: 0xFFDA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT46",
            {
                comment: "USCI_A1 Receive/Transmit Vector",
                name: "INT46",
                base: 0xFFDC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT47",
            {
                comment: "I/O Port P1 Vector",
                name: "INT47",
                base: 0xFFDE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT48",
            {
                comment: "TA1 CCR1-CCR2 Vector",
                name: "INT48",
                base: 0xFFE0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT49",
            {
                comment: "TA1 CCR0 Vector",
                name: "INT49",
                base: 0xFFE2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT50",
            {
                comment: "DMA Vector",
                name: "INT50",
                base: 0xFFE4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT51",
            {
                comment: "USB_UBM Vector",
                name: "INT51",
                base: 0xFFE6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT52",
            {
                comment: "TA0 CCR1-CCR4 Vector",
                name: "INT52",
                base: 0xFFE8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT53",
            {
                comment: "TA0 CCR0 Vector",
                name: "INT53",
                base: 0xFFEA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT54",
            {
                comment: "ADC12_A Vector",
                name: "INT54",
                base: 0xFFEC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT55",
            {
                comment: "USCI_B0 Receive/Transmit Vector",
                name: "INT55",
                base: 0xFFEE,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT56",
            {
                comment: "USCI_A0 Receive/Transmit Vector",
                name: "INT56",
                base: 0xFFF0,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT57",
            {
                comment: "Watchdog Timer_A Interval Timer Mode Vector",
                name: "INT57",
                base: 0xFFF2,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT58",
            {
                comment: "TB0 CCR1-CCR6 Vector",
                name: "INT58",
                base: 0xFFF4,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT59",
            {
                comment: "TB0 CCR0 Vector",
                name: "INT59",
                base: 0xFFF6,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT60",
            {
                comment: "Comp_B Vector",
                name: "INT60",
                base: 0xFFF8,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT61",
            {
                comment: "User NMI Vector",
                name: "INT61",
                base: 0xFFFA,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "INT62",
            {
                comment: "System NMI Vector",
                name: "INT62",
                base: 0xFFFC,
                len: 0x2,
                space: "data"
            }
        ],
        [
            "RESET",
            {
                comment: "Reset Vector",
                name: "RESET",
                base: 0xFFFE,
                len: 0x2,
                space: "data"
            }
        ]
    ];
    params.cpuCore = String "MSP430X";
    // A string identifying the CPU Core
    params.cpuCoreRevision = String "1.0";
    // A string that uniquely identifies a revision of the core
    params.dataWordSize = Int 2;
    // The size of an int on the target in 8-bit bytes
    params.deviceHeader = String undefined;
    // The optional header file that define device specific constants and structures
    params.interruptController = Interrupt_Controller.Instance undefined;
    //
    params.interruptEnableRegister1 = IE1.Instance undefined;
    //
    params.memMap = IPlatform.Memory[string] [
    // The default memory map for this device
        [
            "RAM",
            {
                comment: "Data RAM",
                name: "RAM",
                base: 0x2400,
                len: 0x2000,
                space: "code/data",
                access: "RWX"
            }
        ],
        [
            "FLASH",
            {
                comment: "Program FLASH",
                name: "FLASH",
                base: 0x4400,
                len: 0xBB80,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "FLASH2",
            {
                comment: "Extended Program FLASH",
                name: "FLASH2",
                base: 0x10000,
                len: 0x14400,
                space: "code",
                access: "RWX"
            }
        ]
    ];
    params.minDataUnitSize = Int 1;
    // The minimum addressable data unit size in 8-bit bytes
    params.minProgUnitSize = Int 1;
    // The minimum addressable program unit size in 8-bit bytes
    params.peripherals = IPeripheral.Instance[string] undefined;
    // A map of peripherals available on the device
    params.vcc = Float 0;
    // Stores current system VCC value in CFG script
    params.wdtPlus = WDTplus.Instance undefined;
    //
config MSP430F5529.Params.TA0 // instance
index URL
Configuration settings
var params = new MSP430F5529.Params;
...
params.TA0 = Timer0_A5.Instance undefined;
config MSP430F5529.Params.TA1 // instance
index URL
Configuration settings
var params = new MSP430F5529.Params;
...
params.TA1 = Timer1_A3.Instance undefined;
config MSP430F5529.Params.TA2 // instance
index URL
Configuration settings
var params = new MSP430F5529.Params;
...
params.TA2 = Timer2_A3.Instance undefined;
config MSP430F5529.Params.TB0 // instance
index URL
Configuration settings
var params = new MSP430F5529.Params;
...
params.TB0 = Timer0_B7.Instance undefined;
config MSP430F5529.Params.commonMap // instance
index URL

Memory map elements shared by all MSP430F55xx devices

Configuration settings
var params = new MSP430F5529.Params;
...
params.commonMap = IPlatform.Memory[string] [
    [
        "PERIPHERALS",
        {
            comment: "Memory mapped peripherals",
            name: "PERIPHERALS",
            base: 0x0,
            len: 0x1000,
            space: "io",
            access: "RW"
        }
    ],
    [
        "BSL",
        {
            comment: "Bootstrap loader (flash)",
            name: "BSL",
            base: 0x1000,
            len: 0x800,
            space: "code",
            access: "RW"
        }
    ],
    [
        "INFOD",
        {
            comment: "Information Memory D (flash)",
            name: "INFOD",
            base: 0x1800,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOC",
        {
            comment: "Information Memory C (flash)",
            name: "INFOC",
            base: 0x1880,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOB",
        {
            comment: "Information Memory B (flash)",
            name: "INFOB",
            base: 0x1900,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INFOA",
        {
            comment: "Information Memory A (flash)",
            name: "INFOA",
            base: 0x1980,
            len: 0x80,
            space: "data",
            access: "RW"
        }
    ],
    [
        "INT00",
        {
            comment: "Reserved Vector",
            name: "INT00",
            base: 0xFF80,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT01",
        {
            comment: "Reserved Vector",
            name: "INT01",
            base: 0xFF82,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT02",
        {
            comment: "Reserved Vector",
            name: "INT02",
            base: 0xFF84,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT03",
        {
            comment: "Reserved Vector",
            name: "INT03",
            base: 0xFF86,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT04",
        {
            comment: "Reserved Vector",
            name: "INT04",
            base: 0xFF88,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT05",
        {
            comment: "Reserved Vector",
            name: "INT05",
            base: 0xFF8A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT06",
        {
            comment: "Reserved Vector",
            name: "INT06",
            base: 0xFF8C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT07",
        {
            comment: "Reserved Vector",
            name: "INT07",
            base: 0xFF8E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT08",
        {
            comment: "Reserved Vector",
            name: "INT08",
            base: 0xFF90,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT09",
        {
            comment: "Reserved Vector",
            name: "INT09",
            base: 0xFF92,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT10",
        {
            comment: "Reserved Vector",
            name: "INT10",
            base: 0xFF94,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT11",
        {
            comment: "Reserved Vector",
            name: "INT11",
            base: 0xFF96,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT12",
        {
            comment: "Reserved Vector",
            name: "INT12",
            base: 0xFF98,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT13",
        {
            comment: "Reserved Vector",
            name: "INT13",
            base: 0xFF9A,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT14",
        {
            comment: "Reserved Vector",
            name: "INT14",
            base: 0xFF9C,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT15",
        {
            comment: "Reserved Vector",
            name: "INT15",
            base: 0xFF9E,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT16",
        {
            comment: "Reserved Vector",
            name: "INT16",
            base: 0xFFA0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT17",
        {
            comment: "Reserved Vector",
            name: "INT17",
            base: 0xFFA2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT18",
        {
            comment: "Reserved Vector",
            name: "INT18",
            base: 0xFFA4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT19",
        {
            comment: "Reserved Vector",
            name: "INT19",
            base: 0xFFA6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT20",
        {
            comment: "Reserved Vector",
            name: "INT20",
            base: 0xFFA8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT21",
        {
            comment: "Reserved Vector",
            name: "INT21",
            base: 0xFFAA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT22",
        {
            comment: "Reserved Vector",
            name: "INT22",
            base: 0xFFAC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT23",
        {
            comment: "Reserved Vector",
            name: "INT23",
            base: 0xFFAE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT24",
        {
            comment: "Reserved Vector",
            name: "INT24",
            base: 0xFFB0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT25",
        {
            comment: "Reserved Vector",
            name: "INT25",
            base: 0xFFB2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT26",
        {
            comment: "Reserved Vector",
            name: "INT26",
            base: 0xFFB4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT27",
        {
            comment: "Reserved Vector",
            name: "INT27",
            base: 0xFFB6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT28",
        {
            comment: "Reserved Vector",
            name: "INT28",
            base: 0xFFB8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT29",
        {
            comment: "Reserved Vector",
            name: "INT29",
            base: 0xFFBA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT30",
        {
            comment: "Reserved Vector",
            name: "INT30",
            base: 0xFFBC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT31",
        {
            comment: "Reserved Vector",
            name: "INT31",
            base: 0xFFBE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT32",
        {
            comment: "Reserved Vector",
            name: "INT32",
            base: 0xFFC0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT33",
        {
            comment: "Reserved Vector",
            name: "INT33",
            base: 0xFFC2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT34",
        {
            comment: "Reserved Vector",
            name: "INT34",
            base: 0xFFC4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT35",
        {
            comment: "Reserved Vector",
            name: "INT35",
            base: 0xFFC6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT36",
        {
            comment: "Reserved Vector",
            name: "INT36",
            base: 0xFFC8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT37",
        {
            comment: "Reserved Vector",
            name: "INT37",
            base: 0xFFCA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT38",
        {
            comment: "Reserved Vector",
            name: "INT38",
            base: 0xFFCC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT39",
        {
            comment: "Reserved Vector",
            name: "INT39",
            base: 0xFFCE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT40",
        {
            comment: "Reserved Vector",
            name: "INT40",
            base: 0xFFD0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT41",
        {
            comment: "RTC_A Vector",
            name: "INT41",
            base: 0xFFD2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT42",
        {
            comment: "I/O Port P2 Vector",
            name: "INT42",
            base: 0xFFD4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT43",
        {
            comment: "TA2 CCR1-CCR2 Vector",
            name: "INT43",
            base: 0xFFD6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT44",
        {
            comment: "TA2 CCR0 Vector",
            name: "INT44",
            base: 0xFFD8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT45",
        {
            comment: "USCI_B1 Receive/Transmit Vector",
            name: "INT45",
            base: 0xFFDA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT46",
        {
            comment: "USCI_A1 Receive/Transmit Vector",
            name: "INT46",
            base: 0xFFDC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT47",
        {
            comment: "I/O Port P1 Vector",
            name: "INT47",
            base: 0xFFDE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT48",
        {
            comment: "TA1 CCR1-CCR2 Vector",
            name: "INT48",
            base: 0xFFE0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT49",
        {
            comment: "TA1 CCR0 Vector",
            name: "INT49",
            base: 0xFFE2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT50",
        {
            comment: "DMA Vector",
            name: "INT50",
            base: 0xFFE4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT51",
        {
            comment: "USB_UBM Vector",
            name: "INT51",
            base: 0xFFE6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT52",
        {
            comment: "TA0 CCR1-CCR4 Vector",
            name: "INT52",
            base: 0xFFE8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT53",
        {
            comment: "TA0 CCR0 Vector",
            name: "INT53",
            base: 0xFFEA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT54",
        {
            comment: "ADC12_A Vector",
            name: "INT54",
            base: 0xFFEC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT55",
        {
            comment: "USCI_B0 Receive/Transmit Vector",
            name: "INT55",
            base: 0xFFEE,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT56",
        {
            comment: "USCI_A0 Receive/Transmit Vector",
            name: "INT56",
            base: 0xFFF0,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT57",
        {
            comment: "Watchdog Timer_A Interval Timer Mode Vector",
            name: "INT57",
            base: 0xFFF2,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT58",
        {
            comment: "TB0 CCR1-CCR6 Vector",
            name: "INT58",
            base: 0xFFF4,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT59",
        {
            comment: "TB0 CCR0 Vector",
            name: "INT59",
            base: 0xFFF6,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT60",
        {
            comment: "Comp_B Vector",
            name: "INT60",
            base: 0xFFF8,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT61",
        {
            comment: "User NMI Vector",
            name: "INT61",
            base: 0xFFFA,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "INT62",
        {
            comment: "System NMI Vector",
            name: "INT62",
            base: 0xFFFC,
            len: 0x2,
            space: "data"
        }
    ],
    [
        "RESET",
        {
            comment: "Reset Vector",
            name: "RESET",
            base: 0xFFFE,
            len: 0x2,
            space: "data"
        }
    ]
];
config MSP430F5529.Params.cpuCore // instance
index URL

A string identifying the CPU Core

Configuration settings
var params = new MSP430F5529.Params;
...
params.cpuCore = String "MSP430X";
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config MSP430F5529.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

Configuration settings
var params = new MSP430F5529.Params;
...
params.cpuCoreRevision = String "1.0";
config MSP430F5529.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

Configuration settings
var params = new MSP430F5529.Params;
...
params.dataWordSize = Int 2;
config MSP430F5529.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

Configuration settings
var params = new MSP430F5529.Params;
...
params.deviceHeader = String undefined;
config MSP430F5529.Params.interruptController // instance
index URL
Configuration settings
var params = new MSP430F5529.Params;
...
params.interruptController = Interrupt_Controller.Instance undefined;
config MSP430F5529.Params.interruptEnableRegister1 // instance
index URL
Configuration settings
var params = new MSP430F5529.Params;
...
params.interruptEnableRegister1 = IE1.Instance undefined;
config MSP430F5529.Params.memMap // instance
index URL

The default memory map for this device

Configuration settings
var params = new MSP430F5529.Params;
...
params.memMap = IPlatform.Memory[string] [
    [
        "RAM",
        {
            comment: "Data RAM",
            name: "RAM",
            base: 0x2400,
            len: 0x2000,
            space: "code/data",
            access: "RWX"
        }
    ],
    [
        "FLASH",
        {
            comment: "Program FLASH",
            name: "FLASH",
            base: 0x4400,
            len: 0xBB80,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "FLASH2",
        {
            comment: "Extended Program FLASH",
            name: "FLASH2",
            base: 0x10000,
            len: 0x14400,
            space: "code",
            access: "RWX"
        }
    ]
];
config MSP430F5529.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5529.Params;
...
params.minDataUnitSize = Int 1;
config MSP430F5529.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

Configuration settings
var params = new MSP430F5529.Params;
...
params.minProgUnitSize = Int 1;
config MSP430F5529.Params.peripherals // instance
index URL

A map of peripherals available on the device

Configuration settings
var params = new MSP430F5529.Params;
...
params.peripherals = IPeripheral.Instance[string] undefined;
config MSP430F5529.Params.vcc // instance
index URL

Stores current system VCC value in CFG script

Configuration settings
var params = new MSP430F5529.Params;
...
params.vcc = Float 0;
config MSP430F5529.Params.wdtPlus // instance
index URL
Configuration settings
var params = new MSP430F5529.Params;
...
params.wdtPlus = WDTplus.Instance undefined;
Static Instance Creation
index URL

Configuration settings
var params = new MSP430F5529.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = MSP430F5529.create(String revision, params);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
MSP430F5529.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

Configuration settings
inst.getMemoryMap(Any registers) returns Any
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
MSP430F5529.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

Configuration settings
inst.getRegisterSet() returns Any
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:20:21 GMT


package ti.catalog.msp430.init
index URL

MSP430 boot time initialization support

This package contains a Boot module that supplies minimal boot time initialization code. This code optionally disables the watchdog timer (to ensure normal C initialization can complete before the watchdog resets the device) and configures the CPU clock.
XDCspec declarations sourced in ti/catalog/msp430/init/package.xdc
requires xdc.runtime;
package ti.catalog.msp430.init [1, 0, 0] {
    module Boot;
    // Boot time initialization code manager
}
generated on Sun, 25 Nov 2018 22:20:20 GMT


module ti.catalog.msp430.init.Boot

metaonly module ti.catalog.msp430.init.Boot
index URL

Boot time initialization code manager

  • Configuration settings
  • Individual elements
The Boot module supports boot initialization for the MSP430 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and is called very early at boot time (prior to C runtime initialization). [ more ... ]
Configuration settings sourced in ti/catalog/msp430/init/Boot.xdc
var Boot = xdc.useModule('ti.catalog.msp430.init.Boot');
module-wide constants & types
    var obj = new Boot.ModuleView// ;
        obj.disableWatchdog = Bool ...
        obj.watchdogAddress = UInt ...
        obj.configureDCO = Bool ...
        obj.useLFXT = Bool ...
module-wide config parameters
     Boot.configureDCO// Configure DCO flag = Bool false;
     Boot.disableWatchdog// Watchdog disable flag = Bool true;
     Boot.rovViewInfo// = ViewInfo.Instance ViewInfo.create;
     Boot.useLFXT// Use a low frequency crystal (LFXT) reference = Bool false;
     Boot.watchdogAddress// Watchdog control register address = UInt 0x15c;
DETAILS
The Boot module supports boot initialization for the MSP430 devices. A special boot init function is created based on the configuration settings for this module. This function is hooked into the xdc.runtime.Reset.fxns[] array and is called very early at boot time (prior to C runtime initialization).
The code to support the boot module is placed in a separate section named ".text:bootCodeSection" to allow placement of this section in the linker .cmd file if necessary. This section is a subsection of the ".text" section so this code will be placed into the .text section unless explicitly placed, either through Program.sectMap or through a linker command file.
struct Boot.ModuleView
index URL
Configuration settings
var obj = new Boot.ModuleView;
    obj.disableWatchdog = Bool ...
    obj.watchdogAddress = UInt ...
    obj.configureDCO = Bool ...
    obj.useLFXT = Bool ...
config Boot.configureDCO // module-wide
index URL

Configure DCO flag

Configuration settings
Boot.configureDCO = Bool false;
DETAILS
The default is false. Set to true to initialize the DCO at boot.
config Boot.disableWatchdog // module-wide
index URL

Watchdog disable flag

Configuration settings
Boot.disableWatchdog = Bool true;
DETAILS
The default is true. Set to false to not automatically disable the watchdog timer.
config Boot.rovViewInfo // module-wide
index URL
Configuration settings
Boot.rovViewInfo = ViewInfo.Instance ViewInfo.create;
config Boot.useLFXT // module-wide
index URL

Use a low frequency crystal (LFXT) reference

Configuration settings
Boot.useLFXT = Bool false;
DETAILS
The default is false. Set to true to indicate a 32768Hz low frequency crystal is present, and available for configuring the clock system.
This configuration parameter is utilized for only a subset of MSP430 device types, and only when configureDCO is set to true.
For FR58xx/FR59xx devices: if useLFXT is set to true, an LFXT will be used as reference, for generating more accurate clock frequencies. Othewise, and by default, MODOSC will be used as reference.
For all other MSP430 device types: at present, the useLFXT parameter will be ignored, and an internal reference will be used instead.
config Boot.watchdogAddress // module-wide
index URL

Watchdog control register address

Configuration settings
Boot.watchdogAddress = UInt 0x15c;
DETAILS
The default (0x15c) is set for MSP430F54xx and MSP430F552x devices. Change for other devices.
generated on Sun, 25 Nov 2018 22:20:20 GMT


package ti.catalog.msp430.peripherals.adc
index URL

MSP430 ADC peripherals

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/package.xdc
package ti.catalog.msp430.peripherals.adc [1, 0, 0] {
    interface IADC;
    // MSP430 Analog to Digital Converter Interface
    module ADC10;
    // MSP430 10-bit Analog to Digital Converter
    module ADC10_B;
    // MSP430 10-bit Analog to Digital Converter
    module ADC12;
    // MSP430 12-bit Analog to Digital Converter
    module ADC12_B;
    // MSP430 12-bit Analog to Digital Converter
    module SD16_A;
    // MSP430F2xx Family SD16_A Module
}
generated on Sun, 25 Nov 2018 22:20:13 GMT


module ti.catalog.msp430.peripherals.adc.ADC10

metaonly module ti.catalog.msp430.peripherals.adc.ADC10
index URL

MSP430 10-bit Analog to Digital Converter

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/adc/ADC10.xdc
var ADC10 = xdc.useModule('ti.catalog.msp430.peripherals.adc.ADC10');
module-wide constants & types
    values of type ADC10.ADC10BUSY_t//
        const ADC10.ADC10BUSY_OFF// No operation is active;
        const ADC10.ADC10BUSY// A sequence, sample, or conversion is active;
    values of type ADC10.ADC10CT_t// Data transfer modes
        const ADC10.ADC10CT_OFF// Data is transferred is stopped after every conversion;
        const ADC10.ADC10CT// Data is transferred continuously after every conversion;
    values of type ADC10.ADC10DF_t// ADC10 output as 2's complement
        const ADC10.ADC10DF_OFF// ADC10 Data Format as binary;
        const ADC10.ADC10DF// ADC10 Data Format as 2's complement;
    values of type ADC10.ADC10DIV_t// ADC10 Clock Divider
        const ADC10.ADC10DIV_0// Divide by 1;
        const ADC10.ADC10DIV_1// Divide by 2;
        const ADC10.ADC10DIV_2// Divide by 3;
        const ADC10.ADC10DIV_3// Divide by 4;
        const ADC10.ADC10DIV_4// Divide by 5;
        const ADC10.ADC10DIV_5// Divide by 6;
        const ADC10.ADC10DIV_6// Divide by 7;
        const ADC10.ADC10DIV_7// Divide by 8;
    values of type ADC10.ADC10IE_t// ADC10 Interrupt Enable
        const ADC10.ADC10IE_OFF// Disable ADC interrupt;
        const ADC10.ADC10IE// Enable ADC interrupt;
    values of type ADC10.ADC10IFG_t// ADC10 Interrupt Flag
        const ADC10.ADC10IFG_OFF// Clear ADC interrupt flag;
        const ADC10.ADC10IFG// Set ADC interrupt flag;
    values of type ADC10.ADC10ON_t// ADC10 On/Enable
        const ADC10.ADC10ON_OFF// Switch Off ADC10;
        const ADC10.ADC10ON// Switch On ADC10;
    values of type ADC10.ADC10SC_t// ADC10 Start Conversion
        const ADC10.ADC10SC_OFF// No conversion;
        const ADC10.ADC10SC// Start ADC conversion manually;
    values of type ADC10.ADC10SHT_t// ADC10 Sample Hold Select 0
        const ADC10.ADC10SHT_0// 4 x ADC10CLKs;
        const ADC10.ADC10SHT_1// 8 x ADC10CLKs;
        const ADC10.ADC10SHT_2// 16 x ADC10CLKs;
        const ADC10.ADC10SHT_3// 64 x ADC10CLKs;
    values of type ADC10.ADC10SR_t// ADC10 Sampling Rate 0:200ksps / 1:50ksps
        const ADC10.ADC10SR_OFF// Reference buffer supports up to ~200 ksps;
        const ADC10.ADC10SR// Reference buffer supports up to ~50 ksps;
    values of type ADC10.ADC10SSEL_t// ADC10 Clock Source
        const ADC10.ADC10SSEL_0// ADC10OSC;
        const ADC10.ADC10SSEL_1// ACLK;
        const ADC10.ADC10SSEL_2// MCLK;
        const ADC10.ADC10SSEL_3// SMCLK;
    values of type ADC10.ADC10TB_t// Block data transfer modes
        const ADC10.ADC10TB_OFF// One-block transfer mode;
        const ADC10.ADC10TB// Two-block transfer mode;
    values of type ADC10.CONSEQ_t// Types of conversion
        const ADC10.CONSEQ_0// Single channel single conversion;
        const ADC10.CONSEQ_1// Sequence of channels;
        const ADC10.CONSEQ_2// Repeat single channel;
        const ADC10.CONSEQ_3// Repeat sequence of channels;
    values of type ADC10.ENC_t// ADC10 Enable Conversion
        const ADC10.ENC_OFF// Disable ADC;
        const ADC10.ENC// Enable ADC;
    values of type ADC10.INCH_t// ADC10 Channel Selection
        const ADC10.INCH_0// ADC Channel 0;
        const ADC10.INCH_1// ADC Channel 1;
        const ADC10.INCH_2// ADC Channel 2;
        const ADC10.INCH_3// ADC Channel 3;
        const ADC10.INCH_4// ADC Channel 4;
        const ADC10.INCH_5// ADC Channel 5;
        const ADC10.INCH_6// ADC Channel 6;
        const ADC10.INCH_7// ADC Channel 7;
        const ADC10.INCH_8// ADC VeRef+;
        const ADC10.INCH_9// ADC VeRef-;
        const ADC10.INCH_10// Temperature Sensor;
        const ADC10.INCH_11// ADC convert VCC;
        const ADC10.INCH_12// ADC Channel 12;
        const ADC10.INCH_13// ADC Channel 13;
        const ADC10.INCH_14// ADC Channel 14;
        const ADC10.INCH_15// ADC Channel 15;
    values of type ADC10.ISSH_t// ADC10 input signal inversion
        const ADC10.ISSH_OFF// Input signal not inverted;
        const ADC10.ISSH// Input signal inverted;
    values of type ADC10.MSC_t// ADC10 Multiple SampleConversion
        const ADC10.MSC_OFF// Disable multiple sample and conversion;
        const ADC10.MSC// Enable multiple sample and conversion;
    values of type ADC10.REF2_5V_t// ADC10 Ref 0:1.5V / 1:2.5V
        const ADC10.REF2_5V_OFF// Set reference voltage generator = 1.5V;
        const ADC10.REF2_5V// Set reference voltage generator = 2.5V;
    values of type ADC10.REFBURST_t// ADC10 Reference Burst Mode
        const ADC10.REFBURST_OFF// Reference buffer on continuously;
        const ADC10.REFBURST// Reference buffer on only during sample-and-conversion;
    values of type ADC10.REFON_t// ADC10 Reference on
        const ADC10.REFON_OFF// Disable ADC reference generator;
        const ADC10.REFON// Enable ADC reference generator;
    values of type ADC10.REFOUT_t// ADC10 Enable output of Ref
        const ADC10.REFOUT_OFF// Reference output off;
        const ADC10.REFOUT// Reference output on;
    values of type ADC10.SHS_t// ADC10 trigger
        const ADC10.SHS_0// ADC10SC;
        const ADC10.SHS_1// Timer_A OUT1;
        const ADC10.SHS_2// Timer_A OUT0;
        const ADC10.SHS_3// Timer_A OUT2;
    values of type ADC10.SREF_t// ADC10 Reference Select 0
        const ADC10.SREF_0// VR+ = VCC and VR- = VSS;
        const ADC10.SREF_1// VR+ = VREF+ and VR- = VSS;
        const ADC10.SREF_2// VR+ = VeREF+ and VR- = VSS;
        const ADC10.SREF_3// VR+ = Buffered VeREF+ and VR- = VSS;
        const ADC10.SREF_4// VR+ = VCC and VR- = VREF-/ VeREF-;
        const ADC10.SREF_5// VR+ = VREF+ and VR- = VREF-/ VeREF-;
        const ADC10.SREF_6// VR+ = VeREF+ and VR- = VREF-/ VeREF-;
        const ADC10.SREF_7// VR+ = Buffered VeREF+ and VR- = VREF-/ VeREF-;
    var obj = new ADC10.ADC10CTL0_t// ADC10 Control Register 0;
        obj.ADC10SC// Start conversion. Software-controlled sample-and-conversion start. ADC10SC and ENC may be set together with one instruction. ADC10SC is reset automatically. 0 No sample-and-conversion start 1 Start sample-and-conversion = ADC10.ADC10SC_t ...
        obj.ENC// Enable conversion 0 ADC10 disabled 1 ADC10 enabled = ADC10.ENC_t ...
        obj.ADC10IFG// ADC10 interrupt flag. This bit is set if ADC10MEM is loaded with a conversion result. It is automatically reset when the interrupt request is accepted, or it may be reset by software. When using the DTC this flag is set when a block of transfers is completed. 0 No interrupt pending 1 Interrupt pending = ADC10.ADC10IFG_t ...
        obj.ADC10IE// ADC10 interrupt enable 0 Interrupt disabled 1 Interrupt enabled = ADC10.ADC10IE_t ...
        obj.ADC10ON// ADC10 on 0 ADC10 off 1 ADC10 on = ADC10.ADC10ON_t ...
        obj.REFON// Reference generator on 0 Reference off 1 Reference on = ADC10.REFON_t ...
        obj.REF2_5V// Reference-generator voltage. REFON must also be set. 0 1.5 V 1 2.5 V = ADC10.REF2_5V_t ...
        obj.MSC// Multiple sample and conversion. Valid only for sequence or repeated modes. 0 The sampling requires a rising edge of the SHI signal to trigger each sample-and-conversion. 1 The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed = ADC10.MSC_t ...
        obj.REFBURST// Reference burst. 0 Reference buffer on continuously 1 Reference buffer on only during sample-and-conversion = ADC10.REFBURST_t ...
        obj.REFOUT// Reference output 0 Reference output off 1 Reference output on, use internal reference voltage externally on pin VREF+ = ADC10.REFOUT_t ...
        obj.ADC10SR// ADC10 sampling rate. This bit selects the reference buffer drive capability for the maximum sampling rate. Setting ADC10SR reduces the current consumption of the reference buffer. 0 Reference buffer supports up to ~200 ksps 1 Reference buffer supports up to ~50 ksps = ADC10.ADC10SR_t ...
        obj.ADC10SHT// ADC10 sample-and-hold time 00 4 x ADC10CLKs 01 8 x ADC10CLKs 10 16 x ADC10CLKs 11 64 x ADC10CLKs = ADC10.ADC10SHT_t ...
        obj.SREF// Select reference 000 VR+ = VCC and VR- = VSS 001 VR+ = VREF+ and VR- = VSS 010 VR+ = VeREF+ and VR- = VSS 011 VR+ = Buffered VeREF+ and VR- = VSS 100 VR+ = VCC and VR- = VREF-/ VeREF- 101 VR+ = VREF+ and VR- = VREF-/ VeREF- 110 VR+ = VeREF+ and VR- = VREF-/ VeREF- 111 VR+ = Buffered VeREF+ and VR- = VREF-/ VeREF- = ADC10.SREF_t ...
    var obj = new ADC10.ADC10CTL1_t// ADC10 Control Register 1;
        obj.ADC10BUSY// ADC10 busy. This bit indicates an active sample or conversion operation 0 No operation is active. 1 A sequence, sample, or conversion is active = ADC10.ADC10BUSY_t ...
        obj.CONSEQ// Conversion sequence mode select 00 Single-channel-single-conversion 01 Sequence-of-channels 10 Repeat-single-channel 11 Repeat-sequence-of-channels = ADC10.CONSEQ_t ...
        obj.ADC10SSEL// ADC10 clock source select 00 ADC10OSC 01 ACLK 10 MCLK 11 SMCLK = ADC10.ADC10SSEL_t ...
        obj.ADC10DIV// ADC10 clock divider 000 /1 001 /2 010 /3 011 /4 100 /5 101 /6 110 /7 111 /8 = ADC10.ADC10DIV_t ...
        obj.ISSH// Invert signal sample-and-hold 0 The sample-input signal is not inverted. 1 The sample-input signal is inverted = ADC10.ISSH_t ...
        obj.ADC10DF// ADC10 data format 0 Straight binary 1 2s complement = ADC10.ADC10DF_t ...
        obj.SHS// Sample-and-hold source select 00 ADC10SC bit 01 Timer_A.OUT1 10 Timer_A.OUT0 11 Timer_A.OUT2 (Timer_A.OUT1 on MSP430x20x2 devices) = ADC10.SHS_t ...
        obj.INCH// Input channel select. These bits select the channel for a single-conversion or the highest channel for a sequence of conversions. 0000 A0 0001 A1 0010 A2 0011 A3 0100 A4 0101 A5 0110 A6 0111 A7 1000 VeREF+ 1001 VREF-/VeREF- 1010 Temperature sensor 1011 (VCC ??? VSS) / 1100 A12 1101 A13 1110 A14 1111 A15 = ADC10.INCH_t ...
    var obj = new ADC10.ADC10DTC0_t// Data Transfer Control Register 0;
        obj.ADC10TB// ADC10 two-block mode 0 One-block transfer mode 1 Two-block transfer mode = ADC10.ADC10TB_t ...
        obj.ADC10CT// ADC10 continuous transfer 0 Data transfer stops when one block (one-block mode) or two blocks (two-block mode) have completed. 1 Data is transferred continuously. DTC operation is stopped only if ADC10CT cleared, or ADC10SA is written to = ADC10.ADC10CT_t ...
    var obj = new ADC10.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new ADC10.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     ADC10.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     ADC10.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new ADC10.Params// Instance config-params object;
        params.ADC10AE0// Analog (Input) Enable Control Register 0 = Bits16 0;
        params.ADC10AE1// Analog (Input) Enable Control Register 1 = Bits16 0;
        params.ADC10CTL0// Control Register 0 = ADC10.ADC10CTL0_t {
            ADC10SC: ADC10.ADC10SC_OFF,
            ENC: ADC10.ENC_OFF,
            ADC10IFG: ADC10.ADC10IFG_OFF,
            ADC10IE: ADC10.ADC10IE_OFF,
            ADC10ON: ADC10.ADC10ON_OFF,
            REFON: ADC10.REFON_OFF,
            REF2_5V: ADC10.REF2_5V_OFF,
            MSC: ADC10.MSC_OFF,
            REFBURST: ADC10.REFBURST_OFF,
            REFOUT: ADC10.REFOUT_OFF,
            ADC10SR: ADC10.ADC10SR_OFF,
            ADC10SHT: ADC10.ADC10SHT_0,
            SREF: ADC10.SREF_0
        };
        params.ADC10CTL1// Control Register 1 = ADC10.ADC10CTL1_t {
            ADC10BUSY: ADC10.ADC10BUSY_OFF,
            CONSEQ: ADC10.CONSEQ_0,
            ADC10SSEL: ADC10.ADC10SSEL_0,
            ADC10DIV: ADC10.ADC10DIV_0,
            ISSH: ADC10.ISSH_OFF,
            ADC10DF: ADC10.ADC10DF_OFF,
            SHS: ADC10.SHS_0,
            INCH: ADC10.INCH_0
        };
        params.ADC10DTC0// Data Transfer Control Register 0 = ADC10.ADC10DTC0_t {
            ADC10TB: ADC10.ADC10TB_OFF,
            ADC10CT: ADC10.ADC10CT_OFF
        };
        params.ADC10DTC1// Data Transfer Control Register 1 = Bits8 0;
        params.ADC10SA// Data Transfer Start Address = Bits16* 0x200;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = ADC10.ForceSetDefaultRegister_t[] [
            {
                register: "ADC10CTL0",
                regForceSet: false
            },
            {
                register: "ADC10CTL1",
                regForceSet: false
            },
            {
                register: "ADC10AE0",
                regForceSet: false
            },
            {
                register: "ADC10AE1",
                regForceSet: false
            },
            {
                register: "ADC10DTC0",
                regForceSet: false
            },
            {
                register: "ADC10DTC1",
                regForceSet: false
            },
            {
                register: "ADC10SA",
                regForceSet: true
            }
        ];
        params.interruptSource// ADC10 has 1 interrupt enable = ADC10.regIntVect_t[1] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = ADC10.create// Create an instance-object(IClock.Instance clock, params);
enum ADC10.ADC10BUSY_t
index URL
Configuration settings
values of type ADC10.ADC10BUSY_t
    const ADC10.ADC10BUSY_OFF;
    // No operation is active
    const ADC10.ADC10BUSY;
    // A sequence, sample, or conversion is active
enum ADC10.ADC10CT_t
index URL

Data transfer modes

Configuration settings
values of type ADC10.ADC10CT_t
    const ADC10.ADC10CT_OFF;
    // Data is transferred is stopped after every conversion
    const ADC10.ADC10CT;
    // Data is transferred continuously after every conversion
SEE
ADC10DTC0
enum ADC10.ADC10DF_t
index URL

ADC10 output as 2's complement

Configuration settings
values of type ADC10.ADC10DF_t
    const ADC10.ADC10DF_OFF;
    // ADC10 Data Format as binary
    const ADC10.ADC10DF;
    // ADC10 Data Format as 2's complement
enum ADC10.ADC10DIV_t
index URL

ADC10 Clock Divider

Configuration settings
values of type ADC10.ADC10DIV_t
    const ADC10.ADC10DIV_0;
    // Divide by 1
    const ADC10.ADC10DIV_1;
    // Divide by 2
    const ADC10.ADC10DIV_2;
    // Divide by 3
    const ADC10.ADC10DIV_3;
    // Divide by 4
    const ADC10.ADC10DIV_4;
    // Divide by 5
    const ADC10.ADC10DIV_5;
    // Divide by 6
    const ADC10.ADC10DIV_6;
    // Divide by 7
    const ADC10.ADC10DIV_7;
    // Divide by 8
enum ADC10.ADC10IE_t
index URL

ADC10 Interrupt Enable

Configuration settings
values of type ADC10.ADC10IE_t
    const ADC10.ADC10IE_OFF;
    // Disable ADC interrupt
    const ADC10.ADC10IE;
    // Enable ADC interrupt
enum ADC10.ADC10IFG_t
index URL

ADC10 Interrupt Flag

Configuration settings
values of type ADC10.ADC10IFG_t
    const ADC10.ADC10IFG_OFF;
    // Clear ADC interrupt flag
    const ADC10.ADC10IFG;
    // Set ADC interrupt flag
enum ADC10.ADC10ON_t
index URL

ADC10 On/Enable

Configuration settings
values of type ADC10.ADC10ON_t
    const ADC10.ADC10ON_OFF;
    // Switch Off ADC10
    const ADC10.ADC10ON;
    // Switch On ADC10
enum ADC10.ADC10SC_t
index URL

ADC10 Start Conversion

Configuration settings
values of type ADC10.ADC10SC_t
    const ADC10.ADC10SC_OFF;
    // No conversion
    const ADC10.ADC10SC;
    // Start ADC conversion manually
enum ADC10.ADC10SHT_t
index URL

ADC10 Sample Hold Select 0

Configuration settings
values of type ADC10.ADC10SHT_t
    const ADC10.ADC10SHT_0;
    // 4 x ADC10CLKs
    const ADC10.ADC10SHT_1;
    // 8 x ADC10CLKs
    const ADC10.ADC10SHT_2;
    // 16 x ADC10CLKs
    const ADC10.ADC10SHT_3;
    // 64 x ADC10CLKs
enum ADC10.ADC10SR_t
index URL

ADC10 Sampling Rate 0:200ksps / 1:50ksps

Configuration settings
values of type ADC10.ADC10SR_t
    const ADC10.ADC10SR_OFF;
    // Reference buffer supports up to ~200 ksps
    const ADC10.ADC10SR;
    // Reference buffer supports up to ~50 ksps
enum ADC10.ADC10SSEL_t
index URL

ADC10 Clock Source

Configuration settings
values of type ADC10.ADC10SSEL_t
    const ADC10.ADC10SSEL_0;
    // ADC10OSC
    const ADC10.ADC10SSEL_1;
    // ACLK
    const ADC10.ADC10SSEL_2;
    // MCLK
    const ADC10.ADC10SSEL_3;
    // SMCLK
enum ADC10.ADC10TB_t
index URL

Block data transfer modes

Configuration settings
values of type ADC10.ADC10TB_t
    const ADC10.ADC10TB_OFF;
    // One-block transfer mode
    const ADC10.ADC10TB;
    // Two-block transfer mode
SEE
ADC10DTC0
enum ADC10.CONSEQ_t
index URL

Types of conversion

Configuration settings
values of type ADC10.CONSEQ_t
    const ADC10.CONSEQ_0;
    // Single channel single conversion
    const ADC10.CONSEQ_1;
    // Sequence of channels
    const ADC10.CONSEQ_2;
    // Repeat single channel
    const ADC10.CONSEQ_3;
    // Repeat sequence of channels
enum ADC10.ENC_t
index URL

ADC10 Enable Conversion

Configuration settings
values of type ADC10.ENC_t
    const ADC10.ENC_OFF;
    // Disable ADC
    const ADC10.ENC;
    // Enable ADC
enum ADC10.INCH_t
index URL

ADC10 Channel Selection

Configuration settings
values of type ADC10.INCH_t
    const ADC10.INCH_0;
    // ADC Channel 0
    const ADC10.INCH_1;
    // ADC Channel 1
    const ADC10.INCH_2;
    // ADC Channel 2
    const ADC10.INCH_3;
    // ADC Channel 3
    const ADC10.INCH_4;
    // ADC Channel 4
    const ADC10.INCH_5;
    // ADC Channel 5
    const ADC10.INCH_6;
    // ADC Channel 6
    const ADC10.INCH_7;
    // ADC Channel 7
    const ADC10.INCH_8;
    // ADC VeRef+
    const ADC10.INCH_9;
    // ADC VeRef-
    const ADC10.INCH_10;
    // Temperature Sensor
    const ADC10.INCH_11;
    // ADC convert VCC
    const ADC10.INCH_12;
    // ADC Channel 12
    const ADC10.INCH_13;
    // ADC Channel 13
    const ADC10.INCH_14;
    // ADC Channel 14
    const ADC10.INCH_15;
    // ADC Channel 15
enum ADC10.ISSH_t
index URL

ADC10 input signal inversion

Configuration settings
values of type ADC10.ISSH_t
    const ADC10.ISSH_OFF;
    // Input signal not inverted
    const ADC10.ISSH;
    // Input signal inverted
enum ADC10.MSC_t
index URL

ADC10 Multiple SampleConversion

Configuration settings
values of type ADC10.MSC_t
    const ADC10.MSC_OFF;
    // Disable multiple sample and conversion
    const ADC10.MSC;
    // Enable multiple sample and conversion
enum ADC10.REF2_5V_t
index URL

ADC10 Ref 0:1.5V / 1:2.5V

Configuration settings
values of type ADC10.REF2_5V_t
    const ADC10.REF2_5V_OFF;
    // Set reference voltage generator = 1.5V
    const ADC10.REF2_5V;
    // Set reference voltage generator = 2.5V
enum ADC10.REFBURST_t
index URL

ADC10 Reference Burst Mode

Configuration settings
values of type ADC10.REFBURST_t
    const ADC10.REFBURST_OFF;
    // Reference buffer on continuously
    const ADC10.REFBURST;
    // Reference buffer on only during sample-and-conversion
enum ADC10.REFON_t
index URL

ADC10 Reference on

Configuration settings
values of type ADC10.REFON_t
    const ADC10.REFON_OFF;
    // Disable ADC reference generator
    const ADC10.REFON;
    // Enable ADC reference generator
enum ADC10.REFOUT_t
index URL

ADC10 Enable output of Ref

Configuration settings
values of type ADC10.REFOUT_t
    const ADC10.REFOUT_OFF;
    // Reference output off
    const ADC10.REFOUT;
    // Reference output on
enum ADC10.SHS_t
index URL

ADC10 trigger

Configuration settings
values of type ADC10.SHS_t
    const ADC10.SHS_0;
    // ADC10SC
    const ADC10.SHS_1;
    // Timer_A OUT1
    const ADC10.SHS_2;
    // Timer_A OUT0
    const ADC10.SHS_3;
    // Timer_A OUT2
enum ADC10.SREF_t
index URL

ADC10 Reference Select 0

Configuration settings
values of type ADC10.SREF_t
    const ADC10.SREF_0;
    // VR+ = VCC and VR- = VSS
    const ADC10.SREF_1;
    // VR+ = VREF+ and VR- = VSS
    const ADC10.SREF_2;
    // VR+ = VeREF+ and VR- = VSS
    const ADC10.SREF_3;
    // VR+ = Buffered VeREF+ and VR- = VSS
    const ADC10.SREF_4;
    // VR+ = VCC and VR- = VREF-/ VeREF-
    const ADC10.SREF_5;
    // VR+ = VREF+ and VR- = VREF-/ VeREF-
    const ADC10.SREF_6;
    // VR+ = VeREF+ and VR- = VREF-/ VeREF-
    const ADC10.SREF_7;
    // VR+ = Buffered VeREF+ and VR- = VREF-/ VeREF-
struct ADC10.ADC10CTL0_t
index URL

ADC10 Control Register 0

Configuration settings
var obj = new ADC10.ADC10CTL0_t;
    obj.ADC10SC = ADC10.ADC10SC_t ...
    // Start conversion. Software-controlled sample-and-conversion start. ADC10SC and ENC may be set together with one instruction. ADC10SC is reset automatically. 0 No sample-and-conversion start 1 Start sample-and-conversion
    obj.ENC = ADC10.ENC_t ...
    // Enable conversion 0 ADC10 disabled 1 ADC10 enabled
    obj.ADC10IFG = ADC10.ADC10IFG_t ...
    // ADC10 interrupt flag. This bit is set if ADC10MEM is loaded with a conversion result. It is automatically reset when the interrupt request is accepted, or it may be reset by software. When using the DTC this flag is set when a block of transfers is completed. 0 No interrupt pending 1 Interrupt pending
    obj.ADC10IE = ADC10.ADC10IE_t ...
    // ADC10 interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC10ON = ADC10.ADC10ON_t ...
    // ADC10 on 0 ADC10 off 1 ADC10 on
    obj.REFON = ADC10.REFON_t ...
    // Reference generator on 0 Reference off 1 Reference on
    obj.REF2_5V = ADC10.REF2_5V_t ...
    // Reference-generator voltage. REFON must also be set. 0 1.5 V 1 2.5 V
    obj.MSC = ADC10.MSC_t ...
    // Multiple sample and conversion. Valid only for sequence or repeated modes. 0 The sampling requires a rising edge of the SHI signal to trigger each sample-and-conversion. 1 The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed
    obj.REFBURST = ADC10.REFBURST_t ...
    // Reference burst. 0 Reference buffer on continuously 1 Reference buffer on only during sample-and-conversion
    obj.REFOUT = ADC10.REFOUT_t ...
    // Reference output 0 Reference output off 1 Reference output on, use internal reference voltage externally on pin VREF+
    obj.ADC10SR = ADC10.ADC10SR_t ...
    // ADC10 sampling rate. This bit selects the reference buffer drive capability for the maximum sampling rate. Setting ADC10SR reduces the current consumption of the reference buffer. 0 Reference buffer supports up to ~200 ksps 1 Reference buffer supports up to ~50 ksps
    obj.ADC10SHT = ADC10.ADC10SHT_t ...
    // ADC10 sample-and-hold time 00 4 x ADC10CLKs 01 8 x ADC10CLKs 10 16 x ADC10CLKs 11 64 x ADC10CLKs
    obj.SREF = ADC10.SREF_t ...
    // Select reference 000 VR+ = VCC and VR- = VSS 001 VR+ = VREF+ and VR- = VSS 010 VR+ = VeREF+ and VR- = VSS 011 VR+ = Buffered VeREF+ and VR- = VSS 100 VR+ = VCC and VR- = VREF-/ VeREF- 101 VR+ = VREF+ and VR- = VREF-/ VeREF- 110 VR+ = VeREF+ and VR- = VREF-/ VeREF- 111 VR+ = Buffered VeREF+ and VR- = VREF-/ VeREF-
SEE
ADC10CTL0
struct ADC10.ADC10CTL1_t
index URL

ADC10 Control Register 1

Configuration settings
var obj = new ADC10.ADC10CTL1_t;
    obj.ADC10BUSY = ADC10.ADC10BUSY_t ...
    // ADC10 busy. This bit indicates an active sample or conversion operation 0 No operation is active. 1 A sequence, sample, or conversion is active
    obj.CONSEQ = ADC10.CONSEQ_t ...
    // Conversion sequence mode select 00 Single-channel-single-conversion 01 Sequence-of-channels 10 Repeat-single-channel 11 Repeat-sequence-of-channels
    obj.ADC10SSEL = ADC10.ADC10SSEL_t ...
    // ADC10 clock source select 00 ADC10OSC 01 ACLK 10 MCLK 11 SMCLK
    obj.ADC10DIV = ADC10.ADC10DIV_t ...
    // ADC10 clock divider 000 /1 001 /2 010 /3 011 /4 100 /5 101 /6 110 /7 111 /8
    obj.ISSH = ADC10.ISSH_t ...
    // Invert signal sample-and-hold 0 The sample-input signal is not inverted. 1 The sample-input signal is inverted
    obj.ADC10DF = ADC10.ADC10DF_t ...
    // ADC10 data format 0 Straight binary 1 2s complement
    obj.SHS = ADC10.SHS_t ...
    // Sample-and-hold source select 00 ADC10SC bit 01 Timer_A.OUT1 10 Timer_A.OUT0 11 Timer_A.OUT2 (Timer_A.OUT1 on MSP430x20x2 devices)
    obj.INCH = ADC10.INCH_t ...
    // Input channel select. These bits select the channel for a single-conversion or the highest channel for a sequence of conversions. 0000 A0 0001 A1 0010 A2 0011 A3 0100 A4 0101 A5 0110 A6 0111 A7 1000 VeREF+ 1001 VREF-/VeREF- 1010 Temperature sensor 1011 (VCC ??? VSS) / 1100 A12 1101 A13 1110 A14 1111 A15
SEE
ADC10CTL1
struct ADC10.ADC10DTC0_t
index URL

Data Transfer Control Register 0

Configuration settings
var obj = new ADC10.ADC10DTC0_t;
    obj.ADC10TB = ADC10.ADC10TB_t ...
    // ADC10 two-block mode 0 One-block transfer mode 1 Two-block transfer mode
    obj.ADC10CT = ADC10.ADC10CT_t ...
    // ADC10 continuous transfer 0 Data transfer stops when one block (one-block mode) or two blocks (two-block mode) have completed. 1 Data is transferred continuously. DTC operation is stopped only if ADC10CT cleared, or ADC10SA is written to
SEE
ADC10DTC0
struct ADC10.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new ADC10.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ADC10.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new ADC10.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
ADC10.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
ADC10.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ADC10.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
ADC10.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new ADC10.Params;
// Instance config-params object
    params.ADC10AE0 = Bits16 0;
    // Analog (Input) Enable Control Register 0
    params.ADC10AE1 = Bits16 0;
    // Analog (Input) Enable Control Register 1
    params.ADC10CTL0 = ADC10.ADC10CTL0_t {
    // Control Register 0
        ADC10SC: ADC10.ADC10SC_OFF,
        ENC: ADC10.ENC_OFF,
        ADC10IFG: ADC10.ADC10IFG_OFF,
        ADC10IE: ADC10.ADC10IE_OFF,
        ADC10ON: ADC10.ADC10ON_OFF,
        REFON: ADC10.REFON_OFF,
        REF2_5V: ADC10.REF2_5V_OFF,
        MSC: ADC10.MSC_OFF,
        REFBURST: ADC10.REFBURST_OFF,
        REFOUT: ADC10.REFOUT_OFF,
        ADC10SR: ADC10.ADC10SR_OFF,
        ADC10SHT: ADC10.ADC10SHT_0,
        SREF: ADC10.SREF_0
    };
    params.ADC10CTL1 = ADC10.ADC10CTL1_t {
    // Control Register 1
        ADC10BUSY: ADC10.ADC10BUSY_OFF,
        CONSEQ: ADC10.CONSEQ_0,
        ADC10SSEL: ADC10.ADC10SSEL_0,
        ADC10DIV: ADC10.ADC10DIV_0,
        ISSH: ADC10.ISSH_OFF,
        ADC10DF: ADC10.ADC10DF_OFF,
        SHS: ADC10.SHS_0,
        INCH: ADC10.INCH_0
    };
    params.ADC10DTC0 = ADC10.ADC10DTC0_t {
    // Data Transfer Control Register 0
        ADC10TB: ADC10.ADC10TB_OFF,
        ADC10CT: ADC10.ADC10CT_OFF
    };
    params.ADC10DTC1 = Bits8 0;
    // Data Transfer Control Register 1
    params.ADC10SA = Bits16* 0x200;
    // Data Transfer Start Address
    params.forceSetDefaultRegister = ADC10.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "ADC10CTL0",
            regForceSet: false
        },
        {
            register: "ADC10CTL1",
            regForceSet: false
        },
        {
            register: "ADC10AE0",
            regForceSet: false
        },
        {
            register: "ADC10AE1",
            regForceSet: false
        },
        {
            register: "ADC10DTC0",
            regForceSet: false
        },
        {
            register: "ADC10DTC1",
            regForceSet: false
        },
        {
            register: "ADC10SA",
            regForceSet: true
        }
    ];
    params.interruptSource = ADC10.regIntVect_t[1] undefined;
    // ADC10 has 1 interrupt enable
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config ADC10.Params.ADC10AE0 // instance
index URL

Analog (Input) Enable Control Register 0

Configuration settings
var params = new ADC10.Params;
...
params.ADC10AE0 = Bits16 0;
DETAILS
Bit n enables the corresponding pin for analog input. Bit 0 corresponds to A0, bit 1 corresponds to A1, ...
config ADC10.Params.ADC10AE1 // instance
index URL

Analog (Input) Enable Control Register 1

Configuration settings
var params = new ADC10.Params;
...
params.ADC10AE1 = Bits16 0;
DETAILS
Bits 0, 1, 2, and 3 are reserved.
Starting with bit 4, bit n enables pin n+8 for analog input: Bit 4 corresponds to A12, bit 5 corresponds to A13, ...
config ADC10.Params.ADC10CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new ADC10.Params;
...
params.ADC10CTL0 = ADC10.ADC10CTL0_t {
    ADC10SC: ADC10.ADC10SC_OFF,
    ENC: ADC10.ENC_OFF,
    ADC10IFG: ADC10.ADC10IFG_OFF,
    ADC10IE: ADC10.ADC10IE_OFF,
    ADC10ON: ADC10.ADC10ON_OFF,
    REFON: ADC10.REFON_OFF,
    REF2_5V: ADC10.REF2_5V_OFF,
    MSC: ADC10.MSC_OFF,
    REFBURST: ADC10.REFBURST_OFF,
    REFOUT: ADC10.REFOUT_OFF,
    ADC10SR: ADC10.ADC10SR_OFF,
    ADC10SHT: ADC10.ADC10SHT_0,
    SREF: ADC10.SREF_0
};
config ADC10.Params.ADC10CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new ADC10.Params;
...
params.ADC10CTL1 = ADC10.ADC10CTL1_t {
    ADC10BUSY: ADC10.ADC10BUSY_OFF,
    CONSEQ: ADC10.CONSEQ_0,
    ADC10SSEL: ADC10.ADC10SSEL_0,
    ADC10DIV: ADC10.ADC10DIV_0,
    ISSH: ADC10.ISSH_OFF,
    ADC10DF: ADC10.ADC10DF_OFF,
    SHS: ADC10.SHS_0,
    INCH: ADC10.INCH_0
};
config ADC10.Params.ADC10DTC0 // instance
index URL

Data Transfer Control Register 0

Configuration settings
var params = new ADC10.Params;
...
params.ADC10DTC0 = ADC10.ADC10DTC0_t {
    ADC10TB: ADC10.ADC10TB_OFF,
    ADC10CT: ADC10.ADC10CT_OFF
};
config ADC10.Params.ADC10DTC1 // instance
index URL

Data Transfer Control Register 1

Configuration settings
var params = new ADC10.Params;
...
params.ADC10DTC1 = Bits8 0;
DETAILS
This register defines the number of transfers in each block: 0 implies DTC is disabled, 1 through 0xff are valid transfer counts.
config ADC10.Params.ADC10SA // instance
index URL

Data Transfer Start Address

Configuration settings
var params = new ADC10.Params;
...
params.ADC10SA = Bits16* 0x200;
config ADC10.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new ADC10.Params;
...
const params.forceSetDefaultRegister = ADC10.ForceSetDefaultRegister_t[] [
    {
        register: "ADC10CTL0",
        regForceSet: false
    },
    {
        register: "ADC10CTL1",
        regForceSet: false
    },
    {
        register: "ADC10AE0",
        regForceSet: false
    },
    {
        register: "ADC10AE1",
        regForceSet: false
    },
    {
        register: "ADC10DTC0",
        regForceSet: false
    },
    {
        register: "ADC10DTC1",
        regForceSet: false
    },
    {
        register: "ADC10SA",
        regForceSet: true
    }
];
config ADC10.Params.interruptSource // instance
index URL

ADC10 has 1 interrupt enable

Configuration settings
var params = new ADC10.Params;
...
params.interruptSource = ADC10.regIntVect_t[1] undefined;
config ADC10.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new ADC10.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ADC10.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new ADC10.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new ADC10.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = ADC10.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:12 GMT


module ti.catalog.msp430.peripherals.adc.ADC10_B

metaonly module ti.catalog.msp430.peripherals.adc.ADC10_B
index URL

MSP430 10-bit Analog to Digital Converter

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/adc/ADC10_B.xdc
var ADC10_B = xdc.useModule('ti.catalog.msp430.peripherals.adc.ADC10_B');
module-wide constants & types
    var obj = new ADC10_B.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new ADC10_B.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     ADC10_B.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     ADC10_B.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new ADC10_B.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = ADC10_B.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// Interrupt enables = ADC10_B.regIntVect_t[4] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = ADC10_B.create// Create an instance-object(IClock.Instance clock, params);
struct ADC10_B.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new ADC10_B.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ADC10_B.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new ADC10_B.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
ADC10_B.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
ADC10_B.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ADC10_B.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
ADC10_B.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new ADC10_B.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = ADC10_B.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = ADC10_B.regIntVect_t[4] undefined;
    // Interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config ADC10_B.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new ADC10_B.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config ADC10_B.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new ADC10_B.Params;
...
const params.forceSetDefaultRegister = ADC10_B.ForceSetDefaultRegister_t[] [ ];
config ADC10_B.Params.interruptSource // instance
index URL

Interrupt enables

Configuration settings
var params = new ADC10_B.Params;
...
params.interruptSource = ADC10_B.regIntVect_t[4] undefined;
config ADC10_B.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new ADC10_B.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ADC10_B.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new ADC10_B.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new ADC10_B.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = ADC10_B.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:12 GMT


module ti.catalog.msp430.peripherals.adc.ADC12

metaonly module ti.catalog.msp430.peripherals.adc.ADC12
index URL

MSP430 12-bit Analog to Digital Converter

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/adc/ADC12.xdc
var ADC12 = xdc.useModule('ti.catalog.msp430.peripherals.adc.ADC12');
module-wide constants & types
    values of type ADC12.ADC12BUSY_t// ADC12 Busy Bit
        const ADC12.ADC12BUSY_OFF;
        const ADC12.ADC12BUSY;
    values of type ADC12.ADC12DIV_t// ADC12DIV Bits
        const ADC12.ADC12DIV_0// Divide by 1;
        const ADC12.ADC12DIV_1// Divide by 2;
        const ADC12.ADC12DIV_2// Divide by 3;
        const ADC12.ADC12DIV_3// Divide by 4;
        const ADC12.ADC12DIV_4// Divide by 5;
        const ADC12.ADC12DIV_5// Divide by 6;
        const ADC12.ADC12DIV_6// Divide by 7;
        const ADC12.ADC12DIV_7// Divide by 8;
    values of type ADC12.ADC12IE0_t// ADC12 Interrupt Enable Bit 0
        const ADC12.ADC12IE0_OFF// Disable the interrupt request for the ADC12IFG0 bit;
        const ADC12.ADC12IE0// Enable the interrupt request for the ADC12IFG0 bit;
    values of type ADC12.ADC12IE10_t// ADC12 Interrupt Enable Bit 10
        const ADC12.ADC12IE10_OFF// Disable the interrupt request for the ADC12IFG10 bit;
        const ADC12.ADC12IE10// Enable the interrupt request for the ADC12IFG10 bit;
    values of type ADC12.ADC12IE11_t// ADC12 Interrupt Enable Bit 11
        const ADC12.ADC12IE11_OFF// Disable the interrupt request for the ADC12IFG11 bit;
        const ADC12.ADC12IE11// Enable the interrupt request for the ADC12IFG11 bit;
    values of type ADC12.ADC12IE12_t// ADC12 Interrupt Enable Bit 12
        const ADC12.ADC12IE12_OFF// Disable the interrupt request for the ADC12IFG12 bit;
        const ADC12.ADC12IE12// Enable the interrupt request for the ADC12IFG12 bit;
    values of type ADC12.ADC12IE13_t// ADC12 Interrupt Enable Bit 13
        const ADC12.ADC12IE13_OFF// Disable the interrupt request for the ADC12IFG13 bit;
        const ADC12.ADC12IE13// Enable the interrupt request for the ADC12IFG13 bit;
    values of type ADC12.ADC12IE14_t// ADC12 Interrupt Enable Bit 14
        const ADC12.ADC12IE14_OFF// Disable the interrupt request for the ADC12IFG14 bit;
        const ADC12.ADC12IE14// Enable the interrupt request for the ADC12IFG14 bit;
    values of type ADC12.ADC12IE15_t// ADC12 Interrupt Enable Bit 15
        const ADC12.ADC12IE15_OFF// Disable the interrupt request for the ADC12IFG15 bit;
        const ADC12.ADC12IE15// Enable the interrupt request for the ADC12IFG15 bit;
    values of type ADC12.ADC12IE1_t// ADC12 Interrupt Enable Bit 1
        const ADC12.ADC12IE1_OFF// Disable the interrupt request for the ADC12IFG1 bit;
        const ADC12.ADC12IE1// Enable the interrupt request for the ADC12IFG1 bit;
    values of type ADC12.ADC12IE2_t// ADC12 Interrupt Enable Bit 2
        const ADC12.ADC12IE2_OFF// Disable the interrupt request for the ADC12IFG2 bit;
        const ADC12.ADC12IE2// Enable the interrupt request for the ADC12IFG2 bit;
    values of type ADC12.ADC12IE3_t// ADC12 Interrupt Enable Bit 3
        const ADC12.ADC12IE3_OFF// Disable the interrupt request for the ADC12IFG3 bit;
        const ADC12.ADC12IE3// Enable the interrupt request for the ADC12IFG3 bit;
    values of type ADC12.ADC12IE4_t// ADC12 Interrupt Enable Bit 4
        const ADC12.ADC12IE4_OFF// Disable the interrupt request for the ADC12IFG4 bit;
        const ADC12.ADC12IE4// Enable the interrupt request for the ADC12IFG4 bit;
    values of type ADC12.ADC12IE5_t// ADC12 Interrupt Enable Bit 5
        const ADC12.ADC12IE5_OFF// Disable the interrupt request for the ADC12IFG5 bit;
        const ADC12.ADC12IE5// Enable the interrupt request for the ADC12IFG5 bit;
    values of type ADC12.ADC12IE6_t// ADC12 Interrupt Enable Bit 6
        const ADC12.ADC12IE6_OFF// Disable the interrupt request for the ADC12IFG6 bit;
        const ADC12.ADC12IE6// Enable the interrupt request for the ADC12IFG6 bit;
    values of type ADC12.ADC12IE7_t// ADC12 Interrupt Enable Bit 7
        const ADC12.ADC12IE7_OFF// Disable the interrupt request for the ADC12IFG7 bit;
        const ADC12.ADC12IE7// Enable the interrupt request for the ADC12IFG7 bit;
    values of type ADC12.ADC12IE8_t// ADC12 Interrupt Enable Bit 8
        const ADC12.ADC12IE8_OFF// Disable the interrupt request for the ADC12IFG8 bit;
        const ADC12.ADC12IE8// Enable the interrupt request for the ADC12IFG8 bit;
    values of type ADC12.ADC12IE9_t// ADC12 Interrupt Enable Bit 9
        const ADC12.ADC12IE9_OFF// Disable the interrupt request for the ADC12IFG9 bit;
        const ADC12.ADC12IE9// Enable the interrupt request for the ADC12IFG9 bit;
    values of type ADC12.ADC12IV_t// ADC12IV Definitions
        const ADC12.ADC12IV_NONE// No Interrupt pending;
        const ADC12.ADC12IV_ADC12OVIFG// ADC12OVIFG;
        const ADC12.ADC12IV_ADC12TOVIFG// ADC12TOVIFG;
        const ADC12.ADC12IV_ADC12IFG0// ADC12IFG0;
        const ADC12.ADC12IV_ADC12IFG1// ADC12IFG1;
        const ADC12.ADC12IV_ADC12IFG2// ADC12IFG2;
        const ADC12.ADC12IV_ADC12IFG3// ADC12IFG3;
        const ADC12.ADC12IV_ADC12IFG4// ADC12IFG4;
        const ADC12.ADC12IV_ADC12IFG5// ADC12IFG5;
        const ADC12.ADC12IV_ADC12IFG6// ADC12IFG6;
        const ADC12.ADC12IV_ADC12IFG7// ADC12IFG7;
        const ADC12.ADC12IV_ADC12IFG8// ADC12IFG8;
        const ADC12.ADC12IV_ADC12IFG9// ADC12IFG9;
        const ADC12.ADC12IV_ADC12IFG10// ADC12IFG10;
        const ADC12.ADC12IV_ADC12IFG11// ADC12IFG11;
        const ADC12.ADC12IV_ADC12IFG12// ADC12IFG12;
        const ADC12.ADC12IV_ADC12IFG13// ADC12IFG13;
        const ADC12.ADC12IV_ADC12IFG14// ADC12IFG14;
        const ADC12.ADC12IV_ADC12IFG15// ADC12IFG15;
    values of type ADC12.ADC12ON_t// ADC12ON Bit
        const ADC12.ADC12ON_OFF// ADC12 off;
        const ADC12.ADC12ON// ADC12 on;
    values of type ADC12.ADC12OVIE_t// ADC12OVIE Bit
        const ADC12.ADC12OVIE_OFF// Overflow interrupt disabled;
        const ADC12.ADC12OVIE// Overflow interrupt enabled;
    values of type ADC12.ADC12SC_t// ADC12SC Bit
        const ADC12.ADC12SC_OFF// No sample-and-conversion-start;
        const ADC12.ADC12SC// Start sample-and-conversion;
    values of type ADC12.ADC12SHT0_t// SHT0 Bits
        const ADC12.SHT0_0// 4 ADC12CLK cycles;
        const ADC12.SHT0_1// 8 ADC12CLK cycles;
        const ADC12.SHT0_2// 16 ADC12CLK cycles;
        const ADC12.SHT0_3// 32 ADC12CLK cycles;
        const ADC12.SHT0_4// 64 ADC12CLK cycles;
        const ADC12.SHT0_5// 96 ADC12CLK cycles;
        const ADC12.SHT0_6// 128 ADC12CLK cycles;
        const ADC12.SHT0_7// 192 ADC12CLK cycles;
        const ADC12.SHT0_8// 256 ADC12CLK cycles;
        const ADC12.SHT0_9// 384 ADC12CLK cycles;
        const ADC12.SHT0_10// 512 ADC12CLK cycles;
        const ADC12.SHT0_11// 768 ADC12CLK cycles;
        const ADC12.SHT0_12// 1024 ADC12CLK cycles;
    values of type ADC12.ADC12SHT1_t// SHT1 Bits
        const ADC12.SHT1_0// 4 ADC12CLK cycles;
        const ADC12.SHT1_1// 8 ADC12CLK cycles;
        const ADC12.SHT1_2// 16 ADC12CLK cycles;
        const ADC12.SHT1_3// 32 ADC12CLK cycles;
        const ADC12.SHT1_4// 64 ADC12CLK cycles;
        const ADC12.SHT1_5// 96 ADC12CLK cycles;
        const ADC12.SHT1_6// 128 ADC12CLK cycles;
        const ADC12.SHT1_7// 192 ADC12CLK cycles;
        const ADC12.SHT1_8// 256 ADC12CLK cycles;
        const ADC12.SHT1_9// 384 ADC12CLK cycles;
        const ADC12.SHT1_10// 512 ADC12CLK cycles;
        const ADC12.SHT1_11// 768 ADC12CLK cycles;
        const ADC12.SHT1_12// 1024 ADC12CLK cycles;
    values of type ADC12.ADC12SSEL_t// ADC12SSEL Bits
        const ADC12.ADC12SSEL_0// ADC12OSC;
        const ADC12.ADC12SSEL_1// ACLK;
        const ADC12.ADC12SSEL_2// MCLK;
        const ADC12.ADC12SSEL_3// SMCLK;
    values of type ADC12.ADC12TOVIE_t// ADC12TOVIE Bit
        const ADC12.ADC12TOVIE_OFF// Conversion time overflow interrupt disabled;
        const ADC12.ADC12TOVIE// Conversion time overflow interrupt disabled;
    values of type ADC12.CONSEQ_t// CONSEQ Bits
        const ADC12.CONSEQ_0// Single channel single conversion;
        const ADC12.CONSEQ_1// Sequence of channels;
        const ADC12.CONSEQ_2// Repeat single channel;
        const ADC12.CONSEQ_3// Repeat sequence of channels;
    values of type ADC12.CSTARTADD_t// CSTARTADD Bits
        const ADC12.CSTARTADD_0// ADC12MEM0;
        const ADC12.CSTARTADD_1// ADC12MEM1;
        const ADC12.CSTARTADD_2// ADC12MEM2;
        const ADC12.CSTARTADD_3// ADC12MEM3;
        const ADC12.CSTARTADD_4// ADC12MEM4;
        const ADC12.CSTARTADD_5// ADC12MEM5;
        const ADC12.CSTARTADD_6// ADC12MEM6;
        const ADC12.CSTARTADD_7// ADC12MEM7;
        const ADC12.CSTARTADD_8// ADC12MEM8;
        const ADC12.CSTARTADD_9// ADC12MEM9;
        const ADC12.CSTARTADD_10// ADC12MEM10;
        const ADC12.CSTARTADD_11// ADC12MEM11;
        const ADC12.CSTARTADD_12// ADC12MEM12;
        const ADC12.CSTARTADD_13// ADC12MEM13;
        const ADC12.CSTARTADD_14// ADC12MEM14;
        const ADC12.CSTARTADD_15// ADC12MEM15;
    values of type ADC12.ENC_t// ENC Bit
        const ADC12.ENC_OFF// ADC12 disabled;
        const ADC12.ENC// ADC12 enabled;
    values of type ADC12.EOS_t// EOS Bit
        const ADC12.EOS_OFF// Not end of sequence;
        const ADC12.EOS// End of sequence;
    values of type ADC12.INCH_t// INCH Bits
        const ADC12.INCH_0// A0;
        const ADC12.INCH_1// A1;
        const ADC12.INCH_2// A2;
        const ADC12.INCH_3// A3;
        const ADC12.INCH_4// A4;
        const ADC12.INCH_5// A5;
        const ADC12.INCH_6// A6;
        const ADC12.INCH_7// A7;
        const ADC12.INCH_8// VeREF+;
        const ADC12.INCH_9// VREF--/VeREF-;
        const ADC12.INCH_10// Temperature diode;
        const ADC12.INCH_11// (AVcc - AVss) / 2;
        const ADC12.INCH_12// GND;
        const ADC12.INCH_13// GND;
        const ADC12.INCH_14// GND;
        const ADC12.INCH_15// GND;
    values of type ADC12.ISSH_t// ISSH Bits
        const ADC12.ISSH_OFF// The sample-input signal is not inverted;
        const ADC12.ISSH// The sample-input signal is inverted;
    values of type ADC12.MSC_t// MSC Bit
        const ADC12.MSC_OFF// The sampling timer requires a rising edge of the SHI signal to trigger each sample-and-conversion;
        const ADC12.MSC// The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed;
    values of type ADC12.REF2_5V_t// REF2_5V Bit
        const ADC12.REF2_5V_OFF// 1.5V;
        const ADC12.REF2_5V// 2.5V;
    values of type ADC12.REFON_t// REFON Bit
        const ADC12.REFON_OFF// Reference off;
        const ADC12.REFON// Reference on;
    values of type ADC12.SHP_t// SHP Bits
        const ADC12.SHP_OFF// SAMPCON signal is sourced from the sample-input signal;
        const ADC12.SHP// SAMPCON signal is sourced from the sampling timer;
    values of type ADC12.SHS_t// SHS Bits
        const ADC12.SHS_0// ADC12SC bit;
        const ADC12.SHS_1// Timer_A.OUT1;
        const ADC12.SHS_2// Timer_B.OUT0;
        const ADC12.SHS_3// Timer_B.OUT1;
    values of type ADC12.SREF_t// SREF Bits
        const ADC12.SREF_0// VR+ = AVcc and VR-- = AVss;
        const ADC12.SREF_1// VR+ = VREF+ and VR-- = AVss;
        const ADC12.SREF_2// VR+ = VeREF+ and VR-- = AVss;
        const ADC12.SREF_3// VR+ = VeREF+ and VR-- = AVss;
        const ADC12.SREF_4// VR+ = AVcc and VR-- = VREF--/ VeREF--;
        const ADC12.SREF_5// VR+ = VREF+ and VR-- = VREF--/ VeREF--;
        const ADC12.SREF_6// VR+ = VeREF+ and VR-- = VREF--/ VeREF--;
        const ADC12.SREF_7// VR+ = VeREF+ and VR-- = VREF--/ VeREF--;
    var obj = new ADC12.ADC12CTL0_t// ADC12 Control Register 0;
        obj.ADC12SHT1// Sample-and-hold time. These bits define the number of ADC12CLK cycles in the sampling period for registers ADC12MEM8 to ADC12MEM15 = ADC12.ADC12SHT1_t ...
        obj.ADC12SHT0// Sample-and-hold time. These bits define the number of ADC12CLK cycles in the sampling period for registers ADC12MEM0 to ADC12MEM7 = ADC12.ADC12SHT0_t ...
        obj.MSC// Multiple sample and conversion. Valid only for sequence or repeated modes. 0 The sampling timer requires a rising edge of the SHI signal to trigger each sample-and-conversion. 1 The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed = ADC12.MSC_t ...
        obj.REF2_5V// Reference generator voltage. REFON must also be set. 0 1.5V 1 2.5V = ADC12.REF2_5V_t ...
        obj.REFON// Reference generator on 0 Reference off 1 Reference on = ADC12.REFON_t ...
        obj.ADC12ON// ADC12 on 0 ADC12 off 1 ADC12 on = ADC12.ADC12ON_t ...
        obj.ADC12OVIE// ADC12MEMx overflow-interrupt enable. The GIE bit must also be set to enable the interrupt. 0 Overflow interrupt disabled 1 Overflow interrupt enabled = ADC12.ADC12OVIE_t ...
        obj.ADC12TOVIE// ADC12 conversion-time-overflow interrupt enable. The GIE bit must also be set to enable the interrupt. 0 Conversion time overflow interrupt disabled 1 Conversion time overflow interrupt enabled = ADC12.ADC12TOVIE_t ...
        obj.ENC// Enable conversion 0 ADC12 disabled 1 ADC12 enabled = ADC12.ENC_t ...
        obj.ADC12SC// Start conversion. Software-controlled sample-and-conversion start. ADC12SC and ENC may be set together with one instruction. ADC12SC is reset automatically. 0 No sample-and-conversion-start 1 Start sample-and-conversion = ADC12.ADC12SC_t ...
    var obj = new ADC12.ADC12CTL1_t// ADC12 Control Register 1;
        obj.CSTARTADD// Conversion start address. These bits select which ADC12 conversion-memory register is used for a single conversion or for the first conversion in a sequence. The value of CSTARTADDx is 0 to 0Fh, corresponding to ADC12MEM0 to ADC12MEM15 = ADC12.CSTARTADD_t ...
        obj.SHS// Sample-and-hold source select 00 ADC12SC bit 01 Timer_A.OUT1 10 Timer_B.OUT0 11 Timer_B.OUT1 = ADC12.SHS_t ...
        obj.SHP// Sample-and-hold pulse-mode select. This bit selects the source of the sampling signal (SAMPCON) to be either the output of the sampling timer or the sample-input signal directly. 0 SAMPCON signal is sourced from the sample-input signal. 1 SAMPCON signal is sourced from the sampling timer = ADC12.SHP_t ...
        obj.ISSH// Invert signal sample-and-hold 0 The sample-input signal is not inverted. 1 The sample-input signal is inverted = ADC12.ISSH_t ...
        obj.ADC12DIV// ADC12 clock divider 000 /1 001 /2 010 /3 011 /4 100 /5 101 /6 110 /7 111 /8 = ADC12.ADC12DIV_t ...
        obj.ADC12SSEL// ADC12 clock source select 00 ADC12OSC 01 ACLK 10 MCLK 11 SMCLK = ADC12.ADC12SSEL_t ...
        obj.CONSEQ// Conversion sequence mode select 00 Single-channel, single-conversion 01 Sequence-of-channels 10 Repeat-single-channel 11 Repeat-sequence-of-channels = ADC12.CONSEQ_t ...
        obj.ADC12BUSY// ADC12 busy. This bit indicates an active sample or conversion operation. 0 No operation is active. 1 A sequence, sample, or conversion is active = ADC12.ADC12BUSY_t ...
    var obj = new ADC12.ADC12IE_t// ADC12 Interrupt Enable Register;
        obj.ADC12IE15// Enable or disable the interrupt request for the ADC12IFG15 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE15_t ...
        obj.ADC12IE14// Enable or disable the interrupt request for the ADC12IFG14 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE14_t ...
        obj.ADC12IE13// Enable or disable the interrupt request for the ADC12IFG13 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE13_t ...
        obj.ADC12IE12// Enable or disable the interrupt request for the ADC12IFG12 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE12_t ...
        obj.ADC12IE11// Enable or disable the interrupt request for the ADC12IFG11 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE11_t ...
        obj.ADC12IE10// Enable or disable the interrupt request for the ADC12IFG10 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE10_t ...
        obj.ADC12IE9// Enable or disable the interrupt request for the ADC12IFG9 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE9_t ...
        obj.ADC12IE8// Enable or disable the interrupt request for the ADC12IFG8 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE8_t ...
        obj.ADC12IE7// Enable or disable the interrupt request for the ADC12IFG7 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE7_t ...
        obj.ADC12IE6// Enable or disable the interrupt request for the ADC12IFG6 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE6_t ...
        obj.ADC12IE5// Enable or disable the interrupt request for the ADC12IFG5 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE5_t ...
        obj.ADC12IE4// Enable or disable the interrupt request for the ADC12IFG4 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE4_t ...
        obj.ADC12IE3// Enable or disable the interrupt request for the ADC12IFG3 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE3_t ...
        obj.ADC12IE2// Enable or disable the interrupt request for the ADC12IFG2 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE2_t ...
        obj.ADC12IE1// Enable or disable the interrupt request for the ADC12IFG1 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE1_t ...
        obj.ADC12IE0// Enable or disable the interrupt request for the ADC12IFG0 bit. 0 Interrupt disabled 1 Interrupt enabled = ADC12.ADC12IE0_t ...
    var obj = new ADC12.ADC12MCTL_t// ADC12 Conversion Memory Control Registers;
        obj.EOS// End of sequence. Indicates the last conversion in a sequence. 0 Not end of sequence 1 End of sequence = ADC12.EOS_t ...
        obj.SREF// Select reference 000 VR+ = AVCC and VR-- = AVSS 001 VR+ = VREF+ and VR-- = AVSS 010 VR+ = VeREF+ and VR-- = AVSS 011 VR+ = VeREF+ and VR-- = AVSS 100 VR+ = AVCC and VR-- = VREF--/ VeREF-- 101 VR+ = VREF+ and VR-- = VREF--/ VeREF-- 110 VR+ = VeREF+ and VR-- = VREF--/ VeREF-- 111 VR+ = VeREF+ and VR-- = VREF--/ VeREF-- = ADC12.SREF_t ...
        obj.INCH// Input channel select 0000 A0 0001 A1 0010 A2 0011 A3 0100 A4 0101 A5 0110 A6 0111 A7 1000 VeREF+ 1001 VREF--/VeREF-- 1010 Temperature diode 1011 (AVCC ??? AVSS) / 1100 GND 1101 GND 1110 GND 1111 GND = ADC12.INCH_t ...
    var obj = new ADC12.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new ADC12.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     ADC12.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     ADC12.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new ADC12.Params// Instance config-params object;
        params.ADC12CTL0// ADC12CTL0 Register = ADC12.ADC12CTL0_t {
            ADC12SHT1: ADC12.SHT1_0,
            ADC12SHT0: ADC12.SHT0_0,
            MSC: ADC12.MSC_OFF,
            REF2_5V: ADC12.REF2_5V_OFF,
            REFON: ADC12.REFON_OFF,
            ADC12ON: ADC12.ADC12ON_OFF,
            ADC12OVIE: ADC12.ADC12OVIE_OFF,
            ADC12TOVIE: ADC12.ADC12TOVIE_OFF,
            ENC: ADC12.ENC_OFF,
            ADC12SC: ADC12.ADC12SC_OFF
        };
        params.ADC12CTL1// ADC12CTL1 Register = ADC12.ADC12CTL1_t {
            CSTARTADD: ADC12.CSTARTADD_0,
            SHS: ADC12.SHS_0,
            SHP: ADC12.SHP_OFF,
            ISSH: ADC12.ISSH_OFF,
            ADC12DIV: ADC12.ADC12DIV_0,
            ADC12SSEL: ADC12.ADC12SSEL_0,
            CONSEQ: ADC12.CONSEQ_0,
            ADC12BUSY: ADC12.ADC12BUSY_OFF
        };
        params.ADC12IE// ADC12 Interrupt Enable Register = ADC12.ADC12IE_t {
            ADC12IE15: ADC12.ADC12IE15_OFF,
            ADC12IE14: ADC12.ADC12IE14_OFF,
            ADC12IE13: ADC12.ADC12IE13_OFF,
            ADC12IE12: ADC12.ADC12IE12_OFF,
            ADC12IE11: ADC12.ADC12IE11_OFF,
            ADC12IE10: ADC12.ADC12IE10_OFF,
            ADC12IE9: ADC12.ADC12IE9_OFF,
            ADC12IE8: ADC12.ADC12IE8_OFF,
            ADC12IE7: ADC12.ADC12IE7_OFF,
            ADC12IE6: ADC12.ADC12IE6_OFF,
            ADC12IE5: ADC12.ADC12IE5_OFF,
            ADC12IE4: ADC12.ADC12IE4_OFF,
            ADC12IE3: ADC12.ADC12IE3_OFF,
            ADC12IE2: ADC12.ADC12IE2_OFF,
            ADC12IE1: ADC12.ADC12IE1_OFF,
            ADC12IE0: ADC12.ADC12IE0_OFF
        };
        params.ADC12IFG// ADC12IFG Register = Bits16 0;
        params.ADC12IV// ADC12IV Register = Bits16 ADC12.ADC12IV_NONE;
        params.ADC12MCTL0// ADC12MCTL0 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL1// ADC12MCTL1 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL10// ADC12MCTL10 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL11// ADC12MCTL11 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL12// ADC12MCTL12 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL13// ADC12MCTL13 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL14// ADC12MCTL14 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL15// ADC12MCTL15 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL2// ADC12MCTL2 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL3// ADC12MCTL3 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL4// ADC12MCTL4 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL5// ADC12MCTL5 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL6// ADC12MCTL6 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL7// ADC12MCTL7 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL8// ADC12MCTL8 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MCTL9// ADC12MCTL9 Register = ADC12.ADC12MCTL_t {
            EOS: ADC12.EOS_OFF,
            SREF: ADC12.SREF_0,
            INCH: ADC12.INCH_0
        };
        params.ADC12MEM0// ADC12MEM0 Register = Bits16 0;
        params.ADC12MEM1// ADC12MEM1 Register = Bits16 0;
        params.ADC12MEM10// ADC12MEM10 Register = Bits16 0;
        params.ADC12MEM11// ADC12MEM11 Register = Bits16 0;
        params.ADC12MEM12// ADC12MEM12 Register = Bits16 0;
        params.ADC12MEM13// ADC12MEM13 Register = Bits16 0;
        params.ADC12MEM14// ADC12MEM14 Register = Bits16 0;
        params.ADC12MEM15// ADC12MEM15 Register = Bits16 0;
        params.ADC12MEM2// ADC12MEM2 Register = Bits16 0;
        params.ADC12MEM3// ADC12MEM3 Register = Bits16 0;
        params.ADC12MEM4// ADC12MEM4 Register = Bits16 0;
        params.ADC12MEM5// ADC12MEM5 Register = Bits16 0;
        params.ADC12MEM6// ADC12MEM6 Register = Bits16 0;
        params.ADC12MEM7// ADC12MEM7 Register = Bits16 0;
        params.ADC12MEM8// ADC12MEM8 Register = Bits16 0;
        params.ADC12MEM9// ADC12MEM9 Register = Bits16 0;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = ADC12.ForceSetDefaultRegister_t[] [
            {
                register: "ADC12CTL0",
                regForceSet: false
            },
            {
                register: "ADC12CTL1",
                regForceSet: false
            },
            {
                register: "ADC12IFG",
                regForceSet: false
            },
            {
                register: "ADC12IV",
                regForceSet: false
            },
            {
                register: "ADC12IE",
                regForceSet: false
            },
            {
                register: "ADC12MCTL0",
                regForceSet: false
            },
            {
                register: "ADC12MCTL1",
                regForceSet: false
            },
            {
                register: "ADC12MCTL2",
                regForceSet: false
            },
            {
                register: "ADC12MCTL3",
                regForceSet: false
            },
            {
                register: "ADC12MCTL4",
                regForceSet: false
            },
            {
                register: "ADC12MCTL5",
                regForceSet: false
            },
            {
                register: "ADC12MCTL6",
                regForceSet: false
            },
            {
                register: "ADC12MCTL7",
                regForceSet: false
            },
            {
                register: "ADC12MCTL8",
                regForceSet: false
            },
            {
                register: "ADC12MCTL9",
                regForceSet: false
            },
            {
                register: "ADC12MCTL10",
                regForceSet: false
            },
            {
                register: "ADC12MCTL11",
                regForceSet: false
            },
            {
                register: "ADC12MCTL12",
                regForceSet: false
            },
            {
                register: "ADC12MCTL13",
                regForceSet: false
            },
            {
                register: "ADC12MCTL14",
                regForceSet: false
            },
            {
                register: "ADC12MCTL15",
                regForceSet: false
            },
            {
                register: "ADC12MEM0",
                regForceSet: false
            },
            {
                register: "ADC12MEM1",
                regForceSet: false
            },
            {
                register: "ADC12MEM2",
                regForceSet: false
            },
            {
                register: "ADC12MEM3",
                regForceSet: false
            },
            {
                register: "ADC12MEM4",
                regForceSet: false
            },
            {
                register: "ADC12MEM5",
                regForceSet: false
            },
            {
                register: "ADC12MEM6",
                regForceSet: false
            },
            {
                register: "ADC12MEM7",
                regForceSet: false
            },
            {
                register: "ADC12MEM8",
                regForceSet: false
            },
            {
                register: "ADC12MEM9",
                regForceSet: false
            },
            {
                register: "ADC12MEM10",
                regForceSet: false
            },
            {
                register: "ADC12MEM11",
                regForceSet: false
            },
            {
                register: "ADC12MEM12",
                regForceSet: false
            },
            {
                register: "ADC12MEM13",
                regForceSet: false
            },
            {
                register: "ADC12MEM14",
                regForceSet: false
            },
            {
                register: "ADC12MEM15",
                regForceSet: false
            }
        ];
        params.interruptSource// ADC12 has 16 interrupt enable = ADC12.regIntVect_t[16] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = ADC12.create// Create an instance-object(IClock.Instance clock, params);
enum ADC12.ADC12BUSY_t
index URL

ADC12 Busy Bit

Configuration settings
values of type ADC12.ADC12BUSY_t
    const ADC12.ADC12BUSY_OFF;
    const ADC12.ADC12BUSY;
enum ADC12.ADC12DIV_t
index URL

ADC12DIV Bits

Configuration settings
values of type ADC12.ADC12DIV_t
    const ADC12.ADC12DIV_0;
    // Divide by 1
    const ADC12.ADC12DIV_1;
    // Divide by 2
    const ADC12.ADC12DIV_2;
    // Divide by 3
    const ADC12.ADC12DIV_3;
    // Divide by 4
    const ADC12.ADC12DIV_4;
    // Divide by 5
    const ADC12.ADC12DIV_5;
    // Divide by 6
    const ADC12.ADC12DIV_6;
    // Divide by 7
    const ADC12.ADC12DIV_7;
    // Divide by 8
enum ADC12.ADC12IE0_t
index URL

ADC12 Interrupt Enable Bit 0

Configuration settings
values of type ADC12.ADC12IE0_t
    const ADC12.ADC12IE0_OFF;
    // Disable the interrupt request for the ADC12IFG0 bit
    const ADC12.ADC12IE0;
    // Enable the interrupt request for the ADC12IFG0 bit
enum ADC12.ADC12IE10_t
index URL

ADC12 Interrupt Enable Bit 10

Configuration settings
values of type ADC12.ADC12IE10_t
    const ADC12.ADC12IE10_OFF;
    // Disable the interrupt request for the ADC12IFG10 bit
    const ADC12.ADC12IE10;
    // Enable the interrupt request for the ADC12IFG10 bit
enum ADC12.ADC12IE11_t
index URL

ADC12 Interrupt Enable Bit 11

Configuration settings
values of type ADC12.ADC12IE11_t
    const ADC12.ADC12IE11_OFF;
    // Disable the interrupt request for the ADC12IFG11 bit
    const ADC12.ADC12IE11;
    // Enable the interrupt request for the ADC12IFG11 bit
enum ADC12.ADC12IE12_t
index URL

ADC12 Interrupt Enable Bit 12

Configuration settings
values of type ADC12.ADC12IE12_t
    const ADC12.ADC12IE12_OFF;
    // Disable the interrupt request for the ADC12IFG12 bit
    const ADC12.ADC12IE12;
    // Enable the interrupt request for the ADC12IFG12 bit
enum ADC12.ADC12IE13_t
index URL

ADC12 Interrupt Enable Bit 13

Configuration settings
values of type ADC12.ADC12IE13_t
    const ADC12.ADC12IE13_OFF;
    // Disable the interrupt request for the ADC12IFG13 bit
    const ADC12.ADC12IE13;
    // Enable the interrupt request for the ADC12IFG13 bit
enum ADC12.ADC12IE14_t
index URL

ADC12 Interrupt Enable Bit 14

Configuration settings
values of type ADC12.ADC12IE14_t
    const ADC12.ADC12IE14_OFF;
    // Disable the interrupt request for the ADC12IFG14 bit
    const ADC12.ADC12IE14;
    // Enable the interrupt request for the ADC12IFG14 bit
enum ADC12.ADC12IE15_t
index URL

ADC12 Interrupt Enable Bit 15

Configuration settings
values of type ADC12.ADC12IE15_t
    const ADC12.ADC12IE15_OFF;
    // Disable the interrupt request for the ADC12IFG15 bit
    const ADC12.ADC12IE15;
    // Enable the interrupt request for the ADC12IFG15 bit
enum ADC12.ADC12IE1_t
index URL

ADC12 Interrupt Enable Bit 1

Configuration settings
values of type ADC12.ADC12IE1_t
    const ADC12.ADC12IE1_OFF;
    // Disable the interrupt request for the ADC12IFG1 bit
    const ADC12.ADC12IE1;
    // Enable the interrupt request for the ADC12IFG1 bit
enum ADC12.ADC12IE2_t
index URL

ADC12 Interrupt Enable Bit 2

Configuration settings
values of type ADC12.ADC12IE2_t
    const ADC12.ADC12IE2_OFF;
    // Disable the interrupt request for the ADC12IFG2 bit
    const ADC12.ADC12IE2;
    // Enable the interrupt request for the ADC12IFG2 bit
enum ADC12.ADC12IE3_t
index URL

ADC12 Interrupt Enable Bit 3

Configuration settings
values of type ADC12.ADC12IE3_t
    const ADC12.ADC12IE3_OFF;
    // Disable the interrupt request for the ADC12IFG3 bit
    const ADC12.ADC12IE3;
    // Enable the interrupt request for the ADC12IFG3 bit
enum ADC12.ADC12IE4_t
index URL

ADC12 Interrupt Enable Bit 4

Configuration settings
values of type ADC12.ADC12IE4_t
    const ADC12.ADC12IE4_OFF;
    // Disable the interrupt request for the ADC12IFG4 bit
    const ADC12.ADC12IE4;
    // Enable the interrupt request for the ADC12IFG4 bit
enum ADC12.ADC12IE5_t
index URL

ADC12 Interrupt Enable Bit 5

Configuration settings
values of type ADC12.ADC12IE5_t
    const ADC12.ADC12IE5_OFF;
    // Disable the interrupt request for the ADC12IFG5 bit
    const ADC12.ADC12IE5;
    // Enable the interrupt request for the ADC12IFG5 bit
enum ADC12.ADC12IE6_t
index URL

ADC12 Interrupt Enable Bit 6

Configuration settings
values of type ADC12.ADC12IE6_t
    const ADC12.ADC12IE6_OFF;
    // Disable the interrupt request for the ADC12IFG6 bit
    const ADC12.ADC12IE6;
    // Enable the interrupt request for the ADC12IFG6 bit
enum ADC12.ADC12IE7_t
index URL

ADC12 Interrupt Enable Bit 7

Configuration settings
values of type ADC12.ADC12IE7_t
    const ADC12.ADC12IE7_OFF;
    // Disable the interrupt request for the ADC12IFG7 bit
    const ADC12.ADC12IE7;
    // Enable the interrupt request for the ADC12IFG7 bit
enum ADC12.ADC12IE8_t
index URL

ADC12 Interrupt Enable Bit 8

Configuration settings
values of type ADC12.ADC12IE8_t
    const ADC12.ADC12IE8_OFF;
    // Disable the interrupt request for the ADC12IFG8 bit
    const ADC12.ADC12IE8;
    // Enable the interrupt request for the ADC12IFG8 bit
enum ADC12.ADC12IE9_t
index URL

ADC12 Interrupt Enable Bit 9

Configuration settings
values of type ADC12.ADC12IE9_t
    const ADC12.ADC12IE9_OFF;
    // Disable the interrupt request for the ADC12IFG9 bit
    const ADC12.ADC12IE9;
    // Enable the interrupt request for the ADC12IFG9 bit
enum ADC12.ADC12IV_t
index URL

ADC12IV Definitions

Configuration settings
values of type ADC12.ADC12IV_t
    const ADC12.ADC12IV_NONE;
    // No Interrupt pending
    const ADC12.ADC12IV_ADC12OVIFG;
    // ADC12OVIFG
    const ADC12.ADC12IV_ADC12TOVIFG;
    // ADC12TOVIFG
    const ADC12.ADC12IV_ADC12IFG0;
    // ADC12IFG0
    const ADC12.ADC12IV_ADC12IFG1;
    // ADC12IFG1
    const ADC12.ADC12IV_ADC12IFG2;
    // ADC12IFG2
    const ADC12.ADC12IV_ADC12IFG3;
    // ADC12IFG3
    const ADC12.ADC12IV_ADC12IFG4;
    // ADC12IFG4
    const ADC12.ADC12IV_ADC12IFG5;
    // ADC12IFG5
    const ADC12.ADC12IV_ADC12IFG6;
    // ADC12IFG6
    const ADC12.ADC12IV_ADC12IFG7;
    // ADC12IFG7
    const ADC12.ADC12IV_ADC12IFG8;
    // ADC12IFG8
    const ADC12.ADC12IV_ADC12IFG9;
    // ADC12IFG9
    const ADC12.ADC12IV_ADC12IFG10;
    // ADC12IFG10
    const ADC12.ADC12IV_ADC12IFG11;
    // ADC12IFG11
    const ADC12.ADC12IV_ADC12IFG12;
    // ADC12IFG12
    const ADC12.ADC12IV_ADC12IFG13;
    // ADC12IFG13
    const ADC12.ADC12IV_ADC12IFG14;
    // ADC12IFG14
    const ADC12.ADC12IV_ADC12IFG15;
    // ADC12IFG15
enum ADC12.ADC12ON_t
index URL

ADC12ON Bit

Configuration settings
values of type ADC12.ADC12ON_t
    const ADC12.ADC12ON_OFF;
    // ADC12 off
    const ADC12.ADC12ON;
    // ADC12 on
enum ADC12.ADC12OVIE_t
index URL

ADC12OVIE Bit

Configuration settings
values of type ADC12.ADC12OVIE_t
    const ADC12.ADC12OVIE_OFF;
    // Overflow interrupt disabled
    const ADC12.ADC12OVIE;
    // Overflow interrupt enabled
enum ADC12.ADC12SC_t
index URL

ADC12SC Bit

Configuration settings
values of type ADC12.ADC12SC_t
    const ADC12.ADC12SC_OFF;
    // No sample-and-conversion-start
    const ADC12.ADC12SC;
    // Start sample-and-conversion
enum ADC12.ADC12SHT0_t
index URL

SHT0 Bits

Configuration settings
values of type ADC12.ADC12SHT0_t
    const ADC12.SHT0_0;
    // 4 ADC12CLK cycles
    const ADC12.SHT0_1;
    // 8 ADC12CLK cycles
    const ADC12.SHT0_2;
    // 16 ADC12CLK cycles
    const ADC12.SHT0_3;
    // 32 ADC12CLK cycles
    const ADC12.SHT0_4;
    // 64 ADC12CLK cycles
    const ADC12.SHT0_5;
    // 96 ADC12CLK cycles
    const ADC12.SHT0_6;
    // 128 ADC12CLK cycles
    const ADC12.SHT0_7;
    // 192 ADC12CLK cycles
    const ADC12.SHT0_8;
    // 256 ADC12CLK cycles
    const ADC12.SHT0_9;
    // 384 ADC12CLK cycles
    const ADC12.SHT0_10;
    // 512 ADC12CLK cycles
    const ADC12.SHT0_11;
    // 768 ADC12CLK cycles
    const ADC12.SHT0_12;
    // 1024 ADC12CLK cycles
enum ADC12.ADC12SHT1_t
index URL

SHT1 Bits

Configuration settings
values of type ADC12.ADC12SHT1_t
    const ADC12.SHT1_0;
    // 4 ADC12CLK cycles
    const ADC12.SHT1_1;
    // 8 ADC12CLK cycles
    const ADC12.SHT1_2;
    // 16 ADC12CLK cycles
    const ADC12.SHT1_3;
    // 32 ADC12CLK cycles
    const ADC12.SHT1_4;
    // 64 ADC12CLK cycles
    const ADC12.SHT1_5;
    // 96 ADC12CLK cycles
    const ADC12.SHT1_6;
    // 128 ADC12CLK cycles
    const ADC12.SHT1_7;
    // 192 ADC12CLK cycles
    const ADC12.SHT1_8;
    // 256 ADC12CLK cycles
    const ADC12.SHT1_9;
    // 384 ADC12CLK cycles
    const ADC12.SHT1_10;
    // 512 ADC12CLK cycles
    const ADC12.SHT1_11;
    // 768 ADC12CLK cycles
    const ADC12.SHT1_12;
    // 1024 ADC12CLK cycles
enum ADC12.ADC12SSEL_t
index URL

ADC12SSEL Bits

Configuration settings
values of type ADC12.ADC12SSEL_t
    const ADC12.ADC12SSEL_0;
    // ADC12OSC
    const ADC12.ADC12SSEL_1;
    // ACLK
    const ADC12.ADC12SSEL_2;
    // MCLK
    const ADC12.ADC12SSEL_3;
    // SMCLK
enum ADC12.ADC12TOVIE_t
index URL

ADC12TOVIE Bit

Configuration settings
values of type ADC12.ADC12TOVIE_t
    const ADC12.ADC12TOVIE_OFF;
    // Conversion time overflow interrupt disabled
    const ADC12.ADC12TOVIE;
    // Conversion time overflow interrupt disabled
enum ADC12.CONSEQ_t
index URL

CONSEQ Bits

Configuration settings
values of type ADC12.CONSEQ_t
    const ADC12.CONSEQ_0;
    // Single channel single conversion
    const ADC12.CONSEQ_1;
    // Sequence of channels
    const ADC12.CONSEQ_2;
    // Repeat single channel
    const ADC12.CONSEQ_3;
    // Repeat sequence of channels
enum ADC12.CSTARTADD_t
index URL

CSTARTADD Bits

Configuration settings
values of type ADC12.CSTARTADD_t
    const ADC12.CSTARTADD_0;
    // ADC12MEM0
    const ADC12.CSTARTADD_1;
    // ADC12MEM1
    const ADC12.CSTARTADD_2;
    // ADC12MEM2
    const ADC12.CSTARTADD_3;
    // ADC12MEM3
    const ADC12.CSTARTADD_4;
    // ADC12MEM4
    const ADC12.CSTARTADD_5;
    // ADC12MEM5
    const ADC12.CSTARTADD_6;
    // ADC12MEM6
    const ADC12.CSTARTADD_7;
    // ADC12MEM7
    const ADC12.CSTARTADD_8;
    // ADC12MEM8
    const ADC12.CSTARTADD_9;
    // ADC12MEM9
    const ADC12.CSTARTADD_10;
    // ADC12MEM10
    const ADC12.CSTARTADD_11;
    // ADC12MEM11
    const ADC12.CSTARTADD_12;
    // ADC12MEM12
    const ADC12.CSTARTADD_13;
    // ADC12MEM13
    const ADC12.CSTARTADD_14;
    // ADC12MEM14
    const ADC12.CSTARTADD_15;
    // ADC12MEM15
enum ADC12.ENC_t
index URL

ENC Bit

Configuration settings
values of type ADC12.ENC_t
    const ADC12.ENC_OFF;
    // ADC12 disabled
    const ADC12.ENC;
    // ADC12 enabled
enum ADC12.EOS_t
index URL

EOS Bit

Configuration settings
values of type ADC12.EOS_t
    const ADC12.EOS_OFF;
    // Not end of sequence
    const ADC12.EOS;
    // End of sequence
enum ADC12.INCH_t
index URL

INCH Bits

Configuration settings
values of type ADC12.INCH_t
    const ADC12.INCH_0;
    // A0
    const ADC12.INCH_1;
    // A1
    const ADC12.INCH_2;
    // A2
    const ADC12.INCH_3;
    // A3
    const ADC12.INCH_4;
    // A4
    const ADC12.INCH_5;
    // A5
    const ADC12.INCH_6;
    // A6
    const ADC12.INCH_7;
    // A7
    const ADC12.INCH_8;
    // VeREF+
    const ADC12.INCH_9;
    // VREF--/VeREF-
    const ADC12.INCH_10;
    // Temperature diode
    const ADC12.INCH_11;
    // (AVcc - AVss) / 2
    const ADC12.INCH_12;
    // GND
    const ADC12.INCH_13;
    // GND
    const ADC12.INCH_14;
    // GND
    const ADC12.INCH_15;
    // GND
enum ADC12.ISSH_t
index URL

ISSH Bits

Configuration settings
values of type ADC12.ISSH_t
    const ADC12.ISSH_OFF;
    // The sample-input signal is not inverted
    const ADC12.ISSH;
    // The sample-input signal is inverted
enum ADC12.MSC_t
index URL

MSC Bit

Configuration settings
values of type ADC12.MSC_t
    const ADC12.MSC_OFF;
    // The sampling timer requires a rising edge of the SHI signal to trigger each sample-and-conversion
    const ADC12.MSC;
    // The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed
enum ADC12.REF2_5V_t
index URL

REF2_5V Bit

Configuration settings
values of type ADC12.REF2_5V_t
    const ADC12.REF2_5V_OFF;
    // 1.5V
    const ADC12.REF2_5V;
    // 2.5V
enum ADC12.REFON_t
index URL

REFON Bit

Configuration settings
values of type ADC12.REFON_t
    const ADC12.REFON_OFF;
    // Reference off
    const ADC12.REFON;
    // Reference on
enum ADC12.SHP_t
index URL

SHP Bits

Configuration settings
values of type ADC12.SHP_t
    const ADC12.SHP_OFF;
    // SAMPCON signal is sourced from the sample-input signal
    const ADC12.SHP;
    // SAMPCON signal is sourced from the sampling timer
enum ADC12.SHS_t
index URL

SHS Bits

Configuration settings
values of type ADC12.SHS_t
    const ADC12.SHS_0;
    // ADC12SC bit
    const ADC12.SHS_1;
    // Timer_A.OUT1
    const ADC12.SHS_2;
    // Timer_B.OUT0
    const ADC12.SHS_3;
    // Timer_B.OUT1
enum ADC12.SREF_t
index URL

SREF Bits

Configuration settings
values of type ADC12.SREF_t
    const ADC12.SREF_0;
    // VR+ = AVcc and VR-- = AVss
    const ADC12.SREF_1;
    // VR+ = VREF+ and VR-- = AVss
    const ADC12.SREF_2;
    // VR+ = VeREF+ and VR-- = AVss
    const ADC12.SREF_3;
    // VR+ = VeREF+ and VR-- = AVss
    const ADC12.SREF_4;
    // VR+ = AVcc and VR-- = VREF--/ VeREF--
    const ADC12.SREF_5;
    // VR+ = VREF+ and VR-- = VREF--/ VeREF--
    const ADC12.SREF_6;
    // VR+ = VeREF+ and VR-- = VREF--/ VeREF--
    const ADC12.SREF_7;
    // VR+ = VeREF+ and VR-- = VREF--/ VeREF--
struct ADC12.ADC12CTL0_t
index URL

ADC12 Control Register 0

Configuration settings
var obj = new ADC12.ADC12CTL0_t;
    obj.ADC12SHT1 = ADC12.ADC12SHT1_t ...
    // Sample-and-hold time. These bits define the number of ADC12CLK cycles in the sampling period for registers ADC12MEM8 to ADC12MEM15
    obj.ADC12SHT0 = ADC12.ADC12SHT0_t ...
    // Sample-and-hold time. These bits define the number of ADC12CLK cycles in the sampling period for registers ADC12MEM0 to ADC12MEM7
    obj.MSC = ADC12.MSC_t ...
    // Multiple sample and conversion. Valid only for sequence or repeated modes. 0 The sampling timer requires a rising edge of the SHI signal to trigger each sample-and-conversion. 1 The first rising edge of the SHI signal triggers the sampling timer, but further sample-and-conversions are performed automatically as soon as the prior conversion is completed
    obj.REF2_5V = ADC12.REF2_5V_t ...
    // Reference generator voltage. REFON must also be set. 0 1.5V 1 2.5V
    obj.REFON = ADC12.REFON_t ...
    // Reference generator on 0 Reference off 1 Reference on
    obj.ADC12ON = ADC12.ADC12ON_t ...
    // ADC12 on 0 ADC12 off 1 ADC12 on
    obj.ADC12OVIE = ADC12.ADC12OVIE_t ...
    // ADC12MEMx overflow-interrupt enable. The GIE bit must also be set to enable the interrupt. 0 Overflow interrupt disabled 1 Overflow interrupt enabled
    obj.ADC12TOVIE = ADC12.ADC12TOVIE_t ...
    // ADC12 conversion-time-overflow interrupt enable. The GIE bit must also be set to enable the interrupt. 0 Conversion time overflow interrupt disabled 1 Conversion time overflow interrupt enabled
    obj.ENC = ADC12.ENC_t ...
    // Enable conversion 0 ADC12 disabled 1 ADC12 enabled
    obj.ADC12SC = ADC12.ADC12SC_t ...
    // Start conversion. Software-controlled sample-and-conversion start. ADC12SC and ENC may be set together with one instruction. ADC12SC is reset automatically. 0 No sample-and-conversion-start 1 Start sample-and-conversion
struct ADC12.ADC12CTL1_t
index URL

ADC12 Control Register 1

Configuration settings
var obj = new ADC12.ADC12CTL1_t;
    obj.CSTARTADD = ADC12.CSTARTADD_t ...
    // Conversion start address. These bits select which ADC12 conversion-memory register is used for a single conversion or for the first conversion in a sequence. The value of CSTARTADDx is 0 to 0Fh, corresponding to ADC12MEM0 to ADC12MEM15
    obj.SHS = ADC12.SHS_t ...
    // Sample-and-hold source select 00 ADC12SC bit 01 Timer_A.OUT1 10 Timer_B.OUT0 11 Timer_B.OUT1
    obj.SHP = ADC12.SHP_t ...
    // Sample-and-hold pulse-mode select. This bit selects the source of the sampling signal (SAMPCON) to be either the output of the sampling timer or the sample-input signal directly. 0 SAMPCON signal is sourced from the sample-input signal. 1 SAMPCON signal is sourced from the sampling timer
    obj.ISSH = ADC12.ISSH_t ...
    // Invert signal sample-and-hold 0 The sample-input signal is not inverted. 1 The sample-input signal is inverted
    obj.ADC12DIV = ADC12.ADC12DIV_t ...
    // ADC12 clock divider 000 /1 001 /2 010 /3 011 /4 100 /5 101 /6 110 /7 111 /8
    obj.ADC12SSEL = ADC12.ADC12SSEL_t ...
    // ADC12 clock source select 00 ADC12OSC 01 ACLK 10 MCLK 11 SMCLK
    obj.CONSEQ = ADC12.CONSEQ_t ...
    // Conversion sequence mode select 00 Single-channel, single-conversion 01 Sequence-of-channels 10 Repeat-single-channel 11 Repeat-sequence-of-channels
    obj.ADC12BUSY = ADC12.ADC12BUSY_t ...
    // ADC12 busy. This bit indicates an active sample or conversion operation. 0 No operation is active. 1 A sequence, sample, or conversion is active
struct ADC12.ADC12IE_t
index URL

ADC12 Interrupt Enable Register

Configuration settings
var obj = new ADC12.ADC12IE_t;
    obj.ADC12IE15 = ADC12.ADC12IE15_t ...
    // Enable or disable the interrupt request for the ADC12IFG15 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE14 = ADC12.ADC12IE14_t ...
    // Enable or disable the interrupt request for the ADC12IFG14 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE13 = ADC12.ADC12IE13_t ...
    // Enable or disable the interrupt request for the ADC12IFG13 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE12 = ADC12.ADC12IE12_t ...
    // Enable or disable the interrupt request for the ADC12IFG12 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE11 = ADC12.ADC12IE11_t ...
    // Enable or disable the interrupt request for the ADC12IFG11 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE10 = ADC12.ADC12IE10_t ...
    // Enable or disable the interrupt request for the ADC12IFG10 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE9 = ADC12.ADC12IE9_t ...
    // Enable or disable the interrupt request for the ADC12IFG9 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE8 = ADC12.ADC12IE8_t ...
    // Enable or disable the interrupt request for the ADC12IFG8 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE7 = ADC12.ADC12IE7_t ...
    // Enable or disable the interrupt request for the ADC12IFG7 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE6 = ADC12.ADC12IE6_t ...
    // Enable or disable the interrupt request for the ADC12IFG6 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE5 = ADC12.ADC12IE5_t ...
    // Enable or disable the interrupt request for the ADC12IFG5 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE4 = ADC12.ADC12IE4_t ...
    // Enable or disable the interrupt request for the ADC12IFG4 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE3 = ADC12.ADC12IE3_t ...
    // Enable or disable the interrupt request for the ADC12IFG3 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE2 = ADC12.ADC12IE2_t ...
    // Enable or disable the interrupt request for the ADC12IFG2 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE1 = ADC12.ADC12IE1_t ...
    // Enable or disable the interrupt request for the ADC12IFG1 bit. 0 Interrupt disabled 1 Interrupt enabled
    obj.ADC12IE0 = ADC12.ADC12IE0_t ...
    // Enable or disable the interrupt request for the ADC12IFG0 bit. 0 Interrupt disabled 1 Interrupt enabled
struct ADC12.ADC12MCTL_t
index URL

ADC12 Conversion Memory Control Registers

Configuration settings
var obj = new ADC12.ADC12MCTL_t;
    obj.EOS = ADC12.EOS_t ...
    // End of sequence. Indicates the last conversion in a sequence. 0 Not end of sequence 1 End of sequence
    obj.SREF = ADC12.SREF_t ...
    // Select reference 000 VR+ = AVCC and VR-- = AVSS 001 VR+ = VREF+ and VR-- = AVSS 010 VR+ = VeREF+ and VR-- = AVSS 011 VR+ = VeREF+ and VR-- = AVSS 100 VR+ = AVCC and VR-- = VREF--/ VeREF-- 101 VR+ = VREF+ and VR-- = VREF--/ VeREF-- 110 VR+ = VeREF+ and VR-- = VREF--/ VeREF-- 111 VR+ = VeREF+ and VR-- = VREF--/ VeREF--
    obj.INCH = ADC12.INCH_t ...
    // Input channel select 0000 A0 0001 A1 0010 A2 0011 A3 0100 A4 0101 A5 0110 A6 0111 A7 1000 VeREF+ 1001 VREF--/VeREF-- 1010 Temperature diode 1011 (AVCC ??? AVSS) / 1100 GND 1101 GND 1110 GND 1111 GND
struct ADC12.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new ADC12.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ADC12.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new ADC12.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
ADC12.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
ADC12.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ADC12.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
ADC12.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new ADC12.Params;
// Instance config-params object
    params.ADC12CTL0 = ADC12.ADC12CTL0_t {
    // ADC12CTL0 Register
        ADC12SHT1: ADC12.SHT1_0,
        ADC12SHT0: ADC12.SHT0_0,
        MSC: ADC12.MSC_OFF,
        REF2_5V: ADC12.REF2_5V_OFF,
        REFON: ADC12.REFON_OFF,
        ADC12ON: ADC12.ADC12ON_OFF,
        ADC12OVIE: ADC12.ADC12OVIE_OFF,
        ADC12TOVIE: ADC12.ADC12TOVIE_OFF,
        ENC: ADC12.ENC_OFF,
        ADC12SC: ADC12.ADC12SC_OFF
    };
    params.ADC12CTL1 = ADC12.ADC12CTL1_t {
    // ADC12CTL1 Register
        CSTARTADD: ADC12.CSTARTADD_0,
        SHS: ADC12.SHS_0,
        SHP: ADC12.SHP_OFF,
        ISSH: ADC12.ISSH_OFF,
        ADC12DIV: ADC12.ADC12DIV_0,
        ADC12SSEL: ADC12.ADC12SSEL_0,
        CONSEQ: ADC12.CONSEQ_0,
        ADC12BUSY: ADC12.ADC12BUSY_OFF
    };
    params.ADC12IE = ADC12.ADC12IE_t {
    // ADC12 Interrupt Enable Register
        ADC12IE15: ADC12.ADC12IE15_OFF,
        ADC12IE14: ADC12.ADC12IE14_OFF,
        ADC12IE13: ADC12.ADC12IE13_OFF,
        ADC12IE12: ADC12.ADC12IE12_OFF,
        ADC12IE11: ADC12.ADC12IE11_OFF,
        ADC12IE10: ADC12.ADC12IE10_OFF,
        ADC12IE9: ADC12.ADC12IE9_OFF,
        ADC12IE8: ADC12.ADC12IE8_OFF,
        ADC12IE7: ADC12.ADC12IE7_OFF,
        ADC12IE6: ADC12.ADC12IE6_OFF,
        ADC12IE5: ADC12.ADC12IE5_OFF,
        ADC12IE4: ADC12.ADC12IE4_OFF,
        ADC12IE3: ADC12.ADC12IE3_OFF,
        ADC12IE2: ADC12.ADC12IE2_OFF,
        ADC12IE1: ADC12.ADC12IE1_OFF,
        ADC12IE0: ADC12.ADC12IE0_OFF
    };
    params.ADC12IFG = Bits16 0;
    // ADC12IFG Register
    params.ADC12IV = Bits16 ADC12.ADC12IV_NONE;
    // ADC12IV Register
    params.ADC12MCTL0 = ADC12.ADC12MCTL_t {
    // ADC12MCTL0 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL1 = ADC12.ADC12MCTL_t {
    // ADC12MCTL1 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL10 = ADC12.ADC12MCTL_t {
    // ADC12MCTL10 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL11 = ADC12.ADC12MCTL_t {
    // ADC12MCTL11 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL12 = ADC12.ADC12MCTL_t {
    // ADC12MCTL12 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL13 = ADC12.ADC12MCTL_t {
    // ADC12MCTL13 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL14 = ADC12.ADC12MCTL_t {
    // ADC12MCTL14 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL15 = ADC12.ADC12MCTL_t {
    // ADC12MCTL15 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL2 = ADC12.ADC12MCTL_t {
    // ADC12MCTL2 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL3 = ADC12.ADC12MCTL_t {
    // ADC12MCTL3 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL4 = ADC12.ADC12MCTL_t {
    // ADC12MCTL4 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL5 = ADC12.ADC12MCTL_t {
    // ADC12MCTL5 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL6 = ADC12.ADC12MCTL_t {
    // ADC12MCTL6 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL7 = ADC12.ADC12MCTL_t {
    // ADC12MCTL7 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL8 = ADC12.ADC12MCTL_t {
    // ADC12MCTL8 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MCTL9 = ADC12.ADC12MCTL_t {
    // ADC12MCTL9 Register
        EOS: ADC12.EOS_OFF,
        SREF: ADC12.SREF_0,
        INCH: ADC12.INCH_0
    };
    params.ADC12MEM0 = Bits16 0;
    // ADC12MEM0 Register
    params.ADC12MEM1 = Bits16 0;
    // ADC12MEM1 Register
    params.ADC12MEM10 = Bits16 0;
    // ADC12MEM10 Register
    params.ADC12MEM11 = Bits16 0;
    // ADC12MEM11 Register
    params.ADC12MEM12 = Bits16 0;
    // ADC12MEM12 Register
    params.ADC12MEM13 = Bits16 0;
    // ADC12MEM13 Register
    params.ADC12MEM14 = Bits16 0;
    // ADC12MEM14 Register
    params.ADC12MEM15 = Bits16 0;
    // ADC12MEM15 Register
    params.ADC12MEM2 = Bits16 0;
    // ADC12MEM2 Register
    params.ADC12MEM3 = Bits16 0;
    // ADC12MEM3 Register
    params.ADC12MEM4 = Bits16 0;
    // ADC12MEM4 Register
    params.ADC12MEM5 = Bits16 0;
    // ADC12MEM5 Register
    params.ADC12MEM6 = Bits16 0;
    // ADC12MEM6 Register
    params.ADC12MEM7 = Bits16 0;
    // ADC12MEM7 Register
    params.ADC12MEM8 = Bits16 0;
    // ADC12MEM8 Register
    params.ADC12MEM9 = Bits16 0;
    // ADC12MEM9 Register
    params.forceSetDefaultRegister = ADC12.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "ADC12CTL0",
            regForceSet: false
        },
        {
            register: "ADC12CTL1",
            regForceSet: false
        },
        {
            register: "ADC12IFG",
            regForceSet: false
        },
        {
            register: "ADC12IV",
            regForceSet: false
        },
        {
            register: "ADC12IE",
            regForceSet: false
        },
        {
            register: "ADC12MCTL0",
            regForceSet: false
        },
        {
            register: "ADC12MCTL1",
            regForceSet: false
        },
        {
            register: "ADC12MCTL2",
            regForceSet: false
        },
        {
            register: "ADC12MCTL3",
            regForceSet: false
        },
        {
            register: "ADC12MCTL4",
            regForceSet: false
        },
        {
            register: "ADC12MCTL5",
            regForceSet: false
        },
        {
            register: "ADC12MCTL6",
            regForceSet: false
        },
        {
            register: "ADC12MCTL7",
            regForceSet: false
        },
        {
            register: "ADC12MCTL8",
            regForceSet: false
        },
        {
            register: "ADC12MCTL9",
            regForceSet: false
        },
        {
            register: "ADC12MCTL10",
            regForceSet: false
        },
        {
            register: "ADC12MCTL11",
            regForceSet: false
        },
        {
            register: "ADC12MCTL12",
            regForceSet: false
        },
        {
            register: "ADC12MCTL13",
            regForceSet: false
        },
        {
            register: "ADC12MCTL14",
            regForceSet: false
        },
        {
            register: "ADC12MCTL15",
            regForceSet: false
        },
        {
            register: "ADC12MEM0",
            regForceSet: false
        },
        {
            register: "ADC12MEM1",
            regForceSet: false
        },
        {
            register: "ADC12MEM2",
            regForceSet: false
        },
        {
            register: "ADC12MEM3",
            regForceSet: false
        },
        {
            register: "ADC12MEM4",
            regForceSet: false
        },
        {
            register: "ADC12MEM5",
            regForceSet: false
        },
        {
            register: "ADC12MEM6",
            regForceSet: false
        },
        {
            register: "ADC12MEM7",
            regForceSet: false
        },
        {
            register: "ADC12MEM8",
            regForceSet: false
        },
        {
            register: "ADC12MEM9",
            regForceSet: false
        },
        {
            register: "ADC12MEM10",
            regForceSet: false
        },
        {
            register: "ADC12MEM11",
            regForceSet: false
        },
        {
            register: "ADC12MEM12",
            regForceSet: false
        },
        {
            register: "ADC12MEM13",
            regForceSet: false
        },
        {
            register: "ADC12MEM14",
            regForceSet: false
        },
        {
            register: "ADC12MEM15",
            regForceSet: false
        }
    ];
    params.interruptSource = ADC12.regIntVect_t[16] undefined;
    // ADC12 has 16 interrupt enable
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config ADC12.Params.ADC12CTL0 // instance
index URL

ADC12CTL0 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12CTL0 = ADC12.ADC12CTL0_t {
    ADC12SHT1: ADC12.SHT1_0,
    ADC12SHT0: ADC12.SHT0_0,
    MSC: ADC12.MSC_OFF,
    REF2_5V: ADC12.REF2_5V_OFF,
    REFON: ADC12.REFON_OFF,
    ADC12ON: ADC12.ADC12ON_OFF,
    ADC12OVIE: ADC12.ADC12OVIE_OFF,
    ADC12TOVIE: ADC12.ADC12TOVIE_OFF,
    ENC: ADC12.ENC_OFF,
    ADC12SC: ADC12.ADC12SC_OFF
};
config ADC12.Params.ADC12CTL1 // instance
index URL

ADC12CTL1 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12CTL1 = ADC12.ADC12CTL1_t {
    CSTARTADD: ADC12.CSTARTADD_0,
    SHS: ADC12.SHS_0,
    SHP: ADC12.SHP_OFF,
    ISSH: ADC12.ISSH_OFF,
    ADC12DIV: ADC12.ADC12DIV_0,
    ADC12SSEL: ADC12.ADC12SSEL_0,
    CONSEQ: ADC12.CONSEQ_0,
    ADC12BUSY: ADC12.ADC12BUSY_OFF
};
config ADC12.Params.ADC12IE // instance
index URL

ADC12 Interrupt Enable Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12IE = ADC12.ADC12IE_t {
    ADC12IE15: ADC12.ADC12IE15_OFF,
    ADC12IE14: ADC12.ADC12IE14_OFF,
    ADC12IE13: ADC12.ADC12IE13_OFF,
    ADC12IE12: ADC12.ADC12IE12_OFF,
    ADC12IE11: ADC12.ADC12IE11_OFF,
    ADC12IE10: ADC12.ADC12IE10_OFF,
    ADC12IE9: ADC12.ADC12IE9_OFF,
    ADC12IE8: ADC12.ADC12IE8_OFF,
    ADC12IE7: ADC12.ADC12IE7_OFF,
    ADC12IE6: ADC12.ADC12IE6_OFF,
    ADC12IE5: ADC12.ADC12IE5_OFF,
    ADC12IE4: ADC12.ADC12IE4_OFF,
    ADC12IE3: ADC12.ADC12IE3_OFF,
    ADC12IE2: ADC12.ADC12IE2_OFF,
    ADC12IE1: ADC12.ADC12IE1_OFF,
    ADC12IE0: ADC12.ADC12IE0_OFF
};
config ADC12.Params.ADC12IFG // instance
index URL

ADC12IFG Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12IFG = Bits16 0;
config ADC12.Params.ADC12IV // instance
index URL

ADC12IV Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12IV = Bits16 ADC12.ADC12IV_NONE;
config ADC12.Params.ADC12MCTL0 // instance
index URL

ADC12MCTL0 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL0 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL1 // instance
index URL

ADC12MCTL1 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL1 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL10 // instance
index URL

ADC12MCTL10 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL10 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL11 // instance
index URL

ADC12MCTL11 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL11 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL12 // instance
index URL

ADC12MCTL12 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL12 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL13 // instance
index URL

ADC12MCTL13 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL13 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL14 // instance
index URL

ADC12MCTL14 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL14 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL15 // instance
index URL

ADC12MCTL15 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL15 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL2 // instance
index URL

ADC12MCTL2 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL2 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL3 // instance
index URL

ADC12MCTL3 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL3 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL4 // instance
index URL

ADC12MCTL4 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL4 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL5 // instance
index URL

ADC12MCTL5 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL5 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL6 // instance
index URL

ADC12MCTL6 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL6 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL7 // instance
index URL

ADC12MCTL7 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL7 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL8 // instance
index URL

ADC12MCTL8 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL8 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MCTL9 // instance
index URL

ADC12MCTL9 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MCTL9 = ADC12.ADC12MCTL_t {
    EOS: ADC12.EOS_OFF,
    SREF: ADC12.SREF_0,
    INCH: ADC12.INCH_0
};
config ADC12.Params.ADC12MEM0 // instance
index URL

ADC12MEM0 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM0 = Bits16 0;
config ADC12.Params.ADC12MEM1 // instance
index URL

ADC12MEM1 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM1 = Bits16 0;
config ADC12.Params.ADC12MEM10 // instance
index URL

ADC12MEM10 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM10 = Bits16 0;
config ADC12.Params.ADC12MEM11 // instance
index URL

ADC12MEM11 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM11 = Bits16 0;
config ADC12.Params.ADC12MEM12 // instance
index URL

ADC12MEM12 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM12 = Bits16 0;
config ADC12.Params.ADC12MEM13 // instance
index URL

ADC12MEM13 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM13 = Bits16 0;
config ADC12.Params.ADC12MEM14 // instance
index URL

ADC12MEM14 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM14 = Bits16 0;
config ADC12.Params.ADC12MEM15 // instance
index URL

ADC12MEM15 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM15 = Bits16 0;
config ADC12.Params.ADC12MEM2 // instance
index URL

ADC12MEM2 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM2 = Bits16 0;
config ADC12.Params.ADC12MEM3 // instance
index URL

ADC12MEM3 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM3 = Bits16 0;
config ADC12.Params.ADC12MEM4 // instance
index URL

ADC12MEM4 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM4 = Bits16 0;
config ADC12.Params.ADC12MEM5 // instance
index URL

ADC12MEM5 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM5 = Bits16 0;
config ADC12.Params.ADC12MEM6 // instance
index URL

ADC12MEM6 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM6 = Bits16 0;
config ADC12.Params.ADC12MEM7 // instance
index URL

ADC12MEM7 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM7 = Bits16 0;
config ADC12.Params.ADC12MEM8 // instance
index URL

ADC12MEM8 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM8 = Bits16 0;
config ADC12.Params.ADC12MEM9 // instance
index URL

ADC12MEM9 Register

Configuration settings
var params = new ADC12.Params;
...
params.ADC12MEM9 = Bits16 0;
config ADC12.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new ADC12.Params;
...
const params.forceSetDefaultRegister = ADC12.ForceSetDefaultRegister_t[] [
    {
        register: "ADC12CTL0",
        regForceSet: false
    },
    {
        register: "ADC12CTL1",
        regForceSet: false
    },
    {
        register: "ADC12IFG",
        regForceSet: false
    },
    {
        register: "ADC12IV",
        regForceSet: false
    },
    {
        register: "ADC12IE",
        regForceSet: false
    },
    {
        register: "ADC12MCTL0",
        regForceSet: false
    },
    {
        register: "ADC12MCTL1",
        regForceSet: false
    },
    {
        register: "ADC12MCTL2",
        regForceSet: false
    },
    {
        register: "ADC12MCTL3",
        regForceSet: false
    },
    {
        register: "ADC12MCTL4",
        regForceSet: false
    },
    {
        register: "ADC12MCTL5",
        regForceSet: false
    },
    {
        register: "ADC12MCTL6",
        regForceSet: false
    },
    {
        register: "ADC12MCTL7",
        regForceSet: false
    },
    {
        register: "ADC12MCTL8",
        regForceSet: false
    },
    {
        register: "ADC12MCTL9",
        regForceSet: false
    },
    {
        register: "ADC12MCTL10",
        regForceSet: false
    },
    {
        register: "ADC12MCTL11",
        regForceSet: false
    },
    {
        register: "ADC12MCTL12",
        regForceSet: false
    },
    {
        register: "ADC12MCTL13",
        regForceSet: false
    },
    {
        register: "ADC12MCTL14",
        regForceSet: false
    },
    {
        register: "ADC12MCTL15",
        regForceSet: false
    },
    {
        register: "ADC12MEM0",
        regForceSet: false
    },
    {
        register: "ADC12MEM1",
        regForceSet: false
    },
    {
        register: "ADC12MEM2",
        regForceSet: false
    },
    {
        register: "ADC12MEM3",
        regForceSet: false
    },
    {
        register: "ADC12MEM4",
        regForceSet: false
    },
    {
        register: "ADC12MEM5",
        regForceSet: false
    },
    {
        register: "ADC12MEM6",
        regForceSet: false
    },
    {
        register: "ADC12MEM7",
        regForceSet: false
    },
    {
        register: "ADC12MEM8",
        regForceSet: false
    },
    {
        register: "ADC12MEM9",
        regForceSet: false
    },
    {
        register: "ADC12MEM10",
        regForceSet: false
    },
    {
        register: "ADC12MEM11",
        regForceSet: false
    },
    {
        register: "ADC12MEM12",
        regForceSet: false
    },
    {
        register: "ADC12MEM13",
        regForceSet: false
    },
    {
        register: "ADC12MEM14",
        regForceSet: false
    },
    {
        register: "ADC12MEM15",
        regForceSet: false
    }
];
config ADC12.Params.interruptSource // instance
index URL

ADC12 has 16 interrupt enable

Configuration settings
var params = new ADC12.Params;
...
params.interruptSource = ADC12.regIntVect_t[16] undefined;
config ADC12.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new ADC12.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ADC12.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new ADC12.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new ADC12.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = ADC12.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:13 GMT


module ti.catalog.msp430.peripherals.adc.ADC12_B

metaonly module ti.catalog.msp430.peripherals.adc.ADC12_B
index URL

MSP430 12-bit Analog to Digital Converter

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/adc/ADC12_B.xdc
var ADC12_B = xdc.useModule('ti.catalog.msp430.peripherals.adc.ADC12_B');
module-wide constants & types
    var obj = new ADC12_B.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new ADC12_B.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     ADC12_B.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     ADC12_B.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new ADC12_B.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = ADC12_B.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// Interrupt enables = ADC12_B.regIntVect_t[35] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = ADC12_B.create// Create an instance-object(IClock.Instance clock, params);
struct ADC12_B.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new ADC12_B.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ADC12_B.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new ADC12_B.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
ADC12_B.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
ADC12_B.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ADC12_B.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
ADC12_B.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new ADC12_B.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = ADC12_B.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = ADC12_B.regIntVect_t[35] undefined;
    // Interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config ADC12_B.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new ADC12_B.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config ADC12_B.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new ADC12_B.Params;
...
const params.forceSetDefaultRegister = ADC12_B.ForceSetDefaultRegister_t[] [ ];
config ADC12_B.Params.interruptSource // instance
index URL

Interrupt enables

Configuration settings
var params = new ADC12_B.Params;
...
params.interruptSource = ADC12_B.regIntVect_t[35] undefined;
config ADC12_B.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new ADC12_B.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ADC12_B.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new ADC12_B.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new ADC12_B.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = ADC12_B.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:13 GMT


interface ti.catalog.msp430.peripherals.adc.IADC

metaonly interface ti.catalog.msp430.peripherals.adc.IADC
index URL

MSP430 Analog to Digital Converter Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
metaonly interface IADC { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
package ti.catalog.msp430.peripherals.adc;
metaonly interface IADC inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance creation
     create// Create an instance-object(IClock.Instance clock);
}
typedef IADC.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IADC.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
typedef String StringArray[];
struct IADC.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IADC.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IADC.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IADC.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IADC.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IADC.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
config String owner;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/peripherals/adc/IADC.xdc
create(IClock.Instance clock);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:12 GMT


module ti.catalog.msp430.peripherals.adc.SD16_A

metaonly module ti.catalog.msp430.peripherals.adc.SD16_A
index URL

MSP430F2xx Family SD16_A Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/adc/SD16_A.xdc
var SD16_A = xdc.useModule('ti.catalog.msp430.peripherals.adc.SD16_A');
module-wide constants & types
    values of type SD16_A.SD16AE0_t// SD16_A Analog Enable Bit 0
        const SD16_A.SD16AE0_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE0// External input enabled;
    values of type SD16_A.SD16AE1_t// SD16_A Analog Enable Bit 1
        const SD16_A.SD16AE1_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE1// External input enabled;
    values of type SD16_A.SD16AE2_t// SD16_A Analog Enable Bit 2
        const SD16_A.SD16AE2_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE2// External input enabled;
    values of type SD16_A.SD16AE3_t// SD16_A Analog Enable Bit 3
        const SD16_A.SD16AE3_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE3// External input enabled;
    values of type SD16_A.SD16AE4_t// SD16_A Analog Enable Bit 4
        const SD16_A.SD16AE4_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE4// External input enabled;
    values of type SD16_A.SD16AE5_t// SD16_A Analog Enable Bit 5
        const SD16_A.SD16AE5_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE5// External input enabled;
    values of type SD16_A.SD16AE6_t// SD16_A Analog Enable Bit 6
        const SD16_A.SD16AE6_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE6// External input enabled;
    values of type SD16_A.SD16AE7_t// SD16_A Analog Enable Bit 7
        const SD16_A.SD16AE7_OFF// External input disabled. Negative inputs are internally connected to VSS;
        const SD16_A.SD16AE7// External input enabled;
    values of type SD16_A.SD16BUF_t// SD16BUFx Bits
        const SD16_A.SD16BUF_0// Buffer disabled;
        const SD16_A.SD16BUF_1// Slow speed/current;
        const SD16_A.SD16BUF_2// Medium speed/current;
        const SD16_A.SD16BUF_3// High speed/current;
    values of type SD16_A.SD16DF_t// SD16DF Bit
        const SD16_A.SD16DF_OFF// Offset binary;
        const SD16_A.SD16DF// 2's complement;
    values of type SD16_A.SD16DIV_t// SD16DIVx Bits
        const SD16_A.SD16DIV_0// Divide by 1;
        const SD16_A.SD16DIV_1// Divide by 2;
        const SD16_A.SD16DIV_2// Divide by 4;
        const SD16_A.SD16DIV_3// Divide by 8;
    values of type SD16_A.SD16GAIN_t// SD16GAINx Bits
        const SD16_A.SD16GAIN_1// Multiply by 1;
        const SD16_A.SD16GAIN_2// Multiply by 2;
        const SD16_A.SD16GAIN_4// Multiply by 4;
        const SD16_A.SD16GAIN_8// Multiply by 8;
        const SD16_A.SD16GAIN_16// Multiply by 16;
        const SD16_A.SD16GAIN_32// Multiply by 32;
    values of type SD16_A.SD16IE_t// SD16IE Bit
        const SD16_A.SD16IE_OFF// Disabled;
        const SD16_A.SD16IE// Enabled;
    values of type SD16_A.SD16IFG_t// SD16IFG Bit
        const SD16_A.SD16IFG_OFF// No interrupt pending;
        const SD16_A.SD16IFG// Interrupt pending;
    values of type SD16_A.SD16INCH_t// SD16INCHx Bits
        const SD16_A.SD16INCH_0// A0;
        const SD16_A.SD16INCH_1// A1;
        const SD16_A.SD16INCH_2// A2;
        const SD16_A.SD16INCH_3// A3;
        const SD16_A.SD16INCH_4// A4;
        const SD16_A.SD16INCH_5// A5 - (AVcc - AVss)/11;
        const SD16_A.SD16INCH_6// A6 - Temperature Sensor;
        const SD16_A.SD16INCH_7// A7 - Short PGA offset measurement;
    values of type SD16_A.SD16INTDLY_t// SD16INTDLYx Bits
        const SD16_A.SD16INTDLY_0// Fourth sample causes interrupt;
        const SD16_A.SD16INTDLY_1// Third sample causes interrupt;
        const SD16_A.SD16INTDLY_2// Second sample causes interrupt;
        const SD16_A.SD16INTDLY_3// First sample causes interrupt;
    values of type SD16_A.SD16IV_SD16MEM0_t// SD16_A SD16MEMx overflow
        const SD16_A.SD16IV_SD16MEM0_OFF// No Interrupt pending;
        const SD16_A.SD16IV_SD16MEM0// SD16MEM0 SD16IFG;
    values of type SD16_A.SD16IV_SD16OVIFG_t// SD16_A Interrupt
        const SD16_A.SD16IV_SD16OVIFG_OFF// No Interrupt pending;
        const SD16_A.SD16IV_SD16OVIFG// SD16OVIFG;
    values of type SD16_A.SD16LP_t// SD16LP Bit
        const SD16_A.SD16LP_OFF// Low-power mode is disabled;
        const SD16_A.SD16LP// Low-power mode is enabled. The maximum clock frequency for the SD16_A is reduced;
    values of type SD16_A.SD16LSBACC_t// SD16LSBACC Bit
        const SD16_A.SD16LSBACC_OFF// SD16MEMx contains the most significant 16-bits of the conversion;
        const SD16_A.SD16LSBACC// SD16MEMx contains the least significant 16-bits of the conversion;
    values of type SD16_A.SD16LSBTOG_t// SD16LSBTOG Bit
        const SD16_A.SD16LSBTOG_OFF// SD16LSBACC does not toggle with each SD16MEM0 read;
        const SD16_A.SD16LSBTOG// SD16LSBACC toggles with each SD16MEM0 read;
    values of type SD16_A.SD16OSR_t// SD16OSRx Bits
        const SD16_A.SD16OSR_256// SD16XOSR = 0;
        const SD16_A.SD16OSR_128// SD16XOSR = 0;
        const SD16_A.SD16OSR_64// SD16XOSR = 0;
        const SD16_A.SD16OSR_32// SD16XOSR = 0;
        const SD16_A.SD16OSR_512// SD16XOSR = 1;
        const SD16_A.SD16OSR_1024// SD16XOSR = 1;
    values of type SD16_A.SD16OVIE_t// SD16OVIE Bit
        const SD16_A.SD16OVIE_OFF// Overflow interrupt disabled;
        const SD16_A.SD16OVIE// Overflow interrupt enabled;
    values of type SD16_A.SD16OVIFG_t// SD16OVIFG Bit
        const SD16_A.SD16OVIFG_OFF// No overflow interrupt pending;
        const SD16_A.SD16OVIFG// Overflow interrupt pending;
    values of type SD16_A.SD16REFON_t// SD16REFON Bit
        const SD16_A.SD16REFON_OFF// Reference off;
        const SD16_A.SD16REFON// Reference on;
    values of type SD16_A.SD16SC_t// SD16SC Bit
        const SD16_A.SD16SC_OFF// No conversino start;
        const SD16_A.SD16SC// Start conversion;
    values of type SD16_A.SD16SNGL_t// SD16SNGL Bit
        const SD16_A.SD16SNGL_OFF// Continuous conversion mode;
        const SD16_A.SD16SNGL// Single conversion mode;
    values of type SD16_A.SD16SSEL_t// SD16SSELx Bits
        const SD16_A.SD16SSEL_0// MCLK;
        const SD16_A.SD16SSEL_1// SMCLK;
        const SD16_A.SD16SSEL_2// ACLK;
        const SD16_A.SD16SSEL_3// External TACLK;
    values of type SD16_A.SD16UNI_t// SD16UNI Bit
        const SD16_A.SD16UNI_OFF// Bipolar mode;
        const SD16_A.SD16UNI// Unipolar mode;
    values of type SD16_A.SD16VMIDON_t// SD16VMIDON Bit
        const SD16_A.SD16VMIDON_OFF// Off;
        const SD16_A.SD16VMIDON// On;
    values of type SD16_A.SD16XDIV_t// SD16XDIVx Bits
        const SD16_A.SD16XDIV_0// Divide by 1;
        const SD16_A.SD16XDIV_1// Divide by 3;
        const SD16_A.SD16XDIV_2// Divide by 16;
        const SD16_A.SD16XDIV_3// Divide by 48;
    values of type SD16_A.SD16XOSR_t// SD16XOSR Bit
        const SD16_A.SD16XOSR_OFF// Extended oversampling ratio. This bit, along with the SD16OSRx bits, select the oversampling ratio. See SD16OSRx bit description for settings;
        const SD16_A.SD16XOSR// Extended oversampling ratio. This bit, along with the SD16OSRx bits, select the oversampling ratio. See SD16OSRx bit description for settings;
    var obj = new SD16_A.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new SD16_A.SD16AE_t// SD16_A Analog Input Enable Register;
        obj.SD16AE0// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE0_t ...
        obj.SD16AE1// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE1_t ...
        obj.SD16AE2// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE2_t ...
        obj.SD16AE3// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE3_t ...
        obj.SD16AE4// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE4_t ...
        obj.SD16AE5// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE5_t ...
        obj.SD16AE6// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE6_t ...
        obj.SD16AE7// SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled = SD16_A.SD16AE7_t ...
    var obj = new SD16_A.SD16CCTL0_t// SD16CCTL0 Register;
        obj.SD16UNI// Unipolar mode select 0 Bipolar mode 1 Unipolar mode = SD16_A.SD16UNI_t ...
        obj.SD16XOSR// Extended oversampling ratio. This bit, along with the SD16OSRx bits, select the oversampling ratio. See SD16OSRx bit description for settings = SD16_A.SD16XOSR_t ...
        obj.SD16SNGL// Single conversion mode select 0 Continuous conversion mode 1 Single conversion mode = SD16_A.SD16SNGL_t ...
        obj.SD16OSR// Oversampling ratio When SD16XOSR = 0 00 256 01 128 10 64 11 32 When SD16XOSR = 1 00 512 01 1024 10 Reserved 11 Reserved = SD16_A.SD16OSR_t ...
        obj.SD16LSBTOG// LSB toggle. This bit, when set, causes SD16LSBACC to toggle each time the SD16MEM0 register is read. 0 SD16LSBACC does not toggle with each SD16MEM0 read 1 SD16LSBACC toggles with each SD16MEM0 read = SD16_A.SD16LSBTOG_t ...
        obj.SD16LSBACC// LSB access. This bit allows access to the upper or lower 16-bits of the SD16_A conversion result. 0 SD16MEMx contains the most significant 16-bits of the conversion. 1 SD16MEMx contains the least significant 16-bits of the conversion = SD16_A.SD16LSBACC_t ...
        obj.SD16OVIFG// SD16_A overflow interrupt flag 0 No overflow interrupt pending 1 Overflow interrupt pending = SD16_A.SD16OVIFG_t ...
        obj.SD16DF// SD16_A data format 0 Offset binary 1 2's complement = SD16_A.SD16DF_t ...
        obj.SD16IE// SD16_A interrupt enable 0 Disabled 1 Enabled = SD16_A.SD16IE_t ...
        obj.SD16IFG// SD16_A interrupt flag. SD16IFG is set when new conversion results are available. SD16IFG is automatically reset when the corresponding SD16MEMx register is read, or may be cleared with software. 0 No interrupt pending 1 Interrupt pending = SD16_A.SD16IFG_t ...
        obj.SD16SC// SD16_A start conversion 0 No conversion start 1 Start conversion = SD16_A.SD16SC_t ...
    var obj = new SD16_A.SD16CTL_t// SD16CTL Register;
        obj.SD16XDIV// SD16_A clock divider 000 Divide by 1 001 Divide by 3 010 Divide by 16 011 Divide by 48 1xx Reserved = SD16_A.SD16XDIV_t ...
        obj.SD16LP// Low power mode. This bit selects a reduced speed, reduced power mode 0 Low-power mode is disabled 1 Low-power mode is enabled. The maximum clock frequency for the SD16_A is reduced = SD16_A.SD16LP_t ...
        obj.SD16DIV// SD16_A clock divider 00 Divide by 1 01 Divide by 2 10 Divide by 4 11 Divide by 8 = SD16_A.SD16DIV_t ...
        obj.SD16SSEL// SD16_A clock source select 00 MCLK 01 SMCLK 10 ACLK External TACLK = SD16_A.SD16SSEL_t ...
        obj.SD16VMIDON// VMID buffer on 0 Off 1 On = SD16_A.SD16VMIDON_t ...
        obj.SD16REFON// Reference generator on 0 Reference off 1 Reference on = SD16_A.SD16REFON_t ...
        obj.SD16OVIE// SD16_A overflow interrupt enable. The GIE bit must also be set to enable the interrupt. 0 Overflow interrupt disabled 1 Overflow interrupt enabled = SD16_A.SD16OVIE_t ...
    var obj = new SD16_A.SD16INCTL0_t// SD16INCTL0 Register;
        obj.SD16INTDLY// Interrupt delay generation after conversion start. These bits select the delay for the first interrupt after conversion start. 00 Fourth sample causes interrupt 01 Third sample causes interrupt 10 Second sample causes interrupt 11 First sample causes interrupt = SD16_A.SD16INTDLY_t ...
        obj.SD16GAIN// SD16_A preamplifier gain 000 Multiply by 1 001 Multiply by 2 010 Multiply by 4 011 Multiply by 8 100 Multiply by 16 101 Multiply by 32 110 Reserved 111 Reserved = SD16_A.SD16GAIN_t ...
        obj.SD16INCH// SD16_A channel differential pair input 000 A0 001 A1 010 A2 011 A3 100 A4 101 A5-- (AVCC -- AVSS) / 11 110 A6 -- Temperature Sensor 111 A7 -- Short for PGA offset measurement = SD16_A.SD16INCH_t ...
    var obj = new SD16_A.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     SD16_A.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     SD16_A.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new SD16_A.Params// Instance config-params object;
        params.SD16AE// SD16AE Register = SD16_A.SD16AE_t {
            SD16AE0: SD16_A.SD16AE0_OFF,
            SD16AE1: SD16_A.SD16AE1_OFF,
            SD16AE2: SD16_A.SD16AE2_OFF,
            SD16AE3: SD16_A.SD16AE3_OFF,
            SD16AE4: SD16_A.SD16AE4_OFF,
            SD16AE5: SD16_A.SD16AE5_OFF,
            SD16AE6: SD16_A.SD16AE6_OFF,
            SD16AE7: SD16_A.SD16AE7_OFF
        };
        params.SD16CCTL0// SD16CCTL0 Register = SD16_A.SD16CCTL0_t {
            SD16UNI: SD16_A.SD16UNI_OFF,
            SD16XOSR: SD16_A.SD16XOSR_OFF,
            SD16SNGL: SD16_A.SD16SNGL_OFF,
            SD16OSR: SD16_A.SD16OSR_256,
            SD16LSBTOG: SD16_A.SD16LSBTOG_OFF,
            SD16LSBACC: SD16_A.SD16LSBACC_OFF,
            SD16OVIFG: SD16_A.SD16OVIFG_OFF,
            SD16DF: SD16_A.SD16DF_OFF,
            SD16IE: SD16_A.SD16IE_OFF,
            SD16IFG: SD16_A.SD16IFG_OFF,
            SD16SC: SD16_A.SD16SC_OFF
        };
        params.SD16CTL// SD16CTL Register = SD16_A.SD16CTL_t {
            SD16XDIV: SD16_A.SD16XDIV_0,
            SD16LP: SD16_A.SD16LP_OFF,
            SD16DIV: SD16_A.SD16DIV_0,
            SD16SSEL: SD16_A.SD16SSEL_0,
            SD16VMIDON: SD16_A.SD16VMIDON_OFF,
            SD16REFON: SD16_A.SD16REFON_OFF,
            SD16OVIE: SD16_A.SD16OVIE_OFF
        };
        params.SD16INCTL0// SD16INCTL0 Register = SD16_A.SD16INCTL0_t {
            SD16INTDLY: SD16_A.SD16INTDLY_0,
            SD16GAIN: SD16_A.SD16GAIN_1,
            SD16INCH: SD16_A.SD16INCH_0
        };
        params.SD16IV// SD16IV Register = Bits16 SD16_A.SD16IV_SD16OVIFG_OFF;
        params.SD16MEM0// SD16MEM0 Register = Bits16 SD16_A.SD16IV_SD16MEM0_OFF;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = SD16_A.ForceSetDefaultRegister_t[] [
            {
                register: "SD16CTL",
                regForceSet: false
            },
            {
                register: "SD16CCTL0",
                regForceSet: false
            },
            {
                register: "SD16INCTL0",
                regForceSet: false
            },
            {
                register: "SD16AE",
                regForceSet: false
            },
            {
                register: "SD16IV",
                regForceSet: false
            },
            {
                register: "SD16MEM0",
                regForceSet: false
            }
        ];
        params.interruptSource// ADC10 has 1 interrupt enable = SD16_A.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = SD16_A.create// Create an instance-object(IClock.Instance clock, params);
enum SD16_A.SD16AE0_t
index URL

SD16_A Analog Enable Bit 0

Configuration settings
values of type SD16_A.SD16AE0_t
    const SD16_A.SD16AE0_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE0;
    // External input enabled
enum SD16_A.SD16AE1_t
index URL

SD16_A Analog Enable Bit 1

Configuration settings
values of type SD16_A.SD16AE1_t
    const SD16_A.SD16AE1_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE1;
    // External input enabled
enum SD16_A.SD16AE2_t
index URL

SD16_A Analog Enable Bit 2

Configuration settings
values of type SD16_A.SD16AE2_t
    const SD16_A.SD16AE2_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE2;
    // External input enabled
enum SD16_A.SD16AE3_t
index URL

SD16_A Analog Enable Bit 3

Configuration settings
values of type SD16_A.SD16AE3_t
    const SD16_A.SD16AE3_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE3;
    // External input enabled
enum SD16_A.SD16AE4_t
index URL

SD16_A Analog Enable Bit 4

Configuration settings
values of type SD16_A.SD16AE4_t
    const SD16_A.SD16AE4_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE4;
    // External input enabled
enum SD16_A.SD16AE5_t
index URL

SD16_A Analog Enable Bit 5

Configuration settings
values of type SD16_A.SD16AE5_t
    const SD16_A.SD16AE5_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE5;
    // External input enabled
enum SD16_A.SD16AE6_t
index URL

SD16_A Analog Enable Bit 6

Configuration settings
values of type SD16_A.SD16AE6_t
    const SD16_A.SD16AE6_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE6;
    // External input enabled
enum SD16_A.SD16AE7_t
index URL

SD16_A Analog Enable Bit 7

Configuration settings
values of type SD16_A.SD16AE7_t
    const SD16_A.SD16AE7_OFF;
    // External input disabled. Negative inputs are internally connected to VSS
    const SD16_A.SD16AE7;
    // External input enabled
enum SD16_A.SD16BUF_t
index URL

SD16BUFx Bits

Configuration settings
values of type SD16_A.SD16BUF_t
    const SD16_A.SD16BUF_0;
    // Buffer disabled
    const SD16_A.SD16BUF_1;
    // Slow speed/current
    const SD16_A.SD16BUF_2;
    // Medium speed/current
    const SD16_A.SD16BUF_3;
    // High speed/current
enum SD16_A.SD16DF_t
index URL

SD16DF Bit

Configuration settings
values of type SD16_A.SD16DF_t
    const SD16_A.SD16DF_OFF;
    // Offset binary
    const SD16_A.SD16DF;
    // 2's complement
enum SD16_A.SD16DIV_t
index URL

SD16DIVx Bits

Configuration settings
values of type SD16_A.SD16DIV_t
    const SD16_A.SD16DIV_0;
    // Divide by 1
    const SD16_A.SD16DIV_1;
    // Divide by 2
    const SD16_A.SD16DIV_2;
    // Divide by 4
    const SD16_A.SD16DIV_3;
    // Divide by 8
enum SD16_A.SD16GAIN_t
index URL

SD16GAINx Bits

Configuration settings
values of type SD16_A.SD16GAIN_t
    const SD16_A.SD16GAIN_1;
    // Multiply by 1
    const SD16_A.SD16GAIN_2;
    // Multiply by 2
    const SD16_A.SD16GAIN_4;
    // Multiply by 4
    const SD16_A.SD16GAIN_8;
    // Multiply by 8
    const SD16_A.SD16GAIN_16;
    // Multiply by 16
    const SD16_A.SD16GAIN_32;
    // Multiply by 32
enum SD16_A.SD16IE_t
index URL

SD16IE Bit

Configuration settings
values of type SD16_A.SD16IE_t
    const SD16_A.SD16IE_OFF;
    // Disabled
    const SD16_A.SD16IE;
    // Enabled
enum SD16_A.SD16IFG_t
index URL

SD16IFG Bit

Configuration settings
values of type SD16_A.SD16IFG_t
    const SD16_A.SD16IFG_OFF;
    // No interrupt pending
    const SD16_A.SD16IFG;
    // Interrupt pending
enum SD16_A.SD16INCH_t
index URL

SD16INCHx Bits

Configuration settings
values of type SD16_A.SD16INCH_t
    const SD16_A.SD16INCH_0;
    // A0
    const SD16_A.SD16INCH_1;
    // A1
    const SD16_A.SD16INCH_2;
    // A2
    const SD16_A.SD16INCH_3;
    // A3
    const SD16_A.SD16INCH_4;
    // A4
    const SD16_A.SD16INCH_5;
    // A5 - (AVcc - AVss)/11
    const SD16_A.SD16INCH_6;
    // A6 - Temperature Sensor
    const SD16_A.SD16INCH_7;
    // A7 - Short PGA offset measurement
enum SD16_A.SD16INTDLY_t
index URL

SD16INTDLYx Bits

Configuration settings
values of type SD16_A.SD16INTDLY_t
    const SD16_A.SD16INTDLY_0;
    // Fourth sample causes interrupt
    const SD16_A.SD16INTDLY_1;
    // Third sample causes interrupt
    const SD16_A.SD16INTDLY_2;
    // Second sample causes interrupt
    const SD16_A.SD16INTDLY_3;
    // First sample causes interrupt
enum SD16_A.SD16IV_SD16MEM0_t
index URL

SD16_A SD16MEMx overflow

Configuration settings
values of type SD16_A.SD16IV_SD16MEM0_t
    const SD16_A.SD16IV_SD16MEM0_OFF;
    // No Interrupt pending
    const SD16_A.SD16IV_SD16MEM0;
    // SD16MEM0 SD16IFG
enum SD16_A.SD16IV_SD16OVIFG_t
index URL

SD16_A Interrupt

Configuration settings
values of type SD16_A.SD16IV_SD16OVIFG_t
    const SD16_A.SD16IV_SD16OVIFG_OFF;
    // No Interrupt pending
    const SD16_A.SD16IV_SD16OVIFG;
    // SD16OVIFG
enum SD16_A.SD16LP_t
index URL

SD16LP Bit

Configuration settings
values of type SD16_A.SD16LP_t
    const SD16_A.SD16LP_OFF;
    // Low-power mode is disabled
    const SD16_A.SD16LP;
    // Low-power mode is enabled. The maximum clock frequency for the SD16_A is reduced
enum SD16_A.SD16LSBACC_t
index URL

SD16LSBACC Bit

Configuration settings
values of type SD16_A.SD16LSBACC_t
    const SD16_A.SD16LSBACC_OFF;
    // SD16MEMx contains the most significant 16-bits of the conversion
    const SD16_A.SD16LSBACC;
    // SD16MEMx contains the least significant 16-bits of the conversion
enum SD16_A.SD16LSBTOG_t
index URL

SD16LSBTOG Bit

Configuration settings
values of type SD16_A.SD16LSBTOG_t
    const SD16_A.SD16LSBTOG_OFF;
    // SD16LSBACC does not toggle with each SD16MEM0 read
    const SD16_A.SD16LSBTOG;
    // SD16LSBACC toggles with each SD16MEM0 read
enum SD16_A.SD16OSR_t
index URL

SD16OSRx Bits

Configuration settings
values of type SD16_A.SD16OSR_t
    const SD16_A.SD16OSR_256;
    // SD16XOSR = 0
    const SD16_A.SD16OSR_128;
    // SD16XOSR = 0
    const SD16_A.SD16OSR_64;
    // SD16XOSR = 0
    const SD16_A.SD16OSR_32;
    // SD16XOSR = 0
    const SD16_A.SD16OSR_512;
    // SD16XOSR = 1
    const SD16_A.SD16OSR_1024;
    // SD16XOSR = 1
enum SD16_A.SD16OVIE_t
index URL

SD16OVIE Bit

Configuration settings
values of type SD16_A.SD16OVIE_t
    const SD16_A.SD16OVIE_OFF;
    // Overflow interrupt disabled
    const SD16_A.SD16OVIE;
    // Overflow interrupt enabled
enum SD16_A.SD16OVIFG_t
index URL

SD16OVIFG Bit

Configuration settings
values of type SD16_A.SD16OVIFG_t
    const SD16_A.SD16OVIFG_OFF;
    // No overflow interrupt pending
    const SD16_A.SD16OVIFG;
    // Overflow interrupt pending
enum SD16_A.SD16REFON_t
index URL

SD16REFON Bit

Configuration settings
values of type SD16_A.SD16REFON_t
    const SD16_A.SD16REFON_OFF;
    // Reference off
    const SD16_A.SD16REFON;
    // Reference on
enum SD16_A.SD16SC_t
index URL

SD16SC Bit

Configuration settings
values of type SD16_A.SD16SC_t
    const SD16_A.SD16SC_OFF;
    // No conversino start
    const SD16_A.SD16SC;
    // Start conversion
enum SD16_A.SD16SNGL_t
index URL

SD16SNGL Bit

Configuration settings
values of type SD16_A.SD16SNGL_t
    const SD16_A.SD16SNGL_OFF;
    // Continuous conversion mode
    const SD16_A.SD16SNGL;
    // Single conversion mode
enum SD16_A.SD16SSEL_t
index URL

SD16SSELx Bits

Configuration settings
values of type SD16_A.SD16SSEL_t
    const SD16_A.SD16SSEL_0;
    // MCLK
    const SD16_A.SD16SSEL_1;
    // SMCLK
    const SD16_A.SD16SSEL_2;
    // ACLK
    const SD16_A.SD16SSEL_3;
    // External TACLK
enum SD16_A.SD16UNI_t
index URL

SD16UNI Bit

Configuration settings
values of type SD16_A.SD16UNI_t
    const SD16_A.SD16UNI_OFF;
    // Bipolar mode
    const SD16_A.SD16UNI;
    // Unipolar mode
enum SD16_A.SD16VMIDON_t
index URL

SD16VMIDON Bit

Configuration settings
values of type SD16_A.SD16VMIDON_t
    const SD16_A.SD16VMIDON_OFF;
    // Off
    const SD16_A.SD16VMIDON;
    // On
enum SD16_A.SD16XDIV_t
index URL

SD16XDIVx Bits

Configuration settings
values of type SD16_A.SD16XDIV_t
    const SD16_A.SD16XDIV_0;
    // Divide by 1
    const SD16_A.SD16XDIV_1;
    // Divide by 3
    const SD16_A.SD16XDIV_2;
    // Divide by 16
    const SD16_A.SD16XDIV_3;
    // Divide by 48
enum SD16_A.SD16XOSR_t
index URL

SD16XOSR Bit

Configuration settings
values of type SD16_A.SD16XOSR_t
    const SD16_A.SD16XOSR_OFF;
    // Extended oversampling ratio. This bit, along with the SD16OSRx bits, select the oversampling ratio. See SD16OSRx bit description for settings
    const SD16_A.SD16XOSR;
    // Extended oversampling ratio. This bit, along with the SD16OSRx bits, select the oversampling ratio. See SD16OSRx bit description for settings
struct SD16_A.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new SD16_A.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct SD16_A.SD16AE_t
index URL

SD16_A Analog Input Enable Register

Configuration settings
var obj = new SD16_A.SD16AE_t;
    obj.SD16AE0 = SD16_A.SD16AE0_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
    obj.SD16AE1 = SD16_A.SD16AE1_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
    obj.SD16AE2 = SD16_A.SD16AE2_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
    obj.SD16AE3 = SD16_A.SD16AE3_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
    obj.SD16AE4 = SD16_A.SD16AE4_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
    obj.SD16AE5 = SD16_A.SD16AE5_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
    obj.SD16AE6 = SD16_A.SD16AE6_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
    obj.SD16AE7 = SD16_A.SD16AE7_t ...
    // SD16_A analog enable 0 External input disabled. Negative inputs are internally connected to VSS. 1 External input enabled
struct SD16_A.SD16CCTL0_t
index URL

SD16CCTL0 Register

Configuration settings
var obj = new SD16_A.SD16CCTL0_t;
    obj.SD16UNI = SD16_A.SD16UNI_t ...
    // Unipolar mode select 0 Bipolar mode 1 Unipolar mode
    obj.SD16XOSR = SD16_A.SD16XOSR_t ...
    // Extended oversampling ratio. This bit, along with the SD16OSRx bits, select the oversampling ratio. See SD16OSRx bit description for settings
    obj.SD16SNGL = SD16_A.SD16SNGL_t ...
    // Single conversion mode select 0 Continuous conversion mode 1 Single conversion mode
    obj.SD16OSR = SD16_A.SD16OSR_t ...
    // Oversampling ratio When SD16XOSR = 0 00 256 01 128 10 64 11 32 When SD16XOSR = 1 00 512 01 1024 10 Reserved 11 Reserved
    obj.SD16LSBTOG = SD16_A.SD16LSBTOG_t ...
    // LSB toggle. This bit, when set, causes SD16LSBACC to toggle each time the SD16MEM0 register is read. 0 SD16LSBACC does not toggle with each SD16MEM0 read 1 SD16LSBACC toggles with each SD16MEM0 read
    obj.SD16LSBACC = SD16_A.SD16LSBACC_t ...
    // LSB access. This bit allows access to the upper or lower 16-bits of the SD16_A conversion result. 0 SD16MEMx contains the most significant 16-bits of the conversion. 1 SD16MEMx contains the least significant 16-bits of the conversion
    obj.SD16OVIFG = SD16_A.SD16OVIFG_t ...
    // SD16_A overflow interrupt flag 0 No overflow interrupt pending 1 Overflow interrupt pending
    obj.SD16DF = SD16_A.SD16DF_t ...
    // SD16_A data format 0 Offset binary 1 2's complement
    obj.SD16IE = SD16_A.SD16IE_t ...
    // SD16_A interrupt enable 0 Disabled 1 Enabled
    obj.SD16IFG = SD16_A.SD16IFG_t ...
    // SD16_A interrupt flag. SD16IFG is set when new conversion results are available. SD16IFG is automatically reset when the corresponding SD16MEMx register is read, or may be cleared with software. 0 No interrupt pending 1 Interrupt pending
    obj.SD16SC = SD16_A.SD16SC_t ...
    // SD16_A start conversion 0 No conversion start 1 Start conversion
struct SD16_A.SD16CTL_t
index URL

SD16CTL Register

Configuration settings
var obj = new SD16_A.SD16CTL_t;
    obj.SD16XDIV = SD16_A.SD16XDIV_t ...
    // SD16_A clock divider 000 Divide by 1 001 Divide by 3 010 Divide by 16 011 Divide by 48 1xx Reserved
    obj.SD16LP = SD16_A.SD16LP_t ...
    // Low power mode. This bit selects a reduced speed, reduced power mode 0 Low-power mode is disabled 1 Low-power mode is enabled. The maximum clock frequency for the SD16_A is reduced
    obj.SD16DIV = SD16_A.SD16DIV_t ...
    // SD16_A clock divider 00 Divide by 1 01 Divide by 2 10 Divide by 4 11 Divide by 8
    obj.SD16SSEL = SD16_A.SD16SSEL_t ...
    // SD16_A clock source select 00 MCLK 01 SMCLK 10 ACLK External TACLK
    obj.SD16VMIDON = SD16_A.SD16VMIDON_t ...
    // VMID buffer on 0 Off 1 On
    obj.SD16REFON = SD16_A.SD16REFON_t ...
    // Reference generator on 0 Reference off 1 Reference on
    obj.SD16OVIE = SD16_A.SD16OVIE_t ...
    // SD16_A overflow interrupt enable. The GIE bit must also be set to enable the interrupt. 0 Overflow interrupt disabled 1 Overflow interrupt enabled
struct SD16_A.SD16INCTL0_t
index URL

SD16INCTL0 Register

Configuration settings
var obj = new SD16_A.SD16INCTL0_t;
    obj.SD16INTDLY = SD16_A.SD16INTDLY_t ...
    // Interrupt delay generation after conversion start. These bits select the delay for the first interrupt after conversion start. 00 Fourth sample causes interrupt 01 Third sample causes interrupt 10 Second sample causes interrupt 11 First sample causes interrupt
    obj.SD16GAIN = SD16_A.SD16GAIN_t ...
    // SD16_A preamplifier gain 000 Multiply by 1 001 Multiply by 2 010 Multiply by 4 011 Multiply by 8 100 Multiply by 16 101 Multiply by 32 110 Reserved 111 Reserved
    obj.SD16INCH = SD16_A.SD16INCH_t ...
    // SD16_A channel differential pair input 000 A0 001 A1 010 A2 011 A3 100 A4 101 A5-- (AVCC -- AVSS) / 11 110 A6 -- Temperature Sensor 111 A7 -- Short for PGA offset measurement
struct SD16_A.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new SD16_A.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
SD16_A.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
SD16_A.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
SD16_A.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
SD16_A.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new SD16_A.Params;
// Instance config-params object
    params.SD16AE = SD16_A.SD16AE_t {
    // SD16AE Register
        SD16AE0: SD16_A.SD16AE0_OFF,
        SD16AE1: SD16_A.SD16AE1_OFF,
        SD16AE2: SD16_A.SD16AE2_OFF,
        SD16AE3: SD16_A.SD16AE3_OFF,
        SD16AE4: SD16_A.SD16AE4_OFF,
        SD16AE5: SD16_A.SD16AE5_OFF,
        SD16AE6: SD16_A.SD16AE6_OFF,
        SD16AE7: SD16_A.SD16AE7_OFF
    };
    params.SD16CCTL0 = SD16_A.SD16CCTL0_t {
    // SD16CCTL0 Register
        SD16UNI: SD16_A.SD16UNI_OFF,
        SD16XOSR: SD16_A.SD16XOSR_OFF,
        SD16SNGL: SD16_A.SD16SNGL_OFF,
        SD16OSR: SD16_A.SD16OSR_256,
        SD16LSBTOG: SD16_A.SD16LSBTOG_OFF,
        SD16LSBACC: SD16_A.SD16LSBACC_OFF,
        SD16OVIFG: SD16_A.SD16OVIFG_OFF,
        SD16DF: SD16_A.SD16DF_OFF,
        SD16IE: SD16_A.SD16IE_OFF,
        SD16IFG: SD16_A.SD16IFG_OFF,
        SD16SC: SD16_A.SD16SC_OFF
    };
    params.SD16CTL = SD16_A.SD16CTL_t {
    // SD16CTL Register
        SD16XDIV: SD16_A.SD16XDIV_0,
        SD16LP: SD16_A.SD16LP_OFF,
        SD16DIV: SD16_A.SD16DIV_0,
        SD16SSEL: SD16_A.SD16SSEL_0,
        SD16VMIDON: SD16_A.SD16VMIDON_OFF,
        SD16REFON: SD16_A.SD16REFON_OFF,
        SD16OVIE: SD16_A.SD16OVIE_OFF
    };
    params.SD16INCTL0 = SD16_A.SD16INCTL0_t {
    // SD16INCTL0 Register
        SD16INTDLY: SD16_A.SD16INTDLY_0,
        SD16GAIN: SD16_A.SD16GAIN_1,
        SD16INCH: SD16_A.SD16INCH_0
    };
    params.SD16IV = Bits16 SD16_A.SD16IV_SD16OVIFG_OFF;
    // SD16IV Register
    params.SD16MEM0 = Bits16 SD16_A.SD16IV_SD16MEM0_OFF;
    // SD16MEM0 Register
    params.forceSetDefaultRegister = SD16_A.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "SD16CTL",
            regForceSet: false
        },
        {
            register: "SD16CCTL0",
            regForceSet: false
        },
        {
            register: "SD16INCTL0",
            regForceSet: false
        },
        {
            register: "SD16AE",
            regForceSet: false
        },
        {
            register: "SD16IV",
            regForceSet: false
        },
        {
            register: "SD16MEM0",
            regForceSet: false
        }
    ];
    params.interruptSource = SD16_A.regIntVect_t[2] undefined;
    // ADC10 has 1 interrupt enable
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config SD16_A.Params.SD16AE // instance
index URL

SD16AE Register

Configuration settings
var params = new SD16_A.Params;
...
params.SD16AE = SD16_A.SD16AE_t {
    SD16AE0: SD16_A.SD16AE0_OFF,
    SD16AE1: SD16_A.SD16AE1_OFF,
    SD16AE2: SD16_A.SD16AE2_OFF,
    SD16AE3: SD16_A.SD16AE3_OFF,
    SD16AE4: SD16_A.SD16AE4_OFF,
    SD16AE5: SD16_A.SD16AE5_OFF,
    SD16AE6: SD16_A.SD16AE6_OFF,
    SD16AE7: SD16_A.SD16AE7_OFF
};
config SD16_A.Params.SD16CCTL0 // instance
index URL

SD16CCTL0 Register

Configuration settings
var params = new SD16_A.Params;
...
params.SD16CCTL0 = SD16_A.SD16CCTL0_t {
    SD16UNI: SD16_A.SD16UNI_OFF,
    SD16XOSR: SD16_A.SD16XOSR_OFF,
    SD16SNGL: SD16_A.SD16SNGL_OFF,
    SD16OSR: SD16_A.SD16OSR_256,
    SD16LSBTOG: SD16_A.SD16LSBTOG_OFF,
    SD16LSBACC: SD16_A.SD16LSBACC_OFF,
    SD16OVIFG: SD16_A.SD16OVIFG_OFF,
    SD16DF: SD16_A.SD16DF_OFF,
    SD16IE: SD16_A.SD16IE_OFF,
    SD16IFG: SD16_A.SD16IFG_OFF,
    SD16SC: SD16_A.SD16SC_OFF
};
config SD16_A.Params.SD16CTL // instance
index URL

SD16CTL Register

Configuration settings
var params = new SD16_A.Params;
...
params.SD16CTL = SD16_A.SD16CTL_t {
    SD16XDIV: SD16_A.SD16XDIV_0,
    SD16LP: SD16_A.SD16LP_OFF,
    SD16DIV: SD16_A.SD16DIV_0,
    SD16SSEL: SD16_A.SD16SSEL_0,
    SD16VMIDON: SD16_A.SD16VMIDON_OFF,
    SD16REFON: SD16_A.SD16REFON_OFF,
    SD16OVIE: SD16_A.SD16OVIE_OFF
};
config SD16_A.Params.SD16INCTL0 // instance
index URL

SD16INCTL0 Register

Configuration settings
var params = new SD16_A.Params;
...
params.SD16INCTL0 = SD16_A.SD16INCTL0_t {
    SD16INTDLY: SD16_A.SD16INTDLY_0,
    SD16GAIN: SD16_A.SD16GAIN_1,
    SD16INCH: SD16_A.SD16INCH_0
};
config SD16_A.Params.SD16IV // instance
index URL

SD16IV Register

Configuration settings
var params = new SD16_A.Params;
...
params.SD16IV = Bits16 SD16_A.SD16IV_SD16OVIFG_OFF;
config SD16_A.Params.SD16MEM0 // instance
index URL

SD16MEM0 Register

Configuration settings
var params = new SD16_A.Params;
...
params.SD16MEM0 = Bits16 SD16_A.SD16IV_SD16MEM0_OFF;
config SD16_A.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new SD16_A.Params;
...
const params.forceSetDefaultRegister = SD16_A.ForceSetDefaultRegister_t[] [
    {
        register: "SD16CTL",
        regForceSet: false
    },
    {
        register: "SD16CCTL0",
        regForceSet: false
    },
    {
        register: "SD16INCTL0",
        regForceSet: false
    },
    {
        register: "SD16AE",
        regForceSet: false
    },
    {
        register: "SD16IV",
        regForceSet: false
    },
    {
        register: "SD16MEM0",
        regForceSet: false
    }
];
config SD16_A.Params.interruptSource // instance
index URL

ADC10 has 1 interrupt enable

Configuration settings
var params = new SD16_A.Params;
...
params.interruptSource = SD16_A.regIntVect_t[2] undefined;
config SD16_A.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new SD16_A.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config SD16_A.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new SD16_A.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new SD16_A.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SD16_A.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:13 GMT


package ti.catalog.msp430.peripherals.clock
index URL

MSP430 clock peripherals

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/package.xdc
requires ti.catalog.msp430.peripherals.special_function;
package ti.catalog.msp430.peripherals.clock [1, 0, 0] {
    interface IClock;
    // MSP430 Master Clock
    module BCSplus;
    // MSP430 Basic Clock System
    module CS;
    // MSP430 Clock System
    module CS_A;
    // MSP430 Clock System
    module UCS;
    // MSP430 Unified Clock System
}
generated on Sun, 25 Nov 2018 22:20:01 GMT


module ti.catalog.msp430.peripherals.clock.BCSplus

metaonly module ti.catalog.msp430.peripherals.clock.BCSplus
index URL

MSP430 Basic Clock System

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/clock/BCSplus.xdc
var BCSplus = xdc.useModule('ti.catalog.msp430.peripherals.clock.BCSplus');
module-wide constants & types
    values of type BCSplus.DCO0_t// DCO0 Bit
        const BCSplus.DCO0_OFF// Disable DCO0 bit;
        const BCSplus.DCO0// Enable DCO0 bit;
    values of type BCSplus.DCO1_t// DCO1 Bit
        const BCSplus.DCO1_OFF// Disable DCO1 bit;
        const BCSplus.DCO1// Enable DCO1 bit;
    values of type BCSplus.DCO2_t// DCO2 Bit
        const BCSplus.DCO2_OFF// Disable DCO2 bit;
        const BCSplus.DCO2// Enable DCO2 bit;
    values of type BCSplus.DCOR_t//
        const BCSplus.DCOR_OFF// DCO uses internal resistor;
        const BCSplus.DCOR// DCO uses external resistor;
    values of type BCSplus.DIVA_t// ACLK Divider values
        const BCSplus.DIVA_0// Divide by 1;
        const BCSplus.DIVA_1// Divide by 2;
        const BCSplus.DIVA_2// Divide by 4;
        const BCSplus.DIVA_3// Divide by 8;
    values of type BCSplus.DIVM_t// MCLK Divider values
        const BCSplus.DIVM_0// Divide by 1;
        const BCSplus.DIVM_1// Divide by 2;
        const BCSplus.DIVM_2// Divide by 4;
        const BCSplus.DIVM_3// Divide by 8;
    values of type BCSplus.DIVS_t// SMCLK Divider values
        const BCSplus.DIVS_0// Divide by 1;
        const BCSplus.DIVS_1// Divide by 2;
        const BCSplus.DIVS_2// Divide by 4;
        const BCSplus.DIVS_3// Divide by 8;
    values of type BCSplus.LFXT1OF_t//
        const BCSplus.LFXT1OF_OFF// No fault condition present;
        const BCSplus.LFXT1OF// LFXT1 fault condition present;
    values of type BCSplus.LFXT1S_t//
        const BCSplus.LFXT1S_0// If XTS = 0, XT1 = 32768kHz Crystal ; If XTS = 1, XT1 = 0.4 - 1-MHz crystal or resonator;
        const BCSplus.LFXT1S_1// If XTS = 0, XT1 = Reserved ; If XTS = 1, XT1 = 1 - 3-MHz crystal or resonator;
        const BCSplus.LFXT1S_2// If XTS = 0, XT1 = VLOCLK ; If XTS = 1, XT1 = 3 - 16-MHz crystal or resonator;
        const BCSplus.LFXT1S_3// If XTS = 0, XT1 = Digital External ; If XTS = 1, XT1 = 0.4 - 16-MHz Digital External;
    values of type BCSplus.MOD0_t// MOD0 Bit
        const BCSplus.MOD0_OFF// Disable MOD0 bit;
        const BCSplus.MOD0// Enable MOD0 bit;
    values of type BCSplus.MOD1_t// MOD1 Bit
        const BCSplus.MOD1_OFF// Disable MOD1 bit;
        const BCSplus.MOD1// Enable MOD1 bit;
    values of type BCSplus.MOD2_t// MOD2 Bit
        const BCSplus.MOD2_OFF// Disable MOD2 bit;
        const BCSplus.MOD2// Enable MOD2 bit;
    values of type BCSplus.MOD3_t// MOD3 Bit
        const BCSplus.MOD3_OFF// Disable MOD3 bit;
        const BCSplus.MOD3// Enable MOD3 bit;
    values of type BCSplus.MOD4_t// MOD4 Bit
        const BCSplus.MOD4_OFF// Disable MOD4 bit;
        const BCSplus.MOD4// Enable MOD4 bit;
    values of type BCSplus.RSEL0_t//
        const BCSplus.RSEL0_OFF// Disable RSEL0 bit;
        const BCSplus.RSEL0// Enable RSEL0 bit;
    values of type BCSplus.RSEL1_t//
        const BCSplus.RSEL1_OFF// Disable RSEL1 bit;
        const BCSplus.RSEL1// Enable RSEL1 bit;
    values of type BCSplus.RSEL2_t//
        const BCSplus.RSEL2_OFF// Disable RSEL2 bit;
        const BCSplus.RSEL2// Enable RSEL2 bit;
    values of type BCSplus.RSEL3_t//
        const BCSplus.RSEL3_OFF// Disable RSEL3 bit;
        const BCSplus.RSEL3// Enable RSEL3 bit;
    values of type BCSplus.SELM_t// MCLK Source Select
        const BCSplus.SELM_0// DCOCLK;
        const BCSplus.SELM_2// XT2CLK/LFXTCLK;
        const BCSplus.SELM_3// LFXTCLK;
    values of type BCSplus.SELS_t//
        const BCSplus.SELS_OFF// DCOCLK;
        const BCSplus.SELS// XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when XT2 oscillator not present;
    values of type BCSplus.XCAP_t//
        const BCSplus.XCAP_0// ~1 pF;
        const BCSplus.XCAP_1// ~6 pF;
        const BCSplus.XCAP_2// ~10 pF;
        const BCSplus.XCAP_3// ~12.5 pF;
    values of type BCSplus.XT2OFF_t//
        const BCSplus.XT2OFF_OFF// Enable XT2CLK;
        const BCSplus.XT2OFF// Disable XT2CLK;
    values of type BCSplus.XT2OF_t//
        const BCSplus.XT2OF_OFF// No fault condition present;
        const BCSplus.XT2OF// XT2 fault condition present;
    values of type BCSplus.XT2S_t// XT2 frequency range select
        const BCSplus.XT2S_0// 0.4 - 1 MHz;
        const BCSplus.XT2S_1// 1 - 3 MHz;
        const BCSplus.XT2S_2// 3 - 16 MHz;
        const BCSplus.XT2S_3// Digital input signal;
    values of type BCSplus.XTS_t//
        const BCSplus.XTS_OFF// Low Frequency;
        const BCSplus.XTS// High Frequency;
    var obj = new BCSplus.AvailableClockVariations_t// Available variations of clock in a device;
        obj.clockType = String ...
        obj.hasClock = Bool ...
    var obj = new BCSplus.BCSCTL1_t// BCS Control Register 1;
        obj.XT2OFF// XT2 off. This bit turns off the XT2 oscillator 0 XT2 is on 1 XT2 is off if it is not used for MCLK or SMCLK = BCSplus.XT2OFF_t ...
        obj.XTS// LFXT1 mode select. 0 Low frequency mode 1 High frequency mode = BCSplus.XTS_t ...
        obj.DIVA// Divider for ACLK 00 /1 01 /2 10 /4 11 /8 = BCSplus.DIVA_t ...
        obj.RSEL0// Range select bit 0 = BCSplus.RSEL0_t ...
        obj.RSEL1// Range select bit 1 = BCSplus.RSEL1_t ...
        obj.RSEL2// Range select bit 2 = BCSplus.RSEL2_t ...
        obj.RSEL3// Range select bit 3 = BCSplus.RSEL3_t ...
    var obj = new BCSplus.BCSCTL2_t// BCS Control Register 2;
        obj.SELM// Select MCLK. These bits select the MCLK source. 00 DCOCLK 01 DCOCLK 10 XT2CLK when XT2 oscillator present on-chip. LFXT1CLK or VLOCLK when XT2 oscillator not present on-chip. 11 LFXT1CLK or VLOCLK = BCSplus.SELM_t ...
        obj.DIVM// Divider for MCLK 00 /1 01 /2 10 /4 11 /8 = BCSplus.DIVM_t ...
        obj.SELS// Select SMCLK. This bit selects the SMCLK source. 0 DCOCLK 1 XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when XT2 oscillator not present = BCSplus.SELS_t ...
        obj.DIVS// Divider for SMCLK 00 /1 01 /2 10 /4 11 /8 = BCSplus.DIVS_t ...
        obj.DCOR// DCO resistor select 0 Internal resistor 1 External resistor = BCSplus.DCOR_t ...
    var obj = new BCSplus.BCSCTL3_t// BCS Control register 3;
        obj.XT2S// XT2 range select. These bits select the frequency range for XT2. 00 0.4 - 1-MHz crystal or resonator 01 1 - 3-MHz crystal or resonator 10 3 - 16-MHz crystal or resonator 11 Digital external 0.4 - 16-MHz clock source = BCSplus.XT2S_t ...
        obj.LFXT1S// Low-frequency clock select and LFXT1 range select. These bits select between LFXT1 and VLO when XTS = 0, and select the frequency range for LFXT1 when XTS = 1 = BCSplus.LFXT1S_t ...
        obj.XCAP// Oscillator capacitor selection. These bits select the effective capacitance seen by the LFXT1 crystal when XTS = 0. If XTS = 1 or if LFCT1Sx = 11 XCAPx should be 00. 00 ~1 pF 01 ~6 pF 10 ~10 pF 11 ~12.5 pF = BCSplus.XCAP_t ...
        obj.XT2OF// XT2 oscillator fault 0 No fault condition present 1 Fault condition present = BCSplus.XT2OF_t ...
        obj.LFXT1OF// LFXT1 oscillator fault 0 No fault condition present 1 Fault condition present = BCSplus.LFXT1OF_t ...
    var obj = new BCSplus.DCOCTL_t// ;
        obj.MOD0// Modulation Bit 0 = BCSplus.MOD0_t ...
        obj.MOD1// Modulation Bit 1 = BCSplus.MOD1_t ...
        obj.MOD2// Modulation Bit 2 = BCSplus.MOD2_t ...
        obj.MOD3// Modulation Bit 3 = BCSplus.MOD3_t ...
        obj.MOD4// Modulation Bit 4 = BCSplus.MOD4_t ...
        obj.DCO0// DCO Select Bit 0 = BCSplus.DCO0_t ...
        obj.DCO1// DCO Select Bit 1 = BCSplus.DCO1_t ...
        obj.DCO2// DCO Select Bit 2 = BCSplus.DCO2_t ...
    var obj = new BCSplus.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     BCSplus.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     BCSplus.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new BCSplus.Params// Instance config-params object;
        params.ACLKHz// ACLK frequency in Hertz = Float undefined;
        params.BCSCTL1// Basic Clock System Control 1 = BCSplus.BCSCTL1_t {
            XT2OFF: BCSplus.XT2OFF,
            XTS: BCSplus.XTS_OFF,
            DIVA: BCSplus.DIVA_0,
            RSEL0: BCSplus.RSEL0,
            RSEL1: BCSplus.RSEL1,
            RSEL2: BCSplus.RSEL2,
            RSEL3: BCSplus.RSEL3_OFF
        };
        params.BCSCTL2// Basic Clock System Control 2 = BCSplus.BCSCTL2_t {
            SELM: BCSplus.SELM_0,
            DIVM: BCSplus.DIVM_0,
            SELS: BCSplus.SELS_OFF,
            DIVS: BCSplus.DIVS_0,
            DCOR: BCSplus.DCOR_OFF
        };
        params.BCSCTL3// Basic Clock System Control 3 = BCSplus.BCSCTL3_t {
            XT2S: BCSplus.XT2S_0,
            LFXT1S: BCSplus.LFXT1S_0,
            XCAP: BCSplus.XCAP_1
        };
        params.DCOCLKHz// DCO clock frequency in Hertz = Float 1000000;
        params.DCOCTL// DCO Clock Frequency Control = BCSplus.DCOCTL_t {
            MOD0: BCSplus.MOD0_OFF,
            MOD1: BCSplus.MOD1_OFF,
            MOD2: BCSplus.MOD2_OFF,
            MOD3: BCSplus.MOD3_OFF,
            MOD4: BCSplus.MOD4_OFF,
            DCO0: BCSplus.DCO0,
            DCO1: BCSplus.DCO1,
            DCO2: BCSplus.DCO2_OFF
        };
        params.LFXT1CLKHz// = Float 0;
        params.MCLKHz// MCLK frequency in Hertz = Float undefined;
        params.SMCLKHz// SMCLK frequency in Hertz = Float undefined;
        params.VLOCLKHz// = Float 12000;
        params.WATCHCRYSTALCLKHz// = Float 32768;
        params.XT2CLKHz// = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.enableXT2// Set whether XT2 is used on the device. This is different than hasXT2 variable = Bool false;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = BCSplus.ForceSetDefaultRegister_t[] [
            {
                register: "DCOCTL",
                regForceSet: false
            },
            {
                register: "BCSCTL1",
                regForceSet: false
            },
            {
                register: "BCSCTL2",
                regForceSet: false
            },
            {
                register: "BCSCTL3",
                regForceSet: false
            }
        ];
        params.hasAllCal// Specify if device has all calibration constants = Bool false;
        params.hasHFXT1// Specify if HFXT1 is available on the device = Bool false;
        params.hasRosc// Specify if Rosc is available on the device = Bool false;
        params.hasVLO// Specify if VLO is available on the device = Bool false;
        params.hasXT2// Specify if XT2 is available on the device = Bool false;
        params.maxCpuFrequency// Maximum CPU frequency in Hertz = Float 0;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
        params.preCalibratedValues// Basic Clock System + pre-calibrated system frequency = UInt 0;
        params.preCalibratedValuesItems// hasAllCal = false UInt - Description 0 - 1 MHz 1 - Custom = String[length] undefined;
per-instance functions
     inst.computeDCOCLKHz// Initialize to the nearest available DCO clock frequency(Float DCOCLKHz) returns Void
enum BCSplus.DCO0_t
index URL

DCO0 Bit

Configuration settings
values of type BCSplus.DCO0_t
    const BCSplus.DCO0_OFF;
    // Disable DCO0 bit
    const BCSplus.DCO0;
    // Enable DCO0 bit
enum BCSplus.DCO1_t
index URL

DCO1 Bit

Configuration settings
values of type BCSplus.DCO1_t
    const BCSplus.DCO1_OFF;
    // Disable DCO1 bit
    const BCSplus.DCO1;
    // Enable DCO1 bit
enum BCSplus.DCO2_t
index URL

DCO2 Bit

Configuration settings
values of type BCSplus.DCO2_t
    const BCSplus.DCO2_OFF;
    // Disable DCO2 bit
    const BCSplus.DCO2;
    // Enable DCO2 bit
enum BCSplus.DCOR_t
index URL
Configuration settings
values of type BCSplus.DCOR_t
    const BCSplus.DCOR_OFF;
    // DCO uses internal resistor
    const BCSplus.DCOR;
    // DCO uses external resistor
enum BCSplus.DIVA_t
index URL

ACLK Divider values

Configuration settings
values of type BCSplus.DIVA_t
    const BCSplus.DIVA_0;
    // Divide by 1
    const BCSplus.DIVA_1;
    // Divide by 2
    const BCSplus.DIVA_2;
    // Divide by 4
    const BCSplus.DIVA_3;
    // Divide by 8
enum BCSplus.DIVM_t
index URL

MCLK Divider values

Configuration settings
values of type BCSplus.DIVM_t
    const BCSplus.DIVM_0;
    // Divide by 1
    const BCSplus.DIVM_1;
    // Divide by 2
    const BCSplus.DIVM_2;
    // Divide by 4
    const BCSplus.DIVM_3;
    // Divide by 8
enum BCSplus.DIVS_t
index URL

SMCLK Divider values

Configuration settings
values of type BCSplus.DIVS_t
    const BCSplus.DIVS_0;
    // Divide by 1
    const BCSplus.DIVS_1;
    // Divide by 2
    const BCSplus.DIVS_2;
    // Divide by 4
    const BCSplus.DIVS_3;
    // Divide by 8
enum BCSplus.LFXT1OF_t
index URL
Configuration settings
values of type BCSplus.LFXT1OF_t
    const BCSplus.LFXT1OF_OFF;
    // No fault condition present
    const BCSplus.LFXT1OF;
    // LFXT1 fault condition present
enum BCSplus.LFXT1S_t
index URL
Configuration settings
values of type BCSplus.LFXT1S_t
    const BCSplus.LFXT1S_0;
    // If XTS = 0, XT1 = 32768kHz Crystal ; If XTS = 1, XT1 = 0.4 - 1-MHz crystal or resonator
    const BCSplus.LFXT1S_1;
    // If XTS = 0, XT1 = Reserved ; If XTS = 1, XT1 = 1 - 3-MHz crystal or resonator
    const BCSplus.LFXT1S_2;
    // If XTS = 0, XT1 = VLOCLK ; If XTS = 1, XT1 = 3 - 16-MHz crystal or resonator
    const BCSplus.LFXT1S_3;
    // If XTS = 0, XT1 = Digital External ; If XTS = 1, XT1 = 0.4 - 16-MHz Digital External
enum BCSplus.MOD0_t
index URL

MOD0 Bit

Configuration settings
values of type BCSplus.MOD0_t
    const BCSplus.MOD0_OFF;
    // Disable MOD0 bit
    const BCSplus.MOD0;
    // Enable MOD0 bit
enum BCSplus.MOD1_t
index URL

MOD1 Bit

Configuration settings
values of type BCSplus.MOD1_t
    const BCSplus.MOD1_OFF;
    // Disable MOD1 bit
    const BCSplus.MOD1;
    // Enable MOD1 bit
enum BCSplus.MOD2_t
index URL

MOD2 Bit

Configuration settings
values of type BCSplus.MOD2_t
    const BCSplus.MOD2_OFF;
    // Disable MOD2 bit
    const BCSplus.MOD2;
    // Enable MOD2 bit
enum BCSplus.MOD3_t
index URL

MOD3 Bit

Configuration settings
values of type BCSplus.MOD3_t
    const BCSplus.MOD3_OFF;
    // Disable MOD3 bit
    const BCSplus.MOD3;
    // Enable MOD3 bit
enum BCSplus.MOD4_t
index URL

MOD4 Bit

Configuration settings
values of type BCSplus.MOD4_t
    const BCSplus.MOD4_OFF;
    // Disable MOD4 bit
    const BCSplus.MOD4;
    // Enable MOD4 bit
enum BCSplus.RSEL0_t
index URL
Configuration settings
values of type BCSplus.RSEL0_t
    const BCSplus.RSEL0_OFF;
    // Disable RSEL0 bit
    const BCSplus.RSEL0;
    // Enable RSEL0 bit
enum BCSplus.RSEL1_t
index URL
Configuration settings
values of type BCSplus.RSEL1_t
    const BCSplus.RSEL1_OFF;
    // Disable RSEL1 bit
    const BCSplus.RSEL1;
    // Enable RSEL1 bit
enum BCSplus.RSEL2_t
index URL
Configuration settings
values of type BCSplus.RSEL2_t
    const BCSplus.RSEL2_OFF;
    // Disable RSEL2 bit
    const BCSplus.RSEL2;
    // Enable RSEL2 bit
enum BCSplus.RSEL3_t
index URL
Configuration settings
values of type BCSplus.RSEL3_t
    const BCSplus.RSEL3_OFF;
    // Disable RSEL3 bit
    const BCSplus.RSEL3;
    // Enable RSEL3 bit
enum BCSplus.SELM_t
index URL

MCLK Source Select

Configuration settings
values of type BCSplus.SELM_t
    const BCSplus.SELM_0;
    // DCOCLK
    const BCSplus.SELM_2;
    // XT2CLK/LFXTCLK
    const BCSplus.SELM_3;
    // LFXTCLK
enum BCSplus.SELS_t
index URL
Configuration settings
values of type BCSplus.SELS_t
    const BCSplus.SELS_OFF;
    // DCOCLK
    const BCSplus.SELS;
    // XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when XT2 oscillator not present
enum BCSplus.XCAP_t
index URL
Configuration settings
values of type BCSplus.XCAP_t
    const BCSplus.XCAP_0;
    // ~1 pF
    const BCSplus.XCAP_1;
    // ~6 pF
    const BCSplus.XCAP_2;
    // ~10 pF
    const BCSplus.XCAP_3;
    // ~12.5 pF
enum BCSplus.XT2OFF_t
index URL
Configuration settings
values of type BCSplus.XT2OFF_t
    const BCSplus.XT2OFF_OFF;
    // Enable XT2CLK
    const BCSplus.XT2OFF;
    // Disable XT2CLK
enum BCSplus.XT2OF_t
index URL
Configuration settings
values of type BCSplus.XT2OF_t
    const BCSplus.XT2OF_OFF;
    // No fault condition present
    const BCSplus.XT2OF;
    // XT2 fault condition present
enum BCSplus.XT2S_t
index URL

XT2 frequency range select

Configuration settings
values of type BCSplus.XT2S_t
    const BCSplus.XT2S_0;
    // 0.4 - 1 MHz
    const BCSplus.XT2S_1;
    // 1 - 3 MHz
    const BCSplus.XT2S_2;
    // 3 - 16 MHz
    const BCSplus.XT2S_3;
    // Digital input signal
enum BCSplus.XTS_t
index URL
Configuration settings
values of type BCSplus.XTS_t
    const BCSplus.XTS_OFF;
    // Low Frequency
    const BCSplus.XTS;
    // High Frequency
struct BCSplus.AvailableClockVariations_t
index URL

Available variations of clock in a device

Configuration settings
var obj = new BCSplus.AvailableClockVariations_t;
    obj.clockType = String ...
    obj.hasClock = Bool ...
DETAILS
Stores true/false if any of the clock variations are available.
SEE
AvailableClockVariations_t
struct BCSplus.BCSCTL1_t
index URL

BCS Control Register 1

Configuration settings
var obj = new BCSplus.BCSCTL1_t;
    obj.XT2OFF = BCSplus.XT2OFF_t ...
    // XT2 off. This bit turns off the XT2 oscillator 0 XT2 is on 1 XT2 is off if it is not used for MCLK or SMCLK
    obj.XTS = BCSplus.XTS_t ...
    // LFXT1 mode select. 0 Low frequency mode 1 High frequency mode
    obj.DIVA = BCSplus.DIVA_t ...
    // Divider for ACLK 00 /1 01 /2 10 /4 11 /8
    obj.RSEL0 = BCSplus.RSEL0_t ...
    // Range select bit 0
    obj.RSEL1 = BCSplus.RSEL1_t ...
    // Range select bit 1
    obj.RSEL2 = BCSplus.RSEL2_t ...
    // Range select bit 2
    obj.RSEL3 = BCSplus.RSEL3_t ...
    // Range select bit 3
FIELDS
XT2OFF — This bit turns off the XT2 oscillator: 0 - XT2 is on, 1 - XT2 is off if it is not used for MCLK or SMCLK
XTS — 0 - Low frequency mode; 1 - High frequency mode
struct BCSplus.BCSCTL2_t
index URL

BCS Control Register 2

Configuration settings
var obj = new BCSplus.BCSCTL2_t;
    obj.SELM = BCSplus.SELM_t ...
    // Select MCLK. These bits select the MCLK source. 00 DCOCLK 01 DCOCLK 10 XT2CLK when XT2 oscillator present on-chip. LFXT1CLK or VLOCLK when XT2 oscillator not present on-chip. 11 LFXT1CLK or VLOCLK
    obj.DIVM = BCSplus.DIVM_t ...
    // Divider for MCLK 00 /1 01 /2 10 /4 11 /8
    obj.SELS = BCSplus.SELS_t ...
    // Select SMCLK. This bit selects the SMCLK source. 0 DCOCLK 1 XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when XT2 oscillator not present
    obj.DIVS = BCSplus.DIVS_t ...
    // Divider for SMCLK 00 /1 01 /2 10 /4 11 /8
    obj.DCOR = BCSplus.DCOR_t ...
    // DCO resistor select 0 Internal resistor 1 External resistor
FIELDS
SELM — These bits select the MCLK source.
SELS — These bits select the SMCLK source. When XT2 oscillator present, 0 selects DCOCLK and 1 selects XT2CLK; otherwise 0 selects LFXT1CLK and 1 selects VLOCLK.
DCOR — 0 - Internal resistor, 1 - external resistor
struct BCSplus.BCSCTL3_t
index URL

BCS Control register 3

Configuration settings
var obj = new BCSplus.BCSCTL3_t;
    obj.XT2S = BCSplus.XT2S_t ...
    // XT2 range select. These bits select the frequency range for XT2. 00 0.4 - 1-MHz crystal or resonator 01 1 - 3-MHz crystal or resonator 10 3 - 16-MHz crystal or resonator 11 Digital external 0.4 - 16-MHz clock source
    obj.LFXT1S = BCSplus.LFXT1S_t ...
    // Low-frequency clock select and LFXT1 range select. These bits select between LFXT1 and VLO when XTS = 0, and select the frequency range for LFXT1 when XTS = 1
    obj.XCAP = BCSplus.XCAP_t ...
    // Oscillator capacitor selection. These bits select the effective capacitance seen by the LFXT1 crystal when XTS = 0. If XTS = 1 or if LFCT1Sx = 11 XCAPx should be 00. 00 ~1 pF 01 ~6 pF 10 ~10 pF 11 ~12.5 pF
    obj.XT2OF = BCSplus.XT2OF_t ...
    // XT2 oscillator fault 0 No fault condition present 1 Fault condition present
    obj.LFXT1OF = BCSplus.LFXT1OF_t ...
    // LFXT1 oscillator fault 0 No fault condition present 1 Fault condition present
FIELDS
LFXT1S — These bits select between LFXT1 and VLO and XTS = 0, and select the frequency range for LFXT1 when XTS = 1
XCAP — These bits select the effective capacitance seen by the LFXT1 crystal when XTS = 0. If XTS = 1 or if LFCT1Sx = 11, then XCAPx should be 00.
struct BCSplus.DCOCTL_t
index URL
Configuration settings
var obj = new BCSplus.DCOCTL_t;
    obj.MOD0 = BCSplus.MOD0_t ...
    // Modulation Bit 0
    obj.MOD1 = BCSplus.MOD1_t ...
    // Modulation Bit 1
    obj.MOD2 = BCSplus.MOD2_t ...
    // Modulation Bit 2
    obj.MOD3 = BCSplus.MOD3_t ...
    // Modulation Bit 3
    obj.MOD4 = BCSplus.MOD4_t ...
    // Modulation Bit 4
    obj.DCO0 = BCSplus.DCO0_t ...
    // DCO Select Bit 0
    obj.DCO1 = BCSplus.DCO1_t ...
    // DCO Select Bit 1
    obj.DCO2 = BCSplus.DCO2_t ...
    // DCO Select Bit 2
struct BCSplus.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new BCSplus.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
BCSplus.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
BCSplus.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
BCSplus.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
BCSplus.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new BCSplus.Params;
// Instance config-params object
    params.ACLKHz = Float undefined;
    // ACLK frequency in Hertz
    params.BCSCTL1 = BCSplus.BCSCTL1_t {
    // Basic Clock System Control 1
        XT2OFF: BCSplus.XT2OFF,
        XTS: BCSplus.XTS_OFF,
        DIVA: BCSplus.DIVA_0,
        RSEL0: BCSplus.RSEL0,
        RSEL1: BCSplus.RSEL1,
        RSEL2: BCSplus.RSEL2,
        RSEL3: BCSplus.RSEL3_OFF
    };
    params.BCSCTL2 = BCSplus.BCSCTL2_t {
    // Basic Clock System Control 2
        SELM: BCSplus.SELM_0,
        DIVM: BCSplus.DIVM_0,
        SELS: BCSplus.SELS_OFF,
        DIVS: BCSplus.DIVS_0,
        DCOR: BCSplus.DCOR_OFF
    };
    params.BCSCTL3 = BCSplus.BCSCTL3_t {
    // Basic Clock System Control 3
        XT2S: BCSplus.XT2S_0,
        LFXT1S: BCSplus.LFXT1S_0,
        XCAP: BCSplus.XCAP_1
    };
    params.DCOCLKHz = Float 1000000;
    // DCO clock frequency in Hertz
    params.DCOCTL = BCSplus.DCOCTL_t {
    // DCO Clock Frequency Control
        MOD0: BCSplus.MOD0_OFF,
        MOD1: BCSplus.MOD1_OFF,
        MOD2: BCSplus.MOD2_OFF,
        MOD3: BCSplus.MOD3_OFF,
        MOD4: BCSplus.MOD4_OFF,
        DCO0: BCSplus.DCO0,
        DCO1: BCSplus.DCO1,
        DCO2: BCSplus.DCO2_OFF
    };
    params.LFXT1CLKHz = Float 0;
    //
    params.MCLKHz = Float undefined;
    // MCLK frequency in Hertz
    params.SMCLKHz = Float undefined;
    // SMCLK frequency in Hertz
    params.VLOCLKHz = Float 12000;
    //
    params.WATCHCRYSTALCLKHz = Float 32768;
    //
    params.XT2CLKHz = Float 0;
    //
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.enableXT2 = Bool false;
    // Set whether XT2 is used on the device. This is different than hasXT2 variable
    params.forceSetDefaultRegister = BCSplus.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "DCOCTL",
            regForceSet: false
        },
        {
            register: "BCSCTL1",
            regForceSet: false
        },
        {
            register: "BCSCTL2",
            regForceSet: false
        },
        {
            register: "BCSCTL3",
            regForceSet: false
        }
    ];
    params.hasAllCal = Bool false;
    // Specify if device has all calibration constants
    params.hasHFXT1 = Bool false;
    // Specify if HFXT1 is available on the device
    params.hasRosc = Bool false;
    // Specify if Rosc is available on the device
    params.hasVLO = Bool false;
    // Specify if VLO is available on the device
    params.hasXT2 = Bool false;
    // Specify if XT2 is available on the device
    params.maxCpuFrequency = Float 0;
    // Maximum CPU frequency in Hertz
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
    params.preCalibratedValues = UInt 0;
    // Basic Clock System + pre-calibrated system frequency
    params.preCalibratedValuesItems = String[length] undefined;
    // hasAllCal = false UInt - Description 0 - 1 MHz 1 - Custom
config BCSplus.Params.ACLKHz // instance
index URL

ACLK frequency in Hertz

Configuration settings
var params = new BCSplus.Params;
...
const params.ACLKHz = Float computed value;
config BCSplus.Params.BCSCTL1 // instance
index URL

Basic Clock System Control 1

Configuration settings
var params = new BCSplus.Params;
...
params.BCSCTL1 = BCSplus.BCSCTL1_t {
    XT2OFF: BCSplus.XT2OFF,
    XTS: BCSplus.XTS_OFF,
    DIVA: BCSplus.DIVA_0,
    RSEL0: BCSplus.RSEL0,
    RSEL1: BCSplus.RSEL1,
    RSEL2: BCSplus.RSEL2,
    RSEL3: BCSplus.RSEL3_OFF
};
config BCSplus.Params.BCSCTL2 // instance
index URL

Basic Clock System Control 2

Configuration settings
var params = new BCSplus.Params;
...
params.BCSCTL2 = BCSplus.BCSCTL2_t {
    SELM: BCSplus.SELM_0,
    DIVM: BCSplus.DIVM_0,
    SELS: BCSplus.SELS_OFF,
    DIVS: BCSplus.DIVS_0,
    DCOR: BCSplus.DCOR_OFF
};
config BCSplus.Params.BCSCTL3 // instance
index URL

Basic Clock System Control 3

Configuration settings
var params = new BCSplus.Params;
...
params.BCSCTL3 = BCSplus.BCSCTL3_t {
    XT2S: BCSplus.XT2S_0,
    LFXT1S: BCSplus.LFXT1S_0,
    XCAP: BCSplus.XCAP_1
};
config BCSplus.Params.DCOCLKHz // instance
index URL

DCO clock frequency in Hertz

Configuration settings
var params = new BCSplus.Params;
...
const params.DCOCLKHz = Float 1000000;
config BCSplus.Params.DCOCTL // instance
index URL

DCO Clock Frequency Control

Configuration settings
var params = new BCSplus.Params;
...
params.DCOCTL = BCSplus.DCOCTL_t {
    MOD0: BCSplus.MOD0_OFF,
    MOD1: BCSplus.MOD1_OFF,
    MOD2: BCSplus.MOD2_OFF,
    MOD3: BCSplus.MOD3_OFF,
    MOD4: BCSplus.MOD4_OFF,
    DCO0: BCSplus.DCO0,
    DCO1: BCSplus.DCO1,
    DCO2: BCSplus.DCO2_OFF
};
config BCSplus.Params.LFXT1CLKHz // instance
index URL
Configuration settings
var params = new BCSplus.Params;
...
params.LFXT1CLKHz = Float 0;
config BCSplus.Params.MCLKHz // instance
index URL

MCLK frequency in Hertz

Configuration settings
var params = new BCSplus.Params;
...
const params.MCLKHz = Float computed value;
config BCSplus.Params.SMCLKHz // instance
index URL

SMCLK frequency in Hertz

Configuration settings
var params = new BCSplus.Params;
...
const params.SMCLKHz = Float computed value;
config BCSplus.Params.VLOCLKHz // instance
index URL
Configuration settings
var params = new BCSplus.Params;
...
params.VLOCLKHz = Float 12000;
config BCSplus.Params.WATCHCRYSTALCLKHz // instance
index URL
Configuration settings
var params = new BCSplus.Params;
...
params.WATCHCRYSTALCLKHz = Float 32768;
config BCSplus.Params.XT2CLKHz // instance
index URL
Configuration settings
var params = new BCSplus.Params;
...
params.XT2CLKHz = Float 0;
config BCSplus.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new BCSplus.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config BCSplus.Params.enableXT2 // instance
index URL

Set whether XT2 is used on the device. This is different than hasXT2 variable

Configuration settings
var params = new BCSplus.Params;
...
params.enableXT2 = Bool false;
config BCSplus.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new BCSplus.Params;
...
const params.forceSetDefaultRegister = BCSplus.ForceSetDefaultRegister_t[] [
    {
        register: "DCOCTL",
        regForceSet: false
    },
    {
        register: "BCSCTL1",
        regForceSet: false
    },
    {
        register: "BCSCTL2",
        regForceSet: false
    },
    {
        register: "BCSCTL3",
        regForceSet: false
    }
];
config BCSplus.Params.hasAllCal // instance
index URL

Specify if device has all calibration constants

Configuration settings
var params = new BCSplus.Params;
...
params.hasAllCal = Bool false;
DETAILS
G1 devices do not.
config BCSplus.Params.hasHFXT1 // instance
index URL

Specify if HFXT1 is available on the device

Configuration settings
var params = new BCSplus.Params;
...
params.hasHFXT1 = Bool false;
DETAILS
Not all devices have high frequency clock. This specifies if it is available for a particular device.
config BCSplus.Params.hasRosc // instance
index URL

Specify if Rosc is available on the device

Configuration settings
var params = new BCSplus.Params;
...
params.hasRosc = Bool false;
DETAILS
Not all devices have Rosc circuitry. This specifies if it is available for a particular device.
config BCSplus.Params.hasVLO // instance
index URL

Specify if VLO is available on the device

Configuration settings
var params = new BCSplus.Params;
...
params.hasVLO = Bool false;
DETAILS
Not all devices have very low frequency clock VLO. This specifies if it is available for a particular device.
config BCSplus.Params.hasXT2 // instance
index URL

Specify if XT2 is available on the device

Configuration settings
var params = new BCSplus.Params;
...
params.hasXT2 = Bool false;
DETAILS
Not all devices have XT2 clock available. This specifies if it is available for a particular device.
config BCSplus.Params.maxCpuFrequency // instance
index URL

Maximum CPU frequency in Hertz

Configuration settings
var params = new BCSplus.Params;
...
params.maxCpuFrequency = Float 0;
config BCSplus.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new BCSplus.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config BCSplus.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new BCSplus.Params;
...
params.owner = String undefined;
config BCSplus.Params.preCalibratedValues // instance
index URL

Basic Clock System + pre-calibrated system frequency

Configuration settings
var params = new BCSplus.Params;
...
params.preCalibratedValues = UInt 0;
config BCSplus.Params.preCalibratedValuesItems // instance
index URL

hasAllCal = false UInt - Description 0 - 1 MHz 1 - Custom

Configuration settings
var params = new BCSplus.Params;
...
params.preCalibratedValuesItems = String[length] undefined;
DETAILS
hasAllCal = true UInt - Description 0 - 1 MHz 1 - 8 MHz 2 - 12 MHz 3 - 16 MHz 4 - Custom
BCSplus.computeDCOCLKHz() // instance
index URL

Initialize to the nearest available DCO clock frequency

Configuration settings
inst.computeDCOCLKHz(Float DCOCLKHz) returns Void
generated on Sun, 25 Nov 2018 22:20:00 GMT


module ti.catalog.msp430.peripherals.clock.CS

metaonly module ti.catalog.msp430.peripherals.clock.CS
index URL

MSP430 Clock System

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/clock/CS.xdc
var CS = xdc.useModule('ti.catalog.msp430.peripherals.clock.CS');
module-wide constants & types
    var obj = new CS.AvailableClockVariations_t// Available variations of clock in a device;
        obj.clockType = String ...
        obj.hasClock = Bool ...
    var obj = new CS.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     CS.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     CS.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new CS.Params// Instance config-params object;
        params.ACLKHz// ACLK frequency in Hertz = Float undefined;
        params.DCOCLKHz// DCO clock frequency in Hertz = Float 1000000;
        params.MCLKHz// MCLK frequency in Hertz = Float undefined;
        params.SMCLKHz// SMCLK frequency in Hertz = Float undefined;
        params.VLOCLKHz// = Float 8300;
        params.WATCHCRYSTALCLKHz// = Float 32768;
        params.XT1CLKHz// = Float 0;
        params.XT2CLKHz// = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.hasAllCal// Specify if device has all calibration constants = Bool false;
        params.hasHFXT1// Specify if HFXT1 is available on the device = Bool false;
        params.hasRosc// Specify if Rosc is available on the device = Bool false;
        params.hasVLO// Specify if VLO is available on the device = Bool false;
        params.hasXT2// Specify if XT2 is available on the device = Bool false;
        params.maxCpuFrequency// Maximum CPU frequency in Hertz = Float 0;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance functions
     inst.computeDCOCLKHz// Initialize to the nearest available DCO clock frequency(Float DCOCLKHz) returns Void
struct CS.AvailableClockVariations_t
index URL

Available variations of clock in a device

Configuration settings
var obj = new CS.AvailableClockVariations_t;
    obj.clockType = String ...
    obj.hasClock = Bool ...
DETAILS
Stores true/false if any of the clock variations are available.
SEE
AvailableClockVariations_t
struct CS.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new CS.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
CS.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
CS.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
CS.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
CS.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new CS.Params;
// Instance config-params object
    params.ACLKHz = Float undefined;
    // ACLK frequency in Hertz
    params.DCOCLKHz = Float 1000000;
    // DCO clock frequency in Hertz
    params.MCLKHz = Float undefined;
    // MCLK frequency in Hertz
    params.SMCLKHz = Float undefined;
    // SMCLK frequency in Hertz
    params.VLOCLKHz = Float 8300;
    //
    params.WATCHCRYSTALCLKHz = Float 32768;
    //
    params.XT1CLKHz = Float 0;
    //
    params.XT2CLKHz = Float 0;
    //
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.hasAllCal = Bool false;
    // Specify if device has all calibration constants
    params.hasHFXT1 = Bool false;
    // Specify if HFXT1 is available on the device
    params.hasRosc = Bool false;
    // Specify if Rosc is available on the device
    params.hasVLO = Bool false;
    // Specify if VLO is available on the device
    params.hasXT2 = Bool false;
    // Specify if XT2 is available on the device
    params.maxCpuFrequency = Float 0;
    // Maximum CPU frequency in Hertz
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config CS.Params.ACLKHz // instance
index URL

ACLK frequency in Hertz

Configuration settings
var params = new CS.Params;
...
const params.ACLKHz = Float computed value;
config CS.Params.DCOCLKHz // instance
index URL

DCO clock frequency in Hertz

Configuration settings
var params = new CS.Params;
...
const params.DCOCLKHz = Float 1000000;
config CS.Params.MCLKHz // instance
index URL

MCLK frequency in Hertz

Configuration settings
var params = new CS.Params;
...
const params.MCLKHz = Float computed value;
config CS.Params.SMCLKHz // instance
index URL

SMCLK frequency in Hertz

Configuration settings
var params = new CS.Params;
...
const params.SMCLKHz = Float computed value;
config CS.Params.VLOCLKHz // instance
index URL
Configuration settings
var params = new CS.Params;
...
params.VLOCLKHz = Float 8300;
config CS.Params.WATCHCRYSTALCLKHz // instance
index URL
Configuration settings
var params = new CS.Params;
...
params.WATCHCRYSTALCLKHz = Float 32768;
config CS.Params.XT1CLKHz // instance
index URL
Configuration settings
var params = new CS.Params;
...
params.XT1CLKHz = Float 0;
config CS.Params.XT2CLKHz // instance
index URL
Configuration settings
var params = new CS.Params;
...
params.XT2CLKHz = Float 0;
config CS.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new CS.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config CS.Params.hasAllCal // instance
index URL

Specify if device has all calibration constants

Configuration settings
var params = new CS.Params;
...
params.hasAllCal = Bool false;
DETAILS
G1 devices do not.
config CS.Params.hasHFXT1 // instance
index URL

Specify if HFXT1 is available on the device

Configuration settings
var params = new CS.Params;
...
params.hasHFXT1 = Bool false;
DETAILS
Not all devices have high frequency clock. This specifies if it is available for a particular device.
config CS.Params.hasRosc // instance
index URL

Specify if Rosc is available on the device

Configuration settings
var params = new CS.Params;
...
params.hasRosc = Bool false;
DETAILS
Not all devices have Rosc circuitry. This specifies if it is available for a particular device.
config CS.Params.hasVLO // instance
index URL

Specify if VLO is available on the device

Configuration settings
var params = new CS.Params;
...
params.hasVLO = Bool false;
DETAILS
Not all devices have very low frequency clock VLO. This specifies if it is available for a particular device.
config CS.Params.hasXT2 // instance
index URL

Specify if XT2 is available on the device

Configuration settings
var params = new CS.Params;
...
params.hasXT2 = Bool false;
DETAILS
Not all devices have XT2 clock available. This specifies if it is available for a particular device.
config CS.Params.maxCpuFrequency // instance
index URL

Maximum CPU frequency in Hertz

Configuration settings
var params = new CS.Params;
...
params.maxCpuFrequency = Float 0;
config CS.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new CS.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config CS.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new CS.Params;
...
params.owner = String undefined;
CS.computeDCOCLKHz() // instance
index URL

Initialize to the nearest available DCO clock frequency

Configuration settings
inst.computeDCOCLKHz(Float DCOCLKHz) returns Void
generated on Sun, 25 Nov 2018 22:20:00 GMT


module ti.catalog.msp430.peripherals.clock.CS_A

metaonly module ti.catalog.msp430.peripherals.clock.CS_A
index URL

MSP430 Clock System

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/clock/CS_A.xdc
var CS_A = xdc.useModule('ti.catalog.msp430.peripherals.clock.CS_A');
module-wide constants & types
    var obj = new CS_A.AvailableClockVariations_t// Available variations of clock in a device;
        obj.clockType = String ...
        obj.hasClock = Bool ...
    var obj = new CS_A.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     CS_A.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     CS_A.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new CS_A.Params// Instance config-params object;
        params.ACLKHz// ACLK frequency in Hertz = Float undefined;
        params.DCOCLKHz// DCO clock frequency in Hertz = Float 1000000;
        params.LFMODOSCHz// = Float 39000;
        params.MCLKHz// MCLK frequency in Hertz = Float undefined;
        params.MODOSCHz// = Float 5000000;
        params.SMCLKHz// SMCLK frequency in Hertz = Float undefined;
        params.VLOCLKHz// = Float 9400;
        params.WATCHCRYSTALCLKHz// = Float 32768;
        params.XT1CLKHz// = Float 0;
        params.XT2CLKHz// = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.hasAllCal// Specify if device has all calibration constants = Bool false;
        params.hasHFXT1// Specify if HFXT1 is available on the device = Bool false;
        params.hasLFXT1// Specify if LFXT1 is available on the device = Bool false;
        params.hasRosc// Specify if Rosc is available on the device = Bool false;
        params.hasVLO// Specify if VLO is available on the device = Bool false;
        params.hasXT2// Specify if XT2 is available on the device = Bool false;
        params.maxCpuFrequency// Maximum CPU frequency in Hertz = Float 0;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance functions
     inst.computeDCOCLKHz// Initialize to the nearest available DCO clock frequency(Float DCOCLKHz) returns Void
struct CS_A.AvailableClockVariations_t
index URL

Available variations of clock in a device

Configuration settings
var obj = new CS_A.AvailableClockVariations_t;
    obj.clockType = String ...
    obj.hasClock = Bool ...
DETAILS
Stores true/false if any of the clock variations are available.
SEE
AvailableClockVariations_t
struct CS_A.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new CS_A.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
CS_A.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
CS_A.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
CS_A.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
CS_A.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new CS_A.Params;
// Instance config-params object
    params.ACLKHz = Float undefined;
    // ACLK frequency in Hertz
    params.DCOCLKHz = Float 1000000;
    // DCO clock frequency in Hertz
    params.LFMODOSCHz = Float 39000;
    //
    params.MCLKHz = Float undefined;
    // MCLK frequency in Hertz
    params.MODOSCHz = Float 5000000;
    //
    params.SMCLKHz = Float undefined;
    // SMCLK frequency in Hertz
    params.VLOCLKHz = Float 9400;
    //
    params.WATCHCRYSTALCLKHz = Float 32768;
    //
    params.XT1CLKHz = Float 0;
    //
    params.XT2CLKHz = Float 0;
    //
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.hasAllCal = Bool false;
    // Specify if device has all calibration constants
    params.hasHFXT1 = Bool false;
    // Specify if HFXT1 is available on the device
    params.hasLFXT1 = Bool false;
    // Specify if LFXT1 is available on the device
    params.hasRosc = Bool false;
    // Specify if Rosc is available on the device
    params.hasVLO = Bool false;
    // Specify if VLO is available on the device
    params.hasXT2 = Bool false;
    // Specify if XT2 is available on the device
    params.maxCpuFrequency = Float 0;
    // Maximum CPU frequency in Hertz
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config CS_A.Params.ACLKHz // instance
index URL

ACLK frequency in Hertz

Configuration settings
var params = new CS_A.Params;
...
const params.ACLKHz = Float computed value;
config CS_A.Params.DCOCLKHz // instance
index URL

DCO clock frequency in Hertz

Configuration settings
var params = new CS_A.Params;
...
const params.DCOCLKHz = Float 1000000;
config CS_A.Params.LFMODOSCHz // instance
index URL
Configuration settings
var params = new CS_A.Params;
...
params.LFMODOSCHz = Float 39000;
config CS_A.Params.MCLKHz // instance
index URL

MCLK frequency in Hertz

Configuration settings
var params = new CS_A.Params;
...
const params.MCLKHz = Float computed value;
config CS_A.Params.MODOSCHz // instance
index URL
Configuration settings
var params = new CS_A.Params;
...
params.MODOSCHz = Float 5000000;
config CS_A.Params.SMCLKHz // instance
index URL

SMCLK frequency in Hertz

Configuration settings
var params = new CS_A.Params;
...
const params.SMCLKHz = Float computed value;
config CS_A.Params.VLOCLKHz // instance
index URL
Configuration settings
var params = new CS_A.Params;
...
params.VLOCLKHz = Float 9400;
config CS_A.Params.WATCHCRYSTALCLKHz // instance
index URL
Configuration settings
var params = new CS_A.Params;
...
params.WATCHCRYSTALCLKHz = Float 32768;
config CS_A.Params.XT1CLKHz // instance
index URL
Configuration settings
var params = new CS_A.Params;
...
params.XT1CLKHz = Float 0;
config CS_A.Params.XT2CLKHz // instance
index URL
Configuration settings
var params = new CS_A.Params;
...
params.XT2CLKHz = Float 0;
config CS_A.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new CS_A.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config CS_A.Params.hasAllCal // instance
index URL

Specify if device has all calibration constants

Configuration settings
var params = new CS_A.Params;
...
params.hasAllCal = Bool false;
DETAILS
G1 devices do not.
config CS_A.Params.hasHFXT1 // instance
index URL

Specify if HFXT1 is available on the device

Configuration settings
var params = new CS_A.Params;
...
params.hasHFXT1 = Bool false;
DETAILS
Not all devices have high frequency clock. This specifies if it is available for a particular device.
config CS_A.Params.hasLFXT1 // instance
index URL

Specify if LFXT1 is available on the device

Configuration settings
var params = new CS_A.Params;
...
params.hasLFXT1 = Bool false;
DETAILS
Not all devices have low frequency clock. This specifies if it is available for a particular device.
config CS_A.Params.hasRosc // instance
index URL

Specify if Rosc is available on the device

Configuration settings
var params = new CS_A.Params;
...
params.hasRosc = Bool false;
DETAILS
Not all devices have Rosc circuitry. This specifies if it is available for a particular device.
config CS_A.Params.hasVLO // instance
index URL

Specify if VLO is available on the device

Configuration settings
var params = new CS_A.Params;
...
params.hasVLO = Bool false;
DETAILS
Not all devices have very low frequency clock VLO. This specifies if it is available for a particular device.
config CS_A.Params.hasXT2 // instance
index URL

Specify if XT2 is available on the device

Configuration settings
var params = new CS_A.Params;
...
params.hasXT2 = Bool false;
DETAILS
Not all devices have XT2 clock available. This specifies if it is available for a particular device.
config CS_A.Params.maxCpuFrequency // instance
index URL

Maximum CPU frequency in Hertz

Configuration settings
var params = new CS_A.Params;
...
params.maxCpuFrequency = Float 0;
config CS_A.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new CS_A.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config CS_A.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new CS_A.Params;
...
params.owner = String undefined;
CS_A.computeDCOCLKHz() // instance
index URL

Initialize to the nearest available DCO clock frequency

Configuration settings
inst.computeDCOCLKHz(Float DCOCLKHz) returns Void
generated on Sun, 25 Nov 2018 22:20:00 GMT


interface ti.catalog.msp430.peripherals.clock.IClock

metaonly interface ti.catalog.msp430.peripherals.clock.IClock
index URL

MSP430 Master Clock

XDCspec summary sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
metaonly interface IClock { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
package ti.catalog.msp430.peripherals.clock;
metaonly interface IClock inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct AvailableClockVariations_t// Available variations of clock in a device {
        String clockType;
        Bool hasClock;
    };
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    readonly config Float ACLKHz// ACLK frequency in Hertz;
    readonly config Float DCOCLKHz// DCO clock frequency in Hertz = 1000000;
    readonly config Float MCLKHz// MCLK frequency in Hertz;
    readonly config Float SMCLKHz// SMCLK frequency in Hertz;
    config UInt baseAddr// Address of the peripheral's control register;
    config Bool hasAllCal// Specify if device has all calibration constants = false;
    config Bool hasHFXT1// Specify if HFXT1 is available on the device = false;
    config Bool hasRosc// Specify if Rosc is available on the device = false;
    config Bool hasVLO// Specify if VLO is available on the device = false;
    config Bool hasXT2// Specify if XT2 is available on the device = false;
    config Float maxCpuFrequency// Maximum CPU frequency in Hertz = 0;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Void computeDCOCLKHz// Initialize to the nearest available DCO clock frequency(Float DCOCLKHz);
}
typedef IClock.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IClock.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
typedef String StringArray[];
struct IClock.AvailableClockVariations_t
index URL

Available variations of clock in a device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
metaonly struct AvailableClockVariations_t {
    String clockType;
    Bool hasClock;
};
DETAILS
Stores true/false if any of the clock variations are available.
SEE
AvailableClockVariations_t
struct IClock.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
IClock.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IClock.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IClock.Params.ACLKHz // instance
index URL

ACLK frequency in Hertz

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
readonly config Float ACLKHz;
config IClock.Params.DCOCLKHz // instance
index URL

DCO clock frequency in Hertz

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
readonly config Float DCOCLKHz = 1000000;
config IClock.Params.MCLKHz // instance
index URL

MCLK frequency in Hertz

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
readonly config Float MCLKHz;
config IClock.Params.SMCLKHz // instance
index URL

SMCLK frequency in Hertz

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
readonly config Float SMCLKHz;
config IClock.Params.baseAddr // instance
index URL

Address of the peripheral's control register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config UInt baseAddr;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config IClock.Params.hasAllCal // instance
index URL

Specify if device has all calibration constants

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config Bool hasAllCal = false;
DETAILS
G1 devices do not.
config IClock.Params.hasHFXT1 // instance
index URL

Specify if HFXT1 is available on the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config Bool hasHFXT1 = false;
DETAILS
Not all devices have high frequency clock. This specifies if it is available for a particular device.
config IClock.Params.hasRosc // instance
index URL

Specify if Rosc is available on the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config Bool hasRosc = false;
DETAILS
Not all devices have Rosc circuitry. This specifies if it is available for a particular device.
config IClock.Params.hasVLO // instance
index URL

Specify if VLO is available on the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config Bool hasVLO = false;
DETAILS
Not all devices have very low frequency clock VLO. This specifies if it is available for a particular device.
config IClock.Params.hasXT2 // instance
index URL

Specify if XT2 is available on the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config Bool hasXT2 = false;
DETAILS
Not all devices have XT2 clock available. This specifies if it is available for a particular device.
config IClock.Params.maxCpuFrequency // instance
index URL

Maximum CPU frequency in Hertz

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config Float maxCpuFrequency = 0;
config IClock.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IClock.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
config String owner;
IClock.computeDCOCLKHz() // instance
index URL

Initialize to the nearest available DCO clock frequency

XDCspec declarations sourced in ti/catalog/msp430/peripherals/clock/IClock.xdc
Void computeDCOCLKHz(Float DCOCLKHz);
generated on Sun, 25 Nov 2018 22:20:00 GMT


module ti.catalog.msp430.peripherals.clock.UCS

metaonly module ti.catalog.msp430.peripherals.clock.UCS
index URL

MSP430 Unified Clock System

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/clock/UCS.xdc
var UCS = xdc.useModule('ti.catalog.msp430.peripherals.clock.UCS');
module-wide constants & types
    values of type UCS.ACLKREQEN_t// ACLK clock request enable
        const UCS.ACLKREQEN_OFF// ACLK conditional requests are disabled;
        const UCS.ACLKREQEN// ACLK conditional requests are enabled;
    values of type UCS.DCO0_t// DCO0 Bit
        const UCS.DCO0_OFF// Disable DCO0 bit;
        const UCS.DCO0// Enable DCO0 bit;
    values of type UCS.DCO1_t// DCO1 Bit
        const UCS.DCO1_OFF// Disable DCO1 bit;
        const UCS.DCO1// Enable DCO1 bit;
    values of type UCS.DCO2_t// DCO2 Bit
        const UCS.DCO2_OFF// Disable DCO2 bit;
        const UCS.DCO2// Enable DCO2 bit;
    values of type UCS.DCO3_t// DCO3 Bit
        const UCS.DCO3_OFF// Disable DCO3 bit;
        const UCS.DCO3// Enable DCO3 bit;
    values of type UCS.DCO4_t// DCO4 Bit
        const UCS.DCO4_OFF// Disable DCO4 bit;
        const UCS.DCO4// Enable DCO4 bit;
    values of type UCS.DCOFFG_t// DCO fault flag
        const UCS.DCOFFG_OFF// No fault condition present;
        const UCS.DCOFFG// DCO fault condition present;
    values of type UCS.DCORSEL_t// DCO frequency range select
        const UCS.DCORSEL_0// DCORSEL_0;
        const UCS.DCORSEL_1// DCORSEL_1;
        const UCS.DCORSEL_2// DCORSEL_2;
        const UCS.DCORSEL_3// DCORSEL_3;
        const UCS.DCORSEL_4// DCORSEL_4;
        const UCS.DCORSEL_5// DCORSEL_5;
        const UCS.DCORSEL_6// DCORSEL_6;
        const UCS.DCORSEL_7// DCORSEL_7;
    values of type UCS.DISMOD_t// DISMOD Bit
        const UCS.DISMOD_OFF// Modulation enabled;
        const UCS.DISMOD// Modulation disabled;
    values of type UCS.DIVA_t// ACLK source divider
        const UCS.DIVA_0// Divide by 1;
        const UCS.DIVA_1// Divide by 2;
        const UCS.DIVA_2// Divide by 4;
        const UCS.DIVA_3// Divide by 8;
        const UCS.DIVA_4// Divide by 16;
        const UCS.DIVA_5// Divide by 32;
        const UCS.DIVA_6// Reserved;
        const UCS.DIVA_7// Reserved;
    values of type UCS.DIVM_t// MCLK source divider
        const UCS.DIVM_0// Divide by 1;
        const UCS.DIVM_1// Divide by 2;
        const UCS.DIVM_2// Divide by 4;
        const UCS.DIVM_3// Divide by 8;
        const UCS.DIVM_4// Divide by 16;
        const UCS.DIVM_5// Divide by 32;
        const UCS.DIVM_6// Reserved;
        const UCS.DIVM_7// Reserved;
    values of type UCS.DIVPA_t// ACLK source divider available at external pin
        const UCS.DIVPA_0// Divide by 1;
        const UCS.DIVPA_1// Divide by 2;
        const UCS.DIVPA_2// Divide by 4;
        const UCS.DIVPA_3// Divide by 8;
        const UCS.DIVPA_4// Divide by 16;
        const UCS.DIVPA_5// Divide by 32;
        const UCS.DIVPA_6// Reserved;
        const UCS.DIVPA_7// Reserved;
    values of type UCS.DIVS_t// SMCLK source divider
        const UCS.DIVS_0// Divide by 1;
        const UCS.DIVS_1// Divide by 2;
        const UCS.DIVS_2// Divide by 4;
        const UCS.DIVS_3// Divide by 8;
        const UCS.DIVS_4// Divide by 16;
        const UCS.DIVS_5// Divide by 32;
        const UCS.DIVS_6// Reserved;
        const UCS.DIVS_7// Reserved;
    values of type UCS.FLLD_t// FLL Loop Divider
        const UCS.FLLD_0// Multiply Selected Loop Freq. 1;
        const UCS.FLLD_1// Multiply Selected Loop Freq. 2;
        const UCS.FLLD_2// Multiply Selected Loop Freq. 4;
        const UCS.FLLD_3// Multiply Selected Loop Freq. 8;
        const UCS.FLLD_4// Multiply Selected Loop Freq. 16;
        const UCS.FLLD_5// Multiply Selected Loop Freq. 32;
        const UCS.FLLD_6// Multiply Selected Loop Freq. 32;
        const UCS.FLLD_7// Multiply Selected Loop Freq. 32;
    values of type UCS.FLLN0_t// FLL Multiplier Bit 0
        const UCS.FLLN0_OFF// Disable FLLN bit 0;
        const UCS.FLLN0// Enable FLLN bit 0;
    values of type UCS.FLLN1_t// FLL Multiplier Bit 1
        const UCS.FLLN1_OFF// Disable FLLN bit 1;
        const UCS.FLLN1// Enable FLLN bit 1;
    values of type UCS.FLLN2_t// FLL Multiplier Bit 2
        const UCS.FLLN2_OFF// Disable FLLN bit 2;
        const UCS.FLLN2// Enable FLLN bit 2;
    values of type UCS.FLLN3_t// FLL Multiplier Bit 3
        const UCS.FLLN3_OFF// Disable FLLN bit 3;
        const UCS.FLLN3// Enable FLLN bit 3;
    values of type UCS.FLLN4_t// FLL Multiplier Bit 4
        const UCS.FLLN4_OFF// Disable FLLN bit 4;
        const UCS.FLLN4// Enable FLLN bit 4;
    values of type UCS.FLLN5_t// FLL Multiplier Bit 5
        const UCS.FLLN5_OFF// Disable FLLN bit 5;
        const UCS.FLLN5// Enable FLLN bit 5;
    values of type UCS.FLLN6_t// FLL Multiplier Bit 6
        const UCS.FLLN6_OFF// Disable FLLN bit 6;
        const UCS.FLLN6// Enable FLLN bit 6;
    values of type UCS.FLLN7_t// FLL Multiplier Bit 7
        const UCS.FLLN7_OFF// Disable FLLN bit 7;
        const UCS.FLLN7// Enable FLLN bit 7;
    values of type UCS.FLLN8_t// FLL Multiplier Bit 8
        const UCS.FLLN8_OFF// Disable FLLN bit 8;
        const UCS.FLLN8// Enable FLLN bit 8;
    values of type UCS.FLLN9_t// FLL Multiplier Bit 9
        const UCS.FLLN9_OFF// Disable FLLN bit 9;
        const UCS.FLLN9// Enable FLLN bit 9;
    values of type UCS.FLLREFDIV_t// FLL Reference Divider
        const UCS.FLLREFDIV_0// f(FLLREFCLK) / 1;
        const UCS.FLLREFDIV_1// f(FLLREFCLK) / 2;
        const UCS.FLLREFDIV_2// f(FLLREFCLK) / 4;
        const UCS.FLLREFDIV_3// f(FLLREFCLK) / 8;
        const UCS.FLLREFDIV_4// f(FLLREFCLK) / 12;
        const UCS.FLLREFDIV_5// f(FLLREFCLK) / 16;
        const UCS.FLLREFDIV_6// Reserved;
        const UCS.FLLREFDIV_7// Reserved;
    values of type UCS.MCLKREQEN_t// MCLK clock request enable
        const UCS.MCLKREQEN_OFF// MCLK conditional requests are disabled;
        const UCS.MCLKREQEN// MCLK conditional requests are enabled;
    values of type UCS.MOD0_t// MOD0 Bit
        const UCS.MOD0_OFF// Disable MOD0 bit;
        const UCS.MOD0// Enable MOD0 bit;
    values of type UCS.MOD1_t// MOD1 Bit
        const UCS.MOD1_OFF// Disable MOD1 bit;
        const UCS.MOD1// Enable MOD1 bit;
    values of type UCS.MOD2_t// MOD2 Bit
        const UCS.MOD2_OFF// Disable MOD2 bit;
        const UCS.MOD2// Enable MOD2 bit;
    values of type UCS.MOD3_t// MOD3 Bit
        const UCS.MOD3_OFF// Disable MOD3 bit;
        const UCS.MOD3// Enable MOD3 bit;
    values of type UCS.MOD4_t// MOD4 Bit
        const UCS.MOD4_OFF// Disable MOD4 bit;
        const UCS.MOD4// Enable MOD4 bit;
    values of type UCS.MODOSCREQEN_t// MODOSC clock request enable
        const UCS.MODOSCREQEN_OFF// MODOSC conditional requests are disabled;
        const UCS.MODOSCREQEN// MODOSC conditional requests are enabled;
    values of type UCS.SELA_t// Select the ACLK source
        const UCS.SELA_0// XT1CLK;
        const UCS.SELA_1// VLOCLK;
        const UCS.SELA_2// REFOCLK;
        const UCS.SELA_3// DCOCLK;
        const UCS.SELA_4// DCOCLKDIV;
        const UCS.SELA_5// XT2CLK;
        const UCS.SELA_6// Reserved;
        const UCS.SELA_7// Reserved;
    values of type UCS.SELM_t// Select the MCLK source
        const UCS.SELM_0// XT1CLK;
        const UCS.SELM_1// VLOCLK;
        const UCS.SELM_2// REFOCLK;
        const UCS.SELM_3// DCOCLK;
        const UCS.SELM_4// DCOCLKDIV;
        const UCS.SELM_5// XT2CLK;
        const UCS.SELM_6// Reserved;
        const UCS.SELM_7// Reserved;
    values of type UCS.SELREF_t// FLL Reference Select
        const UCS.SELREF_0// FLL Reference by XT1CLK;
        const UCS.SELREF_1// Reserved;
        const UCS.SELREF_2// FLL Reference by REFOCLK;
        const UCS.SELREF_3// Reserved;
        const UCS.SELREF_4// Reserved;
        const UCS.SELREF_5// FLL Reference by XT2CLK;
        const UCS.SELREF_6// Reserved;
        const UCS.SELREF_7// Reserved;
    values of type UCS.SELS_t// Select the SMCLK source
        const UCS.SELS_0// XT1CLK;
        const UCS.SELS_1// VLOCLK;
        const UCS.SELS_2// REFOCLK;
        const UCS.SELS_3// DCOCLK;
        const UCS.SELS_4// DCOCLKDIV;
        const UCS.SELS_5// XT2CLK;
        const UCS.SELS_6// Reserved;
        const UCS.SELS_7// Reserved;
    values of type UCS.SMCLKOFF_t// SMCLK off
        const UCS.SMCLKOFF_OFF// SMCLK on;
        const UCS.SMCLKOFF// SMCLK off;
    values of type UCS.SMCLKREQEN_t// SMCLK clock request enable
        const UCS.SMCLKREQEN_OFF// SMCLK conditional requests are disabled;
        const UCS.SMCLKREQEN// SMCLK conditional requests are enabled;
    values of type UCS.UCS_CLK_SOURCE_t// Select the clock source
        const UCS.UCS_XT1CLK_SELECT// XT1CLK;
        const UCS.UCS_VLOCLK_SELECT// VLOCLK;
        const UCS.UCS_REFOCLK_SELECT// REFOCLK;
        const UCS.UCS_DCOCLK_SELECT// DCOCLK;
        const UCS.UCS_DCOCLKDIV_SELECT// DCOCLKDIV;
        const UCS.UCS_XT2CLK_SELECT// XT2CLK;
    values of type UCS.UCS_CLK_SRC_DIVIDER_t// Select clock source divider
        const UCS.UCS_CLOCK_DIVIDER_1// Divide by 1;
        const UCS.UCS_CLOCK_DIVIDER_2// Divide by 2;
        const UCS.UCS_CLOCK_DIVIDER_4// Divide by 4;
        const UCS.UCS_CLOCK_DIVIDER_8// Divide by 8;
        const UCS.UCS_CLOCK_DIVIDER_12// Divide by 12;
        const UCS.UCS_CLOCK_DIVIDER_16// Divide by 16;
        const UCS.UCS_CLOCK_DIVIDER_32// Divide by 32;
    values of type UCS.UCS_XCAP_t// XT1 oscillator capacitor select
        const UCS.UCS_XCAP_0// ~ 2 pF;
        const UCS.UCS_XCAP_1// ~ 5.5 pF;
        const UCS.UCS_XCAP_2// ~ 8.5 pF;
        const UCS.UCS_XCAP_3// ~ 12 pF;
    values of type UCS.XCAP_t// XT1 oscillator capacitor select
        const UCS.XCAP_0// XT1 Cap 0;
        const UCS.XCAP_1// XT1 Cap 1;
        const UCS.XCAP_2// XT1 Cap 2;
        const UCS.XCAP_3// XT1 Cap 3;
    values of type UCS.XT1BYPASSLV_t// Selects XT1 bypass input swing level
        const UCS.XT1BYPASSLV_OFF// Input range from 0 to DVCC;
        const UCS.XT1BYPASSLV// Input range from 0 to DVIO;
    values of type UCS.XT1BYPASS_t// XT1 bypass select
        const UCS.XT1BYPASS_OFF// XT1 sourced internally;
        const UCS.XT1BYPASS// XT1 sourced externally from pin;
    values of type UCS.XT1DRIVE_t// XT1 oscillator current
        const UCS.XT1DRIVE_0// XT1 drive 0;
        const UCS.XT1DRIVE_1// XT1 drive 1;
        const UCS.XT1DRIVE_2// XT1 drive 2;
        const UCS.XT1DRIVE_3// XT1 drive 3;
    values of type UCS.XT1HFOFFG_t// XT1 high frequency oscillator fault flag
        const UCS.XT1HFOFFG_OFF// No fault condition present;
        const UCS.XT1HFOFFG// XT1 HF fault condition present;
    values of type UCS.XT1LFOFFG_t// XT1 low frequency oscillator fault flag
        const UCS.XT1LFOFFG_OFF// No fault condition present;
        const UCS.XT1LFOFFG// XT1 LF fault condition present;
    values of type UCS.XT1OFF_t// Turns off the XT1 oscillator
        const UCS.XT1OFF_OFF// Enable XT1;
        const UCS.XT1OFF// Disable XT1;
    values of type UCS.XT2BYPASSLV_t// Selects XT2 bypass input swing level
        const UCS.XT2BYPASSLV_OFF// Input range from 0 to DVCC;
        const UCS.XT2BYPASSLV// Input range from 0 to DVIO;
    values of type UCS.XT2BYPASS_t// XT2 bypass select
        const UCS.XT2BYPASS_OFF// XT2 sourced internally;
        const UCS.XT2BYPASS// XT2 sourced externally from pin;
    values of type UCS.XT2DRIVE_t// XT2 oscillator current
        const UCS.XT2DRIVE_0// 4 MHz to 8 MHz;
        const UCS.XT2DRIVE_1// 8 MHz to 16 MHz;
        const UCS.XT2DRIVE_2// 16 MHz to 24 MHz;
        const UCS.XT2DRIVE_3// 24 MHz to 32 MHz;
    values of type UCS.XT2OFFG_t// XT2 oscillator fault flag
        const UCS.XT2OFFG_OFF// No fault condition present;
        const UCS.XT2OFFG// XT2 fault condition present;
    values of type UCS.XT2OFF_t// Turns off the XT2 oscillator
        const UCS.XT2OFF_OFF// Enable XT2;
        const UCS.XT2OFF// Disable XT2;
    values of type UCS.XTS_t// XTS mode select
        const UCS.XTS_OFF// Low Frequency;
        const UCS.XTS// High Frequency;
    var obj = new UCS.AvailableClockVariations_t// Available variations of clock in a device;
        obj.clockType = String ...
        obj.hasClock = Bool ...
    var obj = new UCS.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new UCS.UCSCTL0_t// Unified Clock System Control 0 Register;
        obj.DCO0// DCO tap selection bit 0 = UCS.DCO0_t ...
        obj.DCO1// DCO tap selection bit 1 = UCS.DCO1_t ...
        obj.DCO2// DCO tap selection bit 2 = UCS.DCO2_t ...
        obj.DCO3// DCO tap selection bit 3 = UCS.DCO3_t ...
        obj.DCO4// DCO tap selection bit 4 = UCS.DCO4_t ...
        obj.MOD0// Modulation bit counter bit 0 = UCS.MOD0_t ...
        obj.MOD1// Modulation bit counter bit 1 = UCS.MOD1_t ...
        obj.MOD2// Modulation bit counter bit 2 = UCS.MOD2_t ...
        obj.MOD3// Modulation bit counter bit 3 = UCS.MOD3_t ...
        obj.MOD4// Modulation bit counter bit 4 = UCS.MOD4_t ...
    var obj = new UCS.UCSCTL1_t// Unified Clock System Control 1 Register;
        obj.DCORSEL// DCO frequency range select. These bits select the DCO frequency range of operation defined in the device-specific datasheet = UCS.DCORSEL_t ...
        obj.DISMOD// Modulation. This bit enables/disables the modulation. 0 Modulation enabled 1 Modulation disabled = UCS.DISMOD_t ...
    var obj = new UCS.UCSCTL2_t// Unified Clock System Control 2 Register;
        obj.FLLD// FLL loop divider. These bits divide fDCOCLK in the FLL feedback loop. This results in an additional multiplier for the multiplier bits. See also multiplier bits. 000 fDCOCLK/1 001 fDCOCLK/2 010 fDCOCLK/4 011 fDCOCLK/8 100 fDCOCLK/16 101 fDCOCLK/32 110 Reserved for future use. Defaults to fDCOCLK/32 111 Reserved for future use. Defaults to fDCOCLK/32 = UCS.FLLD_t ...
        obj.FLLN0// Multiplier bit 0 = UCS.FLLN0_t ...
        obj.FLLN1// Multiplier bit 1 = UCS.FLLN1_t ...
        obj.FLLN2// Multiplier bit 2 = UCS.FLLN2_t ...
        obj.FLLN3// Multiplier bit 3 = UCS.FLLN3_t ...
        obj.FLLN4// Multiplier bit 4 = UCS.FLLN4_t ...
        obj.FLLN5// Multiplier bit 5 = UCS.FLLN5_t ...
        obj.FLLN6// Multiplier bit 6 = UCS.FLLN6_t ...
        obj.FLLN7// Multiplier bit 7 = UCS.FLLN7_t ...
        obj.FLLN8// Multiplier bit 8 = UCS.FLLN8_t ...
        obj.FLLN9// Multiplier bit 9 = UCS.FLLN9_t ...
    var obj = new UCS.UCSCTL3_t// Unified Clock System Control 3 Register;
        obj.SELREF// FLL reference select. These bits select the FLL reference clock source. 000 XT1CLK 001 Reserved for future use. Defaults to XT1CLK. 010 REFOCLK 011 Reserved for future use. Defaults to REFOCLK. 100 Reserved for future use. Defaults to REFOCLK. 101 XT2CLK when available, otherwise REFOCLK. 110 Reserved for future use. XT2CLK when available, otherwise REFOCLK. 111 No selection. For the 'F543x and 'F541x non-A versions only, this defaults to XT2CLK. Reserved for future use. XT2CLK when available, otherwise REFOCLK = UCS.SELREF_t ...
        obj.FLLREFDIV// FLL reference divider. These bits define the divide factor for fFLLREFCLK. The divided frequency is used as the FLL reference frequency. 000 fFLLREFCLK/1 001 fFLLREFCLK/2 010 fFLLREFCLK/4 011 fFLLREFCLK/8 100 fFLLREFCLK/12 101 fFLLREFCLK/16 110 Reserved for future use. Defaults to fFLLREFCLK/16. 111 Reserved for future use. Defaults to fFLLREFCLK/16 = UCS.FLLREFDIV_t ...
    var obj = new UCS.UCSCTL4_t// Unified Clock System Control 4 Register;
        obj.SELA// Selects the ACLK source 000 XT1CLK 001 VLOCLK 010 REFOCLK 011 DCOCLK 100 DCOCLKDIV 101 XT2CLK when available, otherwise DCOCLKDIV 110 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. 111 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV = UCS.SELA_t ...
        obj.SELS// Selects the SMCLK source 000 XT1CLK 001 VLOCLK 010 REFOCLK 011 DCOCLK 100 DCOCLKDIV 101 XT2CLK when available, otherwise DCOCLKDIV 110 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. 111 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV = UCS.SELS_t ...
        obj.SELM// Selects the MCLK source 000 XT1CLK 001 VLOCLK 010 REFOCLK 011 DCOCLK 100 DCOCLKDIV 101 XT2CLK when available, otherwise DCOCLKDIV 110 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. 111 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV = UCS.SELM_t ...
    var obj = new UCS.UCSCTL5_t// Unified Clock System Control 5 Register;
        obj.DIVPA// ACLK source divider available at external pin. Divides the frequency of ACLK and presents it to an external pin. 000 fACLK/1 001 fACLK/2 010 fACLK/4 011 fACLK/8 100 fACLK/16 101 fACLK/32 110 Reserved for future use. Defaults to fACLK/32. 111 Reserved for future use. Defaults to fACLK/32 = UCS.DIVPA_t ...
        obj.DIVA// ACLK source divider. Divides the frequency of the ACLK clock source. 000 fACLK/1 001 fACLK/2 010 fACLK/4 011 fACLK/8 100 fACLK/16 101 fACLK/32 110 Reserved for future use. Defaults to fACLK/32. 111 Reserved for future use. Defaults to fACLK/32 = UCS.DIVA_t ...
        obj.DIVS// SMCLK source divider 000 fSMCLK/1 001 fSMCLK/2 010 fSMCLK/4 011 fSMCLK/8 100 fSMCLK/16 101 fSMCLK/32 110 Reserved for future use. Defaults to fSMCLK/32. 111 Reserved for future use. Defaults to fSMCLK/32 = UCS.DIVS_t ...
        obj.DIVM// MCLK source divider 000 fMCLK/1 001 fMCLK/2 010 fMCLK/4 011 fMCLK/8 100 fMCLK/16 101 fMCLK/32 110 Reserved for future use. Defaults to fMCLK/32. 111 Reserved for future use. Defaults to fMCLK/32 = UCS.DIVM_t ...
    var obj = new UCS.UCSCTL6_t// Unified Clock System Control 6 Register;
        obj.XT2DRIVE// The XT2 oscillator current can be adjusted to its drive needs. Initially, it starts with the highest supply current for reliable and quick startup. If needed, user software can reduce the drive strength. 00 Lowest current consumption. XT2 oscillator operating range is 4 MHz to 8 MHz. 01 Increased drive strength XT2 oscillator. XT2 oscillator operating range is 8 MHz to 16 MHz. 10 Increased drive capability XT2 oscillator. XT2 oscillator operating range is 16 MHz to 24 MHz. 11 Maximum drive capability and maximum current consumption for both XT2 oscillator. XT2 oscillator operating range is 24 MHz to 32 MHz = UCS.XT2DRIVE_t ...
        obj.XT2BYPASS// XT2 bypass select 0 XT2 sourced internally 1 XT2 sourced externally from pin = UCS.XT2BYPASS_t ...
        obj.XT2OFF// Turns off the XT2 oscillator 0 XT2 is on if XT2 is selected via the port selection and XT2 is not in bypass mode of operation. 1 XT2 is off if it is not used as a source for ACLK, MCLK, or SMCLK or is not used as a reference source required for FLL operation = UCS.XT2OFF_t ...
        obj.XT1DRIVE// The XT1 oscillator current can be adjusted to its drive needs. Initially, it starts with the highest supply current for reliable and quick startup. If needed, user software can reduce the drive strength. 00 Lowest current consumption for XT1 LF mode. XT1 oscillator operating range in HF mode is 4 MHz to 8 MHz. 01 Increased drive strength for XT1 LF mode. XT1 oscillator operating range in HF mode is 8 MHz to 16 MHz. 10 Increased drive capability for XT1 LF mode. XT1 oscillator operating range in HF mode is 16 MHz to 24 MHz. 11 Maximum drive capability and maximum current consumption for XT1 LF mode. XT1 oscillator operating range in HF mode is 24 MHz to 32 MHz = UCS.XT1DRIVE_t ...
        obj.XTS// XT1 mode select 0 Low-frequency mode. XCAP bits define the capacitance at the XIN and XOUT pins. 1 High-frequency mode. XCAP bits are not used = UCS.XTS_t ...
        obj.XT1BYPASS// XT1 bypass select 0 XT1 sourced internally 1 XT1 sourced externally from pin = UCS.XT1BYPASS_t ...
        obj.XCAP// Oscillator capacitor selection. These bits select the capacitors applied to the LF crystal or resonator in the LF mode (XTS = 0). The effective capacitance (seen by the crystal) is Ceff (CXIN + 2 pF)/2. It is assumed that CXIN = CXOUT and that a parasitic capacitance of 2 pF is added by the package and the printed circuit board. For details about the typical internal and the effective capacitors, refer to the device-specific data sheet = UCS.XCAP_t ...
        obj.SMCLKOFF// SMCLK off. This bit turns off the SMCLK. 0 SMCLK on 1 SMCLK off = UCS.SMCLKOFF_t ...
        obj.XT1OFF// XT1 off. This bit turns off the XT1. 0 XT1 is on if XT1 is selected via the port selection and XT1 is not in bypass mode of operation. 1 XT1 is off if it is not used as a source for ACLK, MCLK, or SMCLK or is not used as a reference source required for FLL operation = UCS.XT1OFF_t ...
    var obj = new UCS.UCSCTL7_t// Unified Clock System Control 7 Register;
        obj.XT2OFFG// XT2 oscillator fault flag. If this bit is set, the OFIFG flag is also set. XT2OFFG is set if a XT2 fault condition exists. XT2OFFG can be cleared via software. If the XT2 fault condition still remains, XT2OFFG is set. 0 No fault condition occurred after the last reset. 1 XT2 fault. An XT2 fault occurred after the last reset = UCS.XT2OFFG_t ...
        obj.XT1HFOFFG// XT1 oscillator fault flag (HF mode). If this bit is set, the OFIFG flag is also set. XT1HFOFFG is set if a XT1 fault condition exists. XT1HFOFFG can be cleared via software. If the XT1 fault condition still remains, XT1HFOFFG is set. 0 No fault condition occurred after the last reset. 1 XT1 fault. An XT1 fault occurred after the last reset = UCS.XT1HFOFFG_t ...
        obj.XT1LFOFFG// XT1 oscillator fault flag (LF mode). If this bit is set, the OFIFG flag is also set. XT1LFOFFG is set if a XT1 fault condition exists. XT1LFOFFG can be cleared via software. If the XT1 fault condition still remains, XT1LFOFFG is set. 0 No fault condition occurred after the last reset. 1 XT1 fault (LF mode). A XT1 fault occurred after the last reset = UCS.XT1LFOFFG_t ...
        obj.DCOFFG// DCO fault flag. If this bit is set, the OFIFG flag is also set. The DCOFFG bit is set if DCO = {0} or DCO = {31}. DCOFFG can be cleared via software. If the DCO fault condition still remains, DCOFFG is set. 0 No fault condition occurred after the last reset. 1 DCO fault. A DCO fault occurred after the last reset = UCS.DCOFFG_t ...
    var obj = new UCS.UCSCTL8_t// Unified Clock System Control 8 Register;
        obj.MODOSCREQEN// MODOSC clock request enable. Setting this enables conditional module requests for MODOSC. 0 MODOSC conditional requests are disabled. 1 MODOSC conditional requests are enabled = UCS.MODOSCREQEN_t ...
        obj.SMCLKREQEN// SMCLK clock request enable. Setting this enables conditional module requests for SMCLK. 0 SMCLK conditional requests are disabled. 1 SMCLK conditional requests are enabled = UCS.SMCLKREQEN_t ...
        obj.MCLKREQEN// MCLK clock request enable. Setting this enables conditional module requests for MCLK 0 MCLK conditional requests are disabled. 1 MCLK conditional requests are enabled = UCS.MCLKREQEN_t ...
        obj.ACLKREQEN// ACLK clock request enable. Setting this enables conditional module requests for ACLK 0 ACLK conditional requests are disabled. 1 ACLK conditional requests are enabled = UCS.ACLKREQEN_t ...
    var obj = new UCS.UCSCTL9_t// Unified Clock System Control 9 Register;
        obj.XT2BYPASSLV// Selects XT2 bypass input swing level. Must be set for reduced swing operation. 0 Input range from 0 to DVCC 1 Input range from 0 to DVIO = UCS.XT2BYPASSLV_t ...
        obj.XT1BYPASSLV// Selects XT1 bypass input swing level. Must be set for reduced swing operation. 0 Input range from 0 to DVCC 1 Input range from 0 to DVIO = UCS.XT1BYPASSLV_t ...
module-wide functions
     UCS.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     UCS.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new UCS.Params// Instance config-params object;
        params.ACLKHz// ACLK frequency in Hertz = Float undefined;
        params.DCOCLKDIVHz// Divided DCO clock frequency in Hertz = Float undefined;
        params.DCOCLKHz// DCO clock frequency in Hertz = Float 1000000;
        params.MCLKHz// MCLK frequency in Hertz = Float undefined;
        params.REFOCLKHz// = Float 32768;
        params.SMCLKHz// SMCLK frequency in Hertz = Float undefined;
        params.UCSCTL0// Unified Clock System Control 0 Register = UCS.UCSCTL0_t {
            DCO0: UCS.DCO0_OFF,
            DCO1: UCS.DCO1_OFF,
            DCO2: UCS.DCO2_OFF,
            DCO3: UCS.DCO3_OFF,
            DCO4: UCS.DCO4_OFF,
            MOD0: UCS.MOD0_OFF,
            MOD1: UCS.MOD1_OFF,
            MOD2: UCS.MOD2_OFF,
            MOD3: UCS.MOD3_OFF,
            MOD4: UCS.MOD4_OFF
        };
        params.UCSCTL1// Unified Clock System Control 1 Register = UCS.UCSCTL1_t {
            DCORSEL: UCS.DCORSEL_2,
            DISMOD: UCS.DISMOD_OFF
        };
        params.UCSCTL2// Unified Clock System Control 2 Register = UCS.UCSCTL2_t {
            FLLD: UCS.FLLD_1,
            FLLN0: UCS.FLLN0,
            FLLN1: UCS.FLLN1,
            FLLN2: UCS.FLLN2,
            FLLN3: UCS.FLLN3,
            FLLN4: UCS.FLLN4,
            FLLN5: UCS.FLLN5_OFF,
            FLLN6: UCS.FLLN6_OFF,
            FLLN7: UCS.FLLN7_OFF,
            FLLN8: UCS.FLLN8_OFF,
            FLLN9: UCS.FLLN9_OFF
        };
        params.UCSCTL3// Unified Clock System Control 3 Register = UCS.UCSCTL3_t {
            SELREF: UCS.SELREF_0,
            FLLREFDIV: UCS.FLLREFDIV_0
        };
        params.UCSCTL4// Unified Clock System Control 4 Register = UCS.UCSCTL4_t {
            SELA: UCS.SELA_0,
            SELS: UCS.SELS_4,
            SELM: UCS.SELM_4
        };
        params.UCSCTL5// Unified Clock System Control 5 Register = UCS.UCSCTL5_t {
            DIVPA: UCS.DIVPA_0,
            DIVA: UCS.DIVA_0,
            DIVS: UCS.DIVS_0,
            DIVM: UCS.DIVM_0
        };
        params.UCSCTL6// Unified Clock System Control 6 Register = UCS.UCSCTL6_t {
            XT2DRIVE: UCS.XT2DRIVE_3,
            XT2BYPASS: UCS.XT2BYPASS_OFF,
            XT2OFF: UCS.XT2OFF,
            XT1DRIVE: UCS.XT1DRIVE_3,
            XTS: UCS.XTS,
            XT1BYPASS: UCS.XT1BYPASS,
            XCAP: UCS.XCAP_3,
            SMCLKOFF: UCS.SMCLKOFF_OFF,
            XT1OFF: UCS.XT1OFF
        };
        params.UCSCTL7// Unified Clock System Control 7 Register = UCS.UCSCTL7_t {
            XT2OFFG: UCS.XT2OFFG_OFF,
            XT1HFOFFG: UCS.XT1HFOFFG_OFF,
            XT1LFOFFG: UCS.XT1LFOFFG,
            DCOFFG: UCS.DCOFFG
        };
        params.UCSCTL8// Unified Clock System Control 8 Register = UCS.UCSCTL8_t {
            MODOSCREQEN: UCS.MODOSCREQEN_OFF,
            SMCLKREQEN: UCS.SMCLKREQEN,
            MCLKREQEN: UCS.MCLKREQEN,
            ACLKREQEN: UCS.ACLKREQEN
        };
        params.UCSCTL9// Unified Clock System Control 9 Register = UCS.UCSCTL9_t {
            XT2BYPASSLV: UCS.XT2BYPASSLV_OFF,
            XT1BYPASSLV: UCS.XT1BYPASSLV_OFF
        };
        params.UCS_ACLKREQEN// ACLK clock request enable. Setting this enables conditional module requests for ACLK 0 ACLK conditional requests are disabled. 1 ACLK conditional requests are enabled = UCS.ACLKREQEN_t UCS.ACLKREQEN;
        params.UCS_ACLK_SOURCE// ACLK clock source select = UCS.UCS_CLK_SOURCE_t UCS.UCS_XT1CLK_SELECT;
        params.UCS_ACLK_SRC_DIVIDER// ACLK clock source divider select = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
        params.UCS_FLL_FREQ// Set FLL target frequency = Float 0;
        params.UCS_FLL_RATIO// FLLN value = UInt 31;
        params.UCS_FLL_REF_CLK_SOURCE// FLL reference clock source select = UCS.UCS_CLK_SOURCE_t UCS.UCS_XT1CLK_SELECT;
        params.UCS_FLL_REF_SRC_DIVIDER// FLL reference clock source divider select = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
        params.UCS_MCLKREQEN// MCLK clock request enable. Setting this enables conditional module requests for MCLK 0 MCLK conditional requests are disabled. 1 MCLK conditional requests are enabled = UCS.MCLKREQEN_t UCS.MCLKREQEN;
        params.UCS_MCLK_SOURCE// MCLK clock source select = UCS.UCS_CLK_SOURCE_t UCS.UCS_DCOCLKDIV_SELECT;
        params.UCS_MCLK_SRC_DIVIDER// MCLK clock source divider select = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
        params.UCS_MODOSCREQEN// MODOSC clock request enable. Setting this enables conditional module requests for MODOSC. 0 MODOSC conditional requests are disabled. 1 MODOSC conditional requests are enabled = UCS.MODOSCREQEN_t UCS.MODOSCREQEN_OFF;
        params.UCS_PACLK_SRC_DIVIDER// External pin ACLK clock source divider select = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
        params.UCS_SMCLKOFF// Turns OFF SMCLK using the SMCLKOFF bit 0 SMCLK On 1 SMCLK Off = Bool false;
        params.UCS_SMCLKREQEN// SMCLK clock request enable. Setting this enables conditional module requests for SMCLK. 0 SMCLK conditional requests are disabled. 1 SMCLK conditional requests are enabled = UCS.SMCLKREQEN_t UCS.SMCLKREQEN;
        params.UCS_SMCLK_SOURCE// SMCLK clock source select = UCS.UCS_CLK_SOURCE_t UCS.UCS_DCOCLKDIV_SELECT;
        params.UCS_SMCLK_SRC_DIVIDER// SMCLK clock source divider select = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
        params.UCS_XCAP// Set oscillator capacitor. Available only in LF mode. See device-specific datasheet for actual values = UCS.UCS_XCAP_t UCS.UCS_XCAP_3;
        params.UCS_XT1BYPASS// Set XT1 in bypass mode. The frequency input at XIN1 pin requires 0 to VCC = Bool false;
        params.UCS_XT1_DRIVE// Set XT1 drive strength = UCS.XT1DRIVE_t UCS.XT1DRIVE_3;
        params.UCS_XT2BYPASS// Set XT2 in bypass mode. The frequency input at XIN2 pin requires 0 to VCC = Bool false;
        params.UCS_XT2_DRIVE// Set XT2 drive strength = UCS.XT2DRIVE_t UCS.XT2DRIVE_3;
        params.VLOCLKHz// = Float 12000;
        params.WATCHCRYSTALCLKHz// = Float 32768;
        params.XT1CLKHz// = Float 0;
        params.XT2CLKHz// = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = UCS.ForceSetDefaultRegister_t[] [
            {
                register: "UCS_SMCLKREQEN",
                regForceSet: false
            },
            {
                register: "UCS_MCLKREQEN",
                regForceSet: false
            },
            {
                register: "UCS_ACLKREQEN",
                regForceSet: false
            },
            {
                register: "UCS_MODOSCREQEN",
                regForceSet: false
            }
        ];
        params.hasAllCal// Specify if device has all calibration constants = Bool false;
        params.hasHFXT1// Specify if HFXT1 is available on the device = Bool false;
        params.hasRosc// Specify if Rosc is available on the device = Bool false;
        params.hasVLO// Specify if VLO is available on the device = Bool false;
        params.hasXT2// Specify if XT2 is available on the device = Bool false;
        params.maxCpuFrequency// Maximum CPU frequency in Hertz = Float 0;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance functions
     inst.computeDCOCLKHz// Initialize to the nearest available DCO clock frequency(Float DCOCLKHz) returns Void
enum UCS.ACLKREQEN_t
index URL

ACLK clock request enable

Configuration settings
values of type UCS.ACLKREQEN_t
    const UCS.ACLKREQEN_OFF;
    // ACLK conditional requests are disabled
    const UCS.ACLKREQEN;
    // ACLK conditional requests are enabled
enum UCS.DCO0_t
index URL

DCO0 Bit

Configuration settings
values of type UCS.DCO0_t
    const UCS.DCO0_OFF;
    // Disable DCO0 bit
    const UCS.DCO0;
    // Enable DCO0 bit
enum UCS.DCO1_t
index URL

DCO1 Bit

Configuration settings
values of type UCS.DCO1_t
    const UCS.DCO1_OFF;
    // Disable DCO1 bit
    const UCS.DCO1;
    // Enable DCO1 bit
enum UCS.DCO2_t
index URL

DCO2 Bit

Configuration settings
values of type UCS.DCO2_t
    const UCS.DCO2_OFF;
    // Disable DCO2 bit
    const UCS.DCO2;
    // Enable DCO2 bit
enum UCS.DCO3_t
index URL

DCO3 Bit

Configuration settings
values of type UCS.DCO3_t
    const UCS.DCO3_OFF;
    // Disable DCO3 bit
    const UCS.DCO3;
    // Enable DCO3 bit
enum UCS.DCO4_t
index URL

DCO4 Bit

Configuration settings
values of type UCS.DCO4_t
    const UCS.DCO4_OFF;
    // Disable DCO4 bit
    const UCS.DCO4;
    // Enable DCO4 bit
enum UCS.DCOFFG_t
index URL

DCO fault flag

Configuration settings
values of type UCS.DCOFFG_t
    const UCS.DCOFFG_OFF;
    // No fault condition present
    const UCS.DCOFFG;
    // DCO fault condition present
enum UCS.DCORSEL_t
index URL

DCO frequency range select

Configuration settings
values of type UCS.DCORSEL_t
    const UCS.DCORSEL_0;
    // DCORSEL_0
    const UCS.DCORSEL_1;
    // DCORSEL_1
    const UCS.DCORSEL_2;
    // DCORSEL_2
    const UCS.DCORSEL_3;
    // DCORSEL_3
    const UCS.DCORSEL_4;
    // DCORSEL_4
    const UCS.DCORSEL_5;
    // DCORSEL_5
    const UCS.DCORSEL_6;
    // DCORSEL_6
    const UCS.DCORSEL_7;
    // DCORSEL_7
enum UCS.DISMOD_t
index URL

DISMOD Bit

Configuration settings
values of type UCS.DISMOD_t
    const UCS.DISMOD_OFF;
    // Modulation enabled
    const UCS.DISMOD;
    // Modulation disabled
enum UCS.DIVA_t
index URL

ACLK source divider

Configuration settings
values of type UCS.DIVA_t
    const UCS.DIVA_0;
    // Divide by 1
    const UCS.DIVA_1;
    // Divide by 2
    const UCS.DIVA_2;
    // Divide by 4
    const UCS.DIVA_3;
    // Divide by 8
    const UCS.DIVA_4;
    // Divide by 16
    const UCS.DIVA_5;
    // Divide by 32
    const UCS.DIVA_6;
    // Reserved
    const UCS.DIVA_7;
    // Reserved
enum UCS.DIVM_t
index URL

MCLK source divider

Configuration settings
values of type UCS.DIVM_t
    const UCS.DIVM_0;
    // Divide by 1
    const UCS.DIVM_1;
    // Divide by 2
    const UCS.DIVM_2;
    // Divide by 4
    const UCS.DIVM_3;
    // Divide by 8
    const UCS.DIVM_4;
    // Divide by 16
    const UCS.DIVM_5;
    // Divide by 32
    const UCS.DIVM_6;
    // Reserved
    const UCS.DIVM_7;
    // Reserved
enum UCS.DIVPA_t
index URL

ACLK source divider available at external pin

Configuration settings
values of type UCS.DIVPA_t
    const UCS.DIVPA_0;
    // Divide by 1
    const UCS.DIVPA_1;
    // Divide by 2
    const UCS.DIVPA_2;
    // Divide by 4
    const UCS.DIVPA_3;
    // Divide by 8
    const UCS.DIVPA_4;
    // Divide by 16
    const UCS.DIVPA_5;
    // Divide by 32
    const UCS.DIVPA_6;
    // Reserved
    const UCS.DIVPA_7;
    // Reserved
enum UCS.DIVS_t
index URL

SMCLK source divider

Configuration settings
values of type UCS.DIVS_t
    const UCS.DIVS_0;
    // Divide by 1
    const UCS.DIVS_1;
    // Divide by 2
    const UCS.DIVS_2;
    // Divide by 4
    const UCS.DIVS_3;
    // Divide by 8
    const UCS.DIVS_4;
    // Divide by 16
    const UCS.DIVS_5;
    // Divide by 32
    const UCS.DIVS_6;
    // Reserved
    const UCS.DIVS_7;
    // Reserved
enum UCS.FLLD_t
index URL

FLL Loop Divider

Configuration settings
values of type UCS.FLLD_t
    const UCS.FLLD_0;
    // Multiply Selected Loop Freq. 1
    const UCS.FLLD_1;
    // Multiply Selected Loop Freq. 2
    const UCS.FLLD_2;
    // Multiply Selected Loop Freq. 4
    const UCS.FLLD_3;
    // Multiply Selected Loop Freq. 8
    const UCS.FLLD_4;
    // Multiply Selected Loop Freq. 16
    const UCS.FLLD_5;
    // Multiply Selected Loop Freq. 32
    const UCS.FLLD_6;
    // Multiply Selected Loop Freq. 32
    const UCS.FLLD_7;
    // Multiply Selected Loop Freq. 32
enum UCS.FLLN0_t
index URL

FLL Multiplier Bit 0

Configuration settings
values of type UCS.FLLN0_t
    const UCS.FLLN0_OFF;
    // Disable FLLN bit 0
    const UCS.FLLN0;
    // Enable FLLN bit 0
enum UCS.FLLN1_t
index URL

FLL Multiplier Bit 1

Configuration settings
values of type UCS.FLLN1_t
    const UCS.FLLN1_OFF;
    // Disable FLLN bit 1
    const UCS.FLLN1;
    // Enable FLLN bit 1
enum UCS.FLLN2_t
index URL

FLL Multiplier Bit 2

Configuration settings
values of type UCS.FLLN2_t
    const UCS.FLLN2_OFF;
    // Disable FLLN bit 2
    const UCS.FLLN2;
    // Enable FLLN bit 2
enum UCS.FLLN3_t
index URL

FLL Multiplier Bit 3

Configuration settings
values of type UCS.FLLN3_t
    const UCS.FLLN3_OFF;
    // Disable FLLN bit 3
    const UCS.FLLN3;
    // Enable FLLN bit 3
enum UCS.FLLN4_t
index URL

FLL Multiplier Bit 4

Configuration settings
values of type UCS.FLLN4_t
    const UCS.FLLN4_OFF;
    // Disable FLLN bit 4
    const UCS.FLLN4;
    // Enable FLLN bit 4
enum UCS.FLLN5_t
index URL

FLL Multiplier Bit 5

Configuration settings
values of type UCS.FLLN5_t
    const UCS.FLLN5_OFF;
    // Disable FLLN bit 5
    const UCS.FLLN5;
    // Enable FLLN bit 5
enum UCS.FLLN6_t
index URL

FLL Multiplier Bit 6

Configuration settings
values of type UCS.FLLN6_t
    const UCS.FLLN6_OFF;
    // Disable FLLN bit 6
    const UCS.FLLN6;
    // Enable FLLN bit 6
enum UCS.FLLN7_t
index URL

FLL Multiplier Bit 7

Configuration settings
values of type UCS.FLLN7_t
    const UCS.FLLN7_OFF;
    // Disable FLLN bit 7
    const UCS.FLLN7;
    // Enable FLLN bit 7
enum UCS.FLLN8_t
index URL

FLL Multiplier Bit 8

Configuration settings
values of type UCS.FLLN8_t
    const UCS.FLLN8_OFF;
    // Disable FLLN bit 8
    const UCS.FLLN8;
    // Enable FLLN bit 8
enum UCS.FLLN9_t
index URL

FLL Multiplier Bit 9

Configuration settings
values of type UCS.FLLN9_t
    const UCS.FLLN9_OFF;
    // Disable FLLN bit 9
    const UCS.FLLN9;
    // Enable FLLN bit 9
enum UCS.FLLREFDIV_t
index URL

FLL Reference Divider

Configuration settings
values of type UCS.FLLREFDIV_t
    const UCS.FLLREFDIV_0;
    // f(FLLREFCLK) / 1
    const UCS.FLLREFDIV_1;
    // f(FLLREFCLK) / 2
    const UCS.FLLREFDIV_2;
    // f(FLLREFCLK) / 4
    const UCS.FLLREFDIV_3;
    // f(FLLREFCLK) / 8
    const UCS.FLLREFDIV_4;
    // f(FLLREFCLK) / 12
    const UCS.FLLREFDIV_5;
    // f(FLLREFCLK) / 16
    const UCS.FLLREFDIV_6;
    // Reserved
    const UCS.FLLREFDIV_7;
    // Reserved
enum UCS.MCLKREQEN_t
index URL

MCLK clock request enable

Configuration settings
values of type UCS.MCLKREQEN_t
    const UCS.MCLKREQEN_OFF;
    // MCLK conditional requests are disabled
    const UCS.MCLKREQEN;
    // MCLK conditional requests are enabled
enum UCS.MOD0_t
index URL

MOD0 Bit

Configuration settings
values of type UCS.MOD0_t
    const UCS.MOD0_OFF;
    // Disable MOD0 bit
    const UCS.MOD0;
    // Enable MOD0 bit
enum UCS.MOD1_t
index URL

MOD1 Bit

Configuration settings
values of type UCS.MOD1_t
    const UCS.MOD1_OFF;
    // Disable MOD1 bit
    const UCS.MOD1;
    // Enable MOD1 bit
enum UCS.MOD2_t
index URL

MOD2 Bit

Configuration settings
values of type UCS.MOD2_t
    const UCS.MOD2_OFF;
    // Disable MOD2 bit
    const UCS.MOD2;
    // Enable MOD2 bit
enum UCS.MOD3_t
index URL

MOD3 Bit

Configuration settings
values of type UCS.MOD3_t
    const UCS.MOD3_OFF;
    // Disable MOD3 bit
    const UCS.MOD3;
    // Enable MOD3 bit
enum UCS.MOD4_t
index URL

MOD4 Bit

Configuration settings
values of type UCS.MOD4_t
    const UCS.MOD4_OFF;
    // Disable MOD4 bit
    const UCS.MOD4;
    // Enable MOD4 bit
enum UCS.MODOSCREQEN_t
index URL

MODOSC clock request enable

Configuration settings
values of type UCS.MODOSCREQEN_t
    const UCS.MODOSCREQEN_OFF;
    // MODOSC conditional requests are disabled
    const UCS.MODOSCREQEN;
    // MODOSC conditional requests are enabled
enum UCS.SELA_t
index URL

Select the ACLK source

Configuration settings
values of type UCS.SELA_t
    const UCS.SELA_0;
    // XT1CLK
    const UCS.SELA_1;
    // VLOCLK
    const UCS.SELA_2;
    // REFOCLK
    const UCS.SELA_3;
    // DCOCLK
    const UCS.SELA_4;
    // DCOCLKDIV
    const UCS.SELA_5;
    // XT2CLK
    const UCS.SELA_6;
    // Reserved
    const UCS.SELA_7;
    // Reserved
enum UCS.SELM_t
index URL

Select the MCLK source

Configuration settings
values of type UCS.SELM_t
    const UCS.SELM_0;
    // XT1CLK
    const UCS.SELM_1;
    // VLOCLK
    const UCS.SELM_2;
    // REFOCLK
    const UCS.SELM_3;
    // DCOCLK
    const UCS.SELM_4;
    // DCOCLKDIV
    const UCS.SELM_5;
    // XT2CLK
    const UCS.SELM_6;
    // Reserved
    const UCS.SELM_7;
    // Reserved
enum UCS.SELREF_t
index URL

FLL Reference Select

Configuration settings
values of type UCS.SELREF_t
    const UCS.SELREF_0;
    // FLL Reference by XT1CLK
    const UCS.SELREF_1;
    // Reserved
    const UCS.SELREF_2;
    // FLL Reference by REFOCLK
    const UCS.SELREF_3;
    // Reserved
    const UCS.SELREF_4;
    // Reserved
    const UCS.SELREF_5;
    // FLL Reference by XT2CLK
    const UCS.SELREF_6;
    // Reserved
    const UCS.SELREF_7;
    // Reserved
enum UCS.SELS_t
index URL

Select the SMCLK source

Configuration settings
values of type UCS.SELS_t
    const UCS.SELS_0;
    // XT1CLK
    const UCS.SELS_1;
    // VLOCLK
    const UCS.SELS_2;
    // REFOCLK
    const UCS.SELS_3;
    // DCOCLK
    const UCS.SELS_4;
    // DCOCLKDIV
    const UCS.SELS_5;
    // XT2CLK
    const UCS.SELS_6;
    // Reserved
    const UCS.SELS_7;
    // Reserved
enum UCS.SMCLKOFF_t
index URL

SMCLK off

Configuration settings
values of type UCS.SMCLKOFF_t
    const UCS.SMCLKOFF_OFF;
    // SMCLK on
    const UCS.SMCLKOFF;
    // SMCLK off
enum UCS.SMCLKREQEN_t
index URL

SMCLK clock request enable

Configuration settings
values of type UCS.SMCLKREQEN_t
    const UCS.SMCLKREQEN_OFF;
    // SMCLK conditional requests are disabled
    const UCS.SMCLKREQEN;
    // SMCLK conditional requests are enabled
enum UCS.UCS_CLK_SOURCE_t
index URL

Select the clock source

Configuration settings
values of type UCS.UCS_CLK_SOURCE_t
    const UCS.UCS_XT1CLK_SELECT;
    // XT1CLK
    const UCS.UCS_VLOCLK_SELECT;
    // VLOCLK
    const UCS.UCS_REFOCLK_SELECT;
    // REFOCLK
    const UCS.UCS_DCOCLK_SELECT;
    // DCOCLK
    const UCS.UCS_DCOCLKDIV_SELECT;
    // DCOCLKDIV
    const UCS.UCS_XT2CLK_SELECT;
    // XT2CLK
enum UCS.UCS_CLK_SRC_DIVIDER_t
index URL

Select clock source divider

Configuration settings
values of type UCS.UCS_CLK_SRC_DIVIDER_t
    const UCS.UCS_CLOCK_DIVIDER_1;
    // Divide by 1
    const UCS.UCS_CLOCK_DIVIDER_2;
    // Divide by 2
    const UCS.UCS_CLOCK_DIVIDER_4;
    // Divide by 4
    const UCS.UCS_CLOCK_DIVIDER_8;
    // Divide by 8
    const UCS.UCS_CLOCK_DIVIDER_12;
    // Divide by 12
    const UCS.UCS_CLOCK_DIVIDER_16;
    // Divide by 16
    const UCS.UCS_CLOCK_DIVIDER_32;
    // Divide by 32
enum UCS.UCS_XCAP_t
index URL

XT1 oscillator capacitor select

Configuration settings
values of type UCS.UCS_XCAP_t
    const UCS.UCS_XCAP_0;
    // ~ 2 pF
    const UCS.UCS_XCAP_1;
    // ~ 5.5 pF
    const UCS.UCS_XCAP_2;
    // ~ 8.5 pF
    const UCS.UCS_XCAP_3;
    // ~ 12 pF
enum UCS.XCAP_t
index URL

XT1 oscillator capacitor select

Configuration settings
values of type UCS.XCAP_t
    const UCS.XCAP_0;
    // XT1 Cap 0
    const UCS.XCAP_1;
    // XT1 Cap 1
    const UCS.XCAP_2;
    // XT1 Cap 2
    const UCS.XCAP_3;
    // XT1 Cap 3
enum UCS.XT1BYPASSLV_t
index URL

Selects XT1 bypass input swing level

Configuration settings
values of type UCS.XT1BYPASSLV_t
    const UCS.XT1BYPASSLV_OFF;
    // Input range from 0 to DVCC
    const UCS.XT1BYPASSLV;
    // Input range from 0 to DVIO
enum UCS.XT1BYPASS_t
index URL

XT1 bypass select

Configuration settings
values of type UCS.XT1BYPASS_t
    const UCS.XT1BYPASS_OFF;
    // XT1 sourced internally
    const UCS.XT1BYPASS;
    // XT1 sourced externally from pin
enum UCS.XT1DRIVE_t
index URL

XT1 oscillator current

Configuration settings
values of type UCS.XT1DRIVE_t
    const UCS.XT1DRIVE_0;
    // XT1 drive 0
    const UCS.XT1DRIVE_1;
    // XT1 drive 1
    const UCS.XT1DRIVE_2;
    // XT1 drive 2
    const UCS.XT1DRIVE_3;
    // XT1 drive 3
enum UCS.XT1HFOFFG_t
index URL

XT1 high frequency oscillator fault flag

Configuration settings
values of type UCS.XT1HFOFFG_t
    const UCS.XT1HFOFFG_OFF;
    // No fault condition present
    const UCS.XT1HFOFFG;
    // XT1 HF fault condition present
enum UCS.XT1LFOFFG_t
index URL

XT1 low frequency oscillator fault flag

Configuration settings
values of type UCS.XT1LFOFFG_t
    const UCS.XT1LFOFFG_OFF;
    // No fault condition present
    const UCS.XT1LFOFFG;
    // XT1 LF fault condition present
enum UCS.XT1OFF_t
index URL

Turns off the XT1 oscillator

Configuration settings
values of type UCS.XT1OFF_t
    const UCS.XT1OFF_OFF;
    // Enable XT1
    const UCS.XT1OFF;
    // Disable XT1
enum UCS.XT2BYPASSLV_t
index URL

Selects XT2 bypass input swing level

Configuration settings
values of type UCS.XT2BYPASSLV_t
    const UCS.XT2BYPASSLV_OFF;
    // Input range from 0 to DVCC
    const UCS.XT2BYPASSLV;
    // Input range from 0 to DVIO
enum UCS.XT2BYPASS_t
index URL

XT2 bypass select

Configuration settings
values of type UCS.XT2BYPASS_t
    const UCS.XT2BYPASS_OFF;
    // XT2 sourced internally
    const UCS.XT2BYPASS;
    // XT2 sourced externally from pin
enum UCS.XT2DRIVE_t
index URL

XT2 oscillator current

Configuration settings
values of type UCS.XT2DRIVE_t
    const UCS.XT2DRIVE_0;
    // 4 MHz to 8 MHz
    const UCS.XT2DRIVE_1;
    // 8 MHz to 16 MHz
    const UCS.XT2DRIVE_2;
    // 16 MHz to 24 MHz
    const UCS.XT2DRIVE_3;
    // 24 MHz to 32 MHz
enum UCS.XT2OFFG_t
index URL

XT2 oscillator fault flag

Configuration settings
values of type UCS.XT2OFFG_t
    const UCS.XT2OFFG_OFF;
    // No fault condition present
    const UCS.XT2OFFG;
    // XT2 fault condition present
enum UCS.XT2OFF_t
index URL

Turns off the XT2 oscillator

Configuration settings
values of type UCS.XT2OFF_t
    const UCS.XT2OFF_OFF;
    // Enable XT2
    const UCS.XT2OFF;
    // Disable XT2
enum UCS.XTS_t
index URL

XTS mode select

Configuration settings
values of type UCS.XTS_t
    const UCS.XTS_OFF;
    // Low Frequency
    const UCS.XTS;
    // High Frequency
struct UCS.AvailableClockVariations_t
index URL

Available variations of clock in a device

Configuration settings
var obj = new UCS.AvailableClockVariations_t;
    obj.clockType = String ...
    obj.hasClock = Bool ...
DETAILS
Stores true/false if any of the clock variations are available.
SEE
AvailableClockVariations_t
struct UCS.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new UCS.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct UCS.UCSCTL0_t
index URL

Unified Clock System Control 0 Register

Configuration settings
var obj = new UCS.UCSCTL0_t;
    obj.DCO0 = UCS.DCO0_t ...
    // DCO tap selection bit 0
    obj.DCO1 = UCS.DCO1_t ...
    // DCO tap selection bit 1
    obj.DCO2 = UCS.DCO2_t ...
    // DCO tap selection bit 2
    obj.DCO3 = UCS.DCO3_t ...
    // DCO tap selection bit 3
    obj.DCO4 = UCS.DCO4_t ...
    // DCO tap selection bit 4
    obj.MOD0 = UCS.MOD0_t ...
    // Modulation bit counter bit 0
    obj.MOD1 = UCS.MOD1_t ...
    // Modulation bit counter bit 1
    obj.MOD2 = UCS.MOD2_t ...
    // Modulation bit counter bit 2
    obj.MOD3 = UCS.MOD3_t ...
    // Modulation bit counter bit 3
    obj.MOD4 = UCS.MOD4_t ...
    // Modulation bit counter bit 4
FIELDS
DCO — DCO tap selection.
MOD — Modulation bit counter.
struct UCS.UCSCTL1_t
index URL

Unified Clock System Control 1 Register

Configuration settings
var obj = new UCS.UCSCTL1_t;
    obj.DCORSEL = UCS.DCORSEL_t ...
    // DCO frequency range select. These bits select the DCO frequency range of operation defined in the device-specific datasheet
    obj.DISMOD = UCS.DISMOD_t ...
    // Modulation. This bit enables/disables the modulation. 0 Modulation enabled 1 Modulation disabled
FIELDS
DCORSEL — DCO frequency range select. These bits select the DCO frequency range of operation defined in the device-specific datasheet.
DISMOD — 0 Modulation enabled, 1 Modulation disabled.
struct UCS.UCSCTL2_t
index URL

Unified Clock System Control 2 Register

Configuration settings
var obj = new UCS.UCSCTL2_t;
    obj.FLLD = UCS.FLLD_t ...
    // FLL loop divider. These bits divide fDCOCLK in the FLL feedback loop. This results in an additional multiplier for the multiplier bits. See also multiplier bits. 000 fDCOCLK/1 001 fDCOCLK/2 010 fDCOCLK/4 011 fDCOCLK/8 100 fDCOCLK/16 101 fDCOCLK/32 110 Reserved for future use. Defaults to fDCOCLK/32 111 Reserved for future use. Defaults to fDCOCLK/32
    obj.FLLN0 = UCS.FLLN0_t ...
    // Multiplier bit 0
    obj.FLLN1 = UCS.FLLN1_t ...
    // Multiplier bit 1
    obj.FLLN2 = UCS.FLLN2_t ...
    // Multiplier bit 2
    obj.FLLN3 = UCS.FLLN3_t ...
    // Multiplier bit 3
    obj.FLLN4 = UCS.FLLN4_t ...
    // Multiplier bit 4
    obj.FLLN5 = UCS.FLLN5_t ...
    // Multiplier bit 5
    obj.FLLN6 = UCS.FLLN6_t ...
    // Multiplier bit 6
    obj.FLLN7 = UCS.FLLN7_t ...
    // Multiplier bit 7
    obj.FLLN8 = UCS.FLLN8_t ...
    // Multiplier bit 8
    obj.FLLN9 = UCS.FLLN9_t ...
    // Multiplier bit 9
FIELDS
FLLD — FLL loop divider. These bits divide fDCOCLK in the FLL feedback loop. This results in an additional multiplier for the multiplier bits.
FLLN — Multiplier bits. These bits set the multiplier value N of the DCO. N must be greater than 0. Writing zero to FLLN causes N to be set to 1.
struct UCS.UCSCTL3_t
index URL

Unified Clock System Control 3 Register

Configuration settings
var obj = new UCS.UCSCTL3_t;
    obj.SELREF = UCS.SELREF_t ...
    // FLL reference select. These bits select the FLL reference clock source. 000 XT1CLK 001 Reserved for future use. Defaults to XT1CLK. 010 REFOCLK 011 Reserved for future use. Defaults to REFOCLK. 100 Reserved for future use. Defaults to REFOCLK. 101 XT2CLK when available, otherwise REFOCLK. 110 Reserved for future use. XT2CLK when available, otherwise REFOCLK. 111 No selection. For the 'F543x and 'F541x non-A versions only, this defaults to XT2CLK. Reserved for future use. XT2CLK when available, otherwise REFOCLK
    obj.FLLREFDIV = UCS.FLLREFDIV_t ...
    // FLL reference divider. These bits define the divide factor for fFLLREFCLK. The divided frequency is used as the FLL reference frequency. 000 fFLLREFCLK/1 001 fFLLREFCLK/2 010 fFLLREFCLK/4 011 fFLLREFCLK/8 100 fFLLREFCLK/12 101 fFLLREFCLK/16 110 Reserved for future use. Defaults to fFLLREFCLK/16. 111 Reserved for future use. Defaults to fFLLREFCLK/16
FIELDS
SELREF — FLL reference select. These bits select the FLL reference clock source.
FLLREFDIV — FLL reference divider. These bits define the divide factor for fFLLREFCLK. The divided frequency is used as the FLL reference frequency.
struct UCS.UCSCTL4_t
index URL

Unified Clock System Control 4 Register

Configuration settings
var obj = new UCS.UCSCTL4_t;
    obj.SELA = UCS.SELA_t ...
    // Selects the ACLK source 000 XT1CLK 001 VLOCLK 010 REFOCLK 011 DCOCLK 100 DCOCLKDIV 101 XT2CLK when available, otherwise DCOCLKDIV 110 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. 111 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV
    obj.SELS = UCS.SELS_t ...
    // Selects the SMCLK source 000 XT1CLK 001 VLOCLK 010 REFOCLK 011 DCOCLK 100 DCOCLKDIV 101 XT2CLK when available, otherwise DCOCLKDIV 110 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. 111 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV
    obj.SELM = UCS.SELM_t ...
    // Selects the MCLK source 000 XT1CLK 001 VLOCLK 010 REFOCLK 011 DCOCLK 100 DCOCLKDIV 101 XT2CLK when available, otherwise DCOCLKDIV 110 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. 111 Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV
FIELDS
SELA — Selects the ACLK source
SELS — Selects the SMCLK source
SELM — Selects the MCLK source
struct UCS.UCSCTL5_t
index URL

Unified Clock System Control 5 Register

Configuration settings
var obj = new UCS.UCSCTL5_t;
    obj.DIVPA = UCS.DIVPA_t ...
    // ACLK source divider available at external pin. Divides the frequency of ACLK and presents it to an external pin. 000 fACLK/1 001 fACLK/2 010 fACLK/4 011 fACLK/8 100 fACLK/16 101 fACLK/32 110 Reserved for future use. Defaults to fACLK/32. 111 Reserved for future use. Defaults to fACLK/32
    obj.DIVA = UCS.DIVA_t ...
    // ACLK source divider. Divides the frequency of the ACLK clock source. 000 fACLK/1 001 fACLK/2 010 fACLK/4 011 fACLK/8 100 fACLK/16 101 fACLK/32 110 Reserved for future use. Defaults to fACLK/32. 111 Reserved for future use. Defaults to fACLK/32
    obj.DIVS = UCS.DIVS_t ...
    // SMCLK source divider 000 fSMCLK/1 001 fSMCLK/2 010 fSMCLK/4 011 fSMCLK/8 100 fSMCLK/16 101 fSMCLK/32 110 Reserved for future use. Defaults to fSMCLK/32. 111 Reserved for future use. Defaults to fSMCLK/32
    obj.DIVM = UCS.DIVM_t ...
    // MCLK source divider 000 fMCLK/1 001 fMCLK/2 010 fMCLK/4 011 fMCLK/8 100 fMCLK/16 101 fMCLK/32 110 Reserved for future use. Defaults to fMCLK/32. 111 Reserved for future use. Defaults to fMCLK/32
FIELDS
SELA — Selects the ACLK source
SELS — Selects the SMCLK source
SELM — Selects the MCLK source
struct UCS.UCSCTL6_t
index URL

Unified Clock System Control 6 Register

Configuration settings
var obj = new UCS.UCSCTL6_t;
    obj.XT2DRIVE = UCS.XT2DRIVE_t ...
    // The XT2 oscillator current can be adjusted to its drive needs. Initially, it starts with the highest supply current for reliable and quick startup. If needed, user software can reduce the drive strength. 00 Lowest current consumption. XT2 oscillator operating range is 4 MHz to 8 MHz. 01 Increased drive strength XT2 oscillator. XT2 oscillator operating range is 8 MHz to 16 MHz. 10 Increased drive capability XT2 oscillator. XT2 oscillator operating range is 16 MHz to 24 MHz. 11 Maximum drive capability and maximum current consumption for both XT2 oscillator. XT2 oscillator operating range is 24 MHz to 32 MHz
    obj.XT2BYPASS = UCS.XT2BYPASS_t ...
    // XT2 bypass select 0 XT2 sourced internally 1 XT2 sourced externally from pin
    obj.XT2OFF = UCS.XT2OFF_t ...
    // Turns off the XT2 oscillator 0 XT2 is on if XT2 is selected via the port selection and XT2 is not in bypass mode of operation. 1 XT2 is off if it is not used as a source for ACLK, MCLK, or SMCLK or is not used as a reference source required for FLL operation
    obj.XT1DRIVE = UCS.XT1DRIVE_t ...
    // The XT1 oscillator current can be adjusted to its drive needs. Initially, it starts with the highest supply current for reliable and quick startup. If needed, user software can reduce the drive strength. 00 Lowest current consumption for XT1 LF mode. XT1 oscillator operating range in HF mode is 4 MHz to 8 MHz. 01 Increased drive strength for XT1 LF mode. XT1 oscillator operating range in HF mode is 8 MHz to 16 MHz. 10 Increased drive capability for XT1 LF mode. XT1 oscillator operating range in HF mode is 16 MHz to 24 MHz. 11 Maximum drive capability and maximum current consumption for XT1 LF mode. XT1 oscillator operating range in HF mode is 24 MHz to 32 MHz
    obj.XTS = UCS.XTS_t ...
    // XT1 mode select 0 Low-frequency mode. XCAP bits define the capacitance at the XIN and XOUT pins. 1 High-frequency mode. XCAP bits are not used
    obj.XT1BYPASS = UCS.XT1BYPASS_t ...
    // XT1 bypass select 0 XT1 sourced internally 1 XT1 sourced externally from pin
    obj.XCAP = UCS.XCAP_t ...
   // Oscillator capacitor selection. These bits select the capacitors applied to the LF crystal or resonator in the LF
mode (XTS = 0). The effective capacitance (seen by the crystal) is Ceff (CXIN + 2 pF)/2. It is assumed that
CXIN = CXOUT and that a parasitic capacitance of 2 pF is added by the package and the printed circuit board. For
details about the typical internal and the effective capacitors, refer to the device-specific data sheet
    obj.SMCLKOFF = UCS.SMCLKOFF_t ...
    // SMCLK off. This bit turns off the SMCLK. 0 SMCLK on 1 SMCLK off
    obj.XT1OFF = UCS.XT1OFF_t ...
    // XT1 off. This bit turns off the XT1. 0 XT1 is on if XT1 is selected via the port selection and XT1 is not in bypass mode of operation. 1 XT1 is off if it is not used as a source for ACLK, MCLK, or SMCLK or is not used as a reference source required for FLL operation
FIELDS
SELA — Selects the ACLK source
SELS — Selects the SMCLK source
SELM — Selects the MCLK source
struct UCS.UCSCTL7_t
index URL

Unified Clock System Control 7 Register

Configuration settings
var obj = new UCS.UCSCTL7_t;
    obj.XT2OFFG = UCS.XT2OFFG_t ...
    // XT2 oscillator fault flag. If this bit is set, the OFIFG flag is also set. XT2OFFG is set if a XT2 fault condition exists. XT2OFFG can be cleared via software. If the XT2 fault condition still remains, XT2OFFG is set. 0 No fault condition occurred after the last reset. 1 XT2 fault. An XT2 fault occurred after the last reset
    obj.XT1HFOFFG = UCS.XT1HFOFFG_t ...
    // XT1 oscillator fault flag (HF mode). If this bit is set, the OFIFG flag is also set. XT1HFOFFG is set if a XT1 fault condition exists. XT1HFOFFG can be cleared via software. If the XT1 fault condition still remains, XT1HFOFFG is set. 0 No fault condition occurred after the last reset. 1 XT1 fault. An XT1 fault occurred after the last reset
    obj.XT1LFOFFG = UCS.XT1LFOFFG_t ...
    // XT1 oscillator fault flag (LF mode). If this bit is set, the OFIFG flag is also set. XT1LFOFFG is set if a XT1 fault condition exists. XT1LFOFFG can be cleared via software. If the XT1 fault condition still remains, XT1LFOFFG is set. 0 No fault condition occurred after the last reset. 1 XT1 fault (LF mode). A XT1 fault occurred after the last reset
    obj.DCOFFG = UCS.DCOFFG_t ...
    // DCO fault flag. If this bit is set, the OFIFG flag is also set. The DCOFFG bit is set if DCO = {0} or DCO = {31}. DCOFFG can be cleared via software. If the DCO fault condition still remains, DCOFFG is set. 0 No fault condition occurred after the last reset. 1 DCO fault. A DCO fault occurred after the last reset
FIELDS
XT2OFFG — 0 No fault condition, 1 XT2 fault
XT1HFOFFG — 0 No fault condition, 1 XT1 HF fault
XT1LFOFFG — 0 No fault condition, 1 XT1 LF fault
DCOFFG — 0 No fault condition, 1 DCO fault
struct UCS.UCSCTL8_t
index URL

Unified Clock System Control 8 Register

Configuration settings
var obj = new UCS.UCSCTL8_t;
    obj.MODOSCREQEN = UCS.MODOSCREQEN_t ...
    // MODOSC clock request enable. Setting this enables conditional module requests for MODOSC. 0 MODOSC conditional requests are disabled. 1 MODOSC conditional requests are enabled
    obj.SMCLKREQEN = UCS.SMCLKREQEN_t ...
    // SMCLK clock request enable. Setting this enables conditional module requests for SMCLK. 0 SMCLK conditional requests are disabled. 1 SMCLK conditional requests are enabled
    obj.MCLKREQEN = UCS.MCLKREQEN_t ...
    // MCLK clock request enable. Setting this enables conditional module requests for MCLK 0 MCLK conditional requests are disabled. 1 MCLK conditional requests are enabled
    obj.ACLKREQEN = UCS.ACLKREQEN_t ...
    // ACLK clock request enable. Setting this enables conditional module requests for ACLK 0 ACLK conditional requests are disabled. 1 ACLK conditional requests are enabled
FIELDS
MODOSCREQEN — 0 MODOSC conditional requests are disabled 1 MODOSC conditional requests are enabled
SMCLKREQEN — 0 SMCLK conditional requests are disabled 1 SMCLK conditional requests are enabled
MCLKREQEN — 0 MCLK conditional requests are disabled 1 MCLK conditional requests are enabled
ACLKREQEN — 0 ACLK conditional requests are disabled 1 ACLK conditional requests are enabled
struct UCS.UCSCTL9_t
index URL

Unified Clock System Control 9 Register

Configuration settings
var obj = new UCS.UCSCTL9_t;
    obj.XT2BYPASSLV = UCS.XT2BYPASSLV_t ...
    // Selects XT2 bypass input swing level. Must be set for reduced swing operation. 0 Input range from 0 to DVCC 1 Input range from 0 to DVIO
    obj.XT1BYPASSLV = UCS.XT1BYPASSLV_t ...
    // Selects XT1 bypass input swing level. Must be set for reduced swing operation. 0 Input range from 0 to DVCC 1 Input range from 0 to DVIO
FIELDS
XT2BYPASSLV — 0 Input range from 0 to DVCC 1 Input range from 0 to DVIO
XT1BYPASSLV — 0 Input range from 0 to DVCC 1 Input range from 0 to DVIO
UCS.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
UCS.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
UCS.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
UCS.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new UCS.Params;
// Instance config-params object
    params.ACLKHz = Float undefined;
    // ACLK frequency in Hertz
    params.DCOCLKDIVHz = Float undefined;
    // Divided DCO clock frequency in Hertz
    params.DCOCLKHz = Float 1000000;
    // DCO clock frequency in Hertz
    params.MCLKHz = Float undefined;
    // MCLK frequency in Hertz
    params.REFOCLKHz = Float 32768;
    //
    params.SMCLKHz = Float undefined;
    // SMCLK frequency in Hertz
    params.UCSCTL0 = UCS.UCSCTL0_t {
    // Unified Clock System Control 0 Register
        DCO0: UCS.DCO0_OFF,
        DCO1: UCS.DCO1_OFF,
        DCO2: UCS.DCO2_OFF,
        DCO3: UCS.DCO3_OFF,
        DCO4: UCS.DCO4_OFF,
        MOD0: UCS.MOD0_OFF,
        MOD1: UCS.MOD1_OFF,
        MOD2: UCS.MOD2_OFF,
        MOD3: UCS.MOD3_OFF,
        MOD4: UCS.MOD4_OFF
    };
    params.UCSCTL1 = UCS.UCSCTL1_t {
    // Unified Clock System Control 1 Register
        DCORSEL: UCS.DCORSEL_2,
        DISMOD: UCS.DISMOD_OFF
    };
    params.UCSCTL2 = UCS.UCSCTL2_t {
    // Unified Clock System Control 2 Register
        FLLD: UCS.FLLD_1,
        FLLN0: UCS.FLLN0,
        FLLN1: UCS.FLLN1,
        FLLN2: UCS.FLLN2,
        FLLN3: UCS.FLLN3,
        FLLN4: UCS.FLLN4,
        FLLN5: UCS.FLLN5_OFF,
        FLLN6: UCS.FLLN6_OFF,
        FLLN7: UCS.FLLN7_OFF,
        FLLN8: UCS.FLLN8_OFF,
        FLLN9: UCS.FLLN9_OFF
    };
    params.UCSCTL3 = UCS.UCSCTL3_t {
    // Unified Clock System Control 3 Register
        SELREF: UCS.SELREF_0,
        FLLREFDIV: UCS.FLLREFDIV_0
    };
    params.UCSCTL4 = UCS.UCSCTL4_t {
    // Unified Clock System Control 4 Register
        SELA: UCS.SELA_0,
        SELS: UCS.SELS_4,
        SELM: UCS.SELM_4
    };
    params.UCSCTL5 = UCS.UCSCTL5_t {
    // Unified Clock System Control 5 Register
        DIVPA: UCS.DIVPA_0,
        DIVA: UCS.DIVA_0,
        DIVS: UCS.DIVS_0,
        DIVM: UCS.DIVM_0
    };
    params.UCSCTL6 = UCS.UCSCTL6_t {
    // Unified Clock System Control 6 Register
        XT2DRIVE: UCS.XT2DRIVE_3,
        XT2BYPASS: UCS.XT2BYPASS_OFF,
        XT2OFF: UCS.XT2OFF,
        XT1DRIVE: UCS.XT1DRIVE_3,
        XTS: UCS.XTS,
        XT1BYPASS: UCS.XT1BYPASS,
        XCAP: UCS.XCAP_3,
        SMCLKOFF: UCS.SMCLKOFF_OFF,
        XT1OFF: UCS.XT1OFF
    };
    params.UCSCTL7 = UCS.UCSCTL7_t {
    // Unified Clock System Control 7 Register
        XT2OFFG: UCS.XT2OFFG_OFF,
        XT1HFOFFG: UCS.XT1HFOFFG_OFF,
        XT1LFOFFG: UCS.XT1LFOFFG,
        DCOFFG: UCS.DCOFFG
    };
    params.UCSCTL8 = UCS.UCSCTL8_t {
    // Unified Clock System Control 8 Register
        MODOSCREQEN: UCS.MODOSCREQEN_OFF,
        SMCLKREQEN: UCS.SMCLKREQEN,
        MCLKREQEN: UCS.MCLKREQEN,
        ACLKREQEN: UCS.ACLKREQEN
    };
    params.UCSCTL9 = UCS.UCSCTL9_t {
    // Unified Clock System Control 9 Register
        XT2BYPASSLV: UCS.XT2BYPASSLV_OFF,
        XT1BYPASSLV: UCS.XT1BYPASSLV_OFF
    };
    params.UCS_ACLKREQEN = UCS.ACLKREQEN_t UCS.ACLKREQEN;
    // ACLK clock request enable. Setting this enables conditional module requests for ACLK 0 ACLK conditional requests are disabled. 1 ACLK conditional requests are enabled
    params.UCS_ACLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_XT1CLK_SELECT;
    // ACLK clock source select
    params.UCS_ACLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
    // ACLK clock source divider select
    params.UCS_FLL_FREQ = Float 0;
    // Set FLL target frequency
    params.UCS_FLL_RATIO = UInt 31;
    // FLLN value
    params.UCS_FLL_REF_CLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_XT1CLK_SELECT;
    // FLL reference clock source select
    params.UCS_FLL_REF_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
    // FLL reference clock source divider select
    params.UCS_MCLKREQEN = UCS.MCLKREQEN_t UCS.MCLKREQEN;
    // MCLK clock request enable. Setting this enables conditional module requests for MCLK 0 MCLK conditional requests are disabled. 1 MCLK conditional requests are enabled
    params.UCS_MCLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_DCOCLKDIV_SELECT;
    // MCLK clock source select
    params.UCS_MCLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
    // MCLK clock source divider select
    params.UCS_MODOSCREQEN = UCS.MODOSCREQEN_t UCS.MODOSCREQEN_OFF;
    // MODOSC clock request enable. Setting this enables conditional module requests for MODOSC. 0 MODOSC conditional requests are disabled. 1 MODOSC conditional requests are enabled
    params.UCS_PACLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
    // External pin ACLK clock source divider select
    params.UCS_SMCLKOFF = Bool false;
    // Turns OFF SMCLK using the SMCLKOFF bit 0 SMCLK On 1 SMCLK Off
    params.UCS_SMCLKREQEN = UCS.SMCLKREQEN_t UCS.SMCLKREQEN;
    // SMCLK clock request enable. Setting this enables conditional module requests for SMCLK. 0 SMCLK conditional requests are disabled. 1 SMCLK conditional requests are enabled
    params.UCS_SMCLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_DCOCLKDIV_SELECT;
    // SMCLK clock source select
    params.UCS_SMCLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
    // SMCLK clock source divider select
    params.UCS_XCAP = UCS.UCS_XCAP_t UCS.UCS_XCAP_3;
    // Set oscillator capacitor. Available only in LF mode. See device-specific datasheet for actual values
    params.UCS_XT1BYPASS = Bool false;
    // Set XT1 in bypass mode. The frequency input at XIN1 pin requires 0 to VCC
    params.UCS_XT1_DRIVE = UCS.XT1DRIVE_t UCS.XT1DRIVE_3;
    // Set XT1 drive strength
    params.UCS_XT2BYPASS = Bool false;
    // Set XT2 in bypass mode. The frequency input at XIN2 pin requires 0 to VCC
    params.UCS_XT2_DRIVE = UCS.XT2DRIVE_t UCS.XT2DRIVE_3;
    // Set XT2 drive strength
    params.VLOCLKHz = Float 12000;
    //
    params.WATCHCRYSTALCLKHz = Float 32768;
    //
    params.XT1CLKHz = Float 0;
    //
    params.XT2CLKHz = Float 0;
    //
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = UCS.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCS_SMCLKREQEN",
            regForceSet: false
        },
        {
            register: "UCS_MCLKREQEN",
            regForceSet: false
        },
        {
            register: "UCS_ACLKREQEN",
            regForceSet: false
        },
        {
            register: "UCS_MODOSCREQEN",
            regForceSet: false
        }
    ];
    params.hasAllCal = Bool false;
    // Specify if device has all calibration constants
    params.hasHFXT1 = Bool false;
    // Specify if HFXT1 is available on the device
    params.hasRosc = Bool false;
    // Specify if Rosc is available on the device
    params.hasVLO = Bool false;
    // Specify if VLO is available on the device
    params.hasXT2 = Bool false;
    // Specify if XT2 is available on the device
    params.maxCpuFrequency = Float 0;
    // Maximum CPU frequency in Hertz
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config UCS.Params.ACLKHz // instance
index URL

ACLK frequency in Hertz

Configuration settings
var params = new UCS.Params;
...
const params.ACLKHz = Float computed value;
config UCS.Params.DCOCLKDIVHz // instance
index URL

Divided DCO clock frequency in Hertz

Configuration settings
var params = new UCS.Params;
...
const params.DCOCLKDIVHz = Float computed value;
config UCS.Params.DCOCLKHz // instance
index URL

DCO clock frequency in Hertz

Configuration settings
var params = new UCS.Params;
...
const params.DCOCLKHz = Float 1000000;
config UCS.Params.MCLKHz // instance
index URL

MCLK frequency in Hertz

Configuration settings
var params = new UCS.Params;
...
const params.MCLKHz = Float computed value;
config UCS.Params.REFOCLKHz // instance
index URL
Configuration settings
var params = new UCS.Params;
...
params.REFOCLKHz = Float 32768;
config UCS.Params.SMCLKHz // instance
index URL

SMCLK frequency in Hertz

Configuration settings
var params = new UCS.Params;
...
const params.SMCLKHz = Float computed value;
config UCS.Params.UCSCTL0 // instance
index URL

Unified Clock System Control 0 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL0 = UCS.UCSCTL0_t {
    DCO0: UCS.DCO0_OFF,
    DCO1: UCS.DCO1_OFF,
    DCO2: UCS.DCO2_OFF,
    DCO3: UCS.DCO3_OFF,
    DCO4: UCS.DCO4_OFF,
    MOD0: UCS.MOD0_OFF,
    MOD1: UCS.MOD1_OFF,
    MOD2: UCS.MOD2_OFF,
    MOD3: UCS.MOD3_OFF,
    MOD4: UCS.MOD4_OFF
};
config UCS.Params.UCSCTL1 // instance
index URL

Unified Clock System Control 1 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL1 = UCS.UCSCTL1_t {
    DCORSEL: UCS.DCORSEL_2,
    DISMOD: UCS.DISMOD_OFF
};
config UCS.Params.UCSCTL2 // instance
index URL

Unified Clock System Control 2 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL2 = UCS.UCSCTL2_t {
    FLLD: UCS.FLLD_1,
    FLLN0: UCS.FLLN0,
    FLLN1: UCS.FLLN1,
    FLLN2: UCS.FLLN2,
    FLLN3: UCS.FLLN3,
    FLLN4: UCS.FLLN4,
    FLLN5: UCS.FLLN5_OFF,
    FLLN6: UCS.FLLN6_OFF,
    FLLN7: UCS.FLLN7_OFF,
    FLLN8: UCS.FLLN8_OFF,
    FLLN9: UCS.FLLN9_OFF
};
config UCS.Params.UCSCTL3 // instance
index URL

Unified Clock System Control 3 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL3 = UCS.UCSCTL3_t {
    SELREF: UCS.SELREF_0,
    FLLREFDIV: UCS.FLLREFDIV_0
};
config UCS.Params.UCSCTL4 // instance
index URL

Unified Clock System Control 4 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL4 = UCS.UCSCTL4_t {
    SELA: UCS.SELA_0,
    SELS: UCS.SELS_4,
    SELM: UCS.SELM_4
};
config UCS.Params.UCSCTL5 // instance
index URL

Unified Clock System Control 5 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL5 = UCS.UCSCTL5_t {
    DIVPA: UCS.DIVPA_0,
    DIVA: UCS.DIVA_0,
    DIVS: UCS.DIVS_0,
    DIVM: UCS.DIVM_0
};
config UCS.Params.UCSCTL6 // instance
index URL

Unified Clock System Control 6 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL6 = UCS.UCSCTL6_t {
    XT2DRIVE: UCS.XT2DRIVE_3,
    XT2BYPASS: UCS.XT2BYPASS_OFF,
    XT2OFF: UCS.XT2OFF,
    XT1DRIVE: UCS.XT1DRIVE_3,
    XTS: UCS.XTS,
    XT1BYPASS: UCS.XT1BYPASS,
    XCAP: UCS.XCAP_3,
    SMCLKOFF: UCS.SMCLKOFF_OFF,
    XT1OFF: UCS.XT1OFF
};
config UCS.Params.UCSCTL7 // instance
index URL

Unified Clock System Control 7 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL7 = UCS.UCSCTL7_t {
    XT2OFFG: UCS.XT2OFFG_OFF,
    XT1HFOFFG: UCS.XT1HFOFFG_OFF,
    XT1LFOFFG: UCS.XT1LFOFFG,
    DCOFFG: UCS.DCOFFG
};
config UCS.Params.UCSCTL8 // instance
index URL

Unified Clock System Control 8 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL8 = UCS.UCSCTL8_t {
    MODOSCREQEN: UCS.MODOSCREQEN_OFF,
    SMCLKREQEN: UCS.SMCLKREQEN,
    MCLKREQEN: UCS.MCLKREQEN,
    ACLKREQEN: UCS.ACLKREQEN
};
config UCS.Params.UCSCTL9 // instance
index URL

Unified Clock System Control 9 Register

Configuration settings
var params = new UCS.Params;
...
params.UCSCTL9 = UCS.UCSCTL9_t {
    XT2BYPASSLV: UCS.XT2BYPASSLV_OFF,
    XT1BYPASSLV: UCS.XT1BYPASSLV_OFF
};
config UCS.Params.UCS_ACLKREQEN // instance
index URL

ACLK clock request enable. Setting this enables conditional module requests for ACLK 0 ACLK conditional requests are disabled. 1 ACLK conditional requests are enabled

Configuration settings
var params = new UCS.Params;
...
params.UCS_ACLKREQEN = UCS.ACLKREQEN_t UCS.ACLKREQEN;
config UCS.Params.UCS_ACLK_SOURCE // instance
index URL

ACLK clock source select

Configuration settings
var params = new UCS.Params;
...
params.UCS_ACLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_XT1CLK_SELECT;
config UCS.Params.UCS_ACLK_SRC_DIVIDER // instance
index URL

ACLK clock source divider select

Configuration settings
var params = new UCS.Params;
...
params.UCS_ACLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
config UCS.Params.UCS_FLL_FREQ // instance
index URL

Set FLL target frequency

Configuration settings
var params = new UCS.Params;
...
params.UCS_FLL_FREQ = Float 0;
config UCS.Params.UCS_FLL_RATIO // instance
index URL

FLLN value

Configuration settings
var params = new UCS.Params;
...
params.UCS_FLL_RATIO = UInt 31;
config UCS.Params.UCS_FLL_REF_CLK_SOURCE // instance
index URL

FLL reference clock source select

Configuration settings
var params = new UCS.Params;
...
params.UCS_FLL_REF_CLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_XT1CLK_SELECT;
config UCS.Params.UCS_FLL_REF_SRC_DIVIDER // instance
index URL

FLL reference clock source divider select

Configuration settings
var params = new UCS.Params;
...
params.UCS_FLL_REF_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
config UCS.Params.UCS_MCLKREQEN // instance
index URL

MCLK clock request enable. Setting this enables conditional module requests for MCLK 0 MCLK conditional requests are disabled. 1 MCLK conditional requests are enabled

Configuration settings
var params = new UCS.Params;
...
params.UCS_MCLKREQEN = UCS.MCLKREQEN_t UCS.MCLKREQEN;
config UCS.Params.UCS_MCLK_SOURCE // instance
index URL

MCLK clock source select

Configuration settings
var params = new UCS.Params;
...
params.UCS_MCLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_DCOCLKDIV_SELECT;
config UCS.Params.UCS_MCLK_SRC_DIVIDER // instance
index URL

MCLK clock source divider select

Configuration settings
var params = new UCS.Params;
...
params.UCS_MCLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
config UCS.Params.UCS_MODOSCREQEN // instance
index URL

MODOSC clock request enable. Setting this enables conditional module requests for MODOSC. 0 MODOSC conditional requests are disabled. 1 MODOSC conditional requests are enabled

Configuration settings
var params = new UCS.Params;
...
params.UCS_MODOSCREQEN = UCS.MODOSCREQEN_t UCS.MODOSCREQEN_OFF;
config UCS.Params.UCS_PACLK_SRC_DIVIDER // instance
index URL

External pin ACLK clock source divider select

Configuration settings
var params = new UCS.Params;
...
params.UCS_PACLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
config UCS.Params.UCS_SMCLKOFF // instance
index URL

Turns OFF SMCLK using the SMCLKOFF bit 0 SMCLK On 1 SMCLK Off

Configuration settings
var params = new UCS.Params;
...
params.UCS_SMCLKOFF = Bool false;
config UCS.Params.UCS_SMCLKREQEN // instance
index URL

SMCLK clock request enable. Setting this enables conditional module requests for SMCLK. 0 SMCLK conditional requests are disabled. 1 SMCLK conditional requests are enabled

Configuration settings
var params = new UCS.Params;
...
params.UCS_SMCLKREQEN = UCS.SMCLKREQEN_t UCS.SMCLKREQEN;
config UCS.Params.UCS_SMCLK_SOURCE // instance
index URL

SMCLK clock source select

Configuration settings
var params = new UCS.Params;
...
params.UCS_SMCLK_SOURCE = UCS.UCS_CLK_SOURCE_t UCS.UCS_DCOCLKDIV_SELECT;
config UCS.Params.UCS_SMCLK_SRC_DIVIDER // instance
index URL

SMCLK clock source divider select

Configuration settings
var params = new UCS.Params;
...
params.UCS_SMCLK_SRC_DIVIDER = UCS.UCS_CLK_SRC_DIVIDER_t UCS.UCS_CLOCK_DIVIDER_1;
config UCS.Params.UCS_XCAP // instance
index URL

Set oscillator capacitor. Available only in LF mode. See device-specific datasheet for actual values

Configuration settings
var params = new UCS.Params;
...
params.UCS_XCAP = UCS.UCS_XCAP_t UCS.UCS_XCAP_3;
config UCS.Params.UCS_XT1BYPASS // instance
index URL

Set XT1 in bypass mode. The frequency input at XIN1 pin requires 0 to VCC

Configuration settings
var params = new UCS.Params;
...
params.UCS_XT1BYPASS = Bool false;
config UCS.Params.UCS_XT1_DRIVE // instance
index URL

Set XT1 drive strength

Configuration settings
var params = new UCS.Params;
...
params.UCS_XT1_DRIVE = UCS.XT1DRIVE_t UCS.XT1DRIVE_3;
config UCS.Params.UCS_XT2BYPASS // instance
index URL

Set XT2 in bypass mode. The frequency input at XIN2 pin requires 0 to VCC

Configuration settings
var params = new UCS.Params;
...
params.UCS_XT2BYPASS = Bool false;
config UCS.Params.UCS_XT2_DRIVE // instance
index URL

Set XT2 drive strength

Configuration settings
var params = new UCS.Params;
...
params.UCS_XT2_DRIVE = UCS.XT2DRIVE_t UCS.XT2DRIVE_3;
config UCS.Params.VLOCLKHz // instance
index URL
Configuration settings
var params = new UCS.Params;
...
params.VLOCLKHz = Float 12000;
config UCS.Params.WATCHCRYSTALCLKHz // instance
index URL
Configuration settings
var params = new UCS.Params;
...
params.WATCHCRYSTALCLKHz = Float 32768;
config UCS.Params.XT1CLKHz // instance
index URL
Configuration settings
var params = new UCS.Params;
...
params.XT1CLKHz = Float 0;
config UCS.Params.XT2CLKHz // instance
index URL
Configuration settings
var params = new UCS.Params;
...
params.XT2CLKHz = Float 0;
config UCS.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new UCS.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config UCS.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new UCS.Params;
...
const params.forceSetDefaultRegister = UCS.ForceSetDefaultRegister_t[] [
    {
        register: "UCS_SMCLKREQEN",
        regForceSet: false
    },
    {
        register: "UCS_MCLKREQEN",
        regForceSet: false
    },
    {
        register: "UCS_ACLKREQEN",
        regForceSet: false
    },
    {
        register: "UCS_MODOSCREQEN",
        regForceSet: false
    }
];
config UCS.Params.hasAllCal // instance
index URL

Specify if device has all calibration constants

Configuration settings
var params = new UCS.Params;
...
params.hasAllCal = Bool false;
DETAILS
G1 devices do not.
config UCS.Params.hasHFXT1 // instance
index URL

Specify if HFXT1 is available on the device

Configuration settings
var params = new UCS.Params;
...
params.hasHFXT1 = Bool false;
DETAILS
Not all devices have high frequency clock. This specifies if it is available for a particular device.
config UCS.Params.hasRosc // instance
index URL

Specify if Rosc is available on the device

Configuration settings
var params = new UCS.Params;
...
params.hasRosc = Bool false;
DETAILS
Not all devices have Rosc circuitry. This specifies if it is available for a particular device.
config UCS.Params.hasVLO // instance
index URL

Specify if VLO is available on the device

Configuration settings
var params = new UCS.Params;
...
params.hasVLO = Bool false;
DETAILS
Not all devices have very low frequency clock VLO. This specifies if it is available for a particular device.
config UCS.Params.hasXT2 // instance
index URL

Specify if XT2 is available on the device

Configuration settings
var params = new UCS.Params;
...
params.hasXT2 = Bool false;
DETAILS
Not all devices have XT2 clock available. This specifies if it is available for a particular device.
config UCS.Params.maxCpuFrequency // instance
index URL

Maximum CPU frequency in Hertz

Configuration settings
var params = new UCS.Params;
...
params.maxCpuFrequency = Float 0;
config UCS.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new UCS.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config UCS.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new UCS.Params;
...
params.owner = String undefined;
UCS.computeDCOCLKHz() // instance
index URL

Initialize to the nearest available DCO clock frequency

Configuration settings
inst.computeDCOCLKHz(Float DCOCLKHz) returns Void
generated on Sun, 25 Nov 2018 22:20:01 GMT


package ti.catalog.msp430.peripherals.communication
index URL

MSP430 USCI peripherals

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/package.xdc
requires ti.catalog.msp430.peripherals.clock;
package ti.catalog.msp430.peripherals.communication [1, 0, 0] {
    interface IEUSCI;
    // Enhanced Universal Serial Communication Interface
    interface IUSCI;
    // Universal Serial Communication Interface
    interface IUSCI_A0_SPI;
    // Universal Serial Communication Interface A0 SPI 2xx
    interface IUSCI_A0_UART;
    // Universal Serial Communication Interface A0 UART 2xx
    interface IUSCI_A1_SPI;
    // Universal Serial Communication Interface A1 SPI 2xx
    interface IUSCI_A1_UART;
    // Universal Serial Communication Interface A1 UART 2xx
    interface IUSCI_B0_I2C;
    // Universal Serial Communication Interface B0 I2C 2xx
    interface IUSCI_B0_SPI;
    // Universal Serial Communication Interface B0 SPI 2xx
    interface IUSCI_B1_I2C;
    // Universal Serial Communication Interface B1 I2C 2xx
    interface IUSCI_B1_SPI;
    // Universal Serial Communication Interface B1 SPI 2xx
    interface IUSCI_I2C;
    // Universal Serial Communication Interface
    interface IUSCI_SPI;
    // Universal Serial Communication Interface
    interface IUSCI_UART;
    // Universal Serial Communication Interface
    interface IUSI;
    // Universal Serial Interface
    module EUSCI_A0;
    // Enhanced Univerisal Serial Communication Interface A0
    module EUSCI_A1;
    // Enhanced Univerisal Serial Communication Interface A1
    module EUSCI_B0;
    // Enhanced Univerisal Serial Communication Interface B0
    module USCI_A0_SPI_2xx;
    // Universal Serial Communication Interface A0 SPI 2xx
    module USCI_A0_UART_2xx;
    // Universal Serial Communication Interface A0 UART 2xx
    module USCI_A1_SPI_2xx;
    // Universal Serial Communication Interface A1 SPI 2xx
    module USCI_A1_UART_2xx;
    // Universal Serial Communication Interface
    module USCI_B0_I2C_2xx;
    // Universal Serial Communication Interface B0 I2C 2xx
    module USCI_B0_SPI_2xx;
    // Universal Serial Communication Interface B0 SPI 2xx
    module USCI_B1_I2C_2xx;
    // Universal Serial Communication Interface B1 I2C 2xx
    module USCI_B1_SPI_2xx;
    // Universal Serial Communication Interface B1 SPI 2xx
    module USI;
    // Universal Serial Interface
}
generated on Sun, 25 Nov 2018 22:20:11 GMT


module ti.catalog.msp430.peripherals.communication.EUSCI_A0

metaonly module ti.catalog.msp430.peripherals.communication.EUSCI_A0
index URL

Enhanced Univerisal Serial Communication Interface A0

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/EUSCI_A0.xdc
var EUSCI_A0 = xdc.useModule('ti.catalog.msp430.peripherals.communication.EUSCI_A0');
module-wide constants & types
    var obj = new EUSCI_A0.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new EUSCI_A0.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     EUSCI_A0.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     EUSCI_A0.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new EUSCI_A0.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = EUSCI_A0.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// USI interrupt enables = EUSCI_A0.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = EUSCI_A0.create// Create an instance-object(IClock.Instance clock, params);
struct EUSCI_A0.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new EUSCI_A0.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct EUSCI_A0.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new EUSCI_A0.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
EUSCI_A0.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
EUSCI_A0.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
EUSCI_A0.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
EUSCI_A0.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new EUSCI_A0.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = EUSCI_A0.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = EUSCI_A0.regIntVect_t[2] undefined;
    // USI interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config EUSCI_A0.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new EUSCI_A0.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config EUSCI_A0.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new EUSCI_A0.Params;
...
const params.forceSetDefaultRegister = EUSCI_A0.ForceSetDefaultRegister_t[] [ ];
config EUSCI_A0.Params.interruptSource // instance
index URL

USI interrupt enables

Configuration settings
var params = new EUSCI_A0.Params;
...
params.interruptSource = EUSCI_A0.regIntVect_t[2] undefined;
config EUSCI_A0.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new EUSCI_A0.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config EUSCI_A0.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new EUSCI_A0.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new EUSCI_A0.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = EUSCI_A0.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:08 GMT


module ti.catalog.msp430.peripherals.communication.EUSCI_A1

metaonly module ti.catalog.msp430.peripherals.communication.EUSCI_A1
index URL

Enhanced Univerisal Serial Communication Interface A1

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/EUSCI_A1.xdc
var EUSCI_A1 = xdc.useModule('ti.catalog.msp430.peripherals.communication.EUSCI_A1');
module-wide constants & types
    var obj = new EUSCI_A1.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new EUSCI_A1.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     EUSCI_A1.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     EUSCI_A1.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new EUSCI_A1.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = EUSCI_A1.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// USI interrupt enables = EUSCI_A1.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = EUSCI_A1.create// Create an instance-object(IClock.Instance clock, params);
struct EUSCI_A1.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new EUSCI_A1.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct EUSCI_A1.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new EUSCI_A1.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
EUSCI_A1.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
EUSCI_A1.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
EUSCI_A1.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
EUSCI_A1.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new EUSCI_A1.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = EUSCI_A1.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = EUSCI_A1.regIntVect_t[2] undefined;
    // USI interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config EUSCI_A1.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new EUSCI_A1.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config EUSCI_A1.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new EUSCI_A1.Params;
...
const params.forceSetDefaultRegister = EUSCI_A1.ForceSetDefaultRegister_t[] [ ];
config EUSCI_A1.Params.interruptSource // instance
index URL

USI interrupt enables

Configuration settings
var params = new EUSCI_A1.Params;
...
params.interruptSource = EUSCI_A1.regIntVect_t[2] undefined;
config EUSCI_A1.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new EUSCI_A1.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config EUSCI_A1.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new EUSCI_A1.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new EUSCI_A1.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = EUSCI_A1.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:08 GMT


module ti.catalog.msp430.peripherals.communication.EUSCI_B0

metaonly module ti.catalog.msp430.peripherals.communication.EUSCI_B0
index URL

Enhanced Univerisal Serial Communication Interface B0

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/EUSCI_B0.xdc
var EUSCI_B0 = xdc.useModule('ti.catalog.msp430.peripherals.communication.EUSCI_B0');
module-wide constants & types
    var obj = new EUSCI_B0.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new EUSCI_B0.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     EUSCI_B0.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     EUSCI_B0.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new EUSCI_B0.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = EUSCI_B0.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// USI interrupt enables = EUSCI_B0.regIntVect_t[13] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = EUSCI_B0.create// Create an instance-object(IClock.Instance clock, params);
struct EUSCI_B0.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new EUSCI_B0.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct EUSCI_B0.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new EUSCI_B0.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
EUSCI_B0.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
EUSCI_B0.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
EUSCI_B0.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
EUSCI_B0.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new EUSCI_B0.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = EUSCI_B0.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = EUSCI_B0.regIntVect_t[13] undefined;
    // USI interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config EUSCI_B0.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new EUSCI_B0.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config EUSCI_B0.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new EUSCI_B0.Params;
...
const params.forceSetDefaultRegister = EUSCI_B0.ForceSetDefaultRegister_t[] [ ];
config EUSCI_B0.Params.interruptSource // instance
index URL

USI interrupt enables

Configuration settings
var params = new EUSCI_B0.Params;
...
params.interruptSource = EUSCI_B0.regIntVect_t[13] undefined;
config EUSCI_B0.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new EUSCI_B0.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config EUSCI_B0.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new EUSCI_B0.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new EUSCI_B0.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = EUSCI_B0.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:08 GMT


interface ti.catalog.msp430.peripherals.communication.IEUSCI

metaonly interface ti.catalog.msp430.peripherals.communication.IEUSCI
index URL

Enhanced Universal Serial Communication Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
metaonly interface IEUSCI { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IEUSCI inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IEUSCI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IEUSCI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
typedef String StringArray[];
struct IEUSCI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IEUSCI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IEUSCI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IEUSCI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IEUSCI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IEUSCI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IEUSCI.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:05 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI
index URL

Universal Serial Communication Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
metaonly interface IUSCI { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI inherits IPeripheral {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
typedef String StringArray[];
struct IUSCI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
config Float UCLKHz = 1000000;
config IUSCI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
config String owner;
IUSCI.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:05 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_A0_SPI

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_A0_SPI
index URL

Universal Serial Communication Interface A0 SPI 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
metaonly interface IUSCI_A0_SPI { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_SPI
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_A0_SPI inherits IUSCI_SPI {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCCKPH_t// Clock phase select {
         UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge,
         UCCKPH// Data is captured on the first UCLK edge and changed on the following edge
    };
    enum UCCKPL_t// Clock polarity select {
         UCCKPL_OFF// Inactive state is low,
         UCCKPL// Inactive state is high
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// NA,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_SPI.UCCKPH_t UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge;
         IUSCI_SPI.UCCKPL_t UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high;
         IUSCI_SPI.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_SPI.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_SPI.UCMST_t UCMST// Master mode select 0 Slave mode 1 Master mode;
         IUSCI_SPI.UCMODE_SYNC_t UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode;
         IUSCI_SPI.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_SPI.UCSSEL_SPI_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_SPI.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_SPI.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_SPI.UCFE_t UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred;
         IUSCI_SPI.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_SPI.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Bits8 UCA0BR0// Bit Rate Control Register 0 = 0;
    config Bits8 UCA0BR1// Bit Rate Control Register 1 = 0;
    config IUSCI_A0_SPI.UCxCTL0_t UCA0CTL0// Control Register 0 = {
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    config IUSCI_A0_SPI.UCxCTL1_t UCA0CTL1// Control Register 1 = {
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    config Bits8 UCA0RXBUF// Receive Buffer Register = 0;
    config IUSCI_A0_SPI.UCxSTAT_t UCA0STAT// Status Register = {
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    config Bits8 UCA0TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_A0_SPI.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_A0_SPI.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_A0_SPI.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_A0_SPI.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_A0_SPI.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_A0_SPI.UCCKPH_t
index URL

Clock phase select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCCKPH_t {
    UCCKPH_OFF,
    // Data is changed on the first UCLK edge and captured on the following edge
    UCCKPH
    // Data is captured on the first UCLK edge and changed on the following edge
};
enum IUSCI_A0_SPI.UCCKPL_t
index URL

Clock polarity select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCCKPL_t {
    UCCKPL_OFF,
    // Inactive state is low
    UCCKPL
    // Inactive state is high
};
enum IUSCI_A0_SPI.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_A0_SPI.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_A0_SPI.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_A0_SPI.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_A0_SPI.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_A0_SPI.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_A0_SPI.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_A0_SPI.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_A0_SPI.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_A0_SPI.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_A0_SPI.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_A0_SPI.UCSSEL_SPI_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCSSEL_SPI_t {
    UCSSEL_0,
    // NA
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_A0_SPI.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_A0_SPI.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_A0_SPI.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_A0_SPI.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_A0_SPI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_A0_SPI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
typedef String StringArray[];
struct IUSCI_A0_SPI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_A0_SPI.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
metaonly struct UCxCTL0_t {
     IUSCI_SPI.UCCKPH_t UCCKPH;
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
     IUSCI_SPI.UCCKPL_t UCCKPL;
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
     IUSCI_SPI.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_SPI.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_SPI.UCMST_t UCMST;
    // Master mode select 0 Slave mode 1 Master mode
     IUSCI_SPI.UCMODE_SYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
     IUSCI_SPI.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_A0_SPI.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
metaonly struct UCxCTL1_t {
     IUSCI_SPI.UCSSEL_SPI_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_SPI.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_A0_SPI.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
metaonly struct UCxSTAT_t {
     IUSCI_SPI.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_SPI.UCFE_t UCFE;
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
     IUSCI_SPI.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_SPI.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_A0_SPI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_A0_SPI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_A0_SPI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_A0_SPI.Params.UCA0BR0 // instance
index URL

Bit Rate Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config Bits8 UCA0BR0 = 0;
config IUSCI_A0_SPI.Params.UCA0BR1 // instance
index URL

Bit Rate Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config Bits8 UCA0BR1 = 0;
config IUSCI_A0_SPI.Params.UCA0CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config IUSCI_A0_SPI.UCxCTL0_t UCA0CTL0 = {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config IUSCI_A0_SPI.Params.UCA0CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config IUSCI_A0_SPI.UCxCTL1_t UCA0CTL1 = {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_A0_SPI.Params.UCA0RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config Bits8 UCA0RXBUF = 0;
config IUSCI_A0_SPI.Params.UCA0STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config IUSCI_A0_SPI.UCxSTAT_t UCA0STAT = {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config IUSCI_A0_SPI.Params.UCA0TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config Bits8 UCA0TXBUF = 0;
config IUSCI_A0_SPI.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config Float UCLKHz = 1000000;
config IUSCI_A0_SPI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_A0_SPI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
config String owner;
IUSCI_A0_SPI.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_A0_SPI.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_A0_SPI.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_A0_SPI.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_A0_SPI.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_A0_SPI.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_A0_SPI.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_A0_SPI.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_SPI.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:05 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_A0_UART

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_A0_UART
index URL

Universal Serial Communication Interface A0 UART 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly interface IUSCI_A0_UART { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_UART
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_A0_UART inherits IUSCI_UART {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCABDEN_t// Automatic baud rate detect enable {
         UCABDEN_OFF// Baud rate detection disabled. Length of break and synch field is not measured,
         UCABDEN// Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRF_t// First modulation stage select {
         UCBRF_0// First stage 0,
         UCBRF_1// First stage 1,
         UCBRF_2// First stage 2,
         UCBRF_3// First stage 3,
         UCBRF_4// First stage 4,
         UCBRF_5// First stage 5,
         UCBRF_6// First stage 6,
         UCBRF_7// First stage 7,
         UCBRF_8// First stage 8,
         UCBRF_9// First stage 9,
         UCBRF_10// First stage 10,
         UCBRF_11// First stage 11,
         UCBRF_12// First stage 12,
         UCBRF_13// First stage 13,
         UCBRF_14// First stage 14,
         UCBRF_15// First stage 15
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBRS_t// Second modulation stage select {
         UCBRS_0// Second stage 0,
         UCBRS_1// Second stage 1,
         UCBRS_2// Second stage 2,
         UCBRS_3// Second stage 3,
         UCBRS_4// Second stage 4,
         UCBRS_5// Second stage 5,
         UCBRS_6// Second stage 6,
         UCBRS_7// Second stage 7
    };
    enum UCBTOE_t// Break time out error {
         UCBTOE_OFF// No error,
         UCBTOE// Length of break field exceeded 22 bit times
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCDELIM0_t// Break/synch delimiter length bit 0 {
         UCDELIM0_OFF// Break Sync Delimiter bit 0 Off,
         UCDELIM0// Break Sync Delimiter bit 0 On
    };
    enum UCDELIM1_t// Break/synch delimiter length bit 1 {
         UCDELIM1_OFF// Break Sync Delimiter bit 1 Off,
         UCDELIM1// Break Sync Delimiter bit 1 On
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCIREN_t// IrDA encoder/decoder enable {
         UCIREN_OFF// IrDA encoder/decoder disabled,
         UCIREN// IrDA encoder/decoder enabled
    };
    enum UCIRRXFE_t// IrDA receive filter enabled {
         UCIRRXFE_OFF// Receive filter disabled,
         UCIRRXFE// Receive filter enabled
    };
    enum UCIRRXFL0_t// IRDA Receive Filter Length Bit 0 {
         UCIRRXFL0_OFF// Bit 0 OFF,
         UCIRRXFL0// Bit 0 ON
    };
    enum UCIRRXFL1_t// IRDA Receive Filter Length Bit 1 {
         UCIRRXFL1_OFF// Bit 1 OFF,
         UCIRRXFL1// Bit 1 ON
    };
    enum UCIRRXFL2_t// IRDA Receive Filter Length Bit 2 {
         UCIRRXFL2_OFF// Bit 2 OFF,
         UCIRRXFL2// Bit 2 ON
    };
    enum UCIRRXFL3_t// IRDA Receive Filter Length Bit 3 {
         UCIRRXFL3_OFF// Bit 3 OFF,
         UCIRRXFL3// Bit 3 ON
    };
    enum UCIRRXFL4_t// IRDA Receive Filter Length Bit 4 {
         UCIRRXFL4_OFF// Bit 4 OFF,
         UCIRRXFL4// Bit 4 ON
    };
    enum UCIRRXFL5_t// IRDA Receive Filter Length Bit 5 {
         UCIRRXFL5_OFF// Bit 5 OFF,
         UCIRRXFL5// Bit 5 ON
    };
    enum UCIRRXPL_t// IrDA receive input UCAxRXD polarity {
         UCIRRXPL_OFF// IrDA transceiver delivers a high pulse when a light pulse is seen,
         UCIRRXPL// IrDA transceiver delivers a low pulse when a light pulse is seen
    };
    enum UCIRTXCLK_t// IrDA transmit pulse clock select {
         UCIRTXCLK_OFF// BRCLK,
         UCIRTXCLK// BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
    };
    enum UCIRTXPL0_t// IRDA Transmit Pulse Length Bit 0 {
         UCIRTXPL0_OFF// Bit 0 OFF,
         UCIRTXPL0// Bit 0 ON
    };
    enum UCIRTXPL1_t// IRDA Transmit Pulse Length Bit 1 {
         UCIRTXPL1_OFF// Bit 1 OFF,
         UCIRTXPL1// Bit 1 ON
    };
    enum UCIRTXPL2_t// IRDA Transmit Pulse Length Bit 2 {
         UCIRTXPL2_OFF// Bit 2 OFF,
         UCIRTXPL2// Bit 2 ON
    };
    enum UCIRTXPL3_t// IRDA Transmit Pulse Length Bit 3 {
         UCIRTXPL3_OFF// Bit 3 OFF,
         UCIRTXPL3// Bit 3 ON
    };
    enum UCIRTXPL4_t// IRDA Transmit Pulse Length Bit 4 {
         UCIRTXPL4_OFF// Bit 4 OFF,
         UCIRTXPL4// Bit 4 ON
    };
    enum UCIRTXPL5_t// IRDA Transmit Pulse Length Bit 5 {
         UCIRTXPL5_OFF// Bit 5 OFF,
         UCIRTXPL5// Bit 5 ON
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_ASYNC_t// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0 {
         UCMODE_0// UART Mode,
         UCMODE_1// Idle-Line Multiprocessor Mode,
         UCMODE_2// Address-Bit Multiprocessor Mode,
         UCMODE_3// UART Mode with automatic baud rate detection
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCOS16_t// Oversampling mode enabled {
         UCOS16_OFF// Disabled,
         UCOS16// Enabled
    };
    enum UCPAR_t// Parity select. UCPAR is not used when parity is disabled {
         UCPAR_OFF// Odd parity,
         UCPAR// Even parity
    };
    enum UCPEN_t// Parity enable {
         UCPEN_OFF// Parity Disabled,
         UCPEN// Parity Enabled
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSPB_t// Stop bit select. Number of stop bits {
         UCSPB_OFF// One stop bit,
         UCSPB// Two stop bits
    };
    enum UCSSEL_UART_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// UCLK,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSTOE_t// Synch field time out error {
         UCSTOE_OFF// No error,
         UCSTOE// Length of synch field exceeded measurable time
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxABCTL_t// {
         IUSCI_UART.UCDELIM1_t UCDELIM1// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times;
         IUSCI_UART.UCDELIM0_t UCDELIM0// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times;
         IUSCI_UART.UCSTOE_t UCSTOE// Synch field time out error 0 No error 1 Length of synch field exceeded measurable time;
         IUSCI_UART.UCBTOE_t UCBTOE// Break time out error 0 No error 1 Length of break field exceeded 22 bit times;
         IUSCI_UART.UCABDEN_t UCABDEN// Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_UART.UCPEN_t UCPEN// Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation;
         IUSCI_UART.UCPAR_t UCPAR// Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity;
         IUSCI_UART.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_UART.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_UART.UCSPB_t UCSPB// Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits;
         IUSCI_UART.UCMODE_ASYNC_t UCMODE// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection;
         IUSCI_UART.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_UART.UCSSEL_UART_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_UART.UCRXEIE_t UCRXEIE// Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG;
         IUSCI_UART.UCBRKIE_t UCBRKIE// Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG;
         IUSCI_UART.UCDORM_t UCDORM// Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
         IUSCI_UART.UCTXADDR_t UCTXADDR// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address;
         IUSCI_UART.UCTXBRK_t UCTXBRK// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch;
         IUSCI_UART.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxIRRCTL_t// {
         IUSCI_UART.UCIRRXFL5_t UCIRRXFL5// IRDA Receive Filter Length Bit 5;
         IUSCI_UART.UCIRRXFL4_t UCIRRXFL4// IRDA Receive Filter Length Bit 4;
         IUSCI_UART.UCIRRXFL3_t UCIRRXFL3// IRDA Receive Filter Length Bit 3;
         IUSCI_UART.UCIRRXFL2_t UCIRRXFL2// IRDA Receive Filter Length Bit 2;
         IUSCI_UART.UCIRRXFL1_t UCIRRXFL1// IRDA Receive Filter Length Bit 1;
         IUSCI_UART.UCIRRXFL0_t UCIRRXFL0// IRDA Receive Filter Length Bit 0;
         IUSCI_UART.UCIRRXPL_t UCIRRXPL// IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen;
         IUSCI_UART.UCIRRXFE_t UCIRRXFE// IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled;
    };
    metaonly struct UCxIRTCTL_t// {
         IUSCI_UART.UCIRTXPL5_t UCIRTXPL5// IRDA Transmit Pulse Length Bit 5;
         IUSCI_UART.UCIRTXPL4_t UCIRTXPL4// IRDA Transmit Pulse Length Bit 4;
         IUSCI_UART.UCIRTXPL3_t UCIRTXPL3// IRDA Transmit Pulse Length Bit 3;
         IUSCI_UART.UCIRTXPL2_t UCIRTXPL2// IRDA Transmit Pulse Length Bit 2;
         IUSCI_UART.UCIRTXPL1_t UCIRTXPL1// IRDA Transmit Pulse Length Bit 1;
         IUSCI_UART.UCIRTXPL0_t UCIRTXPL0// IRDA Transmit Pulse Length Bit 0;
         IUSCI_UART.UCIRTXCLK_t UCIRTXCLK// IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK;
         IUSCI_UART.UCIREN_t UCIREN// IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled;
    };
    metaonly struct UCxMCTL_t// {
         IUSCI_UART.UCBRF_t UCBRF// First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0;
         IUSCI_UART.UCBRS_t UCBRS// Second modulation stage select. These bits determine the modulation pattern for BITCLK;
         IUSCI_UART.UCOS16_t UCOS16// Oversampling mode enabled 0 Disabled 1 Enabled;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_UART.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_UART.UCFE_t UCFE// Framing error flag 0 No error 1 Character received with low stop bit;
         IUSCI_UART.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_UART.UCPE_t UCPE// Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error;
         IUSCI_UART.UCBRK_t UCBRK// Break detect flag 0 No break condition 1 Break condition occurred;
         IUSCI_UART.UCRXERR_t UCRXERR// Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected;
         IUSCI_UART.UCADDR_t UCADDR// Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address;
         IUSCI_UART.UCIDLE_t UCIDLE// Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected;
         IUSCI_UART.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config IUSCI_A0_UART.UCxABCTL_t UCA0ABCTL// Auto Baud Rate Control Register = {
        UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
        UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
        UCSTOE: IUSCI_UART.UCSTOE_OFF,
        UCBTOE: IUSCI_UART.UCBTOE_OFF,
        UCABDEN: IUSCI_UART.UCABDEN_OFF
    };
    config Bits8 UCA0BR0// Baud rate control register 0 = 0;
    config Bits8 UCA0BR1// Baud rate control register 1 = 0;
    config IUSCI_A0_UART.UCxCTL0_t UCA0CTL0// Control Register 0 = {
        UCPEN: IUSCI_UART.UCPEN_OFF,
        UCPAR: IUSCI_UART.UCPAR_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCSPB: IUSCI_UART.UCSPB_OFF,
        UCMODE: IUSCI_UART.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC_OFF
    };
    config IUSCI_A0_UART.UCxCTL1_t UCA0CTL1// Control Register 1 = {
        UCSSEL: IUSCI_UART.UCSSEL_0,
        UCRXEIE: IUSCI.UCRXEIE_OFF,
        UCBRKIE: IUSCI.UCBRKIE_OFF,
        UCDORM: IUSCI.UCDORM_OFF,
        UCTXADDR: IUSCI.UCTXADDR_OFF,
        UCTXBRK: IUSCI.UCTXBRK_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    config IUSCI_A0_UART.UCxIRRCTL_t UCA0IRRCTL// IrDA Receive Control Register = {
        UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
        UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
        UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
        UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
        UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
        UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
        UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
        UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
    };
    config IUSCI_A0_UART.UCxIRTCTL_t UCA0IRTCTL// IrDA Transmit Control Register = {
        UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
        UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
        UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
        UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
        UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
        UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
        UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
        UCIREN: IUSCI_UART.UCIREN_OFF
    };
    config IUSCI_A0_UART.UCxMCTL_t UCA0MCTL// Modulation Control Register = {
        UCBRF: IUSCI_UART.UCBRF_0,
        UCBRS: IUSCI_UART.UCBRS_0,
        UCOS16: IUSCI_UART.UCOS16_OFF
    };
    config Bits8 UCA0RXBUF// Receive Buffer Register = 0;
    config IUSCI_A0_UART.UCxSTAT_t UCA0STAT// Status Register = {
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCPE: IUSCI.UCPE_OFF,
        UCBRK: IUSCI.UCBRK_OFF,
        UCRXERR: IUSCI.UCRXERR_OFF,
        UCADDR: IUSCI.UCADDR_OFF,
        UCIDLE: IUSCI.UCIDLE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    config Bits8 UCA0TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_A0_UART.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_A0_UART.UCABDEN_t
index URL

Automatic baud rate detect enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCABDEN_t {
    UCABDEN_OFF,
    // Baud rate detection disabled. Length of break and synch field is not measured
    UCABDEN
    // Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
};
enum IUSCI_A0_UART.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_A0_UART.UCBRF_t
index URL

First modulation stage select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCBRF_t {
    UCBRF_0,
    // First stage 0
    UCBRF_1,
    // First stage 1
    UCBRF_2,
    // First stage 2
    UCBRF_3,
    // First stage 3
    UCBRF_4,
    // First stage 4
    UCBRF_5,
    // First stage 5
    UCBRF_6,
    // First stage 6
    UCBRF_7,
    // First stage 7
    UCBRF_8,
    // First stage 8
    UCBRF_9,
    // First stage 9
    UCBRF_10,
    // First stage 10
    UCBRF_11,
    // First stage 11
    UCBRF_12,
    // First stage 12
    UCBRF_13,
    // First stage 13
    UCBRF_14,
    // First stage 14
    UCBRF_15
    // First stage 15
};
enum IUSCI_A0_UART.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_A0_UART.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_A0_UART.UCBRS_t
index URL

Second modulation stage select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCBRS_t {
    UCBRS_0,
    // Second stage 0
    UCBRS_1,
    // Second stage 1
    UCBRS_2,
    // Second stage 2
    UCBRS_3,
    // Second stage 3
    UCBRS_4,
    // Second stage 4
    UCBRS_5,
    // Second stage 5
    UCBRS_6,
    // Second stage 6
    UCBRS_7
    // Second stage 7
};
enum IUSCI_A0_UART.UCBTOE_t
index URL

Break time out error

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCBTOE_t {
    UCBTOE_OFF,
    // No error
    UCBTOE
    // Length of break field exceeded 22 bit times
};
enum IUSCI_A0_UART.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_A0_UART.UCDELIM0_t
index URL

Break/synch delimiter length bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCDELIM0_t {
    UCDELIM0_OFF,
    // Break Sync Delimiter bit 0 Off
    UCDELIM0
    // Break Sync Delimiter bit 0 On
};
enum IUSCI_A0_UART.UCDELIM1_t
index URL

Break/synch delimiter length bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCDELIM1_t {
    UCDELIM1_OFF,
    // Break Sync Delimiter bit 1 Off
    UCDELIM1
    // Break Sync Delimiter bit 1 On
};
enum IUSCI_A0_UART.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_A0_UART.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_A0_UART.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_A0_UART.UCIREN_t
index URL

IrDA encoder/decoder enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIREN_t {
    UCIREN_OFF,
    // IrDA encoder/decoder disabled
    UCIREN
    // IrDA encoder/decoder enabled
};
enum IUSCI_A0_UART.UCIRRXFE_t
index URL

IrDA receive filter enabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXFE_t {
    UCIRRXFE_OFF,
    // Receive filter disabled
    UCIRRXFE
    // Receive filter enabled
};
enum IUSCI_A0_UART.UCIRRXFL0_t
index URL

IRDA Receive Filter Length Bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXFL0_t {
    UCIRRXFL0_OFF,
    // Bit 0 OFF
    UCIRRXFL0
    // Bit 0 ON
};
enum IUSCI_A0_UART.UCIRRXFL1_t
index URL

IRDA Receive Filter Length Bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXFL1_t {
    UCIRRXFL1_OFF,
    // Bit 1 OFF
    UCIRRXFL1
    // Bit 1 ON
};
enum IUSCI_A0_UART.UCIRRXFL2_t
index URL

IRDA Receive Filter Length Bit 2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXFL2_t {
    UCIRRXFL2_OFF,
    // Bit 2 OFF
    UCIRRXFL2
    // Bit 2 ON
};
enum IUSCI_A0_UART.UCIRRXFL3_t
index URL

IRDA Receive Filter Length Bit 3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXFL3_t {
    UCIRRXFL3_OFF,
    // Bit 3 OFF
    UCIRRXFL3
    // Bit 3 ON
};
enum IUSCI_A0_UART.UCIRRXFL4_t
index URL

IRDA Receive Filter Length Bit 4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXFL4_t {
    UCIRRXFL4_OFF,
    // Bit 4 OFF
    UCIRRXFL4
    // Bit 4 ON
};
enum IUSCI_A0_UART.UCIRRXFL5_t
index URL

IRDA Receive Filter Length Bit 5

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXFL5_t {
    UCIRRXFL5_OFF,
    // Bit 5 OFF
    UCIRRXFL5
    // Bit 5 ON
};
enum IUSCI_A0_UART.UCIRRXPL_t
index URL

IrDA receive input UCAxRXD polarity

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRRXPL_t {
    UCIRRXPL_OFF,
    // IrDA transceiver delivers a high pulse when a light pulse is seen
    UCIRRXPL
    // IrDA transceiver delivers a low pulse when a light pulse is seen
};
enum IUSCI_A0_UART.UCIRTXCLK_t
index URL

IrDA transmit pulse clock select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRTXCLK_t {
    UCIRTXCLK_OFF,
    // BRCLK
    UCIRTXCLK
    // BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
};
enum IUSCI_A0_UART.UCIRTXPL0_t
index URL

IRDA Transmit Pulse Length Bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRTXPL0_t {
    UCIRTXPL0_OFF,
    // Bit 0 OFF
    UCIRTXPL0
    // Bit 0 ON
};
enum IUSCI_A0_UART.UCIRTXPL1_t
index URL

IRDA Transmit Pulse Length Bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRTXPL1_t {
    UCIRTXPL1_OFF,
    // Bit 1 OFF
    UCIRTXPL1
    // Bit 1 ON
};
enum IUSCI_A0_UART.UCIRTXPL2_t
index URL

IRDA Transmit Pulse Length Bit 2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRTXPL2_t {
    UCIRTXPL2_OFF,
    // Bit 2 OFF
    UCIRTXPL2
    // Bit 2 ON
};
enum IUSCI_A0_UART.UCIRTXPL3_t
index URL

IRDA Transmit Pulse Length Bit 3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRTXPL3_t {
    UCIRTXPL3_OFF,
    // Bit 3 OFF
    UCIRTXPL3
    // Bit 3 ON
};
enum IUSCI_A0_UART.UCIRTXPL4_t
index URL

IRDA Transmit Pulse Length Bit 4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRTXPL4_t {
    UCIRTXPL4_OFF,
    // Bit 4 OFF
    UCIRTXPL4
    // Bit 4 ON
};
enum IUSCI_A0_UART.UCIRTXPL5_t
index URL

IRDA Transmit Pulse Length Bit 5

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCIRTXPL5_t {
    UCIRTXPL5_OFF,
    // Bit 5 OFF
    UCIRTXPL5
    // Bit 5 ON
};
enum IUSCI_A0_UART.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_A0_UART.UCMODE_ASYNC_t
index URL

USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCMODE_ASYNC_t {
    UCMODE_0,
    // UART Mode
    UCMODE_1,
    // Idle-Line Multiprocessor Mode
    UCMODE_2,
    // Address-Bit Multiprocessor Mode
    UCMODE_3
    // UART Mode with automatic baud rate detection
};
enum IUSCI_A0_UART.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_A0_UART.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_A0_UART.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_A0_UART.UCOS16_t
index URL

Oversampling mode enabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCOS16_t {
    UCOS16_OFF,
    // Disabled
    UCOS16
    // Enabled
};
enum IUSCI_A0_UART.UCPAR_t
index URL

Parity select. UCPAR is not used when parity is disabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCPAR_t {
    UCPAR_OFF,
    // Odd parity
    UCPAR
    // Even parity
};
enum IUSCI_A0_UART.UCPEN_t
index URL

Parity enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCPEN_t {
    UCPEN_OFF,
    // Parity Disabled
    UCPEN
    // Parity Enabled
};
enum IUSCI_A0_UART.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_A0_UART.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_A0_UART.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_A0_UART.UCSPB_t
index URL

Stop bit select. Number of stop bits

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCSPB_t {
    UCSPB_OFF,
    // One stop bit
    UCSPB
    // Two stop bits
};
enum IUSCI_A0_UART.UCSSEL_UART_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCSSEL_UART_t {
    UCSSEL_0,
    // UCLK
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_A0_UART.UCSTOE_t
index URL

Synch field time out error

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCSTOE_t {
    UCSTOE_OFF,
    // No error
    UCSTOE
    // Length of synch field exceeded measurable time
};
enum IUSCI_A0_UART.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_A0_UART.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_A0_UART.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_A0_UART.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_A0_UART.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_A0_UART.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
typedef String StringArray[];
struct IUSCI_A0_UART.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_A0_UART.UCxABCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct UCxABCTL_t {
     IUSCI_UART.UCDELIM1_t UCDELIM1;
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
     IUSCI_UART.UCDELIM0_t UCDELIM0;
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
     IUSCI_UART.UCSTOE_t UCSTOE;
    // Synch field time out error 0 No error 1 Length of synch field exceeded measurable time
     IUSCI_UART.UCBTOE_t UCBTOE;
    // Break time out error 0 No error 1 Length of break field exceeded 22 bit times
     IUSCI_UART.UCABDEN_t UCABDEN;
    // Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
};
struct IUSCI_A0_UART.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct UCxCTL0_t {
     IUSCI_UART.UCPEN_t UCPEN;
    // Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation
     IUSCI_UART.UCPAR_t UCPAR;
    // Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity
     IUSCI_UART.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_UART.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_UART.UCSPB_t UCSPB;
    // Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits
     IUSCI_UART.UCMODE_ASYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection
     IUSCI_UART.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_A0_UART.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct UCxCTL1_t {
     IUSCI_UART.UCSSEL_UART_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_UART.UCRXEIE_t UCRXEIE;
    // Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG
     IUSCI_UART.UCBRKIE_t UCBRKIE;
    // Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG
     IUSCI_UART.UCDORM_t UCDORM;
    // Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
     IUSCI_UART.UCTXADDR_t UCTXADDR;
    // Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address
     IUSCI_UART.UCTXBRK_t UCTXBRK;
    // Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch
     IUSCI_UART.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_A0_UART.UCxIRRCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct UCxIRRCTL_t {
     IUSCI_UART.UCIRRXFL5_t UCIRRXFL5;
    // IRDA Receive Filter Length Bit 5
     IUSCI_UART.UCIRRXFL4_t UCIRRXFL4;
    // IRDA Receive Filter Length Bit 4
     IUSCI_UART.UCIRRXFL3_t UCIRRXFL3;
    // IRDA Receive Filter Length Bit 3
     IUSCI_UART.UCIRRXFL2_t UCIRRXFL2;
    // IRDA Receive Filter Length Bit 2
     IUSCI_UART.UCIRRXFL1_t UCIRRXFL1;
    // IRDA Receive Filter Length Bit 1
     IUSCI_UART.UCIRRXFL0_t UCIRRXFL0;
    // IRDA Receive Filter Length Bit 0
     IUSCI_UART.UCIRRXPL_t UCIRRXPL;
    // IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen
     IUSCI_UART.UCIRRXFE_t UCIRRXFE;
    // IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled
};
struct IUSCI_A0_UART.UCxIRTCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct UCxIRTCTL_t {
     IUSCI_UART.UCIRTXPL5_t UCIRTXPL5;
    // IRDA Transmit Pulse Length Bit 5
     IUSCI_UART.UCIRTXPL4_t UCIRTXPL4;
    // IRDA Transmit Pulse Length Bit 4
     IUSCI_UART.UCIRTXPL3_t UCIRTXPL3;
    // IRDA Transmit Pulse Length Bit 3
     IUSCI_UART.UCIRTXPL2_t UCIRTXPL2;
    // IRDA Transmit Pulse Length Bit 2
     IUSCI_UART.UCIRTXPL1_t UCIRTXPL1;
    // IRDA Transmit Pulse Length Bit 1
     IUSCI_UART.UCIRTXPL0_t UCIRTXPL0;
    // IRDA Transmit Pulse Length Bit 0
     IUSCI_UART.UCIRTXCLK_t UCIRTXCLK;
    // IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
     IUSCI_UART.UCIREN_t UCIREN;
    // IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled
};
struct IUSCI_A0_UART.UCxMCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct UCxMCTL_t {
     IUSCI_UART.UCBRF_t UCBRF;
    // First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0
     IUSCI_UART.UCBRS_t UCBRS;
    // Second modulation stage select. These bits determine the modulation pattern for BITCLK
     IUSCI_UART.UCOS16_t UCOS16;
    // Oversampling mode enabled 0 Disabled 1 Enabled
};
struct IUSCI_A0_UART.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct UCxSTAT_t {
     IUSCI_UART.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_UART.UCFE_t UCFE;
    // Framing error flag 0 No error 1 Character received with low stop bit
     IUSCI_UART.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_UART.UCPE_t UCPE;
    // Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error
     IUSCI_UART.UCBRK_t UCBRK;
    // Break detect flag 0 No break condition 1 Break condition occurred
     IUSCI_UART.UCRXERR_t UCRXERR;
    // Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected
     IUSCI_UART.UCADDR_t UCADDR;
    // Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address
     IUSCI_UART.UCIDLE_t UCIDLE;
    // Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected
     IUSCI_UART.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_A0_UART.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_A0_UART.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_A0_UART.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_A0_UART.Params.UCA0ABCTL // instance
index URL

Auto Baud Rate Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config IUSCI_A0_UART.UCxABCTL_t UCA0ABCTL = {
    UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
    UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
    UCSTOE: IUSCI_UART.UCSTOE_OFF,
    UCBTOE: IUSCI_UART.UCBTOE_OFF,
    UCABDEN: IUSCI_UART.UCABDEN_OFF
};
config IUSCI_A0_UART.Params.UCA0BR0 // instance
index URL

Baud rate control register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config Bits8 UCA0BR0 = 0;
config IUSCI_A0_UART.Params.UCA0BR1 // instance
index URL

Baud rate control register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config Bits8 UCA0BR1 = 0;
config IUSCI_A0_UART.Params.UCA0CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config IUSCI_A0_UART.UCxCTL0_t UCA0CTL0 = {
    UCPEN: IUSCI_UART.UCPEN_OFF,
    UCPAR: IUSCI_UART.UCPAR_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCSPB: IUSCI_UART.UCSPB_OFF,
    UCMODE: IUSCI_UART.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC_OFF
};
config IUSCI_A0_UART.Params.UCA0CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config IUSCI_A0_UART.UCxCTL1_t UCA0CTL1 = {
    UCSSEL: IUSCI_UART.UCSSEL_0,
    UCRXEIE: IUSCI.UCRXEIE_OFF,
    UCBRKIE: IUSCI.UCBRKIE_OFF,
    UCDORM: IUSCI.UCDORM_OFF,
    UCTXADDR: IUSCI.UCTXADDR_OFF,
    UCTXBRK: IUSCI.UCTXBRK_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_A0_UART.Params.UCA0IRRCTL // instance
index URL

IrDA Receive Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config IUSCI_A0_UART.UCxIRRCTL_t UCA0IRRCTL = {
    UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
    UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
    UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
    UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
    UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
    UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
    UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
    UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
};
config IUSCI_A0_UART.Params.UCA0IRTCTL // instance
index URL

IrDA Transmit Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config IUSCI_A0_UART.UCxIRTCTL_t UCA0IRTCTL = {
    UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
    UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
    UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
    UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
    UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
    UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
    UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
    UCIREN: IUSCI_UART.UCIREN_OFF
};
config IUSCI_A0_UART.Params.UCA0MCTL // instance
index URL

Modulation Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config IUSCI_A0_UART.UCxMCTL_t UCA0MCTL = {
    UCBRF: IUSCI_UART.UCBRF_0,
    UCBRS: IUSCI_UART.UCBRS_0,
    UCOS16: IUSCI_UART.UCOS16_OFF
};
config IUSCI_A0_UART.Params.UCA0RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config Bits8 UCA0RXBUF = 0;
config IUSCI_A0_UART.Params.UCA0STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config IUSCI_A0_UART.UCxSTAT_t UCA0STAT = {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCPE: IUSCI.UCPE_OFF,
    UCBRK: IUSCI.UCBRK_OFF,
    UCRXERR: IUSCI.UCRXERR_OFF,
    UCADDR: IUSCI.UCADDR_OFF,
    UCIDLE: IUSCI.UCIDLE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config IUSCI_A0_UART.Params.UCA0TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config Bits8 UCA0TXBUF = 0;
config IUSCI_A0_UART.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config Float UCLKHz = 1000000;
config IUSCI_A0_UART.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_A0_UART.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
config String owner;
IUSCI_A0_UART.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_A0_UART.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_A0_UART.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_A0_UART.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_A0_UART.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_A0_UART.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_A0_UART.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_A0_UART.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A0_UART.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:05 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_A1_SPI

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_A1_SPI
index URL

Universal Serial Communication Interface A1 SPI 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
metaonly interface IUSCI_A1_SPI { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_SPI
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_A1_SPI inherits IUSCI_SPI {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCCKPH_t// Clock phase select {
         UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge,
         UCCKPH// Data is captured on the first UCLK edge and changed on the following edge
    };
    enum UCCKPL_t// Clock polarity select {
         UCCKPL_OFF// Inactive state is low,
         UCCKPL// Inactive state is high
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// NA,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_SPI.UCCKPH_t UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge;
         IUSCI_SPI.UCCKPL_t UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high;
         IUSCI_SPI.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_SPI.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_SPI.UCMST_t UCMST// Master mode select 0 Slave mode 1 Master mode;
         IUSCI_SPI.UCMODE_SYNC_t UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode;
         IUSCI_SPI.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_SPI.UCSSEL_SPI_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_SPI.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_SPI.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_SPI.UCFE_t UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred;
         IUSCI_SPI.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_SPI.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Bits8 UCA1BR0// Bit Rate Control Register 0 = 0;
    config Bits8 UCA1BR1// Bit Rate Control Register 1 = 0;
    config IUSCI_A1_SPI.UCxCTL0_t UCA1CTL0// Control Register 0 = {
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    config IUSCI_A1_SPI.UCxCTL1_t UCA1CTL1// Control Register 1 = {
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    config Bits8 UCA1RXBUF// Receive Buffer Register = 0;
    config IUSCI_A1_SPI.UCxSTAT_t UCA1STAT// Status Register = {
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    config Bits8 UCA1TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_A1_SPI.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_A1_SPI.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_A1_SPI.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_A1_SPI.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_A1_SPI.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_A1_SPI.UCCKPH_t
index URL

Clock phase select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCCKPH_t {
    UCCKPH_OFF,
    // Data is changed on the first UCLK edge and captured on the following edge
    UCCKPH
    // Data is captured on the first UCLK edge and changed on the following edge
};
enum IUSCI_A1_SPI.UCCKPL_t
index URL

Clock polarity select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCCKPL_t {
    UCCKPL_OFF,
    // Inactive state is low
    UCCKPL
    // Inactive state is high
};
enum IUSCI_A1_SPI.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_A1_SPI.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_A1_SPI.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_A1_SPI.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_A1_SPI.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_A1_SPI.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_A1_SPI.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_A1_SPI.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_A1_SPI.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_A1_SPI.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_A1_SPI.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_A1_SPI.UCSSEL_SPI_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCSSEL_SPI_t {
    UCSSEL_0,
    // NA
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_A1_SPI.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_A1_SPI.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_A1_SPI.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_A1_SPI.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_A1_SPI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_A1_SPI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
typedef String StringArray[];
struct IUSCI_A1_SPI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_A1_SPI.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
metaonly struct UCxCTL0_t {
     IUSCI_SPI.UCCKPH_t UCCKPH;
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
     IUSCI_SPI.UCCKPL_t UCCKPL;
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
     IUSCI_SPI.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_SPI.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_SPI.UCMST_t UCMST;
    // Master mode select 0 Slave mode 1 Master mode
     IUSCI_SPI.UCMODE_SYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
     IUSCI_SPI.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_A1_SPI.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
metaonly struct UCxCTL1_t {
     IUSCI_SPI.UCSSEL_SPI_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_SPI.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_A1_SPI.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
metaonly struct UCxSTAT_t {
     IUSCI_SPI.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_SPI.UCFE_t UCFE;
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
     IUSCI_SPI.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_SPI.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_A1_SPI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_A1_SPI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_A1_SPI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_A1_SPI.Params.UCA1BR0 // instance
index URL

Bit Rate Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config Bits8 UCA1BR0 = 0;
config IUSCI_A1_SPI.Params.UCA1BR1 // instance
index URL

Bit Rate Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config Bits8 UCA1BR1 = 0;
config IUSCI_A1_SPI.Params.UCA1CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config IUSCI_A1_SPI.UCxCTL0_t UCA1CTL0 = {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config IUSCI_A1_SPI.Params.UCA1CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config IUSCI_A1_SPI.UCxCTL1_t UCA1CTL1 = {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_A1_SPI.Params.UCA1RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config Bits8 UCA1RXBUF = 0;
config IUSCI_A1_SPI.Params.UCA1STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config IUSCI_A1_SPI.UCxSTAT_t UCA1STAT = {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config IUSCI_A1_SPI.Params.UCA1TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config Bits8 UCA1TXBUF = 0;
config IUSCI_A1_SPI.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config Float UCLKHz = 1000000;
config IUSCI_A1_SPI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_A1_SPI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
config String owner;
IUSCI_A1_SPI.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_A1_SPI.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_A1_SPI.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_A1_SPI.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_A1_SPI.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_A1_SPI.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_A1_SPI.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_A1_SPI.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_SPI.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:05 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_A1_UART

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_A1_UART
index URL

Universal Serial Communication Interface A1 UART 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly interface IUSCI_A1_UART { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_UART
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_A1_UART inherits IUSCI_UART {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCABDEN_t// Automatic baud rate detect enable {
         UCABDEN_OFF// Baud rate detection disabled. Length of break and synch field is not measured,
         UCABDEN// Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRF_t// First modulation stage select {
         UCBRF_0// First stage 0,
         UCBRF_1// First stage 1,
         UCBRF_2// First stage 2,
         UCBRF_3// First stage 3,
         UCBRF_4// First stage 4,
         UCBRF_5// First stage 5,
         UCBRF_6// First stage 6,
         UCBRF_7// First stage 7,
         UCBRF_8// First stage 8,
         UCBRF_9// First stage 9,
         UCBRF_10// First stage 10,
         UCBRF_11// First stage 11,
         UCBRF_12// First stage 12,
         UCBRF_13// First stage 13,
         UCBRF_14// First stage 14,
         UCBRF_15// First stage 15
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBRS_t// Second modulation stage select {
         UCBRS_0// Second stage 0,
         UCBRS_1// Second stage 1,
         UCBRS_2// Second stage 2,
         UCBRS_3// Second stage 3,
         UCBRS_4// Second stage 4,
         UCBRS_5// Second stage 5,
         UCBRS_6// Second stage 6,
         UCBRS_7// Second stage 7
    };
    enum UCBTOE_t// Break time out error {
         UCBTOE_OFF// No error,
         UCBTOE// Length of break field exceeded 22 bit times
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCDELIM0_t// Break/synch delimiter length bit 0 {
         UCDELIM0_OFF// Break Sync Delimiter bit 0 Off,
         UCDELIM0// Break Sync Delimiter bit 0 On
    };
    enum UCDELIM1_t// Break/synch delimiter length bit 1 {
         UCDELIM1_OFF// Break Sync Delimiter bit 1 Off,
         UCDELIM1// Break Sync Delimiter bit 1 On
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCIREN_t// IrDA encoder/decoder enable {
         UCIREN_OFF// IrDA encoder/decoder disabled,
         UCIREN// IrDA encoder/decoder enabled
    };
    enum UCIRRXFE_t// IrDA receive filter enabled {
         UCIRRXFE_OFF// Receive filter disabled,
         UCIRRXFE// Receive filter enabled
    };
    enum UCIRRXFL0_t// IRDA Receive Filter Length Bit 0 {
         UCIRRXFL0_OFF// Bit 0 OFF,
         UCIRRXFL0// Bit 0 ON
    };
    enum UCIRRXFL1_t// IRDA Receive Filter Length Bit 1 {
         UCIRRXFL1_OFF// Bit 1 OFF,
         UCIRRXFL1// Bit 1 ON
    };
    enum UCIRRXFL2_t// IRDA Receive Filter Length Bit 2 {
         UCIRRXFL2_OFF// Bit 2 OFF,
         UCIRRXFL2// Bit 2 ON
    };
    enum UCIRRXFL3_t// IRDA Receive Filter Length Bit 3 {
         UCIRRXFL3_OFF// Bit 3 OFF,
         UCIRRXFL3// Bit 3 ON
    };
    enum UCIRRXFL4_t// IRDA Receive Filter Length Bit 4 {
         UCIRRXFL4_OFF// Bit 4 OFF,
         UCIRRXFL4// Bit 4 ON
    };
    enum UCIRRXFL5_t// IRDA Receive Filter Length Bit 5 {
         UCIRRXFL5_OFF// Bit 5 OFF,
         UCIRRXFL5// Bit 5 ON
    };
    enum UCIRRXPL_t// IrDA receive input UCAxRXD polarity {
         UCIRRXPL_OFF// IrDA transceiver delivers a high pulse when a light pulse is seen,
         UCIRRXPL// IrDA transceiver delivers a low pulse when a light pulse is seen
    };
    enum UCIRTXCLK_t// IrDA transmit pulse clock select {
         UCIRTXCLK_OFF// BRCLK,
         UCIRTXCLK// BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
    };
    enum UCIRTXPL0_t// IRDA Transmit Pulse Length Bit 0 {
         UCIRTXPL0_OFF// Bit 0 OFF,
         UCIRTXPL0// Bit 0 ON
    };
    enum UCIRTXPL1_t// IRDA Transmit Pulse Length Bit 1 {
         UCIRTXPL1_OFF// Bit 1 OFF,
         UCIRTXPL1// Bit 1 ON
    };
    enum UCIRTXPL2_t// IRDA Transmit Pulse Length Bit 2 {
         UCIRTXPL2_OFF// Bit 2 OFF,
         UCIRTXPL2// Bit 2 ON
    };
    enum UCIRTXPL3_t// IRDA Transmit Pulse Length Bit 3 {
         UCIRTXPL3_OFF// Bit 3 OFF,
         UCIRTXPL3// Bit 3 ON
    };
    enum UCIRTXPL4_t// IRDA Transmit Pulse Length Bit 4 {
         UCIRTXPL4_OFF// Bit 4 OFF,
         UCIRTXPL4// Bit 4 ON
    };
    enum UCIRTXPL5_t// IRDA Transmit Pulse Length Bit 5 {
         UCIRTXPL5_OFF// Bit 5 OFF,
         UCIRTXPL5// Bit 5 ON
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_ASYNC_t// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0 {
         UCMODE_0// UART Mode,
         UCMODE_1// Idle-Line Multiprocessor Mode,
         UCMODE_2// Address-Bit Multiprocessor Mode,
         UCMODE_3// UART Mode with automatic baud rate detection
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCOS16_t// Oversampling mode enabled {
         UCOS16_OFF// Disabled,
         UCOS16// Enabled
    };
    enum UCPAR_t// Parity select. UCPAR is not used when parity is disabled {
         UCPAR_OFF// Odd parity,
         UCPAR// Even parity
    };
    enum UCPEN_t// Parity enable {
         UCPEN_OFF// Parity Disabled,
         UCPEN// Parity Enabled
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSPB_t// Stop bit select. Number of stop bits {
         UCSPB_OFF// One stop bit,
         UCSPB// Two stop bits
    };
    enum UCSSEL_UART_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// UCLK,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSTOE_t// Synch field time out error {
         UCSTOE_OFF// No error,
         UCSTOE// Length of synch field exceeded measurable time
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxABCTL_t// {
         IUSCI_UART.UCDELIM1_t UCDELIM1// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times;
         IUSCI_UART.UCDELIM0_t UCDELIM0// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times;
         IUSCI_UART.UCSTOE_t UCSTOE// Synch field time out error 0 No error 1 Length of synch field exceeded measurable time;
         IUSCI_UART.UCBTOE_t UCBTOE// Break time out error 0 No error 1 Length of break field exceeded 22 bit times;
         IUSCI_UART.UCABDEN_t UCABDEN// Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_UART.UCPEN_t UCPEN// Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation;
         IUSCI_UART.UCPAR_t UCPAR// Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity;
         IUSCI_UART.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_UART.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_UART.UCSPB_t UCSPB// Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits;
         IUSCI_UART.UCMODE_ASYNC_t UCMODE// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection;
         IUSCI_UART.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_UART.UCSSEL_UART_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_UART.UCRXEIE_t UCRXEIE// Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG;
         IUSCI_UART.UCBRKIE_t UCBRKIE// Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG;
         IUSCI_UART.UCDORM_t UCDORM// Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
         IUSCI_UART.UCTXADDR_t UCTXADDR// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address;
         IUSCI_UART.UCTXBRK_t UCTXBRK// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch;
         IUSCI_UART.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxIRRCTL_t// {
         IUSCI_UART.UCIRRXFL5_t UCIRRXFL5// IRDA Receive Filter Length Bit 5;
         IUSCI_UART.UCIRRXFL4_t UCIRRXFL4// IRDA Receive Filter Length Bit 4;
         IUSCI_UART.UCIRRXFL3_t UCIRRXFL3// IRDA Receive Filter Length Bit 3;
         IUSCI_UART.UCIRRXFL2_t UCIRRXFL2// IRDA Receive Filter Length Bit 2;
         IUSCI_UART.UCIRRXFL1_t UCIRRXFL1// IRDA Receive Filter Length Bit 1;
         IUSCI_UART.UCIRRXFL0_t UCIRRXFL0// IRDA Receive Filter Length Bit 0;
         IUSCI_UART.UCIRRXPL_t UCIRRXPL// IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen;
         IUSCI_UART.UCIRRXFE_t UCIRRXFE// IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled;
    };
    metaonly struct UCxIRTCTL_t// {
         IUSCI_UART.UCIRTXPL5_t UCIRTXPL5// IRDA Transmit Pulse Length Bit 5;
         IUSCI_UART.UCIRTXPL4_t UCIRTXPL4// IRDA Transmit Pulse Length Bit 4;
         IUSCI_UART.UCIRTXPL3_t UCIRTXPL3// IRDA Transmit Pulse Length Bit 3;
         IUSCI_UART.UCIRTXPL2_t UCIRTXPL2// IRDA Transmit Pulse Length Bit 2;
         IUSCI_UART.UCIRTXPL1_t UCIRTXPL1// IRDA Transmit Pulse Length Bit 1;
         IUSCI_UART.UCIRTXPL0_t UCIRTXPL0// IRDA Transmit Pulse Length Bit 0;
         IUSCI_UART.UCIRTXCLK_t UCIRTXCLK// IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK;
         IUSCI_UART.UCIREN_t UCIREN// IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled;
    };
    metaonly struct UCxMCTL_t// {
         IUSCI_UART.UCBRF_t UCBRF// First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0;
         IUSCI_UART.UCBRS_t UCBRS// Second modulation stage select. These bits determine the modulation pattern for BITCLK;
         IUSCI_UART.UCOS16_t UCOS16// Oversampling mode enabled 0 Disabled 1 Enabled;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_UART.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_UART.UCFE_t UCFE// Framing error flag 0 No error 1 Character received with low stop bit;
         IUSCI_UART.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_UART.UCPE_t UCPE// Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error;
         IUSCI_UART.UCBRK_t UCBRK// Break detect flag 0 No break condition 1 Break condition occurred;
         IUSCI_UART.UCRXERR_t UCRXERR// Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected;
         IUSCI_UART.UCADDR_t UCADDR// Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address;
         IUSCI_UART.UCIDLE_t UCIDLE// Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected;
         IUSCI_UART.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config IUSCI_A1_UART.UCxABCTL_t UCA1ABCTL// Auto Baud Rate Control Register = {
        UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
        UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
        UCSTOE: IUSCI_UART.UCSTOE_OFF,
        UCBTOE: IUSCI_UART.UCBTOE_OFF,
        UCABDEN: IUSCI_UART.UCABDEN_OFF
    };
    config Bits8 UCA1BR0// Baud rate control register 0 = 0;
    config Bits8 UCA1BR1// Baud rate control register 1 = 0;
    config IUSCI_A1_UART.UCxCTL0_t UCA1CTL0// Control Register 0 = {
        UCPEN: IUSCI_UART.UCPEN_OFF,
        UCPAR: IUSCI_UART.UCPAR_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCSPB: IUSCI_UART.UCSPB_OFF,
        UCMODE: IUSCI_UART.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC_OFF
    };
    config IUSCI_A1_UART.UCxCTL1_t UCA1CTL1// Control Register 1 = {
        UCSSEL: IUSCI_UART.UCSSEL_0,
        UCRXEIE: IUSCI.UCRXEIE_OFF,
        UCBRKIE: IUSCI.UCBRKIE_OFF,
        UCDORM: IUSCI.UCDORM_OFF,
        UCTXADDR: IUSCI.UCTXADDR_OFF,
        UCTXBRK: IUSCI.UCTXBRK_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    config IUSCI_A1_UART.UCxIRRCTL_t UCA1IRRCTL// IrDA Receive Control Register = {
        UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
        UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
        UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
        UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
        UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
        UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
        UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
        UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
    };
    config IUSCI_A1_UART.UCxIRTCTL_t UCA1IRTCTL// IrDA Transmit Control Register = {
        UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
        UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
        UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
        UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
        UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
        UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
        UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
        UCIREN: IUSCI_UART.UCIREN_OFF
    };
    config IUSCI_A1_UART.UCxMCTL_t UCA1MCTL// Modulation Control Register = {
        UCBRF: IUSCI_UART.UCBRF_0,
        UCBRS: IUSCI_UART.UCBRS_0,
        UCOS16: IUSCI_UART.UCOS16_OFF
    };
    config Bits8 UCA1RXBUF// Receive Buffer Register = 0;
    config IUSCI_A1_UART.UCxSTAT_t UCA1STAT// Status Register = {
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCPE: IUSCI.UCPE_OFF,
        UCBRK: IUSCI.UCBRK_OFF,
        UCRXERR: IUSCI.UCRXERR_OFF,
        UCADDR: IUSCI.UCADDR_OFF,
        UCIDLE: IUSCI.UCIDLE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    config Bits8 UCA1TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_A1_UART.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_A1_UART.UCABDEN_t
index URL

Automatic baud rate detect enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCABDEN_t {
    UCABDEN_OFF,
    // Baud rate detection disabled. Length of break and synch field is not measured
    UCABDEN
    // Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
};
enum IUSCI_A1_UART.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_A1_UART.UCBRF_t
index URL

First modulation stage select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCBRF_t {
    UCBRF_0,
    // First stage 0
    UCBRF_1,
    // First stage 1
    UCBRF_2,
    // First stage 2
    UCBRF_3,
    // First stage 3
    UCBRF_4,
    // First stage 4
    UCBRF_5,
    // First stage 5
    UCBRF_6,
    // First stage 6
    UCBRF_7,
    // First stage 7
    UCBRF_8,
    // First stage 8
    UCBRF_9,
    // First stage 9
    UCBRF_10,
    // First stage 10
    UCBRF_11,
    // First stage 11
    UCBRF_12,
    // First stage 12
    UCBRF_13,
    // First stage 13
    UCBRF_14,
    // First stage 14
    UCBRF_15
    // First stage 15
};
enum IUSCI_A1_UART.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_A1_UART.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_A1_UART.UCBRS_t
index URL

Second modulation stage select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCBRS_t {
    UCBRS_0,
    // Second stage 0
    UCBRS_1,
    // Second stage 1
    UCBRS_2,
    // Second stage 2
    UCBRS_3,
    // Second stage 3
    UCBRS_4,
    // Second stage 4
    UCBRS_5,
    // Second stage 5
    UCBRS_6,
    // Second stage 6
    UCBRS_7
    // Second stage 7
};
enum IUSCI_A1_UART.UCBTOE_t
index URL

Break time out error

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCBTOE_t {
    UCBTOE_OFF,
    // No error
    UCBTOE
    // Length of break field exceeded 22 bit times
};
enum IUSCI_A1_UART.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_A1_UART.UCDELIM0_t
index URL

Break/synch delimiter length bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCDELIM0_t {
    UCDELIM0_OFF,
    // Break Sync Delimiter bit 0 Off
    UCDELIM0
    // Break Sync Delimiter bit 0 On
};
enum IUSCI_A1_UART.UCDELIM1_t
index URL

Break/synch delimiter length bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCDELIM1_t {
    UCDELIM1_OFF,
    // Break Sync Delimiter bit 1 Off
    UCDELIM1
    // Break Sync Delimiter bit 1 On
};
enum IUSCI_A1_UART.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_A1_UART.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_A1_UART.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_A1_UART.UCIREN_t
index URL

IrDA encoder/decoder enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIREN_t {
    UCIREN_OFF,
    // IrDA encoder/decoder disabled
    UCIREN
    // IrDA encoder/decoder enabled
};
enum IUSCI_A1_UART.UCIRRXFE_t
index URL

IrDA receive filter enabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXFE_t {
    UCIRRXFE_OFF,
    // Receive filter disabled
    UCIRRXFE
    // Receive filter enabled
};
enum IUSCI_A1_UART.UCIRRXFL0_t
index URL

IRDA Receive Filter Length Bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXFL0_t {
    UCIRRXFL0_OFF,
    // Bit 0 OFF
    UCIRRXFL0
    // Bit 0 ON
};
enum IUSCI_A1_UART.UCIRRXFL1_t
index URL

IRDA Receive Filter Length Bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXFL1_t {
    UCIRRXFL1_OFF,
    // Bit 1 OFF
    UCIRRXFL1
    // Bit 1 ON
};
enum IUSCI_A1_UART.UCIRRXFL2_t
index URL

IRDA Receive Filter Length Bit 2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXFL2_t {
    UCIRRXFL2_OFF,
    // Bit 2 OFF
    UCIRRXFL2
    // Bit 2 ON
};
enum IUSCI_A1_UART.UCIRRXFL3_t
index URL

IRDA Receive Filter Length Bit 3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXFL3_t {
    UCIRRXFL3_OFF,
    // Bit 3 OFF
    UCIRRXFL3
    // Bit 3 ON
};
enum IUSCI_A1_UART.UCIRRXFL4_t
index URL

IRDA Receive Filter Length Bit 4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXFL4_t {
    UCIRRXFL4_OFF,
    // Bit 4 OFF
    UCIRRXFL4
    // Bit 4 ON
};
enum IUSCI_A1_UART.UCIRRXFL5_t
index URL

IRDA Receive Filter Length Bit 5

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXFL5_t {
    UCIRRXFL5_OFF,
    // Bit 5 OFF
    UCIRRXFL5
    // Bit 5 ON
};
enum IUSCI_A1_UART.UCIRRXPL_t
index URL

IrDA receive input UCAxRXD polarity

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRRXPL_t {
    UCIRRXPL_OFF,
    // IrDA transceiver delivers a high pulse when a light pulse is seen
    UCIRRXPL
    // IrDA transceiver delivers a low pulse when a light pulse is seen
};
enum IUSCI_A1_UART.UCIRTXCLK_t
index URL

IrDA transmit pulse clock select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRTXCLK_t {
    UCIRTXCLK_OFF,
    // BRCLK
    UCIRTXCLK
    // BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
};
enum IUSCI_A1_UART.UCIRTXPL0_t
index URL

IRDA Transmit Pulse Length Bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRTXPL0_t {
    UCIRTXPL0_OFF,
    // Bit 0 OFF
    UCIRTXPL0
    // Bit 0 ON
};
enum IUSCI_A1_UART.UCIRTXPL1_t
index URL

IRDA Transmit Pulse Length Bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRTXPL1_t {
    UCIRTXPL1_OFF,
    // Bit 1 OFF
    UCIRTXPL1
    // Bit 1 ON
};
enum IUSCI_A1_UART.UCIRTXPL2_t
index URL

IRDA Transmit Pulse Length Bit 2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRTXPL2_t {
    UCIRTXPL2_OFF,
    // Bit 2 OFF
    UCIRTXPL2
    // Bit 2 ON
};
enum IUSCI_A1_UART.UCIRTXPL3_t
index URL

IRDA Transmit Pulse Length Bit 3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRTXPL3_t {
    UCIRTXPL3_OFF,
    // Bit 3 OFF
    UCIRTXPL3
    // Bit 3 ON
};
enum IUSCI_A1_UART.UCIRTXPL4_t
index URL

IRDA Transmit Pulse Length Bit 4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRTXPL4_t {
    UCIRTXPL4_OFF,
    // Bit 4 OFF
    UCIRTXPL4
    // Bit 4 ON
};
enum IUSCI_A1_UART.UCIRTXPL5_t
index URL

IRDA Transmit Pulse Length Bit 5

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCIRTXPL5_t {
    UCIRTXPL5_OFF,
    // Bit 5 OFF
    UCIRTXPL5
    // Bit 5 ON
};
enum IUSCI_A1_UART.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_A1_UART.UCMODE_ASYNC_t
index URL

USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCMODE_ASYNC_t {
    UCMODE_0,
    // UART Mode
    UCMODE_1,
    // Idle-Line Multiprocessor Mode
    UCMODE_2,
    // Address-Bit Multiprocessor Mode
    UCMODE_3
    // UART Mode with automatic baud rate detection
};
enum IUSCI_A1_UART.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_A1_UART.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_A1_UART.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_A1_UART.UCOS16_t
index URL

Oversampling mode enabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCOS16_t {
    UCOS16_OFF,
    // Disabled
    UCOS16
    // Enabled
};
enum IUSCI_A1_UART.UCPAR_t
index URL

Parity select. UCPAR is not used when parity is disabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCPAR_t {
    UCPAR_OFF,
    // Odd parity
    UCPAR
    // Even parity
};
enum IUSCI_A1_UART.UCPEN_t
index URL

Parity enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCPEN_t {
    UCPEN_OFF,
    // Parity Disabled
    UCPEN
    // Parity Enabled
};
enum IUSCI_A1_UART.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_A1_UART.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_A1_UART.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_A1_UART.UCSPB_t
index URL

Stop bit select. Number of stop bits

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCSPB_t {
    UCSPB_OFF,
    // One stop bit
    UCSPB
    // Two stop bits
};
enum IUSCI_A1_UART.UCSSEL_UART_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCSSEL_UART_t {
    UCSSEL_0,
    // UCLK
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_A1_UART.UCSTOE_t
index URL

Synch field time out error

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCSTOE_t {
    UCSTOE_OFF,
    // No error
    UCSTOE
    // Length of synch field exceeded measurable time
};
enum IUSCI_A1_UART.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_A1_UART.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_A1_UART.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_A1_UART.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_A1_UART.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_A1_UART.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
typedef String StringArray[];
struct IUSCI_A1_UART.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_A1_UART.UCxABCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct UCxABCTL_t {
     IUSCI_UART.UCDELIM1_t UCDELIM1;
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
     IUSCI_UART.UCDELIM0_t UCDELIM0;
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
     IUSCI_UART.UCSTOE_t UCSTOE;
    // Synch field time out error 0 No error 1 Length of synch field exceeded measurable time
     IUSCI_UART.UCBTOE_t UCBTOE;
    // Break time out error 0 No error 1 Length of break field exceeded 22 bit times
     IUSCI_UART.UCABDEN_t UCABDEN;
    // Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
};
struct IUSCI_A1_UART.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct UCxCTL0_t {
     IUSCI_UART.UCPEN_t UCPEN;
    // Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation
     IUSCI_UART.UCPAR_t UCPAR;
    // Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity
     IUSCI_UART.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_UART.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_UART.UCSPB_t UCSPB;
    // Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits
     IUSCI_UART.UCMODE_ASYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection
     IUSCI_UART.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_A1_UART.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct UCxCTL1_t {
     IUSCI_UART.UCSSEL_UART_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_UART.UCRXEIE_t UCRXEIE;
    // Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG
     IUSCI_UART.UCBRKIE_t UCBRKIE;
    // Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG
     IUSCI_UART.UCDORM_t UCDORM;
    // Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
     IUSCI_UART.UCTXADDR_t UCTXADDR;
    // Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address
     IUSCI_UART.UCTXBRK_t UCTXBRK;
    // Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch
     IUSCI_UART.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_A1_UART.UCxIRRCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct UCxIRRCTL_t {
     IUSCI_UART.UCIRRXFL5_t UCIRRXFL5;
    // IRDA Receive Filter Length Bit 5
     IUSCI_UART.UCIRRXFL4_t UCIRRXFL4;
    // IRDA Receive Filter Length Bit 4
     IUSCI_UART.UCIRRXFL3_t UCIRRXFL3;
    // IRDA Receive Filter Length Bit 3
     IUSCI_UART.UCIRRXFL2_t UCIRRXFL2;
    // IRDA Receive Filter Length Bit 2
     IUSCI_UART.UCIRRXFL1_t UCIRRXFL1;
    // IRDA Receive Filter Length Bit 1
     IUSCI_UART.UCIRRXFL0_t UCIRRXFL0;
    // IRDA Receive Filter Length Bit 0
     IUSCI_UART.UCIRRXPL_t UCIRRXPL;
    // IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen
     IUSCI_UART.UCIRRXFE_t UCIRRXFE;
    // IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled
};
struct IUSCI_A1_UART.UCxIRTCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct UCxIRTCTL_t {
     IUSCI_UART.UCIRTXPL5_t UCIRTXPL5;
    // IRDA Transmit Pulse Length Bit 5
     IUSCI_UART.UCIRTXPL4_t UCIRTXPL4;
    // IRDA Transmit Pulse Length Bit 4
     IUSCI_UART.UCIRTXPL3_t UCIRTXPL3;
    // IRDA Transmit Pulse Length Bit 3
     IUSCI_UART.UCIRTXPL2_t UCIRTXPL2;
    // IRDA Transmit Pulse Length Bit 2
     IUSCI_UART.UCIRTXPL1_t UCIRTXPL1;
    // IRDA Transmit Pulse Length Bit 1
     IUSCI_UART.UCIRTXPL0_t UCIRTXPL0;
    // IRDA Transmit Pulse Length Bit 0
     IUSCI_UART.UCIRTXCLK_t UCIRTXCLK;
    // IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
     IUSCI_UART.UCIREN_t UCIREN;
    // IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled
};
struct IUSCI_A1_UART.UCxMCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct UCxMCTL_t {
     IUSCI_UART.UCBRF_t UCBRF;
    // First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0
     IUSCI_UART.UCBRS_t UCBRS;
    // Second modulation stage select. These bits determine the modulation pattern for BITCLK
     IUSCI_UART.UCOS16_t UCOS16;
    // Oversampling mode enabled 0 Disabled 1 Enabled
};
struct IUSCI_A1_UART.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct UCxSTAT_t {
     IUSCI_UART.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_UART.UCFE_t UCFE;
    // Framing error flag 0 No error 1 Character received with low stop bit
     IUSCI_UART.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_UART.UCPE_t UCPE;
    // Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error
     IUSCI_UART.UCBRK_t UCBRK;
    // Break detect flag 0 No break condition 1 Break condition occurred
     IUSCI_UART.UCRXERR_t UCRXERR;
    // Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected
     IUSCI_UART.UCADDR_t UCADDR;
    // Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address
     IUSCI_UART.UCIDLE_t UCIDLE;
    // Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected
     IUSCI_UART.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_A1_UART.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_A1_UART.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_A1_UART.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_A1_UART.Params.UCA1ABCTL // instance
index URL

Auto Baud Rate Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config IUSCI_A1_UART.UCxABCTL_t UCA1ABCTL = {
    UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
    UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
    UCSTOE: IUSCI_UART.UCSTOE_OFF,
    UCBTOE: IUSCI_UART.UCBTOE_OFF,
    UCABDEN: IUSCI_UART.UCABDEN_OFF
};
config IUSCI_A1_UART.Params.UCA1BR0 // instance
index URL

Baud rate control register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config Bits8 UCA1BR0 = 0;
config IUSCI_A1_UART.Params.UCA1BR1 // instance
index URL

Baud rate control register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config Bits8 UCA1BR1 = 0;
config IUSCI_A1_UART.Params.UCA1CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config IUSCI_A1_UART.UCxCTL0_t UCA1CTL0 = {
    UCPEN: IUSCI_UART.UCPEN_OFF,
    UCPAR: IUSCI_UART.UCPAR_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCSPB: IUSCI_UART.UCSPB_OFF,
    UCMODE: IUSCI_UART.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC_OFF
};
config IUSCI_A1_UART.Params.UCA1CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config IUSCI_A1_UART.UCxCTL1_t UCA1CTL1 = {
    UCSSEL: IUSCI_UART.UCSSEL_0,
    UCRXEIE: IUSCI.UCRXEIE_OFF,
    UCBRKIE: IUSCI.UCBRKIE_OFF,
    UCDORM: IUSCI.UCDORM_OFF,
    UCTXADDR: IUSCI.UCTXADDR_OFF,
    UCTXBRK: IUSCI.UCTXBRK_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_A1_UART.Params.UCA1IRRCTL // instance
index URL

IrDA Receive Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config IUSCI_A1_UART.UCxIRRCTL_t UCA1IRRCTL = {
    UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
    UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
    UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
    UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
    UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
    UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
    UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
    UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
};
config IUSCI_A1_UART.Params.UCA1IRTCTL // instance
index URL

IrDA Transmit Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config IUSCI_A1_UART.UCxIRTCTL_t UCA1IRTCTL = {
    UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
    UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
    UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
    UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
    UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
    UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
    UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
    UCIREN: IUSCI_UART.UCIREN_OFF
};
config IUSCI_A1_UART.Params.UCA1MCTL // instance
index URL

Modulation Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config IUSCI_A1_UART.UCxMCTL_t UCA1MCTL = {
    UCBRF: IUSCI_UART.UCBRF_0,
    UCBRS: IUSCI_UART.UCBRS_0,
    UCOS16: IUSCI_UART.UCOS16_OFF
};
config IUSCI_A1_UART.Params.UCA1RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config Bits8 UCA1RXBUF = 0;
config IUSCI_A1_UART.Params.UCA1STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config IUSCI_A1_UART.UCxSTAT_t UCA1STAT = {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCPE: IUSCI.UCPE_OFF,
    UCBRK: IUSCI.UCBRK_OFF,
    UCRXERR: IUSCI.UCRXERR_OFF,
    UCADDR: IUSCI.UCADDR_OFF,
    UCIDLE: IUSCI.UCIDLE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config IUSCI_A1_UART.Params.UCA1TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config Bits8 UCA1TXBUF = 0;
config IUSCI_A1_UART.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config Float UCLKHz = 1000000;
config IUSCI_A1_UART.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_A1_UART.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
config String owner;
IUSCI_A1_UART.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_A1_UART.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_A1_UART.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_A1_UART.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_A1_UART.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_A1_UART.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_A1_UART.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_A1_UART.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_A1_UART.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:06 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_B0_I2C

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_B0_I2C
index URL

Universal Serial Communication Interface B0 I2C 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
metaonly interface IUSCI_B0_I2C { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_I2C
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_B0_I2C inherits IUSCI_I2C {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCA10_t// Own addressing mode select {
         UCA10_OFF// Own address is a 7-bit address,
         UCA10// Own address is a 10-bit address
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCALIFG_t// Arbitration lost interrupt flag {
         UCALIFG_OFF// No interrupt pending,
         UCALIFG// Interrupt pending
    };
    enum UCBBUSY_t// Bus busy {
         UCBBUSY_OFF// Bus inactive,
         UCBBUSY// Bus busy
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCGCEN_t// General call response enable {
         UCGCEN_OFF// Do not respond to a general call,
         UCGCEN// Respond to a general call
    };
    enum UCGC_t// General call address received {
         UCGC_OFF// No general call address received,
         UCGC// General call address received
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMM_t// Multi-master environment select {
         UCMM_OFF// Single master environment. There is no other master in the system. The address compare unit is disabled,
         UCMM// Multi master environment
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCNACKIFG_t// Not-acknowledge received interrupt flag {
         UCNACKIFG_OFF// No interrupt pending,
         UCNACKIFG// Interrupt pending
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSCLLOW_t// SCL low {
         UCSCLLOW_OFF// SCL is not held low,
         UCSCLLOW// SCL is held low
    };
    enum UCSLA10_t// Slave addressing mode select {
         UCSLA10_OFF// Address slave with 7-bit address,
         UCSLA10// Address slave with 10-bit address
    };
    enum UCSSEL_I2C_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// UCLK,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSTPIFG_t// Stop condition interrupt flag {
         UCSTPIFG_OFF// No interrupt pending,
         UCSTPIFG// Interrupt pending
    };
    enum UCSTTIFG_t// Start condition interrupt flag {
         UCSTTIFG_OFF// No interrupt pending,
         UCSTTIFG// Interrupt pending
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTR_t// Transmitter/Receiver {
         UCTR_OFF// Receiver,
         UCTR// Transmitter
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    enum UCTXNACK_t// Transmit a NACK {
         UCTXNACK_OFF// Acknowledge normally,
         UCTXNACK// Generate NACK
    };
    enum UCTXSTP_t// Transmit STOP condition in master mode {
         UCTXSTP_OFF// No STOP generated,
         UCTXSTP// Generate STOP
    };
    enum UCTXSTT_t// Transmit START condition in master mode {
         UCTXSTT_OFF// Do not generate START condition,
         UCTXSTT// Generate START condition
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCBxI2COA_t// {
         IUSCI_I2C.UCGCEN_t UCGCEN// General call response enable 0 Do not respond to a general call 1 Respond to a general call;
        Bits16 I2COA// I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_I2C.UCA10_t UCA10// Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address;
         IUSCI_I2C.UCSLA10_t UCSLA10// Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address;
         IUSCI_I2C.UCMM_t UCMM// Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment;
         IUSCI_I2C.UCMST_t UCMST// Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode;
         IUSCI_I2C.UCMODE_SYNC_t UCMODE// USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode;
         IUSCI_I2C.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_I2C.UCSSEL_I2C_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_I2C.UCTR_t UCTR// Transmitter/Receiver 0 Receiver 1 Transmitter;
         IUSCI_I2C.UCTXNACK_t UCTXNACK// Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK;
         IUSCI_I2C.UCTXSTP_t UCTXSTP// Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP;
         IUSCI_I2C.UCTXSTT_t UCTXSTT// Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition;
         IUSCI_I2C.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_I2C.UCSCLLOW_t UCSCLLOW// SCL low 0 SCL is not held low 1 SCL is held low;
         IUSCI_I2C.UCGC_t UCGC// General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received;
         IUSCI_I2C.UCBBUSY_t UCBBUSY// Bus busy 0 Bus inactive 1 Bus busy;
         IUSCI_I2C.UCNACKIFG_t UCNACKIFG// Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCSTPIFG_t UCSTPIFG// Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCSTTIFG_t UCSTTIFG// Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCALIFG_t UCALIFG// Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Bits8 UCB0BR0// Bit Rate Control Register 0 = 0;
    config Bits8 UCB0BR1// Bit Rate Control Register 1 = 0;
    config IUSCI_B0_I2C.UCxCTL0_t UCB0CTL0// Control Register 0 = {
        UCA10: IUSCI_I2C.UCA10_OFF,
        UCSLA10: IUSCI_I2C.UCSLA10_OFF,
        UCMM: IUSCI_I2C.UCMM_OFF,
        UCMST: IUSCI_I2C.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    config IUSCI_B0_I2C.UCxCTL1_t UCB0CTL1// Control Register 1 = {
        UCSSEL: IUSCI_I2C.UCSSEL_0,
        UCTR: IUSCI_I2C.UCTR_OFF,
        UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
        UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
        UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    config IUSCI_B0_I2C.UCBxI2COA_t UCB0I2COA// I2C Own Address Register = {
        UCGCEN: IUSCI_I2C.UCGCEN_OFF,
        I2COA: 0
    };
    config Bits8 UCB0I2CSA// I2C Slave Address Register = 0;
    config Bits8 UCB0RXBUF// Receive Buffer Register = 0;
    config IUSCI_B0_I2C.UCxSTAT_t UCB0STAT// Status Register = {
        UCSCLLOW: IUSCI_I2C.UCSCLLOW,
        UCGC: IUSCI_I2C.UCGC,
        UCBBUSY: IUSCI_I2C.UCBBUSY,
        UCNACKIFG: IUSCI_I2C.UCNACKIFG,
        UCSTPIFG: IUSCI_I2C.UCSTPIFG,
        UCSTTIFG: IUSCI_I2C.UCSTTIFG,
        UCALIFG: IUSCI_I2C.UCALIFG
    };
    config Bits8 UCB0TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCBxI2CSA// Returns UCBxI2CSA register value based on which module();
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCBxI2CSA// Sets UCxxI2CSA register value based on which module(Bits8 value);
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_B0_I2C.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_B0_I2C.UCA10_t
index URL

Own addressing mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCA10_t {
    UCA10_OFF,
    // Own address is a 7-bit address
    UCA10
    // Own address is a 10-bit address
};
enum IUSCI_B0_I2C.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_B0_I2C.UCALIFG_t
index URL

Arbitration lost interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCALIFG_t {
    UCALIFG_OFF,
    // No interrupt pending
    UCALIFG
    // Interrupt pending
};
enum IUSCI_B0_I2C.UCBBUSY_t
index URL

Bus busy

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCBBUSY_t {
    UCBBUSY_OFF,
    // Bus inactive
    UCBBUSY
    // Bus busy
};
enum IUSCI_B0_I2C.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_B0_I2C.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_B0_I2C.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_B0_I2C.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_B0_I2C.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_B0_I2C.UCGCEN_t
index URL

General call response enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCGCEN_t {
    UCGCEN_OFF,
    // Do not respond to a general call
    UCGCEN
    // Respond to a general call
};
enum IUSCI_B0_I2C.UCGC_t
index URL

General call address received

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCGC_t {
    UCGC_OFF,
    // No general call address received
    UCGC
    // General call address received
};
enum IUSCI_B0_I2C.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_B0_I2C.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_B0_I2C.UCMM_t
index URL

Multi-master environment select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCMM_t {
    UCMM_OFF,
    // Single master environment. There is no other master in the system. The address compare unit is disabled
    UCMM
    // Multi master environment
};
enum IUSCI_B0_I2C.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_B0_I2C.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_B0_I2C.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_B0_I2C.UCNACKIFG_t
index URL

Not-acknowledge received interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCNACKIFG_t {
    UCNACKIFG_OFF,
    // No interrupt pending
    UCNACKIFG
    // Interrupt pending
};
enum IUSCI_B0_I2C.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_B0_I2C.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_B0_I2C.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_B0_I2C.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_B0_I2C.UCSCLLOW_t
index URL

SCL low

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCSCLLOW_t {
    UCSCLLOW_OFF,
    // SCL is not held low
    UCSCLLOW
    // SCL is held low
};
enum IUSCI_B0_I2C.UCSLA10_t
index URL

Slave addressing mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCSLA10_t {
    UCSLA10_OFF,
    // Address slave with 7-bit address
    UCSLA10
    // Address slave with 10-bit address
};
enum IUSCI_B0_I2C.UCSSEL_I2C_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCSSEL_I2C_t {
    UCSSEL_0,
    // UCLK
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_B0_I2C.UCSTPIFG_t
index URL

Stop condition interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCSTPIFG_t {
    UCSTPIFG_OFF,
    // No interrupt pending
    UCSTPIFG
    // Interrupt pending
};
enum IUSCI_B0_I2C.UCSTTIFG_t
index URL

Start condition interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCSTTIFG_t {
    UCSTTIFG_OFF,
    // No interrupt pending
    UCSTTIFG
    // Interrupt pending
};
enum IUSCI_B0_I2C.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_B0_I2C.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_B0_I2C.UCTR_t
index URL

Transmitter/Receiver

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCTR_t {
    UCTR_OFF,
    // Receiver
    UCTR
    // Transmitter
};
enum IUSCI_B0_I2C.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_B0_I2C.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
enum IUSCI_B0_I2C.UCTXNACK_t
index URL

Transmit a NACK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCTXNACK_t {
    UCTXNACK_OFF,
    // Acknowledge normally
    UCTXNACK
    // Generate NACK
};
enum IUSCI_B0_I2C.UCTXSTP_t
index URL

Transmit STOP condition in master mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCTXSTP_t {
    UCTXSTP_OFF,
    // No STOP generated
    UCTXSTP
    // Generate STOP
};
enum IUSCI_B0_I2C.UCTXSTT_t
index URL

Transmit START condition in master mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
enum UCTXSTT_t {
    UCTXSTT_OFF,
    // Do not generate START condition
    UCTXSTT
    // Generate START condition
};
typedef IUSCI_B0_I2C.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_B0_I2C.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
typedef String StringArray[];
struct IUSCI_B0_I2C.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_B0_I2C.UCBxI2COA_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
metaonly struct UCBxI2COA_t {
     IUSCI_I2C.UCGCEN_t UCGCEN;
    // General call response enable 0 Do not respond to a general call 1 Respond to a general call
    Bits16 I2COA;
    // I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB
};
struct IUSCI_B0_I2C.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
metaonly struct UCxCTL0_t {
     IUSCI_I2C.UCA10_t UCA10;
    // Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address
     IUSCI_I2C.UCSLA10_t UCSLA10;
    // Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address
     IUSCI_I2C.UCMM_t UCMM;
    // Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment
     IUSCI_I2C.UCMST_t UCMST;
    // Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode
     IUSCI_I2C.UCMODE_SYNC_t UCMODE;
    // USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode
     IUSCI_I2C.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode
};
struct IUSCI_B0_I2C.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
metaonly struct UCxCTL1_t {
     IUSCI_I2C.UCSSEL_I2C_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_I2C.UCTR_t UCTR;
    // Transmitter/Receiver 0 Receiver 1 Transmitter
     IUSCI_I2C.UCTXNACK_t UCTXNACK;
    // Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK
     IUSCI_I2C.UCTXSTP_t UCTXSTP;
    // Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP
     IUSCI_I2C.UCTXSTT_t UCTXSTT;
    // Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition
     IUSCI_I2C.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_B0_I2C.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
metaonly struct UCxSTAT_t {
     IUSCI_I2C.UCSCLLOW_t UCSCLLOW;
    // SCL low 0 SCL is not held low 1 SCL is held low
     IUSCI_I2C.UCGC_t UCGC;
    // General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received
     IUSCI_I2C.UCBBUSY_t UCBBUSY;
    // Bus busy 0 Bus inactive 1 Bus busy
     IUSCI_I2C.UCNACKIFG_t UCNACKIFG;
    // Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCSTPIFG_t UCSTPIFG;
    // Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCSTTIFG_t UCSTTIFG;
    // Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCALIFG_t UCALIFG;
    // Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending
};
struct IUSCI_B0_I2C.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_B0_I2C.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_B0_I2C.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_B0_I2C.Params.UCB0BR0 // instance
index URL

Bit Rate Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config Bits8 UCB0BR0 = 0;
config IUSCI_B0_I2C.Params.UCB0BR1 // instance
index URL

Bit Rate Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config Bits8 UCB0BR1 = 0;
config IUSCI_B0_I2C.Params.UCB0CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config IUSCI_B0_I2C.UCxCTL0_t UCB0CTL0 = {
    UCA10: IUSCI_I2C.UCA10_OFF,
    UCSLA10: IUSCI_I2C.UCSLA10_OFF,
    UCMM: IUSCI_I2C.UCMM_OFF,
    UCMST: IUSCI_I2C.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config IUSCI_B0_I2C.Params.UCB0CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config IUSCI_B0_I2C.UCxCTL1_t UCB0CTL1 = {
    UCSSEL: IUSCI_I2C.UCSSEL_0,
    UCTR: IUSCI_I2C.UCTR_OFF,
    UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
    UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
    UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_B0_I2C.Params.UCB0I2COA // instance
index URL

I2C Own Address Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config IUSCI_B0_I2C.UCBxI2COA_t UCB0I2COA = {
    UCGCEN: IUSCI_I2C.UCGCEN_OFF,
    I2COA: 0
};
config IUSCI_B0_I2C.Params.UCB0I2CSA // instance
index URL

I2C Slave Address Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config Bits8 UCB0I2CSA = 0;
config IUSCI_B0_I2C.Params.UCB0RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config Bits8 UCB0RXBUF = 0;
config IUSCI_B0_I2C.Params.UCB0STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config IUSCI_B0_I2C.UCxSTAT_t UCB0STAT = {
    UCSCLLOW: IUSCI_I2C.UCSCLLOW,
    UCGC: IUSCI_I2C.UCGC,
    UCBBUSY: IUSCI_I2C.UCBBUSY,
    UCNACKIFG: IUSCI_I2C.UCNACKIFG,
    UCSTPIFG: IUSCI_I2C.UCSTPIFG,
    UCSTTIFG: IUSCI_I2C.UCSTTIFG,
    UCALIFG: IUSCI_I2C.UCALIFG
};
config IUSCI_B0_I2C.Params.UCB0TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config Bits8 UCB0TXBUF = 0;
config IUSCI_B0_I2C.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config Float UCLKHz = 1000000;
config IUSCI_B0_I2C.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_B0_I2C.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
config String owner;
IUSCI_B0_I2C.getUCBxI2CSA() // instance
index URL

Returns UCBxI2CSA register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Bits8 getUCBxI2CSA();
SEE
getUCBxI2CSA
IUSCI_B0_I2C.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_B0_I2C.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_B0_I2C.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_B0_I2C.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_B0_I2C.setUCBxI2CSA() // instance
index URL

Sets UCxxI2CSA register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Void setUCBxI2CSA(Bits8 value);
SEE
setUCBxI2CSA
IUSCI_B0_I2C.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_B0_I2C.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_B0_I2C.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_B0_I2C.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_I2C.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:06 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_B0_SPI

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_B0_SPI
index URL

Universal Serial Communication Interface B0 SPI 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
metaonly interface IUSCI_B0_SPI { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_SPI
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_B0_SPI inherits IUSCI_SPI {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCCKPH_t// Clock phase select {
         UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge,
         UCCKPH// Data is captured on the first UCLK edge and changed on the following edge
    };
    enum UCCKPL_t// Clock polarity select {
         UCCKPL_OFF// Inactive state is low,
         UCCKPL// Inactive state is high
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// NA,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_SPI.UCCKPH_t UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge;
         IUSCI_SPI.UCCKPL_t UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high;
         IUSCI_SPI.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_SPI.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_SPI.UCMST_t UCMST// Master mode select 0 Slave mode 1 Master mode;
         IUSCI_SPI.UCMODE_SYNC_t UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode;
         IUSCI_SPI.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_SPI.UCSSEL_SPI_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_SPI.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_SPI.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_SPI.UCFE_t UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred;
         IUSCI_SPI.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_SPI.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Bits8 UCB0BR0// Bit Rate Control Register 0 = 0;
    config Bits8 UCB0BR1// Bit Rate Control Register 1 = 0;
    config IUSCI_B0_SPI.UCxCTL0_t UCB0CTL0// Control Register 0 = {
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    config IUSCI_B0_SPI.UCxCTL1_t UCB0CTL1// Control Register 1 = {
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    config Bits8 UCB0RXBUF// Receive Buffer Register = 0;
    config IUSCI_B0_SPI.UCxSTAT_t UCB0STAT// Status Register = {
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    config Bits8 UCB0TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_B0_SPI.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_B0_SPI.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_B0_SPI.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_B0_SPI.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_B0_SPI.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_B0_SPI.UCCKPH_t
index URL

Clock phase select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCCKPH_t {
    UCCKPH_OFF,
    // Data is changed on the first UCLK edge and captured on the following edge
    UCCKPH
    // Data is captured on the first UCLK edge and changed on the following edge
};
enum IUSCI_B0_SPI.UCCKPL_t
index URL

Clock polarity select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCCKPL_t {
    UCCKPL_OFF,
    // Inactive state is low
    UCCKPL
    // Inactive state is high
};
enum IUSCI_B0_SPI.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_B0_SPI.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_B0_SPI.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_B0_SPI.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_B0_SPI.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_B0_SPI.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_B0_SPI.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_B0_SPI.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_B0_SPI.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_B0_SPI.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_B0_SPI.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_B0_SPI.UCSSEL_SPI_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCSSEL_SPI_t {
    UCSSEL_0,
    // NA
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_B0_SPI.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_B0_SPI.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_B0_SPI.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_B0_SPI.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_B0_SPI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_B0_SPI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
typedef String StringArray[];
struct IUSCI_B0_SPI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_B0_SPI.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
metaonly struct UCxCTL0_t {
     IUSCI_SPI.UCCKPH_t UCCKPH;
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
     IUSCI_SPI.UCCKPL_t UCCKPL;
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
     IUSCI_SPI.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_SPI.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_SPI.UCMST_t UCMST;
    // Master mode select 0 Slave mode 1 Master mode
     IUSCI_SPI.UCMODE_SYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
     IUSCI_SPI.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_B0_SPI.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
metaonly struct UCxCTL1_t {
     IUSCI_SPI.UCSSEL_SPI_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_SPI.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_B0_SPI.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
metaonly struct UCxSTAT_t {
     IUSCI_SPI.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_SPI.UCFE_t UCFE;
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
     IUSCI_SPI.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_SPI.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_B0_SPI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_B0_SPI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_B0_SPI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_B0_SPI.Params.UCB0BR0 // instance
index URL

Bit Rate Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config Bits8 UCB0BR0 = 0;
config IUSCI_B0_SPI.Params.UCB0BR1 // instance
index URL

Bit Rate Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config Bits8 UCB0BR1 = 0;
config IUSCI_B0_SPI.Params.UCB0CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config IUSCI_B0_SPI.UCxCTL0_t UCB0CTL0 = {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config IUSCI_B0_SPI.Params.UCB0CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config IUSCI_B0_SPI.UCxCTL1_t UCB0CTL1 = {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_B0_SPI.Params.UCB0RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config Bits8 UCB0RXBUF = 0;
config IUSCI_B0_SPI.Params.UCB0STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config IUSCI_B0_SPI.UCxSTAT_t UCB0STAT = {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config IUSCI_B0_SPI.Params.UCB0TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config Bits8 UCB0TXBUF = 0;
config IUSCI_B0_SPI.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config Float UCLKHz = 1000000;
config IUSCI_B0_SPI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_B0_SPI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
config String owner;
IUSCI_B0_SPI.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_B0_SPI.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_B0_SPI.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_B0_SPI.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_B0_SPI.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_B0_SPI.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_B0_SPI.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_B0_SPI.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B0_SPI.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:06 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_B1_I2C

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_B1_I2C
index URL

Universal Serial Communication Interface B1 I2C 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
metaonly interface IUSCI_B1_I2C { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_I2C
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_B1_I2C inherits IUSCI_I2C {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCA10_t// Own addressing mode select {
         UCA10_OFF// Own address is a 7-bit address,
         UCA10// Own address is a 10-bit address
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCALIFG_t// Arbitration lost interrupt flag {
         UCALIFG_OFF// No interrupt pending,
         UCALIFG// Interrupt pending
    };
    enum UCBBUSY_t// Bus busy {
         UCBBUSY_OFF// Bus inactive,
         UCBBUSY// Bus busy
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCGCEN_t// General call response enable {
         UCGCEN_OFF// Do not respond to a general call,
         UCGCEN// Respond to a general call
    };
    enum UCGC_t// General call address received {
         UCGC_OFF// No general call address received,
         UCGC// General call address received
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMM_t// Multi-master environment select {
         UCMM_OFF// Single master environment. There is no other master in the system. The address compare unit is disabled,
         UCMM// Multi master environment
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCNACKIFG_t// Not-acknowledge received interrupt flag {
         UCNACKIFG_OFF// No interrupt pending,
         UCNACKIFG// Interrupt pending
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSCLLOW_t// SCL low {
         UCSCLLOW_OFF// SCL is not held low,
         UCSCLLOW// SCL is held low
    };
    enum UCSLA10_t// Slave addressing mode select {
         UCSLA10_OFF// Address slave with 7-bit address,
         UCSLA10// Address slave with 10-bit address
    };
    enum UCSSEL_I2C_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// UCLK,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSTPIFG_t// Stop condition interrupt flag {
         UCSTPIFG_OFF// No interrupt pending,
         UCSTPIFG// Interrupt pending
    };
    enum UCSTTIFG_t// Start condition interrupt flag {
         UCSTTIFG_OFF// No interrupt pending,
         UCSTTIFG// Interrupt pending
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTR_t// Transmitter/Receiver {
         UCTR_OFF// Receiver,
         UCTR// Transmitter
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    enum UCTXNACK_t// Transmit a NACK {
         UCTXNACK_OFF// Acknowledge normally,
         UCTXNACK// Generate NACK
    };
    enum UCTXSTP_t// Transmit STOP condition in master mode {
         UCTXSTP_OFF// No STOP generated,
         UCTXSTP// Generate STOP
    };
    enum UCTXSTT_t// Transmit START condition in master mode {
         UCTXSTT_OFF// Do not generate START condition,
         UCTXSTT// Generate START condition
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCBxI2COA_t// {
         IUSCI_I2C.UCGCEN_t UCGCEN// General call response enable 0 Do not respond to a general call 1 Respond to a general call;
        Bits16 I2COA// I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_I2C.UCA10_t UCA10// Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address;
         IUSCI_I2C.UCSLA10_t UCSLA10// Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address;
         IUSCI_I2C.UCMM_t UCMM// Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment;
         IUSCI_I2C.UCMST_t UCMST// Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode;
         IUSCI_I2C.UCMODE_SYNC_t UCMODE// USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode;
         IUSCI_I2C.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_I2C.UCSSEL_I2C_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_I2C.UCTR_t UCTR// Transmitter/Receiver 0 Receiver 1 Transmitter;
         IUSCI_I2C.UCTXNACK_t UCTXNACK// Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK;
         IUSCI_I2C.UCTXSTP_t UCTXSTP// Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP;
         IUSCI_I2C.UCTXSTT_t UCTXSTT// Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition;
         IUSCI_I2C.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_I2C.UCSCLLOW_t UCSCLLOW// SCL low 0 SCL is not held low 1 SCL is held low;
         IUSCI_I2C.UCGC_t UCGC// General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received;
         IUSCI_I2C.UCBBUSY_t UCBBUSY// Bus busy 0 Bus inactive 1 Bus busy;
         IUSCI_I2C.UCNACKIFG_t UCNACKIFG// Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCSTPIFG_t UCSTPIFG// Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCSTTIFG_t UCSTTIFG// Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCALIFG_t UCALIFG// Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Bits8 UCB1BR0// Bit Rate Control Register 0 = 0;
    config Bits8 UCB1BR1// Bit Rate Control Register 1 = 0;
    config IUSCI_B1_I2C.UCxCTL0_t UCB1CTL0// Control Register 0 = {
        UCA10: IUSCI_I2C.UCA10_OFF,
        UCSLA10: IUSCI_I2C.UCSLA10_OFF,
        UCMM: IUSCI_I2C.UCMM_OFF,
        UCMST: IUSCI_I2C.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    config IUSCI_B1_I2C.UCxCTL1_t UCB1CTL1// Control Register 1 = {
        UCSSEL: IUSCI_I2C.UCSSEL_0,
        UCTR: IUSCI_I2C.UCTR_OFF,
        UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
        UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
        UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    config IUSCI_B1_I2C.UCBxI2COA_t UCB1I2COA// I2C Own Address Register = {
        UCGCEN: IUSCI_I2C.UCGCEN_OFF,
        I2COA: 0
    };
    config Bits8 UCB1I2CSA// I2C Slave Address Register = 0;
    config Bits8 UCB1RXBUF// Receive Buffer Register = 0;
    config IUSCI_B1_I2C.UCxSTAT_t UCB1STAT// Status Register = {
        UCSCLLOW: IUSCI_I2C.UCSCLLOW,
        UCGC: IUSCI_I2C.UCGC,
        UCBBUSY: IUSCI_I2C.UCBBUSY,
        UCNACKIFG: IUSCI_I2C.UCNACKIFG,
        UCSTPIFG: IUSCI_I2C.UCSTPIFG,
        UCSTTIFG: IUSCI_I2C.UCSTTIFG,
        UCALIFG: IUSCI_I2C.UCALIFG
    };
    config Bits8 UCB1TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCBxI2CSA// Returns UCBxI2CSA register value based on which module();
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCBxI2CSA// Sets UCxxI2CSA register value based on which module(Bits8 value);
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_B1_I2C.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_B1_I2C.UCA10_t
index URL

Own addressing mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCA10_t {
    UCA10_OFF,
    // Own address is a 7-bit address
    UCA10
    // Own address is a 10-bit address
};
enum IUSCI_B1_I2C.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_B1_I2C.UCALIFG_t
index URL

Arbitration lost interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCALIFG_t {
    UCALIFG_OFF,
    // No interrupt pending
    UCALIFG
    // Interrupt pending
};
enum IUSCI_B1_I2C.UCBBUSY_t
index URL

Bus busy

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCBBUSY_t {
    UCBBUSY_OFF,
    // Bus inactive
    UCBBUSY
    // Bus busy
};
enum IUSCI_B1_I2C.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_B1_I2C.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_B1_I2C.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_B1_I2C.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_B1_I2C.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_B1_I2C.UCGCEN_t
index URL

General call response enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCGCEN_t {
    UCGCEN_OFF,
    // Do not respond to a general call
    UCGCEN
    // Respond to a general call
};
enum IUSCI_B1_I2C.UCGC_t
index URL

General call address received

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCGC_t {
    UCGC_OFF,
    // No general call address received
    UCGC
    // General call address received
};
enum IUSCI_B1_I2C.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_B1_I2C.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_B1_I2C.UCMM_t
index URL

Multi-master environment select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCMM_t {
    UCMM_OFF,
    // Single master environment. There is no other master in the system. The address compare unit is disabled
    UCMM
    // Multi master environment
};
enum IUSCI_B1_I2C.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_B1_I2C.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_B1_I2C.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_B1_I2C.UCNACKIFG_t
index URL

Not-acknowledge received interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCNACKIFG_t {
    UCNACKIFG_OFF,
    // No interrupt pending
    UCNACKIFG
    // Interrupt pending
};
enum IUSCI_B1_I2C.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_B1_I2C.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_B1_I2C.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_B1_I2C.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_B1_I2C.UCSCLLOW_t
index URL

SCL low

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCSCLLOW_t {
    UCSCLLOW_OFF,
    // SCL is not held low
    UCSCLLOW
    // SCL is held low
};
enum IUSCI_B1_I2C.UCSLA10_t
index URL

Slave addressing mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCSLA10_t {
    UCSLA10_OFF,
    // Address slave with 7-bit address
    UCSLA10
    // Address slave with 10-bit address
};
enum IUSCI_B1_I2C.UCSSEL_I2C_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCSSEL_I2C_t {
    UCSSEL_0,
    // UCLK
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_B1_I2C.UCSTPIFG_t
index URL

Stop condition interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCSTPIFG_t {
    UCSTPIFG_OFF,
    // No interrupt pending
    UCSTPIFG
    // Interrupt pending
};
enum IUSCI_B1_I2C.UCSTTIFG_t
index URL

Start condition interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCSTTIFG_t {
    UCSTTIFG_OFF,
    // No interrupt pending
    UCSTTIFG
    // Interrupt pending
};
enum IUSCI_B1_I2C.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_B1_I2C.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_B1_I2C.UCTR_t
index URL

Transmitter/Receiver

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCTR_t {
    UCTR_OFF,
    // Receiver
    UCTR
    // Transmitter
};
enum IUSCI_B1_I2C.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_B1_I2C.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
enum IUSCI_B1_I2C.UCTXNACK_t
index URL

Transmit a NACK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCTXNACK_t {
    UCTXNACK_OFF,
    // Acknowledge normally
    UCTXNACK
    // Generate NACK
};
enum IUSCI_B1_I2C.UCTXSTP_t
index URL

Transmit STOP condition in master mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCTXSTP_t {
    UCTXSTP_OFF,
    // No STOP generated
    UCTXSTP
    // Generate STOP
};
enum IUSCI_B1_I2C.UCTXSTT_t
index URL

Transmit START condition in master mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
enum UCTXSTT_t {
    UCTXSTT_OFF,
    // Do not generate START condition
    UCTXSTT
    // Generate START condition
};
typedef IUSCI_B1_I2C.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_B1_I2C.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
typedef String StringArray[];
struct IUSCI_B1_I2C.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_B1_I2C.UCBxI2COA_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
metaonly struct UCBxI2COA_t {
     IUSCI_I2C.UCGCEN_t UCGCEN;
    // General call response enable 0 Do not respond to a general call 1 Respond to a general call
    Bits16 I2COA;
    // I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB
};
struct IUSCI_B1_I2C.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
metaonly struct UCxCTL0_t {
     IUSCI_I2C.UCA10_t UCA10;
    // Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address
     IUSCI_I2C.UCSLA10_t UCSLA10;
    // Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address
     IUSCI_I2C.UCMM_t UCMM;
    // Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment
     IUSCI_I2C.UCMST_t UCMST;
    // Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode
     IUSCI_I2C.UCMODE_SYNC_t UCMODE;
    // USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode
     IUSCI_I2C.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode
};
struct IUSCI_B1_I2C.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
metaonly struct UCxCTL1_t {
     IUSCI_I2C.UCSSEL_I2C_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_I2C.UCTR_t UCTR;
    // Transmitter/Receiver 0 Receiver 1 Transmitter
     IUSCI_I2C.UCTXNACK_t UCTXNACK;
    // Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK
     IUSCI_I2C.UCTXSTP_t UCTXSTP;
    // Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP
     IUSCI_I2C.UCTXSTT_t UCTXSTT;
    // Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition
     IUSCI_I2C.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_B1_I2C.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
metaonly struct UCxSTAT_t {
     IUSCI_I2C.UCSCLLOW_t UCSCLLOW;
    // SCL low 0 SCL is not held low 1 SCL is held low
     IUSCI_I2C.UCGC_t UCGC;
    // General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received
     IUSCI_I2C.UCBBUSY_t UCBBUSY;
    // Bus busy 0 Bus inactive 1 Bus busy
     IUSCI_I2C.UCNACKIFG_t UCNACKIFG;
    // Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCSTPIFG_t UCSTPIFG;
    // Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCSTTIFG_t UCSTTIFG;
    // Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCALIFG_t UCALIFG;
    // Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending
};
struct IUSCI_B1_I2C.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_B1_I2C.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_B1_I2C.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_B1_I2C.Params.UCB1BR0 // instance
index URL

Bit Rate Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config Bits8 UCB1BR0 = 0;
config IUSCI_B1_I2C.Params.UCB1BR1 // instance
index URL

Bit Rate Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config Bits8 UCB1BR1 = 0;
config IUSCI_B1_I2C.Params.UCB1CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config IUSCI_B1_I2C.UCxCTL0_t UCB1CTL0 = {
    UCA10: IUSCI_I2C.UCA10_OFF,
    UCSLA10: IUSCI_I2C.UCSLA10_OFF,
    UCMM: IUSCI_I2C.UCMM_OFF,
    UCMST: IUSCI_I2C.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config IUSCI_B1_I2C.Params.UCB1CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config IUSCI_B1_I2C.UCxCTL1_t UCB1CTL1 = {
    UCSSEL: IUSCI_I2C.UCSSEL_0,
    UCTR: IUSCI_I2C.UCTR_OFF,
    UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
    UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
    UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_B1_I2C.Params.UCB1I2COA // instance
index URL

I2C Own Address Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config IUSCI_B1_I2C.UCBxI2COA_t UCB1I2COA = {
    UCGCEN: IUSCI_I2C.UCGCEN_OFF,
    I2COA: 0
};
config IUSCI_B1_I2C.Params.UCB1I2CSA // instance
index URL

I2C Slave Address Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config Bits8 UCB1I2CSA = 0;
config IUSCI_B1_I2C.Params.UCB1RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config Bits8 UCB1RXBUF = 0;
config IUSCI_B1_I2C.Params.UCB1STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config IUSCI_B1_I2C.UCxSTAT_t UCB1STAT = {
    UCSCLLOW: IUSCI_I2C.UCSCLLOW,
    UCGC: IUSCI_I2C.UCGC,
    UCBBUSY: IUSCI_I2C.UCBBUSY,
    UCNACKIFG: IUSCI_I2C.UCNACKIFG,
    UCSTPIFG: IUSCI_I2C.UCSTPIFG,
    UCSTTIFG: IUSCI_I2C.UCSTTIFG,
    UCALIFG: IUSCI_I2C.UCALIFG
};
config IUSCI_B1_I2C.Params.UCB1TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config Bits8 UCB1TXBUF = 0;
config IUSCI_B1_I2C.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config Float UCLKHz = 1000000;
config IUSCI_B1_I2C.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_B1_I2C.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
config String owner;
IUSCI_B1_I2C.getUCBxI2CSA() // instance
index URL

Returns UCBxI2CSA register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Bits8 getUCBxI2CSA();
SEE
getUCBxI2CSA
IUSCI_B1_I2C.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_B1_I2C.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_B1_I2C.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_B1_I2C.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_B1_I2C.setUCBxI2CSA() // instance
index URL

Sets UCxxI2CSA register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Void setUCBxI2CSA(Bits8 value);
SEE
setUCBxI2CSA
IUSCI_B1_I2C.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_B1_I2C.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_B1_I2C.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_B1_I2C.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_I2C.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:07 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_B1_SPI

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_B1_SPI
index URL

Universal Serial Communication Interface B1 SPI 2xx

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
metaonly interface IUSCI_B1_SPI { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI_SPI
    // inherits ti.catalog.msp430.peripherals.communication.IUSCI
        // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_B1_SPI inherits IUSCI_SPI {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCCKPH_t// Clock phase select {
         UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge,
         UCCKPH// Data is captured on the first UCLK edge and changed on the following edge
    };
    enum UCCKPL_t// Clock polarity select {
         UCCKPL_OFF// Inactive state is low,
         UCCKPL// Inactive state is high
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// NA,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_SPI.UCCKPH_t UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge;
         IUSCI_SPI.UCCKPL_t UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high;
         IUSCI_SPI.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_SPI.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_SPI.UCMST_t UCMST// Master mode select 0 Slave mode 1 Master mode;
         IUSCI_SPI.UCMODE_SYNC_t UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode;
         IUSCI_SPI.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_SPI.UCSSEL_SPI_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_SPI.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_SPI.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_SPI.UCFE_t UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred;
         IUSCI_SPI.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_SPI.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Bits8 UCB1BR0// Bit Rate Control Register 0 = 0;
    config Bits8 UCB1BR1// Bit Rate Control Register 1 = 0;
    config IUSCI_B1_SPI.UCxCTL0_t UCB1CTL0// Control Register 0 = {
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    config IUSCI_B1_SPI.UCxCTL1_t UCB1CTL1// Control Register 1 = {
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    config Bits8 UCB1RXBUF// Receive Buffer Register = 0;
    config IUSCI_B1_SPI.UCxSTAT_t UCB1STAT// Status Register = {
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    config Bits8 UCB1TXBUF// Transmit Buffer Register = 0;
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_B1_SPI.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_B1_SPI.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_B1_SPI.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_B1_SPI.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_B1_SPI.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_B1_SPI.UCCKPH_t
index URL

Clock phase select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCCKPH_t {
    UCCKPH_OFF,
    // Data is changed on the first UCLK edge and captured on the following edge
    UCCKPH
    // Data is captured on the first UCLK edge and changed on the following edge
};
enum IUSCI_B1_SPI.UCCKPL_t
index URL

Clock polarity select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCCKPL_t {
    UCCKPL_OFF,
    // Inactive state is low
    UCCKPL
    // Inactive state is high
};
enum IUSCI_B1_SPI.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_B1_SPI.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_B1_SPI.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_B1_SPI.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_B1_SPI.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_B1_SPI.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_B1_SPI.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_B1_SPI.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_B1_SPI.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_B1_SPI.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_B1_SPI.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_B1_SPI.UCSSEL_SPI_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCSSEL_SPI_t {
    UCSSEL_0,
    // NA
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_B1_SPI.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_B1_SPI.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_B1_SPI.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_B1_SPI.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_B1_SPI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_B1_SPI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
typedef String StringArray[];
struct IUSCI_B1_SPI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_B1_SPI.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
metaonly struct UCxCTL0_t {
     IUSCI_SPI.UCCKPH_t UCCKPH;
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
     IUSCI_SPI.UCCKPL_t UCCKPL;
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
     IUSCI_SPI.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_SPI.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_SPI.UCMST_t UCMST;
    // Master mode select 0 Slave mode 1 Master mode
     IUSCI_SPI.UCMODE_SYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
     IUSCI_SPI.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_B1_SPI.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
metaonly struct UCxCTL1_t {
     IUSCI_SPI.UCSSEL_SPI_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_SPI.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_B1_SPI.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
metaonly struct UCxSTAT_t {
     IUSCI_SPI.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_SPI.UCFE_t UCFE;
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
     IUSCI_SPI.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_SPI.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_B1_SPI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_B1_SPI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_B1_SPI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_B1_SPI.Params.UCB1BR0 // instance
index URL

Bit Rate Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config Bits8 UCB1BR0 = 0;
config IUSCI_B1_SPI.Params.UCB1BR1 // instance
index URL

Bit Rate Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config Bits8 UCB1BR1 = 0;
config IUSCI_B1_SPI.Params.UCB1CTL0 // instance
index URL

Control Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config IUSCI_B1_SPI.UCxCTL0_t UCB1CTL0 = {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config IUSCI_B1_SPI.Params.UCB1CTL1 // instance
index URL

Control Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config IUSCI_B1_SPI.UCxCTL1_t UCB1CTL1 = {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config IUSCI_B1_SPI.Params.UCB1RXBUF // instance
index URL

Receive Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config Bits8 UCB1RXBUF = 0;
config IUSCI_B1_SPI.Params.UCB1STAT // instance
index URL

Status Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config IUSCI_B1_SPI.UCxSTAT_t UCB1STAT = {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config IUSCI_B1_SPI.Params.UCB1TXBUF // instance
index URL

Transmit Buffer Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config Bits8 UCB1TXBUF = 0;
config IUSCI_B1_SPI.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config Float UCLKHz = 1000000;
config IUSCI_B1_SPI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_B1_SPI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
config String owner;
IUSCI_B1_SPI.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_B1_SPI.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_B1_SPI.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_B1_SPI.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_B1_SPI.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_B1_SPI.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_B1_SPI.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_B1_SPI.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_B1_SPI.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:07 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_I2C

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_I2C
index URL

Universal Serial Communication Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
metaonly interface IUSCI_I2C { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI
    // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_I2C inherits IUSCI {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCA10_t// Own addressing mode select {
         UCA10_OFF// Own address is a 7-bit address,
         UCA10// Own address is a 10-bit address
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCALIFG_t// Arbitration lost interrupt flag {
         UCALIFG_OFF// No interrupt pending,
         UCALIFG// Interrupt pending
    };
    enum UCBBUSY_t// Bus busy {
         UCBBUSY_OFF// Bus inactive,
         UCBBUSY// Bus busy
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCGCEN_t// General call response enable {
         UCGCEN_OFF// Do not respond to a general call,
         UCGCEN// Respond to a general call
    };
    enum UCGC_t// General call address received {
         UCGC_OFF// No general call address received,
         UCGC// General call address received
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMM_t// Multi-master environment select {
         UCMM_OFF// Single master environment. There is no other master in the system. The address compare unit is disabled,
         UCMM// Multi master environment
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCNACKIFG_t// Not-acknowledge received interrupt flag {
         UCNACKIFG_OFF// No interrupt pending,
         UCNACKIFG// Interrupt pending
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSCLLOW_t// SCL low {
         UCSCLLOW_OFF// SCL is not held low,
         UCSCLLOW// SCL is held low
    };
    enum UCSLA10_t// Slave addressing mode select {
         UCSLA10_OFF// Address slave with 7-bit address,
         UCSLA10// Address slave with 10-bit address
    };
    enum UCSSEL_I2C_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// UCLK,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSTPIFG_t// Stop condition interrupt flag {
         UCSTPIFG_OFF// No interrupt pending,
         UCSTPIFG// Interrupt pending
    };
    enum UCSTTIFG_t// Start condition interrupt flag {
         UCSTTIFG_OFF// No interrupt pending,
         UCSTTIFG// Interrupt pending
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTR_t// Transmitter/Receiver {
         UCTR_OFF// Receiver,
         UCTR// Transmitter
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    enum UCTXNACK_t// Transmit a NACK {
         UCTXNACK_OFF// Acknowledge normally,
         UCTXNACK// Generate NACK
    };
    enum UCTXSTP_t// Transmit STOP condition in master mode {
         UCTXSTP_OFF// No STOP generated,
         UCTXSTP// Generate STOP
    };
    enum UCTXSTT_t// Transmit START condition in master mode {
         UCTXSTT_OFF// Do not generate START condition,
         UCTXSTT// Generate START condition
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCBxI2COA_t// {
         IUSCI_I2C.UCGCEN_t UCGCEN// General call response enable 0 Do not respond to a general call 1 Respond to a general call;
        Bits16 I2COA// I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_I2C.UCA10_t UCA10// Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address;
         IUSCI_I2C.UCSLA10_t UCSLA10// Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address;
         IUSCI_I2C.UCMM_t UCMM// Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment;
         IUSCI_I2C.UCMST_t UCMST// Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode;
         IUSCI_I2C.UCMODE_SYNC_t UCMODE// USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode;
         IUSCI_I2C.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_I2C.UCSSEL_I2C_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_I2C.UCTR_t UCTR// Transmitter/Receiver 0 Receiver 1 Transmitter;
         IUSCI_I2C.UCTXNACK_t UCTXNACK// Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK;
         IUSCI_I2C.UCTXSTP_t UCTXSTP// Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP;
         IUSCI_I2C.UCTXSTT_t UCTXSTT// Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition;
         IUSCI_I2C.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_I2C.UCSCLLOW_t UCSCLLOW// SCL low 0 SCL is not held low 1 SCL is held low;
         IUSCI_I2C.UCGC_t UCGC// General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received;
         IUSCI_I2C.UCBBUSY_t UCBBUSY// Bus busy 0 Bus inactive 1 Bus busy;
         IUSCI_I2C.UCNACKIFG_t UCNACKIFG// Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCSTPIFG_t UCSTPIFG// Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCSTTIFG_t UCSTTIFG// Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending;
         IUSCI_I2C.UCALIFG_t UCALIFG// Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCBxI2CSA// Returns UCBxI2CSA register value based on which module();
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCBxI2CSA// Sets UCxxI2CSA register value based on which module(Bits8 value);
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_I2C.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_I2C.UCA10_t
index URL

Own addressing mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCA10_t {
    UCA10_OFF,
    // Own address is a 7-bit address
    UCA10
    // Own address is a 10-bit address
};
enum IUSCI_I2C.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_I2C.UCALIFG_t
index URL

Arbitration lost interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCALIFG_t {
    UCALIFG_OFF,
    // No interrupt pending
    UCALIFG
    // Interrupt pending
};
enum IUSCI_I2C.UCBBUSY_t
index URL

Bus busy

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCBBUSY_t {
    UCBBUSY_OFF,
    // Bus inactive
    UCBBUSY
    // Bus busy
};
enum IUSCI_I2C.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_I2C.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_I2C.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_I2C.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_I2C.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_I2C.UCGCEN_t
index URL

General call response enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCGCEN_t {
    UCGCEN_OFF,
    // Do not respond to a general call
    UCGCEN
    // Respond to a general call
};
enum IUSCI_I2C.UCGC_t
index URL

General call address received

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCGC_t {
    UCGC_OFF,
    // No general call address received
    UCGC
    // General call address received
};
enum IUSCI_I2C.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_I2C.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_I2C.UCMM_t
index URL

Multi-master environment select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCMM_t {
    UCMM_OFF,
    // Single master environment. There is no other master in the system. The address compare unit is disabled
    UCMM
    // Multi master environment
};
enum IUSCI_I2C.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_I2C.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_I2C.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_I2C.UCNACKIFG_t
index URL

Not-acknowledge received interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCNACKIFG_t {
    UCNACKIFG_OFF,
    // No interrupt pending
    UCNACKIFG
    // Interrupt pending
};
enum IUSCI_I2C.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_I2C.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_I2C.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_I2C.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_I2C.UCSCLLOW_t
index URL

SCL low

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCSCLLOW_t {
    UCSCLLOW_OFF,
    // SCL is not held low
    UCSCLLOW
    // SCL is held low
};
enum IUSCI_I2C.UCSLA10_t
index URL

Slave addressing mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCSLA10_t {
    UCSLA10_OFF,
    // Address slave with 7-bit address
    UCSLA10
    // Address slave with 10-bit address
};
enum IUSCI_I2C.UCSSEL_I2C_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCSSEL_I2C_t {
    UCSSEL_0,
    // UCLK
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_I2C.UCSTPIFG_t
index URL

Stop condition interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCSTPIFG_t {
    UCSTPIFG_OFF,
    // No interrupt pending
    UCSTPIFG
    // Interrupt pending
};
enum IUSCI_I2C.UCSTTIFG_t
index URL

Start condition interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCSTTIFG_t {
    UCSTTIFG_OFF,
    // No interrupt pending
    UCSTTIFG
    // Interrupt pending
};
enum IUSCI_I2C.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_I2C.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_I2C.UCTR_t
index URL

Transmitter/Receiver

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCTR_t {
    UCTR_OFF,
    // Receiver
    UCTR
    // Transmitter
};
enum IUSCI_I2C.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_I2C.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
enum IUSCI_I2C.UCTXNACK_t
index URL

Transmit a NACK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCTXNACK_t {
    UCTXNACK_OFF,
    // Acknowledge normally
    UCTXNACK
    // Generate NACK
};
enum IUSCI_I2C.UCTXSTP_t
index URL

Transmit STOP condition in master mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCTXSTP_t {
    UCTXSTP_OFF,
    // No STOP generated
    UCTXSTP
    // Generate STOP
};
enum IUSCI_I2C.UCTXSTT_t
index URL

Transmit START condition in master mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
enum UCTXSTT_t {
    UCTXSTT_OFF,
    // Do not generate START condition
    UCTXSTT
    // Generate START condition
};
typedef IUSCI_I2C.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_I2C.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
typedef String StringArray[];
struct IUSCI_I2C.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_I2C.UCBxI2COA_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
metaonly struct UCBxI2COA_t {
     IUSCI_I2C.UCGCEN_t UCGCEN;
    // General call response enable 0 Do not respond to a general call 1 Respond to a general call
    Bits16 I2COA;
    // I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB
};
struct IUSCI_I2C.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
metaonly struct UCxCTL0_t {
     IUSCI_I2C.UCA10_t UCA10;
    // Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address
     IUSCI_I2C.UCSLA10_t UCSLA10;
    // Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address
     IUSCI_I2C.UCMM_t UCMM;
    // Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment
     IUSCI_I2C.UCMST_t UCMST;
    // Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode
     IUSCI_I2C.UCMODE_SYNC_t UCMODE;
    // USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode
     IUSCI_I2C.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode
};
struct IUSCI_I2C.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
metaonly struct UCxCTL1_t {
     IUSCI_I2C.UCSSEL_I2C_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_I2C.UCTR_t UCTR;
    // Transmitter/Receiver 0 Receiver 1 Transmitter
     IUSCI_I2C.UCTXNACK_t UCTXNACK;
    // Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK
     IUSCI_I2C.UCTXSTP_t UCTXSTP;
    // Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP
     IUSCI_I2C.UCTXSTT_t UCTXSTT;
    // Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition
     IUSCI_I2C.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_I2C.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
metaonly struct UCxSTAT_t {
     IUSCI_I2C.UCSCLLOW_t UCSCLLOW;
    // SCL low 0 SCL is not held low 1 SCL is held low
     IUSCI_I2C.UCGC_t UCGC;
    // General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received
     IUSCI_I2C.UCBBUSY_t UCBBUSY;
    // Bus busy 0 Bus inactive 1 Bus busy
     IUSCI_I2C.UCNACKIFG_t UCNACKIFG;
    // Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCSTPIFG_t UCSTPIFG;
    // Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCSTTIFG_t UCSTTIFG;
    // Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending
     IUSCI_I2C.UCALIFG_t UCALIFG;
    // Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending
};
struct IUSCI_I2C.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_I2C.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_I2C.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_I2C.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
config Float UCLKHz = 1000000;
config IUSCI_I2C.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_I2C.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
config String owner;
IUSCI_I2C.getUCBxI2CSA() // instance
index URL

Returns UCBxI2CSA register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Bits8 getUCBxI2CSA();
SEE
getUCBxI2CSA
IUSCI_I2C.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_I2C.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_I2C.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_I2C.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_I2C.setUCBxI2CSA() // instance
index URL

Sets UCxxI2CSA register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Void setUCBxI2CSA(Bits8 value);
SEE
setUCBxI2CSA
IUSCI_I2C.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_I2C.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_I2C.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_I2C.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_I2C.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:07 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_SPI

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_SPI
index URL

Universal Serial Communication Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
metaonly interface IUSCI_SPI { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI
    // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_SPI inherits IUSCI {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCCKPH_t// Clock phase select {
         UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge,
         UCCKPH// Data is captured on the first UCLK edge and changed on the following edge
    };
    enum UCCKPL_t// Clock polarity select {
         UCCKPL_OFF// Inactive state is low,
         UCCKPL// Inactive state is high
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCMST_t// Master mode select {
         UCMST_OFF// Slave mode,
         UCMST// Master mode
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// NA,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_SPI.UCCKPH_t UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge;
         IUSCI_SPI.UCCKPL_t UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high;
         IUSCI_SPI.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_SPI.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_SPI.UCMST_t UCMST// Master mode select 0 Slave mode 1 Master mode;
         IUSCI_SPI.UCMODE_SYNC_t UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode;
         IUSCI_SPI.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_SPI.UCSSEL_SPI_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_SPI.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_SPI.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_SPI.UCFE_t UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred;
         IUSCI_SPI.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_SPI.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_SPI.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_SPI.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_SPI.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_SPI.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_SPI.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_SPI.UCCKPH_t
index URL

Clock phase select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCCKPH_t {
    UCCKPH_OFF,
    // Data is changed on the first UCLK edge and captured on the following edge
    UCCKPH
    // Data is captured on the first UCLK edge and changed on the following edge
};
enum IUSCI_SPI.UCCKPL_t
index URL

Clock polarity select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCCKPL_t {
    UCCKPL_OFF,
    // Inactive state is low
    UCCKPL
    // Inactive state is high
};
enum IUSCI_SPI.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_SPI.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_SPI.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_SPI.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_SPI.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_SPI.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_SPI.UCMST_t
index URL

Master mode select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCMST_t {
    UCMST_OFF,
    // Slave mode
    UCMST
    // Master mode
};
enum IUSCI_SPI.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_SPI.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_SPI.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_SPI.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_SPI.UCSSEL_SPI_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCSSEL_SPI_t {
    UCSSEL_0,
    // NA
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_SPI.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_SPI.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_SPI.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_SPI.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_SPI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_SPI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
typedef String StringArray[];
struct IUSCI_SPI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_SPI.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
metaonly struct UCxCTL0_t {
     IUSCI_SPI.UCCKPH_t UCCKPH;
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
     IUSCI_SPI.UCCKPL_t UCCKPL;
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
     IUSCI_SPI.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_SPI.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_SPI.UCMST_t UCMST;
    // Master mode select 0 Slave mode 1 Master mode
     IUSCI_SPI.UCMODE_SYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
     IUSCI_SPI.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_SPI.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
metaonly struct UCxCTL1_t {
     IUSCI_SPI.UCSSEL_SPI_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_SPI.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_SPI.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
metaonly struct UCxSTAT_t {
     IUSCI_SPI.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_SPI.UCFE_t UCFE;
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
     IUSCI_SPI.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_SPI.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_SPI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_SPI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_SPI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_SPI.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
config Float UCLKHz = 1000000;
config IUSCI_SPI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_SPI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
config String owner;
IUSCI_SPI.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_SPI.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_SPI.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_SPI.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_SPI.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_SPI.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_SPI.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_SPI.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_SPI.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:07 GMT


interface ti.catalog.msp430.peripherals.communication.IUSCI_UART

metaonly interface ti.catalog.msp430.peripherals.communication.IUSCI_UART
index URL

Universal Serial Communication Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly interface IUSCI_UART { ...
// inherits ti.catalog.msp430.peripherals.communication.IUSCI
    // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSCI_UART inherits IUSCI {
module-wide constants & types
    enum UC7BIT_t// Character length. Selects 7-bit or 8-bit character length {
         UC7BIT_OFF// 8-bit,
         UC7BIT// 7-bit
    };
    enum UCABDEN_t// Automatic baud rate detect enable {
         UCABDEN_OFF// Baud rate detection disabled. Length of break and synch field is not measured,
         UCABDEN// Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
    };
    enum UCADDR_t// Address received in address-bit multiprocessor mode {
         UCADDR_OFF// Received character is data,
         UCADDR// Received character is an address
    };
    enum UCBRF_t// First modulation stage select {
         UCBRF_0// First stage 0,
         UCBRF_1// First stage 1,
         UCBRF_2// First stage 2,
         UCBRF_3// First stage 3,
         UCBRF_4// First stage 4,
         UCBRF_5// First stage 5,
         UCBRF_6// First stage 6,
         UCBRF_7// First stage 7,
         UCBRF_8// First stage 8,
         UCBRF_9// First stage 9,
         UCBRF_10// First stage 10,
         UCBRF_11// First stage 11,
         UCBRF_12// First stage 12,
         UCBRF_13// First stage 13,
         UCBRF_14// First stage 14,
         UCBRF_15// First stage 15
    };
    enum UCBRKIE_t// Receive break character interrupt-enable {
         UCBRKIE_OFF// Received break characters do not set UCAxRXIFG,
         UCBRKIE// Received break characters set UCAxRXIFG
    };
    enum UCBRK_t// Break detect flag {
         UCBRK_OFF// No break condition,
         UCBRK// Break condition occurred
    };
    enum UCBRS_t// Second modulation stage select {
         UCBRS_0// Second stage 0,
         UCBRS_1// Second stage 1,
         UCBRS_2// Second stage 2,
         UCBRS_3// Second stage 3,
         UCBRS_4// Second stage 4,
         UCBRS_5// Second stage 5,
         UCBRS_6// Second stage 6,
         UCBRS_7// Second stage 7
    };
    enum UCBTOE_t// Break time out error {
         UCBTOE_OFF// No error,
         UCBTOE// Length of break field exceeded 22 bit times
    };
    enum UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress {
         UCBUSY_OFF// USCI inactive,
         UCBUSY// USCI transmitting or receiving
    };
    enum UCDELIM0_t// Break/synch delimiter length bit 0 {
         UCDELIM0_OFF// Break Sync Delimiter bit 0 Off,
         UCDELIM0// Break Sync Delimiter bit 0 On
    };
    enum UCDELIM1_t// Break/synch delimiter length bit 1 {
         UCDELIM1_OFF// Break Sync Delimiter bit 1 Off,
         UCDELIM1// Break Sync Delimiter bit 1 On
    };
    enum UCDORM_t// Dormant. Puts USCI into sleep mode {
         UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG,
         UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    };
    enum UCFE_t// Framing error flag {
         UCFE_OFF// 0 No error,
         UCFE// Character received with low stop bit
    };
    enum UCIDLE_t// Idle line detected in idle-line multiprocessor mode {
         UCIDLE_OFF// No idle line detected,
         UCIDLE// Idle line detected
    };
    enum UCIREN_t// IrDA encoder/decoder enable {
         UCIREN_OFF// IrDA encoder/decoder disabled,
         UCIREN// IrDA encoder/decoder enabled
    };
    enum UCIRRXFE_t// IrDA receive filter enabled {
         UCIRRXFE_OFF// Receive filter disabled,
         UCIRRXFE// Receive filter enabled
    };
    enum UCIRRXFL0_t// IRDA Receive Filter Length Bit 0 {
         UCIRRXFL0_OFF// Bit 0 OFF,
         UCIRRXFL0// Bit 0 ON
    };
    enum UCIRRXFL1_t// IRDA Receive Filter Length Bit 1 {
         UCIRRXFL1_OFF// Bit 1 OFF,
         UCIRRXFL1// Bit 1 ON
    };
    enum UCIRRXFL2_t// IRDA Receive Filter Length Bit 2 {
         UCIRRXFL2_OFF// Bit 2 OFF,
         UCIRRXFL2// Bit 2 ON
    };
    enum UCIRRXFL3_t// IRDA Receive Filter Length Bit 3 {
         UCIRRXFL3_OFF// Bit 3 OFF,
         UCIRRXFL3// Bit 3 ON
    };
    enum UCIRRXFL4_t// IRDA Receive Filter Length Bit 4 {
         UCIRRXFL4_OFF// Bit 4 OFF,
         UCIRRXFL4// Bit 4 ON
    };
    enum UCIRRXFL5_t// IRDA Receive Filter Length Bit 5 {
         UCIRRXFL5_OFF// Bit 5 OFF,
         UCIRRXFL5// Bit 5 ON
    };
    enum UCIRRXPL_t// IrDA receive input UCAxRXD polarity {
         UCIRRXPL_OFF// IrDA transceiver delivers a high pulse when a light pulse is seen,
         UCIRRXPL// IrDA transceiver delivers a low pulse when a light pulse is seen
    };
    enum UCIRTXCLK_t// IrDA transmit pulse clock select {
         UCIRTXCLK_OFF// BRCLK,
         UCIRTXCLK// BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
    };
    enum UCIRTXPL0_t// IRDA Transmit Pulse Length Bit 0 {
         UCIRTXPL0_OFF// Bit 0 OFF,
         UCIRTXPL0// Bit 0 ON
    };
    enum UCIRTXPL1_t// IRDA Transmit Pulse Length Bit 1 {
         UCIRTXPL1_OFF// Bit 1 OFF,
         UCIRTXPL1// Bit 1 ON
    };
    enum UCIRTXPL2_t// IRDA Transmit Pulse Length Bit 2 {
         UCIRTXPL2_OFF// Bit 2 OFF,
         UCIRTXPL2// Bit 2 ON
    };
    enum UCIRTXPL3_t// IRDA Transmit Pulse Length Bit 3 {
         UCIRTXPL3_OFF// Bit 3 OFF,
         UCIRTXPL3// Bit 3 ON
    };
    enum UCIRTXPL4_t// IRDA Transmit Pulse Length Bit 4 {
         UCIRTXPL4_OFF// Bit 4 OFF,
         UCIRTXPL4// Bit 4 ON
    };
    enum UCIRTXPL5_t// IRDA Transmit Pulse Length Bit 5 {
         UCIRTXPL5_OFF// Bit 5 OFF,
         UCIRTXPL5// Bit 5 ON
    };
    enum UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode {
         UCLISTEN_OFF// Disabled,
         UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver
    };
    enum UCMODE_ASYNC_t// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0 {
         UCMODE_0// UART Mode,
         UCMODE_1// Idle-Line Multiprocessor Mode,
         UCMODE_2// Address-Bit Multiprocessor Mode,
         UCMODE_3// UART Mode with automatic baud rate detection
    };
    enum UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1 {
         UCMODE_0// 3-Pin SPI,
         UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1,
         UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0,
         UCMODE_3// I2C Mode
    };
    enum UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register {
         UCMSB_OFF// LSB first,
         UCMSB// MSB first
    };
    enum UCOE_t// Overrun error flag {
         UCOE_OFF// No error,
         UCOE// Overrun error occurred
    };
    enum UCOS16_t// Oversampling mode enabled {
         UCOS16_OFF// Disabled,
         UCOS16// Enabled
    };
    enum UCPAR_t// Parity select. UCPAR is not used when parity is disabled {
         UCPAR_OFF// Odd parity,
         UCPAR// Even parity
    };
    enum UCPEN_t// Parity enable {
         UCPEN_OFF// Parity Disabled,
         UCPEN// Parity Enabled
    };
    enum UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0 {
         UCPE_OFF// No error,
         UCPE// Character received with parity error
    };
    enum UCRXEIE_t// Receive erroneous-character interrupt-enable {
         UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set,
         UCRXEIE// Erroneous characters received will set UCAxRXIFG
    };
    enum UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read {
         UCRXERR_OFF// No receive errors detected,
         UCRXERR// Receive error detected
    };
    enum UCSPB_t// Stop bit select. Number of stop bits {
         UCSPB_OFF// One stop bit,
         UCSPB// Two stop bits
    };
    enum UCSSEL_UART_t// USCI clock source select. These bits select the BRCLK source clock {
         UCSSEL_0// UCLK,
         UCSSEL_1// ACLK,
         UCSSEL_2// SMCLK
    };
    enum UCSTOE_t// Synch field time out error {
         UCSTOE_OFF// No error,
         UCSTOE// Length of synch field exceeded measurable time
    };
    enum UCSWRST_t// Software reset enable {
         UCSWRST_OFF// Disabled. USCI reset released for operation,
         UCSWRST// Enabled. USCI logic held in reset state
    };
    enum UCSYNC_t// Synchronous mode enable {
         UCSYNC_OFF// Asynchronous mode,
         UCSYNC// Synchronous Mode
    };
    enum UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode {
         UCTXADDR_OFF// Next frame transmitted is data,
         UCTXADDR// Next frame transmitted is an address
    };
    enum UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer {
         UCTXBRK_OFF// Next frame transmitted is not a break,
         UCTXBRK// Next frame transmitted is a break or a break/synch
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct UCxABCTL_t// {
         IUSCI_UART.UCDELIM1_t UCDELIM1// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times;
         IUSCI_UART.UCDELIM0_t UCDELIM0// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times;
         IUSCI_UART.UCSTOE_t UCSTOE// Synch field time out error 0 No error 1 Length of synch field exceeded measurable time;
         IUSCI_UART.UCBTOE_t UCBTOE// Break time out error 0 No error 1 Length of break field exceeded 22 bit times;
         IUSCI_UART.UCABDEN_t UCABDEN// Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly;
    };
    metaonly struct UCxCTL0_t// {
         IUSCI_UART.UCPEN_t UCPEN// Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation;
         IUSCI_UART.UCPAR_t UCPAR// Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity;
         IUSCI_UART.UCMSB_t UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first;
         IUSCI_UART.UC7BIT_t UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data;
         IUSCI_UART.UCSPB_t UCSPB// Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits;
         IUSCI_UART.UCMODE_ASYNC_t UCMODE// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection;
         IUSCI_UART.UCSYNC_t UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode;
    };
    metaonly struct UCxCTL1_t// {
         IUSCI_UART.UCSSEL_UART_t UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK;
         IUSCI_UART.UCRXEIE_t UCRXEIE// Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG;
         IUSCI_UART.UCBRKIE_t UCBRKIE// Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG;
         IUSCI_UART.UCDORM_t UCDORM// Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
         IUSCI_UART.UCTXADDR_t UCTXADDR// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address;
         IUSCI_UART.UCTXBRK_t UCTXBRK// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch;
         IUSCI_UART.UCSWRST_t UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state;
    };
    metaonly struct UCxIRRCTL_t// {
         IUSCI_UART.UCIRRXFL5_t UCIRRXFL5// IRDA Receive Filter Length Bit 5;
         IUSCI_UART.UCIRRXFL4_t UCIRRXFL4// IRDA Receive Filter Length Bit 4;
         IUSCI_UART.UCIRRXFL3_t UCIRRXFL3// IRDA Receive Filter Length Bit 3;
         IUSCI_UART.UCIRRXFL2_t UCIRRXFL2// IRDA Receive Filter Length Bit 2;
         IUSCI_UART.UCIRRXFL1_t UCIRRXFL1// IRDA Receive Filter Length Bit 1;
         IUSCI_UART.UCIRRXFL0_t UCIRRXFL0// IRDA Receive Filter Length Bit 0;
         IUSCI_UART.UCIRRXPL_t UCIRRXPL// IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen;
         IUSCI_UART.UCIRRXFE_t UCIRRXFE// IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled;
    };
    metaonly struct UCxIRTCTL_t// {
         IUSCI_UART.UCIRTXPL5_t UCIRTXPL5// IRDA Transmit Pulse Length Bit 5;
         IUSCI_UART.UCIRTXPL4_t UCIRTXPL4// IRDA Transmit Pulse Length Bit 4;
         IUSCI_UART.UCIRTXPL3_t UCIRTXPL3// IRDA Transmit Pulse Length Bit 3;
         IUSCI_UART.UCIRTXPL2_t UCIRTXPL2// IRDA Transmit Pulse Length Bit 2;
         IUSCI_UART.UCIRTXPL1_t UCIRTXPL1// IRDA Transmit Pulse Length Bit 1;
         IUSCI_UART.UCIRTXPL0_t UCIRTXPL0// IRDA Transmit Pulse Length Bit 0;
         IUSCI_UART.UCIRTXCLK_t UCIRTXCLK// IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK;
         IUSCI_UART.UCIREN_t UCIREN// IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled;
    };
    metaonly struct UCxMCTL_t// {
         IUSCI_UART.UCBRF_t UCBRF// First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0;
         IUSCI_UART.UCBRS_t UCBRS// Second modulation stage select. These bits determine the modulation pattern for BITCLK;
         IUSCI_UART.UCOS16_t UCOS16// Oversampling mode enabled 0 Disabled 1 Enabled;
    };
    metaonly struct UCxSTAT_t// {
         IUSCI_UART.UCLISTEN_t UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver;
         IUSCI_UART.UCFE_t UCFE// Framing error flag 0 No error 1 Character received with low stop bit;
         IUSCI_UART.UCOE_t UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred;
         IUSCI_UART.UCPE_t UCPE// Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error;
         IUSCI_UART.UCBRK_t UCBRK// Break detect flag 0 No break condition 1 Break condition occurred;
         IUSCI_UART.UCRXERR_t UCRXERR// Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected;
         IUSCI_UART.UCADDR_t UCADDR// Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address;
         IUSCI_UART.UCIDLE_t UCIDLE// Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected;
         IUSCI_UART.UCBUSY_t UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Float UCLKHz// Stores the UCLK external clock frequency in float = 1000000;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bits8 getUCxxBR0// Returns UCxxBR0 register value based on which module();
    Bits8 getUCxxBR1// Returns UCxxBR1 register value based on which module();
    Bool getUCxxRXIE// Gets UCxxRXIE bit();
    Bool getUCxxTXIE// Gets UCxxTXIE bit();
    Void setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value);
    Void setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value);
    Bool setUCxxRXIE// Sets UCxxRXIE bit(Bool set);
    Bool setUCxxTXIE// Sets UCxxTXIE bit(Bool set);
}
enum IUSCI_UART.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UC7BIT_t {
    UC7BIT_OFF,
    // 8-bit
    UC7BIT
    // 7-bit
};
enum IUSCI_UART.UCABDEN_t
index URL

Automatic baud rate detect enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCABDEN_t {
    UCABDEN_OFF,
    // Baud rate detection disabled. Length of break and synch field is not measured
    UCABDEN
    // Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
};
enum IUSCI_UART.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCADDR_t {
    UCADDR_OFF,
    // Received character is data
    UCADDR
    // Received character is an address
};
enum IUSCI_UART.UCBRF_t
index URL

First modulation stage select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCBRF_t {
    UCBRF_0,
    // First stage 0
    UCBRF_1,
    // First stage 1
    UCBRF_2,
    // First stage 2
    UCBRF_3,
    // First stage 3
    UCBRF_4,
    // First stage 4
    UCBRF_5,
    // First stage 5
    UCBRF_6,
    // First stage 6
    UCBRF_7,
    // First stage 7
    UCBRF_8,
    // First stage 8
    UCBRF_9,
    // First stage 9
    UCBRF_10,
    // First stage 10
    UCBRF_11,
    // First stage 11
    UCBRF_12,
    // First stage 12
    UCBRF_13,
    // First stage 13
    UCBRF_14,
    // First stage 14
    UCBRF_15
    // First stage 15
};
enum IUSCI_UART.UCBRKIE_t
index URL

Receive break character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCBRKIE_t {
    UCBRKIE_OFF,
    // Received break characters do not set UCAxRXIFG
    UCBRKIE
    // Received break characters set UCAxRXIFG
};
enum IUSCI_UART.UCBRK_t
index URL

Break detect flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCBRK_t {
    UCBRK_OFF,
    // No break condition
    UCBRK
    // Break condition occurred
};
enum IUSCI_UART.UCBRS_t
index URL

Second modulation stage select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCBRS_t {
    UCBRS_0,
    // Second stage 0
    UCBRS_1,
    // Second stage 1
    UCBRS_2,
    // Second stage 2
    UCBRS_3,
    // Second stage 3
    UCBRS_4,
    // Second stage 4
    UCBRS_5,
    // Second stage 5
    UCBRS_6,
    // Second stage 6
    UCBRS_7
    // Second stage 7
};
enum IUSCI_UART.UCBTOE_t
index URL

Break time out error

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCBTOE_t {
    UCBTOE_OFF,
    // No error
    UCBTOE
    // Length of break field exceeded 22 bit times
};
enum IUSCI_UART.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCBUSY_t {
    UCBUSY_OFF,
    // USCI inactive
    UCBUSY
    // USCI transmitting or receiving
};
enum IUSCI_UART.UCDELIM0_t
index URL

Break/synch delimiter length bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCDELIM0_t {
    UCDELIM0_OFF,
    // Break Sync Delimiter bit 0 Off
    UCDELIM0
    // Break Sync Delimiter bit 0 On
};
enum IUSCI_UART.UCDELIM1_t
index URL

Break/synch delimiter length bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCDELIM1_t {
    UCDELIM1_OFF,
    // Break Sync Delimiter bit 1 Off
    UCDELIM1
    // Break Sync Delimiter bit 1 On
};
enum IUSCI_UART.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCDORM_t {
    UCDORM_OFF,
    // Not dormant. All received characters will set UCAxRXIFG
    UCDORM
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
};
enum IUSCI_UART.UCFE_t
index URL

Framing error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCFE_t {
    UCFE_OFF,
    // 0 No error
    UCFE
    // Character received with low stop bit
};
enum IUSCI_UART.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIDLE_t {
    UCIDLE_OFF,
    // No idle line detected
    UCIDLE
    // Idle line detected
};
enum IUSCI_UART.UCIREN_t
index URL

IrDA encoder/decoder enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIREN_t {
    UCIREN_OFF,
    // IrDA encoder/decoder disabled
    UCIREN
    // IrDA encoder/decoder enabled
};
enum IUSCI_UART.UCIRRXFE_t
index URL

IrDA receive filter enabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXFE_t {
    UCIRRXFE_OFF,
    // Receive filter disabled
    UCIRRXFE
    // Receive filter enabled
};
enum IUSCI_UART.UCIRRXFL0_t
index URL

IRDA Receive Filter Length Bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXFL0_t {
    UCIRRXFL0_OFF,
    // Bit 0 OFF
    UCIRRXFL0
    // Bit 0 ON
};
enum IUSCI_UART.UCIRRXFL1_t
index URL

IRDA Receive Filter Length Bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXFL1_t {
    UCIRRXFL1_OFF,
    // Bit 1 OFF
    UCIRRXFL1
    // Bit 1 ON
};
enum IUSCI_UART.UCIRRXFL2_t
index URL

IRDA Receive Filter Length Bit 2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXFL2_t {
    UCIRRXFL2_OFF,
    // Bit 2 OFF
    UCIRRXFL2
    // Bit 2 ON
};
enum IUSCI_UART.UCIRRXFL3_t
index URL

IRDA Receive Filter Length Bit 3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXFL3_t {
    UCIRRXFL3_OFF,
    // Bit 3 OFF
    UCIRRXFL3
    // Bit 3 ON
};
enum IUSCI_UART.UCIRRXFL4_t
index URL

IRDA Receive Filter Length Bit 4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXFL4_t {
    UCIRRXFL4_OFF,
    // Bit 4 OFF
    UCIRRXFL4
    // Bit 4 ON
};
enum IUSCI_UART.UCIRRXFL5_t
index URL

IRDA Receive Filter Length Bit 5

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXFL5_t {
    UCIRRXFL5_OFF,
    // Bit 5 OFF
    UCIRRXFL5
    // Bit 5 ON
};
enum IUSCI_UART.UCIRRXPL_t
index URL

IrDA receive input UCAxRXD polarity

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRRXPL_t {
    UCIRRXPL_OFF,
    // IrDA transceiver delivers a high pulse when a light pulse is seen
    UCIRRXPL
    // IrDA transceiver delivers a low pulse when a light pulse is seen
};
enum IUSCI_UART.UCIRTXCLK_t
index URL

IrDA transmit pulse clock select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRTXCLK_t {
    UCIRTXCLK_OFF,
    // BRCLK
    UCIRTXCLK
    // BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
};
enum IUSCI_UART.UCIRTXPL0_t
index URL

IRDA Transmit Pulse Length Bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRTXPL0_t {
    UCIRTXPL0_OFF,
    // Bit 0 OFF
    UCIRTXPL0
    // Bit 0 ON
};
enum IUSCI_UART.UCIRTXPL1_t
index URL

IRDA Transmit Pulse Length Bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRTXPL1_t {
    UCIRTXPL1_OFF,
    // Bit 1 OFF
    UCIRTXPL1
    // Bit 1 ON
};
enum IUSCI_UART.UCIRTXPL2_t
index URL

IRDA Transmit Pulse Length Bit 2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRTXPL2_t {
    UCIRTXPL2_OFF,
    // Bit 2 OFF
    UCIRTXPL2
    // Bit 2 ON
};
enum IUSCI_UART.UCIRTXPL3_t
index URL

IRDA Transmit Pulse Length Bit 3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRTXPL3_t {
    UCIRTXPL3_OFF,
    // Bit 3 OFF
    UCIRTXPL3
    // Bit 3 ON
};
enum IUSCI_UART.UCIRTXPL4_t
index URL

IRDA Transmit Pulse Length Bit 4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRTXPL4_t {
    UCIRTXPL4_OFF,
    // Bit 4 OFF
    UCIRTXPL4
    // Bit 4 ON
};
enum IUSCI_UART.UCIRTXPL5_t
index URL

IRDA Transmit Pulse Length Bit 5

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCIRTXPL5_t {
    UCIRTXPL5_OFF,
    // Bit 5 OFF
    UCIRTXPL5
    // Bit 5 ON
};
enum IUSCI_UART.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCLISTEN_t {
    UCLISTEN_OFF,
    // Disabled
    UCLISTEN
    // Enabled. UCAxTXD is internally fed back to the receiver
};
enum IUSCI_UART.UCMODE_ASYNC_t
index URL

USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCMODE_ASYNC_t {
    UCMODE_0,
    // UART Mode
    UCMODE_1,
    // Idle-Line Multiprocessor Mode
    UCMODE_2,
    // Address-Bit Multiprocessor Mode
    UCMODE_3
    // UART Mode with automatic baud rate detection
};
enum IUSCI_UART.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCMODE_SYNC_t {
    UCMODE_0,
    // 3-Pin SPI
    UCMODE_1,
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    UCMODE_2,
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    UCMODE_3
    // I2C Mode
};
enum IUSCI_UART.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCMSB_t {
    UCMSB_OFF,
    // LSB first
    UCMSB
    // MSB first
};
enum IUSCI_UART.UCOE_t
index URL

Overrun error flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCOE_t {
    UCOE_OFF,
    // No error
    UCOE
    // Overrun error occurred
};
enum IUSCI_UART.UCOS16_t
index URL

Oversampling mode enabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCOS16_t {
    UCOS16_OFF,
    // Disabled
    UCOS16
    // Enabled
};
enum IUSCI_UART.UCPAR_t
index URL

Parity select. UCPAR is not used when parity is disabled

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCPAR_t {
    UCPAR_OFF,
    // Odd parity
    UCPAR
    // Even parity
};
enum IUSCI_UART.UCPEN_t
index URL

Parity enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCPEN_t {
    UCPEN_OFF,
    // Parity Disabled
    UCPEN
    // Parity Enabled
};
enum IUSCI_UART.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCPE_t {
    UCPE_OFF,
    // No error
    UCPE
    // Character received with parity error
};
enum IUSCI_UART.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCRXEIE_t {
    UCRXEIE_OFF,
    // Erroneous characters rejected and UCAxRXIFG is not set
    UCRXEIE
    // Erroneous characters received will set UCAxRXIFG
};
enum IUSCI_UART.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCRXERR_t {
    UCRXERR_OFF,
    // No receive errors detected
    UCRXERR
    // Receive error detected
};
enum IUSCI_UART.UCSPB_t
index URL

Stop bit select. Number of stop bits

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCSPB_t {
    UCSPB_OFF,
    // One stop bit
    UCSPB
    // Two stop bits
};
enum IUSCI_UART.UCSSEL_UART_t
index URL

USCI clock source select. These bits select the BRCLK source clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCSSEL_UART_t {
    UCSSEL_0,
    // UCLK
    UCSSEL_1,
    // ACLK
    UCSSEL_2
    // SMCLK
};
enum IUSCI_UART.UCSTOE_t
index URL

Synch field time out error

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCSTOE_t {
    UCSTOE_OFF,
    // No error
    UCSTOE
    // Length of synch field exceeded measurable time
};
enum IUSCI_UART.UCSWRST_t
index URL

Software reset enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCSWRST_t {
    UCSWRST_OFF,
    // Disabled. USCI reset released for operation
    UCSWRST
    // Enabled. USCI logic held in reset state
};
enum IUSCI_UART.UCSYNC_t
index URL

Synchronous mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCSYNC_t {
    UCSYNC_OFF,
    // Asynchronous mode
    UCSYNC
    // Synchronous Mode
};
enum IUSCI_UART.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCTXADDR_t {
    UCTXADDR_OFF,
    // Next frame transmitted is data
    UCTXADDR
    // Next frame transmitted is an address
};
enum IUSCI_UART.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
enum UCTXBRK_t {
    UCTXBRK_OFF,
    // Next frame transmitted is not a break
    UCTXBRK
    // Next frame transmitted is a break or a break/synch
};
typedef IUSCI_UART.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSCI_UART.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
typedef String StringArray[];
struct IUSCI_UART.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSCI_UART.UCxABCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct UCxABCTL_t {
     IUSCI_UART.UCDELIM1_t UCDELIM1;
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
     IUSCI_UART.UCDELIM0_t UCDELIM0;
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
     IUSCI_UART.UCSTOE_t UCSTOE;
    // Synch field time out error 0 No error 1 Length of synch field exceeded measurable time
     IUSCI_UART.UCBTOE_t UCBTOE;
    // Break time out error 0 No error 1 Length of break field exceeded 22 bit times
     IUSCI_UART.UCABDEN_t UCABDEN;
    // Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
};
struct IUSCI_UART.UCxCTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct UCxCTL0_t {
     IUSCI_UART.UCPEN_t UCPEN;
    // Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation
     IUSCI_UART.UCPAR_t UCPAR;
    // Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity
     IUSCI_UART.UCMSB_t UCMSB;
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
     IUSCI_UART.UC7BIT_t UC7BIT;
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
     IUSCI_UART.UCSPB_t UCSPB;
    // Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits
     IUSCI_UART.UCMODE_ASYNC_t UCMODE;
    // USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection
     IUSCI_UART.UCSYNC_t UCSYNC;
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
};
struct IUSCI_UART.UCxCTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct UCxCTL1_t {
     IUSCI_UART.UCSSEL_UART_t UCSSEL;
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK
     IUSCI_UART.UCRXEIE_t UCRXEIE;
    // Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG
     IUSCI_UART.UCBRKIE_t UCBRKIE;
    // Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG
     IUSCI_UART.UCDORM_t UCDORM;
    // Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
     IUSCI_UART.UCTXADDR_t UCTXADDR;
    // Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address
     IUSCI_UART.UCTXBRK_t UCTXBRK;
    // Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch
     IUSCI_UART.UCSWRST_t UCSWRST;
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
};
struct IUSCI_UART.UCxIRRCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct UCxIRRCTL_t {
     IUSCI_UART.UCIRRXFL5_t UCIRRXFL5;
    // IRDA Receive Filter Length Bit 5
     IUSCI_UART.UCIRRXFL4_t UCIRRXFL4;
    // IRDA Receive Filter Length Bit 4
     IUSCI_UART.UCIRRXFL3_t UCIRRXFL3;
    // IRDA Receive Filter Length Bit 3
     IUSCI_UART.UCIRRXFL2_t UCIRRXFL2;
    // IRDA Receive Filter Length Bit 2
     IUSCI_UART.UCIRRXFL1_t UCIRRXFL1;
    // IRDA Receive Filter Length Bit 1
     IUSCI_UART.UCIRRXFL0_t UCIRRXFL0;
    // IRDA Receive Filter Length Bit 0
     IUSCI_UART.UCIRRXPL_t UCIRRXPL;
    // IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen
     IUSCI_UART.UCIRRXFE_t UCIRRXFE;
    // IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled
};
struct IUSCI_UART.UCxIRTCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct UCxIRTCTL_t {
     IUSCI_UART.UCIRTXPL5_t UCIRTXPL5;
    // IRDA Transmit Pulse Length Bit 5
     IUSCI_UART.UCIRTXPL4_t UCIRTXPL4;
    // IRDA Transmit Pulse Length Bit 4
     IUSCI_UART.UCIRTXPL3_t UCIRTXPL3;
    // IRDA Transmit Pulse Length Bit 3
     IUSCI_UART.UCIRTXPL2_t UCIRTXPL2;
    // IRDA Transmit Pulse Length Bit 2
     IUSCI_UART.UCIRTXPL1_t UCIRTXPL1;
    // IRDA Transmit Pulse Length Bit 1
     IUSCI_UART.UCIRTXPL0_t UCIRTXPL0;
    // IRDA Transmit Pulse Length Bit 0
     IUSCI_UART.UCIRTXCLK_t UCIRTXCLK;
    // IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
     IUSCI_UART.UCIREN_t UCIREN;
    // IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled
};
struct IUSCI_UART.UCxMCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct UCxMCTL_t {
     IUSCI_UART.UCBRF_t UCBRF;
    // First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0
     IUSCI_UART.UCBRS_t UCBRS;
    // Second modulation stage select. These bits determine the modulation pattern for BITCLK
     IUSCI_UART.UCOS16_t UCOS16;
    // Oversampling mode enabled 0 Disabled 1 Enabled
};
struct IUSCI_UART.UCxSTAT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct UCxSTAT_t {
     IUSCI_UART.UCLISTEN_t UCLISTEN;
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
     IUSCI_UART.UCFE_t UCFE;
    // Framing error flag 0 No error 1 Character received with low stop bit
     IUSCI_UART.UCOE_t UCOE;
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
     IUSCI_UART.UCPE_t UCPE;
    // Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error
     IUSCI_UART.UCBRK_t UCBRK;
    // Break detect flag 0 No break condition 1 Break condition occurred
     IUSCI_UART.UCRXERR_t UCRXERR;
    // Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected
     IUSCI_UART.UCADDR_t UCADDR;
    // Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address
     IUSCI_UART.UCIDLE_t UCIDLE;
    // Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected
     IUSCI_UART.UCBUSY_t UCBUSY;
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
};
struct IUSCI_UART.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSCI_UART.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSCI_UART.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSCI_UART.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
config Float UCLKHz = 1000000;
config IUSCI_UART.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSCI_UART.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
config String owner;
IUSCI_UART.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Bits8 getUCxxBR0();
SEE
getUCxxBR0
IUSCI_UART.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Bits8 getUCxxBR1();
SEE
getUCxxBR1
IUSCI_UART.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Bool getUCxxRXIE();
SEE
getUCxxRXIE
IUSCI_UART.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Bool getUCxxTXIE();
SEE
getUCxxTXIE
IUSCI_UART.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Void setUCxxBR0(Bits8 value);
SEE
setUCxxBR0
IUSCI_UART.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Void setUCxxBR1(Bits8 value);
SEE
setUCxxBR1
IUSCI_UART.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Bool setUCxxRXIE(Bool set);
SEE
setUCxxRXIE
IUSCI_UART.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSCI_UART.xdc
Bool setUCxxTXIE(Bool set);
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:07 GMT


interface ti.catalog.msp430.peripherals.communication.IUSI

metaonly interface ti.catalog.msp430.peripherals.communication.IUSI
index URL

Universal Serial Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
metaonly interface IUSI { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
package ti.catalog.msp430.peripherals.communication;
metaonly interface IUSI inherits IPeripheral {
module-wide constants & types
    enum USI16B_t// 16-bit shift register enable {
         USI16B_OFF// 8-bit shift register mode. Low byte register USISRL is used,
         USI16B// 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously
    };
    enum USIAL_t// Arbitration lost {
         USIAL_OFF// No arbitration lost condition,
         USIAL// Arbitration lost
    };
    enum USICKPH_t// Clock phase select {
         USICKPH_OFF// Data is changed on the first SCLK edge and captured on the following edge,
         USICKPH// Data is captured on the first SCLK edge and changed on the following edge
    };
    enum USICKPL_t// Clock polarity select {
         USICKPL_OFF// Inactive state is low,
         USICKPL// Inactive state is high
    };
    enum USICNT0_t// USI bit count - Bit0 {
         USICNT0_OFF// USI bit count,
         USICNT0// USI bit count
    };
    enum USICNT1_t// USI bit count - Bit1 {
         USICNT1_OFF// USI bit count,
         USICNT1// USI bit count
    };
    enum USICNT2_t// USI bit count - Bit2 {
         USICNT2_OFF// USI bit count,
         USICNT2// USI bit count
    };
    enum USICNT3_t// USI bit count - Bit3 {
         USICNT3_OFF// USI bit count,
         USICNT3// USI bit count
    };
    enum USICNT4_t// USI bit count - Bit4 {
         USICNT4_OFF// USI bit count,
         USICNT4// USI bit count
    };
    enum USIDIV_t// Clock divider select {
         USIDIV_0// Divide by 1,
         USIDIV_1// Divide by 2,
         USIDIV_2// Divide by 4,
         USIDIV_3// Divide by 8,
         USIDIV_4// Divide by 16,
         USIDIV_5// Divide by 32,
         USIDIV_6// Divide by 64,
         USIDIV_7// Divide by 128
    };
    enum USIGE_t// Output latch control {
         USIGE_OFF// Output latch enable depends on shift clock,
         USIGE// Output latch always enabled and transparent
    };
    enum USII2C_t// I2C mode enable {
         USII2C_OFF// I2C mode disabled,
         USII2C// I2C mode enabled
    };
    enum USIIE_t// USI counter interrupt enable {
         USIIE_OFF// Interrupt disabled,
         USIIE// Interrupt enabled
    };
    enum USIIFGCC_t// USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0 {
         USIIFGCC_OFF// USIIFG automatically cleared on USICNTx update,
         USIIFGCC// USIIFG is not cleared automatically
    };
    enum USIIFG_t// USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0 {
         USIIFG_OFF// No interrupt pending,
         USIIFG// Interrupt pending
    };
    enum USILSB_t// LSB first select. This bit controls the direction of the receive and transmit shift register {
         USILSB_OFF// MSB first,
         USILSB// LSB first
    };
    enum USIMST_t// Master select {
         USIMST_OFF// Slave mode,
         USIMST// Master mode
    };
    enum USIOE_t// Data output enable {
         USIOE_OFF// Output disabled,
         USIOE// Output enabled
    };
    enum USIPE5_t// USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode {
         USIPE5_OFF// USI function disabled,
         USIPE5// USI function enabled
    };
    enum USIPE6_t// USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode {
         USIPE6_OFF// USI function disabled,
         USIPE6// USI function enabled
    };
    enum USIPE7_t// USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode {
         USIPE7_OFF// USI function disabled,
         USIPE7// USI function enabled
    };
    enum USISCLREL_t// SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected {
         USISCLREL_OFF// SCL line is held low if USIIFG is set,
         USISCLREL// SCL line is released
    };
    enum USISSEL_t// Clock source select. Not used in slave mode {
         USISSEL_0// SCLK (Not used in SPI mode),
         USISSEL_1// ACLK,
         USISSEL_2// SMCLK,
         USISSEL_3// SMCLK,
         USISSEL_4// USISWCLK bit,
         USISSEL_5// TACCR0,
         USISSEL_6// TACCR1,
         USISSEL_7// TACCR2 (Reserved on MSP430F20xx devices)
    };
    enum USISTP_t// STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0 {
         USISTP_OFF// No STOP condition received,
         USISTP// STOP condition received
    };
    enum USISTTIE_t// START condition interrupt-enable {
         USISTTIE_OFF// Interrupt on START condition disabled,
         USISTTIE// Interrupt on START condition enabled
    };
    enum USISTTIFG_t// START condition interrupt flag {
         USISTTIFG_OFF// No START condition received. No interrupt pending,
         USISTTIFG// START condition received. Interrupt pending
    };
    enum USISWCLK_t// Software clock {
         USISWCLK_OFF// Input clock is low,
         USISWCLK// Input clock is high
    };
    enum USISWRST_t// USI software reset {
         USISWRST_OFF// USI released for operation,
         USISWRST// USI logic held in reset state
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct USICKCTL_t// {
         IUSI.USIDIV_t USIDIV// Clock divider select 000 Divide by 1 001 Divide by 2 010 Divide by 4 011 Divide by 8 100 Divide by 16 101 Divide by 32 110 Divide by 64 111 Divide by 128;
         IUSI.USISSEL_t USISSEL// Clock source select. Not used in slave mode. 000 SCLK (Not used in SPI mode) 001 ACLK 010 SMCLK 011 SMCLK 100 USISWCLK bit 101 TACCR0 110 TACCR1 111 TACCR2 (Reserved on MSP430F20xx devices);
         IUSI.USICKPL_t USICKPL// Clock polarity select 0 Inactive state is low 1 Inactive state is high;
         IUSI.USISWCLK_t USISWCLK// Software clock 0 Input clock is low 1 Input clock is high;
    };
    metaonly struct USICNT_t// {
         IUSI.USISCLREL_t USISCLREL// SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected. 0 SCL line is held low if USIIFG is set 1 SCL line is released;
         IUSI.USI16B_t USI16B// 16-bit shift register enable 0 8-bit shift register mode. Low byte register USISRL is used. 1 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously;
         IUSI.USIIFGCC_t USIIFGCC// USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0. 0 USIIFG automatically cleared on USICNTx update 1 USIIFG is not cleared automatically;
         IUSI.USICNT4_t USICNT4// USI bit count bit 4 The USICNTx bits set the number of bits to be received or transmitted;
         IUSI.USICNT3_t USICNT3// USI bit count bit 3 The USICNTx bits set the number of bits to be received or transmitted;
         IUSI.USICNT2_t USICNT2// USI bit count bit 2 The USICNTx bits set the number of bits to be received or transmitted;
         IUSI.USICNT1_t USICNT1// USI bit count bit 1 The USICNTx bits set the number of bits to be received or transmitted;
         IUSI.USICNT0_t USICNT0// USI bit count bit 0 The USICNTx bits set the number of bits to be received or transmitted;
    };
    metaonly struct USICTL0_t// {
         IUSI.USIPE7_t USIPE7// USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled;
         IUSI.USIPE6_t USIPE6// USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled;
         IUSI.USIPE5_t USIPE5// USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode. 0 USI function disabled 1 USI function enabled;
         IUSI.USILSB_t USILSB// LSB first select. This bit controls the direction of the receive and transmit shift register. 0 MSB first 1 LSB first;
         IUSI.USIMST_t USIMST// Master select 0 Slave mode 1 Master mode;
         IUSI.USIGE_t USIGE// Output latch control 0 Output latch enable depends on shift clock 1 Output latch always enabled and transparent;
         IUSI.USIOE_t USIOE// Data output enable 0 Output disabled 1 Output enabled;
         IUSI.USISWRST_t USISWRST// USI software reset 0 USI released for operation. 1 USI logic held in reset state;
    };
    metaonly struct USICTL1_t// {
         IUSI.USICKPH_t USICKPH// Clock phase select 0 Data is changed on the first SCLK edge and captured on the following edge. 1 Data is captured on the first SCLK edge and changed on the following edge;
         IUSI.USII2C_t USII2C// I2C mode enable 0 I2C mode disabled 1 I2C mode enabled;
         IUSI.USISTTIE_t USISTTIE// START condition interrupt-enable 0 Interrupt on START condition disabled 1 Interrupt on START condition enabled;
         IUSI.USIIE_t USIIE// USI counter interrupt enable 0 Interrupt disabled 1 Interrupt enabled;
         IUSI.USIAL_t USIAL// Arbitration lost 0 No arbitration lost condition 1 Arbitration lost;
         IUSI.USISTP_t USISTP// STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No STOP condition received 1 STOP condition received;
         IUSI.USISTTIFG_t USISTTIFG// START condition interrupt flag 0 No START condition received. No interrupt pending. 1 START condition received. Interrupt pending;
         IUSI.USIIFG_t USIIFG// USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    Bool getUSIIE// Gets USIIE register();
    Bool getUSISTTIE// Gets USISTTIE register();
    Bool setUSIIE// Sets USIIE register(Bool set);
    Bool setUSISTTIE// Sets USISTTIE register(Bool set);
}
enum IUSI.USI16B_t
index URL

16-bit shift register enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USI16B_t {
    USI16B_OFF,
    // 8-bit shift register mode. Low byte register USISRL is used
    USI16B
    // 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously
};
enum IUSI.USIAL_t
index URL

Arbitration lost

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIAL_t {
    USIAL_OFF,
    // No arbitration lost condition
    USIAL
    // Arbitration lost
};
enum IUSI.USICKPH_t
index URL

Clock phase select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USICKPH_t {
    USICKPH_OFF,
    // Data is changed on the first SCLK edge and captured on the following edge
    USICKPH
    // Data is captured on the first SCLK edge and changed on the following edge
};
enum IUSI.USICKPL_t
index URL

Clock polarity select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USICKPL_t {
    USICKPL_OFF,
    // Inactive state is low
    USICKPL
    // Inactive state is high
};
enum IUSI.USICNT0_t
index URL

USI bit count - Bit0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USICNT0_t {
    USICNT0_OFF,
    // USI bit count
    USICNT0
    // USI bit count
};
enum IUSI.USICNT1_t
index URL

USI bit count - Bit1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USICNT1_t {
    USICNT1_OFF,
    // USI bit count
    USICNT1
    // USI bit count
};
enum IUSI.USICNT2_t
index URL

USI bit count - Bit2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USICNT2_t {
    USICNT2_OFF,
    // USI bit count
    USICNT2
    // USI bit count
};
enum IUSI.USICNT3_t
index URL

USI bit count - Bit3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USICNT3_t {
    USICNT3_OFF,
    // USI bit count
    USICNT3
    // USI bit count
};
enum IUSI.USICNT4_t
index URL

USI bit count - Bit4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USICNT4_t {
    USICNT4_OFF,
    // USI bit count
    USICNT4
    // USI bit count
};
enum IUSI.USIDIV_t
index URL

Clock divider select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIDIV_t {
    USIDIV_0,
    // Divide by 1
    USIDIV_1,
    // Divide by 2
    USIDIV_2,
    // Divide by 4
    USIDIV_3,
    // Divide by 8
    USIDIV_4,
    // Divide by 16
    USIDIV_5,
    // Divide by 32
    USIDIV_6,
    // Divide by 64
    USIDIV_7
    // Divide by 128
};
enum IUSI.USIGE_t
index URL

Output latch control

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIGE_t {
    USIGE_OFF,
    // Output latch enable depends on shift clock
    USIGE
    // Output latch always enabled and transparent
};
enum IUSI.USII2C_t
index URL

I2C mode enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USII2C_t {
    USII2C_OFF,
    // I2C mode disabled
    USII2C
    // I2C mode enabled
};
enum IUSI.USIIE_t
index URL

USI counter interrupt enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIIE_t {
    USIIE_OFF,
    // Interrupt disabled
    USIIE
    // Interrupt enabled
};
enum IUSI.USIIFGCC_t
index URL

USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIIFGCC_t {
    USIIFGCC_OFF,
    // USIIFG automatically cleared on USICNTx update
    USIIFGCC
    // USIIFG is not cleared automatically
};
enum IUSI.USIIFG_t
index URL

USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIIFG_t {
    USIIFG_OFF,
    // No interrupt pending
    USIIFG
    // Interrupt pending
};
enum IUSI.USILSB_t
index URL

LSB first select. This bit controls the direction of the receive and transmit shift register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USILSB_t {
    USILSB_OFF,
    // MSB first
    USILSB
    // LSB first
};
enum IUSI.USIMST_t
index URL

Master select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIMST_t {
    USIMST_OFF,
    // Slave mode
    USIMST
    // Master mode
};
enum IUSI.USIOE_t
index URL

Data output enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIOE_t {
    USIOE_OFF,
    // Output disabled
    USIOE
    // Output enabled
};
enum IUSI.USIPE5_t
index URL

USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIPE5_t {
    USIPE5_OFF,
    // USI function disabled
    USIPE5
    // USI function enabled
};
enum IUSI.USIPE6_t
index URL

USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIPE6_t {
    USIPE6_OFF,
    // USI function disabled
    USIPE6
    // USI function enabled
};
enum IUSI.USIPE7_t
index URL

USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USIPE7_t {
    USIPE7_OFF,
    // USI function disabled
    USIPE7
    // USI function enabled
};
enum IUSI.USISCLREL_t
index URL

SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USISCLREL_t {
    USISCLREL_OFF,
    // SCL line is held low if USIIFG is set
    USISCLREL
    // SCL line is released
};
enum IUSI.USISSEL_t
index URL

Clock source select. Not used in slave mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USISSEL_t {
    USISSEL_0,
    // SCLK (Not used in SPI mode)
    USISSEL_1,
    // ACLK
    USISSEL_2,
    // SMCLK
    USISSEL_3,
    // SMCLK
    USISSEL_4,
    // USISWCLK bit
    USISSEL_5,
    // TACCR0
    USISSEL_6,
    // TACCR1
    USISSEL_7
    // TACCR2 (Reserved on MSP430F20xx devices)
};
enum IUSI.USISTP_t
index URL

STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USISTP_t {
    USISTP_OFF,
    // No STOP condition received
    USISTP
    // STOP condition received
};
enum IUSI.USISTTIE_t
index URL

START condition interrupt-enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USISTTIE_t {
    USISTTIE_OFF,
    // Interrupt on START condition disabled
    USISTTIE
    // Interrupt on START condition enabled
};
enum IUSI.USISTTIFG_t
index URL

START condition interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USISTTIFG_t {
    USISTTIFG_OFF,
    // No START condition received. No interrupt pending
    USISTTIFG
    // START condition received. Interrupt pending
};
enum IUSI.USISWCLK_t
index URL

Software clock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USISWCLK_t {
    USISWCLK_OFF,
    // Input clock is low
    USISWCLK
    // Input clock is high
};
enum IUSI.USISWRST_t
index URL

USI software reset

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
enum USISWRST_t {
    USISWRST_OFF,
    // USI released for operation
    USISWRST
    // USI logic held in reset state
};
typedef IUSI.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IUSI.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
typedef String StringArray[];
struct IUSI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IUSI.USICKCTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
metaonly struct USICKCTL_t {
     IUSI.USIDIV_t USIDIV;
    // Clock divider select 000 Divide by 1 001 Divide by 2 010 Divide by 4 011 Divide by 8 100 Divide by 16 101 Divide by 32 110 Divide by 64 111 Divide by 128
     IUSI.USISSEL_t USISSEL;
    // Clock source select. Not used in slave mode. 000 SCLK (Not used in SPI mode) 001 ACLK 010 SMCLK 011 SMCLK 100 USISWCLK bit 101 TACCR0 110 TACCR1 111 TACCR2 (Reserved on MSP430F20xx devices)
     IUSI.USICKPL_t USICKPL;
    // Clock polarity select 0 Inactive state is low 1 Inactive state is high
     IUSI.USISWCLK_t USISWCLK;
    // Software clock 0 Input clock is low 1 Input clock is high
};
struct IUSI.USICNT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
metaonly struct USICNT_t {
     IUSI.USISCLREL_t USISCLREL;
    // SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected. 0 SCL line is held low if USIIFG is set 1 SCL line is released
     IUSI.USI16B_t USI16B;
    // 16-bit shift register enable 0 8-bit shift register mode. Low byte register USISRL is used. 1 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously
     IUSI.USIIFGCC_t USIIFGCC;
    // USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0. 0 USIIFG automatically cleared on USICNTx update 1 USIIFG is not cleared automatically
     IUSI.USICNT4_t USICNT4;
    // USI bit count bit 4 The USICNTx bits set the number of bits to be received or transmitted
     IUSI.USICNT3_t USICNT3;
    // USI bit count bit 3 The USICNTx bits set the number of bits to be received or transmitted
     IUSI.USICNT2_t USICNT2;
    // USI bit count bit 2 The USICNTx bits set the number of bits to be received or transmitted
     IUSI.USICNT1_t USICNT1;
    // USI bit count bit 1 The USICNTx bits set the number of bits to be received or transmitted
     IUSI.USICNT0_t USICNT0;
    // USI bit count bit 0 The USICNTx bits set the number of bits to be received or transmitted
};
struct IUSI.USICTL0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
metaonly struct USICTL0_t {
     IUSI.USIPE7_t USIPE7;
    // USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled
     IUSI.USIPE6_t USIPE6;
    // USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled
     IUSI.USIPE5_t USIPE5;
    // USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode. 0 USI function disabled 1 USI function enabled
     IUSI.USILSB_t USILSB;
    // LSB first select. This bit controls the direction of the receive and transmit shift register. 0 MSB first 1 LSB first
     IUSI.USIMST_t USIMST;
    // Master select 0 Slave mode 1 Master mode
     IUSI.USIGE_t USIGE;
    // Output latch control 0 Output latch enable depends on shift clock 1 Output latch always enabled and transparent
     IUSI.USIOE_t USIOE;
    // Data output enable 0 Output disabled 1 Output enabled
     IUSI.USISWRST_t USISWRST;
    // USI software reset 0 USI released for operation. 1 USI logic held in reset state
};
struct IUSI.USICTL1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
metaonly struct USICTL1_t {
     IUSI.USICKPH_t USICKPH;
    // Clock phase select 0 Data is changed on the first SCLK edge and captured on the following edge. 1 Data is captured on the first SCLK edge and changed on the following edge
     IUSI.USII2C_t USII2C;
    // I2C mode enable 0 I2C mode disabled 1 I2C mode enabled
     IUSI.USISTTIE_t USISTTIE;
    // START condition interrupt-enable 0 Interrupt on START condition disabled 1 Interrupt on START condition enabled
     IUSI.USIIE_t USIIE;
    // USI counter interrupt enable 0 Interrupt disabled 1 Interrupt enabled
     IUSI.USIAL_t USIAL;
    // Arbitration lost 0 No arbitration lost condition 1 Arbitration lost
     IUSI.USISTP_t USISTP;
    // STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No STOP condition received 1 STOP condition received
     IUSI.USISTTIFG_t USISTTIFG;
    // START condition interrupt flag 0 No START condition received. No interrupt pending. 1 START condition received. Interrupt pending
     IUSI.USIIFG_t USIIFG;
    // USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No interrupt pending 1 Interrupt pending
};
struct IUSI.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IUSI.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IUSI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IUSI.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IUSI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
config String owner;
IUSI.getUSIIE() // instance
index URL

Gets USIIE register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
Bool getUSIIE();
SEE
setUSIIE
IUSI.getUSISTTIE() // instance
index URL

Gets USISTTIE register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
Bool getUSISTTIE();
SEE
getUSISTTIE
IUSI.setUSIIE() // instance
index URL

Sets USIIE register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
Bool setUSIIE(Bool set);
SEE
setUSIIE
IUSI.setUSISTTIE() // instance
index URL

Sets USISTTIE register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/communication/IUSI.xdc
Bool setUSISTTIE(Bool set);
SEE
setUSISTTIE
generated on Sun, 25 Nov 2018 22:20:08 GMT


module ti.catalog.msp430.peripherals.communication.USCI_A0_SPI_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_A0_SPI_2xx
index URL

Universal Serial Communication Interface A0 SPI 2xx

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_A0_SPI_2xx.xdc
var USCI_A0_SPI_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_A0_SPI_2xx');
module-wide constants & types
    values of type USCI_A0_SPI_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_A0_SPI_2xx.UC7BIT_OFF// 8-bit;
        const USCI_A0_SPI_2xx.UC7BIT// 7-bit;
    values of type USCI_A0_SPI_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_A0_SPI_2xx.UCADDR_OFF// Received character is data;
        const USCI_A0_SPI_2xx.UCADDR// Received character is an address;
    values of type USCI_A0_SPI_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_A0_SPI_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_A0_SPI_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_A0_SPI_2xx.UCBRK_t// Break detect flag
        const USCI_A0_SPI_2xx.UCBRK_OFF// No break condition;
        const USCI_A0_SPI_2xx.UCBRK// Break condition occurred;
    values of type USCI_A0_SPI_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_A0_SPI_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_A0_SPI_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_A0_SPI_2xx.UCCKPH_t// Clock phase select
        const USCI_A0_SPI_2xx.UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge;
        const USCI_A0_SPI_2xx.UCCKPH// Data is captured on the first UCLK edge and changed on the following edge;
    values of type USCI_A0_SPI_2xx.UCCKPL_t// Clock polarity select
        const USCI_A0_SPI_2xx.UCCKPL_OFF// Inactive state is low;
        const USCI_A0_SPI_2xx.UCCKPL// Inactive state is high;
    values of type USCI_A0_SPI_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_A0_SPI_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_A0_SPI_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_A0_SPI_2xx.UCFE_t// Framing error flag
        const USCI_A0_SPI_2xx.UCFE_OFF// 0 No error;
        const USCI_A0_SPI_2xx.UCFE// Character received with low stop bit;
    values of type USCI_A0_SPI_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_A0_SPI_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_A0_SPI_2xx.UCIDLE// Idle line detected;
    values of type USCI_A0_SPI_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_A0_SPI_2xx.UCLISTEN_OFF// Disabled;
        const USCI_A0_SPI_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_A0_SPI_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_A0_SPI_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_A0_SPI_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_A0_SPI_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_A0_SPI_2xx.UCMODE_3// I2C Mode;
    values of type USCI_A0_SPI_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_A0_SPI_2xx.UCMSB_OFF// LSB first;
        const USCI_A0_SPI_2xx.UCMSB// MSB first;
    values of type USCI_A0_SPI_2xx.UCMST_t// Master mode select
        const USCI_A0_SPI_2xx.UCMST_OFF// Slave mode;
        const USCI_A0_SPI_2xx.UCMST// Master mode;
    values of type USCI_A0_SPI_2xx.UCOE_t// Overrun error flag
        const USCI_A0_SPI_2xx.UCOE_OFF// No error;
        const USCI_A0_SPI_2xx.UCOE// Overrun error occurred;
    values of type USCI_A0_SPI_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_A0_SPI_2xx.UCPE_OFF// No error;
        const USCI_A0_SPI_2xx.UCPE// Character received with parity error;
    values of type USCI_A0_SPI_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_A0_SPI_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_A0_SPI_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_A0_SPI_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_A0_SPI_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_A0_SPI_2xx.UCRXERR// Receive error detected;
    values of type USCI_A0_SPI_2xx.UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_A0_SPI_2xx.UCSSEL_0// NA;
        const USCI_A0_SPI_2xx.UCSSEL_1// ACLK;
        const USCI_A0_SPI_2xx.UCSSEL_2// SMCLK;
    values of type USCI_A0_SPI_2xx.UCSWRST_t// Software reset enable
        const USCI_A0_SPI_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_A0_SPI_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_A0_SPI_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_A0_SPI_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_A0_SPI_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_A0_SPI_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_A0_SPI_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_A0_SPI_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_A0_SPI_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_A0_SPI_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_A0_SPI_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    var obj = new USCI_A0_SPI_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_A0_SPI_2xx.UCxCTL0_t// ;
        obj.UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge = IUSCI_SPI.UCCKPH_t ...
        obj.UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high = IUSCI_SPI.UCCKPL_t ...
        obj.UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first = IUSCI_SPI.UCMSB_t ...
        obj.UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data = IUSCI_SPI.UC7BIT_t ...
        obj.UCMST// Master mode select 0 Slave mode 1 Master mode = IUSCI_SPI.UCMST_t ...
        obj.UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode = IUSCI_SPI.UCMODE_SYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode = IUSCI_SPI.UCSYNC_t ...
    var obj = new USCI_A0_SPI_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_SPI.UCSSEL_SPI_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_SPI.UCSWRST_t ...
    var obj = new USCI_A0_SPI_2xx.UCxSTAT_t// ;
        obj.UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver = IUSCI_SPI.UCLISTEN_t ...
        obj.UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred = IUSCI_SPI.UCFE_t ...
        obj.UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred = IUSCI_SPI.UCOE_t ...
        obj.UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving = IUSCI_SPI.UCBUSY_t ...
    var obj = new USCI_A0_SPI_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_A0_SPI_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_A0_SPI_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_A0_SPI_2xx.Params// Instance config-params object;
        params.UCA0BR0// Bit Rate Control Register 0 = Bits8 0;
        params.UCA0BR1// Bit Rate Control Register 1 = Bits8 0;
        params.UCA0CTL0// Control Register 0 = IUSCI_A0_SPI.UCxCTL0_t {
            UCCKPH: IUSCI_SPI.UCCKPH_OFF,
            UCCKPL: IUSCI_SPI.UCCKPL_OFF,
            UCMSB: IUSCI.UCMSB_OFF,
            UC7BIT: IUSCI.UC7BIT_OFF,
            UCMST: IUSCI_SPI.UCMST_OFF,
            UCMODE: IUSCI.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC
        };
        params.UCA0CTL1// Control Register 1 = IUSCI_A0_SPI.UCxCTL1_t {
            UCSSEL: IUSCI_SPI.UCSSEL_0,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCA0RXBUF// Receive Buffer Register = Bits8 0;
        params.UCA0STAT// Status Register = IUSCI_A0_SPI.UCxSTAT_t {
            UCLISTEN: IUSCI.UCLISTEN_OFF,
            UCFE: IUSCI.UCFE_OFF,
            UCOE: IUSCI.UCOE_OFF,
            UCBUSY: IUSCI.UCBUSY
        };
        params.UCA0TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_A0_SPI_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCA0CTL0",
                regForceSet: false
            },
            {
                register: "UCA0CTL1",
                regForceSet: false
            },
            {
                register: "UCA0BR0",
                regForceSet: false
            },
            {
                register: "UCA0BR1",
                regForceSet: false
            },
            {
                register: "UCA0STAT",
                regForceSet: false
            },
            {
                register: "UCA0RXBUF",
                regForceSet: false
            },
            {
                register: "UCA0TXBUF",
                regForceSet: false
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_A0_SPI_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_A0_SPI_2xx.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_A0_SPI_2xx.UC7BIT_t
    const USCI_A0_SPI_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_A0_SPI_2xx.UC7BIT;
    // 7-bit
enum USCI_A0_SPI_2xx.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_A0_SPI_2xx.UCADDR_t
    const USCI_A0_SPI_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_A0_SPI_2xx.UCADDR;
    // Received character is an address
enum USCI_A0_SPI_2xx.UCBRKIE_t
index URL

Receive break character interrupt-enable

Configuration settings
values of type USCI_A0_SPI_2xx.UCBRKIE_t
    const USCI_A0_SPI_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_A0_SPI_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_A0_SPI_2xx.UCBRK_t
index URL

Break detect flag

Configuration settings
values of type USCI_A0_SPI_2xx.UCBRK_t
    const USCI_A0_SPI_2xx.UCBRK_OFF;
    // No break condition
    const USCI_A0_SPI_2xx.UCBRK;
    // Break condition occurred
enum USCI_A0_SPI_2xx.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_A0_SPI_2xx.UCBUSY_t
    const USCI_A0_SPI_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_A0_SPI_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_A0_SPI_2xx.UCCKPH_t
index URL

Clock phase select

Configuration settings
values of type USCI_A0_SPI_2xx.UCCKPH_t
    const USCI_A0_SPI_2xx.UCCKPH_OFF;
    // Data is changed on the first UCLK edge and captured on the following edge
    const USCI_A0_SPI_2xx.UCCKPH;
    // Data is captured on the first UCLK edge and changed on the following edge
enum USCI_A0_SPI_2xx.UCCKPL_t
index URL

Clock polarity select

Configuration settings
values of type USCI_A0_SPI_2xx.UCCKPL_t
    const USCI_A0_SPI_2xx.UCCKPL_OFF;
    // Inactive state is low
    const USCI_A0_SPI_2xx.UCCKPL;
    // Inactive state is high
enum USCI_A0_SPI_2xx.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_A0_SPI_2xx.UCDORM_t
    const USCI_A0_SPI_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_A0_SPI_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_A0_SPI_2xx.UCFE_t
index URL

Framing error flag

Configuration settings
values of type USCI_A0_SPI_2xx.UCFE_t
    const USCI_A0_SPI_2xx.UCFE_OFF;
    // 0 No error
    const USCI_A0_SPI_2xx.UCFE;
    // Character received with low stop bit
enum USCI_A0_SPI_2xx.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_A0_SPI_2xx.UCIDLE_t
    const USCI_A0_SPI_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_A0_SPI_2xx.UCIDLE;
    // Idle line detected
enum USCI_A0_SPI_2xx.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_A0_SPI_2xx.UCLISTEN_t
    const USCI_A0_SPI_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_A0_SPI_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_A0_SPI_2xx.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_A0_SPI_2xx.UCMODE_SYNC_t
    const USCI_A0_SPI_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_A0_SPI_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_A0_SPI_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_A0_SPI_2xx.UCMODE_3;
    // I2C Mode
enum USCI_A0_SPI_2xx.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_A0_SPI_2xx.UCMSB_t
    const USCI_A0_SPI_2xx.UCMSB_OFF;
    // LSB first
    const USCI_A0_SPI_2xx.UCMSB;
    // MSB first
enum USCI_A0_SPI_2xx.UCMST_t
index URL

Master mode select

Configuration settings
values of type USCI_A0_SPI_2xx.UCMST_t
    const USCI_A0_SPI_2xx.UCMST_OFF;
    // Slave mode
    const USCI_A0_SPI_2xx.UCMST;
    // Master mode
enum USCI_A0_SPI_2xx.UCOE_t
index URL

Overrun error flag

Configuration settings
values of type USCI_A0_SPI_2xx.UCOE_t
    const USCI_A0_SPI_2xx.UCOE_OFF;
    // No error
    const USCI_A0_SPI_2xx.UCOE;
    // Overrun error occurred
enum USCI_A0_SPI_2xx.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_A0_SPI_2xx.UCPE_t
    const USCI_A0_SPI_2xx.UCPE_OFF;
    // No error
    const USCI_A0_SPI_2xx.UCPE;
    // Character received with parity error
enum USCI_A0_SPI_2xx.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_A0_SPI_2xx.UCRXEIE_t
    const USCI_A0_SPI_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_A0_SPI_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_A0_SPI_2xx.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_A0_SPI_2xx.UCRXERR_t
    const USCI_A0_SPI_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_A0_SPI_2xx.UCRXERR;
    // Receive error detected
enum USCI_A0_SPI_2xx.UCSSEL_SPI_t
index URL

USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_A0_SPI_2xx.UCSSEL_SPI_t
    const USCI_A0_SPI_2xx.UCSSEL_0;
    // NA
    const USCI_A0_SPI_2xx.UCSSEL_1;
    // ACLK
    const USCI_A0_SPI_2xx.UCSSEL_2;
    // SMCLK
enum USCI_A0_SPI_2xx.UCSWRST_t
index URL

Software reset enable

Configuration settings
values of type USCI_A0_SPI_2xx.UCSWRST_t
    const USCI_A0_SPI_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_A0_SPI_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_A0_SPI_2xx.UCSYNC_t
index URL

Synchronous mode enable

Configuration settings
values of type USCI_A0_SPI_2xx.UCSYNC_t
    const USCI_A0_SPI_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_A0_SPI_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_A0_SPI_2xx.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_A0_SPI_2xx.UCTXADDR_t
    const USCI_A0_SPI_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_A0_SPI_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_A0_SPI_2xx.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_A0_SPI_2xx.UCTXBRK_t
    const USCI_A0_SPI_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_A0_SPI_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
struct USCI_A0_SPI_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USCI_A0_SPI_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_A0_SPI_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_A0_SPI_2xx.UCxCTL0_t;
    obj.UCCKPH = IUSCI_SPI.UCCKPH_t ...
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
    obj.UCCKPL = IUSCI_SPI.UCCKPL_t ...
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
    obj.UCMSB = IUSCI_SPI.UCMSB_t ...
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
    obj.UC7BIT = IUSCI_SPI.UC7BIT_t ...
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
    obj.UCMST = IUSCI_SPI.UCMST_t ...
    // Master mode select 0 Slave mode 1 Master mode
    obj.UCMODE = IUSCI_SPI.UCMODE_SYNC_t ...
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
    obj.UCSYNC = IUSCI_SPI.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
struct USCI_A0_SPI_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_A0_SPI_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_SPI.UCSSEL_SPI_t ...
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCSWRST = IUSCI_SPI.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_A0_SPI_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_A0_SPI_2xx.UCxSTAT_t;
    obj.UCLISTEN = IUSCI_SPI.UCLISTEN_t ...
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
    obj.UCFE = IUSCI_SPI.UCFE_t ...
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
    obj.UCOE = IUSCI_SPI.UCOE_t ...
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
    obj.UCBUSY = IUSCI_SPI.UCBUSY_t ...
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
struct USCI_A0_SPI_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_A0_SPI_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_A0_SPI_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_A0_SPI_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_A0_SPI_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_A0_SPI_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
// Instance config-params object
    params.UCA0BR0 = Bits8 0;
    // Bit Rate Control Register 0
    params.UCA0BR1 = Bits8 0;
    // Bit Rate Control Register 1
    params.UCA0CTL0 = IUSCI_A0_SPI.UCxCTL0_t {
    // Control Register 0
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    params.UCA0CTL1 = IUSCI_A0_SPI.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCA0RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCA0STAT = IUSCI_A0_SPI.UCxSTAT_t {
    // Status Register
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    params.UCA0TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_A0_SPI_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCA0CTL0",
            regForceSet: false
        },
        {
            register: "UCA0CTL1",
            regForceSet: false
        },
        {
            register: "UCA0BR0",
            regForceSet: false
        },
        {
            register: "UCA0BR1",
            regForceSet: false
        },
        {
            register: "UCA0STAT",
            regForceSet: false
        },
        {
            register: "UCA0RXBUF",
            regForceSet: false
        },
        {
            register: "UCA0TXBUF",
            regForceSet: false
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_A0_SPI_2xx.Params.UCA0BR0 // instance
index URL

Bit Rate Control Register 0

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCA0BR0 = Bits8 0;
config USCI_A0_SPI_2xx.Params.UCA0BR1 // instance
index URL

Bit Rate Control Register 1

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCA0BR1 = Bits8 0;
config USCI_A0_SPI_2xx.Params.UCA0CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCA0CTL0 = IUSCI_A0_SPI.UCxCTL0_t {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config USCI_A0_SPI_2xx.Params.UCA0CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCA0CTL1 = IUSCI_A0_SPI.UCxCTL1_t {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_A0_SPI_2xx.Params.UCA0RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCA0RXBUF = Bits8 0;
config USCI_A0_SPI_2xx.Params.UCA0STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCA0STAT = IUSCI_A0_SPI.UCxSTAT_t {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config USCI_A0_SPI_2xx.Params.UCA0TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCA0TXBUF = Bits8 0;
config USCI_A0_SPI_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_A0_SPI_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_A0_SPI_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCA0CTL0",
        regForceSet: false
    },
    {
        register: "UCA0CTL1",
        regForceSet: false
    },
    {
        register: "UCA0BR0",
        regForceSet: false
    },
    {
        register: "UCA0BR1",
        regForceSet: false
    },
    {
        register: "UCA0STAT",
        regForceSet: false
    },
    {
        register: "UCA0RXBUF",
        regForceSet: false
    },
    {
        register: "UCA0TXBUF",
        regForceSet: false
    }
];
config USCI_A0_SPI_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_A0_SPI_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_A0_SPI_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_A0_SPI_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_A0_SPI_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_A0_SPI_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_A0_SPI_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_A0_SPI_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_A0_SPI_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_A0_SPI_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_A0_SPI_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_A0_SPI_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:08 GMT


module ti.catalog.msp430.peripherals.communication.USCI_A0_UART_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_A0_UART_2xx
index URL

Universal Serial Communication Interface A0 UART 2xx

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_A0_UART_2xx.xdc
var USCI_A0_UART_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_A0_UART_2xx');
module-wide constants & types
    values of type USCI_A0_UART_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_A0_UART_2xx.UC7BIT_OFF// 8-bit;
        const USCI_A0_UART_2xx.UC7BIT// 7-bit;
    values of type USCI_A0_UART_2xx.UCABDEN_t// Automatic baud rate detect enable
        const USCI_A0_UART_2xx.UCABDEN_OFF// Baud rate detection disabled. Length of break and synch field is not measured;
        const USCI_A0_UART_2xx.UCABDEN// Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly;
    values of type USCI_A0_UART_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_A0_UART_2xx.UCADDR_OFF// Received character is data;
        const USCI_A0_UART_2xx.UCADDR// Received character is an address;
    values of type USCI_A0_UART_2xx.UCBRF_t// First modulation stage select
        const USCI_A0_UART_2xx.UCBRF_0// First stage 0;
        const USCI_A0_UART_2xx.UCBRF_1// First stage 1;
        const USCI_A0_UART_2xx.UCBRF_2// First stage 2;
        const USCI_A0_UART_2xx.UCBRF_3// First stage 3;
        const USCI_A0_UART_2xx.UCBRF_4// First stage 4;
        const USCI_A0_UART_2xx.UCBRF_5// First stage 5;
        const USCI_A0_UART_2xx.UCBRF_6// First stage 6;
        const USCI_A0_UART_2xx.UCBRF_7// First stage 7;
        const USCI_A0_UART_2xx.UCBRF_8// First stage 8;
        const USCI_A0_UART_2xx.UCBRF_9// First stage 9;
        const USCI_A0_UART_2xx.UCBRF_10// First stage 10;
        const USCI_A0_UART_2xx.UCBRF_11// First stage 11;
        const USCI_A0_UART_2xx.UCBRF_12// First stage 12;
        const USCI_A0_UART_2xx.UCBRF_13// First stage 13;
        const USCI_A0_UART_2xx.UCBRF_14// First stage 14;
        const USCI_A0_UART_2xx.UCBRF_15// First stage 15;
    values of type USCI_A0_UART_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_A0_UART_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_A0_UART_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_A0_UART_2xx.UCBRK_t// Break detect flag
        const USCI_A0_UART_2xx.UCBRK_OFF// No break condition;
        const USCI_A0_UART_2xx.UCBRK// Break condition occurred;
    values of type USCI_A0_UART_2xx.UCBRS_t// Second modulation stage select
        const USCI_A0_UART_2xx.UCBRS_0// Second stage 0;
        const USCI_A0_UART_2xx.UCBRS_1// Second stage 1;
        const USCI_A0_UART_2xx.UCBRS_2// Second stage 2;
        const USCI_A0_UART_2xx.UCBRS_3// Second stage 3;
        const USCI_A0_UART_2xx.UCBRS_4// Second stage 4;
        const USCI_A0_UART_2xx.UCBRS_5// Second stage 5;
        const USCI_A0_UART_2xx.UCBRS_6// Second stage 6;
        const USCI_A0_UART_2xx.UCBRS_7// Second stage 7;
    values of type USCI_A0_UART_2xx.UCBTOE_t// Break time out error
        const USCI_A0_UART_2xx.UCBTOE_OFF// No error;
        const USCI_A0_UART_2xx.UCBTOE// Length of break field exceeded 22 bit times;
    values of type USCI_A0_UART_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_A0_UART_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_A0_UART_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_A0_UART_2xx.UCDELIM0_t// Break/synch delimiter length bit 0
        const USCI_A0_UART_2xx.UCDELIM0_OFF// Break Sync Delimiter bit 0 Off;
        const USCI_A0_UART_2xx.UCDELIM0// Break Sync Delimiter bit 0 On;
    values of type USCI_A0_UART_2xx.UCDELIM1_t// Break/synch delimiter length bit 1
        const USCI_A0_UART_2xx.UCDELIM1_OFF// Break Sync Delimiter bit 1 Off;
        const USCI_A0_UART_2xx.UCDELIM1// Break Sync Delimiter bit 1 On;
    values of type USCI_A0_UART_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_A0_UART_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_A0_UART_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_A0_UART_2xx.UCFE_t// Framing error flag
        const USCI_A0_UART_2xx.UCFE_OFF// 0 No error;
        const USCI_A0_UART_2xx.UCFE// Character received with low stop bit;
    values of type USCI_A0_UART_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_A0_UART_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_A0_UART_2xx.UCIDLE// Idle line detected;
    values of type USCI_A0_UART_2xx.UCIREN_t// IrDA encoder/decoder enable
        const USCI_A0_UART_2xx.UCIREN_OFF// IrDA encoder/decoder disabled;
        const USCI_A0_UART_2xx.UCIREN// IrDA encoder/decoder enabled;
    values of type USCI_A0_UART_2xx.UCIRRXFE_t// IrDA receive filter enabled
        const USCI_A0_UART_2xx.UCIRRXFE_OFF// Receive filter disabled;
        const USCI_A0_UART_2xx.UCIRRXFE// Receive filter enabled;
    values of type USCI_A0_UART_2xx.UCIRRXFL0_t// IRDA Receive Filter Length Bit 0
        const USCI_A0_UART_2xx.UCIRRXFL0_OFF// Bit 0 OFF;
        const USCI_A0_UART_2xx.UCIRRXFL0// Bit 0 ON;
    values of type USCI_A0_UART_2xx.UCIRRXFL1_t// IRDA Receive Filter Length Bit 1
        const USCI_A0_UART_2xx.UCIRRXFL1_OFF// Bit 1 OFF;
        const USCI_A0_UART_2xx.UCIRRXFL1// Bit 1 ON;
    values of type USCI_A0_UART_2xx.UCIRRXFL2_t// IRDA Receive Filter Length Bit 2
        const USCI_A0_UART_2xx.UCIRRXFL2_OFF// Bit 2 OFF;
        const USCI_A0_UART_2xx.UCIRRXFL2// Bit 2 ON;
    values of type USCI_A0_UART_2xx.UCIRRXFL3_t// IRDA Receive Filter Length Bit 3
        const USCI_A0_UART_2xx.UCIRRXFL3_OFF// Bit 3 OFF;
        const USCI_A0_UART_2xx.UCIRRXFL3// Bit 3 ON;
    values of type USCI_A0_UART_2xx.UCIRRXFL4_t// IRDA Receive Filter Length Bit 4
        const USCI_A0_UART_2xx.UCIRRXFL4_OFF// Bit 4 OFF;
        const USCI_A0_UART_2xx.UCIRRXFL4// Bit 4 ON;
    values of type USCI_A0_UART_2xx.UCIRRXFL5_t// IRDA Receive Filter Length Bit 5
        const USCI_A0_UART_2xx.UCIRRXFL5_OFF// Bit 5 OFF;
        const USCI_A0_UART_2xx.UCIRRXFL5// Bit 5 ON;
    values of type USCI_A0_UART_2xx.UCIRRXPL_t// IrDA receive input UCAxRXD polarity
        const USCI_A0_UART_2xx.UCIRRXPL_OFF// IrDA transceiver delivers a high pulse when a light pulse is seen;
        const USCI_A0_UART_2xx.UCIRRXPL// IrDA transceiver delivers a low pulse when a light pulse is seen;
    values of type USCI_A0_UART_2xx.UCIRTXCLK_t// IrDA transmit pulse clock select
        const USCI_A0_UART_2xx.UCIRTXCLK_OFF// BRCLK;
        const USCI_A0_UART_2xx.UCIRTXCLK// BITCLK16 when UCOS16 = 1. Otherwise, BRCLK;
    values of type USCI_A0_UART_2xx.UCIRTXPL0_t// IRDA Transmit Pulse Length Bit 0
        const USCI_A0_UART_2xx.UCIRTXPL0_OFF// Bit 0 OFF;
        const USCI_A0_UART_2xx.UCIRTXPL0// Bit 0 ON;
    values of type USCI_A0_UART_2xx.UCIRTXPL1_t// IRDA Transmit Pulse Length Bit 1
        const USCI_A0_UART_2xx.UCIRTXPL1_OFF// Bit 1 OFF;
        const USCI_A0_UART_2xx.UCIRTXPL1// Bit 1 ON;
    values of type USCI_A0_UART_2xx.UCIRTXPL2_t// IRDA Transmit Pulse Length Bit 2
        const USCI_A0_UART_2xx.UCIRTXPL2_OFF// Bit 2 OFF;
        const USCI_A0_UART_2xx.UCIRTXPL2// Bit 2 ON;
    values of type USCI_A0_UART_2xx.UCIRTXPL3_t// IRDA Transmit Pulse Length Bit 3
        const USCI_A0_UART_2xx.UCIRTXPL3_OFF// Bit 3 OFF;
        const USCI_A0_UART_2xx.UCIRTXPL3// Bit 3 ON;
    values of type USCI_A0_UART_2xx.UCIRTXPL4_t// IRDA Transmit Pulse Length Bit 4
        const USCI_A0_UART_2xx.UCIRTXPL4_OFF// Bit 4 OFF;
        const USCI_A0_UART_2xx.UCIRTXPL4// Bit 4 ON;
    values of type USCI_A0_UART_2xx.UCIRTXPL5_t// IRDA Transmit Pulse Length Bit 5
        const USCI_A0_UART_2xx.UCIRTXPL5_OFF// Bit 5 OFF;
        const USCI_A0_UART_2xx.UCIRTXPL5// Bit 5 ON;
    values of type USCI_A0_UART_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_A0_UART_2xx.UCLISTEN_OFF// Disabled;
        const USCI_A0_UART_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_A0_UART_2xx.UCMODE_ASYNC_t// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0
        const USCI_A0_UART_2xx.UCMODE_0// UART Mode;
        const USCI_A0_UART_2xx.UCMODE_1// Idle-Line Multiprocessor Mode;
        const USCI_A0_UART_2xx.UCMODE_2// Address-Bit Multiprocessor Mode;
        const USCI_A0_UART_2xx.UCMODE_3// UART Mode with automatic baud rate detection;
    values of type USCI_A0_UART_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_A0_UART_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_A0_UART_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_A0_UART_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_A0_UART_2xx.UCMODE_3// I2C Mode;
    values of type USCI_A0_UART_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_A0_UART_2xx.UCMSB_OFF// LSB first;
        const USCI_A0_UART_2xx.UCMSB// MSB first;
    values of type USCI_A0_UART_2xx.UCOE_t// Overrun error flag
        const USCI_A0_UART_2xx.UCOE_OFF// No error;
        const USCI_A0_UART_2xx.UCOE// Overrun error occurred;
    values of type USCI_A0_UART_2xx.UCOS16_t// Oversampling mode enabled
        const USCI_A0_UART_2xx.UCOS16_OFF// Disabled;
        const USCI_A0_UART_2xx.UCOS16// Enabled;
    values of type USCI_A0_UART_2xx.UCPAR_t// Parity select. UCPAR is not used when parity is disabled
        const USCI_A0_UART_2xx.UCPAR_OFF// Odd parity;
        const USCI_A0_UART_2xx.UCPAR// Even parity;
    values of type USCI_A0_UART_2xx.UCPEN_t// Parity enable
        const USCI_A0_UART_2xx.UCPEN_OFF// Parity Disabled;
        const USCI_A0_UART_2xx.UCPEN// Parity Enabled;
    values of type USCI_A0_UART_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_A0_UART_2xx.UCPE_OFF// No error;
        const USCI_A0_UART_2xx.UCPE// Character received with parity error;
    values of type USCI_A0_UART_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_A0_UART_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_A0_UART_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_A0_UART_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_A0_UART_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_A0_UART_2xx.UCRXERR// Receive error detected;
    values of type USCI_A0_UART_2xx.UCSPB_t// Stop bit select. Number of stop bits
        const USCI_A0_UART_2xx.UCSPB_OFF// One stop bit;
        const USCI_A0_UART_2xx.UCSPB// Two stop bits;
    values of type USCI_A0_UART_2xx.UCSSEL_UART_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_A0_UART_2xx.UCSSEL_0// UCLK;
        const USCI_A0_UART_2xx.UCSSEL_1// ACLK;
        const USCI_A0_UART_2xx.UCSSEL_2// SMCLK;
    values of type USCI_A0_UART_2xx.UCSTOE_t// Synch field time out error
        const USCI_A0_UART_2xx.UCSTOE_OFF// No error;
        const USCI_A0_UART_2xx.UCSTOE// Length of synch field exceeded measurable time;
    values of type USCI_A0_UART_2xx.UCSWRST_t// Software reset enable
        const USCI_A0_UART_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_A0_UART_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_A0_UART_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_A0_UART_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_A0_UART_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_A0_UART_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_A0_UART_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_A0_UART_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_A0_UART_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_A0_UART_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_A0_UART_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    var obj = new USCI_A0_UART_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_A0_UART_2xx.UCxABCTL_t// ;
        obj.UCDELIM1// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times = IUSCI_UART.UCDELIM1_t ...
        obj.UCDELIM0// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times = IUSCI_UART.UCDELIM0_t ...
        obj.UCSTOE// Synch field time out error 0 No error 1 Length of synch field exceeded measurable time = IUSCI_UART.UCSTOE_t ...
        obj.UCBTOE// Break time out error 0 No error 1 Length of break field exceeded 22 bit times = IUSCI_UART.UCBTOE_t ...
        obj.UCABDEN// Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly = IUSCI_UART.UCABDEN_t ...
    var obj = new USCI_A0_UART_2xx.UCxCTL0_t// ;
        obj.UCPEN// Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation = IUSCI_UART.UCPEN_t ...
        obj.UCPAR// Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity = IUSCI_UART.UCPAR_t ...
        obj.UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first = IUSCI_UART.UCMSB_t ...
        obj.UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data = IUSCI_UART.UC7BIT_t ...
        obj.UCSPB// Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits = IUSCI_UART.UCSPB_t ...
        obj.UCMODE// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection = IUSCI_UART.UCMODE_ASYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode = IUSCI_UART.UCSYNC_t ...
    var obj = new USCI_A0_UART_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_UART.UCSSEL_UART_t ...
        obj.UCRXEIE// Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG = IUSCI_UART.UCRXEIE_t ...
        obj.UCBRKIE// Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG = IUSCI_UART.UCBRKIE_t ...
        obj.UCDORM// Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG = IUSCI_UART.UCDORM_t ...
        obj.UCTXADDR// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address = IUSCI_UART.UCTXADDR_t ...
        obj.UCTXBRK// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch = IUSCI_UART.UCTXBRK_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_UART.UCSWRST_t ...
    var obj = new USCI_A0_UART_2xx.UCxIRRCTL_t// ;
        obj.UCIRRXFL5// IRDA Receive Filter Length Bit 5 = IUSCI_UART.UCIRRXFL5_t ...
        obj.UCIRRXFL4// IRDA Receive Filter Length Bit 4 = IUSCI_UART.UCIRRXFL4_t ...
        obj.UCIRRXFL3// IRDA Receive Filter Length Bit 3 = IUSCI_UART.UCIRRXFL3_t ...
        obj.UCIRRXFL2// IRDA Receive Filter Length Bit 2 = IUSCI_UART.UCIRRXFL2_t ...
        obj.UCIRRXFL1// IRDA Receive Filter Length Bit 1 = IUSCI_UART.UCIRRXFL1_t ...
        obj.UCIRRXFL0// IRDA Receive Filter Length Bit 0 = IUSCI_UART.UCIRRXFL0_t ...
        obj.UCIRRXPL// IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen = IUSCI_UART.UCIRRXPL_t ...
        obj.UCIRRXFE// IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled = IUSCI_UART.UCIRRXFE_t ...
    var obj = new USCI_A0_UART_2xx.UCxIRTCTL_t// ;
        obj.UCIRTXPL5// IRDA Transmit Pulse Length Bit 5 = IUSCI_UART.UCIRTXPL5_t ...
        obj.UCIRTXPL4// IRDA Transmit Pulse Length Bit 4 = IUSCI_UART.UCIRTXPL4_t ...
        obj.UCIRTXPL3// IRDA Transmit Pulse Length Bit 3 = IUSCI_UART.UCIRTXPL3_t ...
        obj.UCIRTXPL2// IRDA Transmit Pulse Length Bit 2 = IUSCI_UART.UCIRTXPL2_t ...
        obj.UCIRTXPL1// IRDA Transmit Pulse Length Bit 1 = IUSCI_UART.UCIRTXPL1_t ...
        obj.UCIRTXPL0// IRDA Transmit Pulse Length Bit 0 = IUSCI_UART.UCIRTXPL0_t ...
        obj.UCIRTXCLK// IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK = IUSCI_UART.UCIRTXCLK_t ...
        obj.UCIREN// IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled = IUSCI_UART.UCIREN_t ...
    var obj = new USCI_A0_UART_2xx.UCxMCTL_t// ;
        obj.UCBRF// First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0 = IUSCI_UART.UCBRF_t ...
        obj.UCBRS// Second modulation stage select. These bits determine the modulation pattern for BITCLK = IUSCI_UART.UCBRS_t ...
        obj.UCOS16// Oversampling mode enabled 0 Disabled 1 Enabled = IUSCI_UART.UCOS16_t ...
    var obj = new USCI_A0_UART_2xx.UCxSTAT_t// ;
        obj.UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver = IUSCI_UART.UCLISTEN_t ...
        obj.UCFE// Framing error flag 0 No error 1 Character received with low stop bit = IUSCI_UART.UCFE_t ...
        obj.UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred = IUSCI_UART.UCOE_t ...
        obj.UCPE// Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error = IUSCI_UART.UCPE_t ...
        obj.UCBRK// Break detect flag 0 No break condition 1 Break condition occurred = IUSCI_UART.UCBRK_t ...
        obj.UCRXERR// Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected = IUSCI_UART.UCRXERR_t ...
        obj.UCADDR// Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address = IUSCI_UART.UCADDR_t ...
        obj.UCIDLE// Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected = IUSCI_UART.UCIDLE_t ...
        obj.UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving = IUSCI_UART.UCBUSY_t ...
    var obj = new USCI_A0_UART_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_A0_UART_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_A0_UART_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_A0_UART_2xx.Params// Instance config-params object;
        params.UCA0ABCTL// Auto Baud Rate Control Register = IUSCI_A0_UART.UCxABCTL_t {
            UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
            UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
            UCSTOE: IUSCI_UART.UCSTOE_OFF,
            UCBTOE: IUSCI_UART.UCBTOE_OFF,
            UCABDEN: IUSCI_UART.UCABDEN_OFF
        };
        params.UCA0BR0// Baud rate control register 0 = Bits8 0;
        params.UCA0BR1// Baud rate control register 1 = Bits8 0;
        params.UCA0CTL0// Control Register 0 = IUSCI_A0_UART.UCxCTL0_t {
            UCPEN: IUSCI_UART.UCPEN_OFF,
            UCPAR: IUSCI_UART.UCPAR_OFF,
            UCMSB: IUSCI.UCMSB_OFF,
            UC7BIT: IUSCI.UC7BIT_OFF,
            UCSPB: IUSCI_UART.UCSPB_OFF,
            UCMODE: IUSCI_UART.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC_OFF
        };
        params.UCA0CTL1// Control Register 1 = IUSCI_A0_UART.UCxCTL1_t {
            UCSSEL: IUSCI_UART.UCSSEL_0,
            UCRXEIE: IUSCI.UCRXEIE_OFF,
            UCBRKIE: IUSCI.UCBRKIE_OFF,
            UCDORM: IUSCI.UCDORM_OFF,
            UCTXADDR: IUSCI.UCTXADDR_OFF,
            UCTXBRK: IUSCI.UCTXBRK_OFF,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCA0IRRCTL// IrDA Receive Control Register = IUSCI_A0_UART.UCxIRRCTL_t {
            UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
            UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
            UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
            UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
            UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
            UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
            UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
            UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
        };
        params.UCA0IRTCTL// IrDA Transmit Control Register = IUSCI_A0_UART.UCxIRTCTL_t {
            UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
            UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
            UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
            UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
            UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
            UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
            UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
            UCIREN: IUSCI_UART.UCIREN_OFF
        };
        params.UCA0MCTL// Modulation Control Register = IUSCI_A0_UART.UCxMCTL_t {
            UCBRF: IUSCI_UART.UCBRF_0,
            UCBRS: IUSCI_UART.UCBRS_0,
            UCOS16: IUSCI_UART.UCOS16_OFF
        };
        params.UCA0RXBUF// Receive Buffer Register = Bits8 0;
        params.UCA0STAT// Status Register = IUSCI_A0_UART.UCxSTAT_t {
            UCLISTEN: IUSCI.UCLISTEN_OFF,
            UCFE: IUSCI.UCFE_OFF,
            UCOE: IUSCI.UCOE_OFF,
            UCPE: IUSCI.UCPE_OFF,
            UCBRK: IUSCI.UCBRK_OFF,
            UCRXERR: IUSCI.UCRXERR_OFF,
            UCADDR: IUSCI.UCADDR_OFF,
            UCIDLE: IUSCI.UCIDLE_OFF,
            UCBUSY: IUSCI.UCBUSY
        };
        params.UCA0TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_A0_UART_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCA0CTL0",
                regForceSet: false
            },
            {
                register: "UCA0CTL1",
                regForceSet: false
            },
            {
                register: "UCA0BR0",
                regForceSet: false
            },
            {
                register: "UCA0BR1",
                regForceSet: false
            },
            {
                register: "UCA0MCTL",
                regForceSet: false
            },
            {
                register: "UCA0STAT",
                regForceSet: false
            },
            {
                register: "UCA0RXBUF",
                regForceSet: false
            },
            {
                register: "UCA0TXBUF",
                regForceSet: false
            },
            {
                register: "UCA0ABCTL",
                regForceSet: false
            },
            {
                register: "UCA0IRTCTL",
                regForceSet: false
            },
            {
                register: "UCA0IRRCTL",
                regForceSet: false
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_A0_UART_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_A0_UART_2xx.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_A0_UART_2xx.UC7BIT_t
    const USCI_A0_UART_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_A0_UART_2xx.UC7BIT;
    // 7-bit
enum USCI_A0_UART_2xx.UCABDEN_t
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Automatic baud rate detect enable

Configuration settings
values of type USCI_A0_UART_2xx.UCABDEN_t
    const USCI_A0_UART_2xx.UCABDEN_OFF;
    // Baud rate detection disabled. Length of break and synch field is not measured
    const USCI_A0_UART_2xx.UCABDEN;
    // Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
enum USCI_A0_UART_2xx.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_A0_UART_2xx.UCADDR_t
    const USCI_A0_UART_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_A0_UART_2xx.UCADDR;
    // Received character is an address
enum USCI_A0_UART_2xx.UCBRF_t
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First modulation stage select

Configuration settings
values of type USCI_A0_UART_2xx.UCBRF_t
    const USCI_A0_UART_2xx.UCBRF_0;
    // First stage 0
    const USCI_A0_UART_2xx.UCBRF_1;
    // First stage 1
    const USCI_A0_UART_2xx.UCBRF_2;
    // First stage 2
    const USCI_A0_UART_2xx.UCBRF_3;
    // First stage 3
    const USCI_A0_UART_2xx.UCBRF_4;
    // First stage 4
    const USCI_A0_UART_2xx.UCBRF_5;
    // First stage 5
    const USCI_A0_UART_2xx.UCBRF_6;
    // First stage 6
    const USCI_A0_UART_2xx.UCBRF_7;
    // First stage 7
    const USCI_A0_UART_2xx.UCBRF_8;
    // First stage 8
    const USCI_A0_UART_2xx.UCBRF_9;
    // First stage 9
    const USCI_A0_UART_2xx.UCBRF_10;
    // First stage 10
    const USCI_A0_UART_2xx.UCBRF_11;
    // First stage 11
    const USCI_A0_UART_2xx.UCBRF_12;
    // First stage 12
    const USCI_A0_UART_2xx.UCBRF_13;
    // First stage 13
    const USCI_A0_UART_2xx.UCBRF_14;
    // First stage 14
    const USCI_A0_UART_2xx.UCBRF_15;
    // First stage 15
enum USCI_A0_UART_2xx.UCBRKIE_t
index URL

Receive break character interrupt-enable

Configuration settings
values of type USCI_A0_UART_2xx.UCBRKIE_t
    const USCI_A0_UART_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_A0_UART_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_A0_UART_2xx.UCBRK_t
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Break detect flag

Configuration settings
values of type USCI_A0_UART_2xx.UCBRK_t
    const USCI_A0_UART_2xx.UCBRK_OFF;
    // No break condition
    const USCI_A0_UART_2xx.UCBRK;
    // Break condition occurred
enum USCI_A0_UART_2xx.UCBRS_t
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Second modulation stage select

Configuration settings
values of type USCI_A0_UART_2xx.UCBRS_t
    const USCI_A0_UART_2xx.UCBRS_0;
    // Second stage 0
    const USCI_A0_UART_2xx.UCBRS_1;
    // Second stage 1
    const USCI_A0_UART_2xx.UCBRS_2;
    // Second stage 2
    const USCI_A0_UART_2xx.UCBRS_3;
    // Second stage 3
    const USCI_A0_UART_2xx.UCBRS_4;
    // Second stage 4
    const USCI_A0_UART_2xx.UCBRS_5;
    // Second stage 5
    const USCI_A0_UART_2xx.UCBRS_6;
    // Second stage 6
    const USCI_A0_UART_2xx.UCBRS_7;
    // Second stage 7
enum USCI_A0_UART_2xx.UCBTOE_t
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Break time out error

Configuration settings
values of type USCI_A0_UART_2xx.UCBTOE_t
    const USCI_A0_UART_2xx.UCBTOE_OFF;
    // No error
    const USCI_A0_UART_2xx.UCBTOE;
    // Length of break field exceeded 22 bit times
enum USCI_A0_UART_2xx.UCBUSY_t
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USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_A0_UART_2xx.UCBUSY_t
    const USCI_A0_UART_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_A0_UART_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_A0_UART_2xx.UCDELIM0_t
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Break/synch delimiter length bit 0

Configuration settings
values of type USCI_A0_UART_2xx.UCDELIM0_t
    const USCI_A0_UART_2xx.UCDELIM0_OFF;
    // Break Sync Delimiter bit 0 Off
    const USCI_A0_UART_2xx.UCDELIM0;
    // Break Sync Delimiter bit 0 On
enum USCI_A0_UART_2xx.UCDELIM1_t
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Break/synch delimiter length bit 1

Configuration settings
values of type USCI_A0_UART_2xx.UCDELIM1_t
    const USCI_A0_UART_2xx.UCDELIM1_OFF;
    // Break Sync Delimiter bit 1 Off
    const USCI_A0_UART_2xx.UCDELIM1;
    // Break Sync Delimiter bit 1 On
enum USCI_A0_UART_2xx.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_A0_UART_2xx.UCDORM_t
    const USCI_A0_UART_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_A0_UART_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_A0_UART_2xx.UCFE_t
index URL

Framing error flag

Configuration settings
values of type USCI_A0_UART_2xx.UCFE_t
    const USCI_A0_UART_2xx.UCFE_OFF;
    // 0 No error
    const USCI_A0_UART_2xx.UCFE;
    // Character received with low stop bit
enum USCI_A0_UART_2xx.UCIDLE_t
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Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_A0_UART_2xx.UCIDLE_t
    const USCI_A0_UART_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_A0_UART_2xx.UCIDLE;
    // Idle line detected
enum USCI_A0_UART_2xx.UCIREN_t
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IrDA encoder/decoder enable

Configuration settings
values of type USCI_A0_UART_2xx.UCIREN_t
    const USCI_A0_UART_2xx.UCIREN_OFF;
    // IrDA encoder/decoder disabled
    const USCI_A0_UART_2xx.UCIREN;
    // IrDA encoder/decoder enabled
enum USCI_A0_UART_2xx.UCIRRXFE_t
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IrDA receive filter enabled

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXFE_t
    const USCI_A0_UART_2xx.UCIRRXFE_OFF;
    // Receive filter disabled
    const USCI_A0_UART_2xx.UCIRRXFE;
    // Receive filter enabled
enum USCI_A0_UART_2xx.UCIRRXFL0_t
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IRDA Receive Filter Length Bit 0

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXFL0_t
    const USCI_A0_UART_2xx.UCIRRXFL0_OFF;
    // Bit 0 OFF
    const USCI_A0_UART_2xx.UCIRRXFL0;
    // Bit 0 ON
enum USCI_A0_UART_2xx.UCIRRXFL1_t
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IRDA Receive Filter Length Bit 1

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXFL1_t
    const USCI_A0_UART_2xx.UCIRRXFL1_OFF;
    // Bit 1 OFF
    const USCI_A0_UART_2xx.UCIRRXFL1;
    // Bit 1 ON
enum USCI_A0_UART_2xx.UCIRRXFL2_t
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IRDA Receive Filter Length Bit 2

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXFL2_t
    const USCI_A0_UART_2xx.UCIRRXFL2_OFF;
    // Bit 2 OFF
    const USCI_A0_UART_2xx.UCIRRXFL2;
    // Bit 2 ON
enum USCI_A0_UART_2xx.UCIRRXFL3_t
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IRDA Receive Filter Length Bit 3

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXFL3_t
    const USCI_A0_UART_2xx.UCIRRXFL3_OFF;
    // Bit 3 OFF
    const USCI_A0_UART_2xx.UCIRRXFL3;
    // Bit 3 ON
enum USCI_A0_UART_2xx.UCIRRXFL4_t
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IRDA Receive Filter Length Bit 4

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXFL4_t
    const USCI_A0_UART_2xx.UCIRRXFL4_OFF;
    // Bit 4 OFF
    const USCI_A0_UART_2xx.UCIRRXFL4;
    // Bit 4 ON
enum USCI_A0_UART_2xx.UCIRRXFL5_t
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IRDA Receive Filter Length Bit 5

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXFL5_t
    const USCI_A0_UART_2xx.UCIRRXFL5_OFF;
    // Bit 5 OFF
    const USCI_A0_UART_2xx.UCIRRXFL5;
    // Bit 5 ON
enum USCI_A0_UART_2xx.UCIRRXPL_t
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IrDA receive input UCAxRXD polarity

Configuration settings
values of type USCI_A0_UART_2xx.UCIRRXPL_t
    const USCI_A0_UART_2xx.UCIRRXPL_OFF;
    // IrDA transceiver delivers a high pulse when a light pulse is seen
    const USCI_A0_UART_2xx.UCIRRXPL;
    // IrDA transceiver delivers a low pulse when a light pulse is seen
enum USCI_A0_UART_2xx.UCIRTXCLK_t
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IrDA transmit pulse clock select

Configuration settings
values of type USCI_A0_UART_2xx.UCIRTXCLK_t
    const USCI_A0_UART_2xx.UCIRTXCLK_OFF;
    // BRCLK
    const USCI_A0_UART_2xx.UCIRTXCLK;
    // BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
enum USCI_A0_UART_2xx.UCIRTXPL0_t
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IRDA Transmit Pulse Length Bit 0

Configuration settings
values of type USCI_A0_UART_2xx.UCIRTXPL0_t
    const USCI_A0_UART_2xx.UCIRTXPL0_OFF;
    // Bit 0 OFF
    const USCI_A0_UART_2xx.UCIRTXPL0;
    // Bit 0 ON
enum USCI_A0_UART_2xx.UCIRTXPL1_t
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IRDA Transmit Pulse Length Bit 1

Configuration settings
values of type USCI_A0_UART_2xx.UCIRTXPL1_t
    const USCI_A0_UART_2xx.UCIRTXPL1_OFF;
    // Bit 1 OFF
    const USCI_A0_UART_2xx.UCIRTXPL1;
    // Bit 1 ON
enum USCI_A0_UART_2xx.UCIRTXPL2_t
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IRDA Transmit Pulse Length Bit 2

Configuration settings
values of type USCI_A0_UART_2xx.UCIRTXPL2_t
    const USCI_A0_UART_2xx.UCIRTXPL2_OFF;
    // Bit 2 OFF
    const USCI_A0_UART_2xx.UCIRTXPL2;
    // Bit 2 ON
enum USCI_A0_UART_2xx.UCIRTXPL3_t
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IRDA Transmit Pulse Length Bit 3

Configuration settings
values of type USCI_A0_UART_2xx.UCIRTXPL3_t
    const USCI_A0_UART_2xx.UCIRTXPL3_OFF;
    // Bit 3 OFF
    const USCI_A0_UART_2xx.UCIRTXPL3;
    // Bit 3 ON
enum USCI_A0_UART_2xx.UCIRTXPL4_t
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IRDA Transmit Pulse Length Bit 4

Configuration settings
values of type USCI_A0_UART_2xx.UCIRTXPL4_t
    const USCI_A0_UART_2xx.UCIRTXPL4_OFF;
    // Bit 4 OFF
    const USCI_A0_UART_2xx.UCIRTXPL4;
    // Bit 4 ON
enum USCI_A0_UART_2xx.UCIRTXPL5_t
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IRDA Transmit Pulse Length Bit 5

Configuration settings
values of type USCI_A0_UART_2xx.UCIRTXPL5_t
    const USCI_A0_UART_2xx.UCIRTXPL5_OFF;
    // Bit 5 OFF
    const USCI_A0_UART_2xx.UCIRTXPL5;
    // Bit 5 ON
enum USCI_A0_UART_2xx.UCLISTEN_t
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Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_A0_UART_2xx.UCLISTEN_t
    const USCI_A0_UART_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_A0_UART_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_A0_UART_2xx.UCMODE_ASYNC_t
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USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0

Configuration settings
values of type USCI_A0_UART_2xx.UCMODE_ASYNC_t
    const USCI_A0_UART_2xx.UCMODE_0;
    // UART Mode
    const USCI_A0_UART_2xx.UCMODE_1;
    // Idle-Line Multiprocessor Mode
    const USCI_A0_UART_2xx.UCMODE_2;
    // Address-Bit Multiprocessor Mode
    const USCI_A0_UART_2xx.UCMODE_3;
    // UART Mode with automatic baud rate detection
enum USCI_A0_UART_2xx.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_A0_UART_2xx.UCMODE_SYNC_t
    const USCI_A0_UART_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_A0_UART_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_A0_UART_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_A0_UART_2xx.UCMODE_3;
    // I2C Mode
enum USCI_A0_UART_2xx.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_A0_UART_2xx.UCMSB_t
    const USCI_A0_UART_2xx.UCMSB_OFF;
    // LSB first
    const USCI_A0_UART_2xx.UCMSB;
    // MSB first
enum USCI_A0_UART_2xx.UCOE_t
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Overrun error flag

Configuration settings
values of type USCI_A0_UART_2xx.UCOE_t
    const USCI_A0_UART_2xx.UCOE_OFF;
    // No error
    const USCI_A0_UART_2xx.UCOE;
    // Overrun error occurred
enum USCI_A0_UART_2xx.UCOS16_t
index URL

Oversampling mode enabled

Configuration settings
values of type USCI_A0_UART_2xx.UCOS16_t
    const USCI_A0_UART_2xx.UCOS16_OFF;
    // Disabled
    const USCI_A0_UART_2xx.UCOS16;
    // Enabled
enum USCI_A0_UART_2xx.UCPAR_t
index URL

Parity select. UCPAR is not used when parity is disabled

Configuration settings
values of type USCI_A0_UART_2xx.UCPAR_t
    const USCI_A0_UART_2xx.UCPAR_OFF;
    // Odd parity
    const USCI_A0_UART_2xx.UCPAR;
    // Even parity
enum USCI_A0_UART_2xx.UCPEN_t
index URL

Parity enable

Configuration settings
values of type USCI_A0_UART_2xx.UCPEN_t
    const USCI_A0_UART_2xx.UCPEN_OFF;
    // Parity Disabled
    const USCI_A0_UART_2xx.UCPEN;
    // Parity Enabled
enum USCI_A0_UART_2xx.UCPE_t
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Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_A0_UART_2xx.UCPE_t
    const USCI_A0_UART_2xx.UCPE_OFF;
    // No error
    const USCI_A0_UART_2xx.UCPE;
    // Character received with parity error
enum USCI_A0_UART_2xx.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_A0_UART_2xx.UCRXEIE_t
    const USCI_A0_UART_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_A0_UART_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_A0_UART_2xx.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_A0_UART_2xx.UCRXERR_t
    const USCI_A0_UART_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_A0_UART_2xx.UCRXERR;
    // Receive error detected
enum USCI_A0_UART_2xx.UCSPB_t
index URL

Stop bit select. Number of stop bits

Configuration settings
values of type USCI_A0_UART_2xx.UCSPB_t
    const USCI_A0_UART_2xx.UCSPB_OFF;
    // One stop bit
    const USCI_A0_UART_2xx.UCSPB;
    // Two stop bits
enum USCI_A0_UART_2xx.UCSSEL_UART_t
index URL

USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_A0_UART_2xx.UCSSEL_UART_t
    const USCI_A0_UART_2xx.UCSSEL_0;
    // UCLK
    const USCI_A0_UART_2xx.UCSSEL_1;
    // ACLK
    const USCI_A0_UART_2xx.UCSSEL_2;
    // SMCLK
enum USCI_A0_UART_2xx.UCSTOE_t
index URL

Synch field time out error

Configuration settings
values of type USCI_A0_UART_2xx.UCSTOE_t
    const USCI_A0_UART_2xx.UCSTOE_OFF;
    // No error
    const USCI_A0_UART_2xx.UCSTOE;
    // Length of synch field exceeded measurable time
enum USCI_A0_UART_2xx.UCSWRST_t
index URL

Software reset enable

Configuration settings
values of type USCI_A0_UART_2xx.UCSWRST_t
    const USCI_A0_UART_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_A0_UART_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_A0_UART_2xx.UCSYNC_t
index URL

Synchronous mode enable

Configuration settings
values of type USCI_A0_UART_2xx.UCSYNC_t
    const USCI_A0_UART_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_A0_UART_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_A0_UART_2xx.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_A0_UART_2xx.UCTXADDR_t
    const USCI_A0_UART_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_A0_UART_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_A0_UART_2xx.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_A0_UART_2xx.UCTXBRK_t
    const USCI_A0_UART_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_A0_UART_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
struct USCI_A0_UART_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USCI_A0_UART_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_A0_UART_2xx.UCxABCTL_t
index URL
Configuration settings
var obj = new USCI_A0_UART_2xx.UCxABCTL_t;
    obj.UCDELIM1 = IUSCI_UART.UCDELIM1_t ...
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
    obj.UCDELIM0 = IUSCI_UART.UCDELIM0_t ...
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
    obj.UCSTOE = IUSCI_UART.UCSTOE_t ...
    // Synch field time out error 0 No error 1 Length of synch field exceeded measurable time
    obj.UCBTOE = IUSCI_UART.UCBTOE_t ...
    // Break time out error 0 No error 1 Length of break field exceeded 22 bit times
    obj.UCABDEN = IUSCI_UART.UCABDEN_t ...
    // Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
struct USCI_A0_UART_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_A0_UART_2xx.UCxCTL0_t;
    obj.UCPEN = IUSCI_UART.UCPEN_t ...
    // Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation
    obj.UCPAR = IUSCI_UART.UCPAR_t ...
    // Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity
    obj.UCMSB = IUSCI_UART.UCMSB_t ...
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
    obj.UC7BIT = IUSCI_UART.UC7BIT_t ...
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
    obj.UCSPB = IUSCI_UART.UCSPB_t ...
    // Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits
    obj.UCMODE = IUSCI_UART.UCMODE_ASYNC_t ...
    // USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection
    obj.UCSYNC = IUSCI_UART.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
struct USCI_A0_UART_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_A0_UART_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_UART.UCSSEL_UART_t ...
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCRXEIE = IUSCI_UART.UCRXEIE_t ...
    // Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG
    obj.UCBRKIE = IUSCI_UART.UCBRKIE_t ...
    // Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG
    obj.UCDORM = IUSCI_UART.UCDORM_t ...
    // Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    obj.UCTXADDR = IUSCI_UART.UCTXADDR_t ...
    // Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address
    obj.UCTXBRK = IUSCI_UART.UCTXBRK_t ...
    // Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch
    obj.UCSWRST = IUSCI_UART.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_A0_UART_2xx.UCxIRRCTL_t
index URL
Configuration settings
var obj = new USCI_A0_UART_2xx.UCxIRRCTL_t;
    obj.UCIRRXFL5 = IUSCI_UART.UCIRRXFL5_t ...
    // IRDA Receive Filter Length Bit 5
    obj.UCIRRXFL4 = IUSCI_UART.UCIRRXFL4_t ...
    // IRDA Receive Filter Length Bit 4
    obj.UCIRRXFL3 = IUSCI_UART.UCIRRXFL3_t ...
    // IRDA Receive Filter Length Bit 3
    obj.UCIRRXFL2 = IUSCI_UART.UCIRRXFL2_t ...
    // IRDA Receive Filter Length Bit 2
    obj.UCIRRXFL1 = IUSCI_UART.UCIRRXFL1_t ...
    // IRDA Receive Filter Length Bit 1
    obj.UCIRRXFL0 = IUSCI_UART.UCIRRXFL0_t ...
    // IRDA Receive Filter Length Bit 0
    obj.UCIRRXPL = IUSCI_UART.UCIRRXPL_t ...
    // IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen
    obj.UCIRRXFE = IUSCI_UART.UCIRRXFE_t ...
    // IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled
struct USCI_A0_UART_2xx.UCxIRTCTL_t
index URL
Configuration settings
var obj = new USCI_A0_UART_2xx.UCxIRTCTL_t;
    obj.UCIRTXPL5 = IUSCI_UART.UCIRTXPL5_t ...
    // IRDA Transmit Pulse Length Bit 5
    obj.UCIRTXPL4 = IUSCI_UART.UCIRTXPL4_t ...
    // IRDA Transmit Pulse Length Bit 4
    obj.UCIRTXPL3 = IUSCI_UART.UCIRTXPL3_t ...
    // IRDA Transmit Pulse Length Bit 3
    obj.UCIRTXPL2 = IUSCI_UART.UCIRTXPL2_t ...
    // IRDA Transmit Pulse Length Bit 2
    obj.UCIRTXPL1 = IUSCI_UART.UCIRTXPL1_t ...
    // IRDA Transmit Pulse Length Bit 1
    obj.UCIRTXPL0 = IUSCI_UART.UCIRTXPL0_t ...
    // IRDA Transmit Pulse Length Bit 0
    obj.UCIRTXCLK = IUSCI_UART.UCIRTXCLK_t ...
    // IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
    obj.UCIREN = IUSCI_UART.UCIREN_t ...
    // IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled
struct USCI_A0_UART_2xx.UCxMCTL_t
index URL
Configuration settings
var obj = new USCI_A0_UART_2xx.UCxMCTL_t;
    obj.UCBRF = IUSCI_UART.UCBRF_t ...
    // First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0
    obj.UCBRS = IUSCI_UART.UCBRS_t ...
    // Second modulation stage select. These bits determine the modulation pattern for BITCLK
    obj.UCOS16 = IUSCI_UART.UCOS16_t ...
    // Oversampling mode enabled 0 Disabled 1 Enabled
struct USCI_A0_UART_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_A0_UART_2xx.UCxSTAT_t;
    obj.UCLISTEN = IUSCI_UART.UCLISTEN_t ...
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
    obj.UCFE = IUSCI_UART.UCFE_t ...
    // Framing error flag 0 No error 1 Character received with low stop bit
    obj.UCOE = IUSCI_UART.UCOE_t ...
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
    obj.UCPE = IUSCI_UART.UCPE_t ...
    // Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error
    obj.UCBRK = IUSCI_UART.UCBRK_t ...
    // Break detect flag 0 No break condition 1 Break condition occurred
    obj.UCRXERR = IUSCI_UART.UCRXERR_t ...
    // Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected
    obj.UCADDR = IUSCI_UART.UCADDR_t ...
    // Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address
    obj.UCIDLE = IUSCI_UART.UCIDLE_t ...
    // Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected
    obj.UCBUSY = IUSCI_UART.UCBUSY_t ...
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
struct USCI_A0_UART_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_A0_UART_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_A0_UART_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_A0_UART_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_A0_UART_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_A0_UART_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
// Instance config-params object
    params.UCA0ABCTL = IUSCI_A0_UART.UCxABCTL_t {
    // Auto Baud Rate Control Register
        UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
        UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
        UCSTOE: IUSCI_UART.UCSTOE_OFF,
        UCBTOE: IUSCI_UART.UCBTOE_OFF,
        UCABDEN: IUSCI_UART.UCABDEN_OFF
    };
    params.UCA0BR0 = Bits8 0;
    // Baud rate control register 0
    params.UCA0BR1 = Bits8 0;
    // Baud rate control register 1
    params.UCA0CTL0 = IUSCI_A0_UART.UCxCTL0_t {
    // Control Register 0
        UCPEN: IUSCI_UART.UCPEN_OFF,
        UCPAR: IUSCI_UART.UCPAR_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCSPB: IUSCI_UART.UCSPB_OFF,
        UCMODE: IUSCI_UART.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC_OFF
    };
    params.UCA0CTL1 = IUSCI_A0_UART.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_UART.UCSSEL_0,
        UCRXEIE: IUSCI.UCRXEIE_OFF,
        UCBRKIE: IUSCI.UCBRKIE_OFF,
        UCDORM: IUSCI.UCDORM_OFF,
        UCTXADDR: IUSCI.UCTXADDR_OFF,
        UCTXBRK: IUSCI.UCTXBRK_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCA0IRRCTL = IUSCI_A0_UART.UCxIRRCTL_t {
    // IrDA Receive Control Register
        UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
        UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
        UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
        UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
        UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
        UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
        UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
        UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
    };
    params.UCA0IRTCTL = IUSCI_A0_UART.UCxIRTCTL_t {
    // IrDA Transmit Control Register
        UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
        UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
        UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
        UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
        UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
        UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
        UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
        UCIREN: IUSCI_UART.UCIREN_OFF
    };
    params.UCA0MCTL = IUSCI_A0_UART.UCxMCTL_t {
    // Modulation Control Register
        UCBRF: IUSCI_UART.UCBRF_0,
        UCBRS: IUSCI_UART.UCBRS_0,
        UCOS16: IUSCI_UART.UCOS16_OFF
    };
    params.UCA0RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCA0STAT = IUSCI_A0_UART.UCxSTAT_t {
    // Status Register
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCPE: IUSCI.UCPE_OFF,
        UCBRK: IUSCI.UCBRK_OFF,
        UCRXERR: IUSCI.UCRXERR_OFF,
        UCADDR: IUSCI.UCADDR_OFF,
        UCIDLE: IUSCI.UCIDLE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    params.UCA0TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_A0_UART_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCA0CTL0",
            regForceSet: false
        },
        {
            register: "UCA0CTL1",
            regForceSet: false
        },
        {
            register: "UCA0BR0",
            regForceSet: false
        },
        {
            register: "UCA0BR1",
            regForceSet: false
        },
        {
            register: "UCA0MCTL",
            regForceSet: false
        },
        {
            register: "UCA0STAT",
            regForceSet: false
        },
        {
            register: "UCA0RXBUF",
            regForceSet: false
        },
        {
            register: "UCA0TXBUF",
            regForceSet: false
        },
        {
            register: "UCA0ABCTL",
            regForceSet: false
        },
        {
            register: "UCA0IRTCTL",
            regForceSet: false
        },
        {
            register: "UCA0IRRCTL",
            regForceSet: false
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_A0_UART_2xx.Params.UCA0ABCTL // instance
index URL

Auto Baud Rate Control Register

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0ABCTL = IUSCI_A0_UART.UCxABCTL_t {
    UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
    UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
    UCSTOE: IUSCI_UART.UCSTOE_OFF,
    UCBTOE: IUSCI_UART.UCBTOE_OFF,
    UCABDEN: IUSCI_UART.UCABDEN_OFF
};
config USCI_A0_UART_2xx.Params.UCA0BR0 // instance
index URL

Baud rate control register 0

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0BR0 = Bits8 0;
config USCI_A0_UART_2xx.Params.UCA0BR1 // instance
index URL

Baud rate control register 1

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0BR1 = Bits8 0;
config USCI_A0_UART_2xx.Params.UCA0CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0CTL0 = IUSCI_A0_UART.UCxCTL0_t {
    UCPEN: IUSCI_UART.UCPEN_OFF,
    UCPAR: IUSCI_UART.UCPAR_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCSPB: IUSCI_UART.UCSPB_OFF,
    UCMODE: IUSCI_UART.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC_OFF
};
config USCI_A0_UART_2xx.Params.UCA0CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0CTL1 = IUSCI_A0_UART.UCxCTL1_t {
    UCSSEL: IUSCI_UART.UCSSEL_0,
    UCRXEIE: IUSCI.UCRXEIE_OFF,
    UCBRKIE: IUSCI.UCBRKIE_OFF,
    UCDORM: IUSCI.UCDORM_OFF,
    UCTXADDR: IUSCI.UCTXADDR_OFF,
    UCTXBRK: IUSCI.UCTXBRK_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_A0_UART_2xx.Params.UCA0IRRCTL // instance
index URL

IrDA Receive Control Register

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0IRRCTL = IUSCI_A0_UART.UCxIRRCTL_t {
    UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
    UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
    UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
    UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
    UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
    UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
    UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
    UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
};
config USCI_A0_UART_2xx.Params.UCA0IRTCTL // instance
index URL

IrDA Transmit Control Register

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0IRTCTL = IUSCI_A0_UART.UCxIRTCTL_t {
    UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
    UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
    UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
    UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
    UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
    UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
    UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
    UCIREN: IUSCI_UART.UCIREN_OFF
};
config USCI_A0_UART_2xx.Params.UCA0MCTL // instance
index URL

Modulation Control Register

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0MCTL = IUSCI_A0_UART.UCxMCTL_t {
    UCBRF: IUSCI_UART.UCBRF_0,
    UCBRS: IUSCI_UART.UCBRS_0,
    UCOS16: IUSCI_UART.UCOS16_OFF
};
config USCI_A0_UART_2xx.Params.UCA0RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0RXBUF = Bits8 0;
config USCI_A0_UART_2xx.Params.UCA0STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0STAT = IUSCI_A0_UART.UCxSTAT_t {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCPE: IUSCI.UCPE_OFF,
    UCBRK: IUSCI.UCBRK_OFF,
    UCRXERR: IUSCI.UCRXERR_OFF,
    UCADDR: IUSCI.UCADDR_OFF,
    UCIDLE: IUSCI.UCIDLE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config USCI_A0_UART_2xx.Params.UCA0TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCA0TXBUF = Bits8 0;
config USCI_A0_UART_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_A0_UART_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_A0_UART_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCA0CTL0",
        regForceSet: false
    },
    {
        register: "UCA0CTL1",
        regForceSet: false
    },
    {
        register: "UCA0BR0",
        regForceSet: false
    },
    {
        register: "UCA0BR1",
        regForceSet: false
    },
    {
        register: "UCA0MCTL",
        regForceSet: false
    },
    {
        register: "UCA0STAT",
        regForceSet: false
    },
    {
        register: "UCA0RXBUF",
        regForceSet: false
    },
    {
        register: "UCA0TXBUF",
        regForceSet: false
    },
    {
        register: "UCA0ABCTL",
        regForceSet: false
    },
    {
        register: "UCA0IRTCTL",
        regForceSet: false
    },
    {
        register: "UCA0IRRCTL",
        regForceSet: false
    }
];
config USCI_A0_UART_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_A0_UART_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_A0_UART_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_A0_UART_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_A0_UART_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_A0_UART_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_A0_UART_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_A0_UART_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_A0_UART_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_A0_UART_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_A0_UART_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_A0_UART_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:08 GMT


module ti.catalog.msp430.peripherals.communication.USCI_A1_SPI_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_A1_SPI_2xx
index URL

Universal Serial Communication Interface A1 SPI 2xx

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_A1_SPI_2xx.xdc
var USCI_A1_SPI_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_A1_SPI_2xx');
module-wide constants & types
    values of type USCI_A1_SPI_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_A1_SPI_2xx.UC7BIT_OFF// 8-bit;
        const USCI_A1_SPI_2xx.UC7BIT// 7-bit;
    values of type USCI_A1_SPI_2xx.UCA1RXIE_t// USCI_A1 receive interrupt enable
        const USCI_A1_SPI_2xx.UCA1RXIE_OFF// Interrupt disabled;
        const USCI_A1_SPI_2xx.UCA1RXIE// Interrupt enabled;
    values of type USCI_A1_SPI_2xx.UCA1TXIE_t// USCI_A1 transmit interrupt enable
        const USCI_A1_SPI_2xx.UCA1TXIE_OFF// Interrupt disabled;
        const USCI_A1_SPI_2xx.UCA1TXIE// Interrupt enabled;
    values of type USCI_A1_SPI_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_A1_SPI_2xx.UCADDR_OFF// Received character is data;
        const USCI_A1_SPI_2xx.UCADDR// Received character is an address;
    values of type USCI_A1_SPI_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_A1_SPI_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_A1_SPI_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_A1_SPI_2xx.UCBRK_t// Break detect flag
        const USCI_A1_SPI_2xx.UCBRK_OFF// No break condition;
        const USCI_A1_SPI_2xx.UCBRK// Break condition occurred;
    values of type USCI_A1_SPI_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_A1_SPI_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_A1_SPI_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_A1_SPI_2xx.UCCKPH_t// Clock phase select
        const USCI_A1_SPI_2xx.UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge;
        const USCI_A1_SPI_2xx.UCCKPH// Data is captured on the first UCLK edge and changed on the following edge;
    values of type USCI_A1_SPI_2xx.UCCKPL_t// Clock polarity select
        const USCI_A1_SPI_2xx.UCCKPL_OFF// Inactive state is low;
        const USCI_A1_SPI_2xx.UCCKPL// Inactive state is high;
    values of type USCI_A1_SPI_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_A1_SPI_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_A1_SPI_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_A1_SPI_2xx.UCFE_t// Framing error flag
        const USCI_A1_SPI_2xx.UCFE_OFF// 0 No error;
        const USCI_A1_SPI_2xx.UCFE// Character received with low stop bit;
    values of type USCI_A1_SPI_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_A1_SPI_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_A1_SPI_2xx.UCIDLE// Idle line detected;
    values of type USCI_A1_SPI_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_A1_SPI_2xx.UCLISTEN_OFF// Disabled;
        const USCI_A1_SPI_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_A1_SPI_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_A1_SPI_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_A1_SPI_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_A1_SPI_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_A1_SPI_2xx.UCMODE_3// I2C Mode;
    values of type USCI_A1_SPI_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_A1_SPI_2xx.UCMSB_OFF// LSB first;
        const USCI_A1_SPI_2xx.UCMSB// MSB first;
    values of type USCI_A1_SPI_2xx.UCMST_t// Master mode select
        const USCI_A1_SPI_2xx.UCMST_OFF// Slave mode;
        const USCI_A1_SPI_2xx.UCMST// Master mode;
    values of type USCI_A1_SPI_2xx.UCOE_t// Overrun error flag
        const USCI_A1_SPI_2xx.UCOE_OFF// No error;
        const USCI_A1_SPI_2xx.UCOE// Overrun error occurred;
    values of type USCI_A1_SPI_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_A1_SPI_2xx.UCPE_OFF// No error;
        const USCI_A1_SPI_2xx.UCPE// Character received with parity error;
    values of type USCI_A1_SPI_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_A1_SPI_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_A1_SPI_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_A1_SPI_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_A1_SPI_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_A1_SPI_2xx.UCRXERR// Receive error detected;
    values of type USCI_A1_SPI_2xx.UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_A1_SPI_2xx.UCSSEL_0// NA;
        const USCI_A1_SPI_2xx.UCSSEL_1// ACLK;
        const USCI_A1_SPI_2xx.UCSSEL_2// SMCLK;
    values of type USCI_A1_SPI_2xx.UCSWRST_t// Software reset enable
        const USCI_A1_SPI_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_A1_SPI_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_A1_SPI_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_A1_SPI_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_A1_SPI_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_A1_SPI_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_A1_SPI_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_A1_SPI_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_A1_SPI_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_A1_SPI_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_A1_SPI_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    var obj = new USCI_A1_SPI_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_A1_SPI_2xx.UC1IE_t// USCI_A1 SPI Interrupt Enable Register;
        obj.UCA1TXIE// USCI_A1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_A1_SPI_2xx.UCA1TXIE_t ...
        obj.UCA1RXIE// USCI_A1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_A1_SPI_2xx.UCA1RXIE_t ...
    var obj = new USCI_A1_SPI_2xx.UCxCTL0_t// ;
        obj.UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge = IUSCI_SPI.UCCKPH_t ...
        obj.UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high = IUSCI_SPI.UCCKPL_t ...
        obj.UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first = IUSCI_SPI.UCMSB_t ...
        obj.UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data = IUSCI_SPI.UC7BIT_t ...
        obj.UCMST// Master mode select 0 Slave mode 1 Master mode = IUSCI_SPI.UCMST_t ...
        obj.UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode = IUSCI_SPI.UCMODE_SYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode = IUSCI_SPI.UCSYNC_t ...
    var obj = new USCI_A1_SPI_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_SPI.UCSSEL_SPI_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_SPI.UCSWRST_t ...
    var obj = new USCI_A1_SPI_2xx.UCxSTAT_t// ;
        obj.UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver = IUSCI_SPI.UCLISTEN_t ...
        obj.UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred = IUSCI_SPI.UCFE_t ...
        obj.UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred = IUSCI_SPI.UCOE_t ...
        obj.UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving = IUSCI_SPI.UCBUSY_t ...
    var obj = new USCI_A1_SPI_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_A1_SPI_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_A1_SPI_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_A1_SPI_2xx.Params// Instance config-params object;
        params.UC1IE// USCI_A1 Interrupt Enable Register = USCI_A1_SPI_2xx.UC1IE_t {
            UCA1TXIE: USCI_A1_SPI_2xx.UCA1TXIE_OFF,
            UCA1RXIE: USCI_A1_SPI_2xx.UCA1RXIE_OFF
        };
        params.UCA1BR0// Bit Rate Control Register 0 = Bits8 0;
        params.UCA1BR1// Bit Rate Control Register 1 = Bits8 0;
        params.UCA1CTL0// Control Register 0 = IUSCI_A1_SPI.UCxCTL0_t {
            UCCKPH: IUSCI_SPI.UCCKPH_OFF,
            UCCKPL: IUSCI_SPI.UCCKPL_OFF,
            UCMSB: IUSCI.UCMSB_OFF,
            UC7BIT: IUSCI.UC7BIT_OFF,
            UCMST: IUSCI_SPI.UCMST_OFF,
            UCMODE: IUSCI.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC
        };
        params.UCA1CTL1// Control Register 1 = IUSCI_A1_SPI.UCxCTL1_t {
            UCSSEL: IUSCI_SPI.UCSSEL_0,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCA1RXBUF// Receive Buffer Register = Bits8 0;
        params.UCA1STAT// Status Register = IUSCI_A1_SPI.UCxSTAT_t {
            UCLISTEN: IUSCI.UCLISTEN_OFF,
            UCFE: IUSCI.UCFE_OFF,
            UCOE: IUSCI.UCOE_OFF,
            UCBUSY: IUSCI.UCBUSY
        };
        params.UCA1TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_A1_SPI_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCA1CTL0",
                regForceSet: false
            },
            {
                register: "UCA1CTL1",
                regForceSet: false
            },
            {
                register: "UCA1BR0",
                regForceSet: false
            },
            {
                register: "UCA1BR1",
                regForceSet: false
            },
            {
                register: "UCA1STAT",
                regForceSet: false
            },
            {
                register: "UCA1RXBUF",
                regForceSet: false
            },
            {
                register: "UCA1TXBUF",
                regForceSet: false
            },
            {
                register: "UC1IE",
                regForceSet: false
            }
        ];
        params.interruptSource// USCI_A1 UART interrupt enables = USCI_A1_SPI_2xx.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_A1_SPI_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_A1_SPI_2xx.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_A1_SPI_2xx.UC7BIT_t
    const USCI_A1_SPI_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_A1_SPI_2xx.UC7BIT;
    // 7-bit
enum USCI_A1_SPI_2xx.UCA1RXIE_t
index URL

USCI_A1 receive interrupt enable

Configuration settings
values of type USCI_A1_SPI_2xx.UCA1RXIE_t
    const USCI_A1_SPI_2xx.UCA1RXIE_OFF;
    // Interrupt disabled
    const USCI_A1_SPI_2xx.UCA1RXIE;
    // Interrupt enabled
enum USCI_A1_SPI_2xx.UCA1TXIE_t
index URL

USCI_A1 transmit interrupt enable

Configuration settings
values of type USCI_A1_SPI_2xx.UCA1TXIE_t
    const USCI_A1_SPI_2xx.UCA1TXIE_OFF;
    // Interrupt disabled
    const USCI_A1_SPI_2xx.UCA1TXIE;
    // Interrupt enabled
enum USCI_A1_SPI_2xx.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_A1_SPI_2xx.UCADDR_t
    const USCI_A1_SPI_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_A1_SPI_2xx.UCADDR;
    // Received character is an address
enum USCI_A1_SPI_2xx.UCBRKIE_t
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Receive break character interrupt-enable

Configuration settings
values of type USCI_A1_SPI_2xx.UCBRKIE_t
    const USCI_A1_SPI_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_A1_SPI_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_A1_SPI_2xx.UCBRK_t
index URL

Break detect flag

Configuration settings
values of type USCI_A1_SPI_2xx.UCBRK_t
    const USCI_A1_SPI_2xx.UCBRK_OFF;
    // No break condition
    const USCI_A1_SPI_2xx.UCBRK;
    // Break condition occurred
enum USCI_A1_SPI_2xx.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_A1_SPI_2xx.UCBUSY_t
    const USCI_A1_SPI_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_A1_SPI_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_A1_SPI_2xx.UCCKPH_t
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Clock phase select

Configuration settings
values of type USCI_A1_SPI_2xx.UCCKPH_t
    const USCI_A1_SPI_2xx.UCCKPH_OFF;
    // Data is changed on the first UCLK edge and captured on the following edge
    const USCI_A1_SPI_2xx.UCCKPH;
    // Data is captured on the first UCLK edge and changed on the following edge
enum USCI_A1_SPI_2xx.UCCKPL_t
index URL

Clock polarity select

Configuration settings
values of type USCI_A1_SPI_2xx.UCCKPL_t
    const USCI_A1_SPI_2xx.UCCKPL_OFF;
    // Inactive state is low
    const USCI_A1_SPI_2xx.UCCKPL;
    // Inactive state is high
enum USCI_A1_SPI_2xx.UCDORM_t
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Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_A1_SPI_2xx.UCDORM_t
    const USCI_A1_SPI_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_A1_SPI_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_A1_SPI_2xx.UCFE_t
index URL

Framing error flag

Configuration settings
values of type USCI_A1_SPI_2xx.UCFE_t
    const USCI_A1_SPI_2xx.UCFE_OFF;
    // 0 No error
    const USCI_A1_SPI_2xx.UCFE;
    // Character received with low stop bit
enum USCI_A1_SPI_2xx.UCIDLE_t
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Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_A1_SPI_2xx.UCIDLE_t
    const USCI_A1_SPI_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_A1_SPI_2xx.UCIDLE;
    // Idle line detected
enum USCI_A1_SPI_2xx.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_A1_SPI_2xx.UCLISTEN_t
    const USCI_A1_SPI_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_A1_SPI_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_A1_SPI_2xx.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_A1_SPI_2xx.UCMODE_SYNC_t
    const USCI_A1_SPI_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_A1_SPI_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_A1_SPI_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_A1_SPI_2xx.UCMODE_3;
    // I2C Mode
enum USCI_A1_SPI_2xx.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_A1_SPI_2xx.UCMSB_t
    const USCI_A1_SPI_2xx.UCMSB_OFF;
    // LSB first
    const USCI_A1_SPI_2xx.UCMSB;
    // MSB first
enum USCI_A1_SPI_2xx.UCMST_t
index URL

Master mode select

Configuration settings
values of type USCI_A1_SPI_2xx.UCMST_t
    const USCI_A1_SPI_2xx.UCMST_OFF;
    // Slave mode
    const USCI_A1_SPI_2xx.UCMST;
    // Master mode
enum USCI_A1_SPI_2xx.UCOE_t
index URL

Overrun error flag

Configuration settings
values of type USCI_A1_SPI_2xx.UCOE_t
    const USCI_A1_SPI_2xx.UCOE_OFF;
    // No error
    const USCI_A1_SPI_2xx.UCOE;
    // Overrun error occurred
enum USCI_A1_SPI_2xx.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_A1_SPI_2xx.UCPE_t
    const USCI_A1_SPI_2xx.UCPE_OFF;
    // No error
    const USCI_A1_SPI_2xx.UCPE;
    // Character received with parity error
enum USCI_A1_SPI_2xx.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_A1_SPI_2xx.UCRXEIE_t
    const USCI_A1_SPI_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_A1_SPI_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_A1_SPI_2xx.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_A1_SPI_2xx.UCRXERR_t
    const USCI_A1_SPI_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_A1_SPI_2xx.UCRXERR;
    // Receive error detected
enum USCI_A1_SPI_2xx.UCSSEL_SPI_t
index URL

USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_A1_SPI_2xx.UCSSEL_SPI_t
    const USCI_A1_SPI_2xx.UCSSEL_0;
    // NA
    const USCI_A1_SPI_2xx.UCSSEL_1;
    // ACLK
    const USCI_A1_SPI_2xx.UCSSEL_2;
    // SMCLK
enum USCI_A1_SPI_2xx.UCSWRST_t
index URL

Software reset enable

Configuration settings
values of type USCI_A1_SPI_2xx.UCSWRST_t
    const USCI_A1_SPI_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_A1_SPI_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_A1_SPI_2xx.UCSYNC_t
index URL

Synchronous mode enable

Configuration settings
values of type USCI_A1_SPI_2xx.UCSYNC_t
    const USCI_A1_SPI_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_A1_SPI_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_A1_SPI_2xx.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_A1_SPI_2xx.UCTXADDR_t
    const USCI_A1_SPI_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_A1_SPI_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_A1_SPI_2xx.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_A1_SPI_2xx.UCTXBRK_t
    const USCI_A1_SPI_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_A1_SPI_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
struct USCI_A1_SPI_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USCI_A1_SPI_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_A1_SPI_2xx.UC1IE_t
index URL

USCI_A1 SPI Interrupt Enable Register

Configuration settings
var obj = new USCI_A1_SPI_2xx.UC1IE_t;
    obj.UCA1TXIE = USCI_A1_SPI_2xx.UCA1TXIE_t ...
    // USCI_A1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCA1RXIE = USCI_A1_SPI_2xx.UCA1RXIE_t ...
    // USCI_A1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled
struct USCI_A1_SPI_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_A1_SPI_2xx.UCxCTL0_t;
    obj.UCCKPH = IUSCI_SPI.UCCKPH_t ...
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
    obj.UCCKPL = IUSCI_SPI.UCCKPL_t ...
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
    obj.UCMSB = IUSCI_SPI.UCMSB_t ...
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
    obj.UC7BIT = IUSCI_SPI.UC7BIT_t ...
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
    obj.UCMST = IUSCI_SPI.UCMST_t ...
    // Master mode select 0 Slave mode 1 Master mode
    obj.UCMODE = IUSCI_SPI.UCMODE_SYNC_t ...
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
    obj.UCSYNC = IUSCI_SPI.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
struct USCI_A1_SPI_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_A1_SPI_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_SPI.UCSSEL_SPI_t ...
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCSWRST = IUSCI_SPI.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_A1_SPI_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_A1_SPI_2xx.UCxSTAT_t;
    obj.UCLISTEN = IUSCI_SPI.UCLISTEN_t ...
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
    obj.UCFE = IUSCI_SPI.UCFE_t ...
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
    obj.UCOE = IUSCI_SPI.UCOE_t ...
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
    obj.UCBUSY = IUSCI_SPI.UCBUSY_t ...
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
struct USCI_A1_SPI_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_A1_SPI_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_A1_SPI_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_A1_SPI_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_A1_SPI_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_A1_SPI_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
// Instance config-params object
    params.UC1IE = USCI_A1_SPI_2xx.UC1IE_t {
    // USCI_A1 Interrupt Enable Register
        UCA1TXIE: USCI_A1_SPI_2xx.UCA1TXIE_OFF,
        UCA1RXIE: USCI_A1_SPI_2xx.UCA1RXIE_OFF
    };
    params.UCA1BR0 = Bits8 0;
    // Bit Rate Control Register 0
    params.UCA1BR1 = Bits8 0;
    // Bit Rate Control Register 1
    params.UCA1CTL0 = IUSCI_A1_SPI.UCxCTL0_t {
    // Control Register 0
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    params.UCA1CTL1 = IUSCI_A1_SPI.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCA1RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCA1STAT = IUSCI_A1_SPI.UCxSTAT_t {
    // Status Register
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    params.UCA1TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_A1_SPI_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCA1CTL0",
            regForceSet: false
        },
        {
            register: "UCA1CTL1",
            regForceSet: false
        },
        {
            register: "UCA1BR0",
            regForceSet: false
        },
        {
            register: "UCA1BR1",
            regForceSet: false
        },
        {
            register: "UCA1STAT",
            regForceSet: false
        },
        {
            register: "UCA1RXBUF",
            regForceSet: false
        },
        {
            register: "UCA1TXBUF",
            regForceSet: false
        },
        {
            register: "UC1IE",
            regForceSet: false
        }
    ];
    params.interruptSource = USCI_A1_SPI_2xx.regIntVect_t[2] undefined;
    // USCI_A1 UART interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_A1_SPI_2xx.Params.UC1IE // instance
index URL

USCI_A1 Interrupt Enable Register

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UC1IE = USCI_A1_SPI_2xx.UC1IE_t {
    UCA1TXIE: USCI_A1_SPI_2xx.UCA1TXIE_OFF,
    UCA1RXIE: USCI_A1_SPI_2xx.UCA1RXIE_OFF
};
config USCI_A1_SPI_2xx.Params.UCA1BR0 // instance
index URL

Bit Rate Control Register 0

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCA1BR0 = Bits8 0;
config USCI_A1_SPI_2xx.Params.UCA1BR1 // instance
index URL

Bit Rate Control Register 1

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCA1BR1 = Bits8 0;
config USCI_A1_SPI_2xx.Params.UCA1CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCA1CTL0 = IUSCI_A1_SPI.UCxCTL0_t {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config USCI_A1_SPI_2xx.Params.UCA1CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCA1CTL1 = IUSCI_A1_SPI.UCxCTL1_t {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_A1_SPI_2xx.Params.UCA1RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCA1RXBUF = Bits8 0;
config USCI_A1_SPI_2xx.Params.UCA1STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCA1STAT = IUSCI_A1_SPI.UCxSTAT_t {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config USCI_A1_SPI_2xx.Params.UCA1TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCA1TXBUF = Bits8 0;
config USCI_A1_SPI_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_A1_SPI_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_A1_SPI_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCA1CTL0",
        regForceSet: false
    },
    {
        register: "UCA1CTL1",
        regForceSet: false
    },
    {
        register: "UCA1BR0",
        regForceSet: false
    },
    {
        register: "UCA1BR1",
        regForceSet: false
    },
    {
        register: "UCA1STAT",
        regForceSet: false
    },
    {
        register: "UCA1RXBUF",
        regForceSet: false
    },
    {
        register: "UCA1TXBUF",
        regForceSet: false
    },
    {
        register: "UC1IE",
        regForceSet: false
    }
];
config USCI_A1_SPI_2xx.Params.interruptSource // instance
index URL

USCI_A1 UART interrupt enables

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.interruptSource = USCI_A1_SPI_2xx.regIntVect_t[2] undefined;
config USCI_A1_SPI_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_A1_SPI_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_A1_SPI_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_A1_SPI_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_A1_SPI_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_A1_SPI_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_A1_SPI_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_A1_SPI_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_A1_SPI_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_A1_SPI_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_A1_SPI_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_A1_SPI_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:09 GMT


module ti.catalog.msp430.peripherals.communication.USCI_A1_UART_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_A1_UART_2xx
index URL

Universal Serial Communication Interface

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_A1_UART_2xx.xdc
var USCI_A1_UART_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_A1_UART_2xx');
module-wide constants & types
    values of type USCI_A1_UART_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_A1_UART_2xx.UC7BIT_OFF// 8-bit;
        const USCI_A1_UART_2xx.UC7BIT// 7-bit;
    values of type USCI_A1_UART_2xx.UCA1RXIE_t// USCI_A1 receive interrupt enable
        const USCI_A1_UART_2xx.UCA1RXIE_OFF// Interrupt disabled;
        const USCI_A1_UART_2xx.UCA1RXIE// Interrupt enabled;
    values of type USCI_A1_UART_2xx.UCA1TXIE_t// USCI_A1 transmit interrupt enable
        const USCI_A1_UART_2xx.UCA1TXIE_OFF// Interrupt disabled;
        const USCI_A1_UART_2xx.UCA1TXIE// Interrupt enabled;
    values of type USCI_A1_UART_2xx.UCABDEN_t// Automatic baud rate detect enable
        const USCI_A1_UART_2xx.UCABDEN_OFF// Baud rate detection disabled. Length of break and synch field is not measured;
        const USCI_A1_UART_2xx.UCABDEN// Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly;
    values of type USCI_A1_UART_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_A1_UART_2xx.UCADDR_OFF// Received character is data;
        const USCI_A1_UART_2xx.UCADDR// Received character is an address;
    values of type USCI_A1_UART_2xx.UCBRF_t// First modulation stage select
        const USCI_A1_UART_2xx.UCBRF_0// First stage 0;
        const USCI_A1_UART_2xx.UCBRF_1// First stage 1;
        const USCI_A1_UART_2xx.UCBRF_2// First stage 2;
        const USCI_A1_UART_2xx.UCBRF_3// First stage 3;
        const USCI_A1_UART_2xx.UCBRF_4// First stage 4;
        const USCI_A1_UART_2xx.UCBRF_5// First stage 5;
        const USCI_A1_UART_2xx.UCBRF_6// First stage 6;
        const USCI_A1_UART_2xx.UCBRF_7// First stage 7;
        const USCI_A1_UART_2xx.UCBRF_8// First stage 8;
        const USCI_A1_UART_2xx.UCBRF_9// First stage 9;
        const USCI_A1_UART_2xx.UCBRF_10// First stage 10;
        const USCI_A1_UART_2xx.UCBRF_11// First stage 11;
        const USCI_A1_UART_2xx.UCBRF_12// First stage 12;
        const USCI_A1_UART_2xx.UCBRF_13// First stage 13;
        const USCI_A1_UART_2xx.UCBRF_14// First stage 14;
        const USCI_A1_UART_2xx.UCBRF_15// First stage 15;
    values of type USCI_A1_UART_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_A1_UART_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_A1_UART_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_A1_UART_2xx.UCBRK_t// Break detect flag
        const USCI_A1_UART_2xx.UCBRK_OFF// No break condition;
        const USCI_A1_UART_2xx.UCBRK// Break condition occurred;
    values of type USCI_A1_UART_2xx.UCBRS_t// Second modulation stage select
        const USCI_A1_UART_2xx.UCBRS_0// Second stage 0;
        const USCI_A1_UART_2xx.UCBRS_1// Second stage 1;
        const USCI_A1_UART_2xx.UCBRS_2// Second stage 2;
        const USCI_A1_UART_2xx.UCBRS_3// Second stage 3;
        const USCI_A1_UART_2xx.UCBRS_4// Second stage 4;
        const USCI_A1_UART_2xx.UCBRS_5// Second stage 5;
        const USCI_A1_UART_2xx.UCBRS_6// Second stage 6;
        const USCI_A1_UART_2xx.UCBRS_7// Second stage 7;
    values of type USCI_A1_UART_2xx.UCBTOE_t// Break time out error
        const USCI_A1_UART_2xx.UCBTOE_OFF// No error;
        const USCI_A1_UART_2xx.UCBTOE// Length of break field exceeded 22 bit times;
    values of type USCI_A1_UART_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_A1_UART_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_A1_UART_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_A1_UART_2xx.UCDELIM0_t// Break/synch delimiter length bit 0
        const USCI_A1_UART_2xx.UCDELIM0_OFF// Break Sync Delimiter bit 0 Off;
        const USCI_A1_UART_2xx.UCDELIM0// Break Sync Delimiter bit 0 On;
    values of type USCI_A1_UART_2xx.UCDELIM1_t// Break/synch delimiter length bit 1
        const USCI_A1_UART_2xx.UCDELIM1_OFF// Break Sync Delimiter bit 1 Off;
        const USCI_A1_UART_2xx.UCDELIM1// Break Sync Delimiter bit 1 On;
    values of type USCI_A1_UART_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_A1_UART_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_A1_UART_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_A1_UART_2xx.UCFE_t// Framing error flag
        const USCI_A1_UART_2xx.UCFE_OFF// 0 No error;
        const USCI_A1_UART_2xx.UCFE// Character received with low stop bit;
    values of type USCI_A1_UART_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_A1_UART_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_A1_UART_2xx.UCIDLE// Idle line detected;
    values of type USCI_A1_UART_2xx.UCIREN_t// IrDA encoder/decoder enable
        const USCI_A1_UART_2xx.UCIREN_OFF// IrDA encoder/decoder disabled;
        const USCI_A1_UART_2xx.UCIREN// IrDA encoder/decoder enabled;
    values of type USCI_A1_UART_2xx.UCIRRXFE_t// IrDA receive filter enabled
        const USCI_A1_UART_2xx.UCIRRXFE_OFF// Receive filter disabled;
        const USCI_A1_UART_2xx.UCIRRXFE// Receive filter enabled;
    values of type USCI_A1_UART_2xx.UCIRRXFL0_t// IRDA Receive Filter Length Bit 0
        const USCI_A1_UART_2xx.UCIRRXFL0_OFF// Bit 0 OFF;
        const USCI_A1_UART_2xx.UCIRRXFL0// Bit 0 ON;
    values of type USCI_A1_UART_2xx.UCIRRXFL1_t// IRDA Receive Filter Length Bit 1
        const USCI_A1_UART_2xx.UCIRRXFL1_OFF// Bit 1 OFF;
        const USCI_A1_UART_2xx.UCIRRXFL1// Bit 1 ON;
    values of type USCI_A1_UART_2xx.UCIRRXFL2_t// IRDA Receive Filter Length Bit 2
        const USCI_A1_UART_2xx.UCIRRXFL2_OFF// Bit 2 OFF;
        const USCI_A1_UART_2xx.UCIRRXFL2// Bit 2 ON;
    values of type USCI_A1_UART_2xx.UCIRRXFL3_t// IRDA Receive Filter Length Bit 3
        const USCI_A1_UART_2xx.UCIRRXFL3_OFF// Bit 3 OFF;
        const USCI_A1_UART_2xx.UCIRRXFL3// Bit 3 ON;
    values of type USCI_A1_UART_2xx.UCIRRXFL4_t// IRDA Receive Filter Length Bit 4
        const USCI_A1_UART_2xx.UCIRRXFL4_OFF// Bit 4 OFF;
        const USCI_A1_UART_2xx.UCIRRXFL4// Bit 4 ON;
    values of type USCI_A1_UART_2xx.UCIRRXFL5_t// IRDA Receive Filter Length Bit 5
        const USCI_A1_UART_2xx.UCIRRXFL5_OFF// Bit 5 OFF;
        const USCI_A1_UART_2xx.UCIRRXFL5// Bit 5 ON;
    values of type USCI_A1_UART_2xx.UCIRRXPL_t// IrDA receive input UCAxRXD polarity
        const USCI_A1_UART_2xx.UCIRRXPL_OFF// IrDA transceiver delivers a high pulse when a light pulse is seen;
        const USCI_A1_UART_2xx.UCIRRXPL// IrDA transceiver delivers a low pulse when a light pulse is seen;
    values of type USCI_A1_UART_2xx.UCIRTXCLK_t// IrDA transmit pulse clock select
        const USCI_A1_UART_2xx.UCIRTXCLK_OFF// BRCLK;
        const USCI_A1_UART_2xx.UCIRTXCLK// BITCLK16 when UCOS16 = 1. Otherwise, BRCLK;
    values of type USCI_A1_UART_2xx.UCIRTXPL0_t// IRDA Transmit Pulse Length Bit 0
        const USCI_A1_UART_2xx.UCIRTXPL0_OFF// Bit 0 OFF;
        const USCI_A1_UART_2xx.UCIRTXPL0// Bit 0 ON;
    values of type USCI_A1_UART_2xx.UCIRTXPL1_t// IRDA Transmit Pulse Length Bit 1
        const USCI_A1_UART_2xx.UCIRTXPL1_OFF// Bit 1 OFF;
        const USCI_A1_UART_2xx.UCIRTXPL1// Bit 1 ON;
    values of type USCI_A1_UART_2xx.UCIRTXPL2_t// IRDA Transmit Pulse Length Bit 2
        const USCI_A1_UART_2xx.UCIRTXPL2_OFF// Bit 2 OFF;
        const USCI_A1_UART_2xx.UCIRTXPL2// Bit 2 ON;
    values of type USCI_A1_UART_2xx.UCIRTXPL3_t// IRDA Transmit Pulse Length Bit 3
        const USCI_A1_UART_2xx.UCIRTXPL3_OFF// Bit 3 OFF;
        const USCI_A1_UART_2xx.UCIRTXPL3// Bit 3 ON;
    values of type USCI_A1_UART_2xx.UCIRTXPL4_t// IRDA Transmit Pulse Length Bit 4
        const USCI_A1_UART_2xx.UCIRTXPL4_OFF// Bit 4 OFF;
        const USCI_A1_UART_2xx.UCIRTXPL4// Bit 4 ON;
    values of type USCI_A1_UART_2xx.UCIRTXPL5_t// IRDA Transmit Pulse Length Bit 5
        const USCI_A1_UART_2xx.UCIRTXPL5_OFF// Bit 5 OFF;
        const USCI_A1_UART_2xx.UCIRTXPL5// Bit 5 ON;
    values of type USCI_A1_UART_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_A1_UART_2xx.UCLISTEN_OFF// Disabled;
        const USCI_A1_UART_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_A1_UART_2xx.UCMODE_ASYNC_t// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0
        const USCI_A1_UART_2xx.UCMODE_0// UART Mode;
        const USCI_A1_UART_2xx.UCMODE_1// Idle-Line Multiprocessor Mode;
        const USCI_A1_UART_2xx.UCMODE_2// Address-Bit Multiprocessor Mode;
        const USCI_A1_UART_2xx.UCMODE_3// UART Mode with automatic baud rate detection;
    values of type USCI_A1_UART_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_A1_UART_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_A1_UART_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_A1_UART_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_A1_UART_2xx.UCMODE_3// I2C Mode;
    values of type USCI_A1_UART_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_A1_UART_2xx.UCMSB_OFF// LSB first;
        const USCI_A1_UART_2xx.UCMSB// MSB first;
    values of type USCI_A1_UART_2xx.UCOE_t// Overrun error flag
        const USCI_A1_UART_2xx.UCOE_OFF// No error;
        const USCI_A1_UART_2xx.UCOE// Overrun error occurred;
    values of type USCI_A1_UART_2xx.UCOS16_t// Oversampling mode enabled
        const USCI_A1_UART_2xx.UCOS16_OFF// Disabled;
        const USCI_A1_UART_2xx.UCOS16// Enabled;
    values of type USCI_A1_UART_2xx.UCPAR_t// Parity select. UCPAR is not used when parity is disabled
        const USCI_A1_UART_2xx.UCPAR_OFF// Odd parity;
        const USCI_A1_UART_2xx.UCPAR// Even parity;
    values of type USCI_A1_UART_2xx.UCPEN_t// Parity enable
        const USCI_A1_UART_2xx.UCPEN_OFF// Parity Disabled;
        const USCI_A1_UART_2xx.UCPEN// Parity Enabled;
    values of type USCI_A1_UART_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_A1_UART_2xx.UCPE_OFF// No error;
        const USCI_A1_UART_2xx.UCPE// Character received with parity error;
    values of type USCI_A1_UART_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_A1_UART_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_A1_UART_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_A1_UART_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_A1_UART_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_A1_UART_2xx.UCRXERR// Receive error detected;
    values of type USCI_A1_UART_2xx.UCSPB_t// Stop bit select. Number of stop bits
        const USCI_A1_UART_2xx.UCSPB_OFF// One stop bit;
        const USCI_A1_UART_2xx.UCSPB// Two stop bits;
    values of type USCI_A1_UART_2xx.UCSSEL_UART_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_A1_UART_2xx.UCSSEL_0// UCLK;
        const USCI_A1_UART_2xx.UCSSEL_1// ACLK;
        const USCI_A1_UART_2xx.UCSSEL_2// SMCLK;
    values of type USCI_A1_UART_2xx.UCSTOE_t// Synch field time out error
        const USCI_A1_UART_2xx.UCSTOE_OFF// No error;
        const USCI_A1_UART_2xx.UCSTOE// Length of synch field exceeded measurable time;
    values of type USCI_A1_UART_2xx.UCSWRST_t// Software reset enable
        const USCI_A1_UART_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_A1_UART_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_A1_UART_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_A1_UART_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_A1_UART_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_A1_UART_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_A1_UART_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_A1_UART_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_A1_UART_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_A1_UART_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_A1_UART_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    var obj = new USCI_A1_UART_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_A1_UART_2xx.UC1IE_t// USCI_Ax UART Interrupt Enable Register;
        obj.UCA1TXIE// USCI_A1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_A1_UART_2xx.UCA1TXIE_t ...
        obj.UCA1RXIE// USCI_A1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_A1_UART_2xx.UCA1RXIE_t ...
    var obj = new USCI_A1_UART_2xx.UCxABCTL_t// ;
        obj.UCDELIM1// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times = IUSCI_UART.UCDELIM1_t ...
        obj.UCDELIM0// Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times = IUSCI_UART.UCDELIM0_t ...
        obj.UCSTOE// Synch field time out error 0 No error 1 Length of synch field exceeded measurable time = IUSCI_UART.UCSTOE_t ...
        obj.UCBTOE// Break time out error 0 No error 1 Length of break field exceeded 22 bit times = IUSCI_UART.UCBTOE_t ...
        obj.UCABDEN// Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly = IUSCI_UART.UCABDEN_t ...
    var obj = new USCI_A1_UART_2xx.UCxCTL0_t// ;
        obj.UCPEN// Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation = IUSCI_UART.UCPEN_t ...
        obj.UCPAR// Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity = IUSCI_UART.UCPAR_t ...
        obj.UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first = IUSCI_UART.UCMSB_t ...
        obj.UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data = IUSCI_UART.UC7BIT_t ...
        obj.UCSPB// Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits = IUSCI_UART.UCSPB_t ...
        obj.UCMODE// USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection = IUSCI_UART.UCMODE_ASYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode = IUSCI_UART.UCSYNC_t ...
    var obj = new USCI_A1_UART_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_UART.UCSSEL_UART_t ...
        obj.UCRXEIE// Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG = IUSCI_UART.UCRXEIE_t ...
        obj.UCBRKIE// Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG = IUSCI_UART.UCBRKIE_t ...
        obj.UCDORM// Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG = IUSCI_UART.UCDORM_t ...
        obj.UCTXADDR// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address = IUSCI_UART.UCTXADDR_t ...
        obj.UCTXBRK// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch = IUSCI_UART.UCTXBRK_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_UART.UCSWRST_t ...
    var obj = new USCI_A1_UART_2xx.UCxIRRCTL_t// ;
        obj.UCIRRXFL5// IRDA Receive Filter Length Bit 5 = IUSCI_UART.UCIRRXFL5_t ...
        obj.UCIRRXFL4// IRDA Receive Filter Length Bit 4 = IUSCI_UART.UCIRRXFL4_t ...
        obj.UCIRRXFL3// IRDA Receive Filter Length Bit 3 = IUSCI_UART.UCIRRXFL3_t ...
        obj.UCIRRXFL2// IRDA Receive Filter Length Bit 2 = IUSCI_UART.UCIRRXFL2_t ...
        obj.UCIRRXFL1// IRDA Receive Filter Length Bit 1 = IUSCI_UART.UCIRRXFL1_t ...
        obj.UCIRRXFL0// IRDA Receive Filter Length Bit 0 = IUSCI_UART.UCIRRXFL0_t ...
        obj.UCIRRXPL// IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen = IUSCI_UART.UCIRRXPL_t ...
        obj.UCIRRXFE// IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled = IUSCI_UART.UCIRRXFE_t ...
    var obj = new USCI_A1_UART_2xx.UCxIRTCTL_t// ;
        obj.UCIRTXPL5// IRDA Transmit Pulse Length Bit 5 = IUSCI_UART.UCIRTXPL5_t ...
        obj.UCIRTXPL4// IRDA Transmit Pulse Length Bit 4 = IUSCI_UART.UCIRTXPL4_t ...
        obj.UCIRTXPL3// IRDA Transmit Pulse Length Bit 3 = IUSCI_UART.UCIRTXPL3_t ...
        obj.UCIRTXPL2// IRDA Transmit Pulse Length Bit 2 = IUSCI_UART.UCIRTXPL2_t ...
        obj.UCIRTXPL1// IRDA Transmit Pulse Length Bit 1 = IUSCI_UART.UCIRTXPL1_t ...
        obj.UCIRTXPL0// IRDA Transmit Pulse Length Bit 0 = IUSCI_UART.UCIRTXPL0_t ...
        obj.UCIRTXCLK// IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK = IUSCI_UART.UCIRTXCLK_t ...
        obj.UCIREN// IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled = IUSCI_UART.UCIREN_t ...
    var obj = new USCI_A1_UART_2xx.UCxMCTL_t// ;
        obj.UCBRF// First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0 = IUSCI_UART.UCBRF_t ...
        obj.UCBRS// Second modulation stage select. These bits determine the modulation pattern for BITCLK = IUSCI_UART.UCBRS_t ...
        obj.UCOS16// Oversampling mode enabled 0 Disabled 1 Enabled = IUSCI_UART.UCOS16_t ...
    var obj = new USCI_A1_UART_2xx.UCxSTAT_t// ;
        obj.UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver = IUSCI_UART.UCLISTEN_t ...
        obj.UCFE// Framing error flag 0 No error 1 Character received with low stop bit = IUSCI_UART.UCFE_t ...
        obj.UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred = IUSCI_UART.UCOE_t ...
        obj.UCPE// Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error = IUSCI_UART.UCPE_t ...
        obj.UCBRK// Break detect flag 0 No break condition 1 Break condition occurred = IUSCI_UART.UCBRK_t ...
        obj.UCRXERR// Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected = IUSCI_UART.UCRXERR_t ...
        obj.UCADDR// Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address = IUSCI_UART.UCADDR_t ...
        obj.UCIDLE// Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected = IUSCI_UART.UCIDLE_t ...
        obj.UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving = IUSCI_UART.UCBUSY_t ...
    var obj = new USCI_A1_UART_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_A1_UART_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_A1_UART_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_A1_UART_2xx.Params// Instance config-params object;
        params.UC1IE// USCI_A1 Interrupt Enable Register = USCI_A1_UART_2xx.UC1IE_t {
            UCA1TXIE: USCI_A1_UART_2xx.UCA1TXIE_OFF,
            UCA1RXIE: USCI_A1_UART_2xx.UCA1RXIE_OFF
        };
        params.UCA1ABCTL// Auto Baud Rate Control Register = IUSCI_A1_UART.UCxABCTL_t {
            UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
            UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
            UCSTOE: IUSCI_UART.UCSTOE_OFF,
            UCBTOE: IUSCI_UART.UCBTOE_OFF,
            UCABDEN: IUSCI_UART.UCABDEN_OFF
        };
        params.UCA1BR0// Baud rate control register 0 = Bits8 0;
        params.UCA1BR1// Baud rate control register 1 = Bits8 0;
        params.UCA1CTL0// Control Register 0 = IUSCI_A1_UART.UCxCTL0_t {
            UCPEN: IUSCI_UART.UCPEN_OFF,
            UCPAR: IUSCI_UART.UCPAR_OFF,
            UCMSB: IUSCI.UCMSB_OFF,
            UC7BIT: IUSCI.UC7BIT_OFF,
            UCSPB: IUSCI_UART.UCSPB_OFF,
            UCMODE: IUSCI_UART.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC_OFF
        };
        params.UCA1CTL1// Control Register 1 = IUSCI_A1_UART.UCxCTL1_t {
            UCSSEL: IUSCI_UART.UCSSEL_0,
            UCRXEIE: IUSCI.UCRXEIE_OFF,
            UCBRKIE: IUSCI.UCBRKIE_OFF,
            UCDORM: IUSCI.UCDORM_OFF,
            UCTXADDR: IUSCI.UCTXADDR_OFF,
            UCTXBRK: IUSCI.UCTXBRK_OFF,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCA1IRRCTL// IrDA Receive Control Register = IUSCI_A1_UART.UCxIRRCTL_t {
            UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
            UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
            UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
            UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
            UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
            UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
            UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
            UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
        };
        params.UCA1IRTCTL// IrDA Transmit Control Register = IUSCI_A1_UART.UCxIRTCTL_t {
            UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
            UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
            UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
            UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
            UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
            UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
            UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
            UCIREN: IUSCI_UART.UCIREN_OFF
        };
        params.UCA1MCTL// Modulation Control Register = IUSCI_A1_UART.UCxMCTL_t {
            UCBRF: IUSCI_UART.UCBRF_0,
            UCBRS: IUSCI_UART.UCBRS_0,
            UCOS16: IUSCI_UART.UCOS16_OFF
        };
        params.UCA1RXBUF// Receive Buffer Register = Bits8 0;
        params.UCA1STAT// Status Register = IUSCI_A1_UART.UCxSTAT_t {
            UCLISTEN: IUSCI.UCLISTEN_OFF,
            UCFE: IUSCI.UCFE_OFF,
            UCOE: IUSCI.UCOE_OFF,
            UCPE: IUSCI.UCPE_OFF,
            UCBRK: IUSCI.UCBRK_OFF,
            UCRXERR: IUSCI.UCRXERR_OFF,
            UCADDR: IUSCI.UCADDR_OFF,
            UCIDLE: IUSCI.UCIDLE_OFF,
            UCBUSY: IUSCI.UCBUSY
        };
        params.UCA1TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_A1_UART_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCA1CTL0",
                regForceSet: false
            },
            {
                register: "UCA1CTL1",
                regForceSet: false
            },
            {
                register: "UCA1BR0",
                regForceSet: false
            },
            {
                register: "UCA1BR1",
                regForceSet: false
            },
            {
                register: "UCA1MCTL",
                regForceSet: false
            },
            {
                register: "UCA1STAT",
                regForceSet: false
            },
            {
                register: "UCA1RXBUF",
                regForceSet: false
            },
            {
                register: "UCA1TXBUF",
                regForceSet: false
            },
            {
                register: "UCA1ABCTL",
                regForceSet: false
            },
            {
                register: "UCA1IRTCTL",
                regForceSet: false
            },
            {
                register: "UCA1IRRCTL",
                regForceSet: false
            },
            {
                register: "UC1IE",
                regForceSet: false
            }
        ];
        params.interruptSource// USCI_A1 UART interrupt enables = USCI_A1_UART_2xx.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_A1_UART_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_A1_UART_2xx.UC7BIT_t
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Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_A1_UART_2xx.UC7BIT_t
    const USCI_A1_UART_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_A1_UART_2xx.UC7BIT;
    // 7-bit
enum USCI_A1_UART_2xx.UCA1RXIE_t
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USCI_A1 receive interrupt enable

Configuration settings
values of type USCI_A1_UART_2xx.UCA1RXIE_t
    const USCI_A1_UART_2xx.UCA1RXIE_OFF;
    // Interrupt disabled
    const USCI_A1_UART_2xx.UCA1RXIE;
    // Interrupt enabled
enum USCI_A1_UART_2xx.UCA1TXIE_t
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USCI_A1 transmit interrupt enable

Configuration settings
values of type USCI_A1_UART_2xx.UCA1TXIE_t
    const USCI_A1_UART_2xx.UCA1TXIE_OFF;
    // Interrupt disabled
    const USCI_A1_UART_2xx.UCA1TXIE;
    // Interrupt enabled
enum USCI_A1_UART_2xx.UCABDEN_t
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Automatic baud rate detect enable

Configuration settings
values of type USCI_A1_UART_2xx.UCABDEN_t
    const USCI_A1_UART_2xx.UCABDEN_OFF;
    // Baud rate detection disabled. Length of break and synch field is not measured
    const USCI_A1_UART_2xx.UCABDEN;
    // Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
enum USCI_A1_UART_2xx.UCADDR_t
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Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_A1_UART_2xx.UCADDR_t
    const USCI_A1_UART_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_A1_UART_2xx.UCADDR;
    // Received character is an address
enum USCI_A1_UART_2xx.UCBRF_t
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First modulation stage select

Configuration settings
values of type USCI_A1_UART_2xx.UCBRF_t
    const USCI_A1_UART_2xx.UCBRF_0;
    // First stage 0
    const USCI_A1_UART_2xx.UCBRF_1;
    // First stage 1
    const USCI_A1_UART_2xx.UCBRF_2;
    // First stage 2
    const USCI_A1_UART_2xx.UCBRF_3;
    // First stage 3
    const USCI_A1_UART_2xx.UCBRF_4;
    // First stage 4
    const USCI_A1_UART_2xx.UCBRF_5;
    // First stage 5
    const USCI_A1_UART_2xx.UCBRF_6;
    // First stage 6
    const USCI_A1_UART_2xx.UCBRF_7;
    // First stage 7
    const USCI_A1_UART_2xx.UCBRF_8;
    // First stage 8
    const USCI_A1_UART_2xx.UCBRF_9;
    // First stage 9
    const USCI_A1_UART_2xx.UCBRF_10;
    // First stage 10
    const USCI_A1_UART_2xx.UCBRF_11;
    // First stage 11
    const USCI_A1_UART_2xx.UCBRF_12;
    // First stage 12
    const USCI_A1_UART_2xx.UCBRF_13;
    // First stage 13
    const USCI_A1_UART_2xx.UCBRF_14;
    // First stage 14
    const USCI_A1_UART_2xx.UCBRF_15;
    // First stage 15
enum USCI_A1_UART_2xx.UCBRKIE_t
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Receive break character interrupt-enable

Configuration settings
values of type USCI_A1_UART_2xx.UCBRKIE_t
    const USCI_A1_UART_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_A1_UART_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_A1_UART_2xx.UCBRK_t
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Break detect flag

Configuration settings
values of type USCI_A1_UART_2xx.UCBRK_t
    const USCI_A1_UART_2xx.UCBRK_OFF;
    // No break condition
    const USCI_A1_UART_2xx.UCBRK;
    // Break condition occurred
enum USCI_A1_UART_2xx.UCBRS_t
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Second modulation stage select

Configuration settings
values of type USCI_A1_UART_2xx.UCBRS_t
    const USCI_A1_UART_2xx.UCBRS_0;
    // Second stage 0
    const USCI_A1_UART_2xx.UCBRS_1;
    // Second stage 1
    const USCI_A1_UART_2xx.UCBRS_2;
    // Second stage 2
    const USCI_A1_UART_2xx.UCBRS_3;
    // Second stage 3
    const USCI_A1_UART_2xx.UCBRS_4;
    // Second stage 4
    const USCI_A1_UART_2xx.UCBRS_5;
    // Second stage 5
    const USCI_A1_UART_2xx.UCBRS_6;
    // Second stage 6
    const USCI_A1_UART_2xx.UCBRS_7;
    // Second stage 7
enum USCI_A1_UART_2xx.UCBTOE_t
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Break time out error

Configuration settings
values of type USCI_A1_UART_2xx.UCBTOE_t
    const USCI_A1_UART_2xx.UCBTOE_OFF;
    // No error
    const USCI_A1_UART_2xx.UCBTOE;
    // Length of break field exceeded 22 bit times
enum USCI_A1_UART_2xx.UCBUSY_t
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USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_A1_UART_2xx.UCBUSY_t
    const USCI_A1_UART_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_A1_UART_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_A1_UART_2xx.UCDELIM0_t
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Break/synch delimiter length bit 0

Configuration settings
values of type USCI_A1_UART_2xx.UCDELIM0_t
    const USCI_A1_UART_2xx.UCDELIM0_OFF;
    // Break Sync Delimiter bit 0 Off
    const USCI_A1_UART_2xx.UCDELIM0;
    // Break Sync Delimiter bit 0 On
enum USCI_A1_UART_2xx.UCDELIM1_t
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Break/synch delimiter length bit 1

Configuration settings
values of type USCI_A1_UART_2xx.UCDELIM1_t
    const USCI_A1_UART_2xx.UCDELIM1_OFF;
    // Break Sync Delimiter bit 1 Off
    const USCI_A1_UART_2xx.UCDELIM1;
    // Break Sync Delimiter bit 1 On
enum USCI_A1_UART_2xx.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_A1_UART_2xx.UCDORM_t
    const USCI_A1_UART_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_A1_UART_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_A1_UART_2xx.UCFE_t
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Framing error flag

Configuration settings
values of type USCI_A1_UART_2xx.UCFE_t
    const USCI_A1_UART_2xx.UCFE_OFF;
    // 0 No error
    const USCI_A1_UART_2xx.UCFE;
    // Character received with low stop bit
enum USCI_A1_UART_2xx.UCIDLE_t
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Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_A1_UART_2xx.UCIDLE_t
    const USCI_A1_UART_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_A1_UART_2xx.UCIDLE;
    // Idle line detected
enum USCI_A1_UART_2xx.UCIREN_t
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IrDA encoder/decoder enable

Configuration settings
values of type USCI_A1_UART_2xx.UCIREN_t
    const USCI_A1_UART_2xx.UCIREN_OFF;
    // IrDA encoder/decoder disabled
    const USCI_A1_UART_2xx.UCIREN;
    // IrDA encoder/decoder enabled
enum USCI_A1_UART_2xx.UCIRRXFE_t
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IrDA receive filter enabled

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXFE_t
    const USCI_A1_UART_2xx.UCIRRXFE_OFF;
    // Receive filter disabled
    const USCI_A1_UART_2xx.UCIRRXFE;
    // Receive filter enabled
enum USCI_A1_UART_2xx.UCIRRXFL0_t
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IRDA Receive Filter Length Bit 0

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXFL0_t
    const USCI_A1_UART_2xx.UCIRRXFL0_OFF;
    // Bit 0 OFF
    const USCI_A1_UART_2xx.UCIRRXFL0;
    // Bit 0 ON
enum USCI_A1_UART_2xx.UCIRRXFL1_t
index URL

IRDA Receive Filter Length Bit 1

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXFL1_t
    const USCI_A1_UART_2xx.UCIRRXFL1_OFF;
    // Bit 1 OFF
    const USCI_A1_UART_2xx.UCIRRXFL1;
    // Bit 1 ON
enum USCI_A1_UART_2xx.UCIRRXFL2_t
index URL

IRDA Receive Filter Length Bit 2

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXFL2_t
    const USCI_A1_UART_2xx.UCIRRXFL2_OFF;
    // Bit 2 OFF
    const USCI_A1_UART_2xx.UCIRRXFL2;
    // Bit 2 ON
enum USCI_A1_UART_2xx.UCIRRXFL3_t
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IRDA Receive Filter Length Bit 3

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXFL3_t
    const USCI_A1_UART_2xx.UCIRRXFL3_OFF;
    // Bit 3 OFF
    const USCI_A1_UART_2xx.UCIRRXFL3;
    // Bit 3 ON
enum USCI_A1_UART_2xx.UCIRRXFL4_t
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IRDA Receive Filter Length Bit 4

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXFL4_t
    const USCI_A1_UART_2xx.UCIRRXFL4_OFF;
    // Bit 4 OFF
    const USCI_A1_UART_2xx.UCIRRXFL4;
    // Bit 4 ON
enum USCI_A1_UART_2xx.UCIRRXFL5_t
index URL

IRDA Receive Filter Length Bit 5

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXFL5_t
    const USCI_A1_UART_2xx.UCIRRXFL5_OFF;
    // Bit 5 OFF
    const USCI_A1_UART_2xx.UCIRRXFL5;
    // Bit 5 ON
enum USCI_A1_UART_2xx.UCIRRXPL_t
index URL

IrDA receive input UCAxRXD polarity

Configuration settings
values of type USCI_A1_UART_2xx.UCIRRXPL_t
    const USCI_A1_UART_2xx.UCIRRXPL_OFF;
    // IrDA transceiver delivers a high pulse when a light pulse is seen
    const USCI_A1_UART_2xx.UCIRRXPL;
    // IrDA transceiver delivers a low pulse when a light pulse is seen
enum USCI_A1_UART_2xx.UCIRTXCLK_t
index URL

IrDA transmit pulse clock select

Configuration settings
values of type USCI_A1_UART_2xx.UCIRTXCLK_t
    const USCI_A1_UART_2xx.UCIRTXCLK_OFF;
    // BRCLK
    const USCI_A1_UART_2xx.UCIRTXCLK;
    // BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
enum USCI_A1_UART_2xx.UCIRTXPL0_t
index URL

IRDA Transmit Pulse Length Bit 0

Configuration settings
values of type USCI_A1_UART_2xx.UCIRTXPL0_t
    const USCI_A1_UART_2xx.UCIRTXPL0_OFF;
    // Bit 0 OFF
    const USCI_A1_UART_2xx.UCIRTXPL0;
    // Bit 0 ON
enum USCI_A1_UART_2xx.UCIRTXPL1_t
index URL

IRDA Transmit Pulse Length Bit 1

Configuration settings
values of type USCI_A1_UART_2xx.UCIRTXPL1_t
    const USCI_A1_UART_2xx.UCIRTXPL1_OFF;
    // Bit 1 OFF
    const USCI_A1_UART_2xx.UCIRTXPL1;
    // Bit 1 ON
enum USCI_A1_UART_2xx.UCIRTXPL2_t
index URL

IRDA Transmit Pulse Length Bit 2

Configuration settings
values of type USCI_A1_UART_2xx.UCIRTXPL2_t
    const USCI_A1_UART_2xx.UCIRTXPL2_OFF;
    // Bit 2 OFF
    const USCI_A1_UART_2xx.UCIRTXPL2;
    // Bit 2 ON
enum USCI_A1_UART_2xx.UCIRTXPL3_t
index URL

IRDA Transmit Pulse Length Bit 3

Configuration settings
values of type USCI_A1_UART_2xx.UCIRTXPL3_t
    const USCI_A1_UART_2xx.UCIRTXPL3_OFF;
    // Bit 3 OFF
    const USCI_A1_UART_2xx.UCIRTXPL3;
    // Bit 3 ON
enum USCI_A1_UART_2xx.UCIRTXPL4_t
index URL

IRDA Transmit Pulse Length Bit 4

Configuration settings
values of type USCI_A1_UART_2xx.UCIRTXPL4_t
    const USCI_A1_UART_2xx.UCIRTXPL4_OFF;
    // Bit 4 OFF
    const USCI_A1_UART_2xx.UCIRTXPL4;
    // Bit 4 ON
enum USCI_A1_UART_2xx.UCIRTXPL5_t
index URL

IRDA Transmit Pulse Length Bit 5

Configuration settings
values of type USCI_A1_UART_2xx.UCIRTXPL5_t
    const USCI_A1_UART_2xx.UCIRTXPL5_OFF;
    // Bit 5 OFF
    const USCI_A1_UART_2xx.UCIRTXPL5;
    // Bit 5 ON
enum USCI_A1_UART_2xx.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_A1_UART_2xx.UCLISTEN_t
    const USCI_A1_UART_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_A1_UART_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_A1_UART_2xx.UCMODE_ASYNC_t
index URL

USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0

Configuration settings
values of type USCI_A1_UART_2xx.UCMODE_ASYNC_t
    const USCI_A1_UART_2xx.UCMODE_0;
    // UART Mode
    const USCI_A1_UART_2xx.UCMODE_1;
    // Idle-Line Multiprocessor Mode
    const USCI_A1_UART_2xx.UCMODE_2;
    // Address-Bit Multiprocessor Mode
    const USCI_A1_UART_2xx.UCMODE_3;
    // UART Mode with automatic baud rate detection
enum USCI_A1_UART_2xx.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_A1_UART_2xx.UCMODE_SYNC_t
    const USCI_A1_UART_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_A1_UART_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_A1_UART_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_A1_UART_2xx.UCMODE_3;
    // I2C Mode
enum USCI_A1_UART_2xx.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_A1_UART_2xx.UCMSB_t
    const USCI_A1_UART_2xx.UCMSB_OFF;
    // LSB first
    const USCI_A1_UART_2xx.UCMSB;
    // MSB first
enum USCI_A1_UART_2xx.UCOE_t
index URL

Overrun error flag

Configuration settings
values of type USCI_A1_UART_2xx.UCOE_t
    const USCI_A1_UART_2xx.UCOE_OFF;
    // No error
    const USCI_A1_UART_2xx.UCOE;
    // Overrun error occurred
enum USCI_A1_UART_2xx.UCOS16_t
index URL

Oversampling mode enabled

Configuration settings
values of type USCI_A1_UART_2xx.UCOS16_t
    const USCI_A1_UART_2xx.UCOS16_OFF;
    // Disabled
    const USCI_A1_UART_2xx.UCOS16;
    // Enabled
enum USCI_A1_UART_2xx.UCPAR_t
index URL

Parity select. UCPAR is not used when parity is disabled

Configuration settings
values of type USCI_A1_UART_2xx.UCPAR_t
    const USCI_A1_UART_2xx.UCPAR_OFF;
    // Odd parity
    const USCI_A1_UART_2xx.UCPAR;
    // Even parity
enum USCI_A1_UART_2xx.UCPEN_t
index URL

Parity enable

Configuration settings
values of type USCI_A1_UART_2xx.UCPEN_t
    const USCI_A1_UART_2xx.UCPEN_OFF;
    // Parity Disabled
    const USCI_A1_UART_2xx.UCPEN;
    // Parity Enabled
enum USCI_A1_UART_2xx.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_A1_UART_2xx.UCPE_t
    const USCI_A1_UART_2xx.UCPE_OFF;
    // No error
    const USCI_A1_UART_2xx.UCPE;
    // Character received with parity error
enum USCI_A1_UART_2xx.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_A1_UART_2xx.UCRXEIE_t
    const USCI_A1_UART_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_A1_UART_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_A1_UART_2xx.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_A1_UART_2xx.UCRXERR_t
    const USCI_A1_UART_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_A1_UART_2xx.UCRXERR;
    // Receive error detected
enum USCI_A1_UART_2xx.UCSPB_t
index URL

Stop bit select. Number of stop bits

Configuration settings
values of type USCI_A1_UART_2xx.UCSPB_t
    const USCI_A1_UART_2xx.UCSPB_OFF;
    // One stop bit
    const USCI_A1_UART_2xx.UCSPB;
    // Two stop bits
enum USCI_A1_UART_2xx.UCSSEL_UART_t
index URL

USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_A1_UART_2xx.UCSSEL_UART_t
    const USCI_A1_UART_2xx.UCSSEL_0;
    // UCLK
    const USCI_A1_UART_2xx.UCSSEL_1;
    // ACLK
    const USCI_A1_UART_2xx.UCSSEL_2;
    // SMCLK
enum USCI_A1_UART_2xx.UCSTOE_t
index URL

Synch field time out error

Configuration settings
values of type USCI_A1_UART_2xx.UCSTOE_t
    const USCI_A1_UART_2xx.UCSTOE_OFF;
    // No error
    const USCI_A1_UART_2xx.UCSTOE;
    // Length of synch field exceeded measurable time
enum USCI_A1_UART_2xx.UCSWRST_t
index URL

Software reset enable

Configuration settings
values of type USCI_A1_UART_2xx.UCSWRST_t
    const USCI_A1_UART_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_A1_UART_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_A1_UART_2xx.UCSYNC_t
index URL

Synchronous mode enable

Configuration settings
values of type USCI_A1_UART_2xx.UCSYNC_t
    const USCI_A1_UART_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_A1_UART_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_A1_UART_2xx.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_A1_UART_2xx.UCTXADDR_t
    const USCI_A1_UART_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_A1_UART_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_A1_UART_2xx.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_A1_UART_2xx.UCTXBRK_t
    const USCI_A1_UART_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_A1_UART_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
struct USCI_A1_UART_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USCI_A1_UART_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_A1_UART_2xx.UC1IE_t
index URL

USCI_Ax UART Interrupt Enable Register

Configuration settings
var obj = new USCI_A1_UART_2xx.UC1IE_t;
    obj.UCA1TXIE = USCI_A1_UART_2xx.UCA1TXIE_t ...
    // USCI_A1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCA1RXIE = USCI_A1_UART_2xx.UCA1RXIE_t ...
    // USCI_A1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled
struct USCI_A1_UART_2xx.UCxABCTL_t
index URL
Configuration settings
var obj = new USCI_A1_UART_2xx.UCxABCTL_t;
    obj.UCDELIM1 = IUSCI_UART.UCDELIM1_t ...
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
    obj.UCDELIM0 = IUSCI_UART.UCDELIM0_t ...
    // Break/synch delimiter length 00 1 bit time 01 2 bit times 10 3 bit times 11 4 bit times
    obj.UCSTOE = IUSCI_UART.UCSTOE_t ...
    // Synch field time out error 0 No error 1 Length of synch field exceeded measurable time
    obj.UCBTOE = IUSCI_UART.UCBTOE_t ...
    // Break time out error 0 No error 1 Length of break field exceeded 22 bit times
    obj.UCABDEN = IUSCI_UART.UCABDEN_t ...
    // Automatic baud rate detect enable 0 Baud rate detection disabled. Length of break and synch field is not measured. 1 Baud rate detection enabled. Length of break and synch field is measured and baud rate settings are changed accordingly
struct USCI_A1_UART_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_A1_UART_2xx.UCxCTL0_t;
    obj.UCPEN = IUSCI_UART.UCPEN_t ...
    // Parity enable 0 Parity disabled. 1 Parity enabled. Parity bit is generated (UCAxTXD) and expected (UCAxRXD). In address-bit multiprocessor mode, the address bit is included in the parity calculation
    obj.UCPAR = IUSCI_UART.UCPAR_t ...
    // Parity select. UCPAR is not used when parity is disabled. 0 Odd parity 1 Even parity
    obj.UCMSB = IUSCI_UART.UCMSB_t ...
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
    obj.UC7BIT = IUSCI_UART.UC7BIT_t ...
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
    obj.UCSPB = IUSCI_UART.UCSPB_t ...
    // Stop bit select. Number of stop bits. 0 One stop bit 1 Two stop bits
    obj.UCMODE = IUSCI_UART.UCMODE_ASYNC_t ...
    // USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. 00 UART Mode. 01 Idle-Line Multiprocessor Mode. 10 Address-Bit Multiprocessor Mode. 11 UART Mode with automatic baud rate detection
    obj.UCSYNC = IUSCI_UART.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
struct USCI_A1_UART_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_A1_UART_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_UART.UCSSEL_UART_t ...
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLK 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCRXEIE = IUSCI_UART.UCRXEIE_t ...
    // Receive erroneous-character interrupt-enable 0 Erroneous characters rejected and UCAxRXIFG is not set 1 Erroneous characters received will set UCAxRXIFG
    obj.UCBRKIE = IUSCI_UART.UCBRKIE_t ...
    // Receive break character interrupt-enable 0 Received break characters do not set UCAxRXIFG. 1 Received break characters set UCAxRXIFG
    obj.UCDORM = IUSCI_UART.UCDORM_t ...
    // Dormant. Puts USCI into sleep mode. 0 Not dormant. All received characters will set UCAxRXIFG. 1 Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
    obj.UCTXADDR = IUSCI_UART.UCTXADDR_t ...
    // Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. 0 Next frame transmitted is data 1 Next frame transmitted is an address
    obj.UCTXBRK = IUSCI_UART.UCTXBRK_t ...
    // Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer. 0 Next frame transmitted is not a break 1 Next frame transmitted is a break or a break/synch
    obj.UCSWRST = IUSCI_UART.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_A1_UART_2xx.UCxIRRCTL_t
index URL
Configuration settings
var obj = new USCI_A1_UART_2xx.UCxIRRCTL_t;
    obj.UCIRRXFL5 = IUSCI_UART.UCIRRXFL5_t ...
    // IRDA Receive Filter Length Bit 5
    obj.UCIRRXFL4 = IUSCI_UART.UCIRRXFL4_t ...
    // IRDA Receive Filter Length Bit 4
    obj.UCIRRXFL3 = IUSCI_UART.UCIRRXFL3_t ...
    // IRDA Receive Filter Length Bit 3
    obj.UCIRRXFL2 = IUSCI_UART.UCIRRXFL2_t ...
    // IRDA Receive Filter Length Bit 2
    obj.UCIRRXFL1 = IUSCI_UART.UCIRRXFL1_t ...
    // IRDA Receive Filter Length Bit 1
    obj.UCIRRXFL0 = IUSCI_UART.UCIRRXFL0_t ...
    // IRDA Receive Filter Length Bit 0
    obj.UCIRRXPL = IUSCI_UART.UCIRRXPL_t ...
    // IrDA receive input UCAxRXD polarity 0 IrDA transceiver delivers a high pulse when a light pulse is seen 1 IrDA transceiver delivers a low pulse when a light pulse is seen
    obj.UCIRRXFE = IUSCI_UART.UCIRRXFE_t ...
    // IrDA receive filter enabled 0 Receive filter disabled 1 Receive filter enabled
struct USCI_A1_UART_2xx.UCxIRTCTL_t
index URL
Configuration settings
var obj = new USCI_A1_UART_2xx.UCxIRTCTL_t;
    obj.UCIRTXPL5 = IUSCI_UART.UCIRTXPL5_t ...
    // IRDA Transmit Pulse Length Bit 5
    obj.UCIRTXPL4 = IUSCI_UART.UCIRTXPL4_t ...
    // IRDA Transmit Pulse Length Bit 4
    obj.UCIRTXPL3 = IUSCI_UART.UCIRTXPL3_t ...
    // IRDA Transmit Pulse Length Bit 3
    obj.UCIRTXPL2 = IUSCI_UART.UCIRTXPL2_t ...
    // IRDA Transmit Pulse Length Bit 2
    obj.UCIRTXPL1 = IUSCI_UART.UCIRTXPL1_t ...
    // IRDA Transmit Pulse Length Bit 1
    obj.UCIRTXPL0 = IUSCI_UART.UCIRTXPL0_t ...
    // IRDA Transmit Pulse Length Bit 0
    obj.UCIRTXCLK = IUSCI_UART.UCIRTXCLK_t ...
    // IrDA transmit pulse clock select 0 BRCLK 1 BITCLK16 when UCOS16 = 1. Otherwise, BRCLK
    obj.UCIREN = IUSCI_UART.UCIREN_t ...
    // IrDA encoder/decoder enable. 0 IrDA encoder/decoder disabled 1 IrDA encoder/decoder enabled
struct USCI_A1_UART_2xx.UCxMCTL_t
index URL
Configuration settings
var obj = new USCI_A1_UART_2xx.UCxMCTL_t;
    obj.UCBRF = IUSCI_UART.UCBRF_t ...
    // First modulation stage select. These bits determine the modulation pattern for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0
    obj.UCBRS = IUSCI_UART.UCBRS_t ...
    // Second modulation stage select. These bits determine the modulation pattern for BITCLK
    obj.UCOS16 = IUSCI_UART.UCOS16_t ...
    // Oversampling mode enabled 0 Disabled 1 Enabled
struct USCI_A1_UART_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_A1_UART_2xx.UCxSTAT_t;
    obj.UCLISTEN = IUSCI_UART.UCLISTEN_t ...
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
    obj.UCFE = IUSCI_UART.UCFE_t ...
    // Framing error flag 0 No error 1 Character received with low stop bit
    obj.UCOE = IUSCI_UART.UCOE_t ...
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
    obj.UCPE = IUSCI_UART.UCPE_t ...
    // Parity error flag. When UCPEN = 0, UCPE is read as 0. 0 No error 1 Character received with parity error
    obj.UCBRK = IUSCI_UART.UCBRK_t ...
    // Break detect flag 0 No break condition 1 Break condition occurred
    obj.UCRXERR = IUSCI_UART.UCRXERR_t ...
    // Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read. 0 No receive errors detected 1 Receive error detected
    obj.UCADDR = IUSCI_UART.UCADDR_t ...
    // Address received in address-bit multiprocessor mode. 0 Received character is data 1 Received character is an address
    obj.UCIDLE = IUSCI_UART.UCIDLE_t ...
    // Idle line detected in idle-line multiprocessor mode. 0 No idle line detected 1 Idle line detected
    obj.UCBUSY = IUSCI_UART.UCBUSY_t ...
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
struct USCI_A1_UART_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_A1_UART_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_A1_UART_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_A1_UART_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_A1_UART_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_A1_UART_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
// Instance config-params object
    params.UC1IE = USCI_A1_UART_2xx.UC1IE_t {
    // USCI_A1 Interrupt Enable Register
        UCA1TXIE: USCI_A1_UART_2xx.UCA1TXIE_OFF,
        UCA1RXIE: USCI_A1_UART_2xx.UCA1RXIE_OFF
    };
    params.UCA1ABCTL = IUSCI_A1_UART.UCxABCTL_t {
    // Auto Baud Rate Control Register
        UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
        UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
        UCSTOE: IUSCI_UART.UCSTOE_OFF,
        UCBTOE: IUSCI_UART.UCBTOE_OFF,
        UCABDEN: IUSCI_UART.UCABDEN_OFF
    };
    params.UCA1BR0 = Bits8 0;
    // Baud rate control register 0
    params.UCA1BR1 = Bits8 0;
    // Baud rate control register 1
    params.UCA1CTL0 = IUSCI_A1_UART.UCxCTL0_t {
    // Control Register 0
        UCPEN: IUSCI_UART.UCPEN_OFF,
        UCPAR: IUSCI_UART.UCPAR_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCSPB: IUSCI_UART.UCSPB_OFF,
        UCMODE: IUSCI_UART.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC_OFF
    };
    params.UCA1CTL1 = IUSCI_A1_UART.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_UART.UCSSEL_0,
        UCRXEIE: IUSCI.UCRXEIE_OFF,
        UCBRKIE: IUSCI.UCBRKIE_OFF,
        UCDORM: IUSCI.UCDORM_OFF,
        UCTXADDR: IUSCI.UCTXADDR_OFF,
        UCTXBRK: IUSCI.UCTXBRK_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCA1IRRCTL = IUSCI_A1_UART.UCxIRRCTL_t {
    // IrDA Receive Control Register
        UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
        UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
        UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
        UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
        UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
        UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
        UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
        UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
    };
    params.UCA1IRTCTL = IUSCI_A1_UART.UCxIRTCTL_t {
    // IrDA Transmit Control Register
        UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
        UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
        UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
        UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
        UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
        UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
        UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
        UCIREN: IUSCI_UART.UCIREN_OFF
    };
    params.UCA1MCTL = IUSCI_A1_UART.UCxMCTL_t {
    // Modulation Control Register
        UCBRF: IUSCI_UART.UCBRF_0,
        UCBRS: IUSCI_UART.UCBRS_0,
        UCOS16: IUSCI_UART.UCOS16_OFF
    };
    params.UCA1RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCA1STAT = IUSCI_A1_UART.UCxSTAT_t {
    // Status Register
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCPE: IUSCI.UCPE_OFF,
        UCBRK: IUSCI.UCBRK_OFF,
        UCRXERR: IUSCI.UCRXERR_OFF,
        UCADDR: IUSCI.UCADDR_OFF,
        UCIDLE: IUSCI.UCIDLE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    params.UCA1TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_A1_UART_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCA1CTL0",
            regForceSet: false
        },
        {
            register: "UCA1CTL1",
            regForceSet: false
        },
        {
            register: "UCA1BR0",
            regForceSet: false
        },
        {
            register: "UCA1BR1",
            regForceSet: false
        },
        {
            register: "UCA1MCTL",
            regForceSet: false
        },
        {
            register: "UCA1STAT",
            regForceSet: false
        },
        {
            register: "UCA1RXBUF",
            regForceSet: false
        },
        {
            register: "UCA1TXBUF",
            regForceSet: false
        },
        {
            register: "UCA1ABCTL",
            regForceSet: false
        },
        {
            register: "UCA1IRTCTL",
            regForceSet: false
        },
        {
            register: "UCA1IRRCTL",
            regForceSet: false
        },
        {
            register: "UC1IE",
            regForceSet: false
        }
    ];
    params.interruptSource = USCI_A1_UART_2xx.regIntVect_t[2] undefined;
    // USCI_A1 UART interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_A1_UART_2xx.Params.UC1IE // instance
index URL

USCI_A1 Interrupt Enable Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UC1IE = USCI_A1_UART_2xx.UC1IE_t {
    UCA1TXIE: USCI_A1_UART_2xx.UCA1TXIE_OFF,
    UCA1RXIE: USCI_A1_UART_2xx.UCA1RXIE_OFF
};
config USCI_A1_UART_2xx.Params.UCA1ABCTL // instance
index URL

Auto Baud Rate Control Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1ABCTL = IUSCI_A1_UART.UCxABCTL_t {
    UCDELIM1: IUSCI_UART.UCDELIM1_OFF,
    UCDELIM0: IUSCI_UART.UCDELIM0_OFF,
    UCSTOE: IUSCI_UART.UCSTOE_OFF,
    UCBTOE: IUSCI_UART.UCBTOE_OFF,
    UCABDEN: IUSCI_UART.UCABDEN_OFF
};
config USCI_A1_UART_2xx.Params.UCA1BR0 // instance
index URL

Baud rate control register 0

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1BR0 = Bits8 0;
config USCI_A1_UART_2xx.Params.UCA1BR1 // instance
index URL

Baud rate control register 1

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1BR1 = Bits8 0;
config USCI_A1_UART_2xx.Params.UCA1CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1CTL0 = IUSCI_A1_UART.UCxCTL0_t {
    UCPEN: IUSCI_UART.UCPEN_OFF,
    UCPAR: IUSCI_UART.UCPAR_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCSPB: IUSCI_UART.UCSPB_OFF,
    UCMODE: IUSCI_UART.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC_OFF
};
config USCI_A1_UART_2xx.Params.UCA1CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1CTL1 = IUSCI_A1_UART.UCxCTL1_t {
    UCSSEL: IUSCI_UART.UCSSEL_0,
    UCRXEIE: IUSCI.UCRXEIE_OFF,
    UCBRKIE: IUSCI.UCBRKIE_OFF,
    UCDORM: IUSCI.UCDORM_OFF,
    UCTXADDR: IUSCI.UCTXADDR_OFF,
    UCTXBRK: IUSCI.UCTXBRK_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_A1_UART_2xx.Params.UCA1IRRCTL // instance
index URL

IrDA Receive Control Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1IRRCTL = IUSCI_A1_UART.UCxIRRCTL_t {
    UCIRRXFL5: IUSCI_UART.UCIRRXFL5_OFF,
    UCIRRXFL4: IUSCI_UART.UCIRRXFL4_OFF,
    UCIRRXFL3: IUSCI_UART.UCIRRXFL3_OFF,
    UCIRRXFL2: IUSCI_UART.UCIRRXFL2_OFF,
    UCIRRXFL1: IUSCI_UART.UCIRRXFL1_OFF,
    UCIRRXFL0: IUSCI_UART.UCIRRXFL0_OFF,
    UCIRRXPL: IUSCI_UART.UCIRRXPL_OFF,
    UCIRRXFE: IUSCI_UART.UCIRRXFE_OFF
};
config USCI_A1_UART_2xx.Params.UCA1IRTCTL // instance
index URL

IrDA Transmit Control Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1IRTCTL = IUSCI_A1_UART.UCxIRTCTL_t {
    UCIRTXPL5: IUSCI_UART.UCIRTXPL5_OFF,
    UCIRTXPL4: IUSCI_UART.UCIRTXPL4_OFF,
    UCIRTXPL3: IUSCI_UART.UCIRTXPL3_OFF,
    UCIRTXPL2: IUSCI_UART.UCIRTXPL2_OFF,
    UCIRTXPL1: IUSCI_UART.UCIRTXPL1_OFF,
    UCIRTXPL0: IUSCI_UART.UCIRTXPL0_OFF,
    UCIRTXCLK: IUSCI_UART.UCIRTXCLK_OFF,
    UCIREN: IUSCI_UART.UCIREN_OFF
};
config USCI_A1_UART_2xx.Params.UCA1MCTL // instance
index URL

Modulation Control Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1MCTL = IUSCI_A1_UART.UCxMCTL_t {
    UCBRF: IUSCI_UART.UCBRF_0,
    UCBRS: IUSCI_UART.UCBRS_0,
    UCOS16: IUSCI_UART.UCOS16_OFF
};
config USCI_A1_UART_2xx.Params.UCA1RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1RXBUF = Bits8 0;
config USCI_A1_UART_2xx.Params.UCA1STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1STAT = IUSCI_A1_UART.UCxSTAT_t {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCPE: IUSCI.UCPE_OFF,
    UCBRK: IUSCI.UCBRK_OFF,
    UCRXERR: IUSCI.UCRXERR_OFF,
    UCADDR: IUSCI.UCADDR_OFF,
    UCIDLE: IUSCI.UCIDLE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config USCI_A1_UART_2xx.Params.UCA1TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCA1TXBUF = Bits8 0;
config USCI_A1_UART_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_A1_UART_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_A1_UART_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCA1CTL0",
        regForceSet: false
    },
    {
        register: "UCA1CTL1",
        regForceSet: false
    },
    {
        register: "UCA1BR0",
        regForceSet: false
    },
    {
        register: "UCA1BR1",
        regForceSet: false
    },
    {
        register: "UCA1MCTL",
        regForceSet: false
    },
    {
        register: "UCA1STAT",
        regForceSet: false
    },
    {
        register: "UCA1RXBUF",
        regForceSet: false
    },
    {
        register: "UCA1TXBUF",
        regForceSet: false
    },
    {
        register: "UCA1ABCTL",
        regForceSet: false
    },
    {
        register: "UCA1IRTCTL",
        regForceSet: false
    },
    {
        register: "UCA1IRRCTL",
        regForceSet: false
    },
    {
        register: "UC1IE",
        regForceSet: false
    }
];
config USCI_A1_UART_2xx.Params.interruptSource // instance
index URL

USCI_A1 UART interrupt enables

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.interruptSource = USCI_A1_UART_2xx.regIntVect_t[2] undefined;
config USCI_A1_UART_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_A1_UART_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_A1_UART_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_A1_UART_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_A1_UART_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_A1_UART_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_A1_UART_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_A1_UART_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_A1_UART_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_A1_UART_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_A1_UART_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_A1_UART_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:09 GMT


module ti.catalog.msp430.peripherals.communication.USCI_B0_I2C_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_B0_I2C_2xx
index URL

Universal Serial Communication Interface B0 I2C 2xx

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_B0_I2C_2xx.xdc
var USCI_B0_I2C_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_B0_I2C_2xx');
module-wide constants & types
    values of type USCI_B0_I2C_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_B0_I2C_2xx.UC7BIT_OFF// 8-bit;
        const USCI_B0_I2C_2xx.UC7BIT// 7-bit;
    values of type USCI_B0_I2C_2xx.UCA10_t// Own addressing mode select
        const USCI_B0_I2C_2xx.UCA10_OFF// Own address is a 7-bit address;
        const USCI_B0_I2C_2xx.UCA10// Own address is a 10-bit address;
    values of type USCI_B0_I2C_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_B0_I2C_2xx.UCADDR_OFF// Received character is data;
        const USCI_B0_I2C_2xx.UCADDR// Received character is an address;
    values of type USCI_B0_I2C_2xx.UCALIE_t// Arbitration lost interrupt enable
        const USCI_B0_I2C_2xx.UCALIE_OFF// Interrupt disabled;
        const USCI_B0_I2C_2xx.UCALIE// Interrupt enabled;
    values of type USCI_B0_I2C_2xx.UCALIFG_t// Arbitration lost interrupt flag
        const USCI_B0_I2C_2xx.UCALIFG_OFF// No interrupt pending;
        const USCI_B0_I2C_2xx.UCALIFG// Interrupt pending;
    values of type USCI_B0_I2C_2xx.UCBBUSY_t// Bus busy
        const USCI_B0_I2C_2xx.UCBBUSY_OFF// Bus inactive;
        const USCI_B0_I2C_2xx.UCBBUSY// Bus busy;
    values of type USCI_B0_I2C_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_B0_I2C_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_B0_I2C_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_B0_I2C_2xx.UCBRK_t// Break detect flag
        const USCI_B0_I2C_2xx.UCBRK_OFF// No break condition;
        const USCI_B0_I2C_2xx.UCBRK// Break condition occurred;
    values of type USCI_B0_I2C_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_B0_I2C_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_B0_I2C_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_B0_I2C_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_B0_I2C_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_B0_I2C_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_B0_I2C_2xx.UCFE_t// Framing error flag
        const USCI_B0_I2C_2xx.UCFE_OFF// 0 No error;
        const USCI_B0_I2C_2xx.UCFE// Character received with low stop bit;
    values of type USCI_B0_I2C_2xx.UCGCEN_t// General call response enable
        const USCI_B0_I2C_2xx.UCGCEN_OFF// Do not respond to a general call;
        const USCI_B0_I2C_2xx.UCGCEN// Respond to a general call;
    values of type USCI_B0_I2C_2xx.UCGC_t// General call address received
        const USCI_B0_I2C_2xx.UCGC_OFF// No general call address received;
        const USCI_B0_I2C_2xx.UCGC// General call address received;
    values of type USCI_B0_I2C_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_B0_I2C_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_B0_I2C_2xx.UCIDLE// Idle line detected;
    values of type USCI_B0_I2C_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_B0_I2C_2xx.UCLISTEN_OFF// Disabled;
        const USCI_B0_I2C_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_B0_I2C_2xx.UCMM_t// Multi-master environment select
        const USCI_B0_I2C_2xx.UCMM_OFF// Single master environment. There is no other master in the system. The address compare unit is disabled;
        const USCI_B0_I2C_2xx.UCMM// Multi master environment;
    values of type USCI_B0_I2C_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_B0_I2C_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_B0_I2C_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_B0_I2C_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_B0_I2C_2xx.UCMODE_3// I2C Mode;
    values of type USCI_B0_I2C_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_B0_I2C_2xx.UCMSB_OFF// LSB first;
        const USCI_B0_I2C_2xx.UCMSB// MSB first;
    values of type USCI_B0_I2C_2xx.UCMST_t// Master mode select
        const USCI_B0_I2C_2xx.UCMST_OFF// Slave mode;
        const USCI_B0_I2C_2xx.UCMST// Master mode;
    values of type USCI_B0_I2C_2xx.UCNACKIE_t// Not-acknowledge interrupt enable
        const USCI_B0_I2C_2xx.UCNACKIE_OFF// Interrupt disabled;
        const USCI_B0_I2C_2xx.UCNACKIE// Interrupt enabled;
    values of type USCI_B0_I2C_2xx.UCNACKIFG_t// Not-acknowledge received interrupt flag
        const USCI_B0_I2C_2xx.UCNACKIFG_OFF// No interrupt pending;
        const USCI_B0_I2C_2xx.UCNACKIFG// Interrupt pending;
    values of type USCI_B0_I2C_2xx.UCOE_t// Overrun error flag
        const USCI_B0_I2C_2xx.UCOE_OFF// No error;
        const USCI_B0_I2C_2xx.UCOE// Overrun error occurred;
    values of type USCI_B0_I2C_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_B0_I2C_2xx.UCPE_OFF// No error;
        const USCI_B0_I2C_2xx.UCPE// Character received with parity error;
    values of type USCI_B0_I2C_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_B0_I2C_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_B0_I2C_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_B0_I2C_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_B0_I2C_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_B0_I2C_2xx.UCRXERR// Receive error detected;
    values of type USCI_B0_I2C_2xx.UCSCLLOW_t// SCL low
        const USCI_B0_I2C_2xx.UCSCLLOW_OFF// SCL is not held low;
        const USCI_B0_I2C_2xx.UCSCLLOW// SCL is held low;
    values of type USCI_B0_I2C_2xx.UCSLA10_t// Slave addressing mode select
        const USCI_B0_I2C_2xx.UCSLA10_OFF// Address slave with 7-bit address;
        const USCI_B0_I2C_2xx.UCSLA10// Address slave with 10-bit address;
    values of type USCI_B0_I2C_2xx.UCSSEL_I2C_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_B0_I2C_2xx.UCSSEL_0// UCLK;
        const USCI_B0_I2C_2xx.UCSSEL_1// ACLK;
        const USCI_B0_I2C_2xx.UCSSEL_2// SMCLK;
    values of type USCI_B0_I2C_2xx.UCSTPIE_t// Stop condition interrupt enable
        const USCI_B0_I2C_2xx.UCSTPIE_OFF// Interrupt disabled;
        const USCI_B0_I2C_2xx.UCSTPIE// Interrupt enabled;
    values of type USCI_B0_I2C_2xx.UCSTPIFG_t// Stop condition interrupt flag
        const USCI_B0_I2C_2xx.UCSTPIFG_OFF// No interrupt pending;
        const USCI_B0_I2C_2xx.UCSTPIFG// Interrupt pending;
    values of type USCI_B0_I2C_2xx.UCSTTIE_t// Start condition interrupt enable
        const USCI_B0_I2C_2xx.UCSTTIE_OFF// Interrupt disabled;
        const USCI_B0_I2C_2xx.UCSTTIE// Interrupt enabled;
    values of type USCI_B0_I2C_2xx.UCSTTIFG_t// Start condition interrupt flag
        const USCI_B0_I2C_2xx.UCSTTIFG_OFF// No interrupt pending;
        const USCI_B0_I2C_2xx.UCSTTIFG// Interrupt pending;
    values of type USCI_B0_I2C_2xx.UCSWRST_t// Software reset enable
        const USCI_B0_I2C_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_B0_I2C_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_B0_I2C_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_B0_I2C_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_B0_I2C_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_B0_I2C_2xx.UCTR_t// Transmitter/Receiver
        const USCI_B0_I2C_2xx.UCTR_OFF// Receiver;
        const USCI_B0_I2C_2xx.UCTR// Transmitter;
    values of type USCI_B0_I2C_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_B0_I2C_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_B0_I2C_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_B0_I2C_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_B0_I2C_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_B0_I2C_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    values of type USCI_B0_I2C_2xx.UCTXNACK_t// Transmit a NACK
        const USCI_B0_I2C_2xx.UCTXNACK_OFF// Acknowledge normally;
        const USCI_B0_I2C_2xx.UCTXNACK// Generate NACK;
    values of type USCI_B0_I2C_2xx.UCTXSTP_t// Transmit STOP condition in master mode
        const USCI_B0_I2C_2xx.UCTXSTP_OFF// No STOP generated;
        const USCI_B0_I2C_2xx.UCTXSTP// Generate STOP;
    values of type USCI_B0_I2C_2xx.UCTXSTT_t// Transmit START condition in master mode
        const USCI_B0_I2C_2xx.UCTXSTT_OFF// Do not generate START condition;
        const USCI_B0_I2C_2xx.UCTXSTT// Generate START condition;
    var obj = new USCI_B0_I2C_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_B0_I2C_2xx.UCBxI2CIE_t// USCI_Bx I2C Interrupt Enable Register;
        obj.UCNACKIE// Not-acknowledge interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B0_I2C_2xx.UCNACKIE_t ...
        obj.UCSTPIE// Stop condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B0_I2C_2xx.UCSTPIE_t ...
        obj.UCSTTIE// Start condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B0_I2C_2xx.UCSTTIE_t ...
        obj.UCALIE// Arbitration lost interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B0_I2C_2xx.UCALIE_t ...
    var obj = new USCI_B0_I2C_2xx.UCBxI2COA_t// ;
        obj.UCGCEN// General call response enable 0 Do not respond to a general call 1 Respond to a general call = IUSCI_I2C.UCGCEN_t ...
        obj.I2COA// I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB = Bits16 ...
    var obj = new USCI_B0_I2C_2xx.UCxCTL0_t// ;
        obj.UCA10// Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address = IUSCI_I2C.UCA10_t ...
        obj.UCSLA10// Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address = IUSCI_I2C.UCSLA10_t ...
        obj.UCMM// Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment = IUSCI_I2C.UCMM_t ...
        obj.UCMST// Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode = IUSCI_I2C.UCMST_t ...
        obj.UCMODE// USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode = IUSCI_I2C.UCMODE_SYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode = IUSCI_I2C.UCSYNC_t ...
    var obj = new USCI_B0_I2C_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_I2C.UCSSEL_I2C_t ...
        obj.UCTR// Transmitter/Receiver 0 Receiver 1 Transmitter = IUSCI_I2C.UCTR_t ...
        obj.UCTXNACK// Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK = IUSCI_I2C.UCTXNACK_t ...
        obj.UCTXSTP// Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP = IUSCI_I2C.UCTXSTP_t ...
        obj.UCTXSTT// Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition = IUSCI_I2C.UCTXSTT_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_I2C.UCSWRST_t ...
    var obj = new USCI_B0_I2C_2xx.UCxSTAT_t// ;
        obj.UCSCLLOW// SCL low 0 SCL is not held low 1 SCL is held low = IUSCI_I2C.UCSCLLOW_t ...
        obj.UCGC// General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received = IUSCI_I2C.UCGC_t ...
        obj.UCBBUSY// Bus busy 0 Bus inactive 1 Bus busy = IUSCI_I2C.UCBBUSY_t ...
        obj.UCNACKIFG// Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCNACKIFG_t ...
        obj.UCSTPIFG// Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCSTPIFG_t ...
        obj.UCSTTIFG// Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCSTTIFG_t ...
        obj.UCALIFG// Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCALIFG_t ...
    var obj = new USCI_B0_I2C_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_B0_I2C_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_B0_I2C_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_B0_I2C_2xx.Params// Instance config-params object;
        params.UCB0BR0// Bit Rate Control Register 0 = Bits8 0;
        params.UCB0BR1// Bit Rate Control Register 1 = Bits8 0;
        params.UCB0CTL0// Control Register 0 = IUSCI_B0_I2C.UCxCTL0_t {
            UCA10: IUSCI_I2C.UCA10_OFF,
            UCSLA10: IUSCI_I2C.UCSLA10_OFF,
            UCMM: IUSCI_I2C.UCMM_OFF,
            UCMST: IUSCI_I2C.UCMST_OFF,
            UCMODE: IUSCI.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC
        };
        params.UCB0CTL1// Control Register 1 = IUSCI_B0_I2C.UCxCTL1_t {
            UCSSEL: IUSCI_I2C.UCSSEL_0,
            UCTR: IUSCI_I2C.UCTR_OFF,
            UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
            UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
            UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCB0I2CIE// USCI_Bx I2C Interrupt Enable Register = USCI_B0_I2C_2xx.UCBxI2CIE_t {
            UCNACKIE: USCI_B0_I2C_2xx.UCNACKIE_OFF,
            UCSTPIE: USCI_B0_I2C_2xx.UCSTPIE_OFF,
            UCSTTIE: USCI_B0_I2C_2xx.UCSTTIE_OFF,
            UCALIE: USCI_B0_I2C_2xx.UCALIE_OFF
        };
        params.UCB0I2COA// I2C Own Address Register = IUSCI_B0_I2C.UCBxI2COA_t {
            UCGCEN: IUSCI_I2C.UCGCEN_OFF,
            I2COA: 0
        };
        params.UCB0I2CSA// I2C Slave Address Register = Bits8 0;
        params.UCB0RXBUF// Receive Buffer Register = Bits8 0;
        params.UCB0STAT// Status Register = IUSCI_B0_I2C.UCxSTAT_t {
            UCSCLLOW: IUSCI_I2C.UCSCLLOW,
            UCGC: IUSCI_I2C.UCGC,
            UCBBUSY: IUSCI_I2C.UCBBUSY,
            UCNACKIFG: IUSCI_I2C.UCNACKIFG,
            UCSTPIFG: IUSCI_I2C.UCSTPIFG,
            UCSTTIFG: IUSCI_I2C.UCSTTIFG,
            UCALIFG: IUSCI_I2C.UCALIFG
        };
        params.UCB0TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_B0_I2C_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCB0CTL0",
                regForceSet: false
            },
            {
                register: "UCB0CTL1",
                regForceSet: false
            },
            {
                register: "UCB0BR0",
                regForceSet: false
            },
            {
                register: "UCB0BR1",
                regForceSet: false
            },
            {
                register: "UCB0STAT",
                regForceSet: false
            },
            {
                register: "UCB0RXBUF",
                regForceSet: false
            },
            {
                register: "UCB0TXBUF",
                regForceSet: false
            },
            {
                register: "UCB0I2COA",
                regForceSet: false
            },
            {
                register: "UCB0I2CSA",
                regForceSet: false
            },
            {
                register: "UCB0I2CIE",
                regForceSet: false
            }
        ];
        params.interruptSource// USCI_B0 I2C interrupt enables = USCI_B0_I2C_2xx.regIntVect_t[4] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_B0_I2C_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCALIE// Gets UCALIE bit() returns Bool
     inst.getUCBxI2CSA// Returns UCBxI2CSA register value based on which module() returns Bits8
     inst.getUCNACKIE// Gets UCNACKIE bit() returns Bool
     inst.getUCSTPIE// Gets UCSTPIE bit() returns Bool
     inst.getUCSTTIE// Gets UCSTTIE bit() returns Bool
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCALIE// Sets UCALIE bit(Bool set) returns Bool
     inst.setUCBxI2CSA// Sets UCxxI2CSA register value based on which module(Bits8 value) returns Void
     inst.setUCNACKIE// Sets UCNACKIE bit(Bool set) returns Bool
     inst.setUCSTPIE// Sets UCSTPIE bit(Bool set) returns Bool
     inst.setUCSTTIE// Sets UCSTTIE bit(Bool set) returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_B0_I2C_2xx.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_B0_I2C_2xx.UC7BIT_t
    const USCI_B0_I2C_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_B0_I2C_2xx.UC7BIT;
    // 7-bit
enum USCI_B0_I2C_2xx.UCA10_t
index URL

Own addressing mode select

Configuration settings
values of type USCI_B0_I2C_2xx.UCA10_t
    const USCI_B0_I2C_2xx.UCA10_OFF;
    // Own address is a 7-bit address
    const USCI_B0_I2C_2xx.UCA10;
    // Own address is a 10-bit address
enum USCI_B0_I2C_2xx.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_B0_I2C_2xx.UCADDR_t
    const USCI_B0_I2C_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_B0_I2C_2xx.UCADDR;
    // Received character is an address
enum USCI_B0_I2C_2xx.UCALIE_t
index URL

Arbitration lost interrupt enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCALIE_t
    const USCI_B0_I2C_2xx.UCALIE_OFF;
    // Interrupt disabled
    const USCI_B0_I2C_2xx.UCALIE;
    // Interrupt enabled
enum USCI_B0_I2C_2xx.UCALIFG_t
index URL

Arbitration lost interrupt flag

Configuration settings
values of type USCI_B0_I2C_2xx.UCALIFG_t
    const USCI_B0_I2C_2xx.UCALIFG_OFF;
    // No interrupt pending
    const USCI_B0_I2C_2xx.UCALIFG;
    // Interrupt pending
enum USCI_B0_I2C_2xx.UCBBUSY_t
index URL

Bus busy

Configuration settings
values of type USCI_B0_I2C_2xx.UCBBUSY_t
    const USCI_B0_I2C_2xx.UCBBUSY_OFF;
    // Bus inactive
    const USCI_B0_I2C_2xx.UCBBUSY;
    // Bus busy
enum USCI_B0_I2C_2xx.UCBRKIE_t
index URL

Receive break character interrupt-enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCBRKIE_t
    const USCI_B0_I2C_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_B0_I2C_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_B0_I2C_2xx.UCBRK_t
index URL

Break detect flag

Configuration settings
values of type USCI_B0_I2C_2xx.UCBRK_t
    const USCI_B0_I2C_2xx.UCBRK_OFF;
    // No break condition
    const USCI_B0_I2C_2xx.UCBRK;
    // Break condition occurred
enum USCI_B0_I2C_2xx.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_B0_I2C_2xx.UCBUSY_t
    const USCI_B0_I2C_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_B0_I2C_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_B0_I2C_2xx.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_B0_I2C_2xx.UCDORM_t
    const USCI_B0_I2C_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_B0_I2C_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_B0_I2C_2xx.UCFE_t
index URL

Framing error flag

Configuration settings
values of type USCI_B0_I2C_2xx.UCFE_t
    const USCI_B0_I2C_2xx.UCFE_OFF;
    // 0 No error
    const USCI_B0_I2C_2xx.UCFE;
    // Character received with low stop bit
enum USCI_B0_I2C_2xx.UCGCEN_t
index URL

General call response enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCGCEN_t
    const USCI_B0_I2C_2xx.UCGCEN_OFF;
    // Do not respond to a general call
    const USCI_B0_I2C_2xx.UCGCEN;
    // Respond to a general call
enum USCI_B0_I2C_2xx.UCGC_t
index URL

General call address received

Configuration settings
values of type USCI_B0_I2C_2xx.UCGC_t
    const USCI_B0_I2C_2xx.UCGC_OFF;
    // No general call address received
    const USCI_B0_I2C_2xx.UCGC;
    // General call address received
enum USCI_B0_I2C_2xx.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_B0_I2C_2xx.UCIDLE_t
    const USCI_B0_I2C_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_B0_I2C_2xx.UCIDLE;
    // Idle line detected
enum USCI_B0_I2C_2xx.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_B0_I2C_2xx.UCLISTEN_t
    const USCI_B0_I2C_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_B0_I2C_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_B0_I2C_2xx.UCMM_t
index URL

Multi-master environment select

Configuration settings
values of type USCI_B0_I2C_2xx.UCMM_t
    const USCI_B0_I2C_2xx.UCMM_OFF;
    // Single master environment. There is no other master in the system. The address compare unit is disabled
    const USCI_B0_I2C_2xx.UCMM;
    // Multi master environment
enum USCI_B0_I2C_2xx.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_B0_I2C_2xx.UCMODE_SYNC_t
    const USCI_B0_I2C_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_B0_I2C_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_B0_I2C_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_B0_I2C_2xx.UCMODE_3;
    // I2C Mode
enum USCI_B0_I2C_2xx.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_B0_I2C_2xx.UCMSB_t
    const USCI_B0_I2C_2xx.UCMSB_OFF;
    // LSB first
    const USCI_B0_I2C_2xx.UCMSB;
    // MSB first
enum USCI_B0_I2C_2xx.UCMST_t
index URL

Master mode select

Configuration settings
values of type USCI_B0_I2C_2xx.UCMST_t
    const USCI_B0_I2C_2xx.UCMST_OFF;
    // Slave mode
    const USCI_B0_I2C_2xx.UCMST;
    // Master mode
enum USCI_B0_I2C_2xx.UCNACKIE_t
index URL

Not-acknowledge interrupt enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCNACKIE_t
    const USCI_B0_I2C_2xx.UCNACKIE_OFF;
    // Interrupt disabled
    const USCI_B0_I2C_2xx.UCNACKIE;
    // Interrupt enabled
enum USCI_B0_I2C_2xx.UCNACKIFG_t
index URL

Not-acknowledge received interrupt flag

Configuration settings
values of type USCI_B0_I2C_2xx.UCNACKIFG_t
    const USCI_B0_I2C_2xx.UCNACKIFG_OFF;
    // No interrupt pending
    const USCI_B0_I2C_2xx.UCNACKIFG;
    // Interrupt pending
enum USCI_B0_I2C_2xx.UCOE_t
index URL

Overrun error flag

Configuration settings
values of type USCI_B0_I2C_2xx.UCOE_t
    const USCI_B0_I2C_2xx.UCOE_OFF;
    // No error
    const USCI_B0_I2C_2xx.UCOE;
    // Overrun error occurred
enum USCI_B0_I2C_2xx.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_B0_I2C_2xx.UCPE_t
    const USCI_B0_I2C_2xx.UCPE_OFF;
    // No error
    const USCI_B0_I2C_2xx.UCPE;
    // Character received with parity error
enum USCI_B0_I2C_2xx.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCRXEIE_t
    const USCI_B0_I2C_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_B0_I2C_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_B0_I2C_2xx.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_B0_I2C_2xx.UCRXERR_t
    const USCI_B0_I2C_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_B0_I2C_2xx.UCRXERR;
    // Receive error detected
enum USCI_B0_I2C_2xx.UCSCLLOW_t
index URL

SCL low

Configuration settings
values of type USCI_B0_I2C_2xx.UCSCLLOW_t
    const USCI_B0_I2C_2xx.UCSCLLOW_OFF;
    // SCL is not held low
    const USCI_B0_I2C_2xx.UCSCLLOW;
    // SCL is held low
enum USCI_B0_I2C_2xx.UCSLA10_t
index URL

Slave addressing mode select

Configuration settings
values of type USCI_B0_I2C_2xx.UCSLA10_t
    const USCI_B0_I2C_2xx.UCSLA10_OFF;
    // Address slave with 7-bit address
    const USCI_B0_I2C_2xx.UCSLA10;
    // Address slave with 10-bit address
enum USCI_B0_I2C_2xx.UCSSEL_I2C_t
index URL

USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_B0_I2C_2xx.UCSSEL_I2C_t
    const USCI_B0_I2C_2xx.UCSSEL_0;
    // UCLK
    const USCI_B0_I2C_2xx.UCSSEL_1;
    // ACLK
    const USCI_B0_I2C_2xx.UCSSEL_2;
    // SMCLK
enum USCI_B0_I2C_2xx.UCSTPIE_t
index URL

Stop condition interrupt enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCSTPIE_t
    const USCI_B0_I2C_2xx.UCSTPIE_OFF;
    // Interrupt disabled
    const USCI_B0_I2C_2xx.UCSTPIE;
    // Interrupt enabled
enum USCI_B0_I2C_2xx.UCSTPIFG_t
index URL

Stop condition interrupt flag

Configuration settings
values of type USCI_B0_I2C_2xx.UCSTPIFG_t
    const USCI_B0_I2C_2xx.UCSTPIFG_OFF;
    // No interrupt pending
    const USCI_B0_I2C_2xx.UCSTPIFG;
    // Interrupt pending
enum USCI_B0_I2C_2xx.UCSTTIE_t
index URL

Start condition interrupt enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCSTTIE_t
    const USCI_B0_I2C_2xx.UCSTTIE_OFF;
    // Interrupt disabled
    const USCI_B0_I2C_2xx.UCSTTIE;
    // Interrupt enabled
enum USCI_B0_I2C_2xx.UCSTTIFG_t
index URL

Start condition interrupt flag

Configuration settings
values of type USCI_B0_I2C_2xx.UCSTTIFG_t
    const USCI_B0_I2C_2xx.UCSTTIFG_OFF;
    // No interrupt pending
    const USCI_B0_I2C_2xx.UCSTTIFG;
    // Interrupt pending
enum USCI_B0_I2C_2xx.UCSWRST_t
index URL

Software reset enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCSWRST_t
    const USCI_B0_I2C_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_B0_I2C_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_B0_I2C_2xx.UCSYNC_t
index URL

Synchronous mode enable

Configuration settings
values of type USCI_B0_I2C_2xx.UCSYNC_t
    const USCI_B0_I2C_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_B0_I2C_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_B0_I2C_2xx.UCTR_t
index URL

Transmitter/Receiver

Configuration settings
values of type USCI_B0_I2C_2xx.UCTR_t
    const USCI_B0_I2C_2xx.UCTR_OFF;
    // Receiver
    const USCI_B0_I2C_2xx.UCTR;
    // Transmitter
enum USCI_B0_I2C_2xx.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_B0_I2C_2xx.UCTXADDR_t
    const USCI_B0_I2C_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_B0_I2C_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_B0_I2C_2xx.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_B0_I2C_2xx.UCTXBRK_t
    const USCI_B0_I2C_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_B0_I2C_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
enum USCI_B0_I2C_2xx.UCTXNACK_t
index URL

Transmit a NACK

Configuration settings
values of type USCI_B0_I2C_2xx.UCTXNACK_t
    const USCI_B0_I2C_2xx.UCTXNACK_OFF;
    // Acknowledge normally
    const USCI_B0_I2C_2xx.UCTXNACK;
    // Generate NACK
enum USCI_B0_I2C_2xx.UCTXSTP_t
index URL

Transmit STOP condition in master mode

Configuration settings
values of type USCI_B0_I2C_2xx.UCTXSTP_t
    const USCI_B0_I2C_2xx.UCTXSTP_OFF;
    // No STOP generated
    const USCI_B0_I2C_2xx.UCTXSTP;
    // Generate STOP
enum USCI_B0_I2C_2xx.UCTXSTT_t
index URL

Transmit START condition in master mode

Configuration settings
values of type USCI_B0_I2C_2xx.UCTXSTT_t
    const USCI_B0_I2C_2xx.UCTXSTT_OFF;
    // Do not generate START condition
    const USCI_B0_I2C_2xx.UCTXSTT;
    // Generate START condition
struct USCI_B0_I2C_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USCI_B0_I2C_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_B0_I2C_2xx.UCBxI2CIE_t
index URL

USCI_Bx I2C Interrupt Enable Register

Configuration settings
var obj = new USCI_B0_I2C_2xx.UCBxI2CIE_t;
    obj.UCNACKIE = USCI_B0_I2C_2xx.UCNACKIE_t ...
    // Not-acknowledge interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCSTPIE = USCI_B0_I2C_2xx.UCSTPIE_t ...
    // Stop condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCSTTIE = USCI_B0_I2C_2xx.UCSTTIE_t ...
    // Start condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCALIE = USCI_B0_I2C_2xx.UCALIE_t ...
    // Arbitration lost interrupt enable 0 Interrupt disabled 1 Interrupt enabled
struct USCI_B0_I2C_2xx.UCBxI2COA_t
index URL
Configuration settings
var obj = new USCI_B0_I2C_2xx.UCBxI2COA_t;
    obj.UCGCEN = IUSCI_I2C.UCGCEN_t ...
    // General call response enable 0 Do not respond to a general call 1 Respond to a general call
    obj.I2COA = Bits16 ...
    // I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB
struct USCI_B0_I2C_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_B0_I2C_2xx.UCxCTL0_t;
    obj.UCA10 = IUSCI_I2C.UCA10_t ...
    // Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address
    obj.UCSLA10 = IUSCI_I2C.UCSLA10_t ...
    // Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address
    obj.UCMM = IUSCI_I2C.UCMM_t ...
    // Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment
    obj.UCMST = IUSCI_I2C.UCMST_t ...
    // Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode
    obj.UCMODE = IUSCI_I2C.UCMODE_SYNC_t ...
    // USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode
    obj.UCSYNC = IUSCI_I2C.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode
struct USCI_B0_I2C_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_B0_I2C_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_I2C.UCSSEL_I2C_t ...
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCTR = IUSCI_I2C.UCTR_t ...
    // Transmitter/Receiver 0 Receiver 1 Transmitter
    obj.UCTXNACK = IUSCI_I2C.UCTXNACK_t ...
    // Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK
    obj.UCTXSTP = IUSCI_I2C.UCTXSTP_t ...
    // Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP
    obj.UCTXSTT = IUSCI_I2C.UCTXSTT_t ...
    // Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition
    obj.UCSWRST = IUSCI_I2C.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_B0_I2C_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_B0_I2C_2xx.UCxSTAT_t;
    obj.UCSCLLOW = IUSCI_I2C.UCSCLLOW_t ...
    // SCL low 0 SCL is not held low 1 SCL is held low
    obj.UCGC = IUSCI_I2C.UCGC_t ...
    // General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received
    obj.UCBBUSY = IUSCI_I2C.UCBBUSY_t ...
    // Bus busy 0 Bus inactive 1 Bus busy
    obj.UCNACKIFG = IUSCI_I2C.UCNACKIFG_t ...
    // Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
    obj.UCSTPIFG = IUSCI_I2C.UCSTPIFG_t ...
    // Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
    obj.UCSTTIFG = IUSCI_I2C.UCSTTIFG_t ...
    // Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending
    obj.UCALIFG = IUSCI_I2C.UCALIFG_t ...
    // Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending
struct USCI_B0_I2C_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_B0_I2C_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_B0_I2C_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_B0_I2C_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_B0_I2C_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_B0_I2C_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
// Instance config-params object
    params.UCB0BR0 = Bits8 0;
    // Bit Rate Control Register 0
    params.UCB0BR1 = Bits8 0;
    // Bit Rate Control Register 1
    params.UCB0CTL0 = IUSCI_B0_I2C.UCxCTL0_t {
    // Control Register 0
        UCA10: IUSCI_I2C.UCA10_OFF,
        UCSLA10: IUSCI_I2C.UCSLA10_OFF,
        UCMM: IUSCI_I2C.UCMM_OFF,
        UCMST: IUSCI_I2C.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    params.UCB0CTL1 = IUSCI_B0_I2C.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_I2C.UCSSEL_0,
        UCTR: IUSCI_I2C.UCTR_OFF,
        UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
        UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
        UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCB0I2CIE = USCI_B0_I2C_2xx.UCBxI2CIE_t {
    // USCI_Bx I2C Interrupt Enable Register
        UCNACKIE: USCI_B0_I2C_2xx.UCNACKIE_OFF,
        UCSTPIE: USCI_B0_I2C_2xx.UCSTPIE_OFF,
        UCSTTIE: USCI_B0_I2C_2xx.UCSTTIE_OFF,
        UCALIE: USCI_B0_I2C_2xx.UCALIE_OFF
    };
    params.UCB0I2COA = IUSCI_B0_I2C.UCBxI2COA_t {
    // I2C Own Address Register
        UCGCEN: IUSCI_I2C.UCGCEN_OFF,
        I2COA: 0
    };
    params.UCB0I2CSA = Bits8 0;
    // I2C Slave Address Register
    params.UCB0RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCB0STAT = IUSCI_B0_I2C.UCxSTAT_t {
    // Status Register
        UCSCLLOW: IUSCI_I2C.UCSCLLOW,
        UCGC: IUSCI_I2C.UCGC,
        UCBBUSY: IUSCI_I2C.UCBBUSY,
        UCNACKIFG: IUSCI_I2C.UCNACKIFG,
        UCSTPIFG: IUSCI_I2C.UCSTPIFG,
        UCSTTIFG: IUSCI_I2C.UCSTTIFG,
        UCALIFG: IUSCI_I2C.UCALIFG
    };
    params.UCB0TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_B0_I2C_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCB0CTL0",
            regForceSet: false
        },
        {
            register: "UCB0CTL1",
            regForceSet: false
        },
        {
            register: "UCB0BR0",
            regForceSet: false
        },
        {
            register: "UCB0BR1",
            regForceSet: false
        },
        {
            register: "UCB0STAT",
            regForceSet: false
        },
        {
            register: "UCB0RXBUF",
            regForceSet: false
        },
        {
            register: "UCB0TXBUF",
            regForceSet: false
        },
        {
            register: "UCB0I2COA",
            regForceSet: false
        },
        {
            register: "UCB0I2CSA",
            regForceSet: false
        },
        {
            register: "UCB0I2CIE",
            regForceSet: false
        }
    ];
    params.interruptSource = USCI_B0_I2C_2xx.regIntVect_t[4] undefined;
    // USCI_B0 I2C interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_B0_I2C_2xx.Params.UCB0BR0 // instance
index URL

Bit Rate Control Register 0

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0BR0 = Bits8 0;
config USCI_B0_I2C_2xx.Params.UCB0BR1 // instance
index URL

Bit Rate Control Register 1

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0BR1 = Bits8 0;
config USCI_B0_I2C_2xx.Params.UCB0CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0CTL0 = IUSCI_B0_I2C.UCxCTL0_t {
    UCA10: IUSCI_I2C.UCA10_OFF,
    UCSLA10: IUSCI_I2C.UCSLA10_OFF,
    UCMM: IUSCI_I2C.UCMM_OFF,
    UCMST: IUSCI_I2C.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config USCI_B0_I2C_2xx.Params.UCB0CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0CTL1 = IUSCI_B0_I2C.UCxCTL1_t {
    UCSSEL: IUSCI_I2C.UCSSEL_0,
    UCTR: IUSCI_I2C.UCTR_OFF,
    UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
    UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
    UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_B0_I2C_2xx.Params.UCB0I2CIE // instance
index URL

USCI_Bx I2C Interrupt Enable Register

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0I2CIE = USCI_B0_I2C_2xx.UCBxI2CIE_t {
    UCNACKIE: USCI_B0_I2C_2xx.UCNACKIE_OFF,
    UCSTPIE: USCI_B0_I2C_2xx.UCSTPIE_OFF,
    UCSTTIE: USCI_B0_I2C_2xx.UCSTTIE_OFF,
    UCALIE: USCI_B0_I2C_2xx.UCALIE_OFF
};
config USCI_B0_I2C_2xx.Params.UCB0I2COA // instance
index URL

I2C Own Address Register

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0I2COA = IUSCI_B0_I2C.UCBxI2COA_t {
    UCGCEN: IUSCI_I2C.UCGCEN_OFF,
    I2COA: 0
};
config USCI_B0_I2C_2xx.Params.UCB0I2CSA // instance
index URL

I2C Slave Address Register

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0I2CSA = Bits8 0;
config USCI_B0_I2C_2xx.Params.UCB0RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0RXBUF = Bits8 0;
config USCI_B0_I2C_2xx.Params.UCB0STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0STAT = IUSCI_B0_I2C.UCxSTAT_t {
    UCSCLLOW: IUSCI_I2C.UCSCLLOW,
    UCGC: IUSCI_I2C.UCGC,
    UCBBUSY: IUSCI_I2C.UCBBUSY,
    UCNACKIFG: IUSCI_I2C.UCNACKIFG,
    UCSTPIFG: IUSCI_I2C.UCSTPIFG,
    UCSTTIFG: IUSCI_I2C.UCSTTIFG,
    UCALIFG: IUSCI_I2C.UCALIFG
};
config USCI_B0_I2C_2xx.Params.UCB0TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCB0TXBUF = Bits8 0;
config USCI_B0_I2C_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_B0_I2C_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_B0_I2C_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCB0CTL0",
        regForceSet: false
    },
    {
        register: "UCB0CTL1",
        regForceSet: false
    },
    {
        register: "UCB0BR0",
        regForceSet: false
    },
    {
        register: "UCB0BR1",
        regForceSet: false
    },
    {
        register: "UCB0STAT",
        regForceSet: false
    },
    {
        register: "UCB0RXBUF",
        regForceSet: false
    },
    {
        register: "UCB0TXBUF",
        regForceSet: false
    },
    {
        register: "UCB0I2COA",
        regForceSet: false
    },
    {
        register: "UCB0I2CSA",
        regForceSet: false
    },
    {
        register: "UCB0I2CIE",
        regForceSet: false
    }
];
config USCI_B0_I2C_2xx.Params.interruptSource // instance
index URL

USCI_B0 I2C interrupt enables

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.interruptSource = USCI_B0_I2C_2xx.regIntVect_t[4] undefined;
config USCI_B0_I2C_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_B0_I2C_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_B0_I2C_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_B0_I2C_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_B0_I2C_2xx.getUCALIE() // instance
index URL

Gets UCALIE bit

Configuration settings
inst.getUCALIE() returns Bool
SEE
getUCALIE
USCI_B0_I2C_2xx.getUCBxI2CSA() // instance
index URL

Returns UCBxI2CSA register value based on which module

Configuration settings
inst.getUCBxI2CSA() returns Bits8
SEE
getUCBxI2CSA
USCI_B0_I2C_2xx.getUCNACKIE() // instance
index URL

Gets UCNACKIE bit

Configuration settings
inst.getUCNACKIE() returns Bool
SEE
getUCNACKIE
USCI_B0_I2C_2xx.getUCSTPIE() // instance
index URL

Gets UCSTPIE bit

Configuration settings
inst.getUCSTPIE() returns Bool
SEE
getUCSTPIE
USCI_B0_I2C_2xx.getUCSTTIE() // instance
index URL

Gets UCSTTIE bit

Configuration settings
inst.getUCSTTIE() returns Bool
SEE
getUCSTTIE
USCI_B0_I2C_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_B0_I2C_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_B0_I2C_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_B0_I2C_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_B0_I2C_2xx.setUCALIE() // instance
index URL

Sets UCALIE bit

Configuration settings
inst.setUCALIE(Bool set) returns Bool
SEE
setUCALIE
USCI_B0_I2C_2xx.setUCBxI2CSA() // instance
index URL

Sets UCxxI2CSA register value based on which module

Configuration settings
inst.setUCBxI2CSA(Bits8 value) returns Void
SEE
setUCBxI2CSA
USCI_B0_I2C_2xx.setUCNACKIE() // instance
index URL

Sets UCNACKIE bit

Configuration settings
inst.setUCNACKIE(Bool set) returns Bool
SEE
setUCNACKIE
USCI_B0_I2C_2xx.setUCSTPIE() // instance
index URL

Sets UCSTPIE bit

Configuration settings
inst.setUCSTPIE(Bool set) returns Bool
SEE
setUCSTPIE
USCI_B0_I2C_2xx.setUCSTTIE() // instance
index URL

Sets UCSTTIE bit

Configuration settings
inst.setUCSTTIE(Bool set) returns Bool
SEE
setUCSTTIE
USCI_B0_I2C_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_B0_I2C_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_B0_I2C_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_B0_I2C_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:09 GMT


module ti.catalog.msp430.peripherals.communication.USCI_B0_SPI_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_B0_SPI_2xx
index URL

Universal Serial Communication Interface B0 SPI 2xx

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_B0_SPI_2xx.xdc
var USCI_B0_SPI_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_B0_SPI_2xx');
module-wide constants & types
    values of type USCI_B0_SPI_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_B0_SPI_2xx.UC7BIT_OFF// 8-bit;
        const USCI_B0_SPI_2xx.UC7BIT// 7-bit;
    values of type USCI_B0_SPI_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_B0_SPI_2xx.UCADDR_OFF// Received character is data;
        const USCI_B0_SPI_2xx.UCADDR// Received character is an address;
    values of type USCI_B0_SPI_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_B0_SPI_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_B0_SPI_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_B0_SPI_2xx.UCBRK_t// Break detect flag
        const USCI_B0_SPI_2xx.UCBRK_OFF// No break condition;
        const USCI_B0_SPI_2xx.UCBRK// Break condition occurred;
    values of type USCI_B0_SPI_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_B0_SPI_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_B0_SPI_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_B0_SPI_2xx.UCCKPH_t// Clock phase select
        const USCI_B0_SPI_2xx.UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge;
        const USCI_B0_SPI_2xx.UCCKPH// Data is captured on the first UCLK edge and changed on the following edge;
    values of type USCI_B0_SPI_2xx.UCCKPL_t// Clock polarity select
        const USCI_B0_SPI_2xx.UCCKPL_OFF// Inactive state is low;
        const USCI_B0_SPI_2xx.UCCKPL// Inactive state is high;
    values of type USCI_B0_SPI_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_B0_SPI_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_B0_SPI_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_B0_SPI_2xx.UCFE_t// Framing error flag
        const USCI_B0_SPI_2xx.UCFE_OFF// 0 No error;
        const USCI_B0_SPI_2xx.UCFE// Character received with low stop bit;
    values of type USCI_B0_SPI_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_B0_SPI_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_B0_SPI_2xx.UCIDLE// Idle line detected;
    values of type USCI_B0_SPI_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_B0_SPI_2xx.UCLISTEN_OFF// Disabled;
        const USCI_B0_SPI_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_B0_SPI_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_B0_SPI_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_B0_SPI_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_B0_SPI_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_B0_SPI_2xx.UCMODE_3// I2C Mode;
    values of type USCI_B0_SPI_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_B0_SPI_2xx.UCMSB_OFF// LSB first;
        const USCI_B0_SPI_2xx.UCMSB// MSB first;
    values of type USCI_B0_SPI_2xx.UCMST_t// Master mode select
        const USCI_B0_SPI_2xx.UCMST_OFF// Slave mode;
        const USCI_B0_SPI_2xx.UCMST// Master mode;
    values of type USCI_B0_SPI_2xx.UCOE_t// Overrun error flag
        const USCI_B0_SPI_2xx.UCOE_OFF// No error;
        const USCI_B0_SPI_2xx.UCOE// Overrun error occurred;
    values of type USCI_B0_SPI_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_B0_SPI_2xx.UCPE_OFF// No error;
        const USCI_B0_SPI_2xx.UCPE// Character received with parity error;
    values of type USCI_B0_SPI_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_B0_SPI_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_B0_SPI_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_B0_SPI_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_B0_SPI_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_B0_SPI_2xx.UCRXERR// Receive error detected;
    values of type USCI_B0_SPI_2xx.UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_B0_SPI_2xx.UCSSEL_0// NA;
        const USCI_B0_SPI_2xx.UCSSEL_1// ACLK;
        const USCI_B0_SPI_2xx.UCSSEL_2// SMCLK;
    values of type USCI_B0_SPI_2xx.UCSWRST_t// Software reset enable
        const USCI_B0_SPI_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_B0_SPI_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_B0_SPI_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_B0_SPI_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_B0_SPI_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_B0_SPI_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_B0_SPI_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_B0_SPI_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_B0_SPI_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_B0_SPI_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_B0_SPI_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    var obj = new USCI_B0_SPI_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_B0_SPI_2xx.UCxCTL0_t// ;
        obj.UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge = IUSCI_SPI.UCCKPH_t ...
        obj.UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high = IUSCI_SPI.UCCKPL_t ...
        obj.UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first = IUSCI_SPI.UCMSB_t ...
        obj.UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data = IUSCI_SPI.UC7BIT_t ...
        obj.UCMST// Master mode select 0 Slave mode 1 Master mode = IUSCI_SPI.UCMST_t ...
        obj.UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode = IUSCI_SPI.UCMODE_SYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode = IUSCI_SPI.UCSYNC_t ...
    var obj = new USCI_B0_SPI_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_SPI.UCSSEL_SPI_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_SPI.UCSWRST_t ...
    var obj = new USCI_B0_SPI_2xx.UCxSTAT_t// ;
        obj.UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver = IUSCI_SPI.UCLISTEN_t ...
        obj.UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred = IUSCI_SPI.UCFE_t ...
        obj.UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred = IUSCI_SPI.UCOE_t ...
        obj.UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving = IUSCI_SPI.UCBUSY_t ...
    var obj = new USCI_B0_SPI_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_B0_SPI_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_B0_SPI_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_B0_SPI_2xx.Params// Instance config-params object;
        params.UCB0BR0// Bit Rate Control Register 0 = Bits8 0;
        params.UCB0BR1// Bit Rate Control Register 1 = Bits8 0;
        params.UCB0CTL0// Control Register 0 = IUSCI_B0_SPI.UCxCTL0_t {
            UCCKPH: IUSCI_SPI.UCCKPH_OFF,
            UCCKPL: IUSCI_SPI.UCCKPL_OFF,
            UCMSB: IUSCI.UCMSB_OFF,
            UC7BIT: IUSCI.UC7BIT_OFF,
            UCMST: IUSCI_SPI.UCMST_OFF,
            UCMODE: IUSCI.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC
        };
        params.UCB0CTL1// Control Register 1 = IUSCI_B0_SPI.UCxCTL1_t {
            UCSSEL: IUSCI_SPI.UCSSEL_0,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCB0RXBUF// Receive Buffer Register = Bits8 0;
        params.UCB0STAT// Status Register = IUSCI_B0_SPI.UCxSTAT_t {
            UCLISTEN: IUSCI.UCLISTEN_OFF,
            UCFE: IUSCI.UCFE_OFF,
            UCOE: IUSCI.UCOE_OFF,
            UCBUSY: IUSCI.UCBUSY
        };
        params.UCB0TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_B0_SPI_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCB0CTL0",
                regForceSet: false
            },
            {
                register: "UCB0CTL1",
                regForceSet: false
            },
            {
                register: "UCB0BR0",
                regForceSet: false
            },
            {
                register: "UCB0BR1",
                regForceSet: false
            },
            {
                register: "UCB0STAT",
                regForceSet: false
            },
            {
                register: "UCB0RXBUF",
                regForceSet: false
            },
            {
                register: "UCB0TXBUF",
                regForceSet: false
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_B0_SPI_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_B0_SPI_2xx.UC7BIT_t
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Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_B0_SPI_2xx.UC7BIT_t
    const USCI_B0_SPI_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_B0_SPI_2xx.UC7BIT;
    // 7-bit
enum USCI_B0_SPI_2xx.UCADDR_t
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Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_B0_SPI_2xx.UCADDR_t
    const USCI_B0_SPI_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_B0_SPI_2xx.UCADDR;
    // Received character is an address
enum USCI_B0_SPI_2xx.UCBRKIE_t
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Receive break character interrupt-enable

Configuration settings
values of type USCI_B0_SPI_2xx.UCBRKIE_t
    const USCI_B0_SPI_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_B0_SPI_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_B0_SPI_2xx.UCBRK_t
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Break detect flag

Configuration settings
values of type USCI_B0_SPI_2xx.UCBRK_t
    const USCI_B0_SPI_2xx.UCBRK_OFF;
    // No break condition
    const USCI_B0_SPI_2xx.UCBRK;
    // Break condition occurred
enum USCI_B0_SPI_2xx.UCBUSY_t
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USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_B0_SPI_2xx.UCBUSY_t
    const USCI_B0_SPI_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_B0_SPI_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_B0_SPI_2xx.UCCKPH_t
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Clock phase select

Configuration settings
values of type USCI_B0_SPI_2xx.UCCKPH_t
    const USCI_B0_SPI_2xx.UCCKPH_OFF;
    // Data is changed on the first UCLK edge and captured on the following edge
    const USCI_B0_SPI_2xx.UCCKPH;
    // Data is captured on the first UCLK edge and changed on the following edge
enum USCI_B0_SPI_2xx.UCCKPL_t
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Clock polarity select

Configuration settings
values of type USCI_B0_SPI_2xx.UCCKPL_t
    const USCI_B0_SPI_2xx.UCCKPL_OFF;
    // Inactive state is low
    const USCI_B0_SPI_2xx.UCCKPL;
    // Inactive state is high
enum USCI_B0_SPI_2xx.UCDORM_t
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Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_B0_SPI_2xx.UCDORM_t
    const USCI_B0_SPI_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_B0_SPI_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_B0_SPI_2xx.UCFE_t
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Framing error flag

Configuration settings
values of type USCI_B0_SPI_2xx.UCFE_t
    const USCI_B0_SPI_2xx.UCFE_OFF;
    // 0 No error
    const USCI_B0_SPI_2xx.UCFE;
    // Character received with low stop bit
enum USCI_B0_SPI_2xx.UCIDLE_t
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Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_B0_SPI_2xx.UCIDLE_t
    const USCI_B0_SPI_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_B0_SPI_2xx.UCIDLE;
    // Idle line detected
enum USCI_B0_SPI_2xx.UCLISTEN_t
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Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_B0_SPI_2xx.UCLISTEN_t
    const USCI_B0_SPI_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_B0_SPI_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_B0_SPI_2xx.UCMODE_SYNC_t
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USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_B0_SPI_2xx.UCMODE_SYNC_t
    const USCI_B0_SPI_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_B0_SPI_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_B0_SPI_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_B0_SPI_2xx.UCMODE_3;
    // I2C Mode
enum USCI_B0_SPI_2xx.UCMSB_t
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MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_B0_SPI_2xx.UCMSB_t
    const USCI_B0_SPI_2xx.UCMSB_OFF;
    // LSB first
    const USCI_B0_SPI_2xx.UCMSB;
    // MSB first
enum USCI_B0_SPI_2xx.UCMST_t
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Master mode select

Configuration settings
values of type USCI_B0_SPI_2xx.UCMST_t
    const USCI_B0_SPI_2xx.UCMST_OFF;
    // Slave mode
    const USCI_B0_SPI_2xx.UCMST;
    // Master mode
enum USCI_B0_SPI_2xx.UCOE_t
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Overrun error flag

Configuration settings
values of type USCI_B0_SPI_2xx.UCOE_t
    const USCI_B0_SPI_2xx.UCOE_OFF;
    // No error
    const USCI_B0_SPI_2xx.UCOE;
    // Overrun error occurred
enum USCI_B0_SPI_2xx.UCPE_t
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Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_B0_SPI_2xx.UCPE_t
    const USCI_B0_SPI_2xx.UCPE_OFF;
    // No error
    const USCI_B0_SPI_2xx.UCPE;
    // Character received with parity error
enum USCI_B0_SPI_2xx.UCRXEIE_t
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Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_B0_SPI_2xx.UCRXEIE_t
    const USCI_B0_SPI_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_B0_SPI_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_B0_SPI_2xx.UCRXERR_t
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Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_B0_SPI_2xx.UCRXERR_t
    const USCI_B0_SPI_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_B0_SPI_2xx.UCRXERR;
    // Receive error detected
enum USCI_B0_SPI_2xx.UCSSEL_SPI_t
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USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_B0_SPI_2xx.UCSSEL_SPI_t
    const USCI_B0_SPI_2xx.UCSSEL_0;
    // NA
    const USCI_B0_SPI_2xx.UCSSEL_1;
    // ACLK
    const USCI_B0_SPI_2xx.UCSSEL_2;
    // SMCLK
enum USCI_B0_SPI_2xx.UCSWRST_t
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Software reset enable

Configuration settings
values of type USCI_B0_SPI_2xx.UCSWRST_t
    const USCI_B0_SPI_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_B0_SPI_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_B0_SPI_2xx.UCSYNC_t
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Synchronous mode enable

Configuration settings
values of type USCI_B0_SPI_2xx.UCSYNC_t
    const USCI_B0_SPI_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_B0_SPI_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_B0_SPI_2xx.UCTXADDR_t
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Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_B0_SPI_2xx.UCTXADDR_t
    const USCI_B0_SPI_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_B0_SPI_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_B0_SPI_2xx.UCTXBRK_t
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Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_B0_SPI_2xx.UCTXBRK_t
    const USCI_B0_SPI_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_B0_SPI_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
struct USCI_B0_SPI_2xx.ForceSetDefaultRegister_t
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Force Set Default Register

Configuration settings
var obj = new USCI_B0_SPI_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_B0_SPI_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_B0_SPI_2xx.UCxCTL0_t;
    obj.UCCKPH = IUSCI_SPI.UCCKPH_t ...
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
    obj.UCCKPL = IUSCI_SPI.UCCKPL_t ...
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
    obj.UCMSB = IUSCI_SPI.UCMSB_t ...
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
    obj.UC7BIT = IUSCI_SPI.UC7BIT_t ...
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
    obj.UCMST = IUSCI_SPI.UCMST_t ...
    // Master mode select 0 Slave mode 1 Master mode
    obj.UCMODE = IUSCI_SPI.UCMODE_SYNC_t ...
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
    obj.UCSYNC = IUSCI_SPI.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
struct USCI_B0_SPI_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_B0_SPI_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_SPI.UCSSEL_SPI_t ...
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCSWRST = IUSCI_SPI.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_B0_SPI_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_B0_SPI_2xx.UCxSTAT_t;
    obj.UCLISTEN = IUSCI_SPI.UCLISTEN_t ...
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
    obj.UCFE = IUSCI_SPI.UCFE_t ...
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
    obj.UCOE = IUSCI_SPI.UCOE_t ...
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
    obj.UCBUSY = IUSCI_SPI.UCBUSY_t ...
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
struct USCI_B0_SPI_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_B0_SPI_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_B0_SPI_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_B0_SPI_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_B0_SPI_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_B0_SPI_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
// Instance config-params object
    params.UCB0BR0 = Bits8 0;
    // Bit Rate Control Register 0
    params.UCB0BR1 = Bits8 0;
    // Bit Rate Control Register 1
    params.UCB0CTL0 = IUSCI_B0_SPI.UCxCTL0_t {
    // Control Register 0
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    params.UCB0CTL1 = IUSCI_B0_SPI.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCB0RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCB0STAT = IUSCI_B0_SPI.UCxSTAT_t {
    // Status Register
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    params.UCB0TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_B0_SPI_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCB0CTL0",
            regForceSet: false
        },
        {
            register: "UCB0CTL1",
            regForceSet: false
        },
        {
            register: "UCB0BR0",
            regForceSet: false
        },
        {
            register: "UCB0BR1",
            regForceSet: false
        },
        {
            register: "UCB0STAT",
            regForceSet: false
        },
        {
            register: "UCB0RXBUF",
            regForceSet: false
        },
        {
            register: "UCB0TXBUF",
            regForceSet: false
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_B0_SPI_2xx.Params.UCB0BR0 // instance
index URL

Bit Rate Control Register 0

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCB0BR0 = Bits8 0;
config USCI_B0_SPI_2xx.Params.UCB0BR1 // instance
index URL

Bit Rate Control Register 1

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCB0BR1 = Bits8 0;
config USCI_B0_SPI_2xx.Params.UCB0CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCB0CTL0 = IUSCI_B0_SPI.UCxCTL0_t {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config USCI_B0_SPI_2xx.Params.UCB0CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCB0CTL1 = IUSCI_B0_SPI.UCxCTL1_t {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_B0_SPI_2xx.Params.UCB0RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCB0RXBUF = Bits8 0;
config USCI_B0_SPI_2xx.Params.UCB0STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCB0STAT = IUSCI_B0_SPI.UCxSTAT_t {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config USCI_B0_SPI_2xx.Params.UCB0TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCB0TXBUF = Bits8 0;
config USCI_B0_SPI_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_B0_SPI_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_B0_SPI_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCB0CTL0",
        regForceSet: false
    },
    {
        register: "UCB0CTL1",
        regForceSet: false
    },
    {
        register: "UCB0BR0",
        regForceSet: false
    },
    {
        register: "UCB0BR1",
        regForceSet: false
    },
    {
        register: "UCB0STAT",
        regForceSet: false
    },
    {
        register: "UCB0RXBUF",
        regForceSet: false
    },
    {
        register: "UCB0TXBUF",
        regForceSet: false
    }
];
config USCI_B0_SPI_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_B0_SPI_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_B0_SPI_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_B0_SPI_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_B0_SPI_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_B0_SPI_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_B0_SPI_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_B0_SPI_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_B0_SPI_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_B0_SPI_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_B0_SPI_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_B0_SPI_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:10 GMT


module ti.catalog.msp430.peripherals.communication.USCI_B1_I2C_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_B1_I2C_2xx
index URL

Universal Serial Communication Interface B1 I2C 2xx

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_B1_I2C_2xx.xdc
var USCI_B1_I2C_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_B1_I2C_2xx');
module-wide constants & types
    values of type USCI_B1_I2C_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_B1_I2C_2xx.UC7BIT_OFF// 8-bit;
        const USCI_B1_I2C_2xx.UC7BIT// 7-bit;
    values of type USCI_B1_I2C_2xx.UCA10_t// Own addressing mode select
        const USCI_B1_I2C_2xx.UCA10_OFF// Own address is a 7-bit address;
        const USCI_B1_I2C_2xx.UCA10// Own address is a 10-bit address;
    values of type USCI_B1_I2C_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_B1_I2C_2xx.UCADDR_OFF// Received character is data;
        const USCI_B1_I2C_2xx.UCADDR// Received character is an address;
    values of type USCI_B1_I2C_2xx.UCALIE_t// Arbitration lost interrupt enable
        const USCI_B1_I2C_2xx.UCALIE_OFF// Interrupt disabled;
        const USCI_B1_I2C_2xx.UCALIE// Interrupt enabled;
    values of type USCI_B1_I2C_2xx.UCALIFG_t// Arbitration lost interrupt flag
        const USCI_B1_I2C_2xx.UCALIFG_OFF// No interrupt pending;
        const USCI_B1_I2C_2xx.UCALIFG// Interrupt pending;
    values of type USCI_B1_I2C_2xx.UCB1RXIE_t// USCI_B1 receive interrupt enable
        const USCI_B1_I2C_2xx.UCB1RXIE_OFF// Interrupt disabled;
        const USCI_B1_I2C_2xx.UCB1RXIE// Interrupt enabled;
    values of type USCI_B1_I2C_2xx.UCB1TXIE_t// USCI_B1 transmit interrupt enable
        const USCI_B1_I2C_2xx.UCB1TXIE_OFF// Interrupt disabled;
        const USCI_B1_I2C_2xx.UCB1TXIE// Interrupt enabled;
    values of type USCI_B1_I2C_2xx.UCBBUSY_t// Bus busy
        const USCI_B1_I2C_2xx.UCBBUSY_OFF// Bus inactive;
        const USCI_B1_I2C_2xx.UCBBUSY// Bus busy;
    values of type USCI_B1_I2C_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_B1_I2C_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_B1_I2C_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_B1_I2C_2xx.UCBRK_t// Break detect flag
        const USCI_B1_I2C_2xx.UCBRK_OFF// No break condition;
        const USCI_B1_I2C_2xx.UCBRK// Break condition occurred;
    values of type USCI_B1_I2C_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_B1_I2C_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_B1_I2C_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_B1_I2C_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_B1_I2C_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_B1_I2C_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_B1_I2C_2xx.UCFE_t// Framing error flag
        const USCI_B1_I2C_2xx.UCFE_OFF// 0 No error;
        const USCI_B1_I2C_2xx.UCFE// Character received with low stop bit;
    values of type USCI_B1_I2C_2xx.UCGCEN_t// General call response enable
        const USCI_B1_I2C_2xx.UCGCEN_OFF// Do not respond to a general call;
        const USCI_B1_I2C_2xx.UCGCEN// Respond to a general call;
    values of type USCI_B1_I2C_2xx.UCGC_t// General call address received
        const USCI_B1_I2C_2xx.UCGC_OFF// No general call address received;
        const USCI_B1_I2C_2xx.UCGC// General call address received;
    values of type USCI_B1_I2C_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_B1_I2C_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_B1_I2C_2xx.UCIDLE// Idle line detected;
    values of type USCI_B1_I2C_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_B1_I2C_2xx.UCLISTEN_OFF// Disabled;
        const USCI_B1_I2C_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_B1_I2C_2xx.UCMM_t// Multi-master environment select
        const USCI_B1_I2C_2xx.UCMM_OFF// Single master environment. There is no other master in the system. The address compare unit is disabled;
        const USCI_B1_I2C_2xx.UCMM// Multi master environment;
    values of type USCI_B1_I2C_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_B1_I2C_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_B1_I2C_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_B1_I2C_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_B1_I2C_2xx.UCMODE_3// I2C Mode;
    values of type USCI_B1_I2C_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_B1_I2C_2xx.UCMSB_OFF// LSB first;
        const USCI_B1_I2C_2xx.UCMSB// MSB first;
    values of type USCI_B1_I2C_2xx.UCMST_t// Master mode select
        const USCI_B1_I2C_2xx.UCMST_OFF// Slave mode;
        const USCI_B1_I2C_2xx.UCMST// Master mode;
    values of type USCI_B1_I2C_2xx.UCNACKIE_t// Not-acknowledge interrupt enable
        const USCI_B1_I2C_2xx.UCNACKIE_OFF// Interrupt disabled;
        const USCI_B1_I2C_2xx.UCNACKIE// Interrupt enabled;
    values of type USCI_B1_I2C_2xx.UCNACKIFG_t// Not-acknowledge received interrupt flag
        const USCI_B1_I2C_2xx.UCNACKIFG_OFF// No interrupt pending;
        const USCI_B1_I2C_2xx.UCNACKIFG// Interrupt pending;
    values of type USCI_B1_I2C_2xx.UCOE_t// Overrun error flag
        const USCI_B1_I2C_2xx.UCOE_OFF// No error;
        const USCI_B1_I2C_2xx.UCOE// Overrun error occurred;
    values of type USCI_B1_I2C_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_B1_I2C_2xx.UCPE_OFF// No error;
        const USCI_B1_I2C_2xx.UCPE// Character received with parity error;
    values of type USCI_B1_I2C_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_B1_I2C_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_B1_I2C_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_B1_I2C_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_B1_I2C_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_B1_I2C_2xx.UCRXERR// Receive error detected;
    values of type USCI_B1_I2C_2xx.UCSCLLOW_t// SCL low
        const USCI_B1_I2C_2xx.UCSCLLOW_OFF// SCL is not held low;
        const USCI_B1_I2C_2xx.UCSCLLOW// SCL is held low;
    values of type USCI_B1_I2C_2xx.UCSLA10_t// Slave addressing mode select
        const USCI_B1_I2C_2xx.UCSLA10_OFF// Address slave with 7-bit address;
        const USCI_B1_I2C_2xx.UCSLA10// Address slave with 10-bit address;
    values of type USCI_B1_I2C_2xx.UCSSEL_I2C_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_B1_I2C_2xx.UCSSEL_0// UCLK;
        const USCI_B1_I2C_2xx.UCSSEL_1// ACLK;
        const USCI_B1_I2C_2xx.UCSSEL_2// SMCLK;
    values of type USCI_B1_I2C_2xx.UCSTPIE_t// Stop condition interrupt enable
        const USCI_B1_I2C_2xx.UCSTPIE_OFF// Interrupt disabled;
        const USCI_B1_I2C_2xx.UCSTPIE// Interrupt enabled;
    values of type USCI_B1_I2C_2xx.UCSTPIFG_t// Stop condition interrupt flag
        const USCI_B1_I2C_2xx.UCSTPIFG_OFF// No interrupt pending;
        const USCI_B1_I2C_2xx.UCSTPIFG// Interrupt pending;
    values of type USCI_B1_I2C_2xx.UCSTTIE_t// Start condition interrupt enable
        const USCI_B1_I2C_2xx.UCSTTIE_OFF// Interrupt disabled;
        const USCI_B1_I2C_2xx.UCSTTIE// Interrupt enabled;
    values of type USCI_B1_I2C_2xx.UCSTTIFG_t// Start condition interrupt flag
        const USCI_B1_I2C_2xx.UCSTTIFG_OFF// No interrupt pending;
        const USCI_B1_I2C_2xx.UCSTTIFG// Interrupt pending;
    values of type USCI_B1_I2C_2xx.UCSWRST_t// Software reset enable
        const USCI_B1_I2C_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_B1_I2C_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_B1_I2C_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_B1_I2C_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_B1_I2C_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_B1_I2C_2xx.UCTR_t// Transmitter/Receiver
        const USCI_B1_I2C_2xx.UCTR_OFF// Receiver;
        const USCI_B1_I2C_2xx.UCTR// Transmitter;
    values of type USCI_B1_I2C_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_B1_I2C_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_B1_I2C_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_B1_I2C_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_B1_I2C_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_B1_I2C_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    values of type USCI_B1_I2C_2xx.UCTXNACK_t// Transmit a NACK
        const USCI_B1_I2C_2xx.UCTXNACK_OFF// Acknowledge normally;
        const USCI_B1_I2C_2xx.UCTXNACK// Generate NACK;
    values of type USCI_B1_I2C_2xx.UCTXSTP_t// Transmit STOP condition in master mode
        const USCI_B1_I2C_2xx.UCTXSTP_OFF// No STOP generated;
        const USCI_B1_I2C_2xx.UCTXSTP// Generate STOP;
    values of type USCI_B1_I2C_2xx.UCTXSTT_t// Transmit START condition in master mode
        const USCI_B1_I2C_2xx.UCTXSTT_OFF// Do not generate START condition;
        const USCI_B1_I2C_2xx.UCTXSTT// Generate START condition;
    var obj = new USCI_B1_I2C_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_B1_I2C_2xx.UC1IE_t// USCI_xx SPI Interrupt Enable Register;
        obj.UCB1TXIE// USCI_B1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_I2C_2xx.UCB1TXIE_t ...
        obj.UCB1RXIE// USCI_B1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_I2C_2xx.UCB1RXIE_t ...
    var obj = new USCI_B1_I2C_2xx.UCBxI2CIE_t// USCI_Bx I2C Interrupt Enable Register;
        obj.UCNACKIE// Not-acknowledge interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_I2C_2xx.UCNACKIE_t ...
        obj.UCSTPIE// Stop condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_I2C_2xx.UCSTPIE_t ...
        obj.UCSTTIE// Start condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_I2C_2xx.UCSTTIE_t ...
        obj.UCALIE// Arbitration lost interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_I2C_2xx.UCALIE_t ...
    var obj = new USCI_B1_I2C_2xx.UCBxI2COA_t// ;
        obj.UCGCEN// General call response enable 0 Do not respond to a general call 1 Respond to a general call = IUSCI_I2C.UCGCEN_t ...
        obj.I2COA// I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB = Bits16 ...
    var obj = new USCI_B1_I2C_2xx.UCxCTL0_t// ;
        obj.UCA10// Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address = IUSCI_I2C.UCA10_t ...
        obj.UCSLA10// Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address = IUSCI_I2C.UCSLA10_t ...
        obj.UCMM// Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment = IUSCI_I2C.UCMM_t ...
        obj.UCMST// Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode = IUSCI_I2C.UCMST_t ...
        obj.UCMODE// USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode = IUSCI_I2C.UCMODE_SYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode = IUSCI_I2C.UCSYNC_t ...
    var obj = new USCI_B1_I2C_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_I2C.UCSSEL_I2C_t ...
        obj.UCTR// Transmitter/Receiver 0 Receiver 1 Transmitter = IUSCI_I2C.UCTR_t ...
        obj.UCTXNACK// Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK = IUSCI_I2C.UCTXNACK_t ...
        obj.UCTXSTP// Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP = IUSCI_I2C.UCTXSTP_t ...
        obj.UCTXSTT// Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition = IUSCI_I2C.UCTXSTT_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_I2C.UCSWRST_t ...
    var obj = new USCI_B1_I2C_2xx.UCxSTAT_t// ;
        obj.UCSCLLOW// SCL low 0 SCL is not held low 1 SCL is held low = IUSCI_I2C.UCSCLLOW_t ...
        obj.UCGC// General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received = IUSCI_I2C.UCGC_t ...
        obj.UCBBUSY// Bus busy 0 Bus inactive 1 Bus busy = IUSCI_I2C.UCBBUSY_t ...
        obj.UCNACKIFG// Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCNACKIFG_t ...
        obj.UCSTPIFG// Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCSTPIFG_t ...
        obj.UCSTTIFG// Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCSTTIFG_t ...
        obj.UCALIFG// Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending = IUSCI_I2C.UCALIFG_t ...
    var obj = new USCI_B1_I2C_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_B1_I2C_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_B1_I2C_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_B1_I2C_2xx.Params// Instance config-params object;
        params.UC1IE// USCI_B1 Interrupt Enable Register = USCI_B1_I2C_2xx.UC1IE_t {
            UCB1TXIE: USCI_B1_I2C_2xx.UCB1TXIE_OFF,
            UCB1RXIE: USCI_B1_I2C_2xx.UCB1RXIE_OFF
        };
        params.UCB1BR0// Bit Rate Control Register 0 = Bits8 0;
        params.UCB1BR1// Bit Rate Control Register 1 = Bits8 0;
        params.UCB1CTL0// Control Register 0 = IUSCI_B1_I2C.UCxCTL0_t {
            UCA10: IUSCI_I2C.UCA10_OFF,
            UCSLA10: IUSCI_I2C.UCSLA10_OFF,
            UCMM: IUSCI_I2C.UCMM_OFF,
            UCMST: IUSCI_I2C.UCMST_OFF,
            UCMODE: IUSCI.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC
        };
        params.UCB1CTL1// Control Register 1 = IUSCI_B1_I2C.UCxCTL1_t {
            UCSSEL: IUSCI_I2C.UCSSEL_0,
            UCTR: IUSCI_I2C.UCTR_OFF,
            UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
            UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
            UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCB1I2CIE// USCI_Bx I2C Interrupt Enable Register = USCI_B1_I2C_2xx.UCBxI2CIE_t {
            UCNACKIE: USCI_B1_I2C_2xx.UCNACKIE_OFF,
            UCSTPIE: USCI_B1_I2C_2xx.UCSTPIE_OFF,
            UCSTTIE: USCI_B1_I2C_2xx.UCSTTIE_OFF,
            UCALIE: USCI_B1_I2C_2xx.UCALIE_OFF
        };
        params.UCB1I2COA// I2C Own Address Register = IUSCI_B1_I2C.UCBxI2COA_t {
            UCGCEN: IUSCI_I2C.UCGCEN_OFF,
            I2COA: 0
        };
        params.UCB1I2CSA// I2C Slave Address Register = Bits8 0;
        params.UCB1RXBUF// Receive Buffer Register = Bits8 0;
        params.UCB1STAT// Status Register = IUSCI_B1_I2C.UCxSTAT_t {
            UCSCLLOW: IUSCI_I2C.UCSCLLOW,
            UCGC: IUSCI_I2C.UCGC,
            UCBBUSY: IUSCI_I2C.UCBBUSY,
            UCNACKIFG: IUSCI_I2C.UCNACKIFG,
            UCSTPIFG: IUSCI_I2C.UCSTPIFG,
            UCSTTIFG: IUSCI_I2C.UCSTTIFG,
            UCALIFG: IUSCI_I2C.UCALIFG
        };
        params.UCB1TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_B1_I2C_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCB1CTL0",
                regForceSet: false
            },
            {
                register: "UCB1CTL1",
                regForceSet: false
            },
            {
                register: "UCB1BR0",
                regForceSet: false
            },
            {
                register: "UCB1BR1",
                regForceSet: false
            },
            {
                register: "UCB1STAT",
                regForceSet: false
            },
            {
                register: "UCB1RXBUF",
                regForceSet: false
            },
            {
                register: "UCB1TXBUF",
                regForceSet: false
            },
            {
                register: "UCB1I2COA",
                regForceSet: false
            },
            {
                register: "UCB1I2CSA",
                regForceSet: false
            },
            {
                register: "UCB1I2CIE",
                regForceSet: false
            },
            {
                register: "UC1IE",
                regForceSet: false
            }
        ];
        params.interruptSource// USCI_B1 I2C interrupt enables = USCI_B1_I2C_2xx.regIntVect_t[6] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_B1_I2C_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCALIE// Gets UCALIE bit() returns Bool
     inst.getUCBxI2CSA// Returns UCBxI2CSA register value based on which module() returns Bits8
     inst.getUCNACKIE// Gets UCNACKIE bit() returns Bool
     inst.getUCSTPIE// Gets UCSTPIE bit() returns Bool
     inst.getUCSTTIE// Gets UCSTTIE bit() returns Bool
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCALIE// Sets UCALIE bit(Bool set) returns Bool
     inst.setUCBxI2CSA// Sets UCxxI2CSA register value based on which module(Bits8 value) returns Void
     inst.setUCNACKIE// Sets UCNACKIE bit(Bool set) returns Bool
     inst.setUCSTPIE// Sets UCSTPIE bit(Bool set) returns Bool
     inst.setUCSTTIE// Sets UCSTTIE bit(Bool set) returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_B1_I2C_2xx.UC7BIT_t
index URL

Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_B1_I2C_2xx.UC7BIT_t
    const USCI_B1_I2C_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_B1_I2C_2xx.UC7BIT;
    // 7-bit
enum USCI_B1_I2C_2xx.UCA10_t
index URL

Own addressing mode select

Configuration settings
values of type USCI_B1_I2C_2xx.UCA10_t
    const USCI_B1_I2C_2xx.UCA10_OFF;
    // Own address is a 7-bit address
    const USCI_B1_I2C_2xx.UCA10;
    // Own address is a 10-bit address
enum USCI_B1_I2C_2xx.UCADDR_t
index URL

Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_B1_I2C_2xx.UCADDR_t
    const USCI_B1_I2C_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_B1_I2C_2xx.UCADDR;
    // Received character is an address
enum USCI_B1_I2C_2xx.UCALIE_t
index URL

Arbitration lost interrupt enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCALIE_t
    const USCI_B1_I2C_2xx.UCALIE_OFF;
    // Interrupt disabled
    const USCI_B1_I2C_2xx.UCALIE;
    // Interrupt enabled
enum USCI_B1_I2C_2xx.UCALIFG_t
index URL

Arbitration lost interrupt flag

Configuration settings
values of type USCI_B1_I2C_2xx.UCALIFG_t
    const USCI_B1_I2C_2xx.UCALIFG_OFF;
    // No interrupt pending
    const USCI_B1_I2C_2xx.UCALIFG;
    // Interrupt pending
enum USCI_B1_I2C_2xx.UCB1RXIE_t
index URL

USCI_B1 receive interrupt enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCB1RXIE_t
    const USCI_B1_I2C_2xx.UCB1RXIE_OFF;
    // Interrupt disabled
    const USCI_B1_I2C_2xx.UCB1RXIE;
    // Interrupt enabled
enum USCI_B1_I2C_2xx.UCB1TXIE_t
index URL

USCI_B1 transmit interrupt enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCB1TXIE_t
    const USCI_B1_I2C_2xx.UCB1TXIE_OFF;
    // Interrupt disabled
    const USCI_B1_I2C_2xx.UCB1TXIE;
    // Interrupt enabled
enum USCI_B1_I2C_2xx.UCBBUSY_t
index URL

Bus busy

Configuration settings
values of type USCI_B1_I2C_2xx.UCBBUSY_t
    const USCI_B1_I2C_2xx.UCBBUSY_OFF;
    // Bus inactive
    const USCI_B1_I2C_2xx.UCBBUSY;
    // Bus busy
enum USCI_B1_I2C_2xx.UCBRKIE_t
index URL

Receive break character interrupt-enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCBRKIE_t
    const USCI_B1_I2C_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_B1_I2C_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_B1_I2C_2xx.UCBRK_t
index URL

Break detect flag

Configuration settings
values of type USCI_B1_I2C_2xx.UCBRK_t
    const USCI_B1_I2C_2xx.UCBRK_OFF;
    // No break condition
    const USCI_B1_I2C_2xx.UCBRK;
    // Break condition occurred
enum USCI_B1_I2C_2xx.UCBUSY_t
index URL

USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_B1_I2C_2xx.UCBUSY_t
    const USCI_B1_I2C_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_B1_I2C_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_B1_I2C_2xx.UCDORM_t
index URL

Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_B1_I2C_2xx.UCDORM_t
    const USCI_B1_I2C_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_B1_I2C_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_B1_I2C_2xx.UCFE_t
index URL

Framing error flag

Configuration settings
values of type USCI_B1_I2C_2xx.UCFE_t
    const USCI_B1_I2C_2xx.UCFE_OFF;
    // 0 No error
    const USCI_B1_I2C_2xx.UCFE;
    // Character received with low stop bit
enum USCI_B1_I2C_2xx.UCGCEN_t
index URL

General call response enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCGCEN_t
    const USCI_B1_I2C_2xx.UCGCEN_OFF;
    // Do not respond to a general call
    const USCI_B1_I2C_2xx.UCGCEN;
    // Respond to a general call
enum USCI_B1_I2C_2xx.UCGC_t
index URL

General call address received

Configuration settings
values of type USCI_B1_I2C_2xx.UCGC_t
    const USCI_B1_I2C_2xx.UCGC_OFF;
    // No general call address received
    const USCI_B1_I2C_2xx.UCGC;
    // General call address received
enum USCI_B1_I2C_2xx.UCIDLE_t
index URL

Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_B1_I2C_2xx.UCIDLE_t
    const USCI_B1_I2C_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_B1_I2C_2xx.UCIDLE;
    // Idle line detected
enum USCI_B1_I2C_2xx.UCLISTEN_t
index URL

Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_B1_I2C_2xx.UCLISTEN_t
    const USCI_B1_I2C_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_B1_I2C_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_B1_I2C_2xx.UCMM_t
index URL

Multi-master environment select

Configuration settings
values of type USCI_B1_I2C_2xx.UCMM_t
    const USCI_B1_I2C_2xx.UCMM_OFF;
    // Single master environment. There is no other master in the system. The address compare unit is disabled
    const USCI_B1_I2C_2xx.UCMM;
    // Multi master environment
enum USCI_B1_I2C_2xx.UCMODE_SYNC_t
index URL

USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_B1_I2C_2xx.UCMODE_SYNC_t
    const USCI_B1_I2C_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_B1_I2C_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_B1_I2C_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_B1_I2C_2xx.UCMODE_3;
    // I2C Mode
enum USCI_B1_I2C_2xx.UCMSB_t
index URL

MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_B1_I2C_2xx.UCMSB_t
    const USCI_B1_I2C_2xx.UCMSB_OFF;
    // LSB first
    const USCI_B1_I2C_2xx.UCMSB;
    // MSB first
enum USCI_B1_I2C_2xx.UCMST_t
index URL

Master mode select

Configuration settings
values of type USCI_B1_I2C_2xx.UCMST_t
    const USCI_B1_I2C_2xx.UCMST_OFF;
    // Slave mode
    const USCI_B1_I2C_2xx.UCMST;
    // Master mode
enum USCI_B1_I2C_2xx.UCNACKIE_t
index URL

Not-acknowledge interrupt enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCNACKIE_t
    const USCI_B1_I2C_2xx.UCNACKIE_OFF;
    // Interrupt disabled
    const USCI_B1_I2C_2xx.UCNACKIE;
    // Interrupt enabled
enum USCI_B1_I2C_2xx.UCNACKIFG_t
index URL

Not-acknowledge received interrupt flag

Configuration settings
values of type USCI_B1_I2C_2xx.UCNACKIFG_t
    const USCI_B1_I2C_2xx.UCNACKIFG_OFF;
    // No interrupt pending
    const USCI_B1_I2C_2xx.UCNACKIFG;
    // Interrupt pending
enum USCI_B1_I2C_2xx.UCOE_t
index URL

Overrun error flag

Configuration settings
values of type USCI_B1_I2C_2xx.UCOE_t
    const USCI_B1_I2C_2xx.UCOE_OFF;
    // No error
    const USCI_B1_I2C_2xx.UCOE;
    // Overrun error occurred
enum USCI_B1_I2C_2xx.UCPE_t
index URL

Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_B1_I2C_2xx.UCPE_t
    const USCI_B1_I2C_2xx.UCPE_OFF;
    // No error
    const USCI_B1_I2C_2xx.UCPE;
    // Character received with parity error
enum USCI_B1_I2C_2xx.UCRXEIE_t
index URL

Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCRXEIE_t
    const USCI_B1_I2C_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_B1_I2C_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_B1_I2C_2xx.UCRXERR_t
index URL

Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_B1_I2C_2xx.UCRXERR_t
    const USCI_B1_I2C_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_B1_I2C_2xx.UCRXERR;
    // Receive error detected
enum USCI_B1_I2C_2xx.UCSCLLOW_t
index URL

SCL low

Configuration settings
values of type USCI_B1_I2C_2xx.UCSCLLOW_t
    const USCI_B1_I2C_2xx.UCSCLLOW_OFF;
    // SCL is not held low
    const USCI_B1_I2C_2xx.UCSCLLOW;
    // SCL is held low
enum USCI_B1_I2C_2xx.UCSLA10_t
index URL

Slave addressing mode select

Configuration settings
values of type USCI_B1_I2C_2xx.UCSLA10_t
    const USCI_B1_I2C_2xx.UCSLA10_OFF;
    // Address slave with 7-bit address
    const USCI_B1_I2C_2xx.UCSLA10;
    // Address slave with 10-bit address
enum USCI_B1_I2C_2xx.UCSSEL_I2C_t
index URL

USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_B1_I2C_2xx.UCSSEL_I2C_t
    const USCI_B1_I2C_2xx.UCSSEL_0;
    // UCLK
    const USCI_B1_I2C_2xx.UCSSEL_1;
    // ACLK
    const USCI_B1_I2C_2xx.UCSSEL_2;
    // SMCLK
enum USCI_B1_I2C_2xx.UCSTPIE_t
index URL

Stop condition interrupt enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCSTPIE_t
    const USCI_B1_I2C_2xx.UCSTPIE_OFF;
    // Interrupt disabled
    const USCI_B1_I2C_2xx.UCSTPIE;
    // Interrupt enabled
enum USCI_B1_I2C_2xx.UCSTPIFG_t
index URL

Stop condition interrupt flag

Configuration settings
values of type USCI_B1_I2C_2xx.UCSTPIFG_t
    const USCI_B1_I2C_2xx.UCSTPIFG_OFF;
    // No interrupt pending
    const USCI_B1_I2C_2xx.UCSTPIFG;
    // Interrupt pending
enum USCI_B1_I2C_2xx.UCSTTIE_t
index URL

Start condition interrupt enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCSTTIE_t
    const USCI_B1_I2C_2xx.UCSTTIE_OFF;
    // Interrupt disabled
    const USCI_B1_I2C_2xx.UCSTTIE;
    // Interrupt enabled
enum USCI_B1_I2C_2xx.UCSTTIFG_t
index URL

Start condition interrupt flag

Configuration settings
values of type USCI_B1_I2C_2xx.UCSTTIFG_t
    const USCI_B1_I2C_2xx.UCSTTIFG_OFF;
    // No interrupt pending
    const USCI_B1_I2C_2xx.UCSTTIFG;
    // Interrupt pending
enum USCI_B1_I2C_2xx.UCSWRST_t
index URL

Software reset enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCSWRST_t
    const USCI_B1_I2C_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_B1_I2C_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_B1_I2C_2xx.UCSYNC_t
index URL

Synchronous mode enable

Configuration settings
values of type USCI_B1_I2C_2xx.UCSYNC_t
    const USCI_B1_I2C_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_B1_I2C_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_B1_I2C_2xx.UCTR_t
index URL

Transmitter/Receiver

Configuration settings
values of type USCI_B1_I2C_2xx.UCTR_t
    const USCI_B1_I2C_2xx.UCTR_OFF;
    // Receiver
    const USCI_B1_I2C_2xx.UCTR;
    // Transmitter
enum USCI_B1_I2C_2xx.UCTXADDR_t
index URL

Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_B1_I2C_2xx.UCTXADDR_t
    const USCI_B1_I2C_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_B1_I2C_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_B1_I2C_2xx.UCTXBRK_t
index URL

Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_B1_I2C_2xx.UCTXBRK_t
    const USCI_B1_I2C_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_B1_I2C_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
enum USCI_B1_I2C_2xx.UCTXNACK_t
index URL

Transmit a NACK

Configuration settings
values of type USCI_B1_I2C_2xx.UCTXNACK_t
    const USCI_B1_I2C_2xx.UCTXNACK_OFF;
    // Acknowledge normally
    const USCI_B1_I2C_2xx.UCTXNACK;
    // Generate NACK
enum USCI_B1_I2C_2xx.UCTXSTP_t
index URL

Transmit STOP condition in master mode

Configuration settings
values of type USCI_B1_I2C_2xx.UCTXSTP_t
    const USCI_B1_I2C_2xx.UCTXSTP_OFF;
    // No STOP generated
    const USCI_B1_I2C_2xx.UCTXSTP;
    // Generate STOP
enum USCI_B1_I2C_2xx.UCTXSTT_t
index URL

Transmit START condition in master mode

Configuration settings
values of type USCI_B1_I2C_2xx.UCTXSTT_t
    const USCI_B1_I2C_2xx.UCTXSTT_OFF;
    // Do not generate START condition
    const USCI_B1_I2C_2xx.UCTXSTT;
    // Generate START condition
struct USCI_B1_I2C_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USCI_B1_I2C_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_B1_I2C_2xx.UC1IE_t
index URL

USCI_xx SPI Interrupt Enable Register

Configuration settings
var obj = new USCI_B1_I2C_2xx.UC1IE_t;
    obj.UCB1TXIE = USCI_B1_I2C_2xx.UCB1TXIE_t ...
    // USCI_B1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCB1RXIE = USCI_B1_I2C_2xx.UCB1RXIE_t ...
    // USCI_B1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled
struct USCI_B1_I2C_2xx.UCBxI2CIE_t
index URL

USCI_Bx I2C Interrupt Enable Register

Configuration settings
var obj = new USCI_B1_I2C_2xx.UCBxI2CIE_t;
    obj.UCNACKIE = USCI_B1_I2C_2xx.UCNACKIE_t ...
    // Not-acknowledge interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCSTPIE = USCI_B1_I2C_2xx.UCSTPIE_t ...
    // Stop condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCSTTIE = USCI_B1_I2C_2xx.UCSTTIE_t ...
    // Start condition interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCALIE = USCI_B1_I2C_2xx.UCALIE_t ...
    // Arbitration lost interrupt enable 0 Interrupt disabled 1 Interrupt enabled
struct USCI_B1_I2C_2xx.UCBxI2COA_t
index URL
Configuration settings
var obj = new USCI_B1_I2C_2xx.UCBxI2COA_t;
    obj.UCGCEN = IUSCI_I2C.UCGCEN_t ...
    // General call response enable 0 Do not respond to a general call 1 Respond to a general call
    obj.I2COA = Bits16 ...
    // I2C own address. The I2COAx bits contain the local address of the USCI_Bx I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB
struct USCI_B1_I2C_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_B1_I2C_2xx.UCxCTL0_t;
    obj.UCA10 = IUSCI_I2C.UCA10_t ...
    // Own addressing mode select 0 Own address is a 7-bit address 1 Own address is a 10-bit address
    obj.UCSLA10 = IUSCI_I2C.UCSLA10_t ...
    // Slave addressing mode select 0 Address slave with 7-bit address 1 Address slave with 10-bit address
    obj.UCMM = IUSCI_I2C.UCMM_t ...
    // Multi-master environment select 0 Single master environment. There is no other master in the system. The address compare unit is disabled. 1 Multi master environment
    obj.UCMST = IUSCI_I2C.UCMST_t ...
    // Master mode select. When a master looses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave. 0 Slave mode 1 Master mode
    obj.UCMODE = IUSCI_I2C.UCMODE_SYNC_t ...
    // USCI Mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-pin SPI 01 4-pin SPI (master/slave enabled if STE = 1) 10 4-pin SPI (master/slave enabled if STE = 0) 11 I2C mode
    obj.UCSYNC = IUSCI_I2C.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous mode
struct USCI_B1_I2C_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_B1_I2C_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_I2C.UCSSEL_I2C_t ...
    // USCI clock source select. These bits select the BRCLK source clock. 00 UCLKI 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCTR = IUSCI_I2C.UCTR_t ...
    // Transmitter/Receiver 0 Receiver 1 Transmitter
    obj.UCTXNACK = IUSCI_I2C.UCTXNACK_t ...
    // Transmit a NACK. UCTXNACK is automatically cleared after a NACK is transmitted. 0 Acknowledge normally 1 Generate NACK
    obj.UCTXSTP = IUSCI_I2C.UCTXSTP_t ...
    // Transmit STOP condition in master mode. Ignored in slave mode. In master receiver mode the STOP condition is preceded by a NACK. UCTXSTP is automatically cleared after STOP is generated. 0 No STOP generated 1 Generate STOP
    obj.UCTXSTT = IUSCI_I2C.UCTXSTT_t ...
    // Transmit START condition in master mode. Ignored in slave mode. In master receiver mode a repeated START condition is preceded by a NACK. UCTXSTT is automatically cleared after START condition and address information is transmitted. Ignored in slave mode. 0 Do not generate START condition 1 Generate START condition
    obj.UCSWRST = IUSCI_I2C.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_B1_I2C_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_B1_I2C_2xx.UCxSTAT_t;
    obj.UCSCLLOW = IUSCI_I2C.UCSCLLOW_t ...
    // SCL low 0 SCL is not held low 1 SCL is held low
    obj.UCGC = IUSCI_I2C.UCGC_t ...
    // General call address received. UCGC is automatically cleared when a START condition is received. 0 No general call address received 1 General call address received
    obj.UCBBUSY = IUSCI_I2C.UCBBUSY_t ...
    // Bus busy 0 Bus inactive 1 Bus busy
    obj.UCNACKIFG = IUSCI_I2C.UCNACKIFG_t ...
    // Not-acknowledge received interrupt flag. UCNACKIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
    obj.UCSTPIFG = IUSCI_I2C.UCSTPIFG_t ...
    // Stop condition interrupt flag. UCSTPIFG is automatically cleared when a START condition is received. 0 No interrupt pending 1 Interrupt pending
    obj.UCSTTIFG = IUSCI_I2C.UCSTTIFG_t ...
    // Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP condition is received. 0 No interrupt pending 1 Interrupt pending
    obj.UCALIFG = IUSCI_I2C.UCALIFG_t ...
    // Arbitration lost interrupt flag 0 No interrupt pending 1 Interrupt pending
struct USCI_B1_I2C_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_B1_I2C_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_B1_I2C_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_B1_I2C_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_B1_I2C_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_B1_I2C_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
// Instance config-params object
    params.UC1IE = USCI_B1_I2C_2xx.UC1IE_t {
    // USCI_B1 Interrupt Enable Register
        UCB1TXIE: USCI_B1_I2C_2xx.UCB1TXIE_OFF,
        UCB1RXIE: USCI_B1_I2C_2xx.UCB1RXIE_OFF
    };
    params.UCB1BR0 = Bits8 0;
    // Bit Rate Control Register 0
    params.UCB1BR1 = Bits8 0;
    // Bit Rate Control Register 1
    params.UCB1CTL0 = IUSCI_B1_I2C.UCxCTL0_t {
    // Control Register 0
        UCA10: IUSCI_I2C.UCA10_OFF,
        UCSLA10: IUSCI_I2C.UCSLA10_OFF,
        UCMM: IUSCI_I2C.UCMM_OFF,
        UCMST: IUSCI_I2C.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    params.UCB1CTL1 = IUSCI_B1_I2C.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_I2C.UCSSEL_0,
        UCTR: IUSCI_I2C.UCTR_OFF,
        UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
        UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
        UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCB1I2CIE = USCI_B1_I2C_2xx.UCBxI2CIE_t {
    // USCI_Bx I2C Interrupt Enable Register
        UCNACKIE: USCI_B1_I2C_2xx.UCNACKIE_OFF,
        UCSTPIE: USCI_B1_I2C_2xx.UCSTPIE_OFF,
        UCSTTIE: USCI_B1_I2C_2xx.UCSTTIE_OFF,
        UCALIE: USCI_B1_I2C_2xx.UCALIE_OFF
    };
    params.UCB1I2COA = IUSCI_B1_I2C.UCBxI2COA_t {
    // I2C Own Address Register
        UCGCEN: IUSCI_I2C.UCGCEN_OFF,
        I2COA: 0
    };
    params.UCB1I2CSA = Bits8 0;
    // I2C Slave Address Register
    params.UCB1RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCB1STAT = IUSCI_B1_I2C.UCxSTAT_t {
    // Status Register
        UCSCLLOW: IUSCI_I2C.UCSCLLOW,
        UCGC: IUSCI_I2C.UCGC,
        UCBBUSY: IUSCI_I2C.UCBBUSY,
        UCNACKIFG: IUSCI_I2C.UCNACKIFG,
        UCSTPIFG: IUSCI_I2C.UCSTPIFG,
        UCSTTIFG: IUSCI_I2C.UCSTTIFG,
        UCALIFG: IUSCI_I2C.UCALIFG
    };
    params.UCB1TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_B1_I2C_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCB1CTL0",
            regForceSet: false
        },
        {
            register: "UCB1CTL1",
            regForceSet: false
        },
        {
            register: "UCB1BR0",
            regForceSet: false
        },
        {
            register: "UCB1BR1",
            regForceSet: false
        },
        {
            register: "UCB1STAT",
            regForceSet: false
        },
        {
            register: "UCB1RXBUF",
            regForceSet: false
        },
        {
            register: "UCB1TXBUF",
            regForceSet: false
        },
        {
            register: "UCB1I2COA",
            regForceSet: false
        },
        {
            register: "UCB1I2CSA",
            regForceSet: false
        },
        {
            register: "UCB1I2CIE",
            regForceSet: false
        },
        {
            register: "UC1IE",
            regForceSet: false
        }
    ];
    params.interruptSource = USCI_B1_I2C_2xx.regIntVect_t[6] undefined;
    // USCI_B1 I2C interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_B1_I2C_2xx.Params.UC1IE // instance
index URL

USCI_B1 Interrupt Enable Register

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UC1IE = USCI_B1_I2C_2xx.UC1IE_t {
    UCB1TXIE: USCI_B1_I2C_2xx.UCB1TXIE_OFF,
    UCB1RXIE: USCI_B1_I2C_2xx.UCB1RXIE_OFF
};
config USCI_B1_I2C_2xx.Params.UCB1BR0 // instance
index URL

Bit Rate Control Register 0

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1BR0 = Bits8 0;
config USCI_B1_I2C_2xx.Params.UCB1BR1 // instance
index URL

Bit Rate Control Register 1

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1BR1 = Bits8 0;
config USCI_B1_I2C_2xx.Params.UCB1CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1CTL0 = IUSCI_B1_I2C.UCxCTL0_t {
    UCA10: IUSCI_I2C.UCA10_OFF,
    UCSLA10: IUSCI_I2C.UCSLA10_OFF,
    UCMM: IUSCI_I2C.UCMM_OFF,
    UCMST: IUSCI_I2C.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config USCI_B1_I2C_2xx.Params.UCB1CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1CTL1 = IUSCI_B1_I2C.UCxCTL1_t {
    UCSSEL: IUSCI_I2C.UCSSEL_0,
    UCTR: IUSCI_I2C.UCTR_OFF,
    UCTXNACK: IUSCI_I2C.UCTXNACK_OFF,
    UCTXSTP: IUSCI_I2C.UCTXSTP_OFF,
    UCTXSTT: IUSCI_I2C.UCTXSTT_OFF,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_B1_I2C_2xx.Params.UCB1I2CIE // instance
index URL

USCI_Bx I2C Interrupt Enable Register

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1I2CIE = USCI_B1_I2C_2xx.UCBxI2CIE_t {
    UCNACKIE: USCI_B1_I2C_2xx.UCNACKIE_OFF,
    UCSTPIE: USCI_B1_I2C_2xx.UCSTPIE_OFF,
    UCSTTIE: USCI_B1_I2C_2xx.UCSTTIE_OFF,
    UCALIE: USCI_B1_I2C_2xx.UCALIE_OFF
};
config USCI_B1_I2C_2xx.Params.UCB1I2COA // instance
index URL

I2C Own Address Register

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1I2COA = IUSCI_B1_I2C.UCBxI2COA_t {
    UCGCEN: IUSCI_I2C.UCGCEN_OFF,
    I2COA: 0
};
config USCI_B1_I2C_2xx.Params.UCB1I2CSA // instance
index URL

I2C Slave Address Register

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1I2CSA = Bits8 0;
config USCI_B1_I2C_2xx.Params.UCB1RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1RXBUF = Bits8 0;
config USCI_B1_I2C_2xx.Params.UCB1STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1STAT = IUSCI_B1_I2C.UCxSTAT_t {
    UCSCLLOW: IUSCI_I2C.UCSCLLOW,
    UCGC: IUSCI_I2C.UCGC,
    UCBBUSY: IUSCI_I2C.UCBBUSY,
    UCNACKIFG: IUSCI_I2C.UCNACKIFG,
    UCSTPIFG: IUSCI_I2C.UCSTPIFG,
    UCSTTIFG: IUSCI_I2C.UCSTTIFG,
    UCALIFG: IUSCI_I2C.UCALIFG
};
config USCI_B1_I2C_2xx.Params.UCB1TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCB1TXBUF = Bits8 0;
config USCI_B1_I2C_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_B1_I2C_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_B1_I2C_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCB1CTL0",
        regForceSet: false
    },
    {
        register: "UCB1CTL1",
        regForceSet: false
    },
    {
        register: "UCB1BR0",
        regForceSet: false
    },
    {
        register: "UCB1BR1",
        regForceSet: false
    },
    {
        register: "UCB1STAT",
        regForceSet: false
    },
    {
        register: "UCB1RXBUF",
        regForceSet: false
    },
    {
        register: "UCB1TXBUF",
        regForceSet: false
    },
    {
        register: "UCB1I2COA",
        regForceSet: false
    },
    {
        register: "UCB1I2CSA",
        regForceSet: false
    },
    {
        register: "UCB1I2CIE",
        regForceSet: false
    },
    {
        register: "UC1IE",
        regForceSet: false
    }
];
config USCI_B1_I2C_2xx.Params.interruptSource // instance
index URL

USCI_B1 I2C interrupt enables

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.interruptSource = USCI_B1_I2C_2xx.regIntVect_t[6] undefined;
config USCI_B1_I2C_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_B1_I2C_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_B1_I2C_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_B1_I2C_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_B1_I2C_2xx.getUCALIE() // instance
index URL

Gets UCALIE bit

Configuration settings
inst.getUCALIE() returns Bool
SEE
getUCALIE
USCI_B1_I2C_2xx.getUCBxI2CSA() // instance
index URL

Returns UCBxI2CSA register value based on which module

Configuration settings
inst.getUCBxI2CSA() returns Bits8
SEE
getUCBxI2CSA
USCI_B1_I2C_2xx.getUCNACKIE() // instance
index URL

Gets UCNACKIE bit

Configuration settings
inst.getUCNACKIE() returns Bool
SEE
getUCNACKIE
USCI_B1_I2C_2xx.getUCSTPIE() // instance
index URL

Gets UCSTPIE bit

Configuration settings
inst.getUCSTPIE() returns Bool
SEE
getUCSTPIE
USCI_B1_I2C_2xx.getUCSTTIE() // instance
index URL

Gets UCSTTIE bit

Configuration settings
inst.getUCSTTIE() returns Bool
SEE
getUCSTTIE
USCI_B1_I2C_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_B1_I2C_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_B1_I2C_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_B1_I2C_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_B1_I2C_2xx.setUCALIE() // instance
index URL

Sets UCALIE bit

Configuration settings
inst.setUCALIE(Bool set) returns Bool
SEE
setUCALIE
USCI_B1_I2C_2xx.setUCBxI2CSA() // instance
index URL

Sets UCxxI2CSA register value based on which module

Configuration settings
inst.setUCBxI2CSA(Bits8 value) returns Void
SEE
setUCBxI2CSA
USCI_B1_I2C_2xx.setUCNACKIE() // instance
index URL

Sets UCNACKIE bit

Configuration settings
inst.setUCNACKIE(Bool set) returns Bool
SEE
setUCNACKIE
USCI_B1_I2C_2xx.setUCSTPIE() // instance
index URL

Sets UCSTPIE bit

Configuration settings
inst.setUCSTPIE(Bool set) returns Bool
SEE
setUCSTPIE
USCI_B1_I2C_2xx.setUCSTTIE() // instance
index URL

Sets UCSTTIE bit

Configuration settings
inst.setUCSTTIE(Bool set) returns Bool
SEE
setUCSTTIE
USCI_B1_I2C_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_B1_I2C_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_B1_I2C_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_B1_I2C_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:10 GMT


module ti.catalog.msp430.peripherals.communication.USCI_B1_SPI_2xx

metaonly module ti.catalog.msp430.peripherals.communication.USCI_B1_SPI_2xx
index URL

Universal Serial Communication Interface B1 SPI 2xx

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USCI_B1_SPI_2xx.xdc
var USCI_B1_SPI_2xx = xdc.useModule('ti.catalog.msp430.peripherals.communication.USCI_B1_SPI_2xx');
module-wide constants & types
    values of type USCI_B1_SPI_2xx.UC7BIT_t// Character length. Selects 7-bit or 8-bit character length
        const USCI_B1_SPI_2xx.UC7BIT_OFF// 8-bit;
        const USCI_B1_SPI_2xx.UC7BIT// 7-bit;
    values of type USCI_B1_SPI_2xx.UCADDR_t// Address received in address-bit multiprocessor mode
        const USCI_B1_SPI_2xx.UCADDR_OFF// Received character is data;
        const USCI_B1_SPI_2xx.UCADDR// Received character is an address;
    values of type USCI_B1_SPI_2xx.UCB1RXIE_t// USCI_B1 receive interrupt enable
        const USCI_B1_SPI_2xx.UCB1RXIE_OFF// Interrupt disabled;
        const USCI_B1_SPI_2xx.UCB1RXIE// Interrupt enabled;
    values of type USCI_B1_SPI_2xx.UCB1TXIE_t// USCI_B1 transmit interrupt enable
        const USCI_B1_SPI_2xx.UCB1TXIE_OFF// Interrupt disabled;
        const USCI_B1_SPI_2xx.UCB1TXIE// Interrupt enabled;
    values of type USCI_B1_SPI_2xx.UCBRKIE_t// Receive break character interrupt-enable
        const USCI_B1_SPI_2xx.UCBRKIE_OFF// Received break characters do not set UCAxRXIFG;
        const USCI_B1_SPI_2xx.UCBRKIE// Received break characters set UCAxRXIFG;
    values of type USCI_B1_SPI_2xx.UCBRK_t// Break detect flag
        const USCI_B1_SPI_2xx.UCBRK_OFF// No break condition;
        const USCI_B1_SPI_2xx.UCBRK// Break condition occurred;
    values of type USCI_B1_SPI_2xx.UCBUSY_t// USCI busy. This bit indicates if a transmit or receive operation is in progress
        const USCI_B1_SPI_2xx.UCBUSY_OFF// USCI inactive;
        const USCI_B1_SPI_2xx.UCBUSY// USCI transmitting or receiving;
    values of type USCI_B1_SPI_2xx.UCCKPH_t// Clock phase select
        const USCI_B1_SPI_2xx.UCCKPH_OFF// Data is changed on the first UCLK edge and captured on the following edge;
        const USCI_B1_SPI_2xx.UCCKPH// Data is captured on the first UCLK edge and changed on the following edge;
    values of type USCI_B1_SPI_2xx.UCCKPL_t// Clock polarity select
        const USCI_B1_SPI_2xx.UCCKPL_OFF// Inactive state is low;
        const USCI_B1_SPI_2xx.UCCKPL// Inactive state is high;
    values of type USCI_B1_SPI_2xx.UCDORM_t// Dormant. Puts USCI into sleep mode
        const USCI_B1_SPI_2xx.UCDORM_OFF// Not dormant. All received characters will set UCAxRXIFG;
        const USCI_B1_SPI_2xx.UCDORM// Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG;
    values of type USCI_B1_SPI_2xx.UCFE_t// Framing error flag
        const USCI_B1_SPI_2xx.UCFE_OFF// 0 No error;
        const USCI_B1_SPI_2xx.UCFE// Character received with low stop bit;
    values of type USCI_B1_SPI_2xx.UCIDLE_t// Idle line detected in idle-line multiprocessor mode
        const USCI_B1_SPI_2xx.UCIDLE_OFF// No idle line detected;
        const USCI_B1_SPI_2xx.UCIDLE// Idle line detected;
    values of type USCI_B1_SPI_2xx.UCLISTEN_t// Listen enable. The UCLISTEN bit selects loopback mode
        const USCI_B1_SPI_2xx.UCLISTEN_OFF// Disabled;
        const USCI_B1_SPI_2xx.UCLISTEN// Enabled. UCAxTXD is internally fed back to the receiver;
    values of type USCI_B1_SPI_2xx.UCMODE_SYNC_t// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1
        const USCI_B1_SPI_2xx.UCMODE_0// 3-Pin SPI;
        const USCI_B1_SPI_2xx.UCMODE_1// 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1;
        const USCI_B1_SPI_2xx.UCMODE_2// 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0;
        const USCI_B1_SPI_2xx.UCMODE_3// I2C Mode;
    values of type USCI_B1_SPI_2xx.UCMSB_t// MSB first select. Controls the direction of the receive and transmit shift register
        const USCI_B1_SPI_2xx.UCMSB_OFF// LSB first;
        const USCI_B1_SPI_2xx.UCMSB// MSB first;
    values of type USCI_B1_SPI_2xx.UCMST_t// Master mode select
        const USCI_B1_SPI_2xx.UCMST_OFF// Slave mode;
        const USCI_B1_SPI_2xx.UCMST// Master mode;
    values of type USCI_B1_SPI_2xx.UCOE_t// Overrun error flag
        const USCI_B1_SPI_2xx.UCOE_OFF// No error;
        const USCI_B1_SPI_2xx.UCOE// Overrun error occurred;
    values of type USCI_B1_SPI_2xx.UCPE_t// Parity error flag. When UCPEN = 0, UCPE is read as 0
        const USCI_B1_SPI_2xx.UCPE_OFF// No error;
        const USCI_B1_SPI_2xx.UCPE// Character received with parity error;
    values of type USCI_B1_SPI_2xx.UCRXEIE_t// Receive erroneous-character interrupt-enable
        const USCI_B1_SPI_2xx.UCRXEIE_OFF// Erroneous characters rejected and UCAxRXIFG is not set;
        const USCI_B1_SPI_2xx.UCRXEIE// Erroneous characters received will set UCAxRXIFG;
    values of type USCI_B1_SPI_2xx.UCRXERR_t// Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read
        const USCI_B1_SPI_2xx.UCRXERR_OFF// No receive errors detected;
        const USCI_B1_SPI_2xx.UCRXERR// Receive error detected;
    values of type USCI_B1_SPI_2xx.UCSSEL_SPI_t// USCI clock source select. These bits select the BRCLK source clock
        const USCI_B1_SPI_2xx.UCSSEL_0// NA;
        const USCI_B1_SPI_2xx.UCSSEL_1// ACLK;
        const USCI_B1_SPI_2xx.UCSSEL_2// SMCLK;
    values of type USCI_B1_SPI_2xx.UCSWRST_t// Software reset enable
        const USCI_B1_SPI_2xx.UCSWRST_OFF// Disabled. USCI reset released for operation;
        const USCI_B1_SPI_2xx.UCSWRST// Enabled. USCI logic held in reset state;
    values of type USCI_B1_SPI_2xx.UCSYNC_t// Synchronous mode enable
        const USCI_B1_SPI_2xx.UCSYNC_OFF// Asynchronous mode;
        const USCI_B1_SPI_2xx.UCSYNC// Synchronous Mode;
    values of type USCI_B1_SPI_2xx.UCTXADDR_t// Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode
        const USCI_B1_SPI_2xx.UCTXADDR_OFF// Next frame transmitted is data;
        const USCI_B1_SPI_2xx.UCTXADDR// Next frame transmitted is an address;
    values of type USCI_B1_SPI_2xx.UCTXBRK_t// Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer
        const USCI_B1_SPI_2xx.UCTXBRK_OFF// Next frame transmitted is not a break;
        const USCI_B1_SPI_2xx.UCTXBRK// Next frame transmitted is a break or a break/synch;
    var obj = new USCI_B1_SPI_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USCI_B1_SPI_2xx.UC1IE_t// USCI_xx SPI Interrupt Enable Register;
        obj.UCB1TXIE// USCI_B1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_SPI_2xx.UCB1TXIE_t ...
        obj.UCB1RXIE// USCI_B1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled = USCI_B1_SPI_2xx.UCB1RXIE_t ...
    var obj = new USCI_B1_SPI_2xx.UCxCTL0_t// ;
        obj.UCCKPH// Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge = IUSCI_SPI.UCCKPH_t ...
        obj.UCCKPL// Clock polarity select 0 The inactive state is low 1 The inactive state is high = IUSCI_SPI.UCCKPL_t ...
        obj.UCMSB// MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first = IUSCI_SPI.UCMSB_t ...
        obj.UC7BIT// Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data = IUSCI_SPI.UC7BIT_t ...
        obj.UCMST// Master mode select 0 Slave mode 1 Master mode = IUSCI_SPI.UCMST_t ...
        obj.UCMODE// USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode = IUSCI_SPI.UCMODE_SYNC_t ...
        obj.UCSYNC// Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode = IUSCI_SPI.UCSYNC_t ...
    var obj = new USCI_B1_SPI_2xx.UCxCTL1_t// ;
        obj.UCSSEL// USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK = IUSCI_SPI.UCSSEL_SPI_t ...
        obj.UCSWRST// Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state = IUSCI_SPI.UCSWRST_t ...
    var obj = new USCI_B1_SPI_2xx.UCxSTAT_t// ;
        obj.UCLISTEN// Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver = IUSCI_SPI.UCLISTEN_t ...
        obj.UCFE// Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred = IUSCI_SPI.UCFE_t ...
        obj.UCOE// Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred = IUSCI_SPI.UCOE_t ...
        obj.UCBUSY// USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving = IUSCI_SPI.UCBUSY_t ...
    var obj = new USCI_B1_SPI_2xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USCI_B1_SPI_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USCI_B1_SPI_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USCI_B1_SPI_2xx.Params// Instance config-params object;
        params.UC1IE// USCI_B1 Interrupt Enable Register = USCI_B1_SPI_2xx.UC1IE_t {
            UCB1TXIE: USCI_B1_SPI_2xx.UCB1TXIE_OFF,
            UCB1RXIE: USCI_B1_SPI_2xx.UCB1RXIE_OFF
        };
        params.UCB1BR0// Bit Rate Control Register 0 = Bits8 0;
        params.UCB1BR1// Bit Rate Control Register 1 = Bits8 0;
        params.UCB1CTL0// Control Register 0 = IUSCI_B1_SPI.UCxCTL0_t {
            UCCKPH: IUSCI_SPI.UCCKPH_OFF,
            UCCKPL: IUSCI_SPI.UCCKPL_OFF,
            UCMSB: IUSCI.UCMSB_OFF,
            UC7BIT: IUSCI.UC7BIT_OFF,
            UCMST: IUSCI_SPI.UCMST_OFF,
            UCMODE: IUSCI.UCMODE_0,
            UCSYNC: IUSCI.UCSYNC
        };
        params.UCB1CTL1// Control Register 1 = IUSCI_B1_SPI.UCxCTL1_t {
            UCSSEL: IUSCI_SPI.UCSSEL_0,
            UCSWRST: IUSCI.UCSWRST
        };
        params.UCB1RXBUF// Receive Buffer Register = Bits8 0;
        params.UCB1STAT// Status Register = IUSCI_B1_SPI.UCxSTAT_t {
            UCLISTEN: IUSCI.UCLISTEN_OFF,
            UCFE: IUSCI.UCFE_OFF,
            UCOE: IUSCI.UCOE_OFF,
            UCBUSY: IUSCI.UCBUSY
        };
        params.UCB1TXBUF// Transmit Buffer Register = Bits8 0;
        params.UCLKHz// Stores the UCLK external clock frequency in float = Float 1000000;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USCI_B1_SPI_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "UCB1CTL0",
                regForceSet: false
            },
            {
                register: "UCB1CTL1",
                regForceSet: false
            },
            {
                register: "UCB1BR0",
                regForceSet: false
            },
            {
                register: "UCB1BR1",
                regForceSet: false
            },
            {
                register: "UCB1STAT",
                regForceSet: false
            },
            {
                register: "UCB1RXBUF",
                regForceSet: false
            },
            {
                register: "UCB1TXBUF",
                regForceSet: false
            },
            {
                register: "UC1IE",
                regForceSet: false
            }
        ];
        params.interruptSource// USCI_A1 SPI interrupt enables = USCI_B1_SPI_2xx.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USCI_B1_SPI_2xx.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUCxxBR0// Returns UCxxBR0 register value based on which module() returns Bits8
     inst.getUCxxBR1// Returns UCxxBR1 register value based on which module() returns Bits8
     inst.getUCxxRXIE// Gets UCxxRXIE bit() returns Bool
     inst.getUCxxTXIE// Gets UCxxTXIE bit() returns Bool
     inst.setUCxxBR0// Sets UCxxBR0 register value based on which module(Bits8 value) returns Void
     inst.setUCxxBR1// Sets UCxxBR1 register value based on which module(Bits8 value) returns Void
     inst.setUCxxRXIE// Sets UCxxRXIE bit(Bool set) returns Bool
     inst.setUCxxTXIE// Sets UCxxTXIE bit(Bool set) returns Bool
enum USCI_B1_SPI_2xx.UC7BIT_t
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Character length. Selects 7-bit or 8-bit character length

Configuration settings
values of type USCI_B1_SPI_2xx.UC7BIT_t
    const USCI_B1_SPI_2xx.UC7BIT_OFF;
    // 8-bit
    const USCI_B1_SPI_2xx.UC7BIT;
    // 7-bit
enum USCI_B1_SPI_2xx.UCADDR_t
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Address received in address-bit multiprocessor mode

Configuration settings
values of type USCI_B1_SPI_2xx.UCADDR_t
    const USCI_B1_SPI_2xx.UCADDR_OFF;
    // Received character is data
    const USCI_B1_SPI_2xx.UCADDR;
    // Received character is an address
enum USCI_B1_SPI_2xx.UCB1RXIE_t
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USCI_B1 receive interrupt enable

Configuration settings
values of type USCI_B1_SPI_2xx.UCB1RXIE_t
    const USCI_B1_SPI_2xx.UCB1RXIE_OFF;
    // Interrupt disabled
    const USCI_B1_SPI_2xx.UCB1RXIE;
    // Interrupt enabled
enum USCI_B1_SPI_2xx.UCB1TXIE_t
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USCI_B1 transmit interrupt enable

Configuration settings
values of type USCI_B1_SPI_2xx.UCB1TXIE_t
    const USCI_B1_SPI_2xx.UCB1TXIE_OFF;
    // Interrupt disabled
    const USCI_B1_SPI_2xx.UCB1TXIE;
    // Interrupt enabled
enum USCI_B1_SPI_2xx.UCBRKIE_t
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Receive break character interrupt-enable

Configuration settings
values of type USCI_B1_SPI_2xx.UCBRKIE_t
    const USCI_B1_SPI_2xx.UCBRKIE_OFF;
    // Received break characters do not set UCAxRXIFG
    const USCI_B1_SPI_2xx.UCBRKIE;
    // Received break characters set UCAxRXIFG
enum USCI_B1_SPI_2xx.UCBRK_t
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Break detect flag

Configuration settings
values of type USCI_B1_SPI_2xx.UCBRK_t
    const USCI_B1_SPI_2xx.UCBRK_OFF;
    // No break condition
    const USCI_B1_SPI_2xx.UCBRK;
    // Break condition occurred
enum USCI_B1_SPI_2xx.UCBUSY_t
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USCI busy. This bit indicates if a transmit or receive operation is in progress

Configuration settings
values of type USCI_B1_SPI_2xx.UCBUSY_t
    const USCI_B1_SPI_2xx.UCBUSY_OFF;
    // USCI inactive
    const USCI_B1_SPI_2xx.UCBUSY;
    // USCI transmitting or receiving
enum USCI_B1_SPI_2xx.UCCKPH_t
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Clock phase select

Configuration settings
values of type USCI_B1_SPI_2xx.UCCKPH_t
    const USCI_B1_SPI_2xx.UCCKPH_OFF;
    // Data is changed on the first UCLK edge and captured on the following edge
    const USCI_B1_SPI_2xx.UCCKPH;
    // Data is captured on the first UCLK edge and changed on the following edge
enum USCI_B1_SPI_2xx.UCCKPL_t
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Clock polarity select

Configuration settings
values of type USCI_B1_SPI_2xx.UCCKPL_t
    const USCI_B1_SPI_2xx.UCCKPL_OFF;
    // Inactive state is low
    const USCI_B1_SPI_2xx.UCCKPL;
    // Inactive state is high
enum USCI_B1_SPI_2xx.UCDORM_t
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Dormant. Puts USCI into sleep mode

Configuration settings
values of type USCI_B1_SPI_2xx.UCDORM_t
    const USCI_B1_SPI_2xx.UCDORM_OFF;
    // Not dormant. All received characters will set UCAxRXIFG
    const USCI_B1_SPI_2xx.UCDORM;
    // Dormant. Only characters that are preceded by an idle-line or with address bit set will set UCAxRXIFG. In UART mode with automatic baud rate detection only the combination of a break and synch field will set UCAxRXIFG
enum USCI_B1_SPI_2xx.UCFE_t
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Framing error flag

Configuration settings
values of type USCI_B1_SPI_2xx.UCFE_t
    const USCI_B1_SPI_2xx.UCFE_OFF;
    // 0 No error
    const USCI_B1_SPI_2xx.UCFE;
    // Character received with low stop bit
enum USCI_B1_SPI_2xx.UCIDLE_t
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Idle line detected in idle-line multiprocessor mode

Configuration settings
values of type USCI_B1_SPI_2xx.UCIDLE_t
    const USCI_B1_SPI_2xx.UCIDLE_OFF;
    // No idle line detected
    const USCI_B1_SPI_2xx.UCIDLE;
    // Idle line detected
enum USCI_B1_SPI_2xx.UCLISTEN_t
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Listen enable. The UCLISTEN bit selects loopback mode

Configuration settings
values of type USCI_B1_SPI_2xx.UCLISTEN_t
    const USCI_B1_SPI_2xx.UCLISTEN_OFF;
    // Disabled
    const USCI_B1_SPI_2xx.UCLISTEN;
    // Enabled. UCAxTXD is internally fed back to the receiver
enum USCI_B1_SPI_2xx.UCMODE_SYNC_t
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USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1

Configuration settings
values of type USCI_B1_SPI_2xx.UCMODE_SYNC_t
    const USCI_B1_SPI_2xx.UCMODE_0;
    // 3-Pin SPI
    const USCI_B1_SPI_2xx.UCMODE_1;
    // 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    const USCI_B1_SPI_2xx.UCMODE_2;
    // 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    const USCI_B1_SPI_2xx.UCMODE_3;
    // I2C Mode
enum USCI_B1_SPI_2xx.UCMSB_t
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MSB first select. Controls the direction of the receive and transmit shift register

Configuration settings
values of type USCI_B1_SPI_2xx.UCMSB_t
    const USCI_B1_SPI_2xx.UCMSB_OFF;
    // LSB first
    const USCI_B1_SPI_2xx.UCMSB;
    // MSB first
enum USCI_B1_SPI_2xx.UCMST_t
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Master mode select

Configuration settings
values of type USCI_B1_SPI_2xx.UCMST_t
    const USCI_B1_SPI_2xx.UCMST_OFF;
    // Slave mode
    const USCI_B1_SPI_2xx.UCMST;
    // Master mode
enum USCI_B1_SPI_2xx.UCOE_t
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Overrun error flag

Configuration settings
values of type USCI_B1_SPI_2xx.UCOE_t
    const USCI_B1_SPI_2xx.UCOE_OFF;
    // No error
    const USCI_B1_SPI_2xx.UCOE;
    // Overrun error occurred
enum USCI_B1_SPI_2xx.UCPE_t
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Parity error flag. When UCPEN = 0, UCPE is read as 0

Configuration settings
values of type USCI_B1_SPI_2xx.UCPE_t
    const USCI_B1_SPI_2xx.UCPE_OFF;
    // No error
    const USCI_B1_SPI_2xx.UCPE;
    // Character received with parity error
enum USCI_B1_SPI_2xx.UCRXEIE_t
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Receive erroneous-character interrupt-enable

Configuration settings
values of type USCI_B1_SPI_2xx.UCRXEIE_t
    const USCI_B1_SPI_2xx.UCRXEIE_OFF;
    // Erroneous characters rejected and UCAxRXIFG is not set
    const USCI_B1_SPI_2xx.UCRXEIE;
    // Erroneous characters received will set UCAxRXIFG
enum USCI_B1_SPI_2xx.UCRXERR_t
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Bit 2 Receive error flag. This bit indicates a character was received with error(s). When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also set. UCRXERR is cleared when UCAxRXBUF is read

Configuration settings
values of type USCI_B1_SPI_2xx.UCRXERR_t
    const USCI_B1_SPI_2xx.UCRXERR_OFF;
    // No receive errors detected
    const USCI_B1_SPI_2xx.UCRXERR;
    // Receive error detected
enum USCI_B1_SPI_2xx.UCSSEL_SPI_t
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USCI clock source select. These bits select the BRCLK source clock

Configuration settings
values of type USCI_B1_SPI_2xx.UCSSEL_SPI_t
    const USCI_B1_SPI_2xx.UCSSEL_0;
    // NA
    const USCI_B1_SPI_2xx.UCSSEL_1;
    // ACLK
    const USCI_B1_SPI_2xx.UCSSEL_2;
    // SMCLK
enum USCI_B1_SPI_2xx.UCSWRST_t
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Software reset enable

Configuration settings
values of type USCI_B1_SPI_2xx.UCSWRST_t
    const USCI_B1_SPI_2xx.UCSWRST_OFF;
    // Disabled. USCI reset released for operation
    const USCI_B1_SPI_2xx.UCSWRST;
    // Enabled. USCI logic held in reset state
enum USCI_B1_SPI_2xx.UCSYNC_t
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Synchronous mode enable

Configuration settings
values of type USCI_B1_SPI_2xx.UCSYNC_t
    const USCI_B1_SPI_2xx.UCSYNC_OFF;
    // Asynchronous mode
    const USCI_B1_SPI_2xx.UCSYNC;
    // Synchronous Mode
enum USCI_B1_SPI_2xx.UCTXADDR_t
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Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode

Configuration settings
values of type USCI_B1_SPI_2xx.UCTXADDR_t
    const USCI_B1_SPI_2xx.UCTXADDR_OFF;
    // Next frame transmitted is data
    const USCI_B1_SPI_2xx.UCTXADDR;
    // Next frame transmitted is an address
enum USCI_B1_SPI_2xx.UCTXBRK_t
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Transmit break. Transmits a break with the next write to the transmit buffer. In UART mode with automatic baud rate detection 055h must be written into UCAxTXBUF to generate the required break/synch fields. Otherwise 0h must be written into the transmit buffer

Configuration settings
values of type USCI_B1_SPI_2xx.UCTXBRK_t
    const USCI_B1_SPI_2xx.UCTXBRK_OFF;
    // Next frame transmitted is not a break
    const USCI_B1_SPI_2xx.UCTXBRK;
    // Next frame transmitted is a break or a break/synch
struct USCI_B1_SPI_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USCI_B1_SPI_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USCI_B1_SPI_2xx.UC1IE_t
index URL

USCI_xx SPI Interrupt Enable Register

Configuration settings
var obj = new USCI_B1_SPI_2xx.UC1IE_t;
    obj.UCB1TXIE = USCI_B1_SPI_2xx.UCB1TXIE_t ...
    // USCI_B1 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCB1RXIE = USCI_B1_SPI_2xx.UCB1RXIE_t ...
    // USCI_B1 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled
struct USCI_B1_SPI_2xx.UCxCTL0_t
index URL
Configuration settings
var obj = new USCI_B1_SPI_2xx.UCxCTL0_t;
    obj.UCCKPH = IUSCI_SPI.UCCKPH_t ...
    // Clock phase select. 0 Data is changed on the first UCLK edge and captured on the following edge. 1 Data is captured on the first UCLK edge and changed on the following edge
    obj.UCCKPL = IUSCI_SPI.UCCKPL_t ...
    // Clock polarity select 0 The inactive state is low 1 The inactive state is high
    obj.UCMSB = IUSCI_SPI.UCMSB_t ...
    // MSB first select. Controls the direction of the receive and transmit shift register. 0 LSB first 1 MSB first
    obj.UC7BIT = IUSCI_SPI.UC7BIT_t ...
    // Character length. Selects 7-bit or 8-bit character length. 0 8-bit data 1 7-bit data
    obj.UCMST = IUSCI_SPI.UCMST_t ...
    // Master mode select 0 Slave mode 1 Master mode
    obj.UCMODE = IUSCI_SPI.UCMODE_SYNC_t ...
    // USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. 00 3-Pin SPI 01 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 10 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 11 I2C Mode
    obj.UCSYNC = IUSCI_SPI.UCSYNC_t ...
    // Synchronous mode enable 0 Asynchronous mode 1 Synchronous Mode
struct USCI_B1_SPI_2xx.UCxCTL1_t
index URL
Configuration settings
var obj = new USCI_B1_SPI_2xx.UCxCTL1_t;
    obj.UCSSEL = IUSCI_SPI.UCSSEL_SPI_t ...
    // USCI clock source select. These bits select the BRCLK source clock in master mode. UCxCLK is always used in slave mode. 00 NA 01 ACLK 10 SMCLK 11 SMCLK
    obj.UCSWRST = IUSCI_SPI.UCSWRST_t ...
    // Software reset enable 0 Disabled. USCI reset released for operation. 1 Enabled. USCI logic held in reset state
struct USCI_B1_SPI_2xx.UCxSTAT_t
index URL
Configuration settings
var obj = new USCI_B1_SPI_2xx.UCxSTAT_t;
    obj.UCLISTEN = IUSCI_SPI.UCLISTEN_t ...
    // Listen enable. The UCLISTEN bit selects loopback mode. 0 Disabled 1 Enabled. UCAxTXD is internally fed back to the receiver
    obj.UCFE = IUSCI_SPI.UCFE_t ...
    // Framing error flag. This bit indicates a bus conflict in 4-wire master mode. UCFE is not used in 3-wire master or any slave mode. 0 No error 1 Bus conflict occurred
    obj.UCOE = IUSCI_SPI.UCOE_t ...
    // Overrun error flag. This bit is set when a character is transferred into UCAxRXBUF before the previous character was read. UCOE is cleared automatically when UCxRXBUF is read, and must not be cleared by software. Otherwise, it will not function correctly. 0 No error 1 Overrun error occurred
    obj.UCBUSY = IUSCI_SPI.UCBUSY_t ...
    // USCI busy. This bit indicates if a transmit or receive operation is in progress. 0 USCI inactive 1 USCI transmitting or receiving
struct USCI_B1_SPI_2xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USCI_B1_SPI_2xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USCI_B1_SPI_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USCI_B1_SPI_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USCI_B1_SPI_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USCI_B1_SPI_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
// Instance config-params object
    params.UC1IE = USCI_B1_SPI_2xx.UC1IE_t {
    // USCI_B1 Interrupt Enable Register
        UCB1TXIE: USCI_B1_SPI_2xx.UCB1TXIE_OFF,
        UCB1RXIE: USCI_B1_SPI_2xx.UCB1RXIE_OFF
    };
    params.UCB1BR0 = Bits8 0;
    // Bit Rate Control Register 0
    params.UCB1BR1 = Bits8 0;
    // Bit Rate Control Register 1
    params.UCB1CTL0 = IUSCI_B1_SPI.UCxCTL0_t {
    // Control Register 0
        UCCKPH: IUSCI_SPI.UCCKPH_OFF,
        UCCKPL: IUSCI_SPI.UCCKPL_OFF,
        UCMSB: IUSCI.UCMSB_OFF,
        UC7BIT: IUSCI.UC7BIT_OFF,
        UCMST: IUSCI_SPI.UCMST_OFF,
        UCMODE: IUSCI.UCMODE_0,
        UCSYNC: IUSCI.UCSYNC
    };
    params.UCB1CTL1 = IUSCI_B1_SPI.UCxCTL1_t {
    // Control Register 1
        UCSSEL: IUSCI_SPI.UCSSEL_0,
        UCSWRST: IUSCI.UCSWRST
    };
    params.UCB1RXBUF = Bits8 0;
    // Receive Buffer Register
    params.UCB1STAT = IUSCI_B1_SPI.UCxSTAT_t {
    // Status Register
        UCLISTEN: IUSCI.UCLISTEN_OFF,
        UCFE: IUSCI.UCFE_OFF,
        UCOE: IUSCI.UCOE_OFF,
        UCBUSY: IUSCI.UCBUSY
    };
    params.UCB1TXBUF = Bits8 0;
    // Transmit Buffer Register
    params.UCLKHz = Float 1000000;
    // Stores the UCLK external clock frequency in float
    params.forceSetDefaultRegister = USCI_B1_SPI_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "UCB1CTL0",
            regForceSet: false
        },
        {
            register: "UCB1CTL1",
            regForceSet: false
        },
        {
            register: "UCB1BR0",
            regForceSet: false
        },
        {
            register: "UCB1BR1",
            regForceSet: false
        },
        {
            register: "UCB1STAT",
            regForceSet: false
        },
        {
            register: "UCB1RXBUF",
            regForceSet: false
        },
        {
            register: "UCB1TXBUF",
            regForceSet: false
        },
        {
            register: "UC1IE",
            regForceSet: false
        }
    ];
    params.interruptSource = USCI_B1_SPI_2xx.regIntVect_t[2] undefined;
    // USCI_A1 SPI interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USCI_B1_SPI_2xx.Params.UC1IE // instance
index URL

USCI_B1 Interrupt Enable Register

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UC1IE = USCI_B1_SPI_2xx.UC1IE_t {
    UCB1TXIE: USCI_B1_SPI_2xx.UCB1TXIE_OFF,
    UCB1RXIE: USCI_B1_SPI_2xx.UCB1RXIE_OFF
};
config USCI_B1_SPI_2xx.Params.UCB1BR0 // instance
index URL

Bit Rate Control Register 0

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCB1BR0 = Bits8 0;
config USCI_B1_SPI_2xx.Params.UCB1BR1 // instance
index URL

Bit Rate Control Register 1

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCB1BR1 = Bits8 0;
config USCI_B1_SPI_2xx.Params.UCB1CTL0 // instance
index URL

Control Register 0

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCB1CTL0 = IUSCI_B1_SPI.UCxCTL0_t {
    UCCKPH: IUSCI_SPI.UCCKPH_OFF,
    UCCKPL: IUSCI_SPI.UCCKPL_OFF,
    UCMSB: IUSCI.UCMSB_OFF,
    UC7BIT: IUSCI.UC7BIT_OFF,
    UCMST: IUSCI_SPI.UCMST_OFF,
    UCMODE: IUSCI.UCMODE_0,
    UCSYNC: IUSCI.UCSYNC
};
config USCI_B1_SPI_2xx.Params.UCB1CTL1 // instance
index URL

Control Register 1

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCB1CTL1 = IUSCI_B1_SPI.UCxCTL1_t {
    UCSSEL: IUSCI_SPI.UCSSEL_0,
    UCSWRST: IUSCI.UCSWRST
};
config USCI_B1_SPI_2xx.Params.UCB1RXBUF // instance
index URL

Receive Buffer Register

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCB1RXBUF = Bits8 0;
config USCI_B1_SPI_2xx.Params.UCB1STAT // instance
index URL

Status Register

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCB1STAT = IUSCI_B1_SPI.UCxSTAT_t {
    UCLISTEN: IUSCI.UCLISTEN_OFF,
    UCFE: IUSCI.UCFE_OFF,
    UCOE: IUSCI.UCOE_OFF,
    UCBUSY: IUSCI.UCBUSY
};
config USCI_B1_SPI_2xx.Params.UCB1TXBUF // instance
index URL

Transmit Buffer Register

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCB1TXBUF = Bits8 0;
config USCI_B1_SPI_2xx.Params.UCLKHz // instance
index URL

Stores the UCLK external clock frequency in float

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.UCLKHz = Float 1000000;
config USCI_B1_SPI_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
const params.forceSetDefaultRegister = USCI_B1_SPI_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "UCB1CTL0",
        regForceSet: false
    },
    {
        register: "UCB1CTL1",
        regForceSet: false
    },
    {
        register: "UCB1BR0",
        regForceSet: false
    },
    {
        register: "UCB1BR1",
        regForceSet: false
    },
    {
        register: "UCB1STAT",
        regForceSet: false
    },
    {
        register: "UCB1RXBUF",
        regForceSet: false
    },
    {
        register: "UCB1TXBUF",
        regForceSet: false
    },
    {
        register: "UC1IE",
        regForceSet: false
    }
];
config USCI_B1_SPI_2xx.Params.interruptSource // instance
index URL

USCI_A1 SPI interrupt enables

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.interruptSource = USCI_B1_SPI_2xx.regIntVect_t[2] undefined;
config USCI_B1_SPI_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USCI_B1_SPI_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USCI_B1_SPI_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USCI_B1_SPI_2xx.create(IClock.Instance clock, params);
// Create an instance-object
USCI_B1_SPI_2xx.getUCxxBR0() // instance
index URL

Returns UCxxBR0 register value based on which module

Configuration settings
inst.getUCxxBR0() returns Bits8
SEE
getUCxxBR0
USCI_B1_SPI_2xx.getUCxxBR1() // instance
index URL

Returns UCxxBR1 register value based on which module

Configuration settings
inst.getUCxxBR1() returns Bits8
SEE
getUCxxBR1
USCI_B1_SPI_2xx.getUCxxRXIE() // instance
index URL

Gets UCxxRXIE bit

Configuration settings
inst.getUCxxRXIE() returns Bool
SEE
getUCxxRXIE
USCI_B1_SPI_2xx.getUCxxTXIE() // instance
index URL

Gets UCxxTXIE bit

Configuration settings
inst.getUCxxTXIE() returns Bool
SEE
getUCxxTXIE
USCI_B1_SPI_2xx.setUCxxBR0() // instance
index URL

Sets UCxxBR0 register value based on which module

Configuration settings
inst.setUCxxBR0(Bits8 value) returns Void
SEE
setUCxxBR0
USCI_B1_SPI_2xx.setUCxxBR1() // instance
index URL

Sets UCxxBR1 register value based on which module

Configuration settings
inst.setUCxxBR1(Bits8 value) returns Void
SEE
setUCxxBR1
USCI_B1_SPI_2xx.setUCxxRXIE() // instance
index URL

Sets UCxxRXIE bit

Configuration settings
inst.setUCxxRXIE(Bool set) returns Bool
SEE
setUCxxRXIE
USCI_B1_SPI_2xx.setUCxxTXIE() // instance
index URL

Sets UCxxTXIE bit

Configuration settings
inst.setUCxxTXIE(Bool set) returns Bool
SEE
setUCxxTXIE
generated on Sun, 25 Nov 2018 22:20:10 GMT


module ti.catalog.msp430.peripherals.communication.USI

metaonly module ti.catalog.msp430.peripherals.communication.USI
index URL

Universal Serial Interface

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/communication/USI.xdc
var USI = xdc.useModule('ti.catalog.msp430.peripherals.communication.USI');
module-wide constants & types
    values of type USI.USI16B_t// 16-bit shift register enable
        const USI.USI16B_OFF// 8-bit shift register mode. Low byte register USISRL is used;
        const USI.USI16B// 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously;
    values of type USI.USIAL_t// Arbitration lost
        const USI.USIAL_OFF// No arbitration lost condition;
        const USI.USIAL// Arbitration lost;
    values of type USI.USICKPH_t// Clock phase select
        const USI.USICKPH_OFF// Data is changed on the first SCLK edge and captured on the following edge;
        const USI.USICKPH// Data is captured on the first SCLK edge and changed on the following edge;
    values of type USI.USICKPL_t// Clock polarity select
        const USI.USICKPL_OFF// Inactive state is low;
        const USI.USICKPL// Inactive state is high;
    values of type USI.USICNT0_t// USI bit count - Bit0
        const USI.USICNT0_OFF// USI bit count;
        const USI.USICNT0// USI bit count;
    values of type USI.USICNT1_t// USI bit count - Bit1
        const USI.USICNT1_OFF// USI bit count;
        const USI.USICNT1// USI bit count;
    values of type USI.USICNT2_t// USI bit count - Bit2
        const USI.USICNT2_OFF// USI bit count;
        const USI.USICNT2// USI bit count;
    values of type USI.USICNT3_t// USI bit count - Bit3
        const USI.USICNT3_OFF// USI bit count;
        const USI.USICNT3// USI bit count;
    values of type USI.USICNT4_t// USI bit count - Bit4
        const USI.USICNT4_OFF// USI bit count;
        const USI.USICNT4// USI bit count;
    values of type USI.USIDIV_t// Clock divider select
        const USI.USIDIV_0// Divide by 1;
        const USI.USIDIV_1// Divide by 2;
        const USI.USIDIV_2// Divide by 4;
        const USI.USIDIV_3// Divide by 8;
        const USI.USIDIV_4// Divide by 16;
        const USI.USIDIV_5// Divide by 32;
        const USI.USIDIV_6// Divide by 64;
        const USI.USIDIV_7// Divide by 128;
    values of type USI.USIGE_t// Output latch control
        const USI.USIGE_OFF// Output latch enable depends on shift clock;
        const USI.USIGE// Output latch always enabled and transparent;
    values of type USI.USII2C_t// I2C mode enable
        const USI.USII2C_OFF// I2C mode disabled;
        const USI.USII2C// I2C mode enabled;
    values of type USI.USIIE_t// USI counter interrupt enable
        const USI.USIIE_OFF// Interrupt disabled;
        const USI.USIIE// Interrupt enabled;
    values of type USI.USIIFGCC_t// USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0
        const USI.USIIFGCC_OFF// USIIFG automatically cleared on USICNTx update;
        const USI.USIIFGCC// USIIFG is not cleared automatically;
    values of type USI.USIIFG_t// USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0
        const USI.USIIFG_OFF// No interrupt pending;
        const USI.USIIFG// Interrupt pending;
    values of type USI.USILSB_t// LSB first select. This bit controls the direction of the receive and transmit shift register
        const USI.USILSB_OFF// MSB first;
        const USI.USILSB// LSB first;
    values of type USI.USIMST_t// Master select
        const USI.USIMST_OFF// Slave mode;
        const USI.USIMST// Master mode;
    values of type USI.USIOE_t// Data output enable
        const USI.USIOE_OFF// Output disabled;
        const USI.USIOE// Output enabled;
    values of type USI.USIPE5_t// USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode
        const USI.USIPE5_OFF// USI function disabled;
        const USI.USIPE5// USI function enabled;
    values of type USI.USIPE6_t// USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode
        const USI.USIPE6_OFF// USI function disabled;
        const USI.USIPE6// USI function enabled;
    values of type USI.USIPE7_t// USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode
        const USI.USIPE7_OFF// USI function disabled;
        const USI.USIPE7// USI function enabled;
    values of type USI.USISCLREL_t// SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected
        const USI.USISCLREL_OFF// SCL line is held low if USIIFG is set;
        const USI.USISCLREL// SCL line is released;
    values of type USI.USISSEL_t// Clock source select. Not used in slave mode
        const USI.USISSEL_0// SCLK (Not used in SPI mode);
        const USI.USISSEL_1// ACLK;
        const USI.USISSEL_2// SMCLK;
        const USI.USISSEL_3// SMCLK;
        const USI.USISSEL_4// USISWCLK bit;
        const USI.USISSEL_5// TACCR0;
        const USI.USISSEL_6// TACCR1;
        const USI.USISSEL_7// TACCR2 (Reserved on MSP430F20xx devices);
    values of type USI.USISTP_t// STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0
        const USI.USISTP_OFF// No STOP condition received;
        const USI.USISTP// STOP condition received;
    values of type USI.USISTTIE_t// START condition interrupt-enable
        const USI.USISTTIE_OFF// Interrupt on START condition disabled;
        const USI.USISTTIE// Interrupt on START condition enabled;
    values of type USI.USISTTIFG_t// START condition interrupt flag
        const USI.USISTTIFG_OFF// No START condition received. No interrupt pending;
        const USI.USISTTIFG// START condition received. Interrupt pending;
    values of type USI.USISWCLK_t// Software clock
        const USI.USISWCLK_OFF// Input clock is low;
        const USI.USISWCLK// Input clock is high;
    values of type USI.USISWRST_t// USI software reset
        const USI.USISWRST_OFF// USI released for operation;
        const USI.USISWRST// USI logic held in reset state;
    var obj = new USI.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new USI.USICKCTL_t// ;
        obj.USIDIV// Clock divider select 000 Divide by 1 001 Divide by 2 010 Divide by 4 011 Divide by 8 100 Divide by 16 101 Divide by 32 110 Divide by 64 111 Divide by 128 = IUSI.USIDIV_t ...
        obj.USISSEL// Clock source select. Not used in slave mode. 000 SCLK (Not used in SPI mode) 001 ACLK 010 SMCLK 011 SMCLK 100 USISWCLK bit 101 TACCR0 110 TACCR1 111 TACCR2 (Reserved on MSP430F20xx devices) = IUSI.USISSEL_t ...
        obj.USICKPL// Clock polarity select 0 Inactive state is low 1 Inactive state is high = IUSI.USICKPL_t ...
        obj.USISWCLK// Software clock 0 Input clock is low 1 Input clock is high = IUSI.USISWCLK_t ...
    var obj = new USI.USICNT_t// ;
        obj.USISCLREL// SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected. 0 SCL line is held low if USIIFG is set 1 SCL line is released = IUSI.USISCLREL_t ...
        obj.USI16B// 16-bit shift register enable 0 8-bit shift register mode. Low byte register USISRL is used. 1 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously = IUSI.USI16B_t ...
        obj.USIIFGCC// USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0. 0 USIIFG automatically cleared on USICNTx update 1 USIIFG is not cleared automatically = IUSI.USIIFGCC_t ...
        obj.USICNT4// USI bit count bit 4 The USICNTx bits set the number of bits to be received or transmitted = IUSI.USICNT4_t ...
        obj.USICNT3// USI bit count bit 3 The USICNTx bits set the number of bits to be received or transmitted = IUSI.USICNT3_t ...
        obj.USICNT2// USI bit count bit 2 The USICNTx bits set the number of bits to be received or transmitted = IUSI.USICNT2_t ...
        obj.USICNT1// USI bit count bit 1 The USICNTx bits set the number of bits to be received or transmitted = IUSI.USICNT1_t ...
        obj.USICNT0// USI bit count bit 0 The USICNTx bits set the number of bits to be received or transmitted = IUSI.USICNT0_t ...
    var obj = new USI.USICTL0_t// ;
        obj.USIPE7// USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled = IUSI.USIPE7_t ...
        obj.USIPE6// USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled = IUSI.USIPE6_t ...
        obj.USIPE5// USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode. 0 USI function disabled 1 USI function enabled = IUSI.USIPE5_t ...
        obj.USILSB// LSB first select. This bit controls the direction of the receive and transmit shift register. 0 MSB first 1 LSB first = IUSI.USILSB_t ...
        obj.USIMST// Master select 0 Slave mode 1 Master mode = IUSI.USIMST_t ...
        obj.USIGE// Output latch control 0 Output latch enable depends on shift clock 1 Output latch always enabled and transparent = IUSI.USIGE_t ...
        obj.USIOE// Data output enable 0 Output disabled 1 Output enabled = IUSI.USIOE_t ...
        obj.USISWRST// USI software reset 0 USI released for operation. 1 USI logic held in reset state = IUSI.USISWRST_t ...
    var obj = new USI.USICTL1_t// ;
        obj.USICKPH// Clock phase select 0 Data is changed on the first SCLK edge and captured on the following edge. 1 Data is captured on the first SCLK edge and changed on the following edge = IUSI.USICKPH_t ...
        obj.USII2C// I2C mode enable 0 I2C mode disabled 1 I2C mode enabled = IUSI.USII2C_t ...
        obj.USISTTIE// START condition interrupt-enable 0 Interrupt on START condition disabled 1 Interrupt on START condition enabled = IUSI.USISTTIE_t ...
        obj.USIIE// USI counter interrupt enable 0 Interrupt disabled 1 Interrupt enabled = IUSI.USIIE_t ...
        obj.USIAL// Arbitration lost 0 No arbitration lost condition 1 Arbitration lost = IUSI.USIAL_t ...
        obj.USISTP// STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No STOP condition received 1 STOP condition received = IUSI.USISTP_t ...
        obj.USISTTIFG// START condition interrupt flag 0 No START condition received. No interrupt pending. 1 START condition received. Interrupt pending = IUSI.USISTTIFG_t ...
        obj.USIIFG// USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No interrupt pending 1 Interrupt pending = IUSI.USIIFG_t ...
    var obj = new USI.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     USI.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     USI.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new USI.Params// Instance config-params object;
        params.USICKCTL// USI Clock Control Register = USI.USICKCTL_t {
            USIDIV: IUSI.USIDIV_0,
            USISSEL: IUSI.USISSEL_0,
            USICKPL: IUSI.USICKPL_OFF,
            USISWCLK: IUSI.USISWCLK_OFF
        };
        params.USICNT// USI Bit Counter Register = USI.USICNT_t {
            USISCLREL: IUSI.USISCLREL_OFF,
            USI16B: IUSI.USI16B_OFF,
            USIIFGCC: IUSI.USIIFGCC_OFF,
            USICNT4: IUSI.USICNT4_OFF,
            USICNT3: IUSI.USICNT3_OFF,
            USICNT2: IUSI.USICNT2_OFF,
            USICNT1: IUSI.USICNT1_OFF,
            USICNT0: IUSI.USICNT0_OFF
        };
        params.USICTL0// USI Control Register 0 = USI.USICTL0_t {
            USIPE7: IUSI.USIPE7_OFF,
            USIPE6: IUSI.USIPE6_OFF,
            USIPE5: IUSI.USIPE5_OFF,
            USILSB: IUSI.USILSB_OFF,
            USIMST: IUSI.USIMST_OFF,
            USIGE: IUSI.USIGE_OFF,
            USIOE: IUSI.USIOE_OFF,
            USISWRST: IUSI.USISWRST
        };
        params.USICTL1// USI Control Register 1 = USI.USICTL1_t {
            USICKPH: IUSI.USICKPH_OFF,
            USII2C: IUSI.USII2C_OFF,
            USISTTIE: IUSI.USISTTIE_OFF,
            USIIE: IUSI.USIIE_OFF,
            USIAL: IUSI.USIAL_OFF,
            USISTP: IUSI.USISTP_OFF,
            USISTTIFG: IUSI.USISTTIFG_OFF,
            USIIFG: IUSI.USIIFG
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = USI.ForceSetDefaultRegister_t[] [
            {
                register: "USICTL0",
                regForceSet: false
            },
            {
                register: "USICTL1",
                regForceSet: false
            },
            {
                register: "USICKCTL",
                regForceSet: false
            },
            {
                register: "USICNT",
                regForceSet: false
            }
        ];
        params.interruptSource// USI interrupt enables = USI.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = USI.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getUSIIE// Gets USIIE register() returns Bool
     inst.getUSISTTIE// Gets USISTTIE register() returns Bool
     inst.setUSIIE// Sets USIIE register(Bool set) returns Bool
     inst.setUSISTTIE// Sets USISTTIE register(Bool set) returns Bool
enum USI.USI16B_t
index URL

16-bit shift register enable

Configuration settings
values of type USI.USI16B_t
    const USI.USI16B_OFF;
    // 8-bit shift register mode. Low byte register USISRL is used
    const USI.USI16B;
    // 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously
enum USI.USIAL_t
index URL

Arbitration lost

Configuration settings
values of type USI.USIAL_t
    const USI.USIAL_OFF;
    // No arbitration lost condition
    const USI.USIAL;
    // Arbitration lost
enum USI.USICKPH_t
index URL

Clock phase select

Configuration settings
values of type USI.USICKPH_t
    const USI.USICKPH_OFF;
    // Data is changed on the first SCLK edge and captured on the following edge
    const USI.USICKPH;
    // Data is captured on the first SCLK edge and changed on the following edge
enum USI.USICKPL_t
index URL

Clock polarity select

Configuration settings
values of type USI.USICKPL_t
    const USI.USICKPL_OFF;
    // Inactive state is low
    const USI.USICKPL;
    // Inactive state is high
enum USI.USICNT0_t
index URL

USI bit count - Bit0

Configuration settings
values of type USI.USICNT0_t
    const USI.USICNT0_OFF;
    // USI bit count
    const USI.USICNT0;
    // USI bit count
enum USI.USICNT1_t
index URL

USI bit count - Bit1

Configuration settings
values of type USI.USICNT1_t
    const USI.USICNT1_OFF;
    // USI bit count
    const USI.USICNT1;
    // USI bit count
enum USI.USICNT2_t
index URL

USI bit count - Bit2

Configuration settings
values of type USI.USICNT2_t
    const USI.USICNT2_OFF;
    // USI bit count
    const USI.USICNT2;
    // USI bit count
enum USI.USICNT3_t
index URL

USI bit count - Bit3

Configuration settings
values of type USI.USICNT3_t
    const USI.USICNT3_OFF;
    // USI bit count
    const USI.USICNT3;
    // USI bit count
enum USI.USICNT4_t
index URL

USI bit count - Bit4

Configuration settings
values of type USI.USICNT4_t
    const USI.USICNT4_OFF;
    // USI bit count
    const USI.USICNT4;
    // USI bit count
enum USI.USIDIV_t
index URL

Clock divider select

Configuration settings
values of type USI.USIDIV_t
    const USI.USIDIV_0;
    // Divide by 1
    const USI.USIDIV_1;
    // Divide by 2
    const USI.USIDIV_2;
    // Divide by 4
    const USI.USIDIV_3;
    // Divide by 8
    const USI.USIDIV_4;
    // Divide by 16
    const USI.USIDIV_5;
    // Divide by 32
    const USI.USIDIV_6;
    // Divide by 64
    const USI.USIDIV_7;
    // Divide by 128
enum USI.USIGE_t
index URL

Output latch control

Configuration settings
values of type USI.USIGE_t
    const USI.USIGE_OFF;
    // Output latch enable depends on shift clock
    const USI.USIGE;
    // Output latch always enabled and transparent
enum USI.USII2C_t
index URL

I2C mode enable

Configuration settings
values of type USI.USII2C_t
    const USI.USII2C_OFF;
    // I2C mode disabled
    const USI.USII2C;
    // I2C mode enabled
enum USI.USIIE_t
index URL

USI counter interrupt enable

Configuration settings
values of type USI.USIIE_t
    const USI.USIIE_OFF;
    // Interrupt disabled
    const USI.USIIE;
    // Interrupt enabled
enum USI.USIIFGCC_t
index URL

USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0

Configuration settings
values of type USI.USIIFGCC_t
    const USI.USIIFGCC_OFF;
    // USIIFG automatically cleared on USICNTx update
    const USI.USIIFGCC;
    // USIIFG is not cleared automatically
enum USI.USIIFG_t
index URL

USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0

Configuration settings
values of type USI.USIIFG_t
    const USI.USIIFG_OFF;
    // No interrupt pending
    const USI.USIIFG;
    // Interrupt pending
enum USI.USILSB_t
index URL

LSB first select. This bit controls the direction of the receive and transmit shift register

Configuration settings
values of type USI.USILSB_t
    const USI.USILSB_OFF;
    // MSB first
    const USI.USILSB;
    // LSB first
enum USI.USIMST_t
index URL

Master select

Configuration settings
values of type USI.USIMST_t
    const USI.USIMST_OFF;
    // Slave mode
    const USI.USIMST;
    // Master mode
enum USI.USIOE_t
index URL

Data output enable

Configuration settings
values of type USI.USIOE_t
    const USI.USIOE_OFF;
    // Output disabled
    const USI.USIOE;
    // Output enabled
enum USI.USIPE5_t
index URL

USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode

Configuration settings
values of type USI.USIPE5_t
    const USI.USIPE5_OFF;
    // USI function disabled
    const USI.USIPE5;
    // USI function enabled
enum USI.USIPE6_t
index URL

USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode

Configuration settings
values of type USI.USIPE6_t
    const USI.USIPE6_OFF;
    // USI function disabled
    const USI.USIPE6;
    // USI function enabled
enum USI.USIPE7_t
index URL

USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode

Configuration settings
values of type USI.USIPE7_t
    const USI.USIPE7_OFF;
    // USI function disabled
    const USI.USIPE7;
    // USI function enabled
enum USI.USISCLREL_t
index URL

SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected

Configuration settings
values of type USI.USISCLREL_t
    const USI.USISCLREL_OFF;
    // SCL line is held low if USIIFG is set
    const USI.USISCLREL;
    // SCL line is released
enum USI.USISSEL_t
index URL

Clock source select. Not used in slave mode

Configuration settings
values of type USI.USISSEL_t
    const USI.USISSEL_0;
    // SCLK (Not used in SPI mode)
    const USI.USISSEL_1;
    // ACLK
    const USI.USISSEL_2;
    // SMCLK
    const USI.USISSEL_3;
    // SMCLK
    const USI.USISSEL_4;
    // USISWCLK bit
    const USI.USISSEL_5;
    // TACCR0
    const USI.USISSEL_6;
    // TACCR1
    const USI.USISSEL_7;
    // TACCR2 (Reserved on MSP430F20xx devices)
enum USI.USISTP_t
index URL

STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0

Configuration settings
values of type USI.USISTP_t
    const USI.USISTP_OFF;
    // No STOP condition received
    const USI.USISTP;
    // STOP condition received
enum USI.USISTTIE_t
index URL

START condition interrupt-enable

Configuration settings
values of type USI.USISTTIE_t
    const USI.USISTTIE_OFF;
    // Interrupt on START condition disabled
    const USI.USISTTIE;
    // Interrupt on START condition enabled
enum USI.USISTTIFG_t
index URL

START condition interrupt flag

Configuration settings
values of type USI.USISTTIFG_t
    const USI.USISTTIFG_OFF;
    // No START condition received. No interrupt pending
    const USI.USISTTIFG;
    // START condition received. Interrupt pending
enum USI.USISWCLK_t
index URL

Software clock

Configuration settings
values of type USI.USISWCLK_t
    const USI.USISWCLK_OFF;
    // Input clock is low
    const USI.USISWCLK;
    // Input clock is high
enum USI.USISWRST_t
index URL

USI software reset

Configuration settings
values of type USI.USISWRST_t
    const USI.USISWRST_OFF;
    // USI released for operation
    const USI.USISWRST;
    // USI logic held in reset state
struct USI.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new USI.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct USI.USICKCTL_t
index URL
Configuration settings
var obj = new USI.USICKCTL_t;
    obj.USIDIV = IUSI.USIDIV_t ...
    // Clock divider select 000 Divide by 1 001 Divide by 2 010 Divide by 4 011 Divide by 8 100 Divide by 16 101 Divide by 32 110 Divide by 64 111 Divide by 128
    obj.USISSEL = IUSI.USISSEL_t ...
    // Clock source select. Not used in slave mode. 000 SCLK (Not used in SPI mode) 001 ACLK 010 SMCLK 011 SMCLK 100 USISWCLK bit 101 TACCR0 110 TACCR1 111 TACCR2 (Reserved on MSP430F20xx devices)
    obj.USICKPL = IUSI.USICKPL_t ...
    // Clock polarity select 0 Inactive state is low 1 Inactive state is high
    obj.USISWCLK = IUSI.USISWCLK_t ...
    // Software clock 0 Input clock is low 1 Input clock is high
struct USI.USICNT_t
index URL
Configuration settings
var obj = new USI.USICNT_t;
    obj.USISCLREL = IUSI.USISCLREL_t ...
    // SCL release. The SCL line is released from low to idle. USISCLREL is cleared if a START condition is detected. 0 SCL line is held low if USIIFG is set 1 SCL line is released
    obj.USI16B = IUSI.USI16B_t ...
    // 16-bit shift register enable 0 8-bit shift register mode. Low byte register USISRL is used. 1 16-bit shift register mode. Both high and low byte registers USISRL and USISRH are used. USISR addresses all 16 bits simultaneously
    obj.USIIFGCC = IUSI.USIIFGCC_t ...
    // USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be cleared automatically when USICNTx is written with a value > 0. 0 USIIFG automatically cleared on USICNTx update 1 USIIFG is not cleared automatically
    obj.USICNT4 = IUSI.USICNT4_t ...
    // USI bit count bit 4 The USICNTx bits set the number of bits to be received or transmitted
    obj.USICNT3 = IUSI.USICNT3_t ...
    // USI bit count bit 3 The USICNTx bits set the number of bits to be received or transmitted
    obj.USICNT2 = IUSI.USICNT2_t ...
    // USI bit count bit 2 The USICNTx bits set the number of bits to be received or transmitted
    obj.USICNT1 = IUSI.USICNT1_t ...
    // USI bit count bit 1 The USICNTx bits set the number of bits to be received or transmitted
    obj.USICNT0 = IUSI.USICNT0_t ...
    // USI bit count bit 0 The USICNTx bits set the number of bits to be received or transmitted
struct USI.USICTL0_t
index URL
Configuration settings
var obj = new USI.USICTL0_t;
    obj.USIPE7 = IUSI.USIPE7_t ...
    // USI SDI/SDA port enable. Input in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled
    obj.USIPE6 = IUSI.USIPE6_t ...
    // USI SDO/SCL port enable. Output in SPI mode, input or open drain output in I2C mode. 0 USI function disabled 1 USI function enabled
    obj.USIPE5 = IUSI.USIPE5_t ...
    // USI SCLK port enable. Input in SPI slave mode, or I2C mode, output in SPI master mode. 0 USI function disabled 1 USI function enabled
    obj.USILSB = IUSI.USILSB_t ...
    // LSB first select. This bit controls the direction of the receive and transmit shift register. 0 MSB first 1 LSB first
    obj.USIMST = IUSI.USIMST_t ...
    // Master select 0 Slave mode 1 Master mode
    obj.USIGE = IUSI.USIGE_t ...
    // Output latch control 0 Output latch enable depends on shift clock 1 Output latch always enabled and transparent
    obj.USIOE = IUSI.USIOE_t ...
    // Data output enable 0 Output disabled 1 Output enabled
    obj.USISWRST = IUSI.USISWRST_t ...
    // USI software reset 0 USI released for operation. 1 USI logic held in reset state
struct USI.USICTL1_t
index URL
Configuration settings
var obj = new USI.USICTL1_t;
    obj.USICKPH = IUSI.USICKPH_t ...
    // Clock phase select 0 Data is changed on the first SCLK edge and captured on the following edge. 1 Data is captured on the first SCLK edge and changed on the following edge
    obj.USII2C = IUSI.USII2C_t ...
    // I2C mode enable 0 I2C mode disabled 1 I2C mode enabled
    obj.USISTTIE = IUSI.USISTTIE_t ...
    // START condition interrupt-enable 0 Interrupt on START condition disabled 1 Interrupt on START condition enabled
    obj.USIIE = IUSI.USIIE_t ...
    // USI counter interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.USIAL = IUSI.USIAL_t ...
    // Arbitration lost 0 No arbitration lost condition 1 Arbitration lost
    obj.USISTP = IUSI.USISTP_t ...
    // STOP condition received. USISTP is automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No STOP condition received 1 STOP condition received
    obj.USISTTIFG = IUSI.USISTTIFG_t ...
    // START condition interrupt flag 0 No START condition received. No interrupt pending. 1 START condition received. Interrupt pending
    obj.USIIFG = IUSI.USIIFG_t ...
    // USI counter interrupt flag. Set when the USICNTx = 0. Automatically cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. 0 No interrupt pending 1 Interrupt pending
struct USI.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new USI.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
USI.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
USI.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
USI.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
USI.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new USI.Params;
// Instance config-params object
    params.USICKCTL = USI.USICKCTL_t {
    // USI Clock Control Register
        USIDIV: IUSI.USIDIV_0,
        USISSEL: IUSI.USISSEL_0,
        USICKPL: IUSI.USICKPL_OFF,
        USISWCLK: IUSI.USISWCLK_OFF
    };
    params.USICNT = USI.USICNT_t {
    // USI Bit Counter Register
        USISCLREL: IUSI.USISCLREL_OFF,
        USI16B: IUSI.USI16B_OFF,
        USIIFGCC: IUSI.USIIFGCC_OFF,
        USICNT4: IUSI.USICNT4_OFF,
        USICNT3: IUSI.USICNT3_OFF,
        USICNT2: IUSI.USICNT2_OFF,
        USICNT1: IUSI.USICNT1_OFF,
        USICNT0: IUSI.USICNT0_OFF
    };
    params.USICTL0 = USI.USICTL0_t {
    // USI Control Register 0
        USIPE7: IUSI.USIPE7_OFF,
        USIPE6: IUSI.USIPE6_OFF,
        USIPE5: IUSI.USIPE5_OFF,
        USILSB: IUSI.USILSB_OFF,
        USIMST: IUSI.USIMST_OFF,
        USIGE: IUSI.USIGE_OFF,
        USIOE: IUSI.USIOE_OFF,
        USISWRST: IUSI.USISWRST
    };
    params.USICTL1 = USI.USICTL1_t {
    // USI Control Register 1
        USICKPH: IUSI.USICKPH_OFF,
        USII2C: IUSI.USII2C_OFF,
        USISTTIE: IUSI.USISTTIE_OFF,
        USIIE: IUSI.USIIE_OFF,
        USIAL: IUSI.USIAL_OFF,
        USISTP: IUSI.USISTP_OFF,
        USISTTIFG: IUSI.USISTTIFG_OFF,
        USIIFG: IUSI.USIIFG
    };
    params.forceSetDefaultRegister = USI.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "USICTL0",
            regForceSet: false
        },
        {
            register: "USICTL1",
            regForceSet: false
        },
        {
            register: "USICKCTL",
            regForceSet: false
        },
        {
            register: "USICNT",
            regForceSet: false
        }
    ];
    params.interruptSource = USI.regIntVect_t[2] undefined;
    // USI interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config USI.Params.USICKCTL // instance
index URL

USI Clock Control Register

Configuration settings
var params = new USI.Params;
...
params.USICKCTL = USI.USICKCTL_t {
    USIDIV: IUSI.USIDIV_0,
    USISSEL: IUSI.USISSEL_0,
    USICKPL: IUSI.USICKPL_OFF,
    USISWCLK: IUSI.USISWCLK_OFF
};
config USI.Params.USICNT // instance
index URL

USI Bit Counter Register

Configuration settings
var params = new USI.Params;
...
params.USICNT = USI.USICNT_t {
    USISCLREL: IUSI.USISCLREL_OFF,
    USI16B: IUSI.USI16B_OFF,
    USIIFGCC: IUSI.USIIFGCC_OFF,
    USICNT4: IUSI.USICNT4_OFF,
    USICNT3: IUSI.USICNT3_OFF,
    USICNT2: IUSI.USICNT2_OFF,
    USICNT1: IUSI.USICNT1_OFF,
    USICNT0: IUSI.USICNT0_OFF
};
config USI.Params.USICTL0 // instance
index URL

USI Control Register 0

Configuration settings
var params = new USI.Params;
...
params.USICTL0 = USI.USICTL0_t {
    USIPE7: IUSI.USIPE7_OFF,
    USIPE6: IUSI.USIPE6_OFF,
    USIPE5: IUSI.USIPE5_OFF,
    USILSB: IUSI.USILSB_OFF,
    USIMST: IUSI.USIMST_OFF,
    USIGE: IUSI.USIGE_OFF,
    USIOE: IUSI.USIOE_OFF,
    USISWRST: IUSI.USISWRST
};
config USI.Params.USICTL1 // instance
index URL

USI Control Register 1

Configuration settings
var params = new USI.Params;
...
params.USICTL1 = USI.USICTL1_t {
    USICKPH: IUSI.USICKPH_OFF,
    USII2C: IUSI.USII2C_OFF,
    USISTTIE: IUSI.USISTTIE_OFF,
    USIIE: IUSI.USIIE_OFF,
    USIAL: IUSI.USIAL_OFF,
    USISTP: IUSI.USISTP_OFF,
    USISTTIFG: IUSI.USISTTIFG_OFF,
    USIIFG: IUSI.USIIFG
};
config USI.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new USI.Params;
...
const params.forceSetDefaultRegister = USI.ForceSetDefaultRegister_t[] [
    {
        register: "USICTL0",
        regForceSet: false
    },
    {
        register: "USICTL1",
        regForceSet: false
    },
    {
        register: "USICKCTL",
        regForceSet: false
    },
    {
        register: "USICNT",
        regForceSet: false
    }
];
config USI.Params.interruptSource // instance
index URL

USI interrupt enables

Configuration settings
var params = new USI.Params;
...
params.interruptSource = USI.regIntVect_t[2] undefined;
config USI.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new USI.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config USI.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new USI.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new USI.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = USI.create(IClock.Instance clock, params);
// Create an instance-object
USI.getUSIIE() // instance
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Gets USIIE register

Configuration settings
inst.getUSIIE() returns Bool
SEE
setUSIIE
USI.getUSISTTIE() // instance
index URL

Gets USISTTIE register

Configuration settings
inst.getUSISTTIE() returns Bool
SEE
getUSISTTIE
USI.setUSIIE() // instance
index URL

Sets USIIE register

Configuration settings
inst.setUSIIE(Bool set) returns Bool
SEE
setUSIIE
USI.setUSISTTIE() // instance
index URL

Sets USISTTIE register

Configuration settings
inst.setUSISTTIE(Bool set) returns Bool
SEE
setUSISTTIE
generated on Sun, 25 Nov 2018 22:20:11 GMT


package ti.catalog.msp430.peripherals.comparator
index URL

MSP430 Flash memory peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/package.xdc
package ti.catalog.msp430.peripherals.comparator [1, 0, 0] {
    interface IComparator;
    // MSP430 IComparator interface
    module Comparator_Aplus;
    // MSP430F2xx Family Comparator_Aplus Module
    module Comparator_D;
    // MSP430FR5xx Family Comparator_D Module
    module Comparator_E;
    // MSP430FR5xx Family Comparator_E Module
}
generated on Sun, 25 Nov 2018 22:20:11 GMT


module ti.catalog.msp430.peripherals.comparator.Comparator_Aplus

metaonly module ti.catalog.msp430.peripherals.comparator.Comparator_Aplus
index URL

MSP430F2xx Family Comparator_Aplus Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/comparator/Comparator_Aplus.xdc
var Comparator_Aplus = xdc.useModule('ti.catalog.msp430.peripherals.comparator.Comparator_Aplus');
module-wide constants & types
    values of type Comparator_Aplus.CAEX_t// CAEX Bit
        const Comparator_Aplus.CAEX_OFF// Disable CAEX bit;
        const Comparator_Aplus.CAEX// Enable CAEX bit;
    values of type Comparator_Aplus.CAF_t// CAF Bit
        const Comparator_Aplus.CAF_OFF// Disable CAF bit;
        const Comparator_Aplus.CAF// Enable CAF bit;
    values of type Comparator_Aplus.CAIES_t// CAIES Bit
        const Comparator_Aplus.CAIES_OFF// Rising Edge;
        const Comparator_Aplus.CAIES// Falling Edge;
    values of type Comparator_Aplus.CAIE_t// CAIE Bit
        const Comparator_Aplus.CAIE_OFF// Disable CAIE bit;
        const Comparator_Aplus.CAIE// Enable CAIE bit;
    values of type Comparator_Aplus.CAIFG_t// CAIFG Bit
        const Comparator_Aplus.CAIFG_OFF// Disable CAIFG bit;
        const Comparator_Aplus.CAIFG// Enable CAIFG bit;
    values of type Comparator_Aplus.CAON_t// CAON Bit
        const Comparator_Aplus.CAON_OFF// Disable CAON bit;
        const Comparator_Aplus.CAON// Enable CAON bit;
    values of type Comparator_Aplus.CAPD0_t// CAPD0 Bit
        const Comparator_Aplus.CAPD0_OFF// Disable CAPD0 bit;
        const Comparator_Aplus.CAPD0// Enable CAPD0 bit;
    values of type Comparator_Aplus.CAPD1_t// CAPD1 Bit
        const Comparator_Aplus.CAPD1_OFF// Disable CAPD1 bit;
        const Comparator_Aplus.CAPD1// Enable CAPD1 bit;
    values of type Comparator_Aplus.CAPD2_t// CAPD2 Bit
        const Comparator_Aplus.CAPD2_OFF// Disable CAPD2 bit;
        const Comparator_Aplus.CAPD2// Enable CAPD2 bit;
    values of type Comparator_Aplus.CAPD3_t// CAPD3 Bit
        const Comparator_Aplus.CAPD3_OFF// Disable CAPD3 bit;
        const Comparator_Aplus.CAPD3// Enable CAPD3 bit;
    values of type Comparator_Aplus.CAPD4_t// CAPD4 Bit
        const Comparator_Aplus.CAPD4_OFF// Disable CAPD4 bit;
        const Comparator_Aplus.CAPD4// Enable CAPD4 bit;
    values of type Comparator_Aplus.CAPD5_t// CAPD5 Bit
        const Comparator_Aplus.CAPD5_OFF// Disable CAPD5 bit;
        const Comparator_Aplus.CAPD5// Enable CAPD5 bit;
    values of type Comparator_Aplus.CAPD6_t// CAPD6 Bit
        const Comparator_Aplus.CAPD6_OFF// Disable CAPD6 bit;
        const Comparator_Aplus.CAPD6// Enable CAPD6 bit;
    values of type Comparator_Aplus.CAPD7_t// CAPD7 Bit
        const Comparator_Aplus.CAPD7_OFF// Disable CAPD7 bit;
        const Comparator_Aplus.CAPD7// Enable CAPD7 bit;
    values of type Comparator_Aplus.CAREF_t// CAREF Bit
        const Comparator_Aplus.CAREF_0// Reference Off;
        const Comparator_Aplus.CAREF_1// 0.25 * VCC;
        const Comparator_Aplus.CAREF_2// 0.50 * VCC;
        const Comparator_Aplus.CAREF_3// Diode Reference;
    values of type Comparator_Aplus.CARSEL_t// CARSEL Bit
        const Comparator_Aplus.CARSEL_OFF// Disable CARSEL bit;
        const Comparator_Aplus.CARSEL// Enable CARSEL bit;
    values of type Comparator_Aplus.CASHORT_t// CASHORT Bit
        const Comparator_Aplus.CASHORT_OFF// Disable CASHORT bit;
        const Comparator_Aplus.CASHORT// Enable CASHORT bit;
    values of type Comparator_Aplus.P2CA0_t// P2CA0 Bit
        const Comparator_Aplus.P2CA0_OFF// Disable P2CA0 bit;
        const Comparator_Aplus.P2CA0// Enable P2CA0 bit;
    values of type Comparator_Aplus.P2CA1_t// P2CA1 Bit
        const Comparator_Aplus.P2CA1_OFF// Disable P2CA1 bit;
        const Comparator_Aplus.P2CA1// Enable P2CA1 bit;
    values of type Comparator_Aplus.P2CA2_t// P2CA2 Bit
        const Comparator_Aplus.P2CA2_OFF// Disable P2CA2 bit;
        const Comparator_Aplus.P2CA2// Enable P2CA2 bit;
    values of type Comparator_Aplus.P2CA3_t// P2CA3 Bit
        const Comparator_Aplus.P2CA3_OFF// Disable P2CA3 bit;
        const Comparator_Aplus.P2CA3// Enable P2CA3 bit;
    values of type Comparator_Aplus.P2CA4_t// P2CA4 Bit
        const Comparator_Aplus.P2CA4_OFF// Disable P2CA4 bit;
        const Comparator_Aplus.P2CA4// Enable P2CA4 bit;
    var obj = new Comparator_Aplus.CACTL1_t// CACTL1 Register;
        obj.CAEX// Comparator_A+ exchange. This bit exchanges the comparator inputs and inverts the comparator output = Comparator_Aplus.CAEX_t ...
        obj.CARSEL// Comparator_A+ reference select. This bit selects which terminal the VCAREF is applied to. When CAEX = 0: 0 VCAREF is applied to the + terminal 1 VCAREF is applied to the - terminal When CAEX = 1: 0 VCAREF is applied to the - terminal 1 VCAREF is applied to the + terminal = Comparator_Aplus.CARSEL_t ...
        obj.CAREF// Comparator_A+ reference. These bits select the reference voltage VCAREF. 00 Internal reference off. An external reference can be applied. 01 0.25*VCC 10 0.50*VCC 11 Diode reference is selected = Comparator_Aplus.CAREF_t ...
        obj.CAON// Comparator_A+ on. This bit turns on the comparator. When the comparator is off it consumes no current. The reference circuitry is enabled or disabled independently. 0 Off 1 On = Comparator_Aplus.CAON_t ...
        obj.CAIES// Comparator_A interrupt edge select 0 Rising edge 1 Falling edge = Comparator_Aplus.CAIES_t ...
        obj.CAIE// Comparator_A+ interrupt enable 0 Disabled 1 Enabled = Comparator_Aplus.CAIE_t ...
        obj.CAIFG// The Comparator_A+ interrupt flag 0 No interrupt pending 1 Interrupt pending = Comparator_Aplus.CAIFG_t ...
    var obj = new Comparator_Aplus.CACTL2_t// CACTL1 Register;
        obj.CASHORT// Input short. This bit shorts the + and - input terminals. 0 Inputs not shorted. 1 Inputs shorted = Comparator_Aplus.CASHORT_t ...
        obj.P2CA4// Input select. This bit together with P2CA0 selects the + terminal input when CAEX = 0 and the - terminal input when CAEX = 1 = Comparator_Aplus.P2CA4_t ...
        obj.P2CA3// Input select. These bits select the - terminal input when CAEX = 0 and the + terminal input when CAEX = 1. 000 No connection 001 CA1 010 CA2 011 CA3 100 CA4 101 CA5 110 CA6 111 CA7 = Comparator_Aplus.P2CA3_t ...
        obj.P2CA2// Input select. These bits select the - terminal input when CAEX = 0 and the + terminal input when CAEX = 1. 000 No connection 001 CA1 010 CA2 011 CA3 100 CA4 101 CA5 110 CA6 111 CA7 = Comparator_Aplus.P2CA2_t ...
        obj.P2CA1// Input select. These bits select the - terminal input when CAEX = 0 and the + terminal input when CAEX = 1. 000 No connection 001 CA1 010 CA2 011 CA3 100 CA4 101 CA5 110 CA6 111 CA7 = Comparator_Aplus.P2CA1_t ...
        obj.P2CA0// Input select. This bit, together with P2CA4, selects the + terminal input when CAEX = 0 and the - terminal input when CAEX = 1. 00 No connection 01 CA0 10 CA1 11 CA2 = Comparator_Aplus.P2CA0_t ...
        obj.CAF// Comparator_A+ output filter 0 Comparator_A+ output is not filtered 1 Comparator_A+ output is filtered = Comparator_Aplus.CAF_t ...
    var obj = new Comparator_Aplus.CAPD_t// CAPD, Register;
        obj.CAPD7// CAPD7 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD7_t ...
        obj.CAPD6// CAPD6 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD6_t ...
        obj.CAPD5// CAPD5 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD5_t ...
        obj.CAPD4// CAPD4 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD4_t ...
        obj.CAPD3// CAPD3 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD3_t ...
        obj.CAPD2// CAPD2 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD2_t ...
        obj.CAPD1// CAPD1 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD1_t ...
        obj.CAPD0// CAPD0 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled = Comparator_Aplus.CAPD0_t ...
    var obj = new Comparator_Aplus.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Comparator_Aplus.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Comparator_Aplus.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Comparator_Aplus.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Comparator_Aplus.Params// Instance config-params object;
        params.CACTL1// CACTL1 Register = Comparator_Aplus.CACTL1_t {
            CAEX: IComparator.CAEX_OFF,
            CARSEL: IComparator.CARSEL_OFF,
            CAREF: IComparator.CAREF_0,
            CAON: IComparator.CAON_OFF,
            CAIES: IComparator.CAIES_OFF,
            CAIE: IComparator.CAIE_OFF,
            CAIFG: IComparator.CAIFG_OFF
        };
        params.CACTL2// CACTL2 Register = Comparator_Aplus.CACTL2_t {
            CASHORT: IComparator.CASHORT_OFF,
            P2CA4: IComparator.P2CA4_OFF,
            P2CA3: IComparator.P2CA3_OFF,
            P2CA2: IComparator.P2CA2_OFF,
            P2CA1: IComparator.P2CA1_OFF,
            P2CA0: IComparator.P2CA0_OFF,
            CAF: IComparator.CAF_OFF
        };
        params.CAPD// CAPD, Register = Comparator_Aplus.CAPD_t {
            CAPD7: IComparator.CAPD7_OFF,
            CAPD6: IComparator.CAPD6_OFF,
            CAPD5: IComparator.CAPD5_OFF,
            CAPD4: IComparator.CAPD4_OFF,
            CAPD3: IComparator.CAPD3_OFF,
            CAPD2: IComparator.CAPD2_OFF,
            CAPD1: IComparator.CAPD1_OFF,
            CAPD0: IComparator.CAPD0_OFF
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Comparator_Aplus.ForceSetDefaultRegister_t[] [
            {
                register: "CACTL1",
                regForceSet: false
            },
            {
                register: "CACTL2",
                regForceSet: false
            },
            {
                register: "CAPD",
                regForceSet: false
            }
        ];
        params.interruptSource// Comparator_A+ has 1 interrupt enable = Comparator_Aplus.regIntVect_t[1] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Comparator_Aplus.create// Create an instance-object(params);
enum Comparator_Aplus.CAEX_t
index URL

CAEX Bit

Configuration settings
values of type Comparator_Aplus.CAEX_t
    const Comparator_Aplus.CAEX_OFF;
    // Disable CAEX bit
    const Comparator_Aplus.CAEX;
    // Enable CAEX bit
enum Comparator_Aplus.CAF_t
index URL

CAF Bit

Configuration settings
values of type Comparator_Aplus.CAF_t
    const Comparator_Aplus.CAF_OFF;
    // Disable CAF bit
    const Comparator_Aplus.CAF;
    // Enable CAF bit
enum Comparator_Aplus.CAIES_t
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CAIES Bit

Configuration settings
values of type Comparator_Aplus.CAIES_t
    const Comparator_Aplus.CAIES_OFF;
    // Rising Edge
    const Comparator_Aplus.CAIES;
    // Falling Edge
enum Comparator_Aplus.CAIE_t
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CAIE Bit

Configuration settings
values of type Comparator_Aplus.CAIE_t
    const Comparator_Aplus.CAIE_OFF;
    // Disable CAIE bit
    const Comparator_Aplus.CAIE;
    // Enable CAIE bit
enum Comparator_Aplus.CAIFG_t
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CAIFG Bit

Configuration settings
values of type Comparator_Aplus.CAIFG_t
    const Comparator_Aplus.CAIFG_OFF;
    // Disable CAIFG bit
    const Comparator_Aplus.CAIFG;
    // Enable CAIFG bit
enum Comparator_Aplus.CAON_t
index URL

CAON Bit

Configuration settings
values of type Comparator_Aplus.CAON_t
    const Comparator_Aplus.CAON_OFF;
    // Disable CAON bit
    const Comparator_Aplus.CAON;
    // Enable CAON bit
enum Comparator_Aplus.CAPD0_t
index URL

CAPD0 Bit

Configuration settings
values of type Comparator_Aplus.CAPD0_t
    const Comparator_Aplus.CAPD0_OFF;
    // Disable CAPD0 bit
    const Comparator_Aplus.CAPD0;
    // Enable CAPD0 bit
enum Comparator_Aplus.CAPD1_t
index URL

CAPD1 Bit

Configuration settings
values of type Comparator_Aplus.CAPD1_t
    const Comparator_Aplus.CAPD1_OFF;
    // Disable CAPD1 bit
    const Comparator_Aplus.CAPD1;
    // Enable CAPD1 bit
enum Comparator_Aplus.CAPD2_t
index URL

CAPD2 Bit

Configuration settings
values of type Comparator_Aplus.CAPD2_t
    const Comparator_Aplus.CAPD2_OFF;
    // Disable CAPD2 bit
    const Comparator_Aplus.CAPD2;
    // Enable CAPD2 bit
enum Comparator_Aplus.CAPD3_t
index URL

CAPD3 Bit

Configuration settings
values of type Comparator_Aplus.CAPD3_t
    const Comparator_Aplus.CAPD3_OFF;
    // Disable CAPD3 bit
    const Comparator_Aplus.CAPD3;
    // Enable CAPD3 bit
enum Comparator_Aplus.CAPD4_t
index URL

CAPD4 Bit

Configuration settings
values of type Comparator_Aplus.CAPD4_t
    const Comparator_Aplus.CAPD4_OFF;
    // Disable CAPD4 bit
    const Comparator_Aplus.CAPD4;
    // Enable CAPD4 bit
enum Comparator_Aplus.CAPD5_t
index URL

CAPD5 Bit

Configuration settings
values of type Comparator_Aplus.CAPD5_t
    const Comparator_Aplus.CAPD5_OFF;
    // Disable CAPD5 bit
    const Comparator_Aplus.CAPD5;
    // Enable CAPD5 bit
enum Comparator_Aplus.CAPD6_t
index URL

CAPD6 Bit

Configuration settings
values of type Comparator_Aplus.CAPD6_t
    const Comparator_Aplus.CAPD6_OFF;
    // Disable CAPD6 bit
    const Comparator_Aplus.CAPD6;
    // Enable CAPD6 bit
enum Comparator_Aplus.CAPD7_t
index URL

CAPD7 Bit

Configuration settings
values of type Comparator_Aplus.CAPD7_t
    const Comparator_Aplus.CAPD7_OFF;
    // Disable CAPD7 bit
    const Comparator_Aplus.CAPD7;
    // Enable CAPD7 bit
enum Comparator_Aplus.CAREF_t
index URL

CAREF Bit

Configuration settings
values of type Comparator_Aplus.CAREF_t
    const Comparator_Aplus.CAREF_0;
    // Reference Off
    const Comparator_Aplus.CAREF_1;
    // 0.25 * VCC
    const Comparator_Aplus.CAREF_2;
    // 0.50 * VCC
    const Comparator_Aplus.CAREF_3;
    // Diode Reference
enum Comparator_Aplus.CARSEL_t
index URL

CARSEL Bit

Configuration settings
values of type Comparator_Aplus.CARSEL_t
    const Comparator_Aplus.CARSEL_OFF;
    // Disable CARSEL bit
    const Comparator_Aplus.CARSEL;
    // Enable CARSEL bit
enum Comparator_Aplus.CASHORT_t
index URL

CASHORT Bit

Configuration settings
values of type Comparator_Aplus.CASHORT_t
    const Comparator_Aplus.CASHORT_OFF;
    // Disable CASHORT bit
    const Comparator_Aplus.CASHORT;
    // Enable CASHORT bit
enum Comparator_Aplus.P2CA0_t
index URL

P2CA0 Bit

Configuration settings
values of type Comparator_Aplus.P2CA0_t
    const Comparator_Aplus.P2CA0_OFF;
    // Disable P2CA0 bit
    const Comparator_Aplus.P2CA0;
    // Enable P2CA0 bit
enum Comparator_Aplus.P2CA1_t
index URL

P2CA1 Bit

Configuration settings
values of type Comparator_Aplus.P2CA1_t
    const Comparator_Aplus.P2CA1_OFF;
    // Disable P2CA1 bit
    const Comparator_Aplus.P2CA1;
    // Enable P2CA1 bit
enum Comparator_Aplus.P2CA2_t
index URL

P2CA2 Bit

Configuration settings
values of type Comparator_Aplus.P2CA2_t
    const Comparator_Aplus.P2CA2_OFF;
    // Disable P2CA2 bit
    const Comparator_Aplus.P2CA2;
    // Enable P2CA2 bit
enum Comparator_Aplus.P2CA3_t
index URL

P2CA3 Bit

Configuration settings
values of type Comparator_Aplus.P2CA3_t
    const Comparator_Aplus.P2CA3_OFF;
    // Disable P2CA3 bit
    const Comparator_Aplus.P2CA3;
    // Enable P2CA3 bit
enum Comparator_Aplus.P2CA4_t
index URL

P2CA4 Bit

Configuration settings
values of type Comparator_Aplus.P2CA4_t
    const Comparator_Aplus.P2CA4_OFF;
    // Disable P2CA4 bit
    const Comparator_Aplus.P2CA4;
    // Enable P2CA4 bit
struct Comparator_Aplus.CACTL1_t
index URL

CACTL1 Register

Configuration settings
var obj = new Comparator_Aplus.CACTL1_t;
    obj.CAEX = Comparator_Aplus.CAEX_t ...
    // Comparator_A+ exchange. This bit exchanges the comparator inputs and inverts the comparator output
    obj.CARSEL = Comparator_Aplus.CARSEL_t ...
    // Comparator_A+ reference select. This bit selects which terminal the VCAREF is applied to. When CAEX = 0: 0 VCAREF is applied to the + terminal 1 VCAREF is applied to the - terminal When CAEX = 1: 0 VCAREF is applied to the - terminal 1 VCAREF is applied to the + terminal
    obj.CAREF = Comparator_Aplus.CAREF_t ...
    // Comparator_A+ reference. These bits select the reference voltage VCAREF. 00 Internal reference off. An external reference can be applied. 01 0.25*VCC 10 0.50*VCC 11 Diode reference is selected
    obj.CAON = Comparator_Aplus.CAON_t ...
    // Comparator_A+ on. This bit turns on the comparator. When the comparator is off it consumes no current. The reference circuitry is enabled or disabled independently. 0 Off 1 On
    obj.CAIES = Comparator_Aplus.CAIES_t ...
    // Comparator_A interrupt edge select 0 Rising edge 1 Falling edge
    obj.CAIE = Comparator_Aplus.CAIE_t ...
    // Comparator_A+ interrupt enable 0 Disabled 1 Enabled
    obj.CAIFG = Comparator_Aplus.CAIFG_t ...
    // The Comparator_A+ interrupt flag 0 No interrupt pending 1 Interrupt pending
struct Comparator_Aplus.CACTL2_t
index URL

CACTL1 Register

Configuration settings
var obj = new Comparator_Aplus.CACTL2_t;
    obj.CASHORT = Comparator_Aplus.CASHORT_t ...
    // Input short. This bit shorts the + and - input terminals. 0 Inputs not shorted. 1 Inputs shorted
    obj.P2CA4 = Comparator_Aplus.P2CA4_t ...
    // Input select. This bit together with P2CA0 selects the + terminal input when CAEX = 0 and the - terminal input when CAEX = 1
    obj.P2CA3 = Comparator_Aplus.P2CA3_t ...
    // Input select. These bits select the - terminal input when CAEX = 0 and the + terminal input when CAEX = 1. 000 No connection 001 CA1 010 CA2 011 CA3 100 CA4 101 CA5 110 CA6 111 CA7
    obj.P2CA2 = Comparator_Aplus.P2CA2_t ...
    // Input select. These bits select the - terminal input when CAEX = 0 and the + terminal input when CAEX = 1. 000 No connection 001 CA1 010 CA2 011 CA3 100 CA4 101 CA5 110 CA6 111 CA7
    obj.P2CA1 = Comparator_Aplus.P2CA1_t ...
    // Input select. These bits select the - terminal input when CAEX = 0 and the + terminal input when CAEX = 1. 000 No connection 001 CA1 010 CA2 011 CA3 100 CA4 101 CA5 110 CA6 111 CA7
    obj.P2CA0 = Comparator_Aplus.P2CA0_t ...
    // Input select. This bit, together with P2CA4, selects the + terminal input when CAEX = 0 and the - terminal input when CAEX = 1. 00 No connection 01 CA0 10 CA1 11 CA2
    obj.CAF = Comparator_Aplus.CAF_t ...
    // Comparator_A+ output filter 0 Comparator_A+ output is not filtered 1 Comparator_A+ output is filtered
struct Comparator_Aplus.CAPD_t
index URL

CAPD, Register

Configuration settings
var obj = new Comparator_Aplus.CAPD_t;
    obj.CAPD7 = Comparator_Aplus.CAPD7_t ...
    // CAPD7 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
    obj.CAPD6 = Comparator_Aplus.CAPD6_t ...
    // CAPD6 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
    obj.CAPD5 = Comparator_Aplus.CAPD5_t ...
    // CAPD5 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
    obj.CAPD4 = Comparator_Aplus.CAPD4_t ...
    // CAPD4 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
    obj.CAPD3 = Comparator_Aplus.CAPD3_t ...
    // CAPD3 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
    obj.CAPD2 = Comparator_Aplus.CAPD2_t ...
    // CAPD2 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
    obj.CAPD1 = Comparator_Aplus.CAPD1_t ...
    // CAPD1 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
    obj.CAPD0 = Comparator_Aplus.CAPD0_t ...
    // CAPD0 Comparator_A+ port disable 0 The input buffer is enabled. 1 The input buffer is disabled
struct Comparator_Aplus.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Comparator_Aplus.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Comparator_Aplus.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Comparator_Aplus.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Comparator_Aplus.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Comparator_Aplus.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Comparator_Aplus.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Comparator_Aplus.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Comparator_Aplus.Params;
// Instance config-params object
    params.CACTL1 = Comparator_Aplus.CACTL1_t {
    // CACTL1 Register
        CAEX: IComparator.CAEX_OFF,
        CARSEL: IComparator.CARSEL_OFF,
        CAREF: IComparator.CAREF_0,
        CAON: IComparator.CAON_OFF,
        CAIES: IComparator.CAIES_OFF,
        CAIE: IComparator.CAIE_OFF,
        CAIFG: IComparator.CAIFG_OFF
    };
    params.CACTL2 = Comparator_Aplus.CACTL2_t {
    // CACTL2 Register
        CASHORT: IComparator.CASHORT_OFF,
        P2CA4: IComparator.P2CA4_OFF,
        P2CA3: IComparator.P2CA3_OFF,
        P2CA2: IComparator.P2CA2_OFF,
        P2CA1: IComparator.P2CA1_OFF,
        P2CA0: IComparator.P2CA0_OFF,
        CAF: IComparator.CAF_OFF
    };
    params.CAPD = Comparator_Aplus.CAPD_t {
    // CAPD, Register
        CAPD7: IComparator.CAPD7_OFF,
        CAPD6: IComparator.CAPD6_OFF,
        CAPD5: IComparator.CAPD5_OFF,
        CAPD4: IComparator.CAPD4_OFF,
        CAPD3: IComparator.CAPD3_OFF,
        CAPD2: IComparator.CAPD2_OFF,
        CAPD1: IComparator.CAPD1_OFF,
        CAPD0: IComparator.CAPD0_OFF
    };
    params.forceSetDefaultRegister = Comparator_Aplus.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "CACTL1",
            regForceSet: false
        },
        {
            register: "CACTL2",
            regForceSet: false
        },
        {
            register: "CAPD",
            regForceSet: false
        }
    ];
    params.interruptSource = Comparator_Aplus.regIntVect_t[1] undefined;
    // Comparator_A+ has 1 interrupt enable
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Comparator_Aplus.Params.CACTL1 // instance
index URL

CACTL1 Register

Configuration settings
var params = new Comparator_Aplus.Params;
...
params.CACTL1 = Comparator_Aplus.CACTL1_t {
    CAEX: IComparator.CAEX_OFF,
    CARSEL: IComparator.CARSEL_OFF,
    CAREF: IComparator.CAREF_0,
    CAON: IComparator.CAON_OFF,
    CAIES: IComparator.CAIES_OFF,
    CAIE: IComparator.CAIE_OFF,
    CAIFG: IComparator.CAIFG_OFF
};
config Comparator_Aplus.Params.CACTL2 // instance
index URL

CACTL2 Register

Configuration settings
var params = new Comparator_Aplus.Params;
...
params.CACTL2 = Comparator_Aplus.CACTL2_t {
    CASHORT: IComparator.CASHORT_OFF,
    P2CA4: IComparator.P2CA4_OFF,
    P2CA3: IComparator.P2CA3_OFF,
    P2CA2: IComparator.P2CA2_OFF,
    P2CA1: IComparator.P2CA1_OFF,
    P2CA0: IComparator.P2CA0_OFF,
    CAF: IComparator.CAF_OFF
};
config Comparator_Aplus.Params.CAPD // instance
index URL

CAPD, Register

Configuration settings
var params = new Comparator_Aplus.Params;
...
params.CAPD = Comparator_Aplus.CAPD_t {
    CAPD7: IComparator.CAPD7_OFF,
    CAPD6: IComparator.CAPD6_OFF,
    CAPD5: IComparator.CAPD5_OFF,
    CAPD4: IComparator.CAPD4_OFF,
    CAPD3: IComparator.CAPD3_OFF,
    CAPD2: IComparator.CAPD2_OFF,
    CAPD1: IComparator.CAPD1_OFF,
    CAPD0: IComparator.CAPD0_OFF
};
config Comparator_Aplus.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Comparator_Aplus.Params;
...
const params.forceSetDefaultRegister = Comparator_Aplus.ForceSetDefaultRegister_t[] [
    {
        register: "CACTL1",
        regForceSet: false
    },
    {
        register: "CACTL2",
        regForceSet: false
    },
    {
        register: "CAPD",
        regForceSet: false
    }
];
config Comparator_Aplus.Params.interruptSource // instance
index URL

Comparator_A+ has 1 interrupt enable

Configuration settings
var params = new Comparator_Aplus.Params;
...
params.interruptSource = Comparator_Aplus.regIntVect_t[1] undefined;
config Comparator_Aplus.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Comparator_Aplus.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Comparator_Aplus.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Comparator_Aplus.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Comparator_Aplus.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Comparator_Aplus.create(params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:11 GMT


module ti.catalog.msp430.peripherals.comparator.Comparator_D

metaonly module ti.catalog.msp430.peripherals.comparator.Comparator_D
index URL

MSP430FR5xx Family Comparator_D Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/comparator/Comparator_D.xdc
var Comparator_D = xdc.useModule('ti.catalog.msp430.peripherals.comparator.Comparator_D');
module-wide constants & types
    values of type Comparator_D.CAEX_t// CAEX Bit
        const Comparator_D.CAEX_OFF// Disable CAEX bit;
        const Comparator_D.CAEX// Enable CAEX bit;
    values of type Comparator_D.CAF_t// CAF Bit
        const Comparator_D.CAF_OFF// Disable CAF bit;
        const Comparator_D.CAF// Enable CAF bit;
    values of type Comparator_D.CAIES_t// CAIES Bit
        const Comparator_D.CAIES_OFF// Rising Edge;
        const Comparator_D.CAIES// Falling Edge;
    values of type Comparator_D.CAIE_t// CAIE Bit
        const Comparator_D.CAIE_OFF// Disable CAIE bit;
        const Comparator_D.CAIE// Enable CAIE bit;
    values of type Comparator_D.CAIFG_t// CAIFG Bit
        const Comparator_D.CAIFG_OFF// Disable CAIFG bit;
        const Comparator_D.CAIFG// Enable CAIFG bit;
    values of type Comparator_D.CAON_t// CAON Bit
        const Comparator_D.CAON_OFF// Disable CAON bit;
        const Comparator_D.CAON// Enable CAON bit;
    values of type Comparator_D.CAPD0_t// CAPD0 Bit
        const Comparator_D.CAPD0_OFF// Disable CAPD0 bit;
        const Comparator_D.CAPD0// Enable CAPD0 bit;
    values of type Comparator_D.CAPD1_t// CAPD1 Bit
        const Comparator_D.CAPD1_OFF// Disable CAPD1 bit;
        const Comparator_D.CAPD1// Enable CAPD1 bit;
    values of type Comparator_D.CAPD2_t// CAPD2 Bit
        const Comparator_D.CAPD2_OFF// Disable CAPD2 bit;
        const Comparator_D.CAPD2// Enable CAPD2 bit;
    values of type Comparator_D.CAPD3_t// CAPD3 Bit
        const Comparator_D.CAPD3_OFF// Disable CAPD3 bit;
        const Comparator_D.CAPD3// Enable CAPD3 bit;
    values of type Comparator_D.CAPD4_t// CAPD4 Bit
        const Comparator_D.CAPD4_OFF// Disable CAPD4 bit;
        const Comparator_D.CAPD4// Enable CAPD4 bit;
    values of type Comparator_D.CAPD5_t// CAPD5 Bit
        const Comparator_D.CAPD5_OFF// Disable CAPD5 bit;
        const Comparator_D.CAPD5// Enable CAPD5 bit;
    values of type Comparator_D.CAPD6_t// CAPD6 Bit
        const Comparator_D.CAPD6_OFF// Disable CAPD6 bit;
        const Comparator_D.CAPD6// Enable CAPD6 bit;
    values of type Comparator_D.CAPD7_t// CAPD7 Bit
        const Comparator_D.CAPD7_OFF// Disable CAPD7 bit;
        const Comparator_D.CAPD7// Enable CAPD7 bit;
    values of type Comparator_D.CAREF_t// CAREF Bit
        const Comparator_D.CAREF_0// Reference Off;
        const Comparator_D.CAREF_1// 0.25 * VCC;
        const Comparator_D.CAREF_2// 0.50 * VCC;
        const Comparator_D.CAREF_3// Diode Reference;
    values of type Comparator_D.CARSEL_t// CARSEL Bit
        const Comparator_D.CARSEL_OFF// Disable CARSEL bit;
        const Comparator_D.CARSEL// Enable CARSEL bit;
    values of type Comparator_D.CASHORT_t// CASHORT Bit
        const Comparator_D.CASHORT_OFF// Disable CASHORT bit;
        const Comparator_D.CASHORT// Enable CASHORT bit;
    values of type Comparator_D.CDIE_t//
        const Comparator_D.CDIE_OFF// Interrupt not enabled;
        const Comparator_D.CDIE// Interrupt enabled;
    values of type Comparator_D.CDIFG_t//
        const Comparator_D.CDIFG_OFF// No interrupt pending;
        const Comparator_D.CDIFG// Interrupt pending;
    values of type Comparator_D.CDIIE_t//
        const Comparator_D.CDIIE_OFF// Interrupt not enabled inverted polarity;
        const Comparator_D.CDIIE// Interrupt enabled inverted polarity;
    values of type Comparator_D.CDIIFG_t//
        const Comparator_D.CDIIFG_OFF// No inverted interrupt pending;
        const Comparator_D.CDIIFG// Inverted interrupt pending;
    values of type Comparator_D.P2CA0_t// P2CA0 Bit
        const Comparator_D.P2CA0_OFF// Disable P2CA0 bit;
        const Comparator_D.P2CA0// Enable P2CA0 bit;
    values of type Comparator_D.P2CA1_t// P2CA1 Bit
        const Comparator_D.P2CA1_OFF// Disable P2CA1 bit;
        const Comparator_D.P2CA1// Enable P2CA1 bit;
    values of type Comparator_D.P2CA2_t// P2CA2 Bit
        const Comparator_D.P2CA2_OFF// Disable P2CA2 bit;
        const Comparator_D.P2CA2// Enable P2CA2 bit;
    values of type Comparator_D.P2CA3_t// P2CA3 Bit
        const Comparator_D.P2CA3_OFF// Disable P2CA3 bit;
        const Comparator_D.P2CA3// Enable P2CA3 bit;
    values of type Comparator_D.P2CA4_t// P2CA4 Bit
        const Comparator_D.P2CA4_OFF// Disable P2CA4 bit;
        const Comparator_D.P2CA4// Enable P2CA4 bit;
    var obj = new Comparator_D.CDIEALL_t// ;
        obj.CDIE// Comparator D interrupt enable. This bit enables the CDIFG interrupt for comparator mode. 0 Interrupt disabled 1 Interrupt enabled = Comparator_D.CDIE_t ...
        obj.CDIIE// Comparator D interrupt enable inverted polarity. This bit enables the CDIIFG interrupt for comparator mode. 0 Interrupt disabled 1 Interrupt enabled = Comparator_D.CDIIE_t ...
    var obj = new Comparator_D.CDIFGALL_t// ;
        obj.CDIFG// Comparator D interrupt flag. 0 No interrupt pending 1 Interrupt pending = Comparator_D.CDIFG_t ...
        obj.CDIIFG// Comparator D interrupt flag. 0 No inverted interrupt pending 1 Inverted interrupt pending = Comparator_D.CDIIFG_t ...
    var obj = new Comparator_D.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Comparator_D.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Comparator_D.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Comparator_D.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Comparator_D.Params// Instance config-params object;
        params.CDIEALL// All the Interrupt Enables in Comparator_D = Comparator_D.CDIEALL_t {
            CDIE: Comparator_D.CDIE_OFF,
            CDIIE: Comparator_D.CDIIE_OFF
        };
        params.CDIFGALL// All the Interrupt Flags in Comparator_D = Comparator_D.CDIFGALL_t {
            CDIFG: Comparator_D.CDIFG_OFF,
            CDIIFG: Comparator_D.CDIIFG_OFF
        };
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Comparator_D.ForceSetDefaultRegister_t[] [
            {
                register: "CDIEALL",
                regForceSet: false
            },
            {
                register: "CDIFGALL",
                regForceSet: false
            }
        ];
        params.interruptSource// Comparator_D has own interrupt enables thus interruptSource is defined here = Comparator_D.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
enum Comparator_D.CAEX_t
index URL

CAEX Bit

Configuration settings
values of type Comparator_D.CAEX_t
    const Comparator_D.CAEX_OFF;
    // Disable CAEX bit
    const Comparator_D.CAEX;
    // Enable CAEX bit
enum Comparator_D.CAF_t
index URL

CAF Bit

Configuration settings
values of type Comparator_D.CAF_t
    const Comparator_D.CAF_OFF;
    // Disable CAF bit
    const Comparator_D.CAF;
    // Enable CAF bit
enum Comparator_D.CAIES_t
index URL

CAIES Bit

Configuration settings
values of type Comparator_D.CAIES_t
    const Comparator_D.CAIES_OFF;
    // Rising Edge
    const Comparator_D.CAIES;
    // Falling Edge
enum Comparator_D.CAIE_t
index URL

CAIE Bit

Configuration settings
values of type Comparator_D.CAIE_t
    const Comparator_D.CAIE_OFF;
    // Disable CAIE bit
    const Comparator_D.CAIE;
    // Enable CAIE bit
enum Comparator_D.CAIFG_t
index URL

CAIFG Bit

Configuration settings
values of type Comparator_D.CAIFG_t
    const Comparator_D.CAIFG_OFF;
    // Disable CAIFG bit
    const Comparator_D.CAIFG;
    // Enable CAIFG bit
enum Comparator_D.CAON_t
index URL

CAON Bit

Configuration settings
values of type Comparator_D.CAON_t
    const Comparator_D.CAON_OFF;
    // Disable CAON bit
    const Comparator_D.CAON;
    // Enable CAON bit
enum Comparator_D.CAPD0_t
index URL

CAPD0 Bit

Configuration settings
values of type Comparator_D.CAPD0_t
    const Comparator_D.CAPD0_OFF;
    // Disable CAPD0 bit
    const Comparator_D.CAPD0;
    // Enable CAPD0 bit
enum Comparator_D.CAPD1_t
index URL

CAPD1 Bit

Configuration settings
values of type Comparator_D.CAPD1_t
    const Comparator_D.CAPD1_OFF;
    // Disable CAPD1 bit
    const Comparator_D.CAPD1;
    // Enable CAPD1 bit
enum Comparator_D.CAPD2_t
index URL

CAPD2 Bit

Configuration settings
values of type Comparator_D.CAPD2_t
    const Comparator_D.CAPD2_OFF;
    // Disable CAPD2 bit
    const Comparator_D.CAPD2;
    // Enable CAPD2 bit
enum Comparator_D.CAPD3_t
index URL

CAPD3 Bit

Configuration settings
values of type Comparator_D.CAPD3_t
    const Comparator_D.CAPD3_OFF;
    // Disable CAPD3 bit
    const Comparator_D.CAPD3;
    // Enable CAPD3 bit
enum Comparator_D.CAPD4_t
index URL

CAPD4 Bit

Configuration settings
values of type Comparator_D.CAPD4_t
    const Comparator_D.CAPD4_OFF;
    // Disable CAPD4 bit
    const Comparator_D.CAPD4;
    // Enable CAPD4 bit
enum Comparator_D.CAPD5_t
index URL

CAPD5 Bit

Configuration settings
values of type Comparator_D.CAPD5_t
    const Comparator_D.CAPD5_OFF;
    // Disable CAPD5 bit
    const Comparator_D.CAPD5;
    // Enable CAPD5 bit
enum Comparator_D.CAPD6_t
index URL

CAPD6 Bit

Configuration settings
values of type Comparator_D.CAPD6_t
    const Comparator_D.CAPD6_OFF;
    // Disable CAPD6 bit
    const Comparator_D.CAPD6;
    // Enable CAPD6 bit
enum Comparator_D.CAPD7_t
index URL

CAPD7 Bit

Configuration settings
values of type Comparator_D.CAPD7_t
    const Comparator_D.CAPD7_OFF;
    // Disable CAPD7 bit
    const Comparator_D.CAPD7;
    // Enable CAPD7 bit
enum Comparator_D.CAREF_t
index URL

CAREF Bit

Configuration settings
values of type Comparator_D.CAREF_t
    const Comparator_D.CAREF_0;
    // Reference Off
    const Comparator_D.CAREF_1;
    // 0.25 * VCC
    const Comparator_D.CAREF_2;
    // 0.50 * VCC
    const Comparator_D.CAREF_3;
    // Diode Reference
enum Comparator_D.CARSEL_t
index URL

CARSEL Bit

Configuration settings
values of type Comparator_D.CARSEL_t
    const Comparator_D.CARSEL_OFF;
    // Disable CARSEL bit
    const Comparator_D.CARSEL;
    // Enable CARSEL bit
enum Comparator_D.CASHORT_t
index URL

CASHORT Bit

Configuration settings
values of type Comparator_D.CASHORT_t
    const Comparator_D.CASHORT_OFF;
    // Disable CASHORT bit
    const Comparator_D.CASHORT;
    // Enable CASHORT bit
enum Comparator_D.CDIE_t
index URL
Configuration settings
values of type Comparator_D.CDIE_t
    const Comparator_D.CDIE_OFF;
    // Interrupt not enabled
    const Comparator_D.CDIE;
    // Interrupt enabled
enum Comparator_D.CDIFG_t
index URL
Configuration settings
values of type Comparator_D.CDIFG_t
    const Comparator_D.CDIFG_OFF;
    // No interrupt pending
    const Comparator_D.CDIFG;
    // Interrupt pending
enum Comparator_D.CDIIE_t
index URL
Configuration settings
values of type Comparator_D.CDIIE_t
    const Comparator_D.CDIIE_OFF;
    // Interrupt not enabled inverted polarity
    const Comparator_D.CDIIE;
    // Interrupt enabled inverted polarity
enum Comparator_D.CDIIFG_t
index URL
Configuration settings
values of type Comparator_D.CDIIFG_t
    const Comparator_D.CDIIFG_OFF;
    // No inverted interrupt pending
    const Comparator_D.CDIIFG;
    // Inverted interrupt pending
enum Comparator_D.P2CA0_t
index URL

P2CA0 Bit

Configuration settings
values of type Comparator_D.P2CA0_t
    const Comparator_D.P2CA0_OFF;
    // Disable P2CA0 bit
    const Comparator_D.P2CA0;
    // Enable P2CA0 bit
enum Comparator_D.P2CA1_t
index URL

P2CA1 Bit

Configuration settings
values of type Comparator_D.P2CA1_t
    const Comparator_D.P2CA1_OFF;
    // Disable P2CA1 bit
    const Comparator_D.P2CA1;
    // Enable P2CA1 bit
enum Comparator_D.P2CA2_t
index URL

P2CA2 Bit

Configuration settings
values of type Comparator_D.P2CA2_t
    const Comparator_D.P2CA2_OFF;
    // Disable P2CA2 bit
    const Comparator_D.P2CA2;
    // Enable P2CA2 bit
enum Comparator_D.P2CA3_t
index URL

P2CA3 Bit

Configuration settings
values of type Comparator_D.P2CA3_t
    const Comparator_D.P2CA3_OFF;
    // Disable P2CA3 bit
    const Comparator_D.P2CA3;
    // Enable P2CA3 bit
enum Comparator_D.P2CA4_t
index URL

P2CA4 Bit

Configuration settings
values of type Comparator_D.P2CA4_t
    const Comparator_D.P2CA4_OFF;
    // Disable P2CA4 bit
    const Comparator_D.P2CA4;
    // Enable P2CA4 bit
struct Comparator_D.CDIEALL_t
index URL
Configuration settings
var obj = new Comparator_D.CDIEALL_t;
    obj.CDIE = Comparator_D.CDIE_t ...
    // Comparator D interrupt enable. This bit enables the CDIFG interrupt for comparator mode. 0 Interrupt disabled 1 Interrupt enabled
    obj.CDIIE = Comparator_D.CDIIE_t ...
    // Comparator D interrupt enable inverted polarity. This bit enables the CDIIFG interrupt for comparator mode. 0 Interrupt disabled 1 Interrupt enabled
struct Comparator_D.CDIFGALL_t
index URL
Configuration settings
var obj = new Comparator_D.CDIFGALL_t;
    obj.CDIFG = Comparator_D.CDIFG_t ...
    // Comparator D interrupt flag. 0 No interrupt pending 1 Interrupt pending
    obj.CDIIFG = Comparator_D.CDIIFG_t ...
    // Comparator D interrupt flag. 0 No inverted interrupt pending 1 Inverted interrupt pending
struct Comparator_D.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Comparator_D.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Comparator_D.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Comparator_D.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Comparator_D.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Comparator_D.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Comparator_D.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Comparator_D.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Comparator_D.Params;
// Instance config-params object
    params.CDIEALL = Comparator_D.CDIEALL_t {
    // All the Interrupt Enables in Comparator_D
        CDIE: Comparator_D.CDIE_OFF,
        CDIIE: Comparator_D.CDIIE_OFF
    };
    params.CDIFGALL = Comparator_D.CDIFGALL_t {
    // All the Interrupt Flags in Comparator_D
        CDIFG: Comparator_D.CDIFG_OFF,
        CDIIFG: Comparator_D.CDIIFG_OFF
    };
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Comparator_D.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "CDIEALL",
            regForceSet: false
        },
        {
            register: "CDIFGALL",
            regForceSet: false
        }
    ];
    params.interruptSource = Comparator_D.regIntVect_t[2] undefined;
    // Comparator_D has own interrupt enables thus interruptSource is defined here
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Comparator_D.Params.CDIEALL // instance
index URL

All the Interrupt Enables in Comparator_D

Configuration settings
var params = new Comparator_D.Params;
...
params.CDIEALL = Comparator_D.CDIEALL_t {
    CDIE: Comparator_D.CDIE_OFF,
    CDIIE: Comparator_D.CDIIE_OFF
};
config Comparator_D.Params.CDIFGALL // instance
index URL

All the Interrupt Flags in Comparator_D

Configuration settings
var params = new Comparator_D.Params;
...
params.CDIFGALL = Comparator_D.CDIFGALL_t {
    CDIFG: Comparator_D.CDIFG_OFF,
    CDIIFG: Comparator_D.CDIIFG_OFF
};
config Comparator_D.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Comparator_D.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Comparator_D.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Comparator_D.Params;
...
const params.forceSetDefaultRegister = Comparator_D.ForceSetDefaultRegister_t[] [
    {
        register: "CDIEALL",
        regForceSet: false
    },
    {
        register: "CDIFGALL",
        regForceSet: false
    }
];
config Comparator_D.Params.interruptSource // instance
index URL

Comparator_D has own interrupt enables thus interruptSource is defined here

Configuration settings
var params = new Comparator_D.Params;
...
params.interruptSource = Comparator_D.regIntVect_t[2] undefined;
config Comparator_D.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Comparator_D.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Comparator_D.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Comparator_D.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:20:11 GMT


module ti.catalog.msp430.peripherals.comparator.Comparator_E

metaonly module ti.catalog.msp430.peripherals.comparator.Comparator_E
index URL

MSP430FR5xx Family Comparator_E Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/comparator/Comparator_E.xdc
var Comparator_E = xdc.useModule('ti.catalog.msp430.peripherals.comparator.Comparator_E');
module-wide constants & types
    values of type Comparator_E.CAEX_t// CAEX Bit
        const Comparator_E.CAEX_OFF// Disable CAEX bit;
        const Comparator_E.CAEX// Enable CAEX bit;
    values of type Comparator_E.CAF_t// CAF Bit
        const Comparator_E.CAF_OFF// Disable CAF bit;
        const Comparator_E.CAF// Enable CAF bit;
    values of type Comparator_E.CAIES_t// CAIES Bit
        const Comparator_E.CAIES_OFF// Rising Edge;
        const Comparator_E.CAIES// Falling Edge;
    values of type Comparator_E.CAIE_t// CAIE Bit
        const Comparator_E.CAIE_OFF// Disable CAIE bit;
        const Comparator_E.CAIE// Enable CAIE bit;
    values of type Comparator_E.CAIFG_t// CAIFG Bit
        const Comparator_E.CAIFG_OFF// Disable CAIFG bit;
        const Comparator_E.CAIFG// Enable CAIFG bit;
    values of type Comparator_E.CAON_t// CAON Bit
        const Comparator_E.CAON_OFF// Disable CAON bit;
        const Comparator_E.CAON// Enable CAON bit;
    values of type Comparator_E.CAPD0_t// CAPD0 Bit
        const Comparator_E.CAPD0_OFF// Disable CAPD0 bit;
        const Comparator_E.CAPD0// Enable CAPD0 bit;
    values of type Comparator_E.CAPD1_t// CAPD1 Bit
        const Comparator_E.CAPD1_OFF// Disable CAPD1 bit;
        const Comparator_E.CAPD1// Enable CAPD1 bit;
    values of type Comparator_E.CAPD2_t// CAPD2 Bit
        const Comparator_E.CAPD2_OFF// Disable CAPD2 bit;
        const Comparator_E.CAPD2// Enable CAPD2 bit;
    values of type Comparator_E.CAPD3_t// CAPD3 Bit
        const Comparator_E.CAPD3_OFF// Disable CAPD3 bit;
        const Comparator_E.CAPD3// Enable CAPD3 bit;
    values of type Comparator_E.CAPD4_t// CAPD4 Bit
        const Comparator_E.CAPD4_OFF// Disable CAPD4 bit;
        const Comparator_E.CAPD4// Enable CAPD4 bit;
    values of type Comparator_E.CAPD5_t// CAPD5 Bit
        const Comparator_E.CAPD5_OFF// Disable CAPD5 bit;
        const Comparator_E.CAPD5// Enable CAPD5 bit;
    values of type Comparator_E.CAPD6_t// CAPD6 Bit
        const Comparator_E.CAPD6_OFF// Disable CAPD6 bit;
        const Comparator_E.CAPD6// Enable CAPD6 bit;
    values of type Comparator_E.CAPD7_t// CAPD7 Bit
        const Comparator_E.CAPD7_OFF// Disable CAPD7 bit;
        const Comparator_E.CAPD7// Enable CAPD7 bit;
    values of type Comparator_E.CAREF_t// CAREF Bit
        const Comparator_E.CAREF_0// Reference Off;
        const Comparator_E.CAREF_1// 0.25 * VCC;
        const Comparator_E.CAREF_2// 0.50 * VCC;
        const Comparator_E.CAREF_3// Diode Reference;
    values of type Comparator_E.CARSEL_t// CARSEL Bit
        const Comparator_E.CARSEL_OFF// Disable CARSEL bit;
        const Comparator_E.CARSEL// Enable CARSEL bit;
    values of type Comparator_E.CASHORT_t// CASHORT Bit
        const Comparator_E.CASHORT_OFF// Disable CASHORT bit;
        const Comparator_E.CASHORT// Enable CASHORT bit;
    values of type Comparator_E.P2CA0_t// P2CA0 Bit
        const Comparator_E.P2CA0_OFF// Disable P2CA0 bit;
        const Comparator_E.P2CA0// Enable P2CA0 bit;
    values of type Comparator_E.P2CA1_t// P2CA1 Bit
        const Comparator_E.P2CA1_OFF// Disable P2CA1 bit;
        const Comparator_E.P2CA1// Enable P2CA1 bit;
    values of type Comparator_E.P2CA2_t// P2CA2 Bit
        const Comparator_E.P2CA2_OFF// Disable P2CA2 bit;
        const Comparator_E.P2CA2// Enable P2CA2 bit;
    values of type Comparator_E.P2CA3_t// P2CA3 Bit
        const Comparator_E.P2CA3_OFF// Disable P2CA3 bit;
        const Comparator_E.P2CA3// Enable P2CA3 bit;
    values of type Comparator_E.P2CA4_t// P2CA4 Bit
        const Comparator_E.P2CA4_OFF// Disable P2CA4 bit;
        const Comparator_E.P2CA4// Enable P2CA4 bit;
    var obj = new Comparator_E.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Comparator_E.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Comparator_E.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Comparator_E.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Comparator_E.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Comparator_E.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// Interrupt enables = Comparator_E.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
enum Comparator_E.CAEX_t
index URL

CAEX Bit

Configuration settings
values of type Comparator_E.CAEX_t
    const Comparator_E.CAEX_OFF;
    // Disable CAEX bit
    const Comparator_E.CAEX;
    // Enable CAEX bit
enum Comparator_E.CAF_t
index URL

CAF Bit

Configuration settings
values of type Comparator_E.CAF_t
    const Comparator_E.CAF_OFF;
    // Disable CAF bit
    const Comparator_E.CAF;
    // Enable CAF bit
enum Comparator_E.CAIES_t
index URL

CAIES Bit

Configuration settings
values of type Comparator_E.CAIES_t
    const Comparator_E.CAIES_OFF;
    // Rising Edge
    const Comparator_E.CAIES;
    // Falling Edge
enum Comparator_E.CAIE_t
index URL

CAIE Bit

Configuration settings
values of type Comparator_E.CAIE_t
    const Comparator_E.CAIE_OFF;
    // Disable CAIE bit
    const Comparator_E.CAIE;
    // Enable CAIE bit
enum Comparator_E.CAIFG_t
index URL

CAIFG Bit

Configuration settings
values of type Comparator_E.CAIFG_t
    const Comparator_E.CAIFG_OFF;
    // Disable CAIFG bit
    const Comparator_E.CAIFG;
    // Enable CAIFG bit
enum Comparator_E.CAON_t
index URL

CAON Bit

Configuration settings
values of type Comparator_E.CAON_t
    const Comparator_E.CAON_OFF;
    // Disable CAON bit
    const Comparator_E.CAON;
    // Enable CAON bit
enum Comparator_E.CAPD0_t
index URL

CAPD0 Bit

Configuration settings
values of type Comparator_E.CAPD0_t
    const Comparator_E.CAPD0_OFF;
    // Disable CAPD0 bit
    const Comparator_E.CAPD0;
    // Enable CAPD0 bit
enum Comparator_E.CAPD1_t
index URL

CAPD1 Bit

Configuration settings
values of type Comparator_E.CAPD1_t
    const Comparator_E.CAPD1_OFF;
    // Disable CAPD1 bit
    const Comparator_E.CAPD1;
    // Enable CAPD1 bit
enum Comparator_E.CAPD2_t
index URL

CAPD2 Bit

Configuration settings
values of type Comparator_E.CAPD2_t
    const Comparator_E.CAPD2_OFF;
    // Disable CAPD2 bit
    const Comparator_E.CAPD2;
    // Enable CAPD2 bit
enum Comparator_E.CAPD3_t
index URL

CAPD3 Bit

Configuration settings
values of type Comparator_E.CAPD3_t
    const Comparator_E.CAPD3_OFF;
    // Disable CAPD3 bit
    const Comparator_E.CAPD3;
    // Enable CAPD3 bit
enum Comparator_E.CAPD4_t
index URL

CAPD4 Bit

Configuration settings
values of type Comparator_E.CAPD4_t
    const Comparator_E.CAPD4_OFF;
    // Disable CAPD4 bit
    const Comparator_E.CAPD4;
    // Enable CAPD4 bit
enum Comparator_E.CAPD5_t
index URL

CAPD5 Bit

Configuration settings
values of type Comparator_E.CAPD5_t
    const Comparator_E.CAPD5_OFF;
    // Disable CAPD5 bit
    const Comparator_E.CAPD5;
    // Enable CAPD5 bit
enum Comparator_E.CAPD6_t
index URL

CAPD6 Bit

Configuration settings
values of type Comparator_E.CAPD6_t
    const Comparator_E.CAPD6_OFF;
    // Disable CAPD6 bit
    const Comparator_E.CAPD6;
    // Enable CAPD6 bit
enum Comparator_E.CAPD7_t
index URL

CAPD7 Bit

Configuration settings
values of type Comparator_E.CAPD7_t
    const Comparator_E.CAPD7_OFF;
    // Disable CAPD7 bit
    const Comparator_E.CAPD7;
    // Enable CAPD7 bit
enum Comparator_E.CAREF_t
index URL

CAREF Bit

Configuration settings
values of type Comparator_E.CAREF_t
    const Comparator_E.CAREF_0;
    // Reference Off
    const Comparator_E.CAREF_1;
    // 0.25 * VCC
    const Comparator_E.CAREF_2;
    // 0.50 * VCC
    const Comparator_E.CAREF_3;
    // Diode Reference
enum Comparator_E.CARSEL_t
index URL

CARSEL Bit

Configuration settings
values of type Comparator_E.CARSEL_t
    const Comparator_E.CARSEL_OFF;
    // Disable CARSEL bit
    const Comparator_E.CARSEL;
    // Enable CARSEL bit
enum Comparator_E.CASHORT_t
index URL

CASHORT Bit

Configuration settings
values of type Comparator_E.CASHORT_t
    const Comparator_E.CASHORT_OFF;
    // Disable CASHORT bit
    const Comparator_E.CASHORT;
    // Enable CASHORT bit
enum Comparator_E.P2CA0_t
index URL

P2CA0 Bit

Configuration settings
values of type Comparator_E.P2CA0_t
    const Comparator_E.P2CA0_OFF;
    // Disable P2CA0 bit
    const Comparator_E.P2CA0;
    // Enable P2CA0 bit
enum Comparator_E.P2CA1_t
index URL

P2CA1 Bit

Configuration settings
values of type Comparator_E.P2CA1_t
    const Comparator_E.P2CA1_OFF;
    // Disable P2CA1 bit
    const Comparator_E.P2CA1;
    // Enable P2CA1 bit
enum Comparator_E.P2CA2_t
index URL

P2CA2 Bit

Configuration settings
values of type Comparator_E.P2CA2_t
    const Comparator_E.P2CA2_OFF;
    // Disable P2CA2 bit
    const Comparator_E.P2CA2;
    // Enable P2CA2 bit
enum Comparator_E.P2CA3_t
index URL

P2CA3 Bit

Configuration settings
values of type Comparator_E.P2CA3_t
    const Comparator_E.P2CA3_OFF;
    // Disable P2CA3 bit
    const Comparator_E.P2CA3;
    // Enable P2CA3 bit
enum Comparator_E.P2CA4_t
index URL

P2CA4 Bit

Configuration settings
values of type Comparator_E.P2CA4_t
    const Comparator_E.P2CA4_OFF;
    // Disable P2CA4 bit
    const Comparator_E.P2CA4;
    // Enable P2CA4 bit
struct Comparator_E.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Comparator_E.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Comparator_E.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Comparator_E.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Comparator_E.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Comparator_E.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Comparator_E.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Comparator_E.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Comparator_E.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Comparator_E.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = Comparator_E.regIntVect_t[2] undefined;
    // Interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Comparator_E.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Comparator_E.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Comparator_E.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Comparator_E.Params;
...
const params.forceSetDefaultRegister = Comparator_E.ForceSetDefaultRegister_t[] [ ];
config Comparator_E.Params.interruptSource // instance
index URL

Interrupt enables

Configuration settings
var params = new Comparator_E.Params;
...
params.interruptSource = Comparator_E.regIntVect_t[2] undefined;
config Comparator_E.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Comparator_E.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Comparator_E.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Comparator_E.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:20:11 GMT


interface ti.catalog.msp430.peripherals.comparator.IComparator

metaonly interface ti.catalog.msp430.peripherals.comparator.IComparator
index URL

MSP430 IComparator interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
metaonly interface IComparator { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
package ti.catalog.msp430.peripherals.comparator;
metaonly interface IComparator inherits IPeripheral {
module-wide constants & types
    enum CAEX_t// CAEX Bit {
         CAEX_OFF// Disable CAEX bit,
         CAEX// Enable CAEX bit
    };
    enum CAF_t// CAF Bit {
         CAF_OFF// Disable CAF bit,
         CAF// Enable CAF bit
    };
    enum CAIES_t// CAIES Bit {
         CAIES_OFF// Rising Edge,
         CAIES// Falling Edge
    };
    enum CAIE_t// CAIE Bit {
         CAIE_OFF// Disable CAIE bit,
         CAIE// Enable CAIE bit
    };
    enum CAIFG_t// CAIFG Bit {
         CAIFG_OFF// Disable CAIFG bit,
         CAIFG// Enable CAIFG bit
    };
    enum CAON_t// CAON Bit {
         CAON_OFF// Disable CAON bit,
         CAON// Enable CAON bit
    };
    enum CAPD0_t// CAPD0 Bit {
         CAPD0_OFF// Disable CAPD0 bit,
         CAPD0// Enable CAPD0 bit
    };
    enum CAPD1_t// CAPD1 Bit {
         CAPD1_OFF// Disable CAPD1 bit,
         CAPD1// Enable CAPD1 bit
    };
    enum CAPD2_t// CAPD2 Bit {
         CAPD2_OFF// Disable CAPD2 bit,
         CAPD2// Enable CAPD2 bit
    };
    enum CAPD3_t// CAPD3 Bit {
         CAPD3_OFF// Disable CAPD3 bit,
         CAPD3// Enable CAPD3 bit
    };
    enum CAPD4_t// CAPD4 Bit {
         CAPD4_OFF// Disable CAPD4 bit,
         CAPD4// Enable CAPD4 bit
    };
    enum CAPD5_t// CAPD5 Bit {
         CAPD5_OFF// Disable CAPD5 bit,
         CAPD5// Enable CAPD5 bit
    };
    enum CAPD6_t// CAPD6 Bit {
         CAPD6_OFF// Disable CAPD6 bit,
         CAPD6// Enable CAPD6 bit
    };
    enum CAPD7_t// CAPD7 Bit {
         CAPD7_OFF// Disable CAPD7 bit,
         CAPD7// Enable CAPD7 bit
    };
    enum CAREF_t// CAREF Bit {
         CAREF_0// Reference Off,
         CAREF_1// 0.25 * VCC,
         CAREF_2// 0.50 * VCC,
         CAREF_3// Diode Reference
    };
    enum CARSEL_t// CARSEL Bit {
         CARSEL_OFF// Disable CARSEL bit,
         CARSEL// Enable CARSEL bit
    };
    enum CASHORT_t// CASHORT Bit {
         CASHORT_OFF// Disable CASHORT bit,
         CASHORT// Enable CASHORT bit
    };
    enum P2CA0_t// P2CA0 Bit {
         P2CA0_OFF// Disable P2CA0 bit,
         P2CA0// Enable P2CA0 bit
    };
    enum P2CA1_t// P2CA1 Bit {
         P2CA1_OFF// Disable P2CA1 bit,
         P2CA1// Enable P2CA1 bit
    };
    enum P2CA2_t// P2CA2 Bit {
         P2CA2_OFF// Disable P2CA2 bit,
         P2CA2// Enable P2CA2 bit
    };
    enum P2CA3_t// P2CA3 Bit {
         P2CA3_OFF// Disable P2CA3 bit,
         P2CA3// Enable P2CA3 bit
    };
    enum P2CA4_t// P2CA4 Bit {
         P2CA4_OFF// Disable P2CA4 bit,
         P2CA4// Enable P2CA4 bit
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
enum IComparator.CAEX_t
index URL

CAEX Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAEX_t {
    CAEX_OFF,
    // Disable CAEX bit
    CAEX
    // Enable CAEX bit
};
enum IComparator.CAF_t
index URL

CAF Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAF_t {
    CAF_OFF,
    // Disable CAF bit
    CAF
    // Enable CAF bit
};
enum IComparator.CAIES_t
index URL

CAIES Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAIES_t {
    CAIES_OFF,
    // Rising Edge
    CAIES
    // Falling Edge
};
enum IComparator.CAIE_t
index URL

CAIE Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAIE_t {
    CAIE_OFF,
    // Disable CAIE bit
    CAIE
    // Enable CAIE bit
};
enum IComparator.CAIFG_t
index URL

CAIFG Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAIFG_t {
    CAIFG_OFF,
    // Disable CAIFG bit
    CAIFG
    // Enable CAIFG bit
};
enum IComparator.CAON_t
index URL

CAON Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAON_t {
    CAON_OFF,
    // Disable CAON bit
    CAON
    // Enable CAON bit
};
enum IComparator.CAPD0_t
index URL

CAPD0 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD0_t {
    CAPD0_OFF,
    // Disable CAPD0 bit
    CAPD0
    // Enable CAPD0 bit
};
enum IComparator.CAPD1_t
index URL

CAPD1 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD1_t {
    CAPD1_OFF,
    // Disable CAPD1 bit
    CAPD1
    // Enable CAPD1 bit
};
enum IComparator.CAPD2_t
index URL

CAPD2 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD2_t {
    CAPD2_OFF,
    // Disable CAPD2 bit
    CAPD2
    // Enable CAPD2 bit
};
enum IComparator.CAPD3_t
index URL

CAPD3 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD3_t {
    CAPD3_OFF,
    // Disable CAPD3 bit
    CAPD3
    // Enable CAPD3 bit
};
enum IComparator.CAPD4_t
index URL

CAPD4 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD4_t {
    CAPD4_OFF,
    // Disable CAPD4 bit
    CAPD4
    // Enable CAPD4 bit
};
enum IComparator.CAPD5_t
index URL

CAPD5 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD5_t {
    CAPD5_OFF,
    // Disable CAPD5 bit
    CAPD5
    // Enable CAPD5 bit
};
enum IComparator.CAPD6_t
index URL

CAPD6 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD6_t {
    CAPD6_OFF,
    // Disable CAPD6 bit
    CAPD6
    // Enable CAPD6 bit
};
enum IComparator.CAPD7_t
index URL

CAPD7 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAPD7_t {
    CAPD7_OFF,
    // Disable CAPD7 bit
    CAPD7
    // Enable CAPD7 bit
};
enum IComparator.CAREF_t
index URL

CAREF Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CAREF_t {
    CAREF_0,
    // Reference Off
    CAREF_1,
    // 0.25 * VCC
    CAREF_2,
    // 0.50 * VCC
    CAREF_3
    // Diode Reference
};
enum IComparator.CARSEL_t
index URL

CARSEL Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CARSEL_t {
    CARSEL_OFF,
    // Disable CARSEL bit
    CARSEL
    // Enable CARSEL bit
};
enum IComparator.CASHORT_t
index URL

CASHORT Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum CASHORT_t {
    CASHORT_OFF,
    // Disable CASHORT bit
    CASHORT
    // Enable CASHORT bit
};
enum IComparator.P2CA0_t
index URL

P2CA0 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum P2CA0_t {
    P2CA0_OFF,
    // Disable P2CA0 bit
    P2CA0
    // Enable P2CA0 bit
};
enum IComparator.P2CA1_t
index URL

P2CA1 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum P2CA1_t {
    P2CA1_OFF,
    // Disable P2CA1 bit
    P2CA1
    // Enable P2CA1 bit
};
enum IComparator.P2CA2_t
index URL

P2CA2 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum P2CA2_t {
    P2CA2_OFF,
    // Disable P2CA2 bit
    P2CA2
    // Enable P2CA2 bit
};
enum IComparator.P2CA3_t
index URL

P2CA3 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum P2CA3_t {
    P2CA3_OFF,
    // Disable P2CA3 bit
    P2CA3
    // Enable P2CA3 bit
};
enum IComparator.P2CA4_t
index URL

P2CA4 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
enum P2CA4_t {
    P2CA4_OFF,
    // Disable P2CA4 bit
    P2CA4
    // Enable P2CA4 bit
};
typedef IComparator.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IComparator.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
typedef String StringArray[];
struct IComparator.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IComparator.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IComparator.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IComparator.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IComparator.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IComparator.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/comparator/IComparator.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:11 GMT


package ti.catalog.msp430.peripherals.dac
index URL

MSP430 DAC peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/package.xdc
package ti.catalog.msp430.peripherals.dac [1, 0, 0] {
    interface IDAC;
    // MSP430 Digital to Analog Converter Interface
    module DAC12;
    // MSP430 12-bit Digital to Analog Converter
}
generated on Sun, 25 Nov 2018 22:20:03 GMT


module ti.catalog.msp430.peripherals.dac.DAC12

metaonly module ti.catalog.msp430.peripherals.dac.DAC12
index URL

MSP430 12-bit Digital to Analog Converter

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/dac/DAC12.xdc
var DAC12 = xdc.useModule('ti.catalog.msp430.peripherals.dac.DAC12');
module-wide constants & types
    values of type DAC12.DAC12AMP_t// DAC12AMPx Bits
        const DAC12.DAC12AMP_0;
        const DAC12.DAC12AMP_1;
        const DAC12.DAC12AMP_2;
        const DAC12.DAC12AMP_3;
        const DAC12.DAC12AMP_4;
        const DAC12.DAC12AMP_5;
        const DAC12.DAC12AMP_6;
        const DAC12.DAC12AMP_7;
    values of type DAC12.DAC12CALON_t// DAC12CALON Bit
        const DAC12.DAC12CALON_OFF;
        const DAC12.DAC12CALON;
    values of type DAC12.DAC12DF_t// DAC12DF Bit
        const DAC12.DAC12DF_OFF;
        const DAC12.DAC12DF;
    values of type DAC12.DAC12ENC_t// DAC12ENC Bit
        const DAC12.DAC12ENC_OFF;
        const DAC12.DAC12ENC;
    values of type DAC12.DAC12GRP_t// DAC12GRP Bit
        const DAC12.DAC12GRP_OFF;
        const DAC12.DAC12GRP;
    values of type DAC12.DAC12IE_t// DAC12IE Bit
        const DAC12.DAC12IE_OFF;
        const DAC12.DAC12IE;
    values of type DAC12.DAC12IFG_t// DAC12IFG Bit
        const DAC12.DAC12IFG_OFF;
        const DAC12.DAC12IFG;
    values of type DAC12.DAC12IR_t// DAC12IR Bit
        const DAC12.DAC12IR_OFF;
        const DAC12.DAC12IR;
    values of type DAC12.DAC12LSEL_t// DAC12LSELx Bits
        const DAC12.DAC12LSEL_0;
        const DAC12.DAC12LSEL_1;
        const DAC12.DAC12LSEL_2;
        const DAC12.DAC12LSEL_3;
    values of type DAC12.DAC12OPS_t// DAC12OPS Bit
        const DAC12.DAC12OPS_OFF;
        const DAC12.DAC12OPS;
    values of type DAC12.DAC12RES_t// DAC12RES Bit
        const DAC12.DAC12RES_OFF;
        const DAC12.DAC12RES;
    values of type DAC12.DAC12SREF_t// DAC12SREFx Bits
        const DAC12.DAC12SREF_0;
        const DAC12.DAC12SREF_1;
        const DAC12.DAC12SREF_2;
        const DAC12.DAC12SREF_3;
    var obj = new DAC12.DAC12_xCTL_t// ;
        obj.DAC12OPS// DAC12 output select 0 DAC12_0 output on P6.6, DAC12_1 output on P6.7 1 DAC12_0 output on VeREF+, DAC12_1 output on P6.5 = DAC12.DAC12OPS_t ...
        obj.DAC12SREF// DAC12 select reference voltage 00 VREF+ 01 VREF+ 10 VeREF+ 11 VeREF+ = DAC12.DAC12SREF_t ...
        obj.DAC12RES// DAC12 resolution select 0 12-bit resolution 1 8-bit resolution = DAC12.DAC12RES_t ...
        obj.DAC12LSEL// DAC12 load select. Selects the load trigger for the DAC12 latch. DAC12ENC must be set for the DAC to update, except when DAC12LSELx = 0. 00 DAC12 latch loads when DAC12_xDATwritten (DAC12ENCis ignored) 01 DAC12 latch loads when DAC12_xDAT written, or, when grouped, when all DAC12_xDAT registers in the group have been written. 10 Rising edge of Timer_A.OUT1 (TA1) 11 Rising edge of Timer_B.OUT2 (TB2) = DAC12.DAC12LSEL_t ...
        obj.DAC12CALON// DAC12 calibration on. This bit initiates the DAC12 offset calibration sequence and is automatically reset when the calibration completes. 0 Calibration is not active 1 Initiate calibration/calibration in progress = DAC12.DAC12CALON_t ...
        obj.DAC12IR// DAC12 input range. This bit sets the reference input and voltage output range. 0 DAC12 full-scale output = 3x reference voltage 1 DAC12 full-scale output = 1x reference voltage = DAC12.DAC12IR_t ...
        obj.DAC12AMP// DAC12 amplifier setting. These bits select settling time vs current consumption for the DAC12 input and output amplifiers. DAC12AMPx Input Buffer Output Buffer 000 Off DAC12 off, output high Z 001 Off DAC12 off, output 0 V 010 Low speed/current Low speed/current 011 Low speed/current Medium speed/current 100 Low speed/current High speed/current 101 Medium speed/current Medium speed/current 110 Medium speed/current High speed/current 111 High speed/current High speed/current = DAC12.DAC12AMP_t ...
        obj.DAC12DF// DAC12 data format 0 Straight binary 1 2s complement = DAC12.DAC12DF_t ...
        obj.DAC12IE// DAC12 interrupt enable 0 Disabled 1 Enabled = DAC12.DAC12IE_t ...
        obj.DAC12IFG// DAC12 Interrupt flag 0 No interrupt pending 1 Interrupt pending = DAC12.DAC12IFG_t ...
        obj.DAC12ENC// DAC12 enable conversion. This bit enables the DAC12 module when DAC12LSELx > 0. when DAC12LSELx = 0, DAC12ENC is ignored. 0 DAC12 disabled 1 DAC12 enabled = DAC12.DAC12ENC_t ...
        obj.DAC12GRP// DAC12 group. Groups DAC12_x with the next higher DAC12_x. 0 Not grouped 1 Grouped = DAC12.DAC12GRP_t ...
    var obj = new DAC12.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new DAC12.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     DAC12.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     DAC12.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new DAC12.Params// Instance config-params object;
        params.DAC12_0CTL// DAC12_0CTL Register = DAC12.DAC12_xCTL_t {
            DAC12OPS: IDAC.DAC12OPS_OFF,
            DAC12SREF: IDAC.DAC12SREF_0,
            DAC12RES: IDAC.DAC12RES_OFF,
            DAC12LSEL: IDAC.DAC12LSEL_0,
            DAC12CALON: IDAC.DAC12CALON_OFF,
            DAC12IR: IDAC.DAC12IR_OFF,
            DAC12AMP: IDAC.DAC12AMP_0,
            DAC12DF: IDAC.DAC12DF_OFF,
            DAC12IE: IDAC.DAC12IE_OFF,
            DAC12IFG: IDAC.DAC12IFG_OFF,
            DAC12ENC: IDAC.DAC12ENC_OFF,
            DAC12GRP: IDAC.DAC12GRP_OFF
        };
        params.DAC12_0DAT// DAC12_0DAT Register = Bits16 0;
        params.DAC12_1CTL// DAC12_1CTL Register = DAC12.DAC12_xCTL_t {
            DAC12OPS: IDAC.DAC12OPS_OFF,
            DAC12SREF: IDAC.DAC12SREF_0,
            DAC12RES: IDAC.DAC12RES_OFF,
            DAC12LSEL: IDAC.DAC12LSEL_0,
            DAC12CALON: IDAC.DAC12CALON_OFF,
            DAC12IR: IDAC.DAC12IR_OFF,
            DAC12AMP: IDAC.DAC12AMP_0,
            DAC12DF: IDAC.DAC12DF_OFF,
            DAC12IE: IDAC.DAC12IE_OFF,
            DAC12IFG: IDAC.DAC12IFG_OFF,
            DAC12ENC: IDAC.DAC12ENC_OFF,
            DAC12GRP: IDAC.DAC12GRP_OFF
        };
        params.DAC12_1DAT// DAC12_1DAT Register = Bits16 0;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = DAC12.ForceSetDefaultRegister_t[] [
            {
                register: "DAC12_0CTL",
                regForceSet: false
            },
            {
                register: "DAC12_1CTL",
                regForceSet: false
            },
            {
                register: "DAC12_0DAT",
                regForceSet: false
            },
            {
                register: "DAC12_1DAT",
                regForceSet: false
            }
        ];
        params.interruptSource// DAC12 has 2 interrupt enables = DAC12.regIntVect_t[2] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = DAC12.create// Create an instance-object(params);
enum DAC12.DAC12AMP_t
index URL

DAC12AMPx Bits

Configuration settings
values of type DAC12.DAC12AMP_t
    const DAC12.DAC12AMP_0;
    const DAC12.DAC12AMP_1;
    const DAC12.DAC12AMP_2;
    const DAC12.DAC12AMP_3;
    const DAC12.DAC12AMP_4;
    const DAC12.DAC12AMP_5;
    const DAC12.DAC12AMP_6;
    const DAC12.DAC12AMP_7;
enum DAC12.DAC12CALON_t
index URL

DAC12CALON Bit

Configuration settings
values of type DAC12.DAC12CALON_t
    const DAC12.DAC12CALON_OFF;
    const DAC12.DAC12CALON;
enum DAC12.DAC12DF_t
index URL

DAC12DF Bit

Configuration settings
values of type DAC12.DAC12DF_t
    const DAC12.DAC12DF_OFF;
    const DAC12.DAC12DF;
enum DAC12.DAC12ENC_t
index URL

DAC12ENC Bit

Configuration settings
values of type DAC12.DAC12ENC_t
    const DAC12.DAC12ENC_OFF;
    const DAC12.DAC12ENC;
enum DAC12.DAC12GRP_t
index URL

DAC12GRP Bit

Configuration settings
values of type DAC12.DAC12GRP_t
    const DAC12.DAC12GRP_OFF;
    const DAC12.DAC12GRP;
enum DAC12.DAC12IE_t
index URL

DAC12IE Bit

Configuration settings
values of type DAC12.DAC12IE_t
    const DAC12.DAC12IE_OFF;
    const DAC12.DAC12IE;
enum DAC12.DAC12IFG_t
index URL

DAC12IFG Bit

Configuration settings
values of type DAC12.DAC12IFG_t
    const DAC12.DAC12IFG_OFF;
    const DAC12.DAC12IFG;
enum DAC12.DAC12IR_t
index URL

DAC12IR Bit

Configuration settings
values of type DAC12.DAC12IR_t
    const DAC12.DAC12IR_OFF;
    const DAC12.DAC12IR;
enum DAC12.DAC12LSEL_t
index URL

DAC12LSELx Bits

Configuration settings
values of type DAC12.DAC12LSEL_t
    const DAC12.DAC12LSEL_0;
    const DAC12.DAC12LSEL_1;
    const DAC12.DAC12LSEL_2;
    const DAC12.DAC12LSEL_3;
enum DAC12.DAC12OPS_t
index URL

DAC12OPS Bit

Configuration settings
values of type DAC12.DAC12OPS_t
    const DAC12.DAC12OPS_OFF;
    const DAC12.DAC12OPS;
enum DAC12.DAC12RES_t
index URL

DAC12RES Bit

Configuration settings
values of type DAC12.DAC12RES_t
    const DAC12.DAC12RES_OFF;
    const DAC12.DAC12RES;
enum DAC12.DAC12SREF_t
index URL

DAC12SREFx Bits

Configuration settings
values of type DAC12.DAC12SREF_t
    const DAC12.DAC12SREF_0;
    const DAC12.DAC12SREF_1;
    const DAC12.DAC12SREF_2;
    const DAC12.DAC12SREF_3;
struct DAC12.DAC12_xCTL_t
index URL
Configuration settings
var obj = new DAC12.DAC12_xCTL_t;
    obj.DAC12OPS = DAC12.DAC12OPS_t ...
    // DAC12 output select 0 DAC12_0 output on P6.6, DAC12_1 output on P6.7 1 DAC12_0 output on VeREF+, DAC12_1 output on P6.5
    obj.DAC12SREF = DAC12.DAC12SREF_t ...
    // DAC12 select reference voltage 00 VREF+ 01 VREF+ 10 VeREF+ 11 VeREF+
    obj.DAC12RES = DAC12.DAC12RES_t ...
    // DAC12 resolution select 0 12-bit resolution 1 8-bit resolution
    obj.DAC12LSEL = DAC12.DAC12LSEL_t ...
    // DAC12 load select. Selects the load trigger for the DAC12 latch. DAC12ENC must be set for the DAC to update, except when DAC12LSELx = 0. 00 DAC12 latch loads when DAC12_xDATwritten (DAC12ENCis ignored) 01 DAC12 latch loads when DAC12_xDAT written, or, when grouped, when all DAC12_xDAT registers in the group have been written. 10 Rising edge of Timer_A.OUT1 (TA1) 11 Rising edge of Timer_B.OUT2 (TB2)
    obj.DAC12CALON = DAC12.DAC12CALON_t ...
    // DAC12 calibration on. This bit initiates the DAC12 offset calibration sequence and is automatically reset when the calibration completes. 0 Calibration is not active 1 Initiate calibration/calibration in progress
    obj.DAC12IR = DAC12.DAC12IR_t ...
    // DAC12 input range. This bit sets the reference input and voltage output range. 0 DAC12 full-scale output = 3x reference voltage 1 DAC12 full-scale output = 1x reference voltage
    obj.DAC12AMP = DAC12.DAC12AMP_t ...
    // DAC12 amplifier setting. These bits select settling time vs current consumption for the DAC12 input and output amplifiers. DAC12AMPx Input Buffer Output Buffer 000 Off DAC12 off, output high Z 001 Off DAC12 off, output 0 V 010 Low speed/current Low speed/current 011 Low speed/current Medium speed/current 100 Low speed/current High speed/current 101 Medium speed/current Medium speed/current 110 Medium speed/current High speed/current 111 High speed/current High speed/current
    obj.DAC12DF = DAC12.DAC12DF_t ...
    // DAC12 data format 0 Straight binary 1 2s complement
    obj.DAC12IE = DAC12.DAC12IE_t ...
    // DAC12 interrupt enable 0 Disabled 1 Enabled
    obj.DAC12IFG = DAC12.DAC12IFG_t ...
    // DAC12 Interrupt flag 0 No interrupt pending 1 Interrupt pending
    obj.DAC12ENC = DAC12.DAC12ENC_t ...
    // DAC12 enable conversion. This bit enables the DAC12 module when DAC12LSELx > 0. when DAC12LSELx = 0, DAC12ENC is ignored. 0 DAC12 disabled 1 DAC12 enabled
    obj.DAC12GRP = DAC12.DAC12GRP_t ...
    // DAC12 group. Groups DAC12_x with the next higher DAC12_x. 0 Not grouped 1 Grouped
struct DAC12.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new DAC12.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct DAC12.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new DAC12.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
DAC12.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
DAC12.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
DAC12.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
DAC12.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new DAC12.Params;
// Instance config-params object
    params.DAC12_0CTL = DAC12.DAC12_xCTL_t {
    // DAC12_0CTL Register
        DAC12OPS: IDAC.DAC12OPS_OFF,
        DAC12SREF: IDAC.DAC12SREF_0,
        DAC12RES: IDAC.DAC12RES_OFF,
        DAC12LSEL: IDAC.DAC12LSEL_0,
        DAC12CALON: IDAC.DAC12CALON_OFF,
        DAC12IR: IDAC.DAC12IR_OFF,
        DAC12AMP: IDAC.DAC12AMP_0,
        DAC12DF: IDAC.DAC12DF_OFF,
        DAC12IE: IDAC.DAC12IE_OFF,
        DAC12IFG: IDAC.DAC12IFG_OFF,
        DAC12ENC: IDAC.DAC12ENC_OFF,
        DAC12GRP: IDAC.DAC12GRP_OFF
    };
    params.DAC12_0DAT = Bits16 0;
    // DAC12_0DAT Register
    params.DAC12_1CTL = DAC12.DAC12_xCTL_t {
    // DAC12_1CTL Register
        DAC12OPS: IDAC.DAC12OPS_OFF,
        DAC12SREF: IDAC.DAC12SREF_0,
        DAC12RES: IDAC.DAC12RES_OFF,
        DAC12LSEL: IDAC.DAC12LSEL_0,
        DAC12CALON: IDAC.DAC12CALON_OFF,
        DAC12IR: IDAC.DAC12IR_OFF,
        DAC12AMP: IDAC.DAC12AMP_0,
        DAC12DF: IDAC.DAC12DF_OFF,
        DAC12IE: IDAC.DAC12IE_OFF,
        DAC12IFG: IDAC.DAC12IFG_OFF,
        DAC12ENC: IDAC.DAC12ENC_OFF,
        DAC12GRP: IDAC.DAC12GRP_OFF
    };
    params.DAC12_1DAT = Bits16 0;
    // DAC12_1DAT Register
    params.forceSetDefaultRegister = DAC12.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "DAC12_0CTL",
            regForceSet: false
        },
        {
            register: "DAC12_1CTL",
            regForceSet: false
        },
        {
            register: "DAC12_0DAT",
            regForceSet: false
        },
        {
            register: "DAC12_1DAT",
            regForceSet: false
        }
    ];
    params.interruptSource = DAC12.regIntVect_t[2] undefined;
    // DAC12 has 2 interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config DAC12.Params.DAC12_0CTL // instance
index URL

DAC12_0CTL Register

Configuration settings
var params = new DAC12.Params;
...
params.DAC12_0CTL = DAC12.DAC12_xCTL_t {
    DAC12OPS: IDAC.DAC12OPS_OFF,
    DAC12SREF: IDAC.DAC12SREF_0,
    DAC12RES: IDAC.DAC12RES_OFF,
    DAC12LSEL: IDAC.DAC12LSEL_0,
    DAC12CALON: IDAC.DAC12CALON_OFF,
    DAC12IR: IDAC.DAC12IR_OFF,
    DAC12AMP: IDAC.DAC12AMP_0,
    DAC12DF: IDAC.DAC12DF_OFF,
    DAC12IE: IDAC.DAC12IE_OFF,
    DAC12IFG: IDAC.DAC12IFG_OFF,
    DAC12ENC: IDAC.DAC12ENC_OFF,
    DAC12GRP: IDAC.DAC12GRP_OFF
};
config DAC12.Params.DAC12_0DAT // instance
index URL

DAC12_0DAT Register

Configuration settings
var params = new DAC12.Params;
...
params.DAC12_0DAT = Bits16 0;
config DAC12.Params.DAC12_1CTL // instance
index URL

DAC12_1CTL Register

Configuration settings
var params = new DAC12.Params;
...
params.DAC12_1CTL = DAC12.DAC12_xCTL_t {
    DAC12OPS: IDAC.DAC12OPS_OFF,
    DAC12SREF: IDAC.DAC12SREF_0,
    DAC12RES: IDAC.DAC12RES_OFF,
    DAC12LSEL: IDAC.DAC12LSEL_0,
    DAC12CALON: IDAC.DAC12CALON_OFF,
    DAC12IR: IDAC.DAC12IR_OFF,
    DAC12AMP: IDAC.DAC12AMP_0,
    DAC12DF: IDAC.DAC12DF_OFF,
    DAC12IE: IDAC.DAC12IE_OFF,
    DAC12IFG: IDAC.DAC12IFG_OFF,
    DAC12ENC: IDAC.DAC12ENC_OFF,
    DAC12GRP: IDAC.DAC12GRP_OFF
};
config DAC12.Params.DAC12_1DAT // instance
index URL

DAC12_1DAT Register

Configuration settings
var params = new DAC12.Params;
...
params.DAC12_1DAT = Bits16 0;
config DAC12.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new DAC12.Params;
...
const params.forceSetDefaultRegister = DAC12.ForceSetDefaultRegister_t[] [
    {
        register: "DAC12_0CTL",
        regForceSet: false
    },
    {
        register: "DAC12_1CTL",
        regForceSet: false
    },
    {
        register: "DAC12_0DAT",
        regForceSet: false
    },
    {
        register: "DAC12_1DAT",
        regForceSet: false
    }
];
config DAC12.Params.interruptSource // instance
index URL

DAC12 has 2 interrupt enables

Configuration settings
var params = new DAC12.Params;
...
params.interruptSource = DAC12.regIntVect_t[2] undefined;
config DAC12.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new DAC12.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config DAC12.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new DAC12.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new DAC12.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DAC12.create(params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:03 GMT


interface ti.catalog.msp430.peripherals.dac.IDAC

metaonly interface ti.catalog.msp430.peripherals.dac.IDAC
index URL

MSP430 Digital to Analog Converter Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
metaonly interface IDAC { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
package ti.catalog.msp430.peripherals.dac;
metaonly interface IDAC inherits IPeripheral {
module-wide constants & types
    enum DAC12AMP_t// DAC12AMPx Bits {
         DAC12AMP_0,
         DAC12AMP_1,
         DAC12AMP_2,
         DAC12AMP_3,
         DAC12AMP_4,
         DAC12AMP_5,
         DAC12AMP_6,
         DAC12AMP_7
    };
    enum DAC12CALON_t// DAC12CALON Bit {
         DAC12CALON_OFF,
         DAC12CALON
    };
    enum DAC12DF_t// DAC12DF Bit {
         DAC12DF_OFF,
         DAC12DF
    };
    enum DAC12ENC_t// DAC12ENC Bit {
         DAC12ENC_OFF,
         DAC12ENC
    };
    enum DAC12GRP_t// DAC12GRP Bit {
         DAC12GRP_OFF,
         DAC12GRP
    };
    enum DAC12IE_t// DAC12IE Bit {
         DAC12IE_OFF,
         DAC12IE
    };
    enum DAC12IFG_t// DAC12IFG Bit {
         DAC12IFG_OFF,
         DAC12IFG
    };
    enum DAC12IR_t// DAC12IR Bit {
         DAC12IR_OFF,
         DAC12IR
    };
    enum DAC12LSEL_t// DAC12LSELx Bits {
         DAC12LSEL_0,
         DAC12LSEL_1,
         DAC12LSEL_2,
         DAC12LSEL_3
    };
    enum DAC12OPS_t// DAC12OPS Bit {
         DAC12OPS_OFF,
         DAC12OPS
    };
    enum DAC12RES_t// DAC12RES Bit {
         DAC12RES_OFF,
         DAC12RES
    };
    enum DAC12SREF_t// DAC12SREFx Bits {
         DAC12SREF_0,
         DAC12SREF_1,
         DAC12SREF_2,
         DAC12SREF_3
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
enum IDAC.DAC12AMP_t
index URL

DAC12AMPx Bits

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12AMP_t {
    DAC12AMP_0,
    DAC12AMP_1,
    DAC12AMP_2,
    DAC12AMP_3,
    DAC12AMP_4,
    DAC12AMP_5,
    DAC12AMP_6,
    DAC12AMP_7
};
enum IDAC.DAC12CALON_t
index URL

DAC12CALON Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12CALON_t {
    DAC12CALON_OFF,
    DAC12CALON
};
enum IDAC.DAC12DF_t
index URL

DAC12DF Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12DF_t {
    DAC12DF_OFF,
    DAC12DF
};
enum IDAC.DAC12ENC_t
index URL

DAC12ENC Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12ENC_t {
    DAC12ENC_OFF,
    DAC12ENC
};
enum IDAC.DAC12GRP_t
index URL

DAC12GRP Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12GRP_t {
    DAC12GRP_OFF,
    DAC12GRP
};
enum IDAC.DAC12IE_t
index URL

DAC12IE Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12IE_t {
    DAC12IE_OFF,
    DAC12IE
};
enum IDAC.DAC12IFG_t
index URL

DAC12IFG Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12IFG_t {
    DAC12IFG_OFF,
    DAC12IFG
};
enum IDAC.DAC12IR_t
index URL

DAC12IR Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12IR_t {
    DAC12IR_OFF,
    DAC12IR
};
enum IDAC.DAC12LSEL_t
index URL

DAC12LSELx Bits

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12LSEL_t {
    DAC12LSEL_0,
    DAC12LSEL_1,
    DAC12LSEL_2,
    DAC12LSEL_3
};
enum IDAC.DAC12OPS_t
index URL

DAC12OPS Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12OPS_t {
    DAC12OPS_OFF,
    DAC12OPS
};
enum IDAC.DAC12RES_t
index URL

DAC12RES Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12RES_t {
    DAC12RES_OFF,
    DAC12RES
};
enum IDAC.DAC12SREF_t
index URL

DAC12SREFx Bits

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
enum DAC12SREF_t {
    DAC12SREF_0,
    DAC12SREF_1,
    DAC12SREF_2,
    DAC12SREF_3
};
typedef IDAC.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IDAC.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
typedef String StringArray[];
struct IDAC.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IDAC.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IDAC.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IDAC.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IDAC.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IDAC.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dac/IDAC.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:03 GMT


package ti.catalog.msp430.peripherals.dma
index URL

MSP430 DMA controller peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/package.xdc
package ti.catalog.msp430.peripherals.dma [1, 0, 0] {
    interface IDMA;
    // MSP430 DMA controller
    module DMA;
    // MSP430 DMA controller
}
generated on Sun, 25 Nov 2018 22:20:02 GMT


module ti.catalog.msp430.peripherals.dma.DMA

metaonly module ti.catalog.msp430.peripherals.dma.DMA
index URL

MSP430 DMA controller

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/dma/DMA.xdc
var DMA = xdc.useModule('ti.catalog.msp430.peripherals.dma.DMA');
module-wide constants & types
    var obj = new DMA.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new DMA.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
    var obj = new DMA.regTriggerVect_t// Trigger vector description;
        obj.channel = Int ...
        obj.triggerName = String ...
        obj.value = Int ...
module-wide functions
     DMA.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     DMA.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new DMA.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = DMA.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// DMA interrupt enables = DMA.regIntVect_t[8] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfChannels// = UInt undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
        params.triggerSource// = DMA.regTriggerVect_t[32][8] undefined;
struct DMA.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new DMA.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct DMA.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new DMA.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
struct DMA.regTriggerVect_t
index URL

Trigger vector description

Configuration settings
var obj = new DMA.regTriggerVect_t;
    obj.channel = Int ...
    obj.triggerName = String ...
    obj.value = Int ...
DMA.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
DMA.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
DMA.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
DMA.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new DMA.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = DMA.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = DMA.regIntVect_t[8] undefined;
    // DMA interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfChannels = UInt undefined;
    //
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
    params.triggerSource = DMA.regTriggerVect_t[32][8] undefined;
    //
config DMA.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new DMA.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config DMA.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new DMA.Params;
...
const params.forceSetDefaultRegister = DMA.ForceSetDefaultRegister_t[] [ ];
config DMA.Params.interruptSource // instance
index URL

DMA interrupt enables

Configuration settings
var params = new DMA.Params;
...
params.interruptSource = DMA.regIntVect_t[8] undefined;
config DMA.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new DMA.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config DMA.Params.numberOfChannels // instance
index URL
Configuration settings
var params = new DMA.Params;
...
params.numberOfChannels = UInt undefined;
config DMA.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new DMA.Params;
...
params.owner = String undefined;
config DMA.Params.triggerSource // instance
index URL
Configuration settings
var params = new DMA.Params;
...
params.triggerSource = DMA.regTriggerVect_t[32][8] undefined;
generated on Sun, 25 Nov 2018 22:20:02 GMT


interface ti.catalog.msp430.peripherals.dma.IDMA

metaonly interface ti.catalog.msp430.peripherals.dma.IDMA
index URL

MSP430 DMA controller

XDCspec summary sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
metaonly interface IDMA { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
package ti.catalog.msp430.peripherals.dma;
metaonly interface IDMA inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
    metaonly struct regTriggerVect_t// Trigger vector description {
        Int channel;
        String triggerName;
        Int value;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IDMA.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IDMA.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
typedef String StringArray[];
struct IDMA.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IDMA.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
struct IDMA.regTriggerVect_t
index URL

Trigger vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
metaonly struct regTriggerVect_t {
    Int channel;
    String triggerName;
    Int value;
};
IDMA.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IDMA.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IDMA.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IDMA.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/dma/IDMA.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:02 GMT


package ti.catalog.msp430.peripherals.frctl
index URL

MSP430 FRAM controller (FRCTL) peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/package.xdc
package ti.catalog.msp430.peripherals.frctl [1, 0, 0] {
    interface IFRCTL;
    // MSP430 FRAM controller (FRCTL)
    module FRCTL;
    // MSP430 FRAM controller (FRCTL)
}
generated on Sun, 25 Nov 2018 22:20:03 GMT


module ti.catalog.msp430.peripherals.frctl.FRCTL

metaonly module ti.catalog.msp430.peripherals.frctl.FRCTL
index URL

MSP430 FRAM controller (FRCTL)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/frctl/FRCTL.xdc
var FRCTL = xdc.useModule('ti.catalog.msp430.peripherals.frctl.FRCTL');
module-wide constants & types
    var obj = new FRCTL.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     FRCTL.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     FRCTL.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new FRCTL.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = FRCTL.ForceSetDefaultRegister_t[] [ ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = FRCTL.create// Create an instance-object(IClock.Instance clock, params);
struct FRCTL.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new FRCTL.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
FRCTL.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
FRCTL.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
FRCTL.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
FRCTL.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new FRCTL.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = FRCTL.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config FRCTL.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new FRCTL.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config FRCTL.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new FRCTL.Params;
...
const params.forceSetDefaultRegister = FRCTL.ForceSetDefaultRegister_t[] [ ];
config FRCTL.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new FRCTL.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config FRCTL.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new FRCTL.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new FRCTL.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = FRCTL.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:03 GMT


interface ti.catalog.msp430.peripherals.frctl.IFRCTL

metaonly interface ti.catalog.msp430.peripherals.frctl.IFRCTL
index URL

MSP430 FRAM controller (FRCTL)

XDCspec summary sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
metaonly interface IFRCTL { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
package ti.catalog.msp430.peripherals.frctl;
metaonly interface IFRCTL inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance creation
     create// Create an instance-object(IClock.Instance clock);
}
typedef IFRCTL.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IFRCTL.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
typedef String StringArray[];
struct IFRCTL.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
IFRCTL.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IFRCTL.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IFRCTL.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IFRCTL.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
config String owner;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/peripherals/frctl/IFRCTL.xdc
create(IClock.Instance clock);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:03 GMT


package ti.catalog.msp430.peripherals.gpio
index URL

MSP430 GPIO peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/package.xdc
package ti.catalog.msp430.peripherals.gpio [1, 0, 0] {
    interface IGPIO;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F20x1;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F20x2;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F20x3;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F21x1;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F21x2;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F22x2;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F22x4;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F23x;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F23x0;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F241x;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F24x;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F24x1;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F261x;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430F543xA;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5736_32_26_22;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5737_33_27_23;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5738_34_30_28_24_20;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5739_35_31_29_25_21;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR59xx_FR58xx;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2210;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2230;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x01;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x02;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x03;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x11;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x12;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x13;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x21;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x31;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x32;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x33;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x44;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x52;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x53;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430G2x55;
    // MSP430 General Purpose Input Output Ports
}
generated on Sun, 25 Nov 2018 22:19:59 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x1

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x1
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F20x1.xdc
var GPIO_MSP430F20x1 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x1');
module-wide constants & types
    values of type GPIO_MSP430F20x1.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F20x1.BIT0_OFF;
        const GPIO_MSP430F20x1.BIT0;
    values of type GPIO_MSP430F20x1.Bit1_t//
        const GPIO_MSP430F20x1.BIT1_OFF;
        const GPIO_MSP430F20x1.BIT1;
    values of type GPIO_MSP430F20x1.Bit2_t//
        const GPIO_MSP430F20x1.BIT2_OFF;
        const GPIO_MSP430F20x1.BIT2;
    values of type GPIO_MSP430F20x1.Bit3_t//
        const GPIO_MSP430F20x1.BIT3_OFF;
        const GPIO_MSP430F20x1.BIT3;
    values of type GPIO_MSP430F20x1.Bit4_t//
        const GPIO_MSP430F20x1.BIT4_OFF;
        const GPIO_MSP430F20x1.BIT4;
    values of type GPIO_MSP430F20x1.Bit5_t//
        const GPIO_MSP430F20x1.BIT5_OFF;
        const GPIO_MSP430F20x1.BIT5;
    values of type GPIO_MSP430F20x1.Bit6_t//
        const GPIO_MSP430F20x1.BIT6_OFF;
        const GPIO_MSP430F20x1.BIT6;
    values of type GPIO_MSP430F20x1.Bit7_t//
        const GPIO_MSP430F20x1.BIT7_OFF;
        const GPIO_MSP430F20x1.BIT7;
    values of type GPIO_MSP430F20x1.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F20x1.IE_OFF// Disabled;
        const GPIO_MSP430F20x1.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F20x1.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F20x1.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F20x1.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F20x1.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F20x1.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F20x1.PUDRE_OFF// Disabled;
        const GPIO_MSP430F20x1.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F20x1.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F20x1.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F20x1.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F20x1.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F20x1.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F20x1.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x1.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F20x1.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F20x1.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F20x1.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F20x1.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F20x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F20x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F20x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F20x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F20x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F20x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F20x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F20x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F20x1.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x1 device, there are 8 + 2 = 10 pins total = GPIO_MSP430F20x1.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F20x1.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F20x1.create// Create an instance-object(IComparator.Instance comparator, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F20x1.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F20x1.Bit0_t
    const GPIO_MSP430F20x1.BIT0_OFF;
    const GPIO_MSP430F20x1.BIT0;
enum GPIO_MSP430F20x1.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F20x1.Bit1_t
    const GPIO_MSP430F20x1.BIT1_OFF;
    const GPIO_MSP430F20x1.BIT1;
enum GPIO_MSP430F20x1.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F20x1.Bit2_t
    const GPIO_MSP430F20x1.BIT2_OFF;
    const GPIO_MSP430F20x1.BIT2;
enum GPIO_MSP430F20x1.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F20x1.Bit3_t
    const GPIO_MSP430F20x1.BIT3_OFF;
    const GPIO_MSP430F20x1.BIT3;
enum GPIO_MSP430F20x1.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F20x1.Bit4_t
    const GPIO_MSP430F20x1.BIT4_OFF;
    const GPIO_MSP430F20x1.BIT4;
enum GPIO_MSP430F20x1.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F20x1.Bit5_t
    const GPIO_MSP430F20x1.BIT5_OFF;
    const GPIO_MSP430F20x1.BIT5;
enum GPIO_MSP430F20x1.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F20x1.Bit6_t
    const GPIO_MSP430F20x1.BIT6_OFF;
    const GPIO_MSP430F20x1.BIT6;
enum GPIO_MSP430F20x1.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F20x1.Bit7_t
    const GPIO_MSP430F20x1.BIT7_OFF;
    const GPIO_MSP430F20x1.BIT7;
enum GPIO_MSP430F20x1.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F20x1.InterruptEnable_t
    const GPIO_MSP430F20x1.IE_OFF;
    // Disabled
    const GPIO_MSP430F20x1.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F20x1.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F20x1.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F20x1.OutputState_t
    const GPIO_MSP430F20x1.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F20x1.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F20x1.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F20x1.ResEnable_t
    const GPIO_MSP430F20x1.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F20x1.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F20x1.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F20x1.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x1.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F20x1.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x1.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F20x1.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x1.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F20x1.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x1.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F20x1.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F20x1.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F20x1.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F20x1.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F20x1.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F20x1.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F20x1.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F20x1.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F20x1.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F20x1.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F20x1.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F20x1.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F20x1.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F20x1.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F20x1.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F20x1.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F20x1.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F20x1.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F20x1.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F20x1.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F20x1.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F20x1.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F20x1.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F20x1.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F20x1.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F20x1.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F20x1.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F20x1.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F20x1.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F20x1.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x1 device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F20x1.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F20x1.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P1DIR = GPIO_MSP430F20x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P1OUT = GPIO_MSP430F20x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P1REN = GPIO_MSP430F20x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P1SEL = GPIO_MSP430F20x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P2DIR = GPIO_MSP430F20x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P2OUT = GPIO_MSP430F20x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P2REN = GPIO_MSP430F20x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P2SEL = GPIO_MSP430F20x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F20x1.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x1.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.devicePinSetting = GPIO_MSP430F20x1.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430F20x1.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x1 device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
const params.devicePins = GPIO_MSP430F20x1.DevicePin_t[8][2] computed value;
config GPIO_MSP430F20x1.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F20x1.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430F20x1.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F20x1.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F20x1.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F20x1.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F20x1.create(IComparator.Instance comparator, params);
// Create an instance-object
GPIO_MSP430F20x1.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F20x1.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F20x1.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F20x1.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F20x1.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F20x1.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:39 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x2

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x2
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F20x2.xdc
var GPIO_MSP430F20x2 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x2');
module-wide constants & types
    values of type GPIO_MSP430F20x2.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F20x2.BIT0_OFF;
        const GPIO_MSP430F20x2.BIT0;
    values of type GPIO_MSP430F20x2.Bit1_t//
        const GPIO_MSP430F20x2.BIT1_OFF;
        const GPIO_MSP430F20x2.BIT1;
    values of type GPIO_MSP430F20x2.Bit2_t//
        const GPIO_MSP430F20x2.BIT2_OFF;
        const GPIO_MSP430F20x2.BIT2;
    values of type GPIO_MSP430F20x2.Bit3_t//
        const GPIO_MSP430F20x2.BIT3_OFF;
        const GPIO_MSP430F20x2.BIT3;
    values of type GPIO_MSP430F20x2.Bit4_t//
        const GPIO_MSP430F20x2.BIT4_OFF;
        const GPIO_MSP430F20x2.BIT4;
    values of type GPIO_MSP430F20x2.Bit5_t//
        const GPIO_MSP430F20x2.BIT5_OFF;
        const GPIO_MSP430F20x2.BIT5;
    values of type GPIO_MSP430F20x2.Bit6_t//
        const GPIO_MSP430F20x2.BIT6_OFF;
        const GPIO_MSP430F20x2.BIT6;
    values of type GPIO_MSP430F20x2.Bit7_t//
        const GPIO_MSP430F20x2.BIT7_OFF;
        const GPIO_MSP430F20x2.BIT7;
    values of type GPIO_MSP430F20x2.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F20x2.IE_OFF// Disabled;
        const GPIO_MSP430F20x2.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F20x2.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F20x2.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F20x2.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F20x2.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F20x2.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F20x2.PUDRE_OFF// Disabled;
        const GPIO_MSP430F20x2.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F20x2.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F20x2.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F20x2.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F20x2.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F20x2.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F20x2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x2.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F20x2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F20x2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F20x2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F20x2.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F20x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F20x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F20x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F20x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F20x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F20x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F20x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F20x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F20x2.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x2 device, there are 8 + 2 = 10 pins total = GPIO_MSP430F20x2.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F20x2.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F20x2.create// Create an instance-object(USI.Instance usi, ADC10.Instance adc10, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F20x2.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F20x2.Bit0_t
    const GPIO_MSP430F20x2.BIT0_OFF;
    const GPIO_MSP430F20x2.BIT0;
enum GPIO_MSP430F20x2.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F20x2.Bit1_t
    const GPIO_MSP430F20x2.BIT1_OFF;
    const GPIO_MSP430F20x2.BIT1;
enum GPIO_MSP430F20x2.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F20x2.Bit2_t
    const GPIO_MSP430F20x2.BIT2_OFF;
    const GPIO_MSP430F20x2.BIT2;
enum GPIO_MSP430F20x2.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F20x2.Bit3_t
    const GPIO_MSP430F20x2.BIT3_OFF;
    const GPIO_MSP430F20x2.BIT3;
enum GPIO_MSP430F20x2.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F20x2.Bit4_t
    const GPIO_MSP430F20x2.BIT4_OFF;
    const GPIO_MSP430F20x2.BIT4;
enum GPIO_MSP430F20x2.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F20x2.Bit5_t
    const GPIO_MSP430F20x2.BIT5_OFF;
    const GPIO_MSP430F20x2.BIT5;
enum GPIO_MSP430F20x2.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F20x2.Bit6_t
    const GPIO_MSP430F20x2.BIT6_OFF;
    const GPIO_MSP430F20x2.BIT6;
enum GPIO_MSP430F20x2.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F20x2.Bit7_t
    const GPIO_MSP430F20x2.BIT7_OFF;
    const GPIO_MSP430F20x2.BIT7;
enum GPIO_MSP430F20x2.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F20x2.InterruptEnable_t
    const GPIO_MSP430F20x2.IE_OFF;
    // Disabled
    const GPIO_MSP430F20x2.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F20x2.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F20x2.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F20x2.OutputState_t
    const GPIO_MSP430F20x2.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F20x2.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F20x2.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F20x2.ResEnable_t
    const GPIO_MSP430F20x2.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F20x2.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F20x2.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F20x2.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x2.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F20x2.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x2.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F20x2.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x2.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F20x2.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x2.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F20x2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F20x2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F20x2.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F20x2.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F20x2.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F20x2.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F20x2.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F20x2.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F20x2.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F20x2.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F20x2.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F20x2.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F20x2.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F20x2.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F20x2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F20x2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F20x2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F20x2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F20x2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F20x2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F20x2.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F20x2.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F20x2.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F20x2.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F20x2.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F20x2.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F20x2.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F20x2.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F20x2.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F20x2.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x2 device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F20x2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F20x2.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P1DIR = GPIO_MSP430F20x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P1OUT = GPIO_MSP430F20x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P1REN = GPIO_MSP430F20x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P1SEL = GPIO_MSP430F20x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P2DIR = GPIO_MSP430F20x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P2OUT = GPIO_MSP430F20x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P2REN = GPIO_MSP430F20x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P2SEL = GPIO_MSP430F20x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F20x2.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x2.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.devicePinSetting = GPIO_MSP430F20x2.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430F20x2.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x2 device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
const params.devicePins = GPIO_MSP430F20x2.DevicePin_t[8][2] computed value;
config GPIO_MSP430F20x2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F20x2.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430F20x2.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F20x2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F20x2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F20x2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F20x2.create(USI.Instance usi, ADC10.Instance adc10, params);
// Create an instance-object
GPIO_MSP430F20x2.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F20x2.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F20x2.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F20x2.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F20x2.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F20x2.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:40 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x3

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x3
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F20x3.xdc
var GPIO_MSP430F20x3 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x3');
module-wide constants & types
    values of type GPIO_MSP430F20x3.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F20x3.BIT0_OFF;
        const GPIO_MSP430F20x3.BIT0;
    values of type GPIO_MSP430F20x3.Bit1_t//
        const GPIO_MSP430F20x3.BIT1_OFF;
        const GPIO_MSP430F20x3.BIT1;
    values of type GPIO_MSP430F20x3.Bit2_t//
        const GPIO_MSP430F20x3.BIT2_OFF;
        const GPIO_MSP430F20x3.BIT2;
    values of type GPIO_MSP430F20x3.Bit3_t//
        const GPIO_MSP430F20x3.BIT3_OFF;
        const GPIO_MSP430F20x3.BIT3;
    values of type GPIO_MSP430F20x3.Bit4_t//
        const GPIO_MSP430F20x3.BIT4_OFF;
        const GPIO_MSP430F20x3.BIT4;
    values of type GPIO_MSP430F20x3.Bit5_t//
        const GPIO_MSP430F20x3.BIT5_OFF;
        const GPIO_MSP430F20x3.BIT5;
    values of type GPIO_MSP430F20x3.Bit6_t//
        const GPIO_MSP430F20x3.BIT6_OFF;
        const GPIO_MSP430F20x3.BIT6;
    values of type GPIO_MSP430F20x3.Bit7_t//
        const GPIO_MSP430F20x3.BIT7_OFF;
        const GPIO_MSP430F20x3.BIT7;
    values of type GPIO_MSP430F20x3.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F20x3.IE_OFF// Disabled;
        const GPIO_MSP430F20x3.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F20x3.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F20x3.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F20x3.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F20x3.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F20x3.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F20x3.PUDRE_OFF// Disabled;
        const GPIO_MSP430F20x3.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F20x3.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F20x3.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F20x3.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F20x3.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F20x3.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F20x3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F20x3.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F20x3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F20x3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F20x3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F20x3.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F20x3.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F20x3.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F20x3.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F20x3.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F20x3.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F20x3.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F20x3.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F20x3.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F20x3.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x3 device, there are 8 + 2 = 10 pins total = GPIO_MSP430F20x3.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F20x3.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F20x3.create// Create an instance-object(USI.Instance usi, SD16_A.Instance sd16_A, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F20x3.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F20x3.Bit0_t
    const GPIO_MSP430F20x3.BIT0_OFF;
    const GPIO_MSP430F20x3.BIT0;
enum GPIO_MSP430F20x3.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F20x3.Bit1_t
    const GPIO_MSP430F20x3.BIT1_OFF;
    const GPIO_MSP430F20x3.BIT1;
enum GPIO_MSP430F20x3.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F20x3.Bit2_t
    const GPIO_MSP430F20x3.BIT2_OFF;
    const GPIO_MSP430F20x3.BIT2;
enum GPIO_MSP430F20x3.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F20x3.Bit3_t
    const GPIO_MSP430F20x3.BIT3_OFF;
    const GPIO_MSP430F20x3.BIT3;
enum GPIO_MSP430F20x3.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F20x3.Bit4_t
    const GPIO_MSP430F20x3.BIT4_OFF;
    const GPIO_MSP430F20x3.BIT4;
enum GPIO_MSP430F20x3.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F20x3.Bit5_t
    const GPIO_MSP430F20x3.BIT5_OFF;
    const GPIO_MSP430F20x3.BIT5;
enum GPIO_MSP430F20x3.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F20x3.Bit6_t
    const GPIO_MSP430F20x3.BIT6_OFF;
    const GPIO_MSP430F20x3.BIT6;
enum GPIO_MSP430F20x3.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F20x3.Bit7_t
    const GPIO_MSP430F20x3.BIT7_OFF;
    const GPIO_MSP430F20x3.BIT7;
enum GPIO_MSP430F20x3.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F20x3.InterruptEnable_t
    const GPIO_MSP430F20x3.IE_OFF;
    // Disabled
    const GPIO_MSP430F20x3.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F20x3.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F20x3.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F20x3.OutputState_t
    const GPIO_MSP430F20x3.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F20x3.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F20x3.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F20x3.ResEnable_t
    const GPIO_MSP430F20x3.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F20x3.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F20x3.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F20x3.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x3.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F20x3.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x3.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F20x3.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x3.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F20x3.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F20x3.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F20x3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F20x3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F20x3.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F20x3.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F20x3.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F20x3.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F20x3.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F20x3.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F20x3.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F20x3.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F20x3.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F20x3.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F20x3.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F20x3.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F20x3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F20x3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F20x3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F20x3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F20x3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F20x3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F20x3.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F20x3.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F20x3.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F20x3.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F20x3.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F20x3.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F20x3.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F20x3.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F20x3.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F20x3.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x3 device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F20x3.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F20x3.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P1DIR = GPIO_MSP430F20x3.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P1OUT = GPIO_MSP430F20x3.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P1REN = GPIO_MSP430F20x3.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P1SEL = GPIO_MSP430F20x3.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P2DIR = GPIO_MSP430F20x3.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P2OUT = GPIO_MSP430F20x3.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P2REN = GPIO_MSP430F20x3.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P2SEL = GPIO_MSP430F20x3.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F20x3.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F20x3.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.devicePinSetting = GPIO_MSP430F20x3.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430F20x3.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F20x3 device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
const params.devicePins = GPIO_MSP430F20x3.DevicePin_t[8][2] computed value;
config GPIO_MSP430F20x3.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F20x3.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430F20x3.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F20x3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F20x3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F20x3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F20x3.create(USI.Instance usi, SD16_A.Instance sd16_A, params);
// Create an instance-object
GPIO_MSP430F20x3.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F20x3.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F20x3.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F20x3.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F20x3.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F20x3.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:40 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x1

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x1
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F21x1.xdc
var GPIO_MSP430F21x1 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x1');
module-wide constants & types
    values of type GPIO_MSP430F21x1.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F21x1.BIT0_OFF;
        const GPIO_MSP430F21x1.BIT0;
    values of type GPIO_MSP430F21x1.Bit1_t//
        const GPIO_MSP430F21x1.BIT1_OFF;
        const GPIO_MSP430F21x1.BIT1;
    values of type GPIO_MSP430F21x1.Bit2_t//
        const GPIO_MSP430F21x1.BIT2_OFF;
        const GPIO_MSP430F21x1.BIT2;
    values of type GPIO_MSP430F21x1.Bit3_t//
        const GPIO_MSP430F21x1.BIT3_OFF;
        const GPIO_MSP430F21x1.BIT3;
    values of type GPIO_MSP430F21x1.Bit4_t//
        const GPIO_MSP430F21x1.BIT4_OFF;
        const GPIO_MSP430F21x1.BIT4;
    values of type GPIO_MSP430F21x1.Bit5_t//
        const GPIO_MSP430F21x1.BIT5_OFF;
        const GPIO_MSP430F21x1.BIT5;
    values of type GPIO_MSP430F21x1.Bit6_t//
        const GPIO_MSP430F21x1.BIT6_OFF;
        const GPIO_MSP430F21x1.BIT6;
    values of type GPIO_MSP430F21x1.Bit7_t//
        const GPIO_MSP430F21x1.BIT7_OFF;
        const GPIO_MSP430F21x1.BIT7;
    values of type GPIO_MSP430F21x1.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F21x1.IE_OFF// Disabled;
        const GPIO_MSP430F21x1.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F21x1.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F21x1.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F21x1.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F21x1.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F21x1.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F21x1.PUDRE_OFF// Disabled;
        const GPIO_MSP430F21x1.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F21x1.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F21x1.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F21x1.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F21x1.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F21x1.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F21x1.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x1.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F21x1.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F21x1.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F21x1.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F21x1.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F21x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F21x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F21x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F21x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F21x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F21x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F21x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F21x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F21x1.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F21x1 device, there are 2 x 8 = 16 pins total = GPIO_MSP430F21x1.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F21x1.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F21x1.create// Create an instance-object(IComparator.Instance comparator, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F21x1.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F21x1.Bit0_t
    const GPIO_MSP430F21x1.BIT0_OFF;
    const GPIO_MSP430F21x1.BIT0;
enum GPIO_MSP430F21x1.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F21x1.Bit1_t
    const GPIO_MSP430F21x1.BIT1_OFF;
    const GPIO_MSP430F21x1.BIT1;
enum GPIO_MSP430F21x1.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F21x1.Bit2_t
    const GPIO_MSP430F21x1.BIT2_OFF;
    const GPIO_MSP430F21x1.BIT2;
enum GPIO_MSP430F21x1.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F21x1.Bit3_t
    const GPIO_MSP430F21x1.BIT3_OFF;
    const GPIO_MSP430F21x1.BIT3;
enum GPIO_MSP430F21x1.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F21x1.Bit4_t
    const GPIO_MSP430F21x1.BIT4_OFF;
    const GPIO_MSP430F21x1.BIT4;
enum GPIO_MSP430F21x1.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F21x1.Bit5_t
    const GPIO_MSP430F21x1.BIT5_OFF;
    const GPIO_MSP430F21x1.BIT5;
enum GPIO_MSP430F21x1.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F21x1.Bit6_t
    const GPIO_MSP430F21x1.BIT6_OFF;
    const GPIO_MSP430F21x1.BIT6;
enum GPIO_MSP430F21x1.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F21x1.Bit7_t
    const GPIO_MSP430F21x1.BIT7_OFF;
    const GPIO_MSP430F21x1.BIT7;
enum GPIO_MSP430F21x1.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F21x1.InterruptEnable_t
    const GPIO_MSP430F21x1.IE_OFF;
    // Disabled
    const GPIO_MSP430F21x1.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F21x1.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F21x1.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F21x1.OutputState_t
    const GPIO_MSP430F21x1.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F21x1.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F21x1.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F21x1.ResEnable_t
    const GPIO_MSP430F21x1.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F21x1.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F21x1.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F21x1.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x1.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F21x1.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x1.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F21x1.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x1.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F21x1.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x1.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F21x1.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F21x1.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F21x1.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F21x1.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F21x1.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F21x1.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F21x1.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F21x1.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F21x1.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F21x1.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F21x1.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F21x1.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F21x1.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F21x1.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F21x1.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F21x1.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F21x1.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F21x1.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F21x1.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F21x1.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F21x1.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F21x1.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F21x1.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F21x1.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F21x1.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F21x1.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F21x1.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F21x1.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F21x1.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F21x1.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F21x1 device, there are 2 x 8 = 16 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F21x1.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F21x1.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P1DIR = GPIO_MSP430F21x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P1OUT = GPIO_MSP430F21x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P1REN = GPIO_MSP430F21x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P1SEL = GPIO_MSP430F21x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P2DIR = GPIO_MSP430F21x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P2OUT = GPIO_MSP430F21x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P2REN = GPIO_MSP430F21x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P2SEL = GPIO_MSP430F21x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F21x1.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x1.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.devicePinSetting = GPIO_MSP430F21x1.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430F21x1.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F21x1 device, there are 2 x 8 = 16 pins total

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.devicePins = GPIO_MSP430F21x1.DevicePin_t[8][2] undefined;
config GPIO_MSP430F21x1.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F21x1.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430F21x1.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F21x1.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F21x1.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F21x1.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F21x1.create(IComparator.Instance comparator, params);
// Create an instance-object
GPIO_MSP430F21x1.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F21x1.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F21x1.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F21x1.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F21x1.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F21x1.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:41 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x2

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x2
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F21x2.xdc
var GPIO_MSP430F21x2 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x2');
module-wide constants & types
    values of type GPIO_MSP430F21x2.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F21x2.BIT0_OFF;
        const GPIO_MSP430F21x2.BIT0;
    values of type GPIO_MSP430F21x2.Bit1_t//
        const GPIO_MSP430F21x2.BIT1_OFF;
        const GPIO_MSP430F21x2.BIT1;
    values of type GPIO_MSP430F21x2.Bit2_t//
        const GPIO_MSP430F21x2.BIT2_OFF;
        const GPIO_MSP430F21x2.BIT2;
    values of type GPIO_MSP430F21x2.Bit3_t//
        const GPIO_MSP430F21x2.BIT3_OFF;
        const GPIO_MSP430F21x2.BIT3;
    values of type GPIO_MSP430F21x2.Bit4_t//
        const GPIO_MSP430F21x2.BIT4_OFF;
        const GPIO_MSP430F21x2.BIT4;
    values of type GPIO_MSP430F21x2.Bit5_t//
        const GPIO_MSP430F21x2.BIT5_OFF;
        const GPIO_MSP430F21x2.BIT5;
    values of type GPIO_MSP430F21x2.Bit6_t//
        const GPIO_MSP430F21x2.BIT6_OFF;
        const GPIO_MSP430F21x2.BIT6;
    values of type GPIO_MSP430F21x2.Bit7_t//
        const GPIO_MSP430F21x2.BIT7_OFF;
        const GPIO_MSP430F21x2.BIT7;
    values of type GPIO_MSP430F21x2.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F21x2.IE_OFF// Disabled;
        const GPIO_MSP430F21x2.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F21x2.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F21x2.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F21x2.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F21x2.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F21x2.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F21x2.PUDRE_OFF// Disabled;
        const GPIO_MSP430F21x2.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F21x2.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F21x2.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F21x2.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F21x2.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F21x2.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F21x2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F21x2.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F21x2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F21x2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F21x2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F21x2.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F21x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F21x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F21x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F21x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430F21x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F21x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F21x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F21x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F21x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430F21x2.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F21x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F21x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F21x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F21x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F21x2.DevicePinFunctionSetting_t[8][3] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F21x2 device, there are 3 x 8 = 24 pins total = GPIO_MSP430F21x2.DevicePin_t[8][3] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F21x2.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F21x2.create// Create an instance-object(ADC10.Instance adc10, IComparator.Instance comparator, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F21x2.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F21x2.Bit0_t
    const GPIO_MSP430F21x2.BIT0_OFF;
    const GPIO_MSP430F21x2.BIT0;
enum GPIO_MSP430F21x2.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F21x2.Bit1_t
    const GPIO_MSP430F21x2.BIT1_OFF;
    const GPIO_MSP430F21x2.BIT1;
enum GPIO_MSP430F21x2.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F21x2.Bit2_t
    const GPIO_MSP430F21x2.BIT2_OFF;
    const GPIO_MSP430F21x2.BIT2;
enum GPIO_MSP430F21x2.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F21x2.Bit3_t
    const GPIO_MSP430F21x2.BIT3_OFF;
    const GPIO_MSP430F21x2.BIT3;
enum GPIO_MSP430F21x2.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F21x2.Bit4_t
    const GPIO_MSP430F21x2.BIT4_OFF;
    const GPIO_MSP430F21x2.BIT4;
enum GPIO_MSP430F21x2.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F21x2.Bit5_t
    const GPIO_MSP430F21x2.BIT5_OFF;
    const GPIO_MSP430F21x2.BIT5;
enum GPIO_MSP430F21x2.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F21x2.Bit6_t
    const GPIO_MSP430F21x2.BIT6_OFF;
    const GPIO_MSP430F21x2.BIT6;
enum GPIO_MSP430F21x2.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F21x2.Bit7_t
    const GPIO_MSP430F21x2.BIT7_OFF;
    const GPIO_MSP430F21x2.BIT7;
enum GPIO_MSP430F21x2.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F21x2.InterruptEnable_t
    const GPIO_MSP430F21x2.IE_OFF;
    // Disabled
    const GPIO_MSP430F21x2.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F21x2.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F21x2.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F21x2.OutputState_t
    const GPIO_MSP430F21x2.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F21x2.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F21x2.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F21x2.ResEnable_t
    const GPIO_MSP430F21x2.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F21x2.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F21x2.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F21x2.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x2.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F21x2.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x2.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F21x2.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x2.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F21x2.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F21x2.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F21x2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F21x2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F21x2.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F21x2.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F21x2.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F21x2.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F21x2.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F21x2.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F21x2.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F21x2.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F21x2.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F21x2.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F21x2.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F21x2.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F21x2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F21x2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F21x2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F21x2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F21x2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F21x2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F21x2.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F21x2.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F21x2.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F21x2.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F21x2.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F21x2.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430F21x2.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430F21x2.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F21x2.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F21x2.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F21x2.DevicePinFunctionSetting_t[8][3] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F21x2.DevicePin_t[8][3] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F21x2 device, there are 3 x 8 = 24 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F21x2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F21x2.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1DIR = GPIO_MSP430F21x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1OUT = GPIO_MSP430F21x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1REN = GPIO_MSP430F21x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1SEL = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P1SEL2 = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2DIR = GPIO_MSP430F21x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2OUT = GPIO_MSP430F21x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2REN = GPIO_MSP430F21x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2SEL = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F21x2.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P2SEL2 = GPIO_MSP430F21x2.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P3DIR = GPIO_MSP430F21x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P3OUT = GPIO_MSP430F21x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P3REN = GPIO_MSP430F21x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P3SEL = GPIO_MSP430F21x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F21x2.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.devicePinSetting = GPIO_MSP430F21x2.DevicePinFunctionSetting_t[8][3] undefined;
config GPIO_MSP430F21x2.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F21x2 device, there are 3 x 8 = 24 pins total

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.devicePins = GPIO_MSP430F21x2.DevicePin_t[8][3] undefined;
config GPIO_MSP430F21x2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F21x2.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    }
];
config GPIO_MSP430F21x2.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F21x2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F21x2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F21x2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F21x2.create(ADC10.Instance adc10, IComparator.Instance comparator, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F21x2.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F21x2.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F21x2.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F21x2.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F21x2.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F21x2.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:41 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x2

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x2
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F22x2.xdc
var GPIO_MSP430F22x2 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x2');
module-wide constants & types
    values of type GPIO_MSP430F22x2.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F22x2.BIT0_OFF;
        const GPIO_MSP430F22x2.BIT0;
    values of type GPIO_MSP430F22x2.Bit1_t//
        const GPIO_MSP430F22x2.BIT1_OFF;
        const GPIO_MSP430F22x2.BIT1;
    values of type GPIO_MSP430F22x2.Bit2_t//
        const GPIO_MSP430F22x2.BIT2_OFF;
        const GPIO_MSP430F22x2.BIT2;
    values of type GPIO_MSP430F22x2.Bit3_t//
        const GPIO_MSP430F22x2.BIT3_OFF;
        const GPIO_MSP430F22x2.BIT3;
    values of type GPIO_MSP430F22x2.Bit4_t//
        const GPIO_MSP430F22x2.BIT4_OFF;
        const GPIO_MSP430F22x2.BIT4;
    values of type GPIO_MSP430F22x2.Bit5_t//
        const GPIO_MSP430F22x2.BIT5_OFF;
        const GPIO_MSP430F22x2.BIT5;
    values of type GPIO_MSP430F22x2.Bit6_t//
        const GPIO_MSP430F22x2.BIT6_OFF;
        const GPIO_MSP430F22x2.BIT6;
    values of type GPIO_MSP430F22x2.Bit7_t//
        const GPIO_MSP430F22x2.BIT7_OFF;
        const GPIO_MSP430F22x2.BIT7;
    values of type GPIO_MSP430F22x2.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F22x2.IE_OFF// Disabled;
        const GPIO_MSP430F22x2.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F22x2.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F22x2.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F22x2.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F22x2.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F22x2.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F22x2.PUDRE_OFF// Disabled;
        const GPIO_MSP430F22x2.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F22x2.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F22x2.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F22x2.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F22x2.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F22x2.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F22x2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x2.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F22x2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F22x2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F22x2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F22x2.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F22x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F22x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F22x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F22x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F22x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F22x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F22x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F22x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F22x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F22x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F22x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F22x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F22x2.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F22x2.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F22x2.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F22x2.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F22x2.DevicePinFunctionSetting_t[8][4] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F22xx device, there are 4 x 8 = 32 pins total = GPIO_MSP430F22x2.DevicePin_t[8][4] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F22x2.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F22x2.create// Create an instance-object(ADC10.Instance adc10, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F22x2.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F22x2.Bit0_t
    const GPIO_MSP430F22x2.BIT0_OFF;
    const GPIO_MSP430F22x2.BIT0;
enum GPIO_MSP430F22x2.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F22x2.Bit1_t
    const GPIO_MSP430F22x2.BIT1_OFF;
    const GPIO_MSP430F22x2.BIT1;
enum GPIO_MSP430F22x2.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F22x2.Bit2_t
    const GPIO_MSP430F22x2.BIT2_OFF;
    const GPIO_MSP430F22x2.BIT2;
enum GPIO_MSP430F22x2.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F22x2.Bit3_t
    const GPIO_MSP430F22x2.BIT3_OFF;
    const GPIO_MSP430F22x2.BIT3;
enum GPIO_MSP430F22x2.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F22x2.Bit4_t
    const GPIO_MSP430F22x2.BIT4_OFF;
    const GPIO_MSP430F22x2.BIT4;
enum GPIO_MSP430F22x2.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F22x2.Bit5_t
    const GPIO_MSP430F22x2.BIT5_OFF;
    const GPIO_MSP430F22x2.BIT5;
enum GPIO_MSP430F22x2.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F22x2.Bit6_t
    const GPIO_MSP430F22x2.BIT6_OFF;
    const GPIO_MSP430F22x2.BIT6;
enum GPIO_MSP430F22x2.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F22x2.Bit7_t
    const GPIO_MSP430F22x2.BIT7_OFF;
    const GPIO_MSP430F22x2.BIT7;
enum GPIO_MSP430F22x2.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F22x2.InterruptEnable_t
    const GPIO_MSP430F22x2.IE_OFF;
    // Disabled
    const GPIO_MSP430F22x2.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F22x2.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F22x2.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F22x2.OutputState_t
    const GPIO_MSP430F22x2.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F22x2.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F22x2.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F22x2.ResEnable_t
    const GPIO_MSP430F22x2.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F22x2.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F22x2.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F22x2.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x2.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F22x2.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x2.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F22x2.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x2.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F22x2.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x2.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F22x2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F22x2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F22x2.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F22x2.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F22x2.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F22x2.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F22x2.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F22x2.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F22x2.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F22x2.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F22x2.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F22x2.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F22x2.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F22x2.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F22x2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F22x2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F22x2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F22x2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F22x2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F22x2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F22x2.DevicePinFunctionSetting_t[8][4] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F22x2.DevicePin_t[8][4] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F22xx device, there are 4 x 8 = 32 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F22x2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F22x2.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P1DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P1OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P1REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P1SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P2DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P2OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P2REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P2SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F22x2.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P3DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P3OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P3REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P3SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P4DIR = GPIO_MSP430F22x2.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P4OUT = GPIO_MSP430F22x2.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P4REN = GPIO_MSP430F22x2.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.P4SEL = GPIO_MSP430F22x2.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x2.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.devicePinSetting = GPIO_MSP430F22x2.DevicePinFunctionSetting_t[8][4] undefined;
config GPIO_MSP430F22x2.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F22xx device, there are 4 x 8 = 32 pins total

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
const params.devicePins = GPIO_MSP430F22x2.DevicePin_t[8][4] computed value;
config GPIO_MSP430F22x2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F22x2.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    }
];
config GPIO_MSP430F22x2.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F22x2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F22x2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F22x2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F22x2.create(ADC10.Instance adc10, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F22x2.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F22x2.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F22x2.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F22x2.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F22x2.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F22x2.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:42 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x4

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x4
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F22x4.xdc
var GPIO_MSP430F22x4 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x4');
module-wide constants & types
    values of type GPIO_MSP430F22x4.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F22x4.BIT0_OFF;
        const GPIO_MSP430F22x4.BIT0;
    values of type GPIO_MSP430F22x4.Bit1_t//
        const GPIO_MSP430F22x4.BIT1_OFF;
        const GPIO_MSP430F22x4.BIT1;
    values of type GPIO_MSP430F22x4.Bit2_t//
        const GPIO_MSP430F22x4.BIT2_OFF;
        const GPIO_MSP430F22x4.BIT2;
    values of type GPIO_MSP430F22x4.Bit3_t//
        const GPIO_MSP430F22x4.BIT3_OFF;
        const GPIO_MSP430F22x4.BIT3;
    values of type GPIO_MSP430F22x4.Bit4_t//
        const GPIO_MSP430F22x4.BIT4_OFF;
        const GPIO_MSP430F22x4.BIT4;
    values of type GPIO_MSP430F22x4.Bit5_t//
        const GPIO_MSP430F22x4.BIT5_OFF;
        const GPIO_MSP430F22x4.BIT5;
    values of type GPIO_MSP430F22x4.Bit6_t//
        const GPIO_MSP430F22x4.BIT6_OFF;
        const GPIO_MSP430F22x4.BIT6;
    values of type GPIO_MSP430F22x4.Bit7_t//
        const GPIO_MSP430F22x4.BIT7_OFF;
        const GPIO_MSP430F22x4.BIT7;
    values of type GPIO_MSP430F22x4.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F22x4.IE_OFF// Disabled;
        const GPIO_MSP430F22x4.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F22x4.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F22x4.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F22x4.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F22x4.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F22x4.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F22x4.PUDRE_OFF// Disabled;
        const GPIO_MSP430F22x4.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F22x4.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F22x4.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F22x4.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F22x4.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F22x4.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F22x4.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F22x4.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F22x4.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F22x4.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F22x4.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F22x4.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F22x4.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F22x4.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F22x4.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F22x4.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F22x4.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F22x4.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F22x4.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F22x4.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F22x4.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F22x4.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F22x4.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F22x4.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F22x4.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F22x4.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F22x4.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F22x4.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F22x4.DevicePinFunctionSetting_t[8][4] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F22xx device, there are 4 x 8 = 32 pins total = GPIO_MSP430F22x4.DevicePin_t[8][4] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F22x4.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F22x4.create// Create an instance-object(ADC10.Instance adc10, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F22x4.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F22x4.Bit0_t
    const GPIO_MSP430F22x4.BIT0_OFF;
    const GPIO_MSP430F22x4.BIT0;
enum GPIO_MSP430F22x4.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F22x4.Bit1_t
    const GPIO_MSP430F22x4.BIT1_OFF;
    const GPIO_MSP430F22x4.BIT1;
enum GPIO_MSP430F22x4.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F22x4.Bit2_t
    const GPIO_MSP430F22x4.BIT2_OFF;
    const GPIO_MSP430F22x4.BIT2;
enum GPIO_MSP430F22x4.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F22x4.Bit3_t
    const GPIO_MSP430F22x4.BIT3_OFF;
    const GPIO_MSP430F22x4.BIT3;
enum GPIO_MSP430F22x4.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F22x4.Bit4_t
    const GPIO_MSP430F22x4.BIT4_OFF;
    const GPIO_MSP430F22x4.BIT4;
enum GPIO_MSP430F22x4.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F22x4.Bit5_t
    const GPIO_MSP430F22x4.BIT5_OFF;
    const GPIO_MSP430F22x4.BIT5;
enum GPIO_MSP430F22x4.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F22x4.Bit6_t
    const GPIO_MSP430F22x4.BIT6_OFF;
    const GPIO_MSP430F22x4.BIT6;
enum GPIO_MSP430F22x4.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F22x4.Bit7_t
    const GPIO_MSP430F22x4.BIT7_OFF;
    const GPIO_MSP430F22x4.BIT7;
enum GPIO_MSP430F22x4.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F22x4.InterruptEnable_t
    const GPIO_MSP430F22x4.IE_OFF;
    // Disabled
    const GPIO_MSP430F22x4.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F22x4.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F22x4.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F22x4.OutputState_t
    const GPIO_MSP430F22x4.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F22x4.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F22x4.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F22x4.ResEnable_t
    const GPIO_MSP430F22x4.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F22x4.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F22x4.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F22x4.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x4.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F22x4.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x4.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F22x4.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x4.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F22x4.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F22x4.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F22x4.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F22x4.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F22x4.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F22x4.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F22x4.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F22x4.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F22x4.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F22x4.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F22x4.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F22x4.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F22x4.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F22x4.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F22x4.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F22x4.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F22x4.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F22x4.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F22x4.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F22x4.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F22x4.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F22x4.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F22x4.DevicePinFunctionSetting_t[8][4] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F22x4.DevicePin_t[8][4] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F22xx device, there are 4 x 8 = 32 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F22x4.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F22x4.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P1DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P1OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P1REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P1SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P2DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P2OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P2REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P2SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F22x4.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P3DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P3OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P3REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P3SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P4DIR = GPIO_MSP430F22x4.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P4OUT = GPIO_MSP430F22x4.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P4REN = GPIO_MSP430F22x4.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.P4SEL = GPIO_MSP430F22x4.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F22x4.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.devicePinSetting = GPIO_MSP430F22x4.DevicePinFunctionSetting_t[8][4] undefined;
config GPIO_MSP430F22x4.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F22xx device, there are 4 x 8 = 32 pins total

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
const params.devicePins = GPIO_MSP430F22x4.DevicePin_t[8][4] computed value;
config GPIO_MSP430F22x4.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F22x4.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    }
];
config GPIO_MSP430F22x4.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F22x4.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F22x4.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F22x4.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F22x4.create(ADC10.Instance adc10, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F22x4.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F22x4.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F22x4.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F22x4.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F22x4.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F22x4.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:43 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F23x.xdc
var GPIO_MSP430F23x = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x');
module-wide constants & types
    values of type GPIO_MSP430F23x.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F23x.BIT0_OFF;
        const GPIO_MSP430F23x.BIT0;
    values of type GPIO_MSP430F23x.Bit1_t//
        const GPIO_MSP430F23x.BIT1_OFF;
        const GPIO_MSP430F23x.BIT1;
    values of type GPIO_MSP430F23x.Bit2_t//
        const GPIO_MSP430F23x.BIT2_OFF;
        const GPIO_MSP430F23x.BIT2;
    values of type GPIO_MSP430F23x.Bit3_t//
        const GPIO_MSP430F23x.BIT3_OFF;
        const GPIO_MSP430F23x.BIT3;
    values of type GPIO_MSP430F23x.Bit4_t//
        const GPIO_MSP430F23x.BIT4_OFF;
        const GPIO_MSP430F23x.BIT4;
    values of type GPIO_MSP430F23x.Bit5_t//
        const GPIO_MSP430F23x.BIT5_OFF;
        const GPIO_MSP430F23x.BIT5;
    values of type GPIO_MSP430F23x.Bit6_t//
        const GPIO_MSP430F23x.BIT6_OFF;
        const GPIO_MSP430F23x.BIT6;
    values of type GPIO_MSP430F23x.Bit7_t//
        const GPIO_MSP430F23x.BIT7_OFF;
        const GPIO_MSP430F23x.BIT7;
    values of type GPIO_MSP430F23x.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F23x.IE_OFF// Disabled;
        const GPIO_MSP430F23x.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F23x.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F23x.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F23x.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F23x.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F23x.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F23x.PUDRE_OFF// Disabled;
        const GPIO_MSP430F23x.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F23x.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F23x.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F23x.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F23x.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F23x.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F23x.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F23x.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F23x.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F23x.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F23x.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F23x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F23x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F23x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F23x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F23x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F23x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F23x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F23x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F23x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F23x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F23x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F23x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F23x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F23x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F23x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F23x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5DIR// Port 5 Direction Register = GPIO_MSP430F23x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5OUT// Port 5 Output Register = GPIO_MSP430F23x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5REN// Port 5 Resistor Enable Register = GPIO_MSP430F23x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5SEL// Port 5 Port Select Register = GPIO_MSP430F23x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6DIR// Port 6 Direction Register = GPIO_MSP430F23x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6OUT// Port 6 Output Register = GPIO_MSP430F23x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6REN// Port 6 Resistor Enable Register = GPIO_MSP430F23x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6SEL// Port 6 Port Select Register = GPIO_MSP430F23x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F23x.DevicePinFunctionSetting_t[8][6] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F23x device, there are 6 x 8 = 48 pins total = GPIO_MSP430F23x.DevicePin_t[8][6] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F23x.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P5OUT",
                regForceSet: true
            },
            {
                register: "P5SEL",
                regForceSet: false
            },
            {
                register: "P5DIR",
                regForceSet: true
            },
            {
                register: "P5REN",
                regForceSet: false
            },
            {
                register: "P6OUT",
                regForceSet: true
            },
            {
                register: "P6SEL",
                regForceSet: false
            },
            {
                register: "P6DIR",
                regForceSet: true
            },
            {
                register: "P6REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F23x.create// Create an instance-object(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F23x.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F23x.Bit0_t
    const GPIO_MSP430F23x.BIT0_OFF;
    const GPIO_MSP430F23x.BIT0;
enum GPIO_MSP430F23x.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F23x.Bit1_t
    const GPIO_MSP430F23x.BIT1_OFF;
    const GPIO_MSP430F23x.BIT1;
enum GPIO_MSP430F23x.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F23x.Bit2_t
    const GPIO_MSP430F23x.BIT2_OFF;
    const GPIO_MSP430F23x.BIT2;
enum GPIO_MSP430F23x.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F23x.Bit3_t
    const GPIO_MSP430F23x.BIT3_OFF;
    const GPIO_MSP430F23x.BIT3;
enum GPIO_MSP430F23x.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F23x.Bit4_t
    const GPIO_MSP430F23x.BIT4_OFF;
    const GPIO_MSP430F23x.BIT4;
enum GPIO_MSP430F23x.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F23x.Bit5_t
    const GPIO_MSP430F23x.BIT5_OFF;
    const GPIO_MSP430F23x.BIT5;
enum GPIO_MSP430F23x.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F23x.Bit6_t
    const GPIO_MSP430F23x.BIT6_OFF;
    const GPIO_MSP430F23x.BIT6;
enum GPIO_MSP430F23x.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F23x.Bit7_t
    const GPIO_MSP430F23x.BIT7_OFF;
    const GPIO_MSP430F23x.BIT7;
enum GPIO_MSP430F23x.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F23x.InterruptEnable_t
    const GPIO_MSP430F23x.IE_OFF;
    // Disabled
    const GPIO_MSP430F23x.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F23x.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F23x.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F23x.OutputState_t
    const GPIO_MSP430F23x.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F23x.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F23x.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F23x.ResEnable_t
    const GPIO_MSP430F23x.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F23x.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F23x.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F23x.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F23x.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F23x.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F23x.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F23x.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F23x.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F23x.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F23x.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F23x.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F23x.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F23x.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F23x.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F23x.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F23x.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F23x.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F23x.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F23x.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F23x.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F23x.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F23x.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F23x.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F23x.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F23x.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F23x.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F23x.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    // Port 5 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    // Port 5 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    // Port 5 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    // Port 5 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    // Port 6 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    // Port 6 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    // Port 6 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    // Port 6 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F23x.DevicePinFunctionSetting_t[8][6] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F23x.DevicePin_t[8][6] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F23x device, there are 6 x 8 = 48 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F23x.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P5OUT",
            regForceSet: true
        },
        {
            register: "P5SEL",
            regForceSet: false
        },
        {
            register: "P5DIR",
            regForceSet: true
        },
        {
            register: "P5REN",
            regForceSet: false
        },
        {
            register: "P6OUT",
            regForceSet: true
        },
        {
            register: "P6SEL",
            regForceSet: false
        },
        {
            register: "P6DIR",
            regForceSet: true
        },
        {
            register: "P6REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F23x.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P1DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P1OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P1REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P1SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P2DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P2OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P2REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P2SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P3DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P3OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P3REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P3SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P4DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P4OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P4REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P4SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P5DIR // instance
index URL

Port 5 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P5DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P5OUT // instance
index URL

Port 5 Output Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P5OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P5REN // instance
index URL

Port 5 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P5REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P5SEL // instance
index URL

Port 5 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P5SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P6DIR // instance
index URL

Port 6 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P6DIR = GPIO_MSP430F23x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P6OUT // instance
index URL

Port 6 Output Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P6OUT = GPIO_MSP430F23x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P6REN // instance
index URL

Port 6 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P6REN = GPIO_MSP430F23x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.P6SEL // instance
index URL

Port 6 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.P6SEL = GPIO_MSP430F23x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.devicePinSetting = GPIO_MSP430F23x.DevicePinFunctionSetting_t[8][6] undefined;
config GPIO_MSP430F23x.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F23x device, there are 6 x 8 = 48 pins total

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.devicePins = GPIO_MSP430F23x.DevicePin_t[8][6] undefined;
config GPIO_MSP430F23x.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F23x.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P5OUT",
        regForceSet: true
    },
    {
        register: "P5SEL",
        regForceSet: false
    },
    {
        register: "P5DIR",
        regForceSet: true
    },
    {
        register: "P5REN",
        regForceSet: false
    },
    {
        register: "P6OUT",
        regForceSet: true
    },
    {
        register: "P6SEL",
        regForceSet: false
    },
    {
        register: "P6DIR",
        regForceSet: true
    },
    {
        register: "P6REN",
        regForceSet: false
    }
];
config GPIO_MSP430F23x.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F23x.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F23x.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F23x.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F23x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F23x.create(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F23x.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F23x.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F23x.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F23x.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F23x.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F23x.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:43 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x0

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x0
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F23x0.xdc
var GPIO_MSP430F23x0 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x0');
module-wide constants & types
    values of type GPIO_MSP430F23x0.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F23x0.BIT0_OFF;
        const GPIO_MSP430F23x0.BIT0;
    values of type GPIO_MSP430F23x0.Bit1_t//
        const GPIO_MSP430F23x0.BIT1_OFF;
        const GPIO_MSP430F23x0.BIT1;
    values of type GPIO_MSP430F23x0.Bit2_t//
        const GPIO_MSP430F23x0.BIT2_OFF;
        const GPIO_MSP430F23x0.BIT2;
    values of type GPIO_MSP430F23x0.Bit3_t//
        const GPIO_MSP430F23x0.BIT3_OFF;
        const GPIO_MSP430F23x0.BIT3;
    values of type GPIO_MSP430F23x0.Bit4_t//
        const GPIO_MSP430F23x0.BIT4_OFF;
        const GPIO_MSP430F23x0.BIT4;
    values of type GPIO_MSP430F23x0.Bit5_t//
        const GPIO_MSP430F23x0.BIT5_OFF;
        const GPIO_MSP430F23x0.BIT5;
    values of type GPIO_MSP430F23x0.Bit6_t//
        const GPIO_MSP430F23x0.BIT6_OFF;
        const GPIO_MSP430F23x0.BIT6;
    values of type GPIO_MSP430F23x0.Bit7_t//
        const GPIO_MSP430F23x0.BIT7_OFF;
        const GPIO_MSP430F23x0.BIT7;
    values of type GPIO_MSP430F23x0.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F23x0.IE_OFF// Disabled;
        const GPIO_MSP430F23x0.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F23x0.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F23x0.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F23x0.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F23x0.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F23x0.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F23x0.PUDRE_OFF// Disabled;
        const GPIO_MSP430F23x0.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F23x0.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F23x0.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F23x0.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F23x0.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F23x0.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F23x0.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F23x0.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F23x0.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F23x0.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F23x0.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F23x0.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F23x0.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F23x0.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F23x0.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F23x0.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F23x0.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F23x0.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F23x0.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F23x0.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F23x0.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F23x0.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F23x0.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F23x0.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F23x0.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F23x0.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F23x0.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F23x0.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F23x0.DevicePinFunctionSetting_t[8][4] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F23x0 device, there are 4 x 8 = 32 pins total = GPIO_MSP430F23x0.DevicePin_t[8][4] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F23x0.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F23x0.create// Create an instance-object(IComparator.Instance comparator, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F23x0.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F23x0.Bit0_t
    const GPIO_MSP430F23x0.BIT0_OFF;
    const GPIO_MSP430F23x0.BIT0;
enum GPIO_MSP430F23x0.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F23x0.Bit1_t
    const GPIO_MSP430F23x0.BIT1_OFF;
    const GPIO_MSP430F23x0.BIT1;
enum GPIO_MSP430F23x0.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F23x0.Bit2_t
    const GPIO_MSP430F23x0.BIT2_OFF;
    const GPIO_MSP430F23x0.BIT2;
enum GPIO_MSP430F23x0.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F23x0.Bit3_t
    const GPIO_MSP430F23x0.BIT3_OFF;
    const GPIO_MSP430F23x0.BIT3;
enum GPIO_MSP430F23x0.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F23x0.Bit4_t
    const GPIO_MSP430F23x0.BIT4_OFF;
    const GPIO_MSP430F23x0.BIT4;
enum GPIO_MSP430F23x0.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F23x0.Bit5_t
    const GPIO_MSP430F23x0.BIT5_OFF;
    const GPIO_MSP430F23x0.BIT5;
enum GPIO_MSP430F23x0.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F23x0.Bit6_t
    const GPIO_MSP430F23x0.BIT6_OFF;
    const GPIO_MSP430F23x0.BIT6;
enum GPIO_MSP430F23x0.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F23x0.Bit7_t
    const GPIO_MSP430F23x0.BIT7_OFF;
    const GPIO_MSP430F23x0.BIT7;
enum GPIO_MSP430F23x0.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F23x0.InterruptEnable_t
    const GPIO_MSP430F23x0.IE_OFF;
    // Disabled
    const GPIO_MSP430F23x0.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F23x0.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F23x0.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F23x0.OutputState_t
    const GPIO_MSP430F23x0.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F23x0.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F23x0.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F23x0.ResEnable_t
    const GPIO_MSP430F23x0.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F23x0.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F23x0.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F23x0.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x0.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F23x0.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x0.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F23x0.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x0.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F23x0.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F23x0.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F23x0.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F23x0.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F23x0.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F23x0.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F23x0.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F23x0.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F23x0.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F23x0.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F23x0.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F23x0.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F23x0.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F23x0.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F23x0.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F23x0.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F23x0.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F23x0.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F23x0.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F23x0.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F23x0.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F23x0.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F23x0.DevicePinFunctionSetting_t[8][4] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F23x0.DevicePin_t[8][4] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F23x0 device, there are 4 x 8 = 32 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F23x0.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F23x0.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P1DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P1OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P1REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P1SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P2DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P2OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P2REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P2SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430F23x0.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P3DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P3OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P3REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P3SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P4DIR = GPIO_MSP430F23x0.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P4OUT = GPIO_MSP430F23x0.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P4REN = GPIO_MSP430F23x0.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.P4SEL = GPIO_MSP430F23x0.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F23x0.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.devicePinSetting = GPIO_MSP430F23x0.DevicePinFunctionSetting_t[8][4] undefined;
config GPIO_MSP430F23x0.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F23x0 device, there are 4 x 8 = 32 pins total

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.devicePins = GPIO_MSP430F23x0.DevicePin_t[8][4] undefined;
config GPIO_MSP430F23x0.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F23x0.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    }
];
config GPIO_MSP430F23x0.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F23x0.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F23x0.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F23x0.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F23x0.create(IComparator.Instance comparator, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F23x0.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F23x0.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F23x0.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F23x0.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F23x0.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F23x0.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:44 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F241x

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F241x
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F241x.xdc
var GPIO_MSP430F241x = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F241x');
module-wide constants & types
    values of type GPIO_MSP430F241x.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F241x.BIT0_OFF;
        const GPIO_MSP430F241x.BIT0;
    values of type GPIO_MSP430F241x.Bit1_t//
        const GPIO_MSP430F241x.BIT1_OFF;
        const GPIO_MSP430F241x.BIT1;
    values of type GPIO_MSP430F241x.Bit2_t//
        const GPIO_MSP430F241x.BIT2_OFF;
        const GPIO_MSP430F241x.BIT2;
    values of type GPIO_MSP430F241x.Bit3_t//
        const GPIO_MSP430F241x.BIT3_OFF;
        const GPIO_MSP430F241x.BIT3;
    values of type GPIO_MSP430F241x.Bit4_t//
        const GPIO_MSP430F241x.BIT4_OFF;
        const GPIO_MSP430F241x.BIT4;
    values of type GPIO_MSP430F241x.Bit5_t//
        const GPIO_MSP430F241x.BIT5_OFF;
        const GPIO_MSP430F241x.BIT5;
    values of type GPIO_MSP430F241x.Bit6_t//
        const GPIO_MSP430F241x.BIT6_OFF;
        const GPIO_MSP430F241x.BIT6;
    values of type GPIO_MSP430F241x.Bit7_t//
        const GPIO_MSP430F241x.BIT7_OFF;
        const GPIO_MSP430F241x.BIT7;
    values of type GPIO_MSP430F241x.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F241x.IE_OFF// Disabled;
        const GPIO_MSP430F241x.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F241x.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F241x.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F241x.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F241x.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F241x.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F241x.PUDRE_OFF// Disabled;
        const GPIO_MSP430F241x.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F241x.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F241x.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F241x.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F241x.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F241x.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F241x.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F241x.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F241x.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F241x.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F241x.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F241x.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5DIR// Port 5 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5OUT// Port 5 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5REN// Port 5 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5SEL// Port 5 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6DIR// Port 6 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6OUT// Port 6 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6REN// Port 6 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6SEL// Port 6 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7DIR// Port 7 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7OUT// Port 7 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7REN// Port 7 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7SEL// Port 7 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8DIR// Port 8 Direction Register = GPIO_MSP430F241x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8OUT// Port 8 Output Register = GPIO_MSP430F241x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8REN// Port 8 Resistor Enable Register = GPIO_MSP430F241x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8SEL// Port 8 Port Select Register = GPIO_MSP430F241x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F241x.DevicePinFunctionSetting_t[8][8] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F241x device, there are 8 x 8 = 64 pins total = GPIO_MSP430F241x.DevicePin_t[8][8] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F241x.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P5OUT",
                regForceSet: true
            },
            {
                register: "P5SEL",
                regForceSet: false
            },
            {
                register: "P5DIR",
                regForceSet: true
            },
            {
                register: "P5REN",
                regForceSet: false
            },
            {
                register: "P6OUT",
                regForceSet: true
            },
            {
                register: "P6SEL",
                regForceSet: false
            },
            {
                register: "P6DIR",
                regForceSet: true
            },
            {
                register: "P6REN",
                regForceSet: false
            },
            {
                register: "P7OUT",
                regForceSet: true
            },
            {
                register: "P7SEL",
                regForceSet: false
            },
            {
                register: "P7DIR",
                regForceSet: true
            },
            {
                register: "P7REN",
                regForceSet: false
            },
            {
                register: "P8OUT",
                regForceSet: true
            },
            {
                register: "P8SEL",
                regForceSet: false
            },
            {
                register: "P8DIR",
                regForceSet: true
            },
            {
                register: "P8REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F241x.create// Create an instance-object(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F241x.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F241x.Bit0_t
    const GPIO_MSP430F241x.BIT0_OFF;
    const GPIO_MSP430F241x.BIT0;
enum GPIO_MSP430F241x.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F241x.Bit1_t
    const GPIO_MSP430F241x.BIT1_OFF;
    const GPIO_MSP430F241x.BIT1;
enum GPIO_MSP430F241x.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F241x.Bit2_t
    const GPIO_MSP430F241x.BIT2_OFF;
    const GPIO_MSP430F241x.BIT2;
enum GPIO_MSP430F241x.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F241x.Bit3_t
    const GPIO_MSP430F241x.BIT3_OFF;
    const GPIO_MSP430F241x.BIT3;
enum GPIO_MSP430F241x.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F241x.Bit4_t
    const GPIO_MSP430F241x.BIT4_OFF;
    const GPIO_MSP430F241x.BIT4;
enum GPIO_MSP430F241x.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F241x.Bit5_t
    const GPIO_MSP430F241x.BIT5_OFF;
    const GPIO_MSP430F241x.BIT5;
enum GPIO_MSP430F241x.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F241x.Bit6_t
    const GPIO_MSP430F241x.BIT6_OFF;
    const GPIO_MSP430F241x.BIT6;
enum GPIO_MSP430F241x.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F241x.Bit7_t
    const GPIO_MSP430F241x.BIT7_OFF;
    const GPIO_MSP430F241x.BIT7;
enum GPIO_MSP430F241x.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F241x.InterruptEnable_t
    const GPIO_MSP430F241x.IE_OFF;
    // Disabled
    const GPIO_MSP430F241x.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F241x.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F241x.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F241x.OutputState_t
    const GPIO_MSP430F241x.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F241x.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F241x.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F241x.ResEnable_t
    const GPIO_MSP430F241x.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F241x.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F241x.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F241x.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F241x.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F241x.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F241x.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F241x.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F241x.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F241x.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F241x.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F241x.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F241x.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F241x.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F241x.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F241x.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F241x.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F241x.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F241x.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F241x.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F241x.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F241x.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F241x.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F241x.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F241x.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F241x.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F241x.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F241x.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F241x.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F241x.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F241x.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F241x.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 5 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 5 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 5 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 5 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 6 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 6 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 6 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 6 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 7 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 7 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 7 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 7 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    // Port 8 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    // Port 8 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    // Port 8 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    // Port 8 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F241x.DevicePinFunctionSetting_t[8][8] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F241x.DevicePin_t[8][8] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F241x device, there are 8 x 8 = 64 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F241x.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P5OUT",
            regForceSet: true
        },
        {
            register: "P5SEL",
            regForceSet: false
        },
        {
            register: "P5DIR",
            regForceSet: true
        },
        {
            register: "P5REN",
            regForceSet: false
        },
        {
            register: "P6OUT",
            regForceSet: true
        },
        {
            register: "P6SEL",
            regForceSet: false
        },
        {
            register: "P6DIR",
            regForceSet: true
        },
        {
            register: "P6REN",
            regForceSet: false
        },
        {
            register: "P7OUT",
            regForceSet: true
        },
        {
            register: "P7SEL",
            regForceSet: false
        },
        {
            register: "P7DIR",
            regForceSet: true
        },
        {
            register: "P7REN",
            regForceSet: false
        },
        {
            register: "P8OUT",
            regForceSet: true
        },
        {
            register: "P8SEL",
            regForceSet: false
        },
        {
            register: "P8DIR",
            regForceSet: true
        },
        {
            register: "P8REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F241x.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P1DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P1OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P1REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P1SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P2DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P2OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P2REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P2SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P3DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P3OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P3REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P3SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P4DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P4OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P4REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P4SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P5DIR // instance
index URL

Port 5 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P5DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P5OUT // instance
index URL

Port 5 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P5OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P5REN // instance
index URL

Port 5 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P5REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P5SEL // instance
index URL

Port 5 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P5SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P6DIR // instance
index URL

Port 6 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P6DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P6OUT // instance
index URL

Port 6 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P6OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P6REN // instance
index URL

Port 6 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P6REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P6SEL // instance
index URL

Port 6 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P6SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P7DIR // instance
index URL

Port 7 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P7DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P7OUT // instance
index URL

Port 7 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P7OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P7REN // instance
index URL

Port 7 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P7REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P7SEL // instance
index URL

Port 7 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P7SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P8DIR // instance
index URL

Port 8 Direction Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P8DIR = GPIO_MSP430F241x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P8OUT // instance
index URL

Port 8 Output Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P8OUT = GPIO_MSP430F241x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P8REN // instance
index URL

Port 8 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P8REN = GPIO_MSP430F241x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.P8SEL // instance
index URL

Port 8 Port Select Register

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.P8SEL = GPIO_MSP430F241x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F241x.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.devicePinSetting = GPIO_MSP430F241x.DevicePinFunctionSetting_t[8][8] undefined;
config GPIO_MSP430F241x.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F241x device, there are 8 x 8 = 64 pins total

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.devicePins = GPIO_MSP430F241x.DevicePin_t[8][8] undefined;
config GPIO_MSP430F241x.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F241x.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P5OUT",
        regForceSet: true
    },
    {
        register: "P5SEL",
        regForceSet: false
    },
    {
        register: "P5DIR",
        regForceSet: true
    },
    {
        register: "P5REN",
        regForceSet: false
    },
    {
        register: "P6OUT",
        regForceSet: true
    },
    {
        register: "P6SEL",
        regForceSet: false
    },
    {
        register: "P6DIR",
        regForceSet: true
    },
    {
        register: "P6REN",
        regForceSet: false
    },
    {
        register: "P7OUT",
        regForceSet: true
    },
    {
        register: "P7SEL",
        regForceSet: false
    },
    {
        register: "P7DIR",
        regForceSet: true
    },
    {
        register: "P7REN",
        regForceSet: false
    },
    {
        register: "P8OUT",
        regForceSet: true
    },
    {
        register: "P8SEL",
        regForceSet: false
    },
    {
        register: "P8DIR",
        regForceSet: true
    },
    {
        register: "P8REN",
        regForceSet: false
    }
];
config GPIO_MSP430F241x.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F241x.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F241x.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F241x.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F241x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F241x.create(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F241x.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F241x.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F241x.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F241x.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F241x.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F241x.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:45 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F24x.xdc
var GPIO_MSP430F24x = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x');
module-wide constants & types
    values of type GPIO_MSP430F24x.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F24x.BIT0_OFF;
        const GPIO_MSP430F24x.BIT0;
    values of type GPIO_MSP430F24x.Bit1_t//
        const GPIO_MSP430F24x.BIT1_OFF;
        const GPIO_MSP430F24x.BIT1;
    values of type GPIO_MSP430F24x.Bit2_t//
        const GPIO_MSP430F24x.BIT2_OFF;
        const GPIO_MSP430F24x.BIT2;
    values of type GPIO_MSP430F24x.Bit3_t//
        const GPIO_MSP430F24x.BIT3_OFF;
        const GPIO_MSP430F24x.BIT3;
    values of type GPIO_MSP430F24x.Bit4_t//
        const GPIO_MSP430F24x.BIT4_OFF;
        const GPIO_MSP430F24x.BIT4;
    values of type GPIO_MSP430F24x.Bit5_t//
        const GPIO_MSP430F24x.BIT5_OFF;
        const GPIO_MSP430F24x.BIT5;
    values of type GPIO_MSP430F24x.Bit6_t//
        const GPIO_MSP430F24x.BIT6_OFF;
        const GPIO_MSP430F24x.BIT6;
    values of type GPIO_MSP430F24x.Bit7_t//
        const GPIO_MSP430F24x.BIT7_OFF;
        const GPIO_MSP430F24x.BIT7;
    values of type GPIO_MSP430F24x.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F24x.IE_OFF// Disabled;
        const GPIO_MSP430F24x.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F24x.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F24x.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F24x.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F24x.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F24x.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F24x.PUDRE_OFF// Disabled;
        const GPIO_MSP430F24x.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F24x.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F24x.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F24x.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F24x.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F24x.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F24x.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F24x.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F24x.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F24x.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F24x.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F24x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F24x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F24x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F24x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F24x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F24x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F24x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F24x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F24x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F24x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F24x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F24x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F24x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F24x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F24x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F24x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5DIR// Port 5 Direction Register = GPIO_MSP430F24x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5OUT// Port 5 Output Register = GPIO_MSP430F24x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5REN// Port 5 Resistor Enable Register = GPIO_MSP430F24x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5SEL// Port 5 Port Select Register = GPIO_MSP430F24x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6DIR// Port 6 Direction Register = GPIO_MSP430F24x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6OUT// Port 6 Output Register = GPIO_MSP430F24x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6REN// Port 6 Resistor Enable Register = GPIO_MSP430F24x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6SEL// Port 6 Port Select Register = GPIO_MSP430F24x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F24x.DevicePinFunctionSetting_t[8][6] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F24x device, there are 6 x 8 = 48 pins total = GPIO_MSP430F24x.DevicePin_t[8][6] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F24x.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P5OUT",
                regForceSet: true
            },
            {
                register: "P5SEL",
                regForceSet: false
            },
            {
                register: "P5DIR",
                regForceSet: true
            },
            {
                register: "P5REN",
                regForceSet: false
            },
            {
                register: "P6OUT",
                regForceSet: true
            },
            {
                register: "P6SEL",
                regForceSet: false
            },
            {
                register: "P6DIR",
                regForceSet: true
            },
            {
                register: "P6REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F24x.create// Create an instance-object(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F24x.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F24x.Bit0_t
    const GPIO_MSP430F24x.BIT0_OFF;
    const GPIO_MSP430F24x.BIT0;
enum GPIO_MSP430F24x.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F24x.Bit1_t
    const GPIO_MSP430F24x.BIT1_OFF;
    const GPIO_MSP430F24x.BIT1;
enum GPIO_MSP430F24x.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F24x.Bit2_t
    const GPIO_MSP430F24x.BIT2_OFF;
    const GPIO_MSP430F24x.BIT2;
enum GPIO_MSP430F24x.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F24x.Bit3_t
    const GPIO_MSP430F24x.BIT3_OFF;
    const GPIO_MSP430F24x.BIT3;
enum GPIO_MSP430F24x.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F24x.Bit4_t
    const GPIO_MSP430F24x.BIT4_OFF;
    const GPIO_MSP430F24x.BIT4;
enum GPIO_MSP430F24x.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F24x.Bit5_t
    const GPIO_MSP430F24x.BIT5_OFF;
    const GPIO_MSP430F24x.BIT5;
enum GPIO_MSP430F24x.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F24x.Bit6_t
    const GPIO_MSP430F24x.BIT6_OFF;
    const GPIO_MSP430F24x.BIT6;
enum GPIO_MSP430F24x.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F24x.Bit7_t
    const GPIO_MSP430F24x.BIT7_OFF;
    const GPIO_MSP430F24x.BIT7;
enum GPIO_MSP430F24x.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F24x.InterruptEnable_t
    const GPIO_MSP430F24x.IE_OFF;
    // Disabled
    const GPIO_MSP430F24x.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F24x.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F24x.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F24x.OutputState_t
    const GPIO_MSP430F24x.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F24x.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F24x.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F24x.ResEnable_t
    const GPIO_MSP430F24x.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F24x.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F24x.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F24x.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F24x.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F24x.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F24x.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F24x.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F24x.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F24x.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F24x.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F24x.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F24x.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F24x.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F24x.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F24x.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F24x.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F24x.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F24x.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F24x.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F24x.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F24x.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F24x.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F24x.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F24x.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F24x.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F24x.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F24x.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    // Port 5 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    // Port 5 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    // Port 5 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    // Port 5 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    // Port 6 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    // Port 6 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    // Port 6 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    // Port 6 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F24x.DevicePinFunctionSetting_t[8][6] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F24x.DevicePin_t[8][6] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F24x device, there are 6 x 8 = 48 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F24x.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P5OUT",
            regForceSet: true
        },
        {
            register: "P5SEL",
            regForceSet: false
        },
        {
            register: "P5DIR",
            regForceSet: true
        },
        {
            register: "P5REN",
            regForceSet: false
        },
        {
            register: "P6OUT",
            regForceSet: true
        },
        {
            register: "P6SEL",
            regForceSet: false
        },
        {
            register: "P6DIR",
            regForceSet: true
        },
        {
            register: "P6REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F24x.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P1DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P1OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P1REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P1SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P2DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P2OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P2REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P2SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P3DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P3OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P3REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P3SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P4DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P4OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P4REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P4SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P5DIR // instance
index URL

Port 5 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P5DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P5OUT // instance
index URL

Port 5 Output Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P5OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P5REN // instance
index URL

Port 5 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P5REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P5SEL // instance
index URL

Port 5 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P5SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P6DIR // instance
index URL

Port 6 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P6DIR = GPIO_MSP430F24x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P6OUT // instance
index URL

Port 6 Output Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P6OUT = GPIO_MSP430F24x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P6REN // instance
index URL

Port 6 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P6REN = GPIO_MSP430F24x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.P6SEL // instance
index URL

Port 6 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.P6SEL = GPIO_MSP430F24x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.devicePinSetting = GPIO_MSP430F24x.DevicePinFunctionSetting_t[8][6] undefined;
config GPIO_MSP430F24x.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F24x device, there are 6 x 8 = 48 pins total

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.devicePins = GPIO_MSP430F24x.DevicePin_t[8][6] undefined;
config GPIO_MSP430F24x.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F24x.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P5OUT",
        regForceSet: true
    },
    {
        register: "P5SEL",
        regForceSet: false
    },
    {
        register: "P5DIR",
        regForceSet: true
    },
    {
        register: "P5REN",
        regForceSet: false
    },
    {
        register: "P6OUT",
        regForceSet: true
    },
    {
        register: "P6SEL",
        regForceSet: false
    },
    {
        register: "P6DIR",
        regForceSet: true
    },
    {
        register: "P6REN",
        regForceSet: false
    }
];
config GPIO_MSP430F24x.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F24x.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F24x.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F24x.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F24x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F24x.create(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F24x.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F24x.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F24x.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F24x.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F24x.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F24x.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:45 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x1

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x1
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F24x1.xdc
var GPIO_MSP430F24x1 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x1');
module-wide constants & types
    values of type GPIO_MSP430F24x1.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F24x1.BIT0_OFF;
        const GPIO_MSP430F24x1.BIT0;
    values of type GPIO_MSP430F24x1.Bit1_t//
        const GPIO_MSP430F24x1.BIT1_OFF;
        const GPIO_MSP430F24x1.BIT1;
    values of type GPIO_MSP430F24x1.Bit2_t//
        const GPIO_MSP430F24x1.BIT2_OFF;
        const GPIO_MSP430F24x1.BIT2;
    values of type GPIO_MSP430F24x1.Bit3_t//
        const GPIO_MSP430F24x1.BIT3_OFF;
        const GPIO_MSP430F24x1.BIT3;
    values of type GPIO_MSP430F24x1.Bit4_t//
        const GPIO_MSP430F24x1.BIT4_OFF;
        const GPIO_MSP430F24x1.BIT4;
    values of type GPIO_MSP430F24x1.Bit5_t//
        const GPIO_MSP430F24x1.BIT5_OFF;
        const GPIO_MSP430F24x1.BIT5;
    values of type GPIO_MSP430F24x1.Bit6_t//
        const GPIO_MSP430F24x1.BIT6_OFF;
        const GPIO_MSP430F24x1.BIT6;
    values of type GPIO_MSP430F24x1.Bit7_t//
        const GPIO_MSP430F24x1.BIT7_OFF;
        const GPIO_MSP430F24x1.BIT7;
    values of type GPIO_MSP430F24x1.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F24x1.IE_OFF// Disabled;
        const GPIO_MSP430F24x1.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F24x1.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F24x1.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F24x1.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F24x1.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F24x1.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F24x1.PUDRE_OFF// Disabled;
        const GPIO_MSP430F24x1.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F24x1.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F24x1.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F24x1.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F24x1.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F24x1.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F24x1.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F24x1.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F24x1.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F24x1.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F24x1.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F24x1.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F24x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F24x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F24x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F24x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F24x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F24x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F24x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F24x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F24x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F24x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F24x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F24x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F24x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F24x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F24x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F24x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5DIR// Port 5 Direction Register = GPIO_MSP430F24x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5OUT// Port 5 Output Register = GPIO_MSP430F24x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5REN// Port 5 Resistor Enable Register = GPIO_MSP430F24x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5SEL// Port 5 Port Select Register = GPIO_MSP430F24x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6DIR// Port 6 Direction Register = GPIO_MSP430F24x1.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6OUT// Port 6 Output Register = GPIO_MSP430F24x1.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6REN// Port 6 Resistor Enable Register = GPIO_MSP430F24x1.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6SEL// Port 6 Port Select Register = GPIO_MSP430F24x1.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F24x1.DevicePinFunctionSetting_t[8][6] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F24x1 device, there are 6 x 8 = 48 pins total = GPIO_MSP430F24x1.DevicePin_t[8][6] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F24x1.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P5OUT",
                regForceSet: true
            },
            {
                register: "P5SEL",
                regForceSet: false
            },
            {
                register: "P5DIR",
                regForceSet: true
            },
            {
                register: "P5REN",
                regForceSet: false
            },
            {
                register: "P6OUT",
                regForceSet: true
            },
            {
                register: "P6SEL",
                regForceSet: false
            },
            {
                register: "P6DIR",
                regForceSet: true
            },
            {
                register: "P6REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F24x1.create// Create an instance-object(IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F24x1.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F24x1.Bit0_t
    const GPIO_MSP430F24x1.BIT0_OFF;
    const GPIO_MSP430F24x1.BIT0;
enum GPIO_MSP430F24x1.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F24x1.Bit1_t
    const GPIO_MSP430F24x1.BIT1_OFF;
    const GPIO_MSP430F24x1.BIT1;
enum GPIO_MSP430F24x1.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F24x1.Bit2_t
    const GPIO_MSP430F24x1.BIT2_OFF;
    const GPIO_MSP430F24x1.BIT2;
enum GPIO_MSP430F24x1.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F24x1.Bit3_t
    const GPIO_MSP430F24x1.BIT3_OFF;
    const GPIO_MSP430F24x1.BIT3;
enum GPIO_MSP430F24x1.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F24x1.Bit4_t
    const GPIO_MSP430F24x1.BIT4_OFF;
    const GPIO_MSP430F24x1.BIT4;
enum GPIO_MSP430F24x1.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F24x1.Bit5_t
    const GPIO_MSP430F24x1.BIT5_OFF;
    const GPIO_MSP430F24x1.BIT5;
enum GPIO_MSP430F24x1.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F24x1.Bit6_t
    const GPIO_MSP430F24x1.BIT6_OFF;
    const GPIO_MSP430F24x1.BIT6;
enum GPIO_MSP430F24x1.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F24x1.Bit7_t
    const GPIO_MSP430F24x1.BIT7_OFF;
    const GPIO_MSP430F24x1.BIT7;
enum GPIO_MSP430F24x1.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F24x1.InterruptEnable_t
    const GPIO_MSP430F24x1.IE_OFF;
    // Disabled
    const GPIO_MSP430F24x1.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F24x1.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F24x1.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F24x1.OutputState_t
    const GPIO_MSP430F24x1.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F24x1.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F24x1.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F24x1.ResEnable_t
    const GPIO_MSP430F24x1.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F24x1.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F24x1.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F24x1.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x1.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F24x1.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x1.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F24x1.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x1.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F24x1.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F24x1.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F24x1.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F24x1.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F24x1.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F24x1.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F24x1.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F24x1.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F24x1.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F24x1.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F24x1.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F24x1.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F24x1.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F24x1.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F24x1.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F24x1.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F24x1.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F24x1.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F24x1.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F24x1.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F24x1.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F24x1.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    // Port 5 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    // Port 5 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    // Port 5 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    // Port 5 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    // Port 6 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    // Port 6 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    // Port 6 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    // Port 6 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F24x1.DevicePinFunctionSetting_t[8][6] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F24x1.DevicePin_t[8][6] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F24x1 device, there are 6 x 8 = 48 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F24x1.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P5OUT",
            regForceSet: true
        },
        {
            register: "P5SEL",
            regForceSet: false
        },
        {
            register: "P5DIR",
            regForceSet: true
        },
        {
            register: "P5REN",
            regForceSet: false
        },
        {
            register: "P6OUT",
            regForceSet: true
        },
        {
            register: "P6SEL",
            regForceSet: false
        },
        {
            register: "P6DIR",
            regForceSet: true
        },
        {
            register: "P6REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F24x1.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P1DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P1OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P1REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P1SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P2DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P2OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P2REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P2SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P3DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P3OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P3REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P3SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P4DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P4OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P4REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P4SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P5DIR // instance
index URL

Port 5 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P5DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P5OUT // instance
index URL

Port 5 Output Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P5OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P5REN // instance
index URL

Port 5 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P5REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P5SEL // instance
index URL

Port 5 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P5SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P6DIR // instance
index URL

Port 6 Direction Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P6DIR = GPIO_MSP430F24x1.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P6OUT // instance
index URL

Port 6 Output Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P6OUT = GPIO_MSP430F24x1.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P6REN // instance
index URL

Port 6 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P6REN = GPIO_MSP430F24x1.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.P6SEL // instance
index URL

Port 6 Port Select Register

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.P6SEL = GPIO_MSP430F24x1.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F24x1.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.devicePinSetting = GPIO_MSP430F24x1.DevicePinFunctionSetting_t[8][6] undefined;
config GPIO_MSP430F24x1.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F24x1 device, there are 6 x 8 = 48 pins total

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.devicePins = GPIO_MSP430F24x1.DevicePin_t[8][6] undefined;
config GPIO_MSP430F24x1.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F24x1.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P5OUT",
        regForceSet: true
    },
    {
        register: "P5SEL",
        regForceSet: false
    },
    {
        register: "P5DIR",
        regForceSet: true
    },
    {
        register: "P5REN",
        regForceSet: false
    },
    {
        register: "P6OUT",
        regForceSet: true
    },
    {
        register: "P6SEL",
        regForceSet: false
    },
    {
        register: "P6DIR",
        regForceSet: true
    },
    {
        register: "P6REN",
        regForceSet: false
    }
];
config GPIO_MSP430F24x1.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F24x1.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F24x1.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F24x1.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F24x1.create(IComparator.Instance comparator, ISVS.Instance svs, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F24x1.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F24x1.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F24x1.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F24x1.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F24x1.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F24x1.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:46 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F261x

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F261x
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F261x.xdc
var GPIO_MSP430F261x = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F261x');
module-wide constants & types
    values of type GPIO_MSP430F261x.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F261x.BIT0_OFF;
        const GPIO_MSP430F261x.BIT0;
    values of type GPIO_MSP430F261x.Bit1_t//
        const GPIO_MSP430F261x.BIT1_OFF;
        const GPIO_MSP430F261x.BIT1;
    values of type GPIO_MSP430F261x.Bit2_t//
        const GPIO_MSP430F261x.BIT2_OFF;
        const GPIO_MSP430F261x.BIT2;
    values of type GPIO_MSP430F261x.Bit3_t//
        const GPIO_MSP430F261x.BIT3_OFF;
        const GPIO_MSP430F261x.BIT3;
    values of type GPIO_MSP430F261x.Bit4_t//
        const GPIO_MSP430F261x.BIT4_OFF;
        const GPIO_MSP430F261x.BIT4;
    values of type GPIO_MSP430F261x.Bit5_t//
        const GPIO_MSP430F261x.BIT5_OFF;
        const GPIO_MSP430F261x.BIT5;
    values of type GPIO_MSP430F261x.Bit6_t//
        const GPIO_MSP430F261x.BIT6_OFF;
        const GPIO_MSP430F261x.BIT6;
    values of type GPIO_MSP430F261x.Bit7_t//
        const GPIO_MSP430F261x.BIT7_OFF;
        const GPIO_MSP430F261x.BIT7;
    values of type GPIO_MSP430F261x.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F261x.IE_OFF// Disabled;
        const GPIO_MSP430F261x.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F261x.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F261x.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F261x.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F261x.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F261x.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F261x.PUDRE_OFF// Disabled;
        const GPIO_MSP430F261x.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F261x.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F261x.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F261x.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F261x.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F261x.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F261x.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F261x.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F261x.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F261x.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F261x.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F261x.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5DIR// Port 5 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5OUT// Port 5 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5REN// Port 5 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5SEL// Port 5 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6DIR// Port 6 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6OUT// Port 6 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6REN// Port 6 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6SEL// Port 6 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7DIR// Port 7 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7OUT// Port 7 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7REN// Port 7 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7SEL// Port 7 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8DIR// Port 8 Direction Register = GPIO_MSP430F261x.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8OUT// Port 8 Output Register = GPIO_MSP430F261x.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8REN// Port 8 Resistor Enable Register = GPIO_MSP430F261x.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8SEL// Port 8 Port Select Register = GPIO_MSP430F261x.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F261x.DevicePinFunctionSetting_t[8][8] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F261x device, there are 8 x 8 = 64 pins total = GPIO_MSP430F261x.DevicePin_t[8][8] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F261x.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P5OUT",
                regForceSet: true
            },
            {
                register: "P5SEL",
                regForceSet: false
            },
            {
                register: "P5DIR",
                regForceSet: true
            },
            {
                register: "P5REN",
                regForceSet: false
            },
            {
                register: "P6OUT",
                regForceSet: true
            },
            {
                register: "P6SEL",
                regForceSet: false
            },
            {
                register: "P6DIR",
                regForceSet: true
            },
            {
                register: "P6REN",
                regForceSet: false
            },
            {
                register: "P7OUT",
                regForceSet: true
            },
            {
                register: "P7SEL",
                regForceSet: false
            },
            {
                register: "P7DIR",
                regForceSet: true
            },
            {
                register: "P7REN",
                regForceSet: false
            },
            {
                register: "P8OUT",
                regForceSet: true
            },
            {
                register: "P8SEL",
                regForceSet: false
            },
            {
                register: "P8DIR",
                regForceSet: true
            },
            {
                register: "P8REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F261x.create// Create an instance-object(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, DAC12.Instance dac12, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F261x.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F261x.Bit0_t
    const GPIO_MSP430F261x.BIT0_OFF;
    const GPIO_MSP430F261x.BIT0;
enum GPIO_MSP430F261x.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F261x.Bit1_t
    const GPIO_MSP430F261x.BIT1_OFF;
    const GPIO_MSP430F261x.BIT1;
enum GPIO_MSP430F261x.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F261x.Bit2_t
    const GPIO_MSP430F261x.BIT2_OFF;
    const GPIO_MSP430F261x.BIT2;
enum GPIO_MSP430F261x.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F261x.Bit3_t
    const GPIO_MSP430F261x.BIT3_OFF;
    const GPIO_MSP430F261x.BIT3;
enum GPIO_MSP430F261x.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F261x.Bit4_t
    const GPIO_MSP430F261x.BIT4_OFF;
    const GPIO_MSP430F261x.BIT4;
enum GPIO_MSP430F261x.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F261x.Bit5_t
    const GPIO_MSP430F261x.BIT5_OFF;
    const GPIO_MSP430F261x.BIT5;
enum GPIO_MSP430F261x.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F261x.Bit6_t
    const GPIO_MSP430F261x.BIT6_OFF;
    const GPIO_MSP430F261x.BIT6;
enum GPIO_MSP430F261x.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F261x.Bit7_t
    const GPIO_MSP430F261x.BIT7_OFF;
    const GPIO_MSP430F261x.BIT7;
enum GPIO_MSP430F261x.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F261x.InterruptEnable_t
    const GPIO_MSP430F261x.IE_OFF;
    // Disabled
    const GPIO_MSP430F261x.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F261x.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F261x.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F261x.OutputState_t
    const GPIO_MSP430F261x.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F261x.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F261x.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F261x.ResEnable_t
    const GPIO_MSP430F261x.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F261x.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F261x.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F261x.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F261x.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F261x.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F261x.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F261x.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F261x.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F261x.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F261x.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F261x.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F261x.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F261x.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F261x.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F261x.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F261x.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F261x.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F261x.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F261x.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F261x.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F261x.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F261x.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F261x.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F261x.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F261x.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F261x.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F261x.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F261x.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F261x.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F261x.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F261x.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 5 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 5 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 5 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 5 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 6 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 6 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 6 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 6 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 7 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 7 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 7 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 7 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    // Port 8 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    // Port 8 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    // Port 8 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    // Port 8 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F261x.DevicePinFunctionSetting_t[8][8] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F261x.DevicePin_t[8][8] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F261x device, there are 8 x 8 = 64 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F261x.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P5OUT",
            regForceSet: true
        },
        {
            register: "P5SEL",
            regForceSet: false
        },
        {
            register: "P5DIR",
            regForceSet: true
        },
        {
            register: "P5REN",
            regForceSet: false
        },
        {
            register: "P6OUT",
            regForceSet: true
        },
        {
            register: "P6SEL",
            regForceSet: false
        },
        {
            register: "P6DIR",
            regForceSet: true
        },
        {
            register: "P6REN",
            regForceSet: false
        },
        {
            register: "P7OUT",
            regForceSet: true
        },
        {
            register: "P7SEL",
            regForceSet: false
        },
        {
            register: "P7DIR",
            regForceSet: true
        },
        {
            register: "P7REN",
            regForceSet: false
        },
        {
            register: "P8OUT",
            regForceSet: true
        },
        {
            register: "P8SEL",
            regForceSet: false
        },
        {
            register: "P8DIR",
            regForceSet: true
        },
        {
            register: "P8REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F261x.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P1DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P1OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P1REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P1SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P2DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P2OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P2REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P2SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P3DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P3OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P3REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P3SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P4DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P4OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P4REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P4SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P5DIR // instance
index URL

Port 5 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P5DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P5OUT // instance
index URL

Port 5 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P5OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P5REN // instance
index URL

Port 5 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P5REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P5SEL // instance
index URL

Port 5 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P5SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P6DIR // instance
index URL

Port 6 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P6DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P6OUT // instance
index URL

Port 6 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P6OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P6REN // instance
index URL

Port 6 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P6REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P6SEL // instance
index URL

Port 6 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P6SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P7DIR // instance
index URL

Port 7 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P7DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P7OUT // instance
index URL

Port 7 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P7OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P7REN // instance
index URL

Port 7 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P7REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P7SEL // instance
index URL

Port 7 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P7SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P8DIR // instance
index URL

Port 8 Direction Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P8DIR = GPIO_MSP430F261x.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P8OUT // instance
index URL

Port 8 Output Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P8OUT = GPIO_MSP430F261x.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P8REN // instance
index URL

Port 8 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P8REN = GPIO_MSP430F261x.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.P8SEL // instance
index URL

Port 8 Port Select Register

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.P8SEL = GPIO_MSP430F261x.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F261x.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.devicePinSetting = GPIO_MSP430F261x.DevicePinFunctionSetting_t[8][8] undefined;
config GPIO_MSP430F261x.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F261x device, there are 8 x 8 = 64 pins total

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.devicePins = GPIO_MSP430F261x.DevicePin_t[8][8] undefined;
config GPIO_MSP430F261x.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F261x.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P5OUT",
        regForceSet: true
    },
    {
        register: "P5SEL",
        regForceSet: false
    },
    {
        register: "P5DIR",
        regForceSet: true
    },
    {
        register: "P5REN",
        regForceSet: false
    },
    {
        register: "P6OUT",
        regForceSet: true
    },
    {
        register: "P6SEL",
        regForceSet: false
    },
    {
        register: "P6DIR",
        regForceSet: true
    },
    {
        register: "P6REN",
        regForceSet: false
    },
    {
        register: "P7OUT",
        regForceSet: true
    },
    {
        register: "P7SEL",
        regForceSet: false
    },
    {
        register: "P7DIR",
        regForceSet: true
    },
    {
        register: "P7REN",
        regForceSet: false
    },
    {
        register: "P8OUT",
        regForceSet: true
    },
    {
        register: "P8SEL",
        regForceSet: false
    },
    {
        register: "P8DIR",
        regForceSet: true
    },
    {
        register: "P8REN",
        regForceSet: false
    }
];
config GPIO_MSP430F261x.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F261x.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F261x.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F261x.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F261x.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F261x.create(ADC12.Instance adc12, IComparator.Instance comparator, ISVS.Instance svs, DAC12.Instance dac12, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430F261x.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F261x.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F261x.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F261x.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F261x.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F261x.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:47 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F543xA

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F543xA
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430F543xA.xdc
var GPIO_MSP430F543xA = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F543xA');
module-wide constants & types
    values of type GPIO_MSP430F543xA.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430F543xA.BIT0_OFF;
        const GPIO_MSP430F543xA.BIT0;
    values of type GPIO_MSP430F543xA.Bit1_t//
        const GPIO_MSP430F543xA.BIT1_OFF;
        const GPIO_MSP430F543xA.BIT1;
    values of type GPIO_MSP430F543xA.Bit2_t//
        const GPIO_MSP430F543xA.BIT2_OFF;
        const GPIO_MSP430F543xA.BIT2;
    values of type GPIO_MSP430F543xA.Bit3_t//
        const GPIO_MSP430F543xA.BIT3_OFF;
        const GPIO_MSP430F543xA.BIT3;
    values of type GPIO_MSP430F543xA.Bit4_t//
        const GPIO_MSP430F543xA.BIT4_OFF;
        const GPIO_MSP430F543xA.BIT4;
    values of type GPIO_MSP430F543xA.Bit5_t//
        const GPIO_MSP430F543xA.BIT5_OFF;
        const GPIO_MSP430F543xA.BIT5;
    values of type GPIO_MSP430F543xA.Bit6_t//
        const GPIO_MSP430F543xA.BIT6_OFF;
        const GPIO_MSP430F543xA.BIT6;
    values of type GPIO_MSP430F543xA.Bit7_t//
        const GPIO_MSP430F543xA.BIT7_OFF;
        const GPIO_MSP430F543xA.BIT7;
    values of type GPIO_MSP430F543xA.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430F543xA.IE_OFF// Disabled;
        const GPIO_MSP430F543xA.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430F543xA.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430F543xA.OutputState_t// Output high or low drop down list
        const GPIO_MSP430F543xA.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430F543xA.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430F543xA.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430F543xA.PUDRE_OFF// Disabled;
        const GPIO_MSP430F543xA.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430F543xA.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430F543xA.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430F543xA.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430F543xA.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430F543xA.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430F543xA.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430F543xA.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430F543xA.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430F543xA.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430F543xA.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430F543xA.Params// Instance config-params object;
        params.P10DIR// Port 10 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P10OUT// Port 10 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P10REN// Port 10 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P10SEL// Port 10 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P11DIR// Port 11 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P11OUT// Port 11 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P11REN// Port 11 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P11SEL// Port 11 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5DIR// Port 5 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5OUT// Port 5 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5REN// Port 5 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P5SEL// Port 5 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6DIR// Port 6 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6OUT// Port 6 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6REN// Port 6 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P6SEL// Port 6 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7DIR// Port 7 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7OUT// Port 7 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7REN// Port 7 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P7SEL// Port 7 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8DIR// Port 8 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8OUT// Port 8 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8REN// Port 8 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P8SEL// Port 8 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P9DIR// Port 9 Direction Register = GPIO_MSP430F543xA.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P9OUT// Port 9 Output Register = GPIO_MSP430F543xA.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P9REN// Port 9 Resistor Enable Register = GPIO_MSP430F543xA.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P9SEL// Port 9 Port Select Register = GPIO_MSP430F543xA.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430F543xA.DevicePinFunctionSetting_t[8][12] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F543x(A) device, there are 8 + 2 = 10 pins total = GPIO_MSP430F543xA.DevicePin_t[8][12] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430F543xA.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P5OUT",
                regForceSet: true
            },
            {
                register: "P5SEL",
                regForceSet: false
            },
            {
                register: "P5DIR",
                regForceSet: true
            },
            {
                register: "P5REN",
                regForceSet: false
            },
            {
                register: "P6OUT",
                regForceSet: true
            },
            {
                register: "P6SEL",
                regForceSet: false
            },
            {
                register: "P6DIR",
                regForceSet: true
            },
            {
                register: "P6REN",
                regForceSet: false
            },
            {
                register: "P7OUT",
                regForceSet: true
            },
            {
                register: "P7SEL",
                regForceSet: false
            },
            {
                register: "P7DIR",
                regForceSet: true
            },
            {
                register: "P7REN",
                regForceSet: false
            },
            {
                register: "P8OUT",
                regForceSet: true
            },
            {
                register: "P8SEL",
                regForceSet: false
            },
            {
                register: "P8DIR",
                regForceSet: true
            },
            {
                register: "P8REN",
                regForceSet: false
            },
            {
                register: "P9OUT",
                regForceSet: true
            },
            {
                register: "P9SEL",
                regForceSet: false
            },
            {
                register: "P9DIR",
                regForceSet: true
            },
            {
                register: "P9REN",
                regForceSet: false
            },
            {
                register: "P10OUT",
                regForceSet: true
            },
            {
                register: "P10SEL",
                regForceSet: false
            },
            {
                register: "P10DIR",
                regForceSet: true
            },
            {
                register: "P10REN",
                regForceSet: false
            },
            {
                register: "P11OUT",
                regForceSet: true
            },
            {
                register: "P11SEL",
                regForceSet: false
            },
            {
                register: "P11DIR",
                regForceSet: true
            },
            {
                register: "P11REN",
                regForceSet: false
            },
            {
                register: "PJOUT",
                regForceSet: true
            },
            {
                register: "PJSEL",
                regForceSet: false
            },
            {
                register: "PJDIR",
                regForceSet: true
            },
            {
                register: "PJREN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430F543xA.create// Create an instance-object(UCS.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430F543xA.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430F543xA.Bit0_t
    const GPIO_MSP430F543xA.BIT0_OFF;
    const GPIO_MSP430F543xA.BIT0;
enum GPIO_MSP430F543xA.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430F543xA.Bit1_t
    const GPIO_MSP430F543xA.BIT1_OFF;
    const GPIO_MSP430F543xA.BIT1;
enum GPIO_MSP430F543xA.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430F543xA.Bit2_t
    const GPIO_MSP430F543xA.BIT2_OFF;
    const GPIO_MSP430F543xA.BIT2;
enum GPIO_MSP430F543xA.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430F543xA.Bit3_t
    const GPIO_MSP430F543xA.BIT3_OFF;
    const GPIO_MSP430F543xA.BIT3;
enum GPIO_MSP430F543xA.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430F543xA.Bit4_t
    const GPIO_MSP430F543xA.BIT4_OFF;
    const GPIO_MSP430F543xA.BIT4;
enum GPIO_MSP430F543xA.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430F543xA.Bit5_t
    const GPIO_MSP430F543xA.BIT5_OFF;
    const GPIO_MSP430F543xA.BIT5;
enum GPIO_MSP430F543xA.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430F543xA.Bit6_t
    const GPIO_MSP430F543xA.BIT6_OFF;
    const GPIO_MSP430F543xA.BIT6;
enum GPIO_MSP430F543xA.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430F543xA.Bit7_t
    const GPIO_MSP430F543xA.BIT7_OFF;
    const GPIO_MSP430F543xA.BIT7;
enum GPIO_MSP430F543xA.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430F543xA.InterruptEnable_t
    const GPIO_MSP430F543xA.IE_OFF;
    // Disabled
    const GPIO_MSP430F543xA.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430F543xA.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430F543xA.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430F543xA.OutputState_t
    const GPIO_MSP430F543xA.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430F543xA.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430F543xA.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430F543xA.ResEnable_t
    const GPIO_MSP430F543xA.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430F543xA.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430F543xA.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430F543xA.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430F543xA.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430F543xA.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430F543xA.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430F543xA.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430F543xA.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430F543xA.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430F543xA.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430F543xA.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430F543xA.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430F543xA.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430F543xA.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430F543xA.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430F543xA.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430F543xA.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430F543xA.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430F543xA.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430F543xA.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430F543xA.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430F543xA.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430F543xA.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430F543xA.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430F543xA.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430F543xA.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430F543xA.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430F543xA.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430F543xA.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430F543xA.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
// Instance config-params object
    params.P10DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 10 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P10OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 10 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P10REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 10 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P10SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 10 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P11DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 11 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P11OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 11 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P11REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 11 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P11SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 11 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 5 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 5 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 5 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P5SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 5 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 6 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 6 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 6 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P6SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 6 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 7 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 7 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 7 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P7SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 7 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 8 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 8 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 8 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P8SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 8 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P9DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    // Port 9 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P9OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    // Port 9 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P9REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    // Port 9 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P9SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    // Port 9 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430F543xA.DevicePinFunctionSetting_t[8][12] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430F543xA.DevicePin_t[8][12] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F543x(A) device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430F543xA.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P5OUT",
            regForceSet: true
        },
        {
            register: "P5SEL",
            regForceSet: false
        },
        {
            register: "P5DIR",
            regForceSet: true
        },
        {
            register: "P5REN",
            regForceSet: false
        },
        {
            register: "P6OUT",
            regForceSet: true
        },
        {
            register: "P6SEL",
            regForceSet: false
        },
        {
            register: "P6DIR",
            regForceSet: true
        },
        {
            register: "P6REN",
            regForceSet: false
        },
        {
            register: "P7OUT",
            regForceSet: true
        },
        {
            register: "P7SEL",
            regForceSet: false
        },
        {
            register: "P7DIR",
            regForceSet: true
        },
        {
            register: "P7REN",
            regForceSet: false
        },
        {
            register: "P8OUT",
            regForceSet: true
        },
        {
            register: "P8SEL",
            regForceSet: false
        },
        {
            register: "P8DIR",
            regForceSet: true
        },
        {
            register: "P8REN",
            regForceSet: false
        },
        {
            register: "P9OUT",
            regForceSet: true
        },
        {
            register: "P9SEL",
            regForceSet: false
        },
        {
            register: "P9DIR",
            regForceSet: true
        },
        {
            register: "P9REN",
            regForceSet: false
        },
        {
            register: "P10OUT",
            regForceSet: true
        },
        {
            register: "P10SEL",
            regForceSet: false
        },
        {
            register: "P10DIR",
            regForceSet: true
        },
        {
            register: "P10REN",
            regForceSet: false
        },
        {
            register: "P11OUT",
            regForceSet: true
        },
        {
            register: "P11SEL",
            regForceSet: false
        },
        {
            register: "P11DIR",
            regForceSet: true
        },
        {
            register: "P11REN",
            regForceSet: false
        },
        {
            register: "PJOUT",
            regForceSet: true
        },
        {
            register: "PJSEL",
            regForceSet: false
        },
        {
            register: "PJDIR",
            regForceSet: true
        },
        {
            register: "PJREN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430F543xA.Params.P10DIR // instance
index URL

Port 10 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P10DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P10OUT // instance
index URL

Port 10 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P10OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P10REN // instance
index URL

Port 10 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P10REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P10SEL // instance
index URL

Port 10 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P10SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P11DIR // instance
index URL

Port 11 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P11DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P11OUT // instance
index URL

Port 11 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P11OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P11REN // instance
index URL

Port 11 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P11REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P11SEL // instance
index URL

Port 11 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P11SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P1DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P1OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P1REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P1SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P2DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P2OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P2REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P2SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P3DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P3OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P3REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P3SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P4DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P4OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P4REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P4SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P5DIR // instance
index URL

Port 5 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P5DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P5OUT // instance
index URL

Port 5 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P5OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P5REN // instance
index URL

Port 5 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P5REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P5SEL // instance
index URL

Port 5 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P5SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P6DIR // instance
index URL

Port 6 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P6DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P6OUT // instance
index URL

Port 6 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P6OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P6REN // instance
index URL

Port 6 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P6REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P6SEL // instance
index URL

Port 6 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P6SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P7DIR // instance
index URL

Port 7 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P7DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P7OUT // instance
index URL

Port 7 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P7OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P7REN // instance
index URL

Port 7 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P7REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P7SEL // instance
index URL

Port 7 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P7SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P8DIR // instance
index URL

Port 8 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P8DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P8OUT // instance
index URL

Port 8 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P8OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P8REN // instance
index URL

Port 8 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P8REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P8SEL // instance
index URL

Port 8 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P8SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P9DIR // instance
index URL

Port 9 Direction Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P9DIR = GPIO_MSP430F543xA.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P9OUT // instance
index URL

Port 9 Output Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P9OUT = GPIO_MSP430F543xA.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P9REN // instance
index URL

Port 9 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P9REN = GPIO_MSP430F543xA.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.P9SEL // instance
index URL

Port 9 Port Select Register

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.P9SEL = GPIO_MSP430F543xA.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430F543xA.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.devicePinSetting = GPIO_MSP430F543xA.DevicePinFunctionSetting_t[8][12] undefined;
config GPIO_MSP430F543xA.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430F543x(A) device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.devicePins = GPIO_MSP430F543xA.DevicePin_t[8][12] undefined;
config GPIO_MSP430F543xA.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430F543xA.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P5OUT",
        regForceSet: true
    },
    {
        register: "P5SEL",
        regForceSet: false
    },
    {
        register: "P5DIR",
        regForceSet: true
    },
    {
        register: "P5REN",
        regForceSet: false
    },
    {
        register: "P6OUT",
        regForceSet: true
    },
    {
        register: "P6SEL",
        regForceSet: false
    },
    {
        register: "P6DIR",
        regForceSet: true
    },
    {
        register: "P6REN",
        regForceSet: false
    },
    {
        register: "P7OUT",
        regForceSet: true
    },
    {
        register: "P7SEL",
        regForceSet: false
    },
    {
        register: "P7DIR",
        regForceSet: true
    },
    {
        register: "P7REN",
        regForceSet: false
    },
    {
        register: "P8OUT",
        regForceSet: true
    },
    {
        register: "P8SEL",
        regForceSet: false
    },
    {
        register: "P8DIR",
        regForceSet: true
    },
    {
        register: "P8REN",
        regForceSet: false
    },
    {
        register: "P9OUT",
        regForceSet: true
    },
    {
        register: "P9SEL",
        regForceSet: false
    },
    {
        register: "P9DIR",
        regForceSet: true
    },
    {
        register: "P9REN",
        regForceSet: false
    },
    {
        register: "P10OUT",
        regForceSet: true
    },
    {
        register: "P10SEL",
        regForceSet: false
    },
    {
        register: "P10DIR",
        regForceSet: true
    },
    {
        register: "P10REN",
        regForceSet: false
    },
    {
        register: "P11OUT",
        regForceSet: true
    },
    {
        register: "P11SEL",
        regForceSet: false
    },
    {
        register: "P11DIR",
        regForceSet: true
    },
    {
        register: "P11REN",
        regForceSet: false
    },
    {
        register: "PJOUT",
        regForceSet: true
    },
    {
        register: "PJSEL",
        regForceSet: false
    },
    {
        register: "PJDIR",
        regForceSet: true
    },
    {
        register: "PJREN",
        regForceSet: false
    }
];
config GPIO_MSP430F543xA.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430F543xA.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430F543xA.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430F543xA.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430F543xA.create(UCS.Instance clock, params);
// Create an instance-object
GPIO_MSP430F543xA.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430F543xA.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430F543xA.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430F543xA.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430F543xA.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430F543xA.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:48 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5736_32_26_22

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5736_32_26_22
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430FR5736_32_26_22.xdc
var GPIO_MSP430FR5736_32_26_22 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5736_32_26_22');
module-wide constants & types
    values of type GPIO_MSP430FR5736_32_26_22.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430FR5736_32_26_22.BIT0_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT0;
    values of type GPIO_MSP430FR5736_32_26_22.Bit1_t//
        const GPIO_MSP430FR5736_32_26_22.BIT1_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT1;
    values of type GPIO_MSP430FR5736_32_26_22.Bit2_t//
        const GPIO_MSP430FR5736_32_26_22.BIT2_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT2;
    values of type GPIO_MSP430FR5736_32_26_22.Bit3_t//
        const GPIO_MSP430FR5736_32_26_22.BIT3_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT3;
    values of type GPIO_MSP430FR5736_32_26_22.Bit4_t//
        const GPIO_MSP430FR5736_32_26_22.BIT4_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT4;
    values of type GPIO_MSP430FR5736_32_26_22.Bit5_t//
        const GPIO_MSP430FR5736_32_26_22.BIT5_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT5;
    values of type GPIO_MSP430FR5736_32_26_22.Bit6_t//
        const GPIO_MSP430FR5736_32_26_22.BIT6_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT6;
    values of type GPIO_MSP430FR5736_32_26_22.Bit7_t//
        const GPIO_MSP430FR5736_32_26_22.BIT7_OFF;
        const GPIO_MSP430FR5736_32_26_22.BIT7;
    values of type GPIO_MSP430FR5736_32_26_22.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430FR5736_32_26_22.IE_OFF// Disabled;
        const GPIO_MSP430FR5736_32_26_22.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430FR5736_32_26_22.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430FR5736_32_26_22.OutputState_t// Output high or low drop down list
        const GPIO_MSP430FR5736_32_26_22.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430FR5736_32_26_22.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430FR5736_32_26_22.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430FR5736_32_26_22.PUDRE_OFF// Disabled;
        const GPIO_MSP430FR5736_32_26_22.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430FR5736_32_26_22.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430FR5736_32_26_22.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430FR5736_32_26_22.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430FR5736_32_26_22.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430FR5736_32_26_22.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5736_32_26_22.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430FR5736_32_26_22.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5736_32_26_22.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5736_32_26_22.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5736_32_26_22.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL0// Port 1 Port Select Register 0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL1// Port 1 Port Select Register 1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL0// Port 2 Port Select Register 0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL1// Port 2 Port Select Register 1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJDIR// Port J Direction Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJOUT// Port J Output Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJREN// Port J Resistor Enable Register = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL0// Port J Port Select Register 0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL1// Port J Port Select Register 1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430FR5736_32_26_22.DevicePinFunctionSetting_t[8][3] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 3 + 2 = 10 pins total = GPIO_MSP430FR5736_32_26_22.DevicePin_t[8][3] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430FR5736_32_26_22.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL0",
                regForceSet: false
            },
            {
                register: "P1SEL1",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL0",
                regForceSet: false
            },
            {
                register: "P2SEL1",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "PJOUT",
                regForceSet: true
            },
            {
                register: "PJSEL0",
                regForceSet: false
            },
            {
                register: "PJSEL1",
                regForceSet: false
            },
            {
                register: "PJDIR",
                regForceSet: true
            },
            {
                register: "PJREN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5736_32_26_22.create// Create an instance-object(CS.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430FR5736_32_26_22.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit0_t
    const GPIO_MSP430FR5736_32_26_22.BIT0_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT0;
enum GPIO_MSP430FR5736_32_26_22.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit1_t
    const GPIO_MSP430FR5736_32_26_22.BIT1_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT1;
enum GPIO_MSP430FR5736_32_26_22.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit2_t
    const GPIO_MSP430FR5736_32_26_22.BIT2_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT2;
enum GPIO_MSP430FR5736_32_26_22.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit3_t
    const GPIO_MSP430FR5736_32_26_22.BIT3_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT3;
enum GPIO_MSP430FR5736_32_26_22.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit4_t
    const GPIO_MSP430FR5736_32_26_22.BIT4_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT4;
enum GPIO_MSP430FR5736_32_26_22.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit5_t
    const GPIO_MSP430FR5736_32_26_22.BIT5_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT5;
enum GPIO_MSP430FR5736_32_26_22.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit6_t
    const GPIO_MSP430FR5736_32_26_22.BIT6_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT6;
enum GPIO_MSP430FR5736_32_26_22.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.Bit7_t
    const GPIO_MSP430FR5736_32_26_22.BIT7_OFF;
    const GPIO_MSP430FR5736_32_26_22.BIT7;
enum GPIO_MSP430FR5736_32_26_22.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.InterruptEnable_t
    const GPIO_MSP430FR5736_32_26_22.IE_OFF;
    // Disabled
    const GPIO_MSP430FR5736_32_26_22.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430FR5736_32_26_22.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430FR5736_32_26_22.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.OutputState_t
    const GPIO_MSP430FR5736_32_26_22.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430FR5736_32_26_22.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430FR5736_32_26_22.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430FR5736_32_26_22.ResEnable_t
    const GPIO_MSP430FR5736_32_26_22.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430FR5736_32_26_22.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430FR5736_32_26_22.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430FR5736_32_26_22.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430FR5736_32_26_22.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430FR5736_32_26_22.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430FR5736_32_26_22.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430FR5736_32_26_22.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430FR5736_32_26_22.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430FR5736_32_26_22.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5736_32_26_22.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5736_32_26_22.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5736_32_26_22.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5736_32_26_22.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    // Port 1 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    // Port 1 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    // Port 2 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    // Port 2 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJDIR = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
    // Port J Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJOUT = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
    // Port J Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJREN = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
    // Port J Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    // Port J Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    // Port J Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430FR5736_32_26_22.DevicePinFunctionSetting_t[8][3] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430FR5736_32_26_22.DevicePin_t[8][3] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 3 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430FR5736_32_26_22.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL0",
            regForceSet: false
        },
        {
            register: "P1SEL1",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL0",
            regForceSet: false
        },
        {
            register: "P2SEL1",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "PJOUT",
            regForceSet: true
        },
        {
            register: "PJSEL0",
            regForceSet: false
        },
        {
            register: "PJSEL1",
            regForceSet: false
        },
        {
            register: "PJDIR",
            regForceSet: true
        },
        {
            register: "PJREN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5736_32_26_22.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1DIR = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1OUT = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1REN = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P1SEL0 // instance
index URL

Port 1 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1SEL0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P1SEL1 // instance
index URL

Port 1 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P1SEL1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2DIR = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2OUT = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2REN = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2SEL0 // instance
index URL

Port 2 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2SEL0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P2SEL1 // instance
index URL

Port 2 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P2SEL1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.PJDIR // instance
index URL

Port J Direction Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.PJDIR = GPIO_MSP430FR5736_32_26_22.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.PJOUT // instance
index URL

Port J Output Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.PJOUT = GPIO_MSP430FR5736_32_26_22.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.PJREN // instance
index URL

Port J Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.PJREN = GPIO_MSP430FR5736_32_26_22.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.PJSEL0 // instance
index URL

Port J Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.PJSEL0 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.PJSEL1 // instance
index URL

Port J Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.PJSEL1 = GPIO_MSP430FR5736_32_26_22.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5736_32_26_22.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.devicePinSetting = GPIO_MSP430FR5736_32_26_22.DevicePinFunctionSetting_t[8][3] undefined;
config GPIO_MSP430FR5736_32_26_22.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 3 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.devicePins = GPIO_MSP430FR5736_32_26_22.DevicePin_t[8][3] undefined;
config GPIO_MSP430FR5736_32_26_22.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430FR5736_32_26_22.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL0",
        regForceSet: false
    },
    {
        register: "P1SEL1",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL0",
        regForceSet: false
    },
    {
        register: "P2SEL1",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "PJOUT",
        regForceSet: true
    },
    {
        register: "PJSEL0",
        regForceSet: false
    },
    {
        register: "PJSEL1",
        regForceSet: false
    },
    {
        register: "PJDIR",
        regForceSet: true
    },
    {
        register: "PJREN",
        regForceSet: false
    }
];
config GPIO_MSP430FR5736_32_26_22.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5736_32_26_22.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5736_32_26_22.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5736_32_26_22.create(CS.Instance clock, params);
// Create an instance-object
GPIO_MSP430FR5736_32_26_22.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430FR5736_32_26_22.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430FR5736_32_26_22.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430FR5736_32_26_22.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430FR5736_32_26_22.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430FR5736_32_26_22.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:48 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5737_33_27_23

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5737_33_27_23
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430FR5737_33_27_23.xdc
var GPIO_MSP430FR5737_33_27_23 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5737_33_27_23');
module-wide constants & types
    values of type GPIO_MSP430FR5737_33_27_23.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430FR5737_33_27_23.BIT0_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT0;
    values of type GPIO_MSP430FR5737_33_27_23.Bit1_t//
        const GPIO_MSP430FR5737_33_27_23.BIT1_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT1;
    values of type GPIO_MSP430FR5737_33_27_23.Bit2_t//
        const GPIO_MSP430FR5737_33_27_23.BIT2_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT2;
    values of type GPIO_MSP430FR5737_33_27_23.Bit3_t//
        const GPIO_MSP430FR5737_33_27_23.BIT3_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT3;
    values of type GPIO_MSP430FR5737_33_27_23.Bit4_t//
        const GPIO_MSP430FR5737_33_27_23.BIT4_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT4;
    values of type GPIO_MSP430FR5737_33_27_23.Bit5_t//
        const GPIO_MSP430FR5737_33_27_23.BIT5_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT5;
    values of type GPIO_MSP430FR5737_33_27_23.Bit6_t//
        const GPIO_MSP430FR5737_33_27_23.BIT6_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT6;
    values of type GPIO_MSP430FR5737_33_27_23.Bit7_t//
        const GPIO_MSP430FR5737_33_27_23.BIT7_OFF;
        const GPIO_MSP430FR5737_33_27_23.BIT7;
    values of type GPIO_MSP430FR5737_33_27_23.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430FR5737_33_27_23.IE_OFF// Disabled;
        const GPIO_MSP430FR5737_33_27_23.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430FR5737_33_27_23.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430FR5737_33_27_23.OutputState_t// Output high or low drop down list
        const GPIO_MSP430FR5737_33_27_23.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430FR5737_33_27_23.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430FR5737_33_27_23.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430FR5737_33_27_23.PUDRE_OFF// Disabled;
        const GPIO_MSP430FR5737_33_27_23.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430FR5737_33_27_23.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430FR5737_33_27_23.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430FR5737_33_27_23.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430FR5737_33_27_23.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430FR5737_33_27_23.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5737_33_27_23.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430FR5737_33_27_23.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5737_33_27_23.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5737_33_27_23.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5737_33_27_23.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL0// Port 1 Port Select Register 0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL1// Port 1 Port Select Register 1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL0// Port 2 Port Select Register 0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL1// Port 2 Port Select Register 1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL0// Port 3 Port Select Register 0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL1// Port 3 Port Select Register 1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL0// Port 4 Port Select Register 0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL1// Port 4 Port Select Register 1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJDIR// Port J Direction Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJOUT// Port J Output Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJREN// Port J Resistor Enable Register = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL0// Port J Port Select Register 0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL1// Port J Port Select Register 1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430FR5737_33_27_23.DevicePinFunctionSetting_t[8][5] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total = GPIO_MSP430FR5737_33_27_23.DevicePin_t[8][5] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430FR5737_33_27_23.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL0",
                regForceSet: false
            },
            {
                register: "P1SEL1",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL0",
                regForceSet: false
            },
            {
                register: "P2SEL1",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL0",
                regForceSet: false
            },
            {
                register: "P3SEL1",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P3IES",
                regForceSet: true
            },
            {
                register: "P3IFG",
                regForceSet: true
            },
            {
                register: "P3IE",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL0",
                regForceSet: false
            },
            {
                register: "P4SEL1",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P4IES",
                regForceSet: true
            },
            {
                register: "P4IFG",
                regForceSet: true
            },
            {
                register: "P4IE",
                regForceSet: false
            },
            {
                register: "PJOUT",
                regForceSet: true
            },
            {
                register: "PJSEL0",
                regForceSet: false
            },
            {
                register: "PJSEL1",
                regForceSet: false
            },
            {
                register: "PJDIR",
                regForceSet: true
            },
            {
                register: "PJREN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5737_33_27_23.create// Create an instance-object(CS.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430FR5737_33_27_23.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit0_t
    const GPIO_MSP430FR5737_33_27_23.BIT0_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT0;
enum GPIO_MSP430FR5737_33_27_23.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit1_t
    const GPIO_MSP430FR5737_33_27_23.BIT1_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT1;
enum GPIO_MSP430FR5737_33_27_23.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit2_t
    const GPIO_MSP430FR5737_33_27_23.BIT2_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT2;
enum GPIO_MSP430FR5737_33_27_23.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit3_t
    const GPIO_MSP430FR5737_33_27_23.BIT3_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT3;
enum GPIO_MSP430FR5737_33_27_23.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit4_t
    const GPIO_MSP430FR5737_33_27_23.BIT4_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT4;
enum GPIO_MSP430FR5737_33_27_23.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit5_t
    const GPIO_MSP430FR5737_33_27_23.BIT5_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT5;
enum GPIO_MSP430FR5737_33_27_23.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit6_t
    const GPIO_MSP430FR5737_33_27_23.BIT6_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT6;
enum GPIO_MSP430FR5737_33_27_23.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.Bit7_t
    const GPIO_MSP430FR5737_33_27_23.BIT7_OFF;
    const GPIO_MSP430FR5737_33_27_23.BIT7;
enum GPIO_MSP430FR5737_33_27_23.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.InterruptEnable_t
    const GPIO_MSP430FR5737_33_27_23.IE_OFF;
    // Disabled
    const GPIO_MSP430FR5737_33_27_23.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430FR5737_33_27_23.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430FR5737_33_27_23.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.OutputState_t
    const GPIO_MSP430FR5737_33_27_23.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430FR5737_33_27_23.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430FR5737_33_27_23.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430FR5737_33_27_23.ResEnable_t
    const GPIO_MSP430FR5737_33_27_23.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430FR5737_33_27_23.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430FR5737_33_27_23.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430FR5737_33_27_23.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430FR5737_33_27_23.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430FR5737_33_27_23.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430FR5737_33_27_23.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430FR5737_33_27_23.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430FR5737_33_27_23.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430FR5737_33_27_23.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5737_33_27_23.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5737_33_27_23.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5737_33_27_23.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5737_33_27_23.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 1 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 1 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 2 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 2 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 3 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 3 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 4 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port 4 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJDIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    // Port J Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJOUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    // Port J Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJREN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    // Port J Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port J Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    // Port J Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430FR5737_33_27_23.DevicePinFunctionSetting_t[8][5] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430FR5737_33_27_23.DevicePin_t[8][5] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430FR5737_33_27_23.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL0",
            regForceSet: false
        },
        {
            register: "P1SEL1",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL0",
            regForceSet: false
        },
        {
            register: "P2SEL1",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL0",
            regForceSet: false
        },
        {
            register: "P3SEL1",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P3IES",
            regForceSet: true
        },
        {
            register: "P3IFG",
            regForceSet: true
        },
        {
            register: "P3IE",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL0",
            regForceSet: false
        },
        {
            register: "P4SEL1",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P4IES",
            regForceSet: true
        },
        {
            register: "P4IFG",
            regForceSet: true
        },
        {
            register: "P4IE",
            regForceSet: false
        },
        {
            register: "PJOUT",
            regForceSet: true
        },
        {
            register: "PJSEL0",
            regForceSet: false
        },
        {
            register: "PJSEL1",
            regForceSet: false
        },
        {
            register: "PJDIR",
            regForceSet: true
        },
        {
            register: "PJREN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5737_33_27_23.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P1SEL0 // instance
index URL

Port 1 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P1SEL1 // instance
index URL

Port 1 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P1SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2SEL0 // instance
index URL

Port 2 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P2SEL1 // instance
index URL

Port 2 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P2SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3SEL0 // instance
index URL

Port 3 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P3SEL1 // instance
index URL

Port 3 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P3SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4DIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4OUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4REN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4SEL0 // instance
index URL

Port 4 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4SEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.P4SEL1 // instance
index URL

Port 4 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.P4SEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.PJDIR // instance
index URL

Port J Direction Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.PJDIR = GPIO_MSP430FR5737_33_27_23.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.PJOUT // instance
index URL

Port J Output Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.PJOUT = GPIO_MSP430FR5737_33_27_23.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.PJREN // instance
index URL

Port J Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.PJREN = GPIO_MSP430FR5737_33_27_23.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.PJSEL0 // instance
index URL

Port J Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.PJSEL0 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.PJSEL1 // instance
index URL

Port J Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.PJSEL1 = GPIO_MSP430FR5737_33_27_23.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5737_33_27_23.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.devicePinSetting = GPIO_MSP430FR5737_33_27_23.DevicePinFunctionSetting_t[8][5] undefined;
config GPIO_MSP430FR5737_33_27_23.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.devicePins = GPIO_MSP430FR5737_33_27_23.DevicePin_t[8][5] undefined;
config GPIO_MSP430FR5737_33_27_23.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430FR5737_33_27_23.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL0",
        regForceSet: false
    },
    {
        register: "P1SEL1",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL0",
        regForceSet: false
    },
    {
        register: "P2SEL1",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL0",
        regForceSet: false
    },
    {
        register: "P3SEL1",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P3IES",
        regForceSet: true
    },
    {
        register: "P3IFG",
        regForceSet: true
    },
    {
        register: "P3IE",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL0",
        regForceSet: false
    },
    {
        register: "P4SEL1",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P4IES",
        regForceSet: true
    },
    {
        register: "P4IFG",
        regForceSet: true
    },
    {
        register: "P4IE",
        regForceSet: false
    },
    {
        register: "PJOUT",
        regForceSet: true
    },
    {
        register: "PJSEL0",
        regForceSet: false
    },
    {
        register: "PJSEL1",
        regForceSet: false
    },
    {
        register: "PJDIR",
        regForceSet: true
    },
    {
        register: "PJREN",
        regForceSet: false
    }
];
config GPIO_MSP430FR5737_33_27_23.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5737_33_27_23.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5737_33_27_23.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5737_33_27_23.create(CS.Instance clock, params);
// Create an instance-object
GPIO_MSP430FR5737_33_27_23.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430FR5737_33_27_23.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430FR5737_33_27_23.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430FR5737_33_27_23.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430FR5737_33_27_23.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430FR5737_33_27_23.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:49 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5738_34_30_28_24_20

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5738_34_30_28_24_20
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430FR5738_34_30_28_24_20.xdc
var GPIO_MSP430FR5738_34_30_28_24_20 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5738_34_30_28_24_20');
module-wide constants & types
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT0_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT0;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit1_t//
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT1_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT1;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit2_t//
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT2_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT2;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit3_t//
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT3_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT3;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit4_t//
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT4_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT4;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit5_t//
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT5_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT5;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit6_t//
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT6_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT6;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit7_t//
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT7_OFF;
        const GPIO_MSP430FR5738_34_30_28_24_20.BIT7;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430FR5738_34_30_28_24_20.IE_OFF// Disabled;
        const GPIO_MSP430FR5738_34_30_28_24_20.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430FR5738_34_30_28_24_20.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.OutputState_t// Output high or low drop down list
        const GPIO_MSP430FR5738_34_30_28_24_20.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430FR5738_34_30_28_24_20.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430FR5738_34_30_28_24_20.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430FR5738_34_30_28_24_20.PUDRE_OFF// Disabled;
        const GPIO_MSP430FR5738_34_30_28_24_20.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430FR5738_34_30_28_24_20.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5738_34_30_28_24_20.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5738_34_30_28_24_20.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL0// Port 1 Port Select Register 0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL1// Port 1 Port Select Register 1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL0// Port 2 Port Select Register 0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL1// Port 2 Port Select Register 1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJDIR// Port J Direction Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJOUT// Port J Output Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJREN// Port J Resistor Enable Register = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL0// Port J Port Select Register 0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL1// Port J Port Select Register 1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunctionSetting_t[8][3] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 3 + 2 = 10 pins total = GPIO_MSP430FR5738_34_30_28_24_20.DevicePin_t[8][3] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430FR5738_34_30_28_24_20.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL0",
                regForceSet: false
            },
            {
                register: "P1SEL1",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL0",
                regForceSet: false
            },
            {
                register: "P2SEL1",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "PJOUT",
                regForceSet: true
            },
            {
                register: "PJSEL0",
                regForceSet: false
            },
            {
                register: "PJSEL1",
                regForceSet: false
            },
            {
                register: "PJDIR",
                regForceSet: true
            },
            {
                register: "PJREN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5738_34_30_28_24_20.create// Create an instance-object(CS.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit0_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT0_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT0;
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit1_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT1_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT1;
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit2_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT2_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT2;
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit3_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT3_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT3;
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit4_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT4_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT4;
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit5_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT5_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT5;
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit6_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT6_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT6;
enum GPIO_MSP430FR5738_34_30_28_24_20.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.Bit7_t
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT7_OFF;
    const GPIO_MSP430FR5738_34_30_28_24_20.BIT7;
enum GPIO_MSP430FR5738_34_30_28_24_20.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.InterruptEnable_t
    const GPIO_MSP430FR5738_34_30_28_24_20.IE_OFF;
    // Disabled
    const GPIO_MSP430FR5738_34_30_28_24_20.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430FR5738_34_30_28_24_20.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430FR5738_34_30_28_24_20.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.OutputState_t
    const GPIO_MSP430FR5738_34_30_28_24_20.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430FR5738_34_30_28_24_20.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430FR5738_34_30_28_24_20.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430FR5738_34_30_28_24_20.ResEnable_t
    const GPIO_MSP430FR5738_34_30_28_24_20.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430FR5738_34_30_28_24_20.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430FR5738_34_30_28_24_20.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430FR5738_34_30_28_24_20.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430FR5738_34_30_28_24_20.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430FR5738_34_30_28_24_20.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430FR5738_34_30_28_24_20.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430FR5738_34_30_28_24_20.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5738_34_30_28_24_20.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5738_34_30_28_24_20.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5738_34_30_28_24_20.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5738_34_30_28_24_20.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    // Port 1 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    // Port 1 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    // Port 2 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    // Port 2 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJDIR = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
    // Port J Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJOUT = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
    // Port J Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJREN = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
    // Port J Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    // Port J Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    // Port J Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunctionSetting_t[8][3] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430FR5738_34_30_28_24_20.DevicePin_t[8][3] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 3 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430FR5738_34_30_28_24_20.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL0",
            regForceSet: false
        },
        {
            register: "P1SEL1",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL0",
            regForceSet: false
        },
        {
            register: "P2SEL1",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "PJOUT",
            regForceSet: true
        },
        {
            register: "PJSEL0",
            regForceSet: false
        },
        {
            register: "PJSEL1",
            regForceSet: false
        },
        {
            register: "PJDIR",
            regForceSet: true
        },
        {
            register: "PJREN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1DIR = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1OUT = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1REN = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1SEL0 // instance
index URL

Port 1 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1SEL0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P1SEL1 // instance
index URL

Port 1 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P1SEL1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2DIR = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2OUT = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2REN = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2SEL0 // instance
index URL

Port 2 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2SEL0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P2SEL1 // instance
index URL

Port 2 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P2SEL1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.PJDIR // instance
index URL

Port J Direction Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.PJDIR = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.PJOUT // instance
index URL

Port J Output Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.PJOUT = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.PJREN // instance
index URL

Port J Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.PJREN = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.PJSEL0 // instance
index URL

Port J Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.PJSEL0 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.PJSEL1 // instance
index URL

Port J Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.PJSEL1 = GPIO_MSP430FR5738_34_30_28_24_20.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5738_34_30_28_24_20.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.devicePinSetting = GPIO_MSP430FR5738_34_30_28_24_20.DevicePinFunctionSetting_t[8][3] undefined;
config GPIO_MSP430FR5738_34_30_28_24_20.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 3 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.devicePins = GPIO_MSP430FR5738_34_30_28_24_20.DevicePin_t[8][3] undefined;
config GPIO_MSP430FR5738_34_30_28_24_20.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430FR5738_34_30_28_24_20.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL0",
        regForceSet: false
    },
    {
        register: "P1SEL1",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL0",
        regForceSet: false
    },
    {
        register: "P2SEL1",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "PJOUT",
        regForceSet: true
    },
    {
        register: "PJSEL0",
        regForceSet: false
    },
    {
        register: "PJSEL1",
        regForceSet: false
    },
    {
        register: "PJDIR",
        regForceSet: true
    },
    {
        register: "PJREN",
        regForceSet: false
    }
];
config GPIO_MSP430FR5738_34_30_28_24_20.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5738_34_30_28_24_20.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5738_34_30_28_24_20.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5738_34_30_28_24_20.create(CS.Instance clock, params);
// Create an instance-object
GPIO_MSP430FR5738_34_30_28_24_20.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430FR5738_34_30_28_24_20.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430FR5738_34_30_28_24_20.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430FR5738_34_30_28_24_20.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430FR5738_34_30_28_24_20.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430FR5738_34_30_28_24_20.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:50 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5739_35_31_29_25_21

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5739_35_31_29_25_21
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430FR5739_35_31_29_25_21.xdc
var GPIO_MSP430FR5739_35_31_29_25_21 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5739_35_31_29_25_21');
module-wide constants & types
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT0_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT0;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit1_t//
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT1_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT1;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit2_t//
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT2_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT2;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit3_t//
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT3_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT3;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit4_t//
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT4_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT4;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit5_t//
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT5_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT5;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit6_t//
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT6_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT6;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit7_t//
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT7_OFF;
        const GPIO_MSP430FR5739_35_31_29_25_21.BIT7;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430FR5739_35_31_29_25_21.IE_OFF// Disabled;
        const GPIO_MSP430FR5739_35_31_29_25_21.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430FR5739_35_31_29_25_21.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.OutputState_t// Output high or low drop down list
        const GPIO_MSP430FR5739_35_31_29_25_21.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430FR5739_35_31_29_25_21.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430FR5739_35_31_29_25_21.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430FR5739_35_31_29_25_21.PUDRE_OFF// Disabled;
        const GPIO_MSP430FR5739_35_31_29_25_21.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430FR5739_35_31_29_25_21.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5739_35_31_29_25_21.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5739_35_31_29_25_21.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL0// Port 1 Port Select Register 0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL1// Port 1 Port Select Register 1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL0// Port 2 Port Select Register 0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL1// Port 2 Port Select Register 1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL0// Port 3 Port Select Register 0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL1// Port 3 Port Select Register 1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL0// Port 4 Port Select Register 0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL1// Port 4 Port Select Register 1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJDIR// Port J Direction Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJOUT// Port J Output Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJREN// Port J Resistor Enable Register = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL0// Port J Port Select Register 0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL1// Port J Port Select Register 1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunctionSetting_t[8][5] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total = GPIO_MSP430FR5739_35_31_29_25_21.DevicePin_t[8][5] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430FR5739_35_31_29_25_21.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL0",
                regForceSet: false
            },
            {
                register: "P1SEL1",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL0",
                regForceSet: false
            },
            {
                register: "P2SEL1",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL0",
                regForceSet: false
            },
            {
                register: "P3SEL1",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P3IES",
                regForceSet: true
            },
            {
                register: "P3IFG",
                regForceSet: true
            },
            {
                register: "P3IE",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL0",
                regForceSet: false
            },
            {
                register: "P4SEL1",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P4IES",
                regForceSet: true
            },
            {
                register: "P4IFG",
                regForceSet: true
            },
            {
                register: "P4IE",
                regForceSet: false
            },
            {
                register: "PJOUT",
                regForceSet: true
            },
            {
                register: "PJSEL0",
                regForceSet: false
            },
            {
                register: "PJSEL1",
                regForceSet: false
            },
            {
                register: "PJDIR",
                regForceSet: true
            },
            {
                register: "PJREN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5739_35_31_29_25_21.create// Create an instance-object(CS.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit0_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT0_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT0;
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit1_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT1_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT1;
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit2_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT2_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT2;
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit3_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT3_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT3;
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit4_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT4_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT4;
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit5_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT5_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT5;
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit6_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT6_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT6;
enum GPIO_MSP430FR5739_35_31_29_25_21.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.Bit7_t
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT7_OFF;
    const GPIO_MSP430FR5739_35_31_29_25_21.BIT7;
enum GPIO_MSP430FR5739_35_31_29_25_21.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.InterruptEnable_t
    const GPIO_MSP430FR5739_35_31_29_25_21.IE_OFF;
    // Disabled
    const GPIO_MSP430FR5739_35_31_29_25_21.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430FR5739_35_31_29_25_21.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430FR5739_35_31_29_25_21.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.OutputState_t
    const GPIO_MSP430FR5739_35_31_29_25_21.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430FR5739_35_31_29_25_21.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430FR5739_35_31_29_25_21.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430FR5739_35_31_29_25_21.ResEnable_t
    const GPIO_MSP430FR5739_35_31_29_25_21.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430FR5739_35_31_29_25_21.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430FR5739_35_31_29_25_21.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430FR5739_35_31_29_25_21.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430FR5739_35_31_29_25_21.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430FR5739_35_31_29_25_21.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430FR5739_35_31_29_25_21.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430FR5739_35_31_29_25_21.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5739_35_31_29_25_21.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5739_35_31_29_25_21.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5739_35_31_29_25_21.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5739_35_31_29_25_21.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 1 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 1 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 2 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 2 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 3 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 3 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 4 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port 4 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJDIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    // Port J Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJOUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    // Port J Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJREN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    // Port J Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port J Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    // Port J Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunctionSetting_t[8][5] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430FR5739_35_31_29_25_21.DevicePin_t[8][5] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430FR5739_35_31_29_25_21.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL0",
            regForceSet: false
        },
        {
            register: "P1SEL1",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL0",
            regForceSet: false
        },
        {
            register: "P2SEL1",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL0",
            regForceSet: false
        },
        {
            register: "P3SEL1",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P3IES",
            regForceSet: true
        },
        {
            register: "P3IFG",
            regForceSet: true
        },
        {
            register: "P3IE",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL0",
            regForceSet: false
        },
        {
            register: "P4SEL1",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P4IES",
            regForceSet: true
        },
        {
            register: "P4IFG",
            regForceSet: true
        },
        {
            register: "P4IE",
            regForceSet: false
        },
        {
            register: "PJOUT",
            regForceSet: true
        },
        {
            register: "PJSEL0",
            regForceSet: false
        },
        {
            register: "PJSEL1",
            regForceSet: false
        },
        {
            register: "PJDIR",
            regForceSet: true
        },
        {
            register: "PJREN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1SEL0 // instance
index URL

Port 1 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P1SEL1 // instance
index URL

Port 1 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P1SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2SEL0 // instance
index URL

Port 2 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P2SEL1 // instance
index URL

Port 2 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P2SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3SEL0 // instance
index URL

Port 3 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P3SEL1 // instance
index URL

Port 3 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P3SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4DIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4OUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4REN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4SEL0 // instance
index URL

Port 4 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4SEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.P4SEL1 // instance
index URL

Port 4 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.P4SEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.PJDIR // instance
index URL

Port J Direction Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.PJDIR = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.PJOUT // instance
index URL

Port J Output Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.PJOUT = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.PJREN // instance
index URL

Port J Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.PJREN = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.PJSEL0 // instance
index URL

Port J Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.PJSEL0 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.PJSEL1 // instance
index URL

Port J Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.PJSEL1 = GPIO_MSP430FR5739_35_31_29_25_21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR5739_35_31_29_25_21.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.devicePinSetting = GPIO_MSP430FR5739_35_31_29_25_21.DevicePinFunctionSetting_t[8][5] undefined;
config GPIO_MSP430FR5739_35_31_29_25_21.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.devicePins = GPIO_MSP430FR5739_35_31_29_25_21.DevicePin_t[8][5] undefined;
config GPIO_MSP430FR5739_35_31_29_25_21.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430FR5739_35_31_29_25_21.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL0",
        regForceSet: false
    },
    {
        register: "P1SEL1",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL0",
        regForceSet: false
    },
    {
        register: "P2SEL1",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL0",
        regForceSet: false
    },
    {
        register: "P3SEL1",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P3IES",
        regForceSet: true
    },
    {
        register: "P3IFG",
        regForceSet: true
    },
    {
        register: "P3IE",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL0",
        regForceSet: false
    },
    {
        register: "P4SEL1",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P4IES",
        regForceSet: true
    },
    {
        register: "P4IFG",
        regForceSet: true
    },
    {
        register: "P4IE",
        regForceSet: false
    },
    {
        register: "PJOUT",
        regForceSet: true
    },
    {
        register: "PJSEL0",
        regForceSet: false
    },
    {
        register: "PJSEL1",
        regForceSet: false
    },
    {
        register: "PJDIR",
        regForceSet: true
    },
    {
        register: "PJREN",
        regForceSet: false
    }
];
config GPIO_MSP430FR5739_35_31_29_25_21.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5739_35_31_29_25_21.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5739_35_31_29_25_21.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5739_35_31_29_25_21.create(CS.Instance clock, params);
// Create an instance-object
GPIO_MSP430FR5739_35_31_29_25_21.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430FR5739_35_31_29_25_21.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430FR5739_35_31_29_25_21.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430FR5739_35_31_29_25_21.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430FR5739_35_31_29_25_21.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430FR5739_35_31_29_25_21.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:50 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR59xx_FR58xx

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR59xx_FR58xx
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430FR59xx_FR58xx.xdc
var GPIO_MSP430FR59xx_FR58xx = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR59xx_FR58xx');
module-wide constants & types
    values of type GPIO_MSP430FR59xx_FR58xx.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430FR59xx_FR58xx.BIT0_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT0;
    values of type GPIO_MSP430FR59xx_FR58xx.Bit1_t//
        const GPIO_MSP430FR59xx_FR58xx.BIT1_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT1;
    values of type GPIO_MSP430FR59xx_FR58xx.Bit2_t//
        const GPIO_MSP430FR59xx_FR58xx.BIT2_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT2;
    values of type GPIO_MSP430FR59xx_FR58xx.Bit3_t//
        const GPIO_MSP430FR59xx_FR58xx.BIT3_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT3;
    values of type GPIO_MSP430FR59xx_FR58xx.Bit4_t//
        const GPIO_MSP430FR59xx_FR58xx.BIT4_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT4;
    values of type GPIO_MSP430FR59xx_FR58xx.Bit5_t//
        const GPIO_MSP430FR59xx_FR58xx.BIT5_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT5;
    values of type GPIO_MSP430FR59xx_FR58xx.Bit6_t//
        const GPIO_MSP430FR59xx_FR58xx.BIT6_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT6;
    values of type GPIO_MSP430FR59xx_FR58xx.Bit7_t//
        const GPIO_MSP430FR59xx_FR58xx.BIT7_OFF;
        const GPIO_MSP430FR59xx_FR58xx.BIT7;
    values of type GPIO_MSP430FR59xx_FR58xx.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430FR59xx_FR58xx.IE_OFF// Disabled;
        const GPIO_MSP430FR59xx_FR58xx.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430FR59xx_FR58xx.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430FR59xx_FR58xx.OutputState_t// Output high or low drop down list
        const GPIO_MSP430FR59xx_FR58xx.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430FR59xx_FR58xx.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430FR59xx_FR58xx.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430FR59xx_FR58xx.PUDRE_OFF// Disabled;
        const GPIO_MSP430FR59xx_FR58xx.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430FR59xx_FR58xx.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430FR59xx_FR58xx.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430FR59xx_FR58xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR59xx_FR58xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR59xx_FR58xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR59xx_FR58xx.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL0// Port 1 Port Select Register 0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL1// Port 1 Port Select Register 1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL0// Port 2 Port Select Register 0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL1// Port 2 Port Select Register 1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL0// Port 3 Port Select Register 0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL1// Port 3 Port Select Register 1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL0// Port 4 Port Select Register 0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL1// Port 4 Port Select Register 1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJDIR// Port J Direction Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJOUT// Port J Output Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJREN// Port J Resistor Enable Register = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL0// Port J Port Select Register 0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.PJSEL1// Port J Port Select Register 1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430FR59xx_FR58xx.DevicePinFunctionSetting_t[8][5] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total = GPIO_MSP430FR59xx_FR58xx.DevicePin_t[8][5] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430FR59xx_FR58xx.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL0",
                regForceSet: false
            },
            {
                register: "P1SEL1",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL0",
                regForceSet: false
            },
            {
                register: "P2SEL1",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL0",
                regForceSet: false
            },
            {
                register: "P3SEL1",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P3IES",
                regForceSet: true
            },
            {
                register: "P3IFG",
                regForceSet: true
            },
            {
                register: "P3IE",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL0",
                regForceSet: false
            },
            {
                register: "P4SEL1",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            },
            {
                register: "P4IES",
                regForceSet: true
            },
            {
                register: "P4IFG",
                regForceSet: true
            },
            {
                register: "P4IE",
                regForceSet: false
            },
            {
                register: "PJOUT",
                regForceSet: true
            },
            {
                register: "PJSEL0",
                regForceSet: false
            },
            {
                register: "PJSEL1",
                regForceSet: false
            },
            {
                register: "PJDIR",
                regForceSet: true
            },
            {
                register: "PJREN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR59xx_FR58xx.create// Create an instance-object(CS_A.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430FR59xx_FR58xx.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit0_t
    const GPIO_MSP430FR59xx_FR58xx.BIT0_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT0;
enum GPIO_MSP430FR59xx_FR58xx.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit1_t
    const GPIO_MSP430FR59xx_FR58xx.BIT1_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT1;
enum GPIO_MSP430FR59xx_FR58xx.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit2_t
    const GPIO_MSP430FR59xx_FR58xx.BIT2_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT2;
enum GPIO_MSP430FR59xx_FR58xx.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit3_t
    const GPIO_MSP430FR59xx_FR58xx.BIT3_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT3;
enum GPIO_MSP430FR59xx_FR58xx.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit4_t
    const GPIO_MSP430FR59xx_FR58xx.BIT4_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT4;
enum GPIO_MSP430FR59xx_FR58xx.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit5_t
    const GPIO_MSP430FR59xx_FR58xx.BIT5_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT5;
enum GPIO_MSP430FR59xx_FR58xx.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit6_t
    const GPIO_MSP430FR59xx_FR58xx.BIT6_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT6;
enum GPIO_MSP430FR59xx_FR58xx.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.Bit7_t
    const GPIO_MSP430FR59xx_FR58xx.BIT7_OFF;
    const GPIO_MSP430FR59xx_FR58xx.BIT7;
enum GPIO_MSP430FR59xx_FR58xx.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.InterruptEnable_t
    const GPIO_MSP430FR59xx_FR58xx.IE_OFF;
    // Disabled
    const GPIO_MSP430FR59xx_FR58xx.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430FR59xx_FR58xx.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430FR59xx_FR58xx.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.OutputState_t
    const GPIO_MSP430FR59xx_FR58xx.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430FR59xx_FR58xx.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430FR59xx_FR58xx.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430FR59xx_FR58xx.ResEnable_t
    const GPIO_MSP430FR59xx_FR58xx.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430FR59xx_FR58xx.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430FR59xx_FR58xx.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430FR59xx_FR58xx.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430FR59xx_FR58xx.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430FR59xx_FR58xx.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430FR59xx_FR58xx.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430FR59xx_FR58xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430FR59xx_FR58xx.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430FR59xx_FR58xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR59xx_FR58xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR59xx_FR58xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR59xx_FR58xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR59xx_FR58xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 1 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 1 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 2 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 2 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 3 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 3 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 4 Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port 4 Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJDIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    // Port J Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJOUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    // Port J Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJREN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    // Port J Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port J Port Select Register 0
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.PJSEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    // Port J Port Select Register 1
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430FR59xx_FR58xx.DevicePinFunctionSetting_t[8][5] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430FR59xx_FR58xx.DevicePin_t[8][5] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430FR59xx_FR58xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL0",
            regForceSet: false
        },
        {
            register: "P1SEL1",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL0",
            regForceSet: false
        },
        {
            register: "P2SEL1",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL0",
            regForceSet: false
        },
        {
            register: "P3SEL1",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P3IES",
            regForceSet: true
        },
        {
            register: "P3IFG",
            regForceSet: true
        },
        {
            register: "P3IE",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL0",
            regForceSet: false
        },
        {
            register: "P4SEL1",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        },
        {
            register: "P4IES",
            regForceSet: true
        },
        {
            register: "P4IFG",
            regForceSet: true
        },
        {
            register: "P4IE",
            regForceSet: false
        },
        {
            register: "PJOUT",
            regForceSet: true
        },
        {
            register: "PJSEL0",
            regForceSet: false
        },
        {
            register: "PJSEL1",
            regForceSet: false
        },
        {
            register: "PJDIR",
            regForceSet: true
        },
        {
            register: "PJREN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR59xx_FR58xx.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P1SEL0 // instance
index URL

Port 1 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P1SEL1 // instance
index URL

Port 1 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P1SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2SEL0 // instance
index URL

Port 2 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P2SEL1 // instance
index URL

Port 2 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P2SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3SEL0 // instance
index URL

Port 3 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P3SEL1 // instance
index URL

Port 3 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P3SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4DIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4OUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4REN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4SEL0 // instance
index URL

Port 4 Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4SEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.P4SEL1 // instance
index URL

Port 4 Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.P4SEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.PJDIR // instance
index URL

Port J Direction Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.PJDIR = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.PJOUT // instance
index URL

Port J Output Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.PJOUT = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.PJREN // instance
index URL

Port J Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.PJREN = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.PJSEL0 // instance
index URL

Port J Port Select Register 0

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.PJSEL0 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.PJSEL1 // instance
index URL

Port J Port Select Register 1

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.PJSEL1 = GPIO_MSP430FR59xx_FR58xx.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430FR59xx_FR58xx.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.devicePinSetting = GPIO_MSP430FR59xx_FR58xx.DevicePinFunctionSetting_t[8][5] undefined;
config GPIO_MSP430FR59xx_FR58xx.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430FR57xx device, there are 5 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.devicePins = GPIO_MSP430FR59xx_FR58xx.DevicePin_t[8][5] undefined;
config GPIO_MSP430FR59xx_FR58xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430FR59xx_FR58xx.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL0",
        regForceSet: false
    },
    {
        register: "P1SEL1",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL0",
        regForceSet: false
    },
    {
        register: "P2SEL1",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL0",
        regForceSet: false
    },
    {
        register: "P3SEL1",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P3IES",
        regForceSet: true
    },
    {
        register: "P3IFG",
        regForceSet: true
    },
    {
        register: "P3IE",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL0",
        regForceSet: false
    },
    {
        register: "P4SEL1",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    },
    {
        register: "P4IES",
        regForceSet: true
    },
    {
        register: "P4IFG",
        regForceSet: true
    },
    {
        register: "P4IE",
        regForceSet: false
    },
    {
        register: "PJOUT",
        regForceSet: true
    },
    {
        register: "PJSEL0",
        regForceSet: false
    },
    {
        register: "PJSEL1",
        regForceSet: false
    },
    {
        register: "PJDIR",
        regForceSet: true
    },
    {
        register: "PJREN",
        regForceSet: false
    }
];
config GPIO_MSP430FR59xx_FR58xx.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR59xx_FR58xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR59xx_FR58xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR59xx_FR58xx.create(CS_A.Instance clock, params);
// Create an instance-object
GPIO_MSP430FR59xx_FR58xx.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430FR59xx_FR58xx.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430FR59xx_FR58xx.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430FR59xx_FR58xx.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430FR59xx_FR58xx.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430FR59xx_FR58xx.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:51 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2210

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2210
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2210.xdc
var GPIO_MSP430G2210 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2210');
module-wide constants & types
    values of type GPIO_MSP430G2210.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2210.BIT0_OFF;
        const GPIO_MSP430G2210.BIT0;
    values of type GPIO_MSP430G2210.Bit1_t//
        const GPIO_MSP430G2210.BIT1_OFF;
        const GPIO_MSP430G2210.BIT1;
    values of type GPIO_MSP430G2210.Bit2_t//
        const GPIO_MSP430G2210.BIT2_OFF;
        const GPIO_MSP430G2210.BIT2;
    values of type GPIO_MSP430G2210.Bit3_t//
        const GPIO_MSP430G2210.BIT3_OFF;
        const GPIO_MSP430G2210.BIT3;
    values of type GPIO_MSP430G2210.Bit4_t//
        const GPIO_MSP430G2210.BIT4_OFF;
        const GPIO_MSP430G2210.BIT4;
    values of type GPIO_MSP430G2210.Bit5_t//
        const GPIO_MSP430G2210.BIT5_OFF;
        const GPIO_MSP430G2210.BIT5;
    values of type GPIO_MSP430G2210.Bit6_t//
        const GPIO_MSP430G2210.BIT6_OFF;
        const GPIO_MSP430G2210.BIT6;
    values of type GPIO_MSP430G2210.Bit7_t//
        const GPIO_MSP430G2210.BIT7_OFF;
        const GPIO_MSP430G2210.BIT7;
    values of type GPIO_MSP430G2210.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2210.IE_OFF// Disabled;
        const GPIO_MSP430G2210.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2210.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2210.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2210.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2210.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2210.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2210.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2210.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2210.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2210.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2210.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2210.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2210.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2210.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2210.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2210.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2210.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2210.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2210.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2210.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2210.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2210.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2210.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2210.DevicePinFunctionSetting_t[8][1] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2210 device, there are 8 + 1 = 8 pins total = GPIO_MSP430G2210.DevicePin_t[8][1] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2210.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2210.create// Create an instance-object(IComparator.Instance comparator, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2210.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2210.Bit0_t
    const GPIO_MSP430G2210.BIT0_OFF;
    const GPIO_MSP430G2210.BIT0;
enum GPIO_MSP430G2210.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2210.Bit1_t
    const GPIO_MSP430G2210.BIT1_OFF;
    const GPIO_MSP430G2210.BIT1;
enum GPIO_MSP430G2210.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2210.Bit2_t
    const GPIO_MSP430G2210.BIT2_OFF;
    const GPIO_MSP430G2210.BIT2;
enum GPIO_MSP430G2210.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2210.Bit3_t
    const GPIO_MSP430G2210.BIT3_OFF;
    const GPIO_MSP430G2210.BIT3;
enum GPIO_MSP430G2210.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2210.Bit4_t
    const GPIO_MSP430G2210.BIT4_OFF;
    const GPIO_MSP430G2210.BIT4;
enum GPIO_MSP430G2210.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2210.Bit5_t
    const GPIO_MSP430G2210.BIT5_OFF;
    const GPIO_MSP430G2210.BIT5;
enum GPIO_MSP430G2210.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2210.Bit6_t
    const GPIO_MSP430G2210.BIT6_OFF;
    const GPIO_MSP430G2210.BIT6;
enum GPIO_MSP430G2210.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2210.Bit7_t
    const GPIO_MSP430G2210.BIT7_OFF;
    const GPIO_MSP430G2210.BIT7;
enum GPIO_MSP430G2210.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2210.InterruptEnable_t
    const GPIO_MSP430G2210.IE_OFF;
    // Disabled
    const GPIO_MSP430G2210.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2210.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2210.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2210.OutputState_t
    const GPIO_MSP430G2210.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2210.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2210.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2210.ResEnable_t
    const GPIO_MSP430G2210.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2210.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2210.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2210.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2210.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2210.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2210.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2210.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2210.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2210.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2210.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2210.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2210.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2210.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2210.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2210.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2210.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2210.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2210.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2210.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2210.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2210.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2210.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2210.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2210.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2210.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2210.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2210.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2210.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2210.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2210.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2210.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2210.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2210.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2210.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2210.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2210.DevicePinFunctionSetting_t[8][1] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2210.DevicePin_t[8][1] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2210 device, there are 8 + 1 = 8 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2210.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2210.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P1DIR = GPIO_MSP430G2210.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P1OUT = GPIO_MSP430G2210.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P1REN = GPIO_MSP430G2210.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P1SEL = GPIO_MSP430G2210.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2210.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.devicePinSetting = GPIO_MSP430G2210.DevicePinFunctionSetting_t[8][1] undefined;
config GPIO_MSP430G2210.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2210 device, there are 8 + 1 = 8 pins total

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.devicePins = GPIO_MSP430G2210.DevicePin_t[8][1] undefined;
config GPIO_MSP430G2210.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2210.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2210.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2210.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2210.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2210.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2210.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2210.create(IComparator.Instance comparator, params);
// Create an instance-object
GPIO_MSP430G2210.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2210.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2210.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2210.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2210.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2210.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:52 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2230

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2230
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2230.xdc
var GPIO_MSP430G2230 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2230');
module-wide constants & types
    values of type GPIO_MSP430G2230.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2230.BIT0_OFF;
        const GPIO_MSP430G2230.BIT0;
    values of type GPIO_MSP430G2230.Bit1_t//
        const GPIO_MSP430G2230.BIT1_OFF;
        const GPIO_MSP430G2230.BIT1;
    values of type GPIO_MSP430G2230.Bit2_t//
        const GPIO_MSP430G2230.BIT2_OFF;
        const GPIO_MSP430G2230.BIT2;
    values of type GPIO_MSP430G2230.Bit3_t//
        const GPIO_MSP430G2230.BIT3_OFF;
        const GPIO_MSP430G2230.BIT3;
    values of type GPIO_MSP430G2230.Bit4_t//
        const GPIO_MSP430G2230.BIT4_OFF;
        const GPIO_MSP430G2230.BIT4;
    values of type GPIO_MSP430G2230.Bit5_t//
        const GPIO_MSP430G2230.BIT5_OFF;
        const GPIO_MSP430G2230.BIT5;
    values of type GPIO_MSP430G2230.Bit6_t//
        const GPIO_MSP430G2230.BIT6_OFF;
        const GPIO_MSP430G2230.BIT6;
    values of type GPIO_MSP430G2230.Bit7_t//
        const GPIO_MSP430G2230.BIT7_OFF;
        const GPIO_MSP430G2230.BIT7;
    values of type GPIO_MSP430G2230.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2230.IE_OFF// Disabled;
        const GPIO_MSP430G2230.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2230.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2230.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2230.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2230.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2230.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2230.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2230.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2230.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2230.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2230.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2230.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2230.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2230.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2230.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2230.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2230.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2230.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2230.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2230.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2230.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2230.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2230.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2230.DevicePinFunctionSetting_t[8][1] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2230 device, there are 8 + 1 = 8 pins total = GPIO_MSP430G2230.DevicePin_t[8][1] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2230.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2230.create// Create an instance-object(USI.Instance usi, ADC10.Instance adc10, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2230.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2230.Bit0_t
    const GPIO_MSP430G2230.BIT0_OFF;
    const GPIO_MSP430G2230.BIT0;
enum GPIO_MSP430G2230.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2230.Bit1_t
    const GPIO_MSP430G2230.BIT1_OFF;
    const GPIO_MSP430G2230.BIT1;
enum GPIO_MSP430G2230.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2230.Bit2_t
    const GPIO_MSP430G2230.BIT2_OFF;
    const GPIO_MSP430G2230.BIT2;
enum GPIO_MSP430G2230.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2230.Bit3_t
    const GPIO_MSP430G2230.BIT3_OFF;
    const GPIO_MSP430G2230.BIT3;
enum GPIO_MSP430G2230.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2230.Bit4_t
    const GPIO_MSP430G2230.BIT4_OFF;
    const GPIO_MSP430G2230.BIT4;
enum GPIO_MSP430G2230.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2230.Bit5_t
    const GPIO_MSP430G2230.BIT5_OFF;
    const GPIO_MSP430G2230.BIT5;
enum GPIO_MSP430G2230.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2230.Bit6_t
    const GPIO_MSP430G2230.BIT6_OFF;
    const GPIO_MSP430G2230.BIT6;
enum GPIO_MSP430G2230.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2230.Bit7_t
    const GPIO_MSP430G2230.BIT7_OFF;
    const GPIO_MSP430G2230.BIT7;
enum GPIO_MSP430G2230.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2230.InterruptEnable_t
    const GPIO_MSP430G2230.IE_OFF;
    // Disabled
    const GPIO_MSP430G2230.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2230.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2230.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2230.OutputState_t
    const GPIO_MSP430G2230.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2230.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2230.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2230.ResEnable_t
    const GPIO_MSP430G2230.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2230.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2230.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2230.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2230.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2230.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2230.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2230.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2230.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2230.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2230.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2230.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2230.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2230.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2230.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2230.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2230.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2230.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2230.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2230.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2230.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2230.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2230.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2230.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2230.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2230.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2230.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2230.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2230.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2230.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2230.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2230.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2230.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2230.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2230.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2230.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2230.DevicePinFunctionSetting_t[8][1] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2230.DevicePin_t[8][1] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2230 device, there are 8 + 1 = 8 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2230.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2230.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P1DIR = GPIO_MSP430G2230.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P1OUT = GPIO_MSP430G2230.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P1REN = GPIO_MSP430G2230.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P1SEL = GPIO_MSP430G2230.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2230.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.devicePinSetting = GPIO_MSP430G2230.DevicePinFunctionSetting_t[8][1] undefined;
config GPIO_MSP430G2230.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2230 device, there are 8 + 1 = 8 pins total

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.devicePins = GPIO_MSP430G2230.DevicePin_t[8][1] undefined;
config GPIO_MSP430G2230.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2230.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2230.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2230.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2230.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2230.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2230.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2230.create(USI.Instance usi, ADC10.Instance adc10, params);
// Create an instance-object
GPIO_MSP430G2230.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2230.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2230.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2230.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2230.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2230.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:52 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x01

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x01
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x01.xdc
var GPIO_MSP430G2x01 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x01');
module-wide constants & types
    values of type GPIO_MSP430G2x01.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x01.BIT0_OFF;
        const GPIO_MSP430G2x01.BIT0;
    values of type GPIO_MSP430G2x01.Bit1_t//
        const GPIO_MSP430G2x01.BIT1_OFF;
        const GPIO_MSP430G2x01.BIT1;
    values of type GPIO_MSP430G2x01.Bit2_t//
        const GPIO_MSP430G2x01.BIT2_OFF;
        const GPIO_MSP430G2x01.BIT2;
    values of type GPIO_MSP430G2x01.Bit3_t//
        const GPIO_MSP430G2x01.BIT3_OFF;
        const GPIO_MSP430G2x01.BIT3;
    values of type GPIO_MSP430G2x01.Bit4_t//
        const GPIO_MSP430G2x01.BIT4_OFF;
        const GPIO_MSP430G2x01.BIT4;
    values of type GPIO_MSP430G2x01.Bit5_t//
        const GPIO_MSP430G2x01.BIT5_OFF;
        const GPIO_MSP430G2x01.BIT5;
    values of type GPIO_MSP430G2x01.Bit6_t//
        const GPIO_MSP430G2x01.BIT6_OFF;
        const GPIO_MSP430G2x01.BIT6;
    values of type GPIO_MSP430G2x01.Bit7_t//
        const GPIO_MSP430G2x01.BIT7_OFF;
        const GPIO_MSP430G2x01.BIT7;
    values of type GPIO_MSP430G2x01.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x01.IE_OFF// Disabled;
        const GPIO_MSP430G2x01.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x01.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x01.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x01.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x01.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x01.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x01.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x01.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x01.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x01.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x01.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x01.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x01.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x01.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x01.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x01.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x01.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x01.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x01.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x01.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x01.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x01.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x01.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x01.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x01.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x01.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x01.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x01.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x01 device, there are 8 + 2 = 10 pins total = GPIO_MSP430G2x01.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x01.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x01.create// Create an instance-object(params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x01.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x01.Bit0_t
    const GPIO_MSP430G2x01.BIT0_OFF;
    const GPIO_MSP430G2x01.BIT0;
enum GPIO_MSP430G2x01.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x01.Bit1_t
    const GPIO_MSP430G2x01.BIT1_OFF;
    const GPIO_MSP430G2x01.BIT1;
enum GPIO_MSP430G2x01.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x01.Bit2_t
    const GPIO_MSP430G2x01.BIT2_OFF;
    const GPIO_MSP430G2x01.BIT2;
enum GPIO_MSP430G2x01.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x01.Bit3_t
    const GPIO_MSP430G2x01.BIT3_OFF;
    const GPIO_MSP430G2x01.BIT3;
enum GPIO_MSP430G2x01.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x01.Bit4_t
    const GPIO_MSP430G2x01.BIT4_OFF;
    const GPIO_MSP430G2x01.BIT4;
enum GPIO_MSP430G2x01.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x01.Bit5_t
    const GPIO_MSP430G2x01.BIT5_OFF;
    const GPIO_MSP430G2x01.BIT5;
enum GPIO_MSP430G2x01.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x01.Bit6_t
    const GPIO_MSP430G2x01.BIT6_OFF;
    const GPIO_MSP430G2x01.BIT6;
enum GPIO_MSP430G2x01.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x01.Bit7_t
    const GPIO_MSP430G2x01.BIT7_OFF;
    const GPIO_MSP430G2x01.BIT7;
enum GPIO_MSP430G2x01.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x01.InterruptEnable_t
    const GPIO_MSP430G2x01.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x01.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x01.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x01.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x01.OutputState_t
    const GPIO_MSP430G2x01.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x01.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x01.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x01.ResEnable_t
    const GPIO_MSP430G2x01.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x01.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x01.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x01.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x01.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x01.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x01.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x01.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x01.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x01.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x01.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x01.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x01.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x01.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x01.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x01.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x01.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x01.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x01.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x01.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x01.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x01.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x01.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x01.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x01.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x01.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x01.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x01.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x01.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x01.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x01.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x01.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x01.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x01.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x01.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x01.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x01.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x01.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x01.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x01.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x01.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x01 device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x01.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x01.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P1DIR = GPIO_MSP430G2x01.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P1OUT = GPIO_MSP430G2x01.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P1REN = GPIO_MSP430G2x01.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P1SEL = GPIO_MSP430G2x01.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P2DIR = GPIO_MSP430G2x01.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P2OUT = GPIO_MSP430G2x01.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P2REN = GPIO_MSP430G2x01.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P2SEL = GPIO_MSP430G2x01.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x01.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x01.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.devicePinSetting = GPIO_MSP430G2x01.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x01.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x01 device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.devicePins = GPIO_MSP430G2x01.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x01.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x01.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x01.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x01.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x01.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x01.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x01.create(params);
// Create an instance-object
GPIO_MSP430G2x01.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x01.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x01.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x01.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x01.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x01.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:52 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x02

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x02
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x02.xdc
var GPIO_MSP430G2x02 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x02');
module-wide constants & types
    values of type GPIO_MSP430G2x02.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x02.BIT0_OFF;
        const GPIO_MSP430G2x02.BIT0;
    values of type GPIO_MSP430G2x02.Bit1_t//
        const GPIO_MSP430G2x02.BIT1_OFF;
        const GPIO_MSP430G2x02.BIT1;
    values of type GPIO_MSP430G2x02.Bit2_t//
        const GPIO_MSP430G2x02.BIT2_OFF;
        const GPIO_MSP430G2x02.BIT2;
    values of type GPIO_MSP430G2x02.Bit3_t//
        const GPIO_MSP430G2x02.BIT3_OFF;
        const GPIO_MSP430G2x02.BIT3;
    values of type GPIO_MSP430G2x02.Bit4_t//
        const GPIO_MSP430G2x02.BIT4_OFF;
        const GPIO_MSP430G2x02.BIT4;
    values of type GPIO_MSP430G2x02.Bit5_t//
        const GPIO_MSP430G2x02.BIT5_OFF;
        const GPIO_MSP430G2x02.BIT5;
    values of type GPIO_MSP430G2x02.Bit6_t//
        const GPIO_MSP430G2x02.BIT6_OFF;
        const GPIO_MSP430G2x02.BIT6;
    values of type GPIO_MSP430G2x02.Bit7_t//
        const GPIO_MSP430G2x02.BIT7_OFF;
        const GPIO_MSP430G2x02.BIT7;
    values of type GPIO_MSP430G2x02.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x02.IE_OFF// Disabled;
        const GPIO_MSP430G2x02.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x02.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x02.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x02.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x02.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x02.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x02.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x02.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x02.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x02.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x02.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x02.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x02.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x02.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x02.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x02.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x02.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x02.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x02.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x02.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x02.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x02.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x02.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x02.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x02.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x02.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x02.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x02.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x02.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x02.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x02 device, there are 8 + 8 = 16 pins total = GPIO_MSP430G2x02.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x02.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x02.create// Create an instance-object(USI.Instance usi, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x02.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x02.Bit0_t
    const GPIO_MSP430G2x02.BIT0_OFF;
    const GPIO_MSP430G2x02.BIT0;
enum GPIO_MSP430G2x02.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x02.Bit1_t
    const GPIO_MSP430G2x02.BIT1_OFF;
    const GPIO_MSP430G2x02.BIT1;
enum GPIO_MSP430G2x02.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x02.Bit2_t
    const GPIO_MSP430G2x02.BIT2_OFF;
    const GPIO_MSP430G2x02.BIT2;
enum GPIO_MSP430G2x02.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x02.Bit3_t
    const GPIO_MSP430G2x02.BIT3_OFF;
    const GPIO_MSP430G2x02.BIT3;
enum GPIO_MSP430G2x02.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x02.Bit4_t
    const GPIO_MSP430G2x02.BIT4_OFF;
    const GPIO_MSP430G2x02.BIT4;
enum GPIO_MSP430G2x02.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x02.Bit5_t
    const GPIO_MSP430G2x02.BIT5_OFF;
    const GPIO_MSP430G2x02.BIT5;
enum GPIO_MSP430G2x02.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x02.Bit6_t
    const GPIO_MSP430G2x02.BIT6_OFF;
    const GPIO_MSP430G2x02.BIT6;
enum GPIO_MSP430G2x02.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x02.Bit7_t
    const GPIO_MSP430G2x02.BIT7_OFF;
    const GPIO_MSP430G2x02.BIT7;
enum GPIO_MSP430G2x02.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x02.InterruptEnable_t
    const GPIO_MSP430G2x02.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x02.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x02.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x02.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x02.OutputState_t
    const GPIO_MSP430G2x02.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x02.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x02.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x02.ResEnable_t
    const GPIO_MSP430G2x02.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x02.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x02.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x02.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x02.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x02.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x02.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x02.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x02.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x02.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x02.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x02.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x02.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x02.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x02.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x02.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x02.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x02.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x02.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x02.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x02.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x02.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x02.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x02.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x02.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x02.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x02.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x02.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x02.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x02.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x02.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x02.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x02.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x02.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x02.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x02.GpioBits8PxSel2_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x02.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x02.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x02.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x02.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x02.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x02.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x02.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x02 device, there are 8 + 8 = 16 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x02.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x02.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1DIR = GPIO_MSP430G2x02.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1OUT = GPIO_MSP430G2x02.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1REN = GPIO_MSP430G2x02.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1SEL = GPIO_MSP430G2x02.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P1SEL2 = GPIO_MSP430G2x02.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2DIR = GPIO_MSP430G2x02.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2OUT = GPIO_MSP430G2x02.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2REN = GPIO_MSP430G2x02.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2SEL = GPIO_MSP430G2x02.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x02.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P2SEL2 = GPIO_MSP430G2x02.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x02.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.devicePinSetting = GPIO_MSP430G2x02.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x02.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x02 device, there are 8 + 8 = 16 pins total

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.devicePins = GPIO_MSP430G2x02.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x02.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x02.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x02.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x02.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x02.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x02.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x02.create(USI.Instance usi, params);
// Create an instance-object
GPIO_MSP430G2x02.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x02.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x02.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x02.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x02.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x02.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:53 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x03

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x03
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x03.xdc
var GPIO_MSP430G2x03 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x03');
module-wide constants & types
    values of type GPIO_MSP430G2x03.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x03.BIT0_OFF;
        const GPIO_MSP430G2x03.BIT0;
    values of type GPIO_MSP430G2x03.Bit1_t//
        const GPIO_MSP430G2x03.BIT1_OFF;
        const GPIO_MSP430G2x03.BIT1;
    values of type GPIO_MSP430G2x03.Bit2_t//
        const GPIO_MSP430G2x03.BIT2_OFF;
        const GPIO_MSP430G2x03.BIT2;
    values of type GPIO_MSP430G2x03.Bit3_t//
        const GPIO_MSP430G2x03.BIT3_OFF;
        const GPIO_MSP430G2x03.BIT3;
    values of type GPIO_MSP430G2x03.Bit4_t//
        const GPIO_MSP430G2x03.BIT4_OFF;
        const GPIO_MSP430G2x03.BIT4;
    values of type GPIO_MSP430G2x03.Bit5_t//
        const GPIO_MSP430G2x03.BIT5_OFF;
        const GPIO_MSP430G2x03.BIT5;
    values of type GPIO_MSP430G2x03.Bit6_t//
        const GPIO_MSP430G2x03.BIT6_OFF;
        const GPIO_MSP430G2x03.BIT6;
    values of type GPIO_MSP430G2x03.Bit7_t//
        const GPIO_MSP430G2x03.BIT7_OFF;
        const GPIO_MSP430G2x03.BIT7;
    values of type GPIO_MSP430G2x03.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x03.IE_OFF// Disabled;
        const GPIO_MSP430G2x03.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x03.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x03.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x03.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x03.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x03.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x03.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x03.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x03.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x03.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x03.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x03.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x03.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x03.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x03.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x03.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x03.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x03.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x03.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x03.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x03.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x03.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x03.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x03.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x03.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x03.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x03.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x03.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x03.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430G2x03.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430G2x03.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430G2x03.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430G2x03.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL2// Port 3 Port Select 2 Register = GPIO_MSP430G2x03.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x03.DevicePinFunctionSetting_t[8][3] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x03 device, there are 3 x 8 = 24 pins total = GPIO_MSP430G2x03.DevicePin_t[8][3] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x03.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3SEL2",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x03.create// Create an instance-object(params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x03.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x03.Bit0_t
    const GPIO_MSP430G2x03.BIT0_OFF;
    const GPIO_MSP430G2x03.BIT0;
enum GPIO_MSP430G2x03.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x03.Bit1_t
    const GPIO_MSP430G2x03.BIT1_OFF;
    const GPIO_MSP430G2x03.BIT1;
enum GPIO_MSP430G2x03.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x03.Bit2_t
    const GPIO_MSP430G2x03.BIT2_OFF;
    const GPIO_MSP430G2x03.BIT2;
enum GPIO_MSP430G2x03.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x03.Bit3_t
    const GPIO_MSP430G2x03.BIT3_OFF;
    const GPIO_MSP430G2x03.BIT3;
enum GPIO_MSP430G2x03.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x03.Bit4_t
    const GPIO_MSP430G2x03.BIT4_OFF;
    const GPIO_MSP430G2x03.BIT4;
enum GPIO_MSP430G2x03.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x03.Bit5_t
    const GPIO_MSP430G2x03.BIT5_OFF;
    const GPIO_MSP430G2x03.BIT5;
enum GPIO_MSP430G2x03.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x03.Bit6_t
    const GPIO_MSP430G2x03.BIT6_OFF;
    const GPIO_MSP430G2x03.BIT6;
enum GPIO_MSP430G2x03.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x03.Bit7_t
    const GPIO_MSP430G2x03.BIT7_OFF;
    const GPIO_MSP430G2x03.BIT7;
enum GPIO_MSP430G2x03.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x03.InterruptEnable_t
    const GPIO_MSP430G2x03.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x03.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x03.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x03.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x03.OutputState_t
    const GPIO_MSP430G2x03.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x03.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x03.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x03.ResEnable_t
    const GPIO_MSP430G2x03.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x03.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x03.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x03.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x03.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x03.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x03.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x03.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x03.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x03.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x03.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x03.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x03.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x03.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x03.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x03.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x03.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x03.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x03.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x03.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x03.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x03.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x03.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x03.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x03.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x03.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x03.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x03.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x03.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x03.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x03.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x03.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x03.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x03.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x03.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x03.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x03.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x03.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430G2x03.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430G2x03.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430G2x03.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL2 = GPIO_MSP430G2x03.GpioBits8PxSel2_t {
    // Port 3 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x03.DevicePinFunctionSetting_t[8][3] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x03.DevicePin_t[8][3] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x03 device, there are 3 x 8 = 24 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x03.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3SEL2",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x03.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1DIR = GPIO_MSP430G2x03.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1OUT = GPIO_MSP430G2x03.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1REN = GPIO_MSP430G2x03.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1SEL = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P1SEL2 = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2DIR = GPIO_MSP430G2x03.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2OUT = GPIO_MSP430G2x03.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2REN = GPIO_MSP430G2x03.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2SEL = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x03.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P2SEL2 = GPIO_MSP430G2x03.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3DIR = GPIO_MSP430G2x03.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3OUT = GPIO_MSP430G2x03.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3REN = GPIO_MSP430G2x03.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3SEL = GPIO_MSP430G2x03.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P3SEL2 // instance
index URL

Port 3 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P3SEL2 = GPIO_MSP430G2x03.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x03.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.devicePinSetting = GPIO_MSP430G2x03.DevicePinFunctionSetting_t[8][3] undefined;
config GPIO_MSP430G2x03.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x03 device, there are 3 x 8 = 24 pins total

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.devicePins = GPIO_MSP430G2x03.DevicePin_t[8][3] undefined;
config GPIO_MSP430G2x03.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x03.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3SEL2",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    }
];
config GPIO_MSP430G2x03.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x03.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x03.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x03.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x03.create(params);
// Create an instance-object
GPIO_MSP430G2x03.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x03.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x03.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x03.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x03.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x03.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:54 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x11

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x11
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x11.xdc
var GPIO_MSP430G2x11 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x11');
module-wide constants & types
    values of type GPIO_MSP430G2x11.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x11.BIT0_OFF;
        const GPIO_MSP430G2x11.BIT0;
    values of type GPIO_MSP430G2x11.Bit1_t//
        const GPIO_MSP430G2x11.BIT1_OFF;
        const GPIO_MSP430G2x11.BIT1;
    values of type GPIO_MSP430G2x11.Bit2_t//
        const GPIO_MSP430G2x11.BIT2_OFF;
        const GPIO_MSP430G2x11.BIT2;
    values of type GPIO_MSP430G2x11.Bit3_t//
        const GPIO_MSP430G2x11.BIT3_OFF;
        const GPIO_MSP430G2x11.BIT3;
    values of type GPIO_MSP430G2x11.Bit4_t//
        const GPIO_MSP430G2x11.BIT4_OFF;
        const GPIO_MSP430G2x11.BIT4;
    values of type GPIO_MSP430G2x11.Bit5_t//
        const GPIO_MSP430G2x11.BIT5_OFF;
        const GPIO_MSP430G2x11.BIT5;
    values of type GPIO_MSP430G2x11.Bit6_t//
        const GPIO_MSP430G2x11.BIT6_OFF;
        const GPIO_MSP430G2x11.BIT6;
    values of type GPIO_MSP430G2x11.Bit7_t//
        const GPIO_MSP430G2x11.BIT7_OFF;
        const GPIO_MSP430G2x11.BIT7;
    values of type GPIO_MSP430G2x11.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x11.IE_OFF// Disabled;
        const GPIO_MSP430G2x11.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x11.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x11.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x11.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x11.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x11.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x11.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x11.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x11.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x11.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x11.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x11.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x11.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x11.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x11.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x11.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x11.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x11.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x11.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x11.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x11.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x11.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x11.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x11.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x11.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x11.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x11.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x11.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x11 device, there are 8 + 2 = 10 pins total = GPIO_MSP430G2x11.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x11.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x11.create// Create an instance-object(IComparator.Instance comparator, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x11.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x11.Bit0_t
    const GPIO_MSP430G2x11.BIT0_OFF;
    const GPIO_MSP430G2x11.BIT0;
enum GPIO_MSP430G2x11.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x11.Bit1_t
    const GPIO_MSP430G2x11.BIT1_OFF;
    const GPIO_MSP430G2x11.BIT1;
enum GPIO_MSP430G2x11.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x11.Bit2_t
    const GPIO_MSP430G2x11.BIT2_OFF;
    const GPIO_MSP430G2x11.BIT2;
enum GPIO_MSP430G2x11.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x11.Bit3_t
    const GPIO_MSP430G2x11.BIT3_OFF;
    const GPIO_MSP430G2x11.BIT3;
enum GPIO_MSP430G2x11.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x11.Bit4_t
    const GPIO_MSP430G2x11.BIT4_OFF;
    const GPIO_MSP430G2x11.BIT4;
enum GPIO_MSP430G2x11.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x11.Bit5_t
    const GPIO_MSP430G2x11.BIT5_OFF;
    const GPIO_MSP430G2x11.BIT5;
enum GPIO_MSP430G2x11.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x11.Bit6_t
    const GPIO_MSP430G2x11.BIT6_OFF;
    const GPIO_MSP430G2x11.BIT6;
enum GPIO_MSP430G2x11.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x11.Bit7_t
    const GPIO_MSP430G2x11.BIT7_OFF;
    const GPIO_MSP430G2x11.BIT7;
enum GPIO_MSP430G2x11.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x11.InterruptEnable_t
    const GPIO_MSP430G2x11.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x11.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x11.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x11.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x11.OutputState_t
    const GPIO_MSP430G2x11.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x11.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x11.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x11.ResEnable_t
    const GPIO_MSP430G2x11.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x11.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x11.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x11.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x11.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x11.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x11.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x11.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x11.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x11.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x11.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x11.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x11.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x11.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x11.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x11.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x11.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x11.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x11.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x11.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x11.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x11.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x11.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x11.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x11.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x11.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x11.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x11.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x11.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x11.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x11.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x11.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x11.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x11.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x11.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x11.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x11.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x11.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x11.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x11.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x11.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x11 device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x11.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x11.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P1DIR = GPIO_MSP430G2x11.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P1OUT = GPIO_MSP430G2x11.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P1REN = GPIO_MSP430G2x11.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P1SEL = GPIO_MSP430G2x11.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P2DIR = GPIO_MSP430G2x11.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P2OUT = GPIO_MSP430G2x11.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P2REN = GPIO_MSP430G2x11.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P2SEL = GPIO_MSP430G2x11.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x11.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x11.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.devicePinSetting = GPIO_MSP430G2x11.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x11.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x11 device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.devicePins = GPIO_MSP430G2x11.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x11.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x11.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x11.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x11.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x11.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x11.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x11.create(IComparator.Instance comparator, params);
// Create an instance-object
GPIO_MSP430G2x11.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x11.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x11.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x11.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x11.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x11.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:54 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x12

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x12
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x12.xdc
var GPIO_MSP430G2x12 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x12');
module-wide constants & types
    values of type GPIO_MSP430G2x12.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x12.BIT0_OFF;
        const GPIO_MSP430G2x12.BIT0;
    values of type GPIO_MSP430G2x12.Bit1_t//
        const GPIO_MSP430G2x12.BIT1_OFF;
        const GPIO_MSP430G2x12.BIT1;
    values of type GPIO_MSP430G2x12.Bit2_t//
        const GPIO_MSP430G2x12.BIT2_OFF;
        const GPIO_MSP430G2x12.BIT2;
    values of type GPIO_MSP430G2x12.Bit3_t//
        const GPIO_MSP430G2x12.BIT3_OFF;
        const GPIO_MSP430G2x12.BIT3;
    values of type GPIO_MSP430G2x12.Bit4_t//
        const GPIO_MSP430G2x12.BIT4_OFF;
        const GPIO_MSP430G2x12.BIT4;
    values of type GPIO_MSP430G2x12.Bit5_t//
        const GPIO_MSP430G2x12.BIT5_OFF;
        const GPIO_MSP430G2x12.BIT5;
    values of type GPIO_MSP430G2x12.Bit6_t//
        const GPIO_MSP430G2x12.BIT6_OFF;
        const GPIO_MSP430G2x12.BIT6;
    values of type GPIO_MSP430G2x12.Bit7_t//
        const GPIO_MSP430G2x12.BIT7_OFF;
        const GPIO_MSP430G2x12.BIT7;
    values of type GPIO_MSP430G2x12.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x12.IE_OFF// Disabled;
        const GPIO_MSP430G2x12.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x12.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x12.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x12.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x12.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x12.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x12.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x12.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x12.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x12.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x12.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x12.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x12.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x12.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x12.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x12.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x12.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x12.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x12.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x12.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x12.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x12.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x12.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x12.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x12.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x12.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x12.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x12.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x12.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x12.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x12 device, there are 8 + 8 = 16 pins total = GPIO_MSP430G2x12.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x12.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x12.create// Create an instance-object(USI.Instance usi, IComparator.Instance comparator, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x12.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x12.Bit0_t
    const GPIO_MSP430G2x12.BIT0_OFF;
    const GPIO_MSP430G2x12.BIT0;
enum GPIO_MSP430G2x12.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x12.Bit1_t
    const GPIO_MSP430G2x12.BIT1_OFF;
    const GPIO_MSP430G2x12.BIT1;
enum GPIO_MSP430G2x12.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x12.Bit2_t
    const GPIO_MSP430G2x12.BIT2_OFF;
    const GPIO_MSP430G2x12.BIT2;
enum GPIO_MSP430G2x12.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x12.Bit3_t
    const GPIO_MSP430G2x12.BIT3_OFF;
    const GPIO_MSP430G2x12.BIT3;
enum GPIO_MSP430G2x12.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x12.Bit4_t
    const GPIO_MSP430G2x12.BIT4_OFF;
    const GPIO_MSP430G2x12.BIT4;
enum GPIO_MSP430G2x12.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x12.Bit5_t
    const GPIO_MSP430G2x12.BIT5_OFF;
    const GPIO_MSP430G2x12.BIT5;
enum GPIO_MSP430G2x12.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x12.Bit6_t
    const GPIO_MSP430G2x12.BIT6_OFF;
    const GPIO_MSP430G2x12.BIT6;
enum GPIO_MSP430G2x12.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x12.Bit7_t
    const GPIO_MSP430G2x12.BIT7_OFF;
    const GPIO_MSP430G2x12.BIT7;
enum GPIO_MSP430G2x12.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x12.InterruptEnable_t
    const GPIO_MSP430G2x12.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x12.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x12.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x12.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x12.OutputState_t
    const GPIO_MSP430G2x12.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x12.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x12.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x12.ResEnable_t
    const GPIO_MSP430G2x12.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x12.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x12.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x12.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x12.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x12.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x12.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x12.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x12.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x12.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x12.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x12.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x12.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x12.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x12.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x12.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x12.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x12.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x12.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x12.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x12.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x12.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x12.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x12.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x12.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x12.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x12.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x12.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x12.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x12.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x12.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x12.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x12.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x12.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x12.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x12.GpioBits8PxSel2_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x12.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x12.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x12.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x12.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x12.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x12.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x12.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x12 device, there are 8 + 8 = 16 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x12.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x12.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1DIR = GPIO_MSP430G2x12.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1OUT = GPIO_MSP430G2x12.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1REN = GPIO_MSP430G2x12.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1SEL = GPIO_MSP430G2x12.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P1SEL2 = GPIO_MSP430G2x12.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2DIR = GPIO_MSP430G2x12.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2OUT = GPIO_MSP430G2x12.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2REN = GPIO_MSP430G2x12.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2SEL = GPIO_MSP430G2x12.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x12.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P2SEL2 = GPIO_MSP430G2x12.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x12.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.devicePinSetting = GPIO_MSP430G2x12.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x12.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x12 device, there are 8 + 8 = 16 pins total

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.devicePins = GPIO_MSP430G2x12.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x12.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x12.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x12.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x12.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x12.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x12.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x12.create(USI.Instance usi, IComparator.Instance comparator, params);
// Create an instance-object
GPIO_MSP430G2x12.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x12.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x12.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x12.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x12.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x12.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:55 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x13

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x13
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x13.xdc
var GPIO_MSP430G2x13 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x13');
module-wide constants & types
    values of type GPIO_MSP430G2x13.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x13.BIT0_OFF;
        const GPIO_MSP430G2x13.BIT0;
    values of type GPIO_MSP430G2x13.Bit1_t//
        const GPIO_MSP430G2x13.BIT1_OFF;
        const GPIO_MSP430G2x13.BIT1;
    values of type GPIO_MSP430G2x13.Bit2_t//
        const GPIO_MSP430G2x13.BIT2_OFF;
        const GPIO_MSP430G2x13.BIT2;
    values of type GPIO_MSP430G2x13.Bit3_t//
        const GPIO_MSP430G2x13.BIT3_OFF;
        const GPIO_MSP430G2x13.BIT3;
    values of type GPIO_MSP430G2x13.Bit4_t//
        const GPIO_MSP430G2x13.BIT4_OFF;
        const GPIO_MSP430G2x13.BIT4;
    values of type GPIO_MSP430G2x13.Bit5_t//
        const GPIO_MSP430G2x13.BIT5_OFF;
        const GPIO_MSP430G2x13.BIT5;
    values of type GPIO_MSP430G2x13.Bit6_t//
        const GPIO_MSP430G2x13.BIT6_OFF;
        const GPIO_MSP430G2x13.BIT6;
    values of type GPIO_MSP430G2x13.Bit7_t//
        const GPIO_MSP430G2x13.BIT7_OFF;
        const GPIO_MSP430G2x13.BIT7;
    values of type GPIO_MSP430G2x13.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x13.IE_OFF// Disabled;
        const GPIO_MSP430G2x13.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x13.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x13.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x13.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x13.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x13.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x13.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x13.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x13.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x13.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x13.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x13.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x13.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x13.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x13.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x13.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x13.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x13.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x13.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x13.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x13.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x13.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x13.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x13.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x13.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x13.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x13.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x13.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x13.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430G2x13.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430G2x13.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430G2x13.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430G2x13.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL2// Port 3 Port Select 2 Register = GPIO_MSP430G2x13.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x13.DevicePinFunctionSetting_t[8][3] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x13 device, there are 3 x 8 = 24 pins total = GPIO_MSP430G2x13.DevicePin_t[8][3] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x13.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3SEL2",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x13.create// Create an instance-object(IComparator.Instance comparator, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x13.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x13.Bit0_t
    const GPIO_MSP430G2x13.BIT0_OFF;
    const GPIO_MSP430G2x13.BIT0;
enum GPIO_MSP430G2x13.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x13.Bit1_t
    const GPIO_MSP430G2x13.BIT1_OFF;
    const GPIO_MSP430G2x13.BIT1;
enum GPIO_MSP430G2x13.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x13.Bit2_t
    const GPIO_MSP430G2x13.BIT2_OFF;
    const GPIO_MSP430G2x13.BIT2;
enum GPIO_MSP430G2x13.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x13.Bit3_t
    const GPIO_MSP430G2x13.BIT3_OFF;
    const GPIO_MSP430G2x13.BIT3;
enum GPIO_MSP430G2x13.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x13.Bit4_t
    const GPIO_MSP430G2x13.BIT4_OFF;
    const GPIO_MSP430G2x13.BIT4;
enum GPIO_MSP430G2x13.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x13.Bit5_t
    const GPIO_MSP430G2x13.BIT5_OFF;
    const GPIO_MSP430G2x13.BIT5;
enum GPIO_MSP430G2x13.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x13.Bit6_t
    const GPIO_MSP430G2x13.BIT6_OFF;
    const GPIO_MSP430G2x13.BIT6;
enum GPIO_MSP430G2x13.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x13.Bit7_t
    const GPIO_MSP430G2x13.BIT7_OFF;
    const GPIO_MSP430G2x13.BIT7;
enum GPIO_MSP430G2x13.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x13.InterruptEnable_t
    const GPIO_MSP430G2x13.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x13.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x13.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x13.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x13.OutputState_t
    const GPIO_MSP430G2x13.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x13.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x13.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x13.ResEnable_t
    const GPIO_MSP430G2x13.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x13.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x13.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x13.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x13.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x13.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x13.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x13.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x13.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x13.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x13.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x13.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x13.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x13.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x13.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x13.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x13.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x13.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x13.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x13.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x13.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x13.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x13.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x13.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x13.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x13.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x13.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x13.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x13.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x13.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x13.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x13.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x13.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x13.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x13.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x13.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x13.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x13.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430G2x13.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430G2x13.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430G2x13.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL2 = GPIO_MSP430G2x13.GpioBits8PxSel2_t {
    // Port 3 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x13.DevicePinFunctionSetting_t[8][3] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x13.DevicePin_t[8][3] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x13 device, there are 3 x 8 = 24 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x13.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3SEL2",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x13.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1DIR = GPIO_MSP430G2x13.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1OUT = GPIO_MSP430G2x13.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1REN = GPIO_MSP430G2x13.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1SEL = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P1SEL2 = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2DIR = GPIO_MSP430G2x13.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2OUT = GPIO_MSP430G2x13.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2REN = GPIO_MSP430G2x13.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2SEL = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x13.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P2SEL2 = GPIO_MSP430G2x13.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3DIR = GPIO_MSP430G2x13.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3OUT = GPIO_MSP430G2x13.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3REN = GPIO_MSP430G2x13.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3SEL = GPIO_MSP430G2x13.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P3SEL2 // instance
index URL

Port 3 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P3SEL2 = GPIO_MSP430G2x13.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x13.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.devicePinSetting = GPIO_MSP430G2x13.DevicePinFunctionSetting_t[8][3] undefined;
config GPIO_MSP430G2x13.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x13 device, there are 3 x 8 = 24 pins total

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.devicePins = GPIO_MSP430G2x13.DevicePin_t[8][3] undefined;
config GPIO_MSP430G2x13.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x13.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3SEL2",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    }
];
config GPIO_MSP430G2x13.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x13.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x13.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x13.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x13.create(IComparator.Instance comparator, params);
// Create an instance-object
GPIO_MSP430G2x13.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x13.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x13.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x13.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x13.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x13.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:55 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x21

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x21
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x21.xdc
var GPIO_MSP430G2x21 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x21');
module-wide constants & types
    values of type GPIO_MSP430G2x21.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x21.BIT0_OFF;
        const GPIO_MSP430G2x21.BIT0;
    values of type GPIO_MSP430G2x21.Bit1_t//
        const GPIO_MSP430G2x21.BIT1_OFF;
        const GPIO_MSP430G2x21.BIT1;
    values of type GPIO_MSP430G2x21.Bit2_t//
        const GPIO_MSP430G2x21.BIT2_OFF;
        const GPIO_MSP430G2x21.BIT2;
    values of type GPIO_MSP430G2x21.Bit3_t//
        const GPIO_MSP430G2x21.BIT3_OFF;
        const GPIO_MSP430G2x21.BIT3;
    values of type GPIO_MSP430G2x21.Bit4_t//
        const GPIO_MSP430G2x21.BIT4_OFF;
        const GPIO_MSP430G2x21.BIT4;
    values of type GPIO_MSP430G2x21.Bit5_t//
        const GPIO_MSP430G2x21.BIT5_OFF;
        const GPIO_MSP430G2x21.BIT5;
    values of type GPIO_MSP430G2x21.Bit6_t//
        const GPIO_MSP430G2x21.BIT6_OFF;
        const GPIO_MSP430G2x21.BIT6;
    values of type GPIO_MSP430G2x21.Bit7_t//
        const GPIO_MSP430G2x21.BIT7_OFF;
        const GPIO_MSP430G2x21.BIT7;
    values of type GPIO_MSP430G2x21.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x21.IE_OFF// Disabled;
        const GPIO_MSP430G2x21.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x21.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x21.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x21.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x21.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x21.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x21.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x21.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x21.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x21.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x21.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x21.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x21.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x21.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x21.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x21.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x21.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x21.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x21.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x21.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x21.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x21.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x21.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x21.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x21.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x21.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x21.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x21 device, there are 8 + 2 = 10 pins total = GPIO_MSP430G2x21.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x21.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x21.create// Create an instance-object(USI.Instance usi, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x21.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x21.Bit0_t
    const GPIO_MSP430G2x21.BIT0_OFF;
    const GPIO_MSP430G2x21.BIT0;
enum GPIO_MSP430G2x21.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x21.Bit1_t
    const GPIO_MSP430G2x21.BIT1_OFF;
    const GPIO_MSP430G2x21.BIT1;
enum GPIO_MSP430G2x21.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x21.Bit2_t
    const GPIO_MSP430G2x21.BIT2_OFF;
    const GPIO_MSP430G2x21.BIT2;
enum GPIO_MSP430G2x21.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x21.Bit3_t
    const GPIO_MSP430G2x21.BIT3_OFF;
    const GPIO_MSP430G2x21.BIT3;
enum GPIO_MSP430G2x21.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x21.Bit4_t
    const GPIO_MSP430G2x21.BIT4_OFF;
    const GPIO_MSP430G2x21.BIT4;
enum GPIO_MSP430G2x21.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x21.Bit5_t
    const GPIO_MSP430G2x21.BIT5_OFF;
    const GPIO_MSP430G2x21.BIT5;
enum GPIO_MSP430G2x21.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x21.Bit6_t
    const GPIO_MSP430G2x21.BIT6_OFF;
    const GPIO_MSP430G2x21.BIT6;
enum GPIO_MSP430G2x21.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x21.Bit7_t
    const GPIO_MSP430G2x21.BIT7_OFF;
    const GPIO_MSP430G2x21.BIT7;
enum GPIO_MSP430G2x21.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x21.InterruptEnable_t
    const GPIO_MSP430G2x21.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x21.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x21.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x21.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x21.OutputState_t
    const GPIO_MSP430G2x21.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x21.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x21.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x21.ResEnable_t
    const GPIO_MSP430G2x21.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x21.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x21.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x21.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x21.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x21.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x21.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x21.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x21.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x21.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x21.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x21.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x21.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x21.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x21.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x21.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x21.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x21.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x21.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x21.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x21.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x21.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x21.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x21.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x21.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x21.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x21.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x21.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x21.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x21.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x21.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x21.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x21.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x21.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x21.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x21.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x21.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x21.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x21.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x21.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x21.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x21 device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x21.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x21.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P1DIR = GPIO_MSP430G2x21.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P1OUT = GPIO_MSP430G2x21.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P1REN = GPIO_MSP430G2x21.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P1SEL = GPIO_MSP430G2x21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P2DIR = GPIO_MSP430G2x21.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P2OUT = GPIO_MSP430G2x21.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P2REN = GPIO_MSP430G2x21.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P2SEL = GPIO_MSP430G2x21.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x21.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x21.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.devicePinSetting = GPIO_MSP430G2x21.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x21.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x21 device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.devicePins = GPIO_MSP430G2x21.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x21.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x21.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x21.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x21.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x21.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x21.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x21.create(USI.Instance usi, params);
// Create an instance-object
GPIO_MSP430G2x21.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x21.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x21.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x21.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x21.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x21.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:56 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x31

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x31
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x31.xdc
var GPIO_MSP430G2x31 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x31');
module-wide constants & types
    values of type GPIO_MSP430G2x31.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x31.BIT0_OFF;
        const GPIO_MSP430G2x31.BIT0;
    values of type GPIO_MSP430G2x31.Bit1_t//
        const GPIO_MSP430G2x31.BIT1_OFF;
        const GPIO_MSP430G2x31.BIT1;
    values of type GPIO_MSP430G2x31.Bit2_t//
        const GPIO_MSP430G2x31.BIT2_OFF;
        const GPIO_MSP430G2x31.BIT2;
    values of type GPIO_MSP430G2x31.Bit3_t//
        const GPIO_MSP430G2x31.BIT3_OFF;
        const GPIO_MSP430G2x31.BIT3;
    values of type GPIO_MSP430G2x31.Bit4_t//
        const GPIO_MSP430G2x31.BIT4_OFF;
        const GPIO_MSP430G2x31.BIT4;
    values of type GPIO_MSP430G2x31.Bit5_t//
        const GPIO_MSP430G2x31.BIT5_OFF;
        const GPIO_MSP430G2x31.BIT5;
    values of type GPIO_MSP430G2x31.Bit6_t//
        const GPIO_MSP430G2x31.BIT6_OFF;
        const GPIO_MSP430G2x31.BIT6;
    values of type GPIO_MSP430G2x31.Bit7_t//
        const GPIO_MSP430G2x31.BIT7_OFF;
        const GPIO_MSP430G2x31.BIT7;
    values of type GPIO_MSP430G2x31.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x31.IE_OFF// Disabled;
        const GPIO_MSP430G2x31.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x31.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x31.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x31.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x31.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x31.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x31.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x31.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x31.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x31.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x31.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x31.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x31.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x31.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x31.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x31.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x31.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x31.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x31.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x31.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x31.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x31.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x31.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x31.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x31.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x31.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x31.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x31.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x31 device, there are 8 + 2 = 10 pins total = GPIO_MSP430G2x31.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x31.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x31.create// Create an instance-object(USI.Instance usi, ADC10.Instance adc10, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x31.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x31.Bit0_t
    const GPIO_MSP430G2x31.BIT0_OFF;
    const GPIO_MSP430G2x31.BIT0;
enum GPIO_MSP430G2x31.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x31.Bit1_t
    const GPIO_MSP430G2x31.BIT1_OFF;
    const GPIO_MSP430G2x31.BIT1;
enum GPIO_MSP430G2x31.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x31.Bit2_t
    const GPIO_MSP430G2x31.BIT2_OFF;
    const GPIO_MSP430G2x31.BIT2;
enum GPIO_MSP430G2x31.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x31.Bit3_t
    const GPIO_MSP430G2x31.BIT3_OFF;
    const GPIO_MSP430G2x31.BIT3;
enum GPIO_MSP430G2x31.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x31.Bit4_t
    const GPIO_MSP430G2x31.BIT4_OFF;
    const GPIO_MSP430G2x31.BIT4;
enum GPIO_MSP430G2x31.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x31.Bit5_t
    const GPIO_MSP430G2x31.BIT5_OFF;
    const GPIO_MSP430G2x31.BIT5;
enum GPIO_MSP430G2x31.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x31.Bit6_t
    const GPIO_MSP430G2x31.BIT6_OFF;
    const GPIO_MSP430G2x31.BIT6;
enum GPIO_MSP430G2x31.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x31.Bit7_t
    const GPIO_MSP430G2x31.BIT7_OFF;
    const GPIO_MSP430G2x31.BIT7;
enum GPIO_MSP430G2x31.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x31.InterruptEnable_t
    const GPIO_MSP430G2x31.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x31.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x31.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x31.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x31.OutputState_t
    const GPIO_MSP430G2x31.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x31.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x31.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x31.ResEnable_t
    const GPIO_MSP430G2x31.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x31.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x31.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x31.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x31.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x31.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x31.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x31.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x31.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x31.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x31.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x31.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x31.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x31.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x31.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x31.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x31.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x31.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x31.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x31.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x31.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x31.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x31.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x31.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x31.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x31.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x31.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x31.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x31.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x31.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x31.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x31.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x31.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x31.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x31.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x31.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x31.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x31.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x31.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x31.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x31.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x31 device, there are 8 + 2 = 10 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x31.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x31.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P1DIR = GPIO_MSP430G2x31.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P1OUT = GPIO_MSP430G2x31.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P1REN = GPIO_MSP430G2x31.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P1SEL = GPIO_MSP430G2x31.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P2DIR = GPIO_MSP430G2x31.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P2OUT = GPIO_MSP430G2x31.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P2REN = GPIO_MSP430G2x31.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P2SEL = GPIO_MSP430G2x31.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x31.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x31.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.devicePinSetting = GPIO_MSP430G2x31.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x31.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x31 device, there are 8 + 2 = 10 pins total

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.devicePins = GPIO_MSP430G2x31.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x31.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x31.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x31.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x31.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x31.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x31.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x31.create(USI.Instance usi, ADC10.Instance adc10, params);
// Create an instance-object
GPIO_MSP430G2x31.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x31.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x31.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x31.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x31.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x31.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:56 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x32

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x32
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x32.xdc
var GPIO_MSP430G2x32 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x32');
module-wide constants & types
    values of type GPIO_MSP430G2x32.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x32.BIT0_OFF;
        const GPIO_MSP430G2x32.BIT0;
    values of type GPIO_MSP430G2x32.Bit1_t//
        const GPIO_MSP430G2x32.BIT1_OFF;
        const GPIO_MSP430G2x32.BIT1;
    values of type GPIO_MSP430G2x32.Bit2_t//
        const GPIO_MSP430G2x32.BIT2_OFF;
        const GPIO_MSP430G2x32.BIT2;
    values of type GPIO_MSP430G2x32.Bit3_t//
        const GPIO_MSP430G2x32.BIT3_OFF;
        const GPIO_MSP430G2x32.BIT3;
    values of type GPIO_MSP430G2x32.Bit4_t//
        const GPIO_MSP430G2x32.BIT4_OFF;
        const GPIO_MSP430G2x32.BIT4;
    values of type GPIO_MSP430G2x32.Bit5_t//
        const GPIO_MSP430G2x32.BIT5_OFF;
        const GPIO_MSP430G2x32.BIT5;
    values of type GPIO_MSP430G2x32.Bit6_t//
        const GPIO_MSP430G2x32.BIT6_OFF;
        const GPIO_MSP430G2x32.BIT6;
    values of type GPIO_MSP430G2x32.Bit7_t//
        const GPIO_MSP430G2x32.BIT7_OFF;
        const GPIO_MSP430G2x32.BIT7;
    values of type GPIO_MSP430G2x32.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x32.IE_OFF// Disabled;
        const GPIO_MSP430G2x32.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x32.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x32.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x32.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x32.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x32.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x32.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x32.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x32.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x32.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x32.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x32.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x32.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x32.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x32.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x32.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x32.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x32.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x32.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x32.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x32.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x32.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x32.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x32.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x32.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x32.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x32.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x32.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x32.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x32.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x32 device, there are 8 + 8 = 16 pins total = GPIO_MSP430G2x32.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x32.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x32.create// Create an instance-object(USI.Instance usi, ADC10.Instance adc10, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x32.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x32.Bit0_t
    const GPIO_MSP430G2x32.BIT0_OFF;
    const GPIO_MSP430G2x32.BIT0;
enum GPIO_MSP430G2x32.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x32.Bit1_t
    const GPIO_MSP430G2x32.BIT1_OFF;
    const GPIO_MSP430G2x32.BIT1;
enum GPIO_MSP430G2x32.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x32.Bit2_t
    const GPIO_MSP430G2x32.BIT2_OFF;
    const GPIO_MSP430G2x32.BIT2;
enum GPIO_MSP430G2x32.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x32.Bit3_t
    const GPIO_MSP430G2x32.BIT3_OFF;
    const GPIO_MSP430G2x32.BIT3;
enum GPIO_MSP430G2x32.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x32.Bit4_t
    const GPIO_MSP430G2x32.BIT4_OFF;
    const GPIO_MSP430G2x32.BIT4;
enum GPIO_MSP430G2x32.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x32.Bit5_t
    const GPIO_MSP430G2x32.BIT5_OFF;
    const GPIO_MSP430G2x32.BIT5;
enum GPIO_MSP430G2x32.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x32.Bit6_t
    const GPIO_MSP430G2x32.BIT6_OFF;
    const GPIO_MSP430G2x32.BIT6;
enum GPIO_MSP430G2x32.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x32.Bit7_t
    const GPIO_MSP430G2x32.BIT7_OFF;
    const GPIO_MSP430G2x32.BIT7;
enum GPIO_MSP430G2x32.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x32.InterruptEnable_t
    const GPIO_MSP430G2x32.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x32.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x32.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x32.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x32.OutputState_t
    const GPIO_MSP430G2x32.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x32.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x32.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x32.ResEnable_t
    const GPIO_MSP430G2x32.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x32.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x32.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x32.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x32.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x32.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x32.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x32.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x32.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x32.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x32.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x32.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x32.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x32.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x32.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x32.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x32.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x32.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x32.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x32.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x32.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x32.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x32.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x32.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x32.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x32.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x32.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x32.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x32.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x32.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x32.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x32.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x32.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x32.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x32.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x32.GpioBits8PxSel2_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x32.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x32.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x32.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x32.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x32.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x32.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x32.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x32 device, there are 8 + 8 = 16 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x32.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x32.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1DIR = GPIO_MSP430G2x32.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1OUT = GPIO_MSP430G2x32.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1REN = GPIO_MSP430G2x32.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1SEL = GPIO_MSP430G2x32.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P1SEL2 = GPIO_MSP430G2x32.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2DIR = GPIO_MSP430G2x32.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2OUT = GPIO_MSP430G2x32.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2REN = GPIO_MSP430G2x32.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2SEL = GPIO_MSP430G2x32.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x32.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P2SEL2 = GPIO_MSP430G2x32.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x32.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.devicePinSetting = GPIO_MSP430G2x32.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x32.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x32 device, there are 8 + 8 = 16 pins total

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.devicePins = GPIO_MSP430G2x32.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x32.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x32.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x32.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x32.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x32.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x32.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x32.create(USI.Instance usi, ADC10.Instance adc10, params);
// Create an instance-object
GPIO_MSP430G2x32.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x32.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x32.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x32.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x32.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x32.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:57 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x33

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x33
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x33.xdc
var GPIO_MSP430G2x33 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x33');
module-wide constants & types
    values of type GPIO_MSP430G2x33.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x33.BIT0_OFF;
        const GPIO_MSP430G2x33.BIT0;
    values of type GPIO_MSP430G2x33.Bit1_t//
        const GPIO_MSP430G2x33.BIT1_OFF;
        const GPIO_MSP430G2x33.BIT1;
    values of type GPIO_MSP430G2x33.Bit2_t//
        const GPIO_MSP430G2x33.BIT2_OFF;
        const GPIO_MSP430G2x33.BIT2;
    values of type GPIO_MSP430G2x33.Bit3_t//
        const GPIO_MSP430G2x33.BIT3_OFF;
        const GPIO_MSP430G2x33.BIT3;
    values of type GPIO_MSP430G2x33.Bit4_t//
        const GPIO_MSP430G2x33.BIT4_OFF;
        const GPIO_MSP430G2x33.BIT4;
    values of type GPIO_MSP430G2x33.Bit5_t//
        const GPIO_MSP430G2x33.BIT5_OFF;
        const GPIO_MSP430G2x33.BIT5;
    values of type GPIO_MSP430G2x33.Bit6_t//
        const GPIO_MSP430G2x33.BIT6_OFF;
        const GPIO_MSP430G2x33.BIT6;
    values of type GPIO_MSP430G2x33.Bit7_t//
        const GPIO_MSP430G2x33.BIT7_OFF;
        const GPIO_MSP430G2x33.BIT7;
    values of type GPIO_MSP430G2x33.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x33.IE_OFF// Disabled;
        const GPIO_MSP430G2x33.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x33.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x33.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x33.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x33.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x33.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x33.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x33.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x33.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x33.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x33.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x33.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x33.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x33.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x33.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x33.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x33.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x33.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x33.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x33.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x33.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x33.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x33.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x33.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x33.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x33.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x33.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x33.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x33.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430G2x33.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430G2x33.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430G2x33.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430G2x33.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL2// Port 3 Port Select 2 Register = GPIO_MSP430G2x33.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x33.DevicePinFunctionSetting_t[8][3] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x33 device, there are 3 x 8 = 24 pins total = GPIO_MSP430G2x33.DevicePin_t[8][3] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x33.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3SEL2",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x33.create// Create an instance-object(ADC10.Instance adc10, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x33.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x33.Bit0_t
    const GPIO_MSP430G2x33.BIT0_OFF;
    const GPIO_MSP430G2x33.BIT0;
enum GPIO_MSP430G2x33.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x33.Bit1_t
    const GPIO_MSP430G2x33.BIT1_OFF;
    const GPIO_MSP430G2x33.BIT1;
enum GPIO_MSP430G2x33.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x33.Bit2_t
    const GPIO_MSP430G2x33.BIT2_OFF;
    const GPIO_MSP430G2x33.BIT2;
enum GPIO_MSP430G2x33.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x33.Bit3_t
    const GPIO_MSP430G2x33.BIT3_OFF;
    const GPIO_MSP430G2x33.BIT3;
enum GPIO_MSP430G2x33.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x33.Bit4_t
    const GPIO_MSP430G2x33.BIT4_OFF;
    const GPIO_MSP430G2x33.BIT4;
enum GPIO_MSP430G2x33.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x33.Bit5_t
    const GPIO_MSP430G2x33.BIT5_OFF;
    const GPIO_MSP430G2x33.BIT5;
enum GPIO_MSP430G2x33.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x33.Bit6_t
    const GPIO_MSP430G2x33.BIT6_OFF;
    const GPIO_MSP430G2x33.BIT6;
enum GPIO_MSP430G2x33.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x33.Bit7_t
    const GPIO_MSP430G2x33.BIT7_OFF;
    const GPIO_MSP430G2x33.BIT7;
enum GPIO_MSP430G2x33.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x33.InterruptEnable_t
    const GPIO_MSP430G2x33.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x33.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x33.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x33.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x33.OutputState_t
    const GPIO_MSP430G2x33.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x33.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x33.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x33.ResEnable_t
    const GPIO_MSP430G2x33.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x33.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x33.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x33.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x33.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x33.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x33.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x33.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x33.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x33.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x33.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x33.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x33.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x33.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x33.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x33.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x33.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x33.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x33.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x33.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x33.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x33.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x33.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x33.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x33.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x33.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x33.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x33.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x33.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x33.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x33.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x33.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x33.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x33.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x33.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x33.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x33.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x33.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430G2x33.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430G2x33.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430G2x33.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL2 = GPIO_MSP430G2x33.GpioBits8PxSel2_t {
    // Port 3 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x33.DevicePinFunctionSetting_t[8][3] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x33.DevicePin_t[8][3] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x33 device, there are 3 x 8 = 24 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x33.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3SEL2",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x33.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1DIR = GPIO_MSP430G2x33.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1OUT = GPIO_MSP430G2x33.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1REN = GPIO_MSP430G2x33.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1SEL = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P1SEL2 = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2DIR = GPIO_MSP430G2x33.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2OUT = GPIO_MSP430G2x33.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2REN = GPIO_MSP430G2x33.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2SEL = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x33.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P2SEL2 = GPIO_MSP430G2x33.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3DIR = GPIO_MSP430G2x33.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3OUT = GPIO_MSP430G2x33.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3REN = GPIO_MSP430G2x33.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3SEL = GPIO_MSP430G2x33.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P3SEL2 // instance
index URL

Port 3 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P3SEL2 = GPIO_MSP430G2x33.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x33.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.devicePinSetting = GPIO_MSP430G2x33.DevicePinFunctionSetting_t[8][3] undefined;
config GPIO_MSP430G2x33.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x33 device, there are 3 x 8 = 24 pins total

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.devicePins = GPIO_MSP430G2x33.DevicePin_t[8][3] undefined;
config GPIO_MSP430G2x33.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x33.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3SEL2",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    }
];
config GPIO_MSP430G2x33.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x33.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x33.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x33.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x33.create(ADC10.Instance adc10, params);
// Create an instance-object
GPIO_MSP430G2x33.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x33.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x33.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x33.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x33.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x33.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:57 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x44

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x44
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x44.xdc
var GPIO_MSP430G2x44 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x44');
module-wide constants & types
    values of type GPIO_MSP430G2x44.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x44.BIT0_OFF;
        const GPIO_MSP430G2x44.BIT0;
    values of type GPIO_MSP430G2x44.Bit1_t//
        const GPIO_MSP430G2x44.BIT1_OFF;
        const GPIO_MSP430G2x44.BIT1;
    values of type GPIO_MSP430G2x44.Bit2_t//
        const GPIO_MSP430G2x44.BIT2_OFF;
        const GPIO_MSP430G2x44.BIT2;
    values of type GPIO_MSP430G2x44.Bit3_t//
        const GPIO_MSP430G2x44.BIT3_OFF;
        const GPIO_MSP430G2x44.BIT3;
    values of type GPIO_MSP430G2x44.Bit4_t//
        const GPIO_MSP430G2x44.BIT4_OFF;
        const GPIO_MSP430G2x44.BIT4;
    values of type GPIO_MSP430G2x44.Bit5_t//
        const GPIO_MSP430G2x44.BIT5_OFF;
        const GPIO_MSP430G2x44.BIT5;
    values of type GPIO_MSP430G2x44.Bit6_t//
        const GPIO_MSP430G2x44.BIT6_OFF;
        const GPIO_MSP430G2x44.BIT6;
    values of type GPIO_MSP430G2x44.Bit7_t//
        const GPIO_MSP430G2x44.BIT7_OFF;
        const GPIO_MSP430G2x44.BIT7;
    values of type GPIO_MSP430G2x44.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x44.IE_OFF// Disabled;
        const GPIO_MSP430G2x44.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x44.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x44.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x44.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x44.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x44.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x44.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x44.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x44.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x44.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x44.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x44.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x44.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x44.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x44.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x44.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x44.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x44.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x44.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x44.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x44.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x44.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x44.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x44.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x44.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x44.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x44.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430G2x44.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430G2x44.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430G2x44.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430G2x44.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430G2x44.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430G2x44.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430G2x44.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430G2x44.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x44.DevicePinFunctionSetting_t[8][4] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x44 device, there are 4 x 8 = 32 pins total = GPIO_MSP430G2x44.DevicePin_t[8][4] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x44.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x44.create// Create an instance-object(ADC10.Instance adc10, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x44.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x44.Bit0_t
    const GPIO_MSP430G2x44.BIT0_OFF;
    const GPIO_MSP430G2x44.BIT0;
enum GPIO_MSP430G2x44.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x44.Bit1_t
    const GPIO_MSP430G2x44.BIT1_OFF;
    const GPIO_MSP430G2x44.BIT1;
enum GPIO_MSP430G2x44.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x44.Bit2_t
    const GPIO_MSP430G2x44.BIT2_OFF;
    const GPIO_MSP430G2x44.BIT2;
enum GPIO_MSP430G2x44.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x44.Bit3_t
    const GPIO_MSP430G2x44.BIT3_OFF;
    const GPIO_MSP430G2x44.BIT3;
enum GPIO_MSP430G2x44.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x44.Bit4_t
    const GPIO_MSP430G2x44.BIT4_OFF;
    const GPIO_MSP430G2x44.BIT4;
enum GPIO_MSP430G2x44.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x44.Bit5_t
    const GPIO_MSP430G2x44.BIT5_OFF;
    const GPIO_MSP430G2x44.BIT5;
enum GPIO_MSP430G2x44.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x44.Bit6_t
    const GPIO_MSP430G2x44.BIT6_OFF;
    const GPIO_MSP430G2x44.BIT6;
enum GPIO_MSP430G2x44.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x44.Bit7_t
    const GPIO_MSP430G2x44.BIT7_OFF;
    const GPIO_MSP430G2x44.BIT7;
enum GPIO_MSP430G2x44.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x44.InterruptEnable_t
    const GPIO_MSP430G2x44.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x44.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x44.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x44.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x44.OutputState_t
    const GPIO_MSP430G2x44.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x44.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x44.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x44.ResEnable_t
    const GPIO_MSP430G2x44.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x44.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x44.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x44.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x44.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x44.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x44.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x44.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x44.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x44.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x44.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x44.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x44.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x44.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x44.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x44.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x44.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x44.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x44.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x44.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x44.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x44.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x44.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x44.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x44.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x44.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x44.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x44.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x44.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x44.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x44.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x44.DevicePinFunctionSetting_t[8][4] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x44.DevicePin_t[8][4] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x44 device, there are 4 x 8 = 32 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x44.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x44.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P1DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P1OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P1REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P1SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P2DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P2OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P2REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P2SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x44.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P3DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P3OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P3REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P3SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P4DIR = GPIO_MSP430G2x44.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P4OUT = GPIO_MSP430G2x44.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P4REN = GPIO_MSP430G2x44.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.P4SEL = GPIO_MSP430G2x44.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x44.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.devicePinSetting = GPIO_MSP430G2x44.DevicePinFunctionSetting_t[8][4] undefined;
config GPIO_MSP430G2x44.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x44 device, there are 4 x 8 = 32 pins total

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
const params.devicePins = GPIO_MSP430G2x44.DevicePin_t[8][4] computed value;
config GPIO_MSP430G2x44.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x44.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    }
];
config GPIO_MSP430G2x44.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x44.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x44.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x44.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x44.create(ADC10.Instance adc10, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430G2x44.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x44.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x44.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x44.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x44.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x44.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:58 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x52

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x52
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x52.xdc
var GPIO_MSP430G2x52 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x52');
module-wide constants & types
    values of type GPIO_MSP430G2x52.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x52.BIT0_OFF;
        const GPIO_MSP430G2x52.BIT0;
    values of type GPIO_MSP430G2x52.Bit1_t//
        const GPIO_MSP430G2x52.BIT1_OFF;
        const GPIO_MSP430G2x52.BIT1;
    values of type GPIO_MSP430G2x52.Bit2_t//
        const GPIO_MSP430G2x52.BIT2_OFF;
        const GPIO_MSP430G2x52.BIT2;
    values of type GPIO_MSP430G2x52.Bit3_t//
        const GPIO_MSP430G2x52.BIT3_OFF;
        const GPIO_MSP430G2x52.BIT3;
    values of type GPIO_MSP430G2x52.Bit4_t//
        const GPIO_MSP430G2x52.BIT4_OFF;
        const GPIO_MSP430G2x52.BIT4;
    values of type GPIO_MSP430G2x52.Bit5_t//
        const GPIO_MSP430G2x52.BIT5_OFF;
        const GPIO_MSP430G2x52.BIT5;
    values of type GPIO_MSP430G2x52.Bit6_t//
        const GPIO_MSP430G2x52.BIT6_OFF;
        const GPIO_MSP430G2x52.BIT6;
    values of type GPIO_MSP430G2x52.Bit7_t//
        const GPIO_MSP430G2x52.BIT7_OFF;
        const GPIO_MSP430G2x52.BIT7;
    values of type GPIO_MSP430G2x52.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x52.IE_OFF// Disabled;
        const GPIO_MSP430G2x52.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x52.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x52.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x52.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x52.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x52.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x52.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x52.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x52.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x52.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x52.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x52.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x52.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x52.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x52.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x52.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x52.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x52.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x52.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x52.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x52.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x52.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x52.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x52.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x52.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x52.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x52.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x52.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x52.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x52.DevicePinFunctionSetting_t[8][2] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x52 device, there are 8 + 8 = 16 pins total = GPIO_MSP430G2x52.DevicePin_t[8][2] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x52.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x52.create// Create an instance-object(USI.Instance usi, IComparator.Instance comparator, ADC10.Instance adc10, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x52.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x52.Bit0_t
    const GPIO_MSP430G2x52.BIT0_OFF;
    const GPIO_MSP430G2x52.BIT0;
enum GPIO_MSP430G2x52.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x52.Bit1_t
    const GPIO_MSP430G2x52.BIT1_OFF;
    const GPIO_MSP430G2x52.BIT1;
enum GPIO_MSP430G2x52.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x52.Bit2_t
    const GPIO_MSP430G2x52.BIT2_OFF;
    const GPIO_MSP430G2x52.BIT2;
enum GPIO_MSP430G2x52.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x52.Bit3_t
    const GPIO_MSP430G2x52.BIT3_OFF;
    const GPIO_MSP430G2x52.BIT3;
enum GPIO_MSP430G2x52.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x52.Bit4_t
    const GPIO_MSP430G2x52.BIT4_OFF;
    const GPIO_MSP430G2x52.BIT4;
enum GPIO_MSP430G2x52.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x52.Bit5_t
    const GPIO_MSP430G2x52.BIT5_OFF;
    const GPIO_MSP430G2x52.BIT5;
enum GPIO_MSP430G2x52.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x52.Bit6_t
    const GPIO_MSP430G2x52.BIT6_OFF;
    const GPIO_MSP430G2x52.BIT6;
enum GPIO_MSP430G2x52.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x52.Bit7_t
    const GPIO_MSP430G2x52.BIT7_OFF;
    const GPIO_MSP430G2x52.BIT7;
enum GPIO_MSP430G2x52.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x52.InterruptEnable_t
    const GPIO_MSP430G2x52.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x52.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x52.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x52.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x52.OutputState_t
    const GPIO_MSP430G2x52.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x52.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x52.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x52.ResEnable_t
    const GPIO_MSP430G2x52.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x52.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x52.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x52.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x52.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x52.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x52.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x52.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x52.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x52.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x52.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x52.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x52.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x52.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x52.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x52.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x52.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x52.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x52.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x52.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x52.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x52.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x52.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x52.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x52.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x52.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x52.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x52.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x52.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x52.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x52.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x52.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x52.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x52.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x52.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x52.GpioBits8PxSel2_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x52.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x52.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x52.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x52.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x52.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x52.DevicePinFunctionSetting_t[8][2] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x52.DevicePin_t[8][2] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x52 device, there are 8 + 8 = 16 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x52.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x52.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1DIR = GPIO_MSP430G2x52.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1OUT = GPIO_MSP430G2x52.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1REN = GPIO_MSP430G2x52.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1SEL = GPIO_MSP430G2x52.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P1SEL2 = GPIO_MSP430G2x52.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2DIR = GPIO_MSP430G2x52.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2OUT = GPIO_MSP430G2x52.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2REN = GPIO_MSP430G2x52.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2SEL = GPIO_MSP430G2x52.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x52.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P2SEL2 = GPIO_MSP430G2x52.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x52.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.devicePinSetting = GPIO_MSP430G2x52.DevicePinFunctionSetting_t[8][2] undefined;
config GPIO_MSP430G2x52.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x52 device, there are 8 + 8 = 16 pins total

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.devicePins = GPIO_MSP430G2x52.DevicePin_t[8][2] undefined;
config GPIO_MSP430G2x52.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x52.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    }
];
config GPIO_MSP430G2x52.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x52.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x52.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x52.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x52.create(USI.Instance usi, IComparator.Instance comparator, ADC10.Instance adc10, params);
// Create an instance-object
GPIO_MSP430G2x52.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x52.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x52.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x52.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x52.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x52.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:58 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x53

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x53
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x53.xdc
var GPIO_MSP430G2x53 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x53');
module-wide constants & types
    values of type GPIO_MSP430G2x53.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x53.BIT0_OFF;
        const GPIO_MSP430G2x53.BIT0;
    values of type GPIO_MSP430G2x53.Bit1_t//
        const GPIO_MSP430G2x53.BIT1_OFF;
        const GPIO_MSP430G2x53.BIT1;
    values of type GPIO_MSP430G2x53.Bit2_t//
        const GPIO_MSP430G2x53.BIT2_OFF;
        const GPIO_MSP430G2x53.BIT2;
    values of type GPIO_MSP430G2x53.Bit3_t//
        const GPIO_MSP430G2x53.BIT3_OFF;
        const GPIO_MSP430G2x53.BIT3;
    values of type GPIO_MSP430G2x53.Bit4_t//
        const GPIO_MSP430G2x53.BIT4_OFF;
        const GPIO_MSP430G2x53.BIT4;
    values of type GPIO_MSP430G2x53.Bit5_t//
        const GPIO_MSP430G2x53.BIT5_OFF;
        const GPIO_MSP430G2x53.BIT5;
    values of type GPIO_MSP430G2x53.Bit6_t//
        const GPIO_MSP430G2x53.BIT6_OFF;
        const GPIO_MSP430G2x53.BIT6;
    values of type GPIO_MSP430G2x53.Bit7_t//
        const GPIO_MSP430G2x53.BIT7_OFF;
        const GPIO_MSP430G2x53.BIT7;
    values of type GPIO_MSP430G2x53.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x53.IE_OFF// Disabled;
        const GPIO_MSP430G2x53.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x53.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x53.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x53.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x53.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x53.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x53.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x53.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x53.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x53.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x53.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x53.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x53.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x53.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x53.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x53.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x53.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x53.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x53.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x53.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x53.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x53.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x53.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL2// Port 1 Port Select 2 Register = GPIO_MSP430G2x53.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x53.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x53.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x53.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x53.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P2SEL2// Port 2 Port Select 2 Register = GPIO_MSP430G2x53.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430G2x53.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430G2x53.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430G2x53.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430G2x53.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL2// Port 3 Port Select 2 Register = GPIO_MSP430G2x53.GpioBits8PxSel2_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x53.DevicePinFunctionSetting_t[8][3] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x53 device, there are 3 x 8 = 24 pins total = GPIO_MSP430G2x53.DevicePin_t[8][3] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x53.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3SEL2",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x53.create// Create an instance-object(ADC10.Instance adc10, IComparator.Instance comparator, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x53.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x53.Bit0_t
    const GPIO_MSP430G2x53.BIT0_OFF;
    const GPIO_MSP430G2x53.BIT0;
enum GPIO_MSP430G2x53.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x53.Bit1_t
    const GPIO_MSP430G2x53.BIT1_OFF;
    const GPIO_MSP430G2x53.BIT1;
enum GPIO_MSP430G2x53.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x53.Bit2_t
    const GPIO_MSP430G2x53.BIT2_OFF;
    const GPIO_MSP430G2x53.BIT2;
enum GPIO_MSP430G2x53.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x53.Bit3_t
    const GPIO_MSP430G2x53.BIT3_OFF;
    const GPIO_MSP430G2x53.BIT3;
enum GPIO_MSP430G2x53.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x53.Bit4_t
    const GPIO_MSP430G2x53.BIT4_OFF;
    const GPIO_MSP430G2x53.BIT4;
enum GPIO_MSP430G2x53.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x53.Bit5_t
    const GPIO_MSP430G2x53.BIT5_OFF;
    const GPIO_MSP430G2x53.BIT5;
enum GPIO_MSP430G2x53.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x53.Bit6_t
    const GPIO_MSP430G2x53.BIT6_OFF;
    const GPIO_MSP430G2x53.BIT6;
enum GPIO_MSP430G2x53.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x53.Bit7_t
    const GPIO_MSP430G2x53.BIT7_OFF;
    const GPIO_MSP430G2x53.BIT7;
enum GPIO_MSP430G2x53.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x53.InterruptEnable_t
    const GPIO_MSP430G2x53.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x53.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x53.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x53.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x53.OutputState_t
    const GPIO_MSP430G2x53.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x53.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x53.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x53.ResEnable_t
    const GPIO_MSP430G2x53.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x53.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x53.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x53.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x53.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x53.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x53.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x53.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x53.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x53.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x53.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x53.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x53.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x53.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x53.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x53.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x53.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x53.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x53.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x53.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x53.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x53.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x53.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x53.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x53.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x53.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x53.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x53.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x53.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x53.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x53.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x53.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x53.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x53.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL2 = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    // Port 1 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x53.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x53.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x53.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P2SEL2 = GPIO_MSP430G2x53.GpioBits8PxSel2_t {
    // Port 2 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3DIR = GPIO_MSP430G2x53.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430G2x53.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430G2x53.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL2 = GPIO_MSP430G2x53.GpioBits8PxSel2_t {
    // Port 3 Port Select 2 Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x53.DevicePinFunctionSetting_t[8][3] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x53.DevicePin_t[8][3] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x53 device, there are 3 x 8 = 24 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x53.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3SEL2",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x53.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1DIR = GPIO_MSP430G2x53.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1OUT = GPIO_MSP430G2x53.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1REN = GPIO_MSP430G2x53.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1SEL = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P1SEL2 // instance
index URL

Port 1 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P1SEL2 = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2DIR = GPIO_MSP430G2x53.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2OUT = GPIO_MSP430G2x53.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2REN = GPIO_MSP430G2x53.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2SEL = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x53.Params.P2SEL2 // instance
index URL

Port 2 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P2SEL2 = GPIO_MSP430G2x53.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3DIR = GPIO_MSP430G2x53.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3OUT = GPIO_MSP430G2x53.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3REN = GPIO_MSP430G2x53.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3SEL = GPIO_MSP430G2x53.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P3SEL2 // instance
index URL

Port 3 Port Select 2 Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P3SEL2 = GPIO_MSP430G2x53.GpioBits8PxSel2_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x53.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.devicePinSetting = GPIO_MSP430G2x53.DevicePinFunctionSetting_t[8][3] undefined;
config GPIO_MSP430G2x53.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x53 device, there are 3 x 8 = 24 pins total

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.devicePins = GPIO_MSP430G2x53.DevicePin_t[8][3] undefined;
config GPIO_MSP430G2x53.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x53.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3SEL2",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    }
];
config GPIO_MSP430G2x53.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x53.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x53.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x53.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x53.create(ADC10.Instance adc10, IComparator.Instance comparator, params);
// Create an instance-object
GPIO_MSP430G2x53.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x53.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x53.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x53.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x53.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x53.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:59 GMT


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x55

metaonly module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x55
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio/GPIO_MSP430G2x55.xdc
var GPIO_MSP430G2x55 = xdc.useModule('ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x55');
module-wide constants & types
    values of type GPIO_MSP430G2x55.Bit0_t// GPIO Bit 0 Definitions
        const GPIO_MSP430G2x55.BIT0_OFF;
        const GPIO_MSP430G2x55.BIT0;
    values of type GPIO_MSP430G2x55.Bit1_t//
        const GPIO_MSP430G2x55.BIT1_OFF;
        const GPIO_MSP430G2x55.BIT1;
    values of type GPIO_MSP430G2x55.Bit2_t//
        const GPIO_MSP430G2x55.BIT2_OFF;
        const GPIO_MSP430G2x55.BIT2;
    values of type GPIO_MSP430G2x55.Bit3_t//
        const GPIO_MSP430G2x55.BIT3_OFF;
        const GPIO_MSP430G2x55.BIT3;
    values of type GPIO_MSP430G2x55.Bit4_t//
        const GPIO_MSP430G2x55.BIT4_OFF;
        const GPIO_MSP430G2x55.BIT4;
    values of type GPIO_MSP430G2x55.Bit5_t//
        const GPIO_MSP430G2x55.BIT5_OFF;
        const GPIO_MSP430G2x55.BIT5;
    values of type GPIO_MSP430G2x55.Bit6_t//
        const GPIO_MSP430G2x55.BIT6_OFF;
        const GPIO_MSP430G2x55.BIT6;
    values of type GPIO_MSP430G2x55.Bit7_t//
        const GPIO_MSP430G2x55.BIT7_OFF;
        const GPIO_MSP430G2x55.BIT7;
    values of type GPIO_MSP430G2x55.InterruptEnable_t// Interrupt enables drop down list
        const GPIO_MSP430G2x55.IE_OFF// Disabled;
        const GPIO_MSP430G2x55.IE_FALLING// Interrupt Enabled Falling Edge;
        const GPIO_MSP430G2x55.IE_RISING// Interrupt Enabled Rising Edge;
    values of type GPIO_MSP430G2x55.OutputState_t// Output high or low drop down list
        const GPIO_MSP430G2x55.OUTSTATE_LOW// Output Set Low (Default);
        const GPIO_MSP430G2x55.OUTSTATE_HIGH// Output Set High;
    values of type GPIO_MSP430G2x55.ResEnable_t// Pull-up/down resistor enables drop down list
        const GPIO_MSP430G2x55.PUDRE_OFF// Disabled;
        const GPIO_MSP430G2x55.PUDRE_UP// Pull-Up Resistor;
        const GPIO_MSP430G2x55.PUDRE_DOWN// Pull-Down Resistor;
    var obj = new GPIO_MSP430G2x55.DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor;
        obj.functionIndex// Device Pin Functional Selection = UInt ...
        obj.owner// Current Device Pin Owner = Any ...
        obj.resistorEnable// Pull-up/down Resistor Enable Selection = IGPIO.ResEnable_t ...
        obj.outputDirState// Output Direction State Selection = IGPIO.OutputState_t ...
        obj.interruptEnable// Interrupt Enable State Selection = IGPIO.InterruptEnable_t ...
        obj.outputDirStateEnabled// Enable state for output direction state selection = Bool ...
        obj.inputDirStateEnabled// Enable state for input direction state selection = Bool ...
    var obj = new GPIO_MSP430G2x55.DevicePinFunction_t// Device Pin Functional Descriptor;
        obj.functionName = String[] ...
        obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
    var obj = new GPIO_MSP430G2x55.DevicePin_t// Device Pin Descriptor;
        obj.pinName = String ...
        obj.pinFunction = IGPIO.DevicePinFunction_t ...
    var obj = new GPIO_MSP430G2x55.DeviceRegisterConfig_t// Device Register Configuration Descriptor;
        obj.register = String ...
        obj.bitSetMask = UInt ...
        obj.bitClearMask = UInt ...
    var obj = new GPIO_MSP430G2x55.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register;
        obj.Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register;
        obj.Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register;
        obj.Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register;
        obj.Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxIn_t// Generic GPIO 8-bit Register;
        obj.Bit0// GPIO Input Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Input Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Input Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Input Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Input Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Input Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Input Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Input Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register;
        obj.Bit0// GPIO Output Signal Bit 0 = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Output Signal Bit 1 = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Output Signal Bit 2 = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Output Signal Bit 3 = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Output Signal Bit 4 = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Output Signal Bit 5 = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Output Signal Bit 6 = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Output Signal Bit 7 = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register;
        obj.Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7 Bit = 0: Pullup/pulldown resistor disabled Bit = 1: Pullup/pulldown resistor enabled Set Pullup/down via PxOUT 0 = Down; 1 = Up = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register;
        obj.Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions = IGPIO.Bit0_t ...
        obj.Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions = IGPIO.Bit1_t ...
        obj.Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions = IGPIO.Bit2_t ...
        obj.Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions = IGPIO.Bit3_t ...
        obj.Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions = IGPIO.Bit4_t ...
        obj.Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions = IGPIO.Bit5_t ...
        obj.Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions = IGPIO.Bit6_t ...
        obj.Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions = IGPIO.Bit7_t ...
    var obj = new GPIO_MSP430G2x55.MatchedPortFunction_t// Port Function Enumeration Type;
        obj.port = UInt[] ...
        obj.pin = UInt[] ...
        obj.pinName = String[] ...
        obj.functionIndex = UInt[] ...
        obj.functionName = String[] ...
    var obj = new GPIO_MSP430G2x55.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430G2x55.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430G2x55.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430G2x55.Params// Instance config-params object;
        params.P1DIR// Port 1 Direction Register = GPIO_MSP430G2x55.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IE// Port 1 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IES// Port 1 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1IFG// Port 1 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1OUT// Port 1 Output Register = GPIO_MSP430G2x55.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1REN// Port 1 Resistor Enable Register = GPIO_MSP430G2x55.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P1SEL// Port 1 Port Select Register = GPIO_MSP430G2x55.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2DIR// Port 2 Direction Register = GPIO_MSP430G2x55.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IE// Port 2 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IES// Port 2 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2IFG// Port 2 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2OUT// Port 2 Output Register = GPIO_MSP430G2x55.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2REN// Port 2 Resistor Enable Register = GPIO_MSP430G2x55.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P2SEL// Port 2 Port Select Register = GPIO_MSP430G2x55.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6,
            Bit7: IGPIO.BIT7
        };
        params.P3DIR// Port 3 Direction Register = GPIO_MSP430G2x55.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IE// Port 3 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IES// Port 3 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3IFG// Port 3 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3OUT// Port 3 Output Register = GPIO_MSP430G2x55.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3REN// Port 3 Resistor Enable Register = GPIO_MSP430G2x55.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P3SEL// Port 3 Port Select Register = GPIO_MSP430G2x55.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4DIR// Port 4 Direction Register = GPIO_MSP430G2x55.GpioBits8PxDir_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IE// Port 4 Interrupt Enable Register = IGPIO.GpioBits8PxIe_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IES// Port 4 Interrupt Edge Select Register = IGPIO.GpioBits8PxIes_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4IFG// Port 4 Interrupt Flag Register = IGPIO.GpioBits8PxIfg_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4OUT// Port 4 Output Register = GPIO_MSP430G2x55.GpioBits8PxOut_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4REN// Port 4 Resistor Enable Register = GPIO_MSP430G2x55.GpioBits8PxRen_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.P4SEL// Port 4 Port Select Register = GPIO_MSP430G2x55.GpioBits8PxSel_t {
            Bit0: IGPIO.BIT0_OFF,
            Bit1: IGPIO.BIT1_OFF,
            Bit2: IGPIO.BIT2_OFF,
            Bit3: IGPIO.BIT3_OFF,
            Bit4: IGPIO.BIT4_OFF,
            Bit5: IGPIO.BIT5_OFF,
            Bit6: IGPIO.BIT6_OFF,
            Bit7: IGPIO.BIT7_OFF
        };
        params.devicePinSetting// Implementation of Device Pin Functional Configuration = GPIO_MSP430G2x55.DevicePinFunctionSetting_t[8][4] undefined;
        params.devicePins// Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x55 device, there are 4 x 8 = 64 pins total = GPIO_MSP430G2x55.DevicePin_t[8][4] undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = GPIO_MSP430G2x55.ForceSetDefaultRegister_t[] [
            {
                register: "P1OUT",
                regForceSet: true
            },
            {
                register: "P1SEL",
                regForceSet: false
            },
            {
                register: "P1SEL2",
                regForceSet: false
            },
            {
                register: "P1DIR",
                regForceSet: true
            },
            {
                register: "P1REN",
                regForceSet: false
            },
            {
                register: "P1IES",
                regForceSet: true
            },
            {
                register: "P1IFG",
                regForceSet: true
            },
            {
                register: "P1IE",
                regForceSet: false
            },
            {
                register: "P2OUT",
                regForceSet: true
            },
            {
                register: "P2SEL",
                regForceSet: false
            },
            {
                register: "P2SEL2",
                regForceSet: false
            },
            {
                register: "P2DIR",
                regForceSet: true
            },
            {
                register: "P2REN",
                regForceSet: false
            },
            {
                register: "P2IES",
                regForceSet: true
            },
            {
                register: "P2IFG",
                regForceSet: true
            },
            {
                register: "P2IE",
                regForceSet: false
            },
            {
                register: "P3OUT",
                regForceSet: true
            },
            {
                register: "P3SEL",
                regForceSet: false
            },
            {
                register: "P3SEL2",
                regForceSet: false
            },
            {
                register: "P3DIR",
                regForceSet: true
            },
            {
                register: "P3REN",
                regForceSet: false
            },
            {
                register: "P4OUT",
                regForceSet: true
            },
            {
                register: "P4SEL",
                regForceSet: false
            },
            {
                register: "P4SEL2",
                regForceSet: false
            },
            {
                register: "P4DIR",
                regForceSet: true
            },
            {
                register: "P4REN",
                regForceSet: false
            }
        ];
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430G2x55.create// Create an instance-object(ADC10.Instance adc10, BCSplus.Instance clock, params);
per-instance functions
     inst.findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp) returns IGPIO.MatchedPortFunction_t
     inst.getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin) returns UInt
     inst.getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin) returns Any
     inst.pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp) returns Bool
     inst.setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner) returns Void
     inst.setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner) returns Void
enum GPIO_MSP430G2x55.Bit0_t
index URL

GPIO Bit 0 Definitions

Configuration settings
values of type GPIO_MSP430G2x55.Bit0_t
    const GPIO_MSP430G2x55.BIT0_OFF;
    const GPIO_MSP430G2x55.BIT0;
enum GPIO_MSP430G2x55.Bit1_t
index URL
Configuration settings
values of type GPIO_MSP430G2x55.Bit1_t
    const GPIO_MSP430G2x55.BIT1_OFF;
    const GPIO_MSP430G2x55.BIT1;
enum GPIO_MSP430G2x55.Bit2_t
index URL
Configuration settings
values of type GPIO_MSP430G2x55.Bit2_t
    const GPIO_MSP430G2x55.BIT2_OFF;
    const GPIO_MSP430G2x55.BIT2;
enum GPIO_MSP430G2x55.Bit3_t
index URL
Configuration settings
values of type GPIO_MSP430G2x55.Bit3_t
    const GPIO_MSP430G2x55.BIT3_OFF;
    const GPIO_MSP430G2x55.BIT3;
enum GPIO_MSP430G2x55.Bit4_t
index URL
Configuration settings
values of type GPIO_MSP430G2x55.Bit4_t
    const GPIO_MSP430G2x55.BIT4_OFF;
    const GPIO_MSP430G2x55.BIT4;
enum GPIO_MSP430G2x55.Bit5_t
index URL
Configuration settings
values of type GPIO_MSP430G2x55.Bit5_t
    const GPIO_MSP430G2x55.BIT5_OFF;
    const GPIO_MSP430G2x55.BIT5;
enum GPIO_MSP430G2x55.Bit6_t
index URL
Configuration settings
values of type GPIO_MSP430G2x55.Bit6_t
    const GPIO_MSP430G2x55.BIT6_OFF;
    const GPIO_MSP430G2x55.BIT6;
enum GPIO_MSP430G2x55.Bit7_t
index URL
Configuration settings
values of type GPIO_MSP430G2x55.Bit7_t
    const GPIO_MSP430G2x55.BIT7_OFF;
    const GPIO_MSP430G2x55.BIT7;
enum GPIO_MSP430G2x55.InterruptEnable_t
index URL

Interrupt enables drop down list

Configuration settings
values of type GPIO_MSP430G2x55.InterruptEnable_t
    const GPIO_MSP430G2x55.IE_OFF;
    // Disabled
    const GPIO_MSP430G2x55.IE_FALLING;
    // Interrupt Enabled Falling Edge
    const GPIO_MSP430G2x55.IE_RISING;
    // Interrupt Enabled Rising Edge
enum GPIO_MSP430G2x55.OutputState_t
index URL

Output high or low drop down list

Configuration settings
values of type GPIO_MSP430G2x55.OutputState_t
    const GPIO_MSP430G2x55.OUTSTATE_LOW;
    // Output Set Low (Default)
    const GPIO_MSP430G2x55.OUTSTATE_HIGH;
    // Output Set High
enum GPIO_MSP430G2x55.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

Configuration settings
values of type GPIO_MSP430G2x55.ResEnable_t
    const GPIO_MSP430G2x55.PUDRE_OFF;
    // Disabled
    const GPIO_MSP430G2x55.PUDRE_UP;
    // Pull-Up Resistor
    const GPIO_MSP430G2x55.PUDRE_DOWN;
    // Pull-Down Resistor
struct GPIO_MSP430G2x55.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x55.DevicePinFunctionSetting_t;
    obj.functionIndex = UInt ...
    // Device Pin Functional Selection
    obj.owner = Any ...
    // Current Device Pin Owner
    obj.resistorEnable = IGPIO.ResEnable_t ...
    // Pull-up/down Resistor Enable Selection
    obj.outputDirState = IGPIO.OutputState_t ...
    // Output Direction State Selection
    obj.interruptEnable = IGPIO.InterruptEnable_t ...
    // Interrupt Enable State Selection
    obj.outputDirStateEnabled = Bool ...
    // Enable state for output direction state selection
    obj.inputDirStateEnabled = Bool ...
    // Enable state for input direction state selection
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct GPIO_MSP430G2x55.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x55.DevicePinFunction_t;
    obj.functionName = String[] ...
    obj.functionConfig = IGPIO.DeviceRegisterConfig_t[][] ...
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct GPIO_MSP430G2x55.DevicePin_t
index URL

Device Pin Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x55.DevicePin_t;
    obj.pinName = String ...
    obj.pinFunction = IGPIO.DevicePinFunction_t ...
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct GPIO_MSP430G2x55.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

Configuration settings
var obj = new GPIO_MSP430G2x55.DeviceRegisterConfig_t;
    obj.register = String ...
    obj.bitSetMask = UInt ...
    obj.bitClearMask = UInt ...
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct GPIO_MSP430G2x55.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new GPIO_MSP430G2x55.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct GPIO_MSP430G2x55.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxDir_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
SEE
GpioBits8PxDir_t
struct GPIO_MSP430G2x55.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxIe_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
SEE
GpioBits8PxIe_t
struct GPIO_MSP430G2x55.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxIes_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
SEE
GpioBits8PxIes_t
struct GPIO_MSP430G2x55.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxIfg_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
SEE
GpioBits8PxIfg_t
struct GPIO_MSP430G2x55.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxIn_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Input Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Input Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Input Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Input Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Input Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Input Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Input Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Input Signal Bit 7
SEE
GpioBits8_t
struct GPIO_MSP430G2x55.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxOut_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Output Signal Bit 0
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Output Signal Bit 1
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Output Signal Bit 2
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Output Signal Bit 3
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Output Signal Bit 4
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Output Signal Bit 5
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Output Signal Bit 6
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Output Signal Bit 7
SEE
GpioBits8PxOut_t
struct GPIO_MSP430G2x55.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxRen_t;
    obj.Bit0 = IGPIO.Bit0_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit1 = IGPIO.Bit1_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit2 = IGPIO.Bit2_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit3 = IGPIO.Bit3_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit4 = IGPIO.Bit4_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit5 = IGPIO.Bit5_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit6 = IGPIO.Bit6_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
    obj.Bit7 = IGPIO.Bit7_t ...
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
SEE
GpioBits8PxRen_t
struct GPIO_MSP430G2x55.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxSel2_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel2_t
struct GPIO_MSP430G2x55.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

Configuration settings
var obj = new GPIO_MSP430G2x55.GpioBits8PxSel_t;
    obj.Bit0 = IGPIO.Bit0_t ...
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
    obj.Bit1 = IGPIO.Bit1_t ...
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
    obj.Bit2 = IGPIO.Bit2_t ...
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
    obj.Bit3 = IGPIO.Bit3_t ...
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
    obj.Bit4 = IGPIO.Bit4_t ...
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
    obj.Bit5 = IGPIO.Bit5_t ...
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
    obj.Bit6 = IGPIO.Bit6_t ...
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
    obj.Bit7 = IGPIO.Bit7_t ...
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
SEE
GpioBits8PxSel_t
struct GPIO_MSP430G2x55.MatchedPortFunction_t
index URL

Port Function Enumeration Type

Configuration settings
var obj = new GPIO_MSP430G2x55.MatchedPortFunction_t;
    obj.port = UInt[] ...
    obj.pin = UInt[] ...
    obj.pinName = String[] ...
    obj.functionIndex = UInt[] ...
    obj.functionName = String[] ...
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct GPIO_MSP430G2x55.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430G2x55.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430G2x55.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430G2x55.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430G2x55.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430G2x55.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
// Instance config-params object
    params.P1DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    // Port 1 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IE = IGPIO.GpioBits8PxIe_t {
    // Port 1 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IES = IGPIO.GpioBits8PxIes_t {
    // Port 1 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 1 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    // Port 1 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    // Port 1 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P1SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    // Port 1 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    // Port 2 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IE = IGPIO.GpioBits8PxIe_t {
    // Port 2 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IES = IGPIO.GpioBits8PxIes_t {
    // Port 2 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 2 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    // Port 2 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    // Port 2 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P2SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    // Port 2 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6,
        Bit7: IGPIO.BIT7
    };
    params.P3DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    // Port 3 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IE = IGPIO.GpioBits8PxIe_t {
    // Port 3 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IES = IGPIO.GpioBits8PxIes_t {
    // Port 3 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 3 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    // Port 3 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    // Port 3 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P3SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    // Port 3 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    // Port 4 Direction Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IE = IGPIO.GpioBits8PxIe_t {
    // Port 4 Interrupt Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IES = IGPIO.GpioBits8PxIes_t {
    // Port 4 Interrupt Edge Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    // Port 4 Interrupt Flag Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    // Port 4 Output Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    // Port 4 Resistor Enable Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.P4SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    // Port 4 Port Select Register
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    params.devicePinSetting = GPIO_MSP430G2x55.DevicePinFunctionSetting_t[8][4] undefined;
    // Implementation of Device Pin Functional Configuration
    params.devicePins = GPIO_MSP430G2x55.DevicePin_t[8][4] undefined;
    // Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x55 device, there are 4 x 8 = 64 pins total
    params.forceSetDefaultRegister = GPIO_MSP430G2x55.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "P1OUT",
            regForceSet: true
        },
        {
            register: "P1SEL",
            regForceSet: false
        },
        {
            register: "P1SEL2",
            regForceSet: false
        },
        {
            register: "P1DIR",
            regForceSet: true
        },
        {
            register: "P1REN",
            regForceSet: false
        },
        {
            register: "P1IES",
            regForceSet: true
        },
        {
            register: "P1IFG",
            regForceSet: true
        },
        {
            register: "P1IE",
            regForceSet: false
        },
        {
            register: "P2OUT",
            regForceSet: true
        },
        {
            register: "P2SEL",
            regForceSet: false
        },
        {
            register: "P2SEL2",
            regForceSet: false
        },
        {
            register: "P2DIR",
            regForceSet: true
        },
        {
            register: "P2REN",
            regForceSet: false
        },
        {
            register: "P2IES",
            regForceSet: true
        },
        {
            register: "P2IFG",
            regForceSet: true
        },
        {
            register: "P2IE",
            regForceSet: false
        },
        {
            register: "P3OUT",
            regForceSet: true
        },
        {
            register: "P3SEL",
            regForceSet: false
        },
        {
            register: "P3SEL2",
            regForceSet: false
        },
        {
            register: "P3DIR",
            regForceSet: true
        },
        {
            register: "P3REN",
            regForceSet: false
        },
        {
            register: "P4OUT",
            regForceSet: true
        },
        {
            register: "P4SEL",
            regForceSet: false
        },
        {
            register: "P4SEL2",
            regForceSet: false
        },
        {
            register: "P4DIR",
            regForceSet: true
        },
        {
            register: "P4REN",
            regForceSet: false
        }
    ];
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430G2x55.Params.P1DIR // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P1DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P1IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P1IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P1IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P1OUT // instance
index URL

Port 1 Output Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P1OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P1REN // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P1REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P1SEL // instance
index URL

Port 1 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P1SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P2DIR // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P2DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P2IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P2IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P2IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P2OUT // instance
index URL

Port 2 Output Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P2OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P2REN // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P2REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P2SEL // instance
index URL

Port 2 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P2SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6,
    Bit7: IGPIO.BIT7
};
config GPIO_MSP430G2x55.Params.P3DIR // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P3DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P3IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P3IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P3IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P3OUT // instance
index URL

Port 3 Output Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P3OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P3REN // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P3REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P3SEL // instance
index URL

Port 3 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P3SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P4DIR // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P4DIR = GPIO_MSP430G2x55.GpioBits8PxDir_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P4IE = IGPIO.GpioBits8PxIe_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P4IES = IGPIO.GpioBits8PxIes_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P4IFG = IGPIO.GpioBits8PxIfg_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P4OUT // instance
index URL

Port 4 Output Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P4OUT = GPIO_MSP430G2x55.GpioBits8PxOut_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P4REN // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P4REN = GPIO_MSP430G2x55.GpioBits8PxRen_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.P4SEL // instance
index URL

Port 4 Port Select Register

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.P4SEL = GPIO_MSP430G2x55.GpioBits8PxSel_t {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config GPIO_MSP430G2x55.Params.devicePinSetting // instance
index URL

Implementation of Device Pin Functional Configuration

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.devicePinSetting = GPIO_MSP430G2x55.DevicePinFunctionSetting_t[8][4] undefined;
config GPIO_MSP430G2x55.Params.devicePins // instance
index URL

Define an array to describe all device pins. The 1st dimension denotes the port, the second the pin on that port. On an MSP430G2x55 device, there are 4 x 8 = 64 pins total

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.devicePins = GPIO_MSP430G2x55.DevicePin_t[8][4] undefined;
config GPIO_MSP430G2x55.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
const params.forceSetDefaultRegister = GPIO_MSP430G2x55.ForceSetDefaultRegister_t[] [
    {
        register: "P1OUT",
        regForceSet: true
    },
    {
        register: "P1SEL",
        regForceSet: false
    },
    {
        register: "P1SEL2",
        regForceSet: false
    },
    {
        register: "P1DIR",
        regForceSet: true
    },
    {
        register: "P1REN",
        regForceSet: false
    },
    {
        register: "P1IES",
        regForceSet: true
    },
    {
        register: "P1IFG",
        regForceSet: true
    },
    {
        register: "P1IE",
        regForceSet: false
    },
    {
        register: "P2OUT",
        regForceSet: true
    },
    {
        register: "P2SEL",
        regForceSet: false
    },
    {
        register: "P2SEL2",
        regForceSet: false
    },
    {
        register: "P2DIR",
        regForceSet: true
    },
    {
        register: "P2REN",
        regForceSet: false
    },
    {
        register: "P2IES",
        regForceSet: true
    },
    {
        register: "P2IFG",
        regForceSet: true
    },
    {
        register: "P2IE",
        regForceSet: false
    },
    {
        register: "P3OUT",
        regForceSet: true
    },
    {
        register: "P3SEL",
        regForceSet: false
    },
    {
        register: "P3SEL2",
        regForceSet: false
    },
    {
        register: "P3DIR",
        regForceSet: true
    },
    {
        register: "P3REN",
        regForceSet: false
    },
    {
        register: "P4OUT",
        regForceSet: true
    },
    {
        register: "P4SEL",
        regForceSet: false
    },
    {
        register: "P4SEL2",
        regForceSet: false
    },
    {
        register: "P4DIR",
        regForceSet: true
    },
    {
        register: "P4REN",
        regForceSet: false
    }
];
config GPIO_MSP430G2x55.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430G2x55.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430G2x55.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430G2x55.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430G2x55.create(ADC10.Instance adc10, BCSplus.Instance clock, params);
// Create an instance-object
GPIO_MSP430G2x55.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

Configuration settings
inst.findPinsForFunction(String regExp) returns IGPIO.MatchedPortFunction_t
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
GPIO_MSP430G2x55.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

Configuration settings
inst.getPinFunctionIndex(UInt port, UInt pin) returns UInt
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
GPIO_MSP430G2x55.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

Configuration settings
inst.getPinOwner(UInt port, UInt pin) returns Any
GPIO_MSP430G2x55.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

Configuration settings
inst.pinFunctionIsActive(UInt port, UInt pin, String regExp) returns Bool
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
GPIO_MSP430G2x55.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

Configuration settings
inst.setDefaultPinFunction(UInt port, UInt pin, Any owner) returns Void
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
GPIO_MSP430G2x55.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

Configuration settings
inst.setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner) returns Void
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:59 GMT


interface ti.catalog.msp430.peripherals.gpio.IGPIO

metaonly interface ti.catalog.msp430.peripherals.gpio.IGPIO
index URL

MSP430 General Purpose Input Output Ports

XDCspec summary sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly interface IGPIO { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
package ti.catalog.msp430.peripherals.gpio;
metaonly interface IGPIO inherits IPeripheral {
module-wide constants & types
    enum Bit0_t// GPIO Bit 0 Definitions {
         BIT0_OFF,
         BIT0
    };
    enum Bit1_t// {
         BIT1_OFF,
         BIT1
    };
    enum Bit2_t// {
         BIT2_OFF,
         BIT2
    };
    enum Bit3_t// {
         BIT3_OFF,
         BIT3
    };
    enum Bit4_t// {
         BIT4_OFF,
         BIT4
    };
    enum Bit5_t// {
         BIT5_OFF,
         BIT5
    };
    enum Bit6_t// {
         BIT6_OFF,
         BIT6
    };
    enum Bit7_t// {
         BIT7_OFF,
         BIT7
    };
    enum InterruptEnable_t// Interrupt enables drop down list {
         IE_OFF// Disabled,
         IE_FALLING// Interrupt Enabled Falling Edge,
         IE_RISING// Interrupt Enabled Rising Edge
    };
    enum OutputState_t// Output high or low drop down list {
         OUTSTATE_LOW// Output Set Low (Default),
         OUTSTATE_HIGH// Output Set High
    };
    enum ResEnable_t// Pull-up/down resistor enables drop down list {
         PUDRE_OFF// Disabled,
         PUDRE_UP// Pull-Up Resistor,
         PUDRE_DOWN// Pull-Down Resistor
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct DevicePinFunctionSetting_t// Device Pin Functional Setting Descriptor {
        UInt functionIndex// Device Pin Functional Selection;
        Any owner// Current Device Pin Owner;
         IGPIO.ResEnable_t resistorEnable// Pull-up/down Resistor Enable Selection;
         IGPIO.OutputState_t outputDirState// Output Direction State Selection;
         IGPIO.InterruptEnable_t interruptEnable// Interrupt Enable State Selection;
        Bool outputDirStateEnabled// Enable state for output direction state selection;
        Bool inputDirStateEnabled// Enable state for input direction state selection;
    };
    metaonly struct DevicePinFunction_t// Device Pin Functional Descriptor {
        String functionName[];
         IGPIO.DeviceRegisterConfig_t functionConfig[][];
    };
    metaonly struct DevicePin_t// Device Pin Descriptor {
        String pinName;
         IGPIO.DevicePinFunction_t pinFunction;
    };
    metaonly struct DeviceRegisterConfig_t// Device Register Configuration Descriptor {
        String register;
        UInt bitSetMask;
        UInt bitClearMask;
    };
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct GpioBits8PxDir_t// Generic GPIO 8-bit PxDIR Register {
         IGPIO.Bit0_t Bit0// GPIO Select Direction Bit 0 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
         IGPIO.Bit1_t Bit1// GPIO Select Direction Bit 1 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
         IGPIO.Bit2_t Bit2// GPIO Select Direction Bit 2 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
         IGPIO.Bit3_t Bit3// GPIO Select Direction Bit 3 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
         IGPIO.Bit4_t Bit4// GPIO Select Direction Bit 4 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
         IGPIO.Bit5_t Bit5// GPIO Select Direction Bit 5 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
         IGPIO.Bit6_t Bit6// GPIO Select Direction Bit 6 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
         IGPIO.Bit7_t Bit7// GPIO Select Direction Bit 7 Bit = 0: The port pin is switched to input direction Bit = 1: The port pin is switched to output direction;
    };
    metaonly struct GpioBits8PxIe_t// Generic GPIO 8-bit PxIE Register {
         IGPIO.Bit0_t Bit0// GPIO Interrupt Enable Bit 0 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
         IGPIO.Bit1_t Bit1// GPIO Interrupt Enable Bit 1 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
         IGPIO.Bit2_t Bit2// GPIO Interrupt Enable Bit 2 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
         IGPIO.Bit3_t Bit3// GPIO Interrupt Enable Bit 3 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
         IGPIO.Bit4_t Bit4// GPIO Interrupt Enable Bit 4 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
         IGPIO.Bit5_t Bit5// GPIO Interrupt Enable Bit 5 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
         IGPIO.Bit6_t Bit6// GPIO Interrupt Enable Bit 6 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
         IGPIO.Bit7_t Bit7// GPIO Interrupt Enable Bit 7 Bit = 0: The interrupt is disabled. Bit = 1: The interrupt is enabled;
    };
    metaonly struct GpioBits8PxIes_t// Generic GPIO 8-bit PxIES Register {
         IGPIO.Bit0_t Bit0// GPIO Select Interrupt Edge Bit 0 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
         IGPIO.Bit1_t Bit1// GPIO Select Interrupt Edge Bit 1 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
         IGPIO.Bit2_t Bit2// GPIO Select Interrupt Edge Bit 2 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
         IGPIO.Bit3_t Bit3// GPIO Select Interrupt Edge Bit 3 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
         IGPIO.Bit4_t Bit4// GPIO Select Interrupt Edge Bit 4 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
         IGPIO.Bit5_t Bit5// GPIO Select Interrupt Edge Bit 5 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
         IGPIO.Bit6_t Bit6// GPIO Select Interrupt Edge Bit 6 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
         IGPIO.Bit7_t Bit7// GPIO Select Interrupt Edge Bit 7 Bit = 0: The PxIFGx flag is set with a low-to-high transition Bit = 1: The PxIFGx flag is set with a high-to-low transition;
    };
    metaonly struct GpioBits8PxIfg_t// Generic GPIO 8-bit PxIFG Register {
         IGPIO.Bit0_t Bit0// GPIO Interrupt Flag Bit 0 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
         IGPIO.Bit1_t Bit1// GPIO Interrupt Flag Bit 1 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
         IGPIO.Bit2_t Bit2// GPIO Interrupt Flag Bit 2 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
         IGPIO.Bit3_t Bit3// GPIO Interrupt Flag Bit 3 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
         IGPIO.Bit4_t Bit4// GPIO Interrupt Flag Bit 4 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
         IGPIO.Bit5_t Bit5// GPIO Interrupt Flag Bit 5 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
         IGPIO.Bit6_t Bit6// GPIO Interrupt Flag Bit 6 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
         IGPIO.Bit7_t Bit7// GPIO Interrupt Flag Bit 7 Bit = 0: No interrupt is pending Bit = 1: An interrupt is pending;
    };
    metaonly struct GpioBits8PxIn_t// Generic GPIO 8-bit Register {
         IGPIO.Bit0_t Bit0// GPIO Input Signal Bit 0;
         IGPIO.Bit1_t Bit1// GPIO Input Signal Bit 1;
         IGPIO.Bit2_t Bit2// GPIO Input Signal Bit 2;
         IGPIO.Bit3_t Bit3// GPIO Input Signal Bit 3;
         IGPIO.Bit4_t Bit4// GPIO Input Signal Bit 4;
         IGPIO.Bit5_t Bit5// GPIO Input Signal Bit 5;
         IGPIO.Bit6_t Bit6// GPIO Input Signal Bit 6;
         IGPIO.Bit7_t Bit7// GPIO Input Signal Bit 7;
    };
    metaonly struct GpioBits8PxOut_t// Generic GPIO 8-bit PxOUT Register {
         IGPIO.Bit0_t Bit0// GPIO Output Signal Bit 0;
         IGPIO.Bit1_t Bit1// GPIO Output Signal Bit 1;
         IGPIO.Bit2_t Bit2// GPIO Output Signal Bit 2;
         IGPIO.Bit3_t Bit3// GPIO Output Signal Bit 3;
         IGPIO.Bit4_t Bit4// GPIO Output Signal Bit 4;
         IGPIO.Bit5_t Bit5// GPIO Output Signal Bit 5;
         IGPIO.Bit6_t Bit6// GPIO Output Signal Bit 6;
         IGPIO.Bit7_t Bit7// GPIO Output Signal Bit 7;
    };
    metaonly struct GpioBits8PxRen_t// Generic GPIO 8-bit PxREN Register {
       IGPIO.Bit0_t Bit0// GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
       IGPIO.Bit1_t Bit1// GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
       IGPIO.Bit2_t Bit2// GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
       IGPIO.Bit3_t Bit3// GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
       IGPIO.Bit4_t Bit4// GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
       IGPIO.Bit5_t Bit5// GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
       IGPIO.Bit6_t Bit6// GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
       IGPIO.Bit7_t Bit7// GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up;
    };
    metaonly struct GpioBits8PxSel2_t// Generic GPIO 8-bit PxSEL2 Register {
         IGPIO.Bit0_t Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit1_t Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit2_t Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit3_t Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit4_t Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit5_t Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit6_t Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit7_t Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions;
    };
    metaonly struct GpioBits8PxSel_t// Generic GPIO 8-bit PxSEL Register {
         IGPIO.Bit0_t Bit0// GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit1_t Bit1// GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit2_t Bit2// GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit3_t Bit3// GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit4_t Bit4// GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit5_t Bit5// GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit6_t Bit6// GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions;
         IGPIO.Bit7_t Bit7// GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions;
    };
    metaonly struct MatchedPortFunction_t// Port Function Enumeration Type {
        UInt port[];
        UInt pin[];
        String pinName[];
        UInt functionIndex[];
        String functionName[];
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config IGPIO.GpioBits8PxIe_t P1IE// Port 1 Interrupt Enable Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIes_t P1IES// Port 1 Interrupt Edge Select Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIfg_t P1IFG// Port 1 Interrupt Flag Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIe_t P2IE// Port 2 Interrupt Enable Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIes_t P2IES// Port 2 Interrupt Edge Select Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIfg_t P2IFG// Port 2 Interrupt Flag Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIe_t P3IE// Port 3 Interrupt Enable Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIes_t P3IES// Port 3 Interrupt Edge Select Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIfg_t P3IFG// Port 3 Interrupt Flag Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIe_t P4IE// Port 4 Interrupt Enable Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIes_t P4IES// Port 4 Interrupt Edge Select Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.GpioBits8PxIfg_t P4IFG// Port 4 Interrupt Flag Register = {
        Bit0: IGPIO.BIT0_OFF,
        Bit1: IGPIO.BIT1_OFF,
        Bit2: IGPIO.BIT2_OFF,
        Bit3: IGPIO.BIT3_OFF,
        Bit4: IGPIO.BIT4_OFF,
        Bit5: IGPIO.BIT5_OFF,
        Bit6: IGPIO.BIT6_OFF,
        Bit7: IGPIO.BIT7_OFF
    };
    config IGPIO.DevicePinFunctionSetting_t devicePinSetting// Forward Declaration of Device Pin Functional Configuration[][];
    config IGPIO.regIntVect_t interruptSource// GPIO interrupt source[32];
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
     IGPIO.MatchedPortFunction_t findPinsForFunction// Identify all device pins that can be used to serve a certain purpose(String regExp);
    UInt getPinFunctionIndex// Get a pin's current functional configuration(UInt port, UInt pin);
    Any getPinOwner// This function returns the current owner of the specified device pin(UInt port, UInt pin);
    Bool pinFunctionIsActive// Check if a pin is enabled for a certain function(UInt port, UInt pin, String regExp);
    Void setDefaultPinFunction// Configure a device pin to its default state(UInt port, UInt pin, Any owner);
    Void setPinFunctionUsingIndex// Configure a device pin to a specific peripheral function(UInt port, UInt pin, UInt index, Any owner);
}
enum IGPIO.Bit0_t
index URL

GPIO Bit 0 Definitions

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit0_t {
    BIT0_OFF,
    BIT0
};
enum IGPIO.Bit1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit1_t {
    BIT1_OFF,
    BIT1
};
enum IGPIO.Bit2_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit2_t {
    BIT2_OFF,
    BIT2
};
enum IGPIO.Bit3_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit3_t {
    BIT3_OFF,
    BIT3
};
enum IGPIO.Bit4_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit4_t {
    BIT4_OFF,
    BIT4
};
enum IGPIO.Bit5_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit5_t {
    BIT5_OFF,
    BIT5
};
enum IGPIO.Bit6_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit6_t {
    BIT6_OFF,
    BIT6
};
enum IGPIO.Bit7_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum Bit7_t {
    BIT7_OFF,
    BIT7
};
enum IGPIO.InterruptEnable_t
index URL

Interrupt enables drop down list

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum InterruptEnable_t {
    IE_OFF,
    // Disabled
    IE_FALLING,
    // Interrupt Enabled Falling Edge
    IE_RISING
    // Interrupt Enabled Rising Edge
};
enum IGPIO.OutputState_t
index URL

Output high or low drop down list

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum OutputState_t {
    OUTSTATE_LOW,
    // Output Set Low (Default)
    OUTSTATE_HIGH
    // Output Set High
};
enum IGPIO.ResEnable_t
index URL

Pull-up/down resistor enables drop down list

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
enum ResEnable_t {
    PUDRE_OFF,
    // Disabled
    PUDRE_UP,
    // Pull-Up Resistor
    PUDRE_DOWN
    // Pull-Down Resistor
};
typedef IGPIO.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IGPIO.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
typedef String StringArray[];
struct IGPIO.DevicePinFunctionSetting_t
index URL

Device Pin Functional Setting Descriptor

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct DevicePinFunctionSetting_t {
    UInt functionIndex;
    // Device Pin Functional Selection
    Any owner;
    // Current Device Pin Owner
     IGPIO.ResEnable_t resistorEnable;
    // Pull-up/down Resistor Enable Selection
     IGPIO.OutputState_t outputDirState;
    // Output Direction State Selection
     IGPIO.InterruptEnable_t interruptEnable;
    // Interrupt Enable State Selection
    Bool outputDirStateEnabled;
    // Enable state for output direction state selection
    Bool inputDirStateEnabled;
    // Enable state for input direction state selection
};
DETAILS
Type to store the selected pin configuration and a reference to the object that last modified the configuration.
SEE
DevicePinFunctionSetting_t
struct IGPIO.DevicePinFunction_t
index URL

Device Pin Functional Descriptor

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct DevicePinFunction_t {
    String functionName[];
     IGPIO.DeviceRegisterConfig_t functionConfig[][];
};
DETAILS
Type to describe how a device pin is configured for all its different uses that are possible. The function names are consolidated in one String array rather than located together with the function- specific data to allow easier access by Grace widgets. The functionConfig member contains an arbitrary-length array describing all register settings that need to be performed to configure a certain function.
SEE
DevicePinFunction_t
struct IGPIO.DevicePin_t
index URL

Device Pin Descriptor

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct DevicePin_t {
    String pinName;
     IGPIO.DevicePinFunction_t pinFunction;
};
DETAILS
Type to describe a single device pin and all its possible configurations.
SEE
DevicePin_t
struct IGPIO.DeviceRegisterConfig_t
index URL

Device Register Configuration Descriptor

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct DeviceRegisterConfig_t {
    String register;
    UInt bitSetMask;
    UInt bitClearMask;
};
DETAILS
Type to describe how a register is configured for a particular use. The type allows setting and clearing of an arbitrary bit pattern inside the specified register.
SEE
DeviceRegisterConfig_t
struct IGPIO.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IGPIO.GpioBits8PxDir_t
index URL

Generic GPIO 8-bit PxDIR Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxDir_t {
     IGPIO.Bit0_t Bit0;
  // GPIO Select Direction Bit 0
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
     IGPIO.Bit1_t Bit1;
  // GPIO Select Direction Bit 1
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
     IGPIO.Bit2_t Bit2;
  // GPIO Select Direction Bit 2
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
     IGPIO.Bit3_t Bit3;
  // GPIO Select Direction Bit 3
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
     IGPIO.Bit4_t Bit4;
  // GPIO Select Direction Bit 4
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
     IGPIO.Bit5_t Bit5;
  // GPIO Select Direction Bit 5
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
     IGPIO.Bit6_t Bit6;
  // GPIO Select Direction Bit 6
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
     IGPIO.Bit7_t Bit7;
  // GPIO Select Direction Bit 7
Bit = 0: The port pin is switched to input direction
Bit = 1: The port pin is switched to output direction
};
SEE
GpioBits8PxDir_t
struct IGPIO.GpioBits8PxIe_t
index URL

Generic GPIO 8-bit PxIE Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxIe_t {
     IGPIO.Bit0_t Bit0;
  // GPIO Interrupt Enable Bit 0
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
     IGPIO.Bit1_t Bit1;
  // GPIO Interrupt Enable Bit 1
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
     IGPIO.Bit2_t Bit2;
  // GPIO Interrupt Enable Bit 2
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
     IGPIO.Bit3_t Bit3;
  // GPIO Interrupt Enable Bit 3
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
     IGPIO.Bit4_t Bit4;
  // GPIO Interrupt Enable Bit 4
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
     IGPIO.Bit5_t Bit5;
  // GPIO Interrupt Enable Bit 5
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
     IGPIO.Bit6_t Bit6;
  // GPIO Interrupt Enable Bit 6
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
     IGPIO.Bit7_t Bit7;
  // GPIO Interrupt Enable Bit 7
Bit = 0: The interrupt is disabled.
Bit = 1: The interrupt is enabled
};
SEE
GpioBits8PxIe_t
struct IGPIO.GpioBits8PxIes_t
index URL

Generic GPIO 8-bit PxIES Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxIes_t {
     IGPIO.Bit0_t Bit0;
  // GPIO Select Interrupt Edge Bit 0
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
     IGPIO.Bit1_t Bit1;
  // GPIO Select Interrupt Edge Bit 1
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
     IGPIO.Bit2_t Bit2;
  // GPIO Select Interrupt Edge Bit 2
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
     IGPIO.Bit3_t Bit3;
  // GPIO Select Interrupt Edge Bit 3
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
     IGPIO.Bit4_t Bit4;
  // GPIO Select Interrupt Edge Bit 4
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
     IGPIO.Bit5_t Bit5;
  // GPIO Select Interrupt Edge Bit 5
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
     IGPIO.Bit6_t Bit6;
  // GPIO Select Interrupt Edge Bit 6
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
     IGPIO.Bit7_t Bit7;
  // GPIO Select Interrupt Edge Bit 7
Bit = 0: The PxIFGx flag is set with a low-to-high transition
Bit = 1: The PxIFGx flag is set with a high-to-low transition
};
SEE
GpioBits8PxIes_t
struct IGPIO.GpioBits8PxIfg_t
index URL

Generic GPIO 8-bit PxIFG Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxIfg_t {
     IGPIO.Bit0_t Bit0;
  // GPIO Interrupt Flag Bit 0
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
     IGPIO.Bit1_t Bit1;
  // GPIO Interrupt Flag Bit 1
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
     IGPIO.Bit2_t Bit2;
  // GPIO Interrupt Flag Bit 2
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
     IGPIO.Bit3_t Bit3;
  // GPIO Interrupt Flag Bit 3
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
     IGPIO.Bit4_t Bit4;
  // GPIO Interrupt Flag Bit 4
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
     IGPIO.Bit5_t Bit5;
  // GPIO Interrupt Flag Bit 5
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
     IGPIO.Bit6_t Bit6;
  // GPIO Interrupt Flag Bit 6
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
     IGPIO.Bit7_t Bit7;
  // GPIO Interrupt Flag Bit 7
Bit = 0: No interrupt is pending
Bit = 1: An interrupt is pending
};
SEE
GpioBits8PxIfg_t
struct IGPIO.GpioBits8PxIn_t
index URL

Generic GPIO 8-bit Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxIn_t {
     IGPIO.Bit0_t Bit0;
    // GPIO Input Signal Bit 0
     IGPIO.Bit1_t Bit1;
    // GPIO Input Signal Bit 1
     IGPIO.Bit2_t Bit2;
    // GPIO Input Signal Bit 2
     IGPIO.Bit3_t Bit3;
    // GPIO Input Signal Bit 3
     IGPIO.Bit4_t Bit4;
    // GPIO Input Signal Bit 4
     IGPIO.Bit5_t Bit5;
    // GPIO Input Signal Bit 5
     IGPIO.Bit6_t Bit6;
    // GPIO Input Signal Bit 6
     IGPIO.Bit7_t Bit7;
    // GPIO Input Signal Bit 7
};
SEE
GpioBits8_t
struct IGPIO.GpioBits8PxOut_t
index URL

Generic GPIO 8-bit PxOUT Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxOut_t {
     IGPIO.Bit0_t Bit0;
    // GPIO Output Signal Bit 0
     IGPIO.Bit1_t Bit1;
    // GPIO Output Signal Bit 1
     IGPIO.Bit2_t Bit2;
    // GPIO Output Signal Bit 2
     IGPIO.Bit3_t Bit3;
    // GPIO Output Signal Bit 3
     IGPIO.Bit4_t Bit4;
    // GPIO Output Signal Bit 4
     IGPIO.Bit5_t Bit5;
    // GPIO Output Signal Bit 5
     IGPIO.Bit6_t Bit6;
    // GPIO Output Signal Bit 6
     IGPIO.Bit7_t Bit7;
    // GPIO Output Signal Bit 7
};
SEE
GpioBits8PxOut_t
struct IGPIO.GpioBits8PxRen_t
index URL

Generic GPIO 8-bit PxREN Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxRen_t {
     IGPIO.Bit0_t Bit0;
  // GPIO Enables or Disables Pullup/Pulldown Bit 0
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
     IGPIO.Bit1_t Bit1;
  // GPIO Enables or Disables Pullup/Pulldown Bit 1
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
     IGPIO.Bit2_t Bit2;
  // GPIO Enables or Disables Pullup/Pulldown Bit 2
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
     IGPIO.Bit3_t Bit3;
  // GPIO Enables or Disables Pullup/Pulldown Bit 3
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
     IGPIO.Bit4_t Bit4;
  // GPIO Enables or Disables Pullup/Pulldown Bit 4
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
     IGPIO.Bit5_t Bit5;
  // GPIO Enables or Disables Pullup/Pulldown Bit 5
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
     IGPIO.Bit6_t Bit6;
  // GPIO Enables or Disables Pullup/Pulldown Bit 6
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
     IGPIO.Bit7_t Bit7;
  // GPIO Enables or Disables Pullup/Pulldown Bit 7
Bit = 0: Pullup/pulldown resistor disabled
Bit = 1: Pullup/pulldown resistor enabled
         Set Pullup/down via PxOUT 0 = Down; 1 = Up
};
SEE
GpioBits8PxRen_t
struct IGPIO.GpioBits8PxSel2_t
index URL

Generic GPIO 8-bit PxSEL2 Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxSel2_t {
     IGPIO.Bit0_t Bit0;
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
     IGPIO.Bit1_t Bit1;
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
     IGPIO.Bit2_t Bit2;
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
     IGPIO.Bit3_t Bit3;
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
     IGPIO.Bit4_t Bit4;
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
     IGPIO.Bit5_t Bit5;
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
     IGPIO.Bit6_t Bit6;
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
     IGPIO.Bit7_t Bit7;
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
};
SEE
GpioBits8PxSel2_t
struct IGPIO.GpioBits8PxSel_t
index URL

Generic GPIO 8-bit PxSEL Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct GpioBits8PxSel_t {
     IGPIO.Bit0_t Bit0;
    // GPIO Select Pin Function Bit 0 See the device-specific data sheet to determine pin functions
     IGPIO.Bit1_t Bit1;
    // GPIO Select Pin Function Bit 1 See the device-specific data sheet to determine pin functions
     IGPIO.Bit2_t Bit2;
    // GPIO Select Pin Function Bit 2 See the device-specific data sheet to determine pin functions
     IGPIO.Bit3_t Bit3;
    // GPIO Select Pin Function Bit 3 See the device-specific data sheet to determine pin functions
     IGPIO.Bit4_t Bit4;
    // GPIO Select Pin Function Bit 4 See the device-specific data sheet to determine pin functions
     IGPIO.Bit5_t Bit5;
    // GPIO Select Pin Function Bit 5 See the device-specific data sheet to determine pin functions
     IGPIO.Bit6_t Bit6;
    // GPIO Select Pin Function Bit 6 See the device-specific data sheet to determine pin functions
     IGPIO.Bit7_t Bit7;
    // GPIO Select Pin Function Bit 7 See the device-specific data sheet to determine pin functions
};
SEE
GpioBits8PxSel_t
struct IGPIO.MatchedPortFunction_t
index URL

Port Function Enumeration Type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct MatchedPortFunction_t {
    UInt port[];
    UInt pin[];
    String pinName[];
    UInt functionIndex[];
    String functionName[];
};
DETAILS
This type is used to store a list of applicable pins based on the search criteria when using the function findPinsForFunction().
SEE
MatchedPortFunction_t
struct IGPIO.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IGPIO.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IGPIO.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IGPIO.Params.P1IE // instance
index URL

Port 1 Interrupt Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIe_t P1IE = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P1IES // instance
index URL

Port 1 Interrupt Edge Select Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIes_t P1IES = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P1IFG // instance
index URL

Port 1 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIfg_t P1IFG = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P2IE // instance
index URL

Port 2 Interrupt Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIe_t P2IE = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P2IES // instance
index URL

Port 2 Interrupt Edge Select Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIes_t P2IES = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P2IFG // instance
index URL

Port 2 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIfg_t P2IFG = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P3IE // instance
index URL

Port 3 Interrupt Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIe_t P3IE = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P3IES // instance
index URL

Port 3 Interrupt Edge Select Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIes_t P3IES = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P3IFG // instance
index URL

Port 3 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIfg_t P3IFG = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P4IE // instance
index URL

Port 4 Interrupt Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIe_t P4IE = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P4IES // instance
index URL

Port 4 Interrupt Edge Select Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIes_t P4IES = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.P4IFG // instance
index URL

Port 4 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.GpioBits8PxIfg_t P4IFG = {
    Bit0: IGPIO.BIT0_OFF,
    Bit1: IGPIO.BIT1_OFF,
    Bit2: IGPIO.BIT2_OFF,
    Bit3: IGPIO.BIT3_OFF,
    Bit4: IGPIO.BIT4_OFF,
    Bit5: IGPIO.BIT5_OFF,
    Bit6: IGPIO.BIT6_OFF,
    Bit7: IGPIO.BIT7_OFF
};
config IGPIO.Params.devicePinSetting // instance
index URL

Forward Declaration of Device Pin Functional Configuration

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.DevicePinFunctionSetting_t devicePinSetting[][];
config IGPIO.Params.interruptSource // instance
index URL

GPIO interrupt source

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config IGPIO.regIntVect_t interruptSource[32];
config IGPIO.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IGPIO.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
config String owner;
IGPIO.findPinsForFunction() // instance
index URL

Identify all device pins that can be used to serve a certain purpose

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
IGPIO.MatchedPortFunction_t findPinsForFunction(String regExp);
DETAILS
Function to scan through the pin configuration database to identify a list of device pins matching a regular expression.
IGPIO.getPinFunctionIndex() // instance
index URL

Get a pin's current functional configuration

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
UInt getPinFunctionIndex(UInt port, UInt pin);
DETAILS
This function is used to obtain the current configuration of a given device pin. The returned value can be used as an index to obtain further information from the pin configuration database.
IGPIO.getPinOwner() // instance
index URL

This function returns the current owner of the specified device pin

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
Any getPinOwner(UInt port, UInt pin);
IGPIO.pinFunctionIsActive() // instance
index URL

Check if a pin is enabled for a certain function

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
Bool pinFunctionIsActive(UInt port, UInt pin, String regExp);
DETAILS
This function is used to check if a certain functionality is enabled on a given device pins (returns 'true' in that case).
IGPIO.setDefaultPinFunction() // instance
index URL

Configure a device pin to its default state

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
Void setDefaultPinFunction(UInt port, UInt pin, Any owner);
DETAILS
This function is used to configure a device pin to its default state and is typically used when a peripheral module relinquishes ownership of a pin so that it can be used by other peripheral modules.
IGPIO.setPinFunctionUsingIndex() // instance
index URL

Configure a device pin to a specific peripheral function

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio/IGPIO.xdc
Void setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner);
DETAILS
This function is used to configure a device pin to a specific peripheral function that is identified by an index. The index corresponds to an associated set of configuration parameters stored in the pin configuration database. The owner parameter can be used to protect a pin from being used by somebody else. A pin configuration can only be changed if the current owner is undefined, or of the current owner matches the owner specified as function parameter.
generated on Sun, 25 Nov 2018 22:19:39 GMT


package ti.catalog.msp430.peripherals.gpio_grace3
index URL

MSP430 GPIO Grace3 peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/package.xdc
package ti.catalog.msp430.peripherals.gpio_grace3 [1, 0, 0] {
    interface IGPIO;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5736_32_26_22;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5737_33_27_23;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5738_34_30_28_24_20;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR5739_35_31_29_25_21;
    // MSP430 General Purpose Input Output Ports
    module GPIO_MSP430FR59xx_FR58xx;
    // MSP430 General Purpose Input Output Ports
}
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5736_32_26_22

metaonly module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5736_32_26_22
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio_grace3/GPIO_MSP430FR5736_32_26_22.xdc
var GPIO_MSP430FR5736_32_26_22 = xdc.useModule('ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5736_32_26_22');
module-wide constants & types
    var obj = new GPIO_MSP430FR5736_32_26_22.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5736_32_26_22.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5736_32_26_22.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5736_32_26_22.Params// Instance config-params object;
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numPortInterrupts// = Int 4;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5736_32_26_22.create// Create an instance-object(CS.Instance clock, params);
struct GPIO_MSP430FR5736_32_26_22.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5736_32_26_22.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5736_32_26_22.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5736_32_26_22.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5736_32_26_22.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5736_32_26_22.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
// Instance config-params object
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numPortInterrupts = Int 4;
    //
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5736_32_26_22.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5736_32_26_22.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5736_32_26_22.Params.numPortInterrupts // instance
index URL
Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.numPortInterrupts = Int 4;
config GPIO_MSP430FR5736_32_26_22.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5736_32_26_22.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5736_32_26_22.create(CS.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5737_33_27_23

metaonly module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5737_33_27_23
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio_grace3/GPIO_MSP430FR5737_33_27_23.xdc
var GPIO_MSP430FR5737_33_27_23 = xdc.useModule('ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5737_33_27_23');
module-wide constants & types
    var obj = new GPIO_MSP430FR5737_33_27_23.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5737_33_27_23.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5737_33_27_23.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5737_33_27_23.Params// Instance config-params object;
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numPortInterrupts// = Int 4;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5737_33_27_23.create// Create an instance-object(CS.Instance clock, params);
struct GPIO_MSP430FR5737_33_27_23.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5737_33_27_23.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5737_33_27_23.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5737_33_27_23.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5737_33_27_23.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5737_33_27_23.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
// Instance config-params object
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numPortInterrupts = Int 4;
    //
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5737_33_27_23.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5737_33_27_23.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5737_33_27_23.Params.numPortInterrupts // instance
index URL
Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.numPortInterrupts = Int 4;
config GPIO_MSP430FR5737_33_27_23.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5737_33_27_23.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5737_33_27_23.create(CS.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5738_34_30_28_24_20

metaonly module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5738_34_30_28_24_20
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio_grace3/GPIO_MSP430FR5738_34_30_28_24_20.xdc
var GPIO_MSP430FR5738_34_30_28_24_20 = xdc.useModule('ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5738_34_30_28_24_20');
module-wide constants & types
    var obj = new GPIO_MSP430FR5738_34_30_28_24_20.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5738_34_30_28_24_20.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5738_34_30_28_24_20.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params// Instance config-params object;
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numPortInterrupts// = Int 4;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5738_34_30_28_24_20.create// Create an instance-object(CS.Instance clock, params);
struct GPIO_MSP430FR5738_34_30_28_24_20.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5738_34_30_28_24_20.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5738_34_30_28_24_20.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5738_34_30_28_24_20.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5738_34_30_28_24_20.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5738_34_30_28_24_20.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
// Instance config-params object
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numPortInterrupts = Int 4;
    //
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5738_34_30_28_24_20.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5738_34_30_28_24_20.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5738_34_30_28_24_20.Params.numPortInterrupts // instance
index URL
Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.numPortInterrupts = Int 4;
config GPIO_MSP430FR5738_34_30_28_24_20.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5738_34_30_28_24_20.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5738_34_30_28_24_20.create(CS.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5739_35_31_29_25_21

metaonly module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5739_35_31_29_25_21
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio_grace3/GPIO_MSP430FR5739_35_31_29_25_21.xdc
var GPIO_MSP430FR5739_35_31_29_25_21 = xdc.useModule('ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5739_35_31_29_25_21');
module-wide constants & types
    var obj = new GPIO_MSP430FR5739_35_31_29_25_21.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR5739_35_31_29_25_21.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR5739_35_31_29_25_21.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params// Instance config-params object;
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numPortInterrupts// = Int 4;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR5739_35_31_29_25_21.create// Create an instance-object(CS.Instance clock, params);
struct GPIO_MSP430FR5739_35_31_29_25_21.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR5739_35_31_29_25_21.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR5739_35_31_29_25_21.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR5739_35_31_29_25_21.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR5739_35_31_29_25_21.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR5739_35_31_29_25_21.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
// Instance config-params object
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numPortInterrupts = Int 4;
    //
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR5739_35_31_29_25_21.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR5739_35_31_29_25_21.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR5739_35_31_29_25_21.Params.numPortInterrupts // instance
index URL
Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.numPortInterrupts = Int 4;
config GPIO_MSP430FR5739_35_31_29_25_21.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR5739_35_31_29_25_21.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR5739_35_31_29_25_21.create(CS.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR59xx_FR58xx

metaonly module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR59xx_FR58xx
index URL

MSP430 General Purpose Input Output Ports

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/gpio_grace3/GPIO_MSP430FR59xx_FR58xx.xdc
var GPIO_MSP430FR59xx_FR58xx = xdc.useModule('ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR59xx_FR58xx');
module-wide constants & types
    var obj = new GPIO_MSP430FR59xx_FR58xx.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     GPIO_MSP430FR59xx_FR58xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     GPIO_MSP430FR59xx_FR58xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new GPIO_MSP430FR59xx_FR58xx.Params// Instance config-params object;
        params.interruptSource// GPIO interrupt source = IGPIO.regIntVect_t[32] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numPortInterrupts// = Int 4;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = GPIO_MSP430FR59xx_FR58xx.create// Create an instance-object(CS_A.Instance clock, params);
struct GPIO_MSP430FR59xx_FR58xx.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new GPIO_MSP430FR59xx_FR58xx.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
GPIO_MSP430FR59xx_FR58xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
GPIO_MSP430FR59xx_FR58xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
GPIO_MSP430FR59xx_FR58xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
GPIO_MSP430FR59xx_FR58xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
// Instance config-params object
    params.interruptSource = IGPIO.regIntVect_t[32] undefined;
    // GPIO interrupt source
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numPortInterrupts = Int 4;
    //
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config GPIO_MSP430FR59xx_FR58xx.Params.interruptSource // instance
index URL

GPIO interrupt source

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.interruptSource = IGPIO.regIntVect_t[32] undefined;
config GPIO_MSP430FR59xx_FR58xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config GPIO_MSP430FR59xx_FR58xx.Params.numPortInterrupts // instance
index URL
Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.numPortInterrupts = Int 4;
config GPIO_MSP430FR59xx_FR58xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new GPIO_MSP430FR59xx_FR58xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GPIO_MSP430FR59xx_FR58xx.create(CS_A.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:19 GMT


interface ti.catalog.msp430.peripherals.gpio_grace3.IGPIO

metaonly interface ti.catalog.msp430.peripherals.gpio_grace3.IGPIO
index URL

MSP430 General Purpose Input Output Ports

XDCspec summary sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
metaonly interface IGPIO { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
package ti.catalog.msp430.peripherals.gpio_grace3;
metaonly interface IGPIO inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config IGPIO.regIntVect_t interruptSource// GPIO interrupt source[32];
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IGPIO.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IGPIO.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
typedef String StringArray[];
struct IGPIO.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IGPIO.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IGPIO.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IGPIO.Params.interruptSource // instance
index URL

GPIO interrupt source

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
config IGPIO.regIntVect_t interruptSource[32];
config IGPIO.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IGPIO.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/gpio_grace3/IGPIO.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:19 GMT


package ti.catalog.msp430.peripherals.interrupt
index URL

MSP430 interrupt support

XDCspec declarations sourced in ti/catalog/msp430/peripherals/interrupt/package.xdc
package ti.catalog.msp430.peripherals.interrupt [1, 0, 0] {
    module Interrupt_Controller;
    // MSP430 Interrupt_Controller
}
generated on Sun, 25 Nov 2018 22:19:33 GMT


module ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller

metaonly module ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller
index URL

MSP430 Interrupt_Controller

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/interrupt/Interrupt_Controller.xdc
var Interrupt_Controller = xdc.useModule('ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller');
module-wide functions
     Interrupt_Controller.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Interrupt_Controller.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Interrupt_Controller.Params// Instance config-params object;
        params.baseAddr// = UInt undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numInterrupts// = UInt undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
Interrupt_Controller.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Interrupt_Controller.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Interrupt_Controller.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Interrupt_Controller.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Interrupt_Controller.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    //
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numInterrupts = UInt undefined;
    //
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Interrupt_Controller.Params.baseAddr // instance
index URL
Configuration settings
var params = new Interrupt_Controller.Params;
...
params.baseAddr = UInt undefined;
config Interrupt_Controller.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Interrupt_Controller.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Interrupt_Controller.Params.numInterrupts // instance
index URL
Configuration settings
var params = new Interrupt_Controller.Params;
...
params.numInterrupts = UInt undefined;
config Interrupt_Controller.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Interrupt_Controller.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:19:33 GMT


package ti.catalog.msp430.peripherals.memory
index URL

MSP430 Flash memory peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/package.xdc
requires ti.catalog.msp430.peripherals.clock;
requires ti.catalog.msp430.peripherals.special_function;
package ti.catalog.msp430.peripherals.memory [1, 0, 0] {
    interface IFlash;
    // MSP430 IFlash interface
    module Flash_2xx;
    // MSP430F2xx Family Flash Module
}
generated on Sun, 25 Nov 2018 22:20:02 GMT


module ti.catalog.msp430.peripherals.memory.Flash_2xx

metaonly module ti.catalog.msp430.peripherals.memory.Flash_2xx
index URL

MSP430F2xx Family Flash Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/memory/Flash_2xx.xdc
var Flash_2xx = xdc.useModule('ti.catalog.msp430.peripherals.memory.Flash_2xx');
module-wide constants & types
    values of type Flash_2xx.ACCVIFG_t// Access violation interrupt flag
        const Flash_2xx.ACCVIFG_OFF// No interrupt pending;
        const Flash_2xx.ACCVIFG// Interrupt pending;
    values of type Flash_2xx.BLKWRT_t// Block write mode
        const Flash_2xx.BLKWRT_OFF// Block-write mode is off;
        const Flash_2xx.BLKWRT// Block-write mode is on;
    values of type Flash_2xx.BUSY_t// Busy
        const Flash_2xx.BUSY_OFF// Not Busy;
        const Flash_2xx.BUSY// Busy;
    values of type Flash_2xx.EEIEX_t// Enable Emergency Interrupt Exit
        const Flash_2xx.EEIEX_OFF// Exit interrupt disabled;
        const Flash_2xx.EEIEX// Exit interrupt enabled;
    values of type Flash_2xx.EEI_t// Enable Erase Interrupts
        const Flash_2xx.EEI_OFF// Interrupts during segment erase disabled;
        const Flash_2xx.EEI// Interrupts during segment erase enabled;
    values of type Flash_2xx.EMEX_t// Emergency exit
        const Flash_2xx.EMEX_OFF// No emergency exit;
        const Flash_2xx.EMEX// Emergency exit;
    values of type Flash_2xx.ERASE_t// Erase
        const Flash_2xx.ERASE_OFF// Erase disabled;
        const Flash_2xx.ERASE// Erase enabled;
    values of type Flash_2xx.FAIL_t// Operation failure
        const Flash_2xx.FAIL_OFF// No failure;
        const Flash_2xx.FAIL// Failure;
    values of type Flash_2xx.FN0_t// Flash controller clock divider bit 0
        const Flash_2xx.FN0_OFF// Flash controller clock divider bit 0;
        const Flash_2xx.FN0// Flash controller clock divider bit 0;
    values of type Flash_2xx.FN1_t// Flash controller clock divider bit 1
        const Flash_2xx.FN1_OFF// Flash controller clock divider bit 1;
        const Flash_2xx.FN1// Flash controller clock divider bit 1;
    values of type Flash_2xx.FN2_t// Flash controller clock divider bit 2
        const Flash_2xx.FN2_OFF// Flash controller clock divider bit 2;
        const Flash_2xx.FN2// Flash controller clock divider bit 2;
    values of type Flash_2xx.FN3_t// Flash controller clock divider bit 3
        const Flash_2xx.FN3_OFF// Flash controller clock divider bit 3;
        const Flash_2xx.FN3// Flash controller clock divider bit 3;
    values of type Flash_2xx.FN4_t// Flash controller clock divider bit 4
        const Flash_2xx.FN4_OFF// Flash controller clock divider bit 4;
        const Flash_2xx.FN4// Flash controller clock divider bit 4;
    values of type Flash_2xx.FN5_t// Flash controller clock divider bit 5
        const Flash_2xx.FN5_OFF// Flash controller clock divider bit 5;
        const Flash_2xx.FN5// Flash controller clock divider bit 5;
    values of type Flash_2xx.FSSEL_t//
        const Flash_2xx.FSSEL_0// ACLK;
        const Flash_2xx.FSSEL_1// MCLK;
        const Flash_2xx.FSSEL_2// SMCLK;
    values of type Flash_2xx.FWKEY_t//
        const Flash_2xx.FWKEY_OFF;
        const Flash_2xx.FWKEY;
    values of type Flash_2xx.KEYV_t// Flash security key violation
        const Flash_2xx.KEYV_OFF// FCTLx password was written correctly;
        const Flash_2xx.KEYV// FCTLx password was written incorrectly;
    values of type Flash_2xx.LOCKA_t// SegmentA and Info lock
        const Flash_2xx.LOCKA_OFF// Segment A unlocked and all information memory is erased during a mass erase;
        const Flash_2xx.LOCKA// Segment A locked and all information memory is protected from erasure during a mass erase;
    values of type Flash_2xx.LOCK_t// Lock
        const Flash_2xx.LOCK_OFF// Unlocked;
        const Flash_2xx.LOCK// Locked;
    values of type Flash_2xx.MERAS_t// Mass erase
        const Flash_2xx.MERAS_OFF// Mass erase disabled;
        const Flash_2xx.MERAS// Mass erase enabled;
    values of type Flash_2xx.WAIT_t// Wait
        const Flash_2xx.WAIT_OFF// The flash memory is not ready for the next byte/word write;
        const Flash_2xx.WAIT// The flash memory is ready for the next byte/word write;
    values of type Flash_2xx.WRT_t// Write
        const Flash_2xx.WRT_OFF// Write mode is off;
        const Flash_2xx.WRT// Write mode is on;
    var obj = new Flash_2xx.FCTL1_t// ;
        obj.FWKEY// FCTLx password Always read as 096h. Must be written as 0A5h or a PUC will be generated = Flash_2xx.FWKEY_t ...
        obj.BLKWRT// Block write mode = Flash_2xx.BLKWRT_t ...
        obj.WRT// Write = Flash_2xx.WRT_t ...
        obj.EEIEX// Enable Emergency Interrupt Exit = Flash_2xx.EEIEX_t ...
        obj.EEI// Enable Erase Interrupts = Flash_2xx.EEI_t ...
        obj.MERAS// Mass erase = Flash_2xx.MERAS_t ...
        obj.ERASE// Erase = Flash_2xx.ERASE_t ...
    var obj = new Flash_2xx.FCTL2_t// ;
        obj.FWKEY// FCTLx password Always read as 096h. Must be written as 0A5h or a PUC will be generated = Flash_2xx.FWKEY_t ...
        obj.FSSEL// Flash controller clock source select 00 ACLK 01 MCLK 10 SMCLK 11 SMCLK = Flash_2xx.FSSEL_t ...
        obj.FN5// Flash Controller Clock Divider Bit 5 = Flash_2xx.FN5_t ...
        obj.FN4// Flash Controller Clock Divider Bit 4 = Flash_2xx.FN4_t ...
        obj.FN3// Flash Controller Clock Divider Bit 3 = Flash_2xx.FN3_t ...
        obj.FN2// Flash Controller Clock Divider Bit 2 = Flash_2xx.FN2_t ...
        obj.FN1// Flash Controller Clock Divider Bit 1 = Flash_2xx.FN1_t ...
        obj.FN0// Flash Controller Clock Divider Bit 0 = Flash_2xx.FN0_t ...
    var obj = new Flash_2xx.FCTL3_t// ;
        obj.FWKEY// FCTLx password. Always read as 096h. Must be written as 0A5h or a PUC will be generated = Flash_2xx.FWKEY_t ...
        obj.FAIL// FAIL Bit 7 Operation failure. This bit is set if the fFTG clock source fails, or a flash operation is aborted from an interrupt when EEIEX = 1. FAIL must be reset with software. 0 No failure 1 Failure = Flash_2xx.FAIL_t ...
        obj.LOCKA// SegmentA and Info lock. Write a 1 to this bit to change its state. Writing 0 has no effect. 0 Segment A unlocked and all information memory is erased during a mass erase. 1 Segment A locked and all information memory is protected from erasure during a mass erase = Flash_2xx.LOCKA_t ...
        obj.EMEX// Emergency exit 0 No emergency exit 1 Emergency exit = Flash_2xx.EMEX_t ...
        obj.LOCK// Lock. This bit unlocks the flash memory for writing or erasing. The LOCK bit can be set anytime during a byte/word write or erase operation and the operation will complete normally. In the block write mode if the LOCK bit is set while BLKWRT=WAIT=1, then BLKWRT and WAIT are reset and the mode ends normally. 0 Unlocked 1 Locked = Flash_2xx.LOCK_t ...
        obj.WAIT// Wait. Indicates the flash memory is being written to. 0 The flash memory is not ready for the next byte/word write 1 The flash memory is ready for the next byte/word write = Flash_2xx.WAIT_t ...
        obj.ACCVIFG// Access violation interrupt flag 0 No interrupt pending 1 Interrupt pending = Flash_2xx.ACCVIFG_t ...
        obj.KEYV// Flash security key violation. This bit indicates an incorrect FCTLx password was written to any flash control register and generates a PUC when set. KEYV must be reset with software. 0 FCTLx password was written correctly 1 FCTLx password was written incorrectly = Flash_2xx.KEYV_t ...
        obj.BUSY// Busy. This bit indicates the status of the flash timing generator. 0 Not Busy 1 Busy = Flash_2xx.BUSY_t ...
    var obj = new Flash_2xx.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     Flash_2xx.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Flash_2xx.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Flash_2xx.Params// Instance config-params object;
        params.FCTL1// Flash Memory Control Register 1 = Flash_2xx.FCTL1_t {
            FWKEY: IFlash.FWKEY,
            BLKWRT: IFlash.BLKWRT_OFF,
            WRT: IFlash.WRT_OFF,
            EEIEX: IFlash.EEIEX_OFF,
            EEI: IFlash.EEI_OFF,
            MERAS: IFlash.MERAS_OFF,
            ERASE: IFlash.ERASE_OFF
        };
        params.FCTL2// Flash Memory Control Register 2 = Flash_2xx.FCTL2_t {
            FWKEY: IFlash.FWKEY,
            FSSEL: IFlash.FSSEL_1,
            FN5: IFlash.FN5_OFF,
            FN4: IFlash.FN4_OFF,
            FN3: IFlash.FN3_OFF,
            FN2: IFlash.FN2_OFF,
            FN1: IFlash.FN1,
            FN0: IFlash.FN0_OFF
        };
        params.FCTL3// Flash Memory Control Register 3 = Flash_2xx.FCTL3_t {
            FAIL: IFlash.FAIL_OFF,
            LOCKA: IFlash.LOCKA_OFF,
            EMEX: IFlash.EMEX_OFF,
            LOCK: IFlash.LOCK,
            WAIT: IFlash.WAIT,
            ACCVIFG: IFlash.ACCVIFG_OFF,
            KEYV: IFlash.KEYV_OFF,
            BUSY: IFlash.BUSY_OFF
        };
        params.clock// = IClock.Instance undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Flash_2xx.ForceSetDefaultRegister_t[] [
            {
                register: "FCTL1",
                regForceSet: false
            },
            {
                register: "FCTL2",
                regForceSet: false
            },
            {
                register: "FCTL3",
                regForceSet: false
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
        params.uMaxFtg// Max Flash Timing Generator Value from Datasheet = UInt8 undefined;
        params.uMinFtg// Min Flash Timing Generator Value from Datasheet = UInt8 undefined;
per-instance creation
    var inst = Flash_2xx.create// Create an instance-object(IClock.Instance clock, params);
enum Flash_2xx.ACCVIFG_t
index URL

Access violation interrupt flag

Configuration settings
values of type Flash_2xx.ACCVIFG_t
    const Flash_2xx.ACCVIFG_OFF;
    // No interrupt pending
    const Flash_2xx.ACCVIFG;
    // Interrupt pending
enum Flash_2xx.BLKWRT_t
index URL

Block write mode

Configuration settings
values of type Flash_2xx.BLKWRT_t
    const Flash_2xx.BLKWRT_OFF;
    // Block-write mode is off
    const Flash_2xx.BLKWRT;
    // Block-write mode is on
enum Flash_2xx.BUSY_t
index URL

Busy

Configuration settings
values of type Flash_2xx.BUSY_t
    const Flash_2xx.BUSY_OFF;
    // Not Busy
    const Flash_2xx.BUSY;
    // Busy
enum Flash_2xx.EEIEX_t
index URL

Enable Emergency Interrupt Exit

Configuration settings
values of type Flash_2xx.EEIEX_t
    const Flash_2xx.EEIEX_OFF;
    // Exit interrupt disabled
    const Flash_2xx.EEIEX;
    // Exit interrupt enabled
enum Flash_2xx.EEI_t
index URL

Enable Erase Interrupts

Configuration settings
values of type Flash_2xx.EEI_t
    const Flash_2xx.EEI_OFF;
    // Interrupts during segment erase disabled
    const Flash_2xx.EEI;
    // Interrupts during segment erase enabled
enum Flash_2xx.EMEX_t
index URL

Emergency exit

Configuration settings
values of type Flash_2xx.EMEX_t
    const Flash_2xx.EMEX_OFF;
    // No emergency exit
    const Flash_2xx.EMEX;
    // Emergency exit
enum Flash_2xx.ERASE_t
index URL

Erase

Configuration settings
values of type Flash_2xx.ERASE_t
    const Flash_2xx.ERASE_OFF;
    // Erase disabled
    const Flash_2xx.ERASE;
    // Erase enabled
enum Flash_2xx.FAIL_t
index URL

Operation failure

Configuration settings
values of type Flash_2xx.FAIL_t
    const Flash_2xx.FAIL_OFF;
    // No failure
    const Flash_2xx.FAIL;
    // Failure
enum Flash_2xx.FN0_t
index URL

Flash controller clock divider bit 0

Configuration settings
values of type Flash_2xx.FN0_t
    const Flash_2xx.FN0_OFF;
    // Flash controller clock divider bit 0
    const Flash_2xx.FN0;
    // Flash controller clock divider bit 0
enum Flash_2xx.FN1_t
index URL

Flash controller clock divider bit 1

Configuration settings
values of type Flash_2xx.FN1_t
    const Flash_2xx.FN1_OFF;
    // Flash controller clock divider bit 1
    const Flash_2xx.FN1;
    // Flash controller clock divider bit 1
enum Flash_2xx.FN2_t
index URL

Flash controller clock divider bit 2

Configuration settings
values of type Flash_2xx.FN2_t
    const Flash_2xx.FN2_OFF;
    // Flash controller clock divider bit 2
    const Flash_2xx.FN2;
    // Flash controller clock divider bit 2
enum Flash_2xx.FN3_t
index URL

Flash controller clock divider bit 3

Configuration settings
values of type Flash_2xx.FN3_t
    const Flash_2xx.FN3_OFF;
    // Flash controller clock divider bit 3
    const Flash_2xx.FN3;
    // Flash controller clock divider bit 3
enum Flash_2xx.FN4_t
index URL

Flash controller clock divider bit 4

Configuration settings
values of type Flash_2xx.FN4_t
    const Flash_2xx.FN4_OFF;
    // Flash controller clock divider bit 4
    const Flash_2xx.FN4;
    // Flash controller clock divider bit 4
enum Flash_2xx.FN5_t
index URL

Flash controller clock divider bit 5

Configuration settings
values of type Flash_2xx.FN5_t
    const Flash_2xx.FN5_OFF;
    // Flash controller clock divider bit 5
    const Flash_2xx.FN5;
    // Flash controller clock divider bit 5
enum Flash_2xx.FSSEL_t
index URL
Configuration settings
values of type Flash_2xx.FSSEL_t
    const Flash_2xx.FSSEL_0;
    // ACLK
    const Flash_2xx.FSSEL_1;
    // MCLK
    const Flash_2xx.FSSEL_2;
    // SMCLK
enum Flash_2xx.FWKEY_t
index URL
Configuration settings
values of type Flash_2xx.FWKEY_t
    const Flash_2xx.FWKEY_OFF;
    const Flash_2xx.FWKEY;
enum Flash_2xx.KEYV_t
index URL

Flash security key violation

Configuration settings
values of type Flash_2xx.KEYV_t
    const Flash_2xx.KEYV_OFF;
    // FCTLx password was written correctly
    const Flash_2xx.KEYV;
    // FCTLx password was written incorrectly
enum Flash_2xx.LOCKA_t
index URL

SegmentA and Info lock

Configuration settings
values of type Flash_2xx.LOCKA_t
    const Flash_2xx.LOCKA_OFF;
    // Segment A unlocked and all information memory is erased during a mass erase
    const Flash_2xx.LOCKA;
    // Segment A locked and all information memory is protected from erasure during a mass erase
enum Flash_2xx.LOCK_t
index URL

Lock

Configuration settings
values of type Flash_2xx.LOCK_t
    const Flash_2xx.LOCK_OFF;
    // Unlocked
    const Flash_2xx.LOCK;
    // Locked
enum Flash_2xx.MERAS_t
index URL

Mass erase

Configuration settings
values of type Flash_2xx.MERAS_t
    const Flash_2xx.MERAS_OFF;
    // Mass erase disabled
    const Flash_2xx.MERAS;
    // Mass erase enabled
enum Flash_2xx.WAIT_t
index URL

Wait

Configuration settings
values of type Flash_2xx.WAIT_t
    const Flash_2xx.WAIT_OFF;
    // The flash memory is not ready for the next byte/word write
    const Flash_2xx.WAIT;
    // The flash memory is ready for the next byte/word write
enum Flash_2xx.WRT_t
index URL

Write

Configuration settings
values of type Flash_2xx.WRT_t
    const Flash_2xx.WRT_OFF;
    // Write mode is off
    const Flash_2xx.WRT;
    // Write mode is on
struct Flash_2xx.FCTL1_t
index URL
Configuration settings
var obj = new Flash_2xx.FCTL1_t;
    obj.FWKEY = Flash_2xx.FWKEY_t ...
    // FCTLx password Always read as 096h. Must be written as 0A5h or a PUC will be generated
    obj.BLKWRT = Flash_2xx.BLKWRT_t ...
    // Block write mode
    obj.WRT = Flash_2xx.WRT_t ...
    // Write
    obj.EEIEX = Flash_2xx.EEIEX_t ...
    // Enable Emergency Interrupt Exit
    obj.EEI = Flash_2xx.EEI_t ...
    // Enable Erase Interrupts
    obj.MERAS = Flash_2xx.MERAS_t ...
    // Mass erase
    obj.ERASE = Flash_2xx.ERASE_t ...
    // Erase
struct Flash_2xx.FCTL2_t
index URL
Configuration settings
var obj = new Flash_2xx.FCTL2_t;
    obj.FWKEY = Flash_2xx.FWKEY_t ...
    // FCTLx password Always read as 096h. Must be written as 0A5h or a PUC will be generated
    obj.FSSEL = Flash_2xx.FSSEL_t ...
    // Flash controller clock source select 00 ACLK 01 MCLK 10 SMCLK 11 SMCLK
    obj.FN5 = Flash_2xx.FN5_t ...
    // Flash Controller Clock Divider Bit 5
    obj.FN4 = Flash_2xx.FN4_t ...
    // Flash Controller Clock Divider Bit 4
    obj.FN3 = Flash_2xx.FN3_t ...
    // Flash Controller Clock Divider Bit 3
    obj.FN2 = Flash_2xx.FN2_t ...
    // Flash Controller Clock Divider Bit 2
    obj.FN1 = Flash_2xx.FN1_t ...
    // Flash Controller Clock Divider Bit 1
    obj.FN0 = Flash_2xx.FN0_t ...
    // Flash Controller Clock Divider Bit 0
struct Flash_2xx.FCTL3_t
index URL
Configuration settings
var obj = new Flash_2xx.FCTL3_t;
    obj.FWKEY = Flash_2xx.FWKEY_t ...
    // FCTLx password. Always read as 096h. Must be written as 0A5h or a PUC will be generated
    obj.FAIL = Flash_2xx.FAIL_t ...
    // FAIL Bit 7 Operation failure. This bit is set if the fFTG clock source fails, or a flash operation is aborted from an interrupt when EEIEX = 1. FAIL must be reset with software. 0 No failure 1 Failure
    obj.LOCKA = Flash_2xx.LOCKA_t ...
    // SegmentA and Info lock. Write a 1 to this bit to change its state. Writing 0 has no effect. 0 Segment A unlocked and all information memory is erased during a mass erase. 1 Segment A locked and all information memory is protected from erasure during a mass erase
    obj.EMEX = Flash_2xx.EMEX_t ...
    // Emergency exit 0 No emergency exit 1 Emergency exit
    obj.LOCK = Flash_2xx.LOCK_t ...
    // Lock. This bit unlocks the flash memory for writing or erasing. The LOCK bit can be set anytime during a byte/word write or erase operation and the operation will complete normally. In the block write mode if the LOCK bit is set while BLKWRT=WAIT=1, then BLKWRT and WAIT are reset and the mode ends normally. 0 Unlocked 1 Locked
    obj.WAIT = Flash_2xx.WAIT_t ...
    // Wait. Indicates the flash memory is being written to. 0 The flash memory is not ready for the next byte/word write 1 The flash memory is ready for the next byte/word write
    obj.ACCVIFG = Flash_2xx.ACCVIFG_t ...
    // Access violation interrupt flag 0 No interrupt pending 1 Interrupt pending
    obj.KEYV = Flash_2xx.KEYV_t ...
    // Flash security key violation. This bit indicates an incorrect FCTLx password was written to any flash control register and generates a PUC when set. KEYV must be reset with software. 0 FCTLx password was written correctly 1 FCTLx password was written incorrectly
    obj.BUSY = Flash_2xx.BUSY_t ...
    // Busy. This bit indicates the status of the flash timing generator. 0 Not Busy 1 Busy
struct Flash_2xx.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Flash_2xx.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
Flash_2xx.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Flash_2xx.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Flash_2xx.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Flash_2xx.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Flash_2xx.Params;
// Instance config-params object
    params.FCTL1 = Flash_2xx.FCTL1_t {
    // Flash Memory Control Register 1
        FWKEY: IFlash.FWKEY,
        BLKWRT: IFlash.BLKWRT_OFF,
        WRT: IFlash.WRT_OFF,
        EEIEX: IFlash.EEIEX_OFF,
        EEI: IFlash.EEI_OFF,
        MERAS: IFlash.MERAS_OFF,
        ERASE: IFlash.ERASE_OFF
    };
    params.FCTL2 = Flash_2xx.FCTL2_t {
    // Flash Memory Control Register 2
        FWKEY: IFlash.FWKEY,
        FSSEL: IFlash.FSSEL_1,
        FN5: IFlash.FN5_OFF,
        FN4: IFlash.FN4_OFF,
        FN3: IFlash.FN3_OFF,
        FN2: IFlash.FN2_OFF,
        FN1: IFlash.FN1,
        FN0: IFlash.FN0_OFF
    };
    params.FCTL3 = Flash_2xx.FCTL3_t {
    // Flash Memory Control Register 3
        FAIL: IFlash.FAIL_OFF,
        LOCKA: IFlash.LOCKA_OFF,
        EMEX: IFlash.EMEX_OFF,
        LOCK: IFlash.LOCK,
        WAIT: IFlash.WAIT,
        ACCVIFG: IFlash.ACCVIFG_OFF,
        KEYV: IFlash.KEYV_OFF,
        BUSY: IFlash.BUSY_OFF
    };
    params.clock = IClock.Instance undefined;
    //
    params.forceSetDefaultRegister = Flash_2xx.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "FCTL1",
            regForceSet: false
        },
        {
            register: "FCTL2",
            regForceSet: false
        },
        {
            register: "FCTL3",
            regForceSet: false
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
    params.uMaxFtg = UInt8 undefined;
    // Max Flash Timing Generator Value from Datasheet
    params.uMinFtg = UInt8 undefined;
    // Min Flash Timing Generator Value from Datasheet
config Flash_2xx.Params.FCTL1 // instance
index URL

Flash Memory Control Register 1

Configuration settings
var params = new Flash_2xx.Params;
...
params.FCTL1 = Flash_2xx.FCTL1_t {
    FWKEY: IFlash.FWKEY,
    BLKWRT: IFlash.BLKWRT_OFF,
    WRT: IFlash.WRT_OFF,
    EEIEX: IFlash.EEIEX_OFF,
    EEI: IFlash.EEI_OFF,
    MERAS: IFlash.MERAS_OFF,
    ERASE: IFlash.ERASE_OFF
};
config Flash_2xx.Params.FCTL2 // instance
index URL

Flash Memory Control Register 2

Configuration settings
var params = new Flash_2xx.Params;
...
params.FCTL2 = Flash_2xx.FCTL2_t {
    FWKEY: IFlash.FWKEY,
    FSSEL: IFlash.FSSEL_1,
    FN5: IFlash.FN5_OFF,
    FN4: IFlash.FN4_OFF,
    FN3: IFlash.FN3_OFF,
    FN2: IFlash.FN2_OFF,
    FN1: IFlash.FN1,
    FN0: IFlash.FN0_OFF
};
config Flash_2xx.Params.FCTL3 // instance
index URL

Flash Memory Control Register 3

Configuration settings
var params = new Flash_2xx.Params;
...
params.FCTL3 = Flash_2xx.FCTL3_t {
    FAIL: IFlash.FAIL_OFF,
    LOCKA: IFlash.LOCKA_OFF,
    EMEX: IFlash.EMEX_OFF,
    LOCK: IFlash.LOCK,
    WAIT: IFlash.WAIT,
    ACCVIFG: IFlash.ACCVIFG_OFF,
    KEYV: IFlash.KEYV_OFF,
    BUSY: IFlash.BUSY_OFF
};
config Flash_2xx.Params.clock // instance
index URL
Configuration settings
var params = new Flash_2xx.Params;
...
params.clock = IClock.Instance undefined;
config Flash_2xx.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Flash_2xx.Params;
...
const params.forceSetDefaultRegister = Flash_2xx.ForceSetDefaultRegister_t[] [
    {
        register: "FCTL1",
        regForceSet: false
    },
    {
        register: "FCTL2",
        regForceSet: false
    },
    {
        register: "FCTL3",
        regForceSet: false
    }
];
config Flash_2xx.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Flash_2xx.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Flash_2xx.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Flash_2xx.Params;
...
params.owner = String undefined;
config Flash_2xx.Params.uMaxFtg // instance
index URL

Max Flash Timing Generator Value from Datasheet

Configuration settings
var params = new Flash_2xx.Params;
...
params.uMaxFtg = UInt8 undefined;
config Flash_2xx.Params.uMinFtg // instance
index URL

Min Flash Timing Generator Value from Datasheet

Configuration settings
var params = new Flash_2xx.Params;
...
params.uMinFtg = UInt8 undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Flash_2xx.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Flash_2xx.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:02 GMT


interface ti.catalog.msp430.peripherals.memory.IFlash

metaonly interface ti.catalog.msp430.peripherals.memory.IFlash
index URL

MSP430 IFlash interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
metaonly interface IFlash { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
package ti.catalog.msp430.peripherals.memory;
metaonly interface IFlash inherits IPeripheral {
module-wide constants & types
    enum ACCVIFG_t// Access violation interrupt flag {
         ACCVIFG_OFF// No interrupt pending,
         ACCVIFG// Interrupt pending
    };
    enum BLKWRT_t// Block write mode {
         BLKWRT_OFF// Block-write mode is off,
         BLKWRT// Block-write mode is on
    };
    enum BUSY_t// Busy {
         BUSY_OFF// Not Busy,
         BUSY// Busy
    };
    enum EEIEX_t// Enable Emergency Interrupt Exit {
         EEIEX_OFF// Exit interrupt disabled,
         EEIEX// Exit interrupt enabled
    };
    enum EEI_t// Enable Erase Interrupts {
         EEI_OFF// Interrupts during segment erase disabled,
         EEI// Interrupts during segment erase enabled
    };
    enum EMEX_t// Emergency exit {
         EMEX_OFF// No emergency exit,
         EMEX// Emergency exit
    };
    enum ERASE_t// Erase {
         ERASE_OFF// Erase disabled,
         ERASE// Erase enabled
    };
    enum FAIL_t// Operation failure {
         FAIL_OFF// No failure,
         FAIL// Failure
    };
    enum FN0_t// Flash controller clock divider bit 0 {
         FN0_OFF// Flash controller clock divider bit 0,
         FN0// Flash controller clock divider bit 0
    };
    enum FN1_t// Flash controller clock divider bit 1 {
         FN1_OFF// Flash controller clock divider bit 1,
         FN1// Flash controller clock divider bit 1
    };
    enum FN2_t// Flash controller clock divider bit 2 {
         FN2_OFF// Flash controller clock divider bit 2,
         FN2// Flash controller clock divider bit 2
    };
    enum FN3_t// Flash controller clock divider bit 3 {
         FN3_OFF// Flash controller clock divider bit 3,
         FN3// Flash controller clock divider bit 3
    };
    enum FN4_t// Flash controller clock divider bit 4 {
         FN4_OFF// Flash controller clock divider bit 4,
         FN4// Flash controller clock divider bit 4
    };
    enum FN5_t// Flash controller clock divider bit 5 {
         FN5_OFF// Flash controller clock divider bit 5,
         FN5// Flash controller clock divider bit 5
    };
    enum FSSEL_t// {
         FSSEL_0// ACLK,
         FSSEL_1// MCLK,
         FSSEL_2// SMCLK
    };
    enum FWKEY_t// {
         FWKEY_OFF,
         FWKEY
    };
    enum KEYV_t// Flash security key violation {
         KEYV_OFF// FCTLx password was written correctly,
         KEYV// FCTLx password was written incorrectly
    };
    enum LOCKA_t// SegmentA and Info lock {
         LOCKA_OFF// Segment A unlocked and all information memory is erased during a mass erase,
         LOCKA// Segment A locked and all information memory is protected from erasure during a mass erase
    };
    enum LOCK_t// Lock {
         LOCK_OFF// Unlocked,
         LOCK// Locked
    };
    enum MERAS_t// Mass erase {
         MERAS_OFF// Mass erase disabled,
         MERAS// Mass erase enabled
    };
    enum WAIT_t// Wait {
         WAIT_OFF// The flash memory is not ready for the next byte/word write,
         WAIT// The flash memory is ready for the next byte/word write
    };
    enum WRT_t// Write {
         WRT_OFF// Write mode is off,
         WRT// Write mode is on
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
    config UInt8 uMaxFtg// Max Flash Timing Generator Value from Datasheet;
    config UInt8 uMinFtg// Min Flash Timing Generator Value from Datasheet;
}
enum IFlash.ACCVIFG_t
index URL

Access violation interrupt flag

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum ACCVIFG_t {
    ACCVIFG_OFF,
    // No interrupt pending
    ACCVIFG
    // Interrupt pending
};
enum IFlash.BLKWRT_t
index URL

Block write mode

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum BLKWRT_t {
    BLKWRT_OFF,
    // Block-write mode is off
    BLKWRT
    // Block-write mode is on
};
enum IFlash.BUSY_t
index URL

Busy

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum BUSY_t {
    BUSY_OFF,
    // Not Busy
    BUSY
    // Busy
};
enum IFlash.EEIEX_t
index URL

Enable Emergency Interrupt Exit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum EEIEX_t {
    EEIEX_OFF,
    // Exit interrupt disabled
    EEIEX
    // Exit interrupt enabled
};
enum IFlash.EEI_t
index URL

Enable Erase Interrupts

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum EEI_t {
    EEI_OFF,
    // Interrupts during segment erase disabled
    EEI
    // Interrupts during segment erase enabled
};
enum IFlash.EMEX_t
index URL

Emergency exit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum EMEX_t {
    EMEX_OFF,
    // No emergency exit
    EMEX
    // Emergency exit
};
enum IFlash.ERASE_t
index URL

Erase

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum ERASE_t {
    ERASE_OFF,
    // Erase disabled
    ERASE
    // Erase enabled
};
enum IFlash.FAIL_t
index URL

Operation failure

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FAIL_t {
    FAIL_OFF,
    // No failure
    FAIL
    // Failure
};
enum IFlash.FN0_t
index URL

Flash controller clock divider bit 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FN0_t {
    FN0_OFF,
    // Flash controller clock divider bit 0
    FN0
    // Flash controller clock divider bit 0
};
enum IFlash.FN1_t
index URL

Flash controller clock divider bit 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FN1_t {
    FN1_OFF,
    // Flash controller clock divider bit 1
    FN1
    // Flash controller clock divider bit 1
};
enum IFlash.FN2_t
index URL

Flash controller clock divider bit 2

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FN2_t {
    FN2_OFF,
    // Flash controller clock divider bit 2
    FN2
    // Flash controller clock divider bit 2
};
enum IFlash.FN3_t
index URL

Flash controller clock divider bit 3

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FN3_t {
    FN3_OFF,
    // Flash controller clock divider bit 3
    FN3
    // Flash controller clock divider bit 3
};
enum IFlash.FN4_t
index URL

Flash controller clock divider bit 4

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FN4_t {
    FN4_OFF,
    // Flash controller clock divider bit 4
    FN4
    // Flash controller clock divider bit 4
};
enum IFlash.FN5_t
index URL

Flash controller clock divider bit 5

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FN5_t {
    FN5_OFF,
    // Flash controller clock divider bit 5
    FN5
    // Flash controller clock divider bit 5
};
enum IFlash.FSSEL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FSSEL_t {
    FSSEL_0,
    // ACLK
    FSSEL_1,
    // MCLK
    FSSEL_2
    // SMCLK
};
enum IFlash.FWKEY_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum FWKEY_t {
    FWKEY_OFF,
    FWKEY
};
enum IFlash.KEYV_t
index URL

Flash security key violation

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum KEYV_t {
    KEYV_OFF,
    // FCTLx password was written correctly
    KEYV
    // FCTLx password was written incorrectly
};
enum IFlash.LOCKA_t
index URL

SegmentA and Info lock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum LOCKA_t {
    LOCKA_OFF,
    // Segment A unlocked and all information memory is erased during a mass erase
    LOCKA
    // Segment A locked and all information memory is protected from erasure during a mass erase
};
enum IFlash.LOCK_t
index URL

Lock

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum LOCK_t {
    LOCK_OFF,
    // Unlocked
    LOCK
    // Locked
};
enum IFlash.MERAS_t
index URL

Mass erase

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum MERAS_t {
    MERAS_OFF,
    // Mass erase disabled
    MERAS
    // Mass erase enabled
};
enum IFlash.WAIT_t
index URL

Wait

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum WAIT_t {
    WAIT_OFF,
    // The flash memory is not ready for the next byte/word write
    WAIT
    // The flash memory is ready for the next byte/word write
};
enum IFlash.WRT_t
index URL

Write

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
enum WRT_t {
    WRT_OFF,
    // Write mode is off
    WRT
    // Write mode is on
};
typedef IFlash.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IFlash.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
typedef String StringArray[];
struct IFlash.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
IFlash.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IFlash.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IFlash.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IFlash.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
config String owner;
config IFlash.Params.uMaxFtg // instance
index URL

Max Flash Timing Generator Value from Datasheet

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
config UInt8 uMaxFtg;
config IFlash.Params.uMinFtg // instance
index URL

Min Flash Timing Generator Value from Datasheet

XDCspec declarations sourced in ti/catalog/msp430/peripherals/memory/IFlash.xdc
config UInt8 uMinFtg;
generated on Sun, 25 Nov 2018 22:20:01 GMT


package ti.catalog.msp430.peripherals.oa
index URL

MSP430 Op Amp peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/package.xdc
package ti.catalog.msp430.peripherals.oa [1, 0, 0] {
    interface IOA;
    // MSP430 General Purpose Operational Amplifier
    module OA_2;
    // MSP430 General Purpose Operational Amplifier
}
generated on Sun, 25 Nov 2018 22:20:02 GMT


interface ti.catalog.msp430.peripherals.oa.IOA

metaonly interface ti.catalog.msp430.peripherals.oa.IOA
index URL

MSP430 General Purpose Operational Amplifier

XDCspec summary sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
metaonly interface IOA { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
package ti.catalog.msp430.peripherals.oa;
metaonly interface IOA inherits IPeripheral {
module-wide constants & types
    enum OAADC0_t// {
         OAADC0_OFF// OAx output to ADC12 input channel select 0,
         OAADC0// OAx output to ADC12 input channel select 0
    };
    enum OAADC1_t// {
         OAADC1_OFF// OAx output to ADC12 input channel select 1,
         OAADC1// OAx output to ADC12 input channel select 1
    };
    enum OAFBR_t// OAx feedback resistor select {
         OAFBR_0// OAx Feedback resistor: Tap 0,
         OAFBR_1// OAx Feedback resistor: Tap 1,
         OAFBR_2// OAx Feedback resistor: Tap 2,
         OAFBR_3// OAx Feedback resistor: Tap 3,
         OAFBR_4// OAx Feedback resistor: Tap 4,
         OAFBR_5// OAx Feedback resistor: Tap 5,
         OAFBR_6// OAx Feedback resistor: Tap 6,
         OAFBR_7// OAx Feedback resistor: Tap 7
    };
    enum OAFC_t// OAx function control {
         OAFC_0// General Purpose,
         OAFC_1// Unity gain buffer for three-opamp differential amplifier,
         OAFC_2// Unity gain buffer,
         OAFC_3// Comparator,
         OAFC_4// Non-inverting PGA,
         OAFC_5// Cascaded non-inverting PGA,
         OAFC_6// Inverting PGA,
         OAFC_7// Differential amplifier
    };
    enum OANEXT_t// {
         OANEXT_OFF// OAx inverting input not externally available,
         OANEXT// OAx inverting input externally available
    };
    enum OAN_t// Inverting input selection {
         OAN_0// OAxI0,
         OAN_1// OAxI1,
         OAN_2// OAxI2,
         OAN_3// OAxI3
    };
    enum OAPM_t// Slew rate select {
         OAPM_0// Off, output high Z,
         OAPM_1// Slow,
         OAPM_2// Medium,
         OAPM_3// Fast
    };
    enum OAP_t// Non-inverting input selection {
         OAP_0// OAxI0,
         OAP_1// OAxI1,
         OAP_2// OAxI2,
         OAP_3// OAxI3
    };
    enum OARRIP_t// {
         OARRIP_OFF// Rtop = AVss, Rbottom = AVcc,
         OARRIP// Rtop = AVcc, Rbottom = AVss
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct OAxCTL0_t// Opamp Control Register 0 Definition {
         IOA.OAN_t OAN// Inverting input select. These bits select the input signal for the OA inverting input. 00 OAxI0 01 OAxI1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal);
         IOA.OAP_t OAP// Non-inverting input select. These bits select the input signal for the OA non-inverting input. 00 OAxI0 01 OA0I1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal);
         IOA.OAPM_t OAPM// Slew rate select. These bits select the slew rate vs. current consumption for the OA. 00 Off, output high Z 01 Slow 10 Medium 11 Fast;
         IOA.OAADC0_t OAADC0// OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC;
         IOA.OAADC1_t OAADC1// OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC;
    };
    metaonly struct OAxCTL1_t// Opamp Control Register 1 Definition {
         IOA.OAFBR_t OAFBR// OAx feedback resistor select 000 Tap 0 - 0R/16R 001 Tap 1 - 4R/12R 010 Tap 2 - 8R/8R 011 Tap 3 - 10R/6R 100 Tap 4 - 12R/4R 101 Tap 5 - 13R/3R 110 Tap 6 - 14R/2R 111 Tap 7 - 15R/1R;
         IOA.OAFC_t OAFC// OAx function control. This bit selects the function of OAx 000 General purpose opamp 001 Unity gain buffer for three-opamp differential amplifier 010 Unity gain buffer 011 Comparator 100 Non-inverting PGA amplifier 101 Cascaded non-inverting PGA amplifier 110 Inverting PGA amplifier 111 Differential amplifier;
         IOA.OANEXT_t OANEXT// OAx inverting input externally available. This bit, when set, connects the inverting OAx input to the external pin when the integrated resistor network is used. 0 OAx inverting input not externally available 1 OAx inverting input externally available;
         IOA.OARRIP_t OARRIP// OAx reverse resistor connection in comparator mode 0 RTOP is connected to AVSS and RBOTTOM is connected to AVCC when OAFCx = 3 1 RTOP is connected to AVCC and RBOTTOM is connected to AVSS when OAFCx = 3;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance functions
    UChar getNumberOfOA// Returns the number of available OA();
}
enum IOA.OAADC0_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OAADC0_t {
    OAADC0_OFF,
    // OAx output to ADC12 input channel select 0
    OAADC0
    // OAx output to ADC12 input channel select 0
};
enum IOA.OAADC1_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OAADC1_t {
    OAADC1_OFF,
    // OAx output to ADC12 input channel select 1
    OAADC1
    // OAx output to ADC12 input channel select 1
};
enum IOA.OAFBR_t
index URL

OAx feedback resistor select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OAFBR_t {
    OAFBR_0,
    // OAx Feedback resistor: Tap 0
    OAFBR_1,
    // OAx Feedback resistor: Tap 1
    OAFBR_2,
    // OAx Feedback resistor: Tap 2
    OAFBR_3,
    // OAx Feedback resistor: Tap 3
    OAFBR_4,
    // OAx Feedback resistor: Tap 4
    OAFBR_5,
    // OAx Feedback resistor: Tap 5
    OAFBR_6,
    // OAx Feedback resistor: Tap 6
    OAFBR_7
    // OAx Feedback resistor: Tap 7
};
enum IOA.OAFC_t
index URL

OAx function control

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OAFC_t {
    OAFC_0,
    // General Purpose
    OAFC_1,
    // Unity gain buffer for three-opamp differential amplifier
    OAFC_2,
    // Unity gain buffer
    OAFC_3,
    // Comparator
    OAFC_4,
    // Non-inverting PGA
    OAFC_5,
    // Cascaded non-inverting PGA
    OAFC_6,
    // Inverting PGA
    OAFC_7
    // Differential amplifier
};
enum IOA.OANEXT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OANEXT_t {
    OANEXT_OFF,
    // OAx inverting input not externally available
    OANEXT
    // OAx inverting input externally available
};
enum IOA.OAN_t
index URL

Inverting input selection

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OAN_t {
    OAN_0,
    // OAxI0
    OAN_1,
    // OAxI1
    OAN_2,
    // OAxI2
    OAN_3
    // OAxI3
};
enum IOA.OAPM_t
index URL

Slew rate select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OAPM_t {
    OAPM_0,
    // Off, output high Z
    OAPM_1,
    // Slow
    OAPM_2,
    // Medium
    OAPM_3
    // Fast
};
enum IOA.OAP_t
index URL

Non-inverting input selection

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OAP_t {
    OAP_0,
    // OAxI0
    OAP_1,
    // OAxI1
    OAP_2,
    // OAxI2
    OAP_3
    // OAxI3
};
enum IOA.OARRIP_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
enum OARRIP_t {
    OARRIP_OFF,
    // Rtop = AVss, Rbottom = AVcc
    OARRIP
    // Rtop = AVcc, Rbottom = AVss
};
typedef IOA.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IOA.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
typedef String StringArray[];
struct IOA.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IOA.OAxCTL0_t
index URL

Opamp Control Register 0 Definition

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
metaonly struct OAxCTL0_t {
     IOA.OAN_t OAN;
    // Inverting input select. These bits select the input signal for the OA inverting input. 00 OAxI0 01 OAxI1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal)
     IOA.OAP_t OAP;
    // Non-inverting input select. These bits select the input signal for the OA non-inverting input. 00 OAxI0 01 OA0I1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal)
     IOA.OAPM_t OAPM;
    // Slew rate select. These bits select the slew rate vs. current consumption for the OA. 00 Off, output high Z 01 Slow 10 Medium 11 Fast
     IOA.OAADC0_t OAADC0;
    // OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC
     IOA.OAADC1_t OAADC1;
    // OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC
};
SEE
OAxCTL0_t
struct IOA.OAxCTL1_t
index URL

Opamp Control Register 1 Definition

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
metaonly struct OAxCTL1_t {
     IOA.OAFBR_t OAFBR;
    // OAx feedback resistor select 000 Tap 0 - 0R/16R 001 Tap 1 - 4R/12R 010 Tap 2 - 8R/8R 011 Tap 3 - 10R/6R 100 Tap 4 - 12R/4R 101 Tap 5 - 13R/3R 110 Tap 6 - 14R/2R 111 Tap 7 - 15R/1R
     IOA.OAFC_t OAFC;
    // OAx function control. This bit selects the function of OAx 000 General purpose opamp 001 Unity gain buffer for three-opamp differential amplifier 010 Unity gain buffer 011 Comparator 100 Non-inverting PGA amplifier 101 Cascaded non-inverting PGA amplifier 110 Inverting PGA amplifier 111 Differential amplifier
     IOA.OANEXT_t OANEXT;
    // OAx inverting input externally available. This bit, when set, connects the inverting OAx input to the external pin when the integrated resistor network is used. 0 OAx inverting input not externally available 1 OAx inverting input externally available
     IOA.OARRIP_t OARRIP;
    // OAx reverse resistor connection in comparator mode 0 RTOP is connected to AVSS and RBOTTOM is connected to AVCC when OAFCx = 3 1 RTOP is connected to AVCC and RBOTTOM is connected to AVSS when OAFCx = 3
};
SEE
OAxCTL1_t
IOA.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IOA.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IOA.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IOA.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
config String owner;
IOA.getNumberOfOA() // instance
index URL

Returns the number of available OA

XDCspec declarations sourced in ti/catalog/msp430/peripherals/oa/IOA.xdc
UChar getNumberOfOA();
generated on Sun, 25 Nov 2018 22:20:02 GMT


module ti.catalog.msp430.peripherals.oa.OA_2

metaonly module ti.catalog.msp430.peripherals.oa.OA_2
index URL

MSP430 General Purpose Operational Amplifier

  • Configuration settings
  • Individual elements
The module is named OA_2 because it only supports two OAs. A device containing three op-amps would require a separate module.
Configuration settings sourced in ti/catalog/msp430/peripherals/oa/OA_2.xdc
var OA_2 = xdc.useModule('ti.catalog.msp430.peripherals.oa.OA_2');
module-wide constants & types
    values of type OA_2.OAADC0_t//
        const OA_2.OAADC0_OFF// OAx output to ADC12 input channel select 0;
        const OA_2.OAADC0// OAx output to ADC12 input channel select 0;
    values of type OA_2.OAADC1_t//
        const OA_2.OAADC1_OFF// OAx output to ADC12 input channel select 1;
        const OA_2.OAADC1// OAx output to ADC12 input channel select 1;
    values of type OA_2.OAFBR_t// OAx feedback resistor select
        const OA_2.OAFBR_0// OAx Feedback resistor: Tap 0;
        const OA_2.OAFBR_1// OAx Feedback resistor: Tap 1;
        const OA_2.OAFBR_2// OAx Feedback resistor: Tap 2;
        const OA_2.OAFBR_3// OAx Feedback resistor: Tap 3;
        const OA_2.OAFBR_4// OAx Feedback resistor: Tap 4;
        const OA_2.OAFBR_5// OAx Feedback resistor: Tap 5;
        const OA_2.OAFBR_6// OAx Feedback resistor: Tap 6;
        const OA_2.OAFBR_7// OAx Feedback resistor: Tap 7;
    values of type OA_2.OAFC_t// OAx function control
        const OA_2.OAFC_0// General Purpose;
        const OA_2.OAFC_1// Unity gain buffer for three-opamp differential amplifier;
        const OA_2.OAFC_2// Unity gain buffer;
        const OA_2.OAFC_3// Comparator;
        const OA_2.OAFC_4// Non-inverting PGA;
        const OA_2.OAFC_5// Cascaded non-inverting PGA;
        const OA_2.OAFC_6// Inverting PGA;
        const OA_2.OAFC_7// Differential amplifier;
    values of type OA_2.OANEXT_t//
        const OA_2.OANEXT_OFF// OAx inverting input not externally available;
        const OA_2.OANEXT// OAx inverting input externally available;
    values of type OA_2.OAN_t// Inverting input selection
        const OA_2.OAN_0// OAxI0;
        const OA_2.OAN_1// OAxI1;
        const OA_2.OAN_2// OAxI2;
        const OA_2.OAN_3// OAxI3;
    values of type OA_2.OAPM_t// Slew rate select
        const OA_2.OAPM_0// Off, output high Z;
        const OA_2.OAPM_1// Slow;
        const OA_2.OAPM_2// Medium;
        const OA_2.OAPM_3// Fast;
    values of type OA_2.OAP_t// Non-inverting input selection
        const OA_2.OAP_0// OAxI0;
        const OA_2.OAP_1// OAxI1;
        const OA_2.OAP_2// OAxI2;
        const OA_2.OAP_3// OAxI3;
    values of type OA_2.OARRIP_t//
        const OA_2.OARRIP_OFF// Rtop = AVss, Rbottom = AVcc;
        const OA_2.OARRIP// Rtop = AVcc, Rbottom = AVss;
    var obj = new OA_2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new OA_2.OAxCTL0_t// Opamp Control Register 0 Definition;
        obj.OAN// Inverting input select. These bits select the input signal for the OA inverting input. 00 OAxI0 01 OAxI1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal) = IOA.OAN_t ...
        obj.OAP// Non-inverting input select. These bits select the input signal for the OA non-inverting input. 00 OAxI0 01 OA0I1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal) = IOA.OAP_t ...
        obj.OAPM// Slew rate select. These bits select the slew rate vs. current consumption for the OA. 00 Off, output high Z 01 Slow 10 Medium 11 Fast = IOA.OAPM_t ...
        obj.OAADC0// OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC = IOA.OAADC0_t ...
        obj.OAADC1// OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC = IOA.OAADC1_t ...
    var obj = new OA_2.OAxCTL1_t// Opamp Control Register 1 Definition;
        obj.OAFBR// OAx feedback resistor select 000 Tap 0 - 0R/16R 001 Tap 1 - 4R/12R 010 Tap 2 - 8R/8R 011 Tap 3 - 10R/6R 100 Tap 4 - 12R/4R 101 Tap 5 - 13R/3R 110 Tap 6 - 14R/2R 111 Tap 7 - 15R/1R = IOA.OAFBR_t ...
        obj.OAFC// OAx function control. This bit selects the function of OAx 000 General purpose opamp 001 Unity gain buffer for three-opamp differential amplifier 010 Unity gain buffer 011 Comparator 100 Non-inverting PGA amplifier 101 Cascaded non-inverting PGA amplifier 110 Inverting PGA amplifier 111 Differential amplifier = IOA.OAFC_t ...
        obj.OANEXT// OAx inverting input externally available. This bit, when set, connects the inverting OAx input to the external pin when the integrated resistor network is used. 0 OAx inverting input not externally available 1 OAx inverting input externally available = IOA.OANEXT_t ...
        obj.OARRIP// OAx reverse resistor connection in comparator mode 0 RTOP is connected to AVSS and RBOTTOM is connected to AVCC when OAFCx = 3 1 RTOP is connected to AVCC and RBOTTOM is connected to AVSS when OAFCx = 3 = IOA.OARRIP_t ...
module-wide functions
     OA_2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     OA_2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new OA_2.Params// Instance config-params object;
        params.OA0CTL0// OA0 control register 0 = OA_2.OAxCTL0_t {
            OAN: IOA.OAN_0,
            OAP: IOA.OAP_0,
            OAPM: IOA.OAPM_0,
            OAADC0: IOA.OAADC0_OFF,
            OAADC1: IOA.OAADC1_OFF
        };
        params.OA0CTL1// OA0 control register 1 = OA_2.OAxCTL1_t {
            OAFBR: IOA.OAFBR_0,
            OAFC: IOA.OAFC_0,
            OANEXT: IOA.OANEXT_OFF,
            OARRIP: IOA.OARRIP_OFF
        };
        params.OA1CTL0// OA1 control register 0 = OA_2.OAxCTL0_t {
            OAN: IOA.OAN_0,
            OAP: IOA.OAP_0,
            OAPM: IOA.OAPM_0,
            OAADC0: IOA.OAADC0_OFF,
            OAADC1: IOA.OAADC1_OFF
        };
        params.OA1CTL1// OA1 control register 1 = OA_2.OAxCTL1_t {
            OAFBR: IOA.OAFBR_0,
            OAFC: IOA.OAFC_0,
            OANEXT: IOA.OANEXT_OFF,
            OARRIP: IOA.OARRIP_OFF
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = OA_2.ForceSetDefaultRegister_t[] [
            {
                register: "OA0CTL0",
                regForceSet: false
            },
            {
                register: "OA0CTL1",
                regForceSet: false
            },
            {
                register: "OA1CTL0",
                regForceSet: false
            },
            {
                register: "OA1CTL1",
                regForceSet: false
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = OA_2.create// Create an instance-object(params);
per-instance functions
     inst.getNumberOfOA// Returns the number of available OA() returns UChar
enum OA_2.OAADC0_t
index URL
Configuration settings
values of type OA_2.OAADC0_t
    const OA_2.OAADC0_OFF;
    // OAx output to ADC12 input channel select 0
    const OA_2.OAADC0;
    // OAx output to ADC12 input channel select 0
enum OA_2.OAADC1_t
index URL
Configuration settings
values of type OA_2.OAADC1_t
    const OA_2.OAADC1_OFF;
    // OAx output to ADC12 input channel select 1
    const OA_2.OAADC1;
    // OAx output to ADC12 input channel select 1
enum OA_2.OAFBR_t
index URL

OAx feedback resistor select

Configuration settings
values of type OA_2.OAFBR_t
    const OA_2.OAFBR_0;
    // OAx Feedback resistor: Tap 0
    const OA_2.OAFBR_1;
    // OAx Feedback resistor: Tap 1
    const OA_2.OAFBR_2;
    // OAx Feedback resistor: Tap 2
    const OA_2.OAFBR_3;
    // OAx Feedback resistor: Tap 3
    const OA_2.OAFBR_4;
    // OAx Feedback resistor: Tap 4
    const OA_2.OAFBR_5;
    // OAx Feedback resistor: Tap 5
    const OA_2.OAFBR_6;
    // OAx Feedback resistor: Tap 6
    const OA_2.OAFBR_7;
    // OAx Feedback resistor: Tap 7
enum OA_2.OAFC_t
index URL

OAx function control

Configuration settings
values of type OA_2.OAFC_t
    const OA_2.OAFC_0;
    // General Purpose
    const OA_2.OAFC_1;
    // Unity gain buffer for three-opamp differential amplifier
    const OA_2.OAFC_2;
    // Unity gain buffer
    const OA_2.OAFC_3;
    // Comparator
    const OA_2.OAFC_4;
    // Non-inverting PGA
    const OA_2.OAFC_5;
    // Cascaded non-inverting PGA
    const OA_2.OAFC_6;
    // Inverting PGA
    const OA_2.OAFC_7;
    // Differential amplifier
enum OA_2.OANEXT_t
index URL
Configuration settings
values of type OA_2.OANEXT_t
    const OA_2.OANEXT_OFF;
    // OAx inverting input not externally available
    const OA_2.OANEXT;
    // OAx inverting input externally available
enum OA_2.OAN_t
index URL

Inverting input selection

Configuration settings
values of type OA_2.OAN_t
    const OA_2.OAN_0;
    // OAxI0
    const OA_2.OAN_1;
    // OAxI1
    const OA_2.OAN_2;
    // OAxI2
    const OA_2.OAN_3;
    // OAxI3
enum OA_2.OAPM_t
index URL

Slew rate select

Configuration settings
values of type OA_2.OAPM_t
    const OA_2.OAPM_0;
    // Off, output high Z
    const OA_2.OAPM_1;
    // Slow
    const OA_2.OAPM_2;
    // Medium
    const OA_2.OAPM_3;
    // Fast
enum OA_2.OAP_t
index URL

Non-inverting input selection

Configuration settings
values of type OA_2.OAP_t
    const OA_2.OAP_0;
    // OAxI0
    const OA_2.OAP_1;
    // OAxI1
    const OA_2.OAP_2;
    // OAxI2
    const OA_2.OAP_3;
    // OAxI3
enum OA_2.OARRIP_t
index URL
Configuration settings
values of type OA_2.OARRIP_t
    const OA_2.OARRIP_OFF;
    // Rtop = AVss, Rbottom = AVcc
    const OA_2.OARRIP;
    // Rtop = AVcc, Rbottom = AVss
struct OA_2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new OA_2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct OA_2.OAxCTL0_t
index URL

Opamp Control Register 0 Definition

Configuration settings
var obj = new OA_2.OAxCTL0_t;
    obj.OAN = IOA.OAN_t ...
    // Inverting input select. These bits select the input signal for the OA inverting input. 00 OAxI0 01 OAxI1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal)
    obj.OAP = IOA.OAP_t ...
    // Non-inverting input select. These bits select the input signal for the OA non-inverting input. 00 OAxI0 01 OA0I1 10 OAxIA (see the device-specific data sheet for connected signal) 11 OAxIB (see the device-specific data sheet for connected signal)
    obj.OAPM = IOA.OAPM_t ...
    // Slew rate select. These bits select the slew rate vs. current consumption for the OA. 00 Off, output high Z 01 Slow 10 Medium 11 Fast
    obj.OAADC0 = IOA.OAADC0_t ...
    // OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC
    obj.OAADC1 = IOA.OAADC1_t ...
    // OA output select. These bits, together with the OAFCx bits, control the routing of the OAx output when OAPMx > 0. When OAFCx = 0: 00 OAxOUT connected to external pins and ADC input A1, A3, or A5 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected to external pins and ADC input A12, A13, or A14 When OAFCx > 0: 00 OAxOUT used for internal routing only 01 OAxOUT connected to external pins and ADC input A12, A13, or A14 10 OAxOUT connected to external pins and ADC input A1, A3, or A5 11 OAxOUT connected internally to ADC input A12, A13 , or A14. External A12, A13, or A14 pin connections are disconnected from the ADC
SEE
OAxCTL0_t
struct OA_2.OAxCTL1_t
index URL

Opamp Control Register 1 Definition

Configuration settings
var obj = new OA_2.OAxCTL1_t;
    obj.OAFBR = IOA.OAFBR_t ...
    // OAx feedback resistor select 000 Tap 0 - 0R/16R 001 Tap 1 - 4R/12R 010 Tap 2 - 8R/8R 011 Tap 3 - 10R/6R 100 Tap 4 - 12R/4R 101 Tap 5 - 13R/3R 110 Tap 6 - 14R/2R 111 Tap 7 - 15R/1R
    obj.OAFC = IOA.OAFC_t ...
    // OAx function control. This bit selects the function of OAx 000 General purpose opamp 001 Unity gain buffer for three-opamp differential amplifier 010 Unity gain buffer 011 Comparator 100 Non-inverting PGA amplifier 101 Cascaded non-inverting PGA amplifier 110 Inverting PGA amplifier 111 Differential amplifier
    obj.OANEXT = IOA.OANEXT_t ...
    // OAx inverting input externally available. This bit, when set, connects the inverting OAx input to the external pin when the integrated resistor network is used. 0 OAx inverting input not externally available 1 OAx inverting input externally available
    obj.OARRIP = IOA.OARRIP_t ...
    // OAx reverse resistor connection in comparator mode 0 RTOP is connected to AVSS and RBOTTOM is connected to AVCC when OAFCx = 3 1 RTOP is connected to AVCC and RBOTTOM is connected to AVSS when OAFCx = 3
SEE
OAxCTL1_t
OA_2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
OA_2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
OA_2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
OA_2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new OA_2.Params;
// Instance config-params object
    params.OA0CTL0 = OA_2.OAxCTL0_t {
    // OA0 control register 0
        OAN: IOA.OAN_0,
        OAP: IOA.OAP_0,
        OAPM: IOA.OAPM_0,
        OAADC0: IOA.OAADC0_OFF,
        OAADC1: IOA.OAADC1_OFF
    };
    params.OA0CTL1 = OA_2.OAxCTL1_t {
    // OA0 control register 1
        OAFBR: IOA.OAFBR_0,
        OAFC: IOA.OAFC_0,
        OANEXT: IOA.OANEXT_OFF,
        OARRIP: IOA.OARRIP_OFF
    };
    params.OA1CTL0 = OA_2.OAxCTL0_t {
    // OA1 control register 0
        OAN: IOA.OAN_0,
        OAP: IOA.OAP_0,
        OAPM: IOA.OAPM_0,
        OAADC0: IOA.OAADC0_OFF,
        OAADC1: IOA.OAADC1_OFF
    };
    params.OA1CTL1 = OA_2.OAxCTL1_t {
    // OA1 control register 1
        OAFBR: IOA.OAFBR_0,
        OAFC: IOA.OAFC_0,
        OANEXT: IOA.OANEXT_OFF,
        OARRIP: IOA.OARRIP_OFF
    };
    params.forceSetDefaultRegister = OA_2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "OA0CTL0",
            regForceSet: false
        },
        {
            register: "OA0CTL1",
            regForceSet: false
        },
        {
            register: "OA1CTL0",
            regForceSet: false
        },
        {
            register: "OA1CTL1",
            regForceSet: false
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config OA_2.Params.OA0CTL0 // instance
index URL

OA0 control register 0

Configuration settings
var params = new OA_2.Params;
...
params.OA0CTL0 = OA_2.OAxCTL0_t {
    OAN: IOA.OAN_0,
    OAP: IOA.OAP_0,
    OAPM: IOA.OAPM_0,
    OAADC0: IOA.OAADC0_OFF,
    OAADC1: IOA.OAADC1_OFF
};
config OA_2.Params.OA0CTL1 // instance
index URL

OA0 control register 1

Configuration settings
var params = new OA_2.Params;
...
params.OA0CTL1 = OA_2.OAxCTL1_t {
    OAFBR: IOA.OAFBR_0,
    OAFC: IOA.OAFC_0,
    OANEXT: IOA.OANEXT_OFF,
    OARRIP: IOA.OARRIP_OFF
};
config OA_2.Params.OA1CTL0 // instance
index URL

OA1 control register 0

Configuration settings
var params = new OA_2.Params;
...
params.OA1CTL0 = OA_2.OAxCTL0_t {
    OAN: IOA.OAN_0,
    OAP: IOA.OAP_0,
    OAPM: IOA.OAPM_0,
    OAADC0: IOA.OAADC0_OFF,
    OAADC1: IOA.OAADC1_OFF
};
config OA_2.Params.OA1CTL1 // instance
index URL

OA1 control register 1

Configuration settings
var params = new OA_2.Params;
...
params.OA1CTL1 = OA_2.OAxCTL1_t {
    OAFBR: IOA.OAFBR_0,
    OAFC: IOA.OAFC_0,
    OANEXT: IOA.OANEXT_OFF,
    OARRIP: IOA.OARRIP_OFF
};
config OA_2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new OA_2.Params;
...
const params.forceSetDefaultRegister = OA_2.ForceSetDefaultRegister_t[] [
    {
        register: "OA0CTL0",
        regForceSet: false
    },
    {
        register: "OA0CTL1",
        regForceSet: false
    },
    {
        register: "OA1CTL0",
        regForceSet: false
    },
    {
        register: "OA1CTL1",
        regForceSet: false
    }
];
config OA_2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new OA_2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config OA_2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new OA_2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new OA_2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = OA_2.create(params);
// Create an instance-object
OA_2.getNumberOfOA() // instance
index URL

Returns the number of available OA

Configuration settings
inst.getNumberOfOA() returns UChar
generated on Sun, 25 Nov 2018 22:20:02 GMT


package ti.catalog.msp430.peripherals.pinmux
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/package.xdc
requires ti.catalog.msp430.peripherals.clock;
requires ti.catalog.msp430.peripherals.special_function;
package ti.catalog.msp430.peripherals.pinmux [1, 0, 0] {
    interface IPinMux;
    module PinMux;
}
generated on Sun, 25 Nov 2018 22:20:03 GMT


interface ti.catalog.msp430.peripherals.pinmux.IPinMux

metaonly interface ti.catalog.msp430.peripherals.pinmux.IPinMux
index URL
XDCspec summary sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
metaonly interface IPinMux { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
package ti.catalog.msp430.peripherals.pinmux;
metaonly interface IPinMux inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    readonly config IPinMux.ForceSetDefaultRegister_t forceSetDefaultRegister// [length];
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
    config Bits8 p1dir// Port 1 Direction Register = 0;
    config Bits8 p1ie// Port 1 Interrupt Enable = 0;
    config Bits8 p1ies// Port 1 Interrupt Edge Select = 0;
    config Bits8 p1ifg// Port 1 Interrupt Flag Register = 0;
    config Bits8 p1out// Port 1 Output Register = 0;
    config Bits8 p1ren// Port 1 Resistor Enable Register = 0;
    config Bits8 p1sel0// Port 1 Port Select Register 0 = 0;
    config Bits8 p1sel1// Port 1 Port Select Register 1 = 0;
    config Bits8 p2dir// Port 2 Direction Register = 0;
    config Bits8 p2ie// Port 2 Interrupt Enable = 0;
    config Bits8 p2ies// Port 2 Interrupt Edge Select = 0;
    config Bits8 p2ifg// Port 2 Interrupt Flag Register = 0;
    config Bits8 p2out// Port 2 Output Register = 0;
    config Bits8 p2ren// Port 2 Resistor Enable Register = 0;
    config Bits8 p2sel0// Port 2 Port Select Register 0 = 0;
    config Bits8 p2sel1// Port 2 Port Select Register 1 = 0;
    config Bits8 p3dir// Port 3 Direction Register = 0;
    config Bits8 p3ie// Port 3 Interrupt Enable = 0;
    config Bits8 p3ies// Port 3 Interrupt Edge Select = 0;
    config Bits8 p3ifg// Port 3 Interrupt Flag Register = 0;
    config Bits8 p3out// Port 3 Output Register = 0;
    config Bits8 p3ren// Port 3 Resistor Enable Register = 0;
    config Bits8 p3sel0// Port 3 Port Select Register 0 = 0;
    config Bits8 p3sel1// Port 3 Port Select Register 1 = 0;
    config Bits8 p4dir// Port 4 Direction Register = 0;
    config Bits8 p4ie// Port 4 Interrupt Enable = 0;
    config Bits8 p4ies// Port 4 Interrupt Edge Select = 0;
    config Bits8 p4ifg// Port 4 Interrupt Flag Register = 0;
    config Bits8 p4out// Port 4 Output Register = 0;
    config Bits8 p4ren// Port 4 Resistor Enable Register = 0;
    config Bits8 p4sel0// Port 4 Port Select Register 0 = 0;
    config Bits8 p4sel1// Port 4 Port Select Register 1 = 0;
    config Bits8 pjdir// Port J Direction Register = 0;
    config Bits8 pjout// Port J Output Register = 0;
    config Bits8 pjren// Port J Resistor Enable Register = 0;
    config Bits8 pjsel0// Port J Port Select Register 0 = 0;
    config Bits8 pjsel1// Port J Port Select Register 1 = 0;
}
typedef IPinMux.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IPinMux.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
typedef String StringArray[];
struct IPinMux.ForceSetDefaultRegister_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
IPinMux.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IPinMux.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IPinMux.Params.forceSetDefaultRegister // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
readonly config IPinMux.ForceSetDefaultRegister_t forceSetDefaultRegister[length];
config IPinMux.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IPinMux.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config String owner;
config IPinMux.Params.p1dir // instance
index URL

Port 1 Direction Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1dir = 0;
config IPinMux.Params.p1ie // instance
index URL

Port 1 Interrupt Enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1ie = 0;
config IPinMux.Params.p1ies // instance
index URL

Port 1 Interrupt Edge Select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1ies = 0;
config IPinMux.Params.p1ifg // instance
index URL

Port 1 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1ifg = 0;
config IPinMux.Params.p1out // instance
index URL

Port 1 Output Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1out = 0;
config IPinMux.Params.p1ren // instance
index URL

Port 1 Resistor Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1ren = 0;
config IPinMux.Params.p1sel0 // instance
index URL

Port 1 Port Select Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1sel0 = 0;
config IPinMux.Params.p1sel1 // instance
index URL

Port 1 Port Select Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p1sel1 = 0;
config IPinMux.Params.p2dir // instance
index URL

Port 2 Direction Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2dir = 0;
config IPinMux.Params.p2ie // instance
index URL

Port 2 Interrupt Enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2ie = 0;
config IPinMux.Params.p2ies // instance
index URL

Port 2 Interrupt Edge Select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2ies = 0;
config IPinMux.Params.p2ifg // instance
index URL

Port 2 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2ifg = 0;
config IPinMux.Params.p2out // instance
index URL

Port 2 Output Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2out = 0;
config IPinMux.Params.p2ren // instance
index URL

Port 2 Resistor Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2ren = 0;
config IPinMux.Params.p2sel0 // instance
index URL

Port 2 Port Select Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2sel0 = 0;
config IPinMux.Params.p2sel1 // instance
index URL

Port 2 Port Select Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p2sel1 = 0;
config IPinMux.Params.p3dir // instance
index URL

Port 3 Direction Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3dir = 0;
config IPinMux.Params.p3ie // instance
index URL

Port 3 Interrupt Enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3ie = 0;
config IPinMux.Params.p3ies // instance
index URL

Port 3 Interrupt Edge Select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3ies = 0;
config IPinMux.Params.p3ifg // instance
index URL

Port 3 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3ifg = 0;
config IPinMux.Params.p3out // instance
index URL

Port 3 Output Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3out = 0;
config IPinMux.Params.p3ren // instance
index URL

Port 3 Resistor Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3ren = 0;
config IPinMux.Params.p3sel0 // instance
index URL

Port 3 Port Select Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3sel0 = 0;
config IPinMux.Params.p3sel1 // instance
index URL

Port 3 Port Select Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p3sel1 = 0;
config IPinMux.Params.p4dir // instance
index URL

Port 4 Direction Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4dir = 0;
config IPinMux.Params.p4ie // instance
index URL

Port 4 Interrupt Enable

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4ie = 0;
config IPinMux.Params.p4ies // instance
index URL

Port 4 Interrupt Edge Select

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4ies = 0;
config IPinMux.Params.p4ifg // instance
index URL

Port 4 Interrupt Flag Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4ifg = 0;
config IPinMux.Params.p4out // instance
index URL

Port 4 Output Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4out = 0;
config IPinMux.Params.p4ren // instance
index URL

Port 4 Resistor Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4ren = 0;
config IPinMux.Params.p4sel0 // instance
index URL

Port 4 Port Select Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4sel0 = 0;
config IPinMux.Params.p4sel1 // instance
index URL

Port 4 Port Select Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 p4sel1 = 0;
config IPinMux.Params.pjdir // instance
index URL

Port J Direction Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 pjdir = 0;
config IPinMux.Params.pjout // instance
index URL

Port J Output Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 pjout = 0;
config IPinMux.Params.pjren // instance
index URL

Port J Resistor Enable Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 pjren = 0;
config IPinMux.Params.pjsel0 // instance
index URL

Port J Port Select Register 0

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 pjsel0 = 0;
config IPinMux.Params.pjsel1 // instance
index URL

Port J Port Select Register 1

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pinmux/IPinMux.xdc
config Bits8 pjsel1 = 0;
generated on Sun, 25 Nov 2018 22:20:02 GMT


module ti.catalog.msp430.peripherals.pinmux.PinMux

metaonly module ti.catalog.msp430.peripherals.pinmux.PinMux
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/pinmux/PinMux.xdc
var PinMux = xdc.useModule('ti.catalog.msp430.peripherals.pinmux.PinMux');
module-wide constants & types
    var obj = new PinMux.ForceSetDefaultRegister_t// ;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     PinMux.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     PinMux.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new PinMux.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// = IPinMux.ForceSetDefaultRegister_t[length] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
        params.p1dir// Port 1 Direction Register = Bits8 0;
        params.p1ie// Port 1 Interrupt Enable = Bits8 0;
        params.p1ies// Port 1 Interrupt Edge Select = Bits8 0;
        params.p1ifg// Port 1 Interrupt Flag Register = Bits8 0;
        params.p1out// Port 1 Output Register = Bits8 0;
        params.p1ren// Port 1 Resistor Enable Register = Bits8 0;
        params.p1sel0// Port 1 Port Select Register 0 = Bits8 0;
        params.p1sel1// Port 1 Port Select Register 1 = Bits8 0;
        params.p2dir// Port 2 Direction Register = Bits8 0;
        params.p2ie// Port 2 Interrupt Enable = Bits8 0;
        params.p2ies// Port 2 Interrupt Edge Select = Bits8 0;
        params.p2ifg// Port 2 Interrupt Flag Register = Bits8 0;
        params.p2out// Port 2 Output Register = Bits8 0;
        params.p2ren// Port 2 Resistor Enable Register = Bits8 0;
        params.p2sel0// Port 2 Port Select Register 0 = Bits8 0;
        params.p2sel1// Port 2 Port Select Register 1 = Bits8 0;
        params.p3dir// Port 3 Direction Register = Bits8 0;
        params.p3ie// Port 3 Interrupt Enable = Bits8 0;
        params.p3ies// Port 3 Interrupt Edge Select = Bits8 0;
        params.p3ifg// Port 3 Interrupt Flag Register = Bits8 0;
        params.p3out// Port 3 Output Register = Bits8 0;
        params.p3ren// Port 3 Resistor Enable Register = Bits8 0;
        params.p3sel0// Port 3 Port Select Register 0 = Bits8 0;
        params.p3sel1// Port 3 Port Select Register 1 = Bits8 0;
        params.p4dir// Port 4 Direction Register = Bits8 0;
        params.p4ie// Port 4 Interrupt Enable = Bits8 0;
        params.p4ies// Port 4 Interrupt Edge Select = Bits8 0;
        params.p4ifg// Port 4 Interrupt Flag Register = Bits8 0;
        params.p4out// Port 4 Output Register = Bits8 0;
        params.p4ren// Port 4 Resistor Enable Register = Bits8 0;
        params.p4sel0// Port 4 Port Select Register 0 = Bits8 0;
        params.p4sel1// Port 4 Port Select Register 1 = Bits8 0;
        params.pjdir// Port J Direction Register = Bits8 0;
        params.pjout// Port J Output Register = Bits8 0;
        params.pjren// Port J Resistor Enable Register = Bits8 0;
        params.pjsel0// Port J Port Select Register 0 = Bits8 0;
        params.pjsel1// Port J Port Select Register 1 = Bits8 0;
struct PinMux.ForceSetDefaultRegister_t
index URL
Configuration settings
var obj = new PinMux.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
PinMux.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
PinMux.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
PinMux.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
PinMux.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new PinMux.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = IPinMux.ForceSetDefaultRegister_t[length] undefined;
    //
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
    params.p1dir = Bits8 0;
    // Port 1 Direction Register
    params.p1ie = Bits8 0;
    // Port 1 Interrupt Enable
    params.p1ies = Bits8 0;
    // Port 1 Interrupt Edge Select
    params.p1ifg = Bits8 0;
    // Port 1 Interrupt Flag Register
    params.p1out = Bits8 0;
    // Port 1 Output Register
    params.p1ren = Bits8 0;
    // Port 1 Resistor Enable Register
    params.p1sel0 = Bits8 0;
    // Port 1 Port Select Register 0
    params.p1sel1 = Bits8 0;
    // Port 1 Port Select Register 1
    params.p2dir = Bits8 0;
    // Port 2 Direction Register
    params.p2ie = Bits8 0;
    // Port 2 Interrupt Enable
    params.p2ies = Bits8 0;
    // Port 2 Interrupt Edge Select
    params.p2ifg = Bits8 0;
    // Port 2 Interrupt Flag Register
    params.p2out = Bits8 0;
    // Port 2 Output Register
    params.p2ren = Bits8 0;
    // Port 2 Resistor Enable Register
    params.p2sel0 = Bits8 0;
    // Port 2 Port Select Register 0
    params.p2sel1 = Bits8 0;
    // Port 2 Port Select Register 1
    params.p3dir = Bits8 0;
    // Port 3 Direction Register
    params.p3ie = Bits8 0;
    // Port 3 Interrupt Enable
    params.p3ies = Bits8 0;
    // Port 3 Interrupt Edge Select
    params.p3ifg = Bits8 0;
    // Port 3 Interrupt Flag Register
    params.p3out = Bits8 0;
    // Port 3 Output Register
    params.p3ren = Bits8 0;
    // Port 3 Resistor Enable Register
    params.p3sel0 = Bits8 0;
    // Port 3 Port Select Register 0
    params.p3sel1 = Bits8 0;
    // Port 3 Port Select Register 1
    params.p4dir = Bits8 0;
    // Port 4 Direction Register
    params.p4ie = Bits8 0;
    // Port 4 Interrupt Enable
    params.p4ies = Bits8 0;
    // Port 4 Interrupt Edge Select
    params.p4ifg = Bits8 0;
    // Port 4 Interrupt Flag Register
    params.p4out = Bits8 0;
    // Port 4 Output Register
    params.p4ren = Bits8 0;
    // Port 4 Resistor Enable Register
    params.p4sel0 = Bits8 0;
    // Port 4 Port Select Register 0
    params.p4sel1 = Bits8 0;
    // Port 4 Port Select Register 1
    params.pjdir = Bits8 0;
    // Port J Direction Register
    params.pjout = Bits8 0;
    // Port J Output Register
    params.pjren = Bits8 0;
    // Port J Resistor Enable Register
    params.pjsel0 = Bits8 0;
    // Port J Port Select Register 0
    params.pjsel1 = Bits8 0;
    // Port J Port Select Register 1
config PinMux.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new PinMux.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config PinMux.Params.forceSetDefaultRegister // instance
index URL
Configuration settings
var params = new PinMux.Params;
...
const params.forceSetDefaultRegister = IPinMux.ForceSetDefaultRegister_t[length] computed value;
config PinMux.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new PinMux.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config PinMux.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new PinMux.Params;
...
params.owner = String undefined;
config PinMux.Params.p1dir // instance
index URL

Port 1 Direction Register

Configuration settings
var params = new PinMux.Params;
...
params.p1dir = Bits8 0;
config PinMux.Params.p1ie // instance
index URL

Port 1 Interrupt Enable

Configuration settings
var params = new PinMux.Params;
...
params.p1ie = Bits8 0;
config PinMux.Params.p1ies // instance
index URL

Port 1 Interrupt Edge Select

Configuration settings
var params = new PinMux.Params;
...
params.p1ies = Bits8 0;
config PinMux.Params.p1ifg // instance
index URL

Port 1 Interrupt Flag Register

Configuration settings
var params = new PinMux.Params;
...
params.p1ifg = Bits8 0;
config PinMux.Params.p1out // instance
index URL

Port 1 Output Register

Configuration settings
var params = new PinMux.Params;
...
params.p1out = Bits8 0;
config PinMux.Params.p1ren // instance
index URL

Port 1 Resistor Enable Register

Configuration settings
var params = new PinMux.Params;
...
params.p1ren = Bits8 0;
config PinMux.Params.p1sel0 // instance
index URL

Port 1 Port Select Register 0

Configuration settings
var params = new PinMux.Params;
...
params.p1sel0 = Bits8 0;
config PinMux.Params.p1sel1 // instance
index URL

Port 1 Port Select Register 1

Configuration settings
var params = new PinMux.Params;
...
params.p1sel1 = Bits8 0;
config PinMux.Params.p2dir // instance
index URL

Port 2 Direction Register

Configuration settings
var params = new PinMux.Params;
...
params.p2dir = Bits8 0;
config PinMux.Params.p2ie // instance
index URL

Port 2 Interrupt Enable

Configuration settings
var params = new PinMux.Params;
...
params.p2ie = Bits8 0;
config PinMux.Params.p2ies // instance
index URL

Port 2 Interrupt Edge Select

Configuration settings
var params = new PinMux.Params;
...
params.p2ies = Bits8 0;
config PinMux.Params.p2ifg // instance
index URL

Port 2 Interrupt Flag Register

Configuration settings
var params = new PinMux.Params;
...
params.p2ifg = Bits8 0;
config PinMux.Params.p2out // instance
index URL

Port 2 Output Register

Configuration settings
var params = new PinMux.Params;
...
params.p2out = Bits8 0;
config PinMux.Params.p2ren // instance
index URL

Port 2 Resistor Enable Register

Configuration settings
var params = new PinMux.Params;
...
params.p2ren = Bits8 0;
config PinMux.Params.p2sel0 // instance
index URL

Port 2 Port Select Register 0

Configuration settings
var params = new PinMux.Params;
...
params.p2sel0 = Bits8 0;
config PinMux.Params.p2sel1 // instance
index URL

Port 2 Port Select Register 1

Configuration settings
var params = new PinMux.Params;
...
params.p2sel1 = Bits8 0;
config PinMux.Params.p3dir // instance
index URL

Port 3 Direction Register

Configuration settings
var params = new PinMux.Params;
...
params.p3dir = Bits8 0;
config PinMux.Params.p3ie // instance
index URL

Port 3 Interrupt Enable

Configuration settings
var params = new PinMux.Params;
...
params.p3ie = Bits8 0;
config PinMux.Params.p3ies // instance
index URL

Port 3 Interrupt Edge Select

Configuration settings
var params = new PinMux.Params;
...
params.p3ies = Bits8 0;
config PinMux.Params.p3ifg // instance
index URL

Port 3 Interrupt Flag Register

Configuration settings
var params = new PinMux.Params;
...
params.p3ifg = Bits8 0;
config PinMux.Params.p3out // instance
index URL

Port 3 Output Register

Configuration settings
var params = new PinMux.Params;
...
params.p3out = Bits8 0;
config PinMux.Params.p3ren // instance
index URL

Port 3 Resistor Enable Register

Configuration settings
var params = new PinMux.Params;
...
params.p3ren = Bits8 0;
config PinMux.Params.p3sel0 // instance
index URL

Port 3 Port Select Register 0

Configuration settings
var params = new PinMux.Params;
...
params.p3sel0 = Bits8 0;
config PinMux.Params.p3sel1 // instance
index URL

Port 3 Port Select Register 1

Configuration settings
var params = new PinMux.Params;
...
params.p3sel1 = Bits8 0;
config PinMux.Params.p4dir // instance
index URL

Port 4 Direction Register

Configuration settings
var params = new PinMux.Params;
...
params.p4dir = Bits8 0;
config PinMux.Params.p4ie // instance
index URL

Port 4 Interrupt Enable

Configuration settings
var params = new PinMux.Params;
...
params.p4ie = Bits8 0;
config PinMux.Params.p4ies // instance
index URL

Port 4 Interrupt Edge Select

Configuration settings
var params = new PinMux.Params;
...
params.p4ies = Bits8 0;
config PinMux.Params.p4ifg // instance
index URL

Port 4 Interrupt Flag Register

Configuration settings
var params = new PinMux.Params;
...
params.p4ifg = Bits8 0;
config PinMux.Params.p4out // instance
index URL

Port 4 Output Register

Configuration settings
var params = new PinMux.Params;
...
params.p4out = Bits8 0;
config PinMux.Params.p4ren // instance
index URL

Port 4 Resistor Enable Register

Configuration settings
var params = new PinMux.Params;
...
params.p4ren = Bits8 0;
config PinMux.Params.p4sel0 // instance
index URL

Port 4 Port Select Register 0

Configuration settings
var params = new PinMux.Params;
...
params.p4sel0 = Bits8 0;
config PinMux.Params.p4sel1 // instance
index URL

Port 4 Port Select Register 1

Configuration settings
var params = new PinMux.Params;
...
params.p4sel1 = Bits8 0;
config PinMux.Params.pjdir // instance
index URL

Port J Direction Register

Configuration settings
var params = new PinMux.Params;
...
params.pjdir = Bits8 0;
config PinMux.Params.pjout // instance
index URL

Port J Output Register

Configuration settings
var params = new PinMux.Params;
...
params.pjout = Bits8 0;
config PinMux.Params.pjren // instance
index URL

Port J Resistor Enable Register

Configuration settings
var params = new PinMux.Params;
...
params.pjren = Bits8 0;
config PinMux.Params.pjsel0 // instance
index URL

Port J Port Select Register 0

Configuration settings
var params = new PinMux.Params;
...
params.pjsel0 = Bits8 0;
config PinMux.Params.pjsel1 // instance
index URL

Port J Port Select Register 1

Configuration settings
var params = new PinMux.Params;
...
params.pjsel1 = Bits8 0;
generated on Sun, 25 Nov 2018 22:20:03 GMT


package ti.catalog.msp430.peripherals.pmm
index URL

MSP430 PMM (Power Management Module) peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/package.xdc
requires ti.catalog.msp430.peripherals.clock;
requires ti.catalog.msp430.peripherals.special_function;
package ti.catalog.msp430.peripherals.pmm [1, 0, 0] {
    interface IPMM;
    // MSP430 Power Management Interface
    module PMM;
    // MSP430 Power Management Module
}
generated on Sun, 25 Nov 2018 22:19:33 GMT


interface ti.catalog.msp430.peripherals.pmm.IPMM

metaonly interface ti.catalog.msp430.peripherals.pmm.IPMM
index URL

MSP430 Power Management Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
metaonly interface IPMM { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
package ti.catalog.msp430.peripherals.pmm;
metaonly interface IPMM inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IPMM.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IPMM.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
typedef String StringArray[];
struct IPMM.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
IPMM.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IPMM.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IPMM.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IPMM.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/pmm/IPMM.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:19:33 GMT


module ti.catalog.msp430.peripherals.pmm.PMM

metaonly module ti.catalog.msp430.peripherals.pmm.PMM
index URL

MSP430 Power Management Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/pmm/PMM.xdc
var PMM = xdc.useModule('ti.catalog.msp430.peripherals.pmm.PMM');
module-wide constants & types
    var obj = new PMM.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     PMM.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     PMM.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new PMM.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
struct PMM.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new PMM.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
PMM.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
PMM.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
PMM.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
PMM.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new PMM.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config PMM.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new PMM.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config PMM.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new PMM.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config PMM.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new PMM.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:19:33 GMT


package ti.catalog.msp430.peripherals.ref
index URL

MSP430 REF (Reference Module) peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/package.xdc
requires ti.catalog.msp430.peripherals.clock;
requires ti.catalog.msp430.peripherals.special_function;
package ti.catalog.msp430.peripherals.ref [1, 0, 0] {
    interface IREF;
    // MSP430 REF Interface
    module REF;
    // MSP430 REF Module
    module REF_A;
    // MSP430 REF_A Module
}
generated on Sun, 25 Nov 2018 22:20:03 GMT


interface ti.catalog.msp430.peripherals.ref.IREF

metaonly interface ti.catalog.msp430.peripherals.ref.IREF
index URL

MSP430 REF Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
metaonly interface IREF { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
package ti.catalog.msp430.peripherals.ref;
metaonly interface IREF inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IREF.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IREF.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
typedef String StringArray[];
struct IREF.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
IREF.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IREF.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IREF.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IREF.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/ref/IREF.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:03 GMT


module ti.catalog.msp430.peripherals.ref.REF

metaonly module ti.catalog.msp430.peripherals.ref.REF
index URL

MSP430 REF Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/ref/REF.xdc
var REF = xdc.useModule('ti.catalog.msp430.peripherals.ref.REF');
module-wide constants & types
    var obj = new REF.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     REF.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     REF.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new REF.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
struct REF.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new REF.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
REF.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
REF.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
REF.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
REF.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new REF.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config REF.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new REF.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config REF.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new REF.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config REF.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new REF.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:20:03 GMT


module ti.catalog.msp430.peripherals.ref.REF_A

metaonly module ti.catalog.msp430.peripherals.ref.REF_A
index URL

MSP430 REF_A Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/ref/REF_A.xdc
var REF_A = xdc.useModule('ti.catalog.msp430.peripherals.ref.REF_A');
module-wide constants & types
    var obj = new REF_A.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     REF_A.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     REF_A.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new REF_A.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
struct REF_A.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new REF_A.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
REF_A.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
REF_A.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
REF_A.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
REF_A.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new REF_A.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config REF_A.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new REF_A.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config REF_A.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new REF_A.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config REF_A.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new REF_A.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:20:03 GMT


package ti.catalog.msp430.peripherals.rtc
index URL

MSP430 RTC (real time clock) peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/package.xdc
package ti.catalog.msp430.peripherals.rtc [1, 0, 0] {
    interface IRTC;
    // MSP430 Real-Time Clock interface
    module RTC_B;
    // MSP430 Real-Time Clock B
}
generated on Sun, 25 Nov 2018 22:20:11 GMT


interface ti.catalog.msp430.peripherals.rtc.IRTC

metaonly interface ti.catalog.msp430.peripherals.rtc.IRTC
index URL

MSP430 Real-Time Clock interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
metaonly interface IRTC { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
package ti.catalog.msp430.peripherals.rtc;
metaonly interface IRTC inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IRTC.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IRTC.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
typedef String StringArray[];
struct IRTC.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IRTC.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IRTC.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IRTC.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IRTC.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IRTC.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/rtc/IRTC.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:11 GMT


module ti.catalog.msp430.peripherals.rtc.RTC_B

metaonly module ti.catalog.msp430.peripherals.rtc.RTC_B
index URL

MSP430 Real-Time Clock B

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/rtc/RTC_B.xdc
var RTC_B = xdc.useModule('ti.catalog.msp430.peripherals.rtc.RTC_B');
module-wide constants & types
    var obj = new RTC_B.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new RTC_B.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     RTC_B.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     RTC_B.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new RTC_B.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = RTC_B.ForceSetDefaultRegister_t[] [ ];
        params.interruptSource// RTC interrupt enables = RTC_B.regIntVect_t[4] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
struct RTC_B.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new RTC_B.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct RTC_B.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new RTC_B.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
RTC_B.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
RTC_B.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
RTC_B.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
RTC_B.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new RTC_B.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = RTC_B.ForceSetDefaultRegister_t[] [ ];
    // Determine if each Register needs to be forced set or not
    params.interruptSource = RTC_B.regIntVect_t[4] undefined;
    // RTC interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config RTC_B.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new RTC_B.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config RTC_B.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new RTC_B.Params;
...
const params.forceSetDefaultRegister = RTC_B.ForceSetDefaultRegister_t[] [ ];
config RTC_B.Params.interruptSource // instance
index URL

RTC interrupt enables

Configuration settings
var params = new RTC_B.Params;
...
params.interruptSource = RTC_B.regIntVect_t[4] undefined;
config RTC_B.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new RTC_B.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config RTC_B.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new RTC_B.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:20:11 GMT


package ti.catalog.msp430.peripherals.special_function
index URL

MSP430 interrupt enable support

XDCspec declarations sourced in ti/catalog/msp430/peripherals/special_function/package.xdc
package ti.catalog.msp430.peripherals.special_function [1, 0, 0] {
    module IE1;
    // MSP430 Interrupt Enable Register 1
    module IE2;
    // MSP430 Interrupt Enable Register 2
    module SFRIE1;
    // MSP430 Interrupt Enable Register 1
    module SR;
    // MSP430 Status Register
}
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.special_function.IE1

metaonly module ti.catalog.msp430.peripherals.special_function.IE1
index URL

MSP430 Interrupt Enable Register 1

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/special_function/IE1.xdc
var IE1 = xdc.useModule('ti.catalog.msp430.peripherals.special_function.IE1');
module-wide constants & types
    values of type IE1.ACCVIE_t//
        const IE1.ACCVIE_OFF// Interrupt not enabled;
        const IE1.ACCVIE// Interrupt enabled;
    values of type IE1.ACCVIFG_t//
        const IE1.ACCVIFG_OFF// No interrupt pending;
        const IE1.ACCVIFG// Interrupt pending;
    values of type IE1.NMIIE_t//
        const IE1.NMIIE_OFF// Interrupt not enabled;
        const IE1.NMIIE// Interrupt enabled;
    values of type IE1.NMIIFG_t//
        const IE1.NMIIFG_OFF// No interrupt pending;
        const IE1.NMIIFG// Interrupt pending;
    values of type IE1.OFIE_t//
        const IE1.OFIE_OFF// Interrupt not enabled;
        const IE1.OFIE// Interrupt enabled;
    values of type IE1.OFIFG_t//
        const IE1.OFIFG_OFF// No interrupt pending;
        const IE1.OFIFG// Interrupt pending;
    values of type IE1.WDTIE_t//
        const IE1.WDTIE_OFF// Interrupt not enabled;
        const IE1.WDTIE// Interrupt enabled;
    values of type IE1.WDTIFG_t//
        const IE1.WDTIFG_OFF// No interrupt pending;
        const IE1.WDTIFG// Interrupt pending;
    var obj = new IE1.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new IE1.IE1_t// ;
        obj.ACCVIE// Flash memory access violation interrupt enable. This bit enables the ACCVIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled = IE1.ACCVIE_t ...
        obj.NMIIE// NMI interrupt enable. This bit enables the NMI interrupt. 0 Interrupt disabled 1 Interrupt enabled = IE1.NMIIE_t ...
        obj.OFIE// Oscillator fault flag interrupt enable This bit enables the OFIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled = IE1.OFIE_t ...
        obj.WDTIE// Watchdog timer+ interrupt enable. This bit enables the WDTIFG interrupt for interval timer mode. It is not necessary to set this bit for watchdog mode. 0 Interrupt disabled 1 Interrupt enabled = IE1.WDTIE_t ...
    var obj = new IE1.IFG1_t// ;
        obj.ACCVIFG// Flash memory access violation interrupt flag. 0 No interrupt pending 1 Interrupt pending = IE1.ACCVIFG_t ...
        obj.NMIIFG// NMI interrupt flag. 0 No interrupt pending 1 Interrupt pending = IE1.NMIIFG_t ...
        obj.OFIFG// Oscillator fault interrupt flag 0 No interrupt pending 1 Interrupt pending = IE1.OFIFG_t ...
        obj.WDTIFG// Watchdog timer+ interrupt flag. 0 No interrupt pending 1 Interrupt pending = IE1.WDTIFG_t ...
    var obj = new IE1.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     IE1.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     IE1.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new IE1.Params// Instance config-params object;
        params.IE1// IE1, Interrupt Enable Register 1 = IE1.IE1_t {
            ACCVIE: IE1.ACCVIE_OFF,
            NMIIE: IE1.NMIIE_OFF,
            OFIE: IE1.OFIE_OFF,
            WDTIE: IE1.WDTIE_OFF
        };
        params.IFG1// IFG1, Interrupt Flag Register 1 = IE1.IFG1_t {
            ACCVIFG: IE1.ACCVIFG_OFF,
            NMIIFG: IE1.NMIIFG_OFF,
            OFIFG: IE1.OFIFG_OFF,
            WDTIFG: IE1.WDTIFG_OFF
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = IE1.ForceSetDefaultRegister_t[] [
            {
                register: "IE1",
                regForceSet: false
            },
            {
                register: "IFG1",
                regForceSet: false
            }
        ];
        params.interruptSource// IE1 interrupt enables = IE1.regIntVect_t[8] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance functions
     inst.getACCVIE// Gets ACCVIE bit() returns Bool
     inst.getACCVIFG// Gets ACCVIFG bit() returns Bool
     inst.getNMIIE// Gets NMIIE bit() returns Bool
     inst.getNMIIFG// Gets NMIIFG bit() returns Bool
     inst.getOFIE// Gets OFIE bit() returns Bool
     inst.getOFIFG// Gets OFIFG bit() returns Bool
     inst.getWDTIE// Gets WDTIE bit() returns Bool
     inst.getWDTIFG// Gets WDTIFG bit() returns Bool
     inst.setACCVIE// Sets ACCVIE bit(Bool set) returns Bool
     inst.setACCVIFG// Sets ACCVIFG bit(Bool set) returns Bool
     inst.setNMIIE// Sets NMIIE bit(Bool set) returns Bool
     inst.setNMIIFG// Sets NMIIFG bit(Bool set) returns Bool
     inst.setOFIE// Sets OFIE bit(Bool set) returns Bool
     inst.setOFIFG// Sets OFIFG bit(Bool set) returns Bool
     inst.setWDTIE// Sets WDTIE bit(Bool set) returns Bool
     inst.setWDTIFG// Sets WDTIFG bit(Bool set) returns Bool
enum IE1.ACCVIE_t
index URL
Configuration settings
values of type IE1.ACCVIE_t
    const IE1.ACCVIE_OFF;
    // Interrupt not enabled
    const IE1.ACCVIE;
    // Interrupt enabled
enum IE1.ACCVIFG_t
index URL
Configuration settings
values of type IE1.ACCVIFG_t
    const IE1.ACCVIFG_OFF;
    // No interrupt pending
    const IE1.ACCVIFG;
    // Interrupt pending
enum IE1.NMIIE_t
index URL
Configuration settings
values of type IE1.NMIIE_t
    const IE1.NMIIE_OFF;
    // Interrupt not enabled
    const IE1.NMIIE;
    // Interrupt enabled
enum IE1.NMIIFG_t
index URL
Configuration settings
values of type IE1.NMIIFG_t
    const IE1.NMIIFG_OFF;
    // No interrupt pending
    const IE1.NMIIFG;
    // Interrupt pending
enum IE1.OFIE_t
index URL
Configuration settings
values of type IE1.OFIE_t
    const IE1.OFIE_OFF;
    // Interrupt not enabled
    const IE1.OFIE;
    // Interrupt enabled
enum IE1.OFIFG_t
index URL
Configuration settings
values of type IE1.OFIFG_t
    const IE1.OFIFG_OFF;
    // No interrupt pending
    const IE1.OFIFG;
    // Interrupt pending
enum IE1.WDTIE_t
index URL
Configuration settings
values of type IE1.WDTIE_t
    const IE1.WDTIE_OFF;
    // Interrupt not enabled
    const IE1.WDTIE;
    // Interrupt enabled
enum IE1.WDTIFG_t
index URL
Configuration settings
values of type IE1.WDTIFG_t
    const IE1.WDTIFG_OFF;
    // No interrupt pending
    const IE1.WDTIFG;
    // Interrupt pending
struct IE1.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new IE1.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IE1.IE1_t
index URL
Configuration settings
var obj = new IE1.IE1_t;
    obj.ACCVIE = IE1.ACCVIE_t ...
    // Flash memory access violation interrupt enable. This bit enables the ACCVIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled
    obj.NMIIE = IE1.NMIIE_t ...
    // NMI interrupt enable. This bit enables the NMI interrupt. 0 Interrupt disabled 1 Interrupt enabled
    obj.OFIE = IE1.OFIE_t ...
    // Oscillator fault flag interrupt enable This bit enables the OFIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled
    obj.WDTIE = IE1.WDTIE_t ...
    // Watchdog timer+ interrupt enable. This bit enables the WDTIFG interrupt for interval timer mode. It is not necessary to set this bit for watchdog mode. 0 Interrupt disabled 1 Interrupt enabled
struct IE1.IFG1_t
index URL
Configuration settings
var obj = new IE1.IFG1_t;
    obj.ACCVIFG = IE1.ACCVIFG_t ...
    // Flash memory access violation interrupt flag. 0 No interrupt pending 1 Interrupt pending
    obj.NMIIFG = IE1.NMIIFG_t ...
    // NMI interrupt flag. 0 No interrupt pending 1 Interrupt pending
    obj.OFIFG = IE1.OFIFG_t ...
    // Oscillator fault interrupt flag 0 No interrupt pending 1 Interrupt pending
    obj.WDTIFG = IE1.WDTIFG_t ...
    // Watchdog timer+ interrupt flag. 0 No interrupt pending 1 Interrupt pending
struct IE1.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new IE1.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IE1.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
IE1.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IE1.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
IE1.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new IE1.Params;
// Instance config-params object
    params.IE1 = IE1.IE1_t {
    // IE1, Interrupt Enable Register 1
        ACCVIE: IE1.ACCVIE_OFF,
        NMIIE: IE1.NMIIE_OFF,
        OFIE: IE1.OFIE_OFF,
        WDTIE: IE1.WDTIE_OFF
    };
    params.IFG1 = IE1.IFG1_t {
    // IFG1, Interrupt Flag Register 1
        ACCVIFG: IE1.ACCVIFG_OFF,
        NMIIFG: IE1.NMIIFG_OFF,
        OFIFG: IE1.OFIFG_OFF,
        WDTIFG: IE1.WDTIFG_OFF
    };
    params.forceSetDefaultRegister = IE1.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "IE1",
            regForceSet: false
        },
        {
            register: "IFG1",
            regForceSet: false
        }
    ];
    params.interruptSource = IE1.regIntVect_t[8] undefined;
    // IE1 interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config IE1.Params.IE1 // instance
index URL

IE1, Interrupt Enable Register 1

Configuration settings
var params = new IE1.Params;
...
params.IE1 = IE1.IE1_t {
    ACCVIE: IE1.ACCVIE_OFF,
    NMIIE: IE1.NMIIE_OFF,
    OFIE: IE1.OFIE_OFF,
    WDTIE: IE1.WDTIE_OFF
};
config IE1.Params.IFG1 // instance
index URL

IFG1, Interrupt Flag Register 1

Configuration settings
var params = new IE1.Params;
...
params.IFG1 = IE1.IFG1_t {
    ACCVIFG: IE1.ACCVIFG_OFF,
    NMIIFG: IE1.NMIIFG_OFF,
    OFIFG: IE1.OFIFG_OFF,
    WDTIFG: IE1.WDTIFG_OFF
};
config IE1.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new IE1.Params;
...
const params.forceSetDefaultRegister = IE1.ForceSetDefaultRegister_t[] [
    {
        register: "IE1",
        regForceSet: false
    },
    {
        register: "IFG1",
        regForceSet: false
    }
];
config IE1.Params.interruptSource // instance
index URL

IE1 interrupt enables

Configuration settings
var params = new IE1.Params;
...
params.interruptSource = IE1.regIntVect_t[8] undefined;
config IE1.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new IE1.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IE1.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new IE1.Params;
...
params.owner = String undefined;
IE1.getACCVIE() // instance
index URL

Gets ACCVIE bit

Configuration settings
inst.getACCVIE() returns Bool
SEE
getACCVIE
IE1.getACCVIFG() // instance
index URL

Gets ACCVIFG bit

Configuration settings
inst.getACCVIFG() returns Bool
SEE
getACCVIFG
IE1.getNMIIE() // instance
index URL

Gets NMIIE bit

Configuration settings
inst.getNMIIE() returns Bool
SEE
getNMIIE
IE1.getNMIIFG() // instance
index URL

Gets NMIIFG bit

Configuration settings
inst.getNMIIFG() returns Bool
SEE
getNMIIFG
IE1.getOFIE() // instance
index URL

Gets OFIE bit

Configuration settings
inst.getOFIE() returns Bool
SEE
getOFIE
IE1.getOFIFG() // instance
index URL

Gets OFIFG bit

Configuration settings
inst.getOFIFG() returns Bool
SEE
getOFIFG
IE1.getWDTIE() // instance
index URL

Gets WDTIE bit

Configuration settings
inst.getWDTIE() returns Bool
SEE
getWDTIE
IE1.getWDTIFG() // instance
index URL

Gets WDTIFG bit

Configuration settings
inst.getWDTIFG() returns Bool
SEE
getWDTIFG
IE1.setACCVIE() // instance
index URL

Sets ACCVIE bit

Configuration settings
inst.setACCVIE(Bool set) returns Bool
SEE
setACCVIE
IE1.setACCVIFG() // instance
index URL

Sets ACCVIFG bit

Configuration settings
inst.setACCVIFG(Bool set) returns Bool
SEE
setACCVIFG
IE1.setNMIIE() // instance
index URL

Sets NMIIE bit

Configuration settings
inst.setNMIIE(Bool set) returns Bool
SEE
setNMIIE
IE1.setNMIIFG() // instance
index URL

Sets NMIIFG bit

Configuration settings
inst.setNMIIFG(Bool set) returns Bool
SEE
setNMIIFG
IE1.setOFIE() // instance
index URL

Sets OFIE bit

Configuration settings
inst.setOFIE(Bool set) returns Bool
SEE
setOFIE
IE1.setOFIFG() // instance
index URL

Sets OFIFG bit

Configuration settings
inst.setOFIFG(Bool set) returns Bool
SEE
setOFIFG
IE1.setWDTIE() // instance
index URL

Sets WDTIE bit

Configuration settings
inst.setWDTIE(Bool set) returns Bool
SEE
setWDTIE
IE1.setWDTIFG() // instance
index URL

Sets WDTIFG bit

Configuration settings
inst.setWDTIFG(Bool set) returns Bool
SEE
setWDTIFG
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.special_function.IE2

metaonly module ti.catalog.msp430.peripherals.special_function.IE2
index URL

MSP430 Interrupt Enable Register 2

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/special_function/IE2.xdc
var IE2 = xdc.useModule('ti.catalog.msp430.peripherals.special_function.IE2');
module-wide constants & types
    values of type IE2.UCA0RXIE_t//
        const IE2.UCA0RXIE_OFF// Interrupt disabled;
        const IE2.UCA0RXIE// Interrupt enabled;
    values of type IE2.UCA0RXIFG_t//
        const IE2.UCA0RXIFG_OFF// No interrupt pending;
        const IE2.UCA0RXIFG// Interrupt pending;
    values of type IE2.UCA0TXIE_t//
        const IE2.UCA0TXIE_OFF// Interrupt disabled;
        const IE2.UCA0TXIE// Interrupt enabled;
    values of type IE2.UCA0TXIFG_t//
        const IE2.UCA0TXIFG_OFF// No interrupt pending;
        const IE2.UCA0TXIFG// Interrupt pending;
    values of type IE2.UCB0RXIE_t//
        const IE2.UCB0RXIE_OFF// Interrupt disabled;
        const IE2.UCB0RXIE// Interrupt enabled;
    values of type IE2.UCB0RXIFG_t//
        const IE2.UCB0RXIFG_OFF// No interrupt pending;
        const IE2.UCB0RXIFG// Interrupt pending;
    values of type IE2.UCB0TXIE_t//
        const IE2.UCB0TXIE_OFF// Interrupt disabled;
        const IE2.UCB0TXIE// Interrupt enabled;
    values of type IE2.UCB0TXIFG_t//
        const IE2.UCB0TXIFG_OFF// No interrupt pending;
        const IE2.UCB0TXIFG// Interrupt pending;
    var obj = new IE2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new IE2.IE2_t// IE2, Interrupt Enable Register 2;
        obj.UCB0TXIE// USCI_B0 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled = IE2.UCB0TXIE_t ...
        obj.UCB0RXIE// USCI_B0 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled = IE2.UCB0RXIE_t ...
        obj.UCA0TXIE// USCI_A0 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled = IE2.UCA0TXIE_t ...
        obj.UCA0RXIE// USCI_A0 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled = IE2.UCA0RXIE_t ...
    var obj = new IE2.IFG2_t// IFG2, Interrupt Flag Register 2;
        obj.UCB0TXIFG// USCI_B0 transmit interrupt flag 0 No interrupt pending 1 Interrupt pending = IE2.UCB0TXIFG_t ...
        obj.UCB0RXIFG// USCI_B0 receive interrupt flag 0 No interrupt pending 1 Interrupt pending = IE2.UCB0RXIFG_t ...
        obj.UCA0TXIFG// USCI_A0 transmit interrupt flag 0 No interrupt pending 1 Interrupt pending = IE2.UCA0TXIFG_t ...
        obj.UCA0RXIFG// USCI_A0 receive interrupt flag 0 No interrupt pending 1 Interrupt pending = IE2.UCA0RXIFG_t ...
    var obj = new IE2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     IE2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     IE2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new IE2.Params// Instance config-params object;
        params.IE2// IE2, Interrupt Enable Register 2 = IE2.IE2_t {
            UCB0TXIE: IE2.UCB0TXIE_OFF,
            UCB0RXIE: IE2.UCB0RXIE_OFF,
            UCA0TXIE: IE2.UCA0TXIE_OFF,
            UCA0RXIE: IE2.UCA0RXIE_OFF
        };
        params.IFG2// IFG2, Interrupt Flag Register 2 = IE2.IFG2_t {
            UCB0TXIFG: IE2.UCB0TXIFG_OFF,
            UCB0RXIFG: IE2.UCB0RXIFG_OFF,
            UCA0TXIFG: IE2.UCA0TXIFG_OFF,
            UCA0RXIFG: IE2.UCA0RXIFG_OFF
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = IE2.ForceSetDefaultRegister_t[] [
            {
                register: "IE2",
                regForceSet: false
            },
            {
                register: "IFG2",
                regForceSet: false
            }
        ];
        params.interruptSource// IE2 interrupt enables = IE2.regIntVect_t[8] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance functions
     inst.getUCA0RXIE// Gets UCA0RXIE bit() returns Bool
     inst.getUCA0TXIE// Gets UCA0TXIE bit() returns Bool
     inst.getUCB0RXIE// Gets UCB0RXIE bit() returns Bool
     inst.getUCB0TXIE// Gets UCB0TXIE bit() returns Bool
     inst.setUCA0RXIE// Sets UCA0RXIE bit(Bool set) returns Bool
     inst.setUCA0TXIE// Sets UCA0TXIE bit(Bool set) returns Bool
     inst.setUCB0RXIE// Sets UCB0RXIE bit(Bool set) returns Bool
     inst.setUCB0TXIE// Sets UCB0TXIE bit(Bool set) returns Bool
enum IE2.UCA0RXIE_t
index URL
Configuration settings
values of type IE2.UCA0RXIE_t
    const IE2.UCA0RXIE_OFF;
    // Interrupt disabled
    const IE2.UCA0RXIE;
    // Interrupt enabled
enum IE2.UCA0RXIFG_t
index URL
Configuration settings
values of type IE2.UCA0RXIFG_t
    const IE2.UCA0RXIFG_OFF;
    // No interrupt pending
    const IE2.UCA0RXIFG;
    // Interrupt pending
enum IE2.UCA0TXIE_t
index URL
Configuration settings
values of type IE2.UCA0TXIE_t
    const IE2.UCA0TXIE_OFF;
    // Interrupt disabled
    const IE2.UCA0TXIE;
    // Interrupt enabled
enum IE2.UCA0TXIFG_t
index URL
Configuration settings
values of type IE2.UCA0TXIFG_t
    const IE2.UCA0TXIFG_OFF;
    // No interrupt pending
    const IE2.UCA0TXIFG;
    // Interrupt pending
enum IE2.UCB0RXIE_t
index URL
Configuration settings
values of type IE2.UCB0RXIE_t
    const IE2.UCB0RXIE_OFF;
    // Interrupt disabled
    const IE2.UCB0RXIE;
    // Interrupt enabled
enum IE2.UCB0RXIFG_t
index URL
Configuration settings
values of type IE2.UCB0RXIFG_t
    const IE2.UCB0RXIFG_OFF;
    // No interrupt pending
    const IE2.UCB0RXIFG;
    // Interrupt pending
enum IE2.UCB0TXIE_t
index URL
Configuration settings
values of type IE2.UCB0TXIE_t
    const IE2.UCB0TXIE_OFF;
    // Interrupt disabled
    const IE2.UCB0TXIE;
    // Interrupt enabled
enum IE2.UCB0TXIFG_t
index URL
Configuration settings
values of type IE2.UCB0TXIFG_t
    const IE2.UCB0TXIFG_OFF;
    // No interrupt pending
    const IE2.UCB0TXIFG;
    // Interrupt pending
struct IE2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new IE2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct IE2.IE2_t
index URL

IE2, Interrupt Enable Register 2

Configuration settings
var obj = new IE2.IE2_t;
    obj.UCB0TXIE = IE2.UCB0TXIE_t ...
    // USCI_B0 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCB0RXIE = IE2.UCB0RXIE_t ...
    // USCI_B0 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCA0TXIE = IE2.UCA0TXIE_t ...
    // USCI_A0 transmit interrupt enable 0 Interrupt disabled 1 Interrupt enabled
    obj.UCA0RXIE = IE2.UCA0RXIE_t ...
    // USCI_A0 receive interrupt enable 0 Interrupt disabled 1 Interrupt enabled
struct IE2.IFG2_t
index URL

IFG2, Interrupt Flag Register 2

Configuration settings
var obj = new IE2.IFG2_t;
    obj.UCB0TXIFG = IE2.UCB0TXIFG_t ...
    // USCI_B0 transmit interrupt flag 0 No interrupt pending 1 Interrupt pending
    obj.UCB0RXIFG = IE2.UCB0RXIFG_t ...
    // USCI_B0 receive interrupt flag 0 No interrupt pending 1 Interrupt pending
    obj.UCA0TXIFG = IE2.UCA0TXIFG_t ...
    // USCI_A0 transmit interrupt flag 0 No interrupt pending 1 Interrupt pending
    obj.UCA0RXIFG = IE2.UCA0RXIFG_t ...
    // USCI_A0 receive interrupt flag 0 No interrupt pending 1 Interrupt pending
struct IE2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new IE2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
IE2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
IE2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IE2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
IE2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new IE2.Params;
// Instance config-params object
    params.IE2 = IE2.IE2_t {
    // IE2, Interrupt Enable Register 2
        UCB0TXIE: IE2.UCB0TXIE_OFF,
        UCB0RXIE: IE2.UCB0RXIE_OFF,
        UCA0TXIE: IE2.UCA0TXIE_OFF,
        UCA0RXIE: IE2.UCA0RXIE_OFF
    };
    params.IFG2 = IE2.IFG2_t {
    // IFG2, Interrupt Flag Register 2
        UCB0TXIFG: IE2.UCB0TXIFG_OFF,
        UCB0RXIFG: IE2.UCB0RXIFG_OFF,
        UCA0TXIFG: IE2.UCA0TXIFG_OFF,
        UCA0RXIFG: IE2.UCA0RXIFG_OFF
    };
    params.forceSetDefaultRegister = IE2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "IE2",
            regForceSet: false
        },
        {
            register: "IFG2",
            regForceSet: false
        }
    ];
    params.interruptSource = IE2.regIntVect_t[8] undefined;
    // IE2 interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config IE2.Params.IE2 // instance
index URL

IE2, Interrupt Enable Register 2

Configuration settings
var params = new IE2.Params;
...
params.IE2 = IE2.IE2_t {
    UCB0TXIE: IE2.UCB0TXIE_OFF,
    UCB0RXIE: IE2.UCB0RXIE_OFF,
    UCA0TXIE: IE2.UCA0TXIE_OFF,
    UCA0RXIE: IE2.UCA0RXIE_OFF
};
config IE2.Params.IFG2 // instance
index URL

IFG2, Interrupt Flag Register 2

Configuration settings
var params = new IE2.Params;
...
params.IFG2 = IE2.IFG2_t {
    UCB0TXIFG: IE2.UCB0TXIFG_OFF,
    UCB0RXIFG: IE2.UCB0RXIFG_OFF,
    UCA0TXIFG: IE2.UCA0TXIFG_OFF,
    UCA0RXIFG: IE2.UCA0RXIFG_OFF
};
config IE2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new IE2.Params;
...
const params.forceSetDefaultRegister = IE2.ForceSetDefaultRegister_t[] [
    {
        register: "IE2",
        regForceSet: false
    },
    {
        register: "IFG2",
        regForceSet: false
    }
];
config IE2.Params.interruptSource // instance
index URL

IE2 interrupt enables

Configuration settings
var params = new IE2.Params;
...
params.interruptSource = IE2.regIntVect_t[8] undefined;
config IE2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new IE2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IE2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new IE2.Params;
...
params.owner = String undefined;
IE2.getUCA0RXIE() // instance
index URL

Gets UCA0RXIE bit

Configuration settings
inst.getUCA0RXIE() returns Bool
SEE
getUCA0RXIE
IE2.getUCA0TXIE() // instance
index URL

Gets UCA0TXIE bit

Configuration settings
inst.getUCA0TXIE() returns Bool
SEE
getUCA0TXIE
IE2.getUCB0RXIE() // instance
index URL

Gets UCB0RXIE bit

Configuration settings
inst.getUCB0RXIE() returns Bool
SEE
getUCB0RXIE
IE2.getUCB0TXIE() // instance
index URL

Gets UCB0TXIE bit

Configuration settings
inst.getUCB0TXIE() returns Bool
SEE
getUCB0TXIE
IE2.setUCA0RXIE() // instance
index URL

Sets UCA0RXIE bit

Configuration settings
inst.setUCA0RXIE(Bool set) returns Bool
SEE
setUCA0RXIE
IE2.setUCA0TXIE() // instance
index URL

Sets UCA0TXIE bit

Configuration settings
inst.setUCA0TXIE(Bool set) returns Bool
SEE
setUCA0TXIE
IE2.setUCB0RXIE() // instance
index URL

Sets UCB0RXIE bit

Configuration settings
inst.setUCB0RXIE(Bool set) returns Bool
SEE
setUCB0RXIE
IE2.setUCB0TXIE() // instance
index URL

Sets UCB0TXIE bit

Configuration settings
inst.setUCB0TXIE(Bool set) returns Bool
SEE
setUCB0TXIE
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.special_function.SFRIE1

metaonly module ti.catalog.msp430.peripherals.special_function.SFRIE1
index URL

MSP430 Interrupt Enable Register 1

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/special_function/SFRIE1.xdc
var SFRIE1 = xdc.useModule('ti.catalog.msp430.peripherals.special_function.SFRIE1');
module-wide constants & types
    values of type SFRIE1.ACCVIE_t//
        const SFRIE1.ACCVIE_OFF// Interrupt not enabled;
        const SFRIE1.ACCVIE// Interrupt enabled;
    values of type SFRIE1.ACCVIFG_t//
        const SFRIE1.ACCVIFG_OFF// No interrupt pending;
        const SFRIE1.ACCVIFG// Interrupt pending;
    values of type SFRIE1.JMBINIE_t//
        const SFRIE1.JMBINIE_OFF// Interrupt not enabled;
        const SFRIE1.JMBINIE// Interrupt enabled;
    values of type SFRIE1.JMBOUTIE_t//
        const SFRIE1.JMBOUTIE_OFF// Interrupt not enabled;
        const SFRIE1.JMBOUTIE// Interrupt enabled;
    values of type SFRIE1.NMIIE_t//
        const SFRIE1.NMIIE_OFF// Interrupt not enabled;
        const SFRIE1.NMIIE// Interrupt enabled;
    values of type SFRIE1.NMIIFG_t//
        const SFRIE1.NMIIFG_OFF// No interrupt pending;
        const SFRIE1.NMIIFG// Interrupt pending;
    values of type SFRIE1.OFIE_t//
        const SFRIE1.OFIE_OFF// Interrupt not enabled;
        const SFRIE1.OFIE// Interrupt enabled;
    values of type SFRIE1.OFIFG_t//
        const SFRIE1.OFIFG_OFF// No interrupt pending;
        const SFRIE1.OFIFG// Interrupt pending;
    values of type SFRIE1.WDTIE_t//
        const SFRIE1.WDTIE_OFF// Interrupt not enabled;
        const SFRIE1.WDTIE// Interrupt enabled;
    values of type SFRIE1.WDTIFG_t//
        const SFRIE1.WDTIFG_OFF// No interrupt pending;
        const SFRIE1.WDTIFG// Interrupt pending;
    var obj = new SFRIE1.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new SFRIE1.IE1_t// ;
        obj.ACCVIE// Flash memory access violation interrupt enable. This bit enables the ACCVIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled = SFRIE1.ACCVIE_t ...
        obj.NMIIE// NMI interrupt enable. This bit enables the NMI interrupt. 0 Interrupt disabled 1 Interrupt enabled = SFRIE1.NMIIE_t ...
        obj.OFIE// Oscillator fault flag interrupt enable This bit enables the OFIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled = SFRIE1.OFIE_t ...
        obj.WDTIE// Watchdog timer+ interrupt enable. This bit enables the WDTIFG interrupt for interval timer mode. It is not necessary to set this bit for watchdog mode. 0 Interrupt disabled 1 Interrupt enabled = SFRIE1.WDTIE_t ...
    var obj = new SFRIE1.IFG1_t// ;
        obj.ACCVIFG// Flash memory access violation interrupt flag. 0 No interrupt pending 1 Interrupt pending = SFRIE1.ACCVIFG_t ...
        obj.NMIIFG// NMI interrupt flag. 0 No interrupt pending 1 Interrupt pending = SFRIE1.NMIIFG_t ...
        obj.OFIFG// Oscillator fault interrupt flag 0 No interrupt pending 1 Interrupt pending = SFRIE1.OFIFG_t ...
        obj.WDTIFG// Watchdog timer+ interrupt flag. 0 No interrupt pending 1 Interrupt pending = SFRIE1.WDTIFG_t ...
    var obj = new SFRIE1.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     SFRIE1.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     SFRIE1.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new SFRIE1.Params// Instance config-params object;
        params.SFRIE1// IE1, Interrupt Enable Register 1 = SFRIE1.IE1_t {
            ACCVIE: SFRIE1.ACCVIE_OFF,
            NMIIE: SFRIE1.NMIIE_OFF,
            OFIE: SFRIE1.OFIE_OFF,
            WDTIE: SFRIE1.WDTIE_OFF
        };
        params.SFRIFG1// IFG1, Interrupt Flag Register 1 = SFRIE1.IFG1_t {
            ACCVIFG: SFRIE1.ACCVIFG_OFF,
            NMIIFG: SFRIE1.NMIIFG_OFF,
            OFIFG: SFRIE1.OFIFG_OFF,
            WDTIFG: SFRIE1.WDTIFG_OFF
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = SFRIE1.ForceSetDefaultRegister_t[] [
            {
                register: "SFRIE1",
                regForceSet: false
            },
            {
                register: "SFRIFG1",
                regForceSet: false
            }
        ];
        params.interruptSource// SFRIE1 interrupt enables = SFRIE1.regIntVect_t[16] undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance functions
     inst.getSFRIE1// Gets a bit from the register in SFRIE1(String register) returns Bool
     inst.setSFRIE1// Sets a bit in the register SFRIE1(String register, Bool set) returns Bool
enum SFRIE1.ACCVIE_t
index URL
Configuration settings
values of type SFRIE1.ACCVIE_t
    const SFRIE1.ACCVIE_OFF;
    // Interrupt not enabled
    const SFRIE1.ACCVIE;
    // Interrupt enabled
enum SFRIE1.ACCVIFG_t
index URL
Configuration settings
values of type SFRIE1.ACCVIFG_t
    const SFRIE1.ACCVIFG_OFF;
    // No interrupt pending
    const SFRIE1.ACCVIFG;
    // Interrupt pending
enum SFRIE1.JMBINIE_t
index URL
Configuration settings
values of type SFRIE1.JMBINIE_t
    const SFRIE1.JMBINIE_OFF;
    // Interrupt not enabled
    const SFRIE1.JMBINIE;
    // Interrupt enabled
enum SFRIE1.JMBOUTIE_t
index URL
Configuration settings
values of type SFRIE1.JMBOUTIE_t
    const SFRIE1.JMBOUTIE_OFF;
    // Interrupt not enabled
    const SFRIE1.JMBOUTIE;
    // Interrupt enabled
enum SFRIE1.NMIIE_t
index URL
Configuration settings
values of type SFRIE1.NMIIE_t
    const SFRIE1.NMIIE_OFF;
    // Interrupt not enabled
    const SFRIE1.NMIIE;
    // Interrupt enabled
enum SFRIE1.NMIIFG_t
index URL
Configuration settings
values of type SFRIE1.NMIIFG_t
    const SFRIE1.NMIIFG_OFF;
    // No interrupt pending
    const SFRIE1.NMIIFG;
    // Interrupt pending
enum SFRIE1.OFIE_t
index URL
Configuration settings
values of type SFRIE1.OFIE_t
    const SFRIE1.OFIE_OFF;
    // Interrupt not enabled
    const SFRIE1.OFIE;
    // Interrupt enabled
enum SFRIE1.OFIFG_t
index URL
Configuration settings
values of type SFRIE1.OFIFG_t
    const SFRIE1.OFIFG_OFF;
    // No interrupt pending
    const SFRIE1.OFIFG;
    // Interrupt pending
enum SFRIE1.WDTIE_t
index URL
Configuration settings
values of type SFRIE1.WDTIE_t
    const SFRIE1.WDTIE_OFF;
    // Interrupt not enabled
    const SFRIE1.WDTIE;
    // Interrupt enabled
enum SFRIE1.WDTIFG_t
index URL
Configuration settings
values of type SFRIE1.WDTIFG_t
    const SFRIE1.WDTIFG_OFF;
    // No interrupt pending
    const SFRIE1.WDTIFG;
    // Interrupt pending
struct SFRIE1.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new SFRIE1.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct SFRIE1.IE1_t
index URL
Configuration settings
var obj = new SFRIE1.IE1_t;
    obj.ACCVIE = SFRIE1.ACCVIE_t ...
    // Flash memory access violation interrupt enable. This bit enables the ACCVIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled
    obj.NMIIE = SFRIE1.NMIIE_t ...
    // NMI interrupt enable. This bit enables the NMI interrupt. 0 Interrupt disabled 1 Interrupt enabled
    obj.OFIE = SFRIE1.OFIE_t ...
    // Oscillator fault flag interrupt enable This bit enables the OFIFG interrupt. 0 Interrupt disabled 1 Interrupt enabled
    obj.WDTIE = SFRIE1.WDTIE_t ...
    // Watchdog timer+ interrupt enable. This bit enables the WDTIFG interrupt for interval timer mode. It is not necessary to set this bit for watchdog mode. 0 Interrupt disabled 1 Interrupt enabled
struct SFRIE1.IFG1_t
index URL
Configuration settings
var obj = new SFRIE1.IFG1_t;
    obj.ACCVIFG = SFRIE1.ACCVIFG_t ...
    // Flash memory access violation interrupt flag. 0 No interrupt pending 1 Interrupt pending
    obj.NMIIFG = SFRIE1.NMIIFG_t ...
    // NMI interrupt flag. 0 No interrupt pending 1 Interrupt pending
    obj.OFIFG = SFRIE1.OFIFG_t ...
    // Oscillator fault interrupt flag 0 No interrupt pending 1 Interrupt pending
    obj.WDTIFG = SFRIE1.WDTIFG_t ...
    // Watchdog timer+ interrupt flag. 0 No interrupt pending 1 Interrupt pending
struct SFRIE1.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new SFRIE1.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
SFRIE1.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
SFRIE1.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
SFRIE1.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
SFRIE1.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new SFRIE1.Params;
// Instance config-params object
    params.SFRIE1 = SFRIE1.IE1_t {
    // IE1, Interrupt Enable Register 1
        ACCVIE: SFRIE1.ACCVIE_OFF,
        NMIIE: SFRIE1.NMIIE_OFF,
        OFIE: SFRIE1.OFIE_OFF,
        WDTIE: SFRIE1.WDTIE_OFF
    };
    params.SFRIFG1 = SFRIE1.IFG1_t {
    // IFG1, Interrupt Flag Register 1
        ACCVIFG: SFRIE1.ACCVIFG_OFF,
        NMIIFG: SFRIE1.NMIIFG_OFF,
        OFIFG: SFRIE1.OFIFG_OFF,
        WDTIFG: SFRIE1.WDTIFG_OFF
    };
    params.forceSetDefaultRegister = SFRIE1.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "SFRIE1",
            regForceSet: false
        },
        {
            register: "SFRIFG1",
            regForceSet: false
        }
    ];
    params.interruptSource = SFRIE1.regIntVect_t[16] undefined;
    // SFRIE1 interrupt enables
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config SFRIE1.Params.SFRIE1 // instance
index URL

IE1, Interrupt Enable Register 1

Configuration settings
var params = new SFRIE1.Params;
...
params.SFRIE1 = SFRIE1.IE1_t {
    ACCVIE: SFRIE1.ACCVIE_OFF,
    NMIIE: SFRIE1.NMIIE_OFF,
    OFIE: SFRIE1.OFIE_OFF,
    WDTIE: SFRIE1.WDTIE_OFF
};
config SFRIE1.Params.SFRIFG1 // instance
index URL

IFG1, Interrupt Flag Register 1

Configuration settings
var params = new SFRIE1.Params;
...
params.SFRIFG1 = SFRIE1.IFG1_t {
    ACCVIFG: SFRIE1.ACCVIFG_OFF,
    NMIIFG: SFRIE1.NMIIFG_OFF,
    OFIFG: SFRIE1.OFIFG_OFF,
    WDTIFG: SFRIE1.WDTIFG_OFF
};
config SFRIE1.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new SFRIE1.Params;
...
const params.forceSetDefaultRegister = SFRIE1.ForceSetDefaultRegister_t[] [
    {
        register: "SFRIE1",
        regForceSet: false
    },
    {
        register: "SFRIFG1",
        regForceSet: false
    }
];
config SFRIE1.Params.interruptSource // instance
index URL

SFRIE1 interrupt enables

Configuration settings
var params = new SFRIE1.Params;
...
params.interruptSource = SFRIE1.regIntVect_t[16] undefined;
config SFRIE1.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new SFRIE1.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config SFRIE1.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new SFRIE1.Params;
...
params.owner = String undefined;
SFRIE1.getSFRIE1() // instance
index URL

Gets a bit from the register in SFRIE1

Configuration settings
inst.getSFRIE1(String register) returns Bool
SEE
getSFRIE1
SFRIE1.setSFRIE1() // instance
index URL

Sets a bit in the register SFRIE1

Configuration settings
inst.setSFRIE1(String register, Bool set) returns Bool
SEE
setSFRIE1
generated on Sun, 25 Nov 2018 22:20:19 GMT


module ti.catalog.msp430.peripherals.special_function.SR

metaonly module ti.catalog.msp430.peripherals.special_function.SR
index URL

MSP430 Status Register

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/special_function/SR.xdc
var SR = xdc.useModule('ti.catalog.msp430.peripherals.special_function.SR');
module-wide constants & types
    values of type SR.CPUOFF_t//
        const SR.CPUOFF_OFF// CPU On;
        const SR.CPUOFF// CPU Off;
    values of type SR.GIE_t//
        const SR.GIE_OFF// General interrupt disable;
        const SR.GIE// General interrupt enable;
    values of type SR.OSCOFF_t//
        const SR.OSCOFF_OFF// Oscillator On;
        const SR.OSCOFF// Oscillator Off;
    values of type SR.SCG0_t//
        const SR.SCG0_OFF// Disable System clock generator 0;
        const SR.SCG0// Enable System clock generator 0;
    values of type SR.SCG1_t//
        const SR.SCG1_OFF// Disable System clock generator 1;
        const SR.SCG1// Enable System clock generator 1;
    var obj = new SR.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new SR.SR_t// ;
        obj.SCG1// System clock generator 1 This bit, when set, turns off the SMCLK = SR.SCG1_t ...
        obj.SCG0// System clock generator 0 This bit, when set, turns off the DCO dc generator, if DCOCLK is not used for MCLK or SMCLK = SR.SCG0_t ...
        obj.OSCOFF// Oscillator Off This bit, when set, turns off the LFXT1 crystal oscillator, when LFXT1CLK is not use for MCLK or SMCLK = SR.OSCOFF_t ...
        obj.CPUOFF// CPU off This bit, when set, turns off the CPU = SR.CPUOFF_t ...
        obj.GIE// General interrupt enable This bit, when set, enables maskable interrupts. When reset, all maskable interrupts are disabled = SR.GIE_t ...
module-wide functions
     SR.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     SR.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new SR.Params// Instance config-params object;
        params.SR// SR, Status Register = SR.SR_t {
            SCG1: SR.SCG1_OFF,
            SCG0: SR.SCG0_OFF,
            OSCOFF: SR.OSCOFF_OFF,
            CPUOFF: SR.CPUOFF_OFF,
            GIE: SR.GIE_OFF
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = SR.ForceSetDefaultRegister_t[] [
            {
                register: "SR",
                regForceSet: false
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance functions
     inst.getCPUOFF// Gets CPUOFF bit() returns Bool
     inst.getGIE// Gets GIE bit() returns Bool
     inst.getOSCOFF// Gets OSCOFF bit() returns Bool
     inst.getSCG0// Gets SCG0 bit() returns Bool
     inst.getSCG1// Gets SCG1 bit() returns Bool
     inst.setCPUOFF// Sets CPUOFF bit(Bool set) returns Bool
     inst.setGIE// Sets GIE bit(Bool set) returns Bool
     inst.setOSCOFF// Sets OSCOFF bit(Bool set) returns Bool
     inst.setSCG0// Sets SCG0 bit(Bool set) returns Bool
     inst.setSCG1// Sets SCG1 bit(Bool set) returns Bool
enum SR.CPUOFF_t
index URL
Configuration settings
values of type SR.CPUOFF_t
    const SR.CPUOFF_OFF;
    // CPU On
    const SR.CPUOFF;
    // CPU Off
enum SR.GIE_t
index URL
Configuration settings
values of type SR.GIE_t
    const SR.GIE_OFF;
    // General interrupt disable
    const SR.GIE;
    // General interrupt enable
enum SR.OSCOFF_t
index URL
Configuration settings
values of type SR.OSCOFF_t
    const SR.OSCOFF_OFF;
    // Oscillator On
    const SR.OSCOFF;
    // Oscillator Off
enum SR.SCG0_t
index URL
Configuration settings
values of type SR.SCG0_t
    const SR.SCG0_OFF;
    // Disable System clock generator 0
    const SR.SCG0;
    // Enable System clock generator 0
enum SR.SCG1_t
index URL
Configuration settings
values of type SR.SCG1_t
    const SR.SCG1_OFF;
    // Disable System clock generator 1
    const SR.SCG1;
    // Enable System clock generator 1
struct SR.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new SR.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct SR.SR_t
index URL
Configuration settings
var obj = new SR.SR_t;
    obj.SCG1 = SR.SCG1_t ...
    // System clock generator 1 This bit, when set, turns off the SMCLK
    obj.SCG0 = SR.SCG0_t ...
    // System clock generator 0 This bit, when set, turns off the DCO dc generator, if DCOCLK is not used for MCLK or SMCLK
    obj.OSCOFF = SR.OSCOFF_t ...
    // Oscillator Off This bit, when set, turns off the LFXT1 crystal oscillator, when LFXT1CLK is not use for MCLK or SMCLK
    obj.CPUOFF = SR.CPUOFF_t ...
    // CPU off This bit, when set, turns off the CPU
    obj.GIE = SR.GIE_t ...
    // General interrupt enable This bit, when set, enables maskable interrupts. When reset, all maskable interrupts are disabled
SR.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
SR.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
SR.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
SR.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new SR.Params;
// Instance config-params object
    params.SR = SR.SR_t {
    // SR, Status Register
        SCG1: SR.SCG1_OFF,
        SCG0: SR.SCG0_OFF,
        OSCOFF: SR.OSCOFF_OFF,
        CPUOFF: SR.CPUOFF_OFF,
        GIE: SR.GIE_OFF
    };
    params.forceSetDefaultRegister = SR.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "SR",
            regForceSet: false
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config SR.Params.SR // instance
index URL

SR, Status Register

Configuration settings
var params = new SR.Params;
...
params.SR = SR.SR_t {
    SCG1: SR.SCG1_OFF,
    SCG0: SR.SCG0_OFF,
    OSCOFF: SR.OSCOFF_OFF,
    CPUOFF: SR.CPUOFF_OFF,
    GIE: SR.GIE_OFF
};
config SR.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new SR.Params;
...
const params.forceSetDefaultRegister = SR.ForceSetDefaultRegister_t[] [
    {
        register: "SR",
        regForceSet: false
    }
];
config SR.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new SR.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config SR.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new SR.Params;
...
params.owner = String undefined;
SR.getCPUOFF() // instance
index URL

Gets CPUOFF bit

Configuration settings
inst.getCPUOFF() returns Bool
SEE
getCPUOFF
SR.getGIE() // instance
index URL

Gets GIE bit

Configuration settings
inst.getGIE() returns Bool
SEE
getGIE
SR.getOSCOFF() // instance
index URL

Gets OSCOFF bit

Configuration settings
inst.getOSCOFF() returns Bool
SEE
getOSCOFF
SR.getSCG0() // instance
index URL

Gets SCG0 bit

Configuration settings
inst.getSCG0() returns Bool
SEE
getSCG0
SR.getSCG1() // instance
index URL

Gets SCG1 bit

Configuration settings
inst.getSCG1() returns Bool
SEE
getSCG1
SR.setCPUOFF() // instance
index URL

Sets CPUOFF bit

Configuration settings
inst.setCPUOFF(Bool set) returns Bool
SEE
setCPUOFF
SR.setGIE() // instance
index URL

Sets GIE bit

Configuration settings
inst.setGIE(Bool set) returns Bool
SEE
setGIE
SR.setOSCOFF() // instance
index URL

Sets OSCOFF bit

Configuration settings
inst.setOSCOFF(Bool set) returns Bool
SEE
setOSCOFF
SR.setSCG0() // instance
index URL

Sets SCG0 bit

Configuration settings
inst.setSCG0(Bool set) returns Bool
SEE
setSCG0
SR.setSCG1() // instance
index URL

Sets SCG1 bit

Configuration settings
inst.setSCG1(Bool set) returns Bool
SEE
setSCG1
generated on Sun, 25 Nov 2018 22:20:19 GMT


package ti.catalog.msp430.peripherals.svs
index URL

MSP430 SVS peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/package.xdc
package ti.catalog.msp430.peripherals.svs [1, 0, 0] {
    interface ISVS;
    // MSP430 ISVS interface
    module SVS;
    // MSP430F2xx Family SVS Module
}
generated on Sun, 25 Nov 2018 22:20:02 GMT


interface ti.catalog.msp430.peripherals.svs.ISVS

metaonly interface ti.catalog.msp430.peripherals.svs.ISVS
index URL

MSP430 ISVS interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
metaonly interface ISVS { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
package ti.catalog.msp430.peripherals.svs;
metaonly interface ISVS inherits IPeripheral {
module-wide constants & types
    enum PORON_t// PORON Bit {
         PORON_OFF// SVSFG does not cause a POR,
         PORON// SVSFG causes a POR
    };
    enum SVSFG_t// SVSFG Bit {
         SVSFG_OFF,
         SVSFG
    };
    enum SVSON_t// SVSON Bit {
         SVSON_OFF,
         SVSON
    };
    enum SVSOP_t// SVSOP Bit {
         SVSOP_OFF,
         SVSOP
    };
    enum VLD0_t// VLD0 Bit {
         VLD0_OFF,
         VLD0
    };
    enum VLD1_t// VLD1 Bit {
         VLD1_OFF,
         VLD1
    };
    enum VLD2_t// VLD2 Bit {
         VLD2_OFF,
         VLD2
    };
    enum VLD3_t// VLD3 Bit {
         VLD3_OFF,
         VLD3
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
enum ISVS.PORON_t
index URL

PORON Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum PORON_t {
    PORON_OFF,
    // SVSFG does not cause a POR
    PORON
    // SVSFG causes a POR
};
enum ISVS.SVSFG_t
index URL

SVSFG Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum SVSFG_t {
    SVSFG_OFF,
    SVSFG
};
enum ISVS.SVSON_t
index URL

SVSON Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum SVSON_t {
    SVSON_OFF,
    SVSON
};
enum ISVS.SVSOP_t
index URL

SVSOP Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum SVSOP_t {
    SVSOP_OFF,
    SVSOP
};
enum ISVS.VLD0_t
index URL

VLD0 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum VLD0_t {
    VLD0_OFF,
    VLD0
};
enum ISVS.VLD1_t
index URL

VLD1 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum VLD1_t {
    VLD1_OFF,
    VLD1
};
enum ISVS.VLD2_t
index URL

VLD2 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum VLD2_t {
    VLD2_OFF,
    VLD2
};
enum ISVS.VLD3_t
index URL

VLD3 Bit

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
enum VLD3_t {
    VLD3_OFF,
    VLD3
};
typedef ISVS.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef ISVS.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
typedef String StringArray[];
struct ISVS.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
ISVS.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ISVS.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config ISVS.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ISVS.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/svs/ISVS.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:02 GMT


module ti.catalog.msp430.peripherals.svs.SVS

metaonly module ti.catalog.msp430.peripherals.svs.SVS
index URL

MSP430F2xx Family SVS Module

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/svs/SVS.xdc
var SVS = xdc.useModule('ti.catalog.msp430.peripherals.svs.SVS');
module-wide constants & types
    values of type SVS.PORON_t// PORON Bit
        const SVS.PORON_OFF// SVSFG does not cause a POR;
        const SVS.PORON// SVSFG causes a POR;
    values of type SVS.SVSFG_t// SVSFG Bit
        const SVS.SVSFG_OFF;
        const SVS.SVSFG;
    values of type SVS.SVSON_t// SVSON Bit
        const SVS.SVSON_OFF;
        const SVS.SVSON;
    values of type SVS.SVSOP_t// SVSOP Bit
        const SVS.SVSOP_OFF;
        const SVS.SVSOP;
    values of type SVS.VLD0_t// VLD0 Bit
        const SVS.VLD0_OFF;
        const SVS.VLD0;
    values of type SVS.VLD1_t// VLD1 Bit
        const SVS.VLD1_OFF;
        const SVS.VLD1;
    values of type SVS.VLD2_t// VLD2 Bit
        const SVS.VLD2_OFF;
        const SVS.VLD2;
    values of type SVS.VLD3_t// VLD3 Bit
        const SVS.VLD3_OFF;
        const SVS.VLD3;
    var obj = new SVS.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new SVS.SVSCTL_t// SVSCTL Register;
        obj.VLD3// Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V = SVS.VLD3_t ...
        obj.VLD2// Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V = SVS.VLD2_t ...
        obj.VLD1// Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V = SVS.VLD1_t ...
        obj.VLD0// Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V = SVS.VLD0_t ...
        obj.PORON// POR on. This bit enables the SVSFG flag to cause a POR device reset. 0 SVSFG does not cause a POR 1 SVSFG causes a POR = SVS.PORON_t ...
        obj.SVSON// SVS on. This bit reflects the status of SVS operation. This bit DOES NOT turn on the SVS. The SVS is turned on by setting VLDx > 0. 0 SVS is Off 1 SVS is On = SVS.SVSON_t ...
        obj.SVSOP// SVS output. This bit reflects the output value of the SVS comparator. 0 SVS comparator output is low 1 SVS comparator output is high = SVS.SVSOP_t ...
        obj.SVSFG// SVS flag. This bit indicates a low voltage condition. SVSFG remains set after a low voltage condition until reset by software. 0 No low voltage condition occurred 1 A low condition is present or has occurred = SVS.SVSFG_t ...
module-wide functions
     SVS.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     SVS.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new SVS.Params// Instance config-params object;
        params.SVSCTL// SVSCTL Register = SVS.SVSCTL_t {
            VLD3: ISVS.VLD3_OFF,
            VLD2: ISVS.VLD2_OFF,
            VLD1: ISVS.VLD1_OFF,
            VLD0: ISVS.VLD0_OFF,
            PORON: ISVS.PORON_OFF,
            SVSON: ISVS.SVSON_OFF,
            SVSOP: ISVS.SVSOP_OFF,
            SVSFG: ISVS.SVSFG_OFF
        };
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = SVS.ForceSetDefaultRegister_t[] [
            {
                register: "SVSCTL",
                regForceSet: false
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = SVS.create// Create an instance-object(params);
enum SVS.PORON_t
index URL

PORON Bit

Configuration settings
values of type SVS.PORON_t
    const SVS.PORON_OFF;
    // SVSFG does not cause a POR
    const SVS.PORON;
    // SVSFG causes a POR
enum SVS.SVSFG_t
index URL

SVSFG Bit

Configuration settings
values of type SVS.SVSFG_t
    const SVS.SVSFG_OFF;
    const SVS.SVSFG;
enum SVS.SVSON_t
index URL

SVSON Bit

Configuration settings
values of type SVS.SVSON_t
    const SVS.SVSON_OFF;
    const SVS.SVSON;
enum SVS.SVSOP_t
index URL

SVSOP Bit

Configuration settings
values of type SVS.SVSOP_t
    const SVS.SVSOP_OFF;
    const SVS.SVSOP;
enum SVS.VLD0_t
index URL

VLD0 Bit

Configuration settings
values of type SVS.VLD0_t
    const SVS.VLD0_OFF;
    const SVS.VLD0;
enum SVS.VLD1_t
index URL

VLD1 Bit

Configuration settings
values of type SVS.VLD1_t
    const SVS.VLD1_OFF;
    const SVS.VLD1;
enum SVS.VLD2_t
index URL

VLD2 Bit

Configuration settings
values of type SVS.VLD2_t
    const SVS.VLD2_OFF;
    const SVS.VLD2;
enum SVS.VLD3_t
index URL

VLD3 Bit

Configuration settings
values of type SVS.VLD3_t
    const SVS.VLD3_OFF;
    const SVS.VLD3;
struct SVS.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new SVS.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct SVS.SVSCTL_t
index URL

SVSCTL Register

Configuration settings
var obj = new SVS.SVSCTL_t;
    obj.VLD3 = SVS.VLD3_t ...
    // Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V
    obj.VLD2 = SVS.VLD2_t ...
    // Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V
    obj.VLD1 = SVS.VLD1_t ...
    // Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V
    obj.VLD0 = SVS.VLD0_t ...
    // Voltage level detect. These bits turn on the SVS and select the nominal SVS threshold voltage level. See the device specific data sheet for parameters. 0000 SVS is off 0001 1.9 V 0010 2.1 V 0011 2.2 V 0100 2.3 V 0101 2.4 V 0110 2.5 V 0111 2.65 V 1000 2.8 V 1001 2.9 V 1010 3.05 1011 3.2 V 1100 3.35 V 1101 3.5 V 1110 3.7 V 1111 Compares external input voltage SVSIN to 1.25 V
    obj.PORON = SVS.PORON_t ...
    // POR on. This bit enables the SVSFG flag to cause a POR device reset. 0 SVSFG does not cause a POR 1 SVSFG causes a POR
    obj.SVSON = SVS.SVSON_t ...
    // SVS on. This bit reflects the status of SVS operation. This bit DOES NOT turn on the SVS. The SVS is turned on by setting VLDx > 0. 0 SVS is Off 1 SVS is On
    obj.SVSOP = SVS.SVSOP_t ...
    // SVS output. This bit reflects the output value of the SVS comparator. 0 SVS comparator output is low 1 SVS comparator output is high
    obj.SVSFG = SVS.SVSFG_t ...
    // SVS flag. This bit indicates a low voltage condition. SVSFG remains set after a low voltage condition until reset by software. 0 No low voltage condition occurred 1 A low condition is present or has occurred
SVS.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
SVS.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
SVS.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
SVS.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new SVS.Params;
// Instance config-params object
    params.SVSCTL = SVS.SVSCTL_t {
    // SVSCTL Register
        VLD3: ISVS.VLD3_OFF,
        VLD2: ISVS.VLD2_OFF,
        VLD1: ISVS.VLD1_OFF,
        VLD0: ISVS.VLD0_OFF,
        PORON: ISVS.PORON_OFF,
        SVSON: ISVS.SVSON_OFF,
        SVSOP: ISVS.SVSOP_OFF,
        SVSFG: ISVS.SVSFG_OFF
    };
    params.forceSetDefaultRegister = SVS.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "SVSCTL",
            regForceSet: false
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config SVS.Params.SVSCTL // instance
index URL

SVSCTL Register

Configuration settings
var params = new SVS.Params;
...
params.SVSCTL = SVS.SVSCTL_t {
    VLD3: ISVS.VLD3_OFF,
    VLD2: ISVS.VLD2_OFF,
    VLD1: ISVS.VLD1_OFF,
    VLD0: ISVS.VLD0_OFF,
    PORON: ISVS.PORON_OFF,
    SVSON: ISVS.SVSON_OFF,
    SVSOP: ISVS.SVSOP_OFF,
    SVSFG: ISVS.SVSFG_OFF
};
config SVS.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new SVS.Params;
...
const params.forceSetDefaultRegister = SVS.ForceSetDefaultRegister_t[] [
    {
        register: "SVSCTL",
        regForceSet: false
    }
];
config SVS.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new SVS.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config SVS.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new SVS.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new SVS.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SVS.create(params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:02 GMT


package ti.catalog.msp430.peripherals.timer
index URL

MSP430 Timer_A and Timer_B peripherals

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/package.xdc
requires ti.catalog.msp430.peripherals.clock;
package ti.catalog.msp430.peripherals.timer [1, 0, 0] {
    interface ITimer;
    // MSP430 ITimer interface
    interface ITimer_A;
    // MSP430 ITimer_A interface
    interface ITimer_B;
    // MSP430 ITimer_B interface
    module Timer0_A3;
    // MSP430 Timer0_A3 timer
    module Timer0_A5;
    // MSP430 Timer0_A5 timer
    module Timer0_B3;
    // MSP430 Timer0_B3 timer
    module Timer0_B7;
    // MSP430 Timer0_B7 timer
    module Timer1_A2;
    // MSP430 Timer1_A2 timer
    module Timer1_A3;
    // MSP430 Timer1_A3 timer
    module Timer1_B3;
    // MSP430 Timer1_B3 timer
    module Timer2_A2;
    // MSP430 Timer2_A2 timer
    module Timer2_A3;
    // MSP430 Timer2_A3 timer
    module Timer2_B3;
    // MSP430 Timer2_B3 timer
    module Timer3_A2;
    // MSP430 Timer3_A2 timer
    module Timer3_A5;
    // MSP430 Timer3_A5 timer
    module Timer_A2;
    // MSP430 Timer_A2 timer
    module Timer_A3;
    // MSP430 Timer_A3 timer
    module Timer_A5;
    // MSP430 Timer_A5 timer
    module Timer_B3;
    // MSP430 Timer_B timer
    module Timer_B7;
    // MSP430 Timer_B7 timer
}
generated on Sun, 25 Nov 2018 22:20:18 GMT


interface ti.catalog.msp430.peripherals.timer.ITimer

metaonly interface ti.catalog.msp430.peripherals.timer.ITimer
index URL

MSP430 ITimer interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
metaonly interface ITimer { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
package ti.catalog.msp430.peripherals.timer;
metaonly interface ITimer inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config UInt baseAddr// Address of the peripheral's control register;
    config UInt intNum// Interrupt source number;
    config Bool isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = false;
    config String name// Specific peripheral name given by the device;
    config UChar numberOfTimers// Stores the number of available timer capture compare blocks;
    config String owner// String specifying the entity that manages the peripheral;
per-instance creation
     create// Create an instance-object(IClock.Instance clock);
per-instance functions
    Bits16 getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber);
    Void setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value);
}
typedef ITimer.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef ITimer.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
typedef String StringArray[];
struct ITimer.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ITimer.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
ITimer.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ITimer.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config ITimer.Params.baseAddr // instance
index URL

Address of the peripheral's control register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
config UInt baseAddr;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config ITimer.Params.intNum // instance
index URL

Interrupt source number

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
config UInt intNum;
config ITimer.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
config Bool isInternal = false;
config ITimer.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ITimer.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
config UChar numberOfTimers;
config ITimer.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
config String owner;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
create(IClock.Instance clock);
// Create an instance-object
ITimer.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
Bits16 getTxxCCRx(UChar ccrNumber);
SEE
getTxxCCRx
ITimer.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer.xdc
Void setTxxCCRx(UChar ccrNumber, Bits16 value);
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:14 GMT


interface ti.catalog.msp430.peripherals.timer.ITimer_A

metaonly interface ti.catalog.msp430.peripherals.timer.ITimer_A
index URL

MSP430 ITimer_A interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly interface ITimer_A { ...
// inherits ti.catalog.msp430.peripherals.timer.ITimer
    // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
package ti.catalog.msp430.peripherals.timer;
metaonly interface ITimer_A inherits ITimer {
module-wide constants & types
    enum CAP_t// {
         CAP_OFF// Compare mode,
         CAP// Capture mode
    };
    enum CCIE_t// {
         CCIE_OFF,
         CCIE
    };
    enum CCIFG_t// {
         CCIFG_OFF,
         CCIFG
    };
    enum CCIS_t// {
         CCIS_0// CCIxA,
         CCIS_1// CCIxB,
         CCIS_2// GND,
         CCIS_3// Vcc
    };
    enum CCI_t// {
         CCI_OFF,
         CCI
    };
    enum CM_t// {
         CM_0// No Capture,
         CM_1// Rising Edge,
         CM_2// Falling Edge,
         CM_3// Both Edges
    };
    enum COV_t// {
         COV_OFF,
         COV
    };
    enum ID_t// {
         ID_0// Divider - /1,
         ID_1// Divider - /2,
         ID_2// Divider - /4,
         ID_3// Divider - /8
    };
    enum IVValues// TA3IV Definitions {
         TAIV_NONE// No Interrupt pending,
         TAIV_TACCR1// TACCR1_CCIFG,
         TAIV_TACCR2// TACCR2_CCIFG,
         TAIV_6// Reserved,
         TAIV_8// Reserved,
         TAIV_TAIFG// TAIFG
    };
    enum MC_t// {
         MC_0// Stop Mode,
         MC_1// Up Mode,
         MC_2// Continuous Mode,
         MC_3// Up/Down Mode
    };
    enum OUTMOD_t// {
         OUTMOD_0// PWM output mode: 0 - OUT bit value,
         OUTMOD_1// PWM output mode: 1 - Set,
         OUTMOD_2// PWM output mode: 2 - PWM toggle/reset,
         OUTMOD_3// PWM output mode: 3 - PWM set/reset,
         OUTMOD_4// PWM output mode: 4 - Toggle,
         OUTMOD_5// PWM output mode: 5 - Reset,
         OUTMOD_6// PWM output mode: 6 - PWM toggle/set,
         OUTMOD_7// PWM output mode: 7 - PWM reset/set
    };
    enum OUT_t// {
         OUT_OFF,
         OUT
    };
    enum SCCI_t// {
         SCCI_OFF// Latched capture signal (read),
         SCCI// Latched capture signal (read)
    };
    enum SCS_t// {
         SCS_OFF// Asynchronous Capture,
         SCS// Sychronous Capture
    };
    enum TACLR_t// {
         TACLR_OFF,
         TACLR
    };
    enum TAIE_t// {
         TAIE_OFF,
         TAIE
    };
    enum TAIFG_t// {
         TAIFG_OFF,
         TAIFG
    };
    enum TASSEL_t// {
         TASSEL_0// TACLK,
         TASSEL_1// ACLK,
         TASSEL_2// SMCLK,
         TASSEL_3// INCLK
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct TACCTLx_t// Capture/Compare Control Register {
         ITimer_A.CM_t CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges;
         ITimer_A.CCIS_t CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC;
         ITimer_A.SCS_t SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture;
         ITimer_A.SCCI_t SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit;
         ITimer_A.CAP_t CAP// Capture mode 0 Compare mode 1 Capture mode;
         ITimer_A.OUTMOD_t OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set;
         ITimer_A.CCIE_t CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled;
         ITimer_A.CCI_t CCI// Capture/compare input. The selected input signal can be read by this bit;
         ITimer_A.OUT_t OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high;
         ITimer_A.COV_t COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred;
         ITimer_A.CCIFG_t CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct TACTL_t// Timer_A Control Register {
         ITimer_A.TASSEL_t TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK;
         ITimer_A.ID_t ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8;
         ITimer_A.MC_t MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h;
         ITimer_A.TACLR_t TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero;
         ITimer_A.TAIE_t TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled;
         ITimer_A.TAIFG_t TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Float INCLK// Timer_A INCLK = 0;
    config Float TACLK// Timer_A TACLK = 0;
    config UInt baseAddr// Address of the peripheral's control register;
    config UInt intNum// Interrupt source number;
    config Bool isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = false;
    config String name// Specific peripheral name given by the device;
    config UChar numberOfTimers// Stores the number of available timer capture compare blocks;
    config String owner// String specifying the entity that manages the peripheral;
per-instance creation
     create// Create an instance-object(IClock.Instance clock);
per-instance functions
    Bits16 getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber);
    Void setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value);
}
enum ITimer_A.CAP_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CAP_t {
    CAP_OFF,
    // Compare mode
    CAP
    // Capture mode
};
enum ITimer_A.CCIE_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCIE_t {
    CCIE_OFF,
    CCIE
};
enum ITimer_A.CCIFG_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCIFG_t {
    CCIFG_OFF,
    CCIFG
};
enum ITimer_A.CCIS_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCIS_t {
    CCIS_0,
    // CCIxA
    CCIS_1,
    // CCIxB
    CCIS_2,
    // GND
    CCIS_3
    // Vcc
};
enum ITimer_A.CCI_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCI_t {
    CCI_OFF,
    CCI
};
enum ITimer_A.CM_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CM_t {
    CM_0,
    // No Capture
    CM_1,
    // Rising Edge
    CM_2,
    // Falling Edge
    CM_3
    // Both Edges
};
enum ITimer_A.COV_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum COV_t {
    COV_OFF,
    COV
};
enum ITimer_A.ID_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum ID_t {
    ID_0,
    // Divider - /1
    ID_1,
    // Divider - /2
    ID_2,
    // Divider - /4
    ID_3
    // Divider - /8
};
enum ITimer_A.IVValues
index URL

TA3IV Definitions

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum IVValues {
    TAIV_NONE,
    // No Interrupt pending
    TAIV_TACCR1,
    // TACCR1_CCIFG
    TAIV_TACCR2,
    // TACCR2_CCIFG
    TAIV_6,
    // Reserved
    TAIV_8,
    // Reserved
    TAIV_TAIFG
    // TAIFG
};
enum ITimer_A.MC_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum MC_t {
    MC_0,
    // Stop Mode
    MC_1,
    // Up Mode
    MC_2,
    // Continuous Mode
    MC_3
    // Up/Down Mode
};
enum ITimer_A.OUTMOD_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum OUTMOD_t {
    OUTMOD_0,
    // PWM output mode: 0 - OUT bit value
    OUTMOD_1,
    // PWM output mode: 1 - Set
    OUTMOD_2,
    // PWM output mode: 2 - PWM toggle/reset
    OUTMOD_3,
    // PWM output mode: 3 - PWM set/reset
    OUTMOD_4,
    // PWM output mode: 4 - Toggle
    OUTMOD_5,
    // PWM output mode: 5 - Reset
    OUTMOD_6,
    // PWM output mode: 6 - PWM toggle/set
    OUTMOD_7
    // PWM output mode: 7 - PWM reset/set
};
enum ITimer_A.OUT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum OUT_t {
    OUT_OFF,
    OUT
};
enum ITimer_A.SCCI_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum SCCI_t {
    SCCI_OFF,
    // Latched capture signal (read)
    SCCI
    // Latched capture signal (read)
};
enum ITimer_A.SCS_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum SCS_t {
    SCS_OFF,
    // Asynchronous Capture
    SCS
    // Sychronous Capture
};
enum ITimer_A.TACLR_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TACLR_t {
    TACLR_OFF,
    TACLR
};
enum ITimer_A.TAIE_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TAIE_t {
    TAIE_OFF,
    TAIE
};
enum ITimer_A.TAIFG_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TAIFG_t {
    TAIFG_OFF,
    TAIFG
};
enum ITimer_A.TASSEL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TASSEL_t {
    TASSEL_0,
    // TACLK
    TASSEL_1,
    // ACLK
    TASSEL_2,
    // SMCLK
    TASSEL_3
    // INCLK
};
typedef ITimer_A.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef ITimer_A.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
typedef String StringArray[];
struct ITimer_A.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ITimer_A.TACCTLx_t
index URL

Capture/Compare Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly struct TACCTLx_t {
     ITimer_A.CM_t CM;
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
     ITimer_A.CCIS_t CCIS;
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
     ITimer_A.SCS_t SCS;
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
     ITimer_A.SCCI_t SCCI;
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
     ITimer_A.CAP_t CAP;
    // Capture mode 0 Compare mode 1 Capture mode
     ITimer_A.OUTMOD_t OUTMOD;
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
     ITimer_A.CCIE_t CCIE;
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
     ITimer_A.CCI_t CCI;
    // Capture/compare input. The selected input signal can be read by this bit
     ITimer_A.OUT_t OUT;
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
     ITimer_A.COV_t COV;
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
     ITimer_A.CCIFG_t CCIFG;
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
};
SEE
TACCTLx_t
struct ITimer_A.TACTL_t
index URL

Timer_A Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly struct TACTL_t {
     ITimer_A.TASSEL_t TASSEL;
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
     ITimer_A.ID_t ID;
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
     ITimer_A.MC_t MC;
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
     ITimer_A.TACLR_t TACLR;
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
     ITimer_A.TAIE_t TAIE;
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
     ITimer_A.TAIFG_t TAIFG;
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
};
SEE
TACTL_t
struct ITimer_A.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
ITimer_A.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ITimer_A.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config ITimer_A.Params.INCLK // instance
index URL

Timer_A INCLK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config Float INCLK = 0;
config ITimer_A.Params.TACLK // instance
index URL

Timer_A TACLK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config Float TACLK = 0;
config ITimer_A.Params.baseAddr // instance
index URL

Address of the peripheral's control register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config UInt baseAddr;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config ITimer_A.Params.intNum // instance
index URL

Interrupt source number

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config UInt intNum;
config ITimer_A.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config Bool isInternal = false;
config ITimer_A.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ITimer_A.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config UChar numberOfTimers;
config ITimer_A.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config String owner;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
create(IClock.Instance clock);
// Create an instance-object
ITimer_A.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
Bits16 getTxxCCRx(UChar ccrNumber);
SEE
getTxxCCRx
ITimer_A.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
Void setTxxCCRx(UChar ccrNumber, Bits16 value);
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:14 GMT


interface ti.catalog.msp430.peripherals.timer.ITimer_B

metaonly interface ti.catalog.msp430.peripherals.timer.ITimer_B
index URL

MSP430 ITimer_B interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
metaonly interface ITimer_B { ...
// inherits ti.catalog.msp430.peripherals.timer.ITimer
    // inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
package ti.catalog.msp430.peripherals.timer;
metaonly interface ITimer_B inherits ITimer {
module-wide constants & types
    enum CAP_t// {
         CAP_OFF,
         CAP
    };
    enum CCIE_t// {
         CCIE_OFF,
         CCIE
    };
    enum CCIFG_t// {
         CCIFG_OFF,
         CCIFG
    };
    enum CCIS_t// {
         CCIS_0// CCIxA,
         CCIS_1// CCIxB,
         CCIS_2// GND,
         CCIS_3// Vcc
    };
    enum CCI_t// {
         CCI_OFF,
         CCI
    };
    enum CLLD_t// {
         CLLD_0,
         CLLD_1,
         CLLD_2,
         CLLD_3
    };
    enum CM_t// {
         CM_0// No Capture,
         CM_1// Rising Edge,
         CM_2// Falling Edge,
         CM_3// Both Edges
    };
    enum CNTL_t// {
         CNTL_0// 16-bit, TBR(max) = 0FFFFh,
         CNTL_1// 12-bit, TBR(max) = 0FFFh,
         CNTL_2// 10-bit, TBR(max) = 03FFh,
         CNTL_3// 8-bit, TBR(max) = 0FFh
    };
    enum COV_t// {
         COV_OFF,
         COV
    };
    enum ID_t// {
         ID_0// Divider - /1,
         ID_1// Divider - /2,
         ID_2// Divider - /4,
         ID_3// Divider - /8
    };
    enum MC_t// {
         MC_0// Stop Mode,
         MC_1// Up Mode,
         MC_2// Continuous Mode,
         MC_3// Up/Down Mode
    };
    enum OUTMOD_t// {
         OUTMOD_0// PWM output mode: 0 - OUT bit value,
         OUTMOD_1// PWM output mode: 1 - Set,
         OUTMOD_2// PWM output mode: 2 - PWM toggle/reset,
         OUTMOD_3// PWM output mode: 3 - PWM set/reset,
         OUTMOD_4// PWM output mode: 4 - Toggle,
         OUTMOD_5// PWM output mode: 5 - Reset,
         OUTMOD_6// PWM output mode: 6 - PWM toggle/set,
         OUTMOD_7// PWM output mode: 7 - PWM reset/set
    };
    enum OUT_t// {
         OUT_OFF,
         OUT
    };
    enum SCCI_t// {
         SCCI_OFF,
         SCCI
    };
    enum SCS_t// {
         SCS_OFF,
         SCS
    };
    enum TBCLGRP_t// {
         TBCLGRP_0,
         TBCLGRP_1,
         TBCLGRP_2,
         TBCLGRP_3
    };
    enum TBCLR_t// {
         TBCLR_OFF,
         TBCLR
    };
    enum TBIE_t// {
         TBIE_OFF,
         TBIE
    };
    enum TBIFG_t// {
         TBIFG_OFF,
         TBIFG
    };
    enum TBSSEL_t// {
         TBSSEL_0// TBCLK,
         TBSSEL_1// ACLK,
         TBSSEL_2// SMCLK,
         TBSSEL_3// INCLK
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct TBCCTLx_t// {
         ITimer_B.CM_t CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges;
         ITimer_B.CCIS_t CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC;
         ITimer_B.SCS_t SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture;
         ITimer_B.CLLD_t CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx;
         ITimer_B.CAP_t CAP// Capture mode 0 Compare mode 1 Capture mode;
         ITimer_B.OUTMOD_t OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set;
         ITimer_B.CCIE_t CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled;
         ITimer_B.CCI_t CCI// Capture/compare input. The selected input signal can be read by this bit;
         ITimer_B.OUT_t OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high;
         ITimer_B.COV_t COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred;
         ITimer_B.CCIFG_t CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct TBCTL_t// Timer_B Control Register {
         ITimer_B.TBCLGRP_t TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update);
         ITimer_B.CNTL_t CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh;
         ITimer_B.TBSSEL_t TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK;
         ITimer_B.ID_t ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8;
         ITimer_B.MC_t MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h;
         ITimer_B.TBCLR_t TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero;
         ITimer_B.TBIE_t TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled;
         ITimer_B.TBIFG_t TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct regIntVect_t// Interrupt vector description {
        String registerName;
        String registerDescription;
        String isrToggleString;
        String priorityName;
        Bool interruptEnable;
        Bool interruptHandler;
        Int priority;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config Float INCLK// Timer_B INCLK = 0;
    config Float TBCLK// Timer_B TBCLK = 0;
    config UInt baseAddr// Address of the peripheral's control register;
    config UInt intNum// Interrupt source number;
    config Bool isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = false;
    config String name// Specific peripheral name given by the device;
    config UChar numberOfTimers// Stores the number of available timer capture compare blocks;
    config String owner// String specifying the entity that manages the peripheral;
per-instance creation
     create// Create an instance-object(IClock.Instance clock);
per-instance functions
    Bits16 getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber);
    Void setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value);
}
enum ITimer_B.CAP_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CAP_t {
    CAP_OFF,
    CAP
};
enum ITimer_B.CCIE_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CCIE_t {
    CCIE_OFF,
    CCIE
};
enum ITimer_B.CCIFG_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CCIFG_t {
    CCIFG_OFF,
    CCIFG
};
enum ITimer_B.CCIS_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CCIS_t {
    CCIS_0,
    // CCIxA
    CCIS_1,
    // CCIxB
    CCIS_2,
    // GND
    CCIS_3
    // Vcc
};
enum ITimer_B.CCI_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CCI_t {
    CCI_OFF,
    CCI
};
enum ITimer_B.CLLD_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CLLD_t {
    CLLD_0,
    CLLD_1,
    CLLD_2,
    CLLD_3
};
enum ITimer_B.CM_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CM_t {
    CM_0,
    // No Capture
    CM_1,
    // Rising Edge
    CM_2,
    // Falling Edge
    CM_3
    // Both Edges
};
enum ITimer_B.CNTL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum CNTL_t {
    CNTL_0,
    // 16-bit, TBR(max) = 0FFFFh
    CNTL_1,
    // 12-bit, TBR(max) = 0FFFh
    CNTL_2,
    // 10-bit, TBR(max) = 03FFh
    CNTL_3
    // 8-bit, TBR(max) = 0FFh
};
enum ITimer_B.COV_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum COV_t {
    COV_OFF,
    COV
};
enum ITimer_B.ID_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum ID_t {
    ID_0,
    // Divider - /1
    ID_1,
    // Divider - /2
    ID_2,
    // Divider - /4
    ID_3
    // Divider - /8
};
enum ITimer_B.MC_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum MC_t {
    MC_0,
    // Stop Mode
    MC_1,
    // Up Mode
    MC_2,
    // Continuous Mode
    MC_3
    // Up/Down Mode
};
enum ITimer_B.OUTMOD_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum OUTMOD_t {
    OUTMOD_0,
    // PWM output mode: 0 - OUT bit value
    OUTMOD_1,
    // PWM output mode: 1 - Set
    OUTMOD_2,
    // PWM output mode: 2 - PWM toggle/reset
    OUTMOD_3,
    // PWM output mode: 3 - PWM set/reset
    OUTMOD_4,
    // PWM output mode: 4 - Toggle
    OUTMOD_5,
    // PWM output mode: 5 - Reset
    OUTMOD_6,
    // PWM output mode: 6 - PWM toggle/set
    OUTMOD_7
    // PWM output mode: 7 - PWM reset/set
};
enum ITimer_B.OUT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum OUT_t {
    OUT_OFF,
    OUT
};
enum ITimer_B.SCCI_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum SCCI_t {
    SCCI_OFF,
    SCCI
};
enum ITimer_B.SCS_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum SCS_t {
    SCS_OFF,
    SCS
};
enum ITimer_B.TBCLGRP_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum TBCLGRP_t {
    TBCLGRP_0,
    TBCLGRP_1,
    TBCLGRP_2,
    TBCLGRP_3
};
enum ITimer_B.TBCLR_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum TBCLR_t {
    TBCLR_OFF,
    TBCLR
};
enum ITimer_B.TBIE_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum TBIE_t {
    TBIE_OFF,
    TBIE
};
enum ITimer_B.TBIFG_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum TBIFG_t {
    TBIFG_OFF,
    TBIFG
};
enum ITimer_B.TBSSEL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
enum TBSSEL_t {
    TBSSEL_0,
    // TBCLK
    TBSSEL_1,
    // ACLK
    TBSSEL_2,
    // SMCLK
    TBSSEL_3
    // INCLK
};
typedef ITimer_B.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef ITimer_B.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
typedef String StringArray[];
struct ITimer_B.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ITimer_B.TBCCTLx_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
metaonly struct TBCCTLx_t {
     ITimer_B.CM_t CM;
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
     ITimer_B.CCIS_t CCIS;
    // Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
     ITimer_B.SCS_t SCS;
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
     ITimer_B.CLLD_t CLLD;
    // Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx
     ITimer_B.CAP_t CAP;
    // Capture mode 0 Compare mode 1 Capture mode
     ITimer_B.OUTMOD_t OUTMOD;
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
     ITimer_B.CCIE_t CCIE;
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
     ITimer_B.CCI_t CCI;
    // Capture/compare input. The selected input signal can be read by this bit
     ITimer_B.OUT_t OUT;
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
     ITimer_B.COV_t COV;
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
     ITimer_B.CCIFG_t CCIFG;
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
};
struct ITimer_B.TBCTL_t
index URL

Timer_B Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
metaonly struct TBCTL_t {
     ITimer_B.TBCLGRP_t TBCLGRP;
    // TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)
     ITimer_B.CNTL_t CNTL;
    // Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh
     ITimer_B.TBSSEL_t TBSSEL;
    // Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK
     ITimer_B.ID_t ID;
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
     ITimer_B.MC_t MC;
    // Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h
     ITimer_B.TBCLR_t TBCLR;
    // Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero
     ITimer_B.TBIE_t TBIE;
    // Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
     ITimer_B.TBIFG_t TBIFG;
    // Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending
};
SEE
TBCTL_t
struct ITimer_B.regIntVect_t
index URL

Interrupt vector description

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
metaonly struct regIntVect_t {
    String registerName;
    String registerDescription;
    String isrToggleString;
    String priorityName;
    Bool interruptEnable;
    Bool interruptHandler;
    Int priority;
};
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
ITimer_B.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ITimer_B.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config ITimer_B.Params.INCLK // instance
index URL

Timer_B INCLK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config Float INCLK = 0;
config ITimer_B.Params.TBCLK // instance
index URL

Timer_B TBCLK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config Float TBCLK = 0;
config ITimer_B.Params.baseAddr // instance
index URL

Address of the peripheral's control register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config UInt baseAddr;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config ITimer_B.Params.intNum // instance
index URL

Interrupt source number

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config UInt intNum;
config ITimer_B.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config Bool isInternal = false;
config ITimer_B.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ITimer_B.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config UChar numberOfTimers;
config ITimer_B.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
config String owner;
Static Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
create(IClock.Instance clock);
// Create an instance-object
ITimer_B.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
Bits16 getTxxCCRx(UChar ccrNumber);
SEE
getTxxCCRx
ITimer_B.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_B.xdc
Void setTxxCCRx(UChar ccrNumber, Bits16 value);
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:15 GMT


module ti.catalog.msp430.peripherals.timer.Timer0_A3

metaonly module ti.catalog.msp430.peripherals.timer.Timer0_A3
index URL

MSP430 Timer0_A3 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer0_A3.xdc
var Timer0_A3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer0_A3');
module-wide constants & types
    values of type Timer0_A3.CAP_t//
        const Timer0_A3.CAP_OFF// Compare mode;
        const Timer0_A3.CAP// Capture mode;
    values of type Timer0_A3.CCIE_t//
        const Timer0_A3.CCIE_OFF;
        const Timer0_A3.CCIE;
    values of type Timer0_A3.CCIFG_t//
        const Timer0_A3.CCIFG_OFF;
        const Timer0_A3.CCIFG;
    values of type Timer0_A3.CCIS_t//
        const Timer0_A3.CCIS_0// CCIxA;
        const Timer0_A3.CCIS_1// CCIxB;
        const Timer0_A3.CCIS_2// GND;
        const Timer0_A3.CCIS_3// Vcc;
    values of type Timer0_A3.CCI_t//
        const Timer0_A3.CCI_OFF;
        const Timer0_A3.CCI;
    values of type Timer0_A3.CM_t//
        const Timer0_A3.CM_0// No Capture;
        const Timer0_A3.CM_1// Rising Edge;
        const Timer0_A3.CM_2// Falling Edge;
        const Timer0_A3.CM_3// Both Edges;
    values of type Timer0_A3.COV_t//
        const Timer0_A3.COV_OFF;
        const Timer0_A3.COV;
    values of type Timer0_A3.ID_t//
        const Timer0_A3.ID_0// Divider - /1;
        const Timer0_A3.ID_1// Divider - /2;
        const Timer0_A3.ID_2// Divider - /4;
        const Timer0_A3.ID_3// Divider - /8;
    values of type Timer0_A3.IVValues// TA3IV Definitions
        const Timer0_A3.TAIV_NONE// No Interrupt pending;
        const Timer0_A3.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer0_A3.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer0_A3.TAIV_6// Reserved;
        const Timer0_A3.TAIV_8// Reserved;
        const Timer0_A3.TAIV_TAIFG// TAIFG;
    values of type Timer0_A3.MC_t//
        const Timer0_A3.MC_0// Stop Mode;
        const Timer0_A3.MC_1// Up Mode;
        const Timer0_A3.MC_2// Continuous Mode;
        const Timer0_A3.MC_3// Up/Down Mode;
    values of type Timer0_A3.OUTMOD_t//
        const Timer0_A3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer0_A3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer0_A3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer0_A3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer0_A3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer0_A3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer0_A3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer0_A3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer0_A3.OUT_t//
        const Timer0_A3.OUT_OFF;
        const Timer0_A3.OUT;
    values of type Timer0_A3.SCCI_t//
        const Timer0_A3.SCCI_OFF// Latched capture signal (read);
        const Timer0_A3.SCCI// Latched capture signal (read);
    values of type Timer0_A3.SCS_t//
        const Timer0_A3.SCS_OFF// Asynchronous Capture;
        const Timer0_A3.SCS// Sychronous Capture;
    values of type Timer0_A3.TACLR_t//
        const Timer0_A3.TACLR_OFF;
        const Timer0_A3.TACLR;
    values of type Timer0_A3.TAIE_t//
        const Timer0_A3.TAIE_OFF;
        const Timer0_A3.TAIE;
    values of type Timer0_A3.TAIFG_t//
        const Timer0_A3.TAIFG_OFF;
        const Timer0_A3.TAIFG;
    values of type Timer0_A3.TASSEL_t//
        const Timer0_A3.TASSEL_0// TACLK;
        const Timer0_A3.TASSEL_1// ACLK;
        const Timer0_A3.TASSEL_2// SMCLK;
        const Timer0_A3.TASSEL_3// INCLK;
    var obj = new Timer0_A3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer0_A3.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer0_A3.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer0_A3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer0_A3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer0_A3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer0_A3.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA0CCR0// TA0CCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TA0CCR1// TA0CCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TA0CCR2// TA0CCR2, Timer_A Capture/Compare Register 2 = Bits16 0;
        params.TA0CCTL0// TA0CCTL0, Capture/Compare Control Register 0 = Timer0_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CCTL1// TA0CCTL1, Capture/Compare Control Register 1 = Timer0_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CCTL2// TA0CCTL2, Capture/Compare Control Register 2 = Timer0_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CTL// TA0CTL, Timer_A3 Control Register = Timer0_A3.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer0_A3.ForceSetDefaultRegister_t[] [
            {
                register: "TA0CTL",
                regForceSet: false
            },
            {
                register: "TA0CCTL0",
                regForceSet: false
            },
            {
                register: "TA0CCTL1",
                regForceSet: false
            },
            {
                register: "TA0CCTL2",
                regForceSet: false
            },
            {
                register: "TA0CCR0",
                regForceSet: false
            },
            {
                register: "TA0CCR1",
                regForceSet: false
            },
            {
                register: "TA0CCR2",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer0_A3.regIntVect_t[4] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer0_A3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer0_A3.CAP_t
index URL
Configuration settings
values of type Timer0_A3.CAP_t
    const Timer0_A3.CAP_OFF;
    // Compare mode
    const Timer0_A3.CAP;
    // Capture mode
enum Timer0_A3.CCIE_t
index URL
Configuration settings
values of type Timer0_A3.CCIE_t
    const Timer0_A3.CCIE_OFF;
    const Timer0_A3.CCIE;
enum Timer0_A3.CCIFG_t
index URL
Configuration settings
values of type Timer0_A3.CCIFG_t
    const Timer0_A3.CCIFG_OFF;
    const Timer0_A3.CCIFG;
enum Timer0_A3.CCIS_t
index URL
Configuration settings
values of type Timer0_A3.CCIS_t
    const Timer0_A3.CCIS_0;
    // CCIxA
    const Timer0_A3.CCIS_1;
    // CCIxB
    const Timer0_A3.CCIS_2;
    // GND
    const Timer0_A3.CCIS_3;
    // Vcc
enum Timer0_A3.CCI_t
index URL
Configuration settings
values of type Timer0_A3.CCI_t
    const Timer0_A3.CCI_OFF;
    const Timer0_A3.CCI;
enum Timer0_A3.CM_t
index URL
Configuration settings
values of type Timer0_A3.CM_t
    const Timer0_A3.CM_0;
    // No Capture
    const Timer0_A3.CM_1;
    // Rising Edge
    const Timer0_A3.CM_2;
    // Falling Edge
    const Timer0_A3.CM_3;
    // Both Edges
enum Timer0_A3.COV_t
index URL
Configuration settings
values of type Timer0_A3.COV_t
    const Timer0_A3.COV_OFF;
    const Timer0_A3.COV;
enum Timer0_A3.ID_t
index URL
Configuration settings
values of type Timer0_A3.ID_t
    const Timer0_A3.ID_0;
    // Divider - /1
    const Timer0_A3.ID_1;
    // Divider - /2
    const Timer0_A3.ID_2;
    // Divider - /4
    const Timer0_A3.ID_3;
    // Divider - /8
enum Timer0_A3.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer0_A3.IVValues
    const Timer0_A3.TAIV_NONE;
    // No Interrupt pending
    const Timer0_A3.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer0_A3.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer0_A3.TAIV_6;
    // Reserved
    const Timer0_A3.TAIV_8;
    // Reserved
    const Timer0_A3.TAIV_TAIFG;
    // TAIFG
enum Timer0_A3.MC_t
index URL
Configuration settings
values of type Timer0_A3.MC_t
    const Timer0_A3.MC_0;
    // Stop Mode
    const Timer0_A3.MC_1;
    // Up Mode
    const Timer0_A3.MC_2;
    // Continuous Mode
    const Timer0_A3.MC_3;
    // Up/Down Mode
enum Timer0_A3.OUTMOD_t
index URL
Configuration settings
values of type Timer0_A3.OUTMOD_t
    const Timer0_A3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer0_A3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer0_A3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer0_A3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer0_A3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer0_A3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer0_A3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer0_A3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer0_A3.OUT_t
index URL
Configuration settings
values of type Timer0_A3.OUT_t
    const Timer0_A3.OUT_OFF;
    const Timer0_A3.OUT;
enum Timer0_A3.SCCI_t
index URL
Configuration settings
values of type Timer0_A3.SCCI_t
    const Timer0_A3.SCCI_OFF;
    // Latched capture signal (read)
    const Timer0_A3.SCCI;
    // Latched capture signal (read)
enum Timer0_A3.SCS_t
index URL
Configuration settings
values of type Timer0_A3.SCS_t
    const Timer0_A3.SCS_OFF;
    // Asynchronous Capture
    const Timer0_A3.SCS;
    // Sychronous Capture
enum Timer0_A3.TACLR_t
index URL
Configuration settings
values of type Timer0_A3.TACLR_t
    const Timer0_A3.TACLR_OFF;
    const Timer0_A3.TACLR;
enum Timer0_A3.TAIE_t
index URL
Configuration settings
values of type Timer0_A3.TAIE_t
    const Timer0_A3.TAIE_OFF;
    const Timer0_A3.TAIE;
enum Timer0_A3.TAIFG_t
index URL
Configuration settings
values of type Timer0_A3.TAIFG_t
    const Timer0_A3.TAIFG_OFF;
    const Timer0_A3.TAIFG;
enum Timer0_A3.TASSEL_t
index URL
Configuration settings
values of type Timer0_A3.TASSEL_t
    const Timer0_A3.TASSEL_0;
    // TACLK
    const Timer0_A3.TASSEL_1;
    // ACLK
    const Timer0_A3.TASSEL_2;
    // SMCLK
    const Timer0_A3.TASSEL_3;
    // INCLK
struct Timer0_A3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer0_A3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer0_A3.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer0_A3.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer0_A3.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer0_A3.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer0_A3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer0_A3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer0_A3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer0_A3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer0_A3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer0_A3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer0_A3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA0CCR0 = Bits16 0;
    // TA0CCR0, Timer_A Capture/Compare Register 0
    params.TA0CCR1 = Bits16 0;
    // TA0CCR1, Timer_A Capture/Compare Register 1
    params.TA0CCR2 = Bits16 0;
    // TA0CCR2, Timer_A Capture/Compare Register 2
    params.TA0CCTL0 = Timer0_A3.TACCTLx_t {
    // TA0CCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CCTL1 = Timer0_A3.TACCTLx_t {
    // TA0CCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CCTL2 = Timer0_A3.TACCTLx_t {
    // TA0CCTL2, Capture/Compare Control Register 2
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CTL = Timer0_A3.TACTL_t {
    // TA0CTL, Timer_A3 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer0_A3.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA0CTL",
            regForceSet: false
        },
        {
            register: "TA0CCTL0",
            regForceSet: false
        },
        {
            register: "TA0CCTL1",
            regForceSet: false
        },
        {
            register: "TA0CCTL2",
            regForceSet: false
        },
        {
            register: "TA0CCR0",
            regForceSet: false
        },
        {
            register: "TA0CCR1",
            regForceSet: false
        },
        {
            register: "TA0CCR2",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer0_A3.regIntVect_t[4] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer0_A3.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer0_A3.Params;
...
params.INCLK = Float 0;
config Timer0_A3.Params.TA0CCR0 // instance
index URL

TA0CCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer0_A3.Params;
...
params.TA0CCR0 = Bits16 0;
config Timer0_A3.Params.TA0CCR1 // instance
index URL

TA0CCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer0_A3.Params;
...
params.TA0CCR1 = Bits16 0;
config Timer0_A3.Params.TA0CCR2 // instance
index URL

TA0CCR2, Timer_A Capture/Compare Register 2

Configuration settings
var params = new Timer0_A3.Params;
...
params.TA0CCR2 = Bits16 0;
config Timer0_A3.Params.TA0CCTL0 // instance
index URL

TA0CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer0_A3.Params;
...
params.TA0CCTL0 = Timer0_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A3.Params.TA0CCTL1 // instance
index URL

TA0CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer0_A3.Params;
...
params.TA0CCTL1 = Timer0_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A3.Params.TA0CCTL2 // instance
index URL

TA0CCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer0_A3.Params;
...
params.TA0CCTL2 = Timer0_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A3.Params.TA0CTL // instance
index URL

TA0CTL, Timer_A3 Control Register

Configuration settings
var params = new Timer0_A3.Params;
...
params.TA0CTL = Timer0_A3.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer0_A3.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer0_A3.Params;
...
params.TACLK = Float 0;
config Timer0_A3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer0_A3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer0_A3.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer0_A3.Params;
...
const params.forceSetDefaultRegister = Timer0_A3.ForceSetDefaultRegister_t[] [
    {
        register: "TA0CTL",
        regForceSet: false
    },
    {
        register: "TA0CCTL0",
        regForceSet: false
    },
    {
        register: "TA0CCTL1",
        regForceSet: false
    },
    {
        register: "TA0CCTL2",
        regForceSet: false
    },
    {
        register: "TA0CCR0",
        regForceSet: false
    },
    {
        register: "TA0CCR1",
        regForceSet: false
    },
    {
        register: "TA0CCR2",
        regForceSet: false
    }
];
config Timer0_A3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer0_A3.Params;
...
params.intNum = UInt undefined;
config Timer0_A3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer0_A3.Params;
...
params.interruptSource = Timer0_A3.regIntVect_t[4] undefined;
config Timer0_A3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer0_A3.Params;
...
params.isInternal = Bool false;
config Timer0_A3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer0_A3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer0_A3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer0_A3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer0_A3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer0_A3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer0_A3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer0_A3.create(IClock.Instance clock, params);
// Create an instance-object
Timer0_A3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer0_A3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:15 GMT


module ti.catalog.msp430.peripherals.timer.Timer0_A5

metaonly module ti.catalog.msp430.peripherals.timer.Timer0_A5
index URL

MSP430 Timer0_A5 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer0_A5.xdc
var Timer0_A5 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer0_A5');
module-wide constants & types
    values of type Timer0_A5.CAP_t//
        const Timer0_A5.CAP_OFF// Compare mode;
        const Timer0_A5.CAP// Capture mode;
    values of type Timer0_A5.CCIE_t//
        const Timer0_A5.CCIE_OFF;
        const Timer0_A5.CCIE;
    values of type Timer0_A5.CCIFG_t//
        const Timer0_A5.CCIFG_OFF;
        const Timer0_A5.CCIFG;
    values of type Timer0_A5.CCIS_t//
        const Timer0_A5.CCIS_0// CCIxA;
        const Timer0_A5.CCIS_1// CCIxB;
        const Timer0_A5.CCIS_2// GND;
        const Timer0_A5.CCIS_3// Vcc;
    values of type Timer0_A5.CCI_t//
        const Timer0_A5.CCI_OFF;
        const Timer0_A5.CCI;
    values of type Timer0_A5.CM_t//
        const Timer0_A5.CM_0// No Capture;
        const Timer0_A5.CM_1// Rising Edge;
        const Timer0_A5.CM_2// Falling Edge;
        const Timer0_A5.CM_3// Both Edges;
    values of type Timer0_A5.COV_t//
        const Timer0_A5.COV_OFF;
        const Timer0_A5.COV;
    values of type Timer0_A5.ID_t//
        const Timer0_A5.ID_0// Divider - /1;
        const Timer0_A5.ID_1// Divider - /2;
        const Timer0_A5.ID_2// Divider - /4;
        const Timer0_A5.ID_3// Divider - /8;
    values of type Timer0_A5.IVValues// TA3IV Definitions
        const Timer0_A5.TAIV_NONE// No Interrupt pending;
        const Timer0_A5.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer0_A5.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer0_A5.TAIV_6// Reserved;
        const Timer0_A5.TAIV_8// Reserved;
        const Timer0_A5.TAIV_TAIFG// TAIFG;
    values of type Timer0_A5.MC_t//
        const Timer0_A5.MC_0// Stop Mode;
        const Timer0_A5.MC_1// Up Mode;
        const Timer0_A5.MC_2// Continuous Mode;
        const Timer0_A5.MC_3// Up/Down Mode;
    values of type Timer0_A5.OUTMOD_t//
        const Timer0_A5.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer0_A5.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer0_A5.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer0_A5.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer0_A5.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer0_A5.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer0_A5.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer0_A5.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer0_A5.OUT_t//
        const Timer0_A5.OUT_OFF;
        const Timer0_A5.OUT;
    values of type Timer0_A5.SCCI_t//
        const Timer0_A5.SCCI_OFF// Latched capture signal (read);
        const Timer0_A5.SCCI// Latched capture signal (read);
    values of type Timer0_A5.SCS_t//
        const Timer0_A5.SCS_OFF// Asynchronous Capture;
        const Timer0_A5.SCS// Sychronous Capture;
    values of type Timer0_A5.TACLR_t//
        const Timer0_A5.TACLR_OFF;
        const Timer0_A5.TACLR;
    values of type Timer0_A5.TAIE_t//
        const Timer0_A5.TAIE_OFF;
        const Timer0_A5.TAIE;
    values of type Timer0_A5.TAIFG_t//
        const Timer0_A5.TAIFG_OFF;
        const Timer0_A5.TAIFG;
    values of type Timer0_A5.TASSEL_t//
        const Timer0_A5.TASSEL_0// TACLK;
        const Timer0_A5.TASSEL_1// ACLK;
        const Timer0_A5.TASSEL_2// SMCLK;
        const Timer0_A5.TASSEL_3// INCLK;
    var obj = new Timer0_A5.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer0_A5.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer0_A5.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer0_A5.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer0_A5.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer0_A5.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer0_A5.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA0CCR0// Capture/Compare 0 = Bits16 0;
        params.TA0CCR1// Capture/Compare 1 = Bits16 0;
        params.TA0CCR2// Capture/Compare 2 = Bits16 0;
        params.TA0CCR3// Capture/Compare 3 = Bits16 0;
        params.TA0CCR4// Capture/Compare 4 = Bits16 0;
        params.TA0CCTL0// Capture/Compare Control 0 = Timer0_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CCTL1// Capture/Compare Control 1 = Timer0_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CCTL2// Capture/Compare Control 2 = Timer0_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CCTL3// Capture/Compare Control 3 = Timer0_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CCTL4// Capture/Compare Control 4 = Timer0_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA0CTL// Timer A5 Control Register = Timer0_A5.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer0_A5.ForceSetDefaultRegister_t[] [
            {
                register: "TA0CTL",
                regForceSet: false
            },
            {
                register: "TA0CCTL0",
                regForceSet: false
            },
            {
                register: "TA0CCTL1",
                regForceSet: false
            },
            {
                register: "TA0CCTL2",
                regForceSet: false
            },
            {
                register: "TA0CCTL3",
                regForceSet: false
            },
            {
                register: "TA0CCTL4",
                regForceSet: false
            },
            {
                register: "TA0CCR0",
                regForceSet: false
            },
            {
                register: "TA0CCR1",
                regForceSet: false
            },
            {
                register: "TA0CCR2",
                regForceSet: false
            },
            {
                register: "TA0CCR3",
                regForceSet: false
            },
            {
                register: "TA0CCR4",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer0_A5.regIntVect_t[6] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String "TimerA5";
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer0_A5.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer0_A5.CAP_t
index URL
Configuration settings
values of type Timer0_A5.CAP_t
    const Timer0_A5.CAP_OFF;
    // Compare mode
    const Timer0_A5.CAP;
    // Capture mode
enum Timer0_A5.CCIE_t
index URL
Configuration settings
values of type Timer0_A5.CCIE_t
    const Timer0_A5.CCIE_OFF;
    const Timer0_A5.CCIE;
enum Timer0_A5.CCIFG_t
index URL
Configuration settings
values of type Timer0_A5.CCIFG_t
    const Timer0_A5.CCIFG_OFF;
    const Timer0_A5.CCIFG;
enum Timer0_A5.CCIS_t
index URL
Configuration settings
values of type Timer0_A5.CCIS_t
    const Timer0_A5.CCIS_0;
    // CCIxA
    const Timer0_A5.CCIS_1;
    // CCIxB
    const Timer0_A5.CCIS_2;
    // GND
    const Timer0_A5.CCIS_3;
    // Vcc
enum Timer0_A5.CCI_t
index URL
Configuration settings
values of type Timer0_A5.CCI_t
    const Timer0_A5.CCI_OFF;
    const Timer0_A5.CCI;
enum Timer0_A5.CM_t
index URL
Configuration settings
values of type Timer0_A5.CM_t
    const Timer0_A5.CM_0;
    // No Capture
    const Timer0_A5.CM_1;
    // Rising Edge
    const Timer0_A5.CM_2;
    // Falling Edge
    const Timer0_A5.CM_3;
    // Both Edges
enum Timer0_A5.COV_t
index URL
Configuration settings
values of type Timer0_A5.COV_t
    const Timer0_A5.COV_OFF;
    const Timer0_A5.COV;
enum Timer0_A5.ID_t
index URL
Configuration settings
values of type Timer0_A5.ID_t
    const Timer0_A5.ID_0;
    // Divider - /1
    const Timer0_A5.ID_1;
    // Divider - /2
    const Timer0_A5.ID_2;
    // Divider - /4
    const Timer0_A5.ID_3;
    // Divider - /8
enum Timer0_A5.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer0_A5.IVValues
    const Timer0_A5.TAIV_NONE;
    // No Interrupt pending
    const Timer0_A5.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer0_A5.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer0_A5.TAIV_6;
    // Reserved
    const Timer0_A5.TAIV_8;
    // Reserved
    const Timer0_A5.TAIV_TAIFG;
    // TAIFG
enum Timer0_A5.MC_t
index URL
Configuration settings
values of type Timer0_A5.MC_t
    const Timer0_A5.MC_0;
    // Stop Mode
    const Timer0_A5.MC_1;
    // Up Mode
    const Timer0_A5.MC_2;
    // Continuous Mode
    const Timer0_A5.MC_3;
    // Up/Down Mode
enum Timer0_A5.OUTMOD_t
index URL
Configuration settings
values of type Timer0_A5.OUTMOD_t
    const Timer0_A5.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer0_A5.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer0_A5.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer0_A5.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer0_A5.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer0_A5.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer0_A5.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer0_A5.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer0_A5.OUT_t
index URL
Configuration settings
values of type Timer0_A5.OUT_t
    const Timer0_A5.OUT_OFF;
    const Timer0_A5.OUT;
enum Timer0_A5.SCCI_t
index URL
Configuration settings
values of type Timer0_A5.SCCI_t
    const Timer0_A5.SCCI_OFF;
    // Latched capture signal (read)
    const Timer0_A5.SCCI;
    // Latched capture signal (read)
enum Timer0_A5.SCS_t
index URL
Configuration settings
values of type Timer0_A5.SCS_t
    const Timer0_A5.SCS_OFF;
    // Asynchronous Capture
    const Timer0_A5.SCS;
    // Sychronous Capture
enum Timer0_A5.TACLR_t
index URL
Configuration settings
values of type Timer0_A5.TACLR_t
    const Timer0_A5.TACLR_OFF;
    const Timer0_A5.TACLR;
enum Timer0_A5.TAIE_t
index URL
Configuration settings
values of type Timer0_A5.TAIE_t
    const Timer0_A5.TAIE_OFF;
    const Timer0_A5.TAIE;
enum Timer0_A5.TAIFG_t
index URL
Configuration settings
values of type Timer0_A5.TAIFG_t
    const Timer0_A5.TAIFG_OFF;
    const Timer0_A5.TAIFG;
enum Timer0_A5.TASSEL_t
index URL
Configuration settings
values of type Timer0_A5.TASSEL_t
    const Timer0_A5.TASSEL_0;
    // TACLK
    const Timer0_A5.TASSEL_1;
    // ACLK
    const Timer0_A5.TASSEL_2;
    // SMCLK
    const Timer0_A5.TASSEL_3;
    // INCLK
struct Timer0_A5.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer0_A5.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer0_A5.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer0_A5.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer0_A5.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer0_A5.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer0_A5.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer0_A5.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer0_A5.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer0_A5.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer0_A5.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer0_A5.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer0_A5.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA0CCR0 = Bits16 0;
    // Capture/Compare 0
    params.TA0CCR1 = Bits16 0;
    // Capture/Compare 1
    params.TA0CCR2 = Bits16 0;
    // Capture/Compare 2
    params.TA0CCR3 = Bits16 0;
    // Capture/Compare 3
    params.TA0CCR4 = Bits16 0;
    // Capture/Compare 4
    params.TA0CCTL0 = Timer0_A5.TACCTLx_t {
    // Capture/Compare Control 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CCTL1 = Timer0_A5.TACCTLx_t {
    // Capture/Compare Control 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CCTL2 = Timer0_A5.TACCTLx_t {
    // Capture/Compare Control 2
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CCTL3 = Timer0_A5.TACCTLx_t {
    // Capture/Compare Control 3
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CCTL4 = Timer0_A5.TACCTLx_t {
    // Capture/Compare Control 4
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA0CTL = Timer0_A5.TACTL_t {
    // Timer A5 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer0_A5.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA0CTL",
            regForceSet: false
        },
        {
            register: "TA0CCTL0",
            regForceSet: false
        },
        {
            register: "TA0CCTL1",
            regForceSet: false
        },
        {
            register: "TA0CCTL2",
            regForceSet: false
        },
        {
            register: "TA0CCTL3",
            regForceSet: false
        },
        {
            register: "TA0CCTL4",
            regForceSet: false
        },
        {
            register: "TA0CCR0",
            regForceSet: false
        },
        {
            register: "TA0CCR1",
            regForceSet: false
        },
        {
            register: "TA0CCR2",
            regForceSet: false
        },
        {
            register: "TA0CCR3",
            regForceSet: false
        },
        {
            register: "TA0CCR4",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer0_A5.regIntVect_t[6] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String "TimerA5";
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer0_A5.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer0_A5.Params;
...
params.INCLK = Float 0;
config Timer0_A5.Params.TA0CCR0 // instance
index URL

Capture/Compare 0

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCR0 = Bits16 0;
config Timer0_A5.Params.TA0CCR1 // instance
index URL

Capture/Compare 1

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCR1 = Bits16 0;
config Timer0_A5.Params.TA0CCR2 // instance
index URL

Capture/Compare 2

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCR2 = Bits16 0;
config Timer0_A5.Params.TA0CCR3 // instance
index URL

Capture/Compare 3

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCR3 = Bits16 0;
config Timer0_A5.Params.TA0CCR4 // instance
index URL

Capture/Compare 4

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCR4 = Bits16 0;
config Timer0_A5.Params.TA0CCTL0 // instance
index URL

Capture/Compare Control 0

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCTL0 = Timer0_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A5.Params.TA0CCTL1 // instance
index URL

Capture/Compare Control 1

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCTL1 = Timer0_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A5.Params.TA0CCTL2 // instance
index URL

Capture/Compare Control 2

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCTL2 = Timer0_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A5.Params.TA0CCTL3 // instance
index URL

Capture/Compare Control 3

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCTL3 = Timer0_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A5.Params.TA0CCTL4 // instance
index URL

Capture/Compare Control 4

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CCTL4 = Timer0_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer0_A5.Params.TA0CTL // instance
index URL

Timer A5 Control Register

Configuration settings
var params = new Timer0_A5.Params;
...
params.TA0CTL = Timer0_A5.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer0_A5.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer0_A5.Params;
...
params.TACLK = Float 0;
config Timer0_A5.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer0_A5.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer0_A5.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer0_A5.Params;
...
const params.forceSetDefaultRegister = Timer0_A5.ForceSetDefaultRegister_t[] [
    {
        register: "TA0CTL",
        regForceSet: false
    },
    {
        register: "TA0CCTL0",
        regForceSet: false
    },
    {
        register: "TA0CCTL1",
        regForceSet: false
    },
    {
        register: "TA0CCTL2",
        regForceSet: false
    },
    {
        register: "TA0CCTL3",
        regForceSet: false
    },
    {
        register: "TA0CCTL4",
        regForceSet: false
    },
    {
        register: "TA0CCR0",
        regForceSet: false
    },
    {
        register: "TA0CCR1",
        regForceSet: false
    },
    {
        register: "TA0CCR2",
        regForceSet: false
    },
    {
        register: "TA0CCR3",
        regForceSet: false
    },
    {
        register: "TA0CCR4",
        regForceSet: false
    }
];
config Timer0_A5.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer0_A5.Params;
...
params.intNum = UInt undefined;
config Timer0_A5.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer0_A5.Params;
...
params.interruptSource = Timer0_A5.regIntVect_t[6] undefined;
config Timer0_A5.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer0_A5.Params;
...
params.isInternal = Bool false;
config Timer0_A5.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer0_A5.Params;
...
params.name = String "TimerA5";
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer0_A5.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer0_A5.Params;
...
params.numberOfTimers = UChar undefined;
config Timer0_A5.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer0_A5.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer0_A5.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer0_A5.create(IClock.Instance clock, params);
// Create an instance-object
Timer0_A5.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer0_A5.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:15 GMT


module ti.catalog.msp430.peripherals.timer.Timer0_B3

metaonly module ti.catalog.msp430.peripherals.timer.Timer0_B3
index URL

MSP430 Timer0_B3 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer0_B3.xdc
var Timer0_B3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer0_B3');
module-wide constants & types
    values of type Timer0_B3.CAP_t//
        const Timer0_B3.CAP_OFF;
        const Timer0_B3.CAP;
    values of type Timer0_B3.CCIE_t//
        const Timer0_B3.CCIE_OFF;
        const Timer0_B3.CCIE;
    values of type Timer0_B3.CCIFG_t//
        const Timer0_B3.CCIFG_OFF;
        const Timer0_B3.CCIFG;
    values of type Timer0_B3.CCIS_t//
        const Timer0_B3.CCIS_0// CCIxA;
        const Timer0_B3.CCIS_1// CCIxB;
        const Timer0_B3.CCIS_2// GND;
        const Timer0_B3.CCIS_3// Vcc;
    values of type Timer0_B3.CCI_t//
        const Timer0_B3.CCI_OFF;
        const Timer0_B3.CCI;
    values of type Timer0_B3.CLLD_t//
        const Timer0_B3.CLLD_0;
        const Timer0_B3.CLLD_1;
        const Timer0_B3.CLLD_2;
        const Timer0_B3.CLLD_3;
    values of type Timer0_B3.CM_t//
        const Timer0_B3.CM_0// No Capture;
        const Timer0_B3.CM_1// Rising Edge;
        const Timer0_B3.CM_2// Falling Edge;
        const Timer0_B3.CM_3// Both Edges;
    values of type Timer0_B3.CNTL_t//
        const Timer0_B3.CNTL_0// 16-bit, TBR(max) = 0FFFFh;
        const Timer0_B3.CNTL_1// 12-bit, TBR(max) = 0FFFh;
        const Timer0_B3.CNTL_2// 10-bit, TBR(max) = 03FFh;
        const Timer0_B3.CNTL_3// 8-bit, TBR(max) = 0FFh;
    values of type Timer0_B3.COV_t//
        const Timer0_B3.COV_OFF;
        const Timer0_B3.COV;
    values of type Timer0_B3.ID_t//
        const Timer0_B3.ID_0// Divider - /1;
        const Timer0_B3.ID_1// Divider - /2;
        const Timer0_B3.ID_2// Divider - /4;
        const Timer0_B3.ID_3// Divider - /8;
    values of type Timer0_B3.MC_t//
        const Timer0_B3.MC_0// Stop Mode;
        const Timer0_B3.MC_1// Up Mode;
        const Timer0_B3.MC_2// Continuous Mode;
        const Timer0_B3.MC_3// Up/Down Mode;
    values of type Timer0_B3.OUTMOD_t//
        const Timer0_B3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer0_B3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer0_B3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer0_B3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer0_B3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer0_B3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer0_B3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer0_B3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer0_B3.OUT_t//
        const Timer0_B3.OUT_OFF;
        const Timer0_B3.OUT;
    values of type Timer0_B3.SCCI_t//
        const Timer0_B3.SCCI_OFF;
        const Timer0_B3.SCCI;
    values of type Timer0_B3.SCS_t//
        const Timer0_B3.SCS_OFF;
        const Timer0_B3.SCS;
    values of type Timer0_B3.TBCLGRP_t//
        const Timer0_B3.TBCLGRP_0;
        const Timer0_B3.TBCLGRP_1;
        const Timer0_B3.TBCLGRP_2;
        const Timer0_B3.TBCLGRP_3;
    values of type Timer0_B3.TBCLR_t//
        const Timer0_B3.TBCLR_OFF;
        const Timer0_B3.TBCLR;
    values of type Timer0_B3.TBIE_t//
        const Timer0_B3.TBIE_OFF;
        const Timer0_B3.TBIE;
    values of type Timer0_B3.TBIFG_t//
        const Timer0_B3.TBIFG_OFF;
        const Timer0_B3.TBIFG;
    values of type Timer0_B3.TBSSEL_t//
        const Timer0_B3.TBSSEL_0// TBCLK;
        const Timer0_B3.TBSSEL_1// ACLK;
        const Timer0_B3.TBSSEL_2// SMCLK;
        const Timer0_B3.TBSSEL_3// INCLK;
    var obj = new Timer0_B3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer0_B3.TBCCTLx_t// ;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_B.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_B.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_B.SCS_t ...
        obj.CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx = ITimer_B.CLLD_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_B.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_B.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_B.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_B.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_B.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_B.CCIFG_t ...
    var obj = new Timer0_B3.TBCTL_t// Timer_B Control Register;
        obj.TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update) = ITimer_B.TBCLGRP_t ...
        obj.CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh = ITimer_B.CNTL_t ...
        obj.TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK = ITimer_B.TBSSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_B.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h = ITimer_B.MC_t ...
        obj.TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero = ITimer_B.TBCLR_t ...
        obj.TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.TBIE_t ...
        obj.TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending = ITimer_B.TBIFG_t ...
    var obj = new Timer0_B3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer0_B3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer0_B3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer0_B3.Params// Instance config-params object;
        params.INCLK// Timer_B INCLK = Float 0;
        params.TB0CCR0// TB0CCR0, Timer_B Capture/Compare Register 0 = Bits16 0;
        params.TB0CCR1// TB0CCR1, Timer_B Capture/Compare Register 1 = Bits16 0;
        params.TB0CCR2// TB0CCR2, Timer_B Capture/Compare Register 2 = Bits16 0;
        params.TB0CCTL0// TB0CCTL0, Capture/Compare Control Register 0 = Timer0_B3.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL1// TB0CCTL1, Capture/Compare Control Register 1 = Timer0_B3.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL2// TB0CCTL2, Capture/Compare Control Register 2 = Timer0_B3.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CTL// TB0CTL, Timer_B3 Control Register = Timer0_B3.TBCTL_t {
            TBCLGRP: ITimer_B.TBCLGRP_0,
            CNTL: ITimer_B.CNTL_0,
            TBSSEL: ITimer_B.TBSSEL_0,
            ID: ITimer_B.ID_0,
            MC: ITimer_B.MC_0,
            TBCLR: ITimer_B.TBCLR_OFF,
            TBIE: ITimer_B.TBIE_OFF,
            TBIFG: ITimer_B.TBIFG_OFF
        };
        params.TBCLK// Timer_B TBCLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer0_B3.ForceSetDefaultRegister_t[] [
            {
                register: "TB0CTL",
                regForceSet: false
            },
            {
                register: "TB0CCTL0",
                regForceSet: false
            },
            {
                register: "TB0CCTL1",
                regForceSet: false
            },
            {
                register: "TB0CCTL2",
                regForceSet: false
            },
            {
                register: "TB0CCR0",
                regForceSet: false
            },
            {
                register: "TB0CCR1",
                regForceSet: false
            },
            {
                register: "TB0CCR2",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer0_B3.regIntVect_t[4] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer0_B3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer0_B3.CAP_t
index URL
Configuration settings
values of type Timer0_B3.CAP_t
    const Timer0_B3.CAP_OFF;
    const Timer0_B3.CAP;
enum Timer0_B3.CCIE_t
index URL
Configuration settings
values of type Timer0_B3.CCIE_t
    const Timer0_B3.CCIE_OFF;
    const Timer0_B3.CCIE;
enum Timer0_B3.CCIFG_t
index URL
Configuration settings
values of type Timer0_B3.CCIFG_t
    const Timer0_B3.CCIFG_OFF;
    const Timer0_B3.CCIFG;
enum Timer0_B3.CCIS_t
index URL
Configuration settings
values of type Timer0_B3.CCIS_t
    const Timer0_B3.CCIS_0;
    // CCIxA
    const Timer0_B3.CCIS_1;
    // CCIxB
    const Timer0_B3.CCIS_2;
    // GND
    const Timer0_B3.CCIS_3;
    // Vcc
enum Timer0_B3.CCI_t
index URL
Configuration settings
values of type Timer0_B3.CCI_t
    const Timer0_B3.CCI_OFF;
    const Timer0_B3.CCI;
enum Timer0_B3.CLLD_t
index URL
Configuration settings
values of type Timer0_B3.CLLD_t
    const Timer0_B3.CLLD_0;
    const Timer0_B3.CLLD_1;
    const Timer0_B3.CLLD_2;
    const Timer0_B3.CLLD_3;
enum Timer0_B3.CM_t
index URL
Configuration settings
values of type Timer0_B3.CM_t
    const Timer0_B3.CM_0;
    // No Capture
    const Timer0_B3.CM_1;
    // Rising Edge
    const Timer0_B3.CM_2;
    // Falling Edge
    const Timer0_B3.CM_3;
    // Both Edges
enum Timer0_B3.CNTL_t
index URL
Configuration settings
values of type Timer0_B3.CNTL_t
    const Timer0_B3.CNTL_0;
    // 16-bit, TBR(max) = 0FFFFh
    const Timer0_B3.CNTL_1;
    // 12-bit, TBR(max) = 0FFFh
    const Timer0_B3.CNTL_2;
    // 10-bit, TBR(max) = 03FFh
    const Timer0_B3.CNTL_3;
    // 8-bit, TBR(max) = 0FFh
enum Timer0_B3.COV_t
index URL
Configuration settings
values of type Timer0_B3.COV_t
    const Timer0_B3.COV_OFF;
    const Timer0_B3.COV;
enum Timer0_B3.ID_t
index URL
Configuration settings
values of type Timer0_B3.ID_t
    const Timer0_B3.ID_0;
    // Divider - /1
    const Timer0_B3.ID_1;
    // Divider - /2
    const Timer0_B3.ID_2;
    // Divider - /4
    const Timer0_B3.ID_3;
    // Divider - /8
enum Timer0_B3.MC_t
index URL
Configuration settings
values of type Timer0_B3.MC_t
    const Timer0_B3.MC_0;
    // Stop Mode
    const Timer0_B3.MC_1;
    // Up Mode
    const Timer0_B3.MC_2;
    // Continuous Mode
    const Timer0_B3.MC_3;
    // Up/Down Mode
enum Timer0_B3.OUTMOD_t
index URL
Configuration settings
values of type Timer0_B3.OUTMOD_t
    const Timer0_B3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer0_B3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer0_B3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer0_B3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer0_B3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer0_B3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer0_B3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer0_B3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer0_B3.OUT_t
index URL
Configuration settings
values of type Timer0_B3.OUT_t
    const Timer0_B3.OUT_OFF;
    const Timer0_B3.OUT;
enum Timer0_B3.SCCI_t
index URL
Configuration settings
values of type Timer0_B3.SCCI_t
    const Timer0_B3.SCCI_OFF;
    const Timer0_B3.SCCI;
enum Timer0_B3.SCS_t
index URL
Configuration settings
values of type Timer0_B3.SCS_t
    const Timer0_B3.SCS_OFF;
    const Timer0_B3.SCS;
enum Timer0_B3.TBCLGRP_t
index URL
Configuration settings
values of type Timer0_B3.TBCLGRP_t
    const Timer0_B3.TBCLGRP_0;
    const Timer0_B3.TBCLGRP_1;
    const Timer0_B3.TBCLGRP_2;
    const Timer0_B3.TBCLGRP_3;
enum Timer0_B3.TBCLR_t
index URL
Configuration settings
values of type Timer0_B3.TBCLR_t
    const Timer0_B3.TBCLR_OFF;
    const Timer0_B3.TBCLR;
enum Timer0_B3.TBIE_t
index URL
Configuration settings
values of type Timer0_B3.TBIE_t
    const Timer0_B3.TBIE_OFF;
    const Timer0_B3.TBIE;
enum Timer0_B3.TBIFG_t
index URL
Configuration settings
values of type Timer0_B3.TBIFG_t
    const Timer0_B3.TBIFG_OFF;
    const Timer0_B3.TBIFG;
enum Timer0_B3.TBSSEL_t
index URL
Configuration settings
values of type Timer0_B3.TBSSEL_t
    const Timer0_B3.TBSSEL_0;
    // TBCLK
    const Timer0_B3.TBSSEL_1;
    // ACLK
    const Timer0_B3.TBSSEL_2;
    // SMCLK
    const Timer0_B3.TBSSEL_3;
    // INCLK
struct Timer0_B3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer0_B3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer0_B3.TBCCTLx_t
index URL
Configuration settings
var obj = new Timer0_B3.TBCCTLx_t;
    obj.CM = ITimer_B.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_B.CCIS_t ...
    // Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_B.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.CLLD = ITimer_B.CLLD_t ...
    // Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx
    obj.CAP = ITimer_B.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_B.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_B.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_B.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_B.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_B.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_B.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
struct Timer0_B3.TBCTL_t
index URL

Timer_B Control Register

Configuration settings
var obj = new Timer0_B3.TBCTL_t;
    obj.TBCLGRP = ITimer_B.TBCLGRP_t ...
    // TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)
    obj.CNTL = ITimer_B.CNTL_t ...
    // Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh
    obj.TBSSEL = ITimer_B.TBSSEL_t ...
    // Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK
    obj.ID = ITimer_B.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_B.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h
    obj.TBCLR = ITimer_B.TBCLR_t ...
    // Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero
    obj.TBIE = ITimer_B.TBIE_t ...
    // Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TBIFG = ITimer_B.TBIFG_t ...
    // Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending
SEE
TBCTL_t
struct Timer0_B3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer0_B3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer0_B3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer0_B3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer0_B3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer0_B3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer0_B3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_B INCLK
    params.TB0CCR0 = Bits16 0;
    // TB0CCR0, Timer_B Capture/Compare Register 0
    params.TB0CCR1 = Bits16 0;
    // TB0CCR1, Timer_B Capture/Compare Register 1
    params.TB0CCR2 = Bits16 0;
    // TB0CCR2, Timer_B Capture/Compare Register 2
    params.TB0CCTL0 = Timer0_B3.TBCCTLx_t {
    // TB0CCTL0, Capture/Compare Control Register 0
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL1 = Timer0_B3.TBCCTLx_t {
    // TB0CCTL1, Capture/Compare Control Register 1
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL2 = Timer0_B3.TBCCTLx_t {
    // TB0CCTL2, Capture/Compare Control Register 2
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CTL = Timer0_B3.TBCTL_t {
    // TB0CTL, Timer_B3 Control Register
        TBCLGRP: ITimer_B.TBCLGRP_0,
        CNTL: ITimer_B.CNTL_0,
        TBSSEL: ITimer_B.TBSSEL_0,
        ID: ITimer_B.ID_0,
        MC: ITimer_B.MC_0,
        TBCLR: ITimer_B.TBCLR_OFF,
        TBIE: ITimer_B.TBIE_OFF,
        TBIFG: ITimer_B.TBIFG_OFF
    };
    params.TBCLK = Float 0;
    // Timer_B TBCLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer0_B3.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TB0CTL",
            regForceSet: false
        },
        {
            register: "TB0CCTL0",
            regForceSet: false
        },
        {
            register: "TB0CCTL1",
            regForceSet: false
        },
        {
            register: "TB0CCTL2",
            regForceSet: false
        },
        {
            register: "TB0CCR0",
            regForceSet: false
        },
        {
            register: "TB0CCR1",
            regForceSet: false
        },
        {
            register: "TB0CCR2",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer0_B3.regIntVect_t[4] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer0_B3.Params.INCLK // instance
index URL

Timer_B INCLK

Configuration settings
var params = new Timer0_B3.Params;
...
params.INCLK = Float 0;
config Timer0_B3.Params.TB0CCR0 // instance
index URL

TB0CCR0, Timer_B Capture/Compare Register 0

Configuration settings
var params = new Timer0_B3.Params;
...
params.TB0CCR0 = Bits16 0;
config Timer0_B3.Params.TB0CCR1 // instance
index URL

TB0CCR1, Timer_B Capture/Compare Register 1

Configuration settings
var params = new Timer0_B3.Params;
...
params.TB0CCR1 = Bits16 0;
config Timer0_B3.Params.TB0CCR2 // instance
index URL

TB0CCR2, Timer_B Capture/Compare Register 2

Configuration settings
var params = new Timer0_B3.Params;
...
params.TB0CCR2 = Bits16 0;
config Timer0_B3.Params.TB0CCTL0 // instance
index URL

TB0CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer0_B3.Params;
...
params.TB0CCTL0 = Timer0_B3.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B3.Params.TB0CCTL1 // instance
index URL

TB0CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer0_B3.Params;
...
params.TB0CCTL1 = Timer0_B3.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B3.Params.TB0CCTL2 // instance
index URL

TB0CCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer0_B3.Params;
...
params.TB0CCTL2 = Timer0_B3.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B3.Params.TB0CTL // instance
index URL

TB0CTL, Timer_B3 Control Register

Configuration settings
var params = new Timer0_B3.Params;
...
params.TB0CTL = Timer0_B3.TBCTL_t {
    TBCLGRP: ITimer_B.TBCLGRP_0,
    CNTL: ITimer_B.CNTL_0,
    TBSSEL: ITimer_B.TBSSEL_0,
    ID: ITimer_B.ID_0,
    MC: ITimer_B.MC_0,
    TBCLR: ITimer_B.TBCLR_OFF,
    TBIE: ITimer_B.TBIE_OFF,
    TBIFG: ITimer_B.TBIFG_OFF
};
config Timer0_B3.Params.TBCLK // instance
index URL

Timer_B TBCLK

Configuration settings
var params = new Timer0_B3.Params;
...
params.TBCLK = Float 0;
config Timer0_B3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer0_B3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer0_B3.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer0_B3.Params;
...
const params.forceSetDefaultRegister = Timer0_B3.ForceSetDefaultRegister_t[] [
    {
        register: "TB0CTL",
        regForceSet: false
    },
    {
        register: "TB0CCTL0",
        regForceSet: false
    },
    {
        register: "TB0CCTL1",
        regForceSet: false
    },
    {
        register: "TB0CCTL2",
        regForceSet: false
    },
    {
        register: "TB0CCR0",
        regForceSet: false
    },
    {
        register: "TB0CCR1",
        regForceSet: false
    },
    {
        register: "TB0CCR2",
        regForceSet: false
    }
];
config Timer0_B3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer0_B3.Params;
...
params.intNum = UInt undefined;
config Timer0_B3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer0_B3.Params;
...
params.interruptSource = Timer0_B3.regIntVect_t[4] undefined;
config Timer0_B3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer0_B3.Params;
...
params.isInternal = Bool false;
config Timer0_B3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer0_B3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer0_B3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer0_B3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer0_B3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer0_B3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer0_B3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer0_B3.create(IClock.Instance clock, params);
// Create an instance-object
Timer0_B3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer0_B3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:15 GMT


module ti.catalog.msp430.peripherals.timer.Timer0_B7

metaonly module ti.catalog.msp430.peripherals.timer.Timer0_B7
index URL

MSP430 Timer0_B7 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer0_B7.xdc
var Timer0_B7 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer0_B7');
module-wide constants & types
    values of type Timer0_B7.CAP_t//
        const Timer0_B7.CAP_OFF;
        const Timer0_B7.CAP;
    values of type Timer0_B7.CCIE_t//
        const Timer0_B7.CCIE_OFF;
        const Timer0_B7.CCIE;
    values of type Timer0_B7.CCIFG_t//
        const Timer0_B7.CCIFG_OFF;
        const Timer0_B7.CCIFG;
    values of type Timer0_B7.CCIS_t//
        const Timer0_B7.CCIS_0// CCIxA;
        const Timer0_B7.CCIS_1// CCIxB;
        const Timer0_B7.CCIS_2// GND;
        const Timer0_B7.CCIS_3// Vcc;
    values of type Timer0_B7.CCI_t//
        const Timer0_B7.CCI_OFF;
        const Timer0_B7.CCI;
    values of type Timer0_B7.CLLD_t//
        const Timer0_B7.CLLD_0;
        const Timer0_B7.CLLD_1;
        const Timer0_B7.CLLD_2;
        const Timer0_B7.CLLD_3;
    values of type Timer0_B7.CM_t//
        const Timer0_B7.CM_0// No Capture;
        const Timer0_B7.CM_1// Rising Edge;
        const Timer0_B7.CM_2// Falling Edge;
        const Timer0_B7.CM_3// Both Edges;
    values of type Timer0_B7.CNTL_t//
        const Timer0_B7.CNTL_0// 16-bit, TBR(max) = 0FFFFh;
        const Timer0_B7.CNTL_1// 12-bit, TBR(max) = 0FFFh;
        const Timer0_B7.CNTL_2// 10-bit, TBR(max) = 03FFh;
        const Timer0_B7.CNTL_3// 8-bit, TBR(max) = 0FFh;
    values of type Timer0_B7.COV_t//
        const Timer0_B7.COV_OFF;
        const Timer0_B7.COV;
    values of type Timer0_B7.ID_t//
        const Timer0_B7.ID_0// Divider - /1;
        const Timer0_B7.ID_1// Divider - /2;
        const Timer0_B7.ID_2// Divider - /4;
        const Timer0_B7.ID_3// Divider - /8;
    values of type Timer0_B7.IVValues// TB07IV Definitions
        const Timer0_B7.TB0IV_NONE// No Interrupt pending;
        const Timer0_B7.TB0IV_TBCCR1// TBCCR1_CCIFG;
        const Timer0_B7.TB0IV_TBCCR2// TBCCR2_CCIFG;
        const Timer0_B7.TB0IV_TBCCR3// TBCCR3_CCIFG;
        const Timer0_B7.TB0IV_TBCCR4// TBCCR4_CCIFG;
        const Timer0_B7.TB0IV_TBCCR5// TBCCR5_CCIFG;
        const Timer0_B7.TB0IV_TBCCR6// TBCCR6_CCIFG;
        const Timer0_B7.TB0IV_TBIFG// TBIFG;
    values of type Timer0_B7.MC_t//
        const Timer0_B7.MC_0// Stop Mode;
        const Timer0_B7.MC_1// Up Mode;
        const Timer0_B7.MC_2// Continuous Mode;
        const Timer0_B7.MC_3// Up/Down Mode;
    values of type Timer0_B7.OUTMOD_t//
        const Timer0_B7.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer0_B7.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer0_B7.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer0_B7.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer0_B7.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer0_B7.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer0_B7.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer0_B7.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer0_B7.OUT_t//
        const Timer0_B7.OUT_OFF;
        const Timer0_B7.OUT;
    values of type Timer0_B7.SCCI_t//
        const Timer0_B7.SCCI_OFF;
        const Timer0_B7.SCCI;
    values of type Timer0_B7.SCS_t//
        const Timer0_B7.SCS_OFF;
        const Timer0_B7.SCS;
    values of type Timer0_B7.TBCLGRP_t//
        const Timer0_B7.TBCLGRP_0;
        const Timer0_B7.TBCLGRP_1;
        const Timer0_B7.TBCLGRP_2;
        const Timer0_B7.TBCLGRP_3;
    values of type Timer0_B7.TBCLR_t//
        const Timer0_B7.TBCLR_OFF;
        const Timer0_B7.TBCLR;
    values of type Timer0_B7.TBIE_t//
        const Timer0_B7.TBIE_OFF;
        const Timer0_B7.TBIE;
    values of type Timer0_B7.TBIFG_t//
        const Timer0_B7.TBIFG_OFF;
        const Timer0_B7.TBIFG;
    values of type Timer0_B7.TBSSEL_t//
        const Timer0_B7.TBSSEL_0// TBCLK;
        const Timer0_B7.TBSSEL_1// ACLK;
        const Timer0_B7.TBSSEL_2// SMCLK;
        const Timer0_B7.TBSSEL_3// INCLK;
    var obj = new Timer0_B7.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer0_B7.TBCCTLx_t// ;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_B.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_B.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_B.SCS_t ...
        obj.CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx = ITimer_B.CLLD_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_B.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_B.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_B.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_B.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_B.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_B.CCIFG_t ...
    var obj = new Timer0_B7.TBCTL_t// Timer_B Control Register;
        obj.TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update) = ITimer_B.TBCLGRP_t ...
        obj.CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh = ITimer_B.CNTL_t ...
        obj.TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK = ITimer_B.TBSSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_B.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h = ITimer_B.MC_t ...
        obj.TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero = ITimer_B.TBCLR_t ...
        obj.TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.TBIE_t ...
        obj.TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending = ITimer_B.TBIFG_t ...
    var obj = new Timer0_B7.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer0_B7.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer0_B7.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer0_B7.Params// Instance config-params object;
        params.INCLK// Timer_B INCLK = Float 0;
        params.TB0CCR0// TB0CCR0, Timer_B Capture/Compare Register 0 = Bits16 0;
        params.TB0CCR1// TB0CCR1, Timer_B Capture/Compare Register 1 = Bits16 0;
        params.TB0CCR2// TB0CCR2, Timer_B Capture/Compare Register 2 = Bits16 0;
        params.TB0CCR3// TB0CCR3, Timer_B Capture/Compare Register 3 = Bits16 0;
        params.TB0CCR4// TB0CCR4, Timer_B Capture/Compare Register 4 = Bits16 0;
        params.TB0CCR5// TB0CCR5, Timer_B Capture/Compare Register 5 = Bits16 0;
        params.TB0CCR6// TB0CCR6, Timer_B Capture/Compare Register 6 = Bits16 0;
        params.TB0CCTL0// TB0CCTL0, Capture/Compare Control Register 0 = Timer0_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL1// TB0CCTL1, Capture/Compare Control Register 1 = Timer0_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL2// TB0CCTL2, Capture/Compare Control Register 2 = Timer0_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL3// TB0CCTL3, Capture/Compare Control Register 3 = Timer0_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL4// TB0CCTL4, Capture/Compare Control Register 4 = Timer0_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL5// TB0CCTL5, Capture/Compare Control Register 5 = Timer0_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CCTL6// TB0CCTL6, Capture/Compare Control Register 6 = Timer0_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TB0CTL// TB0CTL, Timer_B7 Control Register = Timer0_B7.TBCTL_t {
            TBCLGRP: ITimer_B.TBCLGRP_0,
            CNTL: ITimer_B.CNTL_0,
            TBSSEL: ITimer_B.TBSSEL_0,
            ID: ITimer_B.ID_0,
            MC: ITimer_B.MC_0,
            TBCLR: ITimer_B.TBCLR_OFF,
            TBIE: ITimer_B.TBIE_OFF,
            TBIFG: ITimer_B.TBIFG_OFF
        };
        params.TBCLK// Timer_B TBCLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer0_B7.ForceSetDefaultRegister_t[] [
            {
                register: "TB0CTL",
                regForceSet: false
            },
            {
                register: "TB0CCTL0",
                regForceSet: false
            },
            {
                register: "TB0CCTL1",
                regForceSet: false
            },
            {
                register: "TB0CCTL2",
                regForceSet: false
            },
            {
                register: "TB0CCTL3",
                regForceSet: false
            },
            {
                register: "TB0CCTL4",
                regForceSet: false
            },
            {
                register: "TB0CCTL5",
                regForceSet: false
            },
            {
                register: "TB0CCTL6",
                regForceSet: false
            },
            {
                register: "TB0CCR0",
                regForceSet: false
            },
            {
                register: "TB0CCR1",
                regForceSet: false
            },
            {
                register: "TB0CCR2",
                regForceSet: false
            },
            {
                register: "TB0CCR3",
                regForceSet: false
            },
            {
                register: "TB0CCR4",
                regForceSet: false
            },
            {
                register: "TB0CCR5",
                regForceSet: false
            },
            {
                register: "TB0CCR6",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer0_B7.regIntVect_t[8] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer0_B7.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer0_B7.CAP_t
index URL
Configuration settings
values of type Timer0_B7.CAP_t
    const Timer0_B7.CAP_OFF;
    const Timer0_B7.CAP;
enum Timer0_B7.CCIE_t
index URL
Configuration settings
values of type Timer0_B7.CCIE_t
    const Timer0_B7.CCIE_OFF;
    const Timer0_B7.CCIE;
enum Timer0_B7.CCIFG_t
index URL
Configuration settings
values of type Timer0_B7.CCIFG_t
    const Timer0_B7.CCIFG_OFF;
    const Timer0_B7.CCIFG;
enum Timer0_B7.CCIS_t
index URL
Configuration settings
values of type Timer0_B7.CCIS_t
    const Timer0_B7.CCIS_0;
    // CCIxA
    const Timer0_B7.CCIS_1;
    // CCIxB
    const Timer0_B7.CCIS_2;
    // GND
    const Timer0_B7.CCIS_3;
    // Vcc
enum Timer0_B7.CCI_t
index URL
Configuration settings
values of type Timer0_B7.CCI_t
    const Timer0_B7.CCI_OFF;
    const Timer0_B7.CCI;
enum Timer0_B7.CLLD_t
index URL
Configuration settings
values of type Timer0_B7.CLLD_t
    const Timer0_B7.CLLD_0;
    const Timer0_B7.CLLD_1;
    const Timer0_B7.CLLD_2;
    const Timer0_B7.CLLD_3;
enum Timer0_B7.CM_t
index URL
Configuration settings
values of type Timer0_B7.CM_t
    const Timer0_B7.CM_0;
    // No Capture
    const Timer0_B7.CM_1;
    // Rising Edge
    const Timer0_B7.CM_2;
    // Falling Edge
    const Timer0_B7.CM_3;
    // Both Edges
enum Timer0_B7.CNTL_t
index URL
Configuration settings
values of type Timer0_B7.CNTL_t
    const Timer0_B7.CNTL_0;
    // 16-bit, TBR(max) = 0FFFFh
    const Timer0_B7.CNTL_1;
    // 12-bit, TBR(max) = 0FFFh
    const Timer0_B7.CNTL_2;
    // 10-bit, TBR(max) = 03FFh
    const Timer0_B7.CNTL_3;
    // 8-bit, TBR(max) = 0FFh
enum Timer0_B7.COV_t
index URL
Configuration settings
values of type Timer0_B7.COV_t
    const Timer0_B7.COV_OFF;
    const Timer0_B7.COV;
enum Timer0_B7.ID_t
index URL
Configuration settings
values of type Timer0_B7.ID_t
    const Timer0_B7.ID_0;
    // Divider - /1
    const Timer0_B7.ID_1;
    // Divider - /2
    const Timer0_B7.ID_2;
    // Divider - /4
    const Timer0_B7.ID_3;
    // Divider - /8
enum Timer0_B7.IVValues
index URL

TB07IV Definitions

Configuration settings
values of type Timer0_B7.IVValues
    const Timer0_B7.TB0IV_NONE;
    // No Interrupt pending
    const Timer0_B7.TB0IV_TBCCR1;
    // TBCCR1_CCIFG
    const Timer0_B7.TB0IV_TBCCR2;
    // TBCCR2_CCIFG
    const Timer0_B7.TB0IV_TBCCR3;
    // TBCCR3_CCIFG
    const Timer0_B7.TB0IV_TBCCR4;
    // TBCCR4_CCIFG
    const Timer0_B7.TB0IV_TBCCR5;
    // TBCCR5_CCIFG
    const Timer0_B7.TB0IV_TBCCR6;
    // TBCCR6_CCIFG
    const Timer0_B7.TB0IV_TBIFG;
    // TBIFG
enum Timer0_B7.MC_t
index URL
Configuration settings
values of type Timer0_B7.MC_t
    const Timer0_B7.MC_0;
    // Stop Mode
    const Timer0_B7.MC_1;
    // Up Mode
    const Timer0_B7.MC_2;
    // Continuous Mode
    const Timer0_B7.MC_3;
    // Up/Down Mode
enum Timer0_B7.OUTMOD_t
index URL
Configuration settings
values of type Timer0_B7.OUTMOD_t
    const Timer0_B7.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer0_B7.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer0_B7.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer0_B7.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer0_B7.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer0_B7.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer0_B7.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer0_B7.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer0_B7.OUT_t
index URL
Configuration settings
values of type Timer0_B7.OUT_t
    const Timer0_B7.OUT_OFF;
    const Timer0_B7.OUT;
enum Timer0_B7.SCCI_t
index URL
Configuration settings
values of type Timer0_B7.SCCI_t
    const Timer0_B7.SCCI_OFF;
    const Timer0_B7.SCCI;
enum Timer0_B7.SCS_t
index URL
Configuration settings
values of type Timer0_B7.SCS_t
    const Timer0_B7.SCS_OFF;
    const Timer0_B7.SCS;
enum Timer0_B7.TBCLGRP_t
index URL
Configuration settings
values of type Timer0_B7.TBCLGRP_t
    const Timer0_B7.TBCLGRP_0;
    const Timer0_B7.TBCLGRP_1;
    const Timer0_B7.TBCLGRP_2;
    const Timer0_B7.TBCLGRP_3;
enum Timer0_B7.TBCLR_t
index URL
Configuration settings
values of type Timer0_B7.TBCLR_t
    const Timer0_B7.TBCLR_OFF;
    const Timer0_B7.TBCLR;
enum Timer0_B7.TBIE_t
index URL
Configuration settings
values of type Timer0_B7.TBIE_t
    const Timer0_B7.TBIE_OFF;
    const Timer0_B7.TBIE;
enum Timer0_B7.TBIFG_t
index URL
Configuration settings
values of type Timer0_B7.TBIFG_t
    const Timer0_B7.TBIFG_OFF;
    const Timer0_B7.TBIFG;
enum Timer0_B7.TBSSEL_t
index URL
Configuration settings
values of type Timer0_B7.TBSSEL_t
    const Timer0_B7.TBSSEL_0;
    // TBCLK
    const Timer0_B7.TBSSEL_1;
    // ACLK
    const Timer0_B7.TBSSEL_2;
    // SMCLK
    const Timer0_B7.TBSSEL_3;
    // INCLK
struct Timer0_B7.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer0_B7.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer0_B7.TBCCTLx_t
index URL
Configuration settings
var obj = new Timer0_B7.TBCCTLx_t;
    obj.CM = ITimer_B.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_B.CCIS_t ...
    // Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_B.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.CLLD = ITimer_B.CLLD_t ...
    // Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx
    obj.CAP = ITimer_B.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_B.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_B.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_B.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_B.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_B.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_B.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
struct Timer0_B7.TBCTL_t
index URL

Timer_B Control Register

Configuration settings
var obj = new Timer0_B7.TBCTL_t;
    obj.TBCLGRP = ITimer_B.TBCLGRP_t ...
    // TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)
    obj.CNTL = ITimer_B.CNTL_t ...
    // Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh
    obj.TBSSEL = ITimer_B.TBSSEL_t ...
    // Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK
    obj.ID = ITimer_B.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_B.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h
    obj.TBCLR = ITimer_B.TBCLR_t ...
    // Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero
    obj.TBIE = ITimer_B.TBIE_t ...
    // Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TBIFG = ITimer_B.TBIFG_t ...
    // Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending
SEE
TBCTL_t
struct Timer0_B7.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer0_B7.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer0_B7.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer0_B7.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer0_B7.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer0_B7.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer0_B7.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_B INCLK
    params.TB0CCR0 = Bits16 0;
    // TB0CCR0, Timer_B Capture/Compare Register 0
    params.TB0CCR1 = Bits16 0;
    // TB0CCR1, Timer_B Capture/Compare Register 1
    params.TB0CCR2 = Bits16 0;
    // TB0CCR2, Timer_B Capture/Compare Register 2
    params.TB0CCR3 = Bits16 0;
    // TB0CCR3, Timer_B Capture/Compare Register 3
    params.TB0CCR4 = Bits16 0;
    // TB0CCR4, Timer_B Capture/Compare Register 4
    params.TB0CCR5 = Bits16 0;
    // TB0CCR5, Timer_B Capture/Compare Register 5
    params.TB0CCR6 = Bits16 0;
    // TB0CCR6, Timer_B Capture/Compare Register 6
    params.TB0CCTL0 = Timer0_B7.TBCCTLx_t {
    // TB0CCTL0, Capture/Compare Control Register 0
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL1 = Timer0_B7.TBCCTLx_t {
    // TB0CCTL1, Capture/Compare Control Register 1
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL2 = Timer0_B7.TBCCTLx_t {
    // TB0CCTL2, Capture/Compare Control Register 2
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL3 = Timer0_B7.TBCCTLx_t {
    // TB0CCTL3, Capture/Compare Control Register 3
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL4 = Timer0_B7.TBCCTLx_t {
    // TB0CCTL4, Capture/Compare Control Register 4
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL5 = Timer0_B7.TBCCTLx_t {
    // TB0CCTL5, Capture/Compare Control Register 5
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CCTL6 = Timer0_B7.TBCCTLx_t {
    // TB0CCTL6, Capture/Compare Control Register 6
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TB0CTL = Timer0_B7.TBCTL_t {
    // TB0CTL, Timer_B7 Control Register
        TBCLGRP: ITimer_B.TBCLGRP_0,
        CNTL: ITimer_B.CNTL_0,
        TBSSEL: ITimer_B.TBSSEL_0,
        ID: ITimer_B.ID_0,
        MC: ITimer_B.MC_0,
        TBCLR: ITimer_B.TBCLR_OFF,
        TBIE: ITimer_B.TBIE_OFF,
        TBIFG: ITimer_B.TBIFG_OFF
    };
    params.TBCLK = Float 0;
    // Timer_B TBCLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer0_B7.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TB0CTL",
            regForceSet: false
        },
        {
            register: "TB0CCTL0",
            regForceSet: false
        },
        {
            register: "TB0CCTL1",
            regForceSet: false
        },
        {
            register: "TB0CCTL2",
            regForceSet: false
        },
        {
            register: "TB0CCTL3",
            regForceSet: false
        },
        {
            register: "TB0CCTL4",
            regForceSet: false
        },
        {
            register: "TB0CCTL5",
            regForceSet: false
        },
        {
            register: "TB0CCTL6",
            regForceSet: false
        },
        {
            register: "TB0CCR0",
            regForceSet: false
        },
        {
            register: "TB0CCR1",
            regForceSet: false
        },
        {
            register: "TB0CCR2",
            regForceSet: false
        },
        {
            register: "TB0CCR3",
            regForceSet: false
        },
        {
            register: "TB0CCR4",
            regForceSet: false
        },
        {
            register: "TB0CCR5",
            regForceSet: false
        },
        {
            register: "TB0CCR6",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer0_B7.regIntVect_t[8] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer0_B7.Params.INCLK // instance
index URL

Timer_B INCLK

Configuration settings
var params = new Timer0_B7.Params;
...
params.INCLK = Float 0;
config Timer0_B7.Params.TB0CCR0 // instance
index URL

TB0CCR0, Timer_B Capture/Compare Register 0

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCR0 = Bits16 0;
config Timer0_B7.Params.TB0CCR1 // instance
index URL

TB0CCR1, Timer_B Capture/Compare Register 1

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCR1 = Bits16 0;
config Timer0_B7.Params.TB0CCR2 // instance
index URL

TB0CCR2, Timer_B Capture/Compare Register 2

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCR2 = Bits16 0;
config Timer0_B7.Params.TB0CCR3 // instance
index URL

TB0CCR3, Timer_B Capture/Compare Register 3

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCR3 = Bits16 0;
config Timer0_B7.Params.TB0CCR4 // instance
index URL

TB0CCR4, Timer_B Capture/Compare Register 4

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCR4 = Bits16 0;
config Timer0_B7.Params.TB0CCR5 // instance
index URL

TB0CCR5, Timer_B Capture/Compare Register 5

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCR5 = Bits16 0;
config Timer0_B7.Params.TB0CCR6 // instance
index URL

TB0CCR6, Timer_B Capture/Compare Register 6

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCR6 = Bits16 0;
config Timer0_B7.Params.TB0CCTL0 // instance
index URL

TB0CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCTL0 = Timer0_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B7.Params.TB0CCTL1 // instance
index URL

TB0CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCTL1 = Timer0_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B7.Params.TB0CCTL2 // instance
index URL

TB0CCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCTL2 = Timer0_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B7.Params.TB0CCTL3 // instance
index URL

TB0CCTL3, Capture/Compare Control Register 3

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCTL3 = Timer0_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B7.Params.TB0CCTL4 // instance
index URL

TB0CCTL4, Capture/Compare Control Register 4

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCTL4 = Timer0_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B7.Params.TB0CCTL5 // instance
index URL

TB0CCTL5, Capture/Compare Control Register 5

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCTL5 = Timer0_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B7.Params.TB0CCTL6 // instance
index URL

TB0CCTL6, Capture/Compare Control Register 6

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CCTL6 = Timer0_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer0_B7.Params.TB0CTL // instance
index URL

TB0CTL, Timer_B7 Control Register

Configuration settings
var params = new Timer0_B7.Params;
...
params.TB0CTL = Timer0_B7.TBCTL_t {
    TBCLGRP: ITimer_B.TBCLGRP_0,
    CNTL: ITimer_B.CNTL_0,
    TBSSEL: ITimer_B.TBSSEL_0,
    ID: ITimer_B.ID_0,
    MC: ITimer_B.MC_0,
    TBCLR: ITimer_B.TBCLR_OFF,
    TBIE: ITimer_B.TBIE_OFF,
    TBIFG: ITimer_B.TBIFG_OFF
};
config Timer0_B7.Params.TBCLK // instance
index URL

Timer_B TBCLK

Configuration settings
var params = new Timer0_B7.Params;
...
params.TBCLK = Float 0;
config Timer0_B7.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer0_B7.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer0_B7.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer0_B7.Params;
...
const params.forceSetDefaultRegister = Timer0_B7.ForceSetDefaultRegister_t[] [
    {
        register: "TB0CTL",
        regForceSet: false
    },
    {
        register: "TB0CCTL0",
        regForceSet: false
    },
    {
        register: "TB0CCTL1",
        regForceSet: false
    },
    {
        register: "TB0CCTL2",
        regForceSet: false
    },
    {
        register: "TB0CCTL3",
        regForceSet: false
    },
    {
        register: "TB0CCTL4",
        regForceSet: false
    },
    {
        register: "TB0CCTL5",
        regForceSet: false
    },
    {
        register: "TB0CCTL6",
        regForceSet: false
    },
    {
        register: "TB0CCR0",
        regForceSet: false
    },
    {
        register: "TB0CCR1",
        regForceSet: false
    },
    {
        register: "TB0CCR2",
        regForceSet: false
    },
    {
        register: "TB0CCR3",
        regForceSet: false
    },
    {
        register: "TB0CCR4",
        regForceSet: false
    },
    {
        register: "TB0CCR5",
        regForceSet: false
    },
    {
        register: "TB0CCR6",
        regForceSet: false
    }
];
config Timer0_B7.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer0_B7.Params;
...
params.intNum = UInt undefined;
config Timer0_B7.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer0_B7.Params;
...
params.interruptSource = Timer0_B7.regIntVect_t[8] undefined;
config Timer0_B7.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer0_B7.Params;
...
params.isInternal = Bool false;
config Timer0_B7.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer0_B7.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer0_B7.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer0_B7.Params;
...
params.numberOfTimers = UChar undefined;
config Timer0_B7.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer0_B7.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer0_B7.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer0_B7.create(IClock.Instance clock, params);
// Create an instance-object
Timer0_B7.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer0_B7.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:16 GMT


module ti.catalog.msp430.peripherals.timer.Timer1_A2

metaonly module ti.catalog.msp430.peripherals.timer.Timer1_A2
index URL

MSP430 Timer1_A2 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer1_A2.xdc
var Timer1_A2 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer1_A2');
module-wide constants & types
    values of type Timer1_A2.CAP_t//
        const Timer1_A2.CAP_OFF// Compare mode;
        const Timer1_A2.CAP// Capture mode;
    values of type Timer1_A2.CCIE_t//
        const Timer1_A2.CCIE_OFF;
        const Timer1_A2.CCIE;
    values of type Timer1_A2.CCIFG_t//
        const Timer1_A2.CCIFG_OFF;
        const Timer1_A2.CCIFG;
    values of type Timer1_A2.CCIS_t//
        const Timer1_A2.CCIS_0// CCIxA;
        const Timer1_A2.CCIS_1// CCIxB;
        const Timer1_A2.CCIS_2// GND;
        const Timer1_A2.CCIS_3// Vcc;
    values of type Timer1_A2.CCI_t//
        const Timer1_A2.CCI_OFF;
        const Timer1_A2.CCI;
    values of type Timer1_A2.CM_t//
        const Timer1_A2.CM_0// No Capture;
        const Timer1_A2.CM_1// Rising Edge;
        const Timer1_A2.CM_2// Falling Edge;
        const Timer1_A2.CM_3// Both Edges;
    values of type Timer1_A2.COV_t//
        const Timer1_A2.COV_OFF;
        const Timer1_A2.COV;
    values of type Timer1_A2.ID_t//
        const Timer1_A2.ID_0// Divider - /1;
        const Timer1_A2.ID_1// Divider - /2;
        const Timer1_A2.ID_2// Divider - /4;
        const Timer1_A2.ID_3// Divider - /8;
    values of type Timer1_A2.IVValues// TA3IV Definitions
        const Timer1_A2.TAIV_NONE// No Interrupt pending;
        const Timer1_A2.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer1_A2.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer1_A2.TAIV_6// Reserved;
        const Timer1_A2.TAIV_8// Reserved;
        const Timer1_A2.TAIV_TAIFG// TAIFG;
    values of type Timer1_A2.MC_t//
        const Timer1_A2.MC_0// Stop Mode;
        const Timer1_A2.MC_1// Up Mode;
        const Timer1_A2.MC_2// Continuous Mode;
        const Timer1_A2.MC_3// Up/Down Mode;
    values of type Timer1_A2.OUTMOD_t//
        const Timer1_A2.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer1_A2.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer1_A2.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer1_A2.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer1_A2.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer1_A2.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer1_A2.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer1_A2.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer1_A2.OUT_t//
        const Timer1_A2.OUT_OFF;
        const Timer1_A2.OUT;
    values of type Timer1_A2.SCCI_t//
        const Timer1_A2.SCCI_OFF// Latched capture signal (read);
        const Timer1_A2.SCCI// Latched capture signal (read);
    values of type Timer1_A2.SCS_t//
        const Timer1_A2.SCS_OFF// Asynchronous Capture;
        const Timer1_A2.SCS// Sychronous Capture;
    values of type Timer1_A2.TACLR_t//
        const Timer1_A2.TACLR_OFF;
        const Timer1_A2.TACLR;
    values of type Timer1_A2.TAIE_t//
        const Timer1_A2.TAIE_OFF;
        const Timer1_A2.TAIE;
    values of type Timer1_A2.TAIFG_t//
        const Timer1_A2.TAIFG_OFF;
        const Timer1_A2.TAIFG;
    values of type Timer1_A2.TASSEL_t//
        const Timer1_A2.TASSEL_0// TACLK;
        const Timer1_A2.TASSEL_1// ACLK;
        const Timer1_A2.TASSEL_2// SMCLK;
        const Timer1_A2.TASSEL_3// INCLK;
    var obj = new Timer1_A2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer1_A2.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer1_A2.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer1_A2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer1_A2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer1_A2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer1_A2.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA1CCR0// TA1CCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TA1CCR1// TA1CCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TA1CCTL0// TA1CCTL0, Capture/Compare Control Register 0 = Timer1_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA1CCTL1// TA1CCTL1, Capture/Compare Control Register 1 = Timer1_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA1CTL// TA1CTL, Timer1_A2 Control Register = Timer1_A2.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer1_A2.ForceSetDefaultRegister_t[] [
            {
                register: "TA1CTL",
                regForceSet: false
            },
            {
                register: "TA1CCTL0",
                regForceSet: false
            },
            {
                register: "TA1CCTL1",
                regForceSet: false
            },
            {
                register: "TA1CCR0",
                regForceSet: false
            },
            {
                register: "TA1CCR1",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer1_A2.regIntVect_t[3] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer1_A2.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer1_A2.CAP_t
index URL
Configuration settings
values of type Timer1_A2.CAP_t
    const Timer1_A2.CAP_OFF;
    // Compare mode
    const Timer1_A2.CAP;
    // Capture mode
enum Timer1_A2.CCIE_t
index URL
Configuration settings
values of type Timer1_A2.CCIE_t
    const Timer1_A2.CCIE_OFF;
    const Timer1_A2.CCIE;
enum Timer1_A2.CCIFG_t
index URL
Configuration settings
values of type Timer1_A2.CCIFG_t
    const Timer1_A2.CCIFG_OFF;
    const Timer1_A2.CCIFG;
enum Timer1_A2.CCIS_t
index URL
Configuration settings
values of type Timer1_A2.CCIS_t
    const Timer1_A2.CCIS_0;
    // CCIxA
    const Timer1_A2.CCIS_1;
    // CCIxB
    const Timer1_A2.CCIS_2;
    // GND
    const Timer1_A2.CCIS_3;
    // Vcc
enum Timer1_A2.CCI_t
index URL
Configuration settings
values of type Timer1_A2.CCI_t
    const Timer1_A2.CCI_OFF;
    const Timer1_A2.CCI;
enum Timer1_A2.CM_t
index URL
Configuration settings
values of type Timer1_A2.CM_t
    const Timer1_A2.CM_0;
    // No Capture
    const Timer1_A2.CM_1;
    // Rising Edge
    const Timer1_A2.CM_2;
    // Falling Edge
    const Timer1_A2.CM_3;
    // Both Edges
enum Timer1_A2.COV_t
index URL
Configuration settings
values of type Timer1_A2.COV_t
    const Timer1_A2.COV_OFF;
    const Timer1_A2.COV;
enum Timer1_A2.ID_t
index URL
Configuration settings
values of type Timer1_A2.ID_t
    const Timer1_A2.ID_0;
    // Divider - /1
    const Timer1_A2.ID_1;
    // Divider - /2
    const Timer1_A2.ID_2;
    // Divider - /4
    const Timer1_A2.ID_3;
    // Divider - /8
enum Timer1_A2.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer1_A2.IVValues
    const Timer1_A2.TAIV_NONE;
    // No Interrupt pending
    const Timer1_A2.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer1_A2.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer1_A2.TAIV_6;
    // Reserved
    const Timer1_A2.TAIV_8;
    // Reserved
    const Timer1_A2.TAIV_TAIFG;
    // TAIFG
enum Timer1_A2.MC_t
index URL
Configuration settings
values of type Timer1_A2.MC_t
    const Timer1_A2.MC_0;
    // Stop Mode
    const Timer1_A2.MC_1;
    // Up Mode
    const Timer1_A2.MC_2;
    // Continuous Mode
    const Timer1_A2.MC_3;
    // Up/Down Mode
enum Timer1_A2.OUTMOD_t
index URL
Configuration settings
values of type Timer1_A2.OUTMOD_t
    const Timer1_A2.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer1_A2.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer1_A2.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer1_A2.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer1_A2.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer1_A2.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer1_A2.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer1_A2.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer1_A2.OUT_t
index URL
Configuration settings
values of type Timer1_A2.OUT_t
    const Timer1_A2.OUT_OFF;
    const Timer1_A2.OUT;
enum Timer1_A2.SCCI_t
index URL
Configuration settings
values of type Timer1_A2.SCCI_t
    const Timer1_A2.SCCI_OFF;
    // Latched capture signal (read)
    const Timer1_A2.SCCI;
    // Latched capture signal (read)
enum Timer1_A2.SCS_t
index URL
Configuration settings
values of type Timer1_A2.SCS_t
    const Timer1_A2.SCS_OFF;
    // Asynchronous Capture
    const Timer1_A2.SCS;
    // Sychronous Capture
enum Timer1_A2.TACLR_t
index URL
Configuration settings
values of type Timer1_A2.TACLR_t
    const Timer1_A2.TACLR_OFF;
    const Timer1_A2.TACLR;
enum Timer1_A2.TAIE_t
index URL
Configuration settings
values of type Timer1_A2.TAIE_t
    const Timer1_A2.TAIE_OFF;
    const Timer1_A2.TAIE;
enum Timer1_A2.TAIFG_t
index URL
Configuration settings
values of type Timer1_A2.TAIFG_t
    const Timer1_A2.TAIFG_OFF;
    const Timer1_A2.TAIFG;
enum Timer1_A2.TASSEL_t
index URL
Configuration settings
values of type Timer1_A2.TASSEL_t
    const Timer1_A2.TASSEL_0;
    // TACLK
    const Timer1_A2.TASSEL_1;
    // ACLK
    const Timer1_A2.TASSEL_2;
    // SMCLK
    const Timer1_A2.TASSEL_3;
    // INCLK
struct Timer1_A2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer1_A2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer1_A2.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer1_A2.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer1_A2.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer1_A2.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer1_A2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer1_A2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer1_A2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer1_A2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer1_A2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer1_A2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer1_A2.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA1CCR0 = Bits16 0;
    // TA1CCR0, Timer_A Capture/Compare Register 0
    params.TA1CCR1 = Bits16 0;
    // TA1CCR1, Timer_A Capture/Compare Register 1
    params.TA1CCTL0 = Timer1_A2.TACCTLx_t {
    // TA1CCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA1CCTL1 = Timer1_A2.TACCTLx_t {
    // TA1CCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA1CTL = Timer1_A2.TACTL_t {
    // TA1CTL, Timer1_A2 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer1_A2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA1CTL",
            regForceSet: false
        },
        {
            register: "TA1CCTL0",
            regForceSet: false
        },
        {
            register: "TA1CCTL1",
            regForceSet: false
        },
        {
            register: "TA1CCR0",
            regForceSet: false
        },
        {
            register: "TA1CCR1",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer1_A2.regIntVect_t[3] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer1_A2.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer1_A2.Params;
...
params.INCLK = Float 0;
config Timer1_A2.Params.TA1CCR0 // instance
index URL

TA1CCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer1_A2.Params;
...
params.TA1CCR0 = Bits16 0;
config Timer1_A2.Params.TA1CCR1 // instance
index URL

TA1CCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer1_A2.Params;
...
params.TA1CCR1 = Bits16 0;
config Timer1_A2.Params.TA1CCTL0 // instance
index URL

TA1CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer1_A2.Params;
...
params.TA1CCTL0 = Timer1_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer1_A2.Params.TA1CCTL1 // instance
index URL

TA1CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer1_A2.Params;
...
params.TA1CCTL1 = Timer1_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer1_A2.Params.TA1CTL // instance
index URL

TA1CTL, Timer1_A2 Control Register

Configuration settings
var params = new Timer1_A2.Params;
...
params.TA1CTL = Timer1_A2.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer1_A2.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer1_A2.Params;
...
params.TACLK = Float 0;
config Timer1_A2.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer1_A2.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer1_A2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer1_A2.Params;
...
const params.forceSetDefaultRegister = Timer1_A2.ForceSetDefaultRegister_t[] [
    {
        register: "TA1CTL",
        regForceSet: false
    },
    {
        register: "TA1CCTL0",
        regForceSet: false
    },
    {
        register: "TA1CCTL1",
        regForceSet: false
    },
    {
        register: "TA1CCR0",
        regForceSet: false
    },
    {
        register: "TA1CCR1",
        regForceSet: false
    }
];
config Timer1_A2.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer1_A2.Params;
...
params.intNum = UInt undefined;
config Timer1_A2.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer1_A2.Params;
...
params.interruptSource = Timer1_A2.regIntVect_t[3] undefined;
config Timer1_A2.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer1_A2.Params;
...
params.isInternal = Bool false;
config Timer1_A2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer1_A2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer1_A2.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer1_A2.Params;
...
params.numberOfTimers = UChar undefined;
config Timer1_A2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer1_A2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer1_A2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer1_A2.create(IClock.Instance clock, params);
// Create an instance-object
Timer1_A2.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer1_A2.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:16 GMT


module ti.catalog.msp430.peripherals.timer.Timer1_A3

metaonly module ti.catalog.msp430.peripherals.timer.Timer1_A3
index URL

MSP430 Timer1_A3 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer1_A3.xdc
var Timer1_A3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer1_A3');
module-wide constants & types
    values of type Timer1_A3.CAP_t//
        const Timer1_A3.CAP_OFF// Compare mode;
        const Timer1_A3.CAP// Capture mode;
    values of type Timer1_A3.CCIE_t//
        const Timer1_A3.CCIE_OFF;
        const Timer1_A3.CCIE;
    values of type Timer1_A3.CCIFG_t//
        const Timer1_A3.CCIFG_OFF;
        const Timer1_A3.CCIFG;
    values of type Timer1_A3.CCIS_t//
        const Timer1_A3.CCIS_0// CCIxA;
        const Timer1_A3.CCIS_1// CCIxB;
        const Timer1_A3.CCIS_2// GND;
        const Timer1_A3.CCIS_3// Vcc;
    values of type Timer1_A3.CCI_t//
        const Timer1_A3.CCI_OFF;
        const Timer1_A3.CCI;
    values of type Timer1_A3.CM_t//
        const Timer1_A3.CM_0// No Capture;
        const Timer1_A3.CM_1// Rising Edge;
        const Timer1_A3.CM_2// Falling Edge;
        const Timer1_A3.CM_3// Both Edges;
    values of type Timer1_A3.COV_t//
        const Timer1_A3.COV_OFF;
        const Timer1_A3.COV;
    values of type Timer1_A3.ID_t//
        const Timer1_A3.ID_0// Divider - /1;
        const Timer1_A3.ID_1// Divider - /2;
        const Timer1_A3.ID_2// Divider - /4;
        const Timer1_A3.ID_3// Divider - /8;
    values of type Timer1_A3.IVValues// TA3IV Definitions
        const Timer1_A3.TAIV_NONE// No Interrupt pending;
        const Timer1_A3.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer1_A3.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer1_A3.TAIV_6// Reserved;
        const Timer1_A3.TAIV_8// Reserved;
        const Timer1_A3.TAIV_TAIFG// TAIFG;
    values of type Timer1_A3.MC_t//
        const Timer1_A3.MC_0// Stop Mode;
        const Timer1_A3.MC_1// Up Mode;
        const Timer1_A3.MC_2// Continuous Mode;
        const Timer1_A3.MC_3// Up/Down Mode;
    values of type Timer1_A3.OUTMOD_t//
        const Timer1_A3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer1_A3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer1_A3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer1_A3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer1_A3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer1_A3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer1_A3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer1_A3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer1_A3.OUT_t//
        const Timer1_A3.OUT_OFF;
        const Timer1_A3.OUT;
    values of type Timer1_A3.SCCI_t//
        const Timer1_A3.SCCI_OFF// Latched capture signal (read);
        const Timer1_A3.SCCI// Latched capture signal (read);
    values of type Timer1_A3.SCS_t//
        const Timer1_A3.SCS_OFF// Asynchronous Capture;
        const Timer1_A3.SCS// Sychronous Capture;
    values of type Timer1_A3.TACLR_t//
        const Timer1_A3.TACLR_OFF;
        const Timer1_A3.TACLR;
    values of type Timer1_A3.TAIE_t//
        const Timer1_A3.TAIE_OFF;
        const Timer1_A3.TAIE;
    values of type Timer1_A3.TAIFG_t//
        const Timer1_A3.TAIFG_OFF;
        const Timer1_A3.TAIFG;
    values of type Timer1_A3.TASSEL_t//
        const Timer1_A3.TASSEL_0// TACLK;
        const Timer1_A3.TASSEL_1// ACLK;
        const Timer1_A3.TASSEL_2// SMCLK;
        const Timer1_A3.TASSEL_3// INCLK;
    var obj = new Timer1_A3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer1_A3.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer1_A3.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer1_A3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer1_A3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer1_A3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer1_A3.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA1CCR0// TA1CCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TA1CCR1// TA1CCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TA1CCR2// TA1CCR2, Timer_A Capture/Compare Register 2 = Bits16 0;
        params.TA1CCTL0// TA1CCTL0, Capture/Compare Control Register 0 = Timer1_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA1CCTL1// TA1CCTL1, Capture/Compare Control Register 1 = Timer1_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA1CCTL2// TA1CCTL2, Capture/Compare Control Register 2 = Timer1_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA1CTL// TA1CTL, Timer_A3 Control Register = Timer1_A3.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer1_A3.ForceSetDefaultRegister_t[] [
            {
                register: "TA1CTL",
                regForceSet: false
            },
            {
                register: "TA1CCTL0",
                regForceSet: false
            },
            {
                register: "TA1CCTL1",
                regForceSet: false
            },
            {
                register: "TA1CCTL2",
                regForceSet: false
            },
            {
                register: "TA1CCR0",
                regForceSet: false
            },
            {
                register: "TA1CCR1",
                regForceSet: false
            },
            {
                register: "TA1CCR2",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer1_A3.regIntVect_t[4] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer1_A3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer1_A3.CAP_t
index URL
Configuration settings
values of type Timer1_A3.CAP_t
    const Timer1_A3.CAP_OFF;
    // Compare mode
    const Timer1_A3.CAP;
    // Capture mode
enum Timer1_A3.CCIE_t
index URL
Configuration settings
values of type Timer1_A3.CCIE_t
    const Timer1_A3.CCIE_OFF;
    const Timer1_A3.CCIE;
enum Timer1_A3.CCIFG_t
index URL
Configuration settings
values of type Timer1_A3.CCIFG_t
    const Timer1_A3.CCIFG_OFF;
    const Timer1_A3.CCIFG;
enum Timer1_A3.CCIS_t
index URL
Configuration settings
values of type Timer1_A3.CCIS_t
    const Timer1_A3.CCIS_0;
    // CCIxA
    const Timer1_A3.CCIS_1;
    // CCIxB
    const Timer1_A3.CCIS_2;
    // GND
    const Timer1_A3.CCIS_3;
    // Vcc
enum Timer1_A3.CCI_t
index URL
Configuration settings
values of type Timer1_A3.CCI_t
    const Timer1_A3.CCI_OFF;
    const Timer1_A3.CCI;
enum Timer1_A3.CM_t
index URL
Configuration settings
values of type Timer1_A3.CM_t
    const Timer1_A3.CM_0;
    // No Capture
    const Timer1_A3.CM_1;
    // Rising Edge
    const Timer1_A3.CM_2;
    // Falling Edge
    const Timer1_A3.CM_3;
    // Both Edges
enum Timer1_A3.COV_t
index URL
Configuration settings
values of type Timer1_A3.COV_t
    const Timer1_A3.COV_OFF;
    const Timer1_A3.COV;
enum Timer1_A3.ID_t
index URL
Configuration settings
values of type Timer1_A3.ID_t
    const Timer1_A3.ID_0;
    // Divider - /1
    const Timer1_A3.ID_1;
    // Divider - /2
    const Timer1_A3.ID_2;
    // Divider - /4
    const Timer1_A3.ID_3;
    // Divider - /8
enum Timer1_A3.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer1_A3.IVValues
    const Timer1_A3.TAIV_NONE;
    // No Interrupt pending
    const Timer1_A3.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer1_A3.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer1_A3.TAIV_6;
    // Reserved
    const Timer1_A3.TAIV_8;
    // Reserved
    const Timer1_A3.TAIV_TAIFG;
    // TAIFG
enum Timer1_A3.MC_t
index URL
Configuration settings
values of type Timer1_A3.MC_t
    const Timer1_A3.MC_0;
    // Stop Mode
    const Timer1_A3.MC_1;
    // Up Mode
    const Timer1_A3.MC_2;
    // Continuous Mode
    const Timer1_A3.MC_3;
    // Up/Down Mode
enum Timer1_A3.OUTMOD_t
index URL
Configuration settings
values of type Timer1_A3.OUTMOD_t
    const Timer1_A3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer1_A3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer1_A3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer1_A3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer1_A3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer1_A3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer1_A3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer1_A3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer1_A3.OUT_t
index URL
Configuration settings
values of type Timer1_A3.OUT_t
    const Timer1_A3.OUT_OFF;
    const Timer1_A3.OUT;
enum Timer1_A3.SCCI_t
index URL
Configuration settings
values of type Timer1_A3.SCCI_t
    const Timer1_A3.SCCI_OFF;
    // Latched capture signal (read)
    const Timer1_A3.SCCI;
    // Latched capture signal (read)
enum Timer1_A3.SCS_t
index URL
Configuration settings
values of type Timer1_A3.SCS_t
    const Timer1_A3.SCS_OFF;
    // Asynchronous Capture
    const Timer1_A3.SCS;
    // Sychronous Capture
enum Timer1_A3.TACLR_t
index URL
Configuration settings
values of type Timer1_A3.TACLR_t
    const Timer1_A3.TACLR_OFF;
    const Timer1_A3.TACLR;
enum Timer1_A3.TAIE_t
index URL
Configuration settings
values of type Timer1_A3.TAIE_t
    const Timer1_A3.TAIE_OFF;
    const Timer1_A3.TAIE;
enum Timer1_A3.TAIFG_t
index URL
Configuration settings
values of type Timer1_A3.TAIFG_t
    const Timer1_A3.TAIFG_OFF;
    const Timer1_A3.TAIFG;
enum Timer1_A3.TASSEL_t
index URL
Configuration settings
values of type Timer1_A3.TASSEL_t
    const Timer1_A3.TASSEL_0;
    // TACLK
    const Timer1_A3.TASSEL_1;
    // ACLK
    const Timer1_A3.TASSEL_2;
    // SMCLK
    const Timer1_A3.TASSEL_3;
    // INCLK
struct Timer1_A3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer1_A3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer1_A3.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer1_A3.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer1_A3.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer1_A3.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer1_A3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer1_A3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer1_A3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer1_A3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer1_A3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer1_A3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer1_A3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA1CCR0 = Bits16 0;
    // TA1CCR0, Timer_A Capture/Compare Register 0
    params.TA1CCR1 = Bits16 0;
    // TA1CCR1, Timer_A Capture/Compare Register 1
    params.TA1CCR2 = Bits16 0;
    // TA1CCR2, Timer_A Capture/Compare Register 2
    params.TA1CCTL0 = Timer1_A3.TACCTLx_t {
    // TA1CCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA1CCTL1 = Timer1_A3.TACCTLx_t {
    // TA1CCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA1CCTL2 = Timer1_A3.TACCTLx_t {
    // TA1CCTL2, Capture/Compare Control Register 2
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA1CTL = Timer1_A3.TACTL_t {
    // TA1CTL, Timer_A3 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer1_A3.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA1CTL",
            regForceSet: false
        },
        {
            register: "TA1CCTL0",
            regForceSet: false
        },
        {
            register: "TA1CCTL1",
            regForceSet: false
        },
        {
            register: "TA1CCTL2",
            regForceSet: false
        },
        {
            register: "TA1CCR0",
            regForceSet: false
        },
        {
            register: "TA1CCR1",
            regForceSet: false
        },
        {
            register: "TA1CCR2",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer1_A3.regIntVect_t[4] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer1_A3.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer1_A3.Params;
...
params.INCLK = Float 0;
config Timer1_A3.Params.TA1CCR0 // instance
index URL

TA1CCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer1_A3.Params;
...
params.TA1CCR0 = Bits16 0;
config Timer1_A3.Params.TA1CCR1 // instance
index URL

TA1CCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer1_A3.Params;
...
params.TA1CCR1 = Bits16 0;
config Timer1_A3.Params.TA1CCR2 // instance
index URL

TA1CCR2, Timer_A Capture/Compare Register 2

Configuration settings
var params = new Timer1_A3.Params;
...
params.TA1CCR2 = Bits16 0;
config Timer1_A3.Params.TA1CCTL0 // instance
index URL

TA1CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer1_A3.Params;
...
params.TA1CCTL0 = Timer1_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer1_A3.Params.TA1CCTL1 // instance
index URL

TA1CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer1_A3.Params;
...
params.TA1CCTL1 = Timer1_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer1_A3.Params.TA1CCTL2 // instance
index URL

TA1CCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer1_A3.Params;
...
params.TA1CCTL2 = Timer1_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer1_A3.Params.TA1CTL // instance
index URL

TA1CTL, Timer_A3 Control Register

Configuration settings
var params = new Timer1_A3.Params;
...
params.TA1CTL = Timer1_A3.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer1_A3.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer1_A3.Params;
...
params.TACLK = Float 0;
config Timer1_A3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer1_A3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer1_A3.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer1_A3.Params;
...
const params.forceSetDefaultRegister = Timer1_A3.ForceSetDefaultRegister_t[] [
    {
        register: "TA1CTL",
        regForceSet: false
    },
    {
        register: "TA1CCTL0",
        regForceSet: false
    },
    {
        register: "TA1CCTL1",
        regForceSet: false
    },
    {
        register: "TA1CCTL2",
        regForceSet: false
    },
    {
        register: "TA1CCR0",
        regForceSet: false
    },
    {
        register: "TA1CCR1",
        regForceSet: false
    },
    {
        register: "TA1CCR2",
        regForceSet: false
    }
];
config Timer1_A3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer1_A3.Params;
...
params.intNum = UInt undefined;
config Timer1_A3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer1_A3.Params;
...
params.interruptSource = Timer1_A3.regIntVect_t[4] undefined;
config Timer1_A3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer1_A3.Params;
...
params.isInternal = Bool false;
config Timer1_A3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer1_A3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer1_A3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer1_A3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer1_A3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer1_A3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer1_A3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer1_A3.create(IClock.Instance clock, params);
// Create an instance-object
Timer1_A3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer1_A3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:16 GMT


module ti.catalog.msp430.peripherals.timer.Timer1_B3

metaonly module ti.catalog.msp430.peripherals.timer.Timer1_B3
index URL

MSP430 Timer1_B3 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer1_B3.xdc
var Timer1_B3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer1_B3');
module-wide constants & types
    values of type Timer1_B3.CAP_t//
        const Timer1_B3.CAP_OFF;
        const Timer1_B3.CAP;
    values of type Timer1_B3.CCIE_t//
        const Timer1_B3.CCIE_OFF;
        const Timer1_B3.CCIE;
    values of type Timer1_B3.CCIFG_t//
        const Timer1_B3.CCIFG_OFF;
        const Timer1_B3.CCIFG;
    values of type Timer1_B3.CCIS_t//
        const Timer1_B3.CCIS_0// CCIxA;
        const Timer1_B3.CCIS_1// CCIxB;
        const Timer1_B3.CCIS_2// GND;
        const Timer1_B3.CCIS_3// Vcc;
    values of type Timer1_B3.CCI_t//
        const Timer1_B3.CCI_OFF;
        const Timer1_B3.CCI;
    values of type Timer1_B3.CLLD_t//
        const Timer1_B3.CLLD_0;
        const Timer1_B3.CLLD_1;
        const Timer1_B3.CLLD_2;
        const Timer1_B3.CLLD_3;
    values of type Timer1_B3.CM_t//
        const Timer1_B3.CM_0// No Capture;
        const Timer1_B3.CM_1// Rising Edge;
        const Timer1_B3.CM_2// Falling Edge;
        const Timer1_B3.CM_3// Both Edges;
    values of type Timer1_B3.CNTL_t//
        const Timer1_B3.CNTL_0// 16-bit, TBR(max) = 0FFFFh;
        const Timer1_B3.CNTL_1// 12-bit, TBR(max) = 0FFFh;
        const Timer1_B3.CNTL_2// 10-bit, TBR(max) = 03FFh;
        const Timer1_B3.CNTL_3// 8-bit, TBR(max) = 0FFh;
    values of type Timer1_B3.COV_t//
        const Timer1_B3.COV_OFF;
        const Timer1_B3.COV;
    values of type Timer1_B3.ID_t//
        const Timer1_B3.ID_0// Divider - /1;
        const Timer1_B3.ID_1// Divider - /2;
        const Timer1_B3.ID_2// Divider - /4;
        const Timer1_B3.ID_3// Divider - /8;
    values of type Timer1_B3.MC_t//
        const Timer1_B3.MC_0// Stop Mode;
        const Timer1_B3.MC_1// Up Mode;
        const Timer1_B3.MC_2// Continuous Mode;
        const Timer1_B3.MC_3// Up/Down Mode;
    values of type Timer1_B3.OUTMOD_t//
        const Timer1_B3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer1_B3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer1_B3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer1_B3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer1_B3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer1_B3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer1_B3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer1_B3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer1_B3.OUT_t//
        const Timer1_B3.OUT_OFF;
        const Timer1_B3.OUT;
    values of type Timer1_B3.SCCI_t//
        const Timer1_B3.SCCI_OFF;
        const Timer1_B3.SCCI;
    values of type Timer1_B3.SCS_t//
        const Timer1_B3.SCS_OFF;
        const Timer1_B3.SCS;
    values of type Timer1_B3.TBCLGRP_t//
        const Timer1_B3.TBCLGRP_0;
        const Timer1_B3.TBCLGRP_1;
        const Timer1_B3.TBCLGRP_2;
        const Timer1_B3.TBCLGRP_3;
    values of type Timer1_B3.TBCLR_t//
        const Timer1_B3.TBCLR_OFF;
        const Timer1_B3.TBCLR;
    values of type Timer1_B3.TBIE_t//
        const Timer1_B3.TBIE_OFF;
        const Timer1_B3.TBIE;
    values of type Timer1_B3.TBIFG_t//
        const Timer1_B3.TBIFG_OFF;
        const Timer1_B3.TBIFG;
    values of type Timer1_B3.TBSSEL_t//
        const Timer1_B3.TBSSEL_0// TBCLK;
        const Timer1_B3.TBSSEL_1// ACLK;
        const Timer1_B3.TBSSEL_2// SMCLK;
        const Timer1_B3.TBSSEL_3// INCLK;
    var obj = new Timer1_B3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer1_B3.TBCCTLx_t// ;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_B.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_B.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_B.SCS_t ...
        obj.CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx = ITimer_B.CLLD_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_B.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_B.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_B.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_B.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_B.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_B.CCIFG_t ...
    var obj = new Timer1_B3.TBCTL_t// Timer_B Control Register;
        obj.TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update) = ITimer_B.TBCLGRP_t ...
        obj.CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh = ITimer_B.CNTL_t ...
        obj.TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK = ITimer_B.TBSSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_B.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h = ITimer_B.MC_t ...
        obj.TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero = ITimer_B.TBCLR_t ...
        obj.TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.TBIE_t ...
        obj.TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending = ITimer_B.TBIFG_t ...
    var obj = new Timer1_B3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer1_B3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer1_B3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer1_B3.Params// Instance config-params object;
        params.INCLK// Timer_B INCLK = Float 0;
        params.TBCLK// Timer_B TBCLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer1_B3.regIntVect_t[8] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer1_B3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer1_B3.CAP_t
index URL
Configuration settings
values of type Timer1_B3.CAP_t
    const Timer1_B3.CAP_OFF;
    const Timer1_B3.CAP;
enum Timer1_B3.CCIE_t
index URL
Configuration settings
values of type Timer1_B3.CCIE_t
    const Timer1_B3.CCIE_OFF;
    const Timer1_B3.CCIE;
enum Timer1_B3.CCIFG_t
index URL
Configuration settings
values of type Timer1_B3.CCIFG_t
    const Timer1_B3.CCIFG_OFF;
    const Timer1_B3.CCIFG;
enum Timer1_B3.CCIS_t
index URL
Configuration settings
values of type Timer1_B3.CCIS_t
    const Timer1_B3.CCIS_0;
    // CCIxA
    const Timer1_B3.CCIS_1;
    // CCIxB
    const Timer1_B3.CCIS_2;
    // GND
    const Timer1_B3.CCIS_3;
    // Vcc
enum Timer1_B3.CCI_t
index URL
Configuration settings
values of type Timer1_B3.CCI_t
    const Timer1_B3.CCI_OFF;
    const Timer1_B3.CCI;
enum Timer1_B3.CLLD_t
index URL
Configuration settings
values of type Timer1_B3.CLLD_t
    const Timer1_B3.CLLD_0;
    const Timer1_B3.CLLD_1;
    const Timer1_B3.CLLD_2;
    const Timer1_B3.CLLD_3;
enum Timer1_B3.CM_t
index URL
Configuration settings
values of type Timer1_B3.CM_t
    const Timer1_B3.CM_0;
    // No Capture
    const Timer1_B3.CM_1;
    // Rising Edge
    const Timer1_B3.CM_2;
    // Falling Edge
    const Timer1_B3.CM_3;
    // Both Edges
enum Timer1_B3.CNTL_t
index URL
Configuration settings
values of type Timer1_B3.CNTL_t
    const Timer1_B3.CNTL_0;
    // 16-bit, TBR(max) = 0FFFFh
    const Timer1_B3.CNTL_1;
    // 12-bit, TBR(max) = 0FFFh
    const Timer1_B3.CNTL_2;
    // 10-bit, TBR(max) = 03FFh
    const Timer1_B3.CNTL_3;
    // 8-bit, TBR(max) = 0FFh
enum Timer1_B3.COV_t
index URL
Configuration settings
values of type Timer1_B3.COV_t
    const Timer1_B3.COV_OFF;
    const Timer1_B3.COV;
enum Timer1_B3.ID_t
index URL
Configuration settings
values of type Timer1_B3.ID_t
    const Timer1_B3.ID_0;
    // Divider - /1
    const Timer1_B3.ID_1;
    // Divider - /2
    const Timer1_B3.ID_2;
    // Divider - /4
    const Timer1_B3.ID_3;
    // Divider - /8
enum Timer1_B3.MC_t
index URL
Configuration settings
values of type Timer1_B3.MC_t
    const Timer1_B3.MC_0;
    // Stop Mode
    const Timer1_B3.MC_1;
    // Up Mode
    const Timer1_B3.MC_2;
    // Continuous Mode
    const Timer1_B3.MC_3;
    // Up/Down Mode
enum Timer1_B3.OUTMOD_t
index URL
Configuration settings
values of type Timer1_B3.OUTMOD_t
    const Timer1_B3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer1_B3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer1_B3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer1_B3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer1_B3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer1_B3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer1_B3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer1_B3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer1_B3.OUT_t
index URL
Configuration settings
values of type Timer1_B3.OUT_t
    const Timer1_B3.OUT_OFF;
    const Timer1_B3.OUT;
enum Timer1_B3.SCCI_t
index URL
Configuration settings
values of type Timer1_B3.SCCI_t
    const Timer1_B3.SCCI_OFF;
    const Timer1_B3.SCCI;
enum Timer1_B3.SCS_t
index URL
Configuration settings
values of type Timer1_B3.SCS_t
    const Timer1_B3.SCS_OFF;
    const Timer1_B3.SCS;
enum Timer1_B3.TBCLGRP_t
index URL
Configuration settings
values of type Timer1_B3.TBCLGRP_t
    const Timer1_B3.TBCLGRP_0;
    const Timer1_B3.TBCLGRP_1;
    const Timer1_B3.TBCLGRP_2;
    const Timer1_B3.TBCLGRP_3;
enum Timer1_B3.TBCLR_t
index URL
Configuration settings
values of type Timer1_B3.TBCLR_t
    const Timer1_B3.TBCLR_OFF;
    const Timer1_B3.TBCLR;
enum Timer1_B3.TBIE_t
index URL
Configuration settings
values of type Timer1_B3.TBIE_t
    const Timer1_B3.TBIE_OFF;
    const Timer1_B3.TBIE;
enum Timer1_B3.TBIFG_t
index URL
Configuration settings
values of type Timer1_B3.TBIFG_t
    const Timer1_B3.TBIFG_OFF;
    const Timer1_B3.TBIFG;
enum Timer1_B3.TBSSEL_t
index URL
Configuration settings
values of type Timer1_B3.TBSSEL_t
    const Timer1_B3.TBSSEL_0;
    // TBCLK
    const Timer1_B3.TBSSEL_1;
    // ACLK
    const Timer1_B3.TBSSEL_2;
    // SMCLK
    const Timer1_B3.TBSSEL_3;
    // INCLK
struct Timer1_B3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer1_B3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer1_B3.TBCCTLx_t
index URL
Configuration settings
var obj = new Timer1_B3.TBCCTLx_t;
    obj.CM = ITimer_B.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_B.CCIS_t ...
    // Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_B.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.CLLD = ITimer_B.CLLD_t ...
    // Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx
    obj.CAP = ITimer_B.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_B.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_B.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_B.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_B.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_B.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_B.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
struct Timer1_B3.TBCTL_t
index URL

Timer_B Control Register

Configuration settings
var obj = new Timer1_B3.TBCTL_t;
    obj.TBCLGRP = ITimer_B.TBCLGRP_t ...
    // TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)
    obj.CNTL = ITimer_B.CNTL_t ...
    // Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh
    obj.TBSSEL = ITimer_B.TBSSEL_t ...
    // Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK
    obj.ID = ITimer_B.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_B.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h
    obj.TBCLR = ITimer_B.TBCLR_t ...
    // Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero
    obj.TBIE = ITimer_B.TBIE_t ...
    // Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TBIFG = ITimer_B.TBIFG_t ...
    // Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending
SEE
TBCTL_t
struct Timer1_B3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer1_B3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer1_B3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer1_B3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer1_B3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer1_B3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer1_B3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_B INCLK
    params.TBCLK = Float 0;
    // Timer_B TBCLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer1_B3.regIntVect_t[8] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer1_B3.Params.INCLK // instance
index URL

Timer_B INCLK

Configuration settings
var params = new Timer1_B3.Params;
...
params.INCLK = Float 0;
config Timer1_B3.Params.TBCLK // instance
index URL

Timer_B TBCLK

Configuration settings
var params = new Timer1_B3.Params;
...
params.TBCLK = Float 0;
config Timer1_B3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer1_B3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer1_B3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer1_B3.Params;
...
params.intNum = UInt undefined;
config Timer1_B3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer1_B3.Params;
...
params.interruptSource = Timer1_B3.regIntVect_t[8] undefined;
config Timer1_B3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer1_B3.Params;
...
params.isInternal = Bool false;
config Timer1_B3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer1_B3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer1_B3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer1_B3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer1_B3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer1_B3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer1_B3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer1_B3.create(IClock.Instance clock, params);
// Create an instance-object
Timer1_B3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer1_B3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:16 GMT


module ti.catalog.msp430.peripherals.timer.Timer2_A2

metaonly module ti.catalog.msp430.peripherals.timer.Timer2_A2
index URL

MSP430 Timer2_A2 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer2_A2.xdc
var Timer2_A2 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer2_A2');
module-wide constants & types
    values of type Timer2_A2.CAP_t//
        const Timer2_A2.CAP_OFF// Compare mode;
        const Timer2_A2.CAP// Capture mode;
    values of type Timer2_A2.CCIE_t//
        const Timer2_A2.CCIE_OFF;
        const Timer2_A2.CCIE;
    values of type Timer2_A2.CCIFG_t//
        const Timer2_A2.CCIFG_OFF;
        const Timer2_A2.CCIFG;
    values of type Timer2_A2.CCIS_t//
        const Timer2_A2.CCIS_0// CCIxA;
        const Timer2_A2.CCIS_1// CCIxB;
        const Timer2_A2.CCIS_2// GND;
        const Timer2_A2.CCIS_3// Vcc;
    values of type Timer2_A2.CCI_t//
        const Timer2_A2.CCI_OFF;
        const Timer2_A2.CCI;
    values of type Timer2_A2.CM_t//
        const Timer2_A2.CM_0// No Capture;
        const Timer2_A2.CM_1// Rising Edge;
        const Timer2_A2.CM_2// Falling Edge;
        const Timer2_A2.CM_3// Both Edges;
    values of type Timer2_A2.COV_t//
        const Timer2_A2.COV_OFF;
        const Timer2_A2.COV;
    values of type Timer2_A2.ID_t//
        const Timer2_A2.ID_0// Divider - /1;
        const Timer2_A2.ID_1// Divider - /2;
        const Timer2_A2.ID_2// Divider - /4;
        const Timer2_A2.ID_3// Divider - /8;
    values of type Timer2_A2.IVValues// TA3IV Definitions
        const Timer2_A2.TAIV_NONE// No Interrupt pending;
        const Timer2_A2.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer2_A2.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer2_A2.TAIV_6// Reserved;
        const Timer2_A2.TAIV_8// Reserved;
        const Timer2_A2.TAIV_TAIFG// TAIFG;
    values of type Timer2_A2.MC_t//
        const Timer2_A2.MC_0// Stop Mode;
        const Timer2_A2.MC_1// Up Mode;
        const Timer2_A2.MC_2// Continuous Mode;
        const Timer2_A2.MC_3// Up/Down Mode;
    values of type Timer2_A2.OUTMOD_t//
        const Timer2_A2.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer2_A2.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer2_A2.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer2_A2.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer2_A2.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer2_A2.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer2_A2.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer2_A2.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer2_A2.OUT_t//
        const Timer2_A2.OUT_OFF;
        const Timer2_A2.OUT;
    values of type Timer2_A2.SCCI_t//
        const Timer2_A2.SCCI_OFF// Latched capture signal (read);
        const Timer2_A2.SCCI// Latched capture signal (read);
    values of type Timer2_A2.SCS_t//
        const Timer2_A2.SCS_OFF// Asynchronous Capture;
        const Timer2_A2.SCS// Sychronous Capture;
    values of type Timer2_A2.TACLR_t//
        const Timer2_A2.TACLR_OFF;
        const Timer2_A2.TACLR;
    values of type Timer2_A2.TAIE_t//
        const Timer2_A2.TAIE_OFF;
        const Timer2_A2.TAIE;
    values of type Timer2_A2.TAIFG_t//
        const Timer2_A2.TAIFG_OFF;
        const Timer2_A2.TAIFG;
    values of type Timer2_A2.TASSEL_t//
        const Timer2_A2.TASSEL_0// TACLK;
        const Timer2_A2.TASSEL_1// ACLK;
        const Timer2_A2.TASSEL_2// SMCLK;
        const Timer2_A2.TASSEL_3// INCLK;
    var obj = new Timer2_A2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer2_A2.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer2_A2.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer2_A2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer2_A2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer2_A2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer2_A2.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA2CCR0// TA2CCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TA2CCR1// TA2CCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TA2CCTL0// TA2CCTL0, Capture/Compare Control Register 0 = Timer2_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA2CCTL1// TA2CCTL1, Capture/Compare Control Register 1 = Timer2_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA2CTL// TA2CTL, Timer2_A2 Control Register = Timer2_A2.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer2_A2.ForceSetDefaultRegister_t[] [
            {
                register: "TA2CTL",
                regForceSet: false
            },
            {
                register: "TA2CCTL0",
                regForceSet: false
            },
            {
                register: "TA2CCTL1",
                regForceSet: false
            },
            {
                register: "TA2CCR0",
                regForceSet: false
            },
            {
                register: "TA2CCR1",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer2_A2.regIntVect_t[3] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer2_A2.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer2_A2.CAP_t
index URL
Configuration settings
values of type Timer2_A2.CAP_t
    const Timer2_A2.CAP_OFF;
    // Compare mode
    const Timer2_A2.CAP;
    // Capture mode
enum Timer2_A2.CCIE_t
index URL
Configuration settings
values of type Timer2_A2.CCIE_t
    const Timer2_A2.CCIE_OFF;
    const Timer2_A2.CCIE;
enum Timer2_A2.CCIFG_t
index URL
Configuration settings
values of type Timer2_A2.CCIFG_t
    const Timer2_A2.CCIFG_OFF;
    const Timer2_A2.CCIFG;
enum Timer2_A2.CCIS_t
index URL
Configuration settings
values of type Timer2_A2.CCIS_t
    const Timer2_A2.CCIS_0;
    // CCIxA
    const Timer2_A2.CCIS_1;
    // CCIxB
    const Timer2_A2.CCIS_2;
    // GND
    const Timer2_A2.CCIS_3;
    // Vcc
enum Timer2_A2.CCI_t
index URL
Configuration settings
values of type Timer2_A2.CCI_t
    const Timer2_A2.CCI_OFF;
    const Timer2_A2.CCI;
enum Timer2_A2.CM_t
index URL
Configuration settings
values of type Timer2_A2.CM_t
    const Timer2_A2.CM_0;
    // No Capture
    const Timer2_A2.CM_1;
    // Rising Edge
    const Timer2_A2.CM_2;
    // Falling Edge
    const Timer2_A2.CM_3;
    // Both Edges
enum Timer2_A2.COV_t
index URL
Configuration settings
values of type Timer2_A2.COV_t
    const Timer2_A2.COV_OFF;
    const Timer2_A2.COV;
enum Timer2_A2.ID_t
index URL
Configuration settings
values of type Timer2_A2.ID_t
    const Timer2_A2.ID_0;
    // Divider - /1
    const Timer2_A2.ID_1;
    // Divider - /2
    const Timer2_A2.ID_2;
    // Divider - /4
    const Timer2_A2.ID_3;
    // Divider - /8
enum Timer2_A2.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer2_A2.IVValues
    const Timer2_A2.TAIV_NONE;
    // No Interrupt pending
    const Timer2_A2.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer2_A2.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer2_A2.TAIV_6;
    // Reserved
    const Timer2_A2.TAIV_8;
    // Reserved
    const Timer2_A2.TAIV_TAIFG;
    // TAIFG
enum Timer2_A2.MC_t
index URL
Configuration settings
values of type Timer2_A2.MC_t
    const Timer2_A2.MC_0;
    // Stop Mode
    const Timer2_A2.MC_1;
    // Up Mode
    const Timer2_A2.MC_2;
    // Continuous Mode
    const Timer2_A2.MC_3;
    // Up/Down Mode
enum Timer2_A2.OUTMOD_t
index URL
Configuration settings
values of type Timer2_A2.OUTMOD_t
    const Timer2_A2.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer2_A2.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer2_A2.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer2_A2.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer2_A2.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer2_A2.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer2_A2.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer2_A2.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer2_A2.OUT_t
index URL
Configuration settings
values of type Timer2_A2.OUT_t
    const Timer2_A2.OUT_OFF;
    const Timer2_A2.OUT;
enum Timer2_A2.SCCI_t
index URL
Configuration settings
values of type Timer2_A2.SCCI_t
    const Timer2_A2.SCCI_OFF;
    // Latched capture signal (read)
    const Timer2_A2.SCCI;
    // Latched capture signal (read)
enum Timer2_A2.SCS_t
index URL
Configuration settings
values of type Timer2_A2.SCS_t
    const Timer2_A2.SCS_OFF;
    // Asynchronous Capture
    const Timer2_A2.SCS;
    // Sychronous Capture
enum Timer2_A2.TACLR_t
index URL
Configuration settings
values of type Timer2_A2.TACLR_t
    const Timer2_A2.TACLR_OFF;
    const Timer2_A2.TACLR;
enum Timer2_A2.TAIE_t
index URL
Configuration settings
values of type Timer2_A2.TAIE_t
    const Timer2_A2.TAIE_OFF;
    const Timer2_A2.TAIE;
enum Timer2_A2.TAIFG_t
index URL
Configuration settings
values of type Timer2_A2.TAIFG_t
    const Timer2_A2.TAIFG_OFF;
    const Timer2_A2.TAIFG;
enum Timer2_A2.TASSEL_t
index URL
Configuration settings
values of type Timer2_A2.TASSEL_t
    const Timer2_A2.TASSEL_0;
    // TACLK
    const Timer2_A2.TASSEL_1;
    // ACLK
    const Timer2_A2.TASSEL_2;
    // SMCLK
    const Timer2_A2.TASSEL_3;
    // INCLK
struct Timer2_A2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer2_A2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer2_A2.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer2_A2.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer2_A2.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer2_A2.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer2_A2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer2_A2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer2_A2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer2_A2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer2_A2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer2_A2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer2_A2.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA2CCR0 = Bits16 0;
    // TA2CCR0, Timer_A Capture/Compare Register 0
    params.TA2CCR1 = Bits16 0;
    // TA2CCR1, Timer_A Capture/Compare Register 1
    params.TA2CCTL0 = Timer2_A2.TACCTLx_t {
    // TA2CCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA2CCTL1 = Timer2_A2.TACCTLx_t {
    // TA2CCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA2CTL = Timer2_A2.TACTL_t {
    // TA2CTL, Timer2_A2 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer2_A2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA2CTL",
            regForceSet: false
        },
        {
            register: "TA2CCTL0",
            regForceSet: false
        },
        {
            register: "TA2CCTL1",
            regForceSet: false
        },
        {
            register: "TA2CCR0",
            regForceSet: false
        },
        {
            register: "TA2CCR1",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer2_A2.regIntVect_t[3] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer2_A2.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer2_A2.Params;
...
params.INCLK = Float 0;
config Timer2_A2.Params.TA2CCR0 // instance
index URL

TA2CCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer2_A2.Params;
...
params.TA2CCR0 = Bits16 0;
config Timer2_A2.Params.TA2CCR1 // instance
index URL

TA2CCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer2_A2.Params;
...
params.TA2CCR1 = Bits16 0;
config Timer2_A2.Params.TA2CCTL0 // instance
index URL

TA2CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer2_A2.Params;
...
params.TA2CCTL0 = Timer2_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer2_A2.Params.TA2CCTL1 // instance
index URL

TA2CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer2_A2.Params;
...
params.TA2CCTL1 = Timer2_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer2_A2.Params.TA2CTL // instance
index URL

TA2CTL, Timer2_A2 Control Register

Configuration settings
var params = new Timer2_A2.Params;
...
params.TA2CTL = Timer2_A2.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer2_A2.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer2_A2.Params;
...
params.TACLK = Float 0;
config Timer2_A2.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer2_A2.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer2_A2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer2_A2.Params;
...
const params.forceSetDefaultRegister = Timer2_A2.ForceSetDefaultRegister_t[] [
    {
        register: "TA2CTL",
        regForceSet: false
    },
    {
        register: "TA2CCTL0",
        regForceSet: false
    },
    {
        register: "TA2CCTL1",
        regForceSet: false
    },
    {
        register: "TA2CCR0",
        regForceSet: false
    },
    {
        register: "TA2CCR1",
        regForceSet: false
    }
];
config Timer2_A2.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer2_A2.Params;
...
params.intNum = UInt undefined;
config Timer2_A2.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer2_A2.Params;
...
params.interruptSource = Timer2_A2.regIntVect_t[3] undefined;
config Timer2_A2.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer2_A2.Params;
...
params.isInternal = Bool false;
config Timer2_A2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer2_A2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer2_A2.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer2_A2.Params;
...
params.numberOfTimers = UChar undefined;
config Timer2_A2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer2_A2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer2_A2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer2_A2.create(IClock.Instance clock, params);
// Create an instance-object
Timer2_A2.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer2_A2.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:16 GMT


module ti.catalog.msp430.peripherals.timer.Timer2_A3

metaonly module ti.catalog.msp430.peripherals.timer.Timer2_A3
index URL

MSP430 Timer2_A3 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer2_A3.xdc
var Timer2_A3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer2_A3');
module-wide constants & types
    values of type Timer2_A3.CAP_t//
        const Timer2_A3.CAP_OFF// Compare mode;
        const Timer2_A3.CAP// Capture mode;
    values of type Timer2_A3.CCIE_t//
        const Timer2_A3.CCIE_OFF;
        const Timer2_A3.CCIE;
    values of type Timer2_A3.CCIFG_t//
        const Timer2_A3.CCIFG_OFF;
        const Timer2_A3.CCIFG;
    values of type Timer2_A3.CCIS_t//
        const Timer2_A3.CCIS_0// CCIxA;
        const Timer2_A3.CCIS_1// CCIxB;
        const Timer2_A3.CCIS_2// GND;
        const Timer2_A3.CCIS_3// Vcc;
    values of type Timer2_A3.CCI_t//
        const Timer2_A3.CCI_OFF;
        const Timer2_A3.CCI;
    values of type Timer2_A3.CM_t//
        const Timer2_A3.CM_0// No Capture;
        const Timer2_A3.CM_1// Rising Edge;
        const Timer2_A3.CM_2// Falling Edge;
        const Timer2_A3.CM_3// Both Edges;
    values of type Timer2_A3.COV_t//
        const Timer2_A3.COV_OFF;
        const Timer2_A3.COV;
    values of type Timer2_A3.ID_t//
        const Timer2_A3.ID_0// Divider - /1;
        const Timer2_A3.ID_1// Divider - /2;
        const Timer2_A3.ID_2// Divider - /4;
        const Timer2_A3.ID_3// Divider - /8;
    values of type Timer2_A3.IVValues// TA3IV Definitions
        const Timer2_A3.TAIV_NONE// No Interrupt pending;
        const Timer2_A3.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer2_A3.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer2_A3.TAIV_6// Reserved;
        const Timer2_A3.TAIV_8// Reserved;
        const Timer2_A3.TAIV_TAIFG// TAIFG;
    values of type Timer2_A3.MC_t//
        const Timer2_A3.MC_0// Stop Mode;
        const Timer2_A3.MC_1// Up Mode;
        const Timer2_A3.MC_2// Continuous Mode;
        const Timer2_A3.MC_3// Up/Down Mode;
    values of type Timer2_A3.OUTMOD_t//
        const Timer2_A3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer2_A3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer2_A3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer2_A3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer2_A3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer2_A3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer2_A3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer2_A3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer2_A3.OUT_t//
        const Timer2_A3.OUT_OFF;
        const Timer2_A3.OUT;
    values of type Timer2_A3.SCCI_t//
        const Timer2_A3.SCCI_OFF// Latched capture signal (read);
        const Timer2_A3.SCCI// Latched capture signal (read);
    values of type Timer2_A3.SCS_t//
        const Timer2_A3.SCS_OFF// Asynchronous Capture;
        const Timer2_A3.SCS// Sychronous Capture;
    values of type Timer2_A3.TACLR_t//
        const Timer2_A3.TACLR_OFF;
        const Timer2_A3.TACLR;
    values of type Timer2_A3.TAIE_t//
        const Timer2_A3.TAIE_OFF;
        const Timer2_A3.TAIE;
    values of type Timer2_A3.TAIFG_t//
        const Timer2_A3.TAIFG_OFF;
        const Timer2_A3.TAIFG;
    values of type Timer2_A3.TASSEL_t//
        const Timer2_A3.TASSEL_0// TACLK;
        const Timer2_A3.TASSEL_1// ACLK;
        const Timer2_A3.TASSEL_2// SMCLK;
        const Timer2_A3.TASSEL_3// INCLK;
    var obj = new Timer2_A3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer2_A3.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer2_A3.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer2_A3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer2_A3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer2_A3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer2_A3.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA2CCR0// TA2CCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TA2CCR1// TA2CCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TA2CCR2// TA2CCR2, Timer_A Capture/Compare Register 2 = Bits16 0;
        params.TA2CCTL0// TA2CCTL0, Capture/Compare Control Register 0 = Timer2_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA2CCTL1// TA2CCTL1, Capture/Compare Control Register 1 = Timer2_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA2CCTL2// TA2CCTL2, Capture/Compare Control Register 2 = Timer2_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA2CTL// TA2CTL, Timer_A3 Control Register = Timer2_A3.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer2_A3.ForceSetDefaultRegister_t[] [
            {
                register: "TA2CTL",
                regForceSet: false
            },
            {
                register: "TA2CCTL0",
                regForceSet: false
            },
            {
                register: "TA2CCTL1",
                regForceSet: false
            },
            {
                register: "TA2CCTL2",
                regForceSet: false
            },
            {
                register: "TA2CCR0",
                regForceSet: false
            },
            {
                register: "TA2CCR1",
                regForceSet: false
            },
            {
                register: "TA2CCR2",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer2_A3.regIntVect_t[4] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer2_A3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer2_A3.CAP_t
index URL
Configuration settings
values of type Timer2_A3.CAP_t
    const Timer2_A3.CAP_OFF;
    // Compare mode
    const Timer2_A3.CAP;
    // Capture mode
enum Timer2_A3.CCIE_t
index URL
Configuration settings
values of type Timer2_A3.CCIE_t
    const Timer2_A3.CCIE_OFF;
    const Timer2_A3.CCIE;
enum Timer2_A3.CCIFG_t
index URL
Configuration settings
values of type Timer2_A3.CCIFG_t
    const Timer2_A3.CCIFG_OFF;
    const Timer2_A3.CCIFG;
enum Timer2_A3.CCIS_t
index URL
Configuration settings
values of type Timer2_A3.CCIS_t
    const Timer2_A3.CCIS_0;
    // CCIxA
    const Timer2_A3.CCIS_1;
    // CCIxB
    const Timer2_A3.CCIS_2;
    // GND
    const Timer2_A3.CCIS_3;
    // Vcc
enum Timer2_A3.CCI_t
index URL
Configuration settings
values of type Timer2_A3.CCI_t
    const Timer2_A3.CCI_OFF;
    const Timer2_A3.CCI;
enum Timer2_A3.CM_t
index URL
Configuration settings
values of type Timer2_A3.CM_t
    const Timer2_A3.CM_0;
    // No Capture
    const Timer2_A3.CM_1;
    // Rising Edge
    const Timer2_A3.CM_2;
    // Falling Edge
    const Timer2_A3.CM_3;
    // Both Edges
enum Timer2_A3.COV_t
index URL
Configuration settings
values of type Timer2_A3.COV_t
    const Timer2_A3.COV_OFF;
    const Timer2_A3.COV;
enum Timer2_A3.ID_t
index URL
Configuration settings
values of type Timer2_A3.ID_t
    const Timer2_A3.ID_0;
    // Divider - /1
    const Timer2_A3.ID_1;
    // Divider - /2
    const Timer2_A3.ID_2;
    // Divider - /4
    const Timer2_A3.ID_3;
    // Divider - /8
enum Timer2_A3.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer2_A3.IVValues
    const Timer2_A3.TAIV_NONE;
    // No Interrupt pending
    const Timer2_A3.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer2_A3.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer2_A3.TAIV_6;
    // Reserved
    const Timer2_A3.TAIV_8;
    // Reserved
    const Timer2_A3.TAIV_TAIFG;
    // TAIFG
enum Timer2_A3.MC_t
index URL
Configuration settings
values of type Timer2_A3.MC_t
    const Timer2_A3.MC_0;
    // Stop Mode
    const Timer2_A3.MC_1;
    // Up Mode
    const Timer2_A3.MC_2;
    // Continuous Mode
    const Timer2_A3.MC_3;
    // Up/Down Mode
enum Timer2_A3.OUTMOD_t
index URL
Configuration settings
values of type Timer2_A3.OUTMOD_t
    const Timer2_A3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer2_A3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer2_A3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer2_A3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer2_A3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer2_A3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer2_A3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer2_A3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer2_A3.OUT_t
index URL
Configuration settings
values of type Timer2_A3.OUT_t
    const Timer2_A3.OUT_OFF;
    const Timer2_A3.OUT;
enum Timer2_A3.SCCI_t
index URL
Configuration settings
values of type Timer2_A3.SCCI_t
    const Timer2_A3.SCCI_OFF;
    // Latched capture signal (read)
    const Timer2_A3.SCCI;
    // Latched capture signal (read)
enum Timer2_A3.SCS_t
index URL
Configuration settings
values of type Timer2_A3.SCS_t
    const Timer2_A3.SCS_OFF;
    // Asynchronous Capture
    const Timer2_A3.SCS;
    // Sychronous Capture
enum Timer2_A3.TACLR_t
index URL
Configuration settings
values of type Timer2_A3.TACLR_t
    const Timer2_A3.TACLR_OFF;
    const Timer2_A3.TACLR;
enum Timer2_A3.TAIE_t
index URL
Configuration settings
values of type Timer2_A3.TAIE_t
    const Timer2_A3.TAIE_OFF;
    const Timer2_A3.TAIE;
enum Timer2_A3.TAIFG_t
index URL
Configuration settings
values of type Timer2_A3.TAIFG_t
    const Timer2_A3.TAIFG_OFF;
    const Timer2_A3.TAIFG;
enum Timer2_A3.TASSEL_t
index URL
Configuration settings
values of type Timer2_A3.TASSEL_t
    const Timer2_A3.TASSEL_0;
    // TACLK
    const Timer2_A3.TASSEL_1;
    // ACLK
    const Timer2_A3.TASSEL_2;
    // SMCLK
    const Timer2_A3.TASSEL_3;
    // INCLK
struct Timer2_A3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer2_A3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer2_A3.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer2_A3.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer2_A3.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer2_A3.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer2_A3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer2_A3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer2_A3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer2_A3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer2_A3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer2_A3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer2_A3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA2CCR0 = Bits16 0;
    // TA2CCR0, Timer_A Capture/Compare Register 0
    params.TA2CCR1 = Bits16 0;
    // TA2CCR1, Timer_A Capture/Compare Register 1
    params.TA2CCR2 = Bits16 0;
    // TA2CCR2, Timer_A Capture/Compare Register 2
    params.TA2CCTL0 = Timer2_A3.TACCTLx_t {
    // TA2CCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA2CCTL1 = Timer2_A3.TACCTLx_t {
    // TA2CCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA2CCTL2 = Timer2_A3.TACCTLx_t {
    // TA2CCTL2, Capture/Compare Control Register 2
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA2CTL = Timer2_A3.TACTL_t {
    // TA2CTL, Timer_A3 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer2_A3.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA2CTL",
            regForceSet: false
        },
        {
            register: "TA2CCTL0",
            regForceSet: false
        },
        {
            register: "TA2CCTL1",
            regForceSet: false
        },
        {
            register: "TA2CCTL2",
            regForceSet: false
        },
        {
            register: "TA2CCR0",
            regForceSet: false
        },
        {
            register: "TA2CCR1",
            regForceSet: false
        },
        {
            register: "TA2CCR2",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer2_A3.regIntVect_t[4] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer2_A3.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer2_A3.Params;
...
params.INCLK = Float 0;
config Timer2_A3.Params.TA2CCR0 // instance
index URL

TA2CCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer2_A3.Params;
...
params.TA2CCR0 = Bits16 0;
config Timer2_A3.Params.TA2CCR1 // instance
index URL

TA2CCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer2_A3.Params;
...
params.TA2CCR1 = Bits16 0;
config Timer2_A3.Params.TA2CCR2 // instance
index URL

TA2CCR2, Timer_A Capture/Compare Register 2

Configuration settings
var params = new Timer2_A3.Params;
...
params.TA2CCR2 = Bits16 0;
config Timer2_A3.Params.TA2CCTL0 // instance
index URL

TA2CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer2_A3.Params;
...
params.TA2CCTL0 = Timer2_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer2_A3.Params.TA2CCTL1 // instance
index URL

TA2CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer2_A3.Params;
...
params.TA2CCTL1 = Timer2_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer2_A3.Params.TA2CCTL2 // instance
index URL

TA2CCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer2_A3.Params;
...
params.TA2CCTL2 = Timer2_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer2_A3.Params.TA2CTL // instance
index URL

TA2CTL, Timer_A3 Control Register

Configuration settings
var params = new Timer2_A3.Params;
...
params.TA2CTL = Timer2_A3.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer2_A3.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer2_A3.Params;
...
params.TACLK = Float 0;
config Timer2_A3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer2_A3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer2_A3.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer2_A3.Params;
...
const params.forceSetDefaultRegister = Timer2_A3.ForceSetDefaultRegister_t[] [
    {
        register: "TA2CTL",
        regForceSet: false
    },
    {
        register: "TA2CCTL0",
        regForceSet: false
    },
    {
        register: "TA2CCTL1",
        regForceSet: false
    },
    {
        register: "TA2CCTL2",
        regForceSet: false
    },
    {
        register: "TA2CCR0",
        regForceSet: false
    },
    {
        register: "TA2CCR1",
        regForceSet: false
    },
    {
        register: "TA2CCR2",
        regForceSet: false
    }
];
config Timer2_A3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer2_A3.Params;
...
params.intNum = UInt undefined;
config Timer2_A3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer2_A3.Params;
...
params.interruptSource = Timer2_A3.regIntVect_t[4] undefined;
config Timer2_A3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer2_A3.Params;
...
params.isInternal = Bool false;
config Timer2_A3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer2_A3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer2_A3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer2_A3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer2_A3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer2_A3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer2_A3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer2_A3.create(IClock.Instance clock, params);
// Create an instance-object
Timer2_A3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer2_A3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:17 GMT


module ti.catalog.msp430.peripherals.timer.Timer2_B3

metaonly module ti.catalog.msp430.peripherals.timer.Timer2_B3
index URL

MSP430 Timer2_B3 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer2_B3.xdc
var Timer2_B3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer2_B3');
module-wide constants & types
    values of type Timer2_B3.CAP_t//
        const Timer2_B3.CAP_OFF;
        const Timer2_B3.CAP;
    values of type Timer2_B3.CCIE_t//
        const Timer2_B3.CCIE_OFF;
        const Timer2_B3.CCIE;
    values of type Timer2_B3.CCIFG_t//
        const Timer2_B3.CCIFG_OFF;
        const Timer2_B3.CCIFG;
    values of type Timer2_B3.CCIS_t//
        const Timer2_B3.CCIS_0// CCIxA;
        const Timer2_B3.CCIS_1// CCIxB;
        const Timer2_B3.CCIS_2// GND;
        const Timer2_B3.CCIS_3// Vcc;
    values of type Timer2_B3.CCI_t//
        const Timer2_B3.CCI_OFF;
        const Timer2_B3.CCI;
    values of type Timer2_B3.CLLD_t//
        const Timer2_B3.CLLD_0;
        const Timer2_B3.CLLD_1;
        const Timer2_B3.CLLD_2;
        const Timer2_B3.CLLD_3;
    values of type Timer2_B3.CM_t//
        const Timer2_B3.CM_0// No Capture;
        const Timer2_B3.CM_1// Rising Edge;
        const Timer2_B3.CM_2// Falling Edge;
        const Timer2_B3.CM_3// Both Edges;
    values of type Timer2_B3.CNTL_t//
        const Timer2_B3.CNTL_0// 16-bit, TBR(max) = 0FFFFh;
        const Timer2_B3.CNTL_1// 12-bit, TBR(max) = 0FFFh;
        const Timer2_B3.CNTL_2// 10-bit, TBR(max) = 03FFh;
        const Timer2_B3.CNTL_3// 8-bit, TBR(max) = 0FFh;
    values of type Timer2_B3.COV_t//
        const Timer2_B3.COV_OFF;
        const Timer2_B3.COV;
    values of type Timer2_B3.ID_t//
        const Timer2_B3.ID_0// Divider - /1;
        const Timer2_B3.ID_1// Divider - /2;
        const Timer2_B3.ID_2// Divider - /4;
        const Timer2_B3.ID_3// Divider - /8;
    values of type Timer2_B3.MC_t//
        const Timer2_B3.MC_0// Stop Mode;
        const Timer2_B3.MC_1// Up Mode;
        const Timer2_B3.MC_2// Continuous Mode;
        const Timer2_B3.MC_3// Up/Down Mode;
    values of type Timer2_B3.OUTMOD_t//
        const Timer2_B3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer2_B3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer2_B3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer2_B3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer2_B3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer2_B3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer2_B3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer2_B3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer2_B3.OUT_t//
        const Timer2_B3.OUT_OFF;
        const Timer2_B3.OUT;
    values of type Timer2_B3.SCCI_t//
        const Timer2_B3.SCCI_OFF;
        const Timer2_B3.SCCI;
    values of type Timer2_B3.SCS_t//
        const Timer2_B3.SCS_OFF;
        const Timer2_B3.SCS;
    values of type Timer2_B3.TBCLGRP_t//
        const Timer2_B3.TBCLGRP_0;
        const Timer2_B3.TBCLGRP_1;
        const Timer2_B3.TBCLGRP_2;
        const Timer2_B3.TBCLGRP_3;
    values of type Timer2_B3.TBCLR_t//
        const Timer2_B3.TBCLR_OFF;
        const Timer2_B3.TBCLR;
    values of type Timer2_B3.TBIE_t//
        const Timer2_B3.TBIE_OFF;
        const Timer2_B3.TBIE;
    values of type Timer2_B3.TBIFG_t//
        const Timer2_B3.TBIFG_OFF;
        const Timer2_B3.TBIFG;
    values of type Timer2_B3.TBSSEL_t//
        const Timer2_B3.TBSSEL_0// TBCLK;
        const Timer2_B3.TBSSEL_1// ACLK;
        const Timer2_B3.TBSSEL_2// SMCLK;
        const Timer2_B3.TBSSEL_3// INCLK;
    var obj = new Timer2_B3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer2_B3.TBCCTLx_t// ;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_B.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_B.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_B.SCS_t ...
        obj.CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx = ITimer_B.CLLD_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_B.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_B.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_B.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_B.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_B.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_B.CCIFG_t ...
    var obj = new Timer2_B3.TBCTL_t// Timer_B Control Register;
        obj.TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update) = ITimer_B.TBCLGRP_t ...
        obj.CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh = ITimer_B.CNTL_t ...
        obj.TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK = ITimer_B.TBSSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_B.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h = ITimer_B.MC_t ...
        obj.TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero = ITimer_B.TBCLR_t ...
        obj.TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.TBIE_t ...
        obj.TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending = ITimer_B.TBIFG_t ...
    var obj = new Timer2_B3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer2_B3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer2_B3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer2_B3.Params// Instance config-params object;
        params.INCLK// Timer_B INCLK = Float 0;
        params.TBCLK// Timer_B TBCLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer2_B3.regIntVect_t[8] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer2_B3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer2_B3.CAP_t
index URL
Configuration settings
values of type Timer2_B3.CAP_t
    const Timer2_B3.CAP_OFF;
    const Timer2_B3.CAP;
enum Timer2_B3.CCIE_t
index URL
Configuration settings
values of type Timer2_B3.CCIE_t
    const Timer2_B3.CCIE_OFF;
    const Timer2_B3.CCIE;
enum Timer2_B3.CCIFG_t
index URL
Configuration settings
values of type Timer2_B3.CCIFG_t
    const Timer2_B3.CCIFG_OFF;
    const Timer2_B3.CCIFG;
enum Timer2_B3.CCIS_t
index URL
Configuration settings
values of type Timer2_B3.CCIS_t
    const Timer2_B3.CCIS_0;
    // CCIxA
    const Timer2_B3.CCIS_1;
    // CCIxB
    const Timer2_B3.CCIS_2;
    // GND
    const Timer2_B3.CCIS_3;
    // Vcc
enum Timer2_B3.CCI_t
index URL
Configuration settings
values of type Timer2_B3.CCI_t
    const Timer2_B3.CCI_OFF;
    const Timer2_B3.CCI;
enum Timer2_B3.CLLD_t
index URL
Configuration settings
values of type Timer2_B3.CLLD_t
    const Timer2_B3.CLLD_0;
    const Timer2_B3.CLLD_1;
    const Timer2_B3.CLLD_2;
    const Timer2_B3.CLLD_3;
enum Timer2_B3.CM_t
index URL
Configuration settings
values of type Timer2_B3.CM_t
    const Timer2_B3.CM_0;
    // No Capture
    const Timer2_B3.CM_1;
    // Rising Edge
    const Timer2_B3.CM_2;
    // Falling Edge
    const Timer2_B3.CM_3;
    // Both Edges
enum Timer2_B3.CNTL_t
index URL
Configuration settings
values of type Timer2_B3.CNTL_t
    const Timer2_B3.CNTL_0;
    // 16-bit, TBR(max) = 0FFFFh
    const Timer2_B3.CNTL_1;
    // 12-bit, TBR(max) = 0FFFh
    const Timer2_B3.CNTL_2;
    // 10-bit, TBR(max) = 03FFh
    const Timer2_B3.CNTL_3;
    // 8-bit, TBR(max) = 0FFh
enum Timer2_B3.COV_t
index URL
Configuration settings
values of type Timer2_B3.COV_t
    const Timer2_B3.COV_OFF;
    const Timer2_B3.COV;
enum Timer2_B3.ID_t
index URL
Configuration settings
values of type Timer2_B3.ID_t
    const Timer2_B3.ID_0;
    // Divider - /1
    const Timer2_B3.ID_1;
    // Divider - /2
    const Timer2_B3.ID_2;
    // Divider - /4
    const Timer2_B3.ID_3;
    // Divider - /8
enum Timer2_B3.MC_t
index URL
Configuration settings
values of type Timer2_B3.MC_t
    const Timer2_B3.MC_0;
    // Stop Mode
    const Timer2_B3.MC_1;
    // Up Mode
    const Timer2_B3.MC_2;
    // Continuous Mode
    const Timer2_B3.MC_3;
    // Up/Down Mode
enum Timer2_B3.OUTMOD_t
index URL
Configuration settings
values of type Timer2_B3.OUTMOD_t
    const Timer2_B3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer2_B3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer2_B3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer2_B3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer2_B3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer2_B3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer2_B3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer2_B3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer2_B3.OUT_t
index URL
Configuration settings
values of type Timer2_B3.OUT_t
    const Timer2_B3.OUT_OFF;
    const Timer2_B3.OUT;
enum Timer2_B3.SCCI_t
index URL
Configuration settings
values of type Timer2_B3.SCCI_t
    const Timer2_B3.SCCI_OFF;
    const Timer2_B3.SCCI;
enum Timer2_B3.SCS_t
index URL
Configuration settings
values of type Timer2_B3.SCS_t
    const Timer2_B3.SCS_OFF;
    const Timer2_B3.SCS;
enum Timer2_B3.TBCLGRP_t
index URL
Configuration settings
values of type Timer2_B3.TBCLGRP_t
    const Timer2_B3.TBCLGRP_0;
    const Timer2_B3.TBCLGRP_1;
    const Timer2_B3.TBCLGRP_2;
    const Timer2_B3.TBCLGRP_3;
enum Timer2_B3.TBCLR_t
index URL
Configuration settings
values of type Timer2_B3.TBCLR_t
    const Timer2_B3.TBCLR_OFF;
    const Timer2_B3.TBCLR;
enum Timer2_B3.TBIE_t
index URL
Configuration settings
values of type Timer2_B3.TBIE_t
    const Timer2_B3.TBIE_OFF;
    const Timer2_B3.TBIE;
enum Timer2_B3.TBIFG_t
index URL
Configuration settings
values of type Timer2_B3.TBIFG_t
    const Timer2_B3.TBIFG_OFF;
    const Timer2_B3.TBIFG;
enum Timer2_B3.TBSSEL_t
index URL
Configuration settings
values of type Timer2_B3.TBSSEL_t
    const Timer2_B3.TBSSEL_0;
    // TBCLK
    const Timer2_B3.TBSSEL_1;
    // ACLK
    const Timer2_B3.TBSSEL_2;
    // SMCLK
    const Timer2_B3.TBSSEL_3;
    // INCLK
struct Timer2_B3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer2_B3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer2_B3.TBCCTLx_t
index URL
Configuration settings
var obj = new Timer2_B3.TBCCTLx_t;
    obj.CM = ITimer_B.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_B.CCIS_t ...
    // Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_B.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.CLLD = ITimer_B.CLLD_t ...
    // Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx
    obj.CAP = ITimer_B.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_B.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_B.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_B.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_B.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_B.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_B.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
struct Timer2_B3.TBCTL_t
index URL

Timer_B Control Register

Configuration settings
var obj = new Timer2_B3.TBCTL_t;
    obj.TBCLGRP = ITimer_B.TBCLGRP_t ...
    // TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)
    obj.CNTL = ITimer_B.CNTL_t ...
    // Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh
    obj.TBSSEL = ITimer_B.TBSSEL_t ...
    // Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK
    obj.ID = ITimer_B.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_B.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h
    obj.TBCLR = ITimer_B.TBCLR_t ...
    // Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero
    obj.TBIE = ITimer_B.TBIE_t ...
    // Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TBIFG = ITimer_B.TBIFG_t ...
    // Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending
SEE
TBCTL_t
struct Timer2_B3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer2_B3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer2_B3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer2_B3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer2_B3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer2_B3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer2_B3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_B INCLK
    params.TBCLK = Float 0;
    // Timer_B TBCLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer2_B3.regIntVect_t[8] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer2_B3.Params.INCLK // instance
index URL

Timer_B INCLK

Configuration settings
var params = new Timer2_B3.Params;
...
params.INCLK = Float 0;
config Timer2_B3.Params.TBCLK // instance
index URL

Timer_B TBCLK

Configuration settings
var params = new Timer2_B3.Params;
...
params.TBCLK = Float 0;
config Timer2_B3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer2_B3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer2_B3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer2_B3.Params;
...
params.intNum = UInt undefined;
config Timer2_B3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer2_B3.Params;
...
params.interruptSource = Timer2_B3.regIntVect_t[8] undefined;
config Timer2_B3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer2_B3.Params;
...
params.isInternal = Bool false;
config Timer2_B3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer2_B3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer2_B3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer2_B3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer2_B3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer2_B3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer2_B3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer2_B3.create(IClock.Instance clock, params);
// Create an instance-object
Timer2_B3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer2_B3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:17 GMT


module ti.catalog.msp430.peripherals.timer.Timer3_A2

metaonly module ti.catalog.msp430.peripherals.timer.Timer3_A2
index URL

MSP430 Timer3_A2 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer3_A2.xdc
var Timer3_A2 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer3_A2');
module-wide constants & types
    values of type Timer3_A2.CAP_t//
        const Timer3_A2.CAP_OFF// Compare mode;
        const Timer3_A2.CAP// Capture mode;
    values of type Timer3_A2.CCIE_t//
        const Timer3_A2.CCIE_OFF;
        const Timer3_A2.CCIE;
    values of type Timer3_A2.CCIFG_t//
        const Timer3_A2.CCIFG_OFF;
        const Timer3_A2.CCIFG;
    values of type Timer3_A2.CCIS_t//
        const Timer3_A2.CCIS_0// CCIxA;
        const Timer3_A2.CCIS_1// CCIxB;
        const Timer3_A2.CCIS_2// GND;
        const Timer3_A2.CCIS_3// Vcc;
    values of type Timer3_A2.CCI_t//
        const Timer3_A2.CCI_OFF;
        const Timer3_A2.CCI;
    values of type Timer3_A2.CM_t//
        const Timer3_A2.CM_0// No Capture;
        const Timer3_A2.CM_1// Rising Edge;
        const Timer3_A2.CM_2// Falling Edge;
        const Timer3_A2.CM_3// Both Edges;
    values of type Timer3_A2.COV_t//
        const Timer3_A2.COV_OFF;
        const Timer3_A2.COV;
    values of type Timer3_A2.ID_t//
        const Timer3_A2.ID_0// Divider - /1;
        const Timer3_A2.ID_1// Divider - /2;
        const Timer3_A2.ID_2// Divider - /4;
        const Timer3_A2.ID_3// Divider - /8;
    values of type Timer3_A2.IVValues// TA3IV Definitions
        const Timer3_A2.TAIV_NONE// No Interrupt pending;
        const Timer3_A2.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer3_A2.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer3_A2.TAIV_6// Reserved;
        const Timer3_A2.TAIV_8// Reserved;
        const Timer3_A2.TAIV_TAIFG// TAIFG;
    values of type Timer3_A2.MC_t//
        const Timer3_A2.MC_0// Stop Mode;
        const Timer3_A2.MC_1// Up Mode;
        const Timer3_A2.MC_2// Continuous Mode;
        const Timer3_A2.MC_3// Up/Down Mode;
    values of type Timer3_A2.OUTMOD_t//
        const Timer3_A2.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer3_A2.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer3_A2.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer3_A2.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer3_A2.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer3_A2.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer3_A2.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer3_A2.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer3_A2.OUT_t//
        const Timer3_A2.OUT_OFF;
        const Timer3_A2.OUT;
    values of type Timer3_A2.SCCI_t//
        const Timer3_A2.SCCI_OFF// Latched capture signal (read);
        const Timer3_A2.SCCI// Latched capture signal (read);
    values of type Timer3_A2.SCS_t//
        const Timer3_A2.SCS_OFF// Asynchronous Capture;
        const Timer3_A2.SCS// Sychronous Capture;
    values of type Timer3_A2.TACLR_t//
        const Timer3_A2.TACLR_OFF;
        const Timer3_A2.TACLR;
    values of type Timer3_A2.TAIE_t//
        const Timer3_A2.TAIE_OFF;
        const Timer3_A2.TAIE;
    values of type Timer3_A2.TAIFG_t//
        const Timer3_A2.TAIFG_OFF;
        const Timer3_A2.TAIFG;
    values of type Timer3_A2.TASSEL_t//
        const Timer3_A2.TASSEL_0// TACLK;
        const Timer3_A2.TASSEL_1// ACLK;
        const Timer3_A2.TASSEL_2// SMCLK;
        const Timer3_A2.TASSEL_3// INCLK;
    var obj = new Timer3_A2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer3_A2.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer3_A2.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer3_A2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer3_A2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer3_A2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer3_A2.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA3CCR0// TA3CCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TA3CCR1// TA3CCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TA3CCTL0// TA3CCTL0, Capture/Compare Control Register 0 = Timer3_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA3CCTL1// TA3CCTL1, Capture/Compare Control Register 1 = Timer3_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA3CTL// TA3CTL, Timer3_A2 Control Register = Timer3_A2.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer3_A2.ForceSetDefaultRegister_t[] [
            {
                register: "TA3CTL",
                regForceSet: false
            },
            {
                register: "TA3CCTL0",
                regForceSet: false
            },
            {
                register: "TA3CCTL1",
                regForceSet: false
            },
            {
                register: "TA3CCR0",
                regForceSet: false
            },
            {
                register: "TA3CCR1",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer3_A2.regIntVect_t[3] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer3_A2.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer3_A2.CAP_t
index URL
Configuration settings
values of type Timer3_A2.CAP_t
    const Timer3_A2.CAP_OFF;
    // Compare mode
    const Timer3_A2.CAP;
    // Capture mode
enum Timer3_A2.CCIE_t
index URL
Configuration settings
values of type Timer3_A2.CCIE_t
    const Timer3_A2.CCIE_OFF;
    const Timer3_A2.CCIE;
enum Timer3_A2.CCIFG_t
index URL
Configuration settings
values of type Timer3_A2.CCIFG_t
    const Timer3_A2.CCIFG_OFF;
    const Timer3_A2.CCIFG;
enum Timer3_A2.CCIS_t
index URL
Configuration settings
values of type Timer3_A2.CCIS_t
    const Timer3_A2.CCIS_0;
    // CCIxA
    const Timer3_A2.CCIS_1;
    // CCIxB
    const Timer3_A2.CCIS_2;
    // GND
    const Timer3_A2.CCIS_3;
    // Vcc
enum Timer3_A2.CCI_t
index URL
Configuration settings
values of type Timer3_A2.CCI_t
    const Timer3_A2.CCI_OFF;
    const Timer3_A2.CCI;
enum Timer3_A2.CM_t
index URL
Configuration settings
values of type Timer3_A2.CM_t
    const Timer3_A2.CM_0;
    // No Capture
    const Timer3_A2.CM_1;
    // Rising Edge
    const Timer3_A2.CM_2;
    // Falling Edge
    const Timer3_A2.CM_3;
    // Both Edges
enum Timer3_A2.COV_t
index URL
Configuration settings
values of type Timer3_A2.COV_t
    const Timer3_A2.COV_OFF;
    const Timer3_A2.COV;
enum Timer3_A2.ID_t
index URL
Configuration settings
values of type Timer3_A2.ID_t
    const Timer3_A2.ID_0;
    // Divider - /1
    const Timer3_A2.ID_1;
    // Divider - /2
    const Timer3_A2.ID_2;
    // Divider - /4
    const Timer3_A2.ID_3;
    // Divider - /8
enum Timer3_A2.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer3_A2.IVValues
    const Timer3_A2.TAIV_NONE;
    // No Interrupt pending
    const Timer3_A2.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer3_A2.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer3_A2.TAIV_6;
    // Reserved
    const Timer3_A2.TAIV_8;
    // Reserved
    const Timer3_A2.TAIV_TAIFG;
    // TAIFG
enum Timer3_A2.MC_t
index URL
Configuration settings
values of type Timer3_A2.MC_t
    const Timer3_A2.MC_0;
    // Stop Mode
    const Timer3_A2.MC_1;
    // Up Mode
    const Timer3_A2.MC_2;
    // Continuous Mode
    const Timer3_A2.MC_3;
    // Up/Down Mode
enum Timer3_A2.OUTMOD_t
index URL
Configuration settings
values of type Timer3_A2.OUTMOD_t
    const Timer3_A2.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer3_A2.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer3_A2.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer3_A2.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer3_A2.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer3_A2.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer3_A2.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer3_A2.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer3_A2.OUT_t
index URL
Configuration settings
values of type Timer3_A2.OUT_t
    const Timer3_A2.OUT_OFF;
    const Timer3_A2.OUT;
enum Timer3_A2.SCCI_t
index URL
Configuration settings
values of type Timer3_A2.SCCI_t
    const Timer3_A2.SCCI_OFF;
    // Latched capture signal (read)
    const Timer3_A2.SCCI;
    // Latched capture signal (read)
enum Timer3_A2.SCS_t
index URL
Configuration settings
values of type Timer3_A2.SCS_t
    const Timer3_A2.SCS_OFF;
    // Asynchronous Capture
    const Timer3_A2.SCS;
    // Sychronous Capture
enum Timer3_A2.TACLR_t
index URL
Configuration settings
values of type Timer3_A2.TACLR_t
    const Timer3_A2.TACLR_OFF;
    const Timer3_A2.TACLR;
enum Timer3_A2.TAIE_t
index URL
Configuration settings
values of type Timer3_A2.TAIE_t
    const Timer3_A2.TAIE_OFF;
    const Timer3_A2.TAIE;
enum Timer3_A2.TAIFG_t
index URL
Configuration settings
values of type Timer3_A2.TAIFG_t
    const Timer3_A2.TAIFG_OFF;
    const Timer3_A2.TAIFG;
enum Timer3_A2.TASSEL_t
index URL
Configuration settings
values of type Timer3_A2.TASSEL_t
    const Timer3_A2.TASSEL_0;
    // TACLK
    const Timer3_A2.TASSEL_1;
    // ACLK
    const Timer3_A2.TASSEL_2;
    // SMCLK
    const Timer3_A2.TASSEL_3;
    // INCLK
struct Timer3_A2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer3_A2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer3_A2.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer3_A2.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer3_A2.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer3_A2.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer3_A2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer3_A2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer3_A2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer3_A2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer3_A2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer3_A2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer3_A2.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA3CCR0 = Bits16 0;
    // TA3CCR0, Timer_A Capture/Compare Register 0
    params.TA3CCR1 = Bits16 0;
    // TA3CCR1, Timer_A Capture/Compare Register 1
    params.TA3CCTL0 = Timer3_A2.TACCTLx_t {
    // TA3CCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA3CCTL1 = Timer3_A2.TACCTLx_t {
    // TA3CCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA3CTL = Timer3_A2.TACTL_t {
    // TA3CTL, Timer3_A2 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer3_A2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA3CTL",
            regForceSet: false
        },
        {
            register: "TA3CCTL0",
            regForceSet: false
        },
        {
            register: "TA3CCTL1",
            regForceSet: false
        },
        {
            register: "TA3CCR0",
            regForceSet: false
        },
        {
            register: "TA3CCR1",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer3_A2.regIntVect_t[3] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer3_A2.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer3_A2.Params;
...
params.INCLK = Float 0;
config Timer3_A2.Params.TA3CCR0 // instance
index URL

TA3CCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer3_A2.Params;
...
params.TA3CCR0 = Bits16 0;
config Timer3_A2.Params.TA3CCR1 // instance
index URL

TA3CCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer3_A2.Params;
...
params.TA3CCR1 = Bits16 0;
config Timer3_A2.Params.TA3CCTL0 // instance
index URL

TA3CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer3_A2.Params;
...
params.TA3CCTL0 = Timer3_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer3_A2.Params.TA3CCTL1 // instance
index URL

TA3CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer3_A2.Params;
...
params.TA3CCTL1 = Timer3_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer3_A2.Params.TA3CTL // instance
index URL

TA3CTL, Timer3_A2 Control Register

Configuration settings
var params = new Timer3_A2.Params;
...
params.TA3CTL = Timer3_A2.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer3_A2.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer3_A2.Params;
...
params.TACLK = Float 0;
config Timer3_A2.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer3_A2.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer3_A2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer3_A2.Params;
...
const params.forceSetDefaultRegister = Timer3_A2.ForceSetDefaultRegister_t[] [
    {
        register: "TA3CTL",
        regForceSet: false
    },
    {
        register: "TA3CCTL0",
        regForceSet: false
    },
    {
        register: "TA3CCTL1",
        regForceSet: false
    },
    {
        register: "TA3CCR0",
        regForceSet: false
    },
    {
        register: "TA3CCR1",
        regForceSet: false
    }
];
config Timer3_A2.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer3_A2.Params;
...
params.intNum = UInt undefined;
config Timer3_A2.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer3_A2.Params;
...
params.interruptSource = Timer3_A2.regIntVect_t[3] undefined;
config Timer3_A2.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer3_A2.Params;
...
params.isInternal = Bool false;
config Timer3_A2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer3_A2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer3_A2.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer3_A2.Params;
...
params.numberOfTimers = UChar undefined;
config Timer3_A2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer3_A2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer3_A2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer3_A2.create(IClock.Instance clock, params);
// Create an instance-object
Timer3_A2.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer3_A2.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:17 GMT


module ti.catalog.msp430.peripherals.timer.Timer3_A5

metaonly module ti.catalog.msp430.peripherals.timer.Timer3_A5
index URL

MSP430 Timer3_A5 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer3_A5.xdc
var Timer3_A5 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer3_A5');
module-wide constants & types
    values of type Timer3_A5.CAP_t//
        const Timer3_A5.CAP_OFF// Compare mode;
        const Timer3_A5.CAP// Capture mode;
    values of type Timer3_A5.CCIE_t//
        const Timer3_A5.CCIE_OFF;
        const Timer3_A5.CCIE;
    values of type Timer3_A5.CCIFG_t//
        const Timer3_A5.CCIFG_OFF;
        const Timer3_A5.CCIFG;
    values of type Timer3_A5.CCIS_t//
        const Timer3_A5.CCIS_0// CCIxA;
        const Timer3_A5.CCIS_1// CCIxB;
        const Timer3_A5.CCIS_2// GND;
        const Timer3_A5.CCIS_3// Vcc;
    values of type Timer3_A5.CCI_t//
        const Timer3_A5.CCI_OFF;
        const Timer3_A5.CCI;
    values of type Timer3_A5.CM_t//
        const Timer3_A5.CM_0// No Capture;
        const Timer3_A5.CM_1// Rising Edge;
        const Timer3_A5.CM_2// Falling Edge;
        const Timer3_A5.CM_3// Both Edges;
    values of type Timer3_A5.COV_t//
        const Timer3_A5.COV_OFF;
        const Timer3_A5.COV;
    values of type Timer3_A5.ID_t//
        const Timer3_A5.ID_0// Divider - /1;
        const Timer3_A5.ID_1// Divider - /2;
        const Timer3_A5.ID_2// Divider - /4;
        const Timer3_A5.ID_3// Divider - /8;
    values of type Timer3_A5.IVValues// TA3IV Definitions
        const Timer3_A5.TAIV_NONE// No Interrupt pending;
        const Timer3_A5.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer3_A5.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer3_A5.TAIV_6// Reserved;
        const Timer3_A5.TAIV_8// Reserved;
        const Timer3_A5.TAIV_TAIFG// TAIFG;
    values of type Timer3_A5.MC_t//
        const Timer3_A5.MC_0// Stop Mode;
        const Timer3_A5.MC_1// Up Mode;
        const Timer3_A5.MC_2// Continuous Mode;
        const Timer3_A5.MC_3// Up/Down Mode;
    values of type Timer3_A5.OUTMOD_t//
        const Timer3_A5.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer3_A5.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer3_A5.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer3_A5.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer3_A5.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer3_A5.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer3_A5.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer3_A5.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer3_A5.OUT_t//
        const Timer3_A5.OUT_OFF;
        const Timer3_A5.OUT;
    values of type Timer3_A5.SCCI_t//
        const Timer3_A5.SCCI_OFF// Latched capture signal (read);
        const Timer3_A5.SCCI// Latched capture signal (read);
    values of type Timer3_A5.SCS_t//
        const Timer3_A5.SCS_OFF// Asynchronous Capture;
        const Timer3_A5.SCS// Sychronous Capture;
    values of type Timer3_A5.TACLR_t//
        const Timer3_A5.TACLR_OFF;
        const Timer3_A5.TACLR;
    values of type Timer3_A5.TAIE_t//
        const Timer3_A5.TAIE_OFF;
        const Timer3_A5.TAIE;
    values of type Timer3_A5.TAIFG_t//
        const Timer3_A5.TAIFG_OFF;
        const Timer3_A5.TAIFG;
    values of type Timer3_A5.TASSEL_t//
        const Timer3_A5.TASSEL_0// TACLK;
        const Timer3_A5.TASSEL_1// ACLK;
        const Timer3_A5.TASSEL_2// SMCLK;
        const Timer3_A5.TASSEL_3// INCLK;
    var obj = new Timer3_A5.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer3_A5.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer3_A5.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer3_A5.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer3_A5.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer3_A5.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer3_A5.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TA3CCR0// TA3CCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TA3CCR1// TA3CCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TA3CCR2// TA3CCR2, Timer_A Capture/Compare Register 2 = Bits16 0;
        params.TA3CCR3// TA3CCR3, Timer_A Capture/Compare Register 3 = Bits16 0;
        params.TA3CCR4// TA3CCR4, Timer_A Capture/Compare Register 4 = Bits16 0;
        params.TA3CCTL0// TA3CCTL0, Capture/Compare Control Register 0 = Timer3_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA3CCTL1// TA3CCTL1, Capture/Compare Control Register 1 = Timer3_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA3CCTL2// TA3CCTL2, Capture/Compare Control Register 2 = Timer3_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA3CCTL3// TA3CCTL3, Capture/Compare Control Register 3 = Timer3_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA3CCTL4// TA3CCTL4, Capture/Compare Control Register 4 = Timer3_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TA3CTL// TA3CTL, Timer3_A5 Control Register = Timer3_A5.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer3_A5.ForceSetDefaultRegister_t[] [
            {
                register: "TA3CTL",
                regForceSet: false
            },
            {
                register: "TA3CCTL0",
                regForceSet: false
            },
            {
                register: "TA3CCTL1",
                regForceSet: false
            },
            {
                register: "TA3CCR0",
                regForceSet: false
            },
            {
                register: "TA3CCR1",
                regForceSet: false
            },
            {
                register: "TA3CCR2",
                regForceSet: false
            },
            {
                register: "TA3CCR3",
                regForceSet: false
            },
            {
                register: "TA3CCR4",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer3_A5.regIntVect_t[6] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer3_A5.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer3_A5.CAP_t
index URL
Configuration settings
values of type Timer3_A5.CAP_t
    const Timer3_A5.CAP_OFF;
    // Compare mode
    const Timer3_A5.CAP;
    // Capture mode
enum Timer3_A5.CCIE_t
index URL
Configuration settings
values of type Timer3_A5.CCIE_t
    const Timer3_A5.CCIE_OFF;
    const Timer3_A5.CCIE;
enum Timer3_A5.CCIFG_t
index URL
Configuration settings
values of type Timer3_A5.CCIFG_t
    const Timer3_A5.CCIFG_OFF;
    const Timer3_A5.CCIFG;
enum Timer3_A5.CCIS_t
index URL
Configuration settings
values of type Timer3_A5.CCIS_t
    const Timer3_A5.CCIS_0;
    // CCIxA
    const Timer3_A5.CCIS_1;
    // CCIxB
    const Timer3_A5.CCIS_2;
    // GND
    const Timer3_A5.CCIS_3;
    // Vcc
enum Timer3_A5.CCI_t
index URL
Configuration settings
values of type Timer3_A5.CCI_t
    const Timer3_A5.CCI_OFF;
    const Timer3_A5.CCI;
enum Timer3_A5.CM_t
index URL
Configuration settings
values of type Timer3_A5.CM_t
    const Timer3_A5.CM_0;
    // No Capture
    const Timer3_A5.CM_1;
    // Rising Edge
    const Timer3_A5.CM_2;
    // Falling Edge
    const Timer3_A5.CM_3;
    // Both Edges
enum Timer3_A5.COV_t
index URL
Configuration settings
values of type Timer3_A5.COV_t
    const Timer3_A5.COV_OFF;
    const Timer3_A5.COV;
enum Timer3_A5.ID_t
index URL
Configuration settings
values of type Timer3_A5.ID_t
    const Timer3_A5.ID_0;
    // Divider - /1
    const Timer3_A5.ID_1;
    // Divider - /2
    const Timer3_A5.ID_2;
    // Divider - /4
    const Timer3_A5.ID_3;
    // Divider - /8
enum Timer3_A5.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer3_A5.IVValues
    const Timer3_A5.TAIV_NONE;
    // No Interrupt pending
    const Timer3_A5.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer3_A5.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer3_A5.TAIV_6;
    // Reserved
    const Timer3_A5.TAIV_8;
    // Reserved
    const Timer3_A5.TAIV_TAIFG;
    // TAIFG
enum Timer3_A5.MC_t
index URL
Configuration settings
values of type Timer3_A5.MC_t
    const Timer3_A5.MC_0;
    // Stop Mode
    const Timer3_A5.MC_1;
    // Up Mode
    const Timer3_A5.MC_2;
    // Continuous Mode
    const Timer3_A5.MC_3;
    // Up/Down Mode
enum Timer3_A5.OUTMOD_t
index URL
Configuration settings
values of type Timer3_A5.OUTMOD_t
    const Timer3_A5.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer3_A5.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer3_A5.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer3_A5.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer3_A5.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer3_A5.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer3_A5.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer3_A5.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer3_A5.OUT_t
index URL
Configuration settings
values of type Timer3_A5.OUT_t
    const Timer3_A5.OUT_OFF;
    const Timer3_A5.OUT;
enum Timer3_A5.SCCI_t
index URL
Configuration settings
values of type Timer3_A5.SCCI_t
    const Timer3_A5.SCCI_OFF;
    // Latched capture signal (read)
    const Timer3_A5.SCCI;
    // Latched capture signal (read)
enum Timer3_A5.SCS_t
index URL
Configuration settings
values of type Timer3_A5.SCS_t
    const Timer3_A5.SCS_OFF;
    // Asynchronous Capture
    const Timer3_A5.SCS;
    // Sychronous Capture
enum Timer3_A5.TACLR_t
index URL
Configuration settings
values of type Timer3_A5.TACLR_t
    const Timer3_A5.TACLR_OFF;
    const Timer3_A5.TACLR;
enum Timer3_A5.TAIE_t
index URL
Configuration settings
values of type Timer3_A5.TAIE_t
    const Timer3_A5.TAIE_OFF;
    const Timer3_A5.TAIE;
enum Timer3_A5.TAIFG_t
index URL
Configuration settings
values of type Timer3_A5.TAIFG_t
    const Timer3_A5.TAIFG_OFF;
    const Timer3_A5.TAIFG;
enum Timer3_A5.TASSEL_t
index URL
Configuration settings
values of type Timer3_A5.TASSEL_t
    const Timer3_A5.TASSEL_0;
    // TACLK
    const Timer3_A5.TASSEL_1;
    // ACLK
    const Timer3_A5.TASSEL_2;
    // SMCLK
    const Timer3_A5.TASSEL_3;
    // INCLK
struct Timer3_A5.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer3_A5.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer3_A5.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer3_A5.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer3_A5.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer3_A5.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer3_A5.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer3_A5.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer3_A5.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer3_A5.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer3_A5.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer3_A5.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer3_A5.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TA3CCR0 = Bits16 0;
    // TA3CCR0, Timer_A Capture/Compare Register 0
    params.TA3CCR1 = Bits16 0;
    // TA3CCR1, Timer_A Capture/Compare Register 1
    params.TA3CCR2 = Bits16 0;
    // TA3CCR2, Timer_A Capture/Compare Register 2
    params.TA3CCR3 = Bits16 0;
    // TA3CCR3, Timer_A Capture/Compare Register 3
    params.TA3CCR4 = Bits16 0;
    // TA3CCR4, Timer_A Capture/Compare Register 4
    params.TA3CCTL0 = Timer3_A5.TACCTLx_t {
    // TA3CCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA3CCTL1 = Timer3_A5.TACCTLx_t {
    // TA3CCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA3CCTL2 = Timer3_A5.TACCTLx_t {
    // TA3CCTL2, Capture/Compare Control Register 2
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA3CCTL3 = Timer3_A5.TACCTLx_t {
    // TA3CCTL3, Capture/Compare Control Register 3
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA3CCTL4 = Timer3_A5.TACCTLx_t {
    // TA3CCTL4, Capture/Compare Control Register 4
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TA3CTL = Timer3_A5.TACTL_t {
    // TA3CTL, Timer3_A5 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer3_A5.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TA3CTL",
            regForceSet: false
        },
        {
            register: "TA3CCTL0",
            regForceSet: false
        },
        {
            register: "TA3CCTL1",
            regForceSet: false
        },
        {
            register: "TA3CCR0",
            regForceSet: false
        },
        {
            register: "TA3CCR1",
            regForceSet: false
        },
        {
            register: "TA3CCR2",
            regForceSet: false
        },
        {
            register: "TA3CCR3",
            regForceSet: false
        },
        {
            register: "TA3CCR4",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer3_A5.regIntVect_t[6] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer3_A5.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer3_A5.Params;
...
params.INCLK = Float 0;
config Timer3_A5.Params.TA3CCR0 // instance
index URL

TA3CCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCR0 = Bits16 0;
config Timer3_A5.Params.TA3CCR1 // instance
index URL

TA3CCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCR1 = Bits16 0;
config Timer3_A5.Params.TA3CCR2 // instance
index URL

TA3CCR2, Timer_A Capture/Compare Register 2

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCR2 = Bits16 0;
config Timer3_A5.Params.TA3CCR3 // instance
index URL

TA3CCR3, Timer_A Capture/Compare Register 3

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCR3 = Bits16 0;
config Timer3_A5.Params.TA3CCR4 // instance
index URL

TA3CCR4, Timer_A Capture/Compare Register 4

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCR4 = Bits16 0;
config Timer3_A5.Params.TA3CCTL0 // instance
index URL

TA3CCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCTL0 = Timer3_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer3_A5.Params.TA3CCTL1 // instance
index URL

TA3CCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCTL1 = Timer3_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer3_A5.Params.TA3CCTL2 // instance
index URL

TA3CCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCTL2 = Timer3_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer3_A5.Params.TA3CCTL3 // instance
index URL

TA3CCTL3, Capture/Compare Control Register 3

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCTL3 = Timer3_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer3_A5.Params.TA3CCTL4 // instance
index URL

TA3CCTL4, Capture/Compare Control Register 4

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CCTL4 = Timer3_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer3_A5.Params.TA3CTL // instance
index URL

TA3CTL, Timer3_A5 Control Register

Configuration settings
var params = new Timer3_A5.Params;
...
params.TA3CTL = Timer3_A5.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer3_A5.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer3_A5.Params;
...
params.TACLK = Float 0;
config Timer3_A5.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer3_A5.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer3_A5.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer3_A5.Params;
...
const params.forceSetDefaultRegister = Timer3_A5.ForceSetDefaultRegister_t[] [
    {
        register: "TA3CTL",
        regForceSet: false
    },
    {
        register: "TA3CCTL0",
        regForceSet: false
    },
    {
        register: "TA3CCTL1",
        regForceSet: false
    },
    {
        register: "TA3CCR0",
        regForceSet: false
    },
    {
        register: "TA3CCR1",
        regForceSet: false
    },
    {
        register: "TA3CCR2",
        regForceSet: false
    },
    {
        register: "TA3CCR3",
        regForceSet: false
    },
    {
        register: "TA3CCR4",
        regForceSet: false
    }
];
config Timer3_A5.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer3_A5.Params;
...
params.intNum = UInt undefined;
config Timer3_A5.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer3_A5.Params;
...
params.interruptSource = Timer3_A5.regIntVect_t[6] undefined;
config Timer3_A5.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer3_A5.Params;
...
params.isInternal = Bool false;
config Timer3_A5.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer3_A5.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer3_A5.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer3_A5.Params;
...
params.numberOfTimers = UChar undefined;
config Timer3_A5.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer3_A5.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer3_A5.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer3_A5.create(IClock.Instance clock, params);
// Create an instance-object
Timer3_A5.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer3_A5.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:17 GMT


module ti.catalog.msp430.peripherals.timer.Timer_A2

metaonly module ti.catalog.msp430.peripherals.timer.Timer_A2
index URL

MSP430 Timer_A2 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer_A2.xdc
var Timer_A2 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer_A2');
module-wide constants & types
    values of type Timer_A2.CAP_t//
        const Timer_A2.CAP_OFF// Compare mode;
        const Timer_A2.CAP// Capture mode;
    values of type Timer_A2.CCIE_t//
        const Timer_A2.CCIE_OFF;
        const Timer_A2.CCIE;
    values of type Timer_A2.CCIFG_t//
        const Timer_A2.CCIFG_OFF;
        const Timer_A2.CCIFG;
    values of type Timer_A2.CCIS_t//
        const Timer_A2.CCIS_0// CCIxA;
        const Timer_A2.CCIS_1// CCIxB;
        const Timer_A2.CCIS_2// GND;
        const Timer_A2.CCIS_3// Vcc;
    values of type Timer_A2.CCI_t//
        const Timer_A2.CCI_OFF;
        const Timer_A2.CCI;
    values of type Timer_A2.CM_t//
        const Timer_A2.CM_0// No Capture;
        const Timer_A2.CM_1// Rising Edge;
        const Timer_A2.CM_2// Falling Edge;
        const Timer_A2.CM_3// Both Edges;
    values of type Timer_A2.COV_t//
        const Timer_A2.COV_OFF;
        const Timer_A2.COV;
    values of type Timer_A2.ID_t//
        const Timer_A2.ID_0// Divider - /1;
        const Timer_A2.ID_1// Divider - /2;
        const Timer_A2.ID_2// Divider - /4;
        const Timer_A2.ID_3// Divider - /8;
    values of type Timer_A2.IVValues// TA3IV Definitions
        const Timer_A2.TAIV_NONE// No Interrupt pending;
        const Timer_A2.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer_A2.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer_A2.TAIV_6// Reserved;
        const Timer_A2.TAIV_8// Reserved;
        const Timer_A2.TAIV_TAIFG// TAIFG;
    values of type Timer_A2.MC_t//
        const Timer_A2.MC_0// Stop Mode;
        const Timer_A2.MC_1// Up Mode;
        const Timer_A2.MC_2// Continuous Mode;
        const Timer_A2.MC_3// Up/Down Mode;
    values of type Timer_A2.OUTMOD_t//
        const Timer_A2.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer_A2.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer_A2.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer_A2.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer_A2.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer_A2.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer_A2.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer_A2.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer_A2.OUT_t//
        const Timer_A2.OUT_OFF;
        const Timer_A2.OUT;
    values of type Timer_A2.SCCI_t//
        const Timer_A2.SCCI_OFF// Latched capture signal (read);
        const Timer_A2.SCCI// Latched capture signal (read);
    values of type Timer_A2.SCS_t//
        const Timer_A2.SCS_OFF// Asynchronous Capture;
        const Timer_A2.SCS// Sychronous Capture;
    values of type Timer_A2.TACLR_t//
        const Timer_A2.TACLR_OFF;
        const Timer_A2.TACLR;
    values of type Timer_A2.TAIE_t//
        const Timer_A2.TAIE_OFF;
        const Timer_A2.TAIE;
    values of type Timer_A2.TAIFG_t//
        const Timer_A2.TAIFG_OFF;
        const Timer_A2.TAIFG;
    values of type Timer_A2.TASSEL_t//
        const Timer_A2.TASSEL_0// TACLK;
        const Timer_A2.TASSEL_1// ACLK;
        const Timer_A2.TASSEL_2// SMCLK;
        const Timer_A2.TASSEL_3// INCLK;
    var obj = new Timer_A2.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer_A2.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer_A2.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer_A2.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer_A2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer_A2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer_A2.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TACCR0// TACCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TACCR1// TACCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TACCTL0// TACCTL0, Capture/Compare Control Register 0 = Timer_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACCTL1// TACCTL1, Capture/Compare Control Register 1 = Timer_A2.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.TACTL// TACTL, Timer_A2 Control Register = Timer_A2.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer_A2.ForceSetDefaultRegister_t[] [
            {
                register: "TACTL",
                regForceSet: false
            },
            {
                register: "TACCTL0",
                regForceSet: false
            },
            {
                register: "TACCTL1",
                regForceSet: false
            },
            {
                register: "TACCR0",
                regForceSet: false
            },
            {
                register: "TACCR1",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer_A2.regIntVect_t[3] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer_A2.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer_A2.CAP_t
index URL
Configuration settings
values of type Timer_A2.CAP_t
    const Timer_A2.CAP_OFF;
    // Compare mode
    const Timer_A2.CAP;
    // Capture mode
enum Timer_A2.CCIE_t
index URL
Configuration settings
values of type Timer_A2.CCIE_t
    const Timer_A2.CCIE_OFF;
    const Timer_A2.CCIE;
enum Timer_A2.CCIFG_t
index URL
Configuration settings
values of type Timer_A2.CCIFG_t
    const Timer_A2.CCIFG_OFF;
    const Timer_A2.CCIFG;
enum Timer_A2.CCIS_t
index URL
Configuration settings
values of type Timer_A2.CCIS_t
    const Timer_A2.CCIS_0;
    // CCIxA
    const Timer_A2.CCIS_1;
    // CCIxB
    const Timer_A2.CCIS_2;
    // GND
    const Timer_A2.CCIS_3;
    // Vcc
enum Timer_A2.CCI_t
index URL
Configuration settings
values of type Timer_A2.CCI_t
    const Timer_A2.CCI_OFF;
    const Timer_A2.CCI;
enum Timer_A2.CM_t
index URL
Configuration settings
values of type Timer_A2.CM_t
    const Timer_A2.CM_0;
    // No Capture
    const Timer_A2.CM_1;
    // Rising Edge
    const Timer_A2.CM_2;
    // Falling Edge
    const Timer_A2.CM_3;
    // Both Edges
enum Timer_A2.COV_t
index URL
Configuration settings
values of type Timer_A2.COV_t
    const Timer_A2.COV_OFF;
    const Timer_A2.COV;
enum Timer_A2.ID_t
index URL
Configuration settings
values of type Timer_A2.ID_t
    const Timer_A2.ID_0;
    // Divider - /1
    const Timer_A2.ID_1;
    // Divider - /2
    const Timer_A2.ID_2;
    // Divider - /4
    const Timer_A2.ID_3;
    // Divider - /8
enum Timer_A2.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer_A2.IVValues
    const Timer_A2.TAIV_NONE;
    // No Interrupt pending
    const Timer_A2.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer_A2.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer_A2.TAIV_6;
    // Reserved
    const Timer_A2.TAIV_8;
    // Reserved
    const Timer_A2.TAIV_TAIFG;
    // TAIFG
enum Timer_A2.MC_t
index URL
Configuration settings
values of type Timer_A2.MC_t
    const Timer_A2.MC_0;
    // Stop Mode
    const Timer_A2.MC_1;
    // Up Mode
    const Timer_A2.MC_2;
    // Continuous Mode
    const Timer_A2.MC_3;
    // Up/Down Mode
enum Timer_A2.OUTMOD_t
index URL
Configuration settings
values of type Timer_A2.OUTMOD_t
    const Timer_A2.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer_A2.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer_A2.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer_A2.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer_A2.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer_A2.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer_A2.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer_A2.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer_A2.OUT_t
index URL
Configuration settings
values of type Timer_A2.OUT_t
    const Timer_A2.OUT_OFF;
    const Timer_A2.OUT;
enum Timer_A2.SCCI_t
index URL
Configuration settings
values of type Timer_A2.SCCI_t
    const Timer_A2.SCCI_OFF;
    // Latched capture signal (read)
    const Timer_A2.SCCI;
    // Latched capture signal (read)
enum Timer_A2.SCS_t
index URL
Configuration settings
values of type Timer_A2.SCS_t
    const Timer_A2.SCS_OFF;
    // Asynchronous Capture
    const Timer_A2.SCS;
    // Sychronous Capture
enum Timer_A2.TACLR_t
index URL
Configuration settings
values of type Timer_A2.TACLR_t
    const Timer_A2.TACLR_OFF;
    const Timer_A2.TACLR;
enum Timer_A2.TAIE_t
index URL
Configuration settings
values of type Timer_A2.TAIE_t
    const Timer_A2.TAIE_OFF;
    const Timer_A2.TAIE;
enum Timer_A2.TAIFG_t
index URL
Configuration settings
values of type Timer_A2.TAIFG_t
    const Timer_A2.TAIFG_OFF;
    const Timer_A2.TAIFG;
enum Timer_A2.TASSEL_t
index URL
Configuration settings
values of type Timer_A2.TASSEL_t
    const Timer_A2.TASSEL_0;
    // TACLK
    const Timer_A2.TASSEL_1;
    // ACLK
    const Timer_A2.TASSEL_2;
    // SMCLK
    const Timer_A2.TASSEL_3;
    // INCLK
struct Timer_A2.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer_A2.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer_A2.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer_A2.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer_A2.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer_A2.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer_A2.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer_A2.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer_A2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer_A2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer_A2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer_A2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer_A2.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TACCR0 = Bits16 0;
    // TACCR0, Timer_A Capture/Compare Register 0
    params.TACCR1 = Bits16 0;
    // TACCR1, Timer_A Capture/Compare Register 1
    params.TACCTL0 = Timer_A2.TACCTLx_t {
    // TACCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACCTL1 = Timer_A2.TACCTLx_t {
    // TACCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.TACTL = Timer_A2.TACTL_t {
    // TACTL, Timer_A2 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer_A2.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TACTL",
            regForceSet: false
        },
        {
            register: "TACCTL0",
            regForceSet: false
        },
        {
            register: "TACCTL1",
            regForceSet: false
        },
        {
            register: "TACCR0",
            regForceSet: false
        },
        {
            register: "TACCR1",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer_A2.regIntVect_t[3] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer_A2.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer_A2.Params;
...
params.INCLK = Float 0;
config Timer_A2.Params.TACCR0 // instance
index URL

TACCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer_A2.Params;
...
params.TACCR0 = Bits16 0;
config Timer_A2.Params.TACCR1 // instance
index URL

TACCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer_A2.Params;
...
params.TACCR1 = Bits16 0;
config Timer_A2.Params.TACCTL0 // instance
index URL

TACCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer_A2.Params;
...
params.TACCTL0 = Timer_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A2.Params.TACCTL1 // instance
index URL

TACCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer_A2.Params;
...
params.TACCTL1 = Timer_A2.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A2.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer_A2.Params;
...
params.TACLK = Float 0;
config Timer_A2.Params.TACTL // instance
index URL

TACTL, Timer_A2 Control Register

Configuration settings
var params = new Timer_A2.Params;
...
params.TACTL = Timer_A2.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer_A2.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer_A2.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer_A2.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer_A2.Params;
...
const params.forceSetDefaultRegister = Timer_A2.ForceSetDefaultRegister_t[] [
    {
        register: "TACTL",
        regForceSet: false
    },
    {
        register: "TACCTL0",
        regForceSet: false
    },
    {
        register: "TACCTL1",
        regForceSet: false
    },
    {
        register: "TACCR0",
        regForceSet: false
    },
    {
        register: "TACCR1",
        regForceSet: false
    }
];
config Timer_A2.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer_A2.Params;
...
params.intNum = UInt undefined;
config Timer_A2.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer_A2.Params;
...
params.interruptSource = Timer_A2.regIntVect_t[3] undefined;
config Timer_A2.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer_A2.Params;
...
params.isInternal = Bool false;
config Timer_A2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer_A2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer_A2.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer_A2.Params;
...
params.numberOfTimers = UChar undefined;
config Timer_A2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer_A2.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer_A2.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer_A2.create(IClock.Instance clock, params);
// Create an instance-object
Timer_A2.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer_A2.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:17 GMT


module ti.catalog.msp430.peripherals.timer.Timer_A3

metaonly module ti.catalog.msp430.peripherals.timer.Timer_A3
index URL

MSP430 Timer_A3 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer_A3.xdc
var Timer_A3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer_A3');
module-wide constants & types
    values of type Timer_A3.CAP_t//
        const Timer_A3.CAP_OFF// Compare mode;
        const Timer_A3.CAP// Capture mode;
    values of type Timer_A3.CCIE_t//
        const Timer_A3.CCIE_OFF;
        const Timer_A3.CCIE;
    values of type Timer_A3.CCIFG_t//
        const Timer_A3.CCIFG_OFF;
        const Timer_A3.CCIFG;
    values of type Timer_A3.CCIS_t//
        const Timer_A3.CCIS_0// CCIxA;
        const Timer_A3.CCIS_1// CCIxB;
        const Timer_A3.CCIS_2// GND;
        const Timer_A3.CCIS_3// Vcc;
    values of type Timer_A3.CCI_t//
        const Timer_A3.CCI_OFF;
        const Timer_A3.CCI;
    values of type Timer_A3.CM_t//
        const Timer_A3.CM_0// No Capture;
        const Timer_A3.CM_1// Rising Edge;
        const Timer_A3.CM_2// Falling Edge;
        const Timer_A3.CM_3// Both Edges;
    values of type Timer_A3.COV_t//
        const Timer_A3.COV_OFF;
        const Timer_A3.COV;
    values of type Timer_A3.ID_t//
        const Timer_A3.ID_0// Divider - /1;
        const Timer_A3.ID_1// Divider - /2;
        const Timer_A3.ID_2// Divider - /4;
        const Timer_A3.ID_3// Divider - /8;
    values of type Timer_A3.IVValues// TA3IV Definitions
        const Timer_A3.TAIV_NONE// No Interrupt pending;
        const Timer_A3.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer_A3.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer_A3.TAIV_6// Reserved;
        const Timer_A3.TAIV_8// Reserved;
        const Timer_A3.TAIV_TAIFG// TAIFG;
    values of type Timer_A3.MC_t//
        const Timer_A3.MC_0// Stop Mode;
        const Timer_A3.MC_1// Up Mode;
        const Timer_A3.MC_2// Continuous Mode;
        const Timer_A3.MC_3// Up/Down Mode;
    values of type Timer_A3.OUTMOD_t//
        const Timer_A3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer_A3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer_A3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer_A3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer_A3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer_A3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer_A3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer_A3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer_A3.OUT_t//
        const Timer_A3.OUT_OFF;
        const Timer_A3.OUT;
    values of type Timer_A3.SCCI_t//
        const Timer_A3.SCCI_OFF// Latched capture signal (read);
        const Timer_A3.SCCI// Latched capture signal (read);
    values of type Timer_A3.SCS_t//
        const Timer_A3.SCS_OFF// Asynchronous Capture;
        const Timer_A3.SCS// Sychronous Capture;
    values of type Timer_A3.TACLR_t//
        const Timer_A3.TACLR_OFF;
        const Timer_A3.TACLR;
    values of type Timer_A3.TAIE_t//
        const Timer_A3.TAIE_OFF;
        const Timer_A3.TAIE;
    values of type Timer_A3.TAIFG_t//
        const Timer_A3.TAIFG_OFF;
        const Timer_A3.TAIFG;
    values of type Timer_A3.TASSEL_t//
        const Timer_A3.TASSEL_0// TACLK;
        const Timer_A3.TASSEL_1// ACLK;
        const Timer_A3.TASSEL_2// SMCLK;
        const Timer_A3.TASSEL_3// INCLK;
    var obj = new Timer_A3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer_A3.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer_A3.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer_A3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer_A3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer_A3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer_A3.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TACCR0// TACCR0, Timer_A Capture/Compare Register 0 = Bits16 0;
        params.TACCR1// TACCR1, Timer_A Capture/Compare Register 1 = Bits16 0;
        params.TACCR2// TACCR2, Timer_A Capture/Compare Register 2 = Bits16 0;
        params.TACCTL0// TACCTL0, Capture/Compare Control Register 0 = Timer_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACCTL1// TACCTL1, Capture/Compare Control Register 1 = Timer_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACCTL2// TACCTL2, Capture/Compare Control Register 2 = Timer_A3.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.TACTL// TACTL, Timer_A3 Control Register = Timer_A3.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer_A3.ForceSetDefaultRegister_t[] [
            {
                register: "TACTL",
                regForceSet: false
            },
            {
                register: "TACCTL0",
                regForceSet: false
            },
            {
                register: "TACCTL1",
                regForceSet: false
            },
            {
                register: "TACCTL2",
                regForceSet: false
            },
            {
                register: "TACCR0",
                regForceSet: false
            },
            {
                register: "TACCR1",
                regForceSet: false
            },
            {
                register: "TACCR2",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer_A3.regIntVect_t[4] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer_A3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer_A3.CAP_t
index URL
Configuration settings
values of type Timer_A3.CAP_t
    const Timer_A3.CAP_OFF;
    // Compare mode
    const Timer_A3.CAP;
    // Capture mode
enum Timer_A3.CCIE_t
index URL
Configuration settings
values of type Timer_A3.CCIE_t
    const Timer_A3.CCIE_OFF;
    const Timer_A3.CCIE;
enum Timer_A3.CCIFG_t
index URL
Configuration settings
values of type Timer_A3.CCIFG_t
    const Timer_A3.CCIFG_OFF;
    const Timer_A3.CCIFG;
enum Timer_A3.CCIS_t
index URL
Configuration settings
values of type Timer_A3.CCIS_t
    const Timer_A3.CCIS_0;
    // CCIxA
    const Timer_A3.CCIS_1;
    // CCIxB
    const Timer_A3.CCIS_2;
    // GND
    const Timer_A3.CCIS_3;
    // Vcc
enum Timer_A3.CCI_t
index URL
Configuration settings
values of type Timer_A3.CCI_t
    const Timer_A3.CCI_OFF;
    const Timer_A3.CCI;
enum Timer_A3.CM_t
index URL
Configuration settings
values of type Timer_A3.CM_t
    const Timer_A3.CM_0;
    // No Capture
    const Timer_A3.CM_1;
    // Rising Edge
    const Timer_A3.CM_2;
    // Falling Edge
    const Timer_A3.CM_3;
    // Both Edges
enum Timer_A3.COV_t
index URL
Configuration settings
values of type Timer_A3.COV_t
    const Timer_A3.COV_OFF;
    const Timer_A3.COV;
enum Timer_A3.ID_t
index URL
Configuration settings
values of type Timer_A3.ID_t
    const Timer_A3.ID_0;
    // Divider - /1
    const Timer_A3.ID_1;
    // Divider - /2
    const Timer_A3.ID_2;
    // Divider - /4
    const Timer_A3.ID_3;
    // Divider - /8
enum Timer_A3.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer_A3.IVValues
    const Timer_A3.TAIV_NONE;
    // No Interrupt pending
    const Timer_A3.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer_A3.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer_A3.TAIV_6;
    // Reserved
    const Timer_A3.TAIV_8;
    // Reserved
    const Timer_A3.TAIV_TAIFG;
    // TAIFG
enum Timer_A3.MC_t
index URL
Configuration settings
values of type Timer_A3.MC_t
    const Timer_A3.MC_0;
    // Stop Mode
    const Timer_A3.MC_1;
    // Up Mode
    const Timer_A3.MC_2;
    // Continuous Mode
    const Timer_A3.MC_3;
    // Up/Down Mode
enum Timer_A3.OUTMOD_t
index URL
Configuration settings
values of type Timer_A3.OUTMOD_t
    const Timer_A3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer_A3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer_A3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer_A3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer_A3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer_A3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer_A3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer_A3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer_A3.OUT_t
index URL
Configuration settings
values of type Timer_A3.OUT_t
    const Timer_A3.OUT_OFF;
    const Timer_A3.OUT;
enum Timer_A3.SCCI_t
index URL
Configuration settings
values of type Timer_A3.SCCI_t
    const Timer_A3.SCCI_OFF;
    // Latched capture signal (read)
    const Timer_A3.SCCI;
    // Latched capture signal (read)
enum Timer_A3.SCS_t
index URL
Configuration settings
values of type Timer_A3.SCS_t
    const Timer_A3.SCS_OFF;
    // Asynchronous Capture
    const Timer_A3.SCS;
    // Sychronous Capture
enum Timer_A3.TACLR_t
index URL
Configuration settings
values of type Timer_A3.TACLR_t
    const Timer_A3.TACLR_OFF;
    const Timer_A3.TACLR;
enum Timer_A3.TAIE_t
index URL
Configuration settings
values of type Timer_A3.TAIE_t
    const Timer_A3.TAIE_OFF;
    const Timer_A3.TAIE;
enum Timer_A3.TAIFG_t
index URL
Configuration settings
values of type Timer_A3.TAIFG_t
    const Timer_A3.TAIFG_OFF;
    const Timer_A3.TAIFG;
enum Timer_A3.TASSEL_t
index URL
Configuration settings
values of type Timer_A3.TASSEL_t
    const Timer_A3.TASSEL_0;
    // TACLK
    const Timer_A3.TASSEL_1;
    // ACLK
    const Timer_A3.TASSEL_2;
    // SMCLK
    const Timer_A3.TASSEL_3;
    // INCLK
struct Timer_A3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer_A3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer_A3.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer_A3.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer_A3.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer_A3.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer_A3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer_A3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer_A3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer_A3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer_A3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer_A3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer_A3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TACCR0 = Bits16 0;
    // TACCR0, Timer_A Capture/Compare Register 0
    params.TACCR1 = Bits16 0;
    // TACCR1, Timer_A Capture/Compare Register 1
    params.TACCR2 = Bits16 0;
    // TACCR2, Timer_A Capture/Compare Register 2
    params.TACCTL0 = Timer_A3.TACCTLx_t {
    // TACCTL0, Capture/Compare Control Register 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACCTL1 = Timer_A3.TACCTLx_t {
    // TACCTL1, Capture/Compare Control Register 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACCTL2 = Timer_A3.TACCTLx_t {
    // TACCTL2, Capture/Compare Control Register 2
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.TACTL = Timer_A3.TACTL_t {
    // TACTL, Timer_A3 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer_A3.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TACTL",
            regForceSet: false
        },
        {
            register: "TACCTL0",
            regForceSet: false
        },
        {
            register: "TACCTL1",
            regForceSet: false
        },
        {
            register: "TACCTL2",
            regForceSet: false
        },
        {
            register: "TACCR0",
            regForceSet: false
        },
        {
            register: "TACCR1",
            regForceSet: false
        },
        {
            register: "TACCR2",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer_A3.regIntVect_t[4] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer_A3.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer_A3.Params;
...
params.INCLK = Float 0;
config Timer_A3.Params.TACCR0 // instance
index URL

TACCR0, Timer_A Capture/Compare Register 0

Configuration settings
var params = new Timer_A3.Params;
...
params.TACCR0 = Bits16 0;
config Timer_A3.Params.TACCR1 // instance
index URL

TACCR1, Timer_A Capture/Compare Register 1

Configuration settings
var params = new Timer_A3.Params;
...
params.TACCR1 = Bits16 0;
config Timer_A3.Params.TACCR2 // instance
index URL

TACCR2, Timer_A Capture/Compare Register 2

Configuration settings
var params = new Timer_A3.Params;
...
params.TACCR2 = Bits16 0;
config Timer_A3.Params.TACCTL0 // instance
index URL

TACCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer_A3.Params;
...
params.TACCTL0 = Timer_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A3.Params.TACCTL1 // instance
index URL

TACCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer_A3.Params;
...
params.TACCTL1 = Timer_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A3.Params.TACCTL2 // instance
index URL

TACCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer_A3.Params;
...
params.TACCTL2 = Timer_A3.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A3.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer_A3.Params;
...
params.TACLK = Float 0;
config Timer_A3.Params.TACTL // instance
index URL

TACTL, Timer_A3 Control Register

Configuration settings
var params = new Timer_A3.Params;
...
params.TACTL = Timer_A3.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer_A3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer_A3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer_A3.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer_A3.Params;
...
const params.forceSetDefaultRegister = Timer_A3.ForceSetDefaultRegister_t[] [
    {
        register: "TACTL",
        regForceSet: false
    },
    {
        register: "TACCTL0",
        regForceSet: false
    },
    {
        register: "TACCTL1",
        regForceSet: false
    },
    {
        register: "TACCTL2",
        regForceSet: false
    },
    {
        register: "TACCR0",
        regForceSet: false
    },
    {
        register: "TACCR1",
        regForceSet: false
    },
    {
        register: "TACCR2",
        regForceSet: false
    }
];
config Timer_A3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer_A3.Params;
...
params.intNum = UInt undefined;
config Timer_A3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer_A3.Params;
...
params.interruptSource = Timer_A3.regIntVect_t[4] undefined;
config Timer_A3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer_A3.Params;
...
params.isInternal = Bool false;
config Timer_A3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer_A3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer_A3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer_A3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer_A3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer_A3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer_A3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer_A3.create(IClock.Instance clock, params);
// Create an instance-object
Timer_A3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer_A3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:18 GMT


module ti.catalog.msp430.peripherals.timer.Timer_A5

metaonly module ti.catalog.msp430.peripherals.timer.Timer_A5
index URL

MSP430 Timer_A5 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer_A5.xdc
var Timer_A5 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer_A5');
module-wide constants & types
    values of type Timer_A5.CAP_t//
        const Timer_A5.CAP_OFF// Compare mode;
        const Timer_A5.CAP// Capture mode;
    values of type Timer_A5.CCIE_t//
        const Timer_A5.CCIE_OFF;
        const Timer_A5.CCIE;
    values of type Timer_A5.CCIFG_t//
        const Timer_A5.CCIFG_OFF;
        const Timer_A5.CCIFG;
    values of type Timer_A5.CCIS_t//
        const Timer_A5.CCIS_0// CCIxA;
        const Timer_A5.CCIS_1// CCIxB;
        const Timer_A5.CCIS_2// GND;
        const Timer_A5.CCIS_3// Vcc;
    values of type Timer_A5.CCI_t//
        const Timer_A5.CCI_OFF;
        const Timer_A5.CCI;
    values of type Timer_A5.CM_t//
        const Timer_A5.CM_0// No Capture;
        const Timer_A5.CM_1// Rising Edge;
        const Timer_A5.CM_2// Falling Edge;
        const Timer_A5.CM_3// Both Edges;
    values of type Timer_A5.COV_t//
        const Timer_A5.COV_OFF;
        const Timer_A5.COV;
    values of type Timer_A5.ID_t//
        const Timer_A5.ID_0// Divider - /1;
        const Timer_A5.ID_1// Divider - /2;
        const Timer_A5.ID_2// Divider - /4;
        const Timer_A5.ID_3// Divider - /8;
    values of type Timer_A5.IVValues// TA3IV Definitions
        const Timer_A5.TAIV_NONE// No Interrupt pending;
        const Timer_A5.TAIV_TACCR1// TACCR1_CCIFG;
        const Timer_A5.TAIV_TACCR2// TACCR2_CCIFG;
        const Timer_A5.TAIV_6// Reserved;
        const Timer_A5.TAIV_8// Reserved;
        const Timer_A5.TAIV_TAIFG// TAIFG;
    values of type Timer_A5.MC_t//
        const Timer_A5.MC_0// Stop Mode;
        const Timer_A5.MC_1// Up Mode;
        const Timer_A5.MC_2// Continuous Mode;
        const Timer_A5.MC_3// Up/Down Mode;
    values of type Timer_A5.OUTMOD_t//
        const Timer_A5.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer_A5.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer_A5.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer_A5.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer_A5.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer_A5.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer_A5.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer_A5.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer_A5.OUT_t//
        const Timer_A5.OUT_OFF;
        const Timer_A5.OUT;
    values of type Timer_A5.SCCI_t//
        const Timer_A5.SCCI_OFF// Latched capture signal (read);
        const Timer_A5.SCCI// Latched capture signal (read);
    values of type Timer_A5.SCS_t//
        const Timer_A5.SCS_OFF// Asynchronous Capture;
        const Timer_A5.SCS// Sychronous Capture;
    values of type Timer_A5.TACLR_t//
        const Timer_A5.TACLR_OFF;
        const Timer_A5.TACLR;
    values of type Timer_A5.TAIE_t//
        const Timer_A5.TAIE_OFF;
        const Timer_A5.TAIE;
    values of type Timer_A5.TAIFG_t//
        const Timer_A5.TAIFG_OFF;
        const Timer_A5.TAIFG;
    values of type Timer_A5.TASSEL_t//
        const Timer_A5.TASSEL_0// TACLK;
        const Timer_A5.TASSEL_1// ACLK;
        const Timer_A5.TASSEL_2// SMCLK;
        const Timer_A5.TASSEL_3// INCLK;
    var obj = new Timer_A5.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer_A5.TACCTLx_t// Capture/Compare Control Register;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_A.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_A.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_A.SCS_t ...
        obj.SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit = ITimer_A.SCCI_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_A.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_A.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_A.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_A.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_A.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.CCIFG_t ...
    var obj = new Timer_A5.TACTL_t// Timer_A Control Register;
        obj.TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK = ITimer_A.TASSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_A.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h = ITimer_A.MC_t ...
        obj.TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero = ITimer_A.TACLR_t ...
        obj.TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_A.TAIE_t ...
        obj.TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_A.TAIFG_t ...
    var obj = new Timer_A5.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer_A5.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer_A5.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer_A5.Params// Instance config-params object;
        params.INCLK// Timer_A INCLK = Float 0;
        params.TACCR0// Capture/Compare 0 = Bits16 0;
        params.TACCR1// Capture/Compare 1 = Bits16 0;
        params.TACCR2// Capture/Compare 2 = Bits16 0;
        params.TACCR3// Capture/Compare 3 = Bits16 0;
        params.TACCR4// Capture/Compare 4 = Bits16 0;
        params.TACCTL0// Capture/Compare Control 0 = Timer_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACCTL1// Capture/Compare Control 1 = Timer_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACCTL2// Capture/Compare Control 2 = Timer_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACCTL3// Capture/Compare Control 3 = Timer_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACCTL4// Capture/Compare Control 4 = Timer_A5.TACCTLx_t {
            CM: ITimer_A.CM_0,
            CCIS: ITimer_A.CCIS_0,
            SCS: ITimer_A.SCS_OFF,
            SCCI: ITimer_A.SCCI_OFF,
            CAP: ITimer_A.CAP_OFF,
            OUTMOD: ITimer_A.OUTMOD_0,
            CCIE: ITimer_A.CCIE_OFF,
            CCI: ITimer_A.CCI_OFF,
            OUT: ITimer_A.OUT_OFF,
            COV: ITimer_A.COV_OFF,
            CCIFG: ITimer_A.CCIFG_OFF
        };
        params.TACLK// Timer_A TACLK = Float 0;
        params.TAxCTL// Timer A5 Control Register = Timer_A5.TACTL_t {
            TASSEL: ITimer_A.TASSEL_0,
            ID: ITimer_A.ID_0,
            MC: ITimer_A.MC_0,
            TACLR: ITimer_A.TACLR_OFF,
            TAIE: ITimer_A.TAIE_OFF,
            TAIFG: ITimer_A.TAIFG_OFF
        };
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer_A5.ForceSetDefaultRegister_t[] [
            {
                register: "TACTL",
                regForceSet: false
            },
            {
                register: "TACCTL0",
                regForceSet: false
            },
            {
                register: "TACCTL1",
                regForceSet: false
            },
            {
                register: "TACCTL2",
                regForceSet: false
            },
            {
                register: "TACCTL3",
                regForceSet: false
            },
            {
                register: "TACCTL4",
                regForceSet: false
            },
            {
                register: "TACCR0",
                regForceSet: false
            },
            {
                register: "TACCR1",
                regForceSet: false
            },
            {
                register: "TACCR2",
                regForceSet: false
            },
            {
                register: "TACCR3",
                regForceSet: false
            },
            {
                register: "TACCR4",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer_A5.regIntVect_t[6] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String "TimerA5";
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer_A5.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer_A5.CAP_t
index URL
Configuration settings
values of type Timer_A5.CAP_t
    const Timer_A5.CAP_OFF;
    // Compare mode
    const Timer_A5.CAP;
    // Capture mode
enum Timer_A5.CCIE_t
index URL
Configuration settings
values of type Timer_A5.CCIE_t
    const Timer_A5.CCIE_OFF;
    const Timer_A5.CCIE;
enum Timer_A5.CCIFG_t
index URL
Configuration settings
values of type Timer_A5.CCIFG_t
    const Timer_A5.CCIFG_OFF;
    const Timer_A5.CCIFG;
enum Timer_A5.CCIS_t
index URL
Configuration settings
values of type Timer_A5.CCIS_t
    const Timer_A5.CCIS_0;
    // CCIxA
    const Timer_A5.CCIS_1;
    // CCIxB
    const Timer_A5.CCIS_2;
    // GND
    const Timer_A5.CCIS_3;
    // Vcc
enum Timer_A5.CCI_t
index URL
Configuration settings
values of type Timer_A5.CCI_t
    const Timer_A5.CCI_OFF;
    const Timer_A5.CCI;
enum Timer_A5.CM_t
index URL
Configuration settings
values of type Timer_A5.CM_t
    const Timer_A5.CM_0;
    // No Capture
    const Timer_A5.CM_1;
    // Rising Edge
    const Timer_A5.CM_2;
    // Falling Edge
    const Timer_A5.CM_3;
    // Both Edges
enum Timer_A5.COV_t
index URL
Configuration settings
values of type Timer_A5.COV_t
    const Timer_A5.COV_OFF;
    const Timer_A5.COV;
enum Timer_A5.ID_t
index URL
Configuration settings
values of type Timer_A5.ID_t
    const Timer_A5.ID_0;
    // Divider - /1
    const Timer_A5.ID_1;
    // Divider - /2
    const Timer_A5.ID_2;
    // Divider - /4
    const Timer_A5.ID_3;
    // Divider - /8
enum Timer_A5.IVValues
index URL

TA3IV Definitions

Configuration settings
values of type Timer_A5.IVValues
    const Timer_A5.TAIV_NONE;
    // No Interrupt pending
    const Timer_A5.TAIV_TACCR1;
    // TACCR1_CCIFG
    const Timer_A5.TAIV_TACCR2;
    // TACCR2_CCIFG
    const Timer_A5.TAIV_6;
    // Reserved
    const Timer_A5.TAIV_8;
    // Reserved
    const Timer_A5.TAIV_TAIFG;
    // TAIFG
enum Timer_A5.MC_t
index URL
Configuration settings
values of type Timer_A5.MC_t
    const Timer_A5.MC_0;
    // Stop Mode
    const Timer_A5.MC_1;
    // Up Mode
    const Timer_A5.MC_2;
    // Continuous Mode
    const Timer_A5.MC_3;
    // Up/Down Mode
enum Timer_A5.OUTMOD_t
index URL
Configuration settings
values of type Timer_A5.OUTMOD_t
    const Timer_A5.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer_A5.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer_A5.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer_A5.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer_A5.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer_A5.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer_A5.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer_A5.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer_A5.OUT_t
index URL
Configuration settings
values of type Timer_A5.OUT_t
    const Timer_A5.OUT_OFF;
    const Timer_A5.OUT;
enum Timer_A5.SCCI_t
index URL
Configuration settings
values of type Timer_A5.SCCI_t
    const Timer_A5.SCCI_OFF;
    // Latched capture signal (read)
    const Timer_A5.SCCI;
    // Latched capture signal (read)
enum Timer_A5.SCS_t
index URL
Configuration settings
values of type Timer_A5.SCS_t
    const Timer_A5.SCS_OFF;
    // Asynchronous Capture
    const Timer_A5.SCS;
    // Sychronous Capture
enum Timer_A5.TACLR_t
index URL
Configuration settings
values of type Timer_A5.TACLR_t
    const Timer_A5.TACLR_OFF;
    const Timer_A5.TACLR;
enum Timer_A5.TAIE_t
index URL
Configuration settings
values of type Timer_A5.TAIE_t
    const Timer_A5.TAIE_OFF;
    const Timer_A5.TAIE;
enum Timer_A5.TAIFG_t
index URL
Configuration settings
values of type Timer_A5.TAIFG_t
    const Timer_A5.TAIFG_OFF;
    const Timer_A5.TAIFG;
enum Timer_A5.TASSEL_t
index URL
Configuration settings
values of type Timer_A5.TASSEL_t
    const Timer_A5.TASSEL_0;
    // TACLK
    const Timer_A5.TASSEL_1;
    // ACLK
    const Timer_A5.TASSEL_2;
    // SMCLK
    const Timer_A5.TASSEL_3;
    // INCLK
struct Timer_A5.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer_A5.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer_A5.TACCTLx_t
index URL

Capture/Compare Control Register

Configuration settings
var obj = new Timer_A5.TACCTLx_t;
    obj.CM = ITimer_A.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_A.CCIS_t ...
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_A.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.SCCI = ITimer_A.SCCI_t ...
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    obj.CAP = ITimer_A.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_A.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_A.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_A.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_A.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_A.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_A.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACCTLx_t
struct Timer_A5.TACTL_t
index URL

Timer_A Control Register

Configuration settings
var obj = new Timer_A5.TACTL_t;
    obj.TASSEL = ITimer_A.TASSEL_t ...
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    obj.ID = ITimer_A.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_A.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    obj.TACLR = ITimer_A.TACLR_t ...
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    obj.TAIE = ITimer_A.TAIE_t ...
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TAIFG = ITimer_A.TAIFG_t ...
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
SEE
TACTL_t
struct Timer_A5.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer_A5.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer_A5.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer_A5.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer_A5.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer_A5.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer_A5.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_A INCLK
    params.TACCR0 = Bits16 0;
    // Capture/Compare 0
    params.TACCR1 = Bits16 0;
    // Capture/Compare 1
    params.TACCR2 = Bits16 0;
    // Capture/Compare 2
    params.TACCR3 = Bits16 0;
    // Capture/Compare 3
    params.TACCR4 = Bits16 0;
    // Capture/Compare 4
    params.TACCTL0 = Timer_A5.TACCTLx_t {
    // Capture/Compare Control 0
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACCTL1 = Timer_A5.TACCTLx_t {
    // Capture/Compare Control 1
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACCTL2 = Timer_A5.TACCTLx_t {
    // Capture/Compare Control 2
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACCTL3 = Timer_A5.TACCTLx_t {
    // Capture/Compare Control 3
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACCTL4 = Timer_A5.TACCTLx_t {
    // Capture/Compare Control 4
        CM: ITimer_A.CM_0,
        CCIS: ITimer_A.CCIS_0,
        SCS: ITimer_A.SCS_OFF,
        SCCI: ITimer_A.SCCI_OFF,
        CAP: ITimer_A.CAP_OFF,
        OUTMOD: ITimer_A.OUTMOD_0,
        CCIE: ITimer_A.CCIE_OFF,
        CCI: ITimer_A.CCI_OFF,
        OUT: ITimer_A.OUT_OFF,
        COV: ITimer_A.COV_OFF,
        CCIFG: ITimer_A.CCIFG_OFF
    };
    params.TACLK = Float 0;
    // Timer_A TACLK
    params.TAxCTL = Timer_A5.TACTL_t {
    // Timer A5 Control Register
        TASSEL: ITimer_A.TASSEL_0,
        ID: ITimer_A.ID_0,
        MC: ITimer_A.MC_0,
        TACLR: ITimer_A.TACLR_OFF,
        TAIE: ITimer_A.TAIE_OFF,
        TAIFG: ITimer_A.TAIFG_OFF
    };
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer_A5.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TACTL",
            regForceSet: false
        },
        {
            register: "TACCTL0",
            regForceSet: false
        },
        {
            register: "TACCTL1",
            regForceSet: false
        },
        {
            register: "TACCTL2",
            regForceSet: false
        },
        {
            register: "TACCTL3",
            regForceSet: false
        },
        {
            register: "TACCTL4",
            regForceSet: false
        },
        {
            register: "TACCR0",
            regForceSet: false
        },
        {
            register: "TACCR1",
            regForceSet: false
        },
        {
            register: "TACCR2",
            regForceSet: false
        },
        {
            register: "TACCR3",
            regForceSet: false
        },
        {
            register: "TACCR4",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer_A5.regIntVect_t[6] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String "TimerA5";
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer_A5.Params.INCLK // instance
index URL

Timer_A INCLK

Configuration settings
var params = new Timer_A5.Params;
...
params.INCLK = Float 0;
config Timer_A5.Params.TACCR0 // instance
index URL

Capture/Compare 0

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCR0 = Bits16 0;
config Timer_A5.Params.TACCR1 // instance
index URL

Capture/Compare 1

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCR1 = Bits16 0;
config Timer_A5.Params.TACCR2 // instance
index URL

Capture/Compare 2

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCR2 = Bits16 0;
config Timer_A5.Params.TACCR3 // instance
index URL

Capture/Compare 3

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCR3 = Bits16 0;
config Timer_A5.Params.TACCR4 // instance
index URL

Capture/Compare 4

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCR4 = Bits16 0;
config Timer_A5.Params.TACCTL0 // instance
index URL

Capture/Compare Control 0

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCTL0 = Timer_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A5.Params.TACCTL1 // instance
index URL

Capture/Compare Control 1

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCTL1 = Timer_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A5.Params.TACCTL2 // instance
index URL

Capture/Compare Control 2

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCTL2 = Timer_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A5.Params.TACCTL3 // instance
index URL

Capture/Compare Control 3

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCTL3 = Timer_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A5.Params.TACCTL4 // instance
index URL

Capture/Compare Control 4

Configuration settings
var params = new Timer_A5.Params;
...
params.TACCTL4 = Timer_A5.TACCTLx_t {
    CM: ITimer_A.CM_0,
    CCIS: ITimer_A.CCIS_0,
    SCS: ITimer_A.SCS_OFF,
    SCCI: ITimer_A.SCCI_OFF,
    CAP: ITimer_A.CAP_OFF,
    OUTMOD: ITimer_A.OUTMOD_0,
    CCIE: ITimer_A.CCIE_OFF,
    CCI: ITimer_A.CCI_OFF,
    OUT: ITimer_A.OUT_OFF,
    COV: ITimer_A.COV_OFF,
    CCIFG: ITimer_A.CCIFG_OFF
};
config Timer_A5.Params.TACLK // instance
index URL

Timer_A TACLK

Configuration settings
var params = new Timer_A5.Params;
...
params.TACLK = Float 0;
config Timer_A5.Params.TAxCTL // instance
index URL

Timer A5 Control Register

Configuration settings
var params = new Timer_A5.Params;
...
params.TAxCTL = Timer_A5.TACTL_t {
    TASSEL: ITimer_A.TASSEL_0,
    ID: ITimer_A.ID_0,
    MC: ITimer_A.MC_0,
    TACLR: ITimer_A.TACLR_OFF,
    TAIE: ITimer_A.TAIE_OFF,
    TAIFG: ITimer_A.TAIFG_OFF
};
config Timer_A5.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer_A5.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer_A5.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer_A5.Params;
...
const params.forceSetDefaultRegister = Timer_A5.ForceSetDefaultRegister_t[] [
    {
        register: "TACTL",
        regForceSet: false
    },
    {
        register: "TACCTL0",
        regForceSet: false
    },
    {
        register: "TACCTL1",
        regForceSet: false
    },
    {
        register: "TACCTL2",
        regForceSet: false
    },
    {
        register: "TACCTL3",
        regForceSet: false
    },
    {
        register: "TACCTL4",
        regForceSet: false
    },
    {
        register: "TACCR0",
        regForceSet: false
    },
    {
        register: "TACCR1",
        regForceSet: false
    },
    {
        register: "TACCR2",
        regForceSet: false
    },
    {
        register: "TACCR3",
        regForceSet: false
    },
    {
        register: "TACCR4",
        regForceSet: false
    }
];
config Timer_A5.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer_A5.Params;
...
params.intNum = UInt undefined;
config Timer_A5.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer_A5.Params;
...
params.interruptSource = Timer_A5.regIntVect_t[6] undefined;
config Timer_A5.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer_A5.Params;
...
params.isInternal = Bool false;
config Timer_A5.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer_A5.Params;
...
params.name = String "TimerA5";
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer_A5.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer_A5.Params;
...
params.numberOfTimers = UChar undefined;
config Timer_A5.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer_A5.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer_A5.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer_A5.create(IClock.Instance clock, params);
// Create an instance-object
Timer_A5.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer_A5.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:18 GMT


module ti.catalog.msp430.peripherals.timer.Timer_B3

metaonly module ti.catalog.msp430.peripherals.timer.Timer_B3
index URL

MSP430 Timer_B timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer_B3.xdc
var Timer_B3 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer_B3');
module-wide constants & types
    values of type Timer_B3.CAP_t//
        const Timer_B3.CAP_OFF;
        const Timer_B3.CAP;
    values of type Timer_B3.CCIE_t//
        const Timer_B3.CCIE_OFF;
        const Timer_B3.CCIE;
    values of type Timer_B3.CCIFG_t//
        const Timer_B3.CCIFG_OFF;
        const Timer_B3.CCIFG;
    values of type Timer_B3.CCIS_t//
        const Timer_B3.CCIS_0// CCIxA;
        const Timer_B3.CCIS_1// CCIxB;
        const Timer_B3.CCIS_2// GND;
        const Timer_B3.CCIS_3// Vcc;
    values of type Timer_B3.CCI_t//
        const Timer_B3.CCI_OFF;
        const Timer_B3.CCI;
    values of type Timer_B3.CLLD_t//
        const Timer_B3.CLLD_0;
        const Timer_B3.CLLD_1;
        const Timer_B3.CLLD_2;
        const Timer_B3.CLLD_3;
    values of type Timer_B3.CM_t//
        const Timer_B3.CM_0// No Capture;
        const Timer_B3.CM_1// Rising Edge;
        const Timer_B3.CM_2// Falling Edge;
        const Timer_B3.CM_3// Both Edges;
    values of type Timer_B3.CNTL_t//
        const Timer_B3.CNTL_0// 16-bit, TBR(max) = 0FFFFh;
        const Timer_B3.CNTL_1// 12-bit, TBR(max) = 0FFFh;
        const Timer_B3.CNTL_2// 10-bit, TBR(max) = 03FFh;
        const Timer_B3.CNTL_3// 8-bit, TBR(max) = 0FFh;
    values of type Timer_B3.COV_t//
        const Timer_B3.COV_OFF;
        const Timer_B3.COV;
    values of type Timer_B3.ID_t//
        const Timer_B3.ID_0// Divider - /1;
        const Timer_B3.ID_1// Divider - /2;
        const Timer_B3.ID_2// Divider - /4;
        const Timer_B3.ID_3// Divider - /8;
    values of type Timer_B3.IVValues// TB3IV Definitions
        const Timer_B3.TBIV_NONE// No Interrupt pending;
        const Timer_B3.TBIV_TBCCR1// TBCCR1_CCIFG;
        const Timer_B3.TBIV_TBCCR2// TBCCR2_CCIFG;
        const Timer_B3.TBIV_6// Reserved;
        const Timer_B3.TBIV_8// Reserved;
        const Timer_B3.TBIV_TBIFG// TBIFG;
    values of type Timer_B3.MC_t//
        const Timer_B3.MC_0// Stop Mode;
        const Timer_B3.MC_1// Up Mode;
        const Timer_B3.MC_2// Continuous Mode;
        const Timer_B3.MC_3// Up/Down Mode;
    values of type Timer_B3.OUTMOD_t//
        const Timer_B3.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer_B3.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer_B3.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer_B3.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer_B3.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer_B3.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer_B3.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer_B3.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer_B3.OUT_t//
        const Timer_B3.OUT_OFF;
        const Timer_B3.OUT;
    values of type Timer_B3.SCCI_t//
        const Timer_B3.SCCI_OFF;
        const Timer_B3.SCCI;
    values of type Timer_B3.SCS_t//
        const Timer_B3.SCS_OFF;
        const Timer_B3.SCS;
    values of type Timer_B3.TBCLGRP_t//
        const Timer_B3.TBCLGRP_0;
        const Timer_B3.TBCLGRP_1;
        const Timer_B3.TBCLGRP_2;
        const Timer_B3.TBCLGRP_3;
    values of type Timer_B3.TBCLR_t//
        const Timer_B3.TBCLR_OFF;
        const Timer_B3.TBCLR;
    values of type Timer_B3.TBIE_t//
        const Timer_B3.TBIE_OFF;
        const Timer_B3.TBIE;
    values of type Timer_B3.TBIFG_t//
        const Timer_B3.TBIFG_OFF;
        const Timer_B3.TBIFG;
    values of type Timer_B3.TBSSEL_t//
        const Timer_B3.TBSSEL_0// TBCLK;
        const Timer_B3.TBSSEL_1// ACLK;
        const Timer_B3.TBSSEL_2// SMCLK;
        const Timer_B3.TBSSEL_3// INCLK;
    var obj = new Timer_B3.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer_B3.TBCCTLx_t// ;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_B.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_B.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_B.SCS_t ...
        obj.CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx = ITimer_B.CLLD_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_B.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_B.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_B.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_B.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_B.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_B.CCIFG_t ...
    var obj = new Timer_B3.TBCTL_t// Timer_B Control Register;
        obj.TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update) = ITimer_B.TBCLGRP_t ...
        obj.CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh = ITimer_B.CNTL_t ...
        obj.TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK = ITimer_B.TBSSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_B.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h = ITimer_B.MC_t ...
        obj.TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero = ITimer_B.TBCLR_t ...
        obj.TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.TBIE_t ...
        obj.TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending = ITimer_B.TBIFG_t ...
    var obj = new Timer_B3.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer_B3.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer_B3.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer_B3.Params// Instance config-params object;
        params.INCLK// Timer_B INCLK = Float 0;
        params.TBCCR0// TBCCR0, Timer_B Capture/Compare Register 0 = Bits16 0;
        params.TBCCR1// TBCCR1, Timer_B Capture/Compare Register 1 = Bits16 0;
        params.TBCCR2// TBCCR2, Timer_B Capture/Compare Register 2 = Bits16 0;
        params.TBCCTL0// TBCCTL0, Capture/Compare Control Register 0 = Timer_B3.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL1// TBCCTL1, Capture/Compare Control Register 1 = Timer_B3.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL2// TBCCTL2, Capture/Compare Control Register 2 = Timer_B3.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCLK// Timer_B TBCLK = Float 0;
        params.TBCTL// TBCTL, Timer_B3 Control Register = Timer_B3.TBCTL_t {
            TBCLGRP: ITimer_B.TBCLGRP_0,
            CNTL: ITimer_B.CNTL_0,
            TBSSEL: ITimer_B.TBSSEL_0,
            ID: ITimer_B.ID_0,
            MC: ITimer_B.MC_0,
            TBCLR: ITimer_B.TBCLR_OFF,
            TBIE: ITimer_B.TBIE_OFF,
            TBIFG: ITimer_B.TBIFG_OFF
        };
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer_B3.ForceSetDefaultRegister_t[] [
            {
                register: "TBCTL",
                regForceSet: false
            },
            {
                register: "TBCCTL0",
                regForceSet: false
            },
            {
                register: "TBCCTL1",
                regForceSet: false
            },
            {
                register: "TBCCTL2",
                regForceSet: false
            },
            {
                register: "TBCCR0",
                regForceSet: false
            },
            {
                register: "TBCCR1",
                regForceSet: false
            },
            {
                register: "TBCCR2",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer_B3.regIntVect_t[4] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer_B3.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer_B3.CAP_t
index URL
Configuration settings
values of type Timer_B3.CAP_t
    const Timer_B3.CAP_OFF;
    const Timer_B3.CAP;
enum Timer_B3.CCIE_t
index URL
Configuration settings
values of type Timer_B3.CCIE_t
    const Timer_B3.CCIE_OFF;
    const Timer_B3.CCIE;
enum Timer_B3.CCIFG_t
index URL
Configuration settings
values of type Timer_B3.CCIFG_t
    const Timer_B3.CCIFG_OFF;
    const Timer_B3.CCIFG;
enum Timer_B3.CCIS_t
index URL
Configuration settings
values of type Timer_B3.CCIS_t
    const Timer_B3.CCIS_0;
    // CCIxA
    const Timer_B3.CCIS_1;
    // CCIxB
    const Timer_B3.CCIS_2;
    // GND
    const Timer_B3.CCIS_3;
    // Vcc
enum Timer_B3.CCI_t
index URL
Configuration settings
values of type Timer_B3.CCI_t
    const Timer_B3.CCI_OFF;
    const Timer_B3.CCI;
enum Timer_B3.CLLD_t
index URL
Configuration settings
values of type Timer_B3.CLLD_t
    const Timer_B3.CLLD_0;
    const Timer_B3.CLLD_1;
    const Timer_B3.CLLD_2;
    const Timer_B3.CLLD_3;
enum Timer_B3.CM_t
index URL
Configuration settings
values of type Timer_B3.CM_t
    const Timer_B3.CM_0;
    // No Capture
    const Timer_B3.CM_1;
    // Rising Edge
    const Timer_B3.CM_2;
    // Falling Edge
    const Timer_B3.CM_3;
    // Both Edges
enum Timer_B3.CNTL_t
index URL
Configuration settings
values of type Timer_B3.CNTL_t
    const Timer_B3.CNTL_0;
    // 16-bit, TBR(max) = 0FFFFh
    const Timer_B3.CNTL_1;
    // 12-bit, TBR(max) = 0FFFh
    const Timer_B3.CNTL_2;
    // 10-bit, TBR(max) = 03FFh
    const Timer_B3.CNTL_3;
    // 8-bit, TBR(max) = 0FFh
enum Timer_B3.COV_t
index URL
Configuration settings
values of type Timer_B3.COV_t
    const Timer_B3.COV_OFF;
    const Timer_B3.COV;
enum Timer_B3.ID_t
index URL
Configuration settings
values of type Timer_B3.ID_t
    const Timer_B3.ID_0;
    // Divider - /1
    const Timer_B3.ID_1;
    // Divider - /2
    const Timer_B3.ID_2;
    // Divider - /4
    const Timer_B3.ID_3;
    // Divider - /8
enum Timer_B3.IVValues
index URL

TB3IV Definitions

Configuration settings
values of type Timer_B3.IVValues
    const Timer_B3.TBIV_NONE;
    // No Interrupt pending
    const Timer_B3.TBIV_TBCCR1;
    // TBCCR1_CCIFG
    const Timer_B3.TBIV_TBCCR2;
    // TBCCR2_CCIFG
    const Timer_B3.TBIV_6;
    // Reserved
    const Timer_B3.TBIV_8;
    // Reserved
    const Timer_B3.TBIV_TBIFG;
    // TBIFG
enum Timer_B3.MC_t
index URL
Configuration settings
values of type Timer_B3.MC_t
    const Timer_B3.MC_0;
    // Stop Mode
    const Timer_B3.MC_1;
    // Up Mode
    const Timer_B3.MC_2;
    // Continuous Mode
    const Timer_B3.MC_3;
    // Up/Down Mode
enum Timer_B3.OUTMOD_t
index URL
Configuration settings
values of type Timer_B3.OUTMOD_t
    const Timer_B3.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer_B3.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer_B3.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer_B3.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer_B3.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer_B3.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer_B3.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer_B3.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer_B3.OUT_t
index URL
Configuration settings
values of type Timer_B3.OUT_t
    const Timer_B3.OUT_OFF;
    const Timer_B3.OUT;
enum Timer_B3.SCCI_t
index URL
Configuration settings
values of type Timer_B3.SCCI_t
    const Timer_B3.SCCI_OFF;
    const Timer_B3.SCCI;
enum Timer_B3.SCS_t
index URL
Configuration settings
values of type Timer_B3.SCS_t
    const Timer_B3.SCS_OFF;
    const Timer_B3.SCS;
enum Timer_B3.TBCLGRP_t
index URL
Configuration settings
values of type Timer_B3.TBCLGRP_t
    const Timer_B3.TBCLGRP_0;
    const Timer_B3.TBCLGRP_1;
    const Timer_B3.TBCLGRP_2;
    const Timer_B3.TBCLGRP_3;
enum Timer_B3.TBCLR_t
index URL
Configuration settings
values of type Timer_B3.TBCLR_t
    const Timer_B3.TBCLR_OFF;
    const Timer_B3.TBCLR;
enum Timer_B3.TBIE_t
index URL
Configuration settings
values of type Timer_B3.TBIE_t
    const Timer_B3.TBIE_OFF;
    const Timer_B3.TBIE;
enum Timer_B3.TBIFG_t
index URL
Configuration settings
values of type Timer_B3.TBIFG_t
    const Timer_B3.TBIFG_OFF;
    const Timer_B3.TBIFG;
enum Timer_B3.TBSSEL_t
index URL
Configuration settings
values of type Timer_B3.TBSSEL_t
    const Timer_B3.TBSSEL_0;
    // TBCLK
    const Timer_B3.TBSSEL_1;
    // ACLK
    const Timer_B3.TBSSEL_2;
    // SMCLK
    const Timer_B3.TBSSEL_3;
    // INCLK
struct Timer_B3.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer_B3.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer_B3.TBCCTLx_t
index URL
Configuration settings
var obj = new Timer_B3.TBCCTLx_t;
    obj.CM = ITimer_B.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_B.CCIS_t ...
    // Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_B.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.CLLD = ITimer_B.CLLD_t ...
    // Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx
    obj.CAP = ITimer_B.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_B.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_B.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_B.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_B.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_B.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_B.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
struct Timer_B3.TBCTL_t
index URL

Timer_B Control Register

Configuration settings
var obj = new Timer_B3.TBCTL_t;
    obj.TBCLGRP = ITimer_B.TBCLGRP_t ...
    // TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)
    obj.CNTL = ITimer_B.CNTL_t ...
    // Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh
    obj.TBSSEL = ITimer_B.TBSSEL_t ...
    // Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK
    obj.ID = ITimer_B.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_B.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h
    obj.TBCLR = ITimer_B.TBCLR_t ...
    // Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero
    obj.TBIE = ITimer_B.TBIE_t ...
    // Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TBIFG = ITimer_B.TBIFG_t ...
    // Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending
SEE
TBCTL_t
struct Timer_B3.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer_B3.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer_B3.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer_B3.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer_B3.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer_B3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer_B3.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_B INCLK
    params.TBCCR0 = Bits16 0;
    // TBCCR0, Timer_B Capture/Compare Register 0
    params.TBCCR1 = Bits16 0;
    // TBCCR1, Timer_B Capture/Compare Register 1
    params.TBCCR2 = Bits16 0;
    // TBCCR2, Timer_B Capture/Compare Register 2
    params.TBCCTL0 = Timer_B3.TBCCTLx_t {
    // TBCCTL0, Capture/Compare Control Register 0
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL1 = Timer_B3.TBCCTLx_t {
    // TBCCTL1, Capture/Compare Control Register 1
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL2 = Timer_B3.TBCCTLx_t {
    // TBCCTL2, Capture/Compare Control Register 2
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCLK = Float 0;
    // Timer_B TBCLK
    params.TBCTL = Timer_B3.TBCTL_t {
    // TBCTL, Timer_B3 Control Register
        TBCLGRP: ITimer_B.TBCLGRP_0,
        CNTL: ITimer_B.CNTL_0,
        TBSSEL: ITimer_B.TBSSEL_0,
        ID: ITimer_B.ID_0,
        MC: ITimer_B.MC_0,
        TBCLR: ITimer_B.TBCLR_OFF,
        TBIE: ITimer_B.TBIE_OFF,
        TBIFG: ITimer_B.TBIFG_OFF
    };
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer_B3.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TBCTL",
            regForceSet: false
        },
        {
            register: "TBCCTL0",
            regForceSet: false
        },
        {
            register: "TBCCTL1",
            regForceSet: false
        },
        {
            register: "TBCCTL2",
            regForceSet: false
        },
        {
            register: "TBCCR0",
            regForceSet: false
        },
        {
            register: "TBCCR1",
            regForceSet: false
        },
        {
            register: "TBCCR2",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer_B3.regIntVect_t[4] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer_B3.Params.INCLK // instance
index URL

Timer_B INCLK

Configuration settings
var params = new Timer_B3.Params;
...
params.INCLK = Float 0;
config Timer_B3.Params.TBCCR0 // instance
index URL

TBCCR0, Timer_B Capture/Compare Register 0

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCCR0 = Bits16 0;
config Timer_B3.Params.TBCCR1 // instance
index URL

TBCCR1, Timer_B Capture/Compare Register 1

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCCR1 = Bits16 0;
config Timer_B3.Params.TBCCR2 // instance
index URL

TBCCR2, Timer_B Capture/Compare Register 2

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCCR2 = Bits16 0;
config Timer_B3.Params.TBCCTL0 // instance
index URL

TBCCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCCTL0 = Timer_B3.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B3.Params.TBCCTL1 // instance
index URL

TBCCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCCTL1 = Timer_B3.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B3.Params.TBCCTL2 // instance
index URL

TBCCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCCTL2 = Timer_B3.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B3.Params.TBCLK // instance
index URL

Timer_B TBCLK

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCLK = Float 0;
config Timer_B3.Params.TBCTL // instance
index URL

TBCTL, Timer_B3 Control Register

Configuration settings
var params = new Timer_B3.Params;
...
params.TBCTL = Timer_B3.TBCTL_t {
    TBCLGRP: ITimer_B.TBCLGRP_0,
    CNTL: ITimer_B.CNTL_0,
    TBSSEL: ITimer_B.TBSSEL_0,
    ID: ITimer_B.ID_0,
    MC: ITimer_B.MC_0,
    TBCLR: ITimer_B.TBCLR_OFF,
    TBIE: ITimer_B.TBIE_OFF,
    TBIFG: ITimer_B.TBIFG_OFF
};
config Timer_B3.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer_B3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer_B3.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer_B3.Params;
...
const params.forceSetDefaultRegister = Timer_B3.ForceSetDefaultRegister_t[] [
    {
        register: "TBCTL",
        regForceSet: false
    },
    {
        register: "TBCCTL0",
        regForceSet: false
    },
    {
        register: "TBCCTL1",
        regForceSet: false
    },
    {
        register: "TBCCTL2",
        regForceSet: false
    },
    {
        register: "TBCCR0",
        regForceSet: false
    },
    {
        register: "TBCCR1",
        regForceSet: false
    },
    {
        register: "TBCCR2",
        regForceSet: false
    }
];
config Timer_B3.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer_B3.Params;
...
params.intNum = UInt undefined;
config Timer_B3.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer_B3.Params;
...
params.interruptSource = Timer_B3.regIntVect_t[4] undefined;
config Timer_B3.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer_B3.Params;
...
params.isInternal = Bool false;
config Timer_B3.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer_B3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer_B3.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer_B3.Params;
...
params.numberOfTimers = UChar undefined;
config Timer_B3.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer_B3.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer_B3.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer_B3.create(IClock.Instance clock, params);
// Create an instance-object
Timer_B3.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer_B3.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:18 GMT


module ti.catalog.msp430.peripherals.timer.Timer_B7

metaonly module ti.catalog.msp430.peripherals.timer.Timer_B7
index URL

MSP430 Timer_B7 timer

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/timer/Timer_B7.xdc
var Timer_B7 = xdc.useModule('ti.catalog.msp430.peripherals.timer.Timer_B7');
module-wide constants & types
    values of type Timer_B7.CAP_t//
        const Timer_B7.CAP_OFF;
        const Timer_B7.CAP;
    values of type Timer_B7.CCIE_t//
        const Timer_B7.CCIE_OFF;
        const Timer_B7.CCIE;
    values of type Timer_B7.CCIFG_t//
        const Timer_B7.CCIFG_OFF;
        const Timer_B7.CCIFG;
    values of type Timer_B7.CCIS_t//
        const Timer_B7.CCIS_0// CCIxA;
        const Timer_B7.CCIS_1// CCIxB;
        const Timer_B7.CCIS_2// GND;
        const Timer_B7.CCIS_3// Vcc;
    values of type Timer_B7.CCI_t//
        const Timer_B7.CCI_OFF;
        const Timer_B7.CCI;
    values of type Timer_B7.CLLD_t//
        const Timer_B7.CLLD_0;
        const Timer_B7.CLLD_1;
        const Timer_B7.CLLD_2;
        const Timer_B7.CLLD_3;
    values of type Timer_B7.CM_t//
        const Timer_B7.CM_0// No Capture;
        const Timer_B7.CM_1// Rising Edge;
        const Timer_B7.CM_2// Falling Edge;
        const Timer_B7.CM_3// Both Edges;
    values of type Timer_B7.CNTL_t//
        const Timer_B7.CNTL_0// 16-bit, TBR(max) = 0FFFFh;
        const Timer_B7.CNTL_1// 12-bit, TBR(max) = 0FFFh;
        const Timer_B7.CNTL_2// 10-bit, TBR(max) = 03FFh;
        const Timer_B7.CNTL_3// 8-bit, TBR(max) = 0FFh;
    values of type Timer_B7.COV_t//
        const Timer_B7.COV_OFF;
        const Timer_B7.COV;
    values of type Timer_B7.ID_t//
        const Timer_B7.ID_0// Divider - /1;
        const Timer_B7.ID_1// Divider - /2;
        const Timer_B7.ID_2// Divider - /4;
        const Timer_B7.ID_3// Divider - /8;
    values of type Timer_B7.IVValues// TBIV Definitions
        const Timer_B7.TBIV_NONE// No Interrupt pending;
        const Timer_B7.TBIV_TBCCR1// TBCCR1_CCIFG;
        const Timer_B7.TBIV_TBCCR2// TBCCR2_CCIFG;
        const Timer_B7.TBIV_TBCCR3// TBCCR3_CCIFG;
        const Timer_B7.TBIV_TBCCR4// TBCCR4_CCIFG;
        const Timer_B7.TBIV_TBCCR5// TBCCR5_CCIFG;
        const Timer_B7.TBIV_TBCCR6// TBCCR6_CCIFG;
        const Timer_B7.TBIV_TBIFG// TBIFG;
    values of type Timer_B7.MC_t//
        const Timer_B7.MC_0// Stop Mode;
        const Timer_B7.MC_1// Up Mode;
        const Timer_B7.MC_2// Continuous Mode;
        const Timer_B7.MC_3// Up/Down Mode;
    values of type Timer_B7.OUTMOD_t//
        const Timer_B7.OUTMOD_0// PWM output mode: 0 - OUT bit value;
        const Timer_B7.OUTMOD_1// PWM output mode: 1 - Set;
        const Timer_B7.OUTMOD_2// PWM output mode: 2 - PWM toggle/reset;
        const Timer_B7.OUTMOD_3// PWM output mode: 3 - PWM set/reset;
        const Timer_B7.OUTMOD_4// PWM output mode: 4 - Toggle;
        const Timer_B7.OUTMOD_5// PWM output mode: 5 - Reset;
        const Timer_B7.OUTMOD_6// PWM output mode: 6 - PWM toggle/set;
        const Timer_B7.OUTMOD_7// PWM output mode: 7 - PWM reset/set;
    values of type Timer_B7.OUT_t//
        const Timer_B7.OUT_OFF;
        const Timer_B7.OUT;
    values of type Timer_B7.SCCI_t//
        const Timer_B7.SCCI_OFF;
        const Timer_B7.SCCI;
    values of type Timer_B7.SCS_t//
        const Timer_B7.SCS_OFF;
        const Timer_B7.SCS;
    values of type Timer_B7.TBCLGRP_t//
        const Timer_B7.TBCLGRP_0;
        const Timer_B7.TBCLGRP_1;
        const Timer_B7.TBCLGRP_2;
        const Timer_B7.TBCLGRP_3;
    values of type Timer_B7.TBCLR_t//
        const Timer_B7.TBCLR_OFF;
        const Timer_B7.TBCLR;
    values of type Timer_B7.TBIE_t//
        const Timer_B7.TBIE_OFF;
        const Timer_B7.TBIE;
    values of type Timer_B7.TBIFG_t//
        const Timer_B7.TBIFG_OFF;
        const Timer_B7.TBIFG;
    values of type Timer_B7.TBSSEL_t//
        const Timer_B7.TBSSEL_0// TBCLK;
        const Timer_B7.TBSSEL_1// ACLK;
        const Timer_B7.TBSSEL_2// SMCLK;
        const Timer_B7.TBSSEL_3// INCLK;
    var obj = new Timer_B7.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new Timer_B7.TBCCTLx_t// ;
        obj.CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges = ITimer_B.CM_t ...
        obj.CCIS// Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC = ITimer_B.CCIS_t ...
        obj.SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture = ITimer_B.SCS_t ...
        obj.CLLD// Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx = ITimer_B.CLLD_t ...
        obj.CAP// Capture mode 0 Compare mode 1 Capture mode = ITimer_B.CAP_t ...
        obj.OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set = ITimer_B.OUTMOD_t ...
        obj.CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.CCIE_t ...
        obj.CCI// Capture/compare input. The selected input signal can be read by this bit = ITimer_B.CCI_t ...
        obj.OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high = ITimer_B.OUT_t ...
        obj.COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred = ITimer_B.COV_t ...
        obj.CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending = ITimer_B.CCIFG_t ...
    var obj = new Timer_B7.TBCTL_t// Timer_B Control Register;
        obj.TBCLGRP// TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update) = ITimer_B.TBCLGRP_t ...
        obj.CNTL// Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh = ITimer_B.CNTL_t ...
        obj.TBSSEL// Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK = ITimer_B.TBSSEL_t ...
        obj.ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8 = ITimer_B.ID_t ...
        obj.MC// Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h = ITimer_B.MC_t ...
        obj.TBCLR// Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero = ITimer_B.TBCLR_t ...
        obj.TBIE// Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled = ITimer_B.TBIE_t ...
        obj.TBIFG// Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending = ITimer_B.TBIFG_t ...
    var obj = new Timer_B7.regIntVect_t// Interrupt vector description;
        obj.registerName = String ...
        obj.registerDescription = String ...
        obj.isrToggleString = String ...
        obj.priorityName = String ...
        obj.interruptEnable = Bool ...
        obj.interruptHandler = Bool ...
        obj.priority = Int ...
module-wide functions
     Timer_B7.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     Timer_B7.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new Timer_B7.Params// Instance config-params object;
        params.INCLK// Timer_B INCLK = Float 0;
        params.TBCCR0// TBCCR0, Timer_B Capture/Compare Register 0 = Bits16 0;
        params.TBCCR1// TBCCR1, Timer_B Capture/Compare Register 1 = Bits16 0;
        params.TBCCR2// TBCCR2, Timer_B Capture/Compare Register 2 = Bits16 0;
        params.TBCCR3// TBCCR3, Timer_B Capture/Compare Register 3 = Bits16 0;
        params.TBCCR4// TBCCR4, Timer_B Capture/Compare Register 4 = Bits16 0;
        params.TBCCR5// TBCCR5, Timer_B Capture/Compare Register 5 = Bits16 0;
        params.TBCCR6// TBCCR6, Timer_B Capture/Compare Register 6 = Bits16 0;
        params.TBCCTL0// TBCCTL0, Capture/Compare Control Register 0 = Timer_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL1// TBCCTL1, Capture/Compare Control Register 1 = Timer_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL2// TBCCTL2, Capture/Compare Control Register 2 = Timer_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL3// TBCCTL3, Capture/Compare Control Register 3 = Timer_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL4// TBCCTL4, Capture/Compare Control Register 4 = Timer_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL5// TBCCTL5, Capture/Compare Control Register 5 = Timer_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCCTL6// TBCCTL6, Capture/Compare Control Register 6 = Timer_B7.TBCCTLx_t {
            CM: ITimer_B.CM_0,
            CCIS: ITimer_B.CCIS_0,
            SCS: ITimer_B.SCS_OFF,
            CLLD: ITimer_B.CLLD_0,
            CAP: ITimer_B.CAP_OFF,
            OUTMOD: ITimer_B.OUTMOD_0,
            CCIE: ITimer_B.CCIE_OFF,
            CCI: ITimer_B.CCI_OFF,
            OUT: ITimer_B.OUT_OFF,
            COV: ITimer_B.COV_OFF,
            CCIFG: ITimer_B.CCIFG_OFF
        };
        params.TBCLK// Timer_B TBCLK = Float 0;
        params.TBCTL// TBCTL, Timer_B7 Control Register = Timer_B7.TBCTL_t {
            TBCLGRP: ITimer_B.TBCLGRP_0,
            CNTL: ITimer_B.CNTL_0,
            TBSSEL: ITimer_B.TBSSEL_0,
            ID: ITimer_B.ID_0,
            MC: ITimer_B.MC_0,
            TBCLR: ITimer_B.TBCLR_OFF,
            TBIE: ITimer_B.TBIE_OFF,
            TBIFG: ITimer_B.TBIFG_OFF
        };
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = Timer_B7.ForceSetDefaultRegister_t[] [
            {
                register: "TBCTL",
                regForceSet: false
            },
            {
                register: "TBCCTL0",
                regForceSet: false
            },
            {
                register: "TBCCTL1",
                regForceSet: false
            },
            {
                register: "TBCCTL2",
                regForceSet: false
            },
            {
                register: "TBCCTL3",
                regForceSet: false
            },
            {
                register: "TBCCTL4",
                regForceSet: false
            },
            {
                register: "TBCCTL5",
                regForceSet: false
            },
            {
                register: "TBCCTL6",
                regForceSet: false
            },
            {
                register: "TBCCR0",
                regForceSet: false
            },
            {
                register: "TBCCR1",
                regForceSet: false
            },
            {
                register: "TBCCR2",
                regForceSet: false
            },
            {
                register: "TBCCR3",
                regForceSet: false
            },
            {
                register: "TBCCR4",
                regForceSet: false
            },
            {
                register: "TBCCR5",
                regForceSet: false
            },
            {
                register: "TBCCR6",
                regForceSet: false
            }
        ];
        params.intNum// Interrupt source number = UInt undefined;
        params.interruptSource// Timer interrupt enables = Timer_B7.regIntVect_t[8] undefined;
        params.isInternal// Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs = Bool false;
        params.name// Specific peripheral name given by the device = String undefined;
        params.numberOfTimers// Stores the number of available timer capture compare blocks = UChar undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = Timer_B7.create// Create an instance-object(IClock.Instance clock, params);
per-instance functions
     inst.getTxxCCRx// Returns TxxCCRx register value based on which CCR register(UChar ccrNumber) returns Bits16
     inst.setTxxCCRx// Sets TxxCCRx register value based on which CCR register(UChar ccrNumber, Bits16 value) returns Void
enum Timer_B7.CAP_t
index URL
Configuration settings
values of type Timer_B7.CAP_t
    const Timer_B7.CAP_OFF;
    const Timer_B7.CAP;
enum Timer_B7.CCIE_t
index URL
Configuration settings
values of type Timer_B7.CCIE_t
    const Timer_B7.CCIE_OFF;
    const Timer_B7.CCIE;
enum Timer_B7.CCIFG_t
index URL
Configuration settings
values of type Timer_B7.CCIFG_t
    const Timer_B7.CCIFG_OFF;
    const Timer_B7.CCIFG;
enum Timer_B7.CCIS_t
index URL
Configuration settings
values of type Timer_B7.CCIS_t
    const Timer_B7.CCIS_0;
    // CCIxA
    const Timer_B7.CCIS_1;
    // CCIxB
    const Timer_B7.CCIS_2;
    // GND
    const Timer_B7.CCIS_3;
    // Vcc
enum Timer_B7.CCI_t
index URL
Configuration settings
values of type Timer_B7.CCI_t
    const Timer_B7.CCI_OFF;
    const Timer_B7.CCI;
enum Timer_B7.CLLD_t
index URL
Configuration settings
values of type Timer_B7.CLLD_t
    const Timer_B7.CLLD_0;
    const Timer_B7.CLLD_1;
    const Timer_B7.CLLD_2;
    const Timer_B7.CLLD_3;
enum Timer_B7.CM_t
index URL
Configuration settings
values of type Timer_B7.CM_t
    const Timer_B7.CM_0;
    // No Capture
    const Timer_B7.CM_1;
    // Rising Edge
    const Timer_B7.CM_2;
    // Falling Edge
    const Timer_B7.CM_3;
    // Both Edges
enum Timer_B7.CNTL_t
index URL
Configuration settings
values of type Timer_B7.CNTL_t
    const Timer_B7.CNTL_0;
    // 16-bit, TBR(max) = 0FFFFh
    const Timer_B7.CNTL_1;
    // 12-bit, TBR(max) = 0FFFh
    const Timer_B7.CNTL_2;
    // 10-bit, TBR(max) = 03FFh
    const Timer_B7.CNTL_3;
    // 8-bit, TBR(max) = 0FFh
enum Timer_B7.COV_t
index URL
Configuration settings
values of type Timer_B7.COV_t
    const Timer_B7.COV_OFF;
    const Timer_B7.COV;
enum Timer_B7.ID_t
index URL
Configuration settings
values of type Timer_B7.ID_t
    const Timer_B7.ID_0;
    // Divider - /1
    const Timer_B7.ID_1;
    // Divider - /2
    const Timer_B7.ID_2;
    // Divider - /4
    const Timer_B7.ID_3;
    // Divider - /8
enum Timer_B7.IVValues
index URL

TBIV Definitions

Configuration settings
values of type Timer_B7.IVValues
    const Timer_B7.TBIV_NONE;
    // No Interrupt pending
    const Timer_B7.TBIV_TBCCR1;
    // TBCCR1_CCIFG
    const Timer_B7.TBIV_TBCCR2;
    // TBCCR2_CCIFG
    const Timer_B7.TBIV_TBCCR3;
    // TBCCR3_CCIFG
    const Timer_B7.TBIV_TBCCR4;
    // TBCCR4_CCIFG
    const Timer_B7.TBIV_TBCCR5;
    // TBCCR5_CCIFG
    const Timer_B7.TBIV_TBCCR6;
    // TBCCR6_CCIFG
    const Timer_B7.TBIV_TBIFG;
    // TBIFG
enum Timer_B7.MC_t
index URL
Configuration settings
values of type Timer_B7.MC_t
    const Timer_B7.MC_0;
    // Stop Mode
    const Timer_B7.MC_1;
    // Up Mode
    const Timer_B7.MC_2;
    // Continuous Mode
    const Timer_B7.MC_3;
    // Up/Down Mode
enum Timer_B7.OUTMOD_t
index URL
Configuration settings
values of type Timer_B7.OUTMOD_t
    const Timer_B7.OUTMOD_0;
    // PWM output mode: 0 - OUT bit value
    const Timer_B7.OUTMOD_1;
    // PWM output mode: 1 - Set
    const Timer_B7.OUTMOD_2;
    // PWM output mode: 2 - PWM toggle/reset
    const Timer_B7.OUTMOD_3;
    // PWM output mode: 3 - PWM set/reset
    const Timer_B7.OUTMOD_4;
    // PWM output mode: 4 - Toggle
    const Timer_B7.OUTMOD_5;
    // PWM output mode: 5 - Reset
    const Timer_B7.OUTMOD_6;
    // PWM output mode: 6 - PWM toggle/set
    const Timer_B7.OUTMOD_7;
    // PWM output mode: 7 - PWM reset/set
enum Timer_B7.OUT_t
index URL
Configuration settings
values of type Timer_B7.OUT_t
    const Timer_B7.OUT_OFF;
    const Timer_B7.OUT;
enum Timer_B7.SCCI_t
index URL
Configuration settings
values of type Timer_B7.SCCI_t
    const Timer_B7.SCCI_OFF;
    const Timer_B7.SCCI;
enum Timer_B7.SCS_t
index URL
Configuration settings
values of type Timer_B7.SCS_t
    const Timer_B7.SCS_OFF;
    const Timer_B7.SCS;
enum Timer_B7.TBCLGRP_t
index URL
Configuration settings
values of type Timer_B7.TBCLGRP_t
    const Timer_B7.TBCLGRP_0;
    const Timer_B7.TBCLGRP_1;
    const Timer_B7.TBCLGRP_2;
    const Timer_B7.TBCLGRP_3;
enum Timer_B7.TBCLR_t
index URL
Configuration settings
values of type Timer_B7.TBCLR_t
    const Timer_B7.TBCLR_OFF;
    const Timer_B7.TBCLR;
enum Timer_B7.TBIE_t
index URL
Configuration settings
values of type Timer_B7.TBIE_t
    const Timer_B7.TBIE_OFF;
    const Timer_B7.TBIE;
enum Timer_B7.TBIFG_t
index URL
Configuration settings
values of type Timer_B7.TBIFG_t
    const Timer_B7.TBIFG_OFF;
    const Timer_B7.TBIFG;
enum Timer_B7.TBSSEL_t
index URL
Configuration settings
values of type Timer_B7.TBSSEL_t
    const Timer_B7.TBSSEL_0;
    // TBCLK
    const Timer_B7.TBSSEL_1;
    // ACLK
    const Timer_B7.TBSSEL_2;
    // SMCLK
    const Timer_B7.TBSSEL_3;
    // INCLK
struct Timer_B7.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new Timer_B7.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct Timer_B7.TBCCTLx_t
index URL
Configuration settings
var obj = new Timer_B7.TBCCTLx_t;
    obj.CM = ITimer_B.CM_t ...
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    obj.CCIS = ITimer_B.CCIS_t ...
    // Capture/compare input select. These bits select the TBCCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    obj.SCS = ITimer_B.SCS_t ...
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    obj.CLLD = ITimer_B.CLLD_t ...
    // Compare latch load. These bits select the compare latch load event. 00 TBCLx loads on write to TBCCRx 01 TBCLx loads when TBR counts to 0 10 TBCLx loads when TBR counts to 0 (up or continuous mode) TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode) 11 TBCLx loads when TBR counts to TBCLx
    obj.CAP = ITimer_B.CAP_t ...
    // Capture mode 0 Compare mode 1 Capture mode
    obj.OUTMOD = ITimer_B.OUTMOD_t ...
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    obj.CCIE = ITimer_B.CCIE_t ...
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    obj.CCI = ITimer_B.CCI_t ...
    // Capture/compare input. The selected input signal can be read by this bit
    obj.OUT = ITimer_B.OUT_t ...
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    obj.COV = ITimer_B.COV_t ...
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    obj.CCIFG = ITimer_B.CCIFG_t ...
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
struct Timer_B7.TBCTL_t
index URL

Timer_B Control Register

Configuration settings
var obj = new Timer_B7.TBCTL_t;
    obj.TBCLGRP = ITimer_B.TBCLGRP_t ...
    // TBCLx group 00 Each TBCLx latch loads independently 01 TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update) TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update) TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update) TBCL0 independent 10 TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update) TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update) TBCL0 independent 11 TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6 (TBCCR1 CLLDx bits control the update)
    obj.CNTL = ITimer_B.CNTL_t ...
    // Counter Length 00 16-bit, TBR(max) = 0FFFFh 01 12-bit, TBR(max) = 0FFFh 10 10-bit, TBR(max) = 03FFh 11 8-bit, TBR(max) = 0FFh
    obj.TBSSEL = ITimer_B.TBSSEL_t ...
    // Timer_B clock source select. 00 TBCLK 01 ACLK 10 SMCLK 11 Inverted TBCLK
    obj.ID = ITimer_B.ID_t ...
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    obj.MC = ITimer_B.MC_t ...
    // Mode control. Setting MCx = 00h when Timer_B is not in use conserves power. 00 Stop mode: the timer is halted 01 Up mode: the timer counts up to TBCL0 10 Continuous mode: the timer counts up to the value set by CNTLx 11 Up/down mode: the timer counts up to TBCL0 and down to 0000h
    obj.TBCLR = ITimer_B.TBCLR_t ...
    // Timer_B clear. Setting this bit resets TBR, the clock divider, and the count direction. The TBCLR bit is automatically reset and is always read as zero
    obj.TBIE = ITimer_B.TBIE_t ...
    // Timer_B interrupt enable. This bit enables the TBIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    obj.TBIFG = ITimer_B.TBIFG_t ...
    // Timer_B interrupt flag. 0 No interrupt pending 1 Interrupt pending
SEE
TBCTL_t
struct Timer_B7.regIntVect_t
index URL

Interrupt vector description

Configuration settings
var obj = new Timer_B7.regIntVect_t;
    obj.registerName = String ...
    obj.registerDescription = String ...
    obj.isrToggleString = String ...
    obj.priorityName = String ...
    obj.interruptEnable = Bool ...
    obj.interruptHandler = Bool ...
    obj.priority = Int ...
DETAILS
Type to describe a single interrupt vector pin and all its possible configurations.
SEE
regIntVect_t
Timer_B7.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
Timer_B7.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
Timer_B7.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
Timer_B7.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new Timer_B7.Params;
// Instance config-params object
    params.INCLK = Float 0;
    // Timer_B INCLK
    params.TBCCR0 = Bits16 0;
    // TBCCR0, Timer_B Capture/Compare Register 0
    params.TBCCR1 = Bits16 0;
    // TBCCR1, Timer_B Capture/Compare Register 1
    params.TBCCR2 = Bits16 0;
    // TBCCR2, Timer_B Capture/Compare Register 2
    params.TBCCR3 = Bits16 0;
    // TBCCR3, Timer_B Capture/Compare Register 3
    params.TBCCR4 = Bits16 0;
    // TBCCR4, Timer_B Capture/Compare Register 4
    params.TBCCR5 = Bits16 0;
    // TBCCR5, Timer_B Capture/Compare Register 5
    params.TBCCR6 = Bits16 0;
    // TBCCR6, Timer_B Capture/Compare Register 6
    params.TBCCTL0 = Timer_B7.TBCCTLx_t {
    // TBCCTL0, Capture/Compare Control Register 0
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL1 = Timer_B7.TBCCTLx_t {
    // TBCCTL1, Capture/Compare Control Register 1
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL2 = Timer_B7.TBCCTLx_t {
    // TBCCTL2, Capture/Compare Control Register 2
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL3 = Timer_B7.TBCCTLx_t {
    // TBCCTL3, Capture/Compare Control Register 3
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL4 = Timer_B7.TBCCTLx_t {
    // TBCCTL4, Capture/Compare Control Register 4
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL5 = Timer_B7.TBCCTLx_t {
    // TBCCTL5, Capture/Compare Control Register 5
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCCTL6 = Timer_B7.TBCCTLx_t {
    // TBCCTL6, Capture/Compare Control Register 6
        CM: ITimer_B.CM_0,
        CCIS: ITimer_B.CCIS_0,
        SCS: ITimer_B.SCS_OFF,
        CLLD: ITimer_B.CLLD_0,
        CAP: ITimer_B.CAP_OFF,
        OUTMOD: ITimer_B.OUTMOD_0,
        CCIE: ITimer_B.CCIE_OFF,
        CCI: ITimer_B.CCI_OFF,
        OUT: ITimer_B.OUT_OFF,
        COV: ITimer_B.COV_OFF,
        CCIFG: ITimer_B.CCIFG_OFF
    };
    params.TBCLK = Float 0;
    // Timer_B TBCLK
    params.TBCTL = Timer_B7.TBCTL_t {
    // TBCTL, Timer_B7 Control Register
        TBCLGRP: ITimer_B.TBCLGRP_0,
        CNTL: ITimer_B.CNTL_0,
        TBSSEL: ITimer_B.TBSSEL_0,
        ID: ITimer_B.ID_0,
        MC: ITimer_B.MC_0,
        TBCLR: ITimer_B.TBCLR_OFF,
        TBIE: ITimer_B.TBIE_OFF,
        TBIFG: ITimer_B.TBIFG_OFF
    };
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = Timer_B7.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "TBCTL",
            regForceSet: false
        },
        {
            register: "TBCCTL0",
            regForceSet: false
        },
        {
            register: "TBCCTL1",
            regForceSet: false
        },
        {
            register: "TBCCTL2",
            regForceSet: false
        },
        {
            register: "TBCCTL3",
            regForceSet: false
        },
        {
            register: "TBCCTL4",
            regForceSet: false
        },
        {
            register: "TBCCTL5",
            regForceSet: false
        },
        {
            register: "TBCCTL6",
            regForceSet: false
        },
        {
            register: "TBCCR0",
            regForceSet: false
        },
        {
            register: "TBCCR1",
            regForceSet: false
        },
        {
            register: "TBCCR2",
            regForceSet: false
        },
        {
            register: "TBCCR3",
            regForceSet: false
        },
        {
            register: "TBCCR4",
            regForceSet: false
        },
        {
            register: "TBCCR5",
            regForceSet: false
        },
        {
            register: "TBCCR6",
            regForceSet: false
        }
    ];
    params.intNum = UInt undefined;
    // Interrupt source number
    params.interruptSource = Timer_B7.regIntVect_t[8] undefined;
    // Timer interrupt enables
    params.isInternal = Bool false;
    // Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.numberOfTimers = UChar undefined;
    // Stores the number of available timer capture compare blocks
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config Timer_B7.Params.INCLK // instance
index URL

Timer_B INCLK

Configuration settings
var params = new Timer_B7.Params;
...
params.INCLK = Float 0;
config Timer_B7.Params.TBCCR0 // instance
index URL

TBCCR0, Timer_B Capture/Compare Register 0

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCR0 = Bits16 0;
config Timer_B7.Params.TBCCR1 // instance
index URL

TBCCR1, Timer_B Capture/Compare Register 1

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCR1 = Bits16 0;
config Timer_B7.Params.TBCCR2 // instance
index URL

TBCCR2, Timer_B Capture/Compare Register 2

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCR2 = Bits16 0;
config Timer_B7.Params.TBCCR3 // instance
index URL

TBCCR3, Timer_B Capture/Compare Register 3

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCR3 = Bits16 0;
config Timer_B7.Params.TBCCR4 // instance
index URL

TBCCR4, Timer_B Capture/Compare Register 4

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCR4 = Bits16 0;
config Timer_B7.Params.TBCCR5 // instance
index URL

TBCCR5, Timer_B Capture/Compare Register 5

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCR5 = Bits16 0;
config Timer_B7.Params.TBCCR6 // instance
index URL

TBCCR6, Timer_B Capture/Compare Register 6

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCR6 = Bits16 0;
config Timer_B7.Params.TBCCTL0 // instance
index URL

TBCCTL0, Capture/Compare Control Register 0

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCTL0 = Timer_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B7.Params.TBCCTL1 // instance
index URL

TBCCTL1, Capture/Compare Control Register 1

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCTL1 = Timer_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B7.Params.TBCCTL2 // instance
index URL

TBCCTL2, Capture/Compare Control Register 2

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCTL2 = Timer_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B7.Params.TBCCTL3 // instance
index URL

TBCCTL3, Capture/Compare Control Register 3

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCTL3 = Timer_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B7.Params.TBCCTL4 // instance
index URL

TBCCTL4, Capture/Compare Control Register 4

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCTL4 = Timer_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B7.Params.TBCCTL5 // instance
index URL

TBCCTL5, Capture/Compare Control Register 5

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCTL5 = Timer_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B7.Params.TBCCTL6 // instance
index URL

TBCCTL6, Capture/Compare Control Register 6

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCCTL6 = Timer_B7.TBCCTLx_t {
    CM: ITimer_B.CM_0,
    CCIS: ITimer_B.CCIS_0,
    SCS: ITimer_B.SCS_OFF,
    CLLD: ITimer_B.CLLD_0,
    CAP: ITimer_B.CAP_OFF,
    OUTMOD: ITimer_B.OUTMOD_0,
    CCIE: ITimer_B.CCIE_OFF,
    CCI: ITimer_B.CCI_OFF,
    OUT: ITimer_B.OUT_OFF,
    COV: ITimer_B.COV_OFF,
    CCIFG: ITimer_B.CCIFG_OFF
};
config Timer_B7.Params.TBCLK // instance
index URL

Timer_B TBCLK

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCLK = Float 0;
config Timer_B7.Params.TBCTL // instance
index URL

TBCTL, Timer_B7 Control Register

Configuration settings
var params = new Timer_B7.Params;
...
params.TBCTL = Timer_B7.TBCTL_t {
    TBCLGRP: ITimer_B.TBCLGRP_0,
    CNTL: ITimer_B.CNTL_0,
    TBSSEL: ITimer_B.TBSSEL_0,
    ID: ITimer_B.ID_0,
    MC: ITimer_B.MC_0,
    TBCLR: ITimer_B.TBCLR_OFF,
    TBIE: ITimer_B.TBIE_OFF,
    TBIFG: ITimer_B.TBIFG_OFF
};
config Timer_B7.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new Timer_B7.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config Timer_B7.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new Timer_B7.Params;
...
const params.forceSetDefaultRegister = Timer_B7.ForceSetDefaultRegister_t[] [
    {
        register: "TBCTL",
        regForceSet: false
    },
    {
        register: "TBCCTL0",
        regForceSet: false
    },
    {
        register: "TBCCTL1",
        regForceSet: false
    },
    {
        register: "TBCCTL2",
        regForceSet: false
    },
    {
        register: "TBCCTL3",
        regForceSet: false
    },
    {
        register: "TBCCTL4",
        regForceSet: false
    },
    {
        register: "TBCCTL5",
        regForceSet: false
    },
    {
        register: "TBCCTL6",
        regForceSet: false
    },
    {
        register: "TBCCR0",
        regForceSet: false
    },
    {
        register: "TBCCR1",
        regForceSet: false
    },
    {
        register: "TBCCR2",
        regForceSet: false
    },
    {
        register: "TBCCR3",
        regForceSet: false
    },
    {
        register: "TBCCR4",
        regForceSet: false
    },
    {
        register: "TBCCR5",
        regForceSet: false
    },
    {
        register: "TBCCR6",
        regForceSet: false
    }
];
config Timer_B7.Params.intNum // instance
index URL

Interrupt source number

Configuration settings
var params = new Timer_B7.Params;
...
params.intNum = UInt undefined;
config Timer_B7.Params.interruptSource // instance
index URL

Timer interrupt enables

Configuration settings
var params = new Timer_B7.Params;
...
params.interruptSource = Timer_B7.regIntVect_t[8] undefined;
config Timer_B7.Params.isInternal // instance
index URL

Boolean that is true if a Timer is internal, meaning it has no external inputs or outputs

Configuration settings
var params = new Timer_B7.Params;
...
params.isInternal = Bool false;
config Timer_B7.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new Timer_B7.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config Timer_B7.Params.numberOfTimers // instance
index URL

Stores the number of available timer capture compare blocks

Configuration settings
var params = new Timer_B7.Params;
...
params.numberOfTimers = UChar undefined;
config Timer_B7.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new Timer_B7.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Timer_B7.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Timer_B7.create(IClock.Instance clock, params);
// Create an instance-object
Timer_B7.getTxxCCRx() // instance
index URL

Returns TxxCCRx register value based on which CCR register

Configuration settings
inst.getTxxCCRx(UChar ccrNumber) returns Bits16
SEE
getTxxCCRx
Timer_B7.setTxxCCRx() // instance
index URL

Sets TxxCCRx register value based on which CCR register

Configuration settings
inst.setTxxCCRx(UChar ccrNumber, Bits16 value) returns Void
SEE
setTxxCCRx
generated on Sun, 25 Nov 2018 22:20:18 GMT


package ti.catalog.msp430.peripherals.watchdog
index URL

MSP430 WDT+ (watchdog timer) peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/package.xdc
requires ti.catalog.msp430.peripherals.clock;
requires ti.catalog.msp430.peripherals.special_function;
package ti.catalog.msp430.peripherals.watchdog [1, 0, 0] {
    interface IWDT;
    // MSP430 Watchdog Timer Interface
    module WDT_A;
    // MSP430 Watchdog Timer A
    module WDTplus;
    // MSP430 Watchdog Timer+
}
generated on Sun, 25 Nov 2018 22:20:01 GMT


interface ti.catalog.msp430.peripherals.watchdog.IWDT

metaonly interface ti.catalog.msp430.peripherals.watchdog.IWDT
index URL

MSP430 Watchdog Timer Interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
metaonly interface IWDT { ...
// inherits xdc.platform.IPeripheral
instance: ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
package ti.catalog.msp430.peripherals.watchdog;
metaonly interface IWDT inherits IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IWDT.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IWDT.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
typedef String StringArray[];
struct IWDT.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
IWDT.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IWDT.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IWDT.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IWDT.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/watchdog/IWDT.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:20:01 GMT


module ti.catalog.msp430.peripherals.watchdog.WDTplus

metaonly module ti.catalog.msp430.peripherals.watchdog.WDTplus
index URL

MSP430 Watchdog Timer+

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/watchdog/WDTplus.xdc
var WDTplus = xdc.useModule('ti.catalog.msp430.peripherals.watchdog.WDTplus');
module-wide constants & types
    values of type WDTplus.WDTCNTCL_t//
        const WDTplus.WDTCNTCL_OFF// No action;
        const WDTplus.WDTCNTCL// WDTCNT = 0000h;
    values of type WDTplus.WDTHOLD_t//
        const WDTplus.WDTHOLD_OFF// Watchdog timer+ is not stopped;
        const WDTplus.WDTHOLD// Watchdog timer+ is stopped;
    values of type WDTplus.WDTIS0_t//
        const WDTplus.WDTIS0_OFF// Watchdog clock source bit0 disabled;
        const WDTplus.WDTIS0// Watchdog clock source bit0 enabled;
    values of type WDTplus.WDTIS1_t//
        const WDTplus.WDTIS1_OFF// Watchdog clock source bit1 disabled;
        const WDTplus.WDTIS1// Watchdog clock source bit1 enabled;
    values of type WDTplus.WDTNMIES_t//
        const WDTplus.WDTNMIES_OFF// NMI on rising edge;
        const WDTplus.WDTNMIES// NMI on falling edge;
    values of type WDTplus.WDTNMI_t//
        const WDTplus.WDTNMI_OFF// Reset function;
        const WDTplus.WDTNMI// NMI function;
    values of type WDTplus.WDTPW_t//
        const WDTplus.WDTPW_OFF// no Watchdog password value;
        const WDTplus.WDTPW// Watchdog password;
    values of type WDTplus.WDTSSEL_t//
        const WDTplus.WDTSSEL_OFF// SMCLK;
        const WDTplus.WDTSSEL// ACLK;
    values of type WDTplus.WDTTMSEL_t//
        const WDTplus.WDTTMSEL_OFF// Watchdog mode;
        const WDTplus.WDTTMSEL// Interval timer mode;
    var obj = new WDTplus.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
    var obj = new WDTplus.WDTCTL_t// ;
        obj.WDTPW// WDT+ password = WDTplus.WDTPW_t ...
        obj.WDTHOLD// Watchdog timer+ hold. This bit stops the watchdog timer+. Setting WDTHOLD = 1 when the WDT+ is not in use conserves power. 0 Watchdog timer+ is not stopped 1 Watchdog timer+ is stopped = WDTplus.WDTHOLD_t ...
        obj.WDTNMIES// Watchdog timer+ NMI edge select. This bit selects the interrupt edge for the NMI interrupt when WDTNMI = 1. Modifying this bit can trigger an NMI. Modify this bit when WDTIE = 0 to avoid triggering an accidental NMI. 0 NMI on rising edge 1 NMI on falling edge = WDTplus.WDTNMIES_t ...
        obj.WDTNMI// Watchdog timer+ NMI select. This bit selects the function for the RST/NMI pin. 0 Reset function 1 NMI function = WDTplus.WDTNMI_t ...
        obj.WDTTMSEL// Watchdog timer+ mode select 0 Watchdog mode 1 Interval timer mode = WDTplus.WDTTMSEL_t ...
        obj.WDTCNTCL// Watchdog timer+ counter clear. Setting WDTCNTCL = 1 clears the count value to 0000h. WDTCNTCL is automatically reset. 0 No action 1 WDTCNT = 0000h = WDTplus.WDTCNTCL_t ...
        obj.WDTSSEL// Watchdog timer+ clock source select 0 SMCLK 1 ACLK = WDTplus.WDTSSEL_t ...
        obj.WDTIS0// Watchdog timer+ interval select. These bits select the watchdog timer+ interval to set the WDTIFG flag and/or generate a PUC. 00 Watchdog clock source /32768 01 Watchdog clock source /8192 10 Watchdog clock source /512 11 Watchdog clock source /64 = WDTplus.WDTIS0_t ...
        obj.WDTIS1// Watchdog timer+ interval select. These bits select the watchdog timer+ interval to set the WDTIFG flag and/or generate a PUC. 00 Watchdog clock source /32768 01 Watchdog clock source /8192 10 Watchdog clock source /512 11 Watchdog clock source /64 = WDTplus.WDTIS1_t ...
module-wide functions
     WDTplus.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     WDTplus.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new WDTplus.Params// Instance config-params object;
        params.WDTCTL// WDTCTL, Watchdog Timer+ Register = WDTplus.WDTCTL_t {
            WDTPW: WDTplus.WDTPW,
            WDTHOLD: WDTplus.WDTHOLD_OFF,
            WDTNMIES: WDTplus.WDTNMIES_OFF,
            WDTNMI: WDTplus.WDTNMI_OFF,
            WDTTMSEL: WDTplus.WDTTMSEL_OFF,
            WDTCNTCL: WDTplus.WDTCNTCL_OFF,
            WDTSSEL: WDTplus.WDTSSEL_OFF,
            WDTIS0: WDTplus.WDTIS0_OFF,
            WDTIS1: WDTplus.WDTIS1_OFF
        };
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.forceSetDefaultRegister// Determine if each Register needs to be forced set or not = WDTplus.ForceSetDefaultRegister_t[] [
            {
                register: "WDTCTL",
                regForceSet: true
            }
        ];
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = WDTplus.create// Create an instance-object(IClock.Instance clock, params);
enum WDTplus.WDTCNTCL_t
index URL
Configuration settings
values of type WDTplus.WDTCNTCL_t
    const WDTplus.WDTCNTCL_OFF;
    // No action
    const WDTplus.WDTCNTCL;
    // WDTCNT = 0000h
enum WDTplus.WDTHOLD_t
index URL
Configuration settings
values of type WDTplus.WDTHOLD_t
    const WDTplus.WDTHOLD_OFF;
    // Watchdog timer+ is not stopped
    const WDTplus.WDTHOLD;
    // Watchdog timer+ is stopped
enum WDTplus.WDTIS0_t
index URL
Configuration settings
values of type WDTplus.WDTIS0_t
    const WDTplus.WDTIS0_OFF;
    // Watchdog clock source bit0 disabled
    const WDTplus.WDTIS0;
    // Watchdog clock source bit0 enabled
enum WDTplus.WDTIS1_t
index URL
Configuration settings
values of type WDTplus.WDTIS1_t
    const WDTplus.WDTIS1_OFF;
    // Watchdog clock source bit1 disabled
    const WDTplus.WDTIS1;
    // Watchdog clock source bit1 enabled
enum WDTplus.WDTNMIES_t
index URL
Configuration settings
values of type WDTplus.WDTNMIES_t
    const WDTplus.WDTNMIES_OFF;
    // NMI on rising edge
    const WDTplus.WDTNMIES;
    // NMI on falling edge
enum WDTplus.WDTNMI_t
index URL
Configuration settings
values of type WDTplus.WDTNMI_t
    const WDTplus.WDTNMI_OFF;
    // Reset function
    const WDTplus.WDTNMI;
    // NMI function
enum WDTplus.WDTPW_t
index URL
Configuration settings
values of type WDTplus.WDTPW_t
    const WDTplus.WDTPW_OFF;
    // no Watchdog password value
    const WDTplus.WDTPW;
    // Watchdog password
enum WDTplus.WDTSSEL_t
index URL
Configuration settings
values of type WDTplus.WDTSSEL_t
    const WDTplus.WDTSSEL_OFF;
    // SMCLK
    const WDTplus.WDTSSEL;
    // ACLK
enum WDTplus.WDTTMSEL_t
index URL
Configuration settings
values of type WDTplus.WDTTMSEL_t
    const WDTplus.WDTTMSEL_OFF;
    // Watchdog mode
    const WDTplus.WDTTMSEL;
    // Interval timer mode
struct WDTplus.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new WDTplus.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct WDTplus.WDTCTL_t
index URL
Configuration settings
var obj = new WDTplus.WDTCTL_t;
    obj.WDTPW = WDTplus.WDTPW_t ...
    // WDT+ password
    obj.WDTHOLD = WDTplus.WDTHOLD_t ...
    // Watchdog timer+ hold. This bit stops the watchdog timer+. Setting WDTHOLD = 1 when the WDT+ is not in use conserves power. 0 Watchdog timer+ is not stopped 1 Watchdog timer+ is stopped
    obj.WDTNMIES = WDTplus.WDTNMIES_t ...
    // Watchdog timer+ NMI edge select. This bit selects the interrupt edge for the NMI interrupt when WDTNMI = 1. Modifying this bit can trigger an NMI. Modify this bit when WDTIE = 0 to avoid triggering an accidental NMI. 0 NMI on rising edge 1 NMI on falling edge
    obj.WDTNMI = WDTplus.WDTNMI_t ...
    // Watchdog timer+ NMI select. This bit selects the function for the RST/NMI pin. 0 Reset function 1 NMI function
    obj.WDTTMSEL = WDTplus.WDTTMSEL_t ...
    // Watchdog timer+ mode select 0 Watchdog mode 1 Interval timer mode
    obj.WDTCNTCL = WDTplus.WDTCNTCL_t ...
    // Watchdog timer+ counter clear. Setting WDTCNTCL = 1 clears the count value to 0000h. WDTCNTCL is automatically reset. 0 No action 1 WDTCNT = 0000h
    obj.WDTSSEL = WDTplus.WDTSSEL_t ...
    // Watchdog timer+ clock source select 0 SMCLK 1 ACLK
    obj.WDTIS0 = WDTplus.WDTIS0_t ...
    // Watchdog timer+ interval select. These bits select the watchdog timer+ interval to set the WDTIFG flag and/or generate a PUC. 00 Watchdog clock source /32768 01 Watchdog clock source /8192 10 Watchdog clock source /512 11 Watchdog clock source /64
    obj.WDTIS1 = WDTplus.WDTIS1_t ...
    // Watchdog timer+ interval select. These bits select the watchdog timer+ interval to set the WDTIFG flag and/or generate a PUC. 00 Watchdog clock source /32768 01 Watchdog clock source /8192 10 Watchdog clock source /512 11 Watchdog clock source /64
WDTplus.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
WDTplus.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
WDTplus.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
WDTplus.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new WDTplus.Params;
// Instance config-params object
    params.WDTCTL = WDTplus.WDTCTL_t {
    // WDTCTL, Watchdog Timer+ Register
        WDTPW: WDTplus.WDTPW,
        WDTHOLD: WDTplus.WDTHOLD_OFF,
        WDTNMIES: WDTplus.WDTNMIES_OFF,
        WDTNMI: WDTplus.WDTNMI_OFF,
        WDTTMSEL: WDTplus.WDTTMSEL_OFF,
        WDTCNTCL: WDTplus.WDTCNTCL_OFF,
        WDTSSEL: WDTplus.WDTSSEL_OFF,
        WDTIS0: WDTplus.WDTIS0_OFF,
        WDTIS1: WDTplus.WDTIS1_OFF
    };
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.forceSetDefaultRegister = WDTplus.ForceSetDefaultRegister_t[] [
    // Determine if each Register needs to be forced set or not
        {
            register: "WDTCTL",
            regForceSet: true
        }
    ];
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config WDTplus.Params.WDTCTL // instance
index URL

WDTCTL, Watchdog Timer+ Register

Configuration settings
var params = new WDTplus.Params;
...
params.WDTCTL = WDTplus.WDTCTL_t {
    WDTPW: WDTplus.WDTPW,
    WDTHOLD: WDTplus.WDTHOLD_OFF,
    WDTNMIES: WDTplus.WDTNMIES_OFF,
    WDTNMI: WDTplus.WDTNMI_OFF,
    WDTTMSEL: WDTplus.WDTTMSEL_OFF,
    WDTCNTCL: WDTplus.WDTCNTCL_OFF,
    WDTSSEL: WDTplus.WDTSSEL_OFF,
    WDTIS0: WDTplus.WDTIS0_OFF,
    WDTIS1: WDTplus.WDTIS1_OFF
};
config WDTplus.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new WDTplus.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config WDTplus.Params.forceSetDefaultRegister // instance
index URL

Determine if each Register needs to be forced set or not

Configuration settings
var params = new WDTplus.Params;
...
const params.forceSetDefaultRegister = WDTplus.ForceSetDefaultRegister_t[] [
    {
        register: "WDTCTL",
        regForceSet: true
    }
];
config WDTplus.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new WDTplus.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config WDTplus.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new WDTplus.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new WDTplus.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = WDTplus.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:01 GMT


module ti.catalog.msp430.peripherals.watchdog.WDT_A

metaonly module ti.catalog.msp430.peripherals.watchdog.WDT_A
index URL

MSP430 Watchdog Timer A

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/msp430/peripherals/watchdog/WDT_A.xdc
var WDT_A = xdc.useModule('ti.catalog.msp430.peripherals.watchdog.WDT_A');
module-wide constants & types
    var obj = new WDT_A.ForceSetDefaultRegister_t// Force Set Default Register;
        obj.register = String ...
        obj.regForceSet = Bool ...
module-wide functions
     WDT_A.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     WDT_A.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new WDT_A.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
per-instance creation
    var inst = WDT_A.create// Create an instance-object(IClock.Instance clock, params);
struct WDT_A.ForceSetDefaultRegister_t
index URL

Force Set Default Register

Configuration settings
var obj = new WDT_A.ForceSetDefaultRegister_t;
    obj.register = String ...
    obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
WDT_A.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
WDT_A.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
WDT_A.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
WDT_A.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new WDT_A.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config WDT_A.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new WDT_A.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config WDT_A.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new WDT_A.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config WDT_A.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new WDT_A.Params;
...
params.owner = String undefined;
Static Instance Creation
index URL

Configuration settings
var params = new WDT_A.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = WDT_A.create(IClock.Instance clock, params);
// Create an instance-object
generated on Sun, 25 Nov 2018 22:20:01 GMT


package ti.catalog.peripherals.hdvicp2
index URL

HD Video Coprocessor support

XDCspec declarations sourced in ti/catalog/peripherals/hdvicp2/package.xdc
package ti.catalog.peripherals.hdvicp2 {
    module HDVICP2;
    // HD Video Coprocessor
}
generated on Sun, 25 Nov 2018 22:20:48 GMT


module ti.catalog.peripherals.hdvicp2.HDVICP2

metaonly module ti.catalog.peripherals.hdvicp2.HDVICP2
index URL

HD Video Coprocessor

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/catalog/peripherals/hdvicp2/HDVICP2.xdc
var HDVICP2 = xdc.useModule('ti.catalog.peripherals.hdvicp2.HDVICP2');
module-wide functions
     HDVICP2.getAll// Find all peripherals of a certain type() returns IPeripheral.Instance[]
     HDVICP2.getRegisters// Find all registers defined by the peripheral() returns String[]
per-instance config parameters
    var params = new HDVICP2.Params// Instance config-params object;
        params.baseAddr// Address of the peripheral's control register = UInt undefined;
        params.intNum// Transfer completion Interrupt source number = UInt undefined;
        params.name// Specific peripheral name given by the device = String undefined;
        params.owner// String specifying the entity that manages the peripheral = String undefined;
HDVICP2.getAll() // module-wide
index URL

Find all peripherals of a certain type

Configuration settings
HDVICP2.getAll() returns IPeripheral.Instance[]
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
HDVICP2.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

Configuration settings
HDVICP2.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters
index URL

Configuration settings
var params = new HDVICP2.Params;
// Instance config-params object
    params.baseAddr = UInt undefined;
    // Address of the peripheral's control register
    params.intNum = UInt undefined;
    // Transfer completion Interrupt source number
    params.name = String undefined;
    // Specific peripheral name given by the device
    params.owner = String undefined;
    // String specifying the entity that manages the peripheral
config HDVICP2.Params.baseAddr // instance
index URL

Address of the peripheral's control register

Configuration settings
var params = new HDVICP2.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config HDVICP2.Params.intNum // instance
index URL

Transfer completion Interrupt source number

Configuration settings
var params = new HDVICP2.Params;
...
params.intNum = UInt undefined;
config HDVICP2.Params.name // instance
index URL

Specific peripheral name given by the device

Configuration settings
var params = new HDVICP2.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config HDVICP2.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

Configuration settings
var params = new HDVICP2.Params;
...
params.owner = String undefined;
generated on Sun, 25 Nov 2018 22:20:48 GMT


package ti.mcu.msp430.include
index URL

MSP430 headers and default linker command files

XDCspec declarations sourced in ti/mcu/msp430/include/package.xdc
package ti.mcu.msp430.include {
}
generated on Sun, 25 Nov 2018 22:19:16 GMT


package ti.platforms.arm
index URL

Generic platform for arm

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables
XDCspec declarations sourced in ti/platforms/arm/package.xdc
requires ti.catalog.arm;
requires xdc.platform[1, 0, 1];
package ti.platforms.arm [1, 0, 0] {
    module Platform;
    // Generic platform support for the arm
}
generated on Sun, 25 Nov 2018 22:20:54 GMT


module ti.platforms.arm.Platform

metaonly module ti.platforms.arm.Platform
index URL

Generic platform support for the arm

  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
This platform requires a memory map file called board.xs to be available in the same directory as the application config file. It should define values for the config parameters which are declared in this platform. [ more ... ]
Configuration settings sourced in ti/platforms/arm/Platform.xdc
var Platform = xdc.useModule('ti.platforms.arm.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
     Platform.BOARD// = IPlatform.Board undefined;
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// CPU Attributes necessary to create an execution context = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.arm",
            deviceName: "",
            revision: ""
        };
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.l1DMode// Define the amount of L1D RAM used for L1 Data Cache = String null;
        params.l1PMode// Define the amount of L1P RAM used for L1 Program Cache = String null;
        params.l2Mode// Define the amount of L2 RAM used for L2 Cache = String null;
        params.memoryExclude// Section to exclude from linker command file generation = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectionMap// A section name to SectionSpec mapping = Any[string] undefined;
        params.sectionsExclude// Section to exclude from linker command file generation = String null;
        params.sectionsTemplate// Replace the sections portion of the generated linker command file = String null;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
DETAILS
This platform requires a memory map file called board.xs to be available in the same directory as the application config file. It should define values for the config parameters which are declared in this platform.
EXAMPLES
A sample board.xs file.
  var boardARM = {
      CPU: {
          clockRate:      300.0,
          catalogName:    "ti.catalog.arm.cortexm3",
          deviceName:     "TMS320DM8168",
      },
      externalMemoryMap: [
          ["EXTRAM",  {
              name: "DDR",  base: 0xC0000000, len: 0x08000000,
          }]
      ],
      codeMemory:  "DDR",
      dataMemory:  "DDR",
      stackMemory: "DDR",
      l1PMode:     "32k",
      l1DMode:     "32k",
      l2Mode:      "0k",
  };
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board undefined;
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    // CPU Attributes necessary to create an execution context
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.arm",
        deviceName: "",
        revision: ""
    };
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.l1DMode = String null;
    // Define the amount of L1D RAM used for L1 Data Cache
    params.l1PMode = String null;
    // Define the amount of L1P RAM used for L1 Program Cache
    params.l2Mode = String null;
    // Define the amount of L2 RAM used for L2 Cache
    params.memoryExclude = Bool false;
    // Section to exclude from linker command file generation
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectionMap = Any[string] undefined;
    // A section name to SectionSpec mapping
    params.sectionsExclude = String null;
    // Section to exclude from linker command file generation
    params.sectionsTemplate = String null;
    // Replace the sections portion of the generated linker command file
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL

CPU Attributes necessary to create an execution context

Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.arm",
    deviceName: "",
    revision: ""
};
DETAILS
The platform requires these attributes to get the device internal memory map.
SEE
xdc.platform.IExeContext.Cpu
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL

Define the amount of L1D RAM used for L1 Data Cache

Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String null;
config Platform.Params.l1PMode // instance
index URL

Define the amount of L1P RAM used for L1 Program Cache

Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String null;
config Platform.Params.l2Mode // instance
index URL

Define the amount of L2 RAM used for L2 Cache

Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String null;
config Platform.Params.memoryExclude // instance
index URL

Section to exclude from linker command file generation

Configuration settings
var params = new Platform.Params;
...
params.memoryExclude = Bool false;
SEE
xdc.cfg.Program.memoryExclude
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectionMap // instance
index URL

A section name to SectionSpec mapping

Configuration settings
var params = new Platform.Params;
...
params.sectionMap = Any[string] undefined;
SEE
xdc.cfg.Program.sectMap
config Platform.Params.sectionsExclude // instance
index URL

Section to exclude from linker command file generation

Configuration settings
var params = new Platform.Params;
...
params.sectionsExclude = String null;
SEE
xdc.cfg.Program.sectionsExclude
config Platform.Params.sectionsTemplate // instance
index URL

Replace the sections portion of the generated linker command file

Configuration settings
var params = new Platform.Params;
...
params.sectionsTemplate = String null;
SEE
xdc.cfg.Program.sectionsTemplate
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
generated on Sun, 25 Nov 2018 22:20:54 GMT


package ti.platforms.arp32
index URL

Generic platform for arp32

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables
XDCspec declarations sourced in ti/platforms/arp32/package.xdc
requires ti.catalog.arp32;
requires xdc.platform[1, 0, 1];
package ti.platforms.arp32 [1, 0, 0] {
    module Platform;
    // Generic platform support for the arp32
}
generated on Sun, 25 Nov 2018 22:20:51 GMT


module ti.platforms.arp32.Platform

metaonly module ti.platforms.arp32.Platform
index URL

Generic platform support for the arp32

  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
This platform requires a memory map file called board.xs to be available in the same directory as the application config file. It should define values for the config parameters which are declared in this platform. [ more ... ]
Configuration settings sourced in ti/platforms/arp32/Platform.xdc
var Platform = xdc.useModule('ti.platforms.arp32.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
     Platform.BOARD// = IPlatform.Board undefined;
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// CPU Attributes necessary to create an execution context = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.arp32",
            deviceName: "",
            revision: ""
        };
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.memoryExclude// Section to exclude from linker command file generation = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectionMap// A section name to SectionSpec mapping = Any[string] undefined;
        params.sectionsExclude// Section to exclude from linker command file generation = String null;
        params.sectionsTemplate// Replace the sections portion of the generated linker command file = String null;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
DETAILS
This platform requires a memory map file called board.xs to be available in the same directory as the application config file. It should define values for the config parameters which are declared in this platform.
EXAMPLES
A sample board.xs file.
  var boardARP32 = {
      CPU: {
          clockRate:      200.0,
          catalogName:    "ti.catalog.arp32",
          deviceName:     "Arctic",
      },
      externalMemoryMap: [
          ["ARP32VECS", {
              comment: "External memory for ARP32 interrupt vectors",
              name:  "ARP32VECS",
              base:  0x80000000,
              len:   0x00000100,
              page:  0,
              space: "code/data"
          }],

          ["ARP32", {
              comment: "External memory for ARP32 use",
              name:  "ARP32",
              base:  0x80000100,
              len:   0x0fffff00,
              page:  1,
              space: "code/data"
          }]
      ],
      codeMemory:  "ARP32",
      dataMemory:  "DMEM",
      stackMemory: "DMEM",
  };
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board undefined;
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    // CPU Attributes necessary to create an execution context
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.arp32",
        deviceName: "",
        revision: ""
    };
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.memoryExclude = Bool false;
    // Section to exclude from linker command file generation
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectionMap = Any[string] undefined;
    // A section name to SectionSpec mapping
    params.sectionsExclude = String null;
    // Section to exclude from linker command file generation
    params.sectionsTemplate = String null;
    // Replace the sections portion of the generated linker command file
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL

CPU Attributes necessary to create an execution context

Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.arp32",
    deviceName: "",
    revision: ""
};
DETAILS
The platform requires these attributes to get the device internal memory map.
SEE
xdc.platform.IExeContext.Cpu
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.memoryExclude // instance
index URL

Section to exclude from linker command file generation

Configuration settings
var params = new Platform.Params;
...
params.memoryExclude = Bool false;
SEE
xdc.cfg.Program.memoryExclude
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectionMap // instance
index URL

A section name to SectionSpec mapping

Configuration settings
var params = new Platform.Params;
...
params.sectionMap = Any[string] undefined;
SEE
xdc.cfg.Program.sectMap
config Platform.Params.sectionsExclude // instance
index URL

Section to exclude from linker command file generation

Configuration settings
var params = new Platform.Params;
...
params.sectionsExclude = String null;
SEE
xdc.cfg.Program.sectionsExclude
config Platform.Params.sectionsTemplate // instance
index URL

Replace the sections portion of the generated linker command file

Configuration settings
var params = new Platform.Params;
...
params.sectionsTemplate = String null;
SEE
xdc.cfg.Program.sectionsTemplate
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
generated on Sun, 25 Nov 2018 22:20:51 GMT


package ti.platforms.beaglebone
index URL

Platform package for the beaglebone platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the beaglebone platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/beaglebone/package.xdc
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.beaglebone [1, 0, 0] {
    module Platform;
    // Platform support for the beaglebone
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the beaglebone platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.beaglebone.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:51 GMT


module ti.platforms.beaglebone.Platform

metaonly module ti.platforms.beaglebone.Platform
index URL

Platform support for the beaglebone

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/beaglebone/Platform.xdc
var Platform = xdc.useModule('ti.platforms.beaglebone.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "beaglebone",
        boardFamily: "beaglebone",
        boardRevision: null
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 500.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "AM3359",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    comment: "DDR2 Memory",
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "beaglebone",
    boardFamily: "beaglebone",
    boardRevision: null
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 500.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "AM3359",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                comment: "DDR2 Memory",
                name: "DDR2",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            comment: "DDR2 Memory",
            name: "DDR2",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:51 GMT


package ti.platforms.c6000
index URL

Generic platform for c6000

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables
XDCspec declarations sourced in ti/platforms/c6000/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.c6000 [1, 0, 0] {
    module Platform;
    // Generic platform support for the c6000
}
generated on Sun, 25 Nov 2018 22:20:56 GMT


module ti.platforms.c6000.Platform

metaonly module ti.platforms.c6000.Platform
index URL

Generic platform support for the c6000

  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
This platform requires a memory map file called board.xs to be available in the same directory as the application config file. It should define values for the config parameters which are declared in this platform. [ more ... ]
Configuration settings sourced in ti/platforms/c6000/Platform.xdc
var Platform = xdc.useModule('ti.platforms.c6000.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
     Platform.BOARD// = IPlatform.Board undefined;
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// CPU Attributes necessary to create an execution context = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.c6000",
            deviceName: "",
            revision: ""
        };
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.l1DMode// Define the amount of L1D RAM used for L1 Data Cache = String null;
        params.l1PMode// Define the amount of L1P RAM used for L1 Program Cache = String null;
        params.l2Mode// Define the amount of L2 RAM used for L2 Cache = String null;
        params.memoryExclude// Section to exclude from linker command file generation = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectionMap// A section name to SectionSpec mapping = Any[string] undefined;
        params.sectionsExclude// Section to exclude from linker command file generation = String null;
        params.sectionsTemplate// Replace the sections portion of the generated linker command file = String null;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
DETAILS
This platform requires a memory map file called board.xs to be available in the same directory as the application config file. It should define values for the config parameters which are declared in this platform.
EXAMPLES
A sample board.xs file.
  var board6748 = {
      BOARD: {
          boardName:      "board6748",
          boardFamily:    "board6xxx",
      },
      CPU: {
          clockRate:      300.0,
          catalogName:    "ti.catalog.c6000",
          deviceName:     "TMS320C6748",
      },
      externalMemoryMap: [
          ["EXTRAM",  {
              name: "DDR",  base: 0xC0000000, len: 0x08000000,
          }]
      ],
      codeMemory:  "DDR",
      dataMemory:  "DDR",
      stackMemory: "DDR",
      l1PMode:     "32k",
      l1DMode:     "32k",
      l2Mode:      "0k",
  };
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board undefined;
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    // CPU Attributes necessary to create an execution context
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "",
        revision: ""
    };
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.l1DMode = String null;
    // Define the amount of L1D RAM used for L1 Data Cache
    params.l1PMode = String null;
    // Define the amount of L1P RAM used for L1 Program Cache
    params.l2Mode = String null;
    // Define the amount of L2 RAM used for L2 Cache
    params.memoryExclude = Bool false;
    // Section to exclude from linker command file generation
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectionMap = Any[string] undefined;
    // A section name to SectionSpec mapping
    params.sectionsExclude = String null;
    // Section to exclude from linker command file generation
    params.sectionsTemplate = String null;
    // Replace the sections portion of the generated linker command file
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL

CPU Attributes necessary to create an execution context

Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "",
    revision: ""
};
DETAILS
The platform requires these attributes to get the device internal memory map.
SEE
xdc.platform.IExeContext.Cpu
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL

Define the amount of L1D RAM used for L1 Data Cache

Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String null;
config Platform.Params.l1PMode // instance
index URL

Define the amount of L1P RAM used for L1 Program Cache

Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String null;
config Platform.Params.l2Mode // instance
index URL

Define the amount of L2 RAM used for L2 Cache

Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String null;
config Platform.Params.memoryExclude // instance
index URL

Section to exclude from linker command file generation

Configuration settings
var params = new Platform.Params;
...
params.memoryExclude = Bool false;
SEE
xdc.cfg.Program.memoryExclude
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectionMap // instance
index URL

A section name to SectionSpec mapping

Configuration settings
var params = new Platform.Params;
...
params.sectionMap = Any[string] undefined;
SEE
xdc.cfg.Program.sectMap
config Platform.Params.sectionsExclude // instance
index URL

Section to exclude from linker command file generation

Configuration settings
var params = new Platform.Params;
...
params.sectionsExclude = String null;
SEE
xdc.cfg.Program.sectionsExclude
config Platform.Params.sectionsTemplate // instance
index URL

Replace the sections portion of the generated linker command file

Configuration settings
var params = new Platform.Params;
...
params.sectionsTemplate = String null;
SEE
xdc.cfg.Program.sectionsTemplate
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
generated on Sun, 25 Nov 2018 22:20:56 GMT


package ti.platforms.c6x
index URL

Generic platform support for any C6x device

XDCspec declarations sourced in ti/platforms/c6x/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.c6000;
package ti.platforms.c6x [1, 0, 0] {
    module Platform;
    // A generic platform that supports any C6x device
}
generated on Sun, 25 Nov 2018 22:21:03 GMT


module ti.platforms.c6x.Platform

metaonly module ti.platforms.c6x.Platform
index URL

A generic platform that supports any C6x device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/c6x/Platform.xdc
var Platform = xdc.useModule('ti.platforms.c6x.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "c6x",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.c6000",
            deviceName: "C66",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.c6x:TMS320C6678"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.c6x:TMS320C6678");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.c6x:TMS320C6678:1:20
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.c6x:TMS320C6678
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "c6x",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "C66",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "C66",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:03 GMT


package ti.platforms.concertoC28
index URL

Platform support for any concerto C28 device

XDCspec declarations sourced in ti/platforms/concertoC28/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.c2800;
package ti.platforms.concertoC28 [1, 0, 0] {
    module Platform;
    // A generic platform that supports any Stellaris device
}
generated on Sun, 25 Nov 2018 22:20:57 GMT


module ti.platforms.concertoC28.Platform

metaonly module ti.platforms.concertoC28.Platform
index URL

A generic platform that supports any Stellaris device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/concertoC28/Platform.xdc
var Platform = xdc.useModule('ti.platforms.concertoC28.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "concertoC28",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.c2800",
            deviceName: "F28M35x",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double 60.0;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.concertoC28:F28M35H52C1"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.concertoC28:F28M35H52C1");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.concertoC28:F28M35H52C1:1:150
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.concertoC28:F28M35H52C1
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "concertoC28",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "F28M35x",
        revision: ""
    };
    params.clockRate = Double 60.0;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "F28M35x",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double 60.0;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:57 GMT


package ti.platforms.concertoM3
index URL

Platform support for any concerto M3 device

XDCspec declarations sourced in ti/platforms/concertoM3/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.arm.cortexm3;
package ti.platforms.concertoM3 [1, 0, 0] {
    module Platform;
    // A generic platform that supports any Stellaris device
}
generated on Sun, 25 Nov 2018 22:21:03 GMT


module ti.platforms.concertoM3.Platform

metaonly module ti.platforms.concertoM3.Platform
index URL

A generic platform that supports any Stellaris device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/concertoM3/Platform.xdc
var Platform = xdc.useModule('ti.platforms.concertoM3.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "concertoM3",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.arm.cortexm3",
            deviceName: "F28M35x",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.concertoM3:LM3S8971"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.concertoM3:LM3S8971");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile)";
DETAILS
For this platform, the parameters deviceName and includeLinkCmdFile can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.concertoM3:LM3S8971:1
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.concertoM3:LM3S8971
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "concertoM3",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "F28M35x",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "F28M35x",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:03 GMT


package ti.platforms.control28027
index URL

Platform package for the 28027 control card

This package implements the interface (xdc.platform.IPlatform) necessary to build and run executables on the 28027 controlCARD platform.
XDCspec declarations sourced in ti/platforms/control28027/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.control28027 [1, 0, 0] {
    module Platform;
}
generated on Sun, 25 Nov 2018 22:20:57 GMT


module ti.platforms.control28027.Platform

metaonly module ti.platforms.control28027.Platform
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/control28027/Platform.xdc
var Platform = xdc.useModule('ti.platforms.control28027.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "control28027",
        boardFamily: "control28027",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 60.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320C28027",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "FLASH";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "LSARAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "MSARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "control28027",
    boardFamily: "control28027",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 60.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320C28027",
    revision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "FLASH";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "LSARAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "MSARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "FLASH";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "LSARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "MSARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:57 GMT


package ti.platforms.control28035
index URL

Platform package for the 28035 control card

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the 28035 controlCARD platform.
XDCspec declarations sourced in ti/platforms/control28035/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.control28035 [1, 0, 0] {
    module Platform;
}
generated on Sun, 25 Nov 2018 22:20:56 GMT


module ti.platforms.control28035.Platform

metaonly module ti.platforms.control28035.Platform
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/control28035/Platform.xdc
var Platform = xdc.useModule('ti.platforms.control28035.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "control28035",
        boardFamily: "control28035",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 60.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320C28035",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "FLASH";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "LSARAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "MSARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "control28035",
    boardFamily: "control28035",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 60.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320C28035",
    revision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "FLASH";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "LSARAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "MSARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "FLASH";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "LSARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "MSARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:56 GMT


package ti.platforms.control28069
index URL

Platform package for the 28069 control card and control stick

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the 28069 controlCARD and controlSTICK platform.
XDCspec declarations sourced in ti/platforms/control28069/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.control28069 [1, 0, 0] {
    module Platform;
}
generated on Sun, 25 Nov 2018 22:21:02 GMT


module ti.platforms.control28069.Platform

metaonly module ti.platforms.control28069.Platform
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/control28069/Platform.xdc
var Platform = xdc.useModule('ti.platforms.control28069.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "control28069",
        boardFamily: "control28069",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 80.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320F28069",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "FLASH";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L4SARAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L03DPSARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "control28069",
    boardFamily: "control28069",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 80.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320F28069",
    revision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "FLASH";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L4SARAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L03DPSARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "FLASH";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L4SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L03DPSARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:02 GMT


package ti.platforms.control28335
index URL

Platform package for the 28335 control card

This package implements the interface (xdc.platform.IPlatform) necessary to build and run executables on the 28335 controlCARD platform.
XDCspec declarations sourced in ti/platforms/control28335/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.control28335 [1, 0, 0] {
    module Platform;
}
generated on Sun, 25 Nov 2018 22:21:02 GMT


module ti.platforms.control28335.Platform

metaonly module ti.platforms.control28335.Platform
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/control28335/Platform.xdc
var Platform = xdc.useModule('ti.platforms.control28335.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "control28335",
        boardFamily: "control28335",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 150.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320C28335",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L47SARAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L03SARAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L03SARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "control28335",
    boardFamily: "control28335",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 150.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320C28335",
    revision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L47SARAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L03SARAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L03SARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L47SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L03SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L03SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:02 GMT


package ti.platforms.control28346
index URL

Platform package for the 28346 control card

This package implements the interface (xdc.platform.IPlatform) necessary to build and run executables on the 28346 controlCARD platform.
XDCspec declarations sourced in ti/platforms/control28346/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.control28346 [1, 0, 0] {
    module Platform;
}
generated on Sun, 25 Nov 2018 22:21:00 GMT


module ti.platforms.control28346.Platform

metaonly module ti.platforms.control28346.Platform
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/control28346/Platform.xdc
var Platform = xdc.useModule('ti.platforms.control28346.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "control28346",
        boardFamily: "control28346",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 300.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320C28346",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L47SARAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L03SARAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    name: "SRAM",
                    base: 0x200000,
                    len: 0x020000,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L03SARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "control28346",
    boardFamily: "control28346",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 300.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320C28346",
    revision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L47SARAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L03SARAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SRAM",
            {
                name: "SRAM",
                base: 0x200000,
                len: 0x020000,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L03SARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L47SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L03SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            name: "SRAM",
            base: 0x200000,
            len: 0x020000,
            page: 0,
            space: "code/data"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L03SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:00 GMT


package ti.platforms.cortexA
index URL

Generic platform support for any ARMv8 Cortex-A device

XDCspec declarations sourced in ti/platforms/cortexA/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.arm.cortexa53;
package ti.platforms.cortexA [1, 0, 0] {
    module Platform;
    // A generic platform that supports any ARMv8 Cortex-A device
}
generated on Sun, 25 Nov 2018 22:21:01 GMT


module ti.platforms.cortexA.Platform

metaonly module ti.platforms.cortexA.Platform
index URL

A generic platform that supports any ARMv8 Cortex-A device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/cortexA/Platform.xdc
var Platform = xdc.useModule('ti.platforms.cortexA.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "cortexA",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.arm.cortexa53",
            deviceName: "CortexA",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.cortexA:SIMFLEMING"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.cortexA:SIMFLEMING");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.cortexA:SIMFLEMING:1:20
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.cortexA:SIMFLEMING
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "cortexA",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.arm.cortexa53",
        deviceName: "CortexA",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.arm.cortexa53",
    deviceName: "CortexA",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:01 GMT


package ti.platforms.cortexM
index URL

Generic platform support for any ARM Cortex-M device

XDCspec declarations sourced in ti/platforms/cortexM/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.arm.cortexm33;
package ti.platforms.cortexM [1, 0, 0] {
    module Platform;
    // A generic platform that supports any ARM Cortex-M device
}
generated on Sun, 25 Nov 2018 22:20:53 GMT


module ti.platforms.cortexM.Platform

metaonly module ti.platforms.cortexM.Platform
index URL

A generic platform that supports any ARM Cortex-M device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/cortexM/Platform.xdc
var Platform = xdc.useModule('ti.platforms.cortexM.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "cortexM",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.arm.cortexm33",
            deviceName: "CortexM",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.cortexM:MTL1"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.cortexM:MTL1");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.cortexM:MTL1:1:20
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.cortexM:MTL1
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "cortexM",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.arm.cortexm33",
        deviceName: "CortexM",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.arm.cortexm33",
    deviceName: "CortexM",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:53 GMT


package ti.platforms.cortexR
index URL

Generic platform support for any Cortex-R device

XDCspec declarations sourced in ti/platforms/cortexR/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.arm.cortexr5;
package ti.platforms.cortexR [1, 0, 0] {
    module Platform;
    // A generic platform that supports any Cortex-R device
}
generated on Sun, 25 Nov 2018 22:20:53 GMT


module ti.platforms.cortexR.Platform

metaonly module ti.platforms.cortexR.Platform
index URL

A generic platform that supports any Cortex-R device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/cortexR/Platform.xdc
var Platform = xdc.useModule('ti.platforms.cortexR.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "cortexR",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.arm.cortexr5",
            deviceName: "CortexR",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.cortexR:RM57D843ZWTT"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.cortexR:RM57D843ZWTT");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.cortexR:RM57D843ZWTT:1:20
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.cortexR:RM57D843ZWTT
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "cortexR",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.arm.cortexr5",
        deviceName: "CortexR",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.arm.cortexr5",
    deviceName: "CortexR",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:53 GMT


package ti.platforms.dsk6455
index URL

Platform package for the dsk6455 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the dsk6455 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/dsk6455/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.dsk6455 [1, 0, 0] {
    module Platform;
    // Platform support for the dsk6455
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the dsk6455 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.dsk6455.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:54 GMT


module ti.platforms.dsk6455.Platform

metaonly module ti.platforms.dsk6455.Platform
index URL

Platform support for the dsk6455

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/dsk6455/Platform.xdc
var Platform = xdc.useModule('ti.platforms.dsk6455.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "dsk6455",
        boardFamily: "dsk6455",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6455",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "IRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xE0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "dsk6455",
    boardFamily: "dsk6455",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6455",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "IRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xE0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "IRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xE0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:54 GMT


package ti.platforms.dskTCI6482
index URL

Platform package for the dskTCI6482 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the dskTCI6482 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/dskTCI6482/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.dskTCI6482 [1, 0, 0] {
    module Platform;
    // Platform support for the dskTCI6482
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the dskTCI6482 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.dskTCI6482.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:57 GMT


module ti.platforms.dskTCI6482.Platform

metaonly module ti.platforms.dskTCI6482.Platform
index URL

Platform support for the dskTCI6482

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/dskTCI6482/Platform.xdc
var Platform = xdc.useModule('ti.platforms.dskTCI6482.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "dskTCI6482",
        boardFamily: "dskTCI6482",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CTCI6482",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR",
                {
                    name: "DDR",
                    base: 0xE0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "dskTCI6482",
    boardFamily: "dskTCI6482",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CTCI6482",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR",
            {
                name: "DDR",
                base: 0xE0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR",
        {
            name: "DDR",
            base: 0xE0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:57 GMT


package ti.platforms.evm3530
index URL

Platform package for the evm3530 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm3530 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm3530/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm3530 [1, 0, 0] {
    module Platform;
    // Platform support for the evm3530
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm3530 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm3530.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:04 GMT


module ti.platforms.evm3530.Platform

metaonly module ti.platforms.evm3530.Platform
index URL

Platform support for the evm3530

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm3530/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm3530.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm3530",
        boardFamily: "evm3530",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 330,
        catalogName: "ti.catalog.c6000",
        deviceName: "OMAP3530",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 330,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "OMAP3530",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x8000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm3530",
    boardFamily: "evm3530",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 330,
    catalogName: "ti.catalog.c6000",
    deviceName: "OMAP3530",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 330,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "OMAP3530",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x8000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x8000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:04 GMT


package ti.platforms.evm6424
index URL

Platform package for the evm6424 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6424 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm6424/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6424 [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evm6424
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6424 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6424.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:01 GMT


module ti.platforms.evm6424.Platform

metaonly module ti.platforms.evm6424.Platform
index URL

Platform support for the evm6424

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm6424/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6424.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6424",
        boardFamily: "evm6424",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 594,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6424",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x08000000
                }
            ],
            [
                "SRAM",
                {
                    name: "SRAM",
                    base: 0x42000000,
                    len: 0x00200000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6424",
    boardFamily: "evm6424",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 594,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6424",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x08000000
            }
        ],
        [
            "SRAM",
            {
                name: "SRAM",
                base: 0x42000000,
                len: 0x00200000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x08000000
        }
    ],
    [
        "SRAM",
        {
            name: "SRAM",
            base: 0x42000000,
            len: 0x00200000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:01 GMT


package ti.platforms.evm6452
index URL

Platform package for the evm6452 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6452 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm6452/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6452 [1, 0, 1] {
    module Platform;
    // Platform support for the evm6452
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6452 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6452.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:52 GMT


module ti.platforms.evm6452.Platform

metaonly module ti.platforms.evm6452.Platform
index URL

Platform support for the evm6452

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm6452/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6452.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6452",
        boardFamily: "evm6452",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 891,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6452",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xE0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6452",
    boardFamily: "evm6452",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 891,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6452",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xE0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xE0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:52 GMT


package ti.platforms.evm6457
index URL

Platform package for the evm6457 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6457 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm6457/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6457 [1, 0, 0] {
    module Platform;
    // Platform support for the evm6457
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6457 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6457.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:01 GMT


module ti.platforms.evm6457.Platform

metaonly module ti.platforms.evm6457.Platform
index URL

Platform support for the evm6457

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm6457/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6457.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6457",
        boardFamily: "evm6457",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6457",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xe0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6457",
    boardFamily: "evm6457",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6457",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xe0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xe0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:01 GMT


package ti.platforms.evm6472
index URL

Platform package for the evm6472 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6472 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm6472/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6472 [1, 0, 0] {
    module Platform;
    // Platform support for the evm6472
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6472 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6472.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:00 GMT


module ti.platforms.evm6472.Platform

metaonly module ti.platforms.evm6472.Platform
index URL

Platform support for the evm6472

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm6472/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6472.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6472",
        boardFamily: "evm6472",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 700,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6472",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "LL2RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "LL2RAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xe0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "LL2RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6472",
    boardFamily: "evm6472",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 700,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6472",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "LL2RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "LL2RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xe0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "LL2RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "LL2RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "LL2RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xe0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "LL2RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:00 GMT


package ti.platforms.evm6474
index URL

Platform package for the evm6474 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6474 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm6474/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6474 [1, 0, 0] {
    module Platform;
    // Platform support for the evm6474
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6474 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6474.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:05 GMT


module ti.platforms.evm6474.Platform

metaonly module ti.platforms.evm6474.Platform
index URL

Platform support for the evm6474

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm6474/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6474.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6474",
        boardFamily: "evm6474",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1044,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6474",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x08000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6474",
    boardFamily: "evm6474",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1044,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6474",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x08000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x08000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:05 GMT


package ti.platforms.evm6614
index URL

Platform package for the 6614 EVM

XDCspec declarations sourced in ti/platforms/evm6614/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6614 [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evm6614 Appleton
}
generated on Sun, 25 Nov 2018 22:20:50 GMT


module ti.platforms.evm6614.Platform

metaonly module ti.platforms.evm6614.Platform
index URL

Platform support for the evm6614 Appleton

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evm6614/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6614.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6614",
        boardFamily: "evm6614",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TCI6614",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L2SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L2SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0xA0000000,
                    len: 0x20000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L2SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6614",
    boardFamily: "evm6614",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TCI6614",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L2SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L2SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0xA0000000,
                len: 0x20000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L2SRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0xA0000000,
            len: 0x20000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:50 GMT


package ti.platforms.evm6657
index URL

Platform package for the 6657 EVM

XDCspec declarations sourced in ti/platforms/evm6657/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6657 [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evm6657
}
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6657.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:04 GMT


module ti.platforms.evm6657.Platform

metaonly module ti.platforms.evm6657.Platform
index URL

Platform support for the evm6657

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evm6657/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6657.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6657",
        boardFamily: "evm6657",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6657",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L2SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L2SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x20000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L2SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6657",
    boardFamily: "evm6657",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6657",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L2SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L2SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x20000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L2SRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x20000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:04 GMT


package ti.platforms.evm6670
index URL

Platform package for the 6670 EVM

XDCspec declarations sourced in ti/platforms/evm6670/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6670 [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evm6670
}
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6670.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:56 GMT


module ti.platforms.evm6670.Platform

metaonly module ti.platforms.evm6670.Platform
index URL

Platform support for the evm6670

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evm6670/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6670.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6670",
        boardFamily: "evm6670",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6670",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L2SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L2SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x20000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L2SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6670",
    boardFamily: "evm6670",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6670",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L2SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L2SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x20000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L2SRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x20000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:56 GMT


package ti.platforms.evm6678
index URL

Platform package for the 6678 EVM

XDCspec declarations sourced in ti/platforms/evm6678/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6678 [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evm6678
}
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6678.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:02 GMT


module ti.platforms.evm6678.Platform

metaonly module ti.platforms.evm6678.Platform
index URL

Platform support for the evm6678

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evm6678/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6678.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6678",
        boardFamily: "evm6678",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6678",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L2SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L2SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x20000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L2SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6678",
    boardFamily: "evm6678",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6678",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L2SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L2SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x20000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L2SRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x20000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:02 GMT


package ti.platforms.evm6747
index URL

Platform package for the evm6747 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6747 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm6747/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6747 [1, 0, 0] {
    module Platform;
    // Platform support for the evm6747
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6747 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6747.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:55 GMT


module ti.platforms.evm6747.Platform

metaonly module ti.platforms.evm6747.Platform
index URL

Platform support for the evm6747

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm6747/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6747.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6747",
        boardFamily: "evm6747",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 300.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6747",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SDRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SDRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SDRAM",
                {
                    name: "SDRAM",
                    base: 0xC0000000,
                    len: 0x04000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "SDRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6747",
    boardFamily: "evm6747",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 300.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6747",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SDRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SDRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SDRAM",
            {
                name: "SDRAM",
                base: 0xC0000000,
                len: 0x04000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "SDRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SDRAM",
        {
            name: "SDRAM",
            base: 0xC0000000,
            len: 0x04000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:55 GMT


package ti.platforms.evm6748
index URL

Platform package for the evm6748 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6748 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evm6748/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evm6748 [1, 0, 0] {
    module Platform;
    // Platform support for the evm6748
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evm6748 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evm6748.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:51 GMT


module ti.platforms.evm6748.Platform

metaonly module ti.platforms.evm6748.Platform
index URL

Platform support for the evm6748

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evm6748/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evm6748.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evm6748",
        boardFamily: "evm6748",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 300.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6748",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR",
                {
                    name: "DDR",
                    base: 0xC0000000,
                    len: 0x08000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evm6748",
    boardFamily: "evm6748",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 300.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6748",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR",
            {
                name: "DDR",
                base: 0xC0000000,
                len: 0x08000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR",
        {
            name: "DDR",
            base: 0xC0000000,
            len: 0x08000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:51 GMT


package ti.platforms.evmAM3359
index URL

Platform package for the evmAM3359 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM3359 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmAM3359/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmAM3359 [1, 0, 0] {
    module Platform;
    // Platform support for the evmAM3359
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM3359 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmAM3359.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:53 GMT


module ti.platforms.evmAM3359.Platform

metaonly module ti.platforms.evmAM3359.Platform
index URL

Platform support for the evmAM3359

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmAM3359/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmAM3359.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmAM3359",
        boardFamily: "evmAM3359",
        boardRevision: null
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 550.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "AM3359",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    comment: "DDR3 Memory",
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x20000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmAM3359",
    boardFamily: "evmAM3359",
    boardRevision: null
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 550.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "AM3359",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                comment: "DDR3 Memory",
                name: "DDR3",
                base: 0x80000000,
                len: 0x20000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            comment: "DDR3 Memory",
            name: "DDR3",
            base: 0x80000000,
            len: 0x20000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:53 GMT


package ti.platforms.evmAM3505
index URL

Platform package for the evmAM3505 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM3505 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmAM3505/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmAM3505 [1, 0, 0] {
    module Platform;
    // Platform support for the evmAM3505
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM3505 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmAM3505.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:55 GMT


module ti.platforms.evmAM3505.Platform

metaonly module ti.platforms.evmAM3505.Platform
index URL

Platform support for the evmAM3505

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmAM3505/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmAM3505.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmAM3505",
        boardFamily: "evmAM3505",
        boardRevision: null
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "AM3505",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    comment: "DDR3 Memory",
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x04000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmAM3505",
    boardFamily: "evmAM3505",
    boardRevision: null
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "AM3505",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                comment: "DDR3 Memory",
                name: "DDR3",
                base: 0x80000000,
                len: 0x04000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            comment: "DDR3 Memory",
            name: "DDR3",
            base: 0x80000000,
            len: 0x04000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:55 GMT


package ti.platforms.evmAM3517
index URL

Platform package for the evmAM3517 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM3517 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmAM3517/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmAM3517 [1, 0, 0] {
    module Platform;
    // Platform support for the evmAM3517
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM3517 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmAM3517.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:55 GMT


module ti.platforms.evmAM3517.Platform

metaonly module ti.platforms.evmAM3517.Platform
index URL

Platform support for the evmAM3517

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmAM3517/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmAM3517.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmAM3517",
        boardFamily: "evmAM3517",
        boardRevision: null
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "AM3517",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    comment: "DDR3 Memory",
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x04000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmAM3517",
    boardFamily: "evmAM3517",
    boardRevision: null
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "AM3517",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                comment: "DDR3 Memory",
                name: "DDR3",
                base: 0x80000000,
                len: 0x04000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            comment: "DDR3 Memory",
            name: "DDR3",
            base: 0x80000000,
            len: 0x04000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:55 GMT


package ti.platforms.evmAM437X
index URL

Platform package for the evmAM437X platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM437X platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmAM437X/package.xdc
requires ti.catalog.arm.cortexa9;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmAM437X [1, 0, 0] {
    module Platform;
    // Platform support for the evmAM437X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmAM437X platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmAM437X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:55 GMT


module ti.platforms.evmAM437X.Platform

metaonly module ti.platforms.evmAM437X.Platform
index URL

Platform support for the evmAM437X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmAM437X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmAM437X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmAM437X",
        boardFamily: "evmAM437X",
        boardRevision: null
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa9",
        deviceName: "AM437X",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "EXT_RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "EXT_RAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "External RAM",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x08000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "EXT_RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmAM437X",
    boardFamily: "evmAM437X",
    boardRevision: null
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa9",
    deviceName: "AM437X",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "EXT_RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "EXT_RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "EXT_RAM",
            {
                comment: "External RAM",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x08000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "EXT_RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "External RAM",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x08000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:55 GMT


package ti.platforms.evmAM571X
index URL

Platform package for the AM571X SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM571X SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmAM571X/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm4;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmAM571X [1, 0, 0, 0] {
    module Platform;
    // Platform support for AM571X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM571X SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.evmAM571X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:57 GMT


module ti.platforms.evmAM571X.Platform

metaonly module ti.platforms.evmAM571X.Platform
index URL

Platform support for AM571X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmAM571X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmAM571X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmAM571X",
        boardFamily: "evmAM571X",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 700,
        catalogName: "ti.catalog.c6000",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.DSP1// = Any {
        externalMemoryMap: [
            [
                "DSP1_PROG",
                {
                    name: "DSP1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8C000000,
                    len: 0x1000000,
                    comment: "DSP1 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP1_PROG",
        dataMemory: "DSP1_PROG",
        stackMemory: "DSP1_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "3",
        clockRate: 1500.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.HOST// = Any {
        externalMemoryMap: [
            [
                "HOST_PROG",
                {
                    name: "HOST_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8B000000,
                    len: 0x1000000,
                    comment: "HOST Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "HOST_PROG",
        dataMemory: "HOST_PROG",
        stackMemory: "HOST_PROG"
    };
    const Platform.IPU1// = Any {
        externalMemoryMap: [
            [
                "IPU1_PROG",
                {
                    name: "IPU1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A000000,
                    len: 0x800000,
                    comment: "IPU1 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU1_PROG",
        dataMemory: "IPU1_PROG",
        stackMemory: "IPU1_PROG"
    };
    const Platform.IPU2// = Any {
        externalMemoryMap: [
            [
                "IPU2_PROG",
                {
                    name: "IPU2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A800000,
                    len: 0x800000,
                    comment: "IPU2 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU2_PROG",
        dataMemory: "IPU2_PROG",
        stackMemory: "IPU2_PROG"
    };
    const Platform.M4// = IExeContext.Cpu {
        id: "1",
        clockRate: 212.8,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.SR_0// = Any {
        name: "SR_0",
        space: "data",
        access: "RWX",
        base: 0x8E000000,
        len: 0x1000000,
        comment: "SR#0 Memory (16 MB)"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// Memory regions as defined in the AM571X Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "2 GB External RAM Memory",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 1 Cortex-A15, 2 Benelli/IPU Sub-system (Dual M4's) and 1 C66x DSP's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmAM571X",
    boardFamily: "evmAM571X",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 700,
    catalogName: "ti.catalog.c6000",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.DSP1 // module-wide
index URL
Configuration settings
const Platform.DSP1 = Any {
    externalMemoryMap: [
        [
            "DSP1_PROG",
            {
                name: "DSP1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8C000000,
                len: 0x1000000,
                comment: "DSP1 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP1_PROG",
    dataMemory: "DSP1_PROG",
    stackMemory: "DSP1_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "3",
    clockRate: 1500.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.HOST // module-wide
index URL
Configuration settings
const Platform.HOST = Any {
    externalMemoryMap: [
        [
            "HOST_PROG",
            {
                name: "HOST_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8B000000,
                len: 0x1000000,
                comment: "HOST Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "HOST_PROG",
    dataMemory: "HOST_PROG",
    stackMemory: "HOST_PROG"
};
config Platform.IPU1 // module-wide
index URL
Configuration settings
const Platform.IPU1 = Any {
    externalMemoryMap: [
        [
            "IPU1_PROG",
            {
                name: "IPU1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A000000,
                len: 0x800000,
                comment: "IPU1 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU1_PROG",
    dataMemory: "IPU1_PROG",
    stackMemory: "IPU1_PROG"
};
config Platform.IPU2 // module-wide
index URL
Configuration settings
const Platform.IPU2 = Any {
    externalMemoryMap: [
        [
            "IPU2_PROG",
            {
                name: "IPU2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A800000,
                len: 0x800000,
                comment: "IPU2 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU2_PROG",
    dataMemory: "IPU2_PROG",
    stackMemory: "IPU2_PROG"
};
config Platform.M4 // module-wide
index URL
Configuration settings
const Platform.M4 = IExeContext.Cpu {
    id: "1",
    clockRate: 212.8,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.SR_0 // module-wide
index URL
Configuration settings
const Platform.SR_0 = Any {
    name: "SR_0",
    space: "data",
    access: "RWX",
    base: 0x8E000000,
    len: 0x1000000,
    comment: "SR#0 Memory (16 MB)"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the AM571X Specification
        [
            "EXT_RAM",
            {
                comment: "2 GB External RAM Memory",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the AM571X Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "2 GB External RAM Memory",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:57 GMT


package ti.platforms.evmAM572X
index URL

Platform package for the AM572X SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM572X SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmAM572X/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm4;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmAM572X [1, 0, 0, 0] {
    module Platform;
    // Platform support for AM572X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM572X SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.evmAM572X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:00 GMT


module ti.platforms.evmAM572X.Platform

metaonly module ti.platforms.evmAM572X.Platform
index URL

Platform support for AM572X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmAM572X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmAM572X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmAM572X",
        boardFamily: "evmAM572X",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 700,
        catalogName: "ti.catalog.c6000",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.DSP1// = Any {
        externalMemoryMap: [
            [
                "DSP1_PROG",
                {
                    name: "DSP1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8C000000,
                    len: 0x1000000,
                    comment: "DSP1 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP1_PROG",
        dataMemory: "DSP1_PROG",
        stackMemory: "DSP1_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.DSP2// = Any {
        externalMemoryMap: [
            [
                "DSP2_PROG",
                {
                    name: "DSP2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8D000000,
                    len: 0x1000000,
                    comment: "DSP2 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP2_PROG",
        dataMemory: "DSP2_PROG",
        stackMemory: "DSP2_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "3",
        clockRate: 1500.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.HOST// = Any {
        externalMemoryMap: [
            [
                "HOST_PROG",
                {
                    name: "HOST_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8B000000,
                    len: 0x1000000,
                    comment: "HOST Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "HOST_PROG",
        dataMemory: "HOST_PROG",
        stackMemory: "HOST_PROG"
    };
    const Platform.IPU1// = Any {
        externalMemoryMap: [
            [
                "IPU1_PROG",
                {
                    name: "IPU1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A000000,
                    len: 0x800000,
                    comment: "IPU1 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU1_PROG",
        dataMemory: "IPU1_PROG",
        stackMemory: "IPU1_PROG"
    };
    const Platform.IPU2// = Any {
        externalMemoryMap: [
            [
                "IPU2_PROG",
                {
                    name: "IPU2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A800000,
                    len: 0x800000,
                    comment: "IPU2 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU2_PROG",
        dataMemory: "IPU2_PROG",
        stackMemory: "IPU2_PROG"
    };
    const Platform.M4// = IExeContext.Cpu {
        id: "1",
        clockRate: 212.8,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.SR_0// = Any {
        name: "SR_0",
        space: "data",
        access: "RWX",
        base: 0x8E000000,
        len: 0x1000000,
        comment: "SR#0 Memory (16 MB)"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// Memory regions as defined in the AM572X Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "2 GB External RAM Memory",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 1 Cortex-A15, 2 Benelli/IPU Sub-system (Dual M4's) and 2 C66x DSP's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmAM572X",
    boardFamily: "evmAM572X",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 700,
    catalogName: "ti.catalog.c6000",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.DSP1 // module-wide
index URL
Configuration settings
const Platform.DSP1 = Any {
    externalMemoryMap: [
        [
            "DSP1_PROG",
            {
                name: "DSP1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8C000000,
                len: 0x1000000,
                comment: "DSP1 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP1_PROG",
    dataMemory: "DSP1_PROG",
    stackMemory: "DSP1_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.DSP2 // module-wide
index URL
Configuration settings
const Platform.DSP2 = Any {
    externalMemoryMap: [
        [
            "DSP2_PROG",
            {
                name: "DSP2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8D000000,
                len: 0x1000000,
                comment: "DSP2 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP2_PROG",
    dataMemory: "DSP2_PROG",
    stackMemory: "DSP2_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "3",
    clockRate: 1500.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.HOST // module-wide
index URL
Configuration settings
const Platform.HOST = Any {
    externalMemoryMap: [
        [
            "HOST_PROG",
            {
                name: "HOST_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8B000000,
                len: 0x1000000,
                comment: "HOST Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "HOST_PROG",
    dataMemory: "HOST_PROG",
    stackMemory: "HOST_PROG"
};
config Platform.IPU1 // module-wide
index URL
Configuration settings
const Platform.IPU1 = Any {
    externalMemoryMap: [
        [
            "IPU1_PROG",
            {
                name: "IPU1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A000000,
                len: 0x800000,
                comment: "IPU1 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU1_PROG",
    dataMemory: "IPU1_PROG",
    stackMemory: "IPU1_PROG"
};
config Platform.IPU2 // module-wide
index URL
Configuration settings
const Platform.IPU2 = Any {
    externalMemoryMap: [
        [
            "IPU2_PROG",
            {
                name: "IPU2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A800000,
                len: 0x800000,
                comment: "IPU2 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU2_PROG",
    dataMemory: "IPU2_PROG",
    stackMemory: "IPU2_PROG"
};
config Platform.M4 // module-wide
index URL
Configuration settings
const Platform.M4 = IExeContext.Cpu {
    id: "1",
    clockRate: 212.8,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.SR_0 // module-wide
index URL
Configuration settings
const Platform.SR_0 = Any {
    name: "SR_0",
    space: "data",
    access: "RWX",
    base: 0x8E000000,
    len: 0x1000000,
    comment: "SR#0 Memory (16 MB)"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the AM572X Specification
        [
            "EXT_RAM",
            {
                comment: "2 GB External RAM Memory",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the AM572X Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "2 GB External RAM Memory",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:00 GMT


package ti.platforms.evmC66AK2E
index URL

Platform package for the 66AK2E evm

XDCspec declarations sourced in ti/platforms/evmC66AK2E/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmC66AK2E [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evmTCI6630K2L
}
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmC66AK2E.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:53 GMT


module ti.platforms.evmC66AK2E.Platform

metaonly module ti.platforms.evmC66AK2E.Platform
index URL

Platform support for the evmTCI6630K2L

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evmC66AK2E/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmC66AK2E.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmC66AK2E",
        boardFamily: "evmC66AK2E",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1400,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C66AK2E05",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 125.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "C66AK2E05",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmC66AK2E",
    boardFamily: "evmC66AK2E",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1400,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C66AK2E05",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 125.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "C66AK2E05",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:53 GMT


package ti.platforms.evmC6A8149
index URL

Platform package for the evmC6A8149 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmC6A8149 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmC6A8149/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires ti.catalog.arp32;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmC6A8149 [1, 0, 0] {
    module Platform;
    // Platform support for the evmC6A8149
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmC6A8149 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmC6A8149.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:53 GMT


module ti.platforms.evmC6A8149.Platform

metaonly module ti.platforms.evmC6A8149.Platform
index URL

Platform support for the evmC6A8149

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmC6A8149/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmC6A8149.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmC6A8149",
        boardFamily: "evmC6A8149",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "2",
        clockRate: 200.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320C6A8149",
        revision: "1.0"
    };
    const Platform.EVE// = IExeContext.Cpu {
        id: "1",
        clockRate: 225.0,
        catalogName: "ti.catalog.arp32",
        deviceName: "TMS320C6A8149",
        revision: ""
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 500.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6A8149",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "3",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320C6A8149",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_HOST",
                {
                    comment: "DDR3 Memory reserved for use by the A8",
                    name: "DDR3_HOST",
                    base: 0x80000000,
                    len: 0x0B000000
                }
            ],
            [
                "DDR3_DSP",
                {
                    comment: "DDR3 Memory reserved for use by the C674",
                    name: "DDR3_DSP",
                    base: 0x8B000000,
                    len: 0x02000000
                }
            ],
            [
                "DDR3_SR1",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
                    name: "DDR3_SR1",
                    base: 0x8D000000,
                    len: 0x00C00000
                }
            ],
            [
                "DDR3_HDVPSS",
                {
                    comment: "DDR3 Memory reserved for use by HDVPSS",
                    name: "DDR3_HDVPSS",
                    base: 0x8DC00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_V4L2",
                {
                    comment: "DDR3 Memory reserved for use by V4L2",
                    name: "DDR3_V4L2",
                    base: 0x8DE00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_SR0",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
                    name: "DDR3_SR0",
                    base: 0x8E000000,
                    len: 0x01000000
                }
            ],
            [
                "DDR3_M3",
                {
                    comment: "DDR3 Memory reserved for use by the M3 core",
                    name: "DDR3_M3",
                    base: 0x8F000000,
                    len: 0x01000000
                }
            ],
            [
                "DDR3_EVEVECS",
                {
                    comment: "DDR3 Memory reserved for use by the EVE int vectors",
                    name: "DDR3_EVEVECS",
                    base: 0x90000000,
                    len: 0x00000100
                }
            ],
            [
                "DDR3_EVE",
                {
                    comment: "DDR3 Memory reserved for use by the EVE",
                    name: "DDR3_EVE",
                    base: 0x90000100,
                    len: 0x00FFFF00
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C674 DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmC6A8149",
    boardFamily: "evmC6A8149",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "2",
    clockRate: 200.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320C6A8149",
    revision: "1.0"
};
config Platform.EVE // module-wide
index URL
Configuration settings
const Platform.EVE = IExeContext.Cpu {
    id: "1",
    clockRate: 225.0,
    catalogName: "ti.catalog.arp32",
    deviceName: "TMS320C6A8149",
    revision: ""
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 500.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6A8149",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "3",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320C6A8149",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_HOST",
            {
                comment: "DDR3 Memory reserved for use by the A8",
                name: "DDR3_HOST",
                base: 0x80000000,
                len: 0x0B000000
            }
        ],
        [
            "DDR3_DSP",
            {
                comment: "DDR3 Memory reserved for use by the C674",
                name: "DDR3_DSP",
                base: 0x8B000000,
                len: 0x02000000
            }
        ],
        [
            "DDR3_SR1",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 1",
                name: "DDR3_SR1",
                base: 0x8D000000,
                len: 0x00C00000
            }
        ],
        [
            "DDR3_HDVPSS",
            {
                comment: "DDR3 Memory reserved for use by HDVPSS",
                name: "DDR3_HDVPSS",
                base: 0x8DC00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_V4L2",
            {
                comment: "DDR3 Memory reserved for use by V4L2",
                name: "DDR3_V4L2",
                base: 0x8DE00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_SR0",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 0",
                name: "DDR3_SR0",
                base: 0x8E000000,
                len: 0x01000000
            }
        ],
        [
            "DDR3_M3",
            {
                comment: "DDR3 Memory reserved for use by the M3 core",
                name: "DDR3_M3",
                base: 0x8F000000,
                len: 0x01000000
            }
        ],
        [
            "DDR3_EVEVECS",
            {
                comment: "DDR3 Memory reserved for use by the EVE int vectors",
                name: "DDR3_EVEVECS",
                base: 0x90000000,
                len: 0x00000100
            }
        ],
        [
            "DDR3_EVE",
            {
                comment: "DDR3 Memory reserved for use by the EVE",
                name: "DDR3_EVE",
                base: 0x90000100,
                len: 0x00FFFF00
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_HOST",
        {
            comment: "DDR3 Memory reserved for use by the A8",
            name: "DDR3_HOST",
            base: 0x80000000,
            len: 0x0B000000
        }
    ],
    [
        "DDR3_DSP",
        {
            comment: "DDR3 Memory reserved for use by the C674",
            name: "DDR3_DSP",
            base: 0x8B000000,
            len: 0x02000000
        }
    ],
    [
        "DDR3_SR1",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 1",
            name: "DDR3_SR1",
            base: 0x8D000000,
            len: 0x00C00000
        }
    ],
    [
        "DDR3_HDVPSS",
        {
            comment: "DDR3 Memory reserved for use by HDVPSS",
            name: "DDR3_HDVPSS",
            base: 0x8DC00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_V4L2",
        {
            comment: "DDR3 Memory reserved for use by V4L2",
            name: "DDR3_V4L2",
            base: 0x8DE00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_SR0",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 0",
            name: "DDR3_SR0",
            base: 0x8E000000,
            len: 0x01000000
        }
    ],
    [
        "DDR3_M3",
        {
            comment: "DDR3 Memory reserved for use by the M3 core",
            name: "DDR3_M3",
            base: 0x8F000000,
            len: 0x01000000
        }
    ],
    [
        "DDR3_EVEVECS",
        {
            comment: "DDR3 Memory reserved for use by the EVE int vectors",
            name: "DDR3_EVEVECS",
            base: 0x90000000,
            len: 0x00000100
        }
    ],
    [
        "DDR3_EVE",
        {
            comment: "DDR3 Memory reserved for use by the EVE",
            name: "DDR3_EVE",
            base: 0x90000100,
            len: 0x00FFFF00
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:53 GMT


package ti.platforms.evmDA830
index URL

Platform package for the evmDA830 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDA830 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDA830/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDA830 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDA830
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDA830 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDA830.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:01 GMT


module ti.platforms.evmDA830.Platform

metaonly module ti.platforms.evmDA830.Platform
index URL

Platform support for the evmDA830

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDA830/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDA830.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDA830",
        boardFamily: "evmDA830",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 300.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320DA830",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 300.0,
        catalogName: "ti.catalog.arm",
        deviceName: "TMS320DA830",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SDRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SDRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SDRAM",
                {
                    name: "SDRAM",
                    base: 0xC3000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "SDRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDA830",
    boardFamily: "evmDA830",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 300.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320DA830",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 300.0,
    catalogName: "ti.catalog.arm",
    deviceName: "TMS320DA830",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SDRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SDRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SDRAM",
            {
                name: "SDRAM",
                base: 0xC3000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "SDRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SDRAM",
        {
            name: "SDRAM",
            base: 0xC3000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:01 GMT


package ti.platforms.evmDA850
index URL

Platform package for the evmDA850 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDA850 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDA850/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDA850 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDA850
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDA850 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDA850.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:05 GMT


module ti.platforms.evmDA850.Platform

metaonly module ti.platforms.evmDA850.Platform
index URL

Platform support for the evmDA850

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDA850/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDA850.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDA850",
        boardFamily: "evmDA850",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 400.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320DA850",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 400.0,
        catalogName: "ti.catalog.arm",
        deviceName: "TMS320DA850",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SDRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SDRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SDRAM",
                {
                    name: "SDRAM",
                    base: 0xC3000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "SDRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDA850",
    boardFamily: "evmDA850",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 400.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320DA850",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 400.0,
    catalogName: "ti.catalog.arm",
    deviceName: "TMS320DA850",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SDRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SDRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SDRAM",
            {
                name: "SDRAM",
                base: 0xC3000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "SDRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SDRAM",
        {
            name: "SDRAM",
            base: 0xC3000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:05 GMT


package ti.platforms.evmDM355
index URL

Platform package for the evmDM355 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM355 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDM355/package.xdc
requires ti.catalog.arm;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDM355 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDM355
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM355 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDM355.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:59 GMT


module ti.platforms.evmDM355.Platform

metaonly module ti.platforms.evmDM355.Platform
index URL

Platform support for the evmDM355

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDM355/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDM355.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "evmDM355",
        boardFamily: "evmDM355",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 216.0,
        catalogName: "ti.catalog.arm",
        deviceName: "TMS320DM355",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x8000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDM355",
    boardFamily: "evmDM355",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 216.0,
    catalogName: "ti.catalog.arm",
    deviceName: "TMS320DM355",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x8000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x8000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:59 GMT


package ti.platforms.evmDM365
index URL

Platform package for the evmDM365 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM365 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDM365/package.xdc
requires ti.catalog.arm;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDM365 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDM365
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM365 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDM365.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:04 GMT


module ti.platforms.evmDM365.Platform

metaonly module ti.platforms.evmDM365.Platform
index URL

Platform support for the evmDM365

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDM365/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDM365.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "evmDM365",
        boardFamily: "evmDM365",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 216.0,
        catalogName: "ti.catalog.arm",
        deviceName: "TMS320DM365",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR",
                {
                    name: "DDR",
                    base: 0x80000000,
                    len: 0x1000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the XDC object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDM365",
    boardFamily: "evmDM365",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 216.0,
    catalogName: "ti.catalog.arm",
    deviceName: "TMS320DM365",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR",
            {
                name: "DDR",
                base: 0x80000000,
                len: 0x1000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR",
        {
            name: "DDR",
            base: 0x80000000,
            len: 0x1000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:04 GMT


package ti.platforms.evmDM37XX
index URL

Platform package for the evmDM37XX platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM37XX platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDM37XX/package.xdc
requires ti.catalog.arm;
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDM37XX [1, 0, 0] {
    module Platform;
    // Platform support for the evmDM37XX
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM37XX platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDM37XX.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:02 GMT


module ti.platforms.evmDM37XX.Platform

metaonly module ti.platforms.evmDM37XX.Platform
index URL

Platform support for the evmDM37XX

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDM37XX/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDM37XX.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDM37XX",
        boardFamily: "evmDM37XX",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 332.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "DM37XX",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 332.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "DM37XX",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR",
                {
                    name: "DDR",
                    base: 0x80000000,
                    len: 0x04000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has multiple CPUs, and therefore, declares multiple CPU configuration objects.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDM37XX",
    boardFamily: "evmDM37XX",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 332.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "DM37XX",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 332.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "DM37XX",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR",
            {
                name: "DDR",
                base: 0x80000000,
                len: 0x04000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR",
        {
            name: "DDR",
            base: 0x80000000,
            len: 0x04000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:02 GMT


package ti.platforms.evmDM6437
index URL

Platform package for the evmDM6437 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM6437 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDM6437/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDM6437 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDM6437
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM6437 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDM6437.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:59 GMT


module ti.platforms.evmDM6437.Platform

metaonly module ti.platforms.evmDM6437.Platform
index URL

Platform support for the evmDM6437

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDM6437/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDM6437.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDM6437",
        boardFamily: "evmDM6437",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 594,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CDM6437",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x8000000
                }
            ],
            [
                "SRAM",
                {
                    name: "SRAM",
                    base: 0x42000000,
                    len: 0x0200000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDM6437",
    boardFamily: "evmDM6437",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 594,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CDM6437",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x8000000
            }
        ],
        [
            "SRAM",
            {
                name: "SRAM",
                base: 0x42000000,
                len: 0x0200000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x8000000
        }
    ],
    [
        "SRAM",
        {
            name: "SRAM",
            base: 0x42000000,
            len: 0x0200000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:59 GMT


package ti.platforms.evmDM648
index URL

Platform package for the evmDM648 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM648 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDM648/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDM648 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDM648
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM648 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDM648.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:05 GMT


module ti.platforms.evmDM648.Platform

metaonly module ti.platforms.evmDM648.Platform
index URL

Platform support for the evmDM648

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDM648/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDM648.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDM648",
        boardFamily: "evmDM648",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 891,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CDM648",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xE0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDM648",
    boardFamily: "evmDM648",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 891,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CDM648",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xE0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xE0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:05 GMT


package ti.platforms.evmDM8148
index URL

Platform package for the evmDM8148 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM8148 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDM8148/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDM8148 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDM8148
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM8148 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDM8148.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:53 GMT


module ti.platforms.evmDM8148.Platform

metaonly module ti.platforms.evmDM8148.Platform
index URL

Platform support for the evmDM8148

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDM8148/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDM8148.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDM8148",
        boardFamily: "evmDM8148",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 200.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320DM8148",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 500.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320DM8148",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320DM8148",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR3_RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR3_RAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_RAM",
                {
                    comment: "External RAM",
                    name: "DDR3_RAM",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR3_RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C674 DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDM8148",
    boardFamily: "evmDM8148",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 200.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320DM8148",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 500.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320DM8148",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320DM8148",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR3_RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR3_RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_RAM",
            {
                comment: "External RAM",
                name: "DDR3_RAM",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR3_RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_RAM",
        {
            comment: "External RAM",
            name: "DDR3_RAM",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:53 GMT


package ti.platforms.evmDM8168
index URL

Platform package for the evmDM8168 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM8168 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDM8168/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDM8168 [1, 0, 0] {
    module Platform;
    // Platform support for the evmDM8168
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmDM8168 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmDM8168.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:50 GMT


module ti.platforms.evmDM8168.Platform

metaonly module ti.platforms.evmDM8168.Platform
index URL

Platform support for the evmDM8168

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDM8168/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDM8168.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDM8168",
        boardFamily: "evmDM8168",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 250.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320DM8168",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 800.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320DM8168",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 1000.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320DM8168",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR3_RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR3_RAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_RAM",
                {
                    comment: "External RAM",
                    name: "DDR3_RAM",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR3_RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C674 DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDM8168",
    boardFamily: "evmDM8168",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 250.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320DM8168",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 800.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320DM8168",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 1000.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320DM8168",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR3_RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR3_RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_RAM",
            {
                comment: "External RAM",
                name: "DDR3_RAM",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR3_RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_RAM",
        {
            comment: "External RAM",
            name: "DDR3_RAM",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:50 GMT


package ti.platforms.evmDRA7XX
index URL

Platform package for the DRA7XX SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the DRA74XX SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmDRA7XX/package.xdc
requires ti.catalog.arp32;
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm4;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmDRA7XX [1, 0, 0, 0] {
    module Platform;
    // Platform support for DRA7XX
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the DRA74XX SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.evmDRA74XX.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:03 GMT


module ti.platforms.evmDRA7XX.Platform

metaonly module ti.platforms.evmDRA7XX.Platform
index URL

Platform support for DRA7XX

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmDRA7XX/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmDRA7XX.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmDRA7XX",
        boardFamily: "evmDRA7XX",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 600,
        catalogName: "ti.catalog.c6000",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.DSP1// = Any {
        externalMemoryMap: [
            [
                "DSP1_PROG",
                {
                    name: "DSP1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8C000000,
                    len: 0x1000000,
                    comment: "DSP1 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP1_PROG",
        dataMemory: "DSP1_PROG",
        stackMemory: "DSP1_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.DSP2// = Any {
        externalMemoryMap: [
            [
                "DSP2_PROG",
                {
                    name: "DSP2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8D000000,
                    len: 0x1000000,
                    comment: "DSP2 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP2_PROG",
        dataMemory: "DSP2_PROG",
        stackMemory: "DSP2_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.EVE// = IExeContext.Cpu {
        id: "2",
        clockRate: 535.0,
        catalogName: "ti.catalog.arp32",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.EVE1// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80000000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE1 Vector Table (256 B)"
                }
            ],
            [
                "EVE1_PROG",
                {
                    name: "EVE1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x81000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE1 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE1_PROG",
        dataMemory: "EVE1_PROG",
        stackMemory: "EVE1_PROG"
    };
    const Platform.EVE2// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80010000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE2 Vector Table (256 B)"
                }
            ],
            [
                "EVE2_PROG",
                {
                    name: "EVE2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x82000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE2 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE2_PROG",
        dataMemory: "EVE2_PROG",
        stackMemory: "EVE2_PROG"
    };
    const Platform.EVE3// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80020000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE3 Vector Table (256 B)"
                }
            ],
            [
                "EVE3_PROG",
                {
                    name: "EVE3_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x83000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE3 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE3_PROG",
        dataMemory: "EVE3_PROG",
        stackMemory: "EVE3_PROG"
    };
    const Platform.EVE4// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80030000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE4 Vector Table (256 B)"
                }
            ],
            [
                "EVE4_PROG",
                {
                    name: "EVE4_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x84000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE4 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE4_PROG",
        dataMemory: "EVE4_PROG",
        stackMemory: "EVE4_PROG"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "3",
        clockRate: 1000.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.HOST// = Any {
        externalMemoryMap: [
            [
                "HOST_PROG",
                {
                    name: "HOST_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8B000000,
                    len: 0x1000000,
                    comment: "HOST Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "HOST_PROG",
        dataMemory: "HOST_PROG",
        stackMemory: "HOST_PROG"
    };
    const Platform.IPU1// = Any {
        externalMemoryMap: [
            [
                "IPU1_PROG",
                {
                    name: "IPU1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A000000,
                    len: 0x800000,
                    comment: "IPU1 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU1_PROG",
        dataMemory: "IPU1_PROG",
        stackMemory: "IPU1_PROG"
    };
    const Platform.IPU2// = Any {
        externalMemoryMap: [
            [
                "IPU2_PROG",
                {
                    name: "IPU2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A800000,
                    len: 0x800000,
                    comment: "IPU2 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU2_PROG",
        dataMemory: "IPU2_PROG",
        stackMemory: "IPU2_PROG"
    };
    const Platform.M4// = IExeContext.Cpu {
        id: "1",
        clockRate: 212.8,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.SR_0// = Any {
        name: "SR_0",
        space: "data",
        access: "RWX",
        base: 0x8E000000,
        len: 0x1000000,
        comment: "SR#0 Memory (16 MB)"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// Memory regions as defined in the DRA7XX Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "2 GB External RAM Memory",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 1 Cortex-A15, 4 EVE's, 2 Benelli/IPU Sub-system (Dual M4's) and 2 C66x DSP's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmDRA7XX",
    boardFamily: "evmDRA7XX",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 600,
    catalogName: "ti.catalog.c6000",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.DSP1 // module-wide
index URL
Configuration settings
const Platform.DSP1 = Any {
    externalMemoryMap: [
        [
            "DSP1_PROG",
            {
                name: "DSP1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8C000000,
                len: 0x1000000,
                comment: "DSP1 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP1_PROG",
    dataMemory: "DSP1_PROG",
    stackMemory: "DSP1_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.DSP2 // module-wide
index URL
Configuration settings
const Platform.DSP2 = Any {
    externalMemoryMap: [
        [
            "DSP2_PROG",
            {
                name: "DSP2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8D000000,
                len: 0x1000000,
                comment: "DSP2 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP2_PROG",
    dataMemory: "DSP2_PROG",
    stackMemory: "DSP2_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.EVE // module-wide
index URL
Configuration settings
const Platform.EVE = IExeContext.Cpu {
    id: "2",
    clockRate: 535.0,
    catalogName: "ti.catalog.arp32",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.EVE1 // module-wide
index URL
Configuration settings
const Platform.EVE1 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80000000,
                len: 0x100,
                page: 0,
                comment: "EVE1 Vector Table (256 B)"
            }
        ],
        [
            "EVE1_PROG",
            {
                name: "EVE1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x81000000,
                len: 0x400000,
                page: 1,
                comment: "EVE1 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE1_PROG",
    dataMemory: "EVE1_PROG",
    stackMemory: "EVE1_PROG"
};
config Platform.EVE2 // module-wide
index URL
Configuration settings
const Platform.EVE2 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80010000,
                len: 0x100,
                page: 0,
                comment: "EVE2 Vector Table (256 B)"
            }
        ],
        [
            "EVE2_PROG",
            {
                name: "EVE2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x82000000,
                len: 0x400000,
                page: 1,
                comment: "EVE2 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE2_PROG",
    dataMemory: "EVE2_PROG",
    stackMemory: "EVE2_PROG"
};
config Platform.EVE3 // module-wide
index URL
Configuration settings
const Platform.EVE3 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80020000,
                len: 0x100,
                page: 0,
                comment: "EVE3 Vector Table (256 B)"
            }
        ],
        [
            "EVE3_PROG",
            {
                name: "EVE3_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x83000000,
                len: 0x400000,
                page: 1,
                comment: "EVE3 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE3_PROG",
    dataMemory: "EVE3_PROG",
    stackMemory: "EVE3_PROG"
};
config Platform.EVE4 // module-wide
index URL
Configuration settings
const Platform.EVE4 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80030000,
                len: 0x100,
                page: 0,
                comment: "EVE4 Vector Table (256 B)"
            }
        ],
        [
            "EVE4_PROG",
            {
                name: "EVE4_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x84000000,
                len: 0x400000,
                page: 1,
                comment: "EVE4 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE4_PROG",
    dataMemory: "EVE4_PROG",
    stackMemory: "EVE4_PROG"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "3",
    clockRate: 1000.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.HOST // module-wide
index URL
Configuration settings
const Platform.HOST = Any {
    externalMemoryMap: [
        [
            "HOST_PROG",
            {
                name: "HOST_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8B000000,
                len: 0x1000000,
                comment: "HOST Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "HOST_PROG",
    dataMemory: "HOST_PROG",
    stackMemory: "HOST_PROG"
};
config Platform.IPU1 // module-wide
index URL
Configuration settings
const Platform.IPU1 = Any {
    externalMemoryMap: [
        [
            "IPU1_PROG",
            {
                name: "IPU1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A000000,
                len: 0x800000,
                comment: "IPU1 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU1_PROG",
    dataMemory: "IPU1_PROG",
    stackMemory: "IPU1_PROG"
};
config Platform.IPU2 // module-wide
index URL
Configuration settings
const Platform.IPU2 = Any {
    externalMemoryMap: [
        [
            "IPU2_PROG",
            {
                name: "IPU2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A800000,
                len: 0x800000,
                comment: "IPU2 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU2_PROG",
    dataMemory: "IPU2_PROG",
    stackMemory: "IPU2_PROG"
};
config Platform.M4 // module-wide
index URL
Configuration settings
const Platform.M4 = IExeContext.Cpu {
    id: "1",
    clockRate: 212.8,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.SR_0 // module-wide
index URL
Configuration settings
const Platform.SR_0 = Any {
    name: "SR_0",
    space: "data",
    access: "RWX",
    base: 0x8E000000,
    len: 0x1000000,
    comment: "SR#0 Memory (16 MB)"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the DRA7XX Specification
        [
            "EXT_RAM",
            {
                comment: "2 GB External RAM Memory",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the DRA7XX Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "2 GB External RAM Memory",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:03 GMT


package ti.platforms.evmOMAPL137
index URL

Platform package for the evmOMAPL137 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmOMAPL137 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmOMAPL137/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmOMAPL137 [1, 0, 0] {
    module Platform;
    // Platform support for the evmOMAPL137
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmOMAPL137 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmOMAPL137.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:58 GMT


module ti.platforms.evmOMAPL137.Platform

metaonly module ti.platforms.evmOMAPL137.Platform
index URL

Platform support for the evmOMAPL137

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmOMAPL137/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmOMAPL137.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmOMAPL137",
        boardFamily: "evmOMAPL137",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 300.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "OMAPL137",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 300.0,
        catalogName: "ti.catalog.arm",
        deviceName: "OMAPL137",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SDRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SDRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SDRAM",
                {
                    name: "SDRAM",
                    base: 0xC3000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "SDRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmOMAPL137",
    boardFamily: "evmOMAPL137",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 300.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "OMAPL137",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 300.0,
    catalogName: "ti.catalog.arm",
    deviceName: "OMAPL137",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SDRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SDRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SDRAM",
            {
                name: "SDRAM",
                base: 0xC3000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "SDRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SDRAM",
        {
            name: "SDRAM",
            base: 0xC3000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:58 GMT


package ti.platforms.evmOMAPL138
index URL

Platform package for the evmOMAPL138 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmOMAPL138 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmOMAPL138/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmOMAPL138 [1, 0, 0] {
    module Platform;
    // Platform support for the evmOMAPL138
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmOMAPL138 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmOMAPL138.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:03 GMT


module ti.platforms.evmOMAPL138.Platform

metaonly module ti.platforms.evmOMAPL138.Platform
index URL

Platform support for the evmOMAPL138

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmOMAPL138/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmOMAPL138.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmOMAPL138",
        boardFamily: "evmOMAPL138",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 300.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "OMAPL138",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 300.0,
        catalogName: "ti.catalog.arm",
        deviceName: "OMAPL138",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR",
                {
                    name: "DDR",
                    base: 0xC3000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmOMAPL138",
    boardFamily: "evmOMAPL138",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 300.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "OMAPL138",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 300.0,
    catalogName: "ti.catalog.arm",
    deviceName: "OMAPL138",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR",
            {
                name: "DDR",
                base: 0xC3000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR",
        {
            name: "DDR",
            base: 0xC3000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:03 GMT


package ti.platforms.evmTCI6484
index URL

Platform package for the evmTCI6484 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTCI6484 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTCI6484/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTCI6484 [1, 0, 0] {
    module Platform;
    // Platform support for the evmTCI6484
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTCI6484 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTCI6484.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:55 GMT


module ti.platforms.evmTCI6484.Platform

metaonly module ti.platforms.evmTCI6484.Platform
index URL

Platform support for the evmTCI6484

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTCI6484/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTCI6484.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTCI6484",
        boardFamily: "evmTCI6484",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CTCI6484",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xe0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTCI6484",
    boardFamily: "evmTCI6484",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CTCI6484",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xe0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xe0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:55 GMT


package ti.platforms.evmTCI6486
index URL

Platform package for the evmTCI6486 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTCI6486 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTCI6486/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTCI6486 [1, 0, 0] {
    module Platform;
    // Platform support for the evmTCI6486
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTCI6486 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTCI6486.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:58 GMT


module ti.platforms.evmTCI6486.Platform

metaonly module ti.platforms.evmTCI6486.Platform
index URL

Platform support for the evmTCI6486

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTCI6486/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTCI6486.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTCI6486",
        boardFamily: "evmTCI6486",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 500.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CTCI6486",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xe0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTCI6486",
    boardFamily: "evmTCI6486",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 500.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CTCI6486",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xe0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xe0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:58 GMT


package ti.platforms.evmTCI6488
index URL

Platform package for the evmTCI6488 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTCI6488 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTCI6488/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTCI6488 [1, 0, 0] {
    module Platform;
    // Platform support for the evmTCI6488
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTCI6488 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTCI6488.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:59 GMT


module ti.platforms.evmTCI6488.Platform

metaonly module ti.platforms.evmTCI6488.Platform
index URL

Platform support for the evmTCI6488

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTCI6488/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTCI6488.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTCI6488",
        boardFamily: "evmTCI6488",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1044,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CTCI6488",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x08000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTCI6488",
    boardFamily: "evmTCI6488",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1044,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CTCI6488",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x08000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x08000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:59 GMT


package ti.platforms.evmTCI6630K2L
index URL

Platform package for the TCI6630 evm

XDCspec declarations sourced in ti/platforms/evmTCI6630K2L/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTCI6630K2L [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evmTCI6630K2L
}
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTCIK2L.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:05 GMT


module ti.platforms.evmTCI6630K2L.Platform

metaonly module ti.platforms.evmTCI6630K2L.Platform
index URL

Platform support for the evmTCI6630K2L

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evmTCI6630K2L/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTCI6630K2L.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTCI6630K2L",
        boardFamily: "evmTCI6630K2L",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1220,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TCI6630K2L",
        revision: "1.2"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 125.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "TCI6630K2L",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTCI6630K2L",
    boardFamily: "evmTCI6630K2L",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1220,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TCI6630K2L",
    revision: "1.2"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 125.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "TCI6630K2L",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:05 GMT


package ti.platforms.evmTCI6636K2H
index URL

Platform package for the TCI6636 evm

XDCspec declarations sourced in ti/platforms/evmTCI6636K2H/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTCI6636K2H [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evmTCI6636K2H
}
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTCIK2X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:00 GMT


module ti.platforms.evmTCI6636K2H.Platform

metaonly module ti.platforms.evmTCI6636K2H.Platform
index URL

Platform support for the evmTCI6636K2H

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evmTCI6636K2H/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTCI6636K2H.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTCI6636K2H",
        boardFamily: "evmTCI6636K2H",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 1220,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TCI6636",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 125.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "TCI6636K2H",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTCI6636K2H",
    boardFamily: "evmTCI6636K2H",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 1220,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TCI6636",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 125.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "TCI6636K2H",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:00 GMT


package ti.platforms.evmTCI6638K2K
index URL

Platform package for the TCI6638 evm

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Kepler simulator platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTCI6638K2K/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTCI6638K2K [1, 0, 0, 0] {
    module Platform;
    // Platform support for the evmTCI6638K2K
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Kepler simulator platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTCIK2X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:51 GMT


module ti.platforms.evmTCI6638K2K.Platform

metaonly module ti.platforms.evmTCI6638K2K.Platform
index URL

Platform support for the evmTCI6638K2K

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evmTCI6638K2K/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTCI6638K2K.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTCIK2X",
        boardFamily: "evmTCIK2X",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1220,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TCI6638",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 125.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "TCI6638K2K",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTCIK2X",
    boardFamily: "evmTCIK2X",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1220,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TCI6638",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 125.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "TCI6638K2K",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:51 GMT


package ti.platforms.evmTCI66AK2G02
index URL

Platform package for the TCI66AK2G02 evm

XDCspec declarations sourced in ti/platforms/evmTCI66AK2G02/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTCI66AK2G02 [1, 0, 0, 0] {
    module Platform;
    // Platform support for TCI66AK2G02
}
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTCI66AK2G02.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:52 GMT


module ti.platforms.evmTCI66AK2G02.Platform

metaonly module ti.platforms.evmTCI66AK2G02.Platform
index URL

Platform support for TCI66AK2G02

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/evmTCI66AK2G02/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTCI66AK2G02.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTCI66AK2G02",
        boardFamily: "evmTCI66AK2G02",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 1220,
        catalogName: "ti.catalog.c6000",
        deviceName: "TCI66AK2G02",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 1000.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "TCI66AK2G02",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3",
                {
                    name: "DDR3",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTCI66AK2G02",
    boardFamily: "evmTCI66AK2G02",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 1220,
    catalogName: "ti.catalog.c6000",
    deviceName: "TCI66AK2G02",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 1000.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "TCI66AK2G02",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3",
            {
                name: "DDR3",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3",
        {
            name: "DDR3",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:52 GMT


package ti.platforms.evmTDA3XX
index URL

Platform package for the TDA3XX SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the TDA3XX SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTDA3XX/package.xdc
requires ti.catalog.arp32;
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm4;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTDA3XX [1, 0, 0, 0] {
    module Platform;
    // Platform support for TDA3XX
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the TDA3XX SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.evmTDA3XX.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:52 GMT


module ti.platforms.evmTDA3XX.Platform

metaonly module ti.platforms.evmTDA3XX.Platform
index URL

Platform support for TDA3XX

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTDA3XX/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTDA3XX.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTDA3XX",
        boardFamily: "evmTDA3XX",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 600.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TDA3XX",
        revision: "1.0"
    };
    const Platform.EVE// = IExeContext.Cpu {
        id: "2",
        clockRate: 535.0,
        catalogName: "ti.catalog.arp32",
        deviceName: "TDA3XX",
        revision: "1.0"
    };
    const Platform.M4// = IExeContext.Cpu {
        id: "1",
        clockRate: 212.8,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "TDA3XX",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// Memory regions as defined in the TDA3XX Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "1 GB External RAM Memory",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x40000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 1 EVE, 1 Benelli/IPU sub-system (Dual M4's) and 2 C66x DSP's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTDA3XX",
    boardFamily: "evmTDA3XX",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 600.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TDA3XX",
    revision: "1.0"
};
config Platform.EVE // module-wide
index URL
Configuration settings
const Platform.EVE = IExeContext.Cpu {
    id: "2",
    clockRate: 535.0,
    catalogName: "ti.catalog.arp32",
    deviceName: "TDA3XX",
    revision: "1.0"
};
config Platform.M4 // module-wide
index URL
Configuration settings
const Platform.M4 = IExeContext.Cpu {
    id: "1",
    clockRate: 212.8,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "TDA3XX",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the TDA3XX Specification
        [
            "EXT_RAM",
            {
                comment: "1 GB External RAM Memory",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x40000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the TDA3XX Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "1 GB External RAM Memory",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x40000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:52 GMT


package ti.platforms.evmTI811X
index URL

Platform package for the evmTI811X platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI811X platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTI811X/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTI811X [1, 0, 0] {
    module Platform;
    // Platform support for the evmTI811X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI811X platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTI811X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:02 GMT


module ti.platforms.evmTI811X.Platform

metaonly module ti.platforms.evmTI811X.Platform
index URL

Platform support for the evmTI811X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTI811X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTI811X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTI811X",
        boardFamily: "evmTI811X",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 200.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320TI811X",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 500.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TI811X",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320TI811X",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_HOST",
                {
                    comment: "DDR3 Memory reserved for use by the A8",
                    name: "DDR3_HOST",
                    base: 0x80000000,
                    len: 0x0B000000
                }
            ],
            [
                "DDR3_DSP",
                {
                    comment: "DDR3 Memory reserved for use by the C674",
                    name: "DDR3_DSP",
                    base: 0x8B000000,
                    len: 0x02000000
                }
            ],
            [
                "DDR3_SR1",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
                    name: "DDR3_SR1",
                    base: 0x8D000000,
                    len: 0x00C00000
                }
            ],
            [
                "DDR3_HDVPSS",
                {
                    comment: "DDR3 Memory reserved for use by HDVPSS",
                    name: "DDR3_HDVPSS",
                    base: 0x8DC00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_V4L2",
                {
                    comment: "DDR3 Memory reserved for use by V4L2",
                    name: "DDR3_V4L2",
                    base: 0x8DE00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_SR0",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
                    name: "DDR3_SR0",
                    base: 0x8E000000,
                    len: 0x01000000
                }
            ],
            [
                "DDR3_M3",
                {
                    comment: "DDR3 Memory reserved for use by the M3 core",
                    name: "DDR3_M3",
                    base: 0x8F000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C674 DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTI811X",
    boardFamily: "evmTI811X",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 200.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320TI811X",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 500.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TI811X",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320TI811X",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_HOST",
            {
                comment: "DDR3 Memory reserved for use by the A8",
                name: "DDR3_HOST",
                base: 0x80000000,
                len: 0x0B000000
            }
        ],
        [
            "DDR3_DSP",
            {
                comment: "DDR3 Memory reserved for use by the C674",
                name: "DDR3_DSP",
                base: 0x8B000000,
                len: 0x02000000
            }
        ],
        [
            "DDR3_SR1",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 1",
                name: "DDR3_SR1",
                base: 0x8D000000,
                len: 0x00C00000
            }
        ],
        [
            "DDR3_HDVPSS",
            {
                comment: "DDR3 Memory reserved for use by HDVPSS",
                name: "DDR3_HDVPSS",
                base: 0x8DC00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_V4L2",
            {
                comment: "DDR3 Memory reserved for use by V4L2",
                name: "DDR3_V4L2",
                base: 0x8DE00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_SR0",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 0",
                name: "DDR3_SR0",
                base: 0x8E000000,
                len: 0x01000000
            }
        ],
        [
            "DDR3_M3",
            {
                comment: "DDR3 Memory reserved for use by the M3 core",
                name: "DDR3_M3",
                base: 0x8F000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_HOST",
        {
            comment: "DDR3 Memory reserved for use by the A8",
            name: "DDR3_HOST",
            base: 0x80000000,
            len: 0x0B000000
        }
    ],
    [
        "DDR3_DSP",
        {
            comment: "DDR3 Memory reserved for use by the C674",
            name: "DDR3_DSP",
            base: 0x8B000000,
            len: 0x02000000
        }
    ],
    [
        "DDR3_SR1",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 1",
            name: "DDR3_SR1",
            base: 0x8D000000,
            len: 0x00C00000
        }
    ],
    [
        "DDR3_HDVPSS",
        {
            comment: "DDR3 Memory reserved for use by HDVPSS",
            name: "DDR3_HDVPSS",
            base: 0x8DC00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_V4L2",
        {
            comment: "DDR3 Memory reserved for use by V4L2",
            name: "DDR3_V4L2",
            base: 0x8DE00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_SR0",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 0",
            name: "DDR3_SR0",
            base: 0x8E000000,
            len: 0x01000000
        }
    ],
    [
        "DDR3_M3",
        {
            comment: "DDR3 Memory reserved for use by the M3 core",
            name: "DDR3_M3",
            base: 0x8F000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:02 GMT


package ti.platforms.evmTI813X
index URL

Platform package for the evmTI813X platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI8139 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTI813X/package.xdc
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTI813X [1, 0, 0] {
    module Platform;
    // Platform support for the evmTI813X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI8139 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTI813X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:56 GMT


module ti.platforms.evmTI813X.Platform

metaonly module ti.platforms.evmTI813X.Platform
index URL

Platform support for the evmTI813X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTI813X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTI813X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "evmTI813X",
        boardFamily: "evmTI813X",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "0",
        clockRate: 200.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320TI813X",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320TI813X",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_HOST",
                {
                    comment: "DDR3 Memory reserved for use by the A8",
                    name: "DDR3_HOST",
                    base: 0x80000000,
                    len: 0x0D000000
                }
            ],
            [
                "DDR3_SR1",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
                    name: "DDR3_SR1",
                    base: 0x8D000000,
                    len: 0x00C00000
                }
            ],
            [
                "DDR3_HDVPSS",
                {
                    comment: "DDR3 Memory reserved for use by HDVPSS",
                    name: "DDR3_HDVPSS",
                    base: 0x8DC00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_V4L2",
                {
                    comment: "DDR3 Memory reserved for use by V4L2",
                    name: "DDR3_V4L2",
                    base: 0x8DE00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_SR0",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
                    name: "DDR3_SR0",
                    base: 0x8E000000,
                    len: 0x01000000
                }
            ],
            [
                "DDR3_M3",
                {
                    comment: "DDR3 Memory reserved for use by the M3 core",
                    name: "DDR3_M3",
                    base: 0x8F000000,
                    len: 0x01000000
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 3 CPU's, a host GPP, and 2 M3's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTI813X",
    boardFamily: "evmTI813X",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "0",
    clockRate: 200.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320TI813X",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320TI813X",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_HOST",
            {
                comment: "DDR3 Memory reserved for use by the A8",
                name: "DDR3_HOST",
                base: 0x80000000,
                len: 0x0D000000
            }
        ],
        [
            "DDR3_SR1",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 1",
                name: "DDR3_SR1",
                base: 0x8D000000,
                len: 0x00C00000
            }
        ],
        [
            "DDR3_HDVPSS",
            {
                comment: "DDR3 Memory reserved for use by HDVPSS",
                name: "DDR3_HDVPSS",
                base: 0x8DC00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_V4L2",
            {
                comment: "DDR3 Memory reserved for use by V4L2",
                name: "DDR3_V4L2",
                base: 0x8DE00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_SR0",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 0",
                name: "DDR3_SR0",
                base: 0x8E000000,
                len: 0x01000000
            }
        ],
        [
            "DDR3_M3",
            {
                comment: "DDR3 Memory reserved for use by the M3 core",
                name: "DDR3_M3",
                base: 0x8F000000,
                len: 0x01000000
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_HOST",
        {
            comment: "DDR3 Memory reserved for use by the A8",
            name: "DDR3_HOST",
            base: 0x80000000,
            len: 0x0D000000
        }
    ],
    [
        "DDR3_SR1",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 1",
            name: "DDR3_SR1",
            base: 0x8D000000,
            len: 0x00C00000
        }
    ],
    [
        "DDR3_HDVPSS",
        {
            comment: "DDR3 Memory reserved for use by HDVPSS",
            name: "DDR3_HDVPSS",
            base: 0x8DC00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_V4L2",
        {
            comment: "DDR3 Memory reserved for use by V4L2",
            name: "DDR3_V4L2",
            base: 0x8DE00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_SR0",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 0",
            name: "DDR3_SR0",
            base: 0x8E000000,
            len: 0x01000000
        }
    ],
    [
        "DDR3_M3",
        {
            comment: "DDR3 Memory reserved for use by the M3 core",
            name: "DDR3_M3",
            base: 0x8F000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:56 GMT


package ti.platforms.evmTI814X
index URL

Platform package for the evmTI814X platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI814X platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTI814X/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTI814X [1, 0, 0] {
    module Platform;
    // Platform support for the evmTI814X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI814X platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTI814X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:57 GMT


module ti.platforms.evmTI814X.Platform

metaonly module ti.platforms.evmTI814X.Platform
index URL

Platform support for the evmTI814X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTI814X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTI814X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTI814X",
        boardFamily: "evmTI814X",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 200.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320TI814X",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 500.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TI814X",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320TI814X",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_HOST",
                {
                    comment: "DDR3 Memory reserved for use by the A8",
                    name: "DDR3_HOST",
                    base: 0x80000000,
                    len: 0x0B000000
                }
            ],
            [
                "DDR3_DSP",
                {
                    comment: "DDR3 Memory reserved for use by the C674",
                    name: "DDR3_DSP",
                    base: 0x8B000000,
                    len: 0x02000000
                }
            ],
            [
                "DDR3_SR1",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
                    name: "DDR3_SR1",
                    base: 0x8D000000,
                    len: 0x00C00000
                }
            ],
            [
                "DDR3_HDVPSS",
                {
                    comment: "DDR3 Memory reserved for use by HDVPSS",
                    name: "DDR3_HDVPSS",
                    base: 0x8DC00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_V4L2",
                {
                    comment: "DDR3 Memory reserved for use by V4L2",
                    name: "DDR3_V4L2",
                    base: 0x8DE00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_SR0",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
                    name: "DDR3_SR0",
                    base: 0x8E000000,
                    len: 0x01000000
                }
            ],
            [
                "DDR3_M3",
                {
                    comment: "DDR3 Memory reserved for use by the M3 core",
                    name: "DDR3_M3",
                    base: 0x8F000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C674 DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTI814X",
    boardFamily: "evmTI814X",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 200.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320TI814X",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 500.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TI814X",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320TI814X",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_HOST",
            {
                comment: "DDR3 Memory reserved for use by the A8",
                name: "DDR3_HOST",
                base: 0x80000000,
                len: 0x0B000000
            }
        ],
        [
            "DDR3_DSP",
            {
                comment: "DDR3 Memory reserved for use by the C674",
                name: "DDR3_DSP",
                base: 0x8B000000,
                len: 0x02000000
            }
        ],
        [
            "DDR3_SR1",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 1",
                name: "DDR3_SR1",
                base: 0x8D000000,
                len: 0x00C00000
            }
        ],
        [
            "DDR3_HDVPSS",
            {
                comment: "DDR3 Memory reserved for use by HDVPSS",
                name: "DDR3_HDVPSS",
                base: 0x8DC00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_V4L2",
            {
                comment: "DDR3 Memory reserved for use by V4L2",
                name: "DDR3_V4L2",
                base: 0x8DE00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_SR0",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 0",
                name: "DDR3_SR0",
                base: 0x8E000000,
                len: 0x01000000
            }
        ],
        [
            "DDR3_M3",
            {
                comment: "DDR3 Memory reserved for use by the M3 core",
                name: "DDR3_M3",
                base: 0x8F000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_HOST",
        {
            comment: "DDR3 Memory reserved for use by the A8",
            name: "DDR3_HOST",
            base: 0x80000000,
            len: 0x0B000000
        }
    ],
    [
        "DDR3_DSP",
        {
            comment: "DDR3 Memory reserved for use by the C674",
            name: "DDR3_DSP",
            base: 0x8B000000,
            len: 0x02000000
        }
    ],
    [
        "DDR3_SR1",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 1",
            name: "DDR3_SR1",
            base: 0x8D000000,
            len: 0x00C00000
        }
    ],
    [
        "DDR3_HDVPSS",
        {
            comment: "DDR3 Memory reserved for use by HDVPSS",
            name: "DDR3_HDVPSS",
            base: 0x8DC00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_V4L2",
        {
            comment: "DDR3 Memory reserved for use by V4L2",
            name: "DDR3_V4L2",
            base: 0x8DE00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_SR0",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 0",
            name: "DDR3_SR0",
            base: 0x8E000000,
            len: 0x01000000
        }
    ],
    [
        "DDR3_M3",
        {
            comment: "DDR3 Memory reserved for use by the M3 core",
            name: "DDR3_M3",
            base: 0x8F000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:57 GMT


package ti.platforms.evmTI816X
index URL

Platform package for the evmTI816X platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI816X platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTI816X/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTI816X [1, 0, 0] {
    module Platform;
    // Platform support for the evmTI816X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTI816X platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTI816X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:59 GMT


module ti.platforms.evmTI816X.Platform

metaonly module ti.platforms.evmTI816X.Platform
index URL

Platform support for the evmTI816X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTI816X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTI816X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTI816X",
        boardFamily: "evmTI816X",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 250.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320TI816X",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 800.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TI816X",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 1000.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320TI816X",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_HOST",
                {
                    comment: "DDR3 Memory reserved for use by the A8",
                    name: "DDR3_HOST",
                    base: 0x80000000,
                    len: 0x0B000000
                }
            ],
            [
                "DDR3_DSP",
                {
                    comment: "DDR3 Memory reserved for use by the C674",
                    name: "DDR3_DSP",
                    base: 0x8B000000,
                    len: 0x02000000
                }
            ],
            [
                "DDR3_SR1",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
                    name: "DDR3_SR1",
                    base: 0x8D000000,
                    len: 0x00C00000
                }
            ],
            [
                "DDR3_HDVPSS",
                {
                    comment: "DDR3 Memory reserved for use by HDVPSS",
                    name: "DDR3_HDVPSS",
                    base: 0x8DC00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_V4L2",
                {
                    comment: "DDR3 Memory reserved for use by V4L2",
                    name: "DDR3_V4L2",
                    base: 0x8DE00000,
                    len: 0x00200000
                }
            ],
            [
                "DDR3_SR0",
                {
                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
                    name: "DDR3_SR0",
                    base: 0x8E000000,
                    len: 0x01000000
                }
            ],
            [
                "DDR3_M3",
                {
                    comment: "DDR3 Memory reserved for use by the M3 core",
                    name: "DDR3_M3",
                    base: 0x8F000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C674 DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTI816X",
    boardFamily: "evmTI816X",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 250.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320TI816X",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 800.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TI816X",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 1000.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320TI816X",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_HOST",
            {
                comment: "DDR3 Memory reserved for use by the A8",
                name: "DDR3_HOST",
                base: 0x80000000,
                len: 0x0B000000
            }
        ],
        [
            "DDR3_DSP",
            {
                comment: "DDR3 Memory reserved for use by the C674",
                name: "DDR3_DSP",
                base: 0x8B000000,
                len: 0x02000000
            }
        ],
        [
            "DDR3_SR1",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 1",
                name: "DDR3_SR1",
                base: 0x8D000000,
                len: 0x00C00000
            }
        ],
        [
            "DDR3_HDVPSS",
            {
                comment: "DDR3 Memory reserved for use by HDVPSS",
                name: "DDR3_HDVPSS",
                base: 0x8DC00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_V4L2",
            {
                comment: "DDR3 Memory reserved for use by V4L2",
                name: "DDR3_V4L2",
                base: 0x8DE00000,
                len: 0x00200000
            }
        ],
        [
            "DDR3_SR0",
            {
                comment: "DDR3 Memory reserved for use by SharedRegion 0",
                name: "DDR3_SR0",
                base: 0x8E000000,
                len: 0x01000000
            }
        ],
        [
            "DDR3_M3",
            {
                comment: "DDR3 Memory reserved for use by the M3 core",
                name: "DDR3_M3",
                base: 0x8F000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_HOST",
        {
            comment: "DDR3 Memory reserved for use by the A8",
            name: "DDR3_HOST",
            base: 0x80000000,
            len: 0x0B000000
        }
    ],
    [
        "DDR3_DSP",
        {
            comment: "DDR3 Memory reserved for use by the C674",
            name: "DDR3_DSP",
            base: 0x8B000000,
            len: 0x02000000
        }
    ],
    [
        "DDR3_SR1",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 1",
            name: "DDR3_SR1",
            base: 0x8D000000,
            len: 0x00C00000
        }
    ],
    [
        "DDR3_HDVPSS",
        {
            comment: "DDR3 Memory reserved for use by HDVPSS",
            name: "DDR3_HDVPSS",
            base: 0x8DC00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_V4L2",
        {
            comment: "DDR3 Memory reserved for use by V4L2",
            name: "DDR3_V4L2",
            base: 0x8DE00000,
            len: 0x00200000
        }
    ],
    [
        "DDR3_SR0",
        {
            comment: "DDR3 Memory reserved for use by SharedRegion 0",
            name: "DDR3_SR0",
            base: 0x8E000000,
            len: 0x01000000
        }
    ],
    [
        "DDR3_M3",
        {
            comment: "DDR3 Memory reserved for use by the M3 core",
            name: "DDR3_M3",
            base: 0x8F000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:59 GMT


package ti.platforms.evmTNETV107X
index URL

Platform package for the DaVinci evmTNETV107X platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTNETV107X platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTNETV107X/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.evmTNETV107X [1, 0, 0, 1] {
    module Platform;
    // Platform support for the evmTNETV107X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTNETV107X platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTNETV107X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:06 GMT


module ti.platforms.evmTNETV107X.Platform

metaonly module ti.platforms.evmTNETV107X.Platform
index URL

Platform support for the evmTNETV107X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTNETV107X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTNETV107X.Platform');
module-wide constants & types
    values of type Platform.RuntimeEnv//
        const Platform.STDIO;
        const Platform.POSIX;
        const Platform.BIOS;
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTNETV107X",
        boardFamily: "evmTNETV107X",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 400.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TNETV107X",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 400.0,
        catalogName: "ti.catalog.arm",
        deviceName: "TNETV107X",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.runTime// The runtime environment available to executables = Platform.RuntimeEnv Platform.STDIO;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
enum Platform.RuntimeEnv
index URL
Configuration settings
values of type Platform.RuntimeEnv
    const Platform.STDIO;
    const Platform.POSIX;
    const Platform.BIOS;
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTNETV107X",
    boardFamily: "evmTNETV107X",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 400.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TNETV107X",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 400.0,
    catalogName: "ti.catalog.arm",
    deviceName: "TNETV107X",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.runTime = Platform.RuntimeEnv Platform.STDIO;
    // The runtime environment available to executables
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.runTime // instance
index URL

The runtime environment available to executables

Configuration settings
var params = new Platform.Params;
...
params.runTime = Platform.RuntimeEnv Platform.STDIO;
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:06 GMT


package ti.platforms.evmTNETV2685
index URL

Platform package for the evmTNETV2685 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTNETV2685 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/evmTNETV2685/package.xdc
requires ti.catalog.c6000;
package ti.platforms.evmTNETV2685 [1, 0, 1] {
    module Platform;
    // Platform support for the evmTNETV2685
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the evmTNETV2685 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.evmTNETV2685.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:05 GMT


module ti.platforms.evmTNETV2685.Platform

metaonly module ti.platforms.evmTNETV2685.Platform
index URL

Platform support for the evmTNETV2685

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/evmTNETV2685/Platform.xdc
var Platform = xdc.useModule('ti.platforms.evmTNETV2685.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "evmTNETV2685",
        boardFamily: "evmTNETV2685",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 500,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CTNETV2685",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR2";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR2";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0xE0000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR2";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "evmTNETV2685",
    boardFamily: "evmTNETV2685",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 500,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CTNETV2685",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR2";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR2";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0xE0000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR2";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0xE0000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR2";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:05 GMT


package ti.platforms.ezdsp28235
index URL

Platform package for the eZdsp28235 platform

This package implements the interface (xdc.platform.IPlatform) necessary to build and run executables on the eZdsp28235 platform.
XDCspec declarations sourced in ti/platforms/ezdsp28235/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.ezdsp28235 [1, 0, 0] {
    module Platform;
}
generated on Sun, 25 Nov 2018 22:20:59 GMT


module ti.platforms.ezdsp28235.Platform

metaonly module ti.platforms.ezdsp28235.Platform
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/ezdsp28235/Platform.xdc
var Platform = xdc.useModule('ti.platforms.ezdsp28235.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "ezdsp28235",
        boardFamily: "ezdsp28235",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 150.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320C28235",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    name: "SRAM",
                    base: 0x200000,
                    len: 0x020000,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L03SARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "ezdsp28235",
    boardFamily: "ezdsp28235",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 150.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320C28235",
    revision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SRAM",
            {
                name: "SRAM",
                base: 0x200000,
                len: 0x020000,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L03SARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            name: "SRAM",
            base: 0x200000,
            len: 0x020000,
            page: 0,
            space: "code/data"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L03SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:59 GMT


package ti.platforms.ezdsp28335
index URL

Platform package for the eZdsp28335 platform

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the eZdsp28335 platform.
XDCspec declarations sourced in ti/platforms/ezdsp28335/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.ezdsp28335 [1, 0, 0] {
    module Platform;
}
generated on Sun, 25 Nov 2018 22:20:50 GMT


module ti.platforms.ezdsp28335.Platform

metaonly module ti.platforms.ezdsp28335.Platform
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/ezdsp28335/Platform.xdc
var Platform = xdc.useModule('ti.platforms.ezdsp28335.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "ezdsp28335",
        boardFamily: "ezdsp28335",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 150.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320C28335",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    name: "SRAM",
                    base: 0x200000,
                    len: 0x020000,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L03SARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "ezdsp28335",
    boardFamily: "ezdsp28335",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 150.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320C28335",
    revision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SRAM",
            {
                name: "SRAM",
                base: 0x200000,
                len: 0x020000,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L03SARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            name: "SRAM",
            base: 0x200000,
            len: 0x020000,
            page: 0,
            space: "code/data"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L03SARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:50 GMT


package ti.platforms.generic
index URL

Platform package for the generic platform

  • DETAILS
  • THROWS
  • EXAMPLES
  • SEE
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on a "generic" platform; a platform specified by: [ more ... ]
XDCspec declarations sourced in ti/platforms/generic/package.xdc
requires xdc.platform[1, 0, 1];
package ti.platforms.generic [1, 0, 0, 1] {
    module Platform;
    // A generic platform that supports any HW platform
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on a "generic" platform; a platform specified by:
  • device name; e.g., "TMS320C2812"
  • catalog name; the name of a package containing the device named above
  • clock rate; the clock rate in MHz of the CPU
  • external memory map; an array of memory blocks external to the device
For a complate list of parameters that can be specified when creating a platform instance see the instance configuration parameters specified by ti.platforms.generic.Platform. This list, of course, includes all the instance config parameters specified by the xdc.platform.IPlatform interface.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.generic.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
EXAMPLES
Example 1: Suppose you need to create an application for a HW platform that uses the TMS320C2812 running at 150 MHz. You can use this package (in lieu of one specifically created for the HW platform) by defining a named instance of this package's Platform module. Add the following statements to your config.bld file to add the platform instance named "ti.platforms.generic:C28".
      Build.platformTable["ti.platforms.generic:C28"] = {
          clockRate:   150,
          catalogName: "ti.catalog.c2800",
          deviceName:  "TMS320C2812"
      };
With this name defined, it is now possible to configure an application using the platform instance name "ti.platforms.generic:C28". For example, if you are using xdc.tools.configuro to configure your application, the string "ti.platforms.generic:C28" can now be used to identify your platform:
      xs xdc.tools.configuro -b config.bld -p ti.platforms.generic:C28 ...
Example 2: The following example illustrates how to specify a platform instance with memory regions external to the specified device. In this case, we define a platform using a TMS320C6416 running at 600 MHz on a board with two external SDRAM memory blocks.
      Build.platformTable["ti.platforms.generic:C64"] = {
          clockRate:          600,
          catalogName:        "ti.catalog.c6000",
          deviceName:         "TMS320C6416",
          externalMemoryMap : [
              ["SDRAM1", {
                  name: "SDRAM1",
                  base: 0x80000000, len: 0x1000000, space: "code/data"
              }],
              ["SDRAM2", {
                  name: "SDRAM2",
                  base: 0x90000000, len: 0x1000000, space: "code/data"
              }],
          ]
      }
The externalMemoryMap attribute is a map of string names to xdc.platform.IPlatform.Memory structures.
SEE
ti.platforms.generic.Platform, xdc.bld.BuildEnvironment.platformTable, xdc.platform.IPlatform
generated on Sun, 25 Nov 2018 22:21:01 GMT


module ti.platforms.generic.Platform

metaonly module ti.platforms.generic.Platform
index URL

A generic platform that supports any HW platform

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/generic/Platform.xdc
var Platform = xdc.useModule('ti.platforms.generic.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "generic",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 0,
            catalogName: null,
            deviceName: null,
            revision: ""
        };
        params.catalogName// The name of the package that contains the module 'deviceName' = String undefined;
        params.clockRate// The clock rate in MHz for the simulated device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The CPU simulated by this simulator platform = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "generic",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 0,
        catalogName: null,
        deviceName: null,
        revision: ""
    };
    params.catalogName = String undefined;
    // The name of the package that contains the module 'deviceName'
    params.clockRate = Double undefined;
    // The clock rate in MHz for the simulated device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The CPU simulated by this simulator platform
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 0,
    catalogName: null,
    deviceName: null,
    revision: ""
};
config Platform.Params.catalogName // instance
index URL

The name of the package that contains the module 'deviceName'

Configuration settings
var params = new Platform.Params;
...
params.catalogName = String undefined;
DETAILS
This parameter is required.
config Platform.Params.clockRate // instance
index URL

The clock rate in MHz for the simulated device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
DETAILS
This parameter is required. There are no checks if the simulated device supports the given clock rate.
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU simulated by this simulator platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:01 GMT


package ti.platforms.idkAM571X
index URL

Platform package for the AM571X SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM571X SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/idkAM571X/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm4;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.idkAM571X [1, 0, 0, 0] {
    module Platform;
    // Platform support for idkAM571X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM571X SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.idkAM571X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:56 GMT


module ti.platforms.idkAM571X.Platform

metaonly module ti.platforms.idkAM571X.Platform
index URL

Platform support for idkAM571X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/idkAM571X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.idkAM571X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "idkAM571X",
        boardFamily: "idkAM571X",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 700,
        catalogName: "ti.catalog.c6000",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.DSP1// = Any {
        externalMemoryMap: [
            [
                "DSP1_PROG",
                {
                    name: "DSP1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8C000000,
                    len: 0x1000000,
                    comment: "DSP1 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP1_PROG",
        dataMemory: "DSP1_PROG",
        stackMemory: "DSP1_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "3",
        clockRate: 1500.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.HOST// = Any {
        externalMemoryMap: [
            [
                "HOST_PROG",
                {
                    name: "HOST_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8B000000,
                    len: 0x1000000,
                    comment: "HOST Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "HOST_PROG",
        dataMemory: "HOST_PROG",
        stackMemory: "HOST_PROG"
    };
    const Platform.IPU1// = Any {
        externalMemoryMap: [
            [
                "IPU1_PROG",
                {
                    name: "IPU1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A000000,
                    len: 0x800000,
                    comment: "IPU1 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU1_PROG",
        dataMemory: "IPU1_PROG",
        stackMemory: "IPU1_PROG"
    };
    const Platform.IPU2// = Any {
        externalMemoryMap: [
            [
                "IPU2_PROG",
                {
                    name: "IPU2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A800000,
                    len: 0x800000,
                    comment: "IPU2 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU2_PROG",
        dataMemory: "IPU2_PROG",
        stackMemory: "IPU2_PROG"
    };
    const Platform.M4// = IExeContext.Cpu {
        id: "1",
        clockRate: 212.8,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.SR_0// = Any {
        name: "SR_0",
        space: "data",
        access: "RWX",
        base: 0x8E000000,
        len: 0x1000000,
        comment: "SR#0 Memory (16 MB)"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// Memory regions as defined in the idkAM571X Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "2 GB External RAM Memory",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 1 Cortex-A15, 2 Benelli/IPU Sub-system (Dual M4's) and 1 C66x DSP's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "idkAM571X",
    boardFamily: "idkAM571X",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 700,
    catalogName: "ti.catalog.c6000",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.DSP1 // module-wide
index URL
Configuration settings
const Platform.DSP1 = Any {
    externalMemoryMap: [
        [
            "DSP1_PROG",
            {
                name: "DSP1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8C000000,
                len: 0x1000000,
                comment: "DSP1 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP1_PROG",
    dataMemory: "DSP1_PROG",
    stackMemory: "DSP1_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "3",
    clockRate: 1500.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.HOST // module-wide
index URL
Configuration settings
const Platform.HOST = Any {
    externalMemoryMap: [
        [
            "HOST_PROG",
            {
                name: "HOST_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8B000000,
                len: 0x1000000,
                comment: "HOST Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "HOST_PROG",
    dataMemory: "HOST_PROG",
    stackMemory: "HOST_PROG"
};
config Platform.IPU1 // module-wide
index URL
Configuration settings
const Platform.IPU1 = Any {
    externalMemoryMap: [
        [
            "IPU1_PROG",
            {
                name: "IPU1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A000000,
                len: 0x800000,
                comment: "IPU1 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU1_PROG",
    dataMemory: "IPU1_PROG",
    stackMemory: "IPU1_PROG"
};
config Platform.IPU2 // module-wide
index URL
Configuration settings
const Platform.IPU2 = Any {
    externalMemoryMap: [
        [
            "IPU2_PROG",
            {
                name: "IPU2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A800000,
                len: 0x800000,
                comment: "IPU2 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU2_PROG",
    dataMemory: "IPU2_PROG",
    stackMemory: "IPU2_PROG"
};
config Platform.M4 // module-wide
index URL
Configuration settings
const Platform.M4 = IExeContext.Cpu {
    id: "1",
    clockRate: 212.8,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.SR_0 // module-wide
index URL
Configuration settings
const Platform.SR_0 = Any {
    name: "SR_0",
    space: "data",
    access: "RWX",
    base: 0x8E000000,
    len: 0x1000000,
    comment: "SR#0 Memory (16 MB)"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the idkAM571X Specification
        [
            "EXT_RAM",
            {
                comment: "2 GB External RAM Memory",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the idkAM571X Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "2 GB External RAM Memory",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:56 GMT


package ti.platforms.idkAM572X
index URL

Platform package for the AM572X SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM572X SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/idkAM572X/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm4;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.idkAM572X [1, 0, 0, 0] {
    module Platform;
    // Platform support for idkAM572X
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the AM572X SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.idkAM572X.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:52 GMT


module ti.platforms.idkAM572X.Platform

metaonly module ti.platforms.idkAM572X.Platform
index URL

Platform support for idkAM572X

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/idkAM572X/Platform.xdc
var Platform = xdc.useModule('ti.platforms.idkAM572X.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "idkAM572X",
        boardFamily: "idkAM572X",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 700,
        catalogName: "ti.catalog.c6000",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.DSP1// = Any {
        externalMemoryMap: [
            [
                "DSP1_PROG",
                {
                    name: "DSP1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8C000000,
                    len: 0x1000000,
                    comment: "DSP1 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP1_PROG",
        dataMemory: "DSP1_PROG",
        stackMemory: "DSP1_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.DSP2// = Any {
        externalMemoryMap: [
            [
                "DSP2_PROG",
                {
                    name: "DSP2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8D000000,
                    len: 0x1000000,
                    comment: "DSP2 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP2_PROG",
        dataMemory: "DSP2_PROG",
        stackMemory: "DSP2_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "3",
        clockRate: 1500.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.HOST// = Any {
        externalMemoryMap: [
            [
                "HOST_PROG",
                {
                    name: "HOST_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8B000000,
                    len: 0x1000000,
                    comment: "HOST Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "HOST_PROG",
        dataMemory: "HOST_PROG",
        stackMemory: "HOST_PROG"
    };
    const Platform.IPU1// = Any {
        externalMemoryMap: [
            [
                "IPU1_PROG",
                {
                    name: "IPU1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A000000,
                    len: 0x800000,
                    comment: "IPU1 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU1_PROG",
        dataMemory: "IPU1_PROG",
        stackMemory: "IPU1_PROG"
    };
    const Platform.IPU2// = Any {
        externalMemoryMap: [
            [
                "IPU2_PROG",
                {
                    name: "IPU2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A800000,
                    len: 0x800000,
                    comment: "IPU2 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU2_PROG",
        dataMemory: "IPU2_PROG",
        stackMemory: "IPU2_PROG"
    };
    const Platform.M4// = IExeContext.Cpu {
        id: "1",
        clockRate: 212.8,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "DRA7XX",
        revision: "1.0"
    };
    const Platform.SR_0// = Any {
        name: "SR_0",
        space: "data",
        access: "RWX",
        base: 0x8E000000,
        len: 0x1000000,
        comment: "SR#0 Memory (16 MB)"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// Memory regions as defined in the idkAM572X Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "2 GB External RAM Memory",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x80000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 1 Cortex-A15, 2 Benelli/IPU Sub-system (Dual M4's) and 2 C66x DSP's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "idkAM572X",
    boardFamily: "idkAM572X",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 700,
    catalogName: "ti.catalog.c6000",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.DSP1 // module-wide
index URL
Configuration settings
const Platform.DSP1 = Any {
    externalMemoryMap: [
        [
            "DSP1_PROG",
            {
                name: "DSP1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8C000000,
                len: 0x1000000,
                comment: "DSP1 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP1_PROG",
    dataMemory: "DSP1_PROG",
    stackMemory: "DSP1_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.DSP2 // module-wide
index URL
Configuration settings
const Platform.DSP2 = Any {
    externalMemoryMap: [
        [
            "DSP2_PROG",
            {
                name: "DSP2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8D000000,
                len: 0x1000000,
                comment: "DSP2 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP2_PROG",
    dataMemory: "DSP2_PROG",
    stackMemory: "DSP2_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "3",
    clockRate: 1500.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.HOST // module-wide
index URL
Configuration settings
const Platform.HOST = Any {
    externalMemoryMap: [
        [
            "HOST_PROG",
            {
                name: "HOST_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8B000000,
                len: 0x1000000,
                comment: "HOST Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "HOST_PROG",
    dataMemory: "HOST_PROG",
    stackMemory: "HOST_PROG"
};
config Platform.IPU1 // module-wide
index URL
Configuration settings
const Platform.IPU1 = Any {
    externalMemoryMap: [
        [
            "IPU1_PROG",
            {
                name: "IPU1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A000000,
                len: 0x800000,
                comment: "IPU1 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU1_PROG",
    dataMemory: "IPU1_PROG",
    stackMemory: "IPU1_PROG"
};
config Platform.IPU2 // module-wide
index URL
Configuration settings
const Platform.IPU2 = Any {
    externalMemoryMap: [
        [
            "IPU2_PROG",
            {
                name: "IPU2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A800000,
                len: 0x800000,
                comment: "IPU2 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU2_PROG",
    dataMemory: "IPU2_PROG",
    stackMemory: "IPU2_PROG"
};
config Platform.M4 // module-wide
index URL
Configuration settings
const Platform.M4 = IExeContext.Cpu {
    id: "1",
    clockRate: 212.8,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "DRA7XX",
    revision: "1.0"
};
config Platform.SR_0 // module-wide
index URL
Configuration settings
const Platform.SR_0 = Any {
    name: "SR_0",
    space: "data",
    access: "RWX",
    base: 0x8E000000,
    len: 0x1000000,
    comment: "SR#0 Memory (16 MB)"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the idkAM572X Specification
        [
            "EXT_RAM",
            {
                comment: "2 GB External RAM Memory",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x80000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the idkAM572X Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "2 GB External RAM Memory",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x80000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:52 GMT


package ti.platforms.load6x
index URL

Platform package for the load6x platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim6xxx platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/load6x/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.load6x [1, 0, 1, 1] {
    module Platform;
    // Simulation-based Platform support for 6xxx platforms
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim6xxx platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.load6x.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:58 GMT


module ti.platforms.load6x.Platform

metaonly module ti.platforms.load6x.Platform
index URL

Simulation-based Platform support for 6xxx platforms

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/load6x/Platform.xdc
var Platform = xdc.useModule('ti.platforms.load6x.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "sim6xxx",
        boardFamily: "sim6xxx",
        boardRevision: null
    };
    const Platform.CPU// The CPU simulated by this platform = IExeContext.Cpu {
        id: "0",
        clockRate: 600.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6416",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "IRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "EXT3";
        params.deviceName// The CPU simulated by this simulator platform = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "EXT0",
                {
                    name: "EXT0",
                    base: 0x00400000,
                    len: 0x00400000
                }
            ],
            [
                "EXT1",
                {
                    name: "EXT1",
                    base: 0x01000000,
                    len: 0x00800000
                }
            ],
            [
                "EXT2",
                {
                    name: "EXT2",
                    base: 0x02000000,
                    len: 0x01000000
                }
            ],
            [
                "EXT3",
                {
                    name: "EXT3",
                    base: 0x03000000,
                    len: 0x01000000
                }
            ],
            [
                "BMEM",
                {
                    name: "BMEM",
                    base: 0x80000000,
                    len: 0x00010000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "BMEM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sim6xxx",
    boardFamily: "sim6xxx",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL

The CPU simulated by this platform

Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 600.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6416",
    revision: ""
};
DETAILS
The device simulated is determined by the platform instance name or if this does not name a ti.catalog.c6000 module, we simulate a TMS320C6416.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "IRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "EXT3";
    // The default segment for data sections
    params.deviceName = String undefined;
    // The CPU simulated by this simulator platform
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "EXT0",
            {
                name: "EXT0",
                base: 0x00400000,
                len: 0x00400000
            }
        ],
        [
            "EXT1",
            {
                name: "EXT1",
                base: 0x01000000,
                len: 0x00800000
            }
        ],
        [
            "EXT2",
            {
                name: "EXT2",
                base: 0x02000000,
                len: 0x01000000
            }
        ],
        [
            "EXT3",
            {
                name: "EXT3",
                base: 0x03000000,
                len: 0x01000000
            }
        ],
        [
            "BMEM",
            {
                name: "BMEM",
                base: 0x80000000,
                len: 0x00010000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "BMEM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "IRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "EXT3";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU simulated by this simulator platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is optional. If it's not set, then the Platform module parameter CPU.deviceName is used.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT0",
        {
            name: "EXT0",
            base: 0x00400000,
            len: 0x00400000
        }
    ],
    [
        "EXT1",
        {
            name: "EXT1",
            base: 0x01000000,
            len: 0x00800000
        }
    ],
    [
        "EXT2",
        {
            name: "EXT2",
            base: 0x02000000,
            len: 0x01000000
        }
    ],
    [
        "EXT3",
        {
            name: "EXT3",
            base: 0x03000000,
            len: 0x01000000
        }
    ],
    [
        "BMEM",
        {
            name: "BMEM",
            base: 0x80000000,
            len: 0x00010000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "BMEM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:58 GMT


package ti.platforms.msp430
index URL

Platform support for any MSP430 device

XDCspec declarations sourced in ti/platforms/msp430/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.msp430;
package ti.platforms.msp430 [1, 0, 0] {
    module Platform;
    // A generic platform that supports any MSP430 device
}
generated on Sun, 25 Nov 2018 22:21:04 GMT


module ti.platforms.msp430.Platform

metaonly module ti.platforms.msp430.Platform
index URL

A generic platform that supports any MSP430 device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/msp430/Platform.xdc
var Platform = xdc.useModule('ti.platforms.msp430.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "msp430",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.msp430",
            deviceName: "MSP430",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double 1.0;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// Include the default linker command file for the specified device = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.msp430:MSP430F2274"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.msp430:MSP430F5438");
  @
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile)";
DETAILS
For this platform, the parameters deviceName and includeLinkCmdFile can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.MSP430:MSP430F5438:1
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.MSP430:MSP430F5438
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "msp430",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.msp430",
        deviceName: "MSP430",
        revision: ""
    };
    params.clockRate = Double 1.0;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // Include the default linker command file for the specified device
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.msp430",
    deviceName: "MSP430",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double 1.0;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is optional; the device name name also be specified in the name of the the instance.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

Include the default linker command file for the specified device

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, the user is responsible for adding a linker command file that defines the device memory map to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
The default linker command files are found along the package path.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:04 GMT


package ti.platforms.rf432s0xx
index URL

Platform support for any RF432Sxx device

XDCspec declarations sourced in ti/platforms/rf432s0xx/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.arm.cortexm0;
package ti.platforms.rf432s0xx [1, 0, 0] {
    module Platform;
    // A generic platform that supports any rf432s0xx device
}
generated on Sun, 25 Nov 2018 22:21:00 GMT


module ti.platforms.rf432s0xx.Platform

metaonly module ti.platforms.rf432s0xx.Platform
index URL

A generic platform that supports any rf432s0xx device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/rf432s0xx/Platform.xdc
var Platform = xdc.useModule('ti.platforms.rf432s0xx.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "rf432s0xx",
        boardFamily: null,
        boardRevision: null
    };
     Platform.useGnuRomLinkCmd// Use ROM compatible linker script when building using GNU tools = Bool false;
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 8.0,
            catalogName: "ti.catalog.arm.cortexm0",
            deviceName: "RF432S0xx",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.rf432s0xx:RF432S0xx"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.rf432s0xx:RF432S0xx");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.rf432s0xx:RF432S0xx:1:20
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.rf432s0xx:RF432S0xx
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "rf432s0xx",
    boardFamily: null,
    boardRevision: null
};
config Platform.useGnuRomLinkCmd // module-wide
index URL

Use ROM compatible linker script when building using GNU tools

Configuration settings
Platform.useGnuRomLinkCmd = Bool false;
DETAILS
If this config param is set to true and "includeLinkCmdFile" is true, the ROM compatible linker script will be used. The ROM compatible linker script is required when building a ROM based application.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 8.0,
        catalogName: "ti.catalog.arm.cortexm0",
        deviceName: "RF432S0xx",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 8.0,
    catalogName: "ti.catalog.arm.cortexm0",
    deviceName: "RF432S0xx",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:00 GMT


package ti.platforms.sdp3430
index URL

Platform package for the sdp3430 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sdp3430 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/sdp3430/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.sdp3430 [1, 0, 0] {
    module Platform;
    // Platform support for the sdp3430
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sdp3430 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.sdp3430.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:50 GMT


module ti.platforms.sdp3430.Platform

metaonly module ti.platforms.sdp3430.Platform
index URL

Platform support for the sdp3430

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/sdp3430/Platform.xdc
var Platform = xdc.useModule('ti.platforms.sdp3430.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "sdp3430",
        boardFamily: "sdp3430",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 312.4,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C3430",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "1",
        clockRate: 476.25,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320C3430",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SDRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SDRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SDRAM",
                {
                    name: "SDRAM",
                    base: 0x80000000,
                    len: 0x8000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "SDRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sdp3430",
    boardFamily: "sdp3430",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 312.4,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C3430",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "1",
    clockRate: 476.25,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320C3430",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SDRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SDRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SDRAM",
            {
                name: "SDRAM",
                base: 0x80000000,
                len: 0x8000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "SDRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SDRAM",
        {
            name: "SDRAM",
            base: 0x80000000,
            len: 0x8000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:50 GMT


package ti.platforms.sdp4430
index URL

Platform package for the OMAP4430 SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the OMAP4430 SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/sdp4430/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa9;
requires xdc.platform[1, 0, 1];
package ti.platforms.sdp4430 [1, 0, 0, 0] {
    module Platform;
    // Platform support for OMAP4430
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the OMAP4430 SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.sdp4430.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:01 GMT


module ti.platforms.sdp4430.Platform

metaonly module ti.platforms.sdp4430.Platform
index URL

Platform support for OMAP4430

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/sdp4430/Platform.xdc
var Platform = xdc.useModule('ti.platforms.sdp4430.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "sdp4430",
        boardFamily: "sdp4430",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 200.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "OMAP4430",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 466,
        catalogName: "ti.catalog.c6000",
        deviceName: "OMAP4430",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 720.0,
        catalogName: "ti.catalog.arm.cortexa9",
        deviceName: "OMAP4430",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "EXT_RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "EXT_RAM";
        params.externalMemoryMap// Memory regions as defined in the OMAP4 Functional Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "External RAM",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x20000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "EXT_RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C64T DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sdp4430",
    boardFamily: "sdp4430",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 200.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "OMAP4430",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 466,
    catalogName: "ti.catalog.c6000",
    deviceName: "OMAP4430",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 720.0,
    catalogName: "ti.catalog.arm.cortexa9",
    deviceName: "OMAP4430",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "EXT_RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "EXT_RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the OMAP4 Functional Specification
        [
            "EXT_RAM",
            {
                comment: "External RAM",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x20000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "EXT_RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the OMAP4 Functional Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "External RAM",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x20000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:01 GMT


package ti.platforms.sdp5430
index URL

Platform package for the OMAP5430 SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the OMAP5430 SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/sdp5430/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa9;
requires xdc.platform[1, 0, 1];
package ti.platforms.sdp5430 [1, 0, 0, 0] {
    module Platform;
    // Platform support for OMAP5430
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the OMAP5430 SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.sdp5430.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:04 GMT


module ti.platforms.sdp5430.Platform

metaonly module ti.platforms.sdp5430.Platform
index URL

Platform support for OMAP5430

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/sdp5430/Platform.xdc
var Platform = xdc.useModule('ti.platforms.sdp5430.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "sdp5430",
        boardFamily: "sdp5430",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 212.8,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "OMAP5430",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 466,
        catalogName: "ti.catalog.c6000",
        deviceName: "OMAP5430",
        revision: "1.0"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 800.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "OMAP5430",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "EXT_RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "EXT_RAM";
        params.externalMemoryMap// Memory regions as defined in the OMAP4 Functional Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "External RAM",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x20000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "EXT_RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C64T DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sdp5430",
    boardFamily: "sdp5430",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 212.8,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "OMAP5430",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 466,
    catalogName: "ti.catalog.c6000",
    deviceName: "OMAP5430",
    revision: "1.0"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 800.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "OMAP5430",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "EXT_RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "EXT_RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the OMAP4 Functional Specification
        [
            "EXT_RAM",
            {
                comment: "External RAM",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x20000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "EXT_RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the OMAP4 Functional Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "External RAM",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x20000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:04 GMT


package ti.platforms.sim28xx
index URL

Platform package for the sim28xx platform

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim28xx platform.
XDCspec declarations sourced in ti/platforms/sim28xx/package.xdc
requires ti.catalog.c2800;
requires xdc.platform[1, 0, 1];
package ti.platforms.sim28xx [1, 0, 1, 1] {
    module Platform;
    // Simulation-based Platform support for 28xx platforms
}
generated on Sun, 25 Nov 2018 22:20:54 GMT


module ti.platforms.sim28xx.Platform

metaonly module ti.platforms.sim28xx.Platform
index URL

Simulation-based Platform support for 28xx platforms

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/sim28xx/Platform.xdc
var Platform = xdc.useModule('ti.platforms.sim28xx.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "sim28xx",
        boardFamily: "sim28xx",
        boardRevision: null
    };
    const Platform.CPU// The CPU simulated by this platform = IExeContext.Cpu {
        id: "0",
        clockRate: 150.0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320C2812",
        revision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SRAM";
        params.deviceName// The CPU simulated by this simulator platform = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SRAM",
                {
                    name: "SRAM",
                    base: 0x100000,
                    len: 0x10000,
                    page: 0,
                    space: "code/data"
                }
            ]
        ];
        params.ftpath// Installation directory of the Foundational Tools Suite = String undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "LSARAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sim28xx",
    boardFamily: "sim28xx",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL

The CPU simulated by this platform

Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 150.0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320C2812",
    revision: null
};
DETAILS
The device simulated is determined by the platform instance name or if this does not name a ti.catalog.c2800 module, then we simulate a TMS320C2812.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SRAM";
    // The default segment for data sections
    params.deviceName = String undefined;
    // The CPU simulated by this simulator platform
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SRAM",
            {
                name: "SRAM",
                base: 0x100000,
                len: 0x10000,
                page: 0,
                space: "code/data"
            }
        ]
    ];
    params.ftpath = String undefined;
    // Installation directory of the Foundational Tools Suite
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "LSARAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU simulated by this simulator platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is optional. If it's not set, then the Platform module parameter CPU.deviceName is used.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SRAM",
        {
            name: "SRAM",
            base: 0x100000,
            len: 0x10000,
            page: 0,
            space: "code/data"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.ftpath // instance
index URL

Installation directory of the Foundational Tools Suite

Configuration settings
var params = new Platform.Params;
...
const params.ftpath = String computed value;
DETAILS
The underlying simulation engine used to run executables produced using this platform is part of the Target Server / Foundational Tools product (http://www.hou.asp.ti.com/asp/sds/eft/projects/Foundation_Tools/Releases/index.html).
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "LSARAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:54 GMT


package ti.platforms.sim470xx
index URL

Platform package for the sim470xx platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim470xx platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/sim470xx/package.xdc
requires ti.catalog.arm;
requires xdc.platform[1, 0, 1];
package ti.platforms.sim470xx [1, 0, 1, 1] {
    module Platform;
    // Simulation-based Platform support for TI Arm (470x) platforms
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim470xx platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.sim470xx.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:03 GMT


module ti.platforms.sim470xx.Platform

metaonly module ti.platforms.sim470xx.Platform
index URL

Simulation-based Platform support for TI Arm (470x) platforms

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/sim470xx/Platform.xdc
var Platform = xdc.useModule('ti.platforms.sim470xx.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "sim470xx",
        boardFamily: "sim470xx",
        boardRevision: null
    };
    const Platform.CPU// The CPU simulated by this platform = IExeContext.Cpu {
        id: "0",
        clockRate: 600.0,
        catalogName: "ti.catalog.arm",
        deviceName: "TMS470R10",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "P_MEM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "D_MEM";
        params.deviceName// The CPU simulated by this simulator platform = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "D_MEM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sim470xx",
    boardFamily: "sim470xx",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL

The CPU simulated by this platform

Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 600.0,
    catalogName: "ti.catalog.arm",
    deviceName: "TMS470R10",
    revision: ""
};
DETAILS
The device simulated is determined by the platform instance name or if this does not name a ti.catalog.arm module, then we we simulate a TMS470.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "P_MEM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "D_MEM";
    // The default segment for data sections
    params.deviceName = String undefined;
    // The CPU simulated by this simulator platform
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "D_MEM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "P_MEM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "D_MEM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU simulated by this simulator platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is optional. If it's not set, then the Platform module parameter CPU.deviceName is used.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "D_MEM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:03 GMT


package ti.platforms.sim64Pxx
index URL

Platform package for the sim64Pxx platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim64Pxx platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/sim64Pxx/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.sim64Pxx [1, 0, 0] {
    module Platform;
    // Platform support for the sim64Pxx
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim64Pxx platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.sim64Pxx.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:59 GMT


module ti.platforms.sim64Pxx.Platform

metaonly module ti.platforms.sim64Pxx.Platform
index URL

Platform support for the sim64Pxx

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/sim64Pxx/Platform.xdc
var Platform = xdc.useModule('ti.platforms.sim64Pxx.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "sim64Pxx",
        boardFamily: "sim64Pxx",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320CTCI6482",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR";
        params.deviceName// The CPU simulated by this simulator platform = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR",
                {
                    name: "DDR",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.ftpath// Installation directory of the Foundational Tools Suite = String undefined;
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sim64Pxx",
    boardFamily: "sim64Pxx",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320CTCI6482",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR";
    // The default segment for data sections
    params.deviceName = String undefined;
    // The CPU simulated by this simulator platform
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR",
            {
                name: "DDR",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.ftpath = String undefined;
    // Installation directory of the Foundational Tools Suite
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU simulated by this simulator platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is optional. If it's not set, then the Platform module parameter CPU.deviceName is used.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR",
        {
            name: "DDR",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.ftpath // instance
index URL

Installation directory of the Foundational Tools Suite

Configuration settings
var params = new Platform.Params;
...
const params.ftpath = String computed value;
DETAILS
The underlying simulation engine used to run executables produced using this platform is part of the Target Server / Foundational Tools product (http://www.hou.asp.ti.com/asp/sds/eft/projects/Foundation_Tools/Releases/index.html).
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:59 GMT


package ti.platforms.sim6xxx
index URL

Platform package for the sim6xxx platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim6xxx platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/sim6xxx/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.sim6xxx [1, 0, 1, 1] {
    module Platform;
    // Simulation-based Platform support for 6xxx platforms
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the sim6xxx platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.sim6xxx.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:51 GMT


module ti.platforms.sim6xxx.Platform

metaonly module ti.platforms.sim6xxx.Platform
index URL

Simulation-based Platform support for 6xxx platforms

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/sim6xxx/Platform.xdc
var Platform = xdc.useModule('ti.platforms.sim6xxx.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "sim6xxx",
        boardFamily: "sim6xxx",
        boardRevision: null
    };
    const Platform.CPU// The CPU simulated by this platform = IExeContext.Cpu {
        id: "0",
        clockRate: 600.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320C6416",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "IRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SDRAM";
        params.deviceName// The CPU simulated by this simulator platform = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "SDRAM",
                {
                    name: "SDRAM",
                    base: 0x80000000,
                    len: 0x01000000,
                    space: "code/data"
                }
            ]
        ];
        params.ftpath// Installation directory of the Foundational Tools Suite = String undefined;
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "SDRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "sim6xxx",
    boardFamily: "sim6xxx",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL

The CPU simulated by this platform

Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 600.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320C6416",
    revision: ""
};
DETAILS
The device simulated is determined by the platform instance name or if this does not name a ti.catalog.c6000 module, we simulate a TMS320C6416.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "IRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SDRAM";
    // The default segment for data sections
    params.deviceName = String undefined;
    // The CPU simulated by this simulator platform
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "SDRAM",
            {
                name: "SDRAM",
                base: 0x80000000,
                len: 0x01000000,
                space: "code/data"
            }
        ]
    ];
    params.ftpath = String undefined;
    // Installation directory of the Foundational Tools Suite
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "SDRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "IRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU simulated by this simulator platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is optional. If it's not set, then the Platform module parameter CPU.deviceName is used.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "SDRAM",
        {
            name: "SDRAM",
            base: 0x80000000,
            len: 0x01000000,
            space: "code/data"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
This parameter defines the external portion of the platform's memory map.
config Platform.Params.ftpath // instance
index URL

Installation directory of the Foundational Tools Suite

Configuration settings
var params = new Platform.Params;
...
params.ftpath = String undefined;
DETAILS
The underlying simulation engine used to run executables produced using this platform is part of the Target Server / Foundational Tools product (http://www.hou.asp.ti.com/asp/sds/eft/projects/Foundation_Tools/Releases/index.html).
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "SDRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:51 GMT


package ti.platforms.simARP32
index URL

Platform package for the simARP32 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the simARP32 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simARP32/package.xdc
requires ti.catalog.arp32;
requires xdc.platform[1, 0, 1];
package ti.platforms.simARP32 [1, 0, 1, 0] {
    module Platform;
    // Simulation-based Platform support for TI Torrent platforms
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the simARP32 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.simARP32.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:55 GMT


module ti.platforms.simARP32.Platform

metaonly module ti.platforms.simARP32.Platform
index URL

Simulation-based Platform support for TI Torrent platforms

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/simARP32/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simARP32.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "simARP32",
        boardFamily: "simARP32",
        boardRevision: null
    };
    const Platform.CPU// The CPU simulated by this platform = IExeContext.Cpu {
        id: "0",
        clockRate: 200.0,
        catalogName: "ti.catalog.arp32",
        deviceName: "Arctic",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "ARP32";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DMEM";
        params.externalMemoryMap// Memory regions as defined in the Ducati Functional Specification = IPlatform.Memory[string] [
            [
                "ARP32VECS",
                {
                    comment: "External memory for ARP32 interrupt vectors",
                    name: "ARP32VECS",
                    base: 0x80000000,
                    len: 0x00000100,
                    page: 0,
                    space: "code/data"
                }
            ],
            [
                "ARP32",
                {
                    comment: "External memory for ARP32 use",
                    name: "ARP32",
                    base: 0x80000100,
                    len: 0x0fffff00,
                    page: 1,
                    space: "code/data"
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DMEM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simARP32",
    boardFamily: "simARP32",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL

The CPU simulated by this platform

Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 200.0,
    catalogName: "ti.catalog.arp32",
    deviceName: "Arctic",
    revision: "1.0"
};
DETAILS
The device simulated is determined by the platform instance name or if this does not name a ti.catalog.arm module, then we we simulate a TMS470.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "ARP32";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DMEM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the Ducati Functional Specification
        [
            "ARP32VECS",
            {
                comment: "External memory for ARP32 interrupt vectors",
                name: "ARP32VECS",
                base: 0x80000000,
                len: 0x00000100,
                page: 0,
                space: "code/data"
            }
        ],
        [
            "ARP32",
            {
                comment: "External memory for ARP32 use",
                name: "ARP32",
                base: 0x80000100,
                len: 0x0fffff00,
                page: 1,
                space: "code/data"
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DMEM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "ARP32";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DMEM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the Ducati Functional Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "ARP32VECS",
        {
            comment: "External memory for ARP32 interrupt vectors",
            name: "ARP32VECS",
            base: 0x80000000,
            len: 0x00000100,
            page: 0,
            space: "code/data"
        }
    ],
    [
        "ARP32",
        {
            comment: "External memory for ARP32 use",
            name: "ARP32",
            base: 0x80000100,
            len: 0x0fffff00,
            page: 1,
            space: "code/data"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DMEM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:55 GMT


package ti.platforms.simArctic
index URL

Platform package for the simArctic platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the simArctic platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simArctic/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.simArctic [1, 0, 0] {
    module Platform;
    // Platform support for the simArctic
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the simArctic platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.simArctic.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:49 GMT


module ti.platforms.simArctic.Platform

metaonly module ti.platforms.simArctic.Platform
index URL

Platform support for the simArctic

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/simArctic/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simArctic.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.ARP32// = IExeContext.Cpu {
        id: "0",
        clockRate: 200.0,
        catalogName: "ti.catalog.arp32",
        deviceName: "Arctic",
        revision: ""
    };
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simArctic",
        boardFamily: "simArctic",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "1",
        clockRate: 300.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "Arctic",
        revision: ""
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "ARP32VECS",
                {
                    comment: "External memory for ARP32 interrupt vectors",
                    name: "ARP32VECS",
                    base: 0x80000000,
                    len: 0x00000100,
                    space: "code/data"
                }
            ],
            [
                "ARP32",
                {
                    comment: "External memory for ARP32 use",
                    name: "ARP32",
                    base: 0x80000100,
                    len: 0x01ffff00,
                    space: "code/data"
                }
            ],
            [
                "DSP",
                {
                    comment: "External memory for DSP use",
                    name: "DSP",
                    base: 0x82000000,
                    len: 0x02000000,
                    space: "code/data"
                }
            ],
            [
                "SHARED",
                {
                    comment: "Shared external memory",
                    name: "SHARED",
                    base: 0x84000000,
                    len: 0x0C000000,
                    space: "code/data"
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.ARP32 // module-wide
index URL
Configuration settings
const Platform.ARP32 = IExeContext.Cpu {
    id: "0",
    clockRate: 200.0,
    catalogName: "ti.catalog.arp32",
    deviceName: "Arctic",
    revision: ""
};
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simArctic",
    boardFamily: "simArctic",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "1",
    clockRate: 300.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "Arctic",
    revision: ""
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "ARP32VECS",
            {
                comment: "External memory for ARP32 interrupt vectors",
                name: "ARP32VECS",
                base: 0x80000000,
                len: 0x00000100,
                space: "code/data"
            }
        ],
        [
            "ARP32",
            {
                comment: "External memory for ARP32 use",
                name: "ARP32",
                base: 0x80000100,
                len: 0x01ffff00,
                space: "code/data"
            }
        ],
        [
            "DSP",
            {
                comment: "External memory for DSP use",
                name: "DSP",
                base: 0x82000000,
                len: 0x02000000,
                space: "code/data"
            }
        ],
        [
            "SHARED",
            {
                comment: "Shared external memory",
                name: "SHARED",
                base: 0x84000000,
                len: 0x0C000000,
                space: "code/data"
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "ARP32VECS",
        {
            comment: "External memory for ARP32 interrupt vectors",
            name: "ARP32VECS",
            base: 0x80000000,
            len: 0x00000100,
            space: "code/data"
        }
    ],
    [
        "ARP32",
        {
            comment: "External memory for ARP32 use",
            name: "ARP32",
            base: 0x80000100,
            len: 0x01ffff00,
            space: "code/data"
        }
    ],
    [
        "DSP",
        {
            comment: "External memory for DSP use",
            name: "DSP",
            base: 0x82000000,
            len: 0x02000000,
            space: "code/data"
        }
    ],
    [
        "SHARED",
        {
            comment: "Shared external memory",
            name: "SHARED",
            base: 0x84000000,
            len: 0x0C000000,
            space: "code/data"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:49 GMT


package ti.platforms.simCM3
index URL

Platform package for the simCM3 platform

This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the simCM3 platform.
XDCspec declarations sourced in ti/platforms/simCM3/package.xdc
requires ti.catalog.arm.cortexm3;
requires xdc.platform[1, 0, 1];
package ti.platforms.simCM3 [1, 0, 1, 0] {
    module Platform;
    // Simulation-based Platform support for TI Cortex M3 platforms
}
generated on Sun, 25 Nov 2018 22:21:05 GMT


module ti.platforms.simCM3.Platform

metaonly module ti.platforms.simCM3.Platform
index URL

Simulation-based Platform support for TI Cortex M3 platforms

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/simCM3/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simCM3.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// This platform's board attributes = IPlatform.Board {
        id: "0",
        boardName: "simCM3",
        boardFamily: "simCM3",
        boardRevision: null
    };
    const Platform.CPU// The CPU simulated by this platform = IExeContext.Cpu {
        id: "0",
        clockRate: 200.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "CortexM3",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "Code";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "Code",
                {
                    comment: "Code Memory",
                    name: "Code",
                    base: 0x00000000,
                    len: 0x20000000,
                    space: "code",
                    access: "RWX"
                }
            ],
            [
                "SRAM",
                {
                    comment: "Shared RAM",
                    name: "SRAM",
                    base: 0x20000000,
                    len: 0x20000000,
                    space: "data",
                    access: "RW"
                }
            ]
        ];
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has a single Cpu, and therefore, only declares a single CPU configuration object. Multi-CPU platforms would declare multiple Cpu configuration parameters (one per platform CPU).
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL

This platform's board attributes

Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simCM3",
    boardFamily: "simCM3",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL

The CPU simulated by this platform

Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 200.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "CortexM3",
    revision: "1.0"
};
DETAILS
The device simulated is determined by the platform instance name or if this does not name a ti.catalog.arm module, then we we simulate a TMS470.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "Code";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "Code",
            {
                comment: "Code Memory",
                name: "Code",
                base: 0x00000000,
                len: 0x20000000,
                space: "code",
                access: "RWX"
            }
        ],
        [
            "SRAM",
            {
                comment: "Shared RAM",
                name: "SRAM",
                base: 0x20000000,
                len: 0x20000000,
                space: "data",
                access: "RW"
            }
        ]
    ];
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "SRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "Code";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "Code",
        {
            comment: "Code Memory",
            name: "Code",
            base: 0x00000000,
            len: 0x20000000,
            space: "code",
            access: "RWX"
        }
    ],
    [
        "SRAM",
        {
            comment: "Shared RAM",
            name: "SRAM",
            base: 0x20000000,
            len: 0x20000000,
            space: "data",
            access: "RW"
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:05 GMT


package ti.platforms.simDM8168
index URL

Platform package for the simDM8168 platform

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the simDM8168 platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simDM8168/package.xdc
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexa8;
requires xdc.platform[1, 0, 1];
package ti.platforms.simDM8168 [1, 0, 0] {
    module Platform;
    // Platform support for the simDM8168
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the simDM8168 platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.simDM8168.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:21:06 GMT


module ti.platforms.simDM8168.Platform

metaonly module ti.platforms.simDM8168.Platform
index URL

Platform support for the simDM8168

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/simDM8168/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simDM8168.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simDM8168",
        boardFamily: "simDM8168",
        boardRevision: null
    };
    const Platform.DSS// = IExeContext.Cpu {
        id: "1",
        clockRate: 250.0,
        catalogName: "ti.catalog.arm.cortexm3",
        deviceName: "TMS320DM8168",
        revision: "1.0"
    };
    const Platform.GEM// = IExeContext.Cpu {
        id: "0",
        clockRate: 800.0,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320DM8168",
        revision: ""
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "2",
        clockRate: 1000.0,
        catalogName: "ti.catalog.arm.cortexa8",
        deviceName: "TMS320DM8168",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "DDR3_RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "DDR3_RAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR3_RAM",
                {
                    comment: "External RAM",
                    name: "DDR3_RAM",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "DDR3_RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 4 CPU's, a host GPP, 2 M3's, and a C674 DSP.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simDM8168",
    boardFamily: "simDM8168",
    boardRevision: null
};
config Platform.DSS // module-wide
index URL
Configuration settings
const Platform.DSS = IExeContext.Cpu {
    id: "1",
    clockRate: 250.0,
    catalogName: "ti.catalog.arm.cortexm3",
    deviceName: "TMS320DM8168",
    revision: "1.0"
};
config Platform.GEM // module-wide
index URL
Configuration settings
const Platform.GEM = IExeContext.Cpu {
    id: "0",
    clockRate: 800.0,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320DM8168",
    revision: ""
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "2",
    clockRate: 1000.0,
    catalogName: "ti.catalog.arm.cortexa8",
    deviceName: "TMS320DM8168",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "DDR3_RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "DDR3_RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR3_RAM",
            {
                comment: "External RAM",
                name: "DDR3_RAM",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "DDR3_RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR3_RAM",
        {
            comment: "External RAM",
            name: "DDR3_RAM",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "DDR3_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:21:06 GMT


package ti.platforms.simKepler
index URL

Platform package for the Kepler simulator

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Kepler simulator platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simKepler/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.simKepler [1, 0, 0, 0] {
    module Platform;
    // Platform support for the simKepler
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Kepler simulator platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.simKepler.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:50 GMT


module ti.platforms.simKepler.Platform

metaonly module ti.platforms.simKepler.Platform
index URL

Platform support for the simKepler

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/simKepler/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simKepler.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simKepler",
        boardFamily: "simKepler",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "Kepler",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L2SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L2SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L2SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simKepler",
    boardFamily: "simKepler",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "Kepler",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L2SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L2SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L2SRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:50 GMT


package ti.platforms.simTCI6608
index URL

Platform package for the TCI6608 simulator

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Tesla simulator platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simTCI6608/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.simTCI6608 [1, 0, 0, 0] {
    module Platform;
    // Platform support for the simTCI6608
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Tesla simulator platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.simTCI6608.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:58 GMT


module ti.platforms.simTCI6608.Platform

metaonly module ti.platforms.simTCI6608.Platform
index URL

Platform support for the simTCI6608

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/simTCI6608/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simTCI6608.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simTCI6608",
        boardFamily: "simTCI6608",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TCI6608",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "L2SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L2SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L2SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simTCI6608",
    boardFamily: "simTCI6608",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TCI6608",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "L2SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L2SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L2SRAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:58 GMT


package ti.platforms.simTCI6616
index URL

Platform package for the TCI6616 simulator

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Tesla simulator platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simTCI6616/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.simTCI6616 [1, 0, 0, 0] {
    module Platform;
    // Platform support for the simTCI6616
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Tesla simulator platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.simTCI6616.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:50 GMT


module ti.platforms.simTCI6616.Platform

metaonly module ti.platforms.simTCI6616.Platform
index URL

Platform support for the simTCI6616

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/simTCI6616/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simTCI6616.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simTCI6616",
        boardFamily: "simTCI6616",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "TMS320TCI6616",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.ccsSim// = String undefined;
        params.codeMemory// The default segment for code sections = String "L2SRAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "L2SRAM";
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] [
            [
                "DDR2",
                {
                    name: "DDR2",
                    base: 0x80000000,
                    len: 0x10000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "L2SRAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simTCI6616",
    boardFamily: "simTCI6616",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "TMS320TCI6616",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.ccsSim = String undefined;
    //
    params.codeMemory = String "L2SRAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "L2SRAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // A mapping of memory names to memory objects for external memory
        [
            "DDR2",
            {
                name: "DDR2",
                base: 0x80000000,
                len: 0x10000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "L2SRAM";
    // The default segment for stack
config Platform.Params.ccsSim // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.ccsSim = String undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "DDR2",
        {
            name: "DDR2",
            base: 0x80000000,
            len: 0x10000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "L2SRAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:50 GMT


package ti.platforms.simTesla
index URL

Platform package for the Tesla functional simulator

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Tesla simulator platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simTesla/package.xdc
requires ti.catalog.c6000;
requires xdc.platform[1, 0, 1];
package ti.platforms.simTesla [1, 0, 0, 0] {
    module Platform;
    // Platform support for the simTesla
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Tesla simulator platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platfoms.simTesla.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:58 GMT


module ti.platforms.simTesla.Platform

metaonly module ti.platforms.simTesla.Platform
index URL

Platform support for the simTesla

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/platforms/simTesla/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simTesla.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simTesla",
        boardFamily: "simTesla",
        boardRevision: null
    };
    const Platform.CPU// = IExeContext.Cpu {
        id: "0",
        clockRate: 466,
        catalogName: "ti.catalog.c6000",
        deviceName: "OMAP4430",
        revision: "1.0"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String "EXT_RAM";
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String "EXT_RAM";
        params.externalMemoryMap// Memory regions as defined in the Tesla Functional Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "External RAM",
                    name: "EXT_RAM",
                    base: 0x20000000,
                    len: 0x01000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String "EXT_RAM";
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simTesla",
    boardFamily: "simTesla",
    boardRevision: null
};
config Platform.CPU // module-wide
index URL
Configuration settings
const Platform.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 466,
    catalogName: "ti.catalog.c6000",
    deviceName: "OMAP4430",
    revision: "1.0"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String "EXT_RAM";
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String "EXT_RAM";
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the Tesla Functional Specification
        [
            "EXT_RAM",
            {
                comment: "External RAM",
                name: "EXT_RAM",
                base: 0x20000000,
                len: 0x01000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String "EXT_RAM";
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the Tesla Functional Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "External RAM",
            name: "EXT_RAM",
            base: 0x20000000,
            len: 0x01000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String "EXT_RAM";
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:58 GMT


package ti.platforms.simVayu
index URL

Platform package for the Vayu SDP

  • DETAILS
  • THROWS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Vayu SDP platform. [ more ... ]
XDCspec declarations sourced in ti/platforms/simVayu/package.xdc
requires ti.catalog.arp32;
requires ti.catalog.c6000;
requires ti.catalog.arm.cortexm4;
requires ti.catalog.arm.cortexa15;
requires xdc.platform[1, 0, 1];
package ti.platforms.simVayu [1, 0, 0, 0] {
    module Platform;
    // Platform support for simVayu
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on the Vayu SDP platform.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
ti.platforms.simVayu.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
generated on Sun, 25 Nov 2018 22:20:54 GMT


module ti.platforms.simVayu.Platform

metaonly module ti.platforms.simVayu.Platform
index URL

Platform support for simVayu

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc. [ more ... ]
Configuration settings sourced in ti/platforms/simVayu/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simVayu.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simVayu",
        boardFamily: "simVayu",
        boardRevision: null
    };
    const Platform.DSP// = IExeContext.Cpu {
        id: "0",
        clockRate: 1000,
        catalogName: "ti.catalog.c6000",
        deviceName: "Vayu",
        revision: "1.0"
    };
    const Platform.DSP1// = Any {
        externalMemoryMap: [
            [
                "DSP1_PROG",
                {
                    name: "DSP1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8C000000,
                    len: 0x1000000,
                    comment: "DSP1 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP1_PROG",
        dataMemory: "DSP1_PROG",
        stackMemory: "DSP1_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.DSP2// = Any {
        externalMemoryMap: [
            [
                "DSP2_PROG",
                {
                    name: "DSP2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8D000000,
                    len: 0x1000000,
                    comment: "DSP2 Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "DSP2_PROG",
        dataMemory: "DSP2_PROG",
        stackMemory: "DSP2_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };
    const Platform.EVE// = IExeContext.Cpu {
        id: "2",
        clockRate: 200.0,
        catalogName: "ti.catalog.arp32",
        deviceName: "Vayu",
        revision: "1.0"
    };
    const Platform.EVE1// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80000000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE1 Vector Table (256 B)"
                }
            ],
            [
                "EVE1_PROG",
                {
                    name: "EVE1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x81000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE1 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE1_PROG",
        dataMemory: "EVE1_PROG",
        stackMemory: "EVE1_PROG"
    };
    const Platform.EVE2// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80010000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE2 Vector Table (256 B)"
                }
            ],
            [
                "EVE2_PROG",
                {
                    name: "EVE2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x82000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE2 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE2_PROG",
        dataMemory: "EVE2_PROG",
        stackMemory: "EVE2_PROG"
    };
    const Platform.EVE3// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80020000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE3 Vector Table (256 B)"
                }
            ],
            [
                "EVE3_PROG",
                {
                    name: "EVE3_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x83000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE3 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE3_PROG",
        dataMemory: "EVE3_PROG",
        stackMemory: "EVE3_PROG"
    };
    const Platform.EVE4// = Any {
        externalMemoryMap: [
            [
                "EVEVECS",
                {
                    name: "EVEVECS",
                    space: "code/data",
                    access: "RWX",
                    base: 0x80030000,
                    len: 0x100,
                    page: 0,
                    comment: "EVE4 Vector Table (256 B)"
                }
            ],
            [
                "EVE4_PROG",
                {
                    name: "EVE4_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x84000000,
                    len: 0x400000,
                    page: 1,
                    comment: "EVE4 Program Memory (4 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "EVE4_PROG",
        dataMemory: "EVE4_PROG",
        stackMemory: "EVE4_PROG"
    };
    const Platform.GPP// = IExeContext.Cpu {
        id: "3",
        clockRate: 800.0,
        catalogName: "ti.catalog.arm.cortexa15",
        deviceName: "Vayu",
        revision: "1.0"
    };
    const Platform.HOST// = Any {
        externalMemoryMap: [
            [
                "HOST_PROG",
                {
                    name: "HOST_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8B000000,
                    len: 0x1000000,
                    comment: "HOST Program Memory (16 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "HOST_PROG",
        dataMemory: "HOST_PROG",
        stackMemory: "HOST_PROG"
    };
    const Platform.IPU1// = Any {
        externalMemoryMap: [
            [
                "IPU1_PROG",
                {
                    name: "IPU1_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A000000,
                    len: 0x800000,
                    comment: "IPU1 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU1_PROG",
        dataMemory: "IPU1_PROG",
        stackMemory: "IPU1_PROG"
    };
    const Platform.IPU2// = Any {
        externalMemoryMap: [
            [
                "IPU2_PROG",
                {
                    name: "IPU2_PROG",
                    space: "code/data",
                    access: "RWX",
                    base: 0x8A800000,
                    len: 0x800000,
                    comment: "IPU2 Program Memory (8 MB)"
                }
            ],
            [
                "SR_0",
                 Platform.SR_0
            ]
        ],
        codeMemory: "IPU2_PROG",
        dataMemory: "IPU2_PROG",
        stackMemory: "IPU2_PROG"
    };
    const Platform.M4// = IExeContext.Cpu {
        id: "1",
        clockRate: 266.0,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "Vayu",
        revision: "1.0"
    };
    const Platform.SR_0// = Any {
        name: "SR_0",
        space: "data",
        access: "RWX",
        base: 0x8E000000,
        len: 0x1000000,
        comment: "SR#0 Memory (16 MB)"
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.codeMemory// The default segment for code sections = String undefined;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String undefined;
        params.externalMemoryMap// Memory regions as defined in the Vayu Simulator Specification = IPlatform.Memory[string] [
            [
                "EXT_RAM",
                {
                    comment: "1 GB External RAM Memory",
                    name: "EXT_RAM",
                    base: 0x80000000,
                    len: 0x40000000
                }
            ]
        ];
        params.l1DMode// = String "32k";
        params.l1PMode// = String "32k";
        params.l2Mode// = String "0k";
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
The configuration parameters are initialized in this package's configuration script (package.cfg) and "bound" to the TCOM object model. Once they are part of the model, these parameters are queried by a program's configuration script.
This particular platform has 1 Cortex-A15, 4 EVE's, 2 Benelli/IPU Sub-system (Dual M4's) and 2 C66x DSP's.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
const Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simVayu",
    boardFamily: "simVayu",
    boardRevision: null
};
config Platform.DSP // module-wide
index URL
Configuration settings
const Platform.DSP = IExeContext.Cpu {
    id: "0",
    clockRate: 1000,
    catalogName: "ti.catalog.c6000",
    deviceName: "Vayu",
    revision: "1.0"
};
config Platform.DSP1 // module-wide
index URL
Configuration settings
const Platform.DSP1 = Any {
    externalMemoryMap: [
        [
            "DSP1_PROG",
            {
                name: "DSP1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8C000000,
                len: 0x1000000,
                comment: "DSP1 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP1_PROG",
    dataMemory: "DSP1_PROG",
    stackMemory: "DSP1_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.DSP2 // module-wide
index URL
Configuration settings
const Platform.DSP2 = Any {
    externalMemoryMap: [
        [
            "DSP2_PROG",
            {
                name: "DSP2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8D000000,
                len: 0x1000000,
                comment: "DSP2 Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "DSP2_PROG",
    dataMemory: "DSP2_PROG",
    stackMemory: "DSP2_PROG",
    l1DMode: "32k",
    l1PMode: "32k",
    l2Mode: "128k"
};
config Platform.EVE // module-wide
index URL
Configuration settings
const Platform.EVE = IExeContext.Cpu {
    id: "2",
    clockRate: 200.0,
    catalogName: "ti.catalog.arp32",
    deviceName: "Vayu",
    revision: "1.0"
};
config Platform.EVE1 // module-wide
index URL
Configuration settings
const Platform.EVE1 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80000000,
                len: 0x100,
                page: 0,
                comment: "EVE1 Vector Table (256 B)"
            }
        ],
        [
            "EVE1_PROG",
            {
                name: "EVE1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x81000000,
                len: 0x400000,
                page: 1,
                comment: "EVE1 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE1_PROG",
    dataMemory: "EVE1_PROG",
    stackMemory: "EVE1_PROG"
};
config Platform.EVE2 // module-wide
index URL
Configuration settings
const Platform.EVE2 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80010000,
                len: 0x100,
                page: 0,
                comment: "EVE2 Vector Table (256 B)"
            }
        ],
        [
            "EVE2_PROG",
            {
                name: "EVE2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x82000000,
                len: 0x400000,
                page: 1,
                comment: "EVE2 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE2_PROG",
    dataMemory: "EVE2_PROG",
    stackMemory: "EVE2_PROG"
};
config Platform.EVE3 // module-wide
index URL
Configuration settings
const Platform.EVE3 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80020000,
                len: 0x100,
                page: 0,
                comment: "EVE3 Vector Table (256 B)"
            }
        ],
        [
            "EVE3_PROG",
            {
                name: "EVE3_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x83000000,
                len: 0x400000,
                page: 1,
                comment: "EVE3 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE3_PROG",
    dataMemory: "EVE3_PROG",
    stackMemory: "EVE3_PROG"
};
config Platform.EVE4 // module-wide
index URL
Configuration settings
const Platform.EVE4 = Any {
    externalMemoryMap: [
        [
            "EVEVECS",
            {
                name: "EVEVECS",
                space: "code/data",
                access: "RWX",
                base: 0x80030000,
                len: 0x100,
                page: 0,
                comment: "EVE4 Vector Table (256 B)"
            }
        ],
        [
            "EVE4_PROG",
            {
                name: "EVE4_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x84000000,
                len: 0x400000,
                page: 1,
                comment: "EVE4 Program Memory (4 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "EVE4_PROG",
    dataMemory: "EVE4_PROG",
    stackMemory: "EVE4_PROG"
};
config Platform.GPP // module-wide
index URL
Configuration settings
const Platform.GPP = IExeContext.Cpu {
    id: "3",
    clockRate: 800.0,
    catalogName: "ti.catalog.arm.cortexa15",
    deviceName: "Vayu",
    revision: "1.0"
};
config Platform.HOST // module-wide
index URL
Configuration settings
const Platform.HOST = Any {
    externalMemoryMap: [
        [
            "HOST_PROG",
            {
                name: "HOST_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8B000000,
                len: 0x1000000,
                comment: "HOST Program Memory (16 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "HOST_PROG",
    dataMemory: "HOST_PROG",
    stackMemory: "HOST_PROG"
};
config Platform.IPU1 // module-wide
index URL
Configuration settings
const Platform.IPU1 = Any {
    externalMemoryMap: [
        [
            "IPU1_PROG",
            {
                name: "IPU1_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A000000,
                len: 0x800000,
                comment: "IPU1 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU1_PROG",
    dataMemory: "IPU1_PROG",
    stackMemory: "IPU1_PROG"
};
config Platform.IPU2 // module-wide
index URL
Configuration settings
const Platform.IPU2 = Any {
    externalMemoryMap: [
        [
            "IPU2_PROG",
            {
                name: "IPU2_PROG",
                space: "code/data",
                access: "RWX",
                base: 0x8A800000,
                len: 0x800000,
                comment: "IPU2 Program Memory (8 MB)"
            }
        ],
        [
            "SR_0",
             Platform.SR_0
        ]
    ],
    codeMemory: "IPU2_PROG",
    dataMemory: "IPU2_PROG",
    stackMemory: "IPU2_PROG"
};
config Platform.M4 // module-wide
index URL
Configuration settings
const Platform.M4 = IExeContext.Cpu {
    id: "1",
    clockRate: 266.0,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "Vayu",
    revision: "1.0"
};
config Platform.SR_0 // module-wide
index URL
Configuration settings
const Platform.SR_0 = Any {
    name: "SR_0",
    space: "data",
    access: "RWX",
    base: 0x8E000000,
    len: 0x1000000,
    comment: "SR#0 Memory (16 MB)"
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.codeMemory = String undefined;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String undefined;
    // The default segment for data sections
    params.externalMemoryMap = IPlatform.Memory[string] [
    // Memory regions as defined in the Vayu Simulator Specification
        [
            "EXT_RAM",
            {
                comment: "1 GB External RAM Memory",
                name: "EXT_RAM",
                base: 0x80000000,
                len: 0x40000000
            }
        ]
    ];
    params.l1DMode = String "32k";
    //
    params.l1PMode = String "32k";
    //
    params.l2Mode = String "0k";
    //
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String undefined;
    // The default segment for stack
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.externalMemoryMap // instance
index URL

Memory regions as defined in the Vayu Simulator Specification

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] [
    [
        "EXT_RAM",
        {
            comment: "1 GB External RAM Memory",
            name: "EXT_RAM",
            base: 0x80000000,
            len: 0x40000000
        }
    ]
];
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.l1DMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1DMode = String "32k";
config Platform.Params.l1PMode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l1PMode = String "32k";
config Platform.Params.l2Mode // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.l2Mode = String "0k";
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String undefined;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:54 GMT


package ti.platforms.simplelink
index URL

Platform support for the SimpleLink devices

XDCspec declarations sourced in ti/platforms/simplelink/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.arm.cortexm4;
package ti.platforms.simplelink [1, 0, 0] {
    module Platform;
    // A generic platform that supports any CC13xx, CC26xx, or CC32xx device
}
generated on Sun, 25 Nov 2018 22:20:51 GMT


module ti.platforms.simplelink.Platform

metaonly module ti.platforms.simplelink.Platform
index URL

A generic platform that supports any CC13xx, CC26xx, or CC32xx device

  • DETAILS
  • NOTE
  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/simplelink/Platform.xdc
var Platform = xdc.useModule('ti.platforms.simplelink.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "simplelink",
        boardFamily: null,
        boardRevision: null
    };
     Platform.useGnuRomLinkCmd// Use ROM compatible linker script when building using GNU tools = Bool false;
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 80.0,
            catalogName: "ti.catalog.arm.cortexm4",
            deviceName: "CC32xx",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.simplelink:CC3200"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.simplelink:CC3200");
NOTE
The 'simplelink' platform provides support for allowing the user to specify the application's C stack size within their linker command file. If the user sets 'Program.stack = 0' in their configuration file, then it is up to the user to add the necessary content to their linker command file to define the size and placment of the C stack. Additionally, if GNU tools are being used, then the user must define 'STACKSIZE' in their linker command file and have its value be the size of the C stack in bytes. The 'STACKSIZE' symbol is used internally to initialize other symbols that must be provided to SYS/BIOS.
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.simplelink:CC3200:1:20
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.simplelink:CC3200
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "simplelink",
    boardFamily: null,
    boardRevision: null
};
config Platform.useGnuRomLinkCmd // module-wide
index URL

Use ROM compatible linker script when building using GNU tools

Configuration settings
Platform.useGnuRomLinkCmd = Bool false;
DETAILS
If this config param is set to true and "includeLinkCmdFile" is true, the ROM compatible linker script will be used. The ROM compatible linker script is required when building a ROM based application.
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 80.0,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "CC32xx",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 80.0,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "CC32xx",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:51 GMT


package ti.platforms.stellaris
index URL

Platform support for any Stellaris device

XDCspec declarations sourced in ti/platforms/stellaris/package.xdc
requires xdc.platform[1, 0, 1];
package ti.platforms.stellaris [1, 0, 0] {
}
generated on Sun, 25 Nov 2018 22:21:06 GMT


package ti.platforms.tiva
index URL

Platform support for any Tiva device

XDCspec declarations sourced in ti/platforms/tiva/package.xdc
requires xdc.platform[1, 0, 1];
requires ti.catalog.arm.cortexm3;
requires ti.catalog.arm.cortexm4;
package ti.platforms.tiva [1, 0, 0] {
    module Platform;
    // A generic platform that supports any Tiva device
}
generated on Sun, 25 Nov 2018 22:20:52 GMT


module ti.platforms.tiva.Platform

metaonly module ti.platforms.tiva.Platform
index URL

A generic platform that supports any Tiva device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/tiva/Platform.xdc
var Platform = xdc.useModule('ti.platforms.tiva.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "tiva",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 1.0,
            catalogName: "ti.catalog.arm.cortexm4",
            deviceName: "Tiva",
            revision: ""
        };
        params.clockRate// The clock rate for this device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.tiva:TM4C1290NCZAD"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.tiva:TM4C1290NCZAD");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.tiva:TM4C1290NCZAD:1:20
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.tiva:TM4C1290NCZAD
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "tiva",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 1.0,
        catalogName: "ti.catalog.arm.cortexm4",
        deviceName: "Tiva",
        revision: ""
    };
    params.clockRate = Double undefined;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 1.0,
    catalogName: "ti.catalog.arm.cortexm4",
    deviceName: "Tiva",
    revision: ""
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:52 GMT


package ti.platforms.tms320x28
index URL

Generic 28xx platform support

XDCspec declarations sourced in ti/platforms/tms320x28/package.xdc
requires ti.catalog.c2800;
package ti.platforms.tms320x28 [1, 0, 0] {
    module Platform;
    // A generic platform that supports any TMS320x28 device
}
generated on Sun, 25 Nov 2018 22:20:56 GMT


module ti.platforms.tms320x28.Platform

metaonly module ti.platforms.tms320x28.Platform
index URL

A generic platform that supports any TMS320x28 device

  • Configuration settings
  • Individual elements
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way: [ more ... ]
Configuration settings sourced in ti/platforms/tms320x28/Platform.xdc
var Platform = xdc.useModule('ti.platforms.tms320x28.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
    const Platform.nameFormat// Encoding of instance creation parameters in the instance's name = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "tms320x28",
        boardFamily: null,
        boardRevision: null
    };
     Platform.genAliases// Generate symbol mapping for TI Tools 6.0 or newer = Bool true;
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 0,
            catalogName: "ti.catalog.c2800",
            deviceName: "TMS320F28069",
            revision: null
        };
        params.clockRate// The clock rate for this device = Double 0;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The name of an ICpuDataSheet module for the device = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.includeLinkCmdFile// The flag that specifies if the platform should include a linker command file = Bool false;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
DETAILS
The device to be used by this platform is passed as the platform instance name. On the xdc.tools.configuro command line, it is done in the following way:
  xs xdc.tools.configuro ... -p "ti.platforms.tms320x28:TMS320C2812"
In package.bld, the platform instance is selected as in:
  Pkg.addExecutable("test", target, "ti.platforms.tms320x28:TMS320C2812");
struct Platform.Board
index URL

Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
index URL

A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.nameFormat // module-wide
index URL

Encoding of instance creation parameters in the instance's name

Configuration settings
const Platform.nameFormat = String "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
DETAILS
For this platform, the parameters deviceName, includeLinkCmdFile and clockRate can be encoded in the instance name supplied on xdc.tools.configuro command line, for example:
      xs xdc.tools.configuro ... -p ti.platforms.tms320x28:TMS320F28035:1:60
Optional parameters can be omitted:
      xs xdc.tools.configuro ... -p ti.platforms.tms320x28:TMS320F28035
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "tms320x28",
    boardFamily: null,
    boardRevision: null
};
config Platform.genAliases // module-wide
index URL

Generate symbol mapping for TI Tools 6.0 or newer

Configuration settings
Platform.genAliases = Bool true;
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 0,
        catalogName: "ti.catalog.c2800",
        deviceName: "TMS320F28069",
        revision: null
    };
    params.clockRate = Double 0;
    // The clock rate for this device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The name of an ICpuDataSheet module for the device
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.includeLinkCmdFile = Bool false;
    // The flag that specifies if the platform should include a linker command file
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 0,
    catalogName: "ti.catalog.c2800",
    deviceName: "TMS320F28069",
    revision: null
};
config Platform.Params.clockRate // instance
index URL

The clock rate for this device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double 0;
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The name of an ICpuDataSheet module for the device

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required, but it does not have to be set explicitly; it can be encoded in the instance's name.
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.includeLinkCmdFile // instance
index URL

The flag that specifies if the platform should include a linker command file

Configuration settings
var params = new Platform.Params;
...
params.includeLinkCmdFile = Bool false;
DETAILS
By default, a user is responsible for adding a linker command file to the project, or to the linker command line. However, if this flag is set, this platform will include a default linker command file for the selected device.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:20:56 GMT


package ti.sdoarch.standards.pkg
index URL

SDO Architecture Team Package Standard

This package contains the SDO Architecture Team's Package Standard: a set of rules and guidelines used to deploy production quality real-time target content. [ more ... ]
XDCspec declarations sourced in ti/sdoarch/standards/pkg/package.xdc
package ti.sdoarch.standards.pkg [1, 0, 0] {
    interface IVersion;
    // Standard package version number interface
}
DETAILS
This package contains the SDO Architecture Team's Package Standard: a set of rules and guidelines used to deploy production quality real-time target content.
The files in this package are not licensed; i.e., they are in the public domain.
generated on Sun, 25 Nov 2018 22:21:22 GMT


interface ti.sdoarch.standards.pkg.IVersion
index URL

Standard package version number interface

This interface is part of the SDO Package Standard. Each conformant package that supplies a version number contains a module named Version that implements this interface. In other words, [ more ... ]
XDCspec summary sourced in ti/sdoarch/standards/pkg/IVersion.xdc
interface IVersion { ...
// inherits xdc.runtime.IModule
XDCspec declarations sourced in ti/sdoarch/standards/pkg/IVersion.xdc
package ti.sdoarch.standards.pkg;
interface IVersion {
module-wide constants & types
    const UInt16 MAJOR// Major version number;
    const UInt16 MINOR// Minor version number;
    const UInt16 PATCH// Patch level;
    const UInt16 WIDTH// Minimum width of print fields;
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    metaonly function getString// Returns a string representation of the version(separator);
}
DETAILS
This interface is part of the SDO Package Standard. Each conformant package that supplies a version number contains a module named Version that implements this interface. In other words,
  • the package's package.xdc file declares Version as one of it's modules
  • the package contains a spec for the Version module (named Version.xdc) and a header generated from this spec (named Version.h)
  • the Version.xdc file may optionally be generated from the ti/sdoarch/standards/pkg/Version.xdt template when the package's build script runs.
This interface defines a set of values that are used to
  1. informally communicate the "degree" of change between successive releases of a package,
  2. provide a "key" that enables the producer to unambigeously identify the sources (and tools) used to produce the package, and
  3. enable consumers to easily communicate to producers the version(s) of the package(s) they are using.
const IVersion.MAJOR
index URL

Major version number

XDCspec declarations sourced in ti/sdoarch/standards/pkg/IVersion.xdc
const UInt16 MAJOR;
DETAILS
This number should be changed when major changes in the package occur. Examples include adding new modules, adding substantial new features to the algorithm(s).
const IVersion.MINOR
index URL

Minor version number

XDCspec declarations sourced in ti/sdoarch/standards/pkg/IVersion.xdc
const UInt16 MINOR;
DETAILS
This number should be changed when minor changes in the package occur. Examples include minor changes to the existing APIs, adding minor features to the algorithms(s) including expanding the configuration options.
const IVersion.PATCH
index URL

Patch level

XDCspec declarations sourced in ti/sdoarch/standards/pkg/IVersion.xdc
const UInt16 PATCH;
DETAILS
This number should be changed when bug fixes or performance improvements are introduced. There should be no changes in the APIs in this case.
const IVersion.WIDTH
index URL

Minimum width of print fields

XDCspec declarations sourced in ti/sdoarch/standards/pkg/IVersion.xdc
const UInt16 WIDTH;
DETAILS
When denoting version numbers using '.' to separate fields there is a danger of confusing version "6.1" and version "6.10"; because, in decimal notation 6.1 == 6.10. To avoid this confusion, it is common practice to adopt a fixed minimum field width that's when printing version dimensions (other than MAJOR); e.g., rather than printing "6.1", if WIDTH == 2 then the version would be displayed as "6.01".
metaonly config IVersion.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in ti/sdoarch/standards/pkg/IVersion.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly IVersion.getString() // module-wide
index URL

Returns a string representation of the version

XDCspec declarations sourced in ti/sdoarch/standards/pkg/IVersion.xdc
metaonly function getString(separator);
DETAILS
This method return a string of the form:
      MAJOR<sep>MINOR<sep>PATCH
where MAJOR, MINOR, and PATCH are the values sepcified in this interface and <sep> is the (optional) argument to this method. If separator is not supplied (or is null), <sep> defaults to '.'.
generated on Sun, 25 Nov 2018 22:21:22 GMT


package ti.targets
index URL

Package of targets for TI code generation tools

The modules in this package implement the xdc.bld.ITarget interface; this interface "wraps" the compiler tool-chain with an abstract interface that enables these tools to to be used by the XDC Build Engine.
XDCspec declarations sourced in ti/targets/package.xdc
requires xdc.bld;
package ti.targets [1, 0, 3] {
    interface ITarget;
    // A TI specific extension to the base xdc.bld.ITarget3 interface
    module C28;
    // TI C28 default runtime model (little endian)
    module C28_float;
    // TI C28 large model little endian with floating point support (fpu32)
    module C28_large;
    // TI C28 large model little endian
    module C66;
    // TI C66 little endian (COFF)
    module C66_big_endian;
    // TI C66 big endian (COFF)
    module C674;
    // TI C674 default runtime model (little endian)
    module C674_big_endian;
    // TI C674 big endian
}
generated on Sun, 25 Nov 2018 22:21:22 GMT


module ti.targets.C28

metaonly module ti.targets.C28
index URL

TI C28 default runtime model (little endian)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/C28.xdc
var C28 = xdc.useModule('ti.targets.C28');
module-wide constants & types
    var obj = new C28.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C28.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C28.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C28.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C28.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C28.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C28.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C28.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C28.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C28.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C28.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C28.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C28.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const C28.ar// Define archiver executable = ITarget2.Command {
        cmd: "ar2000",
        opts: "rq"
    };
    const C28.asm// Define assembler executable = ITarget2.Command {
        cmd: "cl2000 -c",
        opts: "-v28"
    };
    const C28.base// A target that this target is based upon = ITarget.Module computed value;
    const C28.bitsPerChar// The number of bits in a variable of type char = Int 16;
    const C28.cc// Define compiler executable = ITarget2.Command {
        cmd: "cl2000 -c",
        opts: "-v28"
    };
    const C28.isa// CPU Instruction Set Architecture (ISA) = String "28";
    const C28.lnk// Define linker executable = ITarget2.Command {
        cmd: "cl2000",
        opts: "-z"
    };
    const C28.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const C28.name// Nickname for this target = String "C28";
    const C28.os// Name of OS required to run programs built for this target = String computed value;
    const C28.rts// Name of a run-time support package to include = String "ti.targets.rts2800";
    const C28.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".switch",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".ebss",
            "data"
        ],
        [
            ".econst",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".esysmem",
            "data"
        ],
        [
            ".pinit",
            "code"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ]
    ];
    const C28.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".econst",
            true
        ],
        [
            ".ebss",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ]
    ];
    const C28.stdInclude// Standard C/C++ types header = String "ti/targets/std.h";
    const C28.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 2,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 2,
            align: 2
        },
        t_Float: {
            size: 2,
            align: 2
        },
        t_Fxn: {
            size: 2,
            align: 1
        },
        t_Int: {
            size: 1,
            align: 1
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 1,
            align: 1
        },
        t_Int32: {
            size: 2,
            align: 2
        },
        t_Int64: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 2,
            align: 2
        },
        t_LDouble: {
            size: 2,
            align: 2
        },
        t_LLong: {
            size: 4,
            align: 2
        },
        t_Ptr: {
            size: 1,
            align: 1
        },
        t_Short: {
            size: 1,
            align: 1
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const C28.suffix// Suffix appended to all objs, libraries, and executable = String "28";
    const C28.vers// Define the vers command = ITarget2.Command {
        cmd: "cl2000",
        opts: "--compiler_revision"
    };
     C28.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C28.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C28.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C28.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
     C28.ccOpts// Compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C28.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     C28.execExt// Extension for executables = String undefined;
     C28.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C28.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C28.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C28.pathPrefix// A prefix to the PATH environment variable = String "";
     C28.platform// The default platform name for this target = String undefined;
     C28.platforms// A set of platforms that can support this target = String[] [ ];
     C28.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ]
    ];
     C28.rawVersion// The raw version string from the compiler = String undefined;
     C28.rootDir// Installation directory for this target's code generation tools = String undefined;
     C28.version// The Compatibility Key associated with this target = String undefined;
     C28.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C28.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C28.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C28.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C28.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C28.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C28.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C28.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C28.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C28.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C28.getRawVersion// Get a target-specific raw compiler version string() returns String
     C28.getVersion// Get a target-specific Compatibility Key string() returns String
     C28.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C28.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C28.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C28.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C28.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C28.Command
index URL

Required command and options

Configuration settings
var obj = new C28.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C28.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C28.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C28.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C28.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C28.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C28.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C28.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C28.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C28.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C28.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C28.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C28.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C28.Model
index URL

Target runtime model

Configuration settings
var obj = new C28.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C28.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C28.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C28.Options
index URL

User configurable command options

Configuration settings
var obj = new C28.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C28.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C28.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C28.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C28.alignDirectiveSupported = Bool false;
config C28.ar // module-wide
index URL

Define archiver executable

Configuration settings
const C28.ar = ITarget2.Command {
    cmd: "ar2000",
    opts: "rq"
};
DETAILS
Options:
-r
replace file
-q
quiet mode
config C28.asm // module-wide
index URL

Define assembler executable

Configuration settings
const C28.asm = ITarget2.Command {
    cmd: "cl2000 -c",
    opts: "-v28"
};
DETAILS
Options:
-c
no linking
-v28
compile for c28x.
config C28.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C28.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C28.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C28.bitsPerChar = Int 16;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C28.cc // module-wide
index URL

Define compiler executable

Configuration settings
const C28.cc = ITarget2.Command {
    cmd: "cl2000 -c",
    opts: "-v28"
};
DETAILS
Options:
-c
no linking
-v28
compile for c28x.
config C28.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C28.isa = String "28";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C28.lnk // module-wide
index URL

Define linker executable

Configuration settings
const C28.lnk = ITarget2.Command {
    cmd: "cl2000",
    opts: "-z"
};
config C28.model // module-wide
index URL

Run-time model

Configuration settings
const C28.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C28.name // module-wide
index URL

Nickname for this target

Configuration settings
const C28.name = String "C28";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C28.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C28.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C28.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C28.rts = String "ti.targets.rts2800";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C28.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C28.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".switch",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".ebss",
        "data"
    ],
    [
        ".econst",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".esysmem",
        "data"
    ],
    [
        ".pinit",
        "code"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C28.splitMap // module-wide
index URL
Configuration settings
const C28.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".econst",
        true
    ],
    [
        ".ebss",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ]
];
config C28.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const C28.stdInclude = String "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C28.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C28.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 2,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 2,
        align: 2
    },
    t_Float: {
        size: 2,
        align: 2
    },
    t_Fxn: {
        size: 2,
        align: 1
    },
    t_Int: {
        size: 1,
        align: 1
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 1,
        align: 1
    },
    t_Int32: {
        size: 2,
        align: 2
    },
    t_Int64: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 2,
        align: 2
    },
    t_LDouble: {
        size: 2,
        align: 2
    },
    t_LLong: {
        size: 4,
        align: 2
    },
    t_Ptr: {
        size: 1,
        align: 1
    },
    t_Short: {
        size: 1,
        align: 1
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C28.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C28.suffix = String "28";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C28.vers // module-wide
index URL

Define the vers command

Configuration settings
const C28.vers = ITarget2.Command {
    cmd: "cl2000",
    opts: "--compiler_revision"
};
config C28.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C28.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C28.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C28.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C28.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C28.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C28.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C28.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config C28.ccOpts // module-wide
index URL

Compiler options

Configuration settings
C28.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C28.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C28.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C28.execExt // module-wide
index URL

Extension for executables

Configuration settings
C28.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C28.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C28.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C28.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C28.includeOpts = String "-I$(rootDir)/include";
config C28.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C28.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C28.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C28.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C28.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C28.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C28.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C28.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C28.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C28.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C28.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C28.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C28.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C28.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C28.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C28.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C28.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C28.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C28.archive() // module-wide
index URL

Create an archive

Configuration settings
C28.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C28.asmName(String CName) returns String
C28.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C28.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C28.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C28.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C28.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C28.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C28.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C28.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C28.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C28.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C28.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C28.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C28.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C28.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C28.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C28.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C28.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C28.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C28.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C28.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C28.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C28.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:21 GMT


module ti.targets.C28_float

metaonly module ti.targets.C28_float
index URL

TI C28 large model little endian with floating point support (fpu32)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/C28_float.xdc
var C28_float = xdc.useModule('ti.targets.C28_float');
module-wide constants & types
    var obj = new C28_float.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C28_float.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C28_float.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C28_float.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C28_float.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C28_float.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C28_float.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C28_float.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C28_float.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C28_float.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C28_float.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C28_float.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C28_float.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const C28_float.ar// Define archiver executable = ITarget2.Command {
        cmd: "ar2000",
        opts: "rq"
    };
    const C28_float.asm// Define assembler executable = ITarget2.Command {
        cmd: "cl2000 -c",
        opts: "-v28 -ml -DLARGE_MODEL=1 --float_support=fpu32"
    };
    const C28_float.base// A target that this target is based upon = ITarget.Module computed value;
    const C28_float.bitsPerChar// The number of bits in a variable of type char = Int 16;
    const C28_float.cc// Define compiler executable = ITarget2.Command {
        cmd: "cl2000 -c",
        opts: "-v28 -DLARGE_MODEL=1 -ml --float_support=fpu32"
    };
    const C28_float.isa// CPU Instruction Set Architecture (ISA) = String "28FP";
    const C28_float.lnk// Define linker executable = ITarget2.Command {
        cmd: "cl2000",
        opts: "-z"
    };
    const C28_float.model// Run-time model = ITarget.Model {
        dataModel: "large",
        endian: "little"
    };
    const C28_float.name// Nickname for this target = String "C28_float";
    const C28_float.os// Name of OS required to run programs built for this target = String computed value;
    const C28_float.rts// Name of a run-time support package to include = String "ti.targets.rts2800";
    const C28_float.sectMap// Output section name to segment type mapping = String[string] C28.sectMap;
    const C28_float.splitMap// = Bool[string] C28.splitMap;
    const C28_float.stdInclude// Standard C/C++ types header = String "ti/targets/std.h";
    const C28_float.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 2,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 2,
            align: 2
        },
        t_Float: {
            size: 2,
            align: 2
        },
        t_Fxn: {
            size: 2,
            align: 2
        },
        t_Int: {
            size: 1,
            align: 1
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 1,
            align: 1
        },
        t_Int32: {
            size: 2,
            align: 2
        },
        t_Int64: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 2,
            align: 2
        },
        t_LDouble: {
            size: 2,
            align: 2
        },
        t_LLong: {
            size: 4,
            align: 2
        },
        t_Ptr: {
            size: 2,
            align: 2
        },
        t_Short: {
            size: 1,
            align: 1
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const C28_float.suffix// Suffix appended to all objs, libraries, and executable = String "28FP";
    const C28_float.vers// Define the vers command = ITarget2.Command {
        cmd: "cl2000",
        opts: "--compiler_revision"
    };
     C28_float.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C28_float.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C28_float.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C28_float.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
     C28_float.ccOpts// Compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225 -Dfar= ",
        suffix: ""
    };
     C28_float.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "28L"
    ];
     C28_float.execExt// Extension for executables = String undefined;
     C28_float.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C28_float.includeOpts// Default include search path = String "-I$(rootDir)/include";
     C28_float.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C28_float.pathPrefix// A prefix to the PATH environment variable = String "";
     C28_float.platform// The default platform name for this target = String undefined;
     C28_float.platforms// A set of platforms that can support this target = String[] [ ];
     C28_float.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ]
    ];
     C28_float.rawVersion// The raw version string from the compiler = String undefined;
     C28_float.rootDir// Installation directory for this target's code generation tools = String undefined;
     C28_float.version// The Compatibility Key associated with this target = String undefined;
     C28_float.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C28_float.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C28_float.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C28_float.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C28_float.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C28_float.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C28_float.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C28_float.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C28_float.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C28_float.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C28_float.getRawVersion// Get a target-specific raw compiler version string() returns String
     C28_float.getVersion// Get a target-specific Compatibility Key string() returns String
     C28_float.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C28_float.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C28_float.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C28_float.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C28_float.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C28_float.Command
index URL

Required command and options

Configuration settings
var obj = new C28_float.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C28_float.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C28_float.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C28_float.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C28_float.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C28_float.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C28_float.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C28_float.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C28_float.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C28_float.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C28_float.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C28_float.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C28_float.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C28_float.Model
index URL

Target runtime model

Configuration settings
var obj = new C28_float.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C28_float.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C28_float.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C28_float.Options
index URL

User configurable command options

Configuration settings
var obj = new C28_float.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C28_float.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C28_float.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C28_float.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C28_float.alignDirectiveSupported = Bool false;
config C28_float.ar // module-wide
index URL

Define archiver executable

Configuration settings
const C28_float.ar = ITarget2.Command {
    cmd: "ar2000",
    opts: "rq"
};
DETAILS
Options:
-r
replace file
-q
quiet mode
config C28_float.asm // module-wide
index URL

Define assembler executable

Configuration settings
const C28_float.asm = ITarget2.Command {
    cmd: "cl2000 -c",
    opts: "-v28 -ml -DLARGE_MODEL=1 --float_support=fpu32"
};
DETAILS
Options:
-c
no linking
-v28
compile for c28x.
-ml
use large memory model
-DLARGE_MODEL=1
because compiler and BIOS are broken; asembler defines __LARGE_MODEL but BIOS uses LARGE_MODEL
--float_support=fpu32
Enable FPU
config C28_float.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C28_float.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C28_float.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C28_float.bitsPerChar = Int 16;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C28_float.cc // module-wide
index URL

Define compiler executable

Configuration settings
const C28_float.cc = ITarget2.Command {
    cmd: "cl2000 -c",
    opts: "-v28 -DLARGE_MODEL=1 -ml --float_support=fpu32"
};
DETAILS
Options:
-c
no linking
-v28
compile for c28x.
-ml
use large memory model
-DLARGE_MODEL=1
required to use va_arg in large model
--float_support=fpu32
Enable FPU
config C28_float.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C28_float.isa = String "28FP";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C28_float.lnk // module-wide
index URL

Define linker executable

Configuration settings
const C28_float.lnk = ITarget2.Command {
    cmd: "cl2000",
    opts: "-z"
};
config C28_float.model // module-wide
index URL

Run-time model

Configuration settings
const C28_float.model = ITarget.Model {
    dataModel: "large",
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C28_float.name // module-wide
index URL

Nickname for this target

Configuration settings
const C28_float.name = String "C28_float";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C28_float.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C28_float.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C28_float.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C28_float.rts = String "ti.targets.rts2800";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C28_float.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C28_float.sectMap = String[string] C28.sectMap;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C28_float.splitMap // module-wide
index URL
Configuration settings
const C28_float.splitMap = Bool[string] C28.splitMap;
config C28_float.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const C28_float.stdInclude = String "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C28_float.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C28_float.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 2,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 2,
        align: 2
    },
    t_Float: {
        size: 2,
        align: 2
    },
    t_Fxn: {
        size: 2,
        align: 2
    },
    t_Int: {
        size: 1,
        align: 1
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 1,
        align: 1
    },
    t_Int32: {
        size: 2,
        align: 2
    },
    t_Int64: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 2,
        align: 2
    },
    t_LDouble: {
        size: 2,
        align: 2
    },
    t_LLong: {
        size: 4,
        align: 2
    },
    t_Ptr: {
        size: 2,
        align: 2
    },
    t_Short: {
        size: 1,
        align: 1
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C28_float.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C28_float.suffix = String "28FP";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C28_float.vers // module-wide
index URL

Define the vers command

Configuration settings
const C28_float.vers = ITarget2.Command {
    cmd: "cl2000",
    opts: "--compiler_revision"
};
config C28_float.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C28_float.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C28_float.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C28_float.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C28_float.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C28_float.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C28_float.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C28_float.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config C28_float.ccOpts // module-wide
index URL

Compiler options

Configuration settings
C28_float.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225 -Dfar= ",
    suffix: ""
};
DETAILS
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
-Dfar=
ignore keyword far; this allows one to write code that can be compiled in large model and small model without #ifdef's
config C28_float.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C28_float.compatibleSuffixes = String[] [
    "28L"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C28_float.execExt // module-wide
index URL

Extension for executables

Configuration settings
C28_float.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C28_float.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C28_float.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C28_float.includeOpts // module-wide
index URL

Default include search path

Configuration settings
C28_float.includeOpts = String "-I$(rootDir)/include";
config C28_float.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C28_float.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C28_float.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C28_float.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C28_float.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C28_float.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C28_float.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C28_float.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C28_float.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C28_float.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C28_float.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C28_float.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C28_float.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C28_float.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C28_float.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C28_float.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C28_float.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C28_float.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C28_float.archive() // module-wide
index URL

Create an archive

Configuration settings
C28_float.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28_float.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C28_float.asmName(String CName) returns String
C28_float.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C28_float.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28_float.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C28_float.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C28_float.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C28_float.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C28_float.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C28_float.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C28_float.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C28_float.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C28_float.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C28_float.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C28_float.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C28_float.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C28_float.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C28_float.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C28_float.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C28_float.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C28_float.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C28_float.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28_float.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C28_float.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C28_float.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C28_float.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:21 GMT


module ti.targets.C28_large

metaonly module ti.targets.C28_large
index URL

TI C28 large model little endian

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/C28_large.xdc
var C28_large = xdc.useModule('ti.targets.C28_large');
module-wide constants & types
    var obj = new C28_large.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C28_large.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C28_large.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C28_large.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C28_large.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C28_large.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C28_large.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C28_large.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C28_large.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C28_large.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C28_large.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C28_large.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C28_large.alignDirectiveSupported// The compiler supports an align directive = Bool false;
    const C28_large.ar// Define archiver executable = ITarget2.Command {
        cmd: "ar2000",
        opts: "rq"
    };
    const C28_large.asm// Define assembler executable = ITarget2.Command {
        cmd: "cl2000 -c",
        opts: "-v28 -ml -DLARGE_MODEL=1"
    };
    const C28_large.base// A target that this target is based upon = ITarget.Module computed value;
    const C28_large.bitsPerChar// The number of bits in a variable of type char = Int 16;
    const C28_large.cc// Define compiler executable = ITarget2.Command {
        cmd: "cl2000 -c",
        opts: "-v28 -DLARGE_MODEL=1 -ml"
    };
    const C28_large.isa// CPU Instruction Set Architecture (ISA) = String "28";
    const C28_large.lnk// Define linker executable = ITarget2.Command {
        cmd: "cl2000",
        opts: "-z"
    };
    const C28_large.model// Run-time model = ITarget.Model {
        dataModel: "large",
        endian: "little"
    };
    const C28_large.name// Nickname for this target = String "C28_large";
    const C28_large.os// Name of OS required to run programs built for this target = String computed value;
    const C28_large.rts// Name of a run-time support package to include = String "ti.targets.rts2800";
    const C28_large.sectMap// Output section name to segment type mapping = String[string] C28.sectMap;
    const C28_large.splitMap// = Bool[string] C28.splitMap;
    const C28_large.stdInclude// Standard C/C++ types header = String "ti/targets/std.h";
    const C28_large.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 2,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 2,
            align: 2
        },
        t_Float: {
            size: 2,
            align: 2
        },
        t_Fxn: {
            size: 2,
            align: 2
        },
        t_Int: {
            size: 1,
            align: 1
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 1,
            align: 1
        },
        t_Int32: {
            size: 2,
            align: 2
        },
        t_Int64: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 2,
            align: 2
        },
        t_LDouble: {
            size: 2,
            align: 2
        },
        t_LLong: {
            size: 4,
            align: 2
        },
        t_Ptr: {
            size: 2,
            align: 2
        },
        t_Short: {
            size: 1,
            align: 1
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const C28_large.suffix// Suffix appended to all objs, libraries, and executable = String "28L";
    const C28_large.vers// Define the vers command = ITarget2.Command {
        cmd: "cl2000",
        opts: "--compiler_revision"
    };
     C28_large.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C28_large.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C28_large.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C28_large.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
     C28_large.ccOpts// Compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225 -Dfar= ",
        suffix: ""
    };
     C28_large.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     C28_large.execExt// Extension for executables = String undefined;
     C28_large.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C28_large.includeOpts// Default include search path = String "-I$(rootDir)/include";
     C28_large.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C28_large.pathPrefix// A prefix to the PATH environment variable = String "";
     C28_large.platform// The default platform name for this target = String undefined;
     C28_large.platforms// A set of platforms that can support this target = String[] [ ];
     C28_large.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ]
    ];
     C28_large.rawVersion// The raw version string from the compiler = String undefined;
     C28_large.rootDir// Installation directory for this target's code generation tools = String undefined;
     C28_large.version// The Compatibility Key associated with this target = String undefined;
     C28_large.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C28_large.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C28_large.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C28_large.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C28_large.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C28_large.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C28_large.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C28_large.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C28_large.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C28_large.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C28_large.getRawVersion// Get a target-specific raw compiler version string() returns String
     C28_large.getVersion// Get a target-specific Compatibility Key string() returns String
     C28_large.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C28_large.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C28_large.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C28_large.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C28_large.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C28_large.Command
index URL

Required command and options

Configuration settings
var obj = new C28_large.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C28_large.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C28_large.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C28_large.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C28_large.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C28_large.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C28_large.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C28_large.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C28_large.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C28_large.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C28_large.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C28_large.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C28_large.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C28_large.Model
index URL

Target runtime model

Configuration settings
var obj = new C28_large.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C28_large.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C28_large.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C28_large.Options
index URL

User configurable command options

Configuration settings
var obj = new C28_large.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C28_large.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C28_large.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C28_large.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C28_large.alignDirectiveSupported = Bool false;
config C28_large.ar // module-wide
index URL

Define archiver executable

Configuration settings
const C28_large.ar = ITarget2.Command {
    cmd: "ar2000",
    opts: "rq"
};
DETAILS
Options:
-r
replace file
-q
quiet mode
config C28_large.asm // module-wide
index URL

Define assembler executable

Configuration settings
const C28_large.asm = ITarget2.Command {
    cmd: "cl2000 -c",
    opts: "-v28 -ml -DLARGE_MODEL=1"
};
DETAILS
Options:
-c
no linking
-v28
compile for c28x.
-ml
use large memory model
-DLARGE_MODEL=1
because compiler and BIOS are broken; asembler defines __LARGE_MODEL but BIOS uses LARGE_MODEL
config C28_large.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C28_large.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C28_large.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C28_large.bitsPerChar = Int 16;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C28_large.cc // module-wide
index URL

Define compiler executable

Configuration settings
const C28_large.cc = ITarget2.Command {
    cmd: "cl2000 -c",
    opts: "-v28 -DLARGE_MODEL=1 -ml"
};
DETAILS
Options:
-c
no linking
-v28
compile for c28x.
-ml
use large memory model
-DLARGE_MODEL=1
required to use va_arg in large model
config C28_large.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C28_large.isa = String "28";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C28_large.lnk // module-wide
index URL

Define linker executable

Configuration settings
const C28_large.lnk = ITarget2.Command {
    cmd: "cl2000",
    opts: "-z"
};
config C28_large.model // module-wide
index URL

Run-time model

Configuration settings
const C28_large.model = ITarget.Model {
    dataModel: "large",
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C28_large.name // module-wide
index URL

Nickname for this target

Configuration settings
const C28_large.name = String "C28_large";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C28_large.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C28_large.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C28_large.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C28_large.rts = String "ti.targets.rts2800";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C28_large.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C28_large.sectMap = String[string] C28.sectMap;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C28_large.splitMap // module-wide
index URL
Configuration settings
const C28_large.splitMap = Bool[string] C28.splitMap;
config C28_large.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const C28_large.stdInclude = String "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C28_large.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C28_large.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 2,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 2,
        align: 2
    },
    t_Float: {
        size: 2,
        align: 2
    },
    t_Fxn: {
        size: 2,
        align: 2
    },
    t_Int: {
        size: 1,
        align: 1
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 1,
        align: 1
    },
    t_Int32: {
        size: 2,
        align: 2
    },
    t_Int64: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 2,
        align: 2
    },
    t_LDouble: {
        size: 2,
        align: 2
    },
    t_LLong: {
        size: 4,
        align: 2
    },
    t_Ptr: {
        size: 2,
        align: 2
    },
    t_Short: {
        size: 1,
        align: 1
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C28_large.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C28_large.suffix = String "28L";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C28_large.vers // module-wide
index URL

Define the vers command

Configuration settings
const C28_large.vers = ITarget2.Command {
    cmd: "cl2000",
    opts: "--compiler_revision"
};
config C28_large.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C28_large.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C28_large.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C28_large.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C28_large.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C28_large.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C28_large.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C28_large.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config C28_large.ccOpts // module-wide
index URL

Compiler options

Configuration settings
C28_large.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225 -Dfar= ",
    suffix: ""
};
DETAILS
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
-Dfar=
ignore keyword far; this allows one to write code that can be compiled in large model and small model without #ifdef's
config C28_large.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C28_large.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C28_large.execExt // module-wide
index URL

Extension for executables

Configuration settings
C28_large.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C28_large.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C28_large.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C28_large.includeOpts // module-wide
index URL

Default include search path

Configuration settings
C28_large.includeOpts = String "-I$(rootDir)/include";
config C28_large.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C28_large.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C28_large.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C28_large.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C28_large.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C28_large.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C28_large.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C28_large.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C28_large.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C28_large.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C28_large.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C28_large.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C28_large.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C28_large.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C28_large.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C28_large.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C28_large.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C28_large.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C28_large.archive() // module-wide
index URL

Create an archive

Configuration settings
C28_large.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28_large.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C28_large.asmName(String CName) returns String
C28_large.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C28_large.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28_large.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C28_large.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C28_large.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C28_large.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C28_large.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C28_large.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C28_large.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C28_large.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C28_large.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C28_large.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C28_large.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C28_large.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C28_large.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C28_large.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C28_large.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C28_large.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C28_large.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C28_large.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C28_large.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C28_large.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C28_large.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C28_large.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:21 GMT


module ti.targets.C66

metaonly module ti.targets.C66
index URL

TI C66 little endian (COFF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/C66.xdc
var C66 = xdc.useModule('ti.targets.C66');
module-wide constants & types
    var obj = new C66.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C66.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C66.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C66.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C66.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C66.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C66.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C66.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C66.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C66.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C66.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C66.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C66.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C66.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C66.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6600 --abi=coffabi"
    };
    const C66.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C66.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C66.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6600 --abi=coffabi"
    };
    const C66.isa// CPU Instruction Set Architecture (ISA) = String "66";
    const C66.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "--abi=coffabi -z"
    };
    const C66.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const C66.name// Nickname for this target = String "C66";
    const C66.os// Name of OS required to run programs built for this target = String computed value;
    const C66.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C66.sectMap// Output section name to segment type mapping = String[string] C64P.sectMap;
    const C66.splitMap// = Bool[string] C64P.splitMap;
    const C66.stdInclude// Standard C/C++ types header = String "ti/targets/std.h";
    const C66.stdTypes// Size and alignment for standard base types = ITarget.StdTypes C64P.stdTypes;
    const C66.suffix// Suffix appended to all objs, libraries, and executable = String "66";
    const C66.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C66.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C66.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C66.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C66.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo --no_compress",
        suffix: "$(ccOpts.suffix)"
    };
     C66.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C66.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "674",
        "64P"
    ];
     C66.execExt// Extension for executables = String undefined;
     C66.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C66.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C66.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C66.pathPrefix// A prefix to the PATH environment variable = String "";
     C66.platform// The default platform name for this target = String "ti.platforms.simTCI6616";
     C66.platforms// A set of platforms that can support this target = String[] [ ];
     C66.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C66.rawVersion// The raw version string from the compiler = String undefined;
     C66.rootDir// Installation directory for this target's code generation tools = String undefined;
     C66.version// The Compatibility Key associated with this target = String undefined;
     C66.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C66.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C66.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C66.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C66.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C66.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C66.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C66.getRawVersion// Get a target-specific raw compiler version string() returns String
     C66.getVersion// Get a target-specific Compatibility Key string() returns String
     C66.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C66.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C66.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C66.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C66.Command
index URL

Required command and options

Configuration settings
var obj = new C66.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C66.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C66.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C66.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C66.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C66.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C66.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C66.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C66.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C66.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C66.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C66.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C66.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C66.Model
index URL

Target runtime model

Configuration settings
var obj = new C66.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C66.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C66.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C66.Options
index URL

User configurable command options

Configuration settings
var obj = new C66.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C66.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C66.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C66.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C66.alignDirectiveSupported = Bool true;
config C66.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C66.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C66.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C66.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6600 --abi=coffabi"
};
config C66.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C66.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C66.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C66.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C66.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C66.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6600 --abi=coffabi"
};
config C66.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C66.isa = String "66";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C66.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C66.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "--abi=coffabi -z"
};
config C66.model // module-wide
index URL

Run-time model

Configuration settings
const C66.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C66.name // module-wide
index URL

Nickname for this target

Configuration settings
const C66.name = String "C66";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C66.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C66.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C66.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C66.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C66.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C66.sectMap = String[string] C64P.sectMap;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C66.splitMap // module-wide
index URL
Configuration settings
const C66.splitMap = Bool[string] C64P.splitMap;
config C66.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const C66.stdInclude = String "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C66.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C66.stdTypes = ITarget.StdTypes C64P.stdTypes;
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C66.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C66.suffix = String "66";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C66.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C66.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C66.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C66.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C66.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C66.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C66.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C66.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C66.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C66.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo --no_compress",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C66.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C66.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C66.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C66.compatibleSuffixes = String[] [
    "674",
    "64P"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C66.execExt // module-wide
index URL

Extension for executables

Configuration settings
C66.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C66.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C66.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C66.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C66.includeOpts = String "-I$(rootDir)/include";
config C66.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C66.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C66.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C66.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C66.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C66.platform = String "ti.platforms.simTCI6616";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C66.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C66.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C66.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C66.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C66.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C66.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C66.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C66.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C66.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C66.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C66.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C66.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C66.archive() // module-wide
index URL

Create an archive

Configuration settings
C66.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C66.asmName(String CName) returns String
C66.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C66.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C66.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C66.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C66.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C66.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C66.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C66.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C66.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C66.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C66.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C66.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C66.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C66.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C66.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C66.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C66.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C66.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C66.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C66.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:22 GMT


module ti.targets.C66_big_endian

metaonly module ti.targets.C66_big_endian
index URL

TI C66 big endian (COFF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/C66_big_endian.xdc
var C66_big_endian = xdc.useModule('ti.targets.C66_big_endian');
module-wide constants & types
    var obj = new C66_big_endian.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C66_big_endian.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C66_big_endian.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C66_big_endian.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C66_big_endian.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C66_big_endian.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C66_big_endian.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C66_big_endian.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C66_big_endian.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C66_big_endian.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C66_big_endian.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C66_big_endian.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C66_big_endian.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C66_big_endian.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C66_big_endian.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6600 -me --abi=coffabi"
    };
    const C66_big_endian.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C66_big_endian.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C66_big_endian.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6600 -me --abi=coffabi"
    };
    const C66_big_endian.isa// CPU Instruction Set Architecture (ISA) = String "66";
    const C66_big_endian.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "--abi=coffabi -z"
    };
    const C66_big_endian.model// Run-time model = ITarget.Model {
        endian: "big"
    };
    const C66_big_endian.name// Nickname for this target = String "C66_big_endian";
    const C66_big_endian.os// Name of OS required to run programs built for this target = String computed value;
    const C66_big_endian.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C66_big_endian.sectMap// Output section name to segment type mapping = String[string] C64P.sectMap;
    const C66_big_endian.splitMap// = Bool[string] C64P.splitMap;
    const C66_big_endian.stdInclude// Standard C/C++ types header = String "ti/targets/std.h";
    const C66_big_endian.stdTypes// Size and alignment for standard base types = ITarget.StdTypes C64P.stdTypes;
    const C66_big_endian.suffix// Suffix appended to all objs, libraries, and executable = String "66e";
    const C66_big_endian.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C66_big_endian.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C66_big_endian.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C66_big_endian.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C66_big_endian.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo --no_compress",
        suffix: "$(ccOpts.suffix)"
    };
     C66_big_endian.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C66_big_endian.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "674e",
        "64Pe"
    ];
     C66_big_endian.execExt// Extension for executables = String undefined;
     C66_big_endian.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C66_big_endian.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C66_big_endian.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C66_big_endian.pathPrefix// A prefix to the PATH environment variable = String "";
     C66_big_endian.platform// The default platform name for this target = String "ti.platforms.simTCI6616";
     C66_big_endian.platforms// A set of platforms that can support this target = String[] [ ];
     C66_big_endian.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C66_big_endian.rawVersion// The raw version string from the compiler = String undefined;
     C66_big_endian.rootDir// Installation directory for this target's code generation tools = String undefined;
     C66_big_endian.version// The Compatibility Key associated with this target = String undefined;
     C66_big_endian.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C66_big_endian.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C66_big_endian.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C66_big_endian.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C66_big_endian.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C66_big_endian.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66_big_endian.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66_big_endian.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C66_big_endian.getRawVersion// Get a target-specific raw compiler version string() returns String
     C66_big_endian.getVersion// Get a target-specific Compatibility Key string() returns String
     C66_big_endian.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C66_big_endian.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C66_big_endian.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C66_big_endian.Command
index URL

Required command and options

Configuration settings
var obj = new C66_big_endian.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C66_big_endian.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C66_big_endian.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C66_big_endian.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C66_big_endian.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C66_big_endian.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C66_big_endian.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C66_big_endian.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C66_big_endian.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C66_big_endian.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C66_big_endian.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C66_big_endian.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C66_big_endian.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C66_big_endian.Model
index URL

Target runtime model

Configuration settings
var obj = new C66_big_endian.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C66_big_endian.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C66_big_endian.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C66_big_endian.Options
index URL

User configurable command options

Configuration settings
var obj = new C66_big_endian.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C66_big_endian.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C66_big_endian.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C66_big_endian.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C66_big_endian.alignDirectiveSupported = Bool true;
config C66_big_endian.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C66_big_endian.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C66_big_endian.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C66_big_endian.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6600 -me --abi=coffabi"
};
config C66_big_endian.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C66_big_endian.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C66_big_endian.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C66_big_endian.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C66_big_endian.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C66_big_endian.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6600 -me --abi=coffabi"
};
config C66_big_endian.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C66_big_endian.isa = String "66";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C66_big_endian.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C66_big_endian.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "--abi=coffabi -z"
};
config C66_big_endian.model // module-wide
index URL

Run-time model

Configuration settings
const C66_big_endian.model = ITarget.Model {
    endian: "big"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C66_big_endian.name // module-wide
index URL

Nickname for this target

Configuration settings
const C66_big_endian.name = String "C66_big_endian";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C66_big_endian.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C66_big_endian.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C66_big_endian.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C66_big_endian.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C66_big_endian.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C66_big_endian.sectMap = String[string] C64P.sectMap;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C66_big_endian.splitMap // module-wide
index URL
Configuration settings
const C66_big_endian.splitMap = Bool[string] C64P.splitMap;
config C66_big_endian.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const C66_big_endian.stdInclude = String "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C66_big_endian.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C66_big_endian.stdTypes = ITarget.StdTypes C64P.stdTypes;
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C66_big_endian.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C66_big_endian.suffix = String "66e";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C66_big_endian.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C66_big_endian.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C66_big_endian.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C66_big_endian.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C66_big_endian.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C66_big_endian.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C66_big_endian.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C66_big_endian.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C66_big_endian.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C66_big_endian.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo --no_compress",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C66_big_endian.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C66_big_endian.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C66_big_endian.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C66_big_endian.compatibleSuffixes = String[] [
    "674e",
    "64Pe"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C66_big_endian.execExt // module-wide
index URL

Extension for executables

Configuration settings
C66_big_endian.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C66_big_endian.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C66_big_endian.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C66_big_endian.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C66_big_endian.includeOpts = String "-I$(rootDir)/include";
config C66_big_endian.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C66_big_endian.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C66_big_endian.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C66_big_endian.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C66_big_endian.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C66_big_endian.platform = String "ti.platforms.simTCI6616";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C66_big_endian.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C66_big_endian.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C66_big_endian.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C66_big_endian.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C66_big_endian.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C66_big_endian.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C66_big_endian.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C66_big_endian.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C66_big_endian.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C66_big_endian.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C66_big_endian.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C66_big_endian.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C66_big_endian.archive() // module-wide
index URL

Create an archive

Configuration settings
C66_big_endian.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C66_big_endian.asmName(String CName) returns String
C66_big_endian.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C66_big_endian.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C66_big_endian.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C66_big_endian.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C66_big_endian.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66_big_endian.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C66_big_endian.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66_big_endian.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C66_big_endian.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C66_big_endian.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C66_big_endian.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C66_big_endian.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C66_big_endian.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C66_big_endian.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C66_big_endian.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C66_big_endian.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C66_big_endian.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C66_big_endian.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:22 GMT


module ti.targets.C674

metaonly module ti.targets.C674
index URL

TI C674 default runtime model (little endian)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/C674.xdc
var C674 = xdc.useModule('ti.targets.C674');
module-wide constants & types
    var obj = new C674.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C674.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C674.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C674.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C674.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C674.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C674.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C674.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C674.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C674.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C674.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C674.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C674.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C674.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C674.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6740"
    };
    const C674.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C674.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C674.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6740"
    };
    const C674.isa// CPU Instruction Set Architecture (ISA) = String "674";
    const C674.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "-z"
    };
    const C674.model// Run-time model = ITarget.Model {
        endian: "little"
    };
    const C674.name// Nickname for this target = String "C674";
    const C674.os// Name of OS required to run programs built for this target = String computed value;
    const C674.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C674.sectMap// Output section name to segment type mapping = String[string] C64P.sectMap;
    const C674.splitMap// = Bool[string] C64P.splitMap;
    const C674.stdInclude// Standard C/C++ types header = String "ti/targets/std.h";
    const C674.stdTypes// Size and alignment for standard base types = ITarget.StdTypes C64P.stdTypes;
    const C674.suffix// Suffix appended to all objs, libraries, and executable = String "674";
    const C674.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C674.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C674.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C674.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C674.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo --no_compress",
        suffix: "$(ccOpts.suffix)"
    };
     C674.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C674.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "64P",
        "64",
        "62"
    ];
     C674.execExt// Extension for executables = String undefined;
     C674.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C674.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C674.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C674.pathPrefix// A prefix to the PATH environment variable = String "";
     C674.platform// The default platform name for this target = String "ti.platforms.evmDA830";
     C674.platforms// A set of platforms that can support this target = String[] [ ];
     C674.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C674.rawVersion// The raw version string from the compiler = String undefined;
     C674.rootDir// Installation directory for this target's code generation tools = String undefined;
     C674.version// The Compatibility Key associated with this target = String undefined;
     C674.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C674.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C674.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C674.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C674.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C674.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C674.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C674.getRawVersion// Get a target-specific raw compiler version string() returns String
     C674.getVersion// Get a target-specific Compatibility Key string() returns String
     C674.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C674.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C674.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C674.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C674.Command
index URL

Required command and options

Configuration settings
var obj = new C674.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C674.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C674.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C674.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C674.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C674.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C674.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C674.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C674.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C674.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C674.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C674.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C674.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C674.Model
index URL

Target runtime model

Configuration settings
var obj = new C674.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C674.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C674.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C674.Options
index URL

User configurable command options

Configuration settings
var obj = new C674.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C674.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C674.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C674.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C674.alignDirectiveSupported = Bool true;
config C674.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C674.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C674.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C674.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6740"
};
config C674.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C674.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C674.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C674.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C674.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C674.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6740"
};
config C674.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C674.isa = String "674";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C674.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C674.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "-z"
};
config C674.model // module-wide
index URL

Run-time model

Configuration settings
const C674.model = ITarget.Model {
    endian: "little"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C674.name // module-wide
index URL

Nickname for this target

Configuration settings
const C674.name = String "C674";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C674.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C674.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C674.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C674.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C674.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C674.sectMap = String[string] C64P.sectMap;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C674.splitMap // module-wide
index URL
Configuration settings
const C674.splitMap = Bool[string] C64P.splitMap;
config C674.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const C674.stdInclude = String "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C674.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C674.stdTypes = ITarget.StdTypes C64P.stdTypes;
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C674.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C674.suffix = String "674";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C674.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C674.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C674.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C674.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C674.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C674.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C674.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C674.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C674.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C674.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo --no_compress",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C674.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C674.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C674.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C674.compatibleSuffixes = String[] [
    "64P",
    "64",
    "62"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C674.execExt // module-wide
index URL

Extension for executables

Configuration settings
C674.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C674.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C674.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C674.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C674.includeOpts = String "-I$(rootDir)/include";
config C674.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C674.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C674.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C674.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C674.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C674.platform = String "ti.platforms.evmDA830";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C674.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C674.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C674.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C674.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C674.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C674.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C674.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C674.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C674.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C674.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C674.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C674.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C674.archive() // module-wide
index URL

Create an archive

Configuration settings
C674.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C674.asmName(String CName) returns String
C674.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C674.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C674.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C674.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C674.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C674.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C674.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C674.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C674.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C674.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C674.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C674.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C674.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C674.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C674.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C674.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C674.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C674.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C674.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C674.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:22 GMT


module ti.targets.C674_big_endian

metaonly module ti.targets.C674_big_endian
index URL

TI C674 big endian

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/C674_big_endian.xdc
var C674_big_endian = xdc.useModule('ti.targets.C674_big_endian');
module-wide constants & types
    var obj = new C674_big_endian.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C674_big_endian.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C674_big_endian.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C674_big_endian.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C674_big_endian.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C674_big_endian.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C674_big_endian.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C674_big_endian.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C674_big_endian.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C674_big_endian.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C674_big_endian.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C674_big_endian.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C674_big_endian.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C674_big_endian.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C674_big_endian.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-me -mv6740"
    };
    const C674_big_endian.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C674_big_endian.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C674_big_endian.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-me -mv6740"
    };
    const C674_big_endian.isa// CPU Instruction Set Architecture (ISA) = String "674";
    const C674_big_endian.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "-z"
    };
    const C674_big_endian.model// Run-time model = ITarget.Model {
        endian: "big"
    };
    const C674_big_endian.name// Nickname for this target = String "C674_big_endian";
    const C674_big_endian.os// Name of OS required to run programs built for this target = String computed value;
    const C674_big_endian.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C674_big_endian.sectMap// Output section name to segment type mapping = String[string] C64P.sectMap;
    const C674_big_endian.splitMap// = Bool[string] C64P.splitMap;
    const C674_big_endian.stdInclude// Standard C/C++ types header = String "ti/targets/std.h";
    const C674_big_endian.stdTypes// Size and alignment for standard base types = ITarget.StdTypes C64P.stdTypes;
    const C674_big_endian.suffix// Suffix appended to all objs, libraries, and executable = String "674e";
    const C674_big_endian.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C674_big_endian.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C674_big_endian.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C674_big_endian.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C674_big_endian.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo --no_compress",
        suffix: "$(ccOpts.suffix)"
    };
     C674_big_endian.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C674_big_endian.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "64Pe",
        "64e",
        "62e"
    ];
     C674_big_endian.execExt// Extension for executables = String undefined;
     C674_big_endian.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C674_big_endian.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C674_big_endian.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C674_big_endian.pathPrefix// A prefix to the PATH environment variable = String "";
     C674_big_endian.platform// The default platform name for this target = String "ti.platforms.evmDA830";
     C674_big_endian.platforms// A set of platforms that can support this target = String[] [ ];
     C674_big_endian.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C674_big_endian.rawVersion// The raw version string from the compiler = String undefined;
     C674_big_endian.rootDir// Installation directory for this target's code generation tools = String undefined;
     C674_big_endian.version// The Compatibility Key associated with this target = String undefined;
     C674_big_endian.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C674_big_endian.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C674_big_endian.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C674_big_endian.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C674_big_endian.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C674_big_endian.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674_big_endian.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674_big_endian.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C674_big_endian.getRawVersion// Get a target-specific raw compiler version string() returns String
     C674_big_endian.getVersion// Get a target-specific Compatibility Key string() returns String
     C674_big_endian.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C674_big_endian.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C674_big_endian.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C674_big_endian.Command
index URL

Required command and options

Configuration settings
var obj = new C674_big_endian.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C674_big_endian.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C674_big_endian.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C674_big_endian.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C674_big_endian.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C674_big_endian.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C674_big_endian.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C674_big_endian.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C674_big_endian.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C674_big_endian.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C674_big_endian.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C674_big_endian.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C674_big_endian.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C674_big_endian.Model
index URL

Target runtime model

Configuration settings
var obj = new C674_big_endian.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C674_big_endian.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C674_big_endian.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C674_big_endian.Options
index URL

User configurable command options

Configuration settings
var obj = new C674_big_endian.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C674_big_endian.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C674_big_endian.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C674_big_endian.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C674_big_endian.alignDirectiveSupported = Bool true;
config C674_big_endian.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C674_big_endian.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C674_big_endian.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C674_big_endian.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-me -mv6740"
};
config C674_big_endian.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C674_big_endian.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C674_big_endian.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C674_big_endian.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C674_big_endian.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C674_big_endian.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-me -mv6740"
};
config C674_big_endian.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C674_big_endian.isa = String "674";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C674_big_endian.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C674_big_endian.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "-z"
};
config C674_big_endian.model // module-wide
index URL

Run-time model

Configuration settings
const C674_big_endian.model = ITarget.Model {
    endian: "big"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C674_big_endian.name // module-wide
index URL

Nickname for this target

Configuration settings
const C674_big_endian.name = String "C674_big_endian";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C674_big_endian.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C674_big_endian.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C674_big_endian.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C674_big_endian.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C674_big_endian.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C674_big_endian.sectMap = String[string] C64P.sectMap;
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C674_big_endian.splitMap // module-wide
index URL
Configuration settings
const C674_big_endian.splitMap = Bool[string] C64P.splitMap;
config C674_big_endian.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const C674_big_endian.stdInclude = String "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C674_big_endian.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C674_big_endian.stdTypes = ITarget.StdTypes C64P.stdTypes;
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C674_big_endian.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C674_big_endian.suffix = String "674e";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C674_big_endian.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C674_big_endian.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C674_big_endian.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C674_big_endian.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C674_big_endian.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C674_big_endian.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C674_big_endian.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C674_big_endian.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C674_big_endian.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C674_big_endian.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo --no_compress",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C674_big_endian.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C674_big_endian.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C674_big_endian.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C674_big_endian.compatibleSuffixes = String[] [
    "64Pe",
    "64e",
    "62e"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C674_big_endian.execExt // module-wide
index URL

Extension for executables

Configuration settings
C674_big_endian.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C674_big_endian.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C674_big_endian.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C674_big_endian.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C674_big_endian.includeOpts = String "-I$(rootDir)/include";
config C674_big_endian.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C674_big_endian.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C674_big_endian.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C674_big_endian.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C674_big_endian.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C674_big_endian.platform = String "ti.platforms.evmDA830";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C674_big_endian.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C674_big_endian.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C674_big_endian.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C674_big_endian.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C674_big_endian.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C674_big_endian.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C674_big_endian.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C674_big_endian.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C674_big_endian.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C674_big_endian.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C674_big_endian.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C674_big_endian.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C674_big_endian.archive() // module-wide
index URL

Create an archive

Configuration settings
C674_big_endian.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C674_big_endian.asmName(String CName) returns String
C674_big_endian.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C674_big_endian.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C674_big_endian.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C674_big_endian.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C674_big_endian.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674_big_endian.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C674_big_endian.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674_big_endian.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C674_big_endian.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C674_big_endian.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C674_big_endian.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C674_big_endian.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C674_big_endian.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C674_big_endian.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C674_big_endian.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C674_big_endian.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C674_big_endian.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C674_big_endian.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:22 GMT


interface ti.targets.ITarget

metaonly interface ti.targets.ITarget
index URL

A TI specific extension to the base xdc.bld.ITarget3 interface

XDCspec summary sourced in ti/targets/ITarget.xdc
metaonly interface ITarget { ...
// inherits xdc.bld.ITarget3
    // inherits xdc.bld.ITarget2
        // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/ITarget.xdc
package ti.targets;
metaonly interface ITarget inherits ITarget3 {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    readonly config ITarget2.Command ar// The command used to create an archive;
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    readonly config ITarget2.Command lnk// The command used to link executables;
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    readonly config String sectMap// Output section name to segment type mapping[string];
    readonly config Bool splitMap// [string];
    override readonly config String stdInclude// Standard C/C++ types header = "ti/targets/std.h";
    readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 0,
            align: 0
        },
        t_Char: {
            size: 0,
            align: 0
        },
        t_Double: {
            size: 0,
            align: 0
        },
        t_Float: {
            size: 0,
            align: 0
        },
        t_Fxn: {
            size: 0,
            align: 0
        },
        t_Int: {
            size: 0,
            align: 0
        },
        t_Int8: {
            size: 0,
            align: 0
        },
        t_Int16: {
            size: 0,
            align: 0
        },
        t_Int32: {
            size: 0,
            align: 0
        },
        t_Int40: {
            size: 0,
            align: 0
        },
        t_Int64: {
            size: 0,
            align: 0
        },
        t_Long: {
            size: 0,
            align: 0
        },
        t_LDouble: {
            size: 0,
            align: 0
        },
        t_LLong: {
            size: 0,
            align: 0
        },
        t_Ptr: {
            size: 0,
            align: 0
        },
        t_Short: {
            size: 0,
            align: 0
        },
        t_Size: {
            size: 0,
            align: 0
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number;
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
    config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    config String includeOpts// Additional user configurable target-specific include path options;
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in ti/targets/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/ITarget.xdc
override readonly config Bool alignDirectiveSupported = true;
config ITarget.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget2.Command ar;
config ITarget.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget2.Command asm;
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget2.Command cc;
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget2.Command lnk;
config ITarget.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config Bool splitMap[string];
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/ITarget.xdc
override readonly config String stdInclude = "ti/targets/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 0,
        align: 0
    },
    t_Char: {
        size: 0,
        align: 0
    },
    t_Double: {
        size: 0,
        align: 0
    },
    t_Float: {
        size: 0,
        align: 0
    },
    t_Fxn: {
        size: 0,
        align: 0
    },
    t_Int: {
        size: 0,
        align: 0
    },
    t_Int8: {
        size: 0,
        align: 0
    },
    t_Int16: {
        size: 0,
        align: 0
    },
    t_Int32: {
        size: 0,
        align: 0
    },
    t_Int40: {
        size: 0,
        align: 0
    },
    t_Int64: {
        size: 0,
        align: 0
    },
    t_Long: {
        size: 0,
        align: 0
    },
    t_LDouble: {
        size: 0,
        align: 0
    },
    t_LLong: {
        size: 0,
        align: 0
    },
    t_Ptr: {
        size: 0,
        align: 0
    },
    t_Short: {
        size: 0,
        align: 0
    },
    t_Size: {
        size: 0,
        align: 0
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/ITarget.xdc
readonly config ITarget2.Command vers;
config ITarget.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/ITarget.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/ITarget.xdc
config ITarget2.Options asmOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config ITarget.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in ti/targets/ITarget.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/ITarget.xdc
config ITarget2.Options ccOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/ITarget.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config ITarget.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String includeOpts;
config ITarget.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/ITarget.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config ITarget.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/ITarget.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/ITarget.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config ITarget.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/ITarget.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/ITarget.xdc
String asmName(String CName);
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/ITarget.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/ITarget.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/ITarget.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/ITarget.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/ITarget.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:20 GMT


package ti.targets.arm.clang
index URL

Package of Arm targets for TI LLVM based code generation tools for ELF

XDCspec declarations sourced in ti/targets/arm/clang/package.xdc
requires xdc.bld;
requires ti.targets;
requires ti.targets.arm.elf;
package ti.targets.arm.clang [1, 0, 0] {
    module M3;
    // Cortex M3 with no floating point unit, little endian thumb2 (ELF)
    module M33F;
    // Cortex M33 with floating point unit, little endian thumb2 (ELF)
    module M4;
    // Cortex M4 with no floating point unit, little endian thumb2 (ELF)
    module M4F;
    // Cortex M4 with floating point unit, little endian thumb2 (ELF)
}
generated on Sun, 25 Nov 2018 22:21:08 GMT


module ti.targets.arm.clang.M3

metaonly module ti.targets.arm.clang.M3
index URL

Cortex M3 with no floating point unit, little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/clang/M3.xdc
var M3 = xdc.useModule('ti.targets.arm.clang.M3');
module-wide constants & types
    var obj = new M3.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M3.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M3.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M3.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M3.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M3.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M3.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M3.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M3.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M3.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M3.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M3.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M3.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M3.ar// The command used to create an archive = ITarget2.Command {
        cmd: "tiarmar",
        opts: "q"
    };
    const M3.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
    };
    const M3.base// A target that this target is based upon = ITarget.Module computed value;
    const M3.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M3.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c",
        opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
    };
    const M3.isa// CPU Instruction Set Architecture (ISA) = String "v7M";
    const M3.lnk// The command used to link executables = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
    };
    const M3.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M3.name// Nickname for this target = String "M3";
    const M3.os// Name of OS required to run programs built for this target = String computed value;
    const M3.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M3.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M3.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M3.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M3.suffix// Suffix appended to all objs, libraries, and executable = String "m3";
    const M3.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "--version"
    };
     M3.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M3.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M3.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M3.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M3.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M3.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M3.execExt// Extension for executables = String undefined;
     M3.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M3.includeOpts// Additional user configurable target-specific include path options = String "";
     M3.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-Wl,-q -Wl,-u,_c_int00",
        suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
    };
     M3.pathPrefix// A prefix to the PATH environment variable = String "";
     M3.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT:1";
     M3.platforms// A set of platforms that can support this target = String[] [ ];
     M3.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-gdwarf-3",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-gdwarf-3"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M3.rawVersion// The raw version string from the compiler = String undefined;
     M3.rootDir// Installation directory for this target's code generation tools = String undefined;
     M3.stdInclude// Standard C/C++ types header = String "ti/targets/arm/clang/std.h";
     M3.version// The Compatibility Key associated with this target = String undefined;
     M3.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M3.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M3.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M3.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M3.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M3.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M3.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M3.getRawVersion// Get a target-specific raw compiler version string() returns String
     M3.getVersion// Get a target-specific Compatibility Key string() returns String
     M3.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M3.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M3.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M3.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M3.Command
index URL

Required command and options

Configuration settings
var obj = new M3.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M3.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M3.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M3.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M3.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M3.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M3.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M3.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M3.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M3.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M3.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M3.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M3.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M3.Model
index URL

Target runtime model

Configuration settings
var obj = new M3.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M3.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M3.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M3.Options
index URL

User configurable command options

Configuration settings
var obj = new M3.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M3.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M3.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M3.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M3.alignDirectiveSupported = Bool true;
config M3.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M3.ar = ITarget2.Command {
    cmd: "tiarmar",
    opts: "q"
};
config M3.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M3.asm = ITarget2.Command {
    cmd: "tiarmclang -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
};
config M3.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M3.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M3.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M3.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M3.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M3.cc = ITarget2.Command {
    cmd: "tiarmclang -c",
    opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
};
config M3.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M3.isa = String "v7M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M3.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M3.lnk = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
};
config M3.model // module-wide
index URL

Run-time model

Configuration settings
const M3.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M3.name // module-wide
index URL

Nickname for this target

Configuration settings
const M3.name = String "M3";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M3.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M3.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M3.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M3.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M3.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M3.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M3.splitMap // module-wide
index URL
Configuration settings
const M3.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M3.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M3.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M3.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M3.suffix = String "m3";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M3.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M3.vers = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "--version"
};
config M3.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M3.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M3.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M3.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M3.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M3.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M3.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M3.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M3.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M3.ccOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M3.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M3.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M3.execExt // module-wide
index URL

Extension for executables

Configuration settings
M3.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M3.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M3.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M3.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M3.includeOpts = String "";
config M3.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M3.lnkOpts = ITarget2.Options {
    prefix: "-Wl,-q -Wl,-u,_c_int00",
    suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M3.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M3.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M3.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M3.platform = String "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M3.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M3.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M3.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M3.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-gdwarf-3",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-gdwarf-3"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M3.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M3.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M3.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M3.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M3.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M3.stdInclude = String "ti/targets/arm/clang/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M3.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M3.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M3.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M3.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M3.archive() // module-wide
index URL

Create an archive

Configuration settings
M3.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M3.asmName(String CName) returns String
M3.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M3.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M3.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M3.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M3.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M3.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M3.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M3.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M3.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M3.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M3.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M3.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M3.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M3.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M3.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M3.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M3.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M3.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M3.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M3.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:07 GMT


module ti.targets.arm.clang.M33F

metaonly module ti.targets.arm.clang.M33F
index URL

Cortex M33 with floating point unit, little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/clang/M33F.xdc
var M33F = xdc.useModule('ti.targets.arm.clang.M33F');
module-wide constants & types
    var obj = new M33F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M33F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M33F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M33F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M33F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M33F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M33F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M33F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M33F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M33F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M33F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M33F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M33F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M33F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "tiarmar",
        opts: "q"
    };
    const M33F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
    };
    const M33F.base// A target that this target is based upon = ITarget.Module computed value;
    const M33F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M33F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c",
        opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
    };
    const M33F.isa// CPU Instruction Set Architecture (ISA) = String "v8M";
    const M33F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
    };
    const M33F.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M33F.name// Nickname for this target = String "M33F";
    const M33F.os// Name of OS required to run programs built for this target = String computed value;
    const M33F.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M33F.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M33F.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M33F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M33F.suffix// Suffix appended to all objs, libraries, and executable = String "m33f";
    const M33F.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "--version"
    };
     M33F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M33F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M33F.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M33F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M33F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M33F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M33F.execExt// Extension for executables = String undefined;
     M33F.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M33F.includeOpts// Additional user configurable target-specific include path options = String "";
     M33F.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-Wl,-q -Wl,-u,_c_int00",
        suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
    };
     M33F.pathPrefix// A prefix to the PATH environment variable = String "";
     M33F.platform// The default platform name for this target = String "ti.platforms.cortexM:MTL1_VSOC:1";
     M33F.platforms// A set of platforms that can support this target = String[] [ ];
     M33F.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-gdwarf-3",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-gdwarf-3"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M33F.rawVersion// The raw version string from the compiler = String undefined;
     M33F.rootDir// Installation directory for this target's code generation tools = String undefined;
     M33F.stdInclude// Standard C/C++ types header = String "ti/targets/arm/clang/std.h";
     M33F.version// The Compatibility Key associated with this target = String undefined;
     M33F.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M33F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M33F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M33F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M33F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M33F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M33F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M33F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M33F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M33F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M33F.getRawVersion// Get a target-specific raw compiler version string() returns String
     M33F.getVersion// Get a target-specific Compatibility Key string() returns String
     M33F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M33F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M33F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M33F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M33F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M33F.Command
index URL

Required command and options

Configuration settings
var obj = new M33F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M33F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M33F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M33F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M33F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M33F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M33F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M33F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M33F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M33F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M33F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M33F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M33F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M33F.Model
index URL

Target runtime model

Configuration settings
var obj = new M33F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M33F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M33F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M33F.Options
index URL

User configurable command options

Configuration settings
var obj = new M33F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M33F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M33F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M33F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M33F.alignDirectiveSupported = Bool true;
config M33F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M33F.ar = ITarget2.Command {
    cmd: "tiarmar",
    opts: "q"
};
config M33F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M33F.asm = ITarget2.Command {
    cmd: "tiarmclang -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
};
config M33F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M33F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M33F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M33F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M33F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M33F.cc = ITarget2.Command {
    cmd: "tiarmclang -c",
    opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
};
config M33F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M33F.isa = String "v8M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M33F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M33F.lnk = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
};
config M33F.model // module-wide
index URL

Run-time model

Configuration settings
const M33F.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M33F.name // module-wide
index URL

Nickname for this target

Configuration settings
const M33F.name = String "M33F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M33F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M33F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M33F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M33F.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M33F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M33F.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M33F.splitMap // module-wide
index URL
Configuration settings
const M33F.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M33F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M33F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M33F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M33F.suffix = String "m33f";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M33F.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M33F.vers = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "--version"
};
config M33F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M33F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M33F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M33F.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M33F.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M33F.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M33F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M33F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M33F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M33F.ccOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M33F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M33F.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M33F.execExt // module-wide
index URL

Extension for executables

Configuration settings
M33F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M33F.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M33F.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M33F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M33F.includeOpts = String "";
config M33F.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M33F.lnkOpts = ITarget2.Options {
    prefix: "-Wl,-q -Wl,-u,_c_int00",
    suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M33F.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M33F.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M33F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M33F.platform = String "ti.platforms.cortexM:MTL1_VSOC:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M33F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M33F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M33F.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M33F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-gdwarf-3",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-gdwarf-3"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M33F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M33F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M33F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M33F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M33F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M33F.stdInclude = String "ti/targets/arm/clang/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M33F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M33F.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M33F.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M33F.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M33F.archive() // module-wide
index URL

Create an archive

Configuration settings
M33F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M33F.asmName(String CName) returns String
M33F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M33F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M33F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M33F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M33F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M33F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M33F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M33F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M33F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M33F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M33F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M33F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M33F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M33F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M33F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M33F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M33F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M33F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M33F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M33F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M33F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M33F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M33F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:07 GMT


module ti.targets.arm.clang.M4

metaonly module ti.targets.arm.clang.M4
index URL

Cortex M4 with no floating point unit, little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/clang/M4.xdc
var M4 = xdc.useModule('ti.targets.arm.clang.M4');
module-wide constants & types
    var obj = new M4.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4.ar// The command used to create an archive = ITarget2.Command {
        cmd: "tiarmar",
        opts: "q"
    };
    const M4.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
    };
    const M4.base// A target that this target is based upon = ITarget.Module computed value;
    const M4.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c",
        opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
    };
    const M4.isa// CPU Instruction Set Architecture (ISA) = String "v7M";
    const M4.lnk// The command used to link executables = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
    };
    const M4.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4.name// Nickname for this target = String "M4";
    const M4.os// Name of OS required to run programs built for this target = String computed value;
    const M4.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M4.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M4.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M4.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M4.suffix// Suffix appended to all objs, libraries, and executable = String "m4";
    const M4.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "--version"
    };
     M4.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M4.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M4.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M4.execExt// Extension for executables = String undefined;
     M4.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M4.includeOpts// Additional user configurable target-specific include path options = String "";
     M4.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-Wl,-q -Wl,-u,_c_int00",
        suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
    };
     M4.pathPrefix// A prefix to the PATH environment variable = String "";
     M4.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT:1";
     M4.platforms// A set of platforms that can support this target = String[] [ ];
     M4.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-gdwarf-3",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-gdwarf-3"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M4.rawVersion// The raw version string from the compiler = String undefined;
     M4.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4.stdInclude// Standard C/C++ types header = String "ti/targets/arm/clang/std.h";
     M4.version// The Compatibility Key associated with this target = String undefined;
     M4.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M4.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M4.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4.getVersion// Get a target-specific Compatibility Key string() returns String
     M4.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4.Command
index URL

Required command and options

Configuration settings
var obj = new M4.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4.Model
index URL

Target runtime model

Configuration settings
var obj = new M4.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4.Options
index URL

User configurable command options

Configuration settings
var obj = new M4.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4.alignDirectiveSupported = Bool true;
config M4.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4.ar = ITarget2.Command {
    cmd: "tiarmar",
    opts: "q"
};
config M4.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4.asm = ITarget2.Command {
    cmd: "tiarmclang -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
};
config M4.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4.cc = ITarget2.Command {
    cmd: "tiarmclang -c",
    opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
};
config M4.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4.isa = String "v7M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4.lnk = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
};
config M4.model // module-wide
index URL

Run-time model

Configuration settings
const M4.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4.name = String "M4";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4.splitMap // module-wide
index URL
Configuration settings
const M4.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M4.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4.suffix = String "m4";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M4.vers = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "--version"
};
config M4.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M4.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M4.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M4.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M4.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4.ccOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M4.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M4.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M4.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4.includeOpts = String "";
config M4.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M4.lnkOpts = ITarget2.Options {
    prefix: "-Wl,-q -Wl,-u,_c_int00",
    suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M4.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M4.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M4.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4.platform = String "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M4.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-gdwarf-3",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-gdwarf-3"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M4.stdInclude = String "ti/targets/arm/clang/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M4.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M4.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M4.archive() // module-wide
index URL

Create an archive

Configuration settings
M4.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M4.asmName(String CName) returns String
M4.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:07 GMT


module ti.targets.arm.clang.M4F

metaonly module ti.targets.arm.clang.M4F
index URL

Cortex M4 with floating point unit, little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/clang/M4F.xdc
var M4F = xdc.useModule('ti.targets.arm.clang.M4F');
module-wide constants & types
    var obj = new M4F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "tiarmar",
        opts: "q"
    };
    const M4F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c -x assembler-with-cpp",
        opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
    };
    const M4F.base// A target that this target is based upon = ITarget.Module computed value;
    const M4F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "tiarmclang -c",
        opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
    };
    const M4F.isa// CPU Instruction Set Architecture (ISA) = String "v7M";
    const M4F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
    };
    const M4F.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4F.name// Nickname for this target = String "M4F";
    const M4F.os// Name of OS required to run programs built for this target = String computed value;
    const M4F.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M4F.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M4F.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M4F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M4F.suffix// Suffix appended to all objs, libraries, and executable = String "m4f";
    const M4F.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "tiarmclang",
        opts: "--version"
    };
     M4F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4F.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M4F.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     M4F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M4F.execExt// Extension for executables = String undefined;
     M4F.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M4F.includeOpts// Additional user configurable target-specific include path options = String "";
     M4F.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-Wl,-q -Wl,-u,_c_int00",
        suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
    };
     M4F.pathPrefix// A prefix to the PATH environment variable = String "";
     M4F.platform// The default platform name for this target = String "ti.platforms.cortexM:MTL1_VSOC:1";
     M4F.platforms// A set of platforms that can support this target = String[] [ ];
     M4F.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-gdwarf-3",
                    defs: "-D_DEBUG_=1"
                },
                linkOpts: "-gdwarf-3"
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: " -O2 "
                },
                linkOpts: " "
            }
        ]
    ];
     M4F.rawVersion// The raw version string from the compiler = String undefined;
     M4F.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4F.stdInclude// Standard C/C++ types header = String "ti/targets/arm/clang/std.h";
     M4F.version// The Compatibility Key associated with this target = String undefined;
     M4F.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M4F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M4F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4F.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4F.getVersion// Get a target-specific Compatibility Key string() returns String
     M4F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4F.Command
index URL

Required command and options

Configuration settings
var obj = new M4F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4F.Model
index URL

Target runtime model

Configuration settings
var obj = new M4F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4F.Options
index URL

User configurable command options

Configuration settings
var obj = new M4F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4F.alignDirectiveSupported = Bool true;
config M4F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4F.ar = ITarget2.Command {
    cmd: "tiarmar",
    opts: "q"
};
config M4F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4F.asm = ITarget2.Command {
    cmd: "tiarmclang -c -x assembler-with-cpp",
    opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
};
config M4F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4F.cc = ITarget2.Command {
    cmd: "tiarmclang -c",
    opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
};
config M4F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4F.isa = String "v7M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4F.lnk = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
};
config M4F.model // module-wide
index URL

Run-time model

Configuration settings
const M4F.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4F.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4F.name = String "M4F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4F.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4F.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4F.splitMap // module-wide
index URL
Configuration settings
const M4F.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M4F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4F.suffix = String "m4f";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4F.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M4F.vers = ITarget2.Command {
    cmd: "tiarmclang",
    opts: "--version"
};
config M4F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4F.asmOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M4F.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M4F.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M4F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
M4F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4F.ccOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M4F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4F.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4F.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4F.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M4F.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M4F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4F.includeOpts = String "";
config M4F.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M4F.lnkOpts = ITarget2.Options {
    prefix: "-Wl,-q -Wl,-u,_c_int00",
    suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M4F.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M4F.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M4F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4F.platform = String "ti.platforms.cortexM:MTL1_VSOC:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4F.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M4F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-gdwarf-3",
                defs: "-D_DEBUG_=1"
            },
            linkOpts: "-gdwarf-3"
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: " -O2 "
            },
            linkOpts: " "
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M4F.stdInclude = String "ti/targets/arm/clang/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4F.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M4F.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M4F.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M4F.archive() // module-wide
index URL

Create an archive

Configuration settings
M4F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M4F.asmName(String CName) returns String
M4F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:08 GMT


package ti.targets.arm.elf
index URL

Package of Arm targets for TI code generation tools for ELF

XDCspec declarations sourced in ti/targets/arm/elf/package.xdc
requires xdc.bld;
requires ti.targets;
package ti.targets.arm.elf [1, 0, 0] {
    interface IA8;
    // Cortex A8 little endian target
    interface IArm;
    // Common settings for all Arm targets
    interface IM0;
    // Cortex M0 little endian thumb2 target
    interface IM3;
    // Cortex M3 little endian thumb2 target
    interface IM4;
    // Cortex M4 little endian thumb2 target
    interface IR4;
    // Cortex R4 little endian target
    interface IR5;
    // Cortex R5 little endian target
    module A8Fnv;
    // Cortex A8 little endian with neon & vector floating point support (VFPV3) (NEON) (ELF)
    module Arm9;
    // TI Arm9 little endian (ELF)
    module M0;
    // Cortex M0 little endian thumb2 (ELF)
    module M3;
    // Cortex M3 little endian thumb2 (ELF)
    module M4;
    // Cortex M4, no floating point unit, little endian thumb2 (ELF)
    module M4F;
    // Cortex M4 with floating point unit, little endian thumb2 (ELF)
    module R5F;
    // Cortex R5 little endian with floating point support (vfpv3d16) (ELF)
}
generated on Sun, 25 Nov 2018 22:21:13 GMT


module ti.targets.arm.elf.A8Fnv

metaonly module ti.targets.arm.elf.A8Fnv
index URL

Cortex A8 little endian with neon & vector floating point support (VFPV3) (NEON) (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/elf/A8Fnv.xdc
var A8Fnv = xdc.useModule('ti.targets.arm.elf.A8Fnv');
module-wide constants & types
    var obj = new A8Fnv.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new A8Fnv.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new A8Fnv.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new A8Fnv.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new A8Fnv.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new A8Fnv.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new A8Fnv.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new A8Fnv.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new A8Fnv.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new A8Fnv.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new A8Fnv.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new A8Fnv.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const A8Fnv.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const A8Fnv.ar// The command used to create an archive = ITarget2.Command {
        cmd: "armar",
        opts: "rq"
    };
    const A8Fnv.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7A8 --abi=eabi --neon --float_support=vfpv3"
    };
    const A8Fnv.base// A target that this target is based upon = ITarget.Module computed value;
    const A8Fnv.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const A8Fnv.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7A8 --abi=eabi --neon --float_support=vfpv3"
    };
    const A8Fnv.isa// CPU Instruction Set Architecture (ISA) = String "v7A";
    const A8Fnv.lnk// The command used to link executables = ITarget2.Command {
        cmd: "armcl",
        opts: "--silicon_version=7A8 -z --strict_compatibility=on"
    };
    const A8Fnv.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: true
    };
    const A8Fnv.name// Nickname for this target = String "A8Fnv";
    const A8Fnv.os// Name of OS required to run programs built for this target = String computed value;
    const A8Fnv.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const A8Fnv.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const A8Fnv.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const A8Fnv.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const A8Fnv.suffix// Suffix appended to all objs, libraries, and executable = String "ea8fnv";
    const A8Fnv.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
     A8Fnv.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     A8Fnv.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     A8Fnv.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     A8Fnv.ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
     A8Fnv.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     A8Fnv.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "e9",
        "e7",
        "e9t"
    ];
     A8Fnv.execExt// Extension for executables = String undefined;
     A8Fnv.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     A8Fnv.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     A8Fnv.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     A8Fnv.pathPrefix// A prefix to the PATH environment variable = String "";
     A8Fnv.platform// The default platform name for this target = String "ti.platforms.evmDM8168";
     A8Fnv.platforms// A set of platforms that can support this target = String[] [ ];
     A8Fnv.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     A8Fnv.rawVersion// The raw version string from the compiler = String undefined;
     A8Fnv.rootDir// Installation directory for this target's code generation tools = String undefined;
     A8Fnv.stdInclude// Standard C/C++ types header = String "ti/targets/arm/elf/std.h";
     A8Fnv.version// The Compatibility Key associated with this target = String undefined;
     A8Fnv.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     A8Fnv.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     A8Fnv.asmName// The function that converts a C name into an assembly name(String CName) returns String
     A8Fnv.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A8Fnv.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     A8Fnv.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     A8Fnv.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     A8Fnv.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     A8Fnv.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     A8Fnv.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     A8Fnv.getRawVersion// Get a target-specific raw compiler version string() returns String
     A8Fnv.getVersion// Get a target-specific Compatibility Key string() returns String
     A8Fnv.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     A8Fnv.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     A8Fnv.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct A8Fnv.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new A8Fnv.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct A8Fnv.Command
index URL

Required command and options

Configuration settings
var obj = new A8Fnv.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct A8Fnv.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new A8Fnv.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct A8Fnv.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new A8Fnv.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct A8Fnv.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new A8Fnv.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct A8Fnv.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new A8Fnv.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct A8Fnv.Extension
index URL

File extension to file type association

Configuration settings
var obj = new A8Fnv.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct A8Fnv.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new A8Fnv.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct A8Fnv.Model
index URL

Target runtime model

Configuration settings
var obj = new A8Fnv.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct A8Fnv.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new A8Fnv.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct A8Fnv.Options
index URL

User configurable command options

Configuration settings
var obj = new A8Fnv.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct A8Fnv.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new A8Fnv.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config A8Fnv.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const A8Fnv.alignDirectiveSupported = Bool true;
config A8Fnv.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const A8Fnv.ar = ITarget2.Command {
    cmd: "armar",
    opts: "rq"
};
config A8Fnv.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const A8Fnv.asm = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7A8 --abi=eabi --neon --float_support=vfpv3"
};
config A8Fnv.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const A8Fnv.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config A8Fnv.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const A8Fnv.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config A8Fnv.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const A8Fnv.cc = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7A8 --abi=eabi --neon --float_support=vfpv3"
};
config A8Fnv.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const A8Fnv.isa = String "v7A";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config A8Fnv.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const A8Fnv.lnk = ITarget2.Command {
    cmd: "armcl",
    opts: "--silicon_version=7A8 -z --strict_compatibility=on"
};
config A8Fnv.model // module-wide
index URL

Run-time model

Configuration settings
const A8Fnv.model = ITarget.Model {
    endian: "little",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config A8Fnv.name // module-wide
index URL

Nickname for this target

Configuration settings
const A8Fnv.name = String "A8Fnv";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config A8Fnv.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const A8Fnv.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config A8Fnv.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const A8Fnv.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config A8Fnv.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const A8Fnv.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config A8Fnv.splitMap // module-wide
index URL
Configuration settings
const A8Fnv.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config A8Fnv.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const A8Fnv.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config A8Fnv.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const A8Fnv.suffix = String "ea8fnv";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config A8Fnv.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const A8Fnv.vers = ITarget2.Command {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config A8Fnv.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
A8Fnv.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config A8Fnv.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
A8Fnv.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config A8Fnv.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
A8Fnv.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config A8Fnv.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

Configuration settings
A8Fnv.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config A8Fnv.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
A8Fnv.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config A8Fnv.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
A8Fnv.compatibleSuffixes = String[] [
    "e9",
    "e7",
    "e9t"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config A8Fnv.execExt // module-wide
index URL

Extension for executables

Configuration settings
A8Fnv.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config A8Fnv.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
A8Fnv.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config A8Fnv.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
A8Fnv.includeOpts = String "-I$(rootDir)/include ";
config A8Fnv.lnkOpts // module-wide
index URL

Linker options

Configuration settings
A8Fnv.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config A8Fnv.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
A8Fnv.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config A8Fnv.platform // module-wide
index URL

The default platform name for this target

Configuration settings
A8Fnv.platform = String "ti.platforms.evmDM8168";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config A8Fnv.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
A8Fnv.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config A8Fnv.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
A8Fnv.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config A8Fnv.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
A8Fnv.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config A8Fnv.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
A8Fnv.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config A8Fnv.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
A8Fnv.stdInclude = String "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config A8Fnv.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
A8Fnv.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config A8Fnv.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
A8Fnv.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
A8Fnv.archive() // module-wide
index URL

Create an archive

Configuration settings
A8Fnv.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A8Fnv.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
A8Fnv.asmName(String CName) returns String
A8Fnv.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
A8Fnv.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A8Fnv.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
A8Fnv.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
A8Fnv.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
A8Fnv.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A8Fnv.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
A8Fnv.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
A8Fnv.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
A8Fnv.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
A8Fnv.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
A8Fnv.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
A8Fnv.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
A8Fnv.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
A8Fnv.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
A8Fnv.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
A8Fnv.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
A8Fnv.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
A8Fnv.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
A8Fnv.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
A8Fnv.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
A8Fnv.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
A8Fnv.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
A8Fnv.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:12 GMT


module ti.targets.arm.elf.Arm9

metaonly module ti.targets.arm.elf.Arm9
index URL

TI Arm9 little endian (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/elf/Arm9.xdc
var Arm9 = xdc.useModule('ti.targets.arm.elf.Arm9');
module-wide constants & types
    var obj = new Arm9.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new Arm9.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new Arm9.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new Arm9.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new Arm9.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new Arm9.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new Arm9.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new Arm9.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new Arm9.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new Arm9.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new Arm9.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new Arm9.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const Arm9.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const Arm9.ar// The command used to create an archive = ITarget2.Command {
        cmd: "armar",
        opts: "rq"
    };
    const Arm9.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "-me -mv5e --abi=eabi"
    };
    const Arm9.base// A target that this target is based upon = ITarget.Module computed value;
    const Arm9.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const Arm9.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "-me -mv5e --abi=eabi"
    };
    const Arm9.isa// CPU Instruction Set Architecture (ISA) = String "v5T";
    const Arm9.lnk// The command used to link executables = ITarget2.Command {
        cmd: "armcl",
        opts: "--silicon_version=5e -z --strict_compatibility=on"
    };
    const Arm9.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: true
    };
    const Arm9.name// Nickname for this target = String "Arm9";
    const Arm9.os// Name of OS required to run programs built for this target = String computed value;
    const Arm9.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const Arm9.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const Arm9.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const Arm9.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const Arm9.suffix// Suffix appended to all objs, libraries, and executable = String "e9";
    const Arm9.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
     Arm9.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     Arm9.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     Arm9.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     Arm9.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -ms",
        suffix: "$(ccOpts.suffix)"
    };
     Arm9.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     Arm9.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "7",
        "470",
        "9t"
    ];
     Arm9.execExt// Extension for executables = String undefined;
     Arm9.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     Arm9.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     Arm9.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     Arm9.pathPrefix// A prefix to the PATH environment variable = String "";
     Arm9.platform// The default platform name for this target = String "ti.platforms.sim470xx";
     Arm9.platforms// A set of platforms that can support this target = String[] [ ];
     Arm9.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     Arm9.rawVersion// The raw version string from the compiler = String undefined;
     Arm9.rootDir// Installation directory for this target's code generation tools = String undefined;
     Arm9.stdInclude// Standard C/C++ types header = String "ti/targets/arm/elf/std.h";
     Arm9.version// The Compatibility Key associated with this target = String undefined;
     Arm9.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     Arm9.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     Arm9.asmName// The function that converts a C name into an assembly name(String CName) returns String
     Arm9.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Arm9.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     Arm9.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     Arm9.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     Arm9.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     Arm9.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     Arm9.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     Arm9.getRawVersion// Get a target-specific raw compiler version string() returns String
     Arm9.getVersion// Get a target-specific Compatibility Key string() returns String
     Arm9.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     Arm9.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     Arm9.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct Arm9.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new Arm9.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct Arm9.Command
index URL

Required command and options

Configuration settings
var obj = new Arm9.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct Arm9.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new Arm9.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct Arm9.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new Arm9.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct Arm9.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new Arm9.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct Arm9.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new Arm9.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct Arm9.Extension
index URL

File extension to file type association

Configuration settings
var obj = new Arm9.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct Arm9.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new Arm9.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct Arm9.Model
index URL

Target runtime model

Configuration settings
var obj = new Arm9.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct Arm9.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new Arm9.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct Arm9.Options
index URL

User configurable command options

Configuration settings
var obj = new Arm9.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct Arm9.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new Arm9.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config Arm9.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const Arm9.alignDirectiveSupported = Bool true;
config Arm9.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const Arm9.ar = ITarget2.Command {
    cmd: "armar",
    opts: "rq"
};
config Arm9.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const Arm9.asm = ITarget2.Command {
    cmd: "armcl -c",
    opts: "-me -mv5e --abi=eabi"
};
config Arm9.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const Arm9.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config Arm9.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const Arm9.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config Arm9.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const Arm9.cc = ITarget2.Command {
    cmd: "armcl -c",
    opts: "-me -mv5e --abi=eabi"
};
config Arm9.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const Arm9.isa = String "v5T";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config Arm9.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const Arm9.lnk = ITarget2.Command {
    cmd: "armcl",
    opts: "--silicon_version=5e -z --strict_compatibility=on"
};
config Arm9.model // module-wide
index URL

Run-time model

Configuration settings
const Arm9.model = ITarget.Model {
    endian: "little",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config Arm9.name // module-wide
index URL

Nickname for this target

Configuration settings
const Arm9.name = String "Arm9";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config Arm9.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const Arm9.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config Arm9.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const Arm9.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config Arm9.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const Arm9.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config Arm9.splitMap // module-wide
index URL
Configuration settings
const Arm9.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config Arm9.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const Arm9.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config Arm9.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const Arm9.suffix = String "e9";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config Arm9.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const Arm9.vers = ITarget2.Command {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config Arm9.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
Arm9.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config Arm9.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
Arm9.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
Defaults:
-qq
super quiet mode
config Arm9.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
Arm9.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config Arm9.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
Arm9.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -ms",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config Arm9.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
Arm9.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config Arm9.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
Arm9.compatibleSuffixes = String[] [
    "7",
    "470",
    "9t"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config Arm9.execExt // module-wide
index URL

Extension for executables

Configuration settings
Arm9.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config Arm9.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
Arm9.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config Arm9.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
Arm9.includeOpts = String "-I$(rootDir)/include ";
config Arm9.lnkOpts // module-wide
index URL

Linker options

Configuration settings
Arm9.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config Arm9.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
Arm9.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config Arm9.platform // module-wide
index URL

The default platform name for this target

Configuration settings
Arm9.platform = String "ti.platforms.sim470xx";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config Arm9.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
Arm9.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config Arm9.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
Arm9.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config Arm9.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
Arm9.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config Arm9.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
Arm9.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config Arm9.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
Arm9.stdInclude = String "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config Arm9.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
Arm9.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config Arm9.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
Arm9.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
Arm9.archive() // module-wide
index URL

Create an archive

Configuration settings
Arm9.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Arm9.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
Arm9.asmName(String CName) returns String
Arm9.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
Arm9.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Arm9.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
Arm9.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
Arm9.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
Arm9.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Arm9.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
Arm9.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
Arm9.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
Arm9.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
Arm9.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
Arm9.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
Arm9.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
Arm9.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
Arm9.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
Arm9.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
Arm9.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
Arm9.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
Arm9.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
Arm9.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
Arm9.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
Arm9.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
Arm9.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
Arm9.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:12 GMT


interface ti.targets.arm.elf.IA8

metaonly interface ti.targets.arm.elf.IA8
index URL

Cortex A8 little endian target

XDCspec summary sourced in ti/targets/arm/elf/IA8.xdc
metaonly interface IA8 { ...
// inherits ti.targets.arm.elf.IArm
    // inherits ti.targets.ITarget
        // inherits xdc.bld.ITarget3
            // inherits xdc.bld.ITarget2
                // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
package ti.targets.arm.elf;
metaonly interface IA8 inherits IArm {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "armar",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    override readonly config String isa// CPU Instruction Set Architecture (ISA) = "v7A";
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "armcl",
        opts: "--silicon_version=7A8 -z --strict_compatibility=on"
    };
    override readonly config ITarget.Model model// Run-time model = {
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    override config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[] = [
        "e9",
        "e7",
        "e9t"
    ];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include ";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.evmDM8168";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arm/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IA8.StringArray
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
typedef String StringArray[];
struct IA8.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IA8.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IA8.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IA8.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IA8.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IA8.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IA8.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IA8.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IA8.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IA8.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IA8.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IA8.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IA8.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config Bool alignDirectiveSupported = true;
config IA8.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config ITarget2.Command ar = {
    cmd: "armar",
    opts: "rq"
};
config IA8.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
readonly config ITarget2.Command asm;
config IA8.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IA8.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IA8.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
readonly config ITarget2.Command cc;
config IA8.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config String isa = "v7A";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IA8.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "armcl",
    opts: "--silicon_version=7A8 -z --strict_compatibility=on"
};
config IA8.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config ITarget.Model model = {
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IA8.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IA8.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IA8.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IA8.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IA8.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config IA8.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IA8.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IA8.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override readonly config ITarget2.Command vers = {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config IA8.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IA8.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IA8.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IA8.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IA8.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IA8.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config String compatibleSuffixes[] = [
    "e9",
    "e7",
    "e9t"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IA8.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IA8.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IA8.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config String includeOpts = "-I$(rootDir)/include ";
config IA8.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IA8.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IA8.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config String platform = "ti.platforms.evmDM8168";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IA8.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IA8.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IA8.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IA8.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IA8.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config String stdInclude = "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IA8.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IA8.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IA8.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IA8.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String asmName(String CName);
IA8.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IA8.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IA8.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IA8.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IA8.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IA8.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IA8.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IA8.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IA8.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IA8.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IA8.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IA8.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IA8.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:09 GMT


interface ti.targets.arm.elf.IArm

metaonly interface ti.targets.arm.elf.IArm
index URL

Common settings for all Arm targets

XDCspec summary sourced in ti/targets/arm/elf/IArm.xdc
metaonly interface IArm { ...
// inherits ti.targets.ITarget
    // inherits xdc.bld.ITarget3
        // inherits xdc.bld.ITarget2
            // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
package ti.targets.arm.elf;
metaonly interface IArm inherits ITarget {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "armar",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "armcl",
        opts: "-z"
    };
    override readonly config ITarget.Model model// Run-time model = {
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include ";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.sim470xx";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arm/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IArm.StringArray
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
typedef String StringArray[];
struct IArm.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IArm.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IArm.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IArm.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IArm.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IArm.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IArm.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IArm.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IArm.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IArm.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IArm.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IArm.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IArm.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config Bool alignDirectiveSupported = true;
config IArm.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config ITarget2.Command ar = {
    cmd: "armar",
    opts: "rq"
};
config IArm.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config ITarget2.Command asm;
config IArm.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IArm.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IArm.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config ITarget2.Command cc;
config IArm.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IArm.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "armcl",
    opts: "-z"
};
config IArm.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config ITarget.Model model = {
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IArm.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IArm.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IArm.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IArm.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IArm.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config IArm.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IArm.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IArm.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override readonly config ITarget2.Command vers = {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config IArm.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IArm.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IArm.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IArm.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IArm.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IArm.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IArm.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IArm.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IArm.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config String includeOpts = "-I$(rootDir)/include ";
config IArm.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IArm.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IArm.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config String platform = "ti.platforms.sim470xx";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IArm.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IArm.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IArm.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IArm.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IArm.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config String stdInclude = "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IArm.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IArm.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IArm.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IArm.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String asmName(String CName);
IArm.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IArm.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IArm.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IArm.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IArm.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IArm.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IArm.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IArm.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IArm.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IArm.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IArm.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IArm.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IArm.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:10 GMT


interface ti.targets.arm.elf.IM0

metaonly interface ti.targets.arm.elf.IM0
index URL

Cortex M0 little endian thumb2 target

XDCspec summary sourced in ti/targets/arm/elf/IM0.xdc
metaonly interface IM0 { ...
// inherits ti.targets.arm.elf.IArm
    // inherits ti.targets.ITarget
        // inherits xdc.bld.ITarget3
            // inherits xdc.bld.ITarget2
                // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
package ti.targets.arm.elf;
metaonly interface IM0 inherits IArm {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "armar",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    override readonly config String isa// CPU Instruction Set Architecture (ISA) = "v6M";
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "armcl",
        opts: "--silicon_version=6M0 -z --strict_compatibility=on"
    };
    override readonly config ITarget.Model model// Run-time model = {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include ";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.simCM3";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arm/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IM0.StringArray
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
typedef String StringArray[];
struct IM0.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IM0.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IM0.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IM0.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IM0.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IM0.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IM0.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IM0.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IM0.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IM0.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IM0.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IM0.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IM0.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config Bool alignDirectiveSupported = true;
config IM0.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config ITarget2.Command ar = {
    cmd: "armar",
    opts: "rq"
};
config IM0.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
readonly config ITarget2.Command asm;
config IM0.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IM0.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IM0.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
readonly config ITarget2.Command cc;
config IM0.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config String isa = "v6M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IM0.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "armcl",
    opts: "--silicon_version=6M0 -z --strict_compatibility=on"
};
config IM0.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config ITarget.Model model = {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IM0.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IM0.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IM0.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IM0.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IM0.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config IM0.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IM0.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IM0.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override readonly config ITarget2.Command vers = {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config IM0.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IM0.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IM0.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IM0.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IM0.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IM0.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IM0.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IM0.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IM0.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config String includeOpts = "-I$(rootDir)/include ";
config IM0.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IM0.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IM0.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config String platform = "ti.platforms.simCM3";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IM0.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IM0.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IM0.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IM0.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IM0.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config String stdInclude = "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IM0.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IM0.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IM0.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM0.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String asmName(String CName);
IM0.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM0.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IM0.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM0.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM0.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IM0.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IM0.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IM0.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IM0.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IM0.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM0.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IM0.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM0.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:10 GMT


interface ti.targets.arm.elf.IM3

metaonly interface ti.targets.arm.elf.IM3
index URL

Cortex M3 little endian thumb2 target

XDCspec summary sourced in ti/targets/arm/elf/IM3.xdc
metaonly interface IM3 { ...
// inherits ti.targets.arm.elf.IArm
    // inherits ti.targets.ITarget
        // inherits xdc.bld.ITarget3
            // inherits xdc.bld.ITarget2
                // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
package ti.targets.arm.elf;
metaonly interface IM3 inherits IArm {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "armar",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    override readonly config String isa// CPU Instruction Set Architecture (ISA) = "v7M";
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "armcl",
        opts: "--silicon_version=7M3 -z --strict_compatibility=on"
    };
    override readonly config ITarget.Model model// Run-time model = {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include ";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.simCM3";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arm/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IM3.StringArray
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
typedef String StringArray[];
struct IM3.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IM3.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IM3.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IM3.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IM3.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IM3.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IM3.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IM3.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IM3.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IM3.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IM3.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IM3.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IM3.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config Bool alignDirectiveSupported = true;
config IM3.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config ITarget2.Command ar = {
    cmd: "armar",
    opts: "rq"
};
config IM3.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
readonly config ITarget2.Command asm;
config IM3.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IM3.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IM3.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
readonly config ITarget2.Command cc;
config IM3.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config String isa = "v7M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IM3.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "armcl",
    opts: "--silicon_version=7M3 -z --strict_compatibility=on"
};
config IM3.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config ITarget.Model model = {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IM3.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IM3.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IM3.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IM3.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IM3.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config IM3.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IM3.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IM3.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override readonly config ITarget2.Command vers = {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config IM3.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IM3.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IM3.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IM3.ccConfigOpts // module-wide
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User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IM3.ccOpts // module-wide
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User configurable compiler options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IM3.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IM3.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IM3.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IM3.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config String includeOpts = "-I$(rootDir)/include ";
config IM3.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IM3.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IM3.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config String platform = "ti.platforms.simCM3";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IM3.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IM3.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IM3.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IM3.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IM3.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config String stdInclude = "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IM3.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IM3.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IM3.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM3.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String asmName(String CName);
IM3.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM3.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IM3.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM3.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM3.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IM3.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IM3.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IM3.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IM3.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IM3.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM3.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IM3.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM3.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:10 GMT


interface ti.targets.arm.elf.IM4

metaonly interface ti.targets.arm.elf.IM4
index URL

Cortex M4 little endian thumb2 target

XDCspec summary sourced in ti/targets/arm/elf/IM4.xdc
metaonly interface IM4 { ...
// inherits ti.targets.arm.elf.IArm
    // inherits ti.targets.ITarget
        // inherits xdc.bld.ITarget3
            // inherits xdc.bld.ITarget2
                // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
package ti.targets.arm.elf;
metaonly interface IM4 inherits IArm {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "armar",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    override readonly config String isa// CPU Instruction Set Architecture (ISA) = "v7M4";
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "armcl",
        opts: "--silicon_version=7M4 -z --strict_compatibility=on"
    };
    override readonly config ITarget.Model model// Run-time model = {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include ";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.tiva:TM4C1294NCPDT:1";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arm/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IM4.StringArray
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
typedef String StringArray[];
struct IM4.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IM4.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IM4.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IM4.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IM4.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IM4.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IM4.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IM4.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IM4.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IM4.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IM4.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IM4.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IM4.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config Bool alignDirectiveSupported = true;
config IM4.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config ITarget2.Command ar = {
    cmd: "armar",
    opts: "rq"
};
config IM4.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
readonly config ITarget2.Command asm;
config IM4.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IM4.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IM4.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
readonly config ITarget2.Command cc;
config IM4.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config String isa = "v7M4";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IM4.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "armcl",
    opts: "--silicon_version=7M4 -z --strict_compatibility=on"
};
config IM4.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config ITarget.Model model = {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IM4.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IM4.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IM4.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IM4.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IM4.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config IM4.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IM4.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IM4.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override readonly config ITarget2.Command vers = {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config IM4.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IM4.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IM4.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IM4.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IM4.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IM4.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IM4.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IM4.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IM4.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config String includeOpts = "-I$(rootDir)/include ";
config IM4.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IM4.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IM4.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config String platform = "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IM4.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IM4.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IM4.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IM4.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IM4.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config String stdInclude = "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IM4.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IM4.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IM4.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM4.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String asmName(String CName);
IM4.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM4.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IM4.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM4.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IM4.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IM4.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IM4.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IM4.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IM4.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IM4.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IM4.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IM4.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IM4.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:11 GMT


interface ti.targets.arm.elf.IR4

metaonly interface ti.targets.arm.elf.IR4
index URL

Cortex R4 little endian target

XDCspec summary sourced in ti/targets/arm/elf/IR4.xdc
metaonly interface IR4 { ...
// inherits ti.targets.arm.elf.IArm
    // inherits ti.targets.ITarget
        // inherits xdc.bld.ITarget3
            // inherits xdc.bld.ITarget2
                // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
package ti.targets.arm.elf;
metaonly interface IR4 inherits IArm {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "armar",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    override readonly config String isa// CPU Instruction Set Architecture (ISA) = "v7R";
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "armlnk",
        opts: "--silicon_version=7R4 --strict_compatibility=on"
    };
    override readonly config ITarget.Model model// Run-time model = {
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include ";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.cortexR:AWR14XX:1";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arm/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IR4.StringArray
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
typedef String StringArray[];
struct IR4.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IR4.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IR4.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IR4.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IR4.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IR4.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IR4.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IR4.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IR4.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IR4.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IR4.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IR4.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IR4.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config Bool alignDirectiveSupported = true;
config IR4.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config ITarget2.Command ar = {
    cmd: "armar",
    opts: "rq"
};
config IR4.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
readonly config ITarget2.Command asm;
config IR4.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IR4.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IR4.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
readonly config ITarget2.Command cc;
config IR4.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config String isa = "v7R";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IR4.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "armlnk",
    opts: "--silicon_version=7R4 --strict_compatibility=on"
};
config IR4.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config ITarget.Model model = {
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IR4.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IR4.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IR4.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IR4.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IR4.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config IR4.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IR4.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IR4.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override readonly config ITarget2.Command vers = {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config IR4.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IR4.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IR4.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IR4.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IR4.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IR4.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IR4.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IR4.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IR4.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config String includeOpts = "-I$(rootDir)/include ";
config IR4.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IR4.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IR4.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config String platform = "ti.platforms.cortexR:AWR14XX:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IR4.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IR4.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IR4.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IR4.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IR4.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config String stdInclude = "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IR4.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IR4.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IR4.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IR4.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String asmName(String CName);
IR4.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IR4.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IR4.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IR4.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IR4.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IR4.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IR4.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IR4.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IR4.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IR4.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IR4.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IR4.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR4.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:11 GMT


interface ti.targets.arm.elf.IR5

metaonly interface ti.targets.arm.elf.IR5
index URL

Cortex R5 little endian target

XDCspec summary sourced in ti/targets/arm/elf/IR5.xdc
metaonly interface IR5 { ...
// inherits ti.targets.arm.elf.IArm
    // inherits ti.targets.ITarget
        // inherits xdc.bld.ITarget3
            // inherits xdc.bld.ITarget2
                // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
package ti.targets.arm.elf;
metaonly interface IR5 inherits IArm {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "armar",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    override readonly config String isa// CPU Instruction Set Architecture (ISA) = "v7R";
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "armcl",
        opts: "--abi=eabi -mv7R5 -z --strict_compatibility=on"
    };
    override readonly config ITarget.Model model// Run-time model = {
        shortEnums: true
    };
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include ";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.cortexR:RM57L8XX:1";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arm/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IR5.StringArray
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
typedef String StringArray[];
struct IR5.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IR5.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IR5.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IR5.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IR5.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IR5.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IR5.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IR5.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IR5.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IR5.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IR5.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IR5.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IR5.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config Bool alignDirectiveSupported = true;
config IR5.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config ITarget2.Command ar = {
    cmd: "armar",
    opts: "rq"
};
config IR5.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
readonly config ITarget2.Command asm;
config IR5.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IR5.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IR5.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
readonly config ITarget2.Command cc;
config IR5.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config String isa = "v7R";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IR5.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "armcl",
    opts: "--abi=eabi -mv7R5 -z --strict_compatibility=on"
};
config IR5.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config ITarget.Model model = {
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IR5.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IR5.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IR5.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IR5.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IR5.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config IR5.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IR5.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IR5.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override readonly config ITarget2.Command vers = {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config IR5.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IR5.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IR5.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IR5.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IR5.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IR5.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IR5.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IR5.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IR5.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config String includeOpts = "-I$(rootDir)/include ";
config IR5.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IR5.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IR5.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config String platform = "ti.platforms.cortexR:RM57L8XX:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IR5.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IR5.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IR5.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IR5.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IR5.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config String stdInclude = "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IR5.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IR5.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IR5.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IR5.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String asmName(String CName);
IR5.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IR5.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IR5.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IR5.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IR5.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IR5.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IR5.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IR5.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IR5.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IR5.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IR5.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IR5.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arm/elf/IR5.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:11 GMT


module ti.targets.arm.elf.M0

metaonly module ti.targets.arm.elf.M0
index URL

Cortex M0 little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/elf/M0.xdc
var M0 = xdc.useModule('ti.targets.arm.elf.M0');
module-wide constants & types
    var obj = new M0.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M0.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M0.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M0.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M0.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M0.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M0.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M0.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M0.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M0.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M0.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M0.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M0.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M0.ar// The command used to create an archive = ITarget2.Command {
        cmd: "armar",
        opts: "rq"
    };
    const M0.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv6M0 --abi=eabi"
    };
    const M0.base// A target that this target is based upon = ITarget.Module computed value;
    const M0.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M0.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv6M0 --abi=eabi"
    };
    const M0.isa// CPU Instruction Set Architecture (ISA) = String "v6M";
    const M0.lnk// The command used to link executables = ITarget2.Command {
        cmd: "armcl",
        opts: "--silicon_version=6M0 -z --strict_compatibility=on"
    };
    const M0.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M0.name// Nickname for this target = String "M0";
    const M0.os// Name of OS required to run programs built for this target = String computed value;
    const M0.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M0.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M0.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M0.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M0.suffix// Suffix appended to all objs, libraries, and executable = String "em0";
    const M0.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
     M0.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M0.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     M0.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M0.ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
     M0.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     M0.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M0.execExt// Extension for executables = String undefined;
     M0.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M0.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     M0.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     M0.pathPrefix// A prefix to the PATH environment variable = String "";
     M0.platform// The default platform name for this target = String "ti.platforms.simCM3";
     M0.platforms// A set of platforms that can support this target = String[] [ ];
     M0.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     M0.rawVersion// The raw version string from the compiler = String undefined;
     M0.rootDir// Installation directory for this target's code generation tools = String undefined;
     M0.stdInclude// Standard C/C++ types header = String "ti/targets/arm/elf/std.h";
     M0.version// The Compatibility Key associated with this target = String undefined;
     M0.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M0.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M0.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M0.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M0.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M0.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M0.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M0.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M0.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M0.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M0.getRawVersion// Get a target-specific raw compiler version string() returns String
     M0.getVersion// Get a target-specific Compatibility Key string() returns String
     M0.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M0.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M0.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M0.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M0.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M0.Command
index URL

Required command and options

Configuration settings
var obj = new M0.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M0.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M0.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M0.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M0.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M0.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M0.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M0.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M0.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M0.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M0.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M0.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M0.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M0.Model
index URL

Target runtime model

Configuration settings
var obj = new M0.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M0.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M0.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M0.Options
index URL

User configurable command options

Configuration settings
var obj = new M0.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M0.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M0.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M0.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M0.alignDirectiveSupported = Bool true;
config M0.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M0.ar = ITarget2.Command {
    cmd: "armar",
    opts: "rq"
};
config M0.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M0.asm = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv6M0 --abi=eabi"
};
config M0.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M0.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M0.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M0.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M0.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M0.cc = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv6M0 --abi=eabi"
};
config M0.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M0.isa = String "v6M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M0.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M0.lnk = ITarget2.Command {
    cmd: "armcl",
    opts: "--silicon_version=6M0 -z --strict_compatibility=on"
};
config M0.model // module-wide
index URL

Run-time model

Configuration settings
const M0.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M0.name // module-wide
index URL

Nickname for this target

Configuration settings
const M0.name = String "M0";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M0.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M0.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M0.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M0.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M0.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M0.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M0.splitMap // module-wide
index URL
Configuration settings
const M0.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M0.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M0.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M0.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M0.suffix = String "em0";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M0.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M0.vers = ITarget2.Command {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config M0.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M0.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M0.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M0.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M0.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M0.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M0.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

Configuration settings
M0.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M0.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M0.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M0.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M0.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M0.execExt // module-wide
index URL

Extension for executables

Configuration settings
M0.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M0.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M0.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M0.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M0.includeOpts = String "-I$(rootDir)/include ";
config M0.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M0.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M0.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M0.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M0.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M0.platform = String "ti.platforms.simCM3";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M0.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M0.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M0.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M0.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M0.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M0.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M0.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M0.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M0.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M0.stdInclude = String "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M0.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M0.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M0.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M0.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M0.archive() // module-wide
index URL

Create an archive

Configuration settings
M0.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M0.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M0.asmName(String CName) returns String
M0.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M0.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M0.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M0.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M0.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M0.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M0.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M0.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M0.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M0.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M0.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M0.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M0.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M0.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M0.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M0.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M0.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M0.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M0.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M0.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M0.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M0.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M0.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M0.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:12 GMT


module ti.targets.arm.elf.M3

metaonly module ti.targets.arm.elf.M3
index URL

Cortex M3 little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/elf/M3.xdc
var M3 = xdc.useModule('ti.targets.arm.elf.M3');
module-wide constants & types
    var obj = new M3.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M3.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M3.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M3.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M3.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M3.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M3.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M3.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M3.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M3.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M3.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M3.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M3.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M3.ar// The command used to create an archive = ITarget2.Command {
        cmd: "armar",
        opts: "rq"
    };
    const M3.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7M3 --abi=eabi"
    };
    const M3.base// A target that this target is based upon = ITarget.Module computed value;
    const M3.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M3.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7M3 --abi=eabi"
    };
    const M3.isa// CPU Instruction Set Architecture (ISA) = String "v7M";
    const M3.lnk// The command used to link executables = ITarget2.Command {
        cmd: "armcl",
        opts: "--silicon_version=7M3 -z --strict_compatibility=on"
    };
    const M3.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M3.name// Nickname for this target = String "M3";
    const M3.os// Name of OS required to run programs built for this target = String computed value;
    const M3.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M3.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M3.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M3.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M3.suffix// Suffix appended to all objs, libraries, and executable = String "em3";
    const M3.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
     M3.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M3.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     M3.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M3.ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
     M3.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     M3.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M3.execExt// Extension for executables = String undefined;
     M3.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M3.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     M3.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     M3.pathPrefix// A prefix to the PATH environment variable = String "";
     M3.platform// The default platform name for this target = String "ti.platforms.simCM3";
     M3.platforms// A set of platforms that can support this target = String[] [ ];
     M3.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     M3.rawVersion// The raw version string from the compiler = String undefined;
     M3.rootDir// Installation directory for this target's code generation tools = String undefined;
     M3.stdInclude// Standard C/C++ types header = String "ti/targets/arm/elf/std.h";
     M3.version// The Compatibility Key associated with this target = String undefined;
     M3.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M3.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M3.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M3.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M3.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M3.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M3.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M3.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M3.getRawVersion// Get a target-specific raw compiler version string() returns String
     M3.getVersion// Get a target-specific Compatibility Key string() returns String
     M3.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M3.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M3.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M3.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M3.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M3.Command
index URL

Required command and options

Configuration settings
var obj = new M3.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M3.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M3.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M3.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M3.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M3.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M3.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M3.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M3.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M3.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M3.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M3.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M3.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M3.Model
index URL

Target runtime model

Configuration settings
var obj = new M3.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M3.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M3.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M3.Options
index URL

User configurable command options

Configuration settings
var obj = new M3.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M3.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M3.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M3.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M3.alignDirectiveSupported = Bool true;
config M3.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M3.ar = ITarget2.Command {
    cmd: "armar",
    opts: "rq"
};
config M3.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M3.asm = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7M3 --abi=eabi"
};
config M3.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M3.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M3.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M3.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M3.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M3.cc = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7M3 --abi=eabi"
};
config M3.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M3.isa = String "v7M";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M3.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M3.lnk = ITarget2.Command {
    cmd: "armcl",
    opts: "--silicon_version=7M3 -z --strict_compatibility=on"
};
config M3.model // module-wide
index URL

Run-time model

Configuration settings
const M3.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M3.name // module-wide
index URL

Nickname for this target

Configuration settings
const M3.name = String "M3";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M3.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M3.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M3.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M3.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M3.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M3.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M3.splitMap // module-wide
index URL
Configuration settings
const M3.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M3.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M3.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M3.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M3.suffix = String "em3";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M3.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M3.vers = ITarget2.Command {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config M3.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M3.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M3.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M3.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M3.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M3.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M3.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

Configuration settings
M3.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M3.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M3.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M3.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M3.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M3.execExt // module-wide
index URL

Extension for executables

Configuration settings
M3.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M3.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M3.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M3.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M3.includeOpts = String "-I$(rootDir)/include ";
config M3.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M3.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M3.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M3.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M3.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M3.platform = String "ti.platforms.simCM3";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M3.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M3.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M3.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M3.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M3.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M3.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M3.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M3.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M3.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M3.stdInclude = String "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M3.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M3.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M3.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M3.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M3.archive() // module-wide
index URL

Create an archive

Configuration settings
M3.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M3.asmName(String CName) returns String
M3.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M3.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M3.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M3.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M3.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M3.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M3.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M3.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M3.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M3.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M3.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M3.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M3.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M3.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M3.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M3.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M3.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M3.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M3.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M3.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M3.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M3.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:13 GMT


module ti.targets.arm.elf.M4

metaonly module ti.targets.arm.elf.M4
index URL

Cortex M4, no floating point unit, little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/elf/M4.xdc
var M4 = xdc.useModule('ti.targets.arm.elf.M4');
module-wide constants & types
    var obj = new M4.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4.ar// The command used to create an archive = ITarget2.Command {
        cmd: "armar",
        opts: "rq"
    };
    const M4.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7M4 --float_support=vfplib --abi=eabi"
    };
    const M4.base// A target that this target is based upon = ITarget.Module computed value;
    const M4.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7M4 --float_support=vfplib --abi=eabi"
    };
    const M4.isa// CPU Instruction Set Architecture (ISA) = String "v7M4";
    const M4.lnk// The command used to link executables = ITarget2.Command {
        cmd: "armcl",
        opts: "--silicon_version=7M4 -z --strict_compatibility=on"
    };
    const M4.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4.name// Nickname for this target = String "M4";
    const M4.os// Name of OS required to run programs built for this target = String computed value;
    const M4.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M4.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M4.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M4.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M4.suffix// Suffix appended to all objs, libraries, and executable = String "em4";
    const M4.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
     M4.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     M4.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M4.ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
     M4.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     M4.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "em3"
    ];
     M4.execExt// Extension for executables = String undefined;
     M4.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M4.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     M4.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     M4.pathPrefix// A prefix to the PATH environment variable = String "";
     M4.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT:1";
     M4.platforms// A set of platforms that can support this target = String[] [ ];
     M4.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     M4.rawVersion// The raw version string from the compiler = String undefined;
     M4.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4.stdInclude// Standard C/C++ types header = String "ti/targets/arm/elf/std.h";
     M4.version// The Compatibility Key associated with this target = String undefined;
     M4.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M4.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M4.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4.getVersion// Get a target-specific Compatibility Key string() returns String
     M4.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4.Command
index URL

Required command and options

Configuration settings
var obj = new M4.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4.Model
index URL

Target runtime model

Configuration settings
var obj = new M4.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4.Options
index URL

User configurable command options

Configuration settings
var obj = new M4.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4.alignDirectiveSupported = Bool true;
config M4.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4.ar = ITarget2.Command {
    cmd: "armar",
    opts: "rq"
};
config M4.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4.asm = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7M4 --float_support=vfplib --abi=eabi"
};
config M4.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4.cc = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7M4 --float_support=vfplib --abi=eabi"
};
config M4.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4.isa = String "v7M4";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4.lnk = ITarget2.Command {
    cmd: "armcl",
    opts: "--silicon_version=7M4 -z --strict_compatibility=on"
};
config M4.model // module-wide
index URL

Run-time model

Configuration settings
const M4.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4.name = String "M4";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4.splitMap // module-wide
index URL
Configuration settings
const M4.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M4.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4.suffix = String "em4";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M4.vers = ITarget2.Command {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config M4.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M4.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M4.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M4.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

Configuration settings
M4.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M4.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4.compatibleSuffixes = String[] [
    "em3"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M4.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M4.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4.includeOpts = String "-I$(rootDir)/include ";
config M4.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M4.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M4.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M4.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M4.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4.platform = String "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M4.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M4.stdInclude = String "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M4.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M4.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M4.archive() // module-wide
index URL

Create an archive

Configuration settings
M4.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M4.asmName(String CName) returns String
M4.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:13 GMT


module ti.targets.arm.elf.M4F

metaonly module ti.targets.arm.elf.M4F
index URL

Cortex M4 with floating point unit, little endian thumb2 (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/elf/M4F.xdc
var M4F = xdc.useModule('ti.targets.arm.elf.M4F');
module-wide constants & types
    var obj = new M4F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new M4F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new M4F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new M4F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new M4F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new M4F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new M4F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new M4F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new M4F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new M4F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new M4F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new M4F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const M4F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const M4F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "armar",
        opts: "rq"
    };
    const M4F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7M4 --abi=eabi --float_support=fpv4spd16"
    };
    const M4F.base// A target that this target is based upon = ITarget.Module computed value;
    const M4F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const M4F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--endian=little -mv7M4 --abi=eabi --float_support=fpv4spd16"
    };
    const M4F.isa// CPU Instruction Set Architecture (ISA) = String "v7M4";
    const M4F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "armcl",
        opts: "--silicon_version=7M4 -z --strict_compatibility=on"
    };
    const M4F.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "thumb2",
        shortEnums: true
    };
    const M4F.name// Nickname for this target = String "M4F";
    const M4F.os// Name of OS required to run programs built for this target = String computed value;
    const M4F.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const M4F.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const M4F.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const M4F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const M4F.suffix// Suffix appended to all objs, libraries, and executable = String "em4f";
    const M4F.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
     M4F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     M4F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     M4F.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     M4F.ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
     M4F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     M4F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     M4F.execExt// Extension for executables = String undefined;
     M4F.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     M4F.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     M4F.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     M4F.pathPrefix// A prefix to the PATH environment variable = String "";
     M4F.platform// The default platform name for this target = String "ti.platforms.tiva:TM4C1294NCPDT:1";
     M4F.platforms// A set of platforms that can support this target = String[] [ ];
     M4F.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     M4F.rawVersion// The raw version string from the compiler = String undefined;
     M4F.rootDir// Installation directory for this target's code generation tools = String undefined;
     M4F.stdInclude// Standard C/C++ types header = String "ti/targets/arm/elf/std.h";
     M4F.version// The Compatibility Key associated with this target = String undefined;
     M4F.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     M4F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     M4F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     M4F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     M4F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     M4F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     M4F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     M4F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     M4F.getRawVersion// Get a target-specific raw compiler version string() returns String
     M4F.getVersion// Get a target-specific Compatibility Key string() returns String
     M4F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     M4F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     M4F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct M4F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new M4F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct M4F.Command
index URL

Required command and options

Configuration settings
var obj = new M4F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct M4F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new M4F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct M4F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new M4F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct M4F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new M4F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct M4F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new M4F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct M4F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new M4F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct M4F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new M4F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct M4F.Model
index URL

Target runtime model

Configuration settings
var obj = new M4F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct M4F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new M4F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct M4F.Options
index URL

User configurable command options

Configuration settings
var obj = new M4F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct M4F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new M4F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config M4F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const M4F.alignDirectiveSupported = Bool true;
config M4F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const M4F.ar = ITarget2.Command {
    cmd: "armar",
    opts: "rq"
};
config M4F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const M4F.asm = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7M4 --abi=eabi --float_support=fpv4spd16"
};
config M4F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const M4F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config M4F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const M4F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config M4F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const M4F.cc = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--endian=little -mv7M4 --abi=eabi --float_support=fpv4spd16"
};
config M4F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const M4F.isa = String "v7M4";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config M4F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const M4F.lnk = ITarget2.Command {
    cmd: "armcl",
    opts: "--silicon_version=7M4 -z --strict_compatibility=on"
};
config M4F.model // module-wide
index URL

Run-time model

Configuration settings
const M4F.model = ITarget.Model {
    endian: "little",
    codeModel: "thumb2",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config M4F.name // module-wide
index URL

Nickname for this target

Configuration settings
const M4F.name = String "M4F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config M4F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const M4F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config M4F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const M4F.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config M4F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const M4F.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config M4F.splitMap // module-wide
index URL
Configuration settings
const M4F.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config M4F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const M4F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config M4F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const M4F.suffix = String "em4f";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config M4F.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const M4F.vers = ITarget2.Command {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config M4F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
M4F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config M4F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
M4F.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config M4F.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
M4F.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config M4F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

Configuration settings
M4F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config M4F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
M4F.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config M4F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
M4F.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config M4F.execExt // module-wide
index URL

Extension for executables

Configuration settings
M4F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config M4F.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
M4F.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config M4F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
M4F.includeOpts = String "-I$(rootDir)/include ";
config M4F.lnkOpts // module-wide
index URL

Linker options

Configuration settings
M4F.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config M4F.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
M4F.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config M4F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
M4F.platform = String "ti.platforms.tiva:TM4C1294NCPDT:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config M4F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
M4F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config M4F.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
M4F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config M4F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
M4F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config M4F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
M4F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config M4F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
M4F.stdInclude = String "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config M4F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
M4F.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config M4F.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
M4F.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
M4F.archive() // module-wide
index URL

Create an archive

Configuration settings
M4F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
M4F.asmName(String CName) returns String
M4F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
M4F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
M4F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
M4F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
M4F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
M4F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
M4F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
M4F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
M4F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
M4F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
M4F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
M4F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
M4F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
M4F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
M4F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
M4F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
M4F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
M4F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
M4F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
M4F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
M4F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:13 GMT


module ti.targets.arm.elf.R5F

metaonly module ti.targets.arm.elf.R5F
index URL

Cortex R5 little endian with floating point support (vfpv3d16) (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arm/elf/R5F.xdc
var R5F = xdc.useModule('ti.targets.arm.elf.R5F');
module-wide constants & types
    var obj = new R5F.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new R5F.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new R5F.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new R5F.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new R5F.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new R5F.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new R5F.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new R5F.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new R5F.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new R5F.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new R5F.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new R5F.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const R5F.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const R5F.ar// The command used to create an archive = ITarget2.Command {
        cmd: "armar",
        opts: "rq"
    };
    const R5F.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--float_support=vfpv3d16 --endian=little -mv7R5 --abi=eabi"
    };
    const R5F.base// A target that this target is based upon = ITarget.Module computed value;
    const R5F.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const R5F.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "armcl -c",
        opts: "--float_support=vfpv3d16 --endian=little -mv7R5 --abi=eabi"
    };
    const R5F.isa// CPU Instruction Set Architecture (ISA) = String "v7R";
    const R5F.lnk// The command used to link executables = ITarget2.Command {
        cmd: "armcl",
        opts: "--abi=eabi -mv7R5 -z --strict_compatibility=on"
    };
    const R5F.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: true
    };
    const R5F.name// Nickname for this target = String "R5F";
    const R5F.os// Name of OS required to run programs built for this target = String computed value;
    const R5F.rts// Name of a run-time support package to include = String "ti.targets.arm.rtsarm";
    const R5F.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".binit",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".init_array",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ARM.exidx",
            "data"
        ],
        [
            ".ARM.extab",
            "data"
        ]
    ];
    const R5F.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".ARM.extab",
            true
        ]
    ];
    const R5F.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const R5F.suffix// Suffix appended to all objs, libraries, and executable = String "er5f";
    const R5F.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "armcl",
        opts: "--compiler_revision"
    };
     R5F.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     R5F.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     R5F.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     R5F.ccConfigOpts// User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
        suffix: "$(ccOpts.suffix)"
    };
     R5F.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     R5F.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     R5F.execExt// Extension for executables = String undefined;
     R5F.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     R5F.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     R5F.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     R5F.pathPrefix// A prefix to the PATH environment variable = String "";
     R5F.platform// The default platform name for this target = String "ti.platforms.cortexR:RM57L8XX:1";
     R5F.platforms// A set of platforms that can support this target = String[] [ ];
     R5F.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     R5F.rawVersion// The raw version string from the compiler = String undefined;
     R5F.rootDir// Installation directory for this target's code generation tools = String undefined;
     R5F.stdInclude// Standard C/C++ types header = String "ti/targets/arm/elf/std.h";
     R5F.version// The Compatibility Key associated with this target = String undefined;
     R5F.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     R5F.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     R5F.asmName// The function that converts a C name into an assembly name(String CName) returns String
     R5F.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     R5F.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     R5F.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     R5F.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     R5F.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     R5F.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     R5F.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     R5F.getRawVersion// Get a target-specific raw compiler version string() returns String
     R5F.getVersion// Get a target-specific Compatibility Key string() returns String
     R5F.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     R5F.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     R5F.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct R5F.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new R5F.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct R5F.Command
index URL

Required command and options

Configuration settings
var obj = new R5F.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct R5F.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new R5F.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct R5F.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new R5F.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct R5F.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new R5F.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct R5F.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new R5F.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct R5F.Extension
index URL

File extension to file type association

Configuration settings
var obj = new R5F.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct R5F.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new R5F.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct R5F.Model
index URL

Target runtime model

Configuration settings
var obj = new R5F.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct R5F.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new R5F.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct R5F.Options
index URL

User configurable command options

Configuration settings
var obj = new R5F.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct R5F.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new R5F.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config R5F.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const R5F.alignDirectiveSupported = Bool true;
config R5F.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const R5F.ar = ITarget2.Command {
    cmd: "armar",
    opts: "rq"
};
config R5F.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const R5F.asm = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--float_support=vfpv3d16 --endian=little -mv7R5 --abi=eabi"
};
config R5F.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const R5F.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config R5F.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const R5F.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config R5F.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const R5F.cc = ITarget2.Command {
    cmd: "armcl -c",
    opts: "--float_support=vfpv3d16 --endian=little -mv7R5 --abi=eabi"
};
config R5F.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const R5F.isa = String "v7R";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config R5F.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const R5F.lnk = ITarget2.Command {
    cmd: "armcl",
    opts: "--abi=eabi -mv7R5 -z --strict_compatibility=on"
};
config R5F.model // module-wide
index URL

Run-time model

Configuration settings
const R5F.model = ITarget.Model {
    endian: "little",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config R5F.name // module-wide
index URL

Nickname for this target

Configuration settings
const R5F.name = String "R5F";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config R5F.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const R5F.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config R5F.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const R5F.rts = String "ti.targets.arm.rtsarm";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config R5F.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const R5F.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".binit",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".init_array",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ARM.exidx",
        "data"
    ],
    [
        ".ARM.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config R5F.splitMap // module-wide
index URL
Configuration settings
const R5F.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".ARM.extab",
        true
    ]
];
config R5F.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const R5F.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config R5F.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const R5F.suffix = String "er5f";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config R5F.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const R5F.vers = ITarget2.Command {
    cmd: "armcl",
    opts: "--compiler_revision"
};
config R5F.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
R5F.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config R5F.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
R5F.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config R5F.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
R5F.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config R5F.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file. ---fp_mode=strict disable conversion of double-precision computations to single-precision computations when the result is assigned to a single-precision variable

Configuration settings
R5F.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config R5F.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
R5F.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config R5F.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
R5F.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config R5F.execExt // module-wide
index URL

Extension for executables

Configuration settings
R5F.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config R5F.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
R5F.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config R5F.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
R5F.includeOpts = String "-I$(rootDir)/include ";
config R5F.lnkOpts // module-wide
index URL

Linker options

Configuration settings
R5F.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config R5F.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
R5F.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config R5F.platform // module-wide
index URL

The default platform name for this target

Configuration settings
R5F.platform = String "ti.platforms.cortexR:RM57L8XX:1";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config R5F.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
R5F.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config R5F.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
R5F.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config R5F.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
R5F.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config R5F.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
R5F.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config R5F.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
R5F.stdInclude = String "ti/targets/arm/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config R5F.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
R5F.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config R5F.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
R5F.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
R5F.archive() // module-wide
index URL

Create an archive

Configuration settings
R5F.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
R5F.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
R5F.asmName(String CName) returns String
R5F.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
R5F.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
R5F.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
R5F.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
R5F.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
R5F.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
R5F.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
R5F.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
R5F.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
R5F.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
R5F.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
R5F.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
R5F.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
R5F.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
R5F.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
R5F.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
R5F.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
R5F.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
R5F.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
R5F.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
R5F.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
R5F.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
R5F.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
R5F.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:13 GMT


package ti.targets.arm.rtsarm
index URL

Runtime support package for all Arm targets

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in ti/targets/arm/rtsarm/package.xdc
requires xdc.runtime;
package ti.targets.arm.rtsarm [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:21:14 GMT


module ti.targets.arm.rtsarm.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in ti/targets/arm/rtsarm/Settings.xdc
#include <ti/targets/arm/rtsarm/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in ti/targets/arm/rtsarm/Settings.xdc
var Settings = xdc.useModule('ti.targets.arm.rtsarm.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:21:14 GMT


package ti.targets.arp32.elf
index URL

Package of targets for TI code generation tools for ARP32

XDCspec declarations sourced in ti/targets/arp32/elf/package.xdc
requires xdc.bld;
package ti.targets.arp32.elf [1, 0, 0] {
    interface IARP32;
    // TI IARP32 interface (little endian)
    module ARP32;
    // TI ARP32 default runtime model (little endian)
    module ARP32_far;
    // TI ARP32 far runtime model (little endian)
}
generated on Sun, 25 Nov 2018 22:21:17 GMT


module ti.targets.arp32.elf.ARP32

metaonly module ti.targets.arp32.elf.ARP32
index URL

TI ARP32 default runtime model (little endian)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arp32/elf/ARP32.xdc
var ARP32 = xdc.useModule('ti.targets.arp32.elf.ARP32');
module-wide constants & types
    var obj = new ARP32.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new ARP32.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new ARP32.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new ARP32.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new ARP32.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new ARP32.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new ARP32.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new ARP32.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new ARP32.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new ARP32.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new ARP32.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new ARP32.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const ARP32.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const ARP32.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar-arp32",
        opts: "rq"
    };
    const ARP32.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl-arp32 -c --gen_func_subsections",
        opts: "--mem_model:data=far_aggregates --silicon_version=v210"
    };
    const ARP32.base// A target that this target is based upon = ITarget.Module computed value;
    const ARP32.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const ARP32.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl-arp32 -c --gen_func_subsections",
        opts: "--mem_model:data=far_aggregates --silicon_version=v210"
    };
    const ARP32.isa// CPU Instruction Set Architecture (ISA) = String "arp32";
    const ARP32.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl-arp32",
        opts: "-z"
    };
    const ARP32.model// Run-time model = ITarget.Model {
        endian: "little",
        dataModel: "far_aggregates",
        shortEnums: true
    };
    const ARP32.name// Nickname for this target = String "ARP32";
    const ARP32.os// Name of OS required to run programs built for this target = String computed value;
    const ARP32.rts// Name of a run-time support package to include = String "ti.targets.arp32.rts";
    const ARP32.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".rodata",
            "data"
        ]
    ];
    const ARP32.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".cio",
            true
        ]
    ];
    const ARP32.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const ARP32.suffix// Suffix appended to all objs, libraries, and executable = String "earp32";
    const ARP32.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl-arp32",
        opts: "--compiler_revision"
    };
     ARP32.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     ARP32.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     ARP32.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     ARP32.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     ARP32.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     ARP32.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     ARP32.execExt// Extension for executables = String undefined;
     ARP32.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     ARP32.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     ARP32.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     ARP32.pathPrefix// A prefix to the PATH environment variable = String "";
     ARP32.platform// The default platform name for this target = String "ti.platforms.simARP32";
     ARP32.platforms// A set of platforms that can support this target = String[] [ ];
     ARP32.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     ARP32.rawVersion// The raw version string from the compiler = String undefined;
     ARP32.rootDir// Installation directory for this target's code generation tools = String undefined;
     ARP32.stdInclude// Standard C/C++ types header = String "ti/targets/arp32/elf/std.h";
     ARP32.version// The Compatibility Key associated with this target = String undefined;
     ARP32.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ARP32.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     ARP32.asmName// The function that converts a C name into an assembly name(String CName) returns String
     ARP32.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     ARP32.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     ARP32.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     ARP32.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     ARP32.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     ARP32.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     ARP32.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     ARP32.getRawVersion// Get a target-specific raw compiler version string() returns String
     ARP32.getVersion// Get a target-specific Compatibility Key string() returns String
     ARP32.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     ARP32.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     ARP32.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct ARP32.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new ARP32.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct ARP32.Command
index URL

Required command and options

Configuration settings
var obj = new ARP32.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ARP32.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new ARP32.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ARP32.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new ARP32.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct ARP32.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new ARP32.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ARP32.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new ARP32.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ARP32.Extension
index URL

File extension to file type association

Configuration settings
var obj = new ARP32.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ARP32.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new ARP32.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct ARP32.Model
index URL

Target runtime model

Configuration settings
var obj = new ARP32.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ARP32.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new ARP32.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ARP32.Options
index URL

User configurable command options

Configuration settings
var obj = new ARP32.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ARP32.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new ARP32.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config ARP32.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const ARP32.alignDirectiveSupported = Bool true;
config ARP32.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const ARP32.ar = ITarget2.Command {
    cmd: "ar-arp32",
    opts: "rq"
};
config ARP32.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const ARP32.asm = ITarget2.Command {
    cmd: "cl-arp32 -c --gen_func_subsections",
    opts: "--mem_model:data=far_aggregates --silicon_version=v210"
};
config ARP32.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const ARP32.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ARP32.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const ARP32.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ARP32.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const ARP32.cc = ITarget2.Command {
    cmd: "cl-arp32 -c --gen_func_subsections",
    opts: "--mem_model:data=far_aggregates --silicon_version=v210"
};
config ARP32.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const ARP32.isa = String "arp32";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ARP32.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const ARP32.lnk = ITarget2.Command {
    cmd: "cl-arp32",
    opts: "-z"
};
config ARP32.model // module-wide
index URL

Run-time model

Configuration settings
const ARP32.model = ITarget.Model {
    endian: "little",
    dataModel: "far_aggregates",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ARP32.name // module-wide
index URL

Nickname for this target

Configuration settings
const ARP32.name = String "ARP32";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ARP32.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const ARP32.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ARP32.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const ARP32.rts = String "ti.targets.arp32.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ARP32.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const ARP32.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".rodata",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ARP32.splitMap // module-wide
index URL
Configuration settings
const ARP32.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".cio",
        true
    ]
];
config ARP32.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const ARP32.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ARP32.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const ARP32.suffix = String "earp32";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ARP32.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const ARP32.vers = ITarget2.Command {
    cmd: "cl-arp32",
    opts: "--compiler_revision"
};
config ARP32.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
ARP32.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config ARP32.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
ARP32.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config ARP32.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
ARP32.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config ARP32.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
ARP32.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ARP32.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
ARP32.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config ARP32.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
ARP32.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ARP32.execExt // module-wide
index URL

Extension for executables

Configuration settings
ARP32.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ARP32.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
ARP32.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config ARP32.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
ARP32.includeOpts = String "-I$(rootDir)/include";
config ARP32.lnkOpts // module-wide
index URL

Linker options

Configuration settings
ARP32.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config ARP32.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
ARP32.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config ARP32.platform // module-wide
index URL

The default platform name for this target

Configuration settings
ARP32.platform = String "ti.platforms.simARP32";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ARP32.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
ARP32.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ARP32.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
ARP32.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ARP32.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
ARP32.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ARP32.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
ARP32.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ARP32.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
ARP32.stdInclude = String "ti/targets/arp32/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ARP32.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
ARP32.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config ARP32.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
ARP32.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
ARP32.archive() // module-wide
index URL

Create an archive

Configuration settings
ARP32.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ARP32.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
ARP32.asmName(String CName) returns String
ARP32.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
ARP32.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ARP32.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
ARP32.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ARP32.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
ARP32.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ARP32.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
ARP32.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ARP32.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
ARP32.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ARP32.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
ARP32.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ARP32.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
ARP32.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ARP32.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
ARP32.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ARP32.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
ARP32.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ARP32.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
ARP32.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ARP32.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
ARP32.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ARP32.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
ARP32.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:17 GMT


module ti.targets.arp32.elf.ARP32_far

metaonly module ti.targets.arp32.elf.ARP32_far
index URL

TI ARP32 far runtime model (little endian)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/arp32/elf/ARP32_far.xdc
var ARP32_far = xdc.useModule('ti.targets.arp32.elf.ARP32_far');
module-wide constants & types
    var obj = new ARP32_far.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new ARP32_far.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new ARP32_far.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new ARP32_far.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new ARP32_far.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new ARP32_far.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new ARP32_far.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new ARP32_far.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new ARP32_far.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new ARP32_far.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new ARP32_far.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new ARP32_far.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const ARP32_far.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const ARP32_far.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar-arp32",
        opts: "rq"
    };
    const ARP32_far.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl-arp32 -c --gen_func_subsections",
        opts: "--mem_model:data=far --silicon_version=v210"
    };
    const ARP32_far.base// A target that this target is based upon = ITarget.Module computed value;
    const ARP32_far.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const ARP32_far.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl-arp32 -c --gen_func_subsections",
        opts: "--mem_model:data=far --silicon_version=v210"
    };
    const ARP32_far.isa// CPU Instruction Set Architecture (ISA) = String "arp32";
    const ARP32_far.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl-arp32",
        opts: "-z"
    };
    const ARP32_far.model// Run-time model = ITarget.Model {
        endian: "little",
        dataModel: "far",
        shortEnums: true
    };
    const ARP32_far.name// Nickname for this target = String "ARP32_far";
    const ARP32_far.os// Name of OS required to run programs built for this target = String computed value;
    const ARP32_far.rts// Name of a run-time support package to include = String "ti.targets.arp32.rts";
    const ARP32_far.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".rodata",
            "data"
        ]
    ];
    const ARP32_far.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".cio",
            true
        ]
    ];
    const ARP32_far.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const ARP32_far.suffix// Suffix appended to all objs, libraries, and executable = String "earp32F";
    const ARP32_far.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl-arp32",
        opts: "--compiler_revision"
    };
     ARP32_far.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     ARP32_far.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     ARP32_far.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     ARP32_far.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     ARP32_far.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     ARP32_far.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     ARP32_far.execExt// Extension for executables = String undefined;
     ARP32_far.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     ARP32_far.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     ARP32_far.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     ARP32_far.pathPrefix// A prefix to the PATH environment variable = String "";
     ARP32_far.platform// The default platform name for this target = String "ti.platforms.simARP32";
     ARP32_far.platforms// A set of platforms that can support this target = String[] [ ];
     ARP32_far.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
     ARP32_far.rawVersion// The raw version string from the compiler = String undefined;
     ARP32_far.rootDir// Installation directory for this target's code generation tools = String undefined;
     ARP32_far.stdInclude// Standard C/C++ types header = String "ti/targets/arp32/elf/std.h";
     ARP32_far.version// The Compatibility Key associated with this target = String undefined;
     ARP32_far.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ARP32_far.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     ARP32_far.asmName// The function that converts a C name into an assembly name(String CName) returns String
     ARP32_far.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     ARP32_far.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     ARP32_far.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     ARP32_far.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     ARP32_far.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     ARP32_far.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     ARP32_far.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     ARP32_far.getRawVersion// Get a target-specific raw compiler version string() returns String
     ARP32_far.getVersion// Get a target-specific Compatibility Key string() returns String
     ARP32_far.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     ARP32_far.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     ARP32_far.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct ARP32_far.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new ARP32_far.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct ARP32_far.Command
index URL

Required command and options

Configuration settings
var obj = new ARP32_far.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ARP32_far.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new ARP32_far.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ARP32_far.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new ARP32_far.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct ARP32_far.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new ARP32_far.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ARP32_far.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new ARP32_far.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ARP32_far.Extension
index URL

File extension to file type association

Configuration settings
var obj = new ARP32_far.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ARP32_far.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new ARP32_far.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct ARP32_far.Model
index URL

Target runtime model

Configuration settings
var obj = new ARP32_far.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ARP32_far.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new ARP32_far.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ARP32_far.Options
index URL

User configurable command options

Configuration settings
var obj = new ARP32_far.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ARP32_far.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new ARP32_far.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config ARP32_far.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const ARP32_far.alignDirectiveSupported = Bool true;
config ARP32_far.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const ARP32_far.ar = ITarget2.Command {
    cmd: "ar-arp32",
    opts: "rq"
};
config ARP32_far.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const ARP32_far.asm = ITarget2.Command {
    cmd: "cl-arp32 -c --gen_func_subsections",
    opts: "--mem_model:data=far --silicon_version=v210"
};
config ARP32_far.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const ARP32_far.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ARP32_far.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const ARP32_far.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ARP32_far.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const ARP32_far.cc = ITarget2.Command {
    cmd: "cl-arp32 -c --gen_func_subsections",
    opts: "--mem_model:data=far --silicon_version=v210"
};
config ARP32_far.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const ARP32_far.isa = String "arp32";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ARP32_far.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const ARP32_far.lnk = ITarget2.Command {
    cmd: "cl-arp32",
    opts: "-z"
};
config ARP32_far.model // module-wide
index URL

Run-time model

Configuration settings
const ARP32_far.model = ITarget.Model {
    endian: "little",
    dataModel: "far",
    shortEnums: true
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ARP32_far.name // module-wide
index URL

Nickname for this target

Configuration settings
const ARP32_far.name = String "ARP32_far";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ARP32_far.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const ARP32_far.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ARP32_far.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const ARP32_far.rts = String "ti.targets.arp32.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ARP32_far.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const ARP32_far.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".rodata",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ARP32_far.splitMap // module-wide
index URL
Configuration settings
const ARP32_far.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".cio",
        true
    ]
];
config ARP32_far.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const ARP32_far.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ARP32_far.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const ARP32_far.suffix = String "earp32F";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ARP32_far.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const ARP32_far.vers = ITarget2.Command {
    cmd: "cl-arp32",
    opts: "--compiler_revision"
};
config ARP32_far.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
ARP32_far.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config ARP32_far.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
ARP32_far.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config ARP32_far.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
ARP32_far.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config ARP32_far.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
ARP32_far.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ARP32_far.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
ARP32_far.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config ARP32_far.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
ARP32_far.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ARP32_far.execExt // module-wide
index URL

Extension for executables

Configuration settings
ARP32_far.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ARP32_far.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
ARP32_far.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config ARP32_far.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
ARP32_far.includeOpts = String "-I$(rootDir)/include";
config ARP32_far.lnkOpts // module-wide
index URL

Linker options

Configuration settings
ARP32_far.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config ARP32_far.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
ARP32_far.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config ARP32_far.platform // module-wide
index URL

The default platform name for this target

Configuration settings
ARP32_far.platform = String "ti.platforms.simARP32";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ARP32_far.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
ARP32_far.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ARP32_far.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
ARP32_far.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ARP32_far.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
ARP32_far.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ARP32_far.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
ARP32_far.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ARP32_far.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
ARP32_far.stdInclude = String "ti/targets/arp32/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ARP32_far.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
ARP32_far.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config ARP32_far.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
ARP32_far.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
ARP32_far.archive() // module-wide
index URL

Create an archive

Configuration settings
ARP32_far.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ARP32_far.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
ARP32_far.asmName(String CName) returns String
ARP32_far.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
ARP32_far.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ARP32_far.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
ARP32_far.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ARP32_far.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
ARP32_far.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ARP32_far.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
ARP32_far.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ARP32_far.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
ARP32_far.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ARP32_far.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
ARP32_far.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ARP32_far.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
ARP32_far.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ARP32_far.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
ARP32_far.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ARP32_far.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
ARP32_far.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ARP32_far.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
ARP32_far.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ARP32_far.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
ARP32_far.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ARP32_far.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
ARP32_far.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:17 GMT


interface ti.targets.arp32.elf.IARP32

metaonly interface ti.targets.arp32.elf.IARP32
index URL

TI IARP32 interface (little endian)

XDCspec summary sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly interface IARP32 { ...
// inherits ti.targets.ITarget
    // inherits xdc.bld.ITarget3
        // inherits xdc.bld.ITarget2
            // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
package ti.targets.arp32.elf;
metaonly interface IARP32 inherits ITarget {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "ar-arp32",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    override readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    override readonly config String isa// CPU Instruction Set Architecture (ISA) = "arp32";
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "cl-arp32",
        opts: "-z"
    };
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    override readonly config String rts// Name of a run-time support package to include = "ti.targets.arp32.rts";
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".rodata",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".cio",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 4
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 4
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 4
        },
        t_LLong: {
            size: 8,
            align: 4
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "cl-arp32",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    override config String platform// The default platform name for this target = "ti.platforms.simARP32";
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/arp32/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef IARP32.StringArray
index URL
XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
typedef String StringArray[];
struct IARP32.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct IARP32.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct IARP32.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct IARP32.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct IARP32.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct IARP32.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct IARP32.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct IARP32.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct IARP32.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct IARP32.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct IARP32.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct IARP32.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config IARP32.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config Bool alignDirectiveSupported = true;
config IARP32.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config ITarget2.Command ar = {
    cmd: "ar-arp32",
    opts: "rq"
};
config IARP32.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
readonly config ITarget2.Command asm;
config IARP32.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config IARP32.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config IARP32.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
readonly config ITarget2.Command cc;
config IARP32.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config String isa = "arp32";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config IARP32.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "cl-arp32",
    opts: "-z"
};
config IARP32.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config IARP32.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config IARP32.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config IARP32.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config String rts = "ti.targets.arp32.rts";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config IARP32.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".rodata",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config IARP32.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".cio",
        true
    ]
];
config IARP32.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 4
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 4
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 4
    },
    t_LLong: {
        size: 8,
        align: 4
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config IARP32.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config IARP32.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override readonly config ITarget2.Command vers = {
    cmd: "cl-arp32",
    opts: "--compiler_revision"
};
config IARP32.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config IARP32.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config IARP32.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config IARP32.ccConfigOpts // module-wide
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User configurable compiler options for the generated config C file

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config IARP32.ccOpts // module-wide
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User configurable compiler options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config IARP32.compatibleSuffixes // module-wide
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Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config IARP32.execExt // module-wide
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Extension for executables

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config IARP32.extensions // module-wide
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File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config IARP32.includeOpts // module-wide
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Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config String includeOpts = "-I$(rootDir)/include";
config IARP32.lnkOpts // module-wide
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Linker options

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config IARP32.pathPrefix // module-wide
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A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config IARP32.platform // module-wide
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The default platform name for this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config String platform = "ti.platforms.simARP32";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config IARP32.platforms // module-wide
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A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config IARP32.profiles // module-wide
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Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "--symdebug:dwarf"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config IARP32.rawVersion // module-wide
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The raw version string from the compiler

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config IARP32.rootDir // module-wide
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Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config IARP32.stdInclude // module-wide
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Standard C/C++ types header

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config String stdInclude = "ti/targets/arp32/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config IARP32.version // module-wide
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The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config IARP32.versionMap // module-wide
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Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
IARP32.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IARP32.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String asmName(String CName);
IARP32.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IARP32.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
IARP32.genConstCustom() // module-wide
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Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IARP32.genVisibleData() // module-wide
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Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
IARP32.genVisibleFxns() // module-wide
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Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
IARP32.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
IARP32.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
IARP32.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
IARP32.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
IARP32.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
IARP32.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
IARP32.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/arp32/elf/IARP32.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:16 GMT


package ti.targets.arp32.rts
index URL

Runtime support package for the arp32 targets

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in ti/targets/arp32/rts/package.xdc
requires xdc.runtime;
package ti.targets.arp32.rts [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:21:17 GMT


module ti.targets.arp32.rts.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in ti/targets/arp32/rts/Settings.xdc
#include <ti/targets/arp32/rts/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in ti/targets/arp32/rts/Settings.xdc
var Settings = xdc.useModule('ti.targets.arp32.rts.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:21:17 GMT


package ti.targets.elf
index URL

Package of targets for TI code generation tools for ELF

XDCspec declarations sourced in ti/targets/elf/package.xdc
requires xdc.bld;
package ti.targets.elf [1, 0, 0] {
    interface ITarget;
    // An ELF extension to the ti.targets.ITarget interface
    module C66;
    // TI C66 little endian (ELF)
    module C66_big_endian;
    // TI C66 big endian (ELF)
    module C674;
    // TI C674 little endian (ELF)
    module C674_big_endian;
    // TI C674 big endian (ELF)
}
generated on Sun, 25 Nov 2018 22:21:19 GMT


module ti.targets.elf.C66

metaonly module ti.targets.elf.C66
index URL

TI C66 little endian (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/elf/C66.xdc
var C66 = xdc.useModule('ti.targets.elf.C66');
module-wide constants & types
    var obj = new C66.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C66.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C66.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C66.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C66.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C66.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C66.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C66.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C66.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C66.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C66.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C66.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C66.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C66.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C66.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6600 --abi=eabi"
    };
    const C66.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C66.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C66.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6600 --abi=eabi"
    };
    const C66.isa// CPU Instruction Set Architecture (ISA) = String "66";
    const C66.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "--abi=eabi -z"
    };
    const C66.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: false
    };
    const C66.name// Nickname for this target = String "C66";
    const C66.os// Name of OS required to run programs built for this target = String computed value;
    const C66.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C66.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".ti.decompress",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".pinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ti.handler_table",
            "data"
        ],
        [
            ".c6xabi.exidx",
            "data"
        ],
        [
            ".c6xabi.extab",
            "data"
        ]
    ];
    const C66.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".pinit",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".c6xabi.extab",
            true
        ]
    ];
    const C66.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const C66.suffix// Suffix appended to all objs, libraries, and executable = String "e66";
    const C66.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C66.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C66.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C66.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C66.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
     C66.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C66.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "e674",
        "e64P"
    ];
     C66.execExt// Extension for executables = String undefined;
     C66.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C66.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C66.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C66.pathPrefix// A prefix to the PATH environment variable = String "";
     C66.platform// The default platform name for this target = String "ti.platforms.simTCI6616";
     C66.platforms// A set of platforms that can support this target = String[] [ ];
     C66.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C66.rawVersion// The raw version string from the compiler = String undefined;
     C66.rootDir// Installation directory for this target's code generation tools = String undefined;
     C66.stdInclude// Standard C/C++ types header = String "ti/targets/elf/std.h";
     C66.version// The Compatibility Key associated with this target = String undefined;
     C66.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C66.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C66.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C66.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C66.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C66.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C66.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C66.getRawVersion// Get a target-specific raw compiler version string() returns String
     C66.getVersion// Get a target-specific Compatibility Key string() returns String
     C66.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C66.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C66.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C66.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C66.Command
index URL

Required command and options

Configuration settings
var obj = new C66.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C66.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C66.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C66.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C66.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C66.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C66.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C66.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C66.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C66.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C66.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C66.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C66.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C66.Model
index URL

Target runtime model

Configuration settings
var obj = new C66.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C66.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C66.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C66.Options
index URL

User configurable command options

Configuration settings
var obj = new C66.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C66.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C66.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C66.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C66.alignDirectiveSupported = Bool true;
config C66.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C66.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C66.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C66.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6600 --abi=eabi"
};
config C66.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C66.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C66.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C66.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C66.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C66.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6600 --abi=eabi"
};
config C66.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C66.isa = String "66";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C66.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C66.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "--abi=eabi -z"
};
config C66.model // module-wide
index URL

Run-time model

Configuration settings
const C66.model = ITarget.Model {
    endian: "little",
    shortEnums: false
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C66.name // module-wide
index URL

Nickname for this target

Configuration settings
const C66.name = String "C66";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C66.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C66.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C66.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C66.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C66.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C66.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".ti.decompress",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".pinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ti.handler_table",
        "data"
    ],
    [
        ".c6xabi.exidx",
        "data"
    ],
    [
        ".c6xabi.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C66.splitMap // module-wide
index URL
Configuration settings
const C66.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".pinit",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".c6xabi.extab",
        true
    ]
];
config C66.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C66.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C66.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C66.suffix = String "e66";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C66.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C66.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C66.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C66.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C66.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C66.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C66.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C66.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C66.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C66.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C66.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C66.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C66.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C66.compatibleSuffixes = String[] [
    "e674",
    "e64P"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C66.execExt // module-wide
index URL

Extension for executables

Configuration settings
C66.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C66.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C66.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C66.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C66.includeOpts = String "-I$(rootDir)/include";
config C66.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C66.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C66.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C66.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C66.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C66.platform = String "ti.platforms.simTCI6616";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C66.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C66.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C66.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C66.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C66.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C66.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C66.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C66.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C66.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
C66.stdInclude = String "ti/targets/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C66.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C66.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C66.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C66.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C66.archive() // module-wide
index URL

Create an archive

Configuration settings
C66.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C66.asmName(String CName) returns String
C66.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C66.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C66.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C66.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C66.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C66.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C66.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C66.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C66.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C66.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C66.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C66.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C66.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C66.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C66.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C66.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C66.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C66.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C66.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C66.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:18 GMT


module ti.targets.elf.C66_big_endian

metaonly module ti.targets.elf.C66_big_endian
index URL

TI C66 big endian (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/elf/C66_big_endian.xdc
var C66_big_endian = xdc.useModule('ti.targets.elf.C66_big_endian');
module-wide constants & types
    var obj = new C66_big_endian.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C66_big_endian.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C66_big_endian.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C66_big_endian.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C66_big_endian.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C66_big_endian.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C66_big_endian.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C66_big_endian.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C66_big_endian.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C66_big_endian.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C66_big_endian.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C66_big_endian.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C66_big_endian.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C66_big_endian.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C66_big_endian.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-me -mv6600 --abi=eabi"
    };
    const C66_big_endian.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C66_big_endian.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C66_big_endian.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-me -mv6600 --abi=eabi"
    };
    const C66_big_endian.isa// CPU Instruction Set Architecture (ISA) = String "66";
    const C66_big_endian.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "--abi=eabi -z"
    };
    const C66_big_endian.model// Run-time model = ITarget.Model {
        endian: "big",
        shortEnums: false
    };
    const C66_big_endian.name// Nickname for this target = String "C66_big_endian";
    const C66_big_endian.os// Name of OS required to run programs built for this target = String computed value;
    const C66_big_endian.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C66_big_endian.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".ti.decompress",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".pinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ti.handler_table",
            "data"
        ],
        [
            ".c6xabi.exidx",
            "data"
        ],
        [
            ".c6xabi.extab",
            "data"
        ]
    ];
    const C66_big_endian.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".pinit",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".c6xabi.extab",
            true
        ]
    ];
    const C66_big_endian.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const C66_big_endian.suffix// Suffix appended to all objs, libraries, and executable = String "e66e";
    const C66_big_endian.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C66_big_endian.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C66_big_endian.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C66_big_endian.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C66_big_endian.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
     C66_big_endian.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C66_big_endian.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "e674e",
        "e64Pe"
    ];
     C66_big_endian.execExt// Extension for executables = String undefined;
     C66_big_endian.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C66_big_endian.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C66_big_endian.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C66_big_endian.pathPrefix// A prefix to the PATH environment variable = String "";
     C66_big_endian.platform// The default platform name for this target = String "ti.platforms.simTCI6616";
     C66_big_endian.platforms// A set of platforms that can support this target = String[] [ ];
     C66_big_endian.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C66_big_endian.rawVersion// The raw version string from the compiler = String undefined;
     C66_big_endian.rootDir// Installation directory for this target's code generation tools = String undefined;
     C66_big_endian.stdInclude// Standard C/C++ types header = String "ti/targets/elf/std.h";
     C66_big_endian.version// The Compatibility Key associated with this target = String undefined;
     C66_big_endian.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C66_big_endian.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C66_big_endian.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C66_big_endian.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C66_big_endian.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C66_big_endian.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66_big_endian.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C66_big_endian.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C66_big_endian.getRawVersion// Get a target-specific raw compiler version string() returns String
     C66_big_endian.getVersion// Get a target-specific Compatibility Key string() returns String
     C66_big_endian.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C66_big_endian.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C66_big_endian.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C66_big_endian.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C66_big_endian.Command
index URL

Required command and options

Configuration settings
var obj = new C66_big_endian.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C66_big_endian.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C66_big_endian.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C66_big_endian.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C66_big_endian.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C66_big_endian.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C66_big_endian.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C66_big_endian.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C66_big_endian.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C66_big_endian.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C66_big_endian.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C66_big_endian.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C66_big_endian.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C66_big_endian.Model
index URL

Target runtime model

Configuration settings
var obj = new C66_big_endian.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C66_big_endian.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C66_big_endian.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C66_big_endian.Options
index URL

User configurable command options

Configuration settings
var obj = new C66_big_endian.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C66_big_endian.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C66_big_endian.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C66_big_endian.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C66_big_endian.alignDirectiveSupported = Bool true;
config C66_big_endian.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C66_big_endian.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C66_big_endian.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C66_big_endian.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-me -mv6600 --abi=eabi"
};
config C66_big_endian.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C66_big_endian.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C66_big_endian.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C66_big_endian.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C66_big_endian.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C66_big_endian.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-me -mv6600 --abi=eabi"
};
config C66_big_endian.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C66_big_endian.isa = String "66";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C66_big_endian.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C66_big_endian.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "--abi=eabi -z"
};
config C66_big_endian.model // module-wide
index URL

Run-time model

Configuration settings
const C66_big_endian.model = ITarget.Model {
    endian: "big",
    shortEnums: false
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C66_big_endian.name // module-wide
index URL

Nickname for this target

Configuration settings
const C66_big_endian.name = String "C66_big_endian";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C66_big_endian.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C66_big_endian.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C66_big_endian.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C66_big_endian.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C66_big_endian.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C66_big_endian.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".ti.decompress",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".pinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ti.handler_table",
        "data"
    ],
    [
        ".c6xabi.exidx",
        "data"
    ],
    [
        ".c6xabi.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C66_big_endian.splitMap // module-wide
index URL
Configuration settings
const C66_big_endian.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".pinit",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".c6xabi.extab",
        true
    ]
];
config C66_big_endian.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C66_big_endian.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C66_big_endian.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C66_big_endian.suffix = String "e66e";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C66_big_endian.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C66_big_endian.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C66_big_endian.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C66_big_endian.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C66_big_endian.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C66_big_endian.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C66_big_endian.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C66_big_endian.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C66_big_endian.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C66_big_endian.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C66_big_endian.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C66_big_endian.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C66_big_endian.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C66_big_endian.compatibleSuffixes = String[] [
    "e674e",
    "e64Pe"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C66_big_endian.execExt // module-wide
index URL

Extension for executables

Configuration settings
C66_big_endian.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C66_big_endian.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C66_big_endian.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C66_big_endian.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C66_big_endian.includeOpts = String "-I$(rootDir)/include";
config C66_big_endian.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C66_big_endian.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C66_big_endian.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C66_big_endian.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C66_big_endian.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C66_big_endian.platform = String "ti.platforms.simTCI6616";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C66_big_endian.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C66_big_endian.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C66_big_endian.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C66_big_endian.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C66_big_endian.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C66_big_endian.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C66_big_endian.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C66_big_endian.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C66_big_endian.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
C66_big_endian.stdInclude = String "ti/targets/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C66_big_endian.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C66_big_endian.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C66_big_endian.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C66_big_endian.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C66_big_endian.archive() // module-wide
index URL

Create an archive

Configuration settings
C66_big_endian.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C66_big_endian.asmName(String CName) returns String
C66_big_endian.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C66_big_endian.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C66_big_endian.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C66_big_endian.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C66_big_endian.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66_big_endian.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C66_big_endian.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C66_big_endian.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C66_big_endian.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C66_big_endian.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C66_big_endian.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C66_big_endian.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C66_big_endian.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C66_big_endian.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C66_big_endian.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C66_big_endian.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C66_big_endian.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C66_big_endian.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C66_big_endian.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:19 GMT


module ti.targets.elf.C674

metaonly module ti.targets.elf.C674
index URL

TI C674 little endian (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/elf/C674.xdc
var C674 = xdc.useModule('ti.targets.elf.C674');
module-wide constants & types
    var obj = new C674.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C674.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C674.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C674.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C674.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C674.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C674.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C674.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C674.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C674.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C674.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C674.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C674.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C674.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C674.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6740 --abi=eabi"
    };
    const C674.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C674.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C674.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-mv6740 --abi=eabi"
    };
    const C674.isa// CPU Instruction Set Architecture (ISA) = String "674";
    const C674.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "--abi=eabi -z"
    };
    const C674.model// Run-time model = ITarget.Model {
        endian: "little",
        shortEnums: false
    };
    const C674.name// Nickname for this target = String "C674";
    const C674.os// Name of OS required to run programs built for this target = String computed value;
    const C674.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C674.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".ti.decompress",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".pinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ti.handler_table",
            "data"
        ],
        [
            ".c6xabi.exidx",
            "data"
        ],
        [
            ".c6xabi.extab",
            "data"
        ]
    ];
    const C674.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".pinit",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".c6xabi.extab",
            true
        ]
    ];
    const C674.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const C674.suffix// Suffix appended to all objs, libraries, and executable = String "e674";
    const C674.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C674.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C674.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C674.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C674.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
     C674.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C674.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "e64P"
    ];
     C674.execExt// Extension for executables = String undefined;
     C674.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C674.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C674.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C674.pathPrefix// A prefix to the PATH environment variable = String "";
     C674.platform// The default platform name for this target = String "ti.platforms.evmDA830";
     C674.platforms// A set of platforms that can support this target = String[] [ ];
     C674.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C674.rawVersion// The raw version string from the compiler = String undefined;
     C674.rootDir// Installation directory for this target's code generation tools = String undefined;
     C674.stdInclude// Standard C/C++ types header = String "ti/targets/elf/std.h";
     C674.version// The Compatibility Key associated with this target = String undefined;
     C674.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C674.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C674.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C674.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C674.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C674.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C674.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C674.getRawVersion// Get a target-specific raw compiler version string() returns String
     C674.getVersion// Get a target-specific Compatibility Key string() returns String
     C674.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C674.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C674.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C674.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C674.Command
index URL

Required command and options

Configuration settings
var obj = new C674.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C674.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C674.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C674.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C674.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C674.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C674.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C674.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C674.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C674.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C674.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C674.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C674.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C674.Model
index URL

Target runtime model

Configuration settings
var obj = new C674.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C674.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C674.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C674.Options
index URL

User configurable command options

Configuration settings
var obj = new C674.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C674.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C674.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C674.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C674.alignDirectiveSupported = Bool true;
config C674.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C674.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C674.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C674.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6740 --abi=eabi"
};
config C674.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C674.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C674.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C674.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C674.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C674.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-mv6740 --abi=eabi"
};
config C674.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C674.isa = String "674";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C674.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C674.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "--abi=eabi -z"
};
config C674.model // module-wide
index URL

Run-time model

Configuration settings
const C674.model = ITarget.Model {
    endian: "little",
    shortEnums: false
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C674.name // module-wide
index URL

Nickname for this target

Configuration settings
const C674.name = String "C674";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C674.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C674.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C674.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C674.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C674.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C674.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".ti.decompress",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".pinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ti.handler_table",
        "data"
    ],
    [
        ".c6xabi.exidx",
        "data"
    ],
    [
        ".c6xabi.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C674.splitMap // module-wide
index URL
Configuration settings
const C674.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".pinit",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".c6xabi.extab",
        true
    ]
];
config C674.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C674.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C674.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C674.suffix = String "e674";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C674.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C674.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C674.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C674.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C674.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C674.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C674.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C674.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C674.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C674.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C674.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C674.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C674.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C674.compatibleSuffixes = String[] [
    "e64P"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C674.execExt // module-wide
index URL

Extension for executables

Configuration settings
C674.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C674.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C674.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C674.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C674.includeOpts = String "-I$(rootDir)/include";
config C674.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C674.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C674.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C674.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C674.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C674.platform = String "ti.platforms.evmDA830";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C674.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C674.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C674.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C674.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C674.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C674.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C674.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C674.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C674.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
C674.stdInclude = String "ti/targets/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C674.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C674.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C674.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C674.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C674.archive() // module-wide
index URL

Create an archive

Configuration settings
C674.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C674.asmName(String CName) returns String
C674.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C674.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C674.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C674.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C674.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C674.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C674.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C674.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C674.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C674.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C674.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C674.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C674.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C674.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C674.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C674.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C674.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C674.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C674.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C674.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:19 GMT


module ti.targets.elf.C674_big_endian

metaonly module ti.targets.elf.C674_big_endian
index URL

TI C674 big endian (ELF)

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/elf/C674_big_endian.xdc
var C674_big_endian = xdc.useModule('ti.targets.elf.C674_big_endian');
module-wide constants & types
    var obj = new C674_big_endian.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new C674_big_endian.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new C674_big_endian.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new C674_big_endian.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new C674_big_endian.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new C674_big_endian.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new C674_big_endian.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new C674_big_endian.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new C674_big_endian.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new C674_big_endian.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new C674_big_endian.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new C674_big_endian.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const C674_big_endian.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const C674_big_endian.ar// The command used to create an archive = ITarget2.Command {
        cmd: "ar6x",
        opts: "rq"
    };
    const C674_big_endian.asm// The command used to assembles assembly source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-me -mv6740 --abi=eabi"
    };
    const C674_big_endian.base// A target that this target is based upon = ITarget.Module C64P.module;
    const C674_big_endian.bitsPerChar// The number of bits in a variable of type char = Int C64P.bitsPerChar;
    const C674_big_endian.cc// The command used to compile C/C++ source files into object files = ITarget2.Command {
        cmd: "cl6x -c",
        opts: "-me -mv6740 --abi=eabi"
    };
    const C674_big_endian.isa// CPU Instruction Set Architecture (ISA) = String "674";
    const C674_big_endian.lnk// The command used to link executables = ITarget2.Command {
        cmd: "cl6x",
        opts: "--abi=eabi -z"
    };
    const C674_big_endian.model// Run-time model = ITarget.Model {
        endian: "big",
        shortEnums: false
    };
    const C674_big_endian.name// Nickname for this target = String "C674_big_endian";
    const C674_big_endian.os// Name of OS required to run programs built for this target = String computed value;
    const C674_big_endian.rts// Name of a run-time support package to include = String "ti.targets.rts6000";
    const C674_big_endian.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".ti.decompress",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".pinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ti.handler_table",
            "data"
        ],
        [
            ".c6xabi.exidx",
            "data"
        ],
        [
            ".c6xabi.extab",
            "data"
        ]
    ];
    const C674_big_endian.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".pinit",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".c6xabi.extab",
            true
        ]
    ];
    const C674_big_endian.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    const C674_big_endian.suffix// Suffix appended to all objs, libraries, and executable = String "e674e";
    const C674_big_endian.vers// The command used to get the tool-chain to return a version number = ITarget2.Command {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
     C674_big_endian.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     C674_big_endian.asmOpts// User configurable assembler options = ITarget2.Options {
        prefix: "-qq",
        suffix: ""
    };
     C674_big_endian.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     C674_big_endian.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget2.Options {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
     C674_big_endian.ccOpts// User configurable compiler options = ITarget2.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     C674_big_endian.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] [
        "e64Pe"
    ];
     C674_big_endian.execExt// Extension for executables = String undefined;
     C674_big_endian.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     C674_big_endian.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include";
     C674_big_endian.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     C674_big_endian.pathPrefix// A prefix to the PATH environment variable = String "";
     C674_big_endian.platform// The default platform name for this target = String "ti.platforms.evmDA830";
     C674_big_endian.platforms// A set of platforms that can support this target = String[] [ ];
     C674_big_endian.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
     C674_big_endian.rawVersion// The raw version string from the compiler = String undefined;
     C674_big_endian.rootDir// Installation directory for this target's code generation tools = String undefined;
     C674_big_endian.stdInclude// Standard C/C++ types header = String "ti/targets/elf/std.h";
     C674_big_endian.version// The Compatibility Key associated with this target = String undefined;
     C674_big_endian.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     C674_big_endian.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.asmName// The function that converts a C name into an assembly name(String CName) returns String
     C674_big_endian.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     C674_big_endian.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     C674_big_endian.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     C674_big_endian.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674_big_endian.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     C674_big_endian.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     C674_big_endian.getRawVersion// Get a target-specific raw compiler version string() returns String
     C674_big_endian.getVersion// Get a target-specific Compatibility Key string() returns String
     C674_big_endian.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     C674_big_endian.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct C674_big_endian.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new C674_big_endian.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct C674_big_endian.Command
index URL

Required command and options

Configuration settings
var obj = new C674_big_endian.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct C674_big_endian.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new C674_big_endian.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct C674_big_endian.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new C674_big_endian.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct C674_big_endian.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new C674_big_endian.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct C674_big_endian.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new C674_big_endian.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct C674_big_endian.Extension
index URL

File extension to file type association

Configuration settings
var obj = new C674_big_endian.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct C674_big_endian.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new C674_big_endian.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct C674_big_endian.Model
index URL

Target runtime model

Configuration settings
var obj = new C674_big_endian.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct C674_big_endian.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new C674_big_endian.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct C674_big_endian.Options
index URL

User configurable command options

Configuration settings
var obj = new C674_big_endian.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct C674_big_endian.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new C674_big_endian.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config C674_big_endian.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const C674_big_endian.alignDirectiveSupported = Bool true;
config C674_big_endian.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const C674_big_endian.ar = ITarget2.Command {
    cmd: "ar6x",
    opts: "rq"
};
config C674_big_endian.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const C674_big_endian.asm = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-me -mv6740 --abi=eabi"
};
config C674_big_endian.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const C674_big_endian.base = ITarget.Module C64P.module;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config C674_big_endian.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const C674_big_endian.bitsPerChar = Int C64P.bitsPerChar;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config C674_big_endian.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const C674_big_endian.cc = ITarget2.Command {
    cmd: "cl6x -c",
    opts: "-me -mv6740 --abi=eabi"
};
config C674_big_endian.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const C674_big_endian.isa = String "674";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config C674_big_endian.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const C674_big_endian.lnk = ITarget2.Command {
    cmd: "cl6x",
    opts: "--abi=eabi -z"
};
config C674_big_endian.model // module-wide
index URL

Run-time model

Configuration settings
const C674_big_endian.model = ITarget.Model {
    endian: "big",
    shortEnums: false
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config C674_big_endian.name // module-wide
index URL

Nickname for this target

Configuration settings
const C674_big_endian.name = String "C674_big_endian";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config C674_big_endian.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const C674_big_endian.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config C674_big_endian.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const C674_big_endian.rts = String "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config C674_big_endian.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const C674_big_endian.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".ti.decompress",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".pinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ti.handler_table",
        "data"
    ],
    [
        ".c6xabi.exidx",
        "data"
    ],
    [
        ".c6xabi.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config C674_big_endian.splitMap // module-wide
index URL
Configuration settings
const C674_big_endian.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".pinit",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".c6xabi.extab",
        true
    ]
];
config C674_big_endian.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const C674_big_endian.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config C674_big_endian.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const C674_big_endian.suffix = String "e674e";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config C674_big_endian.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const C674_big_endian.vers = ITarget2.Command {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config C674_big_endian.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
C674_big_endian.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config C674_big_endian.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
C674_big_endian.asmOpts = ITarget2.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config C674_big_endian.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
C674_big_endian.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config C674_big_endian.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
C674_big_endian.ccConfigOpts = ITarget2.Options {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config C674_big_endian.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
C674_big_endian.ccOpts = ITarget2.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config C674_big_endian.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
C674_big_endian.compatibleSuffixes = String[] [
    "e64Pe"
];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config C674_big_endian.execExt // module-wide
index URL

Extension for executables

Configuration settings
C674_big_endian.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config C674_big_endian.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
C674_big_endian.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config C674_big_endian.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
C674_big_endian.includeOpts = String "-I$(rootDir)/include";
config C674_big_endian.lnkOpts // module-wide
index URL

Linker options

Configuration settings
C674_big_endian.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config C674_big_endian.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
C674_big_endian.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config C674_big_endian.platform // module-wide
index URL

The default platform name for this target

Configuration settings
C674_big_endian.platform = String "ti.platforms.evmDA830";
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config C674_big_endian.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
C674_big_endian.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config C674_big_endian.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
C674_big_endian.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config C674_big_endian.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
C674_big_endian.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config C674_big_endian.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
C674_big_endian.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config C674_big_endian.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
C674_big_endian.stdInclude = String "ti/targets/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config C674_big_endian.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
C674_big_endian.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config C674_big_endian.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
C674_big_endian.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
C674_big_endian.archive() // module-wide
index URL

Create an archive

Configuration settings
C674_big_endian.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
C674_big_endian.asmName(String CName) returns String
C674_big_endian.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
C674_big_endian.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
C674_big_endian.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
C674_big_endian.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
C674_big_endian.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674_big_endian.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
C674_big_endian.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
C674_big_endian.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
C674_big_endian.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
C674_big_endian.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
C674_big_endian.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
C674_big_endian.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
C674_big_endian.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
C674_big_endian.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
C674_big_endian.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
C674_big_endian.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
C674_big_endian.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
C674_big_endian.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
C674_big_endian.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:19 GMT


interface ti.targets.elf.ITarget

metaonly interface ti.targets.elf.ITarget
index URL

An ELF extension to the ti.targets.ITarget interface

XDCspec summary sourced in ti/targets/elf/ITarget.xdc
metaonly interface ITarget { ...
// inherits ti.targets.ITarget
    // inherits xdc.bld.ITarget3
        // inherits xdc.bld.ITarget2
            // inherits xdc.bld.ITarget
XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
package ti.targets.elf;
metaonly interface ITarget inherits ITarget {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    override readonly config Bool alignDirectiveSupported// The compiler supports an align directive = true;
    override readonly config ITarget2.Command ar// The command used to create an archive = {
        cmd: "ar6x",
        opts: "rq"
    };
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    override readonly config ITarget2.Command lnk// The command used to link executables = {
        cmd: "cl6x",
        opts: "--abi=eabi -z"
    };
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    override readonly config String rts// Name of a run-time support package to include = "ti.targets.rts6000";
    override readonly config String sectMap// Output section name to segment type mapping[string] = [
        [
            ".text",
            "code"
        ],
        [
            ".ti.decompress",
            "code"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".cinit",
            "data"
        ],
        [
            ".pinit",
            "data"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".const",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".rodata",
            "data"
        ],
        [
            ".neardata",
            "data"
        ],
        [
            ".fardata",
            "data"
        ],
        [
            ".switch",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".far",
            "data"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".ti.handler_table",
            "data"
        ],
        [
            ".c6xabi.exidx",
            "data"
        ],
        [
            ".c6xabi.extab",
            "data"
        ]
    ];
    override readonly config Bool splitMap// [string] = [
        [
            ".text",
            true
        ],
        [
            ".pinit",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".fardata",
            true
        ],
        [
            ".switch",
            true
        ],
        [
            ".far",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ],
        [
            ".c6xabi.extab",
            true
        ]
    ];
    override readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 4,
            align: 4
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 8
        },
        t_Float: {
            size: 4,
            align: 4
        },
        t_Fxn: {
            size: 4,
            align: 4
        },
        t_Int: {
            size: 4,
            align: 4
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 4
        },
        t_Int64: {
            size: 8,
            align: 8
        },
        t_Long: {
            size: 4,
            align: 4
        },
        t_LDouble: {
            size: 8,
            align: 8
        },
        t_LLong: {
            size: 8,
            align: 8
        },
        t_Ptr: {
            size: 4,
            align: 4
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 4,
            align: 4
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    override readonly config ITarget2.Command vers// The command used to get the tool-chain to return a version number = {
        cmd: "cl6x",
        opts: "--compiler_revision"
    };
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    override config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "-qq",
        suffix: ""
    };
    config String binDir// This parameter controls the location of the target's commands = "$(rootDir)/bin/";
    override config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix) -mo",
        suffix: "$(ccOpts.suffix)"
    };
    override config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config String execExt// Extension for executables;
    override config ITarget.Extension extensions// File extensions recognized by TI targets[string] = ITarget.extensions;
    override config String includeOpts// Additional user configurable target-specific include path options = "-I$(rootDir)/include";
    override config ITarget2.Options lnkOpts// Linker options = {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
    config String pathPrefix// A prefix to the PATH environment variable = "";
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    override config ITarget.OptionSet profiles// Standard options profiles for the TI tool-chain[string] = [
        [
            "debug",
            {
                compileOpts: {
                    copts: "--symdebug:dwarf",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2"
                }
            }
        ]
    ];
    override config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    override config String stdInclude// Standard C/C++ types header = "ti/targets/elf/std.h";
    override config String version// The Compatibility Key associated with this target;
    override config String versionMap// Map of TI compiler version numbers to compatibility keys[string] = [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
    String asmName// The function that converts a C name into an assembly name(String CName);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.Command
index URL

Required command and options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.Options
index URL

User configurable command options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config Bool alignDirectiveSupported = true;
config ITarget.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config ITarget2.Command ar = {
    cmd: "ar6x",
    opts: "rq"
};
config ITarget.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config ITarget2.Command asm;
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config ITarget2.Command cc;
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config ITarget2.Command lnk = {
    cmd: "cl6x",
    opts: "--abi=eabi -z"
};
config ITarget.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config String rts = "ti.targets.rts6000";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config String sectMap[string] = [
    [
        ".text",
        "code"
    ],
    [
        ".ti.decompress",
        "code"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".cinit",
        "data"
    ],
    [
        ".pinit",
        "data"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".const",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".rodata",
        "data"
    ],
    [
        ".neardata",
        "data"
    ],
    [
        ".fardata",
        "data"
    ],
    [
        ".switch",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".far",
        "data"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".ti.handler_table",
        "data"
    ],
    [
        ".c6xabi.exidx",
        "data"
    ],
    [
        ".c6xabi.extab",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.splitMap // module-wide
index URL
XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config Bool splitMap[string] = [
    [
        ".text",
        true
    ],
    [
        ".pinit",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".fardata",
        true
    ],
    [
        ".switch",
        true
    ],
    [
        ".far",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ],
    [
        ".c6xabi.extab",
        true
    ]
];
config ITarget.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 4,
        align: 4
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 8
    },
    t_Float: {
        size: 4,
        align: 4
    },
    t_Fxn: {
        size: 4,
        align: 4
    },
    t_Int: {
        size: 4,
        align: 4
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 4
    },
    t_Int64: {
        size: 8,
        align: 8
    },
    t_Long: {
        size: 4,
        align: 4
    },
    t_LDouble: {
        size: 8,
        align: 8
    },
    t_LLong: {
        size: 8,
        align: 8
    },
    t_Ptr: {
        size: 4,
        align: 4
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 4,
        align: 4
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override readonly config ITarget2.Command vers = {
    cmd: "cl6x",
    opts: "--compiler_revision"
};
config ITarget.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config ITarget2.Options asmOpts = {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config ITarget.binDir // module-wide
index URL

This parameter controls the location of the target's commands

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config String binDir = "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config ITarget.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix) -mo",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
-mo places all functions into subsections --no_compress helps with compile time with no real difference in code size since the generated config.c is mostly data and small function stubs.
config ITarget.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config ITarget2.Options ccOpts = {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

File extensions recognized by TI targets

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config ITarget.Extension extensions[string] = ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config ITarget.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config String includeOpts = "-I$(rootDir)/include";
config ITarget.lnkOpts // module-wide
index URL

Linker options

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config ITarget2.Options lnkOpts = {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config ITarget.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config String pathPrefix = "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config ITarget.OptionSet profiles[string] = [
    [
        "debug",
        {
            compileOpts: {
                copts: "--symdebug:dwarf",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config String stdInclude = "ti/targets/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config String version;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config ITarget.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
override config String versionMap[string] = [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String asmName(String CName);
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in ti/targets/elf/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:18 GMT


package ti.targets.msp430
index URL

Package of targets for MSP430 code generation tools

XDCspec declarations sourced in ti/targets/msp430/package.xdc
requires xdc.bld[1, 0, 2];
package ti.targets.msp430 [1, 0, 0] {
    module MSP430;
    // MSP430 small code, small data model, little endian
    module MSP430X;
    // MSP430X large code, restricted data model, little endian
}
generated on Sun, 25 Nov 2018 22:21:14 GMT


module ti.targets.msp430.MSP430

metaonly module ti.targets.msp430.MSP430
index URL

MSP430 small code, small data model, little endian

  • Configuration settings
  • Individual elements
This target corresponds to the TI default runtime model for MSP430 devices.
Configuration settings sourced in ti/targets/msp430/MSP430.xdc
var MSP430 = xdc.useModule('ti.targets.msp430.MSP430');
module-wide constants & types
    var obj = new MSP430.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430.ar// The command used to create an archive = ITarget.Command {
        cmd: "ar430",
        opts: "rq"
    };
    const MSP430.asm// The command used to assembles assembly source files into object files = ITarget.Command {
        cmd: "cl430 -c",
        opts: " -vmsp"
    };
    const MSP430.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430.cc// The command used to compile C/C++ source files into object files = ITarget.Command {
        cmd: "cl430 -c",
        opts: " -vmsp"
    };
    const MSP430.isa// CPU Instruction Set Architecture (ISA) = String "430";
    const MSP430.lnk// The command used to link executables = ITarget.Command {
        cmd: "cl430",
        opts: "-z"
    };
    const MSP430.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "small",
        dataModel: "small"
    };
    const MSP430.name// Nickname for this target = String "MSP430";
    const MSP430.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430.rts// Name of a run-time support package to include = String "ti.targets.msp430.rts430";
    const MSP430.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".pinit",
            "code"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".reset",
            "data"
        ]
    ];
    const MSP430.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ]
    ];
    const MSP430.stdInclude// Standard C/C++ types header = String "ti/targets/msp430/std.h";
    const MSP430.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 2,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 4,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 2,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 4,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 2,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const MSP430.suffix// Suffix appended to all objs, libraries, and executable = String "430";
    const MSP430.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "cl430",
        opts: "--compiler_revision"
    };
     MSP430.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     MSP430.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-qq",
        suffix: ""
    };
     MSP430.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     MSP430.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     MSP430.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430.execExt// Extension for executables = String undefined;
     MSP430.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     MSP430.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     MSP430.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     MSP430.pathPrefix// A prefix to the PATH environment variable = String "";
     MSP430.platform// The default platform name for this target = String undefined;
     MSP430.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -g --optimize_with_debug"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ]
    ];
     MSP430.rawVersion// The raw version string from the compiler = String undefined;
     MSP430.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430.version// The Compatibility Key associated with this target = String undefined;
     MSP430.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     MSP430.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430.asmName// The function that converts a C name into an assembly name(String CName) returns String
     MSP430.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430.alignDirectiveSupported = Bool true;
config MSP430.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430.ar = ITarget.Command {
    cmd: "ar430",
    opts: "rq"
};
config MSP430.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430.asm = ITarget.Command {
    cmd: "cl430 -c",
    opts: " -vmsp"
};
config MSP430.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430.cc = ITarget.Command {
    cmd: "cl430 -c",
    opts: " -vmsp"
};
config MSP430.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430.isa = String "430";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430.lnk = ITarget.Command {
    cmd: "cl430",
    opts: "-z"
};
config MSP430.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430.model = ITarget.Model {
    endian: "little",
    codeModel: "small",
    dataModel: "small"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430.name = String "MSP430";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430.rts = String "ti.targets.msp430.rts430";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".pinit",
        "code"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".reset",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430.splitMap // module-wide
index URL
Configuration settings
const MSP430.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ]
];
config MSP430.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const MSP430.stdInclude = String "ti/targets/msp430/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 2,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 4,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 2,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 4,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 2,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430.suffix = String "430";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430.vers = ITarget.Command {
    cmd: "cl430",
    opts: "--compiler_revision"
};
config MSP430.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config MSP430.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430.asmOpts = ITarget.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config MSP430.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
MSP430.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config MSP430.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430.ccConfigOpts = ITarget.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430.ccOpts = ITarget.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config MSP430.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
MSP430.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config MSP430.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430.includeOpts = String "-I$(rootDir)/include ";
config MSP430.lnkOpts // module-wide
index URL

Linker options

Configuration settings
MSP430.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config MSP430.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
MSP430.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config MSP430.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
MSP430.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -g --optimize_with_debug"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config MSP430.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
MSP430.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
MSP430.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
MSP430.asmName(String CName) returns String
MSP430.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:14 GMT


module ti.targets.msp430.MSP430X

metaonly module ti.targets.msp430.MSP430X
index URL

MSP430X large code, restricted data model, little endian

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/msp430/MSP430X.xdc
var MSP430X = xdc.useModule('ti.targets.msp430.MSP430X');
module-wide constants & types
    var obj = new MSP430X.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430X.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430X.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430X.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430X.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430X.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430X.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430X.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430X.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430X.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430X.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430X.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430X.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430X.ar// The command used to create an archive = ITarget.Command {
        cmd: "ar430",
        opts: "rq"
    };
    const MSP430X.asm// The command used to assembles assembly source files into object files = ITarget.Command {
        cmd: "cl430 -c",
        opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    };
    const MSP430X.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430X.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430X.cc// The command used to compile C/C++ source files into object files = ITarget.Command {
        cmd: "cl430 -c",
        opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    };
    const MSP430X.isa// CPU Instruction Set Architecture (ISA) = String "430X";
    const MSP430X.lnk// The command used to link executables = ITarget.Command {
        cmd: "cl430",
        opts: "-z"
    };
    const MSP430X.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "large",
        dataModel: "restricted"
    };
    const MSP430X.name// Nickname for this target = String "MSP430X";
    const MSP430X.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430X.rts// Name of a run-time support package to include = String "ti.targets.msp430.rts430";
    const MSP430X.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".pinit",
            "code"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".reset",
            "data"
        ]
    ];
    const MSP430X.splitMap// = Bool[string] MSP430.splitMap;
    const MSP430X.stdInclude// Standard C/C++ types header = String "ti/targets/msp430/std.h";
    const MSP430X.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 4,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 4,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 4,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 4,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const MSP430X.suffix// Suffix appended to all objs, libraries, and executable = String "430X";
    const MSP430X.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "cl430",
        opts: "--compiler_revision"
    };
     MSP430X.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     MSP430X.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-qq",
        suffix: ""
    };
     MSP430X.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     MSP430X.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430X.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     MSP430X.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430X.execExt// Extension for executables = String undefined;
     MSP430X.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     MSP430X.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     MSP430X.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     MSP430X.pathPrefix// A prefix to the PATH environment variable = String "";
     MSP430X.platform// The default platform name for this target = String undefined;
     MSP430X.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430X.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -g --optimize_with_debug"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-gp"
                }
            }
        ]
    ];
     MSP430X.rawVersion// The raw version string from the compiler = String undefined;
     MSP430X.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430X.version// The Compatibility Key associated with this target = String undefined;
     MSP430X.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     MSP430X.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430X.asmName// The function that converts a C name into an assembly name(String CName) returns String
     MSP430X.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430X.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430X.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430X.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430X.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430X.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430X.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430X.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430X.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430X.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430X.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430X.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430X.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430X.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430X.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430X.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430X.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430X.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430X.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430X.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430X.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430X.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430X.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430X.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430X.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430X.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430X.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430X.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430X.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430X.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430X.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430X.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430X.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430X.alignDirectiveSupported = Bool true;
config MSP430X.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430X.ar = ITarget.Command {
    cmd: "ar430",
    opts: "rq"
};
config MSP430X.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430X.asm = ITarget.Command {
    cmd: "cl430 -c",
    opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
};
config MSP430X.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430X.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430X.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430X.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430X.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430X.cc = ITarget.Command {
    cmd: "cl430 -c",
    opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
};
config MSP430X.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430X.isa = String "430X";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430X.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430X.lnk = ITarget.Command {
    cmd: "cl430",
    opts: "-z"
};
config MSP430X.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430X.model = ITarget.Model {
    endian: "little",
    codeModel: "large",
    dataModel: "restricted"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430X.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430X.name = String "MSP430X";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430X.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430X.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430X.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430X.rts = String "ti.targets.msp430.rts430";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430X.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430X.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".pinit",
        "code"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".reset",
        "data"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430X.splitMap // module-wide
index URL
Configuration settings
const MSP430X.splitMap = Bool[string] MSP430.splitMap;
config MSP430X.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const MSP430X.stdInclude = String "ti/targets/msp430/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430X.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430X.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 4,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 4,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 4,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 4,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430X.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430X.suffix = String "430X";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430X.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430X.vers = ITarget.Command {
    cmd: "cl430",
    opts: "--compiler_revision"
};
config MSP430X.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430X.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config MSP430X.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430X.asmOpts = ITarget.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config MSP430X.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
MSP430X.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config MSP430X.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430X.ccConfigOpts = ITarget.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430X.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430X.ccOpts = ITarget.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config MSP430X.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430X.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430X.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430X.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430X.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
MSP430X.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config MSP430X.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430X.includeOpts = String "-I$(rootDir)/include ";
config MSP430X.lnkOpts // module-wide
index URL

Linker options

Configuration settings
MSP430X.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config MSP430X.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
MSP430X.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config MSP430X.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430X.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430X.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430X.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430X.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
MSP430X.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -g --optimize_with_debug"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-gp"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430X.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430X.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430X.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430X.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430X.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430X.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config MSP430X.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
MSP430X.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
MSP430X.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430X.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
MSP430X.asmName(String CName) returns String
MSP430X.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430X.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430X.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430X.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430X.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430X.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430X.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430X.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430X.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430X.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430X.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430X.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430X.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430X.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430X.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430X.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:14 GMT


package ti.targets.msp430.elf
index URL

Package of targets for MSP430 code generation tools

XDCspec declarations sourced in ti/targets/msp430/elf/package.xdc
requires xdc.bld[1, 0, 2];
package ti.targets.msp430.elf [1, 0, 0] {
    module MSP430;
    // ELF MSP430 small code, small data model, little endian
    module MSP430X;
    // ELF MSP430X large code, restricted data model, little endian
    module MSP430X_small;
    // ELF MSP430X small code, small data model, little endian
}
generated on Sun, 25 Nov 2018 22:21:16 GMT


module ti.targets.msp430.elf.MSP430

metaonly module ti.targets.msp430.elf.MSP430
index URL

ELF MSP430 small code, small data model, little endian

  • Configuration settings
  • Individual elements
This target corresponds to the TI default runtime model for MSP430 devices.
Configuration settings sourced in ti/targets/msp430/elf/MSP430.xdc
var MSP430 = xdc.useModule('ti.targets.msp430.elf.MSP430');
module-wide constants & types
    var obj = new MSP430.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430.ar// The command used to create an archive = ITarget.Command {
        cmd: "ar430",
        opts: "rq"
    };
    const MSP430.asm// The command used to assembles assembly source files into object files = ITarget.Command {
        cmd: "cl430 --abi=eabi -c",
        opts: " -vmsp"
    };
    const MSP430.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430.cc// The command used to compile C/C++ source files into object files = ITarget.Command {
        cmd: "cl430 --abi=eabi -c",
        opts: " -vmsp"
    };
    const MSP430.isa// CPU Instruction Set Architecture (ISA) = String "430";
    const MSP430.lnk// The command used to link executables = ITarget.Command {
        cmd: "cl430",
        opts: "-z"
    };
    const MSP430.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "small",
        dataModel: "small"
    };
    const MSP430.name// Nickname for this target = String "MSP430";
    const MSP430.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430.rts// Name of a run-time support package to include = String "ti.targets.msp430.rts430";
    const MSP430.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".reset",
            "data"
        ],
        [
            ".mspabi.extab",
            "code"
        ],
        [
            ".mspabi.exidx",
            "code"
        ]
    ];
    const MSP430.splitMap// = Bool[string] [
        [
            ".text",
            true
        ],
        [
            ".const",
            true
        ],
        [
            ".data",
            true
        ],
        [
            ".mspabi.extab",
            true
        ],
        [
            ".args",
            true
        ],
        [
            ".cio",
            true
        ]
    ];
    const MSP430.stdInclude// Standard C/C++ types header = String "ti/targets/msp430/elf/std.h";
    const MSP430.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 2,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 2,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 8,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 2,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const MSP430.suffix// Suffix appended to all objs, libraries, and executable = String "e430";
    const MSP430.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "cl430",
        opts: "--compiler_revision"
    };
     MSP430.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     MSP430.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-qq",
        suffix: ""
    };
     MSP430.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     MSP430.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     MSP430.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430.execExt// Extension for executables = String undefined;
     MSP430.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     MSP430.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     MSP430.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     MSP430.pathPrefix// A prefix to the PATH environment variable = String "";
     MSP430.platform// The default platform name for this target = String undefined;
     MSP430.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -g --optimize_with_debug"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-g"
                }
            }
        ]
    ];
     MSP430.rawVersion// The raw version string from the compiler = String undefined;
     MSP430.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430.version// The Compatibility Key associated with this target = String undefined;
     MSP430.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     MSP430.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430.asmName// The function that converts a C name into an assembly name(String CName) returns String
     MSP430.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430.alignDirectiveSupported = Bool true;
config MSP430.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430.ar = ITarget.Command {
    cmd: "ar430",
    opts: "rq"
};
config MSP430.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430.asm = ITarget.Command {
    cmd: "cl430 --abi=eabi -c",
    opts: " -vmsp"
};
config MSP430.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430.cc = ITarget.Command {
    cmd: "cl430 --abi=eabi -c",
    opts: " -vmsp"
};
config MSP430.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430.isa = String "430";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430.lnk = ITarget.Command {
    cmd: "cl430",
    opts: "-z"
};
config MSP430.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430.model = ITarget.Model {
    endian: "little",
    codeModel: "small",
    dataModel: "small"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430.name = String "MSP430";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430.rts = String "ti.targets.msp430.rts430";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".reset",
        "data"
    ],
    [
        ".mspabi.extab",
        "code"
    ],
    [
        ".mspabi.exidx",
        "code"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430.splitMap // module-wide
index URL
Configuration settings
const MSP430.splitMap = Bool[string] [
    [
        ".text",
        true
    ],
    [
        ".const",
        true
    ],
    [
        ".data",
        true
    ],
    [
        ".mspabi.extab",
        true
    ],
    [
        ".args",
        true
    ],
    [
        ".cio",
        true
    ]
];
config MSP430.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const MSP430.stdInclude = String "ti/targets/msp430/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 2,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 2,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 8,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 2,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430.suffix = String "e430";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430.vers = ITarget.Command {
    cmd: "cl430",
    opts: "--compiler_revision"
};
config MSP430.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config MSP430.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430.asmOpts = ITarget.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config MSP430.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
MSP430.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config MSP430.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430.ccConfigOpts = ITarget.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430.ccOpts = ITarget.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config MSP430.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
MSP430.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config MSP430.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430.includeOpts = String "-I$(rootDir)/include ";
config MSP430.lnkOpts // module-wide
index URL

Linker options

Configuration settings
MSP430.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config MSP430.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
MSP430.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config MSP430.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
MSP430.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -g --optimize_with_debug"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-g"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config MSP430.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
MSP430.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
MSP430.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
MSP430.asmName(String CName) returns String
MSP430.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:15 GMT


module ti.targets.msp430.elf.MSP430X

metaonly module ti.targets.msp430.elf.MSP430X
index URL

ELF MSP430X large code, restricted data model, little endian

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/msp430/elf/MSP430X.xdc
var MSP430X = xdc.useModule('ti.targets.msp430.elf.MSP430X');
module-wide constants & types
    var obj = new MSP430X.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430X.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430X.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430X.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430X.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430X.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430X.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430X.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430X.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430X.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430X.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430X.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430X.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430X.ar// The command used to create an archive = ITarget.Command {
        cmd: "ar430",
        opts: "rq"
    };
    const MSP430X.asm// The command used to assembles assembly source files into object files = ITarget.Command {
        cmd: "cl430 --abi=eabi -c",
        opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    };
    const MSP430X.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430X.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430X.cc// The command used to compile C/C++ source files into object files = ITarget.Command {
        cmd: "cl430 --abi=eabi -c",
        opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    };
    const MSP430X.isa// CPU Instruction Set Architecture (ISA) = String "430X";
    const MSP430X.lnk// The command used to link executables = ITarget.Command {
        cmd: "cl430",
        opts: "-z"
    };
    const MSP430X.model// Run-time model = ITarget.Model {
        endian: "little",
        codeModel: "large",
        dataModel: "restricted"
    };
    const MSP430X.name// Nickname for this target = String "MSP430X";
    const MSP430X.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430X.rts// Name of a run-time support package to include = String "ti.targets.msp430.rts430";
    const MSP430X.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".reset",
            "data"
        ],
        [
            ".mspabi.extab",
            "code"
        ],
        [
            ".mspabi.exidx",
            "code"
        ]
    ];
    const MSP430X.splitMap// = Bool[string] MSP430.splitMap;
    const MSP430X.stdInclude// Standard C/C++ types header = String "ti/targets/msp430/elf/std.h";
    const MSP430X.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 4,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 4,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 8,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 4,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const MSP430X.suffix// Suffix appended to all objs, libraries, and executable = String "e430X";
    const MSP430X.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "cl430",
        opts: "--compiler_revision"
    };
     MSP430X.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     MSP430X.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-qq",
        suffix: ""
    };
     MSP430X.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     MSP430X.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430X.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     MSP430X.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430X.execExt// Extension for executables = String undefined;
     MSP430X.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     MSP430X.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     MSP430X.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     MSP430X.pathPrefix// A prefix to the PATH environment variable = String "";
     MSP430X.platform// The default platform name for this target = String undefined;
     MSP430X.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430X.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -g --optimize_with_debug"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-g"
                }
            }
        ]
    ];
     MSP430X.rawVersion// The raw version string from the compiler = String undefined;
     MSP430X.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430X.version// The Compatibility Key associated with this target = String undefined;
     MSP430X.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     MSP430X.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430X.asmName// The function that converts a C name into an assembly name(String CName) returns String
     MSP430X.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430X.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430X.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430X.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430X.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430X.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430X.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430X.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430X.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430X.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430X.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430X.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430X.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430X.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430X.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430X.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430X.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430X.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430X.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430X.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430X.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430X.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430X.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430X.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430X.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430X.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430X.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430X.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430X.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430X.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430X.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430X.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430X.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430X.alignDirectiveSupported = Bool true;
config MSP430X.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430X.ar = ITarget.Command {
    cmd: "ar430",
    opts: "rq"
};
config MSP430X.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430X.asm = ITarget.Command {
    cmd: "cl430 --abi=eabi -c",
    opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
};
config MSP430X.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430X.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430X.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430X.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430X.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430X.cc = ITarget.Command {
    cmd: "cl430 --abi=eabi -c",
    opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
};
config MSP430X.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430X.isa = String "430X";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430X.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430X.lnk = ITarget.Command {
    cmd: "cl430",
    opts: "-z"
};
config MSP430X.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430X.model = ITarget.Model {
    endian: "little",
    codeModel: "large",
    dataModel: "restricted"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430X.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430X.name = String "MSP430X";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430X.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430X.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430X.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430X.rts = String "ti.targets.msp430.rts430";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430X.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430X.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".reset",
        "data"
    ],
    [
        ".mspabi.extab",
        "code"
    ],
    [
        ".mspabi.exidx",
        "code"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430X.splitMap // module-wide
index URL
Configuration settings
const MSP430X.splitMap = Bool[string] MSP430.splitMap;
config MSP430X.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const MSP430X.stdInclude = String "ti/targets/msp430/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430X.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430X.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 4,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 4,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 8,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 4,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430X.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430X.suffix = String "e430X";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430X.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430X.vers = ITarget.Command {
    cmd: "cl430",
    opts: "--compiler_revision"
};
config MSP430X.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430X.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config MSP430X.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430X.asmOpts = ITarget.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config MSP430X.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
MSP430X.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config MSP430X.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430X.ccConfigOpts = ITarget.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430X.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430X.ccOpts = ITarget.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config MSP430X.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430X.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430X.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430X.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430X.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
MSP430X.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config MSP430X.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430X.includeOpts = String "-I$(rootDir)/include ";
config MSP430X.lnkOpts // module-wide
index URL

Linker options

Configuration settings
MSP430X.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config MSP430X.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
MSP430X.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config MSP430X.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430X.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430X.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430X.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430X.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
MSP430X.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -g --optimize_with_debug"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-g"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430X.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430X.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430X.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430X.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430X.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430X.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config MSP430X.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
MSP430X.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
MSP430X.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430X.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
MSP430X.asmName(String CName) returns String
MSP430X.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430X.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430X.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430X.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430X.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430X.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430X.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430X.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430X.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430X.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430X.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430X.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430X.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430X.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430X.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430X.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430X.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:15 GMT


module ti.targets.msp430.elf.MSP430X_small

metaonly module ti.targets.msp430.elf.MSP430X_small
index URL

ELF MSP430X small code, small data model, little endian

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/msp430/elf/MSP430X_small.xdc
var MSP430X_small = xdc.useModule('ti.targets.msp430.elf.MSP430X_small');
module-wide constants & types
    var obj = new MSP430X_small.ArchiveGoal// The goal specification passed to the archive function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".a62" = String ...
        obj.files// String of files to archive = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific archiver options = String ...
    var obj = new MSP430X_small.Command// Required command and options;
        obj.cmd// the command to run = String ...
        obj.opts// required options for the command = String ...
    var obj = new MSP430X_small.CommandSet// The commands necessary to create a specified goal;
        obj.msg// brief message describing subsequent commands = String ...
        obj.cmds// commands necessary to generate goal = String ...
        obj.path// host-independent representation of PATH = String[] ...
        obj.envs// environment variable settings for the cmds = String[] ...
    var obj = new MSP430X_small.CompileGoal// The goal specification passed to the compile function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".o62" = String ...
        obj.srcSuffix// optional suffix of source file; e.g., ".c" = String ...
        obj.srcPrefix// optional directory prefix of source file = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific compiler options = ITarget.CompileOptions ...
        obj.configOpts// true if compiling the generated C config file = Bool ...
    var obj = new MSP430X_small.CompileOptions// Options passed to the compiler/assembler;
        obj.aopts// goal specific ASM options = String ...
        obj.copts// goal specific C compiler options = String ...
        obj.cfgcopts// goal specific C config file options = String ...
        obj.defs// goal specific C/ASM definition options = String ...
        obj.incs// goal specific C/ASM include options = String ...
    var obj = new MSP430X_small.DebugGen// Debugger integration support;
        obj.execTemplate// debugger template for executable = String ...
        obj.execPattern// exec file name pattern = String ...
        obj.packageTemplate// debugger template for package = String ...
        obj.packagePattern// package file name pattern = String ...
    var obj = new MSP430X_small.Extension// File extension to file type association;
        obj.suf// file extension (including any '.') = String ...
        obj.typ// type of this file; e.g., "c", "asm", .. = String ...
    var obj = new MSP430X_small.LinkGoal// The goal specification passed to the link function;
        obj.base// base name of the source and destination = String ...
        obj.dstPrefix// directory prefix of destination file = String ...
        obj.dstSuffix// suffix of destination file; e.g., ".x62" = String ...
        obj.files// string of files to link with = String ...
        obj.profile// index into profiles map = String ...
        obj.opts// goal specific linker options = String ...
        obj.dllMode// true if we're linking an assembly = Bool ...
        obj.isRom// reflects the isRom attribute = Bool ...
    var obj = new MSP430X_small.Model// Target runtime model;
        obj.endian// endian-ness of this target = String ...
        obj.codeModel// target-specific code model = String ...
        obj.dataModel// target-specific data model = String ...
        obj.shortEnums// if true, enums are packed into smallest integral type = Bool ...
    var obj = new MSP430X_small.OptionSet// Collection of tool-chain options;
        obj.compileOpts// profile-specific compiler opts = ITarget.CompileOptions ...
        obj.linkOpts// profile-specific linker opts = String ...
        obj.archiveOpts// profile-specific archiver opts = String ...
        obj.filters// ITargetFilter instance descs = ITargetFilter.InstDesc[] ...
    var obj = new MSP430X_small.Options// User configurable command options;
        obj.prefix// options that appear before Command.opts = String ...
        obj.suffix// options that appear after Command.opts = String ...
    var obj = new MSP430X_small.StdTypes// Standard base types supported by all targets;
        obj.t_IArg = ITarget.TypeInfo ...
        obj.t_Char = ITarget.TypeInfo ...
        obj.t_Double = ITarget.TypeInfo ...
        obj.t_Float = ITarget.TypeInfo ...
        obj.t_Fxn = ITarget.TypeInfo ...
        obj.t_Int = ITarget.TypeInfo ...
        obj.t_Int8 = ITarget.TypeInfo ...
        obj.t_Int16 = ITarget.TypeInfo ...
        obj.t_Int32 = ITarget.TypeInfo ...
        obj.t_Int40 = ITarget.TypeInfo ...
        obj.t_Int64 = ITarget.TypeInfo ...
        obj.t_Long = ITarget.TypeInfo ...
        obj.t_LDouble = ITarget.TypeInfo ...
        obj.t_LLong = ITarget.TypeInfo ...
        obj.t_Ptr = ITarget.TypeInfo ...
        obj.t_Short = ITarget.TypeInfo ...
        obj.t_Size = ITarget.TypeInfo ...
module-wide config parameters
    const MSP430X_small.alignDirectiveSupported// The compiler supports an align directive = Bool true;
    const MSP430X_small.ar// The command used to create an archive = ITarget.Command {
        cmd: "ar430",
        opts: "rq"
    };
    const MSP430X_small.asm// The command used to assembles assembly source files into object files = ITarget.Command {
        cmd: "cl430 --abi=eabi -c",
        opts: " -vmspx --code_model=small --data_model=small"
    };
    const MSP430X_small.base// A target that this target is based upon = ITarget.Module computed value;
    const MSP430X_small.bitsPerChar// The number of bits in a variable of type char = Int 8;
    const MSP430X_small.cc// The command used to compile C/C++ source files into object files = ITarget.Command {
        cmd: "cl430 --abi=eabi -c",
        opts: " -vmspx --code_model=small --data_model=small"
    };
    const MSP430X_small.isa// CPU Instruction Set Architecture (ISA) = String "430X";
    const MSP430X_small.lnk// The command used to link executables = ITarget.Command {
        cmd: "cl430",
        opts: "-z"
    };
    const MSP430X_small.model// Run-time model = ITarget.Model {
        endian: "little",
        dataModel: "small",
        codeModel: "small"
    };
    const MSP430X_small.name// Nickname for this target = String "MSP430X_small";
    const MSP430X_small.os// Name of OS required to run programs built for this target = String computed value;
    const MSP430X_small.rts// Name of a run-time support package to include = String "ti.targets.msp430.rts430";
    const MSP430X_small.sectMap// Output section name to segment type mapping = String[string] [
        [
            ".text",
            "code"
        ],
        [
            ".cinit",
            "code"
        ],
        [
            ".const",
            "code"
        ],
        [
            ".init_array",
            "data"
        ],
        [
            ".bss",
            "data"
        ],
        [
            ".data",
            "data"
        ],
        [
            ".sysmem",
            "data"
        ],
        [
            ".stack",
            "stack"
        ],
        [
            ".args",
            "data"
        ],
        [
            ".cio",
            "data"
        ],
        [
            ".reset",
            "data"
        ],
        [
            ".mspabi.extab",
            "code"
        ],
        [
            ".mspabi.exidx",
            "code"
        ]
    ];
    const MSP430X_small.splitMap// = Bool[string] MSP430.splitMap;
    const MSP430X_small.stdInclude// Standard C/C++ types header = String "ti/targets/msp430/elf/std.h";
    const MSP430X_small.stdTypes// Size and alignment for standard base types = ITarget.StdTypes {
        t_IArg: {
            size: 2,
            align: 2
        },
        t_Char: {
            size: 1,
            align: 1
        },
        t_Double: {
            size: 8,
            align: 2
        },
        t_Float: {
            size: 4,
            align: 2
        },
        t_Fxn: {
            size: 2,
            align: 2
        },
        t_Int: {
            size: 2,
            align: 2
        },
        t_Int8: {
            size: 1,
            align: 1
        },
        t_Int16: {
            size: 2,
            align: 2
        },
        t_Int32: {
            size: 4,
            align: 2
        },
        t_Long: {
            size: 4,
            align: 2
        },
        t_LDouble: {
            size: 8,
            align: 2
        },
        t_LLong: {
            size: 8,
            align: 2
        },
        t_Ptr: {
            size: 2,
            align: 2
        },
        t_Short: {
            size: 2,
            align: 2
        },
        t_Size: {
            size: 2,
            align: 2
        }
    };
    const MSP430X_small.suffix// Suffix appended to all objs, libraries, and executable = String "e430XS";
    const MSP430X_small.vers// The command used to get the tool-chain to return a version number = ITarget.Command {
        cmd: "cl430",
        opts: "--compiler_revision"
    };
     MSP430X_small.arOpts// User configurable archiver options = ITarget2.Options {
        prefix: "",
        suffix: ""
    };
     MSP430X_small.asmOpts// User configurable assembler options = ITarget.Options {
        prefix: "-qq",
        suffix: ""
    };
     MSP430X_small.binDir// This parameter controls the location of the target's commands = String "$(rootDir)/bin/";
     MSP430X_small.ccConfigOpts// User configurable compiler options for the generated config C file = ITarget.Options {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
     MSP430X_small.ccOpts// User configurable compiler options = ITarget.Options {
        prefix: "-qq -pdsw225",
        suffix: ""
    };
     MSP430X_small.compatibleSuffixes// Array of suffixes used by targets compatible with this target = String[] undefined;
     MSP430X_small.execExt// Extension for executables = String undefined;
     MSP430X_small.extensions// File extensions recognized by TI targets = ITarget.Extension[string] ITarget.extensions;
     MSP430X_small.includeOpts// Additional user configurable target-specific include path options = String "-I$(rootDir)/include ";
     MSP430X_small.lnkOpts// Linker options = ITarget2.Options {
        prefix: "-q -u _c_int00",
        suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
    };
     MSP430X_small.pathPrefix// A prefix to the PATH environment variable = String "";
     MSP430X_small.platform// The default platform name for this target = String undefined;
     MSP430X_small.platforms// A set of platforms that can support this target = String[] [ ];
     MSP430X_small.profiles// Standard options profiles for the TI tool-chain = ITarget.OptionSet[string] [
        [
            "debug",
            {
                compileOpts: {
                    copts: "-g",
                    defs: "-D_DEBUG_=1"
                }
            }
        ],
        [
            "release",
            {
                compileOpts: {
                    copts: "-O2 -g --optimize_with_debug"
                }
            }
        ],
        [
            "profile",
            {
                compileOpts: {
                    copts: "-g"
                }
            }
        ],
        [
            "coverage",
            {
                compileOpts: {
                    copts: "-g"
                }
            }
        ]
    ];
     MSP430X_small.rawVersion// The raw version string from the compiler = String undefined;
     MSP430X_small.rootDir// Installation directory for this target's code generation tools = String undefined;
     MSP430X_small.version// The Compatibility Key associated with this target = String undefined;
     MSP430X_small.versionMap// Map of TI compiler version numbers to compatibility keys = String[string] [
        [
            "TMS320C6x_4.32",
            "1,0,4.32,0"
        ],
        [
            "TMS320C2000_3.07",
            "1,0,3.07,0"
        ]
    ];
module-wide functions
     MSP430X_small.archive// Create an archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.asmName// The function that converts a C name into an assembly name(String CName) returns String
     MSP430X_small.compile// Compile a source file into an object file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.findSuffix// Find the suffix that is compatible with this target(Any pkg) returns Any
     MSP430X_small.genConstCustom// Return any custom generated code related to generated constants(String[] names, String[] types) returns String
     MSP430X_small.genVisibleData// Return any custom generated code related to data generated in the config C file(String[] quals, String[] types, String[] names) returns String
     MSP430X_small.genVisibleFxns// Return any custom generated code related to functions generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X_small.genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(String[] types, String[] names, String[] args) returns String
     MSP430X_small.getISAChain// Get this target's ISA "is compatible with" relation(Any isa) returns Any
     MSP430X_small.getRawVersion// Get a target-specific raw compiler version string() returns String
     MSP430X_small.getVersion// Get a target-specific Compatibility Key string() returns String
     MSP430X_small.link// Link object files to produce an executable(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.scompile// Compile a source file into an assembly language file(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
     MSP430X_small.selectSuffix// Select the suffix that is compatible with this target(String[] suffixList) returns String
struct MSP430X_small.ArchiveGoal
index URL

The goal specification passed to the archive function

Configuration settings
var obj = new MSP430X_small.ArchiveGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".a62"
    obj.files = String ...
    // String of files to archive
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific archiver options
SEE
archive
struct MSP430X_small.Command
index URL

Required command and options

Configuration settings
var obj = new MSP430X_small.Command;
    obj.cmd = String ...
    // the command to run
    obj.opts = String ...
    // required options for the command
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct MSP430X_small.CommandSet
index URL

The commands necessary to create a specified goal

Configuration settings
var obj = new MSP430X_small.CommandSet;
    obj.msg = String ...
    // brief message describing subsequent commands
    obj.cmds = String ...
    // commands necessary to generate goal
    obj.path = String[] ...
    // host-independent representation of PATH
    obj.envs = String[] ...
    // environment variable settings for the cmds
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct MSP430X_small.CompileGoal
index URL

The goal specification passed to the compile function

Configuration settings
var obj = new MSP430X_small.CompileGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".o62"
    obj.srcSuffix = String ...
    // optional suffix of source file; e.g., ".c"
    obj.srcPrefix = String ...
    // optional directory prefix of source file
    obj.profile = String ...
    // index into profiles map
    obj.opts = ITarget.CompileOptions ...
    // goal specific compiler options
    obj.configOpts = Bool ...
    // true if compiling the generated C config file
SEE
compile, scompile
struct MSP430X_small.CompileOptions
index URL

Options passed to the compiler/assembler

Configuration settings
var obj = new MSP430X_small.CompileOptions;
    obj.aopts = String ...
    // goal specific ASM options
    obj.copts = String ...
    // goal specific C compiler options
    obj.cfgcopts = String ...
    // goal specific C config file options
    obj.defs = String ...
    // goal specific C/ASM definition options
    obj.incs = String ...
    // goal specific C/ASM include options
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct MSP430X_small.DebugGen
index URL

Debugger integration support

Configuration settings
var obj = new MSP430X_small.DebugGen;
    obj.execTemplate = String ...
    // debugger template for executable
    obj.execPattern = String ...
    // exec file name pattern
    obj.packageTemplate = String ...
    // debugger template for package
    obj.packagePattern = String ...
    // package file name pattern
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct MSP430X_small.Extension
index URL

File extension to file type association

Configuration settings
var obj = new MSP430X_small.Extension;
    obj.suf = String ...
    // file extension (including any '.')
    obj.typ = String ...
    // type of this file; e.g., "c", "asm", ..
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct MSP430X_small.LinkGoal
index URL

The goal specification passed to the link function

Configuration settings
var obj = new MSP430X_small.LinkGoal;
    obj.base = String ...
    // base name of the source and destination
    obj.dstPrefix = String ...
    // directory prefix of destination file
    obj.dstSuffix = String ...
    // suffix of destination file; e.g., ".x62"
    obj.files = String ...
    // string of files to link with
    obj.profile = String ...
    // index into profiles map
    obj.opts = String ...
    // goal specific linker options
    obj.dllMode = Bool ...
    // true if we're linking an assembly
    obj.isRom = Bool ...
    // reflects the isRom attribute
SEE
link
struct MSP430X_small.Model
index URL

Target runtime model

Configuration settings
var obj = new MSP430X_small.Model;
    obj.endian = String ...
    // endian-ness of this target
    obj.codeModel = String ...
    // target-specific code model
    obj.dataModel = String ...
    // target-specific data model
    obj.shortEnums = Bool ...
    // if true, enums are packed into smallest integral type
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct MSP430X_small.OptionSet
index URL

Collection of tool-chain options

Configuration settings
var obj = new MSP430X_small.OptionSet;
    obj.compileOpts = ITarget.CompileOptions ...
    // profile-specific compiler opts
    obj.linkOpts = String ...
    // profile-specific linker opts
    obj.archiveOpts = String ...
    // profile-specific archiver opts
    obj.filters = ITargetFilter.InstDesc[] ...
    // ITargetFilter instance descs
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct MSP430X_small.Options
index URL

User configurable command options

Configuration settings
var obj = new MSP430X_small.Options;
    obj.prefix = String ...
    // options that appear before Command.opts
    obj.suffix = String ...
    // options that appear after Command.opts
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct MSP430X_small.StdTypes
index URL

Standard base types supported by all targets

Configuration settings
var obj = new MSP430X_small.StdTypes;
    obj.t_IArg = ITarget.TypeInfo ...
    obj.t_Char = ITarget.TypeInfo ...
    obj.t_Double = ITarget.TypeInfo ...
    obj.t_Float = ITarget.TypeInfo ...
    obj.t_Fxn = ITarget.TypeInfo ...
    obj.t_Int = ITarget.TypeInfo ...
    obj.t_Int8 = ITarget.TypeInfo ...
    obj.t_Int16 = ITarget.TypeInfo ...
    obj.t_Int32 = ITarget.TypeInfo ...
    obj.t_Int40 = ITarget.TypeInfo ...
    obj.t_Int64 = ITarget.TypeInfo ...
    obj.t_Long = ITarget.TypeInfo ...
    obj.t_LDouble = ITarget.TypeInfo ...
    obj.t_LLong = ITarget.TypeInfo ...
    obj.t_Ptr = ITarget.TypeInfo ...
    obj.t_Short = ITarget.TypeInfo ...
    obj.t_Size = ITarget.TypeInfo ...
SEE
stdTypes
config MSP430X_small.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

Configuration settings
const MSP430X_small.alignDirectiveSupported = Bool true;
config MSP430X_small.ar // module-wide
index URL

The command used to create an archive

Configuration settings
const MSP430X_small.ar = ITarget.Command {
    cmd: "ar430",
    opts: "rq"
};
config MSP430X_small.asm // module-wide
index URL

The command used to assembles assembly source files into object files

Configuration settings
const MSP430X_small.asm = ITarget.Command {
    cmd: "cl430 --abi=eabi -c",
    opts: " -vmspx --code_model=small --data_model=small"
};
config MSP430X_small.base // module-wide
index URL

A target that this target is based upon

Configuration settings
const MSP430X_small.base = ITarget.Module computed value;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config MSP430X_small.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

Configuration settings
const MSP430X_small.bitsPerChar = Int 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config MSP430X_small.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

Configuration settings
const MSP430X_small.cc = ITarget.Command {
    cmd: "cl430 --abi=eabi -c",
    opts: " -vmspx --code_model=small --data_model=small"
};
config MSP430X_small.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

Configuration settings
const MSP430X_small.isa = String "430X";
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config MSP430X_small.lnk // module-wide
index URL

The command used to link executables

Configuration settings
const MSP430X_small.lnk = ITarget.Command {
    cmd: "cl430",
    opts: "-z"
};
config MSP430X_small.model // module-wide
index URL

Run-time model

Configuration settings
const MSP430X_small.model = ITarget.Model {
    endian: "little",
    dataModel: "small",
    codeModel: "small"
};
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config MSP430X_small.name // module-wide
index URL

Nickname for this target

Configuration settings
const MSP430X_small.name = String "MSP430X_small";
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config MSP430X_small.os // module-wide
index URL

Name of OS required to run programs built for this target

Configuration settings
const MSP430X_small.os = String computed value;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config MSP430X_small.rts // module-wide
index URL

Name of a run-time support package to include

Configuration settings
const MSP430X_small.rts = String "ti.targets.msp430.rts430";
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config MSP430X_small.sectMap // module-wide
index URL

Output section name to segment type mapping

Configuration settings
const MSP430X_small.sectMap = String[string] [
    [
        ".text",
        "code"
    ],
    [
        ".cinit",
        "code"
    ],
    [
        ".const",
        "code"
    ],
    [
        ".init_array",
        "data"
    ],
    [
        ".bss",
        "data"
    ],
    [
        ".data",
        "data"
    ],
    [
        ".sysmem",
        "data"
    ],
    [
        ".stack",
        "stack"
    ],
    [
        ".args",
        "data"
    ],
    [
        ".cio",
        "data"
    ],
    [
        ".reset",
        "data"
    ],
    [
        ".mspabi.extab",
        "code"
    ],
    [
        ".mspabi.exidx",
        "code"
    ]
];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config MSP430X_small.splitMap // module-wide
index URL
Configuration settings
const MSP430X_small.splitMap = Bool[string] MSP430.splitMap;
config MSP430X_small.stdInclude // module-wide
index URL

Standard C/C++ types header

Configuration settings
const MSP430X_small.stdInclude = String "ti/targets/msp430/elf/std.h";
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config MSP430X_small.stdTypes // module-wide
index URL

Size and alignment for standard base types

Configuration settings
const MSP430X_small.stdTypes = ITarget.StdTypes {
    t_IArg: {
        size: 2,
        align: 2
    },
    t_Char: {
        size: 1,
        align: 1
    },
    t_Double: {
        size: 8,
        align: 2
    },
    t_Float: {
        size: 4,
        align: 2
    },
    t_Fxn: {
        size: 2,
        align: 2
    },
    t_Int: {
        size: 2,
        align: 2
    },
    t_Int8: {
        size: 1,
        align: 1
    },
    t_Int16: {
        size: 2,
        align: 2
    },
    t_Int32: {
        size: 4,
        align: 2
    },
    t_Long: {
        size: 4,
        align: 2
    },
    t_LDouble: {
        size: 8,
        align: 2
    },
    t_LLong: {
        size: 8,
        align: 2
    },
    t_Ptr: {
        size: 2,
        align: 2
    },
    t_Short: {
        size: 2,
        align: 2
    },
    t_Size: {
        size: 2,
        align: 2
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config MSP430X_small.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

Configuration settings
const MSP430X_small.suffix = String "e430XS";
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config MSP430X_small.vers // module-wide
index URL

The command used to get the tool-chain to return a version number

Configuration settings
const MSP430X_small.vers = ITarget.Command {
    cmd: "cl430",
    opts: "--compiler_revision"
};
config MSP430X_small.arOpts // module-wide
index URL

User configurable archiver options

Configuration settings
MSP430X_small.arOpts = ITarget2.Options {
    prefix: "",
    suffix: ""
};
config MSP430X_small.asmOpts // module-wide
index URL

User configurable assembler options

Configuration settings
MSP430X_small.asmOpts = ITarget.Options {
    prefix: "-qq",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
config MSP430X_small.binDir // module-wide
index URL

This parameter controls the location of the target's commands

Configuration settings
MSP430X_small.binDir = String "$(rootDir)/bin/";
DETAILS
All build commands returned within a command set (xdc.bld.ITarget.CommandSet.cmds) are formed by prefixing binDir to this target's Command.cmd specification. For example, the compile command returned is formed as follows:
      $(binDir)$(cc.cmd)
where, $(binDir) is this target's binDir value and $(cc.cmd) is the value of this target's cc.cmd string.
If binDir is non-empty then it must end with '/'. If it is empty, the target's commands (compiler, linker, archiver, etc.) will be located along a path constructed from this target's pathPrefix.
config MSP430X_small.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

Configuration settings
MSP430X_small.ccConfigOpts = ITarget.Options {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config MSP430X_small.ccOpts // module-wide
index URL

User configurable compiler options

Configuration settings
MSP430X_small.ccOpts = ITarget.Options {
    prefix: "-qq -pdsw225",
    suffix: ""
};
DETAILS
Defaults:
-qq
super quiet mode
-pdsw225
generate a warning for implicitly declared functions; i.e., functions without prototypes
config MSP430X_small.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

Configuration settings
MSP430X_small.compatibleSuffixes = String[] undefined;
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config MSP430X_small.execExt // module-wide
index URL

Extension for executables

Configuration settings
MSP430X_small.execExt = String undefined;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config MSP430X_small.extensions // module-wide
index URL

File extensions recognized by TI targets

Configuration settings
MSP430X_small.extensions = ITarget.Extension[string] ITarget.extensions;
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
TI SPECIFICS
For TI targets, the typ string field of an xdc.bld.ITarget.Extension structure may be of the form "<cmd>:<langOpt>" where <cmd> is one of "asm", "c", "cpp", and <langOpt> is the language option used to identify the source language of a source file. This allows one to explicitly control the language flag passed to the compiler based on a source file's extension; in particular, one can define separate source extensions for "linear" and "scheduled" assembly files, or simply cause ".s62" files to be treated as "linear" assembly rather than "scheduled" assembly.
For example,
  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
causes all ".s62" files to be treated as linear assembly.
If no ':' appears in the typ string, a default will be used: "-fa" for "asm" files "-fc" for "c" files, and "-fp" for "cpp" files.
config MSP430X_small.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

Configuration settings
MSP430X_small.includeOpts = String "-I$(rootDir)/include ";
config MSP430X_small.lnkOpts // module-wide
index URL

Linker options

Configuration settings
MSP430X_small.lnkOpts = ITarget2.Options {
    prefix: "-q -u _c_int00",
    suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
};
DETAILS
Options:
-q
Quite run
-u
Place unresolved external symbol into symbol table
-c
ROM autoinitialization model
-m
create a map file
-l
archive library file as linker input
config MSP430X_small.pathPrefix // module-wide
index URL

A prefix to the PATH environment variable

Configuration settings
MSP430X_small.pathPrefix = String "";
DETAILS
Each target command is executed with C_DIR set to "" and PATH set as follows:
      $(pathPrefix);$(binDir);$(PATH)
where, $(pathPrefix) and $(binDir) are the values of the configuration parameters and $(PATH) is the value of the PATH environment variable set by the xdc command (type 'xdc -n' to see this).
Embedded ';' characters within pathPrefix separate directory names. On UNIX hosts these ';' characters are convered to an appropriate separator; i.e., ':'.
config MSP430X_small.platform // module-wide
index URL

The default platform name for this target

Configuration settings
MSP430X_small.platform = String undefined;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config MSP430X_small.platforms // module-wide
index URL

A set of platforms that can support this target

Configuration settings
MSP430X_small.platforms = String[] [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config MSP430X_small.profiles // module-wide
index URL

Standard options profiles for the TI tool-chain

Configuration settings
MSP430X_small.profiles = ITarget.OptionSet[string] [
    [
        "debug",
        {
            compileOpts: {
                copts: "-g",
                defs: "-D_DEBUG_=1"
            }
        }
    ],
    [
        "release",
        {
            compileOpts: {
                copts: "-O2 -g --optimize_with_debug"
            }
        }
    ],
    [
        "profile",
        {
            compileOpts: {
                copts: "-g"
            }
        }
    ],
    [
        "coverage",
        {
            compileOpts: {
                copts: "-g"
            }
        }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config MSP430X_small.rawVersion // module-wide
index URL

The raw version string from the compiler

Configuration settings
MSP430X_small.rawVersion = String undefined;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config MSP430X_small.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

Configuration settings
MSP430X_small.rootDir = String undefined;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config MSP430X_small.version // module-wide
index URL

The Compatibility Key associated with this target

Configuration settings
MSP430X_small.version = String undefined;
DETAILS
The first two components of this target Compatibility Key are '1,0'. The rest of the Key represents the compiler version. The third component combines the major and the minor version number in the format Major.Minor. The fourth component is the patch number, and the optional fifth component is the version of an Alpha or Beta release.
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
EXAMPLE
If this target's rootDir points to the compiler version 6.0.11, the Compatibility Key is [1,0,6.0,11]. If this target's rootDir points to the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
config MSP430X_small.versionMap // module-wide
index URL

Map of TI compiler version numbers to compatibility keys

Configuration settings
MSP430X_small.versionMap = String[string] [
    [
        "TMS320C6x_4.32",
        "1,0,4.32,0"
    ],
    [
        "TMS320C2000_3.07",
        "1,0,3.07,0"
    ]
];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
This map translates version string information from the compiler into a compatibility key. The compatibility key is used to validate consistency among a collection of packages used in a configuration.
TI compiler strings are formed by parsing the output of the compiler's --compiler_revision option and creating a string of the form:
      <comp>_<ver>
where <comp> is the first word of the output and <ver> is the version number that appears on this same line.
There are two forms of version numbers output by the TI code gen tools; an "old" style that is of the form "<major>.<minor>" and a new style of the form "<major>.<minor>.<update>[.<branch>][<qual>], where <major>, <minor>, <update>, and <branch> are non-negative integers and <qual> is of the form "[IBAP]<yyddd>", and <yyddd> is the last two digits of the year concatenated with the number of the day.
If a compiler version is not found in this map the default is "1,0,<major>.<minor>" for old style version numbers, and "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style version numbers.
The user only needs to extend this table when a significant incompatibility occurs (and this package doesn't know about it) or when two versions of the compiler should be treated as 100% compatible.
SEE
ti.targets.ITarget.versionMap
EXAMPLES
      var C62 = xdc.useModule('ti.targets.C62');

      // assert that 4.0 is forward compatible with 4.32
      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";

      // assert that 4.28 is incompatible with all other compilers
      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
MSP430X_small.archive() // module-wide
index URL

Create an archive

Configuration settings
MSP430X_small.archive(ITarget.ArchiveGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.asmName() // module-wide
index URL

The function that converts a C name into an assembly name

Configuration settings
MSP430X_small.asmName(String CName) returns String
MSP430X_small.compile() // module-wide
index URL

Compile a source file into an object file

Configuration settings
MSP430X_small.compile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

Configuration settings
MSP430X_small.findSuffix(Any pkg) returns Any
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
MSP430X_small.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

Configuration settings
MSP430X_small.genConstCustom(String[] names, String[] types) returns String
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X_small.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

Configuration settings
MSP430X_small.genVisibleData(String[] quals, String[] types, String[] names) returns String
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
MSP430X_small.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

Configuration settings
MSP430X_small.genVisibleFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
MSP430X_small.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

Configuration settings
MSP430X_small.genVisibleLibFxns(String[] types, String[] names, String[] args) returns String
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
MSP430X_small.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

Configuration settings
MSP430X_small.getISAChain(Any isa) returns Any
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

Configuration settings
MSP430X_small.getRawVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

Configuration settings
MSP430X_small.getVersion() returns String
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.link() // module-wide
index URL

Link object files to produce an executable

Configuration settings
MSP430X_small.link(ITarget.LinkGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.scompile() // module-wide
index URL

Compile a source file into an assembly language file

Configuration settings
MSP430X_small.scompile(ITarget.CompileGoal* goal) returns ITarget.CommandSet*
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
MSP430X_small.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

Configuration settings
MSP430X_small.selectSuffix(String[] suffixList) returns String
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:21:16 GMT


package ti.targets.msp430.rts430
index URL

Runtime support package for the MSP430 targets

This package builds a library of all modules in the xdc.runtime package. By building the xdc.runtime package here we avoid having multiple copies of the same source in different runtime support packages for different ISAs. This also allows xdc.runtime to be a pure source package independent of any particular tool chain.
XDCspec declarations sourced in ti/targets/msp430/rts430/package.xdc
requires xdc.runtime;
package ti.targets.msp430.rts430 [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:21:16 GMT


module ti.targets.msp430.rts430.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in ti/targets/msp430/rts430/Settings.xdc
#include <ti/targets/msp430/rts430/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in ti/targets/msp430/rts430/Settings.xdc
var Settings = xdc.useModule('ti.targets.msp430.rts430.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:21:16 GMT


package ti.targets.omf.cof
index URL

Simple TI COFF parser support

XDCspec declarations sourced in ti/targets/omf/cof/package.xdc
package ti.targets.omf.cof {
    module Settings;
    // Allows selection between TI and MOTOROLA cof libraries
}
generated on Sun, 25 Nov 2018 22:21:06 GMT


module ti.targets.omf.cof.Settings

metaonly module ti.targets.omf.cof.Settings
index URL

Allows selection between TI and MOTOROLA cof libraries

  • Configuration settings
  • Individual elements
Configuration settings sourced in ti/targets/omf/cof/Settings.xdc
var Settings = xdc.useModule('ti.targets.omf.cof.Settings');
module-wide constants & types
    values of type Settings.Mode// Mode: {TI, MOTOROLA}
        const Settings.TI;
        const Settings.MOTOROLA;
module-wide config parameters
     Settings.mode// Determines the libraries contributed by this package = Settings.Mode Settings.TI;
enum Settings.Mode
index URL

Mode: {TI, MOTOROLA}

Configuration settings
values of type Settings.Mode
    const Settings.TI;
    const Settings.MOTOROLA;
DETAILS
TI. The function getLibs() returns cof_ti.lib libraries.
MOTOROLA. The function getLibs() returns cof_mot.lib libraries.
config Settings.mode // module-wide
index URL

Determines the libraries contributed by this package

Configuration settings
Settings.mode = Settings.Mode Settings.TI;
DETAILS
Default is TI
generated on Sun, 25 Nov 2018 22:21:06 GMT


package ti.targets.omf.elf
index URL

Simple ELF parser support

XDCspec declarations sourced in ti/targets/omf/elf/package.xdc
package ti.targets.omf.elf {
}
generated on Sun, 25 Nov 2018 22:21:06 GMT


package ti.targets.rts2800
index URL

Runtime support package for the c2800 targets

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in ti/targets/rts2800/package.xdc
requires xdc.runtime;
package ti.targets.rts2800 [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:21:17 GMT


module ti.targets.rts2800.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in ti/targets/rts2800/Settings.xdc
#include <ti/targets/rts2800/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in ti/targets/rts2800/Settings.xdc
var Settings = xdc.useModule('ti.targets.rts2800.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:21:17 GMT


package ti.targets.rts6000
index URL

Runtime support package for the c6000 targets

This package builds a library of standard XDC system support functions. In particular, it builds several implementations of the xdc.runtime.ISystemProvider interface. Moreover, this package uses sources that are part of the xdc.runtime package (to avoid having multiple copies of the same source in different runtime support packages for different ISAs.
XDCspec declarations sourced in ti/targets/rts6000/package.xdc
requires xdc.runtime;
package ti.targets.rts6000 [1, 0, 0] {
    module Settings;
    // Collection of parameters relevant for this package as a whole
}
generated on Sun, 25 Nov 2018 22:21:06 GMT


module ti.targets.rts6000.Settings
index URL

Collection of parameters relevant for this package as a whole

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in ti/targets/rts6000/Settings.xdc
#include <ti/targets/rts6000/Settings.h>
Functions common to all target modules
Settings_Module_getMask// Returns the diagnostics mask for this module, Settings_Module_hasMask// Test whether this module has a diagnostics mask, Settings_Module_heap// The heap from which this module allocates memory, Settings_Module_id// Get this module's unique id, Settings_Module_setMask// Set the diagnostics mask for this module, Settings_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Settings_Module_id();
// Get this module's unique id
Bool Settings_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Settings_Module_heap();
// The heap from which this module allocates memory
Bool Settings_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Settings_Module_getMask();
// Returns the diagnostics mask for this module
Void Settings_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in ti/targets/rts6000/Settings.xdc
var Settings = xdc.useModule('ti.targets.rts6000.Settings');
module-wide config parameters
     Settings.bootOnly// Allow supplying only the boot code library = Bool false;
     Settings.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Settings.bootOnly // module-wide
index URL

Allow supplying only the boot code library

Configuration settings
Settings.bootOnly = Bool false;
DETAILS
This package can supply the boot code and the library with the implementation of xdc.runtime modules. If this parameter is set to true, only the boot code is supplied. Otherwise, both the boot code and the xdc.runtime implementation are supplied.
metaonly config Settings.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Settings.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:21:06 GMT


package xdc
index URL

Core interfaces and modules necessary for the XDC runtime

  • DETAILS
  • USAGE
  • STANDARD TYPES
  • 64 BIT TYPES
  • PREDEFINED MACROS
  • SEE
  • THROWS
In addition to the interfaces specified below, this package also supplies a C/C++ header, std.h that facilitates the creation of portable sources. This header defines a set of "base" types that enable the creation of C-code that is portable between any two targets. C source code that relies exclusively on these types is portable to all targets and platforms. Where appropriate, the types defined below are related to the types defined in the library headers prescribed by the C99 standard (ISO/IEC 9899:1999). [ more ... ]
XDCspec declarations sourced in xdc/package.xdc
package xdc [1, 1, 1] {
    interface IPackage;
    // Base interface implemented by all packages
    module Warnings;
    // Conditional warnings manager
}
DETAILS
In addition to the interfaces specified below, this package also supplies a C/C++ header, std.h that facilitates the creation of portable sources. This header defines a set of "base" types that enable the creation of C-code that is portable between any two targets. C source code that relies exclusively on these types is portable to all targets and platforms. Where appropriate, the types defined below are related to the types defined in the library headers prescribed by the C99 standard (ISO/IEC 9899:1999).
Why not simply use the C99 types? Having a unique set of names provides a layer of insulation between a portable code base and a particular compiler; e.g., even if a compiler does not support the C99 types or defines them inappropriately for a particular device, it is possible to use the compiler without changing the code base. Thus, the developer is not forced to choose the lesser of two evils: waiting for a change to the compiler or forking the code base for a particular compiler device combination.
There are several situations where a small separate set of portable types can help the maintainability of a code base.
  • not all of the types described in the C99 standard are required to be defined by conformant implementations nor is it possible for all devices to implement some of the types specified (e.g., int8_t is not implemented on C54 devices); so it is difficult to identify non-portable source code.
  • not all compilers provide C99 type support; if XDC supplies the type definition and the compiler is updated to include C99 types, a compilation error will occur if the source includes the C99 headers.
  • not all compiler and device combinations are conformant; even high quality compilers may not properly define the types for each device supported by compiler.
USAGE
      #include <xdc/std.h>
To compile sources that include xdc/std.h, two symbols must be defined before including this header:
xdc_target_types__
the package qualified path of the target's standard types header; e.g., ti/targets/std.h. This value is specified in the target's stdInclude config parameter; see xdc.bld.ITarget.stdInclude
xdc_target_name__
the target's module name without the package prefix; e.g., C64 rather than ti.targets.C64.
For example, to compile sources for the ti.targets.C64 target using TI's cl6x compiler, the following command line is sufficient:
      cl6x -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
Each of the type names below has an equivalent "long name"; i.e., a name that has an "xdc_" prefix. For example, the type Bool can also be written as "xdc_Bool". Long names exist to avoid conflicts with names defined or used by existing code bases.
In the event that one of the short type names below conflicts with another type name (that can not be changed), it is possble to disable the short names by defining the symbol xdc__nolocalnames before including xdc/std.h.
      #define xdc__nolocalnames
      #include <xdc/std.h>
There are two other symbols that affect the definitions provided by std.h: xdc__strict and xdc__deprecated_types. These symbols, like xdc__nolocalnames, enable you to easily control the definitions provided std.h. In this case, however, these symbols are used to manage the deprecation of symbols provided in earlier releases. For more information about when to use these symbols, see Disabling and Enabling Deprecated Definitions`.
STANDARD TYPES
This header may be included multiple times and defines the following target-dependent types:
Bool
this type is large enough to hold the values 0 or 1. The constants TRUE and FALSE are of this type; see below.
String
this type is defined to be a char * and exists to allow code to distinguish between pointers to buffers of raw data and '\0' terminated strings.
CString
this type is defined to be a const char * and exists to allow code to distinguish between pointers to a modifiable '\0' terminated sequence of characters (i.e., a String) and one that is not modifiable (e.g., a literal string such as "hello world\n").
Intn, where n = 8, 16, or 32
signed integer type that is large enough to hold n bits; the actual target type may by be larger than n. This type is equivalent to one of the C99 types int_leastn_t or int_fastn_t; see Section 7.18.
UIntn, where n = 8, 16, or 32
unsigned integer type that is large enough to hold n bits; the actual target type may by be larger than n. This type is equivalent to one of the C99 types uint_leastn_t or uint_fastn_t; see ISO/IEC 9899:1999 Section 7.18.
Bitsn, where n = 8, 16, or 32
unsigned integer type that is precisely n bits. Not all targets support all values of n; if the target does not support an exact size the corresponding type is not defined. This type is equivalent to the corresponding C99 type uintn_t; see ISO/IEC 9899:1999 Section 7.18.
Fxn
this type is a pointer to code; it can hold a pointer to any function.
Ptr
this type is a pointer to data; it can hold a pointer to any data structure.
IArg
this integer type is large enough to hold a Fxn, Ptr, or Int.
UArg
this unsigned integer type is large enough to hold a Fxn, Ptr, or Int.
LLong
this long integer type is large enough to hold a Long and is defined as a 'long long' type on targets that support this type; otherwise, it is simply a Long. Note that C99 requires the long long type to be at least 64-bits wide (See ISO/IEC 9899:1999 Section 5.2.4.2.1). But some compilers do not support 64-bit integral types and some don't support the long long even though they do support 64-bit integral types. Since these variations limit the portability of valid C sources, the LLong type is always defined, is always at least as wide as the Long type, and is at least 64-bits wide for targets that support 64-bit integral types.
ULLong
this unsigned long integer type is large enough to hold a ULong and is defined as a 'unsigned long long' type on targets that support this type; otherwise, it is simply a ULong.
The xdc/std.h header also defines the following aliases for the base C types. These aliases exist so that C sources can consistently follow a naming convention in which all type names are written in camel-case.
Char and UChar
aliases for char and unsigned char, respectively
Short and UShort
aliases for short and unsigned short, respectively
Int and UInt
aliases for int and unsigned int, respectively
Long and ULong
aliases for long and unsigned long, respectively
Double and LDouble
aliases for double and long double, respectively
SizeT
alias for size_t
VaList
alias for va_list
The types above are defined for all targets. Some targets can support the following additional types. Since these types are not always supported by a target, these types should only be used when no other type sufficies.
Bitsn, where n = 8, 16, or 32
this unsigned integer type is precisely n-bits wide. This type is equivalent to the optional C99 type uintn_t; see ISO/IEC 9899:1999 Section 7.18.1.1. This type is defined if and only if the preprocessor macro xdc__BITSn__ is defined.
64 BIT TYPES
Although the C99 standard requires support for 64-bit types, not all compiler/device combinations can usefully support them. As a result, the 64-bit types described here may not be defined for all targets. For each type there is a corresponding pre-processor macro which is defined if and only if the type is supported.
Int64
signed integer type that is large enough to hold 64 bits; the actual target type may by be wider than 64 bits. This type is equivalent to one of the C99 types int_least64_t or int_fast64_t; see Section 7.18. This type is defined if and only if the preprocessor macro xdc__INT64__ is defined.
UInt64
unsigned integer type that is large enough to hold n bits; the actual target type may by be wider than 64 bits. This type is equivalent to one of the C99 types uint_least64_t or uint_fast64_t; see ISO/IEC 9899:1999 Section 7.18. This type is defined if and only if the preprocessor macro xdc__INT64__ is defined.
Bits64
unsigned integer type that is precisely 64 bits wide. If the target does not support an exact 64-bit size, this type is not defined. This type is equivalent to the corresponding C99 type uint64_t; see ISO/IEC 9899:1999 Section 7.18. This type is defined if and only if the preprocessor macro xdc__BITS64__ is defined.
PREDEFINED MACROS
In addition to the type definitions above, xdc/std.h also defines the following commonly used constants
NULL
defined as 0
TRUE
defined as ((Bool)1)
FALSE
defined as ((Bool)0)
Finally, xdc/std.h defines the following target-independent symbols that have target-dependent values; these predefined macros enable conditional compilation of source files based on target-specific attributes.
{c_target_name}
this symbol (the target's fully qualified name with all '.'s replaced with '_') is always defined and allows one to easily include target-specific headers or define symbols with target-specific values.
xdc_target__isaCompatible_{isa_name}
for every ISA named in the array returned by this target's xdc.bld.ITarget.getISAChain() method, a symbol of this name is defined. In addition to enabling one to create code specific to a particular ISA, this allows one to create code that depends on TI's C6x architecture without being dependent on a particular member of the C6x family, for example.
xdc_target__isa_{isa}
this symbol is always defined and {isa} is the target's isa (see xdc.bld.ITarget.isa).
xdc_target__{little,big}Endian
if this target's xdc.bld.ITarget.model.endian property is specified, this symbol is defined and {little,big} is replaced by model.endian.
xdc_target__{code_model_name}Code
if this target's xdc.bld.ITarget.model.codeModel is specified, this symbol is defined and {code_model_name} is replaced by model.codeModel.
xdc_target__{data_model_name}Data
if this target's xdc.bld.ITarget.model.dataModel is specified, this symbol is defined and {data_model_name} is replaced by model.dataModel.
xdc_target__os_{os_name}
this symbol is always defined and {os_name} is the target's os name (see xdc.bld.ITarget.os).
xdc_target__sizeof_{type_name}
this symbol is defined for each type name supported in the target's xdc.bld.ITarget.stdTypes structure, {type_name} is the name of one of the standard types supported above, and the value is sizeof(type_name).
xdc_target__alignof_{type_name}
this symbol is defined for each type name supported in the target's xdc.bld.ITarget.stdTypes structure, {type_name} is the name of one of the standard types supported above, and the value is the alignment required by the compiler for {type_name}.
xdc_target__bitsPerChar
this symbol is always defined and specifies the number of bits in the target's char. This value combined with the xdc_target__sizeof_ values allows C code to determine the precise number of bits in any of the standard types.
SEE
ISO-IEC JTC1-SC22-WG14 - C Approved standards
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.PACKAGE_NOT_FOUND
This error is reported whenever a specified package is not found This may happen for the following reasons:
  • Ensure that the package in question is contained in one of the repositories named in the package path.
  • The package has not been built by the xdc tool even though the physical package directory may be present along the package path
xdc.FILE_NOT_FOUND
This error is reported when a specified file is not found. Ensure that any directory name prefix in the name is a package directory contained in one of the repositories named in the package path. For example, if "ti/targets/linkcmd.xdt" can't be found, make sure the directory ti/targets/ is contained in at least one repository named in the package path.
xdc.MODULE_NOT_FOUND
This error is reported when a specified module can't be found. Ensure that the package containing the module in question is contained in at least one repository named in the package path. Also ensure that the module name is qualified with the package name. For example, to refer to the module Engine in the package ti.sdo.ce, the module name should be specified as ti.sdo.ce.Engine.
xdc.TOOL_USAGE_ERROR
This error may happen when the xs tool is not passed the expected command line arguments.
xdc.MODULE_UNDEFINED_MAIN_FUNCTION
This error is reported when the xs tool is passed a module that does not define a main function. Ensure that the meta-domain implementation of the module has a main function.
xdc.SPEC_FILE_ERROR
This error is reported when there is a parsing error in a specification file. Check the spec. file for syntax errors.
xdc.DEPRECATED_FUNCTION
This error is reported whenever a deprecated function is called.
xdc.STATIC_INSTANCE
This error is reported when a function create() is called at the configuration time for a module that does not implement the function instance$static$init and therefore does not support static instances.
generated on Sun, 25 Nov 2018 22:18:53 GMT


interface xdc.IPackage

metaonly interface xdc.IPackage
index URL

Base interface implemented by all packages

  • DETAILS
  • NOTE
If a package does not specify a function declared in IPackage, the default defined in this package is used. [ more ... ]
XDCspec summary sourced in xdc/IPackage.xdc
metaonly interface IPackage { ...
XDCspec declarations sourced in xdc/IPackage.xdc
package xdc;
metaonly interface IPackage {
module-wide constants & types
    metaonly struct BuildAttrs// Package-level attributes from the Build Object Model (BOM) {
        String libraries// array of archive names produced by this pkg[];
         IPackage.LibDesc libDesc// desriptors for elements in libraries[string];
        Any getLibs// getLibs function defined by build script;
    };
    metaonly struct LibDesc// Library properties from the Build Object Model (BOM) {
        String target// target name;
        String suffix// suffix property of the named target;
    };
module-wide config parameters
    config IPackage.BuildAttrs build// The package information from the Build Object Model (BOM);
    config String packageBase// The absolute path to the package's "base" directory;
    config String packageRepository// The absolute path to the repository containing the package;
    config String profile// The profile requested by a configuration script;
module-wide functions
     function close// Close this package after user scripts complete();
     function exit// Exit this package after the model has been successfully validated();
     function getLibs// Get the libraries necessary to use this package(prog);
     function getSects// Get package-specific linker section data();
     function init// Initialize this package when first imported();
     function validate// Validate this package after the model's state is "sealed"();
}
DETAILS
If a package does not specify a function declared in IPackage, the default defined in this package is used.
Packages must implement IPackage functions in the package's package.xs file. This file simply defines a function with the same name as that declared in the the this specification. For example, to implement the getLibs() function the following must appear in the package's package.xs file:
      function getLibs(prog)
      {
           ...
      }
NOTE
Since most IPackage functions can be called in any model, any access to global variables specific to a particular object model should happen only if the function is called in the context of that model. For example, the variable Program is a global variable in the Configuration Model (xdc.cfg.Program). Any access to it should happen after a check that the current model is the Configuration Model:
      if (xdc.om.$name == "cfg") {
          print(Program.build.target.name);
      }
For additional information about xdc.om, see xdc.om in the XDCscript Language Reference.
struct IPackage.BuildAttrs
index URL

Package-level attributes from the Build Object Model (BOM)

XDCspec declarations sourced in xdc/IPackage.xdc
metaonly struct BuildAttrs {
    String libraries[];
    // array of archive names produced by this pkg
     IPackage.LibDesc libDesc[string];
    // desriptors for elements in libraries
    Any getLibs;
    // getLibs function defined by build script
};
FIELDS
getLibs — the JavaScript function that should be used when the package participates in a program configuration script. This field contains the function specified by a package's build script
libraries — an array of archive names created by this package. Each name is a package-relative file name of an archive within the package.
libDesc — a map of library descriptors. This map is indexed by names that appear in the libraries array.
DETAILS
This structure defines a set of package-level attributes that are carried forward from the Build Model into the Configuration Model.
struct IPackage.LibDesc
index URL

Library properties from the Build Object Model (BOM)

XDCspec declarations sourced in xdc/IPackage.xdc
metaonly struct LibDesc {
    String target;
    // target name
    String suffix;
    // suffix property of the named target
};
FIELDS
target — target for which the library was built.
suffix — the suffix associated with the named target.
DETAILS
This structure defines library properties that are carried forward from the Build Model into the Configuration Model.
config IPackage.build // module-wide
index URL

The package information from the Build Object Model (BOM)

XDCspec declarations sourced in xdc/IPackage.xdc
config IPackage.BuildAttrs build;
READONLY
This parameter is set when the package is first loaded and should not be modified by any other script.
config IPackage.packageBase // module-wide
index URL

The absolute path to the package's "base" directory

XDCspec declarations sourced in xdc/IPackage.xdc
config String packageBase;
DETAILS
This parameter contains an absolute path to the directory containing the package's build script (package.bld). For example, if the package ti.bios is located in c:/packages/ti/bios, then packageBase equals c:/packages/ti/bios/.
To be robust, clients should not assume that this string ends with a directory separator.
READONLY
This parameter is set when the package is first loaded and should not be modified by any other script.
config IPackage.packageRepository // module-wide
index URL

The absolute path to the repository containing the package

XDCspec declarations sourced in xdc/IPackage.xdc
config String packageRepository;
DETAILS
This parameter contains an absolute path to the directory containing the full directory namespace of the package. For example, if the package ti.bios is located in c:/packages/ti/bios, then packageRepository equals c:/packages/.
To be robust, clients should not assume that this string ends with a directory separator.
READONLY
This parameter is set when the package is first loaded and should not be modified by any other script.
config IPackage.profile // module-wide
index URL

The profile requested by a configuration script

XDCspec declarations sourced in xdc/IPackage.xdc
config String profile;
DETAILS
This parameter is set by configuration scripts to convey additional information to the package about the libraries being requested from this package; in particular, it names a specific profile supported by this package (see xdc.bld.ITarget.profiles).
Package getLibs() functions should refer to this parameter in lieu of the program's build.profile. This allows configuration scripts to selectively request debug or release libraries on a per package basis, for example.
  function getLibs(prog)
  {
      if (this.profile == "debug") {
          ...
      }
  }
If this parameter is not set by the configuration script, it is initialized to xdc.cfg.Program.build.profile prior to generating and configuration files; i.e., the package's getLibs() function can assume that this field is always set and defaults to the profile used to build the executable.
IPackage.close() // module-wide
index URL

Close this package after user scripts complete

XDCspec declarations sourced in xdc/IPackage.xdc
function close();
DETAILS
This function is called to allow the package to modify its state based on the results of the user's script. It can optionally redefine configuration parameters or even throw exceptions to prevent the configuration step from completing, for example.
Other packages and modules, including the modules in the package, can change the configuration parameters of any module in the package, after this function was called. Therefore, this function cannot be used to validate state of the package and of the whole configuration. Validation should be done in validate().
For all packages A and B, if A requires B, then package A is closed before package B.
The default implementation of this function is a nop.
CONTEXT
this
The current package's xdc.IPackage.Module object immediately after the program's configuration script has completed and before validation is started.
RETURNS
Returns nothing.
THROWS
Error exceptions are thrown for fatal errors.
NOTE
This function can be called in any model, so any access to global variables specific to a particular object model should happen only if the function is called in the context of that model. For example, the variable Program is a global variable in the Configuration Model (xdc.cfg.Program). Any access to it should happen after a check that the current model is the Configuration Model:
      if (xdc.om.$name == "cfg") {
          print(Program.build.target.name);
      }
For additional information about xdc.om, see xdc.om in the XDCscript Language Reference.
IPackage.exit() // module-wide
index URL

Exit this package after the model has been successfully validated

XDCspec declarations sourced in xdc/IPackage.xdc
function exit();
DETAILS
The default implementation of this function is a nop.
CONTEXT
this
The current package's xdc.IPackage.Module object immediately after the program's configuration script has completed and after generation has completed.
RETURNS
Returns nothing.
THROWS
Error exceptions are thrown for fatal errors.
NOTE
This function can be called in any model, so any access to global variables specific to a particular object model should happen only if the function is called in the context of that model. For example, the variable Program is a global variable in the Configuration Model (xdc.cfg.Program). Any access to it should happen after a check that the current model is the Configuration Model:
      if (xdc.om.$name == "cfg") {
          print(Program.build.target.name);
      }
For additional information about xdc.om, see xdc.om in the XDCscript Language Reference.
IPackage.getLibs() // module-wide
index URL

Get the libraries necessary to use this package

XDCspec declarations sourced in xdc/IPackage.xdc
function getLibs(prog);
ARGUMENTS
prog — the configuration model program object (xdc.cfg.Program) after the program's configuration script has completed.
DETAILS
This function is called during the configuration model's generation phase (after a program's configuration script completes and all imported packages are closed) and is responsible for returning a list of libraries (or object files) that are needed to link the program being configured.
If the package produces one (or no) library for the target for which the executable is being built, the default implementation of this function simply returns the name of this library (or null).
If the package produces more than one library for the given target, the default implementation of this function returns the following library name:
          lib/<package_name>.a<target_suffix>
where <package_name> is the name of the package (e.g., "ti.bios") and <target_suffix> is the xdc.bld.ITarget.suffix property of the target used to build the executable.
CONTEXT
this
The current package's xdc.IPackage.Module object after the program's configuration script has completed.
Program
The Configuration model program object (xdc.cfg.Program) after the program's configuration script has completed.
RETURNS
Returns a string of ';' delimited object (or library) file names that are added to the list of things to link to create the program. The file names are absolute or relative to the package's base. All white space is treated as part of the file name.
If the files named do not exist, a fatal error occurs and configuration terminates. However, if the file name begins with a '!' character, this character is removed, the remaining name will be assumed to be correct, and the configuration will not fail just because the file does not (yet) exist. This allows getLibs() to return the name of a file that will be created anytime after the configuration step completes.
If null or empty ("") is returned, no libraries or objects are required for this package.
THROWS
Error exceptions are thrown for fatal errors.
IPackage.getSects() // module-wide
index URL

Get package-specific linker section data

XDCspec declarations sourced in xdc/IPackage.xdc
function getSects();
DETAILS
This function is called during the configuration model's generation phase (after a program's configuration script completes) and is responsible for returning a template file name that is used to generate package-specific linker command file statements.
This function is called by the linker command file template. By default, the template file is specified by a RTSC target's package and all such template files invoke getSects(). However, the configuration parameter xdc.cfg.Program.linkTemplate allows users to replace the default template with a custom template file, which may or may not invoke getSects. It is not recommended to create template files that don't invoke getSects(), but no checking is done. Therefore, it is possible that getSects() may not be called in such cases.
CONTEXT
this
The current package's xdc.IPackage.Module object after the program's configuration script has completed.
Program
The Configuration model program object (xdc.cfg.Program) after program's configuration script has completed and all packages have validated the correctness of the configuration.
RETURNS
Returns the path name of template file. The path name must be relative to the package path or be an absolute path.
If null is returned, no data is generated.
The template is evaluated in a context where the this pointer is the package object.
THROWS
Error exceptions are thrown for fatal errors.
IPackage.init() // module-wide
index URL

Initialize this package when first imported

XDCspec declarations sourced in xdc/IPackage.xdc
function init();
DETAILS
This function is called to initialize the package within any model. It is called just once (when the package is first imported) so there is no need to explicitly check for prior invocation.
The default implementation of this function is a nop.
CONTEXT
this
The current package's xdc.IPackage.Module object before any model-specific user script runs (e.g. a program's configuration script), after the package's package.xs script is run and all the package's modules are created, and before the package is added to xdc.om.$packages (the Object Model's package array)
RETURNS
Returns nothing.
THROWS
Error exceptions are thrown for fatal errors.
NOTE
This function can be called in any model, so any access to global variables specific to a particular object model should happen only if the function is called in the context of that model. For example, the variable Program is a global variable in the Configuration Model (xdc.cfg.Program). Any access to it should happen after a check that the current model is the Configuration Model:
      if (xdc.om.$name == "cfg") {
          print(Program.build.target.name);
      }
For additional information about xdc.om, see xdc.om in the XDCscript Language Reference.
IPackage.validate() // module-wide
index URL

Validate this package after the model's state is "sealed"

XDCspec declarations sourced in xdc/IPackage.xdc
function validate();
DETAILS
This function is called to validate the package's state in the curent model. It can verify semantic constraints and optionally throw exceptions to prevent the configuration step from completing.
For example, a package that needs to assert incompatibility with certain versions of prerequisite packages can check the versions in this function and throw an exception if they are known to be incompatible with the current package.
This method must not modify the model.
The default implementation of this function is a nop.
CONTEXT
this
The current package's xdc.IPackage.Module object immediately after the program's configuration script has completed and before generation started.
RETURNS
Returns nothing.
THROWS
Error exceptions are thrown for fatal errors.
NOTE
This function can be called in any model, so any access to global variables specific to a particular object model should happen only if the function is called in the context of that model. For example, the variable Program is a global variable in the Configuration Model (xdc.cfg.Program). Any access to it should happen after a check that the current model is the Configuration Model:
      if (xdc.om.$name == "cfg") {
          print(Program.build.target.name);
      }
For additional information about xdc.om, see xdc.om in the XDCscript Language Reference.
generated on Sun, 25 Nov 2018 22:18:53 GMT


module xdc.Warnings

metaonly module xdc.Warnings
index URL

Conditional warnings manager

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/Warnings.xdc
var Warnings = xdc.useModule('xdc.Warnings');
module-wide constants & types
    const Warnings.LOGID// Multiple Log events with the same ID = {
    var obj = new Warnings.Warning// Warning descriptor;
        obj.id = Int ...
        obj.msg = String ...
    var obj = new Warnings.WarningParams// Structure passed to $logWarning;
        obj.warning = Warnings.Warning ...
        obj.args = String[] ...
module-wide functions
     Warnings.disable// Internal function that disables warnings(String[] ids) returns Void
     Warnings.getMessage// Internal function that creates an actual output message(Warnings.WarningParams prms) returns String
NODOC
This module declares all warnings generated by the packages in the xdc.* name space. Each warning is identified with an ID, a positive integer number. A warning message allows conversion specifiers that can be replaced with actual strings at the time a warning message is generated. The purpose of IDs is to let users find warning documentation in this module and also to allow warnings to be disabled based on their IDs.
const Warnings.LOGID
index URL

Multiple Log events with the same ID

Configuration settings
const Warnings.LOGID = {
DETAILS
If two Log events share a message, they are automatically assigned the same ID because IDs also serve as pointers to an array that holds a compact representation of message strings. To avoid duplication of strings, if a string already exists in the array, the ID of the existing copy is used.
This warning can be useful for package producers who unintentionally declare two events with the same message, which could be combined into one common Log event.
struct Warnings.Warning
index URL

Warning descriptor

Configuration settings
var obj = new Warnings.Warning;
    obj.id = Int ...
    obj.msg = String ...
DETAILS
Warnings are defined as instances of this structure, and also that's how the warnings are kept internally.
struct Warnings.WarningParams
index URL

Structure passed to $logWarning

Configuration settings
var obj = new Warnings.WarningParams;
    obj.warning = Warnings.Warning ...
    obj.args = String[] ...
DETAILS
Currently, the only parameter assigned to a warning is an array of strings to replace conversion specifiers in Warnings. In the future, a caller can identify a module where the warning is defined, which will allow any package to introduce new warnings.
Warnings.disable() // module-wide
index URL

Internal function that disables warnings

Configuration settings
Warnings.disable(String[] ids) returns Void
ARGUMENTS
ids — array of IDs
Warnings.getMessage() // module-wide
index URL

Internal function that creates an actual output message

Configuration settings
Warnings.getMessage(Warnings.WarningParams prms) returns String
ARGUMENTS
prms — WarningParams structure passed by the warning generation code
generated on Sun, 25 Nov 2018 22:18:53 GMT


package xdc.bld
index URL

The XDC Build Model

  • DETAILS
  • NOTE
  • THROWS
This package contains the XDC Build Model and the interfaces necessary to extend the Build Model to handle new compiler tool chains. The modules in this package (and the instances managed by these modules) form the Build Object Model (BOM). [ more ... ]
XDCspec declarations sourced in xdc/bld/package.xdc
requires xdc.services.global;
requires xdc.services.intern.cmd;
package xdc.bld [1, 0, 2] {
    interface ITarget;
    // The interface between code generation tool-chains and the XDC Build Engine
    interface ITarget2;
    // Extension of the interface xdc.bld.ITarget
    interface ITarget3;
    // Extension of the interface xdc.bld.ITarget3
    interface ITargetFilter;
    // User-supplied filter of a target's command set
    module BuildEnvironment;
    // Global build environment
    module Executable;
    // Model of a file that can be loaded and executed on a platform
    module Library;
    // Model of a searchable collection of object files
    module Manifest;
    // The manifest object for the release file post-processing model
    module Object;
    // Model of a compiled (or assembled) form of a source file
    module PackageContents;
    // Package container populated by a build script
    module Release;
    // Model of an archive of all files that are part of a release
    module Repository;
    // Model of a package repository
    module Script;
    // Model of a script
    module Test;
    // Model of a test
    module Utils;
    // Utility functions to simplify creation of targets and platforms
}
DETAILS
This package contains the XDC Build Model and the interfaces necessary to extend the Build Model to handle new compiler tool chains. The modules in this package (and the instances managed by these modules) form the Build Object Model (BOM).
This model enables build scripts to declare the contents of each release of a package. Based on these manifests, the Build Engine generates makefiles that build the specified object files, libraries, and executables, and archive these files into specified release files. In addition, the generated makefiles are also capable of running collections of executables with command line arguments (provided that the platforms support this); e.g., regression tests.
NOTE
User supplied file names of source files, generated libraries and executables must be limited to portable POSIX file names. That means that only alphanumeric charaters, and '_', '.', and '-' are allowed.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.bld.TARGET_CONFIG_ERROR
This error is reported whenever there is an error in the target configuration file. Check the configuration script for errors.
xdc.bld.ROOTDIR_NOT_SET
This error is reported when the rootDir property for a target has not been set in the target configuration script. Ensure that this property is set correctly in the configuration script.
xdc.bld.PLATFORM_NOT_SET
This error is reported when either 1) the platform property for a target has not been set in the target specification or the target configuration script (config.bld) or 2) the build script (package.bld) is setting the platform for a program to an invalid value.
xdc.bld.DUPLICATE_TARGET_ERROR
This error is reported when a same target is listed twice in Bld.targets. Check xdc.bld.BuildEnvironment.targets to find out how Bld.targets is constructed.
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.BuildEnvironment

metaonly module xdc.bld.BuildEnvironment
index URL

Global build environment

  • Configuration settings
  • Individual elements
This module defines a global object (aliased as 'Build' in build scripts) which is configured by a build "startup" script and read by package build scripts. [ more ... ]
Configuration settings sourced in xdc/bld/BuildEnvironment.xdc
var BuildEnvironment = xdc.useModule('xdc.bld.BuildEnvironment');
module-wide constants & types
    values of type BuildEnvironment.HostOS// An enumeration of all supported development hosts
        const BuildEnvironment.WINDOWS// Win32 Intel development host;
        const BuildEnvironment.SOLARIS// SUN OS 5.x development host;
        const BuildEnvironment.LINUX// Linux development host;
        const BuildEnvironment.MACOS// MacOS development host;
module-wide config parameters
    const BuildEnvironment.hostOS// Enumerated constant that identifies the host OS that is executing the build script = BuildEnvironment.HostOS computed value;
    const BuildEnvironment.hostOSName// The name of the development host = String computed value;
     BuildEnvironment.excludeTargets// A set of targets to exclude from the set specified by useTargets = String undefined;
     BuildEnvironment.nativeTarget// A target that defines the "native" target = ITarget.Module null;
     BuildEnvironment.platformTable// A map of platform instance names to the parameters used to create them = Any[string] [ ];
     BuildEnvironment.targets// Array of all targets that are supported for the current build = ITarget.Module[] undefined;
     BuildEnvironment.useTargets// The set of targets to use if the targets array is empty = String undefined;
module-wide functions
     BuildEnvironment.getReleaseDescs// Return a description of all releases for the specified package(String pname) returns Release.Desc[]
DETAILS
This module defines a global object (aliased as 'Build' in build scripts) which is configured by a build "startup" script and read by package build scripts.
This module's configuration parameters are initialized by a "startup" script that is run prior to running a package's build script (package.bld). This script (often named "config.bld") is responsible for specifying the the xdc.bld.ITarget.rootDir configuration parameter of all targets that appear in the targets array; the rootDir configuration parameter specifies the absolute path to the installation directory of the compiler used to build for the specified target. Typically one startup script is used to establish an environment for multiple packages.
Note: it does not matter if you do not have tools for all the targets mentioned in the startup script; if you do not build for a target, its setting in the startup script is irrelevant.
The startup script may configure this module as a function of the following global variables that exist before this script runs:
environment
a hash table of environment strings
arguments
an array of string arguments to the config.bld script initialized as follows: arguments[0] - the file name of the config.bld script; arguments[1] - the first argument specified in XDCARGS; ...; arguments[n] - the nth argument in XDCARGS.
Build
an alias for this module (xdc.bld.BuildEnvironment) The following parameters of this object are initialized before the startup script runs: hostOS - HostOS enumeration identifier; hostOSName - "Windows", "Linux", "MacOS" or "Solaris"
Pkg
an alias for this module (xdc.bld.PackageContents) The following parameters of this object are initialized before the startup script runs: PackageContents.name - the name of the current package; PackageContents.modules - array of module names supplied by this package; and PackageContents.interfaces - array of interface names supplied by this package
When you build a package, the xdc command looks for the startup file using the following algorithm:
  1. if XDCBUILDCFG is defined on the xdc command line, its value is used;
  2. if config.bld exists in the current directory, this file is used;
  3. if XDCBUILDCFG is defined as an environment variable, its value is used;
  4. if config.bld exists along the package path (i.e. in $XDCPATH followed by the current package's repository), the first such file is used;
  5. if $XDCROOT/config.bld exists this file is used;
  6. if $XDCROOT/etc/config.bld exists, this file is used; and finally
  7. if no "startup file" can be found above, a fatal error is reported and the xdc command terminates with a non-zero exit status.
enum BuildEnvironment.HostOS
index URL

An enumeration of all supported development hosts

Configuration settings
values of type BuildEnvironment.HostOS
    const BuildEnvironment.WINDOWS;
    // Win32 Intel development host
    const BuildEnvironment.SOLARIS;
    // SUN OS 5.x development host
    const BuildEnvironment.LINUX;
    // Linux development host
    const BuildEnvironment.MACOS;
    // MacOS development host
SEE
hostOS
config BuildEnvironment.hostOS // module-wide
index URL

Enumerated constant that identifies the host OS that is executing the build script

Configuration settings
const BuildEnvironment.hostOS = BuildEnvironment.HostOS computed value;
DETAILS
Note that host OS at the time the makefiles are created may be different from the host OS at the time sources are compiled!
config BuildEnvironment.hostOSName // module-wide
index URL

The name of the development host

Configuration settings
const BuildEnvironment.hostOSName = String computed value;
DETAILS
One of the strings: "Windows", "Solaris", "Linux", "MacOS". This name is name of the host OS that is executing the package's build script.
config BuildEnvironment.excludeTargets // module-wide
index URL

A set of targets to exclude from the set specified by useTargets

Configuration settings
BuildEnvironment.excludeTargets = String undefined;
DETAILS
This string parameter is a single regular expression used to exclude targets from the set specified by useTargets (or XDCTARGETS).
If targets is initialized by the build model's configuration script (i.e., has length > 0) this parameter is ignored.
If this string is null or undefined, nothing is excluded from list specified by useTargets or the environment variable XDCTARGETS.
SEE
useTargets, nativeTarget
config BuildEnvironment.nativeTarget // module-wide
index URL

A target that defines the "native" target

Configuration settings
BuildEnvironment.nativeTarget = ITarget.Module null;
DETAILS
This parameter allows build scripts to refer to the "native" target without explicitly naming the target.
For example, a package.bld script may add a library via:
      Pkg.addLibrary("lib", Build.nativeTarget);
In addition, it is possible to use "native" in XDCTARGETS or useTargets to specify that nativeTarget be added to the targets array. Thus, it is possible to use the following command on *any* host to build for that host:
      xdc XDCTARGETS=native
If this parameter is not set by the build model's configuration script, it is initialized to an appropriate default native target:
  • microsoft.targets.Win32 for Windows hosts;
  • gnu.targets.Sparc for Solaris hosts; and
  • gnu.targets.Linux86 for Linux hosts.
config BuildEnvironment.platformTable // module-wide
index URL

A map of platform instance names to the parameters used to create them

Configuration settings
BuildEnvironment.platformTable = Any[string] [ ];
DETAILS
This map allows one to define platform instances that require non-default parameter settings. It also provides a way to publish a set of platforms to be shared among multiple build scripts.
EXAMPLES
The following fragment defines a platform instance named "ti.platforms.sim6xxx:big" that corresponds to a platform instance created by the ti.platforms.sim6xxx.Platform module with the parameters {endian: "big"}:
    Build.platformTable["ti.platforms.sim6xxx:big"] = {endian: "big"};
The following fragment redefines the default platform instance for the platform package ti.platforms.sim6xxx by specifying alternative instance creation parameters.
    Build.platformTable["ti.platforms.sim6xxx"] = {
        endian: "little", verbose: false, ftpath: "c:/ftsuite_1_5",
    };
Some platforms are "software abastractions" that can emulate a large number different physical platforms. In the example below, the ti.platforms.sim6xxx platform package is capable of simulating any TMS320C6xxx device. This particular platform package uses the name of the instance to determine the specific device that it should emulate. So, the fragment below specifies a platform instance named "ti.platforms.sim6xxx:TMS320C6416" that emulates the TMS320C6416 device, in little endian mode.
    Build.platformTable["ti.platforms.sim6xxx:TMS320C6416"] = {
        endian: "little"
    };
Software platform packages, such as the ti.platforms.generic, can even go as far as emulating any device from any "catalog" of devices. In this example, we use the ti.platforms.generic platform package to define an instance named ti.platforms.generic:c6416 that corresponds to a platform containing the TMS320C6416 device specified in the ti.catalog.c6000 package of devices.
    Build.platformTable["ti.platforms.generic:c6416"] = {
        deviceName: "TMS320C6416",
        catalogName: "ti.catalog.c6000",
    };
SEE
ti.catalog.c6000, ti.platforms.generic, ti.platforms.sim6xxx
config BuildEnvironment.targets // module-wide
index URL

Array of all targets that are supported for the current build

Configuration settings
BuildEnvironment.targets = ITarget.Module[] undefined;
DETAILS
This array may be explicitly initialized by the build model's initial configuration script (by default, "config.bld"). For example, the following fragment specifies that just the ti.targets.C64 target should be used:
      // get the ti.targets.C64 module
      var C64 = xdc.module('ti.targets.C64');

      // add the ti.target.C64 module to BuildEnvironment.targets array
      Build.targets[Build.targets.length++] = C64;
Alternatively, this array can be implicitly initialized via the XDCTARGETS environment variable or the useTargets and excludeTargets strings. The targets array is implicitly initialized if and only if the length of this array is 0 after the build model's configuration script completes.
All targets that are in this array *must* have their xdc.bld.ITarget.rootDir property set.
SEE
excludeTargets, useTargets
config BuildEnvironment.useTargets // module-wide
index URL

The set of targets to use if the targets array is empty

Configuration settings
BuildEnvironment.useTargets = String undefined;
DETAILS
useTargets is a string of white space separated target names (i.e., names of modules that implement xdc.bld.ITarget) or regular expression patterns matching target names.
If the Build.targets array is empty at the end of the build model's configuration script, targets specified by this string are added to the build model's targets array.
In addition to module names, the distinguished string "native" is interpreted as an alias for the target specified by the nativeTarget configuration parameter.
Special values:
undefined
use the environment variable XDCTARGETS;
null
initialize the targets array to be empty; and
""
use all TI targets (i.e., "ti.targets\..*").
SEE
excludeTargets, nativeTarget
BuildEnvironment.getReleaseDescs() // module-wide
index URL

Return a description of all releases for the specified package

Configuration settings
BuildEnvironment.getReleaseDescs(String pname) returns Release.Desc[]
ARGUMENTS
pname — name of the package to get the release information from
DETAILS
This function allows a "package of packages" to select appropriate releases from another package based on information provided by that package.
RETURNS
array of xdc.bld.Release.Desc structures that describe the releases specified by pname's build script
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.bld.PACKAGE_NOT_BUILT
This error is reported when a consumer tries to use a package that has not been built. Ensure that the required package has been built by XDCtools.
xdc.bld.INVALID_PACKAGE
This error is reported when a consumer tries to use a corrupted package. Try rebuilding the package causing the problem.
SEE
xdc.bld.Release.Desc
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Executable

metaonly module xdc.bld.Executable
index URL

Model of a file that can be loaded and executed on a platform

  • Configuration settings
  • Individual elements
Executable instances represent executable files. Instances must be created via the xdc.bld.PackageContents.addExecutable() function; this ensures that each executable created appears in the package's manifest and that it properly "inherits" appropriate default attributes from the containing package.
Configuration settings sourced in xdc/bld/Executable.xdc
var Executable = xdc.useModule('xdc.bld.Executable');
module-wide constants & types
    var obj = new Executable.Attrs// Optional attributes for an Executable instance;
        obj.profile// target options profile = String ...
        obj.aopts// asm options for objs added to this exe = String ...
        obj.copts// C/C++ options for objs added to this exe = String ...
        obj.cfgcopts// C/C++ options for the C config file = String ...
        obj.defs// definitions for objs added to this exe = String ...
        obj.incs// include opts for objs added to this exe = String ...
        obj.lopts// linker options for this exe = String ...
        obj.xsopts// xs options for this exe = String ...
        obj.cpuId// optional id of CPU on platform = String ...
        obj.rtsName// optional run time support package name = String ...
        obj.cpuArgs// optional register settings = Any ...
        obj.sharedCfg = String ...
        obj.cfgScript// optional name of config script = String ...
        obj.cfgHome// optional home package of config model = String ...
        obj.cfgArgs// optional arguments passed to cfgScript = String ...
        obj.cfgArgsEncoded// if true, cfgArgs is encoded via escape() = Bool ...
        obj.exportExe// export executable's exe file? = Bool ...
        obj.exportCfg// export executable's config script? = Bool ...
        obj.exportSrc// if true, export exe sources to releases = Bool ...
        obj.releases// releases that this exe is a part of = Release.Instance[] ...
        obj.test// test attrs for tests added to this exe = Test.Attrs ...
        obj.linkTemplate// linker command file template for this exe = String ...
per-instance config parameters
    var params = new Executable.Params// Instance config-params object;
        params.attrs// This executable's optional attributes = Executable.Attrs undefined;
        params.name// Base name of the executable = String undefined;
        params.platform// The name of the platform that will run this executable = String undefined;
        params.target// The target (on a platform) that executable should be built for = ITarget.Module undefined;
per-instance functions
     inst.addObjects// Add specified object to be built and linked into this executable(String[] names, Object.Attrs objAttrs) returns Void
     inst.addTest// Add specified test to executable(Test.Attrs testAttrs) returns Test.Instance
struct Executable.Attrs
index URL

Optional attributes for an Executable instance

Configuration settings
var obj = new Executable.Attrs;
    obj.profile = String ...
    // target options profile
    obj.aopts = String ...
    // asm options for objs added to this exe
    obj.copts = String ...
    // C/C++ options for objs added to this exe
    obj.cfgcopts = String ...
    // C/C++ options for the C config file
    obj.defs = String ...
    // definitions for objs added to this exe
    obj.incs = String ...
    // include opts for objs added to this exe
    obj.lopts = String ...
    // linker options for this exe
    obj.xsopts = String ...
    // xs options for this exe
    obj.cpuId = String ...
    // optional id of CPU on platform
    obj.rtsName = String ...
    // optional run time support package name
    obj.cpuArgs = Any ...
    // optional register settings
    obj.sharedCfg = String ...
    obj.cfgScript = String ...
    // optional name of config script
    obj.cfgHome = String ...
    // optional home package of config model
    obj.cfgArgs = String ...
    // optional arguments passed to cfgScript
    obj.cfgArgsEncoded = Bool ...
    // if true, cfgArgs is encoded via escape()
    obj.exportExe = Bool ...
    // export executable's exe file?
    obj.exportCfg = Bool ...
    // export executable's config script?
    obj.exportSrc = Bool ...
    // if true, export exe sources to releases
    obj.releases = Release.Instance[] ...
    // releases that this exe is a part of
    obj.test = Test.Attrs ...
    // test attrs for tests added to this exe
    obj.linkTemplate = String ...
    // linker command file template for this exe
FIELDS
cfgArgs — This string may contain any expression that can be assigned to a JavaScript property. It is evaluated in the configuration domain after the platform package is imported and just prior to running the executable's configuration script. Its value (after evaluation) is assigned to Program.build.cfgArgs; so, program configuration scripts can use this property to adjust their behavior based on values specified in a build script.
For example, a package's build script might build an executable for each possible level of a "trace" value:
              for (t = 0; t < NUM_TRACE_LEVELS; t++) {
                      :
                  Pkg.addExecutable("myExe" + t, targ, plat, {
                      cfgArgs:   "{traceLevel: " + t + "}",
                      cfgScript: "myExe.cfg"
                  });
              }
In this case, the configuration script myExe.cfg can reference the "trace level" set in the build script by referencing the Program.build.cfgArgs object directly:
              if (Program.build.cfgArgs.traceLevel == 1) {
                  :
              }
cfgArgsEncoded — This boolean flag indicates whether the string cfgArgs should be treated as an encoded string (via ECMA-262 escape()) or not. If this field is true, the string is treated as an encoded string and is decoded via unescape() prior to interpretation.
incs — This string contains include path options used by the compiler (or assembler) to locate include files; e.g., "-I ../../include -I ../c55xx". Note that the syntax of this string may be target dependent.
defs — This string contains options used by the compiler (or assembler) to define macros; e.g., "-D_C6xxx -DDEBUG=1". Note that the syntax of this string may be target dependent.
aopts — This string contains options used by the assembler to produce object files; e.g., "-mP1". Note that the syntax of this string may be target dependent.
copts — This string contains options used by the C/C++ compiler to produce object files; e.g., "-o3 -mi1". Note that the syntax of this string may be target dependent.
cfgcopts — This string contains options used by the C/C++ compiler to compile the generated C config file. If cfgcopts is not specified, either explicitly or through Pkg.attrs.cfgcopts, the options specified in copts are used instead.
lopts — This string contains options used by the linker produce object files; e.g., "-l mylib.lib". Note that the syntax of this string may be target dependent.
xsopts — This string contains options passed to the xs command that's used to run configuration scripts. This option can be used, for example, to define name-value pairs accessible to configuration scripts via the XDCscript global environment hash-table. For example, setting xsopts to "-DFOO=bar" enables the configuration script to get the value of FOO via the expression environment["FOO"]. For more information about XDCscript and environment see The XDCscript Language.
cfgHome — This string names the package that is bound to the Configuration Model's $homepkg. This home package is automatically loaded as part of configuration and, as a result, may contribute libraries to the configuration.
If this parameter is not specified, the package containing the configuration script is used as the home package. This ensures that the results of a configuration script are independent of the package building the configuration. In most cases, the build package is the package containing the configuration script and this distinction is not important. But there are times when it is important to control the home package; e.g., when an external tool generates a configuration script from information supplied by another package or when a configuration script in not in any package.
cfgScript — This string names the program configuration script used to create the files necessary to create the executable. If cfgScript is not specified, the configuration script is assumed to be <name>.cfg, where <name> is the base name of the executable. If cfgScript is set to null, the executable is assumed to be a "legacy" application that defines main() directly and does not require any xdc.runtime support.
If this string is set to a non-null value, and does not have an extension, then the extension ".cfg" is automatically added.
If the specified configuration file does not exist in the package where the executable is being built and the name does not begin with "./", it is searched for along the package path. Thus, it is possible to use configuration scripts in other packages to build executables; e.g., to use the configuration script "myExe.cfg" from a ti.bios.examples.hello package, cfgScript should be set to "ti/bios/examples/hello/myExe.cfg".
The package containing the specified configuration script is imported prior to running the configuration script and this package is used to set xdc.$homepkg; thus, configuration scripts that use xdc.$homepkg will configure the same executable independent of the package building the executable.
profile — This string names a profile defined by the executable's target. The profile specifies a set of compiler, linker, and archiver options that are to be used when producing the executable. Note that these tool options are in addition to any options specified via aopts, copts, etc.
If this field is not set or set to null, the value of xdc.bld.PackageContents.attrs.profile is used. If xdc.bld.PackageContents.attrs.profile is not specified or equal to null, the "release" profile is used.
cpuId — This string is used to uniquely identify the particular CPU on a platform that will run the executable; on platforms that contain a single CPU, this string is ignored.
rtsName — This string names a package that contributes a compiled form of the xdc.runtime runtime support modules.
This package is implicitly loaded prior to running the executable's configuration script. If this field is set to null, no package will be pre-loaded. If this field is not set (or set to undefined), the package specified by this executable's target will be used (see xdc.bld.ITarget.rts) .
cpuArgs — This field is a hash-table of name-value pairs interpreted by the CPU as register settings that exist at the time that the executable is loaded; e.g., it is possible to specify a non-reset value for the PMST register on a C54xx CPU by setting this parameter to {PMST: 0xffff}.
exportCfg — If this field is set to true, the configuration script will be part of the releases named in the releases array. If it is unspecified (or set to null) and the release specifies that configurations are to be exported, the configuration script will be part of the release. In all other cases, the configuration is not part of the release.
exportSrc — If this field is set to true, the sources specified via xdc.bld.Executable.addObjects() will be part of the releases named in the releases array. If it is unspecified (or set to null) and the release specifies that sources are to be exported, the sources will be part of the release. In all other cases, the sources are not added to the release.
exportExe — If this field is set to true, the executable will be part of the releases named in the releases array. If it is unspecified (or set to null) and the release specifies that configurations are to be exported, the executable will be part of the release. In all other cases, the executable is not part of the release.
releases — This array contains releases that will contain the executable. Thus, a single executable can be part of any set of releases. Each executable is always added to the package's "default release" in addition to any releases specified in the releases array.
test — If this field is set, it defines default attributes for tests added to this executable, including the implicitly added test (see xdc.bld.PackageContents.addExecutable).
linkTemplate — If this field is set, it defines the linker command file template to be used to link this executable. This specification may, however, be overridden by the configuration script (see xdc.cfg.Program.linkTemplate).
As with configuration scripts, if the specified file does not exist in the package where the executable is being built and the name does not begin with "./", it is searched for along the package path. Thus, it is possible to use templates in other packages to build executables; e.g., to use the linker command file "myExe.cmd" from the ti.bios.examples.hello package, linkTemplate should be set to "ti/bios/examples/hello/myExe.cmd".
DETAILS
Unspecified attributes are "inherited" from xdc.bld.PackageContents.attrs; i.e., if one of fields in this structure is unspecified *and* this field's name matches a field name in xdc.bld.PackageContents.attrs, then this field's value defaults to the value in specified by xdc.bld.PackageContents.attrs. This mechanism makes it possible to establish package-wide default values for any of the "inherited" attributes.
Suppose, for example, that you want all executable files in this package to be built with the 'release' profile, but one particular file must be built with 'debug' (because it is a source example). The following build script fragment shows how this can be accomplished:
      Pkg.attrs.profile = 'release';
      var exe = Pkg.addExecutable('example', ..., {profile: 'debug'});
SEE
attrs, xdc.bld.PackageContents.Attrs
Instance Config Parameters
index URL

Configuration settings
var params = new Executable.Params;
// Instance config-params object
    params.attrs = Executable.Attrs undefined;
    // This executable's optional attributes
    params.name = String undefined;
    // Base name of the executable
    params.platform = String undefined;
    // The name of the platform that will run this executable
    params.target = ITarget.Module undefined;
    // The target (on a platform) that executable should be built for
config Executable.Params.attrs // instance
index URL

This executable's optional attributes

Configuration settings
var params = new Executable.Params;
...
params.attrs = Executable.Attrs undefined;
DETAILS
These attributes are "inherited" by all objects added to this executable; i.e., any object attribute that is undefined but is defined here will be assigned the value from these attributes.
Similarly, any unspecified attributes that also appear in xdc.bld.PackageContents.Attrs are inherited from xdc.bld.PackageContents.attrs.
SEE
xdc.bld.PackageContents.Attrs
config Executable.Params.name // instance
index URL

Base name of the executable

Configuration settings
var params = new Executable.Params;
...
params.name = String undefined;
DETAILS
This name is used to construct the final executable file name as follows:
      <name>.x<target_suffix>
where <name> is name and <target_suffix> is the suffix defined by each target that the file is built for. See NOTE in xdc.bld for filename rules.
Note: if the same executable is to be built for different platforms (having the same target), then name must "encode" the platform's name.
config Executable.Params.platform // instance
index URL

The name of the platform that will run this executable

Configuration settings
var params = new Executable.Params;
...
params.platform = String undefined;
DETAILS
Platforms are modeled as packages that have a module called "Platform"; thus the platform name is really a package name.
config Executable.Params.target // instance
index URL

The target (on a platform) that executable should be built for

Configuration settings
var params = new Executable.Params;
...
params.target = ITarget.Module undefined;
DETAILS
This parameter is used to determine the target to use for any objects added to the executable.
During configuration, the executable's platform package can validate that the target is compatible with the configuration of the platform; the target object is accessible via the expression Program.build.target.
Executable.addObjects() // instance
index URL

Add specified object to be built and linked into this executable

Configuration settings
inst.addObjects(String[] names, Object.Attrs objAttrs) returns Void
ARGUMENTS
names — array of base names of the sources of object files to be created and linked into the executable. See NOTE in xdc.bld for filename rules.
objAttrs — optional xdc.bld.Object.Attrs for the array of objects added; all objects named by names will be given the attributes objAttrs.
DETAILS
All objects added to the executable are built with the symbol xdc_cfg__header__ defined to be the name of the executable-specific C header generated by the program configuration tool. This symbol is used by the xdc/cfg/global.h header to include the generated header file; see xdc.cfg.Program.global. Thus, it is possible to portably include configuration specific definitions in a source file that is used in many different configurations.
For example, a portable main.c might be structured as follows:
      #include <xdc/std.h>
      #include <ti/bios/include/log.h>

      #include <xdc/cfg/global.h>    // include declaration of trace

      int main(int argc, char *argv[])
      {
          LOG_printf(trace, "hello world");
              :
      }
EXAMPLES
1. Locate a source file whose name starts with "hello" with an extension supported by the executable's target, compile it and link it into the executable myExe:
          myExe.addObjects(["hello"]);
If hello.c exists, compile and add to myExe, if hello.asm exists assemble and add to myExe, etc. If no such file is located, a warning is emitted.
2. Compile hello.c and add to the executable myExe:
          myExe.addObjects(["hello.c"]);
3. Names may include sub-directory prefixes. In this case, the source will be located in a sub-directory of the current package. The following statement declares that the file "foo/hello.c" should be compiled and linked into the executable myExe:
          myExe.addObjects(["foo/hello.c"]);
As in the previous examples, the extension ".c" is optional. In case an extension is not supplied, each extension understood by the target will be tried until a source file is located.
4. It is also possible to supply file specific compilation options.
          myExe.addObjects(["fir.c", "iir.c"], {defs: "-D_DEBUG"});
In this case, both files fir.c and iir.c will be compiled with the "-D_DEBUG" flag. Any setting of attrs.defs in the executable or package is overridden by this definition.
RETURNS
void
THROWS
Error exceptions are thrown for fatal errors
SEE
xdc.cfg.Program.global
Executable.addTest() // instance
index URL

Add specified test to executable

Configuration settings
inst.addTest(Test.Attrs testAttrs) returns Test.Instance
ARGUMENTS
testAttrs — test attrs object (xdc.bld.Test.Attrs)
DETAILS
A test encapsulates an executable and a set of arguments passed to the executable when it is run.
Tests are run by naming the goal "<test_name>.test" on the xdc command line; <test_name> is the test's name.
Multiple tests may have the same name; in this case, it is possible to run all tests using the single goal "<test_name>.test"
RETURNS
the xdc.bld.Test instance object created
THROWS
Error exceptions are thrown for fatal errors
generated on Sun, 25 Nov 2018 22:18:48 GMT


interface xdc.bld.ITarget

metaonly interface xdc.bld.ITarget
index URL

The interface between code generation tool-chains and the XDC Build Engine

This interface defines an abstract interface that must be supported by a compiler tool-chain in order to be used in an XDC build environment. This interface allows the XDC Build engine to treat all compiler tool chains uniformly; thus, it is possible to add support for a new compiler without making *any* changes to the build engine.
XDCspec summary sourced in xdc/bld/ITarget.xdc
metaonly interface ITarget { ...
XDCspec declarations sourced in xdc/bld/ITarget.xdc
package xdc.bld;
metaonly interface ITarget {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    readonly config Bool alignDirectiveSupported// The compiler supports an align directive = false;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    readonly config String sectMap// Output section name to segment type mapping[string];
    readonly config String stdInclude// Standard C/C++ types header;
    readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 0,
            align: 0
        },
        t_Char: {
            size: 0,
            align: 0
        },
        t_Double: {
            size: 0,
            align: 0
        },
        t_Float: {
            size: 0,
            align: 0
        },
        t_Fxn: {
            size: 0,
            align: 0
        },
        t_Int: {
            size: 0,
            align: 0
        },
        t_Int8: {
            size: 0,
            align: 0
        },
        t_Int16: {
            size: 0,
            align: 0
        },
        t_Int32: {
            size: 0,
            align: 0
        },
        t_Int40: {
            size: 0,
            align: 0
        },
        t_Int64: {
            size: 0,
            align: 0
        },
        t_Long: {
            size: 0,
            align: 0
        },
        t_LDouble: {
            size: 0,
            align: 0
        },
        t_LLong: {
            size: 0,
            align: 0
        },
        t_Ptr: {
            size: 0,
            align: 0
        },
        t_Short: {
            size: 0,
            align: 0
        },
        t_Size: {
            size: 0,
            align: 0
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    config ITarget.Extension extensions// File extensions recognized by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    config ITarget.OptionSet profiles// Profiles supported by this target[string] = [
        [
            "release",
            { }
        ],
        [
            "debug",
            { }
        ]
    ];
    config String rootDir// Installation directory for this target's code generation tools;
    config String version// The Compatibility Key associated with this target;
    config String versionMap// Map of compiler version numbers to compatibility keys[string] = [ ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget.StringArray
index URL
XDCspec declarations sourced in xdc/bld/ITarget.xdc
typedef String StringArray[];
struct ITarget.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget.Extension
index URL

File extension to file type association

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget.Model
index URL

Target runtime model

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in xdc/bld/ITarget.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config Bool alignDirectiveSupported = false;
config ITarget.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config String stdInclude;
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 0,
        align: 0
    },
    t_Char: {
        size: 0,
        align: 0
    },
    t_Double: {
        size: 0,
        align: 0
    },
    t_Float: {
        size: 0,
        align: 0
    },
    t_Fxn: {
        size: 0,
        align: 0
    },
    t_Int: {
        size: 0,
        align: 0
    },
    t_Int8: {
        size: 0,
        align: 0
    },
    t_Int16: {
        size: 0,
        align: 0
    },
    t_Int32: {
        size: 0,
        align: 0
    },
    t_Int40: {
        size: 0,
        align: 0
    },
    t_Int64: {
        size: 0,
        align: 0
    },
    t_Long: {
        size: 0,
        align: 0
    },
    t_LDouble: {
        size: 0,
        align: 0
    },
    t_LLong: {
        size: 0,
        align: 0
    },
    t_Ptr: {
        size: 0,
        align: 0
    },
    t_Short: {
        size: 0,
        align: 0
    },
    t_Size: {
        size: 0,
        align: 0
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in xdc/bld/ITarget.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config ITarget.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget.extensions // module-wide
index URL

File extensions recognized by this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget.profiles // module-wide
index URL

Profiles supported by this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config ITarget.OptionSet profiles[string] = [
    [
        "release",
        { }
    ],
    [
        "debug",
        { }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config String version;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config ITarget.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

XDCspec declarations sourced in xdc/bld/ITarget.xdc
config String versionMap[string] = [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
ITarget.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in xdc/bld/ITarget.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in xdc/bld/ITarget.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in xdc/bld/ITarget.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in xdc/bld/ITarget.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in xdc/bld/ITarget.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in xdc/bld/ITarget.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:18:47 GMT


interface xdc.bld.ITarget2

metaonly interface xdc.bld.ITarget2
index URL

Extension of the interface xdc.bld.ITarget

This interface contains some common structures and config parameters shared by several packages that contain targets.
XDCspec summary sourced in xdc/bld/ITarget2.xdc
metaonly interface ITarget2 { ...
// inherits xdc.bld.ITarget
XDCspec declarations sourced in xdc/bld/ITarget2.xdc
package xdc.bld;
metaonly interface ITarget2 inherits ITarget {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    readonly config Bool alignDirectiveSupported// The compiler supports an align directive = false;
    readonly config ITarget2.Command ar// The command used to create an archive;
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    readonly config ITarget2.Command lnk// The command used to link executables;
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    readonly config String sectMap// Output section name to segment type mapping[string];
    readonly config String stdInclude// Standard C/C++ types header;
    readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 0,
            align: 0
        },
        t_Char: {
            size: 0,
            align: 0
        },
        t_Double: {
            size: 0,
            align: 0
        },
        t_Float: {
            size: 0,
            align: 0
        },
        t_Fxn: {
            size: 0,
            align: 0
        },
        t_Int: {
            size: 0,
            align: 0
        },
        t_Int8: {
            size: 0,
            align: 0
        },
        t_Int16: {
            size: 0,
            align: 0
        },
        t_Int32: {
            size: 0,
            align: 0
        },
        t_Int40: {
            size: 0,
            align: 0
        },
        t_Int64: {
            size: 0,
            align: 0
        },
        t_Long: {
            size: 0,
            align: 0
        },
        t_LDouble: {
            size: 0,
            align: 0
        },
        t_LLong: {
            size: 0,
            align: 0
        },
        t_Ptr: {
            size: 0,
            align: 0
        },
        t_Short: {
            size: 0,
            align: 0
        },
        t_Size: {
            size: 0,
            align: 0
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    config ITarget.Extension extensions// File extensions recognized by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
    config String includeOpts// Additional user configurable target-specific include path options;
    config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "",
        suffix: ""
    };
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    config ITarget.OptionSet profiles// Profiles supported by this target[string] = [
        [
            "release",
            { }
        ],
        [
            "debug",
            { }
        ]
    ];
    config String rootDir// Installation directory for this target's code generation tools;
    config String version// The Compatibility Key associated with this target;
    config String versionMap// Map of compiler version numbers to compatibility keys[string] = [ ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget2.StringArray
index URL
XDCspec declarations sourced in xdc/bld/ITarget2.xdc
typedef String StringArray[];
struct ITarget2.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget2.Command
index URL

Required command and options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget2.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget2.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget2.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget2.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget2.Extension
index URL

File extension to file type association

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget2.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget2.Model
index URL

Target runtime model

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget2.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget2.Options
index URL

User configurable command options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget2.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget2.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config Bool alignDirectiveSupported = false;
config ITarget2.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config ITarget2.Command ar;
config ITarget2.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config ITarget2.Command asm;
config ITarget2.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget2.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget2.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config ITarget2.Command cc;
config ITarget2.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget2.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config ITarget2.Command lnk;
config ITarget2.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget2.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget2.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget2.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget2.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget2.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config String stdInclude;
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget2.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 0,
        align: 0
    },
    t_Char: {
        size: 0,
        align: 0
    },
    t_Double: {
        size: 0,
        align: 0
    },
    t_Float: {
        size: 0,
        align: 0
    },
    t_Fxn: {
        size: 0,
        align: 0
    },
    t_Int: {
        size: 0,
        align: 0
    },
    t_Int8: {
        size: 0,
        align: 0
    },
    t_Int16: {
        size: 0,
        align: 0
    },
    t_Int32: {
        size: 0,
        align: 0
    },
    t_Int40: {
        size: 0,
        align: 0
    },
    t_Int64: {
        size: 0,
        align: 0
    },
    t_Long: {
        size: 0,
        align: 0
    },
    t_LDouble: {
        size: 0,
        align: 0
    },
    t_LLong: {
        size: 0,
        align: 0
    },
    t_Ptr: {
        size: 0,
        align: 0
    },
    t_Short: {
        size: 0,
        align: 0
    },
    t_Size: {
        size: 0,
        align: 0
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget2.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget2.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget2.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget2.Options asmOpts = {
    prefix: "",
    suffix: ""
};
config ITarget2.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget2.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget2.Options ccOpts = {
    prefix: "",
    suffix: ""
};
config ITarget2.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget2.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config ITarget2.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget2.extensions // module-wide
index URL

File extensions recognized by this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget2.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String includeOpts;
config ITarget2.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget2.Options lnkOpts = {
    prefix: "",
    suffix: ""
};
config ITarget2.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget2.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget2.profiles // module-wide
index URL

Profiles supported by this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config ITarget.OptionSet profiles[string] = [
    [
        "release",
        { }
    ],
    [
        "debug",
        { }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget2.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget2.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String version;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config ITarget2.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
config String versionMap[string] = [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
ITarget2.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget2.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget2.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget2.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget2.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget2.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget2.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget2.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget2.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget2.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget2.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget2.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget2.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:18:47 GMT


interface xdc.bld.ITarget3

metaonly interface xdc.bld.ITarget3
index URL

Extension of the interface xdc.bld.ITarget3

This interface contains some common structures and config parameters shared by several packages that contain targets.
XDCspec summary sourced in xdc/bld/ITarget3.xdc
metaonly interface ITarget3 { ...
// inherits xdc.bld.ITarget2
    // inherits xdc.bld.ITarget
XDCspec declarations sourced in xdc/bld/ITarget3.xdc
package xdc.bld;
metaonly interface ITarget3 inherits ITarget2 {
module-wide constants & types
    typedef String StringArray// [];
    metaonly struct ArchiveGoal// The goal specification passed to the archive function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".a62";
        String files// String of files to archive;
        String profile// index into profiles map;
        String opts// goal specific archiver options;
    };
    metaonly struct Command// Required command and options {
        String cmd// the command to run;
        String opts// required options for the command;
    };
    metaonly struct CommandSet// The commands necessary to create a specified goal {
        String msg// brief message describing subsequent commands;
        String cmds// commands necessary to generate goal;
        String path// host-independent representation of PATH[];
        String envs// environment variable settings for the cmds[];
    };
    metaonly struct CompileGoal// The goal specification passed to the compile function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".o62";
        String srcSuffix// optional suffix of source file; e.g., ".c";
        String srcPrefix// optional directory prefix of source file;
        String profile// index into profiles map;
         ITarget.CompileOptions opts// goal specific compiler options;
        Bool configOpts// true if compiling the generated C config file;
    };
    metaonly struct CompileOptions// Options passed to the compiler/assembler {
        String aopts// goal specific ASM options;
        String copts// goal specific C compiler options;
        String cfgcopts// goal specific C config file options;
        String defs// goal specific C/ASM definition options;
        String incs// goal specific C/ASM include options;
    };
    metaonly struct DebugGen// Debugger integration support {
        String execTemplate// debugger template for executable;
        String execPattern// exec file name pattern;
        String packageTemplate// debugger template for package;
        String packagePattern// package file name pattern;
    };
    metaonly struct Extension// File extension to file type association {
        String suf// file extension (including any '.');
        String typ// type of this file; e.g., "c", "asm", ..;
    };
    metaonly struct LinkGoal// The goal specification passed to the link function {
        String base// base name of the source and destination;
        String dstPrefix// directory prefix of destination file;
        String dstSuffix// suffix of destination file; e.g., ".x62";
        String files// string of files to link with;
        String profile// index into profiles map;
        String opts// goal specific linker options;
        Bool dllMode// true if we're linking an assembly;
        Bool isRom// reflects the isRom attribute;
    };
    metaonly struct Model// Target runtime model {
        String endian// endian-ness of this target;
        String codeModel// target-specific code model;
        String dataModel// target-specific data model;
        Bool shortEnums// if true, enums are packed into smallest integral type;
    };
    metaonly struct OptionSet// Collection of tool-chain options {
         ITarget.CompileOptions compileOpts// profile-specific compiler opts;
        String linkOpts// profile-specific linker opts;
        String archiveOpts// profile-specific archiver opts;
         ITargetFilter.InstDesc filters// ITargetFilter instance descs[];
    };
    metaonly struct Options// User configurable command options {
        String prefix// options that appear before Command.opts;
        String suffix// options that appear after Command.opts;
    };
    metaonly struct StdTypes// Standard base types supported by all targets {
         ITarget.TypeInfo t_IArg;
         ITarget.TypeInfo t_Char;
         ITarget.TypeInfo t_Double;
         ITarget.TypeInfo t_Float;
         ITarget.TypeInfo t_Fxn;
         ITarget.TypeInfo t_Int;
         ITarget.TypeInfo t_Int8;
         ITarget.TypeInfo t_Int16;
         ITarget.TypeInfo t_Int32;
         ITarget.TypeInfo t_Int40;
         ITarget.TypeInfo t_Int64;
         ITarget.TypeInfo t_Long;
         ITarget.TypeInfo t_LDouble;
         ITarget.TypeInfo t_LLong;
         ITarget.TypeInfo t_Ptr;
         ITarget.TypeInfo t_Short;
         ITarget.TypeInfo t_Size;
    };
module-wide config parameters
    readonly config Bool alignDirectiveSupported// The compiler supports an align directive = false;
    readonly config ITarget2.Command ar// The command used to create an archive;
    readonly config ITarget2.Command asm// The command used to assembles assembly source files into object files;
    readonly config ITarget.Module base// A target that this target is based upon;
    readonly config Int bitsPerChar// The number of bits in a variable of type char = 8;
    readonly config ITarget2.Command cc// The command used to compile C/C++ source files into object files;
    readonly config String isa// CPU Instruction Set Architecture (ISA);
    readonly config ITarget2.Command lnk// The command used to link executables;
    readonly config ITarget.Model model// Run-time model;
    readonly config String name// Nickname for this target;
    readonly config String os// Name of OS required to run programs built for this target;
    readonly config String rts// Name of a run-time support package to include;
    readonly config String sectMap// Output section name to segment type mapping[string];
    readonly config String stdInclude// Standard C/C++ types header;
    readonly config ITarget.StdTypes stdTypes// Size and alignment for standard base types = {
        t_IArg: {
            size: 0,
            align: 0
        },
        t_Char: {
            size: 0,
            align: 0
        },
        t_Double: {
            size: 0,
            align: 0
        },
        t_Float: {
            size: 0,
            align: 0
        },
        t_Fxn: {
            size: 0,
            align: 0
        },
        t_Int: {
            size: 0,
            align: 0
        },
        t_Int8: {
            size: 0,
            align: 0
        },
        t_Int16: {
            size: 0,
            align: 0
        },
        t_Int32: {
            size: 0,
            align: 0
        },
        t_Int40: {
            size: 0,
            align: 0
        },
        t_Int64: {
            size: 0,
            align: 0
        },
        t_Long: {
            size: 0,
            align: 0
        },
        t_LDouble: {
            size: 0,
            align: 0
        },
        t_LLong: {
            size: 0,
            align: 0
        },
        t_Ptr: {
            size: 0,
            align: 0
        },
        t_Short: {
            size: 0,
            align: 0
        },
        t_Size: {
            size: 0,
            align: 0
        }
    };
    readonly config String suffix// Suffix appended to all objs, libraries, and executable;
    config ITarget2.Options arOpts// User configurable archiver options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options asmOpts// User configurable assembler options = {
        prefix: "",
        suffix: ""
    };
    config ITarget2.Options ccConfigOpts// User configurable compiler options for the generated config C file = {
        prefix: "$(ccOpts.prefix)",
        suffix: "$(ccOpts.suffix)"
    };
    config ITarget2.Options ccOpts// User configurable compiler options = {
        prefix: "",
        suffix: ""
    };
    config String compatibleSuffixes// Array of suffixes used by targets compatible with this target[];
    config ITarget.DebugGen debugGen// Debugger/IDE file generation support;
    config String execExt// Extension for executables;
    config ITarget.Extension extensions// File extensions recognized by this target[string] = [
        [
            ".asm",
            {
                suf: ".asm",
                typ: "asm"
            }
        ],
        [
            ".c",
            {
                suf: ".c",
                typ: "c"
            }
        ],
        [
            ".cpp",
            {
                suf: ".cpp",
                typ: "cpp"
            }
        ],
        [
            ".cxx",
            {
                suf: ".cxx",
                typ: "cpp"
            }
        ],
        [
            ".C",
            {
                suf: ".C",
                typ: "cpp"
            }
        ],
        [
            ".cc",
            {
                suf: ".cc",
                typ: "cpp"
            }
        ]
    ];
    config String includeOpts// Additional user configurable target-specific include path options;
    config ITarget2.Options lnkOpts// User configurable linker options = {
        prefix: "",
        suffix: ""
    };
    config String platform// The default platform name for this target;
    config String platforms// A set of platforms that can support this target[] = [ ];
    config ITarget.OptionSet profiles// Profiles supported by this target[string] = [
        [
            "release",
            { }
        ],
        [
            "debug",
            { }
        ]
    ];
    config String rawVersion// The raw version string from the compiler;
    config String rootDir// Installation directory for this target's code generation tools;
    config String version// The Compatibility Key associated with this target;
    config String versionMap// Map of compiler version numbers to compatibility keys[string] = [ ];
module-wide functions
     ITarget.CommandSet *archive// Create an archive(ITarget.ArchiveGoal *goal);
     ITarget.CommandSet *compile// Compile a source file into an object file(ITarget.CompileGoal *goal);
     function findSuffix// Find the suffix that is compatible with this target(pkg);
    String genConstCustom// Return any custom generated code related to generated constants(ITarget2.StringArray names, ITarget2.StringArray types);
    String genVisibleData// Return any custom generated code related to data generated in the config C file(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
    String genVisibleFxns// Return any custom generated code related to functions generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
    String genVisibleLibFxns// Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
     function getISAChain// Get this target's ISA "is compatible with" relation(isa);
    String getRawVersion// Get a target-specific raw compiler version string();
    String getVersion// Get a target-specific Compatibility Key string();
     ITarget.CommandSet *link// Link object files to produce an executable(ITarget.LinkGoal *goal);
     ITarget.CommandSet *scompile// Compile a source file into an assembly language file(ITarget.CompileGoal *goal);
    String selectSuffix// Select the suffix that is compatible with this target(ITarget.StringArray suffixList);
}
typedef ITarget3.StringArray
index URL
XDCspec declarations sourced in xdc/bld/ITarget3.xdc
typedef String StringArray[];
struct ITarget3.ArchiveGoal
index URL

The goal specification passed to the archive function

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct ArchiveGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".a62"
    String files;
    // String of files to archive
    String profile;
    // index into profiles map
    String opts;
    // goal specific archiver options
};
SEE
archive
struct ITarget3.Command
index URL

Required command and options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct Command {
    String cmd;
    // the command to run
    String opts;
    // required options for the command
};
FIELDS
cmd — name of a tool-chain executable without any path information. The location of this executable is specified by the binDir (or pathPrefix) configuration parameter.
opts — required options passed to the command; these options can not be changed or eliminated by user's configuration script.
DETAILS
The compile, link, and archive functions in this interface are implemented by expanding the strings specified in this structure and inserting strings from the Options structure to form a single command. The strings in this structure can not be changed by the user (they are fixed by the target), but the string in the Options structure may be changed by the user.
The final command is: Command.cmd Options.prefix Command.opts Options.suffix
struct ITarget3.CommandSet
index URL

The commands necessary to create a specified goal

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct CommandSet {
    String msg;
    // brief message describing subsequent commands
    String cmds;
    // commands necessary to generate goal
    String path[];
    // host-independent representation of PATH
    String envs[];
    // environment variable settings for the cmds
};
FIELDS
msg — a brief synopsis of the commands specified by cmds; this string is output in lieu of cmds when building in "non-verbose" mode.
cmds — a single string of commands that must be executed to complete the specified operation. Multiple commands may be specified by separating each command with the '\n' character.
To facilitate the creation of "portable" makefiles and to simplify the implementation of targets, certain distinguished "macros" may be embedded in this string. The build engine replaces these macros with the values described below.
$(rootDir)
the target's rootDir configuration parameter
$(packageBase)
the target package's xdc.IPackage.packageBase property
$(XDCINCS)
a set of "-I" options that names each repository in the package path
envs — an array of "name=value" strings that represent environment variables that are defined prior to the execution of the commands specified by cmds
path — an array of directory names that are used to compose the PATH environment variable that is in effect when the commands specified by cmds are run.
DETAILS
This structure is the return value of the compile, link and archive functions. This value is then used to generate a makefile or any other files necessary to generate a specified goal.
SEE
archive, compile, scompile, link
struct ITarget3.CompileGoal
index URL

The goal specification passed to the compile function

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct CompileGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".o62"
    String srcSuffix;
    // optional suffix of source file; e.g., ".c"
    String srcPrefix;
    // optional directory prefix of source file
    String profile;
    // index into profiles map
     ITarget.CompileOptions opts;
    // goal specific compiler options
    Bool configOpts;
    // true if compiling the generated C config file
};
SEE
compile, scompile
struct ITarget3.CompileOptions
index URL

Options passed to the compiler/assembler

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct CompileOptions {
    String aopts;
    // goal specific ASM options
    String copts;
    // goal specific C compiler options
    String cfgcopts;
    // goal specific C config file options
    String defs;
    // goal specific C/ASM definition options
    String incs;
    // goal specific C/ASM include options
};
FIELDS
aopts — a string of target-specific assembler options
copts — a string of target-specific C/C++ compiler options
cfgcopts — a string of C/C++ compiler options for C config file, includes 'copts' in addition to the value passed
defs — a string of macro definitions each of the form "-Dname=value" separated by white space
incs — a string of include directories each of the form "-Idir" separated by white space
PREDEFINED MACROS
The XDC Build Engine automatically adds several predefined macros via -D definitions that enable conditional compilation of source files based on build-specific attributes.
xdc_bld__profile_{profile_name}
this symbol is always defined and {profile_name} is the compile goal's (see CompileGoal) profile name.
In addition, each target defines a set of macros that enable clients to portably support big/little endian targets, for example. These macros are indirectly included by sources that include xdc/std.h; see xdc.
SEE
OptionSet, CompileGoal, xdc
struct ITarget3.DebugGen
index URL

Debugger integration support

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct DebugGen {
    String execTemplate;
    // debugger template for executable
    String execPattern;
    // exec file name pattern
    String packageTemplate;
    // debugger template for package
    String packagePattern;
    // package file name pattern
};
DETAILS
This structure specifies additional files that are generated in order to support integration with a debugger. For example, the default setting for TI targets specifies the generation of CCS project files that allow one to easily debug executables that have been constructed from multiple packages.
There are two "types" of debug support files that are generated; one for the package as a whole, and one for each executable. Since packages may contain portable sources that are built for more than one target, a "package-level" file is generated for each target used in the package. A separate file is generated for each executable built within the package.
The execTemplate and packageTemplate fields name a template that is expanded in the context of the config model and the build model, respectively. These fields should be set to a file name string which is relative to the package path; e.g., the string "ti/targets/cc_exec.xdt" refers to the file "cc_exec.xdt" in the ti.targets package located along the package path.
Preconditions for the execTemplate:
this
the configured program object (xdc.cfg.Program); i.e., the program object *after* the program's configuration script completes.
$args
array of arguments passed to the template
$args[1]
the name of the executable being produced for this configuration.
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
Preconditions for the packageTemplate:
this
the "package contents" object (i.e., xdc.bld.PackageContents) *after* the package's build script (package.bld) completes.
$args
array of arguments passed to the template
$args[0]
the target (a module implementing the xdc.bld.ITarget interface)
$args[1]
hash-table of all package sources
environment
hash table of XDC global parameters; e.g., "xdc.path", "xdc.root", ...
The execPattern and packagePattern fields are expressions that are expanded prior to template expansion to determine the name of the output file. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execPattern:
cfgName
the name of the generated configuration file (without any directory prefix);
cfgDir
the name of the directory containing the config file;
exeName
the name of the executable file (without any directory prefix);
exeDir
the directory containing the executable file.
Both the exeDir and cfgDir are relative to the directory containing the package.bld script.
Built-in variables for packagePattern:
pkgName
the package's name (e.g., "ti.targets");
trgName
the target's name property;
trgSuffix
the target's suffix property.
SEE
debugGen
struct ITarget3.Extension
index URL

File extension to file type association

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct Extension {
    String suf;
    // file extension (including any '.')
    String typ;
    // type of this file; e.g., "c", "asm", ..
};
FIELDS
suf — the file extension including any '.' characters
typ — the type of the file having this extension. Allowable file type identifiers include:
"c"
C language source file
"asm"
assembly language source file
"cpp"
C++ language source file
DETAILS
This structure is used by the Build Engine to determine whether a file should be treated as C++, C, or assembly language source.
SEE
extensions
struct ITarget3.LinkGoal
index URL

The goal specification passed to the link function

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct LinkGoal {
    String base;
    // base name of the source and destination
    String dstPrefix;
    // directory prefix of destination file
    String dstSuffix;
    // suffix of destination file; e.g., ".x62"
    String files;
    // string of files to link with
    String profile;
    // index into profiles map
    String opts;
    // goal specific linker options
    Bool dllMode;
    // true if we're linking an assembly
    Bool isRom;
    // reflects the isRom attribute
};
SEE
link
struct ITarget3.Model
index URL

Target runtime model

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct Model {
    String endian;
    // endian-ness of this target
    String codeModel;
    // target-specific code model
    String dataModel;
    // target-specific data model
    Bool shortEnums;
    // if true, enums are packed into smallest integral type
};
FIELDS
— (endian) this string specifies the endianess of the generated code. Valid values include:
"big"
big endian
"little"
little endian
null
unspecified
(codeModel) this string specifies a target-specific code size model. Valid values include:
"near"
C54 near mode
"far"
C54 far mode
undefined
unspecified
(dataModel) this string specifies a target-specific data size model. Valid values include:
"large"
C55, C28 large model
undefined
unspecified
(shortEnums) this flag specifies if a target fits the values of an enumeration into the smallest integer type that can accept all values. If that is the case, this flag must be set to true. If all values are the size of an Int, this flag can be either set to false or left unspecified.
SEE
model
struct ITarget3.OptionSet
index URL

Collection of tool-chain options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct OptionSet {
     ITarget.CompileOptions compileOpts;
    // profile-specific compiler opts
    String linkOpts;
    // profile-specific linker opts
    String archiveOpts;
    // profile-specific archiver opts
     ITargetFilter.InstDesc filters[];
    // ITargetFilter instance descs
};
FIELDS
compilerOptions — a set of compiler/assembler options
linkOpts — a string of target-specific linker options
archiveOpts — a string of target-specific archiver options
filters — an array of filters applied (in order) to tool-chain commands
DETAILS
This structure is used to define a collection of tool-chain options that are used as a group to achieve some effect supported by the tool-chain. For example, some compilers require that specific options be passed to the compiler *and* linker in order to generate execution profile information or code coverage statistics.
SEE
profiles
struct ITarget3.Options
index URL

User configurable command options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct Options {
    String prefix;
    // options that appear before Command.opts
    String suffix;
    // options that appear after Command.opts
};
DETAILS
The option strings allow the user to pass additional parameters to the executable that is responsible for compiling, linker, or archiving. See xdc.bld.ITarget2.Command.
struct ITarget3.StdTypes
index URL

Standard base types supported by all targets

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
metaonly struct StdTypes {
     ITarget.TypeInfo t_IArg;
     ITarget.TypeInfo t_Char;
     ITarget.TypeInfo t_Double;
     ITarget.TypeInfo t_Float;
     ITarget.TypeInfo t_Fxn;
     ITarget.TypeInfo t_Int;
     ITarget.TypeInfo t_Int8;
     ITarget.TypeInfo t_Int16;
     ITarget.TypeInfo t_Int32;
     ITarget.TypeInfo t_Int40;
     ITarget.TypeInfo t_Int64;
     ITarget.TypeInfo t_Long;
     ITarget.TypeInfo t_LDouble;
     ITarget.TypeInfo t_LLong;
     ITarget.TypeInfo t_Ptr;
     ITarget.TypeInfo t_Short;
     ITarget.TypeInfo t_Size;
};
SEE
stdTypes
config ITarget3.alignDirectiveSupported // module-wide
index URL

The compiler supports an align directive

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config Bool alignDirectiveSupported = false;
config ITarget3.ar // module-wide
index URL

The command used to create an archive

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config ITarget2.Command ar;
config ITarget3.asm // module-wide
index URL

The command used to assembles assembly source files into object files

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config ITarget2.Command asm;
config ITarget3.base // module-wide
index URL

A target that this target is based upon

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config ITarget.Module base;
DETAILS
If non-null, this target shares the same tool-chain of the specified base target. This parameter is used to determine various default values for target configuration parameters. For example, the default setting of rootDir is the value of the base's rootDir setting.
config ITarget3.bitsPerChar // module-wide
index URL

The number of bits in a variable of type char

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config Int bitsPerChar = 8;
DETAILS
This constant allows one to determine the precise number of bits in each of the types specified in the stdTypes map. For example, the number of bits in the target T's int type is
      T.stdTypes.t_Int.size * T.bitsPerChar
config ITarget3.cc // module-wide
index URL

The command used to compile C/C++ source files into object files

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config ITarget2.Command cc;
config ITarget3.isa // module-wide
index URL

CPU Instruction Set Architecture (ISA)

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config String isa;
DETAILS
This parameter is used to identify a set of targets that produce code for a common ISA. This is used by build scripts that need to build for all targets that support a particular device.
For example, the build script for a package that is designed for the TMS32064xx (and no other CPU) can easily specify that it should be built for all targets that generate code for the TMS320C64xx without having to specify a specific target. This allows the user to add new targets (big endian, little endian, different compilers, etc.) that build for the TMS320C64xx without having to modify the package's build script.
Note that this field should not be confused with platform ISA names; this field is defined by target tool-chains and may differ from the names given by a CPU device.
SEE
xdc.platform.ICpuDataSheet
config ITarget3.lnk // module-wide
index URL

The command used to link executables

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config ITarget2.Command lnk;
config ITarget3.model // module-wide
index URL

Run-time model

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config ITarget.Model model;
DETAILS
This structure identifies a particular run-time model used by the compiler to generate instructions.
config ITarget3.name // module-wide
index URL

Nickname for this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config String name;
DETAILS
This name is typically the name of the module without the package name prefix. Thus, it is not necessarily globally unique.
Use the $name property of the module to get a globally unique name for the target.
config ITarget3.os // module-wide
index URL

Name of OS required to run programs built for this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config String os;
DETAILS
Native executables are run by the host OS. This OS often defines runtime interfaces that all executables (implicitly or explicitly) use.
If os is undefined, then no OS is required.
config ITarget3.rts // module-wide
index URL

Name of a run-time support package to include

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config String rts;
DETAILS
Development environments often provide a set of common run-time support functions that all other code can easily utilize; e.g., some means for performing a "printf", normal program termination with "exit status", etc. If the rts parameter is non-null, it is the name of a package that is implicitly imported when building any executable that is built using this target. If rts is undefined, no rts package is imported.
This parameter makes it possible for the target producer to name a package that provides a target-specific implementation of a runtime support interface. Clients of a target do not need to explicitly name a target specific rts implementation; thus, it is not possible for the client to inadvertently name the wrong (or an incompatible) rts implementation.
Note: this package is *NOT* included if the executable's xdc.bld.Executable.attrs.rtsName attribute is set to null; see xdc.bld.Executable.Attrs.
config ITarget3.sectMap // module-wide
index URL

Output section name to segment type mapping

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config String sectMap[string];
DETAILS
This hash table is used to determine whether a particular object file output section (".text", ".stack", etc.) requires 'data', 'code' or 'stack' memory segment.
This sectMap is referenced by linker command file templates during generation to create linker command files. The Platform defines the default memory segments for code and data, and based on this map and the default segments, the linker command file template places an output section into a physical memory segment.
Note that the xdc.cfg.Program object and the xdc.platform.IPlatform instance have a sectMap parameter. Both the Program's and IPlatform's sectMap can augment and/or override the placement for a section, but xdc.cfg.Program.sectMap takes precedence. Therefore, this sectMap and the default segments from the platform define an initial section map which is then augmented by the Program's and IPlatform's section map.
config ITarget3.stdInclude // module-wide
index URL

Standard C/C++ types header

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config String stdInclude;
DETAILS
This string identifies a header containing the C/C++ definitions required to enable use of xdc/std.h in C/C++ sources; see xdc.
The value of this string is used by xdc/std.h to include target-specific definitions of the types Int8, Int16, etc. In addition, this header supplies target-specific definitions of the predefined xdc_target__* macros required by xdc/std.h.
Since this header must supply target-specific values for target-independent names the structure of this header is usually of the form:
      // if target macros are not already defined,
      #if !defined(xdc_target_macros_include__)
          // include target-specific definitions
          #if defined(TARGET1)
              #include "target1.h"
          #elif defined(TARGET2)
              #include "target2.h"
          #elif ...
              :
          #else
              #error unsupported target
          #endif
      #endif
      // include common definitions
          :
The check of the symbol xdc_target_macros_include__ exists to allow others that define new targets to include this header to get common definitions for a family of related targets.
To simplify the creation of the target-specific header files, the template file stddefs.xdt in this package can be used to automatically generate the required definitions from each target's .xdc specification.
config ITarget3.stdTypes // module-wide
index URL

Size and alignment for standard base types

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config ITarget.StdTypes stdTypes = {
    t_IArg: {
        size: 0,
        align: 0
    },
    t_Char: {
        size: 0,
        align: 0
    },
    t_Double: {
        size: 0,
        align: 0
    },
    t_Float: {
        size: 0,
        align: 0
    },
    t_Fxn: {
        size: 0,
        align: 0
    },
    t_Int: {
        size: 0,
        align: 0
    },
    t_Int8: {
        size: 0,
        align: 0
    },
    t_Int16: {
        size: 0,
        align: 0
    },
    t_Int32: {
        size: 0,
        align: 0
    },
    t_Int40: {
        size: 0,
        align: 0
    },
    t_Int64: {
        size: 0,
        align: 0
    },
    t_Long: {
        size: 0,
        align: 0
    },
    t_LDouble: {
        size: 0,
        align: 0
    },
    t_LLong: {
        size: 0,
        align: 0
    },
    t_Ptr: {
        size: 0,
        align: 0
    },
    t_Short: {
        size: 0,
        align: 0
    },
    t_Size: {
        size: 0,
        align: 0
    }
};
DETAILS
The values of size are the values returned by the target-specific sizeof() operator applied to the specified type (as defined by the C language). The align value is the number of chars used in the alignment of the specified type.
config ITarget3.suffix // module-wide
index URL

Suffix appended to all objs, libraries, and executable

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
readonly config String suffix;
DETAILS
All files generated by this target (object files, archives, executables, etc.) have file names whose extensions end with suffix. In particular, targets create files with the following extensions:
".a<suffix>"
archive files (i.e., libraries)
".o<suffix>"
object files
".s<suffix>"
assembly language source (see scompile())
".x<suffix>"
executable files
This suffix should be chosen to globally and uniquely identify the EABI (Embedded Application Binary Interface) of the objects produced by this target. Targets with the same suffix should produce 100% EABI compatible objects and, targets with different suffixes should produce objects with incompatible EABIs.
SEE
scompile()
config ITarget3.arOpts // module-wide
index URL

User configurable archiver options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget2.Options arOpts = {
    prefix: "",
    suffix: ""
};
config ITarget3.asmOpts // module-wide
index URL

User configurable assembler options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget2.Options asmOpts = {
    prefix: "",
    suffix: ""
};
config ITarget3.ccConfigOpts // module-wide
index URL

User configurable compiler options for the generated config C file

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget2.Options ccConfigOpts = {
    prefix: "$(ccOpts.prefix)",
    suffix: "$(ccOpts.suffix)"
};
DETAILS
By default, this parameter inherits values specified in ccOpts. The strings "$(ccOpts.prefix)" and "$(ccOpts.suffix)" are expanded into the values specified by ccOpts for this target.
config ITarget3.ccOpts // module-wide
index URL

User configurable compiler options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget2.Options ccOpts = {
    prefix: "",
    suffix: ""
};
config ITarget3.compatibleSuffixes // module-wide
index URL

Array of suffixes used by targets compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String compatibleSuffixes[];
DETAILS
This array is used to identify a set of targets that produce code that can be linked with code produced by this target, where the order of suffixes defines the order of preferrence. This parameter is used by findSuffixes().
For example, an Arm target which builds for v6 architecture might have the following values in its compatibleSuffix: ["v5T", "MV470"]. This means that code produced by targets with suffixes "v5T' and "MV470" can be linked with code produced by that target, and that "v5T" code is more preferred than "MV470" code.
config ITarget3.debugGen // module-wide
index URL

Debugger/IDE file generation support

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget.DebugGen debugGen;
DETAILS
This parameter allows one to automatically generate files that can be used by an IDE to more easily debug (and possibly rebuild) specified goals.
To avoid unnecessary build time overhead, these files are not always generated; by default, they are only generated for "debug" profiles. The generation of these files is controlled by the xdc.cfg.Program.gen configuration parameter. To force these files to be generated for a particular executable, add the following line to the executable's program configuration script:
        Program.gen.debuggerFiles = true;
It is also possible to disable the generation of selected files by setting the appropriate fields of DebugGen to null in your config.bld script.
config ITarget3.execExt // module-wide
index URL

Extension for executables

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String execExt;
DETAILS
Operating systems and tools often have a strong preference for a specific extension for executables; e.g., Windows expects executables to have the extension ".exe". If this parameter is set, executables will be given the specified extension instead of the default ".x<suffix>", where <suffix> is the target's suffix parameter.
The execExt is an expression that is expanded prior to use. Expressions of the form "$(name)" within the pattern string are expanded if "name" is one of the built-in variables listed below.
Built-in variables for execExt:
trgName
the target's name property
trgSuffix
the target's suffix property
platPName
the executable's platform package name
platIName
the executable's platform instance name
EXAMPLE
If you want to build a portable executable for multiple targets side-by-side and you want (or need) to use a fixed extension such as ".out" for all executables, setting execExt to "_$(trgSuffix).out" for all targets ensures that all generated executables will have unique names and yet share a common extension of ".out".
config ITarget3.extensions // module-wide
index URL

File extensions recognized by this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget.Extension extensions[string] = [
    [
        ".asm",
        {
            suf: ".asm",
            typ: "asm"
        }
    ],
    [
        ".c",
        {
            suf: ".c",
            typ: "c"
        }
    ],
    [
        ".cpp",
        {
            suf: ".cpp",
            typ: "cpp"
        }
    ],
    [
        ".cxx",
        {
            suf: ".cxx",
            typ: "cpp"
        }
    ],
    [
        ".C",
        {
            suf: ".C",
            typ: "cpp"
        }
    ],
    [
        ".cc",
        {
            suf: ".cc",
            typ: "cpp"
        }
    ]
];
DETAILS
This is a user modifiable table used to customize file extensions recognized by each target.
For example, to add a new assembly language extension, say ".s64", to the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      C64P.extensions[".s64"] = {
          suf: ".s64", typ: "asm"
      };
Note that individual targets may add additional language types.
It is also possible to remove default extensions. For example, to remove the ".asm" extension from the target ti.targets.C64P, add the following lines to the build model startup script:
      var C64P = xdc.module('ti.targets.C64P');
      delete C64P.extensions[".asm"];
config ITarget3.includeOpts // module-wide
index URL

Additional user configurable target-specific include path options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String includeOpts;
config ITarget3.lnkOpts // module-wide
index URL

User configurable linker options

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget2.Options lnkOpts = {
    prefix: "",
    suffix: ""
};
config ITarget3.platform // module-wide
index URL

The default platform name for this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String platform;
DETAILS
Build scripts often build for just one platform per target. This parameter allows one to establish a default platform for each target in a build.
If this parameter is null or undefined and platforms array is non-empty, it is initialized to be the first element of the platforms array (i.e., platforms[0]).
config ITarget3.platforms // module-wide
index URL

A set of platforms that can support this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String platforms[] = [ ];
DETAILS
Some build scripts build executables for "all" platforms; e.g., regression test suites. This parameter allows one to establish a set of platforms that build scripts can legitimately use to create executables, for example.
If this array is empty (i.e., has length 0) and platform is non-null, platforms is initialized to an array of one element equal to platform.
config ITarget3.profiles // module-wide
index URL

Profiles supported by this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config ITarget.OptionSet profiles[string] = [
    [
        "release",
        { }
    ],
    [
        "debug",
        { }
    ]
];
DETAILS
A profile is a collection of tool options used to create a library or executable that supports a certain "flavor" of library or executable; e.g., "debug" or "release".
Some profile names are supported by all targets even though the targets use different compilers (and therefore different options). These profile names makes it possible for a package to build libraries or executables in a "debug" (or "release") profile independent of the target, for example.
All targets are required to support "debug" and "release" profile names.
Profile options are added to beginning of any goal specific options specified by the user before being passed to the target.
config ITarget3.rawVersion // module-wide
index URL

The raw version string from the compiler

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String rawVersion;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getRawVersion() function after package.bld completes but prior to generating package.mak.
config ITarget3.rootDir // module-wide
index URL

Installation directory for this target's code generation tools

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String rootDir;
DETAILS
Since each target potentially "wraps" a different compiler tool-chain and each tool-chain will, in general, assume a different physical design for the installation of the compiler and its associated libraries and headers, one must consult each specific target to know how to set this parameter.
If the base parameter is null, this parameter *must* be set by the user; otherwise, rootDir defaults to the value base.rootDir.
config ITarget3.version // module-wide
index URL

The Compatibility Key associated with this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String version;
READONLY
This value is automatically computed by the XDC Build Engine by executing the getVersion() function after package.bld completes but prior to generating package.mak.
config ITarget3.versionMap // module-wide
index URL

Map of compiler version numbers to compatibility keys

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
config String versionMap[string] = [ ];
DETAILS
versionMap is a user modifiable table used to map tool-chain version numbers to Compatibility Keys.
Each target defines the format of the tool-chain version obtained from the tool-chain. The user can then map new tool-chain version strings to an appropriate compatibility key.
Each target must respect the mapping defined by this table; i.e., if the user supplies a compatibility key in this map, it must be returned when getVersion() is called.
Thus, it is possible for the user to assert that any two compiler tool chains should be treated as equivalent (or incompatible) by mapping their version numbers to identical (incompatible) compatibility keys.
SEE
ti.targets.ITarget.versionMap
ITarget3.archive() // module-wide
index URL

Create an archive

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
ITarget.CommandSet *archive(ITarget.ArchiveGoal *goal);
ARGUMENTS
goal — the ArchiveGoal defining the archive to build.
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget3.compile() // module-wide
index URL

Compile a source file into an object file

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
ITarget.CommandSet *compile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified object file goal.
RETURNS
This function retuns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget3.findSuffix() // module-wide
index URL

Find the suffix that is compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
function findSuffix(pkg);
ARGUMENTS
pkg — a package object or an array of target suffix strings (see suffix).
DETAILS
This function determines the list of targets supported by the package given as the argument. From that list, this function returns the suffix of a target that is compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if pkg does not support any target compatible with this target.
ITarget3.genConstCustom() // module-wide
index URL

Return any custom generated code related to generated constants

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
String genConstCustom(ITarget2.StringArray names, ITarget2.StringArray types);
DETAILS
This function is invoked for each constant in the generated config C file. This includes module-level config parameter, as well as the internal data structures that define modules, interfaces and instances. A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genVisibleData, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of constant names generated in the config C file
array of types; each type corresponds to the element of names with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget3.genVisibleData() // module-wide
index URL

Return any custom generated code related to data generated in the config C file

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
String genVisibleData(ITarget2.StringArray quals, ITarget2.StringArray types, ITarget2.StringArray names);
DETAILS
This function is invoked for each module-level configuration parameter in the configuration. Such parameters are represented by constants in the generated config C file.
A target is given a chance to add any target-specific pragmas or attributes for the generated constants. The set of the data supplied to this function overlaps with the data supplied to genConstCustom, so their output must be coordinated to avoid duplicate or inconsistent definitions or directives.
PARAMS
array of declaration qualifiers for the generated data
array of types for the generated data
array of variable names; each name corresponds to the elements of quals and types with the same index
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of data in case of partially linker objects. If there is nothing to be added, this function returns null. If a target never generates any such code, it can rely on the default implementation that always returns null.
ITarget3.genVisibleFxns() // module-wide
index URL

Return any custom generated code related to functions generated in the config C file

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
String genVisibleFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects.
ITarget3.genVisibleLibFxns() // module-wide
index URL

Return any custom generated code related to functions that are included in the configuration, but are not generated in the config C file

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
String genVisibleLibFxns(ITarget2.StringArray types, ITarget2.StringArray names, ITarget2.StringArray args);
PARAMS
array of types of functions' return values
array of functions' names; each name corresponds to the elements of types and args with the same index
array of functions' argument lists, including qualifiers
RETURNS
This function returns custom C code that will be embedded into the generated config C file. The purpose of the function is to allow targets to add pragmas or attributes to prevent elimination of functions in case of partially linker objects. These functions are managed separately from the functions that are generated in the config C file because some pragmas and attributes can be used only for functions defined in the same compilation unit where the paragmas and attributes are generated. For functions that are not generated in the config C file, and the mentioned restrictions exist, targets may have to create references that will prevent elimination of functions defined outside of the config C file.
ITarget3.getISAChain() // module-wide
index URL

Get this target's ISA "is compatible with" relation

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
function getISAChain(isa);
ARGUMENTS
isa — the ISA identifier string for the ISA to lookup; if null then the target's ISA is used (ITarget.isa).
DETAILS
Returns an array of ISA names (including this target's ISA) that represents the "is a" relation between ISA's. The array starts with the most general ISA and ends with this target's ISA or with the optionally specified argument. This relation is used to:
  1. pre-define macro definitions that enable code to be conditionally compiled based on compatible versions of a target's ISA.
  2. locate appropriate source files during makefile generation; each ISA named in a chain causes the extensions ".s"isa to be added to the ITarget.extensions table (in the reverse order that they appear in the chain). For example, if a target's ISA is "64P" and the returned chain is ["62", "64", "64P"], the following assembly language suffixes are added to the target's extensions table: ".s64P", ".s64", ".s62".
This relation may also be used in the future to help validate combinations of targets and platforms; a target's CPU ISA must appear on the chain specified by the platform's CPU ISA.
RETURNS
This function returns an array of ISA strings where the last string is the optionally specified ISA string or this target's ISA, and the first string is the "base" ISA in the is source compatible" relationship. If the specified ISA string is not in this target's chain of compatible targets, null is returned.
THROWS
Error exceptions are thrown for fatal errors.
ITarget3.getRawVersion() // module-wide
index URL

Get a target-specific raw compiler version string

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
String getRawVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific raw compiler version string.
RETURNS
This function returns a string, typically provided by the compiler itself, that identifies the version of the compiler referenced by rootDir.
THROWS
Error exceptions are thrown for fatal errors.
ITarget3.getVersion() // module-wide
index URL

Get a target-specific Compatibility Key string

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
String getVersion();
DETAILS
This function is called during makefile generation to obtain a target-specific Compatibility Key string. This string is of the form:
      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
where, <pkg>.<mod> is the name of the target, and <d0>, <d1>, etc. forms a Compatibility Key.
RETURNS
This function returns a string that encodes the name of the target and its Compatibility Key.
THROWS
Error exceptions are thrown for fatal errors.
ITarget3.link() // module-wide
index URL

Link object files to produce an executable

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
ITarget.CommandSet *link(ITarget.LinkGoal *goal);
ARGUMENTS
goal — a LinkGoal that specifies the output file name, a list of files to link with, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified object file. If null, then goal can not be achieved.
THROWS
Error exceptions are thrown for fatal errors.
ITarget3.scompile() // module-wide
index URL

Compile a source file into an assembly language file

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
ITarget.CommandSet *scompile(ITarget.CompileGoal *goal);
ARGUMENTS
goal — a CompileGoal that specifies what file to compile, the output file name, and any goal-specific options to use
DETAILS
This function is called during makefile generation to convert build goals into specific commands that generate the specified assembly language source goal.
RETURNS
This function returns a CommandSet. If non-null, this object defines the commands that must be executed to create the specified assembly language file. If null, then goal can not be achieved or is unnecessary (e.g., because the source file is already an asm file).
THROWS
Error exceptions are thrown for fatal errors.
ITarget3.selectSuffix() // module-wide
index URL

Select the suffix that is compatible with this target

XDCspec declarations sourced in xdc/bld/ITarget3.xdc
String selectSuffix(ITarget.StringArray suffixList);
ARGUMENTS
suffixList — an array of target suffix strings (see suffix).
DETAILS
From a list of suffixes supplied as an argument, this function returns the suffix compatible with this target. Compatibility in this case means that object files created by a target having the suffix returned by this function can be linked into an executable produced using this target. In the case where more than one suffix is compatible, this function returns a suffix in the following order of preference:
  1. if this target's suffix is in the list, that suffix is returned.
  2. suffixes from compatibleSuffixes are matched against the list in the order they appear in compatibleSuffixes, and the first one found in the list is returned.
RETURNS
This function returns the suffix string of a target compatible with this target or null if no such suffix is found in the list of suffixes specified by the first argument.
generated on Sun, 25 Nov 2018 22:18:48 GMT


interface xdc.bld.ITargetFilter

metaonly interface xdc.bld.ITargetFilter
index URL

User-supplied filter of a target's command set

This interface defines a set of user-supplied methods that are invoked during the Build Model's makefile generation process. These methods can augment or modify the commands that are placed in the generated makefiles. For example, an ITargetFilter module can add pre or post build steps for virtually any generated file. [ more ... ]
XDCspec summary sourced in xdc/bld/ITargetFilter.xdc
metaonly interface ITargetFilter { ...
instance: ...
XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
package xdc.bld;
metaonly interface ITargetFilter {
module-wide constants & types
    metaonly struct GenDesc// Configuration file generation descriptor {
        String template// name of the template to expand;
        String file// the name of the file to generate;
    };
    metaonly struct InstDesc// ITargetFilter Instance descriptor {
        String moduleName// name of a module implementing ITargetFilter;
        Any params// params passed to ITargetFilter.create();
    };
    metaonly struct MacroDesc// Macro definition descriptor {
        String name// name of the macro;
        String value// the name value of the macro name;
    };
instance:
per-instance functions
     function archive// Archive command filter(container, lib, objList, archArgs, result);
     function compile// Compile command filter(container, target, goal, compArgs, result);
     function getDefs// Get table of macro definitions();
     function getGenTab// Get table of files to be generated during configuration(acfg, cfgDir, configName);
     function link// Link command filter(container, cfgBase, prog, objList, linkArgs, result);
}
DETAILS
This interface defines a set of user-supplied methods that are invoked during the Build Model's makefile generation process. These methods can augment or modify the commands that are placed in the generated makefiles. For example, an ITargetFilter module can add pre or post build steps for virtually any generated file.
Filters can:
  1. modify or augment the commands returned by a target's compile, link and archive methods via compile, link, and archive;
  2. add new definitions to the generated makefiles usable by the command added above via getDefs; and
  3. specify new files to be generated during the configuration process that may be used during or after the link process via getGenTab.
Filters are created implicitly when a target's profile (xdc.bld.ITarget.profiles) that references the filter is used. To use a filter, one must configure a profile's option set (xdc.bld.ITarget.OptionSet) in the build configuration script config.bld. It is possible to add filters to existing profiles (such as "debug" and "release") or to create entirely new profiles that utilize the filters.
When modifying existing profiles, no changes to individual packages using these profiles is required; one simply has to clean and rebuild these packages for the filters to have an effect.
By adding new profiles, one can ensure that existing build artifacts are unchanged and only those packages that want to take advantage of a filter can do so easily by adding a new build artifact that uses the new profile; for example, see xdc.bld.Library.Attrs.
struct ITargetFilter.GenDesc
index URL

Configuration file generation descriptor

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
metaonly struct GenDesc {
    String template;
    // name of the template to expand
    String file;
    // the name of the file to generate
};
DETAILS
This structure is used to specify a new file to be generated during the configuration process.
Templates are expanded in the context of the Configuration domain; as a result, the contents of the generated file can be a function of an executable's xdc.cfg.Program object. Template names are interpreted using the xdc.findFile() method to locate the template file name. Templates can, therefore, be contained in any package located along the package path.
Names of files to be generated are always interpreted relative to the base directory of the package for which makefiles are being generated.
SEE
getGenTab
struct ITargetFilter.InstDesc
index URL

ITargetFilter Instance descriptor

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
metaonly struct InstDesc {
    String moduleName;
    // name of a module implementing ITargetFilter
    Any params;
    // params passed to ITargetFilter.create()
};
DETAILS
This structure provides the information necessary to create an instance of an ITargetFilter.
SEE
xdc.bld.ITarget.OptionSet
struct ITargetFilter.MacroDesc
index URL

Macro definition descriptor

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
metaonly struct MacroDesc {
    String name;
    // name of the macro
    String value;
    // the name value of the macro name
};
DETAILS
This structure is used to specify macro name-value pairs that are added to the generated makefiles. These names can be used by commands added via the filter's archive(), compile(), or link() methods.
Using symbolic values in lieu of embeddeding explicit paths or values enables the end-user to re-define these values without requiring regeneration of makefiles.
SEE
getDefs
ITargetFilter.archive() // instance
index URL

Archive command filter

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
function archive(container, lib, objList, archArgs, result);
ARGUMENTS
container — String
lib — xdc.bld.Library
objList — String
archArgs — xdc.bld.ITarget.ArchiveGoal
result — xdc.bld.ITarget.CommandSet
DETAILS
This method is called for every archive created by the package's build script (via xdc.bld.PackageContents.addLibrary()).
ITargetFilter.compile() // instance
index URL

Compile command filter

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
function compile(container, target, goal, compArgs, result);
ARGUMENTS
container — String
target — xdc.bld.ITarget.Module
goal — String goal file
compArgs — xdc.bld.ITarget.CompileGoal the file to compile
result — xdc.bld.ITarget.CommandSet
DETAILS
This method is called for every object created by the package's build script (via xdc.bld.Executable.addObjects(), xdc.bld.Library.addObjects(), ...).
ITargetFilter.getDefs() // instance
index URL

Get table of macro definitions

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
function getDefs();
DETAILS
This method is called during makefile generation to obtain a list of macro definitions that are to be added to the generated makefile. These macros can then be referenced by commands added via a filter function (archive(), compile() or link()).
RETURNS
array of MacroDesc
ITargetFilter.getGenTab() // instance
index URL

Get table of files to be generated during configuration

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
function getGenTab(acfg, cfgDir, configName);
ARGUMENTS
acfg — xdc.bld.Configuration or Assembly
cfgDir — String directory name where generated config files are placed
configName — String base name of the configuration
DETAILS
This method is called during makefile generation to obtain a list of additional files to be generated during configuration.
RETURNS
array of GenDesc
ITargetFilter.link() // instance
index URL

Link command filter

XDCspec declarations sourced in xdc/bld/ITargetFilter.xdc
function link(container, cfgBase, prog, objList, linkArgs, result);
ARGUMENTS
container — String
cfgbase — String
prog — Executable or Assembly
objList — String
linkArgs — xdc.bld.ITarget.LinkGoal
result — xdc.bld.ITarget.CommandSet
DETAILS
This method is called for every executable created by the package's build script (via xdc.bld.PackageContents.addExecutable(), ...).
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Library

metaonly module xdc.bld.Library
index URL

Model of a searchable collection of object files

  • Configuration settings
  • Individual elements
A library is a collection of one or more object files that is searched to resolve undefined references at link time. [ more ... ]
Configuration settings sourced in xdc/bld/Library.xdc
var Library = xdc.useModule('xdc.bld.Library');
module-wide constants & types
    var obj = new Library.Attrs// Optional attributes for a Library instance;
        obj.profile// target options profile = String ...
        obj.aopts// asm options for objects = String ...
        obj.copts// C/C++ options for objects = String ...
        obj.defs// definitions for added objects = String ...
        obj.incs// include options for objects = String ...
        obj.aropts// library-specific archiver options = String ...
        obj.suffix// optional suffix of library name; e.g.,".lib" = String ...
        obj.exportSrc// if true, export library sources to releases = Bool ...
        obj.releases// releases this library is a part of = Release.Instance[] ...
per-instance config parameters
    var params = new Library.Params// Instance config-params object;
        params.attrs// This library's optional attributes = Library.Attrs undefined;
        params.name// The base name of the library = String undefined;
        params.target// The target used to build objects added to this library = ITarget.Module undefined;
per-instance functions
     inst.addObjects// Add specified object to be built and archived into this library(String[] names, Object.Attrs objAttrs) returns Void
DETAILS
A library is a collection of one or more object files that is searched to resolve undefined references at link time.
Instances of this module represent a target independent collection of object files that implement a single set of APIs. Thus, a library is really a container of target-specific archives which contain the object files necessary to implement a common API. Although, a library may contain target dependent APIs, each library is expected to encapsulate the same basic functionality independent of the target.
Instances must be created via the xdc.bld.PackageContents.addLibrary() function; this ensures that each library created appears in the package's manifest and that it properly "inherits" appropriate default attributes from the containing package.
Library instances are initially create without *any* objects; this ensures that the developer complete control over what objects should be in each library. Thus, even modules declared in a package's specification, package.xdc, must be explicitly added to each library in the package (via addObjects()).
struct Library.Attrs
index URL

Optional attributes for a Library instance

Configuration settings
var obj = new Library.Attrs;
    obj.profile = String ...
    // target options profile
    obj.aopts = String ...
    // asm options for objects
    obj.copts = String ...
    // C/C++ options for objects
    obj.defs = String ...
    // definitions for added objects
    obj.incs = String ...
    // include options for objects
    obj.aropts = String ...
    // library-specific archiver options
    obj.suffix = String ...
    // optional suffix of library name; e.g.,".lib"
    obj.exportSrc = Bool ...
    // if true, export library sources to releases
    obj.releases = Release.Instance[] ...
    // releases this library is a part of
FIELDS
incs — This string contains include path options used by the compiler (or assembler) to locate include files; e.g., "-I ../../include -I ../c55xx". Note that the syntax of this string may be target dependent.
defs — This string contains options used by the compiler (or assembler) to define macros; e.g., "-D_C6xxx -DDEBUG=1". Note that the syntax of this string may be target dependent.
aopts — This string contains options used by the assembler to produce object files; e.g., "-mP1". Note that the syntax of this string may be target dependent.
copts — This string contains options used by the C/C++ compiler to produce object files; e.g., "-o3 -mi1". Note that the syntax of this string may be target dependent.
aropts — This string contains options used by the archiver produce archive files; e.g., "-q". Note that the syntax of this string may be target dependent.
exportSrc — If this field is set to true, the sources specified via addObjects() will be part of the releases named in the releases array. If it is unspecified (or set to null) and the release specifies that sources are to be exported, the sources will be part of the release. In all other cases, the sources are not part of the release.
suffix — If this string is set to a non-null value, it specifies the suffix (or extension) of the archive produced. This suffix is used in lieu of the default suffix (".a<targ_suffix>", where <targ_suffix> is the suffix property of the target used to create the archive). So, care must be taken when creating multiple libraries for different targets to ensure that the resulting archive names are unique.
profile — This string names a profile defined by the library's target. The profile specifies a set of compiler, assembler, and archiver options that are to be used when producing the archive. Note that these tool options are in addition to any options specified via aopts, copts, etc.
releases — This array contains releases that will contain the library. Thus, a single library can be part of any set of releases. Each library is always added to the package's "default release" in addition to any releases specified in the releases array.
DETAILS
Unspecified attributes are "inherited" from xdc.bld.PackageContents.Attrs; i.e., if one of fields in this structure is unspecified *and* this field's name matches a field name in xdc.bld.PackageContents.attrs, then this field's value defaults to the value in specified by xdc.bld.PackageContents.attrs. This mechanism makes it possible to establish package-wide default values for any of the "inherited" attributes.
Suppose, for example, that you want all archives in this package to be build with the 'release' profile, but one particular archive must be built with 'debug' (because it is a source example). The following build script fragment shows how this can be accomplished:
      Pkg.attrs.profile = 'release';
      var lib = Pkg.addLibrary('example', ..., {profile: 'debug'});
SEE
attrs, xdc.bld.PackageContents.Attrs
Instance Config Parameters
index URL

Configuration settings
var params = new Library.Params;
// Instance config-params object
    params.attrs = Library.Attrs undefined;
    // This library's optional attributes
    params.name = String undefined;
    // The base name of the library
    params.target = ITarget.Module undefined;
    // The target used to build objects added to this library
config Library.Params.attrs // instance
index URL

This library's optional attributes

Configuration settings
var params = new Library.Params;
...
params.attrs = Library.Attrs undefined;
DETAILS
These attributes are "inherited" by all objects added to this library; i.e., any object attribute that is undefined but is defined here will be assigned the value from these attributes.
Similarly, any unspecified attributes that also appear in xdc.bld.PackageContents.Attrs are inherited from xdc.bld.PackageContents.attrs.
SEE
xdc.bld.PackageContents.Attrs
config Library.Params.name // instance
index URL

The base name of the library

Configuration settings
var params = new Library.Params;
...
params.name = String undefined;
DETAILS
This name names a sub-directory in the package directory that contains all the object files and archives created for each of the targets specified.
The name of each library is <name>/<name>.a<target_suffix>, where <name> is the base name and <target_suffix> is the suffix property of the target for which the library is built. For example, one is building a "hello" library for big endian C62 the library's file name is "hello/hello.a62e"
config Library.Params.target // instance
index URL

The target used to build objects added to this library

Configuration settings
var params = new Library.Params;
...
params.target = ITarget.Module undefined;
Library.addObjects() // instance
index URL

Add specified object to be built and archived into this library

Configuration settings
inst.addObjects(String[] names, Object.Attrs objAttrs) returns Void
ARGUMENTS
names — array of base names of the sources of object files to be created and archived into the library. See NOTE in xdc.bld for filename rules.
objAttrs — optional Object.Attrs for the array of objects added; all objects named by names will be given the attributes objAttrs.
DETAILS
Examples
1. Locate a source file whose name starts with "fir" with an extension supported by the library's target, compile it and add to the library lib:
          lib.addObjects(["fir"]);
If fir.c exists compile and add to lib, if fir.asm exists assemble and add to lib, etc. If no such file is located, an warning is emitted.
2. Compile fir.c and iir.c and add to the library lib:
          lib.addObjects(["fir.c", "iir.c"]);
3. Names may include sub-directory prefixes. In this case, the source will be located in a sub-directory of the current package. The following statement declares that the file "foo/fir.c" should be compiled and added to the library lib:
          lib.addObjects(["foo/fir.c"]);
As in the previous examples, the extension ".c" is optional. In case an extension is not supplied, each extension understood by the target will be tried until a source file is located.
4. It is also possible to supply file specific compilation options.
          lib.addObjects(["fir.c", "iir.c"], {defs: "-D_DEBUG"});
In this case, both files fir.c and iir.c will be compiled with the "-D_DEBUG" flag. Any setting of attrs.defs in the library or package is overridden by this definition.
RETURNS
void
THROWS
Error exceptions are thrown for fatal errors
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Manifest

metaonly module xdc.bld.Manifest
index URL

The manifest object for the release file post-processing model

  • Configuration settings
  • Individual elements
Each package release corresponds to an archive of a subset of the development package's contents. The contents of each release are specified by an instance of the Release module. Each instance of the Release module can optionally specify a "release script" that can modify each file prior to it being added to the archive. This script runs in the context of the "release file post-processing" model. [ more ... ]
Configuration settings sourced in xdc/bld/Manifest.xdc
var Manifest = xdc.useModule('xdc.bld.Manifest');
module-wide constants & types
    var obj = new Manifest.Filter// A file filter descriptor;
        obj.operation// the JavaScript function to run = Any ...
        obj.args// additional arguments for operation = Any[] ...
        obj.newFileName// the new file name = String ...
        obj.newFileMode// either "r" or "rw" = String ...
module-wide config parameters
     Manifest.buildCount// A unique build count for the released package = String undefined;
     Manifest.compatibilityKey// The released package's compatibility key = String undefined;
     Manifest.files// An array of files in the release = String[] undefined;
     Manifest.filterMap// A map of filters for each file in the release = Manifest.Filter[string] undefined;
     Manifest.packageName// The released package's name = String undefined;
     Manifest.releaseName// The release's name = String undefined;
module-wide functions
     Manifest.getAllFiles// Read the entire release manifest into the Manifest.files array(String[] verbatimDirs) returns Void
DETAILS
Each package release corresponds to an archive of a subset of the development package's contents. The contents of each release are specified by an instance of the Release module. Each instance of the Release module can optionally specify a "release script" that can modify each file prior to it being added to the archive. This script runs in the context of the "release file post-processing" model.
This module is the root of the "release file post-processing" model. Each file in a release may be optionally post-processed by a filter specified in filterMap. Other fields of this module provide a release-specific "context" for the operation of the filters. For example, a filter may use packageName, releaseName, and buildCount to prefix all C sources with comments that identify where they originated.
All the fields of this module (except filterMap) are initialized before a "release script" is run. After the release script completes, the release archive is created according to the filters specifed in filterMap. Files that have no filter are copied without modification into the release.
struct Manifest.Filter
index URL

A file filter descriptor

Configuration settings
var obj = new Manifest.Filter;
    obj.operation = Any ...
    // the JavaScript function to run
    obj.args = Any[] ...
    // additional arguments for operation
    obj.newFileName = String ...
    // the new file name
    obj.newFileMode = String ...
    // either "r" or "rw"
FIELDS
operation — a JavaScript function that filters the specified input file and puts the results in specified output file; it is the output file that is archived as part of the release (not the input file).
The operation is called as follows:
        operation(filter, src, dst, base)
where:
filter
the filter object associated with the file being processed (which specified operation as the function to call)
src
input file name (relative to the current working directory)
dst
output file name (relative to the current working directory)
base
string name of the file as it appears in the array Manifest.files; unlike dst, it does not contain a temporary directory name prefix.
args — array of arbitrary arguments passed to operation (as a field of the filter object passed as the first argument to operation)
newFileName — the new name of the output file relative to the top of the archive. Normally this name should include the package's name but, in situations where a release must support a non-RTSC conformant physical design, newFileName can be anything.
newFileMode — the access permissions of the output file. Normally the file will have the access permissions that exist at the time archive is created. However, there may be times when the developer wants/needs to make a file readonly that is (for development purposes) writable. Only two modes are supported "r" (readonly) and "rw" (readable and writable).
SEE
filterMap
config Manifest.buildCount // module-wide
index URL

A unique build count for the released package

Configuration settings
Manifest.buildCount = String undefined;
DETAILS
This string contains is a decimal number that increments at least once every time the package is released. This string together with the compatibility key forms a unique version number for the package.
READONLY
This value is initialized before the release script or any of its filters are run and should not be modified.
config Manifest.compatibilityKey // module-wide
index URL

The released package's compatibility key

Configuration settings
Manifest.compatibilityKey = String undefined;
DETAILS
This string contains the value declared in the package's package.xdc specification file.
READONLY
This value is initialized before the release script or any of its filters are run and should not be modified.
config Manifest.files // module-wide
index URL

An array of files in the release

Configuration settings
Manifest.files = String[] undefined;
DETAILS
The file names in this array include the package's name; i.e., these names are relative to the package's repository rather than the package's build directory.
This value is initialized before the release script or any of its filters are run, and it contains the the names of the files specified directly or indirectly by the package's build script.
By default, this list does not contain all files in this package release, it excludes files that are commonly copied verbatim into the release (see below). To get the complete list you must call Manifest.getAllFiles.
The excluded files are those that are indirectly included either via
  • a directory named in PackageContents.otherFiles or Release.otherFiles,
  • a repository added via PackageContents.addRepository, or
  • the documentation directory named by PackageContents.docDir
It is possible to remove files from a release by removing it from this array; only files in this array or that are in the specified verbatim directories, the directories named above, will appear in the release. To remove files that are in any of these directories use Manifest.getAllFiles to re-initialize files so that it contains all of the release's files, then selectivly remove the files from this array.
It is also possible to add files to a release by adding files to this array. In fact, files added to the release can be generated by the filter operation specified for the file in filterMap. However, since these files are only present in releases of a package (they are not built as part of the normal build of all files and only appear in installed releases of a package), packages that must be built as part of building this release should not refer to these files.
config Manifest.filterMap // module-wide
index URL

A map of filters for each file in the release

Configuration settings
Manifest.filterMap = Manifest.Filter[string] undefined;
DETAILS
This map is indexed by the name of the file (as it appears in the files array) in the release and defines for each file a filter that is applied to the file before it is archived in a release.
EXAMPLE
The following script fragment illustrates how one can filter all *.c files in a release through a custom JavaScript function named copyright.
      function copyright(args, ...) { ...}

      for (var i = 0; i < Manifest.files.length; i++) {
          var fileName = Manifest.files[i];
          if (fileName.match(/\.c$/) != null) {
              Manifest.filterMap[fileName] = {operation: copyright};
          }
      }
SEE
files
config Manifest.packageName // module-wide
index URL

The released package's name

Configuration settings
Manifest.packageName = String undefined;
DETAILS
This string contains the value declared in the package's package.xdc specification file.
READONLY
This value is initialized before the release script or any of its filters are run and should not be modified.
config Manifest.releaseName // module-wide
index URL

The release's name

Configuration settings
Manifest.releaseName = String undefined;
DETAILS
This string contains the value declared in the package's package.bld build script; it is the name of the output archive without the ".tar" extension.
READONLY
This value is initialized before the release script or any of its filters are run and should not be modified.
Manifest.getAllFiles() // module-wide
index URL

Read the entire release manifest into the Manifest.files array

Configuration settings
Manifest.getAllFiles(String[] verbatimDirs) returns Void
ARGUMENTS
verbatimDirs — array of strings naming directories relative to the package's base directory. Each directory named in this array (and all the files and sub-directories it contains) is excluded from the Manifest.files array and is automatically added to the release without change.
If this array is null or empty, all files in the release are read into the Manifest.files array.
DETAILS
This function re-reads the release's manifest into the Manifest.files array but only excludes the directories whose names appear in the String array verbatimDirs.
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Object

metaonly module xdc.bld.Object
index URL

Model of a compiled (or assembled) form of a source file

  • Configuration settings
  • Individual elements
Instances of this module represent object files. Instances must be created via either the xdc.bld.Library.addObjects() or xdc.bld.Executable.addObjects() functions; this ensures that each object file created appears in the package's manifest and that it properly "inherits" appropriate default attributes from the containing library or executable.
Configuration settings sourced in xdc/bld/Object.xdc
var Object = xdc.useModule('xdc.bld.Object');
module-wide constants & types
    var obj = new Object.Attrs// Optional attributes for an Object instance;
        obj.profile// target options profile = String ...
        obj.aopts// asm options for this object = String ...
        obj.copts// C/C++ options for this object = String ...
        obj.defs// definitions for this object = String ...
        obj.incs// include options for this object = String ...
        obj.preBuilt// don't create a rule to generate this file = Bool ...
per-instance config parameters
    var params = new Object.Params// Instance config-params object;
        params.attrs// This instance's attributes = Object.Attrs undefined;
        params.name// The base name of the object file = String undefined;
struct Object.Attrs
index URL

Optional attributes for an Object instance

Configuration settings
var obj = new Object.Attrs;
    obj.profile = String ...
    // target options profile
    obj.aopts = String ...
    // asm options for this object
    obj.copts = String ...
    // C/C++ options for this object
    obj.defs = String ...
    // definitions for this object
    obj.incs = String ...
    // include options for this object
    obj.preBuilt = Bool ...
    // don't create a rule to generate this file
FIELDS
profile — This string names a profile defined by the target used to produce the object file. The profile specifies a set of compiler and assembler options that are to be used when producing the object. Note that these tool options are in addition to any options specified via aopts, copts, etc.
incs — This string contains include path options used by the compiler (or assembler) to locate include files; e.g., "-I ../../include -I ../c55xx". Note that the syntax of this string may be target dependent.
defs — This string contains options used by the compiler (or assembler) to define macros; e.g., "-D_C6xxx -DDEBUG=1". Note that the syntax of this string may be target dependent.
aopts — This string contains options used by the assembler to produce object files; e.g., "-mP1". Note that the syntax of this string may be target dependent.
copts — This string contains options used by the C/C++ compiler to produce object files; e.g., "-o3 -mi1". Note that the syntax of this string may be target dependent.
preBuilt — If equal to true, this Boolean flag indicates that this object does not need to be built from sources; e.g., it has been pre-built and delivered as a binary file without sources or some custom rule already built this object file. For pre-built objects, no rule will be created to remove the file as part of a package clean operation, the relative path to the file must be fully specified, and all other Object attributes are ignored.
DETAILS
Unspecified attributes are "inherited" from xdc.bld.Executable.Attrs (xdc.bld.Library.Attrs) if this Object is added to an xdc.bld.Executable (xdc.bld.Library); i.e., if one of fields in this structure is unspecified *and* this field's name matches a field name in xdc.bld.Executable.attrs, then this field's value defaults to the value in specified by xdc.bld.Executable.attrs. This mechanism makes it possible to establish executable-wide default value for any of the "inherited" attributes.
Suppose, for example, that you want all object files in this package to be build with the '-o4' optimization flag, but one particular file must be built with '-o2' (because the optimizer has a bug that it causes it to fail on this file). The following build script fragment shows how this can be accomplished:
      var exe = Pkg.addExecutable(..., {copts: '-o4'});
      exe.addObjects(['complex'], {copts: '-o2'});
      exe.addObjects(['foo', 'bar', ...]);
Since many Executable.attrs are "inherited" from xdc.bld.PackageContents.attrs, it is also possible to establish package-wide default for these attributes.
SEE
attrs, xdc.bld.PackageContents.Attrs, xdc.bld.Library.Attrs, xdc.bld.Executable.Attrs
Instance Config Parameters
index URL

Configuration settings
var params = new Object.Params;
// Instance config-params object
    params.attrs = Object.Attrs undefined;
    // This instance's attributes
    params.name = String undefined;
    // The base name of the object file
config Object.Params.attrs // instance
index URL

This instance's attributes

Configuration settings
var params = new Object.Params;
...
params.attrs = Object.Attrs undefined;
DETAILS
These attributes (unless otherwise specified) are "inherited" from the container object that contains this instance.
SEE
xdc.bld.PackageContents.Attrs, xdc.bld.Executable.Attrs, xdc.bld.Library.Attrs
config Object.Params.name // instance
index URL

The base name of the object file

Configuration settings
var params = new Object.Params;
...
params.name = String undefined;
DETAILS
This name is passed as the name field of the xdc.bld.ITarget.CompileGoal. The object file's name is composed as follows:
      <name>.o<target_suffix>
where <name> is name and <target_suffix> is the suffix defined by each target that the file is built for.
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.PackageContents

metaonly module xdc.bld.PackageContents
index URL

Package container populated by a build script

  • Configuration settings
  • Individual elements
This module defines the PackageContents object (aliased as Pkg in build scripts) which represents the contents of a package. Build scripts add to this package using the add* methods defined below. [ more ... ]
Configuration settings sourced in xdc/bld/PackageContents.xdc
var PackageContents = xdc.useModule('xdc.bld.PackageContents');
module-wide constants & types
    var obj = new PackageContents.Attrs// Package-level attributes;
        obj.profile// select appropriate ITarget.OptionSet = String ...
        obj.aopts// assembly language options = String ...
        obj.copts// C/C++ compiler options = String ...
        obj.cfgcopts// C/C++ compiler options for the C config file = String ...
        obj.defs// -D options common to C/C++/asm = String ...
        obj.incs// -I options common to C/C++/asm = String ...
        obj.xsopts// xs options = String ...
        obj.lopts// linker options = String ...
        obj.exportDoc// if true, export generated docs = Bool ...
        obj.exportExe// if true, export executables = Bool ...
        obj.exportCfg// if true, export program cfg scripts = Bool ...
        obj.exportSrc// if true, export all package sources = Bool ...
        obj.exportAll// if true, export all non-gen'd files = Bool ...
        obj.relScript// release files post-processing script = String ...
        obj.relScriptArgs// optional arguments to relScript = String ...
        obj.compress// if true, compress package release archives = Bool ...
        obj.archiver// "tar" or "zip"; defaults to "tar" = String ...
module-wide config parameters
     PackageContents.attrs// Package attributes = PackageContents.Attrs undefined;
     PackageContents.cfgDir// The directory where all intermediate program files are placed = String "package/cfg/";
     PackageContents.defaultRelease// The default release for this package = Release.Instance undefined;
     PackageContents.docDir// The directory where generated docs are placed = String undefined;
     PackageContents.excludeDirs// List of directory base names to exclude = String[] undefined;
     PackageContents.generatedFiles// Array of generated files = String[] undefined;
     PackageContents.imports// An array of required packages (and their version) for this package = String[] undefined;
     PackageContents.interfaces// An array of interface names provided by this package = String[] undefined;
     PackageContents.libDir// The directory where all intermediate library directories are placed = String "package/lib/";
     PackageContents.libTemplate// Template of a common C-file archived into every library = String null;
     PackageContents.makeEpilogue// String to add to the end of the generated makefile = String "";
     PackageContents.makePrologue// String to add to the beginning of the generated makefile = String "";
     PackageContents.modules// An array of module names provided by this package = String[] undefined;
     PackageContents.name// Name of this package = String undefined;
     PackageContents.otherFiles// Array of files to include this package = String[] undefined;
     PackageContents.otherSrcs// Array of source files to include this package = String[] undefined;
     PackageContents.producerId// Producer ID string = String undefined;
     PackageContents.relDir// The directory where all intermediate release files are placed = String "package/rel/";
     PackageContents.releasePrefix// A prefix appended to the name of each release archive = String "";
     PackageContents.uses// Array of directory suffixes used to locate files = String[] undefined;
     PackageContents.version// The package version string = String undefined;
module-wide functions
     PackageContents.addExecutable// Add specified executable to this package(String name, ITarget.Module target, String platform, Executable.Attrs exeAttrs) returns Executable.Instance
     PackageContents.addLibrary// Add specified library to this package(String name, ITarget.Module target, Library.Attrs libAttrs) returns Library.Instance
     PackageContents.addRelease// Add specified release to this package(String name, Release.Attrs relAttrs) returns Release.Instance
     PackageContents.addRepository// Add a repository to this package(String repositoryName, Repository.Attrs repAttrs) returns Repository.Instance
     PackageContents.addScript// Add a script to this package(String name, Script.Attrs scriptAttrs) returns Script.Instance
DETAILS
This module defines the PackageContents object (aliased as Pkg in build scripts) which represents the contents of a package. Build scripts add to this package using the add* methods defined below.
In addition to the items added by the build script, every package has at least one release, the default release. If the defaultRelease configuration parameter is not set, a default release will be implicitly created.
Every library, executable, and repository added to the package is automatically added to the default release.
struct PackageContents.Attrs
index URL

Package-level attributes

Configuration settings
var obj = new PackageContents.Attrs;
    obj.profile = String ...
    // select appropriate ITarget.OptionSet
    obj.aopts = String ...
    // assembly language options
    obj.copts = String ...
    // C/C++ compiler options
    obj.cfgcopts = String ...
    // C/C++ compiler options for the C config file
    obj.defs = String ...
    // -D options common to C/C++/asm
    obj.incs = String ...
    // -I options common to C/C++/asm
    obj.xsopts = String ...
    // xs options
    obj.lopts = String ...
    // linker options
    obj.exportDoc = Bool ...
    // if true, export generated docs
    obj.exportExe = Bool ...
    // if true, export executables
    obj.exportCfg = Bool ...
    // if true, export program cfg scripts
    obj.exportSrc = Bool ...
    // if true, export all package sources
    obj.exportAll = Bool ...
    // if true, export all non-gen'd files
    obj.relScript = String ...
    // release files post-processing script
    obj.relScriptArgs = String ...
    // optional arguments to relScript
    obj.compress = Bool ...
    // if true, compress package release archives
    obj.archiver = String ...
    // "tar" or "zip"; defaults to "tar"
FIELDS
profile — This string names a profile defined by the executable's target. A profile specifies a set of compiler, linker, and archiver options that are to be used when compiling and linking code. Note that these tool options are in addition to any options specified via aopts, copts, etc.
If this field is not specified or set to null, the "release" profile will be used.
incs — This string contains include path options used by the compiler (or assembler) to locate include files; e.g., "-I ../../include -I ../c55xx". Note that the syntax of this string may be target dependent.
defs — This string contains options used by the compiler (or assembler) to define macros; e.g., "-D_C6xxx -DDEBUG=1". Note that the syntax of this string may be target dependent.
aopts — This string contains options used by the assembler to produce object files; e.g., "-mP1". Note that the syntax of this string may be target dependent.
copts — This string contains options used by the C/C++ compiler to produce object files; e.g., "-o3 -mi1". Note that the syntax of this string may be target dependent.
cfgcopts — This string contains options used by the C/C++ compiler to compile the generated C config file. If cfgopts is not specified, the options specified in copts are used instead.
lopts — This string contains options used by the linker produce object files; e.g., "-l mylib.lib". Note that the syntax of this string may be target dependent.
xsopts — This string contains options passed to the xs command that's used to run configuration scripts. This option can be used, for example, to define name-value pairs accessible to configuration scripts via the XDCscript global environment hash-table. For example, setting xsopts to "-DFOO=bar" enables the configuration script to get the value of FOO via the expression environment["FOO"]. For more information about XDCscript and environment see The XDCscript Language.
exportCfg — If this field is set to true, configuration scripts will, by default, be part of the releases created by this package.
exportDoc — If this field is set to true, generated documentation will, by default, be part of the releases created by this package.
exportSrc — If this field is set to true, the sources used to build this package will, by default, be part of the releases created by this package.
exportExe — If this field is set to true, the executables created in this package will, by default, be part of the releases created by this package.
exportAll — If this field is set to true, all files in this package that are not known to be generated are in the release. If it is unspecified (or set to null) these files will not be added to this release. See xdc.bld.Release.Attrs for more information about this option.
relScript — If this field is non-null, the string names a "release script" that is run to post-process the files that are part of a release. Like configuration scripts, the string names a script file that is searched for first in the in package's base directory, and then along the package path.
relScriptArgs — If this field is non-null, the string is used to initialize the arguments[] array which is accessible to the release script named by relScript. The elements of the arguments[] array are formed from the white space separated elements of relScriptArgs. If this string is null or empty, the arguments[] array has length 0.
compress — If this field is set to true, the package release archive files will be, by default, compressed; otherwise, the archives will not be compressed
archiver — This field names the archiver to use when creating a release. Two archivers are currently supported: "tar" and "zip". If the archiver is set to "zip" the Attrs.compress field is implicitly set to true.
DETAILS
These attributes provide package-level defaults for attributes that provide control over the code generation tools, the configuration tool, and release options.
SEE
attrs
config PackageContents.attrs // module-wide
index URL

Package attributes

Configuration settings
PackageContents.attrs = PackageContents.Attrs undefined;
DETAILS
These attributes are "inherited" by all executables and libraries added to this package set.
SEE
xdc.bld.Executable.attrs, xdc.bld.Library.attrs
config PackageContents.cfgDir // module-wide
index URL

The directory where all intermediate program files are placed

Configuration settings
PackageContents.cfgDir = String "package/cfg/";
DETAILS
During configuration, several files are generated (a C++ source file, a linker command file, etc.) these generated files are placed in the directory specified by this parameter.
config PackageContents.defaultRelease // module-wide
index URL

The default release for this package

Configuration settings
PackageContents.defaultRelease = Release.Instance undefined;
DETAILS
If this configuration parameter is defined, it is taken to be the default release instance; otherwise a default instance is created with the appropriate defaults.
If this release's label attribute is undefined or null, it is set to "default" before the release is generated; otherwise the label attribute is unchanged from what the user specified for this instance.
The implicitly created default release is created as follows:
        PackageContents.addRelease(name, {label: "default"})
where name is the package's name with all '.'s replaced with '_'.
config PackageContents.docDir // module-wide
index URL

The directory where generated docs are placed

Configuration settings
PackageContents.docDir = String undefined;
DETAILS
If set to a non-null value, package documentation will be automatically generated and placed in this directory. If it is not set or set to null, no docs will be generated for this package.
If you set exportDoc or exportAll to true the generated docs will be included in the appropriate releases of the package.
config PackageContents.excludeDirs // module-wide
index URL

List of directory base names to exclude

Configuration settings
PackageContents.excludeDirs = String[] undefined;
DETAILS
This is an array of arbitrary directory "base names" that should be excluded in this release of the package. This list only excludes directories that would otherwise be added due to the recursive include of a parent directory.
For example, if a directory is specified in otherFiles all of its sub-directories will be added unless those sub-directories are named in the excludeDirs list.
This list is often used to exclude "hidden" directories added by change control systems and IDEs (.svn, .git, .settings, ...).
SEE
otherFiles, Release.excludeDirs
config PackageContents.generatedFiles // module-wide
index URL

Array of generated files

Configuration settings
PackageContents.generatedFiles = String[] undefined;
DETAILS
This is an array of arbitrary file names that are to be removed during a clean of this package. File names that end with the '/' character are assumed to be directories; in this case, the directory and all of its contents are removed during the clean.
Only those files that are not already directly (or indirectly) named by adding executables or libraries to this package set need to appear in this array.
config PackageContents.imports // module-wide
index URL

An array of required packages (and their version) for this package

Configuration settings
PackageContents.imports = String[] undefined;
READONLY
This parameter is an array of all prerequisite packages required by this package. Each string is of the form:
        <packageName>{<packageCompatibilityKey>
where <packageName> is the name of the required package and <packageCompatibilityKey> is the compatibility key specified in the requires statement of this package. If no compatibility key is specified in package.xdc, <packageCompatibilityKey> is "".
If the package specifies that a requirement is "internal", the package name is prefixed with a '*' character. In other words, the string is of the form:
        *<packageName>{<packageCompatibilityKey>
config PackageContents.interfaces // module-wide
index URL

An array of interface names provided by this package

Configuration settings
PackageContents.interfaces = String[] undefined;
READONLY
This parameter is an array of all interface names defined by this package.
config PackageContents.libDir // module-wide
index URL

The directory where all intermediate library directories are placed

Configuration settings
PackageContents.libDir = String "package/lib/";
DETAILS
Each object file for a library is placed in a sub-directory of this directory that has a name that matches the name specified in the addLibrary() function.
config PackageContents.libTemplate // module-wide
index URL

Template of a common C-file archived into every library

Configuration settings
PackageContents.libTemplate = String null;
DETAILS
This template can be used to embed package-specific meta-information into each library produced by the package. For example, it can be used to add package version information to each library.
This template is expanded just once in the Build model during makefile generation. Thus, the contents of the resulting C-file can not be library specific.
The template is found using xdc.findFile() and, as a result, libTemplate may refer to a template in either the current package or even in another package.
During expansion of the template, the this pointer is the PackageContents module object; i.e., the object that the global variable Pkg references.
The expanded template may refer to the following pre-defined macros:
__xdc_PKGVERS
the package compatibility key declared in package.xdc; e.g. "1, 2, 3"
__xdc_PKGNAME
the package's name; e.g., xdc.bld
__xdc_PKGPREFIX
the package's prefix; e.g., for the package xdc.bld the prefix would be xdc_bld_
config PackageContents.makeEpilogue // module-wide
index URL

String to add to the end of the generated makefile

Configuration settings
PackageContents.makeEpilogue = String "";
DETAILS
Similar to makePrologue except that this string is placed at the very end of the generated makefile.
config PackageContents.makePrologue // module-wide
index URL

String to add to the beginning of the generated makefile

Configuration settings
PackageContents.makePrologue = String "";
DETAILS
This string is placed at the very beginning of the package's generated makefile. This allows one to extend the build environment using any facility available to GNU make.
config PackageContents.modules // module-wide
index URL

An array of module names provided by this package

Configuration settings
PackageContents.modules = String[] undefined;
READONLY
This parameter is an array of all module names implemented in this package.
config PackageContents.name // module-wide
index URL

Name of this package

Configuration settings
PackageContents.name = String undefined;
READONLY
This parameter is the name of this package as specified by the package.xdc package specification file
config PackageContents.otherFiles // module-wide
index URL

Array of files to include this package

Configuration settings
PackageContents.otherFiles = String[] undefined;
DETAILS
This is an array of arbitrary file names that are to be included in the package.
Only those files that are not already directly (or indirectly) named by adding executables or libraries to this package set need to appear in this array.
SEE
excludeDirs
config PackageContents.otherSrcs // module-wide
index URL

Array of source files to include this package

Configuration settings
PackageContents.otherSrcs = String[] undefined;
DETAILS
Like otherFiles except that the file names listed here are to be post-processed by the xdc document preparation tools. This array only needs to specify files that are not implicitly specified via any of the addObjects function; e.g., script files, hand-crafted headers, etc.
config PackageContents.producerId // module-wide
index URL

Producer ID string

Configuration settings
PackageContents.producerId = String undefined;
DETAILS
The value of this string is embedded in every release of this package and can serve as a way to "map" this package to a unique ID that the producer uses to locate, within their SCM system, the original sources required to create and maintain this package.
This string is retained and may by displayed by various tools, but it is uninterpreted by the XDCtools.
config PackageContents.relDir // module-wide
index URL

The directory where all intermediate release files are placed

Configuration settings
PackageContents.relDir = String "package/rel/";
DETAILS
Release specific files for a release are placed in a sub-directory of this directory that has a name that matches the name specified in the addRelease() function.
config PackageContents.releasePrefix // module-wide
index URL

A prefix appended to the name of each release archive

Configuration settings
PackageContents.releasePrefix = String "";
DETAILS
This configuration parameter allows one to generate release archives somewhere other than inside the package being built. releasePrefix is prepended to the name of the release name to form the name of the release archive.
For example, setting releasePrefix to "../" implies that a release named "exports/foo" generates an archive file named foo.tar in the directory "../exports".
releasePrefix must either begin with the '^' character or be a relative path that is relative to the package's "base" directory; i.e., the directory containing the package's specification file package.xdc.
If releasePrefix begins with the '^' character, the remainder of the string is treated as though it is relative to the package's repository. In effect, the '^' character is replaced with an appropriate number of '../' sequences to sufficient to navigate to the package's repository.
For example, suppose your packages are in a repository named "src". Setting releasePrefix to "^/../exports" implies that a release named "foo" generates an archive file named foo.tar in the directory named "exports" which is a sibling of "src" - the package's repository.
This prefix can be overridden on a per release basis; see xdc.bld.Release.Attrs.
NOTE
If this parameter starts with ".." or "^", the resulting archive file will not be removed as part of a package clean.
config PackageContents.uses // module-wide
index URL

Array of directory suffixes used to locate files

Configuration settings
PackageContents.uses = String[] undefined;
DETAILS
This array of directory suffixes is used to locate package files that are referenced (e.g., via #include) without the package name.
This array names package directory suffixes (found along the package path) that:
  1. contain headers included by this package's sources which are included *without* using the package name, or
  2. contain JavaScript "import" files which are included (via utils.importFile()) *without* using the package name.
This mechanism is used to support legacy code that does not explicitly name the package in the #include statements, and *only* affects the compiler's -I options (not the package path) and the configuration tool's import path (config.importPath).
Strings in the Pkg.uses array must not be absolute paths. Each string in the Pkg.uses array must point to an existing directory that can be located along the package path. The generated makefiles create an absolute path by simply appending the string from uses[] to each directory name in the package path until an existing directory is found. The resulting absolute path is then passed to the compiler in a -I option, for example.
The directories named in this array may include sub-directories of any package in the package path.
The strings in this array should use '/' to separate directories; even on Windows systems. Since Windows supports '/' as a directory separator, the use of '/' ensures host platform independence.
EXAMPLE
The following example allows sources in the current package to "#include <tsk.h>" and have the compiler find tsk.h in the sub-directory ti/bios/include which is contained in some repository named in the package path (XDCPATH):
          var Pkg = xdc.useModule('xdc.bld.PackageContents');
          Pkg.uses = ["ti/bios/include", "ti/xdais/legacy"];
config PackageContents.version // module-wide
index URL

The package version string

Configuration settings
PackageContents.version = String undefined;
READONLY
This parameter is a version string that comes from the package.xdc specification.
PackageContents.addExecutable() // module-wide
index URL

Add specified executable to this package

Configuration settings
PackageContents.addExecutable(String name, ITarget.Module target, String platform, Executable.Attrs exeAttrs) returns Executable.Instance
ARGUMENTS
name — executable base name; this name is used to create the file name of the output executable and has the form:
                       <name>.x<suffix>
where <suffix> is the suffix specified by the target argument below. See NOTE in xdc.bld for filename rules.
target — target (xdc.bld.ITarget) for each built object linked into the executable.
platform — string name of the platform; this is the name of a platform package
exeAttrs — optional executable attrs object (xdc.bld.Executable.Attrs)
DETAILS
The name of the executable file is <name>.x<target_suffix>, where <name> is the name parameter (which may contain a directory prefix) and <target_suffix> is the suffix specified by the target parameter (xdc.bld.ITarget.suffix).
This name is also used to create a sub-directory in the package's "cfgDir" directory (xdc.bld.PackageContents.cfgDir) to contain files generated for the benefit of creating the executable. Thus, the name parameter names *both* an executable file and a sub-directory (in PackageContents.cfgDir) that contains the objects linked into the executable.
When the executable is added to the package, a xdc.bld.Test is implicitly added to the executable; thus, every executable has at least one Test. Attributes for this test can be specified via exeAttrs.
RETURNS
Returns the xdc.bld.Executable instance object created.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.bld.INVALID_TARGET
This error is reported when a package is being built for an unknown target. Ensure that the correct targets are mentioned in the package's build script.
xdc.bld.EXECUTABLE_EXISTS
This error is reported when a package's build script specifies multiple executables with the same name. Ensure that the names of the executables to be built are unique.
xdc.bld.PARAMETER_MISMATCH
This error is reported whenever parameters with the wrong type are passed to the method. Ensure that the parameters passed have the right type.
PackageContents.addLibrary() // module-wide
index URL

Add specified library to this package

Configuration settings
PackageContents.addLibrary(String name, ITarget.Module target, Library.Attrs libAttrs) returns Library.Instance
ARGUMENTS
name — library base name; this name is used to create *both* an archive and a sub-directory in the package's "libDir" directory which will contain the target-specific object files. See NOTE in xdc.bld for filename rules.
target — target (a module implementing the xdc.bld.ITarget interface) for each built object in the library
libAttrs — optional library attributes object (xdc.bld.Library.Attrs)
DETAILS
The name of the library archive file is <name>.a<target_suffix>, where <name> is the name parameter (which may contain a directory prefix) and <target_suffix> is the suffix specified by the target parameter (xdc.bld.ITarget.suffix).
The individual objects of each library are located in the directory <libDir>/<name>, where <name> is the name parameter and <libDir> is the configurable parameter xdc.bld.PackageContents.libDir. Thus, the name parameter names *both* an archive file and a sub-directory (in PackageContents.libDir) that contains the objects in the archive.
RETURNS
Returns the xdc.bld.Library instance object created.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.bld.INVALID_TARGET
This error is reported when a package is being built for an unknown target. Ensure that the correct targets are mentioned in the package's build script.
xdc.bld.LIBRARY_EXISTS
This error is reported when a package's build script specifies multiple libraries with the same name. Ensure that the names of the libraries to be built are unique.
xdc.bld.PARAMETER_MISMATCH
This error is reported whenever parameters with the wrong type are passed to the method. Ensure that the parameters passed have the right type.
SEE
xdc.bld.PackageContents.libDir, xdc.bld.ITarget.suffix
PackageContents.addRelease() // module-wide
index URL

Add specified release to this package

Configuration settings
PackageContents.addRelease(String name, Release.Attrs relAttrs) returns Release.Instance
ARGUMENTS
name — release base name; this name is used to create the file name of the output file and has the form: <name>.tar See NOTE in xdc.bld for filename rules.
relAttrs — optional release attributes object (xdc.bld.Release.Attrs)
RETURNS
Returns the xdc.bld.Release instance object created.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.bld.RELEASE_EXISTS
This error is reported whenever a package's build script specifies multiple releases with the same name. Ensure that the names of the releases specified in the build script are unique.
xdc.bld.INVALID_RELEASE_PREFIX
This error is reported whenever a release prefix is specified by its absolute path in the package's build script. The release prefix has to be relative to the package's base directory.
xdc.bld.INVALID_RELEASE_NAME
This error is reported whenever a release name is specified by its absolute path in the package's build script. The release name has to be relative to the package's base directory.
PackageContents.addRepository() // module-wide
index URL

Add a repository to this package

Configuration settings
PackageContents.addRepository(String repositoryName, Repository.Attrs repAttrs) returns Repository.Instance
ARGUMENTS
repositoryName — name of a directory (relative to this package's base) that will contain the packages added via xdc.bld.Repository.addPackages() See NOTE in xdc.bld for filename rules.
repAttrs — optional Repository attributes associated with this repository (see xdc.bld.Repository.Attrs)
DETAILS
A repository is a directory that contains packages. Repositories are typically named in the user's XDCPATH environment variable and contain a set of packages that are managed as a group.
This method allows one to bundle several packages together into a single release (of the package that contains this repository).
RETURNS
Returns the xdc.bld.Repository instance object created.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.bld.REPOSITORY_EXISTS
This error is reported whenever a package's build script specifies multiple repositories with the same name. Ensure that the names of the repositories specified in the build script are unique.
PackageContents.addScript() // module-wide
index URL

Add a script to this package

Configuration settings
PackageContents.addScript(String name, Script.Attrs scriptAttrs) returns Script.Instance
ARGUMENTS
name — name of the script to add to this package. Script names are simply the script's filename relative to the package's base directory. Scripts can have any extension, but if the extension is ".sh" or ".ksh" a Korn shell compatible shell is used to run the script's tests; otherwise it is assumed to be an XDCscript file and any tests will be run by the XDCscript interpreter xs.
scriptAttrs — optional script attributes object (xdc.bld.Script.Attrs)
DETAILS
Both XDCscript and Korn shell scripts can be added to package. This not only allows one to add script utilities to a package, it also makes it easy to create scripted regression tests. As with Executables, it is possible to add xdc.bld.Tests to a Script; see xdc.bld.Script.addTest.
RETURNS
Returns the xdc.bld.Script instance object created.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.bld.SCRIPT_EXISTS
This error is reported whenever a package's build script specifies multiple user scripts with the same name. Ensure that the names of the user scripts are unique.
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Release

metaonly module xdc.bld.Release
index URL

Model of an archive of all files that are part of a release

  • Configuration settings
  • Individual elements
Release instances define a container object that represents all files that are part of a release of a package. A release may, for example, include just the files necessary to support a particular ISA even though the package as a whole can support multiple ISAs. [ more ... ]
Configuration settings sourced in xdc/bld/Release.xdc
var Release = xdc.useModule('xdc.bld.Release');
module-wide constants & types
    var obj = new Release.Attrs// Optional Release attributes;
        obj.archiver// "tar" or "zip"; defaults to "tar" = String ...
        obj.compress// if true, compress package archive = Bool ...
        obj.exportDoc// if true, export generated docs = Bool ...
        obj.exportExe// if true, export program executables = Bool ...
        obj.exportCfg// if true, export program cfg scripts = Bool ...
        obj.exportSrc// if true, export all package sources = Bool ...
        obj.exportAll// if true, export all files in package = Bool ...
        obj.relScript// release files post-processing script = String ...
        obj.relScriptArgs// optional arguments to relScript = String ...
        obj.prefix// prefix for name of install of archive = String ...
        obj.label// uninterpreted label for this release = String ...
    var obj = new Release.Desc// A description of a release;
        obj.name// the name used to create the release = String ...
        obj.aname// the file name of the archive = String ...
        obj.label// the label given to the release = String ...
per-instance config parameters
    var params = new Release.Params// Instance config-params object;
        params.attrs// This instance's attributes = Release.Attrs undefined;
        params.excludeDirs// List of directory base names to exclude = String[] undefined;
        params.name// The name of the release = String undefined;
        params.otherFiles// Additional files to add to this release = String[] undefined;
DETAILS
Release instances define a container object that represents all files that are part of a release of a package. A release may, for example, include just the files necessary to support a particular ISA even though the package as a whole can support multiple ISAs.
Each Release instance is realized as a tar file containing the files that are part of a release of a package.
struct Release.Attrs
index URL

Optional Release attributes

Configuration settings
var obj = new Release.Attrs;
    obj.archiver = String ...
    // "tar" or "zip"; defaults to "tar"
    obj.compress = Bool ...
    // if true, compress package archive
    obj.exportDoc = Bool ...
    // if true, export generated docs
    obj.exportExe = Bool ...
    // if true, export program executables
    obj.exportCfg = Bool ...
    // if true, export program cfg scripts
    obj.exportSrc = Bool ...
    // if true, export all package sources
    obj.exportAll = Bool ...
    // if true, export all files in package
    obj.relScript = String ...
    // release files post-processing script
    obj.relScriptArgs = String ...
    // optional arguments to relScript
    obj.prefix = String ...
    // prefix for name of install of archive
    obj.label = String ...
    // uninterpreted label for this release
FIELDS
exportCfg — If this field is set to true, configuration scripts will be part of the release. If it is unspecified (or set to null), program configuration scripts will not be added to this release.
exportDoc — If this field is set to true, generated documentation will be part of the release.
exportSrc — If this field is set to true, sources used to produce object files will be part of the release. If it is unspecified (or set to null), no sources will be part of this release.
exportExe — If this field is set to true, executables will be part of the release. If it is unspecified (or set to null), executables will not be part of this release.
exportAll — If this field is set to true, all files in this package that are not known to be generated are in the release. If it is unspecified (or set to null), these files will not be added to this release.
Note that the set of files specified by exportAll is determined at the time the package's makefile is generated. If one of these files is subsequently removed before the release is built, the build of the release will fail; a file required by the release no longer exists. If the file is not really required for the release, you must trigger a rebuild for the generated makefiles; either touch package.bld or remove the generated makefile and re-build the release.
relScript — If this field is non-null, the string names a "release script" that is run to post-process the files that are part of a release. Like configuration scripts, the string names a script file that is searched for first in the in package's base directory, and then along the package path. See Manifest for more information about release scripts and what they can do.
relScriptArgs — If this field is non-null, the string is used to initialize the arguments[] array which is accessible to the release script named by relScript. The elements of the arguments[] array are formed from the white space separated elements of relScriptArgs. If this string is null or empty, the arguments[] array has length 0.
label — This string allows one to "tag" each release with a label that can be used by other tools to select appropriate releases. For example, the label might contain customer names.
This label is not interpreted by the XDC tools. It is simply recorded in the package's build model XML file (package/package.bld.xml) and retrieved via xdc.bld.BuildEnvironment.getReleaseDescs()
prefix — This string allows one to "export" each release to a location outside of the package. prefix is prepended to the name of the release name to form the name of the release archive.
For example, setting prefix to "../" implies that a release named "exports/foo" generates an archive file named foo.tar in the directory "../exports".
prefix must either begin with the '^' character or be a path that is relative to the package's "base" directory; i.e., the directory containing the package's specification file package.xdc.
If prefix begins with the '^' character, the remainder of the string is treated as though it is relative to the package's repository. In effect, the '^' character is replaced with an appropriate number of '../' sequences to sufficient to navigate to the package's repository.
If it is not specified (or set to null) the current setting of xdc.bld.PackageContents.releasePrefix is used.
compress — If this field is set to true, the release archive file will be compressed; otherwise, the archive will not be compressed. Archives are compressed via gzip; compressed archives are .tar.gz files.
archiver — This field names the archiver to use when creating a release. Two archivers are currently supported: "tar" and "zip". If the archiver is set to "zip" the Attrs.compress field is implicitly set to true.
DETAILS
Unspecified attributes are "inherited" from xdc.bld.PackageContents.Attrs; i.e., if one of fields in this structure is unspecified *and* this field's name matches a field name in xdc.bld.PackageContents.Attrs, then this field's value defaults to the value in specified by xdc.bld.PackageContents.attrs. This mechanism makes it possible to establish package-wide default values for any of the "inherited" attributes.
However, elements added to a release can "override" these attributes. For example, when an executable is added to a release and the executable's attributes specify 'exportSrc = false', the release will not contain the executable's sources (even if the release's attrs.exportSrc attribute is set to true).
SEE
attrs
struct Release.Desc
index URL

A description of a release

Configuration settings
var obj = new Release.Desc;
    obj.name = String ...
    // the name used to create the release
    obj.aname = String ...
    // the file name of the archive
    obj.label = String ...
    // the label given to the release
DETAILS
This structure provides information about a release that can be used to select from multiple releases provided by a package.
SEE
xdc.bld.BuildEnvironment.getReleaseDescs()
Instance Config Parameters
index URL

Configuration settings
var params = new Release.Params;
// Instance config-params object
    params.attrs = Release.Attrs undefined;
    // This instance's attributes
    params.excludeDirs = String[] undefined;
    // List of directory base names to exclude
    params.name = String undefined;
    // The name of the release
    params.otherFiles = String[] undefined;
    // Additional files to add to this release
config Release.Params.attrs // instance
index URL

This instance's attributes

Configuration settings
var params = new Release.Params;
...
params.attrs = Release.Attrs undefined;
DETAILS
Unless explicitly specified, these attributes are "inherited" from the package's attributes (xdc.bld.PackageContents.attrs)
SEE
xdc.bld.PackageContents.attrs
config Release.Params.excludeDirs // instance
index URL

List of directory base names to exclude

Configuration settings
var params = new Release.Params;
...
params.excludeDirs = String[] undefined;
DETAILS
This is an array of arbitrary directory "base names" that should be excluded in this release of the package. This list only excludes directories that would otherwise be added due to the recursive include of a parent directory.
For example, if a directory is specified in otherFiles all of its sub-directories will be added unless those sub-directories are named in the excludeDirs list.
This list is often used to exclude "hidden" directories added by change control systems and IDEs (.svn, .git, .settings, ...).
SEE
otherFiles, PackageContents.excludeDirs
config Release.Params.name // instance
index URL

The name of the release

Configuration settings
var params = new Release.Params;
...
params.name = String undefined;
DETAILS
This name is the base name of the generated tar file containing all files that make up the release. For example, if the name of the release is "foo" then the file "foo.tar" (located in the same directory as package.bld) is a tar file containing the release files.
Note that each package has at least one release defined, the default release. The default release's name is the name of the package with '.'s replaced with '_'s. For example, the default release name for the package "foo.bar" is "foo_bar" and the generated tar file is named "foo_bar.tar".
config Release.Params.otherFiles // instance
index URL

Additional files to add to this release

Configuration settings
var params = new Release.Params;
...
params.otherFiles = String[] undefined;
DETAILS
This is an array of arbitrary files that are to be included in this release of the package.
Only those files that are not already directly (or indirectly) named by adding programs or libraries to this release need to appear in this array.
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Repository

metaonly module xdc.bld.Repository
index URL

Model of a package repository

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/bld/Repository.xdc
var Repository = xdc.useModule('xdc.bld.Repository');
module-wide constants & types
    var obj = new Repository.Attrs// Optional attributes for a repository;
        obj.releases// releases this repo is a part of = Release.Instance[] ...
        obj.search// true => search path for packages = Bool ...
        obj.archivePath// search path for package archives = String ...
per-instance config parameters
    var params = new Repository.Params// Instance config-params object;
        params.attrs// The repository's attributes = Repository.Attrs undefined;
        params.name// The repository's directory name = String undefined;
per-instance functions
     inst.addPackages// Add specified package releases to this repository(String[] names) returns Void
struct Repository.Attrs
index URL

Optional attributes for a repository

Configuration settings
var obj = new Repository.Attrs;
    obj.releases = Release.Instance[] ...
    // releases this repo is a part of
    obj.search = Bool ...
    // true => search path for packages
    obj.archivePath = String ...
    // search path for package archives
FIELDS
releases — This array contains releases that will contain the repository. Thus, a single repository can be part of any set of releases. Each repository is always added to the package's "default release" in addition to any releases specified in the releases array.
search — By default, the release archives of all packages added to a repository are required to exist in the package's release output directory at the time the repository is created.
However, if this flag is set to true, each package's release will be searched for at the time that the makefile for the package containing this repository is created. This allows package releases that exist before this repository is being built to more easily be added to this repository.
For example, package release archives can be moved to arbitrary directories after they are created but before a package containing a repository that includes these releases is built.
Package releases are searched for by looking in the following locations (in order): the package's release archive output directory, along the specified archivePath, and finally along the current package path.
If a package release archive cannot be found in the package's release output directory or along the archivePath, the package path will be searched for the package itself (not its release archive). So, if the package appears on the package path _and_ it's a released package with the specified release name, the package will simply be copied into this repository.
Finally, if the package release can't be found, and error is thrown.
archivePath — This ';' separated list of directories is used to find package release archives when the search flag is set to true. If archivePath is null, no search path will be used and the package release itself (not the archive) may be found along the package path.
SEE
attrs
Instance Config Parameters
index URL

Configuration settings
var params = new Repository.Params;
// Instance config-params object
    params.attrs = Repository.Attrs undefined;
    // The repository's attributes
    params.name = String undefined;
    // The repository's directory name
config Repository.Params.attrs // instance
index URL

The repository's attributes

Configuration settings
var params = new Repository.Params;
...
params.attrs = Repository.Attrs undefined;
config Repository.Params.name // instance
index URL

The repository's directory name

Configuration settings
var params = new Repository.Params;
...
params.name = String undefined;
Repository.addPackages() // instance
index URL

Add specified package releases to this repository

Configuration settings
inst.addPackages(String[] names) returns Void
ARGUMENTS
names — An array of strings naming package releases to be added to the repository. Package releases are named as follows:
              <pkgName>:<releaseName>
where <pkgName> is the name of the package to add to the repository and <releaseName> is the name of one of that package's releases. A package release name may be either the archive file name (relative to the package's base directory) of the release archive or the name used create the release in package named <pkgName>.
For example, if the package ti.bios had a release named exports/ti_bios,src, the following statements would add this release to the repository named packages:
              var r = Pkg.addRepository("packages");
              r.addPackages(["ti.bios:exports/ti_bios,src"]);
Alternatively, one can specify the archive file name:
              var r = Pkg.addRepository("packages");
              r.addPackages(["ti.bios:exports/ti_bios,src.tar"]);
It is possible to get a list of release archive names from a package via the xdc.bld.BuildEnvironment.getReleaseDescs() method. For example, to get the physical archive name of the default release of the ti.bios package, the following loop can be added to a build script:
              var archiveName;
              var rels = Build.getReleaseDescs('ti.bios');
              for (var j = 0; j < rels.length; j++) {
                  if (rels[j].label == "default") {
                      archiveName = rels[j].aname;
                      break;
                  }
              }
              // archiveName is now set to the file name of the ti.bios
              // default release archive (or undefined)
SEE
xdc.bld.BuildEnvironment.getReleaseDescs()
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Script

metaonly module xdc.bld.Script
index URL

Model of a script

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/bld/Script.xdc
var Script = xdc.useModule('xdc.bld.Script');
module-wide constants & types
    var obj = new Script.Attrs// Optional attributes for a script instance;
        obj.hasMain// if true, this script defines main() = Bool ...
        obj.exportSrc// if false, don't add to default release = Bool ...
        obj.releases// releases this script is a part of = Release.Instance[] ...
per-instance config parameters
    var params = new Script.Params// Instance config-params object;
        params.attrs// Optional attributes for this test instance = Script.Attrs undefined;
        params.name// = String undefined;
per-instance functions
     inst.addTest// Add specified test to script(Test.Attrs testAttrs) returns Test.Instance
struct Script.Attrs
index URL

Optional attributes for a script instance

Configuration settings
var obj = new Script.Attrs;
    obj.hasMain = Bool ...
    // if true, this script defines main()
    obj.exportSrc = Bool ...
    // if false, don't add to default release
    obj.releases = Release.Instance[] ...
    // releases this script is a part of
FIELDS
releases — This array contains releases that will contain the script. Thus, a single script can be part of any set of releases. Each script is always added to the package's "default release" in addition to any releases specified in the releases array.
hasMain — This script defines a main() function. This function is called after the capsule is loaded. If the script does not define main(), it must contain statements that will run script as part of loading the script.
exportSrc — Scripts are added to the default release unless this flag is set to false.
SEE
attrs
Instance Config Parameters
index URL

Configuration settings
var params = new Script.Params;
// Instance config-params object
    params.attrs = Script.Attrs undefined;
    // Optional attributes for this test instance
    params.name = String undefined;
    //
config Script.Params.attrs // instance
index URL

Optional attributes for this test instance

Configuration settings
var params = new Script.Params;
...
params.attrs = Script.Attrs undefined;
config Script.Params.name // instance
index URL
Configuration settings
var params = new Script.Params;
...
params.name = String undefined;
Script.addTest() // instance
index URL

Add specified test to script

Configuration settings
inst.addTest(Test.Attrs testAttrs) returns Test.Instance
ARGUMENTS
testAttrs — optional test attrs object (xdc.bld.Test.Attrs)
DETAILS
A test encapsulates a script and a set of arguments passed to the script when it is run.
Tests are run by naming the goal "<test_name>.test" on the xdc command line; <test_name> is the test's name.
Multiple tests may have the same name; in this case, it is possible to run all tests using the single goal "<test_name>.test"
RETURNS
Returns the xdc.bld.Test instance object created.
THROWS
Error exceptions are thrown for fatal errors.
SEE
xdc.bld.Test, xdc.bld.Test.Attrs
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Test

metaonly module xdc.bld.Test
index URL

Model of a test

  • Configuration settings
  • Individual elements
Each Test instance represents a pair consisting of an executable and command line arguments for that executable. Each pair uniquely identifies an output sequence (the result of running the executable with the specified arguments) that can be compared to a known valid result. Executables that have non-deterministic execution behavior (e.g., multi-threaded apps) must ensure that the output is independent of these variations. [ more ... ]
Configuration settings sourced in xdc/bld/Test.xdc
var Test = xdc.useModule('xdc.bld.Test');
module-wide constants & types
    var obj = new Test.Attrs// Optional attributes for a test instance;
        obj.args// arguments passed to the exe for this test = String ...
        obj.execCmd// exec command for this test = String ...
        obj.execArgs// arguments to the exec command itself = String ...
        obj.groupName// name of a group of related tests = String ...
        obj.refOutput// name of a reference output file = String ...
        obj.cmpCmd// command used to compare refOutput = String ...
        obj.refExitCode// expected exit code (default = 0) = Int ...
per-instance config parameters
    var params = new Test.Params// Instance config-params object;
        params.attrs// Optional attributes for this test instance = Test.Attrs undefined;
DETAILS
Each Test instance represents a pair consisting of an executable and command line arguments for that executable. Each pair uniquely identifies an output sequence (the result of running the executable with the specified arguments) that can be compared to a known valid result. Executables that have non-deterministic execution behavior (e.g., multi-threaded apps) must ensure that the output is independent of these variations.
Test instances are created via the Executable.addTest() function; this ensures that each test is associated with a containing executable.
Test instances do not have unique names. However, each test does have a "group" name which is optionally specified via Test.Attrs. If the "group" name is not specified, it defaults to the name of the containing executable. To run any group of tests (which may consist of one or more executable and command-line pairs) it is sufficient to run the following command:
      xdc <test_group_name>.test
where <test_group_name> is the name of the test group to run.
Each Executable instance (created via PackageContents.addExecutable()) implicitly adds a test whose "group" name is the name of the executable and whose arguments are empty (i.e., argc == 0). Thus, it is possible to run any executable that can be built using the following command:
      xdc <exe_name>.test
where <exe_name> is the name of the executable. Note that if you add a test to the executable (without specifying a unique groupName), the command above will run the executable more than once; it will run once for every test associated with the executable.
struct Test.Attrs
index URL

Optional attributes for a test instance

Configuration settings
var obj = new Test.Attrs;
    obj.args = String ...
    // arguments passed to the exe for this test
    obj.execCmd = String ...
    // exec command for this test
    obj.execArgs = String ...
    // arguments to the exec command itself
    obj.groupName = String ...
    // name of a group of related tests
    obj.refOutput = String ...
    // name of a reference output file
    obj.cmpCmd = String ...
    // command used to compare refOutput
    obj.refExitCode = Int ...
    // expected exit code (default = 0)
FIELDS
args — this is a string of arguments (which may contain embedded strings) that are passed to the executable being run.
execCmd — this string names the "loader" which is responsible for running the executable with the arguments specified by the args field. If this field is null or undefined, the command used to run the executable is determined by the executable's configuration script; see xdc.cfg.Program.execCmd.
execArgs — this is a string of arguments passed to the "loader" to control how this loader manages the execution of the executable being run.
groupName — the name of the group of tests of which this test is a member.
refOutput — the name of a "reference" text file that is used to validate the output generated by running the executable with the specified arguments. If the exit status of the executable is 0 and the output of the executable differs from the contents of refOutput, the test fails. If this comparison fails, the output of the executable is saved to a temporary file to allow analysis of the failure. The temporary file's name is: ".tmp,{exeName},{id}", where {exeName} is the name of the executable and {id} is a test id number.
If refOutput is not defined (or set to null) no comparison is made; only the exit status of the executable is used to determine the success or failure of the test.
refExitCode — the expected exit status of the executable.
If refExitCode is not defined (or set to null) an exit status of 0 is assumed.
DETAILS
Unspecified attributes are "inherited" from Executable.Attrs; i.e., if one of fields in this structure is unspecified *and* this field's name matches a field name in Executable.Attrs, then this field's value defaults to the value in specified by Executable.Attrs. This mechanism makes it possible to establish executable-specific default values for any of the "inherited" attributes.
SEE
attrs
Instance Config Parameters
index URL

Configuration settings
var params = new Test.Params;
// Instance config-params object
    params.attrs = Test.Attrs undefined;
    // Optional attributes for this test instance
config Test.Params.attrs // instance
index URL

Optional attributes for this test instance

Configuration settings
var params = new Test.Params;
...
params.attrs = Test.Attrs undefined;
DETAILS
Default values for each of the fields in attrs:
groupName
name of the program "containing" this test
execCmd
the first non-null value in: prog.attrs.test.exec, xdc.cfg.Program.execCmd, prog.platform.getExecCmd().
execArgs
the first non-null value in: prog.attrs.test.execArgs, "".
args
the first non-null value in: prog.attrs.test.args, "".
generated on Sun, 25 Nov 2018 22:18:48 GMT


module xdc.bld.Utils

metaonly module xdc.bld.Utils
index URL

Utility functions to simplify creation of targets and platforms

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/bld/Utils.xdc
var Utils = xdc.useModule('xdc.bld.Utils');
module-wide functions
     Utils.display// Recursively print arbitrary object(String msg, Any obj) returns Void
     Utils.expandString// Expand references within a string to specified values(String cmd, Any values) returns String
Utils.display() // module-wide
index URL

Recursively print arbitrary object

Configuration settings
Utils.display(String msg, Any obj) returns Void
ARGUMENTS
msg — a string to print before printing the object
obj — an arbitrary object to display
Utils.expandString() // module-wide
index URL

Expand references within a string to specified values

Configuration settings
Utils.expandString(String cmd, Any values) returns String
ARGUMENTS
cmd — a string with embeded references to values defined in the values hashtable parameter
values — an arbitrary hash of name-value pairs; these values are used to substitute for references of the form $(name) that appear within cmd.
DETAILS
All references of the form "$(<name>)" within the command string, cmd are replaced with the string value having key <name> in the hashtable values.
If <name> appears in values and its value is null or undefined, then $(<name>) is replaced with the empty string. If <name> does not appear in values, then $(<name>) is not replaced.
RETURNS
string with references replaced as specified by the values hash.
THROWS
Error exceptions are thrown for fatal errors
generated on Sun, 25 Nov 2018 22:18:48 GMT


package xdc.cfg
index URL

Configuration Object Model elements

  • DETAILS
  • COMPATIBILITY CHECKS
  • CONTROLLING COMPATIBILITY CHECKS
  • THROWS
  • SEE
This package contains the modules necessary to populate the XDC Configuration Object Model. In addition, this package supplies a C/C++ header, global.h, that facilitates the creation of portable sources that need to reference global values defined as part of a configuration (xdc.cfg.Program.global). [ more ... ]
XDCspec declarations sourced in xdc/cfg/package.xdc
requires xdc.services.global;
package xdc.cfg [1, 0, 2] {
    module Program;
    // The Program object for the configuration object model
    module SourceDir;
    // Manage config generated source directories
}
DETAILS
This package contains the modules necessary to populate the XDC Configuration Object Model. In addition, this package supplies a C/C++ header, global.h, that facilitates the creation of portable sources that need to reference global values defined as part of a configuration (xdc.cfg.Program.global).
COMPATIBILITY CHECKS
During configuration certain compatibility checks are made. These checks include:
  1. target compatibility among all packages that are included in the configuration
  2. package compatibility among all packages included in the configuration
  3. package compatibility with respect to the set of packages used to build the packages that are part of the configuration set.
By default, if any of the checks above fail, the configuration step fails. It is possible, however, to selectively exclude particular packages from these checks and/or treat check failures as non-fatal warnings.
There are two "environment" variables that control these checks:
xdc.cfg.check.exclude
a regular expression that is used to select packages that should be excluded from the set of packages checked during configuration.
xdc.cfg.check.fatal
if set to "false", force any incompatibilities detected to be treated as warnings only; otherwise incompatibilities are fatal
Of course, it is also possible to use both options together to achieve a desired effect.
To define these environment variables one must pass the appropriate -D options to the XDCscript shell (xs) which is used to run the configuro command line configuration tool. If, on the other hand, you are using xdc to run the configuration step you can set these variables by setting the xsopts attribute of an xdc.bld.Executable within a build script.
CONTROLLING COMPATIBILITY CHECKS
To treat compatibility check failures as warnings for the executable app:
    Pkg.addExecutable("app", targ, targ.platform, {
         xsopts: "-Dxdc.cfg.check.fatal=false"
    });
To ignore any incompatibilities triggered by targets used by the ti.targets.rts* packages:
    Pkg.addExecutable("app", targ, targ.platform, {
        xsopts: "-Dxdc.cfg.check.exclude='ti.targets.rts.*'"
    });
In this case, the xdc.cfg.check.exclude option is regular expression used to exclude any package whose names matches the regular expression from the checks.
Finally, if you don't want to set xsopts on each executable, it is possible to set it for all executables within a package by setting the xsopts attribute of the xdc.bld.PackageContents (a.k.a. Pkg) object. For example, to turn all compatibility checks into warnings for all executables in a package, add the following line to the package's build script:
    Pkg.attrs.xsopts = "-Dxdc.cfg.check.fatal=false";
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.cfg.USE_MODULE_PARAMETER_ERROR
The first parameter of an xdc.useModule() call must be a string. This error is raised if the first parameter is of any other type.
xdc.cfg.CONFIG_ERROR
This is a general error reported when the program configuration fails. This error is caused by one or more configuration errors. The list of those specific errors precedes this error.
xdc.cfg.INCOMPATIBLE_TARGET_VERSION
This is an error or a warning usually reported when the version of the compiler used in the current build is not compatible with the version of the compiler used to build some of the loaded packages. The compiler version might be encoded in the compatibility keys displayed in the error message, but it is not required. Please check the documentation of the current target's package for the content of the compatibility keys.
SEE
xdc.cfg.Program.global, xdc.tools.configuro.Main
generated on Sun, 25 Nov 2018 22:18:55 GMT


module xdc.cfg.Program

metaonly module xdc.cfg.Program
index URL

The Program object for the configuration object model

  • Configuration settings
  • Individual elements
This module defines the "root" of the configuration object model; all "top-level" configuration settings for the executable are provided by this object. Program configuration scripts reference this module via the global variable Program; i.e., Program is implicitly initialized as follows: [ more ... ]
Configuration settings sourced in xdc/cfg/Program.xdc
var Program = xdc.useModule('xdc.cfg.Program');
module-wide constants & types
    var obj = new Program.GenerationOptions// Options that control the files generated as part of program configuration;
        obj.debuggerFiles// if true, generate debugger "project" files = Bool ...
    var obj = new Program.SectionSpec// Map that instructs the linker where to place output sections;
        obj.runSegment// segment where section contents are run = String ...
        obj.loadSegment// segment where section contents are loaded = String ...
        obj.runAddress// start address of section when run = UInt ...
        obj.loadAddress// start address of section when loaded = UInt ...
        obj.runAlign// alignment of section within runSegment = UInt ...
        obj.loadAlign// alignment of section within loadSegment = UInt ...
        obj.type// target-specific flags = String ...
        obj.fill// fill value = UInt ...
module-wide config parameters
     Program.argSize// The size allocated for command line args to the executable = UInt 0x200;
     Program.build// This program's build attributes = Any undefined;
     Program.buildPackage// The name of the executable's package = String undefined;
     Program.codeModel// The memory model for code = String null;
     Program.cpu// The execution context "seen" by the executable = IExeContext.Instance undefined;
     Program.dataModel// The memory model for data = String null;
     Program.endian// The endianess of the executable = String null;
     Program.execCmd// The command used to run this executable = String undefined;
     Program.gen// Generation options for this executable = Program.GenerationOptions undefined;
     Program.global// Global variable declarations = Any[string] undefined;
     Program.heap// The size of the executable's initial heap = UInt 0x1000;
     Program.linkTemplate// The template for the Program's linker command file = String null;
     Program.main// The main entry point for the program = Int(*)(Int,Char*[]) undefined;
     Program.name// The name of the executable file = String undefined;
     Program.platform// The executable's platform instance object = IPlatform.Instance undefined;
     Program.platformName// The name of the executable's platform = String undefined;
     Program.sectMap// A section name to SectionSpec mapping = Any[string] undefined;
     Program.sectionsExclude// Sections to exclude from linker command file generation = String null;
     Program.sectionsTemplate// Replace the sections portion of the generated linker command file = String null;
     Program.stack// The size of the executable's initial stack = UInt 0x1000;
     Program.sysStack// The size of the executable's initial system stack = UInt 0x1000;
module-wide functions
     Program.exportModule// Force all the symbols of a module to be part of a configuration(String modName) returns Void
     Program.getSectMap// Return the complete mapping of section names to SectionSpec entries() returns Any
DETAILS
This module defines the "root" of the configuration object model; all "top-level" configuration settings for the executable are provided by this object. Program configuration scripts reference this module via the global variable Program; i.e., Program is implicitly initialized as follows:
      var Program = xdc.useModule('xdc.cfg.Program');
After a configuration script completes successfully, the following files are generated:
  1. package/cfg/<exe_name>.c
  2. package/cfg/<exe_name>.xdl
where <exe_name> is the name of the executable with the final '.' character replaced with an '_'.
The generated C file contains code and data from each module used by the program and must be compiled and linked with the other sources to produce the final executable. The generated linker command file must also be added during this final link step.
The linker command file is produced by expanding a template provided by the platform specifed during configuration and contains hardware and compiler specific directives required by the target modules that are part of the program's configuration. This template expands other templates specified by each imported package's getSects method, for example. This allows each package participating in the configuration executable to automatically contribute a portion of the executable's linker command file.
You can modify or augment the contents of this file via sectionsExclude and sectionsTemplate. It is even possible to completely replace the template used to generate this file via linkTemplate. If a custom template is used, it should still invoke getSects methods for all loaded packages. These configuration options provide the user complete control of the linker command file.
struct Program.GenerationOptions
index URL

Options that control the files generated as part of program configuration

Configuration settings
var obj = new Program.GenerationOptions;
    obj.debuggerFiles = Bool ...
    // if true, generate debugger "project" files
FIELDS
debuggerFiles — If set to true in a configuration script, debugger project files will be generated as part of the configuration step. If set to false, these files will not be generated.
If it is not set (or set to undefined) and the environment variable environment["xdc.cfg.gen.debuggerFiles"] is non-null, then the default value of this parameter is taken to be the value of the following expression:
            environment["xdc.cfg.gen.debuggerFiles"] == "true"
This makes it is possible to enable the generation of debugger project files from build scripts by passing the option -Dxdc.cfg.gen.debuggerFiles=true to the configuration tool (see xdc.bld.Executable.Attrs.xsopts or xdc.bld.PackageContents.Attrs.xsopts).
Finally, if debuggerFiles is not set (or set to undefined) and the environment variable above is not defined, the generation of debugger project files occurs only if xdc.cfg.Program.build.profile contains the string "debug". So, unless otherwise specified, debug profiles result in debugger project files being generated.
struct Program.SectionSpec
index URL

Map that instructs the linker where to place output sections

Configuration settings
var obj = new Program.SectionSpec;
    obj.runSegment = String ...
    // segment where section contents are run
    obj.loadSegment = String ...
    // segment where section contents are loaded
    obj.runAddress = UInt ...
    // start address of section when run
    obj.loadAddress = UInt ...
    // start address of section when loaded
    obj.runAlign = UInt ...
    // alignment of section within runSegment
    obj.loadAlign = UInt ...
    // alignment of section within loadSegment
    obj.type = String ...
    // target-specific flags
    obj.fill = UInt ...
    // fill value
FIELDS
runSegment — Defines the memory segment where the section is to be run.
loadSegment — Defines the memory segment where the section is to be loaded. If 'runSegment' or 'loadSegment' is defined, but not both, the linker is instructed to use the defined field as the load and run allocation for the section.
runAddress — Defines the memory address where the section is to be run. It is an error if both 'runSegment' and 'runAddress' are specified.
loadAddress — Defines the memory address where the section is to be loaded. It is an error if both 'loadSegment' and 'loadAddress' are specified. If 'runAddress' or 'loadAddress' is defined, but not both, the linker is instructed to use the defined field as the load and run address for the section.
runAlign — If runSegment is specified, runAlign determines the alignment. It is an error if both 'runAlign' and 'runAddress' are specified.
loadAlign — If runSegment is specified, runAlign determins the alignment. It is an error if both 'loadAlign' and 'loadAddress' are specified.
type — Defines flags for special section types (COPY, DSECT, NOLOAD).
fill — Defines the value to initialize an uninitialized section.
DETAILS
This structure contains some fields that are specific to TI targets. On non-TI targets, such fields are ignored.
config Program.argSize // module-wide
index URL

The size allocated for command line args to the executable

Configuration settings
Program.argSize = UInt 0x200;
DETAILS
On platforms that require static allocation of space to hold command line arguments, this parameter specifies its maximum size (in units of chars).
Command line arguments are passed to C's main function when it's declared via the prototype: int main(int argc, char *argv[]). the argv array points to an array of strings allocated from the memory block whose size is controlled by argSize.
Setting argSize to 0 means that no argv array will be allocated and the application main() function should be declared as int main(void).
config Program.build // module-wide
index URL

This program's build attributes

Configuration settings
Program.build = Any undefined;
DETAILS
This parameter allows arbitrary build attributes to be carried forward from the Build Object Model (BOM) into the configuration model for program configuration scripts to read.
Conceptually, this config parameter should be declared as follows:
      struct BuildAttrs inherits xdc.bld.Executable.Attrs {
          config xdc.bld.ITarget.Module target;
      };
All parameters of the target associated with the executable being configured are available through 'Program.build.target'. Any config parameter set in the BOM's xdc.bld.Executable.attrs is also available through build. For example, the name of the target is Program.build.target.name and the name of the executable's configuration script is Program.build.cfgScript.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.buildPackage // module-wide
index URL

The name of the executable's package

Configuration settings
Program.buildPackage = String undefined;
DETAILS
This is the full package name (relative to the package's repository) of the package that contains the executable being configured.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.codeModel // module-wide
index URL

The memory model for code

Configuration settings
Program.codeModel = String null;
DETAILS
This parameter is an alias for build.target.model.codeModel and is set to one of the following target-specific values: "near", "far", "large", or null.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.cpu // module-wide
index URL

The execution context "seen" by the executable

Configuration settings
Program.cpu = IExeContext.Instance undefined;
DETAILS
Since the execution context is largely determined by the CPU that runs the executable, this configuration parameter allows scripts with access to the program object to conditionally configure based on CPU characteristics (e.g., ISA or revision of a chip).
READONLY
This parameter is set by the platform's implementation of xdc.IPackage (i.e., package.xs).
config Program.dataModel // module-wide
index URL

The memory model for data

Configuration settings
Program.dataModel = String null;
DETAILS
This parameter is an alias for build.target.model.dataModel and is set to one of the following target-specific values: "near", "far", "large", or null.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.endian // module-wide
index URL

The endianess of the executable

Configuration settings
Program.endian = String null;
DETAILS
This parameter is an alias for build.target.model.dataModel and is set to one of the following values: "big", "little", or null.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.execCmd // module-wide
index URL

The command used to run this executable

Configuration settings
Program.execCmd = String undefined;
DETAILS
This string is used to create a command that runs the executable from the command line. If it is not set by the configuration script, it is set by the program's platform package (during program configuration).
This command is run as follows:
      execCmd <prog> <args>
where, <prog> is the name of the executable and <args> are the arguments specified in the test (if any).
NOTE
This parameter is ignored if the exec command is specified as part of the test; see xdc.bld.Test.Attrs.
config Program.gen // module-wide
index URL

Generation options for this executable

Configuration settings
Program.gen = Program.GenerationOptions undefined;
DETAILS
This configuration parameter allows the program configuration script to control (to some extent) what files are generated as part of the configuration process.
config Program.global // module-wide
index URL

Global variable declarations

Configuration settings
Program.global = Any[string] undefined;
DETAILS
Assignments to this hash table become global symbols that can be used to directly reference objects. These objects are declared in a generated header that is indirectly included by the header xdc/cfg/global.h.
Configuration scripts define symbols by adding new properties to global.
      Program.global.myInstance = Mod.create();
      Program.global.myString = "hello world";
Programs can reference the symbols defined in global by including the C/C++ header xdc/cfg/global.h as follows:
      #include <pkg/Mod.h>
      #include <xdc/cfg/global.h>
         :
      Mod_fxn(myInstance, ...);
      printf("greetings: %s\n", myString);
To compile sources that include xdc/cfg/global.h, one symbol must be defined before including this header:
xdc_cfg__header__
the package qualified name of the executable-specific C/C++ header generated by the program configuration tool; e.g., local/examples/package/cfg/mycfg_x62.h.
For example, to compile sources that reference the values declared in global for a TI C6x target with a generated configuration header named package/cfg/mycfg_x62.h in a package named local.examples the following command line is sufficient:
      cl6x -Dxdc_cfg__header__=local/examples/package/cfg/mycfg_x62.h ...
The xdc_cfg__header__ symbol is automatically defined when you use the the XDC Build Engine (xdc.bld) to create executables; see xdc.bld.Executable.addObjects
SEE
xdc.bld.Executable.addObjects
config Program.heap // module-wide
index URL

The size of the executable's initial heap

Configuration settings
Program.heap = UInt 0x1000;
DETAILS
On platforms that enable control of the size of the heap managed by the run-time support function malloc(), this parameter specifies its initial size (in units of chars).
config Program.linkTemplate // module-wide
index URL

The template for the Program's linker command file

Configuration settings
Program.linkTemplate = String null;
DETAILS
A template is used to create the linker command file for each program. It can be optionally specified by setting this configuration parameter in the program's configuration script. If linkTemplate it is not set or set to null, the template is obtained from the platform associated with this program (i.e., the platform named by the platform config in this module). See IPlatform.getLinkTemplate.
The linkTemplate string names a package path relative path; e.g., if the linker template you want to specify is "templates/big_n_hairy.xdt" in the package myCompany.myPackage, linkTemplate should be set to:
      "myCompany/myPackage/templates/big_n_hairy.xdt"
If linkTemplate begins with the string "./", the file is NOT searched for along the package path; instead the file name is taken to specify a file relative to the current working directory.
In any case, if linkTemplate is non-null, the file must exist; otherwise, the configuration step will fail.
SEE
sectionsTemplate, sectionsExclude, memoryExclude
config Program.main // module-wide
index URL

The main entry point for the program

Configuration settings
Program.main = Int(*)(Int,Char*[]) undefined;
DETAILS
This parameter is optionally set by the user's program configuration script. If it is not set, then a "legacy" main() function is assumed to be linked into the program; otherwise, the value of main is used as the "main" entry point to the program.
config Program.name // module-wide
index URL

The name of the executable file

Configuration settings
Program.name = String undefined;
DETAILS
This is the full file name (relative to the package's base) of the executable that results from this configuration.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.platform // module-wide
index URL

The executable's platform instance object

Configuration settings
Program.platform = IPlatform.Instance undefined;
DETAILS
The platform instance that provided an execution context for the executable being configured.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.platformName // module-wide
index URL

The name of the executable's platform

Configuration settings
Program.platformName = String undefined;
DETAILS
This field is the name of the platform instance used to create the executable; e.g., "ti.platforms.sim55xx", or "ti.platforms.sim6xxx:TMS320C6416".
Platform instance names have the form:
      <platform_pkg>:<instance_id>
where <platform_pkg> is the name of the platform package responsible for creating the platform instance and the optional ":<instance_id>" is a suffix that uniquely identifies the creation parameters for this instance.
The creation parameters are the values specified by the map xdc.bld.BuildEnvironment.platformTable; if this map does not contain the platform instance name, the instance is created with default values that are specific to the platform.
READONLY
This parameter is set by the generated program configuration script and must not be modified.
config Program.sectMap // module-wide
index URL

A section name to SectionSpec mapping

Configuration settings
Program.sectMap = Any[string] undefined;
DETAILS
This is a program specific mapping of output section names to SectionSpec objects. The map supports mapping of section names to memory names; see xdc.platform.IPlatform.sectMap.
This parameter enables program configurations to place named sections in platform specific memory regions. During generation of the linker command file, sections are mapped to named memories by first consulting this table; if the table does not contain a mapping, the target classifies each section as either "code", "data" or "stack" xdc.bld.ITarget.sectMap and the platform defines a memory region for each of these section types (xdc.platform.IPlatform.codeMemory/ xdc.platform.IPlatform.dataMemory). If this does not produce a result, an error is generated. It is important to note that sectMap does not contain the complete section allocation for the program. It only contains the entries explicitly added to sectMap. To get the complete section allocation, a user should call getSectMap.
Suppose for example that the platform defines a memory segment named "DDR2". The following configuration statement places everything from the ".text" section into the "DDR2" segment.
      Program.sectMap[".text"] = new Program.SectionSpec();
      Program.sectMap[".text"].loadSegment = "DDR2";
SEE
SectionSpec, xdc.platform.IPlatform.sectMap, xdc.bld.ITarget.sectMap
config Program.sectionsExclude // module-wide
index URL

Sections to exclude from linker command file generation

Configuration settings
Program.sectionsExclude = String null;
DETAILS
The sectionsExclude string is a JavaScript regular expression that is used to identify names of sections that should NOT be be handled by the normal linker command file generation process.
Sections whose name matches sectionsExclude must be handled using a custom linker command file or by specifying a custom template (see sectionsTemplate or linkTemplate).
EXAMPLES
To completely override the placement of all output sections you can define sectionsExclude to match any string.
      // Note: the '.' below represents _any_ character, not just "."
      Program.sectionsExclude = ".*";
To override output sections that begin with '.' you must specify the literal character '.' and use the '^' character to match the beginning of the string.
      // the sequence '^\.' matches just "." at the start of the name
      Program.sectionsExclude = "^\.";
To override a specific sections you should be careful to supply a regular expression that matches the entire section name. You can use '$' to match the end of the name.
      // match only ".const" or ".text"
      Program.sectionsExclude = "^\.const$|^\.text$";
SEE
sectionsTemplate, linkTemplate
config Program.sectionsTemplate // module-wide
index URL

Replace the sections portion of the generated linker command file

Configuration settings
Program.sectionsTemplate = String null;
DETAILS
The sectionsTemplate string names a template that is used to replace the "SECTIONS" content to the generated linker command file. This is useful especially when excluding specific sections via sectionsExclude or when taking full control of the linker command file via linkTemplate is unnecessary. The original "SECTIONS" content is computed and passed as an argument to this template, which makes it relatively simple to perform small changes to the "SECTIONS" content without having to explicitly handle every section required by the compiler toolchain.
The sectionsTemplate string names a package path relative path; e.g., if the linker template you want to specify is "templates/mySections.xdt" in the package myCompany.myPackage, sectionsTemplate should be set to:
      "myCompany/myPackage/templates/mySections.xdt"
If sectionsTemplate begins with the string "./", the file is NOT searched for along the package path; instead the file name is taken to specify a file relative to the current working directory.
In any case, if sectionsTemplate is non-null, the file must exist; otherwise, the configuration step will fail.
During expansion of this template, there are three "parameters" that can be referenced to generate new content.
this
reference to the Program object
$args[0]
is the complete section map derived from Program.sectMap; some special sections relevant to XDCtools are added to the map defined by Program.sectMap.
$args[1]
is a string that contains the content that would have been placed in the SECTIONS portion of the generated linker command file. This allows templates to easily modify this content or simply add statements before or after it.
EXAMPLE
The following template, specific to TI compiler tools, adds start and size symbols for the .stack section and ensures that the stack is the first section to be allocated in its designated memory segment.
    %// first output allocation for the .stack section
    %var sectMap = $args[0];
    %var stack = sectMap[".stack"];
       .stack: >`stack.loadSegment` START(_stack_start) SIZE(_stack_size)
    %
    %// now append the normally generated content
    `$args[1]`
Note: this example requires that the .stack section be excluded from the normal generation via sectionsExclude; otherwise this section will be specified twice by the template shown above.
      Program.sectionsExclude = "^\.stack$";
SEE
sectionsExclude, linkTemplate
config Program.stack // module-wide
index URL

The size of the executable's initial stack

Configuration settings
Program.stack = UInt 0x1000;
DETAILS
On platforms that enable control of the initial stack size (the stack that exists immediately after reset), this parameter specifies its initial size (in units of chars).
config Program.sysStack // module-wide
index URL

The size of the executable's initial system stack

Configuration settings
Program.sysStack = UInt 0x1000;
DETAILS
On architectures that maintain a separate "system stack" in addition to the normal stack, this parameter sets its initial size (in units of chars). This parameter is ignored for those architectures for which there is just a single stack; in other words, almost all known architectures.
This parameter is used on later generation TI/C55 16-bit DSPs where, in order to compatibly support 24-bit addresses, a separate system call/return stack that stores the upper address bits is employed.
Program.exportModule() // module-wide
index URL

Force all the symbols of a module to be part of a configuration

Configuration settings
Program.exportModule(String modName) returns Void
DETAILS
Although a call xdc.useModule() will force some of a module's methods to be part of a configuration, the linker is still free to omit any symbols that are not referenced. Use of exportModule will force all methods of the specified module to be available.
Program.getSectMap() // module-wide
index URL

Return the complete mapping of section names to SectionSpec entries

Configuration settings
Program.getSectMap() returns Any
DETAILS
The returned map is assembled from xdc.bld.ITarget.sectMap, xdc.platform.IPlatform.sectMap, xdc.platform.IPlatform.codeMemory, xdc.platform.IPlatform.dataMemory, xdc.platform.IPlatform.stackMemory and sectMap. The function can be called at any time during configuration, but if it is called before all packages had a chance to change sectMap, the returned map may not correspond to the actual section allocation as configured in the linker command file.
RETURNS
getSectMap returns a map with section names as keys and SectionSpec entries as values.
generated on Sun, 25 Nov 2018 22:18:55 GMT


module xdc.cfg.SourceDir

metaonly module xdc.cfg.SourceDir
index URL

Manage config generated source directories

  • Configuration settings
  • Individual elements
Every "product" can generate a collection of source files that must be compiled into a single library and linked with the application. Each collection of source files is placed in a subdirectory of a top-level directory and contains a GNU make file, named makefile, which builds the library. [ more ... ]
Configuration settings sourced in xdc/cfg/SourceDir.xdc
var SourceDir = xdc.useModule('xdc.cfg.SourceDir');
module-wide config parameters
     SourceDir.makefileName// Top-level makfile name = String "makefile.libs";
     SourceDir.outputDir// Top-level directory for config generated sources and makefiles = String undefined;
     SourceDir.verbose// Output progress messages during a build = Int 0;
module-wide functions
     SourceDir.build// Run make using the generated makefiles() returns Int
     SourceDir.getRelativePath// (String fm, String to) returns String
per-instance config parameters
    var params = new SourceDir.Params// Instance config-params object;
        params.buildLibs// Build generated library sources = Bool true;
        params.libraryName// Name of library of compiled sources in sourceDir = String undefined;
        params.sourceDir// Source directory for a specific "product's" generated sources = String undefined;
per-instance creation
    var inst = SourceDir.create// Create an instance-object(String name, params);
per-instance functions
     inst.getGenLibraryName// Get name of the output library for this set of source files() returns String
     inst.getGenSourceDir// Get name of the output directory for this set of source files() returns String
     inst.getName// () returns String
DETAILS
Every "product" can generate a collection of source files that must be compiled into a single library and linked with the application. Each collection of source files is placed in a subdirectory of a top-level directory and contains a GNU make file, named makefile, which builds the library.
This module generates a top-level makefile that builds all "product" libraries, the top-level directory that houses the "product" sub-directories, and any files necessary for integration with eclipse/CDT managed make. The generated "product" files need only ensure their sources can be built via their generated makefile (from their sub-directory).
config SourceDir.makefileName // module-wide
index URL

Top-level makfile name

Configuration settings
SourceDir.makefileName = String "makefile.libs";
DETAILS
This name is the base name of the makefile which is created in outputDir.
config SourceDir.outputDir // module-wide
index URL

Top-level directory for config generated sources and makefiles

Configuration settings
SourceDir.outputDir = String undefined;
DETAILS
This directory path can be either an absolute path or a path relative to the build working directory at the time source files are generated (this is NOT necessarily the same as the build directory at the time the generated sources are built!)
This parameter must never be set to an existing directory with source files in it. The directory referenced by this parameter can be deleted when a package containing the configuration script is cleaned.
If outputDir is not set, files will be output to the ./src sub-directory of the directory containing the configuration script.
config SourceDir.verbose // module-wide
index URL

Output progress messages during a build

Configuration settings
SourceDir.verbose = Int 0;
DETAILS
Positive values cause additional progress messages to be displayed. The greater the value, the more information is displayed.
0
no build progress output
1
output a message when the build is started and when it completes
2
output build progress output (both stdout and stderr) as well all level 1 output
3
output the build commands used as well as all level 2 output
SourceDir.build() // module-wide
index URL

Run make using the generated makefiles

Configuration settings
SourceDir.build() returns Int
SourceDir.getRelativePath() // module-wide
index URL
Configuration settings
SourceDir.getRelativePath(String fm, String to) returns String
Instance Config Parameters
index URL

Configuration settings
var params = new SourceDir.Params;
// Instance config-params object
    params.buildLibs = Bool true;
    // Build generated library sources
    params.libraryName = String undefined;
    // Name of library of compiled sources in sourceDir
    params.sourceDir = String undefined;
    // Source directory for a specific "product's" generated sources
config SourceDir.Params.buildLibs // instance
index URL

Build generated library sources

Configuration settings
var params = new SourceDir.Params;
...
params.buildLibs = Bool true;
DETAILS
If set to false, the configuration step will not attempt to build the generated library sources.
config SourceDir.Params.libraryName // instance
index URL

Name of library of compiled sources in sourceDir

Configuration settings
var params = new SourceDir.Params;
...
params.libraryName = String undefined;
DETAILS
This path must be relative to outputDir.
config SourceDir.Params.sourceDir // instance
index URL

Source directory for a specific "product's" generated sources

Configuration settings
var params = new SourceDir.Params;
...
params.sourceDir = String undefined;
DETAILS
This path must be relative to outputDir.
Static Instance Creation
index URL

Configuration settings
var params = new SourceDir.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SourceDir.create(String name, params);
// Create an instance-object
SourceDir.getGenLibraryName() // instance
index URL

Get name of the output library for this set of source files

Configuration settings
inst.getGenLibraryName() returns String
DETAILS
The name is either an absolute path or a path relative to the build directory at the time configuration is run.
SourceDir.getGenSourceDir() // instance
index URL

Get name of the output directory for this set of source files

Configuration settings
inst.getGenSourceDir() returns String
DETAILS
The name is either an absolute path or a path relative to the build directory at the time configuration is run.
SourceDir.getName() // instance
index URL
Configuration settings
inst.getName() returns String
generated on Sun, 25 Nov 2018 22:18:55 GMT


package xdc.platform
index URL

Interfaces and modules necessary for the XDC Platform Model

XDCspec declarations sourced in xdc/platform/package.xdc
package xdc.platform [1, 0, 1] {
    interface ICpuDataSheet;
    // CPU information provided by the HW model
    interface IExeContext;
    // Execution environment interface between a platform and an executable
    interface IPeripheral;
    // Configuration-time representation of a peripheral
    interface IPlatform;
    // Configuration-time interface to all platforms
    module ExeContext;
    // Stock implementation of xdc.platform.IExeContext
    module Utils;
    // Misc platform utilities
}
CUSTOM MEMORY CHECK
If a custom memory map is specified for a platform, through the configuration parameter xdc.platform.IPlatform.customMemoryMap, the custom map is checked against the default memory map to verify if the custom map fits within the default map. The environment variable xdc.platform.custom.check controls this check.
By default, the check is enabled. It can be disabled by passing -Dxdc.platform.custom.check="false" to the XDCscript shell (xs), which is used to run the configuro command line configuration tool. If, on the other hand, you are using xdc to run the configuration step you can set this variable by setting the xsopts attribute of an xdc.bld.Executable within a build script.
generated on Sun, 25 Nov 2018 22:19:02 GMT


module xdc.platform.ExeContext

metaonly module xdc.platform.ExeContext
index URL

Stock implementation of xdc.platform.IExeContext

  • Configuration settings
  • Individual elements
This module is used by platforms to create execution contexts that must be returned by xdc.platform.IPlatform.getExeContext().
Configuration settings sourced in xdc/platform/ExeContext.xdc
var ExeContext = xdc.useModule('xdc.platform.ExeContext');
module-wide constants & types
    var obj = new ExeContext.Cpu// CPU attributes necessary to create an execution context;
        obj.id// unique id within the platform = String ...
        obj.catalogName// name of catalog package = String ...
        obj.deviceName// module name within catalog package = String ...
        obj.revision// revision of specified device = String ...
        obj.clockRate// clock rate in MHz of CPU on board = Float ...
per-instance config parameters
    var params = new ExeContext.Params// Instance config-params object;
        params.attrs// The CPU "data-sheet" attributes = ICpuDataSheet.Instance undefined;
        params.board// The board-level attributes = IPlatform.Board undefined;
        params.catalogName// The name of the package containing the module named by deviceName = String undefined;
        params.clockRate// The clock rate in MHz of the CPU = Float undefined;
        params.deviceName// The name of a CPU device within the catalog package catalogName = String undefined;
        params.id// The CPU's unique id within the platform = String undefined;
        params.memoryMap// The memory map seen by executables at the time they are loaded = IPlatform.Memory[string] undefined;
        params.revision// The revision of the CPU = String "";
per-instance creation
    var inst = ExeContext.create// Create an instance-object(IExeContext.Cpu cpu, IPlatform.Board board, params);
struct ExeContext.Cpu
index URL

CPU attributes necessary to create an execution context

Configuration settings
var obj = new ExeContext.Cpu;
    obj.id = String ...
    // unique id within the platform
    obj.catalogName = String ...
    // name of catalog package
    obj.deviceName = String ...
    // module name within catalog package
    obj.revision = String ...
    // revision of specified device
    obj.clockRate = Float ...
    // clock rate in MHz of CPU on board
DETAILS
Attributes that uniquely identify the CPU responsible for executing an executable image.
Instance Config Parameters
index URL

Configuration settings
var params = new ExeContext.Params;
// Instance config-params object
    params.attrs = ICpuDataSheet.Instance undefined;
    // The CPU "data-sheet" attributes
    params.board = IPlatform.Board undefined;
    // The board-level attributes
    params.catalogName = String undefined;
    // The name of the package containing the module named by deviceName
    params.clockRate = Float undefined;
    // The clock rate in MHz of the CPU
    params.deviceName = String undefined;
    // The name of a CPU device within the catalog package catalogName
    params.id = String undefined;
    // The CPU's unique id within the platform
    params.memoryMap = IPlatform.Memory[string] undefined;
    // The memory map seen by executables at the time they are loaded
    params.revision = String "";
    // The revision of the CPU
config ExeContext.Params.attrs // instance
index URL

The CPU "data-sheet" attributes

Configuration settings
var params = new ExeContext.Params;
...
params.attrs = ICpuDataSheet.Instance undefined;
DETAILS
This "data sheet" allows one to get information about the CPU that runs the run the executable associated with this execution context.
Multi-CPU platforms provide multiple execution contexts; each context is associated with a single CPU on the platform.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config ExeContext.Params.board // instance
index URL

The board-level attributes

Configuration settings
var params = new ExeContext.Params;
...
const params.board = IPlatform.Board computed value;
DETAILS
This parameter defines the static attributes of the board containing the CPU that runs the executable.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config ExeContext.Params.catalogName // instance
index URL

The name of the package containing the module named by deviceName

Configuration settings
var params = new ExeContext.Params;
...
params.catalogName = String undefined;
DETAILS
This string names a package containing one or more modules that implements the xdc.platform.ICpuDataSheet interface.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config ExeContext.Params.clockRate // instance
index URL

The clock rate in MHz of the CPU

Configuration settings
var params = new ExeContext.Params;
...
params.clockRate = Float undefined;
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config ExeContext.Params.deviceName // instance
index URL

The name of a CPU device within the catalog package catalogName

Configuration settings
var params = new ExeContext.Params;
...
params.deviceName = String undefined;
DETAILS
This string names a module in the catalog package, specified by catalogName, that represents the CPU that runs the executable; i.e., it implements the xdc.platform.ICpuDataSheet interface.
config ExeContext.Params.id // instance
index URL

The CPU's unique id within the platform

Configuration settings
var params = new ExeContext.Params;
...
params.id = String undefined;
DETAILS
This id is the string used to identify a specific CPU within the platform that provides this execution context.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config ExeContext.Params.memoryMap // instance
index URL

The memory map seen by executables at the time they are loaded

Configuration settings
var params = new ExeContext.Params;
...
params.memoryMap = IPlatform.Memory[string] undefined;
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config ExeContext.Params.revision // instance
index URL

The revision of the CPU

Configuration settings
var params = new ExeContext.Params;
...
params.revision = String "";
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
Static Instance Creation
index URL

Configuration settings
var params = new ExeContext.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = ExeContext.create(IExeContext.Cpu cpu, IPlatform.Board board, params);
// Create an instance-object
ARGUMENTS
cpu — an xdc.platform.IExeContext.Cpu structure that uniquely identifies a specific CPU
board — an xdc.platform.IPlatform.Board structure that uniquely identifies a specific board
DETAILS
An execution context is the "view" that an executable has of the CPU it is running on; e.g., the accessible memory map including platform specific memory or memory mapped registers.
generated on Sun, 25 Nov 2018 22:19:02 GMT


interface xdc.platform.ICpuDataSheet

metaonly interface xdc.platform.ICpuDataSheet
index URL

CPU information provided by the HW model

The information in this interface is read-only, defined by the chip's data sheet, and is obtained by naming a module in a package that implements this interface. [ more ... ]
XDCspec summary sourced in xdc/platform/ICpuDataSheet.xdc
metaonly interface ICpuDataSheet { ...
instance: ...
XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
package xdc.platform;
metaonly interface ICpuDataSheet {
instance:
per-instance config parameters
    config String cpuCore// A string identifying the CPU Core;
    config String cpuCoreRevision// A string that uniquely identifies a revision of the core;
    config Int dataWordSize// The size of an int on the target in 8-bit bytes;
    config String deviceHeader// The optional header file that define device specific constants and structures;
    config Int minDataUnitSize// The minimum addressable data unit size in 8-bit bytes;
    config Int minProgUnitSize// The minimum addressable program unit size in 8-bit bytes;
    config IPeripheral.Instance peripherals// A map of peripherals available on the device[string];
per-instance creation
     create// Create an instance-object(String revision);
per-instance functions
     function getMemoryMap// Get the memory map that corresponds to the values of the specified registers(registers);
     function getRegisterSet// The set of valid register names for this CPU();
}
DETAILS
The information in this interface is read-only, defined by the chip's data sheet, and is obtained by naming a module in a package that implements this interface.
Data sheets are created by platforms as part of creating an "execution context" (see xdc.platform.IPlatform.getExeContext). This execution context includes the CPU's memory map as well as any external memory provided by the platform itself, for example.
config ICpuDataSheet.Params.cpuCore // instance
index URL

A string identifying the CPU Core

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
config String cpuCore;
DETAILS
This uniquely identifies the instruction set that the CPU can decode and execute.
config ICpuDataSheet.Params.cpuCoreRevision // instance
index URL

A string that uniquely identifies a revision of the core

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
config String cpuCoreRevision;
config ICpuDataSheet.Params.dataWordSize // instance
index URL

The size of an int on the target in 8-bit bytes

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
config Int dataWordSize;
config ICpuDataSheet.Params.deviceHeader // instance
index URL

The optional header file that define device specific constants and structures

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
config String deviceHeader;
config ICpuDataSheet.Params.minDataUnitSize // instance
index URL

The minimum addressable data unit size in 8-bit bytes

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
config Int minDataUnitSize;
config ICpuDataSheet.Params.minProgUnitSize // instance
index URL

The minimum addressable program unit size in 8-bit bytes

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
config Int minProgUnitSize;
config ICpuDataSheet.Params.peripherals // instance
index URL

A map of peripherals available on the device

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
config IPeripheral.Instance peripherals[string];
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
create(String revision);
// Create an instance-object
ARGUMENTS
revision — a string that identifies revision of the CPU to be created.
DETAILS
A "data sheet" for a CPU allows one to get specific attributes for a CPU programatically; e.g., the memory map of the CPU.
Notice that we don't specify CPU registers when we create a a data-sheet; registers are provided as necessary to the other functions defined in this interface. This allows one to more easily get memory maps for several different setting of the registers, for example.
ICpuDataSheet.getMemoryMap() // instance
index URL

Get the memory map that corresponds to the values of the specified registers

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
function getMemoryMap(registers);
ARGUMENTS
registers — a hash of named registers to values at the time an executable is to be loaded (for example)
DETAILS
If a register is not specified and this register can affect the memory map, the register is assumed to be set to its reset value (the value of the register immediately after a CPU reset).
RETURNS
Returns an array of xdc.platform.IPlatform.Memory objects that represent the memory visible to an executable running on the CPU.
ICpuDataSheet.getRegisterSet() // instance
index URL

The set of valid register names for this CPU

XDCspec declarations sourced in xdc/platform/ICpuDataSheet.xdc
function getRegisterSet();
DETAILS
This function returns the complete set of register names that may be passed to the getMemoryMap() function. This function is only used to enable one to write a "requires contract" for the getMemoryMap() function.
RETURNS
Returns an array of valid register names (strings) for this device; only names from this array are valid keys for the registers argument to getMemoryMap().
generated on Sun, 25 Nov 2018 22:19:01 GMT


interface xdc.platform.IExeContext

metaonly interface xdc.platform.IExeContext
index URL

Execution environment interface between a platform and an executable

This interface describes the execution environment provided by a platform as seen by an executable on a particular CPU at the time it is loaded. [ more ... ]
XDCspec summary sourced in xdc/platform/IExeContext.xdc
metaonly interface IExeContext { ...
instance: ...
XDCspec declarations sourced in xdc/platform/IExeContext.xdc
package xdc.platform;
metaonly interface IExeContext {
module-wide constants & types
    metaonly struct Cpu// CPU attributes necessary to create an execution context {
        String id// unique id within the platform;
        String catalogName// name of catalog package;
        String deviceName// module name within catalog package;
        String revision// revision of specified device;
        Float clockRate// clock rate in MHz of CPU on board;
    };
instance:
per-instance config parameters
    config ICpuDataSheet.Instance attrs// The CPU "data-sheet" attributes;
    readonly config IPlatform.Board board// The board-level attributes;
    config String catalogName// The name of the package containing the module named by deviceName;
    config Float clockRate// The clock rate in MHz of the CPU;
    config String deviceName// The name of a CPU device within the catalog package catalogName;
    config String id// The CPU's unique id within the platform;
    config IPlatform.Memory memoryMap// The memory map seen by executables at the time they are loaded[string];
    config String revision// The revision of the CPU = "";
}
DETAILS
This interface describes the execution environment provided by a platform as seen by an executable on a particular CPU at the time it is loaded.
Execution contexts are created by platforms via xdc.platform.IPlatform.getExeContext(). Execution contexts are created implicitly just prior to executing a program's configuration script. This execution context is made available to the configuration script as the global read-only Program.cpu configuration parameter; see xdc.cfg.Program.
struct IExeContext.Cpu
index URL

CPU attributes necessary to create an execution context

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
metaonly struct Cpu {
    String id;
    // unique id within the platform
    String catalogName;
    // name of catalog package
    String deviceName;
    // module name within catalog package
    String revision;
    // revision of specified device
    Float clockRate;
    // clock rate in MHz of CPU on board
};
DETAILS
Attributes that uniquely identify the CPU responsible for executing an executable image.
config IExeContext.Params.attrs // instance
index URL

The CPU "data-sheet" attributes

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
config ICpuDataSheet.Instance attrs;
DETAILS
This "data sheet" allows one to get information about the CPU that runs the run the executable associated with this execution context.
Multi-CPU platforms provide multiple execution contexts; each context is associated with a single CPU on the platform.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config IExeContext.Params.board // instance
index URL

The board-level attributes

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
readonly config IPlatform.Board board;
DETAILS
This parameter defines the static attributes of the board containing the CPU that runs the executable.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config IExeContext.Params.catalogName // instance
index URL

The name of the package containing the module named by deviceName

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
config String catalogName;
DETAILS
This string names a package containing one or more modules that implements the xdc.platform.ICpuDataSheet interface.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config IExeContext.Params.clockRate // instance
index URL

The clock rate in MHz of the CPU

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
config Float clockRate;
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config IExeContext.Params.deviceName // instance
index URL

The name of a CPU device within the catalog package catalogName

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
config String deviceName;
DETAILS
This string names a module in the catalog package, specified by catalogName, that represents the CPU that runs the executable; i.e., it implements the xdc.platform.ICpuDataSheet interface.
config IExeContext.Params.id // instance
index URL

The CPU's unique id within the platform

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
config String id;
DETAILS
This id is the string used to identify a specific CPU within the platform that provides this execution context.
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config IExeContext.Params.memoryMap // instance
index URL

The memory map seen by executables at the time they are loaded

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
config IPlatform.Memory memoryMap[string];
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
config IExeContext.Params.revision // instance
index URL

The revision of the CPU

XDCspec declarations sourced in xdc/platform/IExeContext.xdc
config String revision = "";
READONLY
This parameter is set by the platform and is readonly for configuration scripts.
generated on Sun, 25 Nov 2018 22:19:01 GMT


interface xdc.platform.IPeripheral

metaonly interface xdc.platform.IPeripheral
index URL

Configuration-time representation of a peripheral

XDCspec summary sourced in xdc/platform/IPeripheral.xdc
metaonly interface IPeripheral { ...
instance: ...
XDCspec declarations sourced in xdc/platform/IPeripheral.xdc
package xdc.platform;
metaonly interface IPeripheral {
module-wide constants & types
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
module-wide functions
     IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
     IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
instance:
per-instance config parameters
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
}
typedef IPeripheral.IPeripheralArray
index URL
XDCspec declarations sourced in xdc/platform/IPeripheral.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef IPeripheral.StringArray
index URL
XDCspec declarations sourced in xdc/platform/IPeripheral.xdc
typedef String StringArray[];
IPeripheral.getAll() // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in xdc/platform/IPeripheral.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
IPeripheral.getRegisters() // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in xdc/platform/IPeripheral.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config IPeripheral.Params.name // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in xdc/platform/IPeripheral.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config IPeripheral.Params.owner // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in xdc/platform/IPeripheral.xdc
config String owner;
generated on Sun, 25 Nov 2018 22:19:01 GMT


interface xdc.platform.IPlatform

metaonly interface xdc.platform.IPlatform
index URL

Configuration-time interface to all platforms

This interface defines the elements that must be implemented by all "platform packages". All programs are built to execute on a platform and each program includes exactly one platform package (which defines the platform). [ more ... ]
XDCspec summary sourced in xdc/platform/IPlatform.xdc
metaonly interface IPlatform { ...
instance: ...
XDCspec declarations sourced in xdc/platform/IPlatform.xdc
package xdc.platform;
metaonly interface IPlatform {
module-wide constants & types
    typedef IPlatform.Memory MemoryMap// Type to be used for maps of Memory objects[string];
    metaonly struct Board// Board-level description {
        String id// unique id within the platform;
        String boardName// name of the board;
        String boardFamily// optional family name;
        String boardRevision// optional revision string;
    };
    metaonly struct Memory// A named contiguous range of addresses {
        String comment// description of this block;
        String name// name of memory segment;
        String space// "code", "data", "code/data", etc...;
        UInt page// page of memory segment;
        UInt base// base address of memory segment;
        UInt len// length of memory segment;
        String access// attributes of memory: "RWX";
        Bool cacheable// Is this block cacheable?;
        Any cacheAttrs// Device specific MMU attributes;
    };
instance:
per-instance config parameters
    config String codeMemory// The default segment for code sections;
    config IPlatform.Memory customMemoryMap// A custom mapping of memory names to memory objects[string];
    config String dataMemory// The default segment for data sections;
    readonly config IPlatform.Memory externalMemoryMap// A mapping of memory names to memory objects for external memory[string];
    config String renameMap// A map for renaming memory objects[string];
    config String sectMap// A mapping of linker output section names to memory segments[string];
    config String stackMemory// The default segment for stack;
per-instance creation
     create// Create an instance-object(String name);
per-instance functions
     function getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(cpuId);
     function getExeContext// Get execution context object corresponding to the specified program(prog);
     function getExecCmd// Get the exec command used to run the program on this platform(prog, platPath);
     function getLinkTemplate// Get Linker Command file template used to link an executable(prog);
}
DETAILS
This interface defines the elements that must be implemented by all "platform packages". All programs are built to execute on a platform and each program includes exactly one platform package (which defines the platform).
Platform packages contain exactly one module named "Platform" which implements the xdc.platform.IPlatform interface defined here.
Program configuration scripts may read (but not modify) the attributes provided by this interface from the global Program object; see xdc.cfg.Program.platform.
typedef IPlatform.MemoryMap
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Type to be used for maps of Memory objects

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
typedef IPlatform.Memory MemoryMap[string];
struct IPlatform.Board
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Board-level description

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
metaonly struct Board {
    String id;
    // unique id within the platform
    String boardName;
    // name of the board
    String boardFamily;
    // optional family name
    String boardRevision;
    // optional revision string
};
struct IPlatform.Memory
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A named contiguous range of addresses

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
metaonly struct Memory {
    String comment;
    // description of this block
    String name;
    // name of memory segment
    String space;
    // "code", "data", "code/data", etc...
    UInt page;
    // page of memory segment
    UInt base;
    // base address of memory segment
    UInt len;
    // length of memory segment
    String access;
    // attributes of memory: "RWX"
    Bool cacheable;
    // Is this block cacheable?
    Any cacheAttrs;
    // Device specific MMU attributes
};
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config IPlatform.Params.codeMemory // instance
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The default segment for code sections

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
config String codeMemory;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config IPlatform.Params.customMemoryMap // instance
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A custom mapping of memory names to memory objects

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
config IPlatform.Memory customMemoryMap[string];
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config IPlatform.Params.dataMemory // instance
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The default segment for data sections

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
config String dataMemory;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config IPlatform.Params.externalMemoryMap // instance
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A mapping of memory names to memory objects for external memory

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
readonly config IPlatform.Memory externalMemoryMap[string];
DETAILS
This parameter defines the external portion of the platform's memory map.
config IPlatform.Params.renameMap // instance
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A map for renaming memory objects

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
config String renameMap[string];
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config IPlatform.Params.sectMap // instance
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A mapping of linker output section names to memory segments

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
config String sectMap[string];
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config IPlatform.Params.stackMemory // instance
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The default segment for stack

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
config String stackMemory;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
Static Instance Creation
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XDCspec declarations sourced in xdc/platform/IPlatform.xdc
create(String name);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
IPlatform.getCpuDataSheet() // instance
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Get the Cpu data sheet object corresponding to specified cpu id

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
function getCpuDataSheet(cpuId);
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
IPlatform.getExeContext() // instance
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Get execution context object corresponding to the specified program

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
function getExeContext(prog);
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
IPlatform.getExecCmd() // instance
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Get the exec command used to run the program on this platform

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
function getExecCmd(prog, platPath);
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
IPlatform.getLinkTemplate() // instance
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Get Linker Command file template used to link an executable

XDCspec declarations sourced in xdc/platform/IPlatform.xdc
function getLinkTemplate(prog);
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:19:02 GMT


module xdc.platform.Utils

metaonly module xdc.platform.Utils
index URL

Misc platform utilities

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/platform/Utils.xdc
var Utils = xdc.useModule('xdc.platform.Utils');
module-wide functions
     Utils.addPeripheralsMap// Create a map of all peripherals available on a device(ICpuDataSheet.Instance cds) returns Void
     Utils.assembleMemoryMap// Combine the device and the external memory map into a platform map(Any cpu, Any plat, Any noCheck) returns Any
     Utils.assemblePeripheralsMap// Create a map of all peripherals available on a platform(ICpuDataSheet.Instance cds, IPlatform.Instance inst, String[] names) returns Void
     Utils.checkDefaults// Check if dataMemory, codeMemory and stackMemory are set correctly(Any inst, Any memMap) returns Any
     Utils.checkFit// Check if a memory map fits into available physical memory(Any realMemMap, Any customMemMap) returns Any
     Utils.checkOverlap// Check if there is an overlap among memory objects in a memory map(Any memMap) returns Any
     Utils.getCpuDataSheet// Get the specified cpu data sheet object(Any cpuDesc) returns Any
Utils.addPeripheralsMap() // module-wide
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Create a map of all peripherals available on a device

Configuration settings
Utils.addPeripheralsMap(ICpuDataSheet.Instance cds) returns Void
ARGUMENTS
cds — an xdc.platform.ICpuDataSheet instance
DETAILS
The config parameter peripherals is by default undefined in an xdc.platform.ICpuDataSheet instance. This function gathers all instance configuration parameters that are of the type xdc.platform.IPeripheral into the map peripherals.
Utils.assembleMemoryMap() // module-wide
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Combine the device and the external memory map into a platform map

Configuration settings
Utils.assembleMemoryMap(Any cpu, Any plat, Any noCheck) returns Any
ARGUMENTS
cpu — an xdc.platform.IExeContext object
plat — a platform instance
noCheck — if true, and a custom memory map is defined, the function does not check if the custom memory map fits into the available physical memory
DETAILS
This function combines memory maps and also applies memory map name changes requested through renameMap.
RETURNS
platform memory map
Utils.assemblePeripheralsMap() // module-wide
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Create a map of all peripherals available on a platform

Configuration settings
Utils.assemblePeripheralsMap(ICpuDataSheet.Instance cds, IPlatform.Instance inst, String[] names) returns Void
ARGUMENTS
inst — an xdc.platform.IPlatform instance
cds — an xdc.platform.ICpuDataSheet instance
names — an optional list of names of IPeripheral parameters
DETAILS
The config parameter peripherals is by default undefined in an xdc.platform.IPlatform instance. This function gathers all peripherals defined in an xdc.platform.ICpuDataSheet instance available as xdc.cfg.Program.cpu.attrs, and adds peripherals defined in this platform instance. By providing a list of config parameter names, the instance can add only listed peripherals instead of adding all available ones.
Utils.checkDefaults() // module-wide
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Check if dataMemory, codeMemory and stackMemory are set correctly

Configuration settings
Utils.checkDefaults(Any inst, Any memMap) returns Any
ARGUMENTS
inst — an xdc.platform.IPlatform instance
memMap — a map of xdc.platform.IPlatform.Memory objects
DETAILS
The xdc.platform.IPlatform instance parameters 'dataMemory', 'codeMemory', and 'stackMemory' are strings. This function verifies that those strings correspond to names of the memory objects in the supplied memory map.
RETURNS
'true' if checked parameters are valid, 'false' otherwise
Utils.checkFit() // module-wide
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Check if a memory map fits into available physical memory

Configuration settings
Utils.checkFit(Any realMemMap, Any customMemMap) returns Any
ARGUMENTS
realMemMap — a map of xdc.platform.IPlatform.Memory objects containing physical memory map as defined in datasheets for the device and the platform
customMemMap — a map of xdc.platform.IPlatform.Memory objects containing user defined memory map, which must fit within boundaries of 'realMemMap'
DETAILS
A custom memory map segment can be spread over multiple physical memories or multiple custom memory map segments can be located in one physical memory. However, code/data restrictions must be followed. A custom memory segment with the parameter 'space' set to "code/data", which is the default value if the parameter was not specified, can fit only into "code/data" physical memories. Custom memory segments with 'space' set to "code" can fit into "code" and "code/data" memories, and custom memory segments with 'space' set to "data" can fit into "data" and "code/data" physical memories.
RETURNS
'true', if customMemMap fits within realMemMap, and 'false' otherwise
Utils.checkOverlap() // module-wide
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Check if there is an overlap among memory objects in a memory map

Configuration settings
Utils.checkOverlap(Any memMap) returns Any
ARGUMENTS
memMap — a map of xdc.platform.IPlatform.Memory objects
RETURNS
a string with names of Memory objects that overlap
Utils.getCpuDataSheet() // module-wide
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Get the specified cpu data sheet object

Configuration settings
Utils.getCpuDataSheet(Any cpuDesc) returns Any
ARGUMENTS
cpuDesc — an xdc.platform.IExeContext.Cpu object identifying the CPU device
RETURNS
an xdc.platform.ICpuDataSheet.Instance object that corresponds to the specified cpuDesc
THROWS
Error exceptions are thrown for fatal errors
generated on Sun, 25 Nov 2018 22:19:02 GMT


package xdc.platform.generic
index URL

Platform package for the generic platform

  • DETAILS
  • THROWS
  • EXAMPLES
  • SEE
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on a "generic" platform; a platform specified by: [ more ... ]
XDCspec declarations sourced in xdc/platform/generic/package.xdc
requires xdc.platform[1, 0, 1];
package xdc.platform.generic [1, 0, 0] {
    module Platform;
    // A generic platform that supports any HW platform
}
DETAILS
This package implements the interfaces (xdc.platform.IPlatform) necessary to build and run executables on a "generic" platform; a platform specified by:
  • device name; e.g., "TMS320C2812"
  • catalog name; the name of a package containing the device named above
  • clock rate; the clock rate in MHz of the CPU
  • external memory map; an array of memory blocks external to the device
For a complate list of parameters that can be specified when creating a platform instance see the instance configuration parameters specified by xdc.platform.generic.Platform. This list, of course, includes all the instance config parameters specified by the xdc.platform.IPlatform interface.
THROWS
XDCException exceptions are thrown for fatal errors. The following error codes are reported in the exception message:
xdc.platform.generic.LINK_TEMPLATE_ERROR
This error is raised when this platform cannot found the default linker command template linkcmd.xdt in the build target's package. When a target does not contain this file, the config parameter xdc.cfg.Program.linkTemplate must be set.
EXAMPLES
Example 1: Suppose you need to create an application for a HW platform that uses the TMS320C2812 running at 150 MHz. You can use this package (in lieu of one specifically created for the HW platform) by defining a named instance of this package's Platform module. Add the following statements to your config.bld file to add the platform instance named "xdc.platform.generic:C28".
      Build.platformTable["xdc.platform.generic:C28"] = {
          clockRate:   150,
          catalogName: "ti.catalog.c2800",
          deviceName:  "TMS320C2812"
      };
With this name defined, it is now possible to configure an application using the platform instance name "xdc.platform.generic:C28". For example, if you are using xdc.tools.configuro to configure your application, the string "xdc.platform.generic:C28" can now be used to identify your platform:
      xs xdc.tools.configuro -b config.bld -p xdc.platform.generic:C28 ...
Example 2: The following example illustrates how to specify a platform instance with memory regions external to the specified device. In this case, we define a platform using a TMS320C6416 running at 600 MHz on a board with two external SDRAM memory blocks.
      Build.platformTable["xdc.platform.generic:C64"] = {
          clockRate:          600,
          catalogName:        "ti.catalog.c6000",
          deviceName:         "TMS320C6416",
          externalMemoryMap : [
              ["SDRAM1", {
                  name: "SDRAM1",
                  base: 0x80000000, len: 0x1000000, space: "code/data"
              }],
              ["SDRAM2", {
                  name: "SDRAM2",
                  base: 0x90000000, len: 0x1000000, space: "code/data"
              }],
          ]
      }
The externalMemoryMap attribute is a map of string names to xdc.platform.IPlatform.Memory structures.
SEE
xdc.platform.generic.Platform, xdc.bld.BuildEnvironment.platformTable, xdc.platform.IPlatform
generated on Sun, 25 Nov 2018 22:19:02 GMT


module xdc.platform.generic.Platform

metaonly module xdc.platform.generic.Platform
index URL

A generic platform that supports any HW platform

  • Configuration settings
  • Individual elements
This module implements xdc.platform.IPlatform and defines configuration parameters that correspond to this platform's Cpu's, Board's, etc.
Configuration settings sourced in xdc/platform/generic/Platform.xdc
var Platform = xdc.useModule('xdc.platform.generic.Platform');
module-wide constants & types
    var obj = new Platform.Board// Board-level description;
        obj.id// unique id within the platform = String ...
        obj.boardName// name of the board = String ...
        obj.boardFamily// optional family name = String ...
        obj.boardRevision// optional revision string = String ...
    var obj = new Platform.Memory// A named contiguous range of addresses;
        obj.comment// description of this block = String ...
        obj.name// name of memory segment = String ...
        obj.space// "code", "data", "code/data", etc... = String ...
        obj.page// page of memory segment = UInt ...
        obj.base// base address of memory segment = UInt ...
        obj.len// length of memory segment = UInt ...
        obj.access// attributes of memory: "RWX" = String ...
        obj.cacheable// Is this block cacheable? = Bool ...
        obj.cacheAttrs// Device specific MMU attributes = Any ...
module-wide config parameters
     Platform.BOARD// = IPlatform.Board {
        id: "0",
        boardName: "generic",
        boardFamily: null,
        boardRevision: null
    };
per-instance config parameters
    var params = new Platform.Params// Instance config-params object;
        params.CPU// = IExeContext.Cpu {
            id: "0",
            clockRate: 0,
            catalogName: null,
            deviceName: null,
            revision: ""
        };
        params.catalogName// The name of the package that contains the module 'deviceName' = String undefined;
        params.clockRate// The clock rate for the simulated device = Double undefined;
        params.codeMemory// The default segment for code sections = String null;
        params.customMemoryMap// A custom mapping of memory names to memory objects = IPlatform.Memory[string] undefined;
        params.dataMemory// The default segment for data sections = String null;
        params.deviceName// The CPU provided by this platform = String undefined;
        params.externalMemoryMap// A mapping of memory names to memory objects for external memory = IPlatform.Memory[string] undefined;
        params.renameMap// A map for renaming memory objects = String[string] undefined;
        params.sectMap// A mapping of linker output section names to memory segments = String[string] undefined;
        params.stackMemory// The default segment for stack = String null;
        params.verbose// The flag for printing debug info = Bool undefined;
per-instance creation
    var inst = Platform.create// Create an instance-object(String name, params);
per-instance functions
     inst.getCpuDataSheet// Get the Cpu data sheet object corresponding to specified cpu id(Any cpuId) returns Any
     inst.getExeContext// Get execution context object corresponding to the specified program(Any prog) returns Any
     inst.getExecCmd// Get the exec command used to run the program on this platform(Any prog, Any platPath) returns Any
     inst.getLinkTemplate// Get Linker Command file template used to link an executable(Any prog) returns Any
struct Platform.Board
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Board-level description

Configuration settings
var obj = new Platform.Board;
    obj.id = String ...
    // unique id within the platform
    obj.boardName = String ...
    // name of the board
    obj.boardFamily = String ...
    // optional family name
    obj.boardRevision = String ...
    // optional revision string
struct Platform.Memory
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A named contiguous range of addresses

Configuration settings
var obj = new Platform.Memory;
    obj.comment = String ...
    // description of this block
    obj.name = String ...
    // name of memory segment
    obj.space = String ...
    // "code", "data", "code/data", etc...
    obj.page = UInt ...
    // page of memory segment
    obj.base = UInt ...
    // base address of memory segment
    obj.len = UInt ...
    // length of memory segment
    obj.access = String ...
    // attributes of memory: "RWX"
    obj.cacheable = Bool ...
    // Is this block cacheable?
    obj.cacheAttrs = Any ...
    // Device specific MMU attributes
DETAILS
Memory structures are used in the description of the memory available from CPUs and platforms.
config Platform.BOARD // module-wide
index URL
Configuration settings
Platform.BOARD = IPlatform.Board {
    id: "0",
    boardName: "generic",
    boardFamily: null,
    boardRevision: null
};
Instance Config Parameters
index URL

Configuration settings
var params = new Platform.Params;
// Instance config-params object
    params.CPU = IExeContext.Cpu {
    //
        id: "0",
        clockRate: 0,
        catalogName: null,
        deviceName: null,
        revision: ""
    };
    params.catalogName = String undefined;
    // The name of the package that contains the module 'deviceName'
    params.clockRate = Double undefined;
    // The clock rate for the simulated device
    params.codeMemory = String null;
    // The default segment for code sections
    params.customMemoryMap = IPlatform.Memory[string] undefined;
    // A custom mapping of memory names to memory objects
    params.dataMemory = String null;
    // The default segment for data sections
    params.deviceName = String undefined;
    // The CPU provided by this platform
    params.externalMemoryMap = IPlatform.Memory[string] undefined;
    // A mapping of memory names to memory objects for external memory
    params.renameMap = String[string] undefined;
    // A map for renaming memory objects
    params.sectMap = String[string] undefined;
    // A mapping of linker output section names to memory segments
    params.stackMemory = String null;
    // The default segment for stack
    params.verbose = Bool undefined;
    // The flag for printing debug info
config Platform.Params.CPU // instance
index URL
Configuration settings
var params = new Platform.Params;
...
params.CPU = IExeContext.Cpu {
    id: "0",
    clockRate: 0,
    catalogName: null,
    deviceName: null,
    revision: ""
};
config Platform.Params.catalogName // instance
index URL

The name of the package that contains the module 'deviceName'

Configuration settings
var params = new Platform.Params;
...
params.catalogName = String undefined;
DETAILS
This parameter is required.
SEE
deviceName
config Platform.Params.clockRate // instance
index URL

The clock rate for the simulated device

Configuration settings
var params = new Platform.Params;
...
params.clockRate = Double undefined;
DETAILS
This parameter is required. There are no checks to determine if the device can actually support the given clock rate.
This clock rate is used to compute CPU loads and may be used by configuration scripts to configure/check on-device timers.
config Platform.Params.codeMemory // instance
index URL

The default segment for code sections

Configuration settings
var params = new Platform.Params;
...
params.codeMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "code" sections in the segment defined by this configuration parameter.
SEE
dataMemory, stackMemory
config Platform.Params.customMemoryMap // instance
index URL

A custom mapping of memory names to memory objects

Configuration settings
var params = new Platform.Params;
...
params.customMemoryMap = IPlatform.Memory[string] undefined;
DETAILS
This parameter allows platform instances to completely overwrite a default memory map based on the internal memory map coming from CPU's memory map and externalMemoryMap.
Custom memory map must fit within the default memory map, unless the verification of the fit is disabled (see xdc.platform).
config Platform.Params.dataMemory // instance
index URL

The default segment for data sections

Configuration settings
var params = new Platform.Params;
...
params.dataMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "data" sections in the segment defined by this configuration parameter.
SEE
codeMemory, stackMemory
config Platform.Params.deviceName // instance
index URL

The CPU provided by this platform

Configuration settings
var params = new Platform.Params;
...
params.deviceName = String undefined;
DETAILS
This parameter is required and named a module within a "catalog" package that implements the xdc.platform.ICpuDataSheet interface.
SEE
xdc.platform.ICpuDataSheet, catalogName
config Platform.Params.externalMemoryMap // instance
index URL

A mapping of memory names to memory objects for external memory

Configuration settings
var params = new Platform.Params;
...
const params.externalMemoryMap = IPlatform.Memory[string] computed value;
DETAILS
This parameter defines the external portion of the platform's memory map.
config Platform.Params.renameMap // instance
index URL

A map for renaming memory objects

Configuration settings
var params = new Platform.Params;
...
params.renameMap = String[string] undefined;
DETAILS
This map renames memory objects. If you do not want to change addresses in the default memory map, but you only want to rename the existing memory objects, you should use this parameter.
This map and customMemoryMap should not be used together because this map renames the default memory, but then customMemoryMap replaces the default memory objects. The parameters codeMemory, dataMemory and stackMemory are not automatically reassigned to new names. It is the user's responsibility to set those parameters accordingly to renameMap.
config Platform.Params.sectMap // instance
index URL

A mapping of linker output section names to memory segments

Configuration settings
var params = new Platform.Params;
...
params.sectMap = String[string] undefined;
DETAILS
During the generation of linker command files, the templates used to create these files examine several sources of information to determine the placement of named output sections into memory segments defined by the platform. The default placement, described below, uses information from the target and this platform's codeMemory, dataMemory, and stackMemory configuration parameters.
sectMap is used to override this default placement of output sections (".text", ".cinit", etc.) to a memory segment defined by the platform's memory map. For example, even if a platform's codeMemory parameter is defined to be "SRAM" and ".cinit" output sections are "code" sections, if the platform also defines the following sectMap, the section ".cinit" will be placed into a memory segment named "DDR2".
      sectMap[] = [
          [".cinit", "DDR2"],
      ];
NOTE
If an output section has an entry in Program.sectMap, that entry overrides the placement specified by this sectMap. A program's sectMap configuration always overrides the platform's sectMap settings.
DEFAULT MAPPING
The default placement of a target's output sections into memory segments defined by the platform is determined by the following configuration parameters:
  • ITarget.sectMap used to map a named output section to either "code", "data", or "stack"
  • codeMemory names a memory segment that will contain all "code" output sections
  • dataMemory names a memory segment that will contain all "data" output sections
  • stackMemory names a memory segment that will contain all "stack" output sections
SEE
xdc.cfg.Program.sectMap, xdc.bld.ITarget.sectMap
config Platform.Params.stackMemory // instance
index URL

The default segment for stack

Configuration settings
var params = new Platform.Params;
...
params.stackMemory = String null;
DETAILS
Each target has a section map with keys equal to the names of all sections that compiler and assembler for that target generate. The value for each key is either "code" or "data" or "stack". A linker template reads that map and puts all "stack" sections in the segment defined by this configuration parameter.
SEE
dataMemory, codeMemory
config Platform.Params.verbose // instance
index URL

The flag for printing debug info

Configuration settings
var params = new Platform.Params;
...
params.verbose = Bool undefined;
Static Instance Creation
index URL

Configuration settings
var params = new Platform.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Platform.create(String name, params);
// Create an instance-object
ARGUMENTS
name — the name of the platform instance being created
This name is the suffix of the platform specification supplied in the build script after the platform name (and optional ':') prefix has been removed. So the platform instance name "joes.platform.foo:bar" results in the name "bar" and the name "joes.platform.foo" result in the name "".
Platform.getCpuDataSheet() // instance
index URL

Get the Cpu data sheet object corresponding to specified cpu id

Configuration settings
inst.getCpuDataSheet(Any cpuId) returns Any
ARGUMENTS
cpuId — a string that corresponds to the platform-specific id of a CPU on this platform that runs executables.
DETAILS
This function executes in either the Configuration object model or the Build object model.
RETURNS
Returns an xdc.platform.ICpuDataSheet instance object that corresponds to the specified cpuId.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExeContext() // instance
index URL

Get execution context object corresponding to the specified program

Configuration settings
inst.getExeContext(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target,
DETAILS
This is called before the program's configuration script runs to get the Cpu object that is assigned to the program's cpu field.
Note: that the build script for the program is responsible for specifying the CPU; this is done by either implicitly naming the platform or explicitly naming a particular CPU on the platform (see xdc.bld.Executable.Attrs.cpuId).
This function executes in the Configuration object model.
RETURNS
Returns an xdc.platform.IExeContext instance object that corresponds to the CPU that will run the specified program.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getExecCmd() // instance
index URL

Get the exec command used to run the program on this platform

Configuration settings
inst.getExecCmd(Any prog, Any platPath) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate Cpu object to return (if there is more than one): prog.build.cpuId, prog.build.cpuArgs, prog.build.target
platPath — full path to the platform package for the program
DETAILS
This function is called after the program's configuration script runs and returns commands that are used to load and run the specified program. These commands are placed in a makefile that is included by the client package's generated makefile. Thus, the commands may refer to macros defined in this environment; e.g., $(SHELL) and $(XDCROOT), etc.
The special macro $(1) expands to test-specific arguments (xdc.bld.Test.attrs.execArgs) that are passed from the test to the platform's exec command. Thus, all platforms that support arguments to their exec command, should embed "$(1)" within the command string at the appropriate place to have these arguments interpreted by the exec command.
For example, a platform that uses a shell script to run executables and allows options to be passed to the shell script might return the following string:
        "$(SHELL) <exec_path> $(1) <exe_name>"
where, <exec_path> is the absolute path to the platform's exec shell script, and <prog_name> is the name of the executable relative to the package's base directory (i.e., xdc.cfg.Program.name).
This function executes in the Configuration object model.
RETURNS
Returns a string of commands used to execute this program in the context of the XDC generated makefiles.
THROWS
Error exceptions are thrown for fatal errors.
Platform.getLinkTemplate() // instance
index URL

Get Linker Command file template used to link an executable

Configuration settings
inst.getLinkTemplate(Any prog) returns Any
ARGUMENTS
prog — the xdc.cfg.Program object representing the program being configured.
This object contains the following properties that allows the platform to determine the appropriate link template to return:
  • prog.build.cpuId,
  • prog.build.cpuArgs,
  • prog.build.target
DETAILS
In the event that no template is provided by the program configuration script (see xdc.cfg.Program.linkTemplate), the template file identified by this method is used to generate the linker command file used to create the executable.
This function executes in the Configuration object model and is called after the program configuration script runs. The template is expanded in the context of the Configuration Object Model.
RETURNS
Returns a path string to a template file or null. If null, no linker command file is generated; otherwise this path is relative to the package path.
THROWS
Error exceptions are thrown for fatal errors.
generated on Sun, 25 Nov 2018 22:19:02 GMT


package xdc.rov
index URL

Runtime object viewer

XDCspec declarations sourced in xdc/rov/package.xdc
package xdc.rov [1, 0, 1] {
    interface ICallBack;
    // ROV tooling progress callback interface
    interface ICallStack;
    // A call stack interface (optionally) implementated by ROV servers
    module CallStack;
    // Provide call stack support to module ROV views
    module Model;
    // The ROV Model is the core of ROV. The Model must be started in order to retrieve ROV views for any modules
    module Program;
    // Root object for the ROV model
    module StateReader;
    // These APIs are all designed so that they will not re-read data that has already been read in
    module StructureDecoder;
    // Module for retrieving and decoding target structures
    module ViewInfo;
    // Describes the ROV views supported by a particular module
    module ViewXml;
    // This module sits on top of the ROV core to convert ROV views into XML. This is useful for test scripts and command-line based ROV tools
}
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.CallStack

metaonly module xdc.rov.CallStack
index URL

Provide call stack support to module ROV views

  • Configuration settings
  • Individual elements
This module provides methods that enable module ROV views to specify current CPU registers and get the corresponding stack traceback for the current executable. [ more ... ]
Configuration settings sourced in xdc/rov/CallStack.xdc
var CallStack = xdc.useModule('xdc.rov.CallStack');
module-wide functions
     CallStack.clearRegisters// Clear all register settings() returns Void
     CallStack.fetchRegisters// Set a device register necessary for stack trace back analysis(String[] names) returns Void
     CallStack.getRegister// Set a device register necessary for stack trace back analysis(String name) returns Long
     CallStack.setRegister// Set a device register necessary for stack trace back analysis(String name, Long value) returns Void
     CallStack.toText// Create a string represenation of the call stack() returns String
DETAILS
This module provides methods that enable module ROV views to specify current CPU registers and get the corresponding stack traceback for the current executable.
While the methods of this module are currently similar to the ICallStack interface, it is important to note that this module does not have instance methods; the ICallStack interface defines an interface for instance objects that enable the implementation of this module.
This module uses the xdc.rov.ICallStack instance provided by xdc.rov.Model.
CallStack.clearRegisters() // module-wide
index URL

Clear all register settings

Configuration settings
CallStack.clearRegisters() returns Void
CallStack.fetchRegisters() // module-wide
index URL

Set a device register necessary for stack trace back analysis

Configuration settings
CallStack.fetchRegisters(String[] names) returns Void
CallStack.getRegister() // module-wide
index URL

Set a device register necessary for stack trace back analysis

Configuration settings
CallStack.getRegister(String name) returns Long
CallStack.setRegister() // module-wide
index URL

Set a device register necessary for stack trace back analysis

Configuration settings
CallStack.setRegister(String name, Long value) returns Void
CallStack.toText() // module-wide
index URL

Create a string represenation of the call stack

Configuration settings
CallStack.toText() returns String
generated on Sun, 25 Nov 2018 22:18:54 GMT


interface xdc.rov.ICallBack

metaonly interface xdc.rov.ICallBack
index URL

ROV tooling progress callback interface

XDCspec summary sourced in xdc/rov/ICallBack.xdc
metaonly interface ICallBack { ...
instance: ...
XDCspec declarations sourced in xdc/rov/ICallBack.xdc
package xdc.rov;
metaonly interface ICallBack {
instance:
per-instance functions
    Bool getAbortFlag// ();
    Void updateStartupProgress// Progress update callback(Int percent, String message);
}
ICallBack.getAbortFlag() // instance
index URL
XDCspec declarations sourced in xdc/rov/ICallBack.xdc
Bool getAbortFlag();
ICallBack.updateStartupProgress() // instance
index URL

Progress update callback

XDCspec declarations sourced in xdc/rov/ICallBack.xdc
Void updateStartupProgress(Int percent, String message);
DETAILS
The ROV model calls this API at particular points to update any startup progress provided by the client ROV tooling.
generated on Sun, 25 Nov 2018 22:18:54 GMT


interface xdc.rov.ICallStack

metaonly interface xdc.rov.ICallStack
index URL

A call stack interface (optionally) implementated by ROV servers

Instances of this interface maintain a "local" set of processor registers sufficient to enable call stack parsing - walking up the C callstack and determining all nested calls up to the current program counter (specified by the local registers). This "local" set of registers is, of course, processor specific and must include both the program counter ("PC") and a frame pointer (processor-specific register name).
XDCspec summary sourced in xdc/rov/ICallStack.xdc
metaonly interface ICallStack { ...
instance: ...
XDCspec declarations sourced in xdc/rov/ICallStack.xdc
package xdc.rov;
metaonly interface ICallStack {
instance:
per-instance functions
    Void clearRegisters// ();
    Void fetchRegisters// (String names[]);
    Long getRegister// (String name);
    Void setRegister// (String name, Long value);
    String toText// ();
}
ICallStack.clearRegisters() // instance
index URL
XDCspec declarations sourced in xdc/rov/ICallStack.xdc
Void clearRegisters();
ICallStack.fetchRegisters() // instance
index URL
XDCspec declarations sourced in xdc/rov/ICallStack.xdc
Void fetchRegisters(String names[]);
ICallStack.getRegister() // instance
index URL
XDCspec declarations sourced in xdc/rov/ICallStack.xdc
Long getRegister(String name);
ICallStack.setRegister() // instance
index URL
XDCspec declarations sourced in xdc/rov/ICallStack.xdc
Void setRegister(String name, Long value);
ICallStack.toText() // instance
index URL
XDCspec declarations sourced in xdc/rov/ICallStack.xdc
String toText();
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.Model

metaonly module xdc.rov.Model
index URL

The ROV Model is the core of ROV. The Model must be started in order to retrieve ROV views for any modules

  • Configuration settings
  • Individual elements
The Model has a compatibility key. Any changes or additions to the public interfaces of the ROV core will result in a bump of the model version number.
Configuration settings sourced in xdc/rov/Model.xdc
var Model = xdc.useModule('xdc.rov.Model');
module-wide config parameters
     Model.vers// ROV API version number = Int 4;
module-wide functions
     Model.getICallBackInst// () returns ICallBack.Instance
     Model.getICallStackInst// () returns ICallStack.Instance
     Model.getIOFReaderInst// () returns Any
     Model.getISymbolTableInst// () returns ISymbolTable.Instance
     Model.getMemoryImageInst// () returns Any
     Model.getModuleList// () returns Any
     Model.setICallStackInst// Called only during Model initialization(ICallStack.Instance cs) returns Void
     Model.start// Start the ROV Model(Int vers, String executable, Any recap, ISymbolTable.Instance sym, Any mem, ICallBack.Instance callBack) returns Void
config Model.vers // module-wide
index URL

ROV API version number

Configuration settings
Model.vers = Int 4;
DETAILS
Model.start will throw an exception if the version parameter does not equal the Model's current version. The version number is changed based on modifications to the public APIs (in xdc.rov.Program) that would potentially break compatibility with clients.
This allows the Model to verify compatibility with its client.
Model.getICallBackInst() // module-wide
index URL
Configuration settings
Model.getICallBackInst() returns ICallBack.Instance
Model.getICallStackInst() // module-wide
index URL
Configuration settings
Model.getICallStackInst() returns ICallStack.Instance
Model.getIOFReaderInst() // module-wide
index URL
Configuration settings
Model.getIOFReaderInst() returns Any
Model.getISymbolTableInst() // module-wide
index URL
Configuration settings
Model.getISymbolTableInst() returns ISymbolTable.Instance
Model.getMemoryImageInst() // module-wide
index URL
Configuration settings
Model.getMemoryImageInst() returns Any
Model.getModuleList() // module-wide
index URL
Configuration settings
Model.getModuleList() returns Any
Model.setICallStackInst() // module-wide
index URL

Called only during Model initialization

Configuration settings
Model.setICallStackInst(ICallStack.Instance cs) returns Void
DETAILS
This method is called to "bind" an optional stack call stack parser and is called by the same client that calls Model.start().
Model.start() // module-wide
index URL

Start the ROV Model

Configuration settings
Model.start(Int vers, String executable, Any recap, ISymbolTable.Instance sym, Any mem, ICallBack.Instance callBack) returns Void
ARGUMENTS
vers — Model.start will throw an exception if the version parameter does not equal the Model's current version.
recap — Capsule of the ROV recap file. Retrieve this with xdc.loadCapsule(recapFilePath).
executable — The path to the executable file
sym — an object that implements the xdc.rov.ISymbolTable interface used to read symbols defined by the executable
mem — an object that implements the xdc.rov.IMemoryImage interface used to read target memory
callBack — an object that implements the xdc.rov.ICallback interface used to report progress status
DETAILS
The ROV Model requires instances of an ISymbolTable, an IMemoryImage, and an ICallBack. It also requires the ROV recap file, which can be located using the xdc.rov.Recap module.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.Program

metaonly module xdc.rov.Program
index URL

Root object for the ROV model

  • Configuration settings
  • Individual elements
This module is the main access point for all ROV operations. The Program APIs are used to retrieve the views for the requested modules.
Configuration settings sourced in xdc/rov/Program.xdc
var Program = xdc.useModule('xdc.rov.Program');
module-wide constants & types
    var obj = new Program.FetchDesc// Description of data to fetch;
        obj.type = String ...
        obj.isScalar = Bool ...
    var obj = new Program.InstDataView// Instance view data returned from a scan;
        obj.label = String ...
        obj.elements = Any[] ...
    var obj = new Program.ModDataView// Module view data returned from a scan;
        obj.elements = Any[] ...
    var obj = new Program.RawView// Raw module view;
        obj.modState = Any ...
        obj.instStates = Any[] ...
        obj.modCfg = Any ...
    var obj = new Program.StatusEntry// Single entry in the ROV status table;
        obj.mod = String ...
        obj.tab = String ...
        obj.inst = String ...
        obj.field = String ...
        obj.message = String ...
    var obj = new Program.TreeNode// Node for a generic "tree table" view;
        obj.label = String ...
        obj.children = Program.TreeNode[] ...
        obj.properties = Any[] ...
module-wide functions
     Program.addCMod// (Any mod) returns Void
     Program.createObject// Creates a JavaScript object that mirrors an object from memory(Ptr addr, Any typespec, Any ret, String name) returns Void
     Program.debugPrint// Print API which will only print the message if debug printing is enabled(String msg) returns Void
     Program.displayError// (Any view, String fieldName, String errorMsg) returns Void
     Program.exToString// Helper function for formatting exceptions into strings with filename and line number(Any e) returns String
     Program.fetchArray// Retrieve the specified array from the target(Program.FetchDesc desc, Ptr addr, Int len, Bool addrCheck) returns Any
     Program.fetchFromAddr// Returns a JavaScript object from the C object at the supplied address(Ptr addr, String typename, Int count) returns Any
     Program.fetchStaticString// Retrieves a static string from the executable(Ptr addr) returns String
     Program.fetchString// Retrieve a string from the target(Ptr addr, Bool addrCheck) returns String
     Program.fetchStruct// Retrieve the specified structure from the target(Program.FetchDesc desc, Ptr addr, Bool addrCheck) returns Any
     Program.fetchVariable// Returns a JavaScript object or a scalar that mirrors the content of the variable(String varName) returns Any
     Program.fetchVariableByPtr// Returns a JavaScript representation of a C object or a scalar pointed to by the supplied pointer variable(String varName) returns Any
     Program.getModuleConfig// Get a module's configuration state(String modName) returns Any
     Program.getPrivateData// Retrieves module's private ROV data(String modName) returns Any
     Program.getShortName// Convert canonical instance names to a short name(String name) returns String
     Program.getStatusTable// Returns the current table of all encountered status messages() returns Any
     Program.getSymbolValue// Returns the value for the given symbol(String symName) returns Int
     Program.lookupDataSymbol// Lookup symbolic names for an address(Int addr) returns Any
     Program.lookupFuncName// Lookup function names for an address(Int addr) returns Any
     Program.lookupSymbolValue// Returns the value for the given symbol(String symName) returns Int
     Program.lookupType// Creates a type specification from the Dwarf data(String type) returns Any
     Program.lookupTypeByVariable// Creates a type specification from the Dwarf data for a variable(String varName) returns Any
     Program.newViewStruct// Creates a new instance of the view structure for the specified view(String modName, String tabName) returns Any
     Program.ptrToHex// Convert pointer representation to hex string(Any ptr) returns String
     Program.readMemory// Reads a primitive value from memory(Ptr addr, UInt size, Int enc) returns Any
     Program.scanHandleView// Scan single instance of a module(String modName, Ptr instAddr, String tabName) returns Any
     Program.scanInstanceDataView// Retrieve a module's specified INSTANCE_DATA type view(String modName, String tabName) returns Program.InstDataView[]
     Program.scanInstanceView// Retrieve the instance-type views for a module(String modName, String tabName) returns Any
     Program.scanModuleDataView// Retrieve a module's specified MODULE_DATA type view(String modName, String tabName) returns Program.ModDataView
     Program.scanModuleView// Retrieve module-type view for a module(String modName, String tabName) returns Any
     Program.scanObjectView// Scan view for an embedded object(String modName, Any obj, String tabName) returns Any
     Program.scanRawView// Retrieve the raw view for a module(String modName) returns Program.RawView
     Program.scanTreeTableView// (String modName, String tabName) returns Program.TreeNode[]
     Program.scanTreeView// (String modName, String tabName) returns Any
     Program.setTimestampFunc// Sets API to be used for printing timestamp(Any func) returns Void
     Program.timestamp// API for printing timestamp messages for performance analysis(String msg) returns Void
struct Program.FetchDesc
index URL

Description of data to fetch

Configuration settings
var obj = new Program.FetchDesc;
    obj.type = String ...
    obj.isScalar = Bool ...
FIELDS
type — the fully qualified name of a specified type; i.e., a type declared in some .xdc file. For example, "xdc.runtime.Types.Timestamp64".
isScalar — if fetching an array, are the elements of the array really just one of the "scalar structs" defined by xdc.rov.support.ScalarStructs.
DETAILS
A FetchDesc object is required as the first argument of the fetchStruct and fetchArray methods. The FetchDesc tells ROV the type of the data to be fetched so it knows how much data to read and how to decode it.
Every reference-type field in a state structure has a FetchDesc generated for it, with the name <field name>$fetchDesc.
For example, the instance structure
      struct Instance_State {
          Char stack[];
      ];
will have defined obj.stack$fetchDesc, which can be used to fetch the array:
      var data = Program.fetchArray(obj.stack$fetchDesc, obj.stack, len);
SEE
fetchStruct, fetchArray
struct Program.InstDataView
index URL

Instance view data returned from a scan

Configuration settings
var obj = new Program.InstDataView;
    obj.label = String ...
    obj.elements = Any[] ...
SEE
scanInstanceDataView
struct Program.ModDataView
index URL

Module view data returned from a scan

Configuration settings
var obj = new Program.ModDataView;
    obj.elements = Any[] ...
SEE
scanModuleDataView
struct Program.RawView
index URL

Raw module view

Configuration settings
var obj = new Program.RawView;
    obj.modState = Any ...
    obj.instStates = Any[] ...
    obj.modCfg = Any ...
DETAILS
This is the structure returned by the scanRawView method. It contains the module's state, the instance states, and the module configuration fields and values.
struct Program.StatusEntry
index URL

Single entry in the ROV status table

Configuration settings
var obj = new Program.StatusEntry;
    obj.mod = String ...
    obj.tab = String ...
    obj.inst = String ...
    obj.field = String ...
    obj.message = String ...
DETAILS
ROV maintains a table of all errors, warnings, etc. encountered while processing views. This table is cleared on each call to clear cache (e.g., at each breakpoint).
struct Program.TreeNode
index URL

Node for a generic "tree table" view

Configuration settings
var obj = new Program.TreeNode;
    obj.label = String ...
    obj.children = Program.TreeNode[] ...
    obj.properties = Any[] ...
SEE
scanTreeTableView, ViewInfo.TREE_TABLE
Program.addCMod() // module-wide
index URL
Configuration settings
Program.addCMod(Any mod) returns Void
Program.createObject() // module-wide
index URL

Creates a JavaScript object that mirrors an object from memory

Configuration settings
Program.createObject(Ptr addr, Any typespec, Any ret, String name) returns Void
ARGUMENTS
addr — address of the object in memory
type — type specification for the object from memory
ret — already created object to which a new object is added
name — name for the new object
Program.debugPrint() // module-wide
index URL

Print API which will only print the message if debug printing is enabled

Configuration settings
Program.debugPrint(String msg) returns Void
Program.displayError() // module-wide
index URL
Configuration settings
Program.displayError(Any view, String fieldName, String errorMsg) returns Void
Program.exToString() // module-wide
index URL

Helper function for formatting exceptions into strings with filename and line number

Configuration settings
Program.exToString(Any e) returns String
Program.fetchArray() // module-wide
index URL

Retrieve the specified array from the target

Configuration settings
Program.fetchArray(Program.FetchDesc desc, Ptr addr, Int len, Bool addrCheck) returns Any
ARGUMENTS
desc — Fetch descriptor for the array, indicating the type of data in the array.
addr — Address of the array to fetch.
len — The number of arrray elements to fetch.
addrCheck — Optional, defaults to true. Indicates whether the memory image should validate the read by comparing the address to section information.
RETURNS
Returns a JavaScript array with the data in it.
THROWS
Throws an exception in the event that addr is not in the program's memory map, some error occurs that prevents memory from being read, or if len = 0.
Program.fetchFromAddr() // module-wide
index URL

Returns a JavaScript object from the C object at the supplied address

Configuration settings
Program.fetchFromAddr(Ptr addr, String typename, Int count) returns Any
ARGUMENTS
addr — Address of the C object
typeName — Name of the C type read from the address
count — Number of C objects read from the address
DETAILS
The type of the object is also supplied by the user. There is no checking whether the object at that address is of the supplied type. By default, only one instance of the specified type will be fetched from the address.
RETURNS
JavaScript representation of the object at the address
Program.fetchStaticString() // module-wide
index URL

Retrieves a static string from the executable

Configuration settings
Program.fetchStaticString(Ptr addr) returns String
ARGUMENTS
addr — Address of the string
DETAILS
This API makes use of an object file reader to improve the string reading performance--it reads the string from the file rather than performing a target memory read. For this reason, it should only be used on static strings and not dynamic ones.
RETURNS
Requested string or null if it can't be found.
Program.fetchString() // module-wide
index URL

Retrieve a string from the target

Configuration settings
Program.fetchString(Ptr addr, Bool addrCheck) returns String
ARGUMENTS
addr — Address of the string.
addrCheck — Optional, defaults to true. Indicates whether the memory image should validate the read by comparing the address to section information.
RETURNS
Requested string.
THROWS
Throws an exception in the event that addr is not in the program's memory map or some error occurs that prevents memory from being read.
Program.fetchStruct() // module-wide
index URL

Retrieve the specified structure from the target

Configuration settings
Program.fetchStruct(Program.FetchDesc desc, Ptr addr, Bool addrCheck) returns Any
ARGUMENTS
desc — Fetch descriptor for the structure, indicating the type of the structure.
addr — Address of the structure to fetch.
addrCheck — Optional, defaults to true. Indicates whether the memory image should validate the read by comparing the address to section information.
RETURNS
Returns the requested structure as a javascript object.
THROWS
Throws an exception in the event that addr is not in the program's memory map or some error occurs that prevents memory from being read.
Program.fetchVariable() // module-wide
index URL

Returns a JavaScript object or a scalar that mirrors the content of the variable

Configuration settings
Program.fetchVariable(String varName) returns Any
ARGUMENTS
varName — name of the variable
DETAILS
This function replicates primitive or aggregate objects from memory, and returns them as JavaScript objects. If the variable is an array or a structure, its corresponding JavaScript elements can be accessed as JavaScript arrays or structures. Pointers are not followed, but they are represented as hexadecimal values.
If the variable is not found in the object file, an exception is raised.
RETURNS
content of the variable
Program.fetchVariableByPtr() // module-wide
index URL

Returns a JavaScript representation of a C object or a scalar pointed to by the supplied pointer variable

Configuration settings
Program.fetchVariableByPtr(String varName) returns Any
DETAILS
This API first checks if there is such a variable, and if it is of a pointer type. If any of these checks fails, 'null' is returned. Otherwise, the pointer variable is dereferenced, and the memory content is interpreted as a pointed-to type.
Program.getModuleConfig() // module-wide
index URL

Get a module's configuration state

Configuration settings
Program.getModuleConfig(String modName) returns Any
ARGUMENTS
modName — Full module name to get the configs for.
DETAILS
Returns an object with all of the module configuration values used in configuring the application.
This object includes the common$ config params.
RETURNS
Object containing all of the module configs and their values.
Program.getPrivateData() // module-wide
index URL

Retrieves module's private ROV data

Configuration settings
Program.getPrivateData(String modName) returns Any
DETAILS
This API returns an object which can be used to store private data across different ROV API calls. The object is reset at every breakpoint.
This object is also passed as the context to all view init functions, so it can also be accessed using 'this'. However, the context changes when you call other APIs in your module; that is when you will need this API. It can also be used to support metaonly APIs which are called by other modules.
Program.getShortName() // module-wide
index URL

Convert canonical instance names to a short name

Configuration settings
Program.getShortName(String name) returns String
ARGUMENTS
name — Full canonical instance name.
DETAILS
Parses the full canonical instance name for the shorter name given by the user. If there is no shorter name, then it returns an empty string "".
RETURNS
The short name, if the user specified one. Empty string otherwise.
Program.getStatusTable() // module-wide
index URL

Returns the current table of all encountered status messages

Configuration settings
Program.getStatusTable() returns Any
DETAILS
This table is reset with every call to 'resetMods'. (e.g., at every breakpoint).
Program.getSymbolValue() // module-wide
index URL

Returns the value for the given symbol

Configuration settings
Program.getSymbolValue(String symName) returns Int
ARGUMENTS
symName — Name of symbol
DETAILS
Returns -1 if the symbol does not exist.
RETURNS
Address or value of symbol, or -1 if symbol does not exist
Program.lookupDataSymbol() // module-wide
index URL

Lookup symbolic names for an address

Configuration settings
Program.lookupDataSymbol(Int addr) returns Any
ARGUMENTS
addr — Address of symbols
DETAILS
Uses the ISymbolTable to look up the symbols at the given address.
This API is separate from lookupFuncName to address paging concerns. Use lookupFuncName to get function names (or any symbols in PROGRAM memory) and use lookupDataSymbol to get data symbols (for symbols in DATA memory).
RETURNS
Array of symbols at the requested address.
Program.lookupFuncName() // module-wide
index URL

Lookup function names for an address

Configuration settings
Program.lookupFuncName(Int addr) returns Any
ARGUMENTS
addr — Address of symbols
DETAILS
Uses the ISymbolTable to look up the symbols at the given address.
This API is separate from lookupDataSymbol to address paging concerns. Use lookupFuncName to get function names (or any symbols in PROGRAM memory) and use lookupDataSymbol to get data symbols (for symbols in DATA memory).
RETURNS
Array of symbols at the requested address.
Program.lookupSymbolValue() // module-wide
index URL

Returns the value for the given symbol

Configuration settings
Program.lookupSymbolValue(String symName) returns Int
ARGUMENTS
symName — Name of symbol
DETAILS
Returns -1 if the symbol does not exist.
RETURNS
Address or value of symbol, or -1 if symbol does not exist
Program.lookupType() // module-wide
index URL

Creates a type specification from the Dwarf data

Configuration settings
Program.lookupType(String type) returns Any
ARGUMENTS
type — type name
Program.lookupTypeByVariable() // module-wide
index URL

Creates a type specification from the Dwarf data for a variable

Configuration settings
Program.lookupTypeByVariable(String varName) returns Any
ARGUMENTS
varName — variable name
Program.newViewStruct() // module-wide
index URL

Creates a new instance of the view structure for the specified view

Configuration settings
Program.newViewStruct(String modName, String tabName) returns Any
DETAILS
This API is called for views where the view structure is not already passed in as an argument to the view init function.
It is necessary to instantiate a view structure in this way so that ROV is given an opportunity to initialize the status-reporting mechanisms of the view structure (to support, e.g., Program.displayError).
Program.ptrToHex() // module-wide
index URL

Convert pointer representation to hex string

Configuration settings
Program.ptrToHex(Any ptr) returns String
DETAILS
Convenience function for converting the 'at' symbol representation of a pointer to the form 0x80005846.
Program.readMemory() // module-wide
index URL

Reads a primitive value from memory

Configuration settings
Program.readMemory(Ptr addr, UInt size, Int enc) returns Any
ARGUMENTS
addr — memory address
size — size in MAUs
enc — encoding (signed or unsigned)
Program.scanHandleView() // module-wide
index URL

Scan single instance of a module

Configuration settings
Program.scanHandleView(String modName, Ptr instAddr, String tabName) returns Any
ARGUMENTS
modName — Full module name to return the raw view for.
instAddr — Address of instance to scan.
tabName — Name of the tab to retrieve the view for.
DETAILS
Used from a view$init function to scan a single instance of a different module given that instance's address.
RETURNS
An Instance_View object for the requested view.
THROWS
Throws an exception in the event that a memory read of the specified instance view fails, the specified tabName isn't recognized, the specified modName doesn't support instances, or the module modName is not configured into the current program.
Program.scanInstanceDataView() // module-wide
index URL

Retrieve a module's specified INSTANCE_DATA type view

Configuration settings
Program.scanInstanceDataView(String modName, String tabName) returns Program.InstDataView[]
THROWS
Throws an exception in the event that a memory read of the module's Raw view or any instance fails, the specified tabName isn't recognized, the specified modName doesn't support instances, or the module modName is not configured into the current program.
Program.scanInstanceView() // module-wide
index URL

Retrieve the instance-type views for a module

Configuration settings
Program.scanInstanceView(String modName, String tabName) returns Any
ARGUMENTS
modName — Full module name to return the views for.
tabName — Name of the tab to retrieve the views for.
DETAILS
Returns an array of Instance_View structures, each structure representing an instance of the module.
RETURNS
Array of Instance_View structures, one for each isntance.
THROWS
Throws an exception in the event that a memory read of the specified instance view fails, the specified tabName isn't recognized, the specified modName doesn't support instances, or the module modName is not configured into the current program.
Program.scanModuleDataView() // module-wide
index URL

Retrieve a module's specified MODULE_DATA type view

Configuration settings
Program.scanModuleDataView(String modName, String tabName) returns Program.ModDataView
THROWS
Throws an exception in the event that a memory read of the specified module view fails, the specified tabName isn't recognized, or the module modName is not configured into the current program.
Program.scanModuleView() // module-wide
index URL

Retrieve module-type view for a module

Configuration settings
Program.scanModuleView(String modName, String tabName) returns Any
ARGUMENTS
modName — Full module name to return the view for.
tabName — Name of the tab to retreive the view for.
@(Returns) Module_View structure.
THROWS
Throws an exception in the event that a memory read of the specified module view fails, the specified tabName isn't recognized, or the module modName is not configured into the current program.
Program.scanObjectView() // module-wide
index URL

Scan view for an embedded object

Configuration settings
Program.scanObjectView(String modName, Any obj, String tabName) returns Any
ARGUMENTS
modName — Full module name to return the view for.
obj — Actual object to retrieve the view for.
tabName — Name of the tab to retrieve the view for.
DETAILS
Called from a view$init function to retrieve the specified view for an embedded object.
Since XDC has no way of knowing what embedded objects are present in a system, embedded objects do not appear in the list of a module's instances until they have been scanned in this way.
Calling Program.scanObjectView will not read any additional data from the target, since the state structure was already read as part of reading it's parent structure.
RETURNS
An Instance_View object for the requested view.
THROWS
Throws an exception in the event that the specified tabName isn't recognized, the specified modName doesn't support instances, or the module modName is not configured into the current program.
Program.scanRawView() // module-wide
index URL

Retrieve the raw view for a module

Configuration settings
Program.scanRawView(String modName) returns Program.RawView
ARGUMENTS
modName — Full module name to return the raw view for.
@(Returns) A RawView structure which contains the raw data.
THROWS
Throws an exception in the event that a memory read of the specified instance view fails, the specified tabName isn't recognized, the specified modName doesn't support instances, or the module modName is not configured into the current program.
Throws an exception in the event that a memory read of the module's Raw view fails, or the module modName is not configured into the current program.
Program.scanTreeTableView() // module-wide
index URL
Configuration settings
Program.scanTreeTableView(String modName, String tabName) returns Program.TreeNode[]
Program.scanTreeView() // module-wide
index URL
Configuration settings
Program.scanTreeView(String modName, String tabName) returns Any
Program.setTimestampFunc() // module-wide
index URL

Sets API to be used for printing timestamp

Configuration settings
Program.setTimestampFunc(Any func) returns Void
Program.timestamp() // module-wide
index URL

API for printing timestamp messages for performance analysis

Configuration settings
Program.timestamp(String msg) returns Void
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.StateReader

metaonly module xdc.rov.StateReader
index URL

These APIs are all designed so that they will not re-read data that has already been read in

  • Configuration settings
  • Individual elements
The StateReader has three similar APIs for reading instance state: fetchInstState fetchHandleState getInstDesc [ more ... ]
Configuration settings sourced in xdc/rov/StateReader.xdc
var StateReader = xdc.useModule('xdc.rov.StateReader');
per-instance config parameters
    var params = new StateReader.Params// Instance config-params object;
per-instance creation
    var inst = StateReader.create// Create an instance-object(ISymbolTable.Instance symTable, StructureDecoder.Instance strDec, params);
per-instance functions
     inst.fetchAllInstStates// This function makes sure that all of the instance state structures for this module have been scanned in. It does not call any view$init functions(Program.ROVModuleDesc* mod) returns Void
     inst.fetchHandleState// The fetchInstState API needs to know whether the given instance is static or dynamic. If we just have a handle to an instance, we first need to determine whether it is static or dynamic(Program.ROVModuleDesc* mod, Long instAddr) returns Program.ROVInstanceDesc*
     inst.fetchInstState// This function scans in a single instance's state, and associates various metadata (used by the view$init functions) with the instance object. Returns the inst object for Program.scanHandle(Program.ROVModuleDesc* mod, Long instAddr, Int staticIndex) returns Program.ROVInstanceDesc*
     inst.fetchModuleState// Scans the given module's module state structure. If the structure has already been scanned, this function returns immediately(Program.ROVModuleDesc* mod) returns Void
     inst.getInstDesc// Takes a decoded state structure and creates an Program.ROVInstanceDesc for it. Also retrieves the label for the instance(Program.ROVModuleDesc* mod, Any obj, Int staticIndex) returns Program.ROVInstanceDesc*
DETAILS
The StateReader has three similar APIs for reading instance state: fetchInstState fetchHandleState getInstDesc
fetchInstState takes an instance address and its index into the array of static instances (or -1 if dynamic). This is called by fetchAllInstStates, knows the index because it's iterating over the list.
fetchHandleState just takes an instance address. It looks through the list of instances to determine the index, then calls down to fetchInstState. This API is called by Program.scanHandle.
getInstDesc takes a decoded instance state structure and the index. Both fetch functions ultimately call down to this API. It is also called directly by Program.scanObject for scanning embedded objects.
Instance Config Parameters
index URL

Configuration settings
var params = new StateReader.Params;
// Instance config-params object
Static Instance Creation
index URL

Configuration settings
var params = new StateReader.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = StateReader.create(ISymbolTable.Instance symTable, StructureDecoder.Instance strDec, params);
// Create an instance-object
StateReader.fetchAllInstStates() // instance
index URL

This function makes sure that all of the instance state structures for this module have been scanned in. It does not call any view$init functions

Configuration settings
inst.fetchAllInstStates(Program.ROVModuleDesc* mod) returns Void
StateReader.fetchHandleState() // instance
index URL

The fetchInstState API needs to know whether the given instance is static or dynamic. If we just have a handle to an instance, we first need to determine whether it is static or dynamic

Configuration settings
inst.fetchHandleState(Program.ROVModuleDesc* mod, Long instAddr) returns Program.ROVInstanceDesc*
StateReader.fetchInstState() // instance
index URL

This function scans in a single instance's state, and associates various metadata (used by the view$init functions) with the instance object. Returns the inst object for Program.scanHandle

Configuration settings
inst.fetchInstState(Program.ROVModuleDesc* mod, Long instAddr, Int staticIndex) returns Program.ROVInstanceDesc*
StateReader.fetchModuleState() // instance
index URL

Scans the given module's module state structure. If the structure has already been scanned, this function returns immediately

Configuration settings
inst.fetchModuleState(Program.ROVModuleDesc* mod) returns Void
StateReader.getInstDesc() // instance
index URL

Takes a decoded state structure and creates an Program.ROVInstanceDesc for it. Also retrieves the label for the instance

Configuration settings
inst.getInstDesc(Program.ROVModuleDesc* mod, Any obj, Int staticIndex) returns Program.ROVInstanceDesc*
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.StructureDecoder

metaonly module xdc.rov.StructureDecoder
index URL

Module for retrieving and decoding target structures

  • Configuration settings
  • Individual elements
The StructureDecoder is responsible for decoding target data given the raw target bytes and the data's type as defined in XDC. It also contains APIs for retrieving data from the target given the data's address. [ more ... ]
Configuration settings sourced in xdc/rov/StructureDecoder.xdc
var StructureDecoder = xdc.useModule('xdc.rov.StructureDecoder');
module-wide constants & types
    var obj = new StructureDecoder.Buffer// Target buffer;
        obj.buffer = Any ...
        obj.addr = Int ...
        obj.off = Int ...
per-instance config parameters
    var params = new StructureDecoder.Params// Instance config-params object;
per-instance creation
    var inst = StructureDecoder.create// Create an instance-object(Any mem, Any targConfig, params);
per-instance functions
     inst.decodeStruct// Decode an entire structure by decoding each of the structure's fields(Any structType, StructureDecoder.Buffer buffer, Any inStr) returns Any
     inst.decodeStructArray// Decode an array of structures(Any structType, StructureDecoder.Buffer buffer, Int len) returns Any
     inst.fetchArray// Retrieve and decode an array of structures from the target(Any structType, Int addr, Int len, Bool isScalar, Bool addrCheck) returns Any
     inst.fetchStruct// Retrieve and decode a structure from the target(Any structType, Int addr, Bool addrCheck) returns Any
DETAILS
The StructureDecoder is responsible for decoding target data given the raw target bytes and the data's type as defined in XDC. It also contains APIs for retrieving data from the target given the data's address.
The StructureDecoder relies on the TargetDecoder to decode the raw target bytes, but is itself responsible for decoding the structure layout. The decodeStruct API takes as an argument the structure's type representation in the XDC object model, and refers to this object to determine the size and offsets of the structure's fields.
The object returned by decodeStruct is not the typed Java representation of the structure, but rather a typeless JavaScript object which simply contains all of the same fields. This allows ROV to control the type of the fields, and specifically to represent arrays as addresses rather than as objects.
All of the 'decode' methods are essentially private methods. The intended interface to the StructureDecoder is through the 'fetch' APIs.
struct StructureDecoder.Buffer
index URL

Target buffer

Configuration settings
var obj = new StructureDecoder.Buffer;
    obj.buffer = Any ...
    obj.addr = Int ...
    obj.off = Int ...
DETAILS
This structure encapsulates a buffer of target memory (buffer), the buffer's original target address (addr), and a running offset into that buffer (off).
Decoding a structure is a recursive process, since the structure may include fields which are also structures. As StructureDecoder decodes each field, it updates the off field to move to the next field.
The original address of the buffer is stored as well so that each structure field can be given a $addr property with its target address.
Instance Config Parameters
index URL

Configuration settings
var params = new StructureDecoder.Params;
// Instance config-params object
Static Instance Creation
index URL

Configuration settings
var params = new StructureDecoder.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = StructureDecoder.create(Any mem, Any targConfig, params);
// Create an instance-object
DETAILS
The StructureDecoder requires a MemoryImage instance and the target configuration object from the ROV recap file; i.e., recap.build.target.
StructureDecoder.decodeStruct() // instance
index URL

Decode an entire structure by decoding each of the structure's fields

Configuration settings
inst.decodeStruct(Any structType, StructureDecoder.Buffer buffer, Any inStr) returns Any
DETAILS
structType
Structure type. Not just a string, it is the XDC object model representation of the type.
buffer
Buffer of target memory containing raw data.
inStr
Optional structure to fill in. Otherwise decodeStruct will create a new one.
StructureDecoder.decodeStructArray() // instance
index URL

Decode an array of structures

Configuration settings
inst.decodeStructArray(Any structType, StructureDecoder.Buffer buffer, Int len) returns Any
DETAILS
This API exists to perform some optimizations when decoding an array of a single type of object.
structType
Structure type of the elements in the array. Not just a string, it is the XDC object model representation of the type.
buffer
Buffer of target memory containing raw data.
len
Number of elements in the array.
StructureDecoder.fetchArray() // instance
index URL

Retrieve and decode an array of structures from the target

Configuration settings
inst.fetchArray(Any structType, Int addr, Int len, Bool isScalar, Bool addrCheck) returns Any
DETAILS
structType
Structure type. Not just a string, it is the XDC object model representation of the type.
addr
Target address of the structure to retrieve.
len
Number of entries in the array.
isScalar
Whether it is an array of scalars.
addrCheck
Whether to check the memory read against the section map.
StructureDecoder.fetchStruct() // instance
index URL

Retrieve and decode a structure from the target

Configuration settings
inst.fetchStruct(Any structType, Int addr, Bool addrCheck) returns Any
DETAILS
This method retrieves and decodes a structure of the given type at the given address from the target.
structType
Structure type. Not just a string, it is the XDC object model representation of the type.
addr
Target address of the structure to retrieve.
addrCheck
Whether to check the memory read against the section map.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.ViewInfo

metaonly module xdc.rov.ViewInfo
index URL

Describes the ROV views supported by a particular module

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/rov/ViewInfo.xdc
var ViewInfo = xdc.useModule('xdc.rov.ViewInfo');
module-wide constants & types
    values of type ViewInfo.ViewType// ROV view type
        const ViewInfo.INSTANCE;
        const ViewInfo.MODULE;
        const ViewInfo.INSTANCE_DATA;
        const ViewInfo.MODULE_DATA;
        const ViewInfo.RAW;
        const ViewInfo.TREE_TABLE;
        const ViewInfo.TREE;
    var obj = new ViewInfo.Arg// ;
        obj.name// the name displayed to the user = String ...
        obj.type// the type of this argument: "string", "number", "boolean" = String ...
        obj.defaultValue// the default value of this argument = String ...
    var obj = new ViewInfo.Args// ;
        obj.description// the description shown to the user = String ...
        obj.args// the argument in positional order = ViewInfo.Arg[length] ...
    var obj = new ViewInfo.View// ROV View descriptor;
        obj.type = ViewInfo.ViewType ...
        obj.viewInitFxn = String ...
        obj.structName = String ...
        obj.argsName = String ...
per-instance config parameters
    var params = new ViewInfo.Params// Instance config-params object;
        params.argsMap// Specifies argument structures for all of a module's views = ViewInfo.Args[string] undefined;
        params.showRawTab// Control whether or not the "raw view" is available = Bool true;
        params.viewMap// Specifies all of the ROV views for the module = ViewInfo.View[string] undefined;
enum ViewInfo.ViewType
index URL

ROV view type

Configuration settings
values of type ViewInfo.ViewType
    const ViewInfo.INSTANCE;
    const ViewInfo.MODULE;
    const ViewInfo.INSTANCE_DATA;
    const ViewInfo.MODULE_DATA;
    const ViewInfo.RAW;
    const ViewInfo.TREE_TABLE;
    const ViewInfo.TREE;
DETAILS
INSTANCE
basic instance information (one row per instance). The view init function is passed three arguments: (1) an instance of the view structure, (2) the instance state structure of the instance to view, and (3) a string containing user-supplied arguments.
INSTANCE_DATA
instance-specific data tables (many rows per instance). The view init function is passed three arguments: (1) an instance of the Program.InstDataView structure, (2) an instance state structure for the instance to view, and (3) a string containing user-supplied arguments.
MODULE
basic module information (one row per module). The view init function is passed three arguments: (1) an instance of the view structure, (2) the module state structure of the module to view, and (3) a string containing user-supplied arguments.
MODULE_DATA
module-specific data tables (many rows per module). The view init function is passed two arguments: (1) a Program.ModDataView structure, and (2) a string containing user-supplied arguments.
RAW
This is a reserved view type used by ROV to display raw data.
TREE_TABLE
The view init function is passed one argument: a string containing user-supplied arguments. It is expected to return a new initialized xdc.rov.Program.TreeNode array or null in the event that there is nothing to display. This view type is used to describe the Diags masks for all modules, for example; see Diags.rovViewInfo'
TREE
The view init function is passed one argument: a string containing user-supplied arguments. It is expected to return a new initialized JavaScript hash table of hash tables or null in the event that there is nothing to display. This view type provides a simple two-level tree of name-value pairs.
struct ViewInfo.Arg
index URL
Configuration settings
var obj = new ViewInfo.Arg;
    obj.name = String ...
    // the name displayed to the user
    obj.type = String ...
    // the type of this argument: "string", "number", "boolean"
    obj.defaultValue = String ...
    // the default value of this argument
struct ViewInfo.Args
index URL
Configuration settings
var obj = new ViewInfo.Args;
    obj.description = String ...
    // the description shown to the user
    obj.args = ViewInfo.Arg[length] ...
    // the argument in positional order
struct ViewInfo.View
index URL

ROV View descriptor

Configuration settings
var obj = new ViewInfo.View;
    obj.type = ViewInfo.ViewType ...
    obj.viewInitFxn = String ...
    obj.structName = String ...
    obj.argsName = String ...
FIELDS
type — the view type which control the type of arguments passed to the viewInitFxn
viewInitFxn — the name of a function that converts raw target data into a human readable "view structure". This name is the name of a metaonly function defined in the module's .xs file.
structName — the name of the view structure populated by the viewInitFxn. This name is a name defined the module's .xdc file.
argsName — the name of an Args descriptor that defines the user-supplied arguments for this view. argsName is used to index into argsMap.
Instance Config Parameters
index URL

Configuration settings
var params = new ViewInfo.Params;
// Instance config-params object
    params.argsMap = ViewInfo.Args[string] undefined;
    // Specifies argument structures for all of a module's views
    params.showRawTab = Bool true;
    // Control whether or not the "raw view" is available
    params.viewMap = ViewInfo.View[string] undefined;
    // Specifies all of the ROV views for the module
config ViewInfo.Params.argsMap // instance
index URL

Specifies argument structures for all of a module's views

Configuration settings
var params = new ViewInfo.Params;
...
params.argsMap = ViewInfo.Args[string] undefined;
DETAILS
Maps module-specific argument sets to an appropriate Args descriptor.
config ViewInfo.Params.showRawTab // instance
index URL

Control whether or not the "raw view" is available

Configuration settings
var params = new ViewInfo.Params;
...
params.showRawTab = Bool true;
config ViewInfo.Params.viewMap // instance
index URL

Specifies all of the ROV views for the module

Configuration settings
var params = new ViewInfo.Params;
...
params.viewMap = ViewInfo.View[string] undefined;
DETAILS
Maps module-specific view names to an appropriate View descriptor.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.ViewXml

metaonly module xdc.rov.ViewXml
index URL

This module sits on top of the ROV core to convert ROV views into XML. This is useful for test scripts and command-line based ROV tools

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/rov/ViewXml.xdc
var ViewXml = xdc.useModule('xdc.rov.ViewXml');
module-wide functions
     ViewXml.listModules// Returns the list of modules in XML form() returns String
     ViewXml.processCommand// This API allows the client to interact with the ROV core and retrieve ROV views(String cmd) returns String
     ViewXml.retrieveView// Retrieves the view in XML form for the given module and tab(String modName, String tabName) returns String
ViewXml.listModules() // module-wide
index URL

Returns the list of modules in XML form

Configuration settings
ViewXml.listModules() returns String
ViewXml.processCommand() // module-wide
index URL

This API allows the client to interact with the ROV core and retrieve ROV views

Configuration settings
ViewXml.processCommand(String cmd) returns String
DETAILS
It takes String commands of the following forms. 1. "lm" - List Modules. This returns an XML list of all of the modules in the executable's configuration and the views they support. 2. "m <module name> <tab name>" - Retrieve tab view for module. 3. "cc" - Clear cache. This command clears the ROV core's cache of views. This command should be sent whenever the target state changes.
ViewXml.retrieveView() // module-wide
index URL

Retrieves the view in XML form for the given module and tab

Configuration settings
ViewXml.retrieveView(String modName, String tabName) returns String
generated on Sun, 25 Nov 2018 22:18:54 GMT


package xdc.rov.monserver
index URL

The xdc.rov.monserver delivers ROV views to clients through the standard IO. The clients access monserver through an ROV module embedded in the TI Cloud Agent, or through a WebSocket server

  • USAGE
  • OPTIONS
  • DETAILS
Commands: [ more ... ]
XDCspec declarations sourced in xdc/rov/monserver/package.xdc
requires xdc.rov;
requires xdc.rta;
package xdc.rov.monserver {
    module Main;
    // Command implementation
    module ProgressCallBack;
    module Support;
}
USAGE
xs xdc.rov.monserver [--help]

    Usage
    [-p]
    [--help]

OPTIONS
-p
TCP port for the server

Only values from 1025 to 65535 are accepted.

DETAILS
Commands:
Start the server - xs xdc.rov.monserver -p <port_number>
Load an executable exec:<full path>
Get a list of Modules and Tabs list
Get a Module's View view:Task,Basic
Unload the executable clear
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.monserver.Main

metaonly module xdc.rov.monserver.Main
index URL

Command implementation

  • Configuration settings
  • Individual elements
Commands: [ more ... ]
Configuration settings sourced in xdc/rov/monserver/Main.xdc
var Main = xdc.useModule('xdc.rov.monserver.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        ' ',
        'Usage',
        '[-p]',
        '[--help]',
        ' '
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.port// TCP port for the server = UInt 8888;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Commands:
Start the server - xs xdc.rov.monserver -p <port_number>
Load an executable exec:<full path>
Get a list of Modules and Tabs list
Get a Module's View view:Task,Basic
Unload the executable clear
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    ' ',
    'Usage',
    '[-p]',
    '[--help]',
    ' '
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.port = UInt 8888;
    // TCP port for the server
config Main.Params.port // instance
index URL

TCP port for the server

Configuration settings
var params = new Main.Params;
...
params.port = UInt 8888;
DETAILS
Only values from 1025 to 65535 are accepted.
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.monserver.ProgressCallBack

metaonly module xdc.rov.monserver.ProgressCallBack
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/rov/monserver/ProgressCallBack.xdc
var ProgressCallBack = xdc.useModule('xdc.rov.monserver.ProgressCallBack');
per-instance config parameters
    var params = new ProgressCallBack.Params// Instance config-params object;
        params.args// Optional arguments to the callback = Any undefined;
per-instance creation
    var inst = ProgressCallBack.create// Create an instance-object(params);
per-instance functions
     inst.getAbortFlag// () returns Bool
     inst.updateStartupProgress// Progress update callback(Int percent, String message) returns Void
Instance Config Parameters
index URL

Configuration settings
var params = new ProgressCallBack.Params;
// Instance config-params object
    params.args = Any undefined;
    // Optional arguments to the callback
config ProgressCallBack.Params.args // instance
index URL

Optional arguments to the callback

Configuration settings
var params = new ProgressCallBack.Params;
...
params.args = Any undefined;
Static Instance Creation
index URL

Configuration settings
var params = new ProgressCallBack.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = ProgressCallBack.create(params);
// Create an instance-object
ProgressCallBack.getAbortFlag() // instance
index URL
Configuration settings
inst.getAbortFlag() returns Bool
ProgressCallBack.updateStartupProgress() // instance
index URL

Progress update callback

Configuration settings
inst.updateStartupProgress(Int percent, String message) returns Void
DETAILS
The ROV model calls this API at particular points to update any startup progress provided by the client ROV tooling.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.monserver.Support

metaonly module xdc.rov.monserver.Support
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/rov/monserver/Support.xdc
var Support = xdc.useModule('xdc.rov.monserver.Support');
module-wide functions
     Support.close// () returns Void
     Support.processTreeTable// (Any obj, Any newObj) returns Void
     Support.startModel// () returns Any
     Support.stringify// (Any obj, String indent) returns String
Support.close() // module-wide
index URL
Configuration settings
Support.close() returns Void
Support.processTreeTable() // module-wide
index URL
Configuration settings
Support.processTreeTable(Any obj, Any newObj) returns Void
Support.startModel() // module-wide
index URL
Configuration settings
Support.startModel() returns Any
Support.stringify() // module-wide
index URL
Configuration settings
Support.stringify(Any obj, String indent) returns String
generated on Sun, 25 Nov 2018 22:18:54 GMT


package xdc.rov.runtime
index URL

ROV target runtime support

This package contains a runtime monitor that can be used with ROV in lieu of a JTAG connection. The xdc.rov.monserver package contains a server that enables a standalone Browser-based ROV GUI application that can utilize the target monitor provided by this package. [ more ... ]
XDCspec declarations sourced in xdc/rov/runtime/package.xdc
package xdc.rov.runtime {
    module Monitor;
    // ROV support for the pure C "module" Mod.c[h]
}
DETAILS
This package contains a runtime monitor that can be used with ROV in lieu of a JTAG connection. The xdc.rov.monserver package contains a server that enables a standalone Browser-based ROV GUI application that can utilize the target monitor provided by this package.
The file Board_serialMon.txt (contained in this package) illustrates how to use the runtime monitor with a TI-RTOS UART driver.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.runtime.Monitor
index URL

ROV support for the pure C "module" Mod.c[h]

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The file Board_serialMon.txt (contained in this package) illustrates how to use the runtime monitor Mon.[ch] with a TI-RTOS UART driver.
C synopsis target-domain sourced in xdc/rov/runtime/Monitor.xdc
#include <xdc/rov/runtime/Monitor.h>
Functions common to all target modules
Monitor_Module_getMask// Returns the diagnostics mask for this module, Monitor_Module_hasMask// Test whether this module has a diagnostics mask, Monitor_Module_heap// The heap from which this module allocates memory, Monitor_Module_id// Get this module's unique id, Monitor_Module_setMask// Set the diagnostics mask for this module, Monitor_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Monitor_Module_id();
// Get this module's unique id
Bool Monitor_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Monitor_Module_heap();
// The heap from which this module allocates memory
Bool Monitor_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Monitor_Module_getMask();
// Returns the diagnostics mask for this module
Void Monitor_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/rov/runtime/Monitor.xdc
var Monitor = xdc.useModule('xdc.rov.runtime.Monitor');
module-wide config parameters
     Monitor.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Monitor.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Monitor.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:54 GMT


package xdc.rov.testserver
index URL

The xdc.rov.testserver displays ROV views to clients on the command line. The server expects that a CCS debugger is already started and an application is loaded

  • USAGE
  • OPTIONS
  • DETAILS
The DSlite port must be known at the time the server is started. Therefore, when starting CCS, the environment variable TI_DS_WEBSOCKET_PORT must be set and that same port number must be supplied to xdc.rov.testserver. [ more ... ]
XDCspec declarations sourced in xdc/rov/testserver/package.xdc
requires xdc.rov;
requires xdc.rta;
package xdc.rov.testserver {
    module DummyCallBack;
    module Main;
    // Command implementation
    module Support;
}
USAGE
xs xdc.rov.testserver [--help]

    Usage
    [--exec <executable>]
    [--port <DSLite Websocket port>]
    [-v <debug level>]
    [--help]

OPTIONS
--exec
Executable to run ROV on
--port
DSLite port

Corresponds to the value in the environment variable TI_DS_WEBSOCKET_PORT. The variable must be set at the time CCS is started.

-v
Defines the amount of debug info
DETAILS
The DSlite port must be known at the time the server is started. Therefore, when starting CCS, the environment variable TI_DS_WEBSOCKET_PORT must be set and that same port number must be supplied to xdc.rov.testserver.
Commands:
Start the server - xs xdc.rov.testserver --exec <full path> --port <port_number>
Get a list of Modules and Tabs l
Get a Module's View v Module View
Issue the command "Run" to the debugger r
Issue the command "Pause" to the debugger p
Exit xdc.rov.testserver e
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.testserver.DummyCallBack

metaonly module xdc.rov.testserver.DummyCallBack
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/rov/testserver/DummyCallBack.xdc
var DummyCallBack = xdc.useModule('xdc.rov.testserver.DummyCallBack');
per-instance config parameters
    var params = new DummyCallBack.Params// Instance config-params object;
per-instance creation
    var inst = DummyCallBack.create// Create an instance-object(params);
per-instance functions
     inst.getAbortFlag// () returns Bool
     inst.updateStartupProgress// Progress update callback(Int percent, String message) returns Void
Instance Config Parameters
index URL

Configuration settings
var params = new DummyCallBack.Params;
// Instance config-params object
Static Instance Creation
index URL

Configuration settings
var params = new DummyCallBack.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = DummyCallBack.create(params);
// Create an instance-object
DummyCallBack.getAbortFlag() // instance
index URL
Configuration settings
inst.getAbortFlag() returns Bool
DummyCallBack.updateStartupProgress() // instance
index URL

Progress update callback

Configuration settings
inst.updateStartupProgress(Int percent, String message) returns Void
DETAILS
The ROV model calls this API at particular points to update any startup progress provided by the client ROV tooling.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.testserver.Main

metaonly module xdc.rov.testserver.Main
index URL

Command implementation

  • Configuration settings
  • Individual elements
The DSlite port must be known at the time the server is started. Therefore, when starting CCS, the environment variable TI_DS_WEBSOCKET_PORT must be set and that same port number must be supplied to xdc.rov.testserver. [ more ... ]
Configuration settings sourced in xdc/rov/testserver/Main.xdc
var Main = xdc.useModule('xdc.rov.testserver.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        ' ',
        'Usage',
        '[--exec <executable>]',
        '[--port <DSLite Websocket port>]',
        '[-v <debug level>]',
        '[--help]',
        ' '
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.executable// Executable to run ROV on = String "";
        params.port// DSLite port = UInt undefined;
        params.verbose// Defines the amount of debug info = UInt 0;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
The DSlite port must be known at the time the server is started. Therefore, when starting CCS, the environment variable TI_DS_WEBSOCKET_PORT must be set and that same port number must be supplied to xdc.rov.testserver.
Commands:
Start the server - xs xdc.rov.testserver --exec <full path> --port <port_number>
Get a list of Modules and Tabs l
Get a Module's View v Module View
Issue the command "Run" to the debugger r
Issue the command "Pause" to the debugger p
Exit xdc.rov.testserver e
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    ' ',
    'Usage',
    '[--exec <executable>]',
    '[--port <DSLite Websocket port>]',
    '[-v <debug level>]',
    '[--help]',
    ' '
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.executable = String "";
    // Executable to run ROV on
    params.port = UInt undefined;
    // DSLite port
    params.verbose = UInt 0;
    // Defines the amount of debug info
config Main.Params.executable // instance
index URL

Executable to run ROV on

Configuration settings
var params = new Main.Params;
...
params.executable = String "";
config Main.Params.port // instance
index URL

DSLite port

Configuration settings
var params = new Main.Params;
...
params.port = UInt undefined;
DETAILS
Corresponds to the value in the environment variable TI_DS_WEBSOCKET_PORT. The variable must be set at the time CCS is started.
config Main.Params.verbose // instance
index URL

Defines the amount of debug info

Configuration settings
var params = new Main.Params;
...
params.verbose = UInt 0;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:54 GMT


module xdc.rov.testserver.Support

metaonly module xdc.rov.testserver.Support
index URL
  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/rov/testserver/Support.xdc
var Support = xdc.useModule('xdc.rov.testserver.Support');
module-wide functions
     Support.advance// () returns Void
     Support.close// () returns Void
     Support.pause// () returns Void
     Support.startModel// () returns Any
     Support.stringify// (Any obj, String indent) returns String
Support.advance() // module-wide
index URL
Configuration settings
Support.advance() returns Void
Support.close() // module-wide
index URL
Configuration settings
Support.close() returns Void
Support.pause() // module-wide
index URL
Configuration settings
Support.pause() returns Void
Support.startModel() // module-wide
index URL
Configuration settings
Support.startModel() returns Any
Support.stringify() // module-wide
index URL
Configuration settings
Support.stringify(Any obj, String indent) returns String
generated on Sun, 25 Nov 2018 22:18:54 GMT


package xdc.rta.tools.file
index URL

Tool for reading and decoding RTA data from a file

  • USAGE
  • OPTIONS
XDCspec declarations sourced in xdc/rta/tools/file/package.xdc
package xdc.rta.tools.file {
    module Main;
    // Command implementation
}
USAGE
xs xdc.rta.tools.file [--help]

    Usage
    [-p] [-h] [-m] [-e executable] [-x RTA XML file] [-d data input file] [-o output text file] [-c delimter character]
    [--help]

OPTIONS
-p
Whether to print the decoded records to the console

You may use this tool to simply print the decoded records, or you may have them redirected to a file to be processed elsewhere.

-h
Don't print the header when printing the decoded records
-m
Wait for the user to press enter before displaying the next packet

Without this flag, the tool will simply print all of the records in the data file to the screen. If this flag is set, then the tool will wait the user to press enter in between displaying each packet.

-e
Path to the executable which was used to generate the data file
-x
Optional path to the RTA XML file
-d
Path to the file containing the RTA log data
-o
Optional path to an output file to write the decoded records to

The tool will write the decoded records out as text to the specified out file. The record properties will be separated with a delimeter character so that they can be imported into a spreadsheet such as Excel.

-c
// TODO [-l output file for load data]

Delimiter character to use when writing out the file.

The character specified here will be inserted between each of the record fields so that the file can be imported into a spreadsheet such as excel.

generated on Sun, 25 Nov 2018 22:19:02 GMT


module xdc.rta.tools.file.Main

metaonly module xdc.rta.tools.file.Main
index URL

Command implementation

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/rta/tools/file/Main.xdc
var Main = xdc.useModule('xdc.rta.tools.file.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        ' ',
        'Usage',
        '[-p] [-h] [-m] [-e executable] [-x RTA XML file] [-d data input file] [-o output text file] [-c delimter character]',
        '[--help]',
        ' '
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.dataFile// Path to the file containing the RTA log data = String "";
        params.delimiter// // TODO [-l output file for load data] = String "|";
        params.executable// Path to the executable which was used to generate the data file = String "";
        params.more// Wait for the user to press enter before displaying the next packet = Bool false;
        params.outputFile// Optional path to an output file to write the decoded records to = String "";
        params.printToScreen// Whether to print the decoded records to the console = Bool false;
        params.rtaXml// Optional path to the RTA XML file = String "";
        params.suppressHeader// Don't print the header when printing the decoded records = Bool false;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    ' ',
    'Usage',
    '[-p] [-h] [-m] [-e executable] [-x RTA XML file] [-d data input file] [-o output text file] [-c delimter character]',
    '[--help]',
    ' '
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.dataFile = String "";
    // Path to the file containing the RTA log data
    params.delimiter = String "|";
    // // TODO [-l output file for load data]
    params.executable = String "";
    // Path to the executable which was used to generate the data file
    params.more = Bool false;
    // Wait for the user to press enter before displaying the next packet
    params.outputFile = String "";
    // Optional path to an output file to write the decoded records to
    params.printToScreen = Bool false;
    // Whether to print the decoded records to the console
    params.rtaXml = String "";
    // Optional path to the RTA XML file
    params.suppressHeader = Bool false;
    // Don't print the header when printing the decoded records
config Main.Params.dataFile // instance
index URL

Path to the file containing the RTA log data

Configuration settings
var params = new Main.Params;
...
params.dataFile = String "";
config Main.Params.delimiter // instance
index URL

// TODO [-l output file for load data]

Configuration settings
var params = new Main.Params;
...
params.delimiter = String "|";
DETAILS
Delimiter character to use when writing out the file.
The character specified here will be inserted between each of the record fields so that the file can be imported into a spreadsheet such as excel.
config Main.Params.executable // instance
index URL

Path to the executable which was used to generate the data file

Configuration settings
var params = new Main.Params;
...
params.executable = String "";
config Main.Params.more // instance
index URL

Wait for the user to press enter before displaying the next packet

Configuration settings
var params = new Main.Params;
...
params.more = Bool false;
DETAILS
Without this flag, the tool will simply print all of the records in the data file to the screen. If this flag is set, then the tool will wait the user to press enter in between displaying each packet.
config Main.Params.outputFile // instance
index URL

Optional path to an output file to write the decoded records to

Configuration settings
var params = new Main.Params;
...
params.outputFile = String "";
DETAILS
The tool will write the decoded records out as text to the specified out file. The record properties will be separated with a delimeter character so that they can be imported into a spreadsheet such as Excel.
config Main.Params.printToScreen // instance
index URL

Whether to print the decoded records to the console

Configuration settings
var params = new Main.Params;
...
params.printToScreen = Bool false;
DETAILS
You may use this tool to simply print the decoded records, or you may have them redirected to a file to be processed elsewhere.
config Main.Params.rtaXml // instance
index URL

Optional path to the RTA XML file

Configuration settings
var params = new Main.Params;
...
params.rtaXml = String "";
config Main.Params.suppressHeader // instance
index URL

Don't print the header when printing the decoded records

Configuration settings
var params = new Main.Params;
...
params.suppressHeader = Bool false;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:19:02 GMT


package xdc.runtime
index URL

Basic runtime support for RTSC programs

  • DETAILS
  • DIAGNOSTICS AND LOGS
  • MEMORY MANAGEMENT
  • CONCURRENCY SUPPORT
  • STARTUP AND SHUTDOWN
The modules and interfaces in the xdc.runtime package form the "core" RTSC target runtime support library which provides basic system services required by virtually all applications. [ more ... ]
XDCspec declarations sourced in xdc/runtime/package.xdc
package xdc.runtime [2, 1, 0] {
    interface IFilterLogger;
    // Interface for supporting filtering of Log events by detail level
    interface IGateProvider;
    // Interface implemented by all gate providers
    interface IHeap;
    // Interface to heap functions
    interface IInstance;
    // Common instance params
    interface ILogger;
    // Interface to service Log events
    interface IModule;
    // Base interface for all modules
    interface ISystemSupport;
    // Interface to core system functions
    interface ITimestampClient;
    // Timestamp Client Interface
    interface ITimestampProvider;
    // Timestamp provider interface
    module Assert;
    // Runtime assertion manager
    module Defaults;
    // Default attributes inherited by all target modules
    module Diags;
    // Diagnostics manager
    module Error;
    // Runtime error manager
    module Gate;
    // Critical section support
    module GateNull;
    // Empty implementation of IGateProvider
    module HeapMin;
    // Growth-only based heap implementation
    module HeapStd;
    // Malloc/free based heap implementation
    module Log;
    // Event logging manager
    module LoggerBuf;
    // A logger which stores Log events in a buffer
    module LoggerCallback;
    // A logger that passes events to a user supplied callback function
    module LoggerSys;
    // A logger which routes events to the System_printf function
    module Main;
    // Configuration "stand-in" for application code
    module Memory;
    // Static and run-time memory manager
    module Registry;
    // Register modules that are not statically configured
    module Reset;
    // Startup reset function manager
    module Rta;
    // The Rta module contains target and configuration code for providing RTA support
    module Startup;
    // The xdc.runtime startup bootstrap
    module SysCallback;
    // ISystemSupport implementation for user callback functions
    module SysMin;
    // Minimal implementation of ISystemSupport
    module SysStd;
    // Implementation of ISystemSupport using ANSI C Standard Library
    module System;
    // Basic system services
    module Text;
    // Runtime text handling services
    module Timestamp;
    // Timestamp services
    module TimestampNull;
    // Empty implementation of ITimestampProvider
    module TimestampStd;
    // Implementation of ITimestampProvider using ANSI C clock()
    module Types;
    // Basic constants and types
}
DETAILS
The modules and interfaces in the xdc.runtime package form the "core" RTSC target runtime support library which provides basic system services required by virtually all applications.
Since this package's services are intended to be available to any C/C++ client, this package does not contain any pre-compiled libraries. Instead, this package provides complete sources which are built and supplied by a target-specific package named by the rts parameter of the target used to build the client sources. This "indirection" make it possible for new targets to be added by interested parties whithout ever having to update this package.
The functionality provided by this package can be roughly partitioned into four categories:
  1. Diagnostics and Logs
  2. Memory Management
  3. Concurrency Support
  4. Startup and Shutdown
DIAGNOSTICS AND LOGS
This package provides for diagnostics with a set of modules that operate together to configure and implement diagnostics.
The modules can be partitioned into three groups: modules that generate events, a module that allows precise control over when (or if) various events are generated, and modules that manage the output or display of the events.
Assert, Error, and Log provide methods that are added to source code and generate events. The Diags module provides both configuration and runtime methods to selectively enable or disable different types of events on a per module basis. Finally, LoggerBuf, LoggerSys and LoggerCallback are simple alternative implementations of the ILogger event "handler" interface. You can provide more sophisticated or platform-specific implementations of ILogger without making any changes to code that uses Assert, Log, Error, or Diags.
The diagnostics and logger modules include the following:
  • Assert - Add integrity checks to the code.
  • Diags - Manage a module's diagnostics mask.
  • Error - Raise error events.
  • Log - Generate log events in realtime.
  • LoggerBuf - A logger using a buffer for log events.
  • LoggerCallback - A logger using user defined callback function for log events.
  • LoggerSys - A logger using printf for log events.
  • Types - Define diagnostics configuration parameters.
  • Timestamp - Simple timestamp service
MEMORY MANAGEMENT
The memory management modules include the following:
  • Memory - module used by clients to allocate and free memory
  • HeapMin - Deterministic implementation that minimizes code size footprint by not supporting reuse of allocated memory.
  • HeapStd - Implementation that builds atop ANSI C malloc() and free()
CONCURRENCY SUPPORT
The concurency support modules include the following:
  • Gate - module used by clients to serialize access to shared data structures
  • GateNull - "null" implementation for applications that don't need serialization; e.g., single threaded applications
STARTUP AND SHUTDOWN
The system startup and shutdown support modules include:
  • Reset - Manages platform-specific startup initialization before main() is called
  • Startup - Manages "portable" startup initialization before main() is called
  • System - In addition to other basic services (such as printf), this module provides an atexit capability that allows modules to cleanly exit during normal application terminiation.
  • SysCallback - Implementation of ISystemSupport that calls back user defined functions.
  • SysMin - Minimal implementation of ISystemSupport required by the System module, suitable for deeply embedded applications.
  • SysStd - Implementation of ISystemSupport that relies on ANSI C Standard I/O Library functions.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.Assert
index URL

Runtime assertion manager

  • C synopsis
  • Individual elements
  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
The Assert module provides configurable diagnostics to the program. Similar to the standard C assert() macro, Assert methods are interspersed with other code to add diagnostics to a program. Unlike the standard C assert support, the Assert module provides greater flexibility in managing the messages displayed, the message string space overhead, and the runtime handling of failures. In addition, because the Assert methods build atop the Diags module, you can precisely control which asserts remain in the final application, if any. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Assert.xdc
#include <xdc/runtime/Assert.h>
Functions
macro Void | Assert_isTrue// Test an assertion(Bool expr, Assert_Id id);
Functions common to all target modules
 | Assert_Module_getMask// Returns the diagnostics mask for this module, Assert_Module_hasMask// Test whether this module has a diagnostics mask, Assert_Module_heap// The heap from which this module allocates memory, Assert_Module_id// Get this module's unique id, Assert_Module_setMask// Set the diagnostics mask for this module, Assert_Module_startupDone// Test if this module has completed startup
Typedefs
typedef opaque | Assert_Id// Assert identifier;
Constants
extern const Error_Id | Assert_E_assertFailed// The Error.Id raised when an assertion violation is detected;
DETAILS
The Assert module provides configurable diagnostics to the program. Similar to the standard C assert() macro, Assert methods are interspersed with other code to add diagnostics to a program. Unlike the standard C assert support, the Assert module provides greater flexibility in managing the messages displayed, the message string space overhead, and the runtime handling of failures. In addition, because the Assert methods build atop the Diags module, you can precisely control which asserts remain in the final application, if any.
The Assert module works in conjunction with the Diags module. Assert statements are added to the code using the Assert_isTrue() function. Execution of assert statements is controlled by the Diags.ASSERT and Diags.INTERNAL bits in a module's diagnostics mask. By default, all module's Diags_ASSERT bit is enabled and the Diags_INTERNAL bit is disabled. See Types.Common$ for the declaration of the bits in the diagnostics mask and Default.common$ for the default module settings.
Two types of asserts are supported: public asserts and internal asserts.
  • Public asserts have an assert ID and are, by default, controlled by the Diags.ASSERT bit.
  • Internal asserts don't have an assert ID (other than NULL) and are active only when both the Diags.ASSERT and Diags.INTERNAL bits of the module's diagnostics mask are set.
Assert IDs are small integer values that index into a table of assertion descriptors. These descriptors hold an error message and a diagnostics mask that is used to enable and disable the assertion at runtime.
You can remap individual public asserts to different bits in the diagnostics mask, or can disable the assert altogether. This is done by setting the mask property of the assert ID. Setting the mask to 0 disables the assert. In all other cases, the Diags.ASSERT bit is OR'd together with the mask to define the controlling bits. For example, the module's diagnostics mask must have the Diags.ASSERT bit set and any other bit specified in the mask property of the assert ID in order to activate the assert.
EXAMPLES
Example 1: The following C code adds an assert to application code which is not in a module. This assert does not have an assert identifier (the second argument is NULL); this makes it an internal assert.
  // file.c
  #include <xdc/runtime/Assert.h>

  Assert_isTrue(count > 0, NULL);
The following XDC configuration statements set both the ASSERT and INTERNAL bits in the diagnostics mask to enable the internal assert created in the previous C code. Since the C code is not in a module, you must set the bits in the diagnostics mask of the xdc.runtime.Main module. The Main module is used to control all Log and Assert statements that are not part of the implementation of a module; for example, top-level application code or any existing sources that simply call the Log or Assert methods.
  // program.cfg
  var Assert = xdc.useModule('xdc.runtime.Assert');
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var Main = xdc.useModule('xdc.runtime.Main');

  Main.common$.diags_ASSERT = Diags.ALWAYS_ON;
  Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
Example 2: The following example shows how to use and configure an assert ID that is declared by a module. It adds that assert to the application's C source code, and configures the application to execute the assert.
This is part of the XDC file for the module that declares an Assert Id:
  // Mod.xdc
  import xdc.runtime.Assert;
  import xdc.runtime.Diags;

  config Assert.Id A_nonZero = {
      msg: "A_nonZero: value must be non-zero"
  };
This is part of the C code for the application:
  // Mod.c
  #include <xdc/runtime/Assert.h>

  Assert_isTrue(x != 0, Mod_A_nonZero);
This is part of the XDC configuration file for the application:
  // program.cfg
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var Mod = xdc.useModule('my.pkg.Mod');
  Mod.common$.diags_ASSERT = Diags.ALWAYS_ON;
The Assert calls can also be completely removed by defining the symbol xdc_runtime_Assert_DISABLE_ALL. This can be done on the compile line, e.g. -Dxdc_runtime_Assert_DISABLE_ALL. This will completely remove the Assert statements from any code compiled with this flag, regardless of the application's configuration or your compiler's optimization settings.
It is also possible to remove all conditions from Assert calls. As explained above, Assert calls are executed only if certain bits in the module's Diags mask are set. However, if the symbol xdc_runtime_Assert_DISABLE_CONDITIONAL_ASSERT is defined, the module's Diags mask is not queried at all, and all Assert calls are unconditionally executed. The symbol xdc_runtime_Assert_DISABLE_ALL has a precedence, and if it's set, no Assert calls are executed regardless of any definition of xdc_runtime_Assert_DISABLE_CONDITIONAL_ASSERT.
typedef Assert_Id
index URL

Assert identifier

C synopsis target-domain
typedef opaque Assert_Id;
DETAILS
Each metaonly assert descriptor is encoded into a target accessable assert Id type which can be passed to the isTrue function.
config Assert_E_assertFailed // module-wide
index URL

The Error.Id raised when an assertion violation is detected

C synopsis target-domain
extern const Error_Id Assert_E_assertFailed;
DETAILS
When an assertion violation is triggered, an error is raised via Error_raise(). E_assert_Failed is the Error.Id passed to Error_raise().
The first string argument (%s) will be either "", if the assertion Id is NULL (for internal asserts), or ": " (for public asserts). The second string argument (%s) is the Assert.Desc.msg string associated with the assertion Id; if the Id is NULL (an internal assert) or if text is not loaded (!Text.isLoaded()), this string is "".
SEE
isTrue, Error.Id
Assert_isTrue() // module-wide
index URL

Test an assertion

C synopsis target-domain
macro Void Assert_isTrue(Bool expr, Assert_Id id);
ARGUMENTS
expr — the expression which should evaluate to true
id — identifies the assert being raised
DETAILS
Assert_isTrue() statements may be conditionally enabled (disabled) on a per module basis by setting the calling module's $common.diags_ASSERT configuration parameter. If the Assert_isTrue() statement is not in a module, the calling module is the Main module. You must enable the Diags.ASSERT bit in the module's diagnostics mask for this call to be enabled. If a NULL assert id is specified, then you must enable the Diags.INTERNAL in addition to the ASSERT bit.
If the Assert_isTrue() statement is enabled and expr evaluates to false, the assert specified by id is raised; i.e., the E_assertFailed error is raised with a NULL error block. In other words, the standard Error.raise handling hooks will be run, System.abort() will be called, and control does not return to the caller. The id may be null, in which case you will get a generic assert message.
EXAMPLES
C Code
  #include <xdc/runtime/Assert.h>

  Assert_isTrue(count > 0, NULL);
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Assert_Module_id();
// Get this module's unique id
Bool Assert_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Assert_Module_heap();
// The heap from which this module allocates memory
Bool Assert_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Assert_Module_getMask();
// Returns the diagnostics mask for this module
Void Assert_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Assert.xdc
var Assert = xdc.useModule('xdc.runtime.Assert');
module-wide constants & types
    var obj = new Assert.Desc// Assert descriptor;
        obj.mask = Bits16 ...
        obj.msg = String ...
module-wide config parameters
    const Assert.E_assertFailed// The Error.Id raised when an assertion violation is detected = Error.Desc {
        msg: "assertion failure%s%s"
    };
     Assert.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly struct Assert.Desc
index URL

Assert descriptor

Configuration settings
var obj = new Assert.Desc;
    obj.mask = Bits16 ...
    obj.msg = String ...
FIELDS
mask — Specifies which bits enable the assert.
msg — The message printed when the assert fails.
DETAILS
Each public assert is defined with an assert descriptor. This structure defines which bits in the module's diagnostics mask control this assert, and the message raised when the assert fails. The mask property is optional, it defaults to the Diags.ASSERT bit.
config Assert.E_assertFailed // module-wide
index URL

The Error.Id raised when an assertion violation is detected

Configuration settings
const Assert.E_assertFailed = Error.Desc {
    msg: "assertion failure%s%s"
};
DETAILS
When an assertion violation is triggered, an error is raised via Error_raise(). E_assert_Failed is the Error.Id passed to Error_raise().
The first string argument (%s) will be either "", if the assertion Id is NULL (for internal asserts), or ": " (for public asserts). The second string argument (%s) is the Assert.Desc.msg string associated with the assertion Id; if the Id is NULL (an internal assert) or if text is not loaded (!Text.isLoaded()), this string is "".
SEE
isTrue, Error.Id
C SYNOPSIS
Assert_E_assertFailed
metaonly config Assert.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Assert.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.Defaults
index URL

Default attributes inherited by all target modules

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module defines default values for common$ structure. If other modules do not set common$ properties explicitly, these values will be used.
C synopsis target-domain sourced in xdc/runtime/Defaults.xdc
#include <xdc/runtime/Defaults.h>
Functions common to all target modules
Defaults_Module_getMask// Returns the diagnostics mask for this module, Defaults_Module_hasMask// Test whether this module has a diagnostics mask, Defaults_Module_heap// The heap from which this module allocates memory, Defaults_Module_id// Get this module's unique id, Defaults_Module_setMask// Set the diagnostics mask for this module, Defaults_Module_startupDone// Test if this module has completed startup
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Defaults_Module_id();
// Get this module's unique id
Bool Defaults_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Defaults_Module_heap();
// The heap from which this module allocates memory
Bool Defaults_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Defaults_Module_getMask();
// Returns the diagnostics mask for this module
Void Defaults_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Defaults.xdc
var Defaults = xdc.useModule('xdc.runtime.Defaults');
module-wide config parameters
    const Defaults.noRuntimeCommon$// Defaults inherited by the target modules that do not need the runtime support = Types.Common$ {
        diags_ASSERT: Diags.ALWAYS_OFF,
        diags_ENTRY: Diags.ALWAYS_OFF,
        diags_EXIT: Diags.ALWAYS_OFF,
        diags_INTERNAL: Diags.ALWAYS_OFF,
        diags_LIFECYCLE: Diags.ALWAYS_OFF,
        diags_STATUS: Diags.ALWAYS_OFF,
        diags_USER1: Diags.ALWAYS_OFF,
        diags_USER2: Diags.ALWAYS_OFF,
        diags_USER3: Diags.ALWAYS_OFF,
        diags_USER4: Diags.ALWAYS_OFF,
        diags_USER5: Diags.ALWAYS_OFF,
        diags_USER6: Diags.ALWAYS_OFF,
        diags_USER7: Diags.ALWAYS_OFF,
        diags_INFO: Diags.ALWAYS_OFF,
        diags_USER8: Diags.ALWAYS_OFF,
        diags_ANALYSIS: Diags.ALWAYS_OFF,
        fxntab: false,
        gate: null,
        gateParams: null,
        instanceHeap: null,
        instanceSection: null,
        logger: null,
        outPolicy: Types.COMMON_FILE,
        memoryPolicy: Types.STATIC_POLICY,
        namedInstance: false,
        namedModule: false,
        romPatchTable: false
    };
     Defaults.common$// Defaults inherited by all target modules = Types.Common$ {
        diags_ASSERT: Diags.ALWAYS_ON,
        diags_ENTRY: Diags.ALWAYS_OFF,
        diags_EXIT: Diags.ALWAYS_OFF,
        diags_INTERNAL: Diags.ALWAYS_OFF,
        diags_LIFECYCLE: Diags.ALWAYS_OFF,
        diags_STATUS: Diags.ALWAYS_ON,
        diags_USER1: Diags.ALWAYS_OFF,
        diags_USER2: Diags.ALWAYS_OFF,
        diags_USER3: Diags.ALWAYS_OFF,
        diags_USER4: Diags.ALWAYS_OFF,
        diags_USER5: Diags.ALWAYS_OFF,
        diags_USER6: Diags.ALWAYS_OFF,
        diags_USER7: Diags.ALWAYS_OFF,
        diags_INFO: Diags.ALWAYS_OFF,
        diags_USER8: Diags.ALWAYS_OFF,
        diags_ANALYSIS: Diags.ALWAYS_OFF,
        fxntab: true,
        gate: null,
        gateParams: null,
        instanceHeap: null,
        instanceSection: null,
        logger: null,
        outPolicy: Types.COMMON_FILE,
        memoryPolicy: Types.DELETE_POLICY,
        namedInstance: false,
        namedModule: true,
        romPatchTable: false
    };
module-wide functions
     Defaults.getCommon// Get a specified common parameter from a module(IModule.Module mod, String param) returns Any
metaonly config Defaults.noRuntimeCommon$ // module-wide
index URL

Defaults inherited by the target modules that do not need the runtime support

Configuration settings
const Defaults.noRuntimeCommon$ = Types.Common$ {
    diags_ASSERT: Diags.ALWAYS_OFF,
    diags_ENTRY: Diags.ALWAYS_OFF,
    diags_EXIT: Diags.ALWAYS_OFF,
    diags_INTERNAL: Diags.ALWAYS_OFF,
    diags_LIFECYCLE: Diags.ALWAYS_OFF,
    diags_STATUS: Diags.ALWAYS_OFF,
    diags_USER1: Diags.ALWAYS_OFF,
    diags_USER2: Diags.ALWAYS_OFF,
    diags_USER3: Diags.ALWAYS_OFF,
    diags_USER4: Diags.ALWAYS_OFF,
    diags_USER5: Diags.ALWAYS_OFF,
    diags_USER6: Diags.ALWAYS_OFF,
    diags_USER7: Diags.ALWAYS_OFF,
    diags_INFO: Diags.ALWAYS_OFF,
    diags_USER8: Diags.ALWAYS_OFF,
    diags_ANALYSIS: Diags.ALWAYS_OFF,
    fxntab: false,
    gate: null,
    gateParams: null,
    instanceHeap: null,
    instanceSection: null,
    logger: null,
    outPolicy: Types.COMMON_FILE,
    memoryPolicy: Types.STATIC_POLICY,
    namedInstance: false,
    namedModule: false,
    romPatchTable: false
};
DETAILS
Modules for which the attribute @NoRuntime is set cannot use any functionality controlled by the parameters in their common$ structures. For such modules, these parameters are set to the following values, and cannot be changed. This ensures that @NoRuntime modules not used in situations where the normal module runtime features are required.
metaonly config Defaults.common$ // module-wide
index URL

Defaults inherited by all target modules

Configuration settings
Defaults.common$ = Types.Common$ {
    diags_ASSERT: Diags.ALWAYS_ON,
    diags_ENTRY: Diags.ALWAYS_OFF,
    diags_EXIT: Diags.ALWAYS_OFF,
    diags_INTERNAL: Diags.ALWAYS_OFF,
    diags_LIFECYCLE: Diags.ALWAYS_OFF,
    diags_STATUS: Diags.ALWAYS_ON,
    diags_USER1: Diags.ALWAYS_OFF,
    diags_USER2: Diags.ALWAYS_OFF,
    diags_USER3: Diags.ALWAYS_OFF,
    diags_USER4: Diags.ALWAYS_OFF,
    diags_USER5: Diags.ALWAYS_OFF,
    diags_USER6: Diags.ALWAYS_OFF,
    diags_USER7: Diags.ALWAYS_OFF,
    diags_INFO: Diags.ALWAYS_OFF,
    diags_USER8: Diags.ALWAYS_OFF,
    diags_ANALYSIS: Diags.ALWAYS_OFF,
    fxntab: true,
    gate: null,
    gateParams: null,
    instanceHeap: null,
    instanceSection: null,
    logger: null,
    outPolicy: Types.COMMON_FILE,
    memoryPolicy: Types.DELETE_POLICY,
    namedInstance: false,
    namedModule: true,
    romPatchTable: false
};
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
This structure defines the default values for the configuration parameters shared by all modules in a system. Unless otherwise noted, setting one of the fields defined below will set the corresponding value for all modules in the system which have not been explicitly set; i.e., it will establish a default value for the parameter.
However, the modules from this package (xdc.runtime) are an exception. The values from Default.common$ are not copied to logger and diags_ properties of common$ in xdc.runtime modules. The property diags_ASSERT is an exception to that exception. Its value from Default.common$ is copied to all modules for which diags_ASSERT has not been explicitly set.
DIAGS_ASSERT
Enables asserts at runtime. Default is ALWAYS_ON
DIAGS_ENTRY
Enables entry trace for all functions. Default is ALWAYS_OFF
DIAGS_EXIT
Enables exit trace for all functions. Default is ALWAYS_OFF
DIAGS_INTERNAL
Enables internal asserts. Default is ALWAYS_OFF. When set to ALWAYS_ON, requires diags_ASSERT to be ALWAYS_ON.
DIAGS_LIFECYCLE
Enables logging of lifecycle events. These events are logged during creates and deletes. Default is ALWAYS_OFF.
DIAGS_STATUS
Enables logging of status events, such as error and warning events. Default is ALWAYS_ON. Note that this does not mean that logging will occur by default--a logger instance must also be configured for the module in order for events to be logged.
DIAGS_INFO
Enables logging of generic informational events. Default is ALWAYS_OFF.
DIAGS_ANALYSIS
Enables logging of analysis events, such as benchmarking events. Default is ALWAYS_OFF.
DIAGS_USER
Each diags_USER field controls a separate user-defined logging level. Default is ALWAYS_OFF for all diags_USER fileds.
GATE
Default gate used by all modules which are declared as being @Gated. By default, this parameter points to an instance of GateNull, which means there is no protection.
GATEPARAMS
The default parameters used to create gates at runtime. See Types.Common$.gateParams. Default is null.
INSTANCEHEAP
Specify heap to be used for module instances. Default is null. If instanceHeap is null, instances will be allocated from the heap specified by Memory.defaultHeapInstance.
INSTANCESECTION
Specify section to be used to place module instances. Default is null.
LOGGER
Default logger used by modules to write logs. By default there is no logger.
MEMORYPOLICY
Used to specify type of application. Types.STATIC_POLICY is used when all objects are created statically. Types.CREATE_POLICY is used when the application creates objects at runtime. Types.DELETE_POLICY is used when the application creates and deletes objects at runtime. This helps eliminate unwanted create and delete code.
NAMEDINSTANCE
This parameter should be set to true if space needs to be allocated in instance objects for instance names. Allocating space for a name allows object view tools to display the names. The runtime functions Mod_Handle_name() and Mod_Handle_label() defined for each module Mod can be used to retrieve the name at runtime.
NAMEDMODULE
This field allows the name of the module to be retained on the target. Setting this to false will save space but will also prevent the target from being able to display the module names appearing in Log events and Errors.
Setting namedModule to false causes all modules, except for Memory and Main to be unnamed by default. To eliminate the string names for these modules you must explicitly set their common$.namedModule parameters to false; without these two names, target-side display of error messages is somewhat cryptic.
ROMPATCHTABLE
Specify whether modules that are allocated to ROM are patchable.
metaonly Defaults.getCommon() // module-wide
index URL

Get a specified common parameter from a module

Configuration settings
Defaults.getCommon(IModule.Module mod, String param) returns Any
ARGUMENTS
eb — module whose parameter is queried
param — string naming the queried parameter
DETAILS
Get the value of a member of the structure common$ based on defaults and the current value of the parameter. If the current value of param is undefined, the function returns the default value for that parameter from Default.common$.
RETURNS
Returns the value of the parameter named param from the module mod.
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.Diags
index URL

Diagnostics manager

  • C synopsis
  • Individual elements
  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
Every XDC module has a "diagnostics mask" that allows clients to enable or disable diagnostics on a per module basis both at configuration time and at runtime. The Diags module manages a module's diagnostics mask. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Diags.xdc
#include <xdc/runtime/Diags.h>
Functions
macro Bool | Diags_compareLevels// Returns false if levelA is lower than levelB(Diags_EventLevel levelA, Diags_EventLevel levelB);
macro Diags_EventLevel | Diags_getLevel// Get the event level set in the given mask(Diags_Mask mask);
macro Bool | Diags_query// Query the module's diagnostics mask against the given mask(Diags_Mask mask);
Void | Diags_setMask// Set a module's diagnostics mask at runtime(CString control);
Functions common to all target modules
 | Diags_Module_getMask// Returns the diagnostics mask for this module, Diags_Module_hasMask// Test whether this module has a diagnostics mask, Diags_Module_heap// The heap from which this module allocates memory, Diags_Module_id// Get this module's unique id, Diags_Module_setMask// Set the diagnostics mask for this module, Diags_Module_startupDone// Test if this module has completed startup
Defines
#define | Diags_ALL// Mask of all diagnostics categories, including both logging and asserts (Diags_Mask)0xFF9FU
#define | Diags_ALL_LOGGING// Mask of all logging diagnostic categories (does not include asserts) (Diags_Mask)Diags.ALL & (~Diags.ASSERT) & (~Diags.INTERNAL)
#define | Diags_ANALYSIS// Analysis (e.g., benchmark) event (Diags_Mask)Diags.USER8
#define | Diags_ASSERT// Assert checking (Diags_Mask)0x0010U
#define | Diags_CRITICAL// A 'LEVEL2' 'STATUS' event is defined as 'CRITICAL' (Diags_EventLevel)Diags.LEVEL2
#define | Diags_EMERGENCY// A 'LEVEL1' 'STATUS' event is defined as 'EMERGENCY' (Diags_EventLevel)Diags.LEVEL1
#define | Diags_ENTRY// Function entry (Diags_Mask)0x0001U
#define | Diags_ERROR// A 'LEVEL3' 'STATUS' event is defined as 'ERROR' (Diags_EventLevel)Diags.LEVEL3
#define | Diags_EXIT// Function exit (Diags_Mask)0x0002U
#define | Diags_INFO// Informational event (Diags_Mask)Diags.USER7
#define | Diags_INTERNAL// Internal diagnostics (Diags_Mask)0x0008U
#define | Diags_LIFECYCLE// Object life-cycle (Diags_Mask)0x0004U
#define | Diags_STATUS// Warning or error event (Diags_Mask)0x0080U
#define | Diags_USER1// User defined diagnostics (Diags_Mask)0x0100U
#define | Diags_USER2// User defined diagnostics (Diags_Mask)0x0200U
#define | Diags_USER3// User defined diagnostics (Diags_Mask)0x0400U
#define | Diags_USER4// User defined diagnostics (Diags_Mask)0x0800U
#define | Diags_USER5// User defined diagnostics (Diags_Mask)0x1000U
#define | Diags_USER6// User defined diagnostics (Diags_Mask)0x2000U
#define | Diags_USER7// Alias for informational event (Diags_Mask)0x4000U
#define | Diags_USER8// Alias for analysis event (Diags_Mask)0x8000U
#define | Diags_WARNING// A 'LEVEL4' 'STATUS' event is defined as 'WARNING' (Diags_EventLevel)Diags.LEVEL4
Typedefs
typedef enum | Diags_EventLevel// The level of an event ...
typedef Types_DiagsMask | Diags_Mask// Type used to specify bits in the diags mask;
DETAILS
Every XDC module has a "diagnostics mask" that allows clients to enable or disable diagnostics on a per module basis both at configuration time and at runtime. The Diags module manages a module's diagnostics mask.
You use the Diags module to set and clear bits in a module's diagnostics mask for the purpose of controlling diagnostics within that module. Each bit corresponds to a "category" of diagnostic that can be individually enabled or disabled.
A module's diagnostics mask controls both Assert and Log statements within that module. A module's diagnostics mask may also be used to conditionally execute blocks of code using the Diags_query() runtime function.
A module's diagnostics mask can be set at configuration time and at runtime. The implementation of diagnostics is such that when they are permanently turned off at configuration time (Mode.ALWAYS_OFF), an optimizer can completely eliminate the diagnostics code from the program. Similarly, if diagnostics are permanently turned on at configuration time (Mode.ALWAYS_ON), the optimizer can eliminate all runtime conditional checking and simply invoke the diagnostics code directly. Runtime checking of the diagnostics mask is performed only when the diagnostics are configured to be runtime modifiable (Mode.RUNTIME_OFF or Mode.RUNTIME_ON).
Each bit of the diagnostics mask is controlled by one of the following constants.
  Constant    Meaning
  --------------------------
  ENTRY       Function entry
  EXIT        Function exit
  LIFECYCLE   Object life-cycle
  INTERNAL    Internal diagnostics
  ASSERT      Assert checking
  STATUS      Warning or Error events
  USER1       User defined diagnostics
  USER2       User defined diagnostics
  USER3       User defined diagnostics
  USER4       User defined diagnostics
  USER5       User defined diagnostics
  USER6       User defined diagnostics
  USER7       User defined diagnostics
  INFO        Informational event
  USER8       User defined diagnostics
  ANALYSIS    Analysis event
These constants can be used from either JavaScript configuration scripts or C code and, therefore, have two "names". For example, to reference the ENTRY constant from JavaScript you must use Diags.ENTRY whereas from C you would use Diags_ENTRY.
The ENTRY and EXIT categories are for log statements at the entry and exit points, respectively, to each function within a module. This is useful for tracking the execution flow of your program.
The LIFECYCLE category is for log events at the create/construct and delete/destruct points of each instance object for the module. This is useful for tracking the life-cycle of a module instance object.
ASSERT and INTERNAL are unique in that they are not related to logging, but instead control the Assert statements in a module. These categories control the two classes of asserts:
  • Public asserts, which have an Assert_Id and are documented in the module's reference pages. These asserts are on by default and are meant to help developers validate code that invokes a module's functions.
  • Internal asserts, which have no Assert_Id. These asserts are off by default and are typically used only when developing code. That is, like the standard C assert() mechanism, these asserts are not part of a deployed application.
When a module has enabled the ASSERT category (which is enabled by default) in its diagnostics mask, the module executes all of its public assert statements. To enable internal asserts, you must enable both the ASSERT and INTERNAL categories.
The ASSERT and INTERNAL categories are not intended for use as log event categories. If an event is defined with either of these categories, you will receive a validation error during configuration.
The STATUS category is used for error and warning type events. The four event levels within the STATUS category have defined meanings, see EMERGENCY
The INFO category is used for generic informational events. Any event which does not belong to a more specific category of events may simply be an INFO event.
The ANALYSIS category is used for events related to benchmarks and performance analysis.
The USER1-6 categories are available to each module writer to use as he or she wishes.
The USER7 and USER8 categories are still defined, but their bits have been repurposed for the INFO and ANALYSIS categories, respectively, so the use of USER7 and USER8 has been deprecated.
EXAMPLES
Configuration example: The following XDC configuration statements set a module's diagnostics mask in a configuration script. (In this case, the Task module of the ti.sysbios.knl package is used.) In this example, the ENTRY bit is turned on and the EXIT bit is turned off. Both bits are configured to be runtime modifiable.
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var Task = xdc.useModule('ti.sysbios.knl.Task');

  Task.common$.diags_ENTRY = Diags.RUNTIME_ON;
  Task.common$.diags_EXIT = Diags.RUNTIME_OFF;
Runtime example: The following C code shows how to disable and reenable ENTER diagnostics at runtime for the ti.sysbios.knl.Task module configured in the previous example. The first call to Diag_setMask() enables entry diagnostics ("+E") for just the ti.sysbios.knl.Task module; any call to any Task method in the application causes an "entry" Log event to be generated. The second call disables ("-E") the generation of these events. See Diags_setMask() for a complete description of the strings accepted by this function.
  #include <xdc/runtime/Diags.h>
  :
  Diags_setMask("ti.sysbios.knl.Task+E");
  :
  Diags_setMask("ti.sysbios.knl.Task-E");
Configuration example: The following XDC configuration statements turn on asserts in the entire program.
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var Defaults = xdc.useModule('xdc.runtime.Defaults');

  Defaults.diags_ASSERT = Diags.ALWAYS_ON;
Configuration example: Using the Diags.setMaskMeta() function, the following XDC configuration statements turn on asserts in all of the modules whose name begins with "ti.sysbios." In this case, no change to the application code is necessary to enable these events. It is important to note that, while the configuration step must be re-run and the application must be re-linked, no application sources need to be recompiled.
  var Diags = xdc.useModule('xdc.runtime.Diags');
  Diags.setMaskMeta("ti.sysbios.%", Diags.ASSERT, Diags.ALWAYS_ON);
const Diags_ALL
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Mask of all diagnostics categories, including both logging and asserts

C synopsis target-domain
#define Diags_ALL (Diags_Mask)0xFF9FU
const Diags_ALL_LOGGING
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Mask of all logging diagnostic categories (does not include asserts)

C synopsis target-domain
#define Diags_ALL_LOGGING (Diags_Mask)Diags.ALL & (~Diags.ASSERT) & (~Diags.INTERNAL)
const Diags_ANALYSIS
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Analysis (e.g., benchmark) event

C synopsis target-domain
#define Diags_ANALYSIS (Diags_Mask)Diags.USER8
const Diags_ASSERT
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Assert checking

C synopsis target-domain
#define Diags_ASSERT (Diags_Mask)0x0010U
const Diags_CRITICAL
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A 'LEVEL2' 'STATUS' event is defined as 'CRITICAL'

C synopsis target-domain
#define Diags_CRITICAL (Diags_EventLevel)Diags.LEVEL2
DETAILS
See 'EMERGENCY' for details.
const Diags_EMERGENCY
index URL

A 'LEVEL1' 'STATUS' event is defined as 'EMERGENCY'

C synopsis target-domain
#define Diags_EMERGENCY (Diags_EventLevel)Diags.LEVEL1
DETAILS
For STATUS events only, the meaning of the four EventLevels has been defined. These constants are simply aliases for the four event levels.
The highest three levels are different severities of an error event. For example, an EMERGENCY event may represent an unrecoverable system failure, a CRITICAL event may require notification of an operator, and an ERROR may be a recoverable error.
The lowest level is reserved for warnings, such as when a resource becomes dangerously low.
const Diags_ENTRY
index URL

Function entry

C synopsis target-domain
#define Diags_ENTRY (Diags_Mask)0x0001U
const Diags_ERROR
index URL

A 'LEVEL3' 'STATUS' event is defined as 'ERROR'

C synopsis target-domain
#define Diags_ERROR (Diags_EventLevel)Diags.LEVEL3
DETAILS
See 'EMERGENCY' for details.
const Diags_EXIT
index URL

Function exit

C synopsis target-domain
#define Diags_EXIT (Diags_Mask)0x0002U
const Diags_INFO
index URL

Informational event

C synopsis target-domain
#define Diags_INFO (Diags_Mask)Diags.USER7
const Diags_INTERNAL
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Internal diagnostics

C synopsis target-domain
#define Diags_INTERNAL (Diags_Mask)0x0008U
const Diags_LIFECYCLE
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Object life-cycle

C synopsis target-domain
#define Diags_LIFECYCLE (Diags_Mask)0x0004U
const Diags_STATUS
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Warning or error event

C synopsis target-domain
#define Diags_STATUS (Diags_Mask)0x0080U
const Diags_USER1
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User defined diagnostics

C synopsis target-domain
#define Diags_USER1 (Diags_Mask)0x0100U
const Diags_USER2
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User defined diagnostics

C synopsis target-domain
#define Diags_USER2 (Diags_Mask)0x0200U
const Diags_USER3
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User defined diagnostics

C synopsis target-domain
#define Diags_USER3 (Diags_Mask)0x0400U
const Diags_USER4
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User defined diagnostics

C synopsis target-domain
#define Diags_USER4 (Diags_Mask)0x0800U
const Diags_USER5
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User defined diagnostics

C synopsis target-domain
#define Diags_USER5 (Diags_Mask)0x1000U
const Diags_USER6
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User defined diagnostics

C synopsis target-domain
#define Diags_USER6 (Diags_Mask)0x2000U
const Diags_USER7
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Alias for informational event

C synopsis target-domain
#define Diags_USER7 (Diags_Mask)0x4000U
const Diags_USER8
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Alias for analysis event

C synopsis target-domain
#define Diags_USER8 (Diags_Mask)0x8000U
const Diags_WARNING
index URL

A 'LEVEL4' 'STATUS' event is defined as 'WARNING'

C synopsis target-domain
#define Diags_WARNING (Diags_EventLevel)Diags.LEVEL4
DETAILS
See 'EMERGENCY' for details.
enum Diags_EventLevel
index URL

The level of an event

C synopsis target-domain
typedef enum Diags_EventLevel {
    Diags_LEVEL1,
    Diags_LEVEL2,
    Diags_LEVEL3,
    Diags_LEVEL4
} Diags_EventLevel;
DETAILS
The diagnostics bits each represent a different category of event, for example: an analysis event, a lifecycle event, or an informational event. Within each of these categories, events may have one of four levels to enable filtering based on the level of information desired.
The meaning of these levels and the distinction between them is left open to the user. Depending on the meaning given, different terminology may be used to describe them--they may be levels of detail, priority, severity, etc. The heirarchy of the events is set such that LEVEL1 is the highest priority and LEVEL4 is the lowest. That is, enabling LEVEL4 events implies that events of all four levels will be logged.
LEVEL1
Least detail, highest priority, most severe, etc.
LEVEL2
LEVEL3
LEVEL4
Most detail, lowest priority, least severe, etc.
The STATUS bit is the only category where the levels are given explicit meaning to ensure consistency. Within the STATUS category, the meaning of the levels is defined by the constants EMERGENCY, CRITICAL, ERROR, and WARNING.
Events which don't define a level will receive LEVEL1 by default.
typedef Diags_Mask
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Type used to specify bits in the diags mask

C synopsis target-domain
typedef Types_DiagsMask Diags_Mask;
Diags_compareLevels() // module-wide
index URL

Returns false if levelA is lower than levelB

C synopsis target-domain
macro Bool Diags_compareLevels(Diags_EventLevel levelA, Diags_EventLevel levelB);
DETAILS
This API is intended to be used to determine if a given event passes a filtering threshold and should be logged. Conceptually (though not necessarily in implementation), this API is equivalent to the expression (levelA < levelB). The values of the EventLevels have internal meaning, so a direct comparison of two levels should not done; this API must be used to correctly compare them.
LEVEL1 is the highest level and LEVEL4 is the lowest. So LEVEL4 is less than LEVEL3, which is less than LEVEL2, which is less than LEVEL1.
Diags_getLevel() // module-wide
index URL

Get the event level set in the given mask

C synopsis target-domain
macro Diags_EventLevel Diags_getLevel(Diags_Mask mask);
ARGUMENTS
mask — mask of diagnostics bits to read filter level from.
DETAILS
See 'EventLevel' for a description of event levels.
Diags_query() // module-wide
index URL

Query the module's diagnostics mask against the given mask

C synopsis target-domain
macro Bool Diags_query(Diags_Mask mask);
ARGUMENTS
mask — mask of diagnostics bits to test
This given mask is constructed by OR'ing together the desired bits of the diagnostics mask using the constants listed in the Mask Summary above. The module's diagnostics mask will be logically AND'ed with the given mask, and return true if the result is non-zero and false otherwise.
      if (Diags_query(Diags_USER1 | Diags_USER4)) {
          :
      }
DETAILS
Use this query function to test the state of a module's diagnostics mask at runtime. This function will perform a logical AND operation on the module's diagnostics mask and the given mask. If any bits survive the operation, the function returns true.
  result = moduleMask & givenMask ? true : false;
This query function has a compile-time binding to the module's diagnostics mask. If the query function is part of the C code implementation of a module, then it will use that module's diagnostics mask. Otherwise, it will use the diagnostics mask of the xdc.runtime.Main module.
The implementation of the diagnostics mask and the query function is such that an optimizer can take advantage of dead code elimination and/or constant folding to eliminate or reduce code size. For example, if the query function is used in a conditional test, and the given mask contains only bits which have been configured to be permanently off, then the code for the entire conditional statement can be removed at link time. If the bits in the given mask have been configured to be permanently on, then the conditional code can be removed leaving the body of the conditional as direct in-line code.
EXAMPLES
In the following example, the USER1 bit of the module's diagnostics mask has been configured to be permanently off, thus the entire conditional code block can be removed at link time. Note, the C code below is part of the module itself.
Configuration Script
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var ModA = xdc.useModule('my.package.ModuleA');
  ModA.common$.diags_USER1 = Diags.ALWAYS_OFF;
C Code, ModA.c
  if (Diags_query(Diags_USER1)) {         // this code removed
      ...additional code here...          // this code removed
  }                                       // this code removed
In the following example, the USER1 bit of the module's diagnostics mask has been configured to be permanently on, thus the conditional code can be removed leaving the code contained within the conditional statement. Note, the C code below is part of the module itself.
Configuration Script
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var ModA = xdc.useModule('my.package.ModuleA');
  ModA.common$.diags_USER1 = Diags.ALWAYS_ON;
C Code, ModA.c
  if (Diags_query(Diags_USER1) {          // this code removed
      ...additional code here...          // this code remains
  }                                       // this code removed
Diags_setMask() // module-wide
index URL

Set a module's diagnostics mask at runtime

C synopsis target-domain
Void Diags_setMask(CString control);
ARGUMENTS
control — diagnostic mask control string
This control string defines one or more actions where each action consists of a module name, an operator character, and a list of bit specifiers. Use the % character as a wildcard to turn the module name into a prefix matching pattern for a set of modules. Multiple actions are separated with the ; character.
The control string has the following format:
  <module[%]><op><bits>[;<module[%]><op><bits>]
Specify individual module names explicitly (e.g. ti.sysbios.knl.Task), or match multiple modules using a prefix matching pattern specified with the % character (e.g. ti.sysbios.knl.%).
The operator is specified with a single character from the following table.
  Operator    Description
  --------------------------------------------------
  +           Set only the specified bits (other bits preserved)
  -           Clear only the specified bits (other bits preserved)
  =           Assign the entire mask to the given value where the
              specified bits are set and all other bits are cleared
The bits are specified with a list of characters from the following table. Refer to the Mask Summary for a list of each bit of the diagnostics mask.
  Control     Diagnostics
  Character   Constant        Description
  --------------------------------------------------
  E           ENTRY           Function entry
  X           EXIT            Function exit
  L           LIFECYCLE       Object life-cycle
  I           INTERNAL        Internal diagnostics
  A           ASSERT          Assert checking
  Z           ANALYSIS        Analysis event
  F           INFO            Informational event
  S           STATUS          Status (error, warning) event
  1           USER1           User defined diagnostics
  2           USER2           User defined diagnostics
  3           USER3           User defined diagnostics
  4           USER4           User defined diagnostics
  5           USER5           User defined diagnostics
  6           USER6           User defined diagnostics
  7           USER7           User defined diagnostics
  8           USER8           User defined diagnostics
DETAILS
Use the given control string to set or clear bits in a module's diagnostics mask. The control string defines one or more actions where each action modifies the diagnostics mask in one or more modules. Each action can either set, clear, or assign a module's diagnostics mask. To both set and clear bits in the same diagnostics mask requires two actions, or you can assign the entire mask explicitly in one action. Each action can specify a given module or a set of modules using name prefix matching.
WARNING
Each bit of a module's diagnostics mask that is to be modified at runtime, must be configured to be runtime modifiable in the program's configuration script. Use either RUNTIME_OFF or RUNTIME_ON as the configuration value for the desired bit in the diagnostics mask. Also, the following configuration parameters must have the values indicated (which are their default values):
  • <module>.common$.namedModule = true;
  • Text.isLoaded = true;
Note: any error that occurs during the parsing of the control string causes Diags_setMask() to return without processing the remainder of the control string.
EXAMPLES
The following example demonstrates how to set a module's diagnostics mask (the Task module in this case) at runtime. In this example, the USER1 bit is turned on. Note that the module's USER1 diagnostics bit must be configured to be runtime modifiable. In this instance, the bit is initialized to off.
Configuration Script
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var Task = xdc.useModule('ti.sysbios.knl.Task');
  Task.common$.diags_USER1 = Diags.RUNTIME_OFF;
C Code
  Diags_setMask("ti.sysbios.knl.Task+1");
The following example demonstrates the use of the % wildcard character to set the USER1 bit at runtime for all modules in the ti.sysbios.knl package. The meta-only Diags.setMaskMeta function is used to configure the USER1 bit to be runtime modifiable. The setMask function is used to actually set the USER1 bit at runtime in all the ti.sysbios.knl modules. Note the use of the % character in both functions to match all the module names within the given package.
Configuration Script
  var Diags = xdc.useModule('xdc.runtime.Diags');
  Diags.setMaskMeta("ti.sysbios.knl.%", Diags.USER1, Diags.RUNTIME_OFF);
C Code
  Diags_setMask("ti.sysbios.knl.%+1");
In the following example, the ENTRY, EXIT and LIFECYCLE trace is enabled for all modules in the ti.sysbios.knl package but is initially off; i.e., no events will occur until explicitly turned on at runtime.
At runtime the call to Diags_setMask turns on ENTRY and EXIT trace and turns off LIFECYCLE trace for all modules in the application for which trace has been enabled during configuration. In this case, the only modules that can generate events are those in the ti.sysbios.knl package.
Configuration Script
  var Diags = xdc.useModule('xdc.runtime.Diags');
  Diags.setMaskMeta("ti.sysbios.knl.%",
      Diags.ENTRY | Diags.EXIT | Diags.LIFECYCLE, Diags.RUNTIME_OFF);
C Code
  Diags_setMask("%+EX;%-L");
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Diags_Module_id();
// Get this module's unique id
Bool Diags_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Diags_Module_heap();
// The heap from which this module allocates memory
Bool Diags_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Diags_Module_getMask();
// Returns the diagnostics mask for this module
Void Diags_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Diags.xdc
var Diags = xdc.useModule('xdc.runtime.Diags');
module-wide constants & types
    const Diags.ALL// Mask of all diagnostics categories, including both logging and asserts = 0xFF9FU;
    const Diags.ALL_LOGGING// Mask of all logging diagnostic categories (does not include asserts) = Diags.ALL & (~Diags.ASSERT) & (~Diags.INTERNAL);
    const Diags.ANALYSIS// Analysis (e.g., benchmark) event = Diags.USER8;
    const Diags.ASSERT// Assert checking = 0x0010U;
    const Diags.CRITICAL// A 'LEVEL2' 'STATUS' event is defined as 'CRITICAL' = Diags.LEVEL2;
    const Diags.EMERGENCY// A 'LEVEL1' 'STATUS' event is defined as 'EMERGENCY' = Diags.LEVEL1;
    const Diags.ENTRY// Function entry = 0x0001U;
    const Diags.ERROR// A 'LEVEL3' 'STATUS' event is defined as 'ERROR' = Diags.LEVEL3;
    const Diags.EXIT// Function exit = 0x0002U;
    const Diags.INFO// Informational event = Diags.USER7;
    const Diags.INTERNAL// Internal diagnostics = 0x0008U;
    const Diags.LIFECYCLE// Object life-cycle = 0x0004U;
    const Diags.STATUS// Warning or error event = 0x0080U;
    const Diags.USER1// User defined diagnostics = 0x0100U;
    const Diags.USER2// User defined diagnostics = 0x0200U;
    const Diags.USER3// User defined diagnostics = 0x0400U;
    const Diags.USER4// User defined diagnostics = 0x0800U;
    const Diags.USER5// User defined diagnostics = 0x1000U;
    const Diags.USER6// User defined diagnostics = 0x2000U;
    const Diags.USER7// Alias for informational event = 0x4000U;
    const Diags.USER8// Alias for analysis event = 0x8000U;
    const Diags.WARNING// A 'LEVEL4' 'STATUS' event is defined as 'WARNING' = Diags.LEVEL4;
    values of type Diags.EventLevel// The level of an event
        const Diags.LEVEL1;
        const Diags.LEVEL2;
        const Diags.LEVEL3;
        const Diags.LEVEL4;
    values of type Diags.Mode// Diagnostics mask bit value used at configuration time
        const Diags.ALWAYS_OFF// permanently disabled;
        const Diags.ALWAYS_ON// permanently enabled;
        const Diags.RUNTIME_OFF// run-time settable, initially disabled;
        const Diags.RUNTIME_ON// run-time settable, initially enabled;
module-wide config parameters
     Diags.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     Diags.setMaskMeta// Set the module's diagnostics mask at config time(Any pattern, Bits16 mask, Diags.Mode mode) returns Void
const Diags.ALL
index URL

Mask of all diagnostics categories, including both logging and asserts

Configuration settings
const Diags.ALL = 0xFF9FU;
C SYNOPSIS
Diags_ALL
const Diags.ALL_LOGGING
index URL

Mask of all logging diagnostic categories (does not include asserts)

Configuration settings
const Diags.ALL_LOGGING = Diags.ALL & (~Diags.ASSERT) & (~Diags.INTERNAL);
C SYNOPSIS
Diags_ALL_LOGGING
const Diags.ANALYSIS
index URL

Analysis (e.g., benchmark) event

Configuration settings
const Diags.ANALYSIS = Diags.USER8;
C SYNOPSIS
Diags_ANALYSIS
const Diags.ASSERT
index URL

Assert checking

Configuration settings
const Diags.ASSERT = 0x0010U;
C SYNOPSIS
Diags_ASSERT
const Diags.CRITICAL
index URL

A 'LEVEL2' 'STATUS' event is defined as 'CRITICAL'

Configuration settings
const Diags.CRITICAL = Diags.LEVEL2;
DETAILS
See 'EMERGENCY' for details.
C SYNOPSIS
Diags_CRITICAL
const Diags.EMERGENCY
index URL

A 'LEVEL1' 'STATUS' event is defined as 'EMERGENCY'

Configuration settings
const Diags.EMERGENCY = Diags.LEVEL1;
DETAILS
For STATUS events only, the meaning of the four EventLevels has been defined. These constants are simply aliases for the four event levels.
The highest three levels are different severities of an error event. For example, an EMERGENCY event may represent an unrecoverable system failure, a CRITICAL event may require notification of an operator, and an ERROR may be a recoverable error.
The lowest level is reserved for warnings, such as when a resource becomes dangerously low.
C SYNOPSIS
Diags_EMERGENCY
const Diags.ENTRY
index URL

Function entry

Configuration settings
const Diags.ENTRY = 0x0001U;
C SYNOPSIS
Diags_ENTRY
const Diags.ERROR
index URL

A 'LEVEL3' 'STATUS' event is defined as 'ERROR'

Configuration settings
const Diags.ERROR = Diags.LEVEL3;
DETAILS
See 'EMERGENCY' for details.
C SYNOPSIS
Diags_ERROR
const Diags.EXIT
index URL

Function exit

Configuration settings
const Diags.EXIT = 0x0002U;
C SYNOPSIS
Diags_EXIT
const Diags.INFO
index URL

Informational event

Configuration settings
const Diags.INFO = Diags.USER7;
C SYNOPSIS
Diags_INFO
const Diags.INTERNAL
index URL

Internal diagnostics

Configuration settings
const Diags.INTERNAL = 0x0008U;
C SYNOPSIS
Diags_INTERNAL
const Diags.LIFECYCLE
index URL

Object life-cycle

Configuration settings
const Diags.LIFECYCLE = 0x0004U;
C SYNOPSIS
Diags_LIFECYCLE
const Diags.STATUS
index URL

Warning or error event

Configuration settings
const Diags.STATUS = 0x0080U;
C SYNOPSIS
Diags_STATUS
const Diags.USER1
index URL

User defined diagnostics

Configuration settings
const Diags.USER1 = 0x0100U;
C SYNOPSIS
Diags_USER1
const Diags.USER2
index URL

User defined diagnostics

Configuration settings
const Diags.USER2 = 0x0200U;
C SYNOPSIS
Diags_USER2
const Diags.USER3
index URL

User defined diagnostics

Configuration settings
const Diags.USER3 = 0x0400U;
C SYNOPSIS
Diags_USER3
const Diags.USER4
index URL

User defined diagnostics

Configuration settings
const Diags.USER4 = 0x0800U;
C SYNOPSIS
Diags_USER4
const Diags.USER5
index URL

User defined diagnostics

Configuration settings
const Diags.USER5 = 0x1000U;
C SYNOPSIS
Diags_USER5
const Diags.USER6
index URL

User defined diagnostics

Configuration settings
const Diags.USER6 = 0x2000U;
C SYNOPSIS
Diags_USER6
const Diags.USER7
index URL

Alias for informational event

Configuration settings
const Diags.USER7 = 0x4000U;
C SYNOPSIS
Diags_USER7
const Diags.USER8
index URL

Alias for analysis event

Configuration settings
const Diags.USER8 = 0x8000U;
C SYNOPSIS
Diags_USER8
const Diags.WARNING
index URL

A 'LEVEL4' 'STATUS' event is defined as 'WARNING'

Configuration settings
const Diags.WARNING = Diags.LEVEL4;
DETAILS
See 'EMERGENCY' for details.
C SYNOPSIS
Diags_WARNING
enum Diags.EventLevel
index URL

The level of an event

Configuration settings
values of type Diags.EventLevel
    const Diags.LEVEL1;
    const Diags.LEVEL2;
    const Diags.LEVEL3;
    const Diags.LEVEL4;
DETAILS
The diagnostics bits each represent a different category of event, for example: an analysis event, a lifecycle event, or an informational event. Within each of these categories, events may have one of four levels to enable filtering based on the level of information desired.
The meaning of these levels and the distinction between them is left open to the user. Depending on the meaning given, different terminology may be used to describe them--they may be levels of detail, priority, severity, etc. The heirarchy of the events is set such that LEVEL1 is the highest priority and LEVEL4 is the lowest. That is, enabling LEVEL4 events implies that events of all four levels will be logged.
LEVEL1
Least detail, highest priority, most severe, etc.
LEVEL2
LEVEL3
LEVEL4
Most detail, lowest priority, least severe, etc.
The STATUS bit is the only category where the levels are given explicit meaning to ensure consistency. Within the STATUS category, the meaning of the levels is defined by the constants EMERGENCY, CRITICAL, ERROR, and WARNING.
Events which don't define a level will receive LEVEL1 by default.
C SYNOPSIS
Diags_EventLevel
metaonly enum Diags.Mode
index URL

Diagnostics mask bit value used at configuration time

Configuration settings
values of type Diags.Mode
    const Diags.ALWAYS_OFF;
    // permanently disabled
    const Diags.ALWAYS_ON;
    // permanently enabled
    const Diags.RUNTIME_OFF;
    // run-time settable, initially disabled
    const Diags.RUNTIME_ON;
    // run-time settable, initially enabled
DETAILS
At run-time a module's diagnostics mask is an ordinary data word with each bit value being 0 or 1 indicating whether or not the corresponding diagnostic is disabled or enabled. At configuration time, however, each bit of the diagnostics mask can be placed in one of several Modes; these modes determine its initial runtime value and whether or not the bit is modifiable at runtime.
When setting a module's diagnostics mask at configuration time, use one of the enumerated values of type Mode. These values will either set or clear a bit in the mask and also define if the bit can be changed at run-time. For example, using ALWAYS_OFF as the bit value means that bit cannot be set at run-time. This fact can be used by an optimizer to perform constant-folding and dead-code elimination.
metaonly config Diags.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Diags.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly Diags.setMaskMeta() // module-wide
index URL

Set the module's diagnostics mask at config time

Configuration settings
Diags.setMaskMeta(Any pattern, Bits16 mask, Diags.Mode mode) returns Void
ARGUMENTS
pattern — module prefix or regular expression
The pattern is used to match a module's name. If pattern is specified as a string, then name prefix matching is used. The pattern may also be a regular expression. Only the masks of the modules matching pattern are set.
mask — diagnostic fields to modify
The mask is used to determine which fields in the diags mask are modified. Each field specified in the mask is set to the given mode value.
mode — mode to assign to the specified mask fields
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.Error
index URL

Runtime error manager

  • C synopsis
  • Individual elements
  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
The Error module provides mechanisms for raising, checking, and handling errors in a program. At the configuration time, you can use the parameters Error.policy, Error.policyFxn and Error.raiseHook to specify what happens when an error takes place. You can control how much debugging information is available in that case, while also controlling the memory footprint that the `Error' module adds to the program. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Error.xdc
#include <xdc/runtime/Error.h>
Functions
Bool | Error_check// Return TRUE if an error was raised(Error_Block *eb);
UInt16 | Error_getCode// Get an error's code(Error_Block *eb);
Error_Data * | Error_getData// Get an error's argument list(Error_Block *eb);
Error_Id | Error_getId// Get an error's id(Error_Block *eb);
CString | Error_getMsg// Get an error's "printf" format string(Error_Block *eb);
Types_Site * | Error_getSite// Get an error's call site info(Error_Block *eb);
Void | Error_init// Put an error block into its initial state(Error_Block *eb);
Void | Error_policyDefault// Default implementation of the policyFxn(Error_Block *eb, Types_ModuleId mod, CString file, Int line, Error_Id id, IArg arg1, IArg arg2);
Void | Error_policyMin// Implementation of the policyFxn with a smaller footprint(Error_Block *eb, Types_ModuleId mod, CString file, Int line, Error_Id id, IArg arg1, IArg arg2);
Void | Error_policySpin// Lightweight implementation of the policyFxn(Error_Block *eb, Types_ModuleId mod, CString file, Int line, Error_Id id, IArg arg1, IArg arg2);
Void | Error_print// Print error using System.printf()(Error_Block *eb);
macro Void | Error_raise// Raise an error(Error_Block *eb, Error_Id id, IArg arg1, IArg arg2);
Functions common to all target modules
 | Error_Module_getMask// Returns the diagnostics mask for this module, Error_Module_hasMask// Test whether this module has a diagnostics mask, Error_Module_heap// The heap from which this module allocates memory, Error_Module_id// Get this module's unique id, Error_Module_setMask// Set the diagnostics mask for this module, Error_Module_startupDone// Test if this module has completed startup
Defines
extern const Error_Block | Error_ABORT// A special Error_Block pointer that terminates the application in case of an error;
extern const Error_Block | Error_IGNORE// A pointer to a special Error_Block used when the caller does not want to check Error_Block;
#define | Error_NUMARGS// Maximum number of arguments supported by an error (Int)2
Typedefs
typedef struct | Error_Block// Error block Error_Block;
typedef struct | Error_Data// Error args ...
typedef Void | (*Error_HookFxn// Function called whenever an error is raised)(Error_Block*);
typedef opaque | Error_Id// Error identifier;
typedef enum | Error_Policy// Error handling policies ...
typedef Void | (*Error_PolicyFxn// Error policy function signature)(Error_Block*,Types_ModuleId,CString,Int,Error_Id,IArg,IArg);
Constants
extern const Error_Id | Error_E_generic// Generic error;
extern const Error_Id | Error_E_memory// Out of memory error;
extern const Error_Id | Error_E_msgCode// Generic error that displays a string and a numeric value;
extern const UInt16 | Error_maxDepth// Maximum number of concurrent calls to raiseHook;
extern const Error_Policy | Error_policy// System-wide error handling policy;
extern const Error_PolicyFxn | Error_policyFxn// Error handler function;
extern const Error_HookFxn | Error_raiseHook// The function to call whenever an error is raised;
DETAILS
The Error module provides mechanisms for raising, checking, and handling errors in a program. At the configuration time, you can use the parameters Error.policy, Error.policyFxn and Error.raiseHook to specify what happens when an error takes place. You can control how much debugging information is available in that case, while also controlling the memory footprint that the `Error' module adds to the program.
Module producers use this module to define specific error types and reference these when raising an error. Each error type has a custom error message and can be parameterized with up to NUMARGS arguments. A generic error type is provided for raising errors when not in a module.
Use the Error_check() function in your application or module to determine if an error has been raised in a function that takes an Error_Block as an argument. It is important to understand that it is the caller's responsibility to check the error block after calling such a function. Otherwise, a raised error may go undetected, which could compromise the integrity of the system. For example:
  Task_create(..., &eb);

  if (Error_check(&eb)) {
      ...an error has been raised...
  }
The function assigned to the parameter Error.policyFxn is the central part of the error handling mechanism in this module. Most of the users will either leave this parameter at its default value, or select one of the alternative implementations that are included with the Error module. However, this configuration parameter also allows users to completely take over the error handling by setting this parameter to their own implementation. In that case, we recommend that users first review the included implementations, and base their implementation on one of these function. The included implementations are policyDefault, policyMin, and policySpin.
The Error.raiseHook configuration parameter allows a configured function to be invoked when an error is raised. This function is invoked from the default implementation of Error.policyFxn. Therefore, if a different implementation of Error.policyFxn is used, the function specified by Error.raiseHook may or may not be called. This function is passed a pointer to the error's error block and makes it easy to manage all errors from a common point. For example, you can trap any error (fatal or not) by simply setting a breakpoint in this function. You can use the following functions to extract information from an error block.
  • Error_getData()
  • Error_getCode()
  • Error_getId()
  • Error_getMsg()
  • Error_getSite()
The Error module provides facilities for handling errors, but the Log module also provides features for logging error events. These are separate concepts; however, to ensure that users do not have to both raise and log an error, the Error module will automatically log an error event when one is raised. The Error module logs the standard Log.L_error event, passing it the error message and arguments.
The error event is logged to the Error module's logger using the Error module's diags mask. Logging of errors is enabled by default in the diags mask, but the event will not be logged unless a logger is configured for the Error module as well.
To make the error event appear as though it is coming from the module which called Error_raise, the event is logged with the caller's module id and with the caller's call site information.
EXAMPLES
Example 1: The following example shows how a module, named ModA, defines a custom error type and shows how this error is raised by the module. The module defines an Id of E_notEven in its module specification file (in this case, ModA.xdc). The error's message string takes only one argument. The module also defines a mayFail() function that takes an error block. In the module's C source file, the function checks for the error condition and raises the error if needed.
This is part of ModA's XDC specification file for the module:
  config xdc.runtime.Error.Id E_notEven = {
      msg: "expected an even number (%d)"
  };

  Void mayFail(Int x, xdc.runtime.Error.Block *eb);
This is part of the C code for the module:
  Void ModA_mayFail(Int x, Error_Block *eb)
  {
      if ((x % 2) != 0) {
          Error_raise(eb, ModA_E_notEven, x, 0);
          ...add error handling code here...
          return;
      }
      ...
  }
Example 2: The following C code supplies an error block to a function that requires one and tests the error block to see if the function raised an error. Note that an error block must be initialized before it can be used and same error block may be passed to several functions.
  #include <xdc/runtime/Error.h>
  #include <ti/sysbios/knl/Task.h>
  Error_Block eb;
  Task_Handle tsk;

  Error_init(&eb);
  tsk = Task_create(..., &eb);

  if (Error_check(&eb)) {
      ...an error has been raised...
  }
Example 3: The following C code shows that you may pass a special constant Error_ABORT in place of an error block to a function requiring an error block. In this case, if the function raises an error, the program is aborted (via xdc_runtime_System_abort()), thus execution control will never return to the caller.
  #include <xdc/runtime/Error.h>
  #include <ti/sysbios/knl/Task.h>

  tsk = Task_create(..., Error_ABORT);
  ...will never get here if an error was raised in Task_create...
Example 4: The following C code shows that you may pass a special constant Error_IGNORE in place of an error block to a function requiring an error block. The purpose of this constant is to avoid allocating an error block on stack in the use case where the caller is not checking the error block after the call returns. In this example, the caller only checks the returned value but not the error block. If the function raises an error, the program will return to the caller, assuming Error_policy is set to UNWIND.
  #include <xdc/runtime/Error.h>
  #include <ti/sysbios/knl/Task.h>

  tsk = Task_create(..., Error_IGNORE);
  if (tsk != NULL) {
      ...
  }
Example 5: The following C code shows how to write a function that is not part of a module and that takes an error block and raises the generic error type provided by the Error module. Note, if the caller passes Error_ABORT for the error block or if the error policy is TERMINATE, then the call to Error_raise() will call xdc_runtime_System_abort() and never return.
  #include <xdc/runtime/Error.h>

  Void myFunc(..., Error_Block *eb)
  {
      ...

      if (...error condition detected...) {
          String  myErrorMsg = "my custom error message";
          Error_raise(eb, Error_E_generic, myErrorMsg, 0);
          ...add error handling code here...
          return;
      }
  }
const Error_ABORT
index URL

A special Error_Block pointer that terminates the application in case of an error

C synopsis target-domain
extern const Error_Block Error_ABORT;
DETAILS
This constant has the same effect as passing NULL in place of an Error_Block. If an error is raised when Error_ABORT is passed, the application terminates regardless of Error_policy.
const Error_IGNORE
index URL

A pointer to a special Error_Block used when the caller does not want to check Error_Block

C synopsis target-domain
extern const Error_Block Error_IGNORE;
DETAILS
This constant should be used when the caller does not plan to check Error_Block after the call returns, but wants the call to return even in the case when an error is raised. Error_policy is still in effect and the application will still terminate when an error is raised if Error_policy is not set to Error_UNWIND.
const Error_NUMARGS
index URL

Maximum number of arguments supported by an error

C synopsis target-domain
#define Error_NUMARGS (Int)2
enum Error_Policy
index URL

Error handling policies

C synopsis target-domain
typedef enum Error_Policy {
    Error_TERMINATE,
    Error_UNWIND
} Error_Policy;
VALUES
TERMINATE — All raised errors are fatal. A call to Error_raise will never return to the caller. The program calls System_abort instead.
UNWIND — Errors are returned to the caller. A call to Error_raise will return back to the caller.
DETAILS
These constants are assigned to Error.policy to control the flow of the program when an error is raised.
typedef Error_HookFxn
index URL

Function called whenever an error is raised

C synopsis target-domain
typedef Void (*Error_HookFxn)(Error_Block*);
DETAILS
The first parameter and only parameter passed to this function is a pointer to an Error_Block. Even if the client passes a NULL error block pointer to Error_raise, this parameter passed to this "hook" function is always non-NULL.
typedef Error_Id
index URL

Error identifier

C synopsis target-domain
typedef opaque Error_Id;
DETAILS
Each type of error raised is defined with a metaonly Error.Desc. An Error_Id is a 32-bit target value that encodes the information in the Desc. Target programs use Error_Id values to "raise" and check for specific errors.
WARNING
Id values may vary among different configurations of an application. For example, the addition of a new module to a program may result in a different absolute value for E_generic. If you need error numbers that remain invariant, use the user definable Desc.code field.
typedef Error_PolicyFxn
index URL

Error policy function signature

C synopsis target-domain
typedef Void (*Error_PolicyFxn)(Error_Block*,Types_ModuleId,CString,Int,Error_Id,IArg,IArg);
PARAMETERS
A policy function is passed the following parameters:
eb
A pointer to an Error_Block structure to be initialized using the subsequent arguments. This pointer may be NULL.
modId
The module ID of the module calling Error_raise()
fileName
A string naming the source file which made the call to Error_raise()
lineNumber
An integer line number within the file named above where the call Error_raise() occured
errId
The Error_Id of the error being raised
arg1 and arg2
Two IArg arguments associated with the error being raised
struct Error_Block
index URL

Error block

C synopsis target-domain
typedef struct Error_Block Error_Block;
DETAILS
An opaque structure used to store information about errors once raised. This structure must be initialized via Error_init() before being used for the first time.
struct Error_Data
index URL

Error args

C synopsis target-domain
typedef struct Error_Data {
    IArg arg[Error_NUMARGS];
} Error_Data;
DETAILS
The two arguments (arg1, arg2) passed to raise are stored in one of these arrays within the associated Error_Block. To access these arguments use getData to obtain a pointer to the Error_Block's Data array.
SEE
getData
config Error_E_generic // module-wide
index URL

Generic error

C synopsis target-domain
extern const Error_Id Error_E_generic;
DETAILS
This error takes advantage of the $S specifier to allow for recursive formatting of the error message passed to error raise.
For example, the following is possible:
  Error_raise(eb, Error_E_generic, "Error occurred, code: %d", code);
SEE
System.extendedFormats, System.printf
config Error_E_memory // module-wide
index URL

Out of memory error

C synopsis target-domain
extern const Error_Id Error_E_memory;
DETAILS
The first parameter must be the heap instance handle. The second parameter is the size of the object for which the allocation failed.
config Error_E_msgCode // module-wide
index URL

Generic error that displays a string and a numeric value

C synopsis target-domain
extern const Error_Id Error_E_msgCode;
config Error_maxDepth // module-wide
index URL

Maximum number of concurrent calls to raiseHook

C synopsis target-domain
extern const UInt16 Error_maxDepth;
DETAILS
To prevent errors that occur in the raiseHook function from causing an infinite recursion, the maximum number of concurrent calls to raiseHook is limited by Error_maxDepth. If the number of concurrent calls exceeds Error_maxDepth, the raiseHook function is not called.
In multi-threaded systems, errors raised by separate threads may be detected as recursive calls to raiseHook. So, setting Error.maxDepth to a small value may - in rare instances - result in errorHook not being called for some raised errors.
If it is important that all raised errors trigger a call to the raiseHook function, set Error.maxDepth to an impossibly large number (0xffff) and either ensure that the raise hook never calls a function that can raise an error or add checks in raiseHook to protect against "double faults".
config Error_policy // module-wide
index URL

System-wide error handling policy

C synopsis target-domain
extern const Error_Policy Error_policy;
DETAILS
You can use this parameter to decide at the configuration time what happens when an error is raised. The program can either call System_abort() or return back to the caller. The implementations of Error.policyFxn should consider this parameter, but some implementations may not do so to save the memory footprint (Error_policySpin, for example).
config Error_policyFxn // module-wide
index URL

Error handler function

C synopsis target-domain
extern const Error_PolicyFxn Error_policyFxn;
DETAILS
This function is called to handle all raised errors but, unlike raiseHook, this function is responsible for completely handling the error (including calling raiseHook with an appropriately initialized Error_Block, if raiseHook functionality is required).
The default value is a function which, in addition to calling raiseHook with an initialized Error_Block structure, logs the error using this module's logger.
Alternately, policySpin, which simply loops indefinitely, can be used to minimize target footprint. Note, this function does NOT call raiseHook, and also ignores Error.policy.
The third implementation, policyMin finds a middle ground between the two implementations above in terms of memory footprint and the available error information. Only the Error_Id of the error being raised is available in the resulting Error_Block, raiseHook is not invoked, but Error.policy is observed.
config Error_raiseHook // module-wide
index URL

The function to call whenever an error is raised

C synopsis target-domain
extern const Error_HookFxn Error_raiseHook;
DETAILS
If set to a non-null value, the referenced function is always called when an error is raised, even if the Error policy is TERMINATE. In rare cases, it is possible that a raised error does not trigger a call to raiseHook; see maxDepth.
Regardless of the current policy in use, raising an error by calling Error_raise will always invoke the error raise hook function assigned to the Error.raiseHook configuration parameter, if the default Error.policyFxn implementation is used.
By default, this function is set to Error_print which causes the error to be formatted and output via System_printf. Setting this configuration parameter to null indicates that no function hook should be called.
SEE
maxDepth, HookFxn, print
Error_check() // module-wide
index URL

Return TRUE if an error was raised

C synopsis target-domain
Bool Error_check(Error_Block *eb);
ARGUMENTS
eb — pointer to an Error_Block, Error_ABORT or Error_IGNORE
RETURNS
If eb is non-NULL and Error.policy == UNWIND and an error was raised on eb, this function returns TRUE. Otherwise, it returns FALSE.
Error_getCode() // module-wide
index URL

Get an error's code

C synopsis target-domain
UInt16 Error_getCode(Error_Block *eb);
ARGUMENTS
eb — non-NULL pointer to an Error_Block
RETURNS
getCode returns the error code associated with this error block.
SEE
raise, Desc
Error_getData() // module-wide
index URL

Get an error's argument list

C synopsis target-domain
Error_Data *Error_getData(Error_Block *eb);
ARGUMENTS
eb — non-NULL pointer to an Error_Block
RETURNS
getData returns an array of type Data with NUMARGS elements containing the arguments provided at the time the error was raised.
SEE
raise
Error_getId() // module-wide
index URL

Get an error's id

C synopsis target-domain
Error_Id Error_getId(Error_Block *eb);
ARGUMENTS
eb — non-NULL pointer to an Error_Block
WARNING
Error_Id values may vary among different configurations of an application. For example, the addition of a new module to a program may result in a different absolute value for E_generic. If you need error numbers that remain invariant, use the user definable Desc.code field.
SEE
raise, Desc
Error_getMsg() // module-wide
index URL

Get an error's "printf" format string

C synopsis target-domain
CString Error_getMsg(Error_Block *eb);
ARGUMENTS
eb — non-NULL pointer to an Error_Block
SEE
raise, Desc
Error_getSite() // module-wide
index URL

Get an error's call site info

C synopsis target-domain
Types_Site *Error_getSite(Error_Block *eb);
ARGUMENTS
eb — non-NULL pointer to an Error_Block
RETURNS
getSite returns a pointer to an initialized Types.Site structure. However, in the event that the call site was compiled with xdc_FILE defined to be NULL (to minimize string space overhead) the file field may be set to NULL.
SEE
raise, Desc
Error_init() // module-wide
index URL

Put an error block into its initial state

C synopsis target-domain
Void Error_init(Error_Block *eb);
ARGUMENTS
eb — pointer to an Error_Block, Error_ABORT or Error_IGNORE
If eb is NULL this function simply returns.
DETAILS
To ensure reliable error detection, clients must call init for an Error_Block prior to any use.
If the same Error Block is used multiple times, only the last error raised is retained.
Error_policyDefault() // module-wide
index URL

Default implementation of the policyFxn

C synopsis target-domain
Void Error_policyDefault(Error_Block *eb, Types_ModuleId mod, CString file, Int line, Error_Id id, IArg arg1, IArg arg2);
DETAILS
This function is the implementation which is plugged in by default to the policyFxn. It processes the error and logs it before returning to the caller or aborting - depending on the error policy policy.
Error_policyMin() // module-wide
index URL

Implementation of the policyFxn with a smaller footprint

C synopsis target-domain
Void Error_policyMin(Error_Block *eb, Types_ModuleId mod, CString file, Int line, Error_Id id, IArg arg1, IArg arg2);
DETAILS
This function is a compromise between a debug-friendly policyDefault, which offers more details about any raised errors, but requires a larger footprint, and policySpin, which is small but does not display any debug information.
This function returns to the caller, unless policy is set to TERMINATE, or the Error_Block passed to it is NULL. If it returns, the only information available in the returned Error_Block is the error ID.
Error_policySpin() // module-wide
index URL

Lightweight implementation of the policyFxn

C synopsis target-domain
Void Error_policySpin(Error_Block *eb, Types_ModuleId mod, CString file, Int line, Error_Id id, IArg arg1, IArg arg2);
DETAILS
This function is a lightweight alternative which can be plugged in to the policyFxn. It just loops infinitely.
WARNING
This function does not call raiseHook and never returns to the caller. As a result, ANY error raised by the application will cause it to indefinitly hang.
Error_print() // module-wide
index URL

Print error using System.printf()

C synopsis target-domain
Void Error_print(Error_Block *eb);
ARGUMENTS
eb — pointer to an Error_Block, Error_ABORT or Error_IGNORE
If eb is Error_ABORT or Error_IGNORE, this function simply returns with no output.
DETAILS
This function prints the error using System_printf(). The output is on a single line terminated with a new line character and has the following form:
      <site>: <file>, line <line_num>: <err_msg>
where <site> is the module that raised the error, <file> and <line_num> are the file and line number of the containing the call site of the Error_raise(), and <err_msg> is the error message rendered with the arguments associated with the error.
WARNING
This function is not protected by a gate and, as a result, if two threads call this method concurrently, the output of the two calls will be intermingled. To prevent intermingled error output, you can either wrap all calls to this method with an appropriate Gate_enter/Gate_leave pair or simply ensure that only one thread in the system ever calls this method.
Error_raise() // module-wide
index URL

Raise an error

C synopsis target-domain
macro Void Error_raise(Error_Block *eb, Error_Id id, IArg arg1, IArg arg2);
ARGUMENTS
eb — pointer to an Error_Block, Error_ABORT or Error_IGNORE
If eb is Error_ABORT or Error.policy == TERMINATE, this function does not return to the caller; after calling any configured raiseHook, System_abort is called with the string "xdc.runtime.Error.raise: terminating execution\n".
id — the error to raise
This pointer identifies the class of error being raised; the error class indicates how to interpret any subsequent arguments passed to raise.
arg1 — error's first argument
The argument interpreted by the first control character in the error message format string. It is ignored if not needed.
arg2 — error's second argument
The argument interpreted by the second control character in the error message format string. It is ignored if not needed.
DETAILS
This function is used to raise an Error by writing call site, error ID, and error argument information into the Error_Block pointed to by eb.
If Error_raise is called more than once on an Error_Block object, the previous error information is overwritten; only the last error is retained in the Error_Block object.
In all cases, any configured Error.raiseHook function is called with a non-NULL pointer to a fully initialized Error_Block object.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Error_Module_id();
// Get this module's unique id
Bool Error_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Error_Module_heap();
// The heap from which this module allocates memory
Bool Error_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Error_Module_getMask();
// Returns the diagnostics mask for this module
Void Error_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Error.xdc
var Error = xdc.useModule('xdc.runtime.Error');
module-wide constants & types
    const Error.ABORT// A special Error_Block pointer that terminates the application in case of an error = ;
    const Error.IGNORE// A pointer to a special Error_Block used when the caller does not want to check Error_Block = ;
    const Error.NUMARGS// Maximum number of arguments supported by an error = 2;
    values of type Error.Policy// Error handling policies
        const Error.TERMINATE;
        const Error.UNWIND;
    var obj = new Error.Data// Error args;
        obj.arg = IArg[Error.NUMARGS] ...
    var obj = new Error.Desc// Error descriptor;
        obj.msg = String ...
        obj.code = UInt16 ...
module-wide config parameters
     Error.E_generic// Generic error = Error.Desc {
        msg: "%$S"
    };
     Error.E_memory// Out of memory error = Error.Desc {
        msg: "out of memory: heap=0x%x, size=%u"
    };
     Error.E_msgCode// Generic error that displays a string and a numeric value = Error.Desc {
        msg: "%s 0x%x"
    };
     Error.maxDepth// Maximum number of concurrent calls to raiseHook = UInt16 16;
     Error.policy// System-wide error handling policy = Error.Policy Error.UNWIND;
     Error.policyFxn// Error handler function = Void(*)(Error.Block*,Types.ModuleId,CString,Int,Error.Id,IArg,IArg) Error.policyDefault;
     Error.raiseHook// The function to call whenever an error is raised = Void(*)(Error.Block*) Error.print;
     Error.common$// Common module configuration parameters = Types.Common$ undefined;
const Error.ABORT
index URL

A special Error_Block pointer that terminates the application in case of an error

Configuration settings
const Error.ABORT = ;
DETAILS
This constant has the same effect as passing NULL in place of an Error_Block. If an error is raised when Error_ABORT is passed, the application terminates regardless of Error_policy.
C SYNOPSIS
Error_ABORT
const Error.IGNORE
index URL

A pointer to a special Error_Block used when the caller does not want to check Error_Block

Configuration settings
const Error.IGNORE = ;
DETAILS
This constant should be used when the caller does not plan to check Error_Block after the call returns, but wants the call to return even in the case when an error is raised. Error_policy is still in effect and the application will still terminate when an error is raised if Error_policy is not set to Error_UNWIND.
C SYNOPSIS
Error_IGNORE
const Error.NUMARGS
index URL

Maximum number of arguments supported by an error

Configuration settings
const Error.NUMARGS = 2;
C SYNOPSIS
Error_NUMARGS
enum Error.Policy
index URL

Error handling policies

Configuration settings
values of type Error.Policy
    const Error.TERMINATE;
    const Error.UNWIND;
VALUES
TERMINATE — All raised errors are fatal. A call to Error_raise will never return to the caller. The program calls System_abort instead.
UNWIND — Errors are returned to the caller. A call to Error_raise will return back to the caller.
DETAILS
These constants are assigned to Error.policy to control the flow of the program when an error is raised.
C SYNOPSIS
Error_Policy
struct Error.Data
index URL

Error args

Configuration settings
var obj = new Error.Data;
    obj.arg = IArg[Error.NUMARGS] ...
DETAILS
The two arguments (arg1, arg2) passed to raise are stored in one of these arrays within the associated Error_Block. To access these arguments use getData to obtain a pointer to the Error_Block's Data array.
SEE
getData
C SYNOPSIS
Error_Data
metaonly struct Error.Desc
index URL

Error descriptor

Configuration settings
var obj = new Error.Desc;
    obj.msg = String ...
    obj.code = UInt16 ...
FIELDS
msg — The error message using a printf style format string, but limited to NUMARGS arguments. This format string together with the two arguments passed to Error_raise` are used to create a human readable error message.
code — A user assignable code, 0 by default. The user may optionally set this field during config to give the error a well-known numeric code.
DETAILS
Each type of error is defined with an error descriptor. This structure groups common information about the errors of this type.
config Error.E_generic // module-wide
index URL

Generic error

Configuration settings
Error.E_generic = Error.Desc {
    msg: "%$S"
};
DETAILS
This error takes advantage of the $S specifier to allow for recursive formatting of the error message passed to error raise.
For example, the following is possible:
  Error_raise(eb, Error_E_generic, "Error occurred, code: %d", code);
SEE
System.extendedFormats, System.printf
C SYNOPSIS
Error_E_generic
config Error.E_memory // module-wide
index URL

Out of memory error

Configuration settings
Error.E_memory = Error.Desc {
    msg: "out of memory: heap=0x%x, size=%u"
};
DETAILS
The first parameter must be the heap instance handle. The second parameter is the size of the object for which the allocation failed.
C SYNOPSIS
Error_E_memory
config Error.E_msgCode // module-wide
index URL

Generic error that displays a string and a numeric value

Configuration settings
Error.E_msgCode = Error.Desc {
    msg: "%s 0x%x"
};
C SYNOPSIS
Error_E_msgCode
config Error.maxDepth // module-wide
index URL

Maximum number of concurrent calls to raiseHook

Configuration settings
Error.maxDepth = UInt16 16;
DETAILS
To prevent errors that occur in the raiseHook function from causing an infinite recursion, the maximum number of concurrent calls to raiseHook is limited by Error_maxDepth. If the number of concurrent calls exceeds Error_maxDepth, the raiseHook function is not called.
In multi-threaded systems, errors raised by separate threads may be detected as recursive calls to raiseHook. So, setting Error.maxDepth to a small value may - in rare instances - result in errorHook not being called for some raised errors.
If it is important that all raised errors trigger a call to the raiseHook function, set Error.maxDepth to an impossibly large number (0xffff) and either ensure that the raise hook never calls a function that can raise an error or add checks in raiseHook to protect against "double faults".
C SYNOPSIS
Error_maxDepth
config Error.policy // module-wide
index URL

System-wide error handling policy

Configuration settings
Error.policy = Error.Policy Error.UNWIND;
DETAILS
You can use this parameter to decide at the configuration time what happens when an error is raised. The program can either call System_abort() or return back to the caller. The implementations of Error.policyFxn should consider this parameter, but some implementations may not do so to save the memory footprint (Error_policySpin, for example).
C SYNOPSIS
Error_policy
config Error.policyFxn // module-wide
index URL

Error handler function

Configuration settings
Error.policyFxn = Void(*)(Error.Block*,Types.ModuleId,CString,Int,Error.Id,IArg,IArg) Error.policyDefault;
DETAILS
This function is called to handle all raised errors but, unlike raiseHook, this function is responsible for completely handling the error (including calling raiseHook with an appropriately initialized Error_Block, if raiseHook functionality is required).
The default value is a function which, in addition to calling raiseHook with an initialized Error_Block structure, logs the error using this module's logger.
Alternately, policySpin, which simply loops indefinitely, can be used to minimize target footprint. Note, this function does NOT call raiseHook, and also ignores Error.policy.
The third implementation, policyMin finds a middle ground between the two implementations above in terms of memory footprint and the available error information. Only the Error_Id of the error being raised is available in the resulting Error_Block, raiseHook is not invoked, but Error.policy is observed.
C SYNOPSIS
Error_policyFxn
config Error.raiseHook // module-wide
index URL

The function to call whenever an error is raised

Configuration settings
Error.raiseHook = Void(*)(Error.Block*) Error.print;
DETAILS
If set to a non-null value, the referenced function is always called when an error is raised, even if the Error policy is TERMINATE. In rare cases, it is possible that a raised error does not trigger a call to raiseHook; see maxDepth.
Regardless of the current policy in use, raising an error by calling Error_raise will always invoke the error raise hook function assigned to the Error.raiseHook configuration parameter, if the default Error.policyFxn implementation is used.
By default, this function is set to Error_print which causes the error to be formatted and output via System_printf. Setting this configuration parameter to null indicates that no function hook should be called.
SEE
maxDepth, HookFxn, print
C SYNOPSIS
Error_raiseHook
metaonly config Error.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Error.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.Gate
index URL

Critical section support

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
Gates are used by clients to protect concurrent access to critical data structures. Critical data structures are those that must be updated by at most one thread at a time. All code that needs access to a critical data structure "enters" a gate (that's associated with the data structure) prior to accessing the data, modifies the data structure, then "leaves" the gate. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Gate.xdc
#include <xdc/runtime/Gate.h>
Functions
macro Gate_Ref | Gate_allocInstance// Allocate a gate instance from the current module's gate(Error_Block *eb);
macro Bool | Gate_canBePreempted// Check if the module level gate allows thread preemption();
macro Bool | Gate_canBlock// Check if the module level gate can block threads();
macro IArg | Gate_enterInstance// Enter a critical section protected by this gate instance(Gate_Ref gate);
macro IArg | Gate_enterModule// Enter a critical section protected by the current module's gate();
IArg | Gate_enterSystem// Enter a critical section protected by the global System gate();
macro Void | Gate_freeInstance// Free a gate instance to the current module's gatekeeper(Gate_Ref gate);
macro Void | Gate_leaveInstance// Leave a critical section protected by a gate(Gate_Ref gate, IArg key);
macro Void | Gate_leaveModule// Leave a critical section protected by the current module's gate(IArg key);
Void | Gate_leaveSystem// Leave a critical section protected by the global System gate(IArg key);
Functions common to all target modules
 | Gate_Module_getMask// Returns the diagnostics mask for this module, Gate_Module_hasMask// Test whether this module has a diagnostics mask, Gate_Module_heap// The heap from which this module allocates memory, Gate_Module_id// Get this module's unique id, Gate_Module_setMask// Set the diagnostics mask for this module, Gate_Module_startupDone// Test if this module has completed startup
Typedefs
typedef opaque | Gate_Ref// Opaque reference to an allocated gate instance;
DETAILS
Gates are used by clients to protect concurrent access to critical data structures. Critical data structures are those that must be updated by at most one thread at a time. All code that needs access to a critical data structure "enters" a gate (that's associated with the data structure) prior to accessing the data, modifies the data structure, then "leaves" the gate.
A gate is responsible for ensuring that at most one thread at a time can enter and execute "inside" the gate. There are several implementations of gates, with different system executation times and latency tradoffs. In addition, some gates must not be entered by certain thread types; e.g., a gate that is implemented via a "blocking" semaphore must not be called by an interrupt service routine (ISR).
A module can be declared "gated" by adding the @Gated attribute to the module's XDC spec file. A "gated" module is assigned a module-level gate at the configuration time, and that gate is then used to protect critical sections in the module's target code. A module-level gate is an instance of a module implementing IGateProvider interface. However, gated modules do not access their module-level gates directly. They use this module to access transparently their module-level gate.
Application code that is not a part of any module also has a module-level gate, configured through the module Main.
Each gated module can optionally create gates on an adhoc basis at runtime using the same gate module that was used to create the module level gate.
Gates that work by disabling all preemption while inside a gate can be used to protect data structures accessed by ISRs and other threads. But, if the time required to update the data structure is not a small constant, this type of gate may violate a system's real-time requirements.
Gates have two orthogonal attributes: "blocking" and "preemptible". In general, gates that are "blocking" can not be use by code that is called by ISRs and gates that are not "preemptible" should only be used to to protect data manipulated by code that has small constant execution time.
typedef Gate_Ref
index URL

Opaque reference to an allocated gate instance

C synopsis target-domain
typedef opaque Gate_Ref;
Gate_allocInstance() // module-wide
index URL

Allocate a gate instance from the current module's gate

C synopsis target-domain
macro Gate_Ref Gate_allocInstance(Error_Block *eb);
ARGUMENTS
eb — Error block pointer
If NULL, any error in creating the instance will terminate the application.
DETAILS
This method is used by modules to create gates at runtime using the same IGateProvider that was used to create the module level gate. The parameters passed to the IGateProvider are specified at configuration time via the Types.Common$.gateParams configuration parameter.
RETURNS
Non-NULL instance handle is returned if no error occurs; otherwise an error is raised in eb and NULL is returned.
SEE
IGateProvider, Error
Gate_canBePreempted() // module-wide
index URL

Check if the module level gate allows thread preemption

C synopsis target-domain
macro Bool Gate_canBePreempted();
DETAILS
This type of gate should always be used by clients that protect a data structure whose updates require more than a small constant amount of time; e.g., update of a memory allocator's free list.
RETURNS
Returns TRUE if the underlying gate does not disable thread preemption.
Gate_canBlock() // module-wide
index URL

Check if the module level gate can block threads

C synopsis target-domain
macro Bool Gate_canBlock();
DETAILS
This type of gate should never be called by clients that must never call a "blocking" RTOS operation; e.g., interrupt service routines
RETURNS
Returns TRUE if the underlying gatekeeper's gate can block
Gate_enterInstance() // module-wide
index URL

Enter a critical section protected by this gate instance

C synopsis target-domain
macro IArg Gate_enterInstance(Gate_Ref gate);
ARGUMENTS
gate — non-NULL return value from a prior call to allocInstance.
RETURNS
Returns a "key" value that must be used to leave gate via leaveInstance().
Gate_enterModule() // module-wide
index URL

Enter a critical section protected by the current module's gate

C synopsis target-domain
macro IArg Gate_enterModule();
RETURNS
Returns a "key" value that must be used to leave the current module gate via leaveModule().
SEE
leaveModule
Gate_enterSystem() // module-wide
index URL

Enter a critical section protected by the global System gate

C synopsis target-domain
IArg Gate_enterSystem();
RETURNS
Returns a "key" value that must be used to leave the System gate via leaveSystem().
SEE
leaveSystem
Gate_freeInstance() // module-wide
index URL

Free a gate instance to the current module's gatekeeper

C synopsis target-domain
macro Void Gate_freeInstance(Gate_Ref gate);
ARGUMENTS
gate — non-NULL return value from a prior call to allocInstance.
SEE
allocInstance
Gate_leaveInstance() // module-wide
index URL

Leave a critical section protected by a gate

C synopsis target-domain
macro Void Gate_leaveInstance(Gate_Ref gate, IArg key);
ARGUMENTS
gate — non-NULL return value from a prior call to allocInstance.
key — the return value of a prior call to enterInstance
SEE
enterInstance, allocInstance
Gate_leaveModule() // module-wide
index URL

Leave a critical section protected by the current module's gate

C synopsis target-domain
macro Void Gate_leaveModule(IArg key);
ARGUMENTS
key — the return value of a prior call to enterModule
SEE
enterModule
Gate_leaveSystem() // module-wide
index URL

Leave a critical section protected by the global System gate

C synopsis target-domain
Void Gate_leaveSystem(IArg key);
ARGUMENTS
key — the return value of a prior call to enterSystem
SEE
enterSystem
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Gate_Module_id();
// Get this module's unique id
Bool Gate_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Gate_Module_heap();
// The heap from which this module allocates memory
Bool Gate_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Gate_Module_getMask();
// Returns the diagnostics mask for this module
Void Gate_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Gate.xdc
var Gate = xdc.useModule('xdc.runtime.Gate');
module-wide config parameters
     Gate.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     Gate.staticAlloc// Assign a statically-allocated gate instance to a state-object field(Any stateObj, String fldName) returns Void
metaonly config Gate.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Gate.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly Gate.staticAlloc() // module-wide
index URL

Assign a statically-allocated gate instance to a state-object field

Configuration settings
Gate.staticAlloc(Any stateObj, String fldName) returns Void
ARGUMENTS
stateObj — the state object for the instance being created
fldName — a name of a field within the state object
This parameter names a field that will point to the created gate instance to be created. It is a caller's responsibility to ensure that the type of fldName is a handle to an IGateProvider instance.
DETAILS
This method is used to create a gate for static instance objects that require a gate.
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.GateNull
index URL

Empty implementation of IGateProvider

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
An instance of this IGateProvider implementation is assigned to all gated modules as a default module-wide gate. Instances of this gate implementation provide no protection for critical sections and should only be used for modules in which the data structures protected by module-level gates are never accessed by concurrent threads.
C synopsis target-domain sourced in xdc/runtime/GateNull.xdc
#include <xdc/runtime/GateNull.h>
Functions
Void | GateNull_construct// Initialize a new instance object inside the provided structure(GateNull_Struct *structP, const GateNull_Params *params);
GateNull_Handle | GateNull_create// Allocate and initialize a new instance object and return its handle(const GateNull_Params *params, Error_Block *eb);
Void | GateNull_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(GateNull_Handle *handleP);
Void | GateNull_destruct// Finalize the instance object inside the provided structure(GateNull_Struct *structP);
Void | GateNull_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(GateNull_Params *params);
Functions common to all IGateProvider modules
IArg | GateNull_enter// Enter this gate(GateNull_Handle handle);
Void | GateNull_leave// Leave this gate(GateNull_Handle handle, IArg key);
Bool | GateNull_query// Runtime test for a particular gate quality(Int qual);
Functions common to all target instances
 | GateNull_handle// Convert this instance structure pointer into an instance handle, GateNull_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, GateNull_Handle_label// The label associated with this instance object, GateNull_Handle_name// The name of this instance object, GateNull_Handle_upCast// unconditionally move one level up the inheritance hierarchy, GateNull_Object_count// The number of statically-created instance objects, GateNull_Object_first// The handle of the first dynamically-created instance object, or NULL, GateNull_Object_get// The handle of the i-th statically-created instance object (array == NULL), GateNull_Object_heap// The heap used to allocate dynamically-created instance objects, GateNull_Object_next// The handle of the next dynamically-created instance object, or NULL, GateNull_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | GateNull_Module_getMask// Returns the diagnostics mask for this module, GateNull_Module_hasMask// Test whether this module has a diagnostics mask, GateNull_Module_heap// The heap from which this module allocates memory, GateNull_Module_id// Get this module's unique id, GateNull_Module_setMask// Set the diagnostics mask for this module, GateNull_Module_startupDone// Test if this module has completed startup
Defines
#define | GateNull_Q_BLOCKING// Blocking quality (Int)1
#define | GateNull_Q_PREEMPTING// Preempting quality (Int)2
Typedefs
typedef GateNull_Object * | GateNull_Handle// Client reference to an instance object;
typedef struct | GateNull_Object// Opaque internal representation of an instance object GateNull_Object;
typedef struct | GateNull_Params// Instance config-params structure ...
typedef struct | GateNull_Struct// Opaque client structure large enough to hold an instance object GateNull_Struct;
const GateNull_Q_BLOCKING
index URL

Blocking quality

C synopsis target-domain
#define GateNull_Q_BLOCKING (Int)1
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const GateNull_Q_PREEMPTING
index URL

Preempting quality

C synopsis target-domain
#define GateNull_Q_PREEMPTING (Int)2
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
GateNull_query() // module-wide
index URL

Runtime test for a particular gate quality

C synopsis target-domain
Bool GateNull_query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId GateNull_Module_id();
// Get this module's unique id
Bool GateNull_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle GateNull_Module_heap();
// The heap from which this module allocates memory
Bool GateNull_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 GateNull_Module_getMask();
// Returns the diagnostics mask for this module
Void GateNull_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct GateNull_Object GateNull_Object;
// Opaque internal representation of an instance object
typedef GateNull_Object *GateNull_Handle;
// Client reference to an instance object
typedef struct GateNull_Struct GateNull_Struct;
// Opaque client structure large enough to hold an instance object
GateNull_Handle GateNull_handle(GateNull_Struct *structP);
// Convert this instance structure pointer into an instance handle
GateNull_Struct *GateNull_struct(GateNull_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
index URL

C synopsis target-domain
typedef struct GateNull_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
} GateNull_Params;
Void GateNull_Params_init(GateNull_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
Runtime Instance Creation
index URL

C synopsis target-domain
GateNull_Handle GateNull_create(const GateNull_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void GateNull_construct(GateNull_Struct *structP, const GateNull_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
Instance Deletion
index URL

C synopsis target-domain
Void GateNull_delete(GateNull_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void GateNull_destruct(GateNull_Struct *structP);
// Finalize the instance object inside the provided structure
GateNull_enter() // instance
index URL

Enter this gate

C synopsis target-domain
IArg GateNull_enter(GateNull_Handle handle);
ARGUMENTS
handle — handle of a previously-created GateNull instance object
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
GateNull_leave() // instance
index URL

Leave this gate

C synopsis target-domain
Void GateNull_leave(GateNull_Handle handle, IArg key);
ARGUMENTS
handle — handle of a previously-created GateNull instance object
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
Instance Convertors
index URL

C synopsis target-domain
IGateProvider_Handle GateNull_Handle_upCast(GateNull_Handle handle);
// unconditionally move one level up the inheritance hierarchy
GateNull_Handle GateNull_Handle_downCast(IGateProvider_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
index URL

C synopsis target-domain
Int GateNull_Object_count();
// The number of statically-created instance objects
GateNull_Handle GateNull_Object_get(GateNull_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
GateNull_Handle GateNull_Object_first();
// The handle of the first dynamically-created instance object, or NULL
GateNull_Handle GateNull_Object_next(GateNull_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle GateNull_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *GateNull_Handle_label(GateNull_Handle handle, Types_Label *buf);
// The label associated with this instance object
String GateNull_Handle_name(GateNull_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/GateNull.xdc
var GateNull = xdc.useModule('xdc.runtime.GateNull');
module-wide constants & types
    const GateNull.Q_BLOCKING// Blocking quality = 1;
    const GateNull.Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
     GateNull.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     GateNull.queryMeta// Configuration time test for a particular gate quality(Int qual) returns Bool
per-instance config parameters
    var params = new GateNull.Params// Instance config-params object;
per-instance creation
    var inst = GateNull.create// Create an instance-object(params);
const GateNull.Q_BLOCKING
index URL

Blocking quality

Configuration settings
const GateNull.Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
C SYNOPSIS
GateNull_Q_BLOCKING
const GateNull.Q_PREEMPTING
index URL

Preempting quality

Configuration settings
const GateNull.Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
C SYNOPSIS
GateNull_Q_PREEMPTING
metaonly config GateNull.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
GateNull.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly GateNull.queryMeta() // module-wide
index URL

Configuration time test for a particular gate quality

Configuration settings
GateNull.queryMeta(Int qual) returns Bool
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Instance Config Parameters
index URL

Configuration settings
var params = new GateNull.Params;
// Instance config-params object
Static Instance Creation
index URL

Configuration settings
var params = new GateNull.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GateNull.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.HeapMin
index URL

Growth-only based heap implementation

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
HeapMin is a minimal footprint heap implementation. This module is is designed for applications that only create module instances and generally only allocate memory at runtime, but never delete created instances or free memory explicitly. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/HeapMin.xdc
#include <xdc/runtime/HeapMin.h>
Functions
Void | HeapMin_construct// Initialize a new instance object inside the provided structure(HeapMin_Struct *structP, const HeapMin_Params *params);
HeapMin_Handle | HeapMin_create// Allocate and initialize a new instance object and return its handle(const HeapMin_Params *params, Error_Block *eb);
Void | HeapMin_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(HeapMin_Handle *handleP);
Void | HeapMin_destruct// Finalize the instance object inside the provided structure(HeapMin_Struct *structP);
Void | HeapMin_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(HeapMin_Params *params);
Functions common to all IHeap modules
Ptr | HeapMin_alloc// Allocate a block of memory from the heap(HeapMin_Handle handle, SizeT size, SizeT align, Error_Block *eb);
Void | HeapMin_free// Free a block of memory back to the heap(HeapMin_Handle handle, Ptr block, SizeT size);
Void | HeapMin_getStats// Retrieve the statistics from the heap(HeapMin_Handle handle, Memory_Stats *stats);
Bool | HeapMin_isBlocking// Can this heap block the caller(HeapMin_Handle handle);
Functions common to all target instances
 | HeapMin_handle// Convert this instance structure pointer into an instance handle, HeapMin_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, HeapMin_Handle_label// The label associated with this instance object, HeapMin_Handle_name// The name of this instance object, HeapMin_Handle_upCast// unconditionally move one level up the inheritance hierarchy, HeapMin_Object_count// The number of statically-created instance objects, HeapMin_Object_first// The handle of the first dynamically-created instance object, or NULL, HeapMin_Object_get// The handle of the i-th statically-created instance object (array == NULL), HeapMin_Object_heap// The heap used to allocate dynamically-created instance objects, HeapMin_Object_next// The handle of the next dynamically-created instance object, or NULL, HeapMin_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | HeapMin_Module_getMask// Returns the diagnostics mask for this module, HeapMin_Module_hasMask// Test whether this module has a diagnostics mask, HeapMin_Module_heap// The heap from which this module allocates memory, HeapMin_Module_id// Get this module's unique id, HeapMin_Module_setMask// Set the diagnostics mask for this module, HeapMin_Module_startupDone// Test if this module has completed startup
Typedefs
typedef HeapMin_Object * | HeapMin_Handle// Client reference to an instance object;
typedef struct | HeapMin_Object// Opaque internal representation of an instance object HeapMin_Object;
typedef struct | HeapMin_Params// Instance config-params structure ...
typedef struct | HeapMin_Struct// Opaque client structure large enough to hold an instance object HeapMin_Struct;
Constants
extern const Assert_Id | HeapMin_A_zeroSize// Assert that the size is non-zero on the create;
extern const Error_Id | HeapMin_E_freeError// Error raised if free() is called;
extern const Bool | HeapMin_freeError// Flag to control whether E_freeError is enabled;
DETAILS
HeapMin is a minimal footprint heap implementation. This module is is designed for applications that only create module instances and generally only allocate memory at runtime, but never delete created instances or free memory explicitly.
For configuration-time HeapMin.create, the heap is aligned to Memory.getMaxDefaultTypeAlignMeta() for those targets that support static alignment. For targets that do not support static alignment, the buffer alignment is undefined.
When calling create() at runtime, the client is responsible for aligning the buffer.
config HeapMin_A_zeroSize // module-wide
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Assert that the size is non-zero on the create

C synopsis target-domain
extern const Assert_Id HeapMin_A_zeroSize;
config HeapMin_E_freeError // module-wide
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Error raised if free() is called

C synopsis target-domain
extern const Error_Id HeapMin_E_freeError;
DETAILS
This error is only raised if a free() is called and freeError is true.
config HeapMin_freeError // module-wide
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Flag to control whether E_freeError is enabled

C synopsis target-domain
extern const Bool HeapMin_freeError;
DETAILS
If true, a E_freeError error occurs when trying to free a buffer.
If false, no error occurs and the free() does nothing.
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId HeapMin_Module_id();
// Get this module's unique id
Bool HeapMin_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle HeapMin_Module_heap();
// The heap from which this module allocates memory
Bool HeapMin_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 HeapMin_Module_getMask();
// Returns the diagnostics mask for this module
Void HeapMin_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
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C synopsis target-domain
typedef struct HeapMin_Object HeapMin_Object;
// Opaque internal representation of an instance object
typedef HeapMin_Object *HeapMin_Handle;
// Client reference to an instance object
typedef struct HeapMin_Struct HeapMin_Struct;
// Opaque client structure large enough to hold an instance object
HeapMin_Handle HeapMin_handle(HeapMin_Struct *structP);
// Convert this instance structure pointer into an instance handle
HeapMin_Struct *HeapMin_struct(HeapMin_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct HeapMin_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
    Ptr buf;
    // Buffer that will be managed by the heap instance
     Memory_Size size;
    // Size (in MADUs) of the heap
} HeapMin_Params;
Void HeapMin_Params_init(HeapMin_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config HeapMin_Params.buf // instance
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Buffer that will be managed by the heap instance

C synopsis target-domain
struct HeapMin_Params {
     ...
    Ptr buf;
DETAILS
When creating a heap at runtime, the user must supply the memory that the heap will manage. It is up to the caller to align the buffer as needed.
This parameter is ignored when creating heaps during configuration.
config HeapMin_Params.size // instance
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Size (in MADUs) of the heap

C synopsis target-domain
struct HeapMin_Params {
     ...
     Memory_Size size;
DETAILS
This parameter specifies the size of the heap managed by a HeapMin instance. In the static case, a buffer of length size will be created. In the dynamic case, size specifies the size of the buffer (i.e. parameter buf) that the caller provides.
This is a required parameter. It must be set by the caller. Failure to do so, will result in a build error for the static create or an A_zeroSize assert for the runtime create.
Runtime Instance Creation
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C synopsis target-domain
HeapMin_Handle HeapMin_create(const HeapMin_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void HeapMin_construct(HeapMin_Struct *structP, const HeapMin_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This heap is a growth-only heap that is intended to be used by systems that never delete objects or free memory. Objects can be created at runtime based on values determined at runtime, but objects can not be deleted.
SEE
HeapMin.Params
Instance Deletion
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C synopsis target-domain
Void HeapMin_delete(HeapMin_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void HeapMin_destruct(HeapMin_Struct *structP);
// Finalize the instance object inside the provided structure
HeapMin_alloc() // instance
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Allocate a block of memory from the heap

C synopsis target-domain
Ptr HeapMin_alloc(HeapMin_Handle handle, SizeT size, SizeT align, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created HeapMin instance object
size — size (in MADUs) of the block
align — alignment (in MADUs) of the block
eb — pointer to error block
DETAILS
This method returns a block of memory from the heap. It is called by the xdc.runtime.Memory.alloc() function.
RETURNS
Returns the address of the allocated memory.
CONSTRAINTS
The alignment must be a power of 2.
SEE
IHeap.alloc
HeapMin_free() // instance
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Free a block of memory back to the heap

C synopsis target-domain
Void HeapMin_free(HeapMin_Handle handle, Ptr block, SizeT size);
ARGUMENTS
handle — handle of a previously-created HeapMin instance object
block — non-NULL address of allocated block to free
size — size (in MADUs) of the block of memory to free
DETAILS
This method gives back a block of memory to a heap. It is called by the xdc.runtime.Memory.free() function.
This is a growth only heap. Calling the HeapMin_free function will result in a E_freeError error unless freeError is set to false.
SEE
IHeap.free
HeapMin_getStats() // instance
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Retrieve the statistics from the heap

C synopsis target-domain
Void HeapMin_getStats(HeapMin_Handle handle, Memory_Stats *stats);
ARGUMENTS
handle — handle of a previously-created HeapMin instance object
stats — non-NULL pointer to an output buffer
DETAILS
The caller passes in a pointer to a xdc.runtime.Memory.Stats structure and getStats fills in this structure.
This function is called by the xdc.runtime.Memory.getStats() function.
HeapMin_isBlocking() // instance
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Can this heap block the caller

C synopsis target-domain
Bool HeapMin_isBlocking(HeapMin_Handle handle);
ARGUMENTS
handle — handle of a previously-created HeapMin instance object
RETURNS
If the heap might block, TRUE is returned. If the heap does not block, FALSE is returned.
HeapMin always returns FALSE since it never blocks on a resource.
Instance Convertors
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C synopsis target-domain
IHeap_Handle HeapMin_Handle_upCast(HeapMin_Handle handle);
// unconditionally move one level up the inheritance hierarchy
HeapMin_Handle HeapMin_Handle_downCast(IHeap_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int HeapMin_Object_count();
// The number of statically-created instance objects
HeapMin_Handle HeapMin_Object_get(HeapMin_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
HeapMin_Handle HeapMin_Object_first();
// The handle of the first dynamically-created instance object, or NULL
HeapMin_Handle HeapMin_Object_next(HeapMin_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle HeapMin_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *HeapMin_Handle_label(HeapMin_Handle handle, Types_Label *buf);
// The label associated with this instance object
String HeapMin_Handle_name(HeapMin_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/HeapMin.xdc
var HeapMin = xdc.useModule('xdc.runtime.HeapMin');
module-wide config parameters
     HeapMin.A_zeroSize// Assert that the size is non-zero on the create = Assert.Desc {
        msg: "HeapMin_create cannot have a zero size value"
    };
     HeapMin.E_freeError// Error raised if free() is called = Error.Desc {
        msg: "free() invalid in growth-only HeapMin"
    };
     HeapMin.freeError// Flag to control whether E_freeError is enabled = Bool true;
     HeapMin.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new HeapMin.Params// Instance config-params object;
        params.align// Alignment of the buffer being managed by this heap instance = SizeT undefined;
        params.buf// Buffer that will be managed by the heap instance = Ptr 0;
        params.sectionName// Section name of the heap = String null;
        params.size// Size (in MADUs) of the heap = UArg 0;
per-instance creation
    var inst = HeapMin.create// Create an instance-object(params);
config HeapMin.A_zeroSize // module-wide
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Assert that the size is non-zero on the create

Configuration settings
HeapMin.A_zeroSize = Assert.Desc {
    msg: "HeapMin_create cannot have a zero size value"
};
C SYNOPSIS
HeapMin_A_zeroSize
config HeapMin.E_freeError // module-wide
index URL

Error raised if free() is called

Configuration settings
HeapMin.E_freeError = Error.Desc {
    msg: "free() invalid in growth-only HeapMin"
};
DETAILS
This error is only raised if a free() is called and freeError is true.
C SYNOPSIS
HeapMin_E_freeError
config HeapMin.freeError // module-wide
index URL

Flag to control whether E_freeError is enabled

Configuration settings
HeapMin.freeError = Bool true;
DETAILS
If true, a E_freeError error occurs when trying to free a buffer.
If false, no error occurs and the free() does nothing.
C SYNOPSIS
HeapMin_freeError
metaonly config HeapMin.common$ // module-wide
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Common module configuration parameters

Configuration settings
HeapMin.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
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Configuration settings
var params = new HeapMin.Params;
// Instance config-params object
    params.align = SizeT undefined;
    // Alignment of the buffer being managed by this heap instance
    params.buf = Ptr 0;
    // Buffer that will be managed by the heap instance
    params.sectionName = String null;
    // Section name of the heap
    params.size = UArg 0;
    // Size (in MADUs) of the heap
config HeapMin.Params.buf // instance
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Buffer that will be managed by the heap instance

Configuration settings
var params = new HeapMin.Params;
...
params.buf = Ptr 0;
DETAILS
When creating a heap at runtime, the user must supply the memory that the heap will manage. It is up to the caller to align the buffer as needed.
This parameter is ignored when creating heaps during configuration.
C SYNOPSIS
HeapMin_Params.buf
config HeapMin.Params.size // instance
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Size (in MADUs) of the heap

Configuration settings
var params = new HeapMin.Params;
...
params.size = UArg 0;
DETAILS
This parameter specifies the size of the heap managed by a HeapMin instance. In the static case, a buffer of length size will be created. In the dynamic case, size specifies the size of the buffer (i.e. parameter buf) that the caller provides.
This is a required parameter. It must be set by the caller. Failure to do so, will result in a build error for the static create or an A_zeroSize assert for the runtime create.
C SYNOPSIS
HeapMin_Params.size
metaonly config HeapMin.Params.align // instance
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Alignment of the buffer being managed by this heap instance

Configuration settings
var params = new HeapMin.Params;
...
params.align = SizeT undefined;
DETAILS
In the static HeapMin.create() call, the buffer allocated for the HeapMin instance will have the alignment specified by this parameter on targets that support static alignment.
In the dynamic case, the client must supply the buffer, so it is the client's responsibility to manage the buffer's alignment, and there is no 'align' parameter.
The specified align parameter must be a power of 2.
The default alignment of zero causes the buffer to get aligned using Memory.getMaxDefaultTypeAlignMeta().
metaonly config HeapMin.Params.sectionName // instance
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Section name of the heap

Configuration settings
var params = new HeapMin.Params;
...
params.sectionName = String null;
DETAILS
When creating heaps during configuration, this parameter specifies where the heap's buffer will be placed. This parameter is passed as the section name in the Memory.staticPlace function.
SEE
Memory.staticPlace
Static Instance Creation
index URL

Configuration settings
var params = new HeapMin.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = HeapMin.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This heap is a growth-only heap that is intended to be used by systems that never delete objects or free memory. Objects can be created at runtime based on values determined at runtime, but objects can not be deleted.
SEE
HeapMin.Params
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.HeapStd
index URL

Malloc/free based heap implementation

  • C synopsis
  • Individual elements
  • DETAILS
  • CONSTRAINTS
  • Configuration settings
  • Individual elements
This heap is based on the ANSI C Standard Library functions malloc() and free() and assumes that these functions are thread-safe. Please refer to the target specific documentation of the ANSI C Standard Library for details. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/HeapStd.xdc
#include <xdc/runtime/HeapStd.h>
Functions
Void | HeapStd_construct// Initialize a new instance object inside the provided structure(HeapStd_Struct *structP, const HeapStd_Params *params, Error_Block *eb);
HeapStd_Handle | HeapStd_create// Allocate and initialize a new instance object and return its handle(const HeapStd_Params *params, Error_Block *eb);
Void | HeapStd_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(HeapStd_Handle *handleP);
Void | HeapStd_destruct// Finalize the instance object inside the provided structure(HeapStd_Struct *structP);
Void | HeapStd_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(HeapStd_Params *params);
Functions common to all IHeap modules
Ptr | HeapStd_alloc// Allocates a block of memory from the heap(HeapStd_Handle handle, SizeT size, SizeT align, Error_Block *eb);
Void | HeapStd_free// Free a block of memory back to the heap(HeapStd_Handle handle, Ptr block, SizeT size);
Void | HeapStd_getStats// Retrieve the statistics from the heap(HeapStd_Handle handle, Memory_Stats *stats);
Bool | HeapStd_isBlocking// Returns whether the heap may block during an HeapStd_alloc() or HeapStd_free()(HeapStd_Handle handle);
Functions common to all target instances
 | HeapStd_handle// Convert this instance structure pointer into an instance handle, HeapStd_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, HeapStd_Handle_label// The label associated with this instance object, HeapStd_Handle_name// The name of this instance object, HeapStd_Handle_upCast// unconditionally move one level up the inheritance hierarchy, HeapStd_Object_count// The number of statically-created instance objects, HeapStd_Object_first// The handle of the first dynamically-created instance object, or NULL, HeapStd_Object_get// The handle of the i-th statically-created instance object (array == NULL), HeapStd_Object_heap// The heap used to allocate dynamically-created instance objects, HeapStd_Object_next// The handle of the next dynamically-created instance object, or NULL, HeapStd_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | HeapStd_Module_getMask// Returns the diagnostics mask for this module, HeapStd_Module_hasMask// Test whether this module has a diagnostics mask, HeapStd_Module_heap// The heap from which this module allocates memory, HeapStd_Module_id// Get this module's unique id, HeapStd_Module_setMask// Set the diagnostics mask for this module, HeapStd_Module_startupDone// Test if this module has completed startup
Defines
#define | HeapStd_HEAP_MAX// Maximum heap size of HeapStd (SizeT)~0U
Typedefs
typedef HeapStd_Object * | HeapStd_Handle// Client reference to an instance object;
typedef struct | HeapStd_Object// Opaque internal representation of an instance object HeapStd_Object;
typedef struct | HeapStd_Params// Instance config-params structure ...
typedef struct | HeapStd_Struct// Opaque client structure large enough to hold an instance object HeapStd_Struct;
Constants
extern const Assert_Id | HeapStd_A_align// Assert that the size is a power of 2;
extern const Assert_Id | HeapStd_A_invalidTotalFreeSize// Assert that remaining size is less than or equal to starting size;
extern const Assert_Id | HeapStd_A_zeroSize// Assert that the size is non-zero on the create;
extern const Error_Id | HeapStd_E_noRTSMemory// Error raised if all the RTS heap is used up;
DETAILS
This heap is based on the ANSI C Standard Library functions malloc() and free() and assumes that these functions are thread-safe. Please refer to the target specific documentation of the ANSI C Standard Library for details.
The largest free block that can be returned form malloc() cannot be determined. Therefore, the property largestFreeSize in Memory.Stats returned from getStats() always returns 0.
CONSTRAINTS
The alloc() function only supports alignment requests up to value returned from Memory.getMaxDefaultTypeAlign().
const HeapStd_HEAP_MAX
index URL

Maximum heap size of HeapStd

C synopsis target-domain
#define HeapStd_HEAP_MAX (SizeT)~0U
DETAILS
This parameter defines maximum heap size that can be allocated to a HeapStd instance. Using this parameter to create HeapStd instances will disable the internal size checks in HeapStd module.
config HeapStd_A_align // module-wide
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Assert that the size is a power of 2

C synopsis target-domain
extern const Assert_Id HeapStd_A_align;
config HeapStd_A_invalidTotalFreeSize // module-wide
index URL

Assert that remaining size is less than or equal to starting size

C synopsis target-domain
extern const Assert_Id HeapStd_A_invalidTotalFreeSize;
DETAILS
If this assertion is raised, it means that either incorrect sizes were passed to free or multiple calls to free were made with the same buffer.
config HeapStd_A_zeroSize // module-wide
index URL

Assert that the size is non-zero on the create

C synopsis target-domain
extern const Assert_Id HeapStd_A_zeroSize;
config HeapStd_E_noRTSMemory // module-wide
index URL

Error raised if all the RTS heap is used up

C synopsis target-domain
extern const Error_Id HeapStd_E_noRTSMemory;
DETAILS
The total size of all HeapStd instance allocations added together cannot exceed the malloc/free heap size determined by xdc.cfg.Program.heap.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId HeapStd_Module_id();
// Get this module's unique id
Bool HeapStd_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle HeapStd_Module_heap();
// The heap from which this module allocates memory
Bool HeapStd_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 HeapStd_Module_getMask();
// Returns the diagnostics mask for this module
Void HeapStd_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct HeapStd_Object HeapStd_Object;
// Opaque internal representation of an instance object
typedef HeapStd_Object *HeapStd_Handle;
// Client reference to an instance object
typedef struct HeapStd_Struct HeapStd_Struct;
// Opaque client structure large enough to hold an instance object
HeapStd_Handle HeapStd_handle(HeapStd_Struct *structP);
// Convert this instance structure pointer into an instance handle
HeapStd_Struct *HeapStd_struct(HeapStd_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
index URL

C synopsis target-domain
typedef struct HeapStd_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
     Memory_Size size;
    // Size (in MAUs) of the heap
} HeapStd_Params;
Void HeapStd_Params_init(HeapStd_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config HeapStd_Params.size // instance
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Size (in MAUs) of the heap

C synopsis target-domain
struct HeapStd_Params {
     ...
     Memory_Size size;
DETAILS
This parameter specifies the size of the heap managed by a HeapStd instance. HeapStd is built upon the ANSI C Standard Library functions malloc() and free().
The total size of all HeapStd instance allocations added together cannot exceed the malloc/free heap size determined by Program.heap.
This is a required parameter. It must be set by the caller. Failure to do so, will result in a build error for the static create or an assert for the runtime create.
Runtime Instance Creation
index URL

C synopsis target-domain
HeapStd_Handle HeapStd_create(const HeapStd_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void HeapStd_construct(HeapStd_Struct *structP, const HeapStd_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This heap uses the ANSI C Standard Library functions malloc() and free() to manage memory and assumes that these functions are thread-safe.
SEE
HeapStd.Params
Instance Deletion
index URL

C synopsis target-domain
Void HeapStd_delete(HeapStd_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void HeapStd_destruct(HeapStd_Struct *structP);
// Finalize the instance object inside the provided structure
HeapStd_alloc() // instance
index URL

Allocates a block of memory from the heap

C synopsis target-domain
Ptr HeapStd_alloc(HeapStd_Handle handle, SizeT size, SizeT align, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created HeapStd instance object
size — size (in MADUs) of the block
align — alignment (in MADUs) of the block
eb — pointer to error block
DETAILS
This method returns a block of memory from the heap. It is called by the xdc.runtime.Memory.alloc() function.
RETURNS
Returns the address of the allocated memory.
CONSTRAINTS
The only alignment currently supported is the default alignment returned by the underlying malloc() implementation. The align value must be less than or equal to the value returned from Memory.getMaxDefaultTypeAlign().
SEE
IHeap.alloc
HeapStd_free() // instance
index URL

Free a block of memory back to the heap

C synopsis target-domain
Void HeapStd_free(HeapStd_Handle handle, Ptr block, SizeT size);
ARGUMENTS
handle — handle of a previously-created HeapStd instance object
block — non-NULL address of allocated block to free
size — size (in MADUs) of the block of memory to free
DETAILS
This method gives back a block of memory to a heap. It is called by the xdc.runtime.Memory.free() function.
HeapStd_getStats() // instance
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Retrieve the statistics from the heap

C synopsis target-domain
Void HeapStd_getStats(HeapStd_Handle handle, Memory_Stats *stats);
ARGUMENTS
handle — handle of a previously-created HeapStd instance object
stats — non-NULL pointer to an output buffer
DETAILS
The caller passes in a pointer to a xdc.runtime.Memory.Stats structure and getStats fills in this structure.
This function is called by the xdc.runtime.Memory.getStats() function.
HeapStd_isBlocking() // instance
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Returns whether the heap may block during an HeapStd_alloc() or HeapStd_free()

C synopsis target-domain
Bool HeapStd_isBlocking(HeapStd_Handle handle);
ARGUMENTS
handle — handle of a previously-created HeapStd instance object
RETURNS
If the heap might block, TRUE is returned. If the heap does not block, FALSE is returned.
Since the implementation of the underlaying ANSI C Standard Library is not known, this function always returns the more restrictive case which is TRUE.
Instance Convertors
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C synopsis target-domain
IHeap_Handle HeapStd_Handle_upCast(HeapStd_Handle handle);
// unconditionally move one level up the inheritance hierarchy
HeapStd_Handle HeapStd_Handle_downCast(IHeap_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int HeapStd_Object_count();
// The number of statically-created instance objects
HeapStd_Handle HeapStd_Object_get(HeapStd_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
HeapStd_Handle HeapStd_Object_first();
// The handle of the first dynamically-created instance object, or NULL
HeapStd_Handle HeapStd_Object_next(HeapStd_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle HeapStd_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *HeapStd_Handle_label(HeapStd_Handle handle, Types_Label *buf);
// The label associated with this instance object
String HeapStd_Handle_name(HeapStd_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/HeapStd.xdc
var HeapStd = xdc.useModule('xdc.runtime.HeapStd');
module-wide constants & types
    const HeapStd.HEAP_MAX// Maximum heap size of HeapStd = ~0U;
module-wide config parameters
     HeapStd.A_align// Assert that the size is a power of 2 = Assert.Desc {
        msg: "HeapStd_alloc alignment must be a power of 2"
    };
     HeapStd.A_invalidTotalFreeSize// Assert that remaining size is less than or equal to starting size = Assert.Desc {
        msg: "HeapStd instance totalFreeSize is greater than starting size"
    };
     HeapStd.A_zeroSize// Assert that the size is non-zero on the create = Assert.Desc {
        msg: "HeapStd_create cannot have a zero size value"
    };
     HeapStd.E_noRTSMemory// Error raised if all the RTS heap is used up = Error.Desc {
        msg: "The RTS heap is used up. Examine Program.heap."
    };
     HeapStd.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new HeapStd.Params// Instance config-params object;
        params.size// Size (in MAUs) of the heap = UArg 0;
per-instance creation
    var inst = HeapStd.create// Create an instance-object(params);
const HeapStd.HEAP_MAX
index URL

Maximum heap size of HeapStd

Configuration settings
const HeapStd.HEAP_MAX = ~0U;
DETAILS
This parameter defines maximum heap size that can be allocated to a HeapStd instance. Using this parameter to create HeapStd instances will disable the internal size checks in HeapStd module.
C SYNOPSIS
HeapStd_HEAP_MAX
config HeapStd.A_align // module-wide
index URL

Assert that the size is a power of 2

Configuration settings
HeapStd.A_align = Assert.Desc {
    msg: "HeapStd_alloc alignment must be a power of 2"
};
C SYNOPSIS
HeapStd_A_align
config HeapStd.A_invalidTotalFreeSize // module-wide
index URL

Assert that remaining size is less than or equal to starting size

Configuration settings
HeapStd.A_invalidTotalFreeSize = Assert.Desc {
    msg: "HeapStd instance totalFreeSize is greater than starting size"
};
DETAILS
If this assertion is raised, it means that either incorrect sizes were passed to free or multiple calls to free were made with the same buffer.
C SYNOPSIS
HeapStd_A_invalidTotalFreeSize
config HeapStd.A_zeroSize // module-wide
index URL

Assert that the size is non-zero on the create

Configuration settings
HeapStd.A_zeroSize = Assert.Desc {
    msg: "HeapStd_create cannot have a zero size value"
};
C SYNOPSIS
HeapStd_A_zeroSize
config HeapStd.E_noRTSMemory // module-wide
index URL

Error raised if all the RTS heap is used up

Configuration settings
HeapStd.E_noRTSMemory = Error.Desc {
    msg: "The RTS heap is used up. Examine Program.heap."
};
DETAILS
The total size of all HeapStd instance allocations added together cannot exceed the malloc/free heap size determined by xdc.cfg.Program.heap.
C SYNOPSIS
HeapStd_E_noRTSMemory
metaonly config HeapStd.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
HeapStd.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
index URL

Configuration settings
var params = new HeapStd.Params;
// Instance config-params object
    params.size = UArg 0;
    // Size (in MAUs) of the heap
config HeapStd.Params.size // instance
index URL

Size (in MAUs) of the heap

Configuration settings
var params = new HeapStd.Params;
...
params.size = UArg 0;
DETAILS
This parameter specifies the size of the heap managed by a HeapStd instance. HeapStd is built upon the ANSI C Standard Library functions malloc() and free().
The total size of all HeapStd instance allocations added together cannot exceed the malloc/free heap size determined by Program.heap.
This is a required parameter. It must be set by the caller. Failure to do so, will result in a build error for the static create or an assert for the runtime create.
C SYNOPSIS
HeapStd_Params.size
Static Instance Creation
index URL

Configuration settings
var params = new HeapStd.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = HeapStd.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This heap uses the ANSI C Standard Library functions malloc() and free() to manage memory and assumes that these functions are thread-safe.
SEE
HeapStd.Params
generated on Sun, 25 Nov 2018 22:19:00 GMT


interface xdc.runtime.IFilterLogger
index URL

Interface for supporting filtering of Log events by detail level

  • Specification synopsis
  • Individual elements
Filtering of events based on detail level is not inherently supported by the Log APIs as is filtering of events based on the diagnostics mask. [ more ... ]
XDCspec summary sourced in xdc/runtime/IFilterLogger.xdc
interface IFilterLogger { ...
// inherits xdc.runtime.ILogger
    // inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
package xdc.runtime;
interface IFilterLogger inherits ILogger {
module-wide config parameters
    config Bool filterByLevel// Support filtering of events by event level = false;
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    metaonly function getMetaArgs// Returns any meta data needed to support RTA(inst, instNum);
instance:
per-instance functions
    Bool disable// Disable a log();
    Bool enable// Enable a log();
     Diags.Mask getFilterLevel// Returns the mask of diags categories currently set to the specified level(Diags.EventLevel level);
    Void setFilterLevel// Set the level of detail that instances will log(Diags.Mask mask, Diags.EventLevel filterLevel);
    Void write0// Process a log event with 0 arguments(Log.Event evt, Types.ModuleId mid);
    Void write1// Process a log event with 1 arguments(Log.Event evt, Types.ModuleId mid, IArg a1);
    Void write2// Process a log event with 2 arguments(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2);
    Void write4// Process a log event with up to 4 arguments(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
    Void write8// Process a log event with up to 8 arguments(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
}
DETAILS
Filtering of events based on detail level is not inherently supported by the Log APIs as is filtering of events based on the diagnostics mask.
Support for this type of filtering must be done by an ILogger implementation. Not all users are interested in this filtering support, however, so it is not required of all ILogger implementations.
ILoggers that do intend to support filtering by detail level should implement this interface, which extends the ILogger interface.
The setFilterLevel and getFilterLevel functions support runtime specification of a different filtering level for each of the diagnostics categories.
config IFilterLogger.filterByLevel // module-wide
index URL

Support filtering of events by event level

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
config Bool filterByLevel = false;
DETAILS
To improve logging performance, this feature can be disabled by setting filterByLevel to false.
See 'setFilterLevel' for an explanation of level filtering.
metaonly config IFilterLogger.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly IFilterLogger.getMetaArgs() // module-wide
index URL

Returns any meta data needed to support RTA

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
metaonly function getMetaArgs(inst, instNum);
DETAILS
This meta data should be returned in the form of a structure which can be converted into XML. This data is added to the RTA XML file during the application's configuration, and can be accessed later through the xdc.rta.MetaData module.
The MetaData is returned per instance of the ILogger module. The instance object is passed to the function as the first argument.
The second argument is the index of the instance in the list of the ILogger's static instances.
IFilterLogger.disable() // instance
index URL

Disable a log

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Bool disable();
DETAILS
Events written to a disabled log are silently discarded.
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
IFilterLogger.enable() // instance
index URL

Enable a log

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Bool enable();
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
IFilterLogger.getFilterLevel() // instance
index URL

Returns the mask of diags categories currently set to the specified level

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Diags.Mask getFilterLevel(Diags.EventLevel level);
DETAILS
See 'setFilterLevel' for an explanation of level filtering.
IFilterLogger.setFilterLevel() // instance
index URL

Set the level of detail that instances will log

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Void setFilterLevel(Diags.Mask mask, Diags.EventLevel filterLevel);
ARGUMENTS
mask — The diags categories to set the level for
filterLevel — The new filtering level for the specified categories
DETAILS
Events with the specified level or higher will be logged, events below the specified level will be dropped.
Events are filtered first by diags category, then by level. If an event's diags category is disabled in the module's diags mask, then it will be filtered out regardless of level. The event will not even be passed to the logger.
This API allows for setting the filtering level for more than one diags category at a time. The mask parameter can be a single category or multiple categories combined, and the level will be set for all of those categories.
IFilterLogger.write0() // instance
index URL

Process a log event with 0 arguments

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Void write0(Log.Event evt, Types.ModuleId mid);
DETAILS
Same as write4 except with 0 arguments rather than 4.
SEE
ILogger.write4()
IFilterLogger.write1() // instance
index URL

Process a log event with 1 arguments

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Void write1(Log.Event evt, Types.ModuleId mid, IArg a1);
DETAILS
Same as write4 except with 1 arguments rather than 4.
SEE
ILogger.write4()
IFilterLogger.write2() // instance
index URL

Process a log event with 2 arguments

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Void write2(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2);
DETAILS
Same as write4 except with 2 arguments rather than 4.
SEE
ILogger.write4()
IFilterLogger.write4() // instance
index URL

Process a log event with up to 4 arguments

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Void write4(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
ARGUMENTS
evt — event to be logged
mid — module ID of the module which logged the event
a1 — arbitrary argument passed by caller
DETAILS
The evt argument is of type Log.Event, which encodes the Log.EventId, the Diags.Mask, and the Diags.EventLevel of the event. The event ID can be obtained via Types.getEventId(evt), the Diags mask can be obtained via Diags.getMask(evt), and the event level can be obtained via Diags.getLevel(evt).
The modId argument is the module ID of the module that logged the event.
The event information can be used by the logger to handle different events specially. For example, the event ID can be used to compare against other known Log.Events.
      if (Log_getEventId(MY_EVENT) == Log_getEventId(evt)) {
          :
      }
The Diags mask and event level can be used for filtering of events based on event level (see IFilterLogger), or even routing events to separate loggers based on diags category (see, for example, LoggerBuf.statusLogger).
The Diags mask and event level are useful for handling the event, but are generally not recorded by the logger because they are not needed in decoding and displaying the event. A more suitable value to record is a Types.Event, which encodes the event ID and module ID. For example, the Log.EventRec type stores a Types.Event in its record definition. A Types.Event can be created using the Types.makeEvent API given the event ID and module ID.
The event ID value of 0 is used to indicate an event triggered by a call to one of the Log_print[0-6] methods. These methods take a format string rather than a Log_Event argument and, as a result, the event ID encoded in evt is 0 and the parameter a1 is the format string.
Non-zero event IDs can also be used to access the msg string associated with the Log.EventDesc that originally defined the Log event.
      Log_EventId id = Log_getEventId(evt));
      if (id != 0) {
          String msg = Text_ropeText(id);
          System_aprintf(msg, a1, a2, a3, a4);
      }
This works because an event's ID is simply an offset into a table of characters (maintained by the Text module) containing the event's msg string.
The arguments a1, a2, etc. are parameters that are to be interpreted according to the message format string associated with evt.
SEE
Log.Event, Log.EventDesc, Text.ropeText, Log.getEventId
IFilterLogger.write8() // instance
index URL

Process a log event with up to 8 arguments

XDCspec declarations sourced in xdc/runtime/IFilterLogger.xdc
Void write8(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
DETAILS
Same as write4 except with 8 arguments rather than 4.
SEE
ILogger.write4()
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.IGateProvider
index URL

Interface implemented by all gate providers

  • Specification synopsis
  • Individual elements
  • DETAILS
  • NOTES
Gates are used within the xdc.runtime package to serialize access to data structures that are used by more than one thread. [ more ... ]
XDCspec summary sourced in xdc/runtime/IGateProvider.xdc
interface IGateProvider { ...
// inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
package xdc.runtime;
interface IGateProvider {
module-wide constants & types
    const Int Q_BLOCKING// Blocking quality = 1;
    const Int Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Bool query// Runtime test for a particular gate quality(Int qual);
    metaonly Bool queryMeta// Configuration time test for a particular gate quality(Int qual);
instance:
per-instance creation
     create// Create an instance-object();
per-instance functions
    IArg enter// Enter this gate();
    Void leave// Leave this gate(IArg key);
}
DETAILS
Gates are used within the xdc.runtime package to serialize access to data structures that are used by more than one thread.
Gates are responsible for ensuring that only one out of multiple threads can access a data structure at a time. There are important scheduling latency and performance considerations that affect the "type" of gate used to protect each data structure. For example, the best way to protect a shared counter is to simply disable all interrupts before the update and restore the interrupt state after the update; disabling all interrupts prevents all thread switching, so the update is guaranteed to be "atomic". Although highly efficient, this method of creating atomic sections causes serious system latencies when the time required to update the data structure can't be bounded.
For example, a memory manager's list of free blocks can grow indefinitely long during periods of high fragmentation. Searching such a list with interrupts disabled would cause system latencies to also become unbounded. In this case, the best solution is to provide a gate that suspends the execution of threads that try to enter a gate that has already been entered; i.e., the gate "blocks" the thread until the thread already in the gate leaves. The time required to enter and leave the gate is greater than simply enabling and restoring interrupts, but since the time spent within the gate is relatively large, the overhead caused by entering and leaving gates will not become a significant percentage of overall system time. More importantly, threads that do not need to access the shared data structure are completely unaffected by threads that do access it.
NOTES
Modules inheriting this interface should treat all names beginning with Q_ as reserved words, i.e. the names from that namespace should not be used. This will allow future version of this interface to define new constants ("qualities") similar to Q_BLOCKING and Q_PREEMPTING without breaking any existing modules.
const IGateProvider.Q_BLOCKING
index URL

Blocking quality

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
const Int Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const IGateProvider.Q_PREEMPTING
index URL

Preempting quality

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
const Int Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
metaonly config IGateProvider.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
IGateProvider.query() // module-wide
index URL

Runtime test for a particular gate quality

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
Bool query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
metaonly IGateProvider.queryMeta() // module-wide
index URL

Configuration time test for a particular gate quality

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
metaonly Bool queryMeta(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
create();
// Create an instance-object
IGateProvider.enter() // instance
index URL

Enter this gate

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
IArg enter();
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
IGateProvider.leave() // instance
index URL

Leave this gate

XDCspec declarations sourced in xdc/runtime/IGateProvider.xdc
Void leave(IArg key);
ARGUMENTS
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.IHeap
index URL

Interface to heap functions

  • Specification synopsis
  • Individual elements
All heap implementations inherit from this interface. The implementations can have additional configuration parmeters and functions.
XDCspec summary sourced in xdc/runtime/IHeap.xdc
interface IHeap { ...
// inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/IHeap.xdc
package xdc.runtime;
interface IHeap {
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
instance:
per-instance creation
     create// Create an instance-object();
per-instance functions
    Ptr alloc// Allocates a block of memory from the heap(SizeT size, SizeT align, Error.Block *eb);
    Void free// Free a block of memory back to the heap(Ptr block, SizeT size);
    Void getStats// Retrieve the statistics from the heap(Memory.Stats *stats);
    Bool isBlocking// Returns whether the heap may block during an alloc() or free()();
}
metaonly config IHeap.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/IHeap.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/IHeap.xdc
create();
// Create an instance-object
DETAILS
See specific IHeap implementation for parameters used.
IHeap.alloc() // instance
index URL

Allocates a block of memory from the heap

XDCspec declarations sourced in xdc/runtime/IHeap.xdc
Ptr alloc(SizeT size, SizeT align, Error.Block *eb);
ARGUMENTS
size — size (in MADUs) of the block
align — alignment (in MADUs) of the block
eb — pointer to error block
DETAILS
This method returns a block of memory from the heap. It is called by the xdc.runtime.Memory.alloc() function.
RETURNS
Returns the address of the allocated memory.
IHeap.free() // instance
index URL

Free a block of memory back to the heap

XDCspec declarations sourced in xdc/runtime/IHeap.xdc
Void free(Ptr block, SizeT size);
ARGUMENTS
block — non-NULL address of allocated block to free
size — size (in MADUs) of the block of memory to free
DETAILS
This method gives back a block of memory to a heap. It is called by the xdc.runtime.Memory.free() function.
IHeap.getStats() // instance
index URL

Retrieve the statistics from the heap

XDCspec declarations sourced in xdc/runtime/IHeap.xdc
Void getStats(Memory.Stats *stats);
ARGUMENTS
stats — non-NULL pointer to an output buffer
DETAILS
The caller passes in a pointer to a xdc.runtime.Memory.Stats structure and getStats fills in this structure.
This function is called by the xdc.runtime.Memory.getStats() function.
IHeap.isBlocking() // instance
index URL

Returns whether the heap may block during an alloc() or free()

XDCspec declarations sourced in xdc/runtime/IHeap.xdc
Bool isBlocking();
RETURNS
If the heap might block, TRUE is returned. If the heap does not block, FALSE is returned.
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.IInstance
index URL

Common instance params

  • Specification synopsis
  • Individual elements
Every module's instance parameter structure contains a pointer to an IInstance.Params structure named instance. So, every instance parameter defined in this interface may optionally be set when creating (or constructing) any module's instances.
XDCspec summary sourced in xdc/runtime/IInstance.xdc
interface IInstance { ...
instance: ...
XDCspec declarations sourced in xdc/runtime/IInstance.xdc
package xdc.runtime;
interface IInstance {
instance:
per-instance config parameters
    config CString name// Name of the instance = null;
}
config IInstance.Params.name // instance
index URL

Name of the instance

XDCspec declarations sourced in xdc/runtime/IInstance.xdc
config CString name = null;
DETAILS
It is possible to "bind" a name to each instance of any module at the time the instance is created (or constructed).
      ModA_Params params;
      ModA_Params_init(&params);
      params.instance->name = "myInstance";
      ModA_create(&params, NULL);
The name field must be assigned a pointer to a buffer that persists as long as the instance that it names exists. Only a reference to the name is retained in the instance, the name is not copied to a secondary buffer.
The configuration parameters that controls if instance names are supported is common$.namedInstance. The parameter is a member of the structure common$, available in each module. By default, this parameter is set to false, which disables support for instance names. Therefore, to enable instance names for a given module Mod, configure the module as follows in your configuration script:
      var Mod = xdc.useModule('pkg.Mod');
      ModA.common$.namedInstance = true;
Here is how the static instances are given names at the configuration time:
      var inst = Mod.create();
      inst.instance.name = "myInstance";
If instance names are enabled and used for statically created instances, the config parameter Text.isLoaded must be set to true to have these names available at runtime.
At runtime, assign your instance a name:
      #include <package/name/Mod.h>
      Mod_Params params;
      Mod_Params_init(&params);
      params.instance->name = "myInstance";
      Mod_create(&params, NULL);
If instances have been configured to not support names, it is still possible to assign to the instance.name field of the parameter structure (as shown above). However, the pointer is not retained and methods that normally return an instance's name will return NULL instead.
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.ILogger
index URL

Interface to service Log events

  • Specification synopsis
  • Individual elements
A logger is responsible for recording, transmitting, or otherwise handling Log Events generated by clients of the Log module. The Log module uses modules that implement the ILogger interface to record the log events. Most application code will use the Log module instead of directly calling the specific ILogger module implementation. [ more ... ]
XDCspec summary sourced in xdc/runtime/ILogger.xdc
interface ILogger { ...
// inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/ILogger.xdc
package xdc.runtime;
interface ILogger {
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    metaonly function getMetaArgs// Returns any meta data needed to support RTA(inst, instNum);
instance:
per-instance functions
    Bool disable// Disable a log();
    Bool enable// Enable a log();
    Void write0// Process a log event with 0 arguments(Log.Event evt, Types.ModuleId mid);
    Void write1// Process a log event with 1 arguments(Log.Event evt, Types.ModuleId mid, IArg a1);
    Void write2// Process a log event with 2 arguments(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2);
    Void write4// Process a log event with up to 4 arguments(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
    Void write8// Process a log event with up to 8 arguments(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
}
DETAILS
A logger is responsible for recording, transmitting, or otherwise handling Log Events generated by clients of the Log module. The Log module uses modules that implement the ILogger interface to record the log events. Most application code will use the Log module instead of directly calling the specific ILogger module implementation.
All logger implementations must inherit from this interface. The derived implementations must implement the functions defined in this interface but may also add additional configuration parameters and functions.
Events may be defined with a detail level, but the Log interface does not inherently provide support for filtering of events based on detail level. Instead, this is left to the ILogger implementation. ILogger implementations which wish to support filtering based on detail level should implement the IFilterLogger interface, which extends the ILogger interface to include APIs for getting and setting the current filter level.
metaonly config ILogger.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly ILogger.getMetaArgs() // module-wide
index URL

Returns any meta data needed to support RTA

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
metaonly function getMetaArgs(inst, instNum);
DETAILS
This meta data should be returned in the form of a structure which can be converted into XML. This data is added to the RTA XML file during the application's configuration, and can be accessed later through the xdc.rta.MetaData module.
The MetaData is returned per instance of the ILogger module. The instance object is passed to the function as the first argument.
The second argument is the index of the instance in the list of the ILogger's static instances.
ILogger.disable() // instance
index URL

Disable a log

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
Bool disable();
DETAILS
Events written to a disabled log are silently discarded.
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
ILogger.enable() // instance
index URL

Enable a log

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
Bool enable();
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
ILogger.write0() // instance
index URL

Process a log event with 0 arguments

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
Void write0(Log.Event evt, Types.ModuleId mid);
DETAILS
Same as write4 except with 0 arguments rather than 4.
SEE
ILogger.write4()
ILogger.write1() // instance
index URL

Process a log event with 1 arguments

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
Void write1(Log.Event evt, Types.ModuleId mid, IArg a1);
DETAILS
Same as write4 except with 1 arguments rather than 4.
SEE
ILogger.write4()
ILogger.write2() // instance
index URL

Process a log event with 2 arguments

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
Void write2(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2);
DETAILS
Same as write4 except with 2 arguments rather than 4.
SEE
ILogger.write4()
ILogger.write4() // instance
index URL

Process a log event with up to 4 arguments

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
Void write4(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
ARGUMENTS
evt — event to be logged
mid — module ID of the module which logged the event
a1 — arbitrary argument passed by caller
DETAILS
The evt argument is of type Log.Event, which encodes the Log.EventId, the Diags.Mask, and the Diags.EventLevel of the event. The event ID can be obtained via Types.getEventId(evt), the Diags mask can be obtained via Diags.getMask(evt), and the event level can be obtained via Diags.getLevel(evt).
The modId argument is the module ID of the module that logged the event.
The event information can be used by the logger to handle different events specially. For example, the event ID can be used to compare against other known Log.Events.
      if (Log_getEventId(MY_EVENT) == Log_getEventId(evt)) {
          :
      }
The Diags mask and event level can be used for filtering of events based on event level (see IFilterLogger), or even routing events to separate loggers based on diags category (see, for example, LoggerBuf.statusLogger).
The Diags mask and event level are useful for handling the event, but are generally not recorded by the logger because they are not needed in decoding and displaying the event. A more suitable value to record is a Types.Event, which encodes the event ID and module ID. For example, the Log.EventRec type stores a Types.Event in its record definition. A Types.Event can be created using the Types.makeEvent API given the event ID and module ID.
The event ID value of 0 is used to indicate an event triggered by a call to one of the Log_print[0-6] methods. These methods take a format string rather than a Log_Event argument and, as a result, the event ID encoded in evt is 0 and the parameter a1 is the format string.
Non-zero event IDs can also be used to access the msg string associated with the Log.EventDesc that originally defined the Log event.
      Log_EventId id = Log_getEventId(evt));
      if (id != 0) {
          String msg = Text_ropeText(id);
          System_aprintf(msg, a1, a2, a3, a4);
      }
This works because an event's ID is simply an offset into a table of characters (maintained by the Text module) containing the event's msg string.
The arguments a1, a2, etc. are parameters that are to be interpreted according to the message format string associated with evt.
SEE
Log.Event, Log.EventDesc, Text.ropeText, Log.getEventId
ILogger.write8() // instance
index URL

Process a log event with up to 8 arguments

XDCspec declarations sourced in xdc/runtime/ILogger.xdc
Void write8(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
DETAILS
Same as write4 except with 8 arguments rather than 4.
SEE
ILogger.write4()
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.IModule
index URL

Base interface for all modules

  • DETAILS
  • INTERNAL
  • EXTERNAL
All modules share a common set of configuration parameters and methods. [ more ... ]
XDCspec summary sourced in xdc/runtime/IModule.xdc
interface IModule { ...
XDCspec declarations sourced in xdc/runtime/IModule.xdc
package xdc.runtime;
interface IModule {
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
}
DETAILS
All modules share a common set of configuration parameters and methods.
INTERNAL
This section provides a terse summary of the methods provided by every module for use within the module's implementation. Each method's prototype is shown along with a brief summary of its behavior. These methods are declared in the module's internal header which should always be included in any file referencing these functions. For a module named Mod the following statement includes this header.
      #include "package/internal/Mod.xdc.h"
In the prototypes below, Mod refers to the module being implemented, embeddedObj is the name of field in the module's state structure that is either an embedded object field or an array of such objects, and fld is the name of a field declared in the module's state structure.
  // enter the module's gate
  IArg Mod_Module_enter(Gate_Handle gate);

  // leave the module's gate
  Mod_Module_leave(Gate_Handle, IArg);

  // return a pointer to the embeddedObj field
  Ptr Mod_Module_State_embeddedObj();

  // the value of the fld field of the module's state structure
  Mod_module->fld;    // fld is declared in module's .xdc file
EXTERNAL
This section provides a terse summary of the methods provided by every module for use by an application or other modules. Each method's prototype is shown along with a brief summary of its behavior. These methods are declared in the module's header which should always be included in any file referencing these functions. For a module named Mod in the package named a.b.c, the following statement includes this header.
      #include <a/b/c/Mod.h>
In the prototypes below, IMod referes to some interface, Mod refers to a module that (optionally) inherits from IMod, and pkgName is the name of the package containing the interface IMod.
  // methods to operate on modules

      // return heap associated with this module
      IHeap_Handle Mod_Module_heap();

      // get Mod's module ID
      Types_ModuleId Mod_Module_id();

      // return TRUE if Mod's startup is complete
      Bool Mod_Module_startupDone();

      // type-safe conversion from an interface to an inheriting module
      // Returns NULL if the conversion is not valid
      Mod_Handle Mod_Handle_downCast(IMod_Handle handle);

      // type-safe conversion from a module to an interface it inherits from
      // Returns NULL if the conversion is not valid
      IMod_Handle Mod_Handle_upCast(Mod_Module_Handle handle);

  // methods to access the instances managed by Mod

      // return heap used to create instances
      IHeap_Handle Mod_Object_heap();

      // return count of static instances
      Int Mod_Object_count();

      // get the i'th instance object of an array of instance objects
      //
      // If the array reference is NULL, get the i'th statically created
      // instance object.
      Mod_Object *Mod_Object_get(Mod_Object *array, Int i);

      // get the first "live" runtime instance
      Mod_Object *Mod_Object_first();

      // get the next "live" runtime instance
      Mod_Object *Mod_Object_next(Mod_Object *obj);

  // methods that operate on instance handles

      // fill in buf structure with instance's label info, returns buf
      Types_Label *Mod_Handle_label(Mod_Handle inst, Types_Label *buf);

      // returns name of the instance inst, if it has one (otherwise NULL)
      String Mod_Handle_name(Mod_Handle inst);

      // type-safe conversion of module handle to interface handle
      // Returns NULL if the conversion is not valid
      IMod_Handle Mod_Handle_to_pkgName_IMod(Mod_Handle inst);

      // type-safe conversion of interface handle to module handle
      // Returns NULL if the conversion is not valid
      Mod_Handle Mod_Handle_from_pkgName_IMod(IMod_Handle inst);

      // get the module that created the handle
      Mod_Module Mod_Handle_to_Module(Mod_Handle inst);
metaonly config IModule.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/IModule.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.ISystemSupport
index URL

Interface to core system functions

Each embedded system requires implementations of these functions but the behavior of these functions varies depending on the context of the embedded system. For example, some systems will implement exit() as an infinite loop because the executable is designed to *never* exit.
XDCspec summary sourced in xdc/runtime/ISystemSupport.xdc
interface ISystemSupport { ...
// inherits xdc.runtime.IModule
XDCspec declarations sourced in xdc/runtime/ISystemSupport.xdc
package xdc.runtime;
interface ISystemSupport {
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Void abort// Backend for System.abort()(CString str);
    Void exit// Backend for System.exit()(Int stat);
    Void flush// Backend for System.flush()();
    Void putch// Backend for System.printf() and System.putch()(Char ch);
    Bool ready// Test if character output can proceed();
}
metaonly config ISystemSupport.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/ISystemSupport.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
ISystemSupport.abort() // module-wide
index URL

Backend for System.abort()

XDCspec declarations sourced in xdc/runtime/ISystemSupport.xdc
Void abort(CString str);
ARGUMENTS
str — message to output just prior to aborting
If non-NULL, this string should be output just prior to terminating.
DETAILS
This function is called by System.abort() prior to calling the ANSI C Standard library function abort(). So, to ensure the abort processing of the system's ANSI C Standard library completes, this function should return to its caller.
ISystemSupport.exit() // module-wide
index URL

Backend for System.exit()

XDCspec declarations sourced in xdc/runtime/ISystemSupport.xdc
Void exit(Int stat);
ARGUMENTS
stat — status value passed to all "atexit" handlers
This value is passed to all "atexit" handles bound via System.atexit().
DETAILS
This function is called as part the normal "atexit" processing performed by the ANSI C Standard Library's exit() function; System.exit() directly calls ANSI exit().
This function is called after all "atexit" handlers bound via System.atexit() are run and it is always called while "inside" the the System gate.
To ensure that all exit processing of the system's ANSI C Standard Library completes, this function should return to its caller. Exit handlers bound using the ANSI C Standard Library atexit() function may run before or after this function.
SEE
System.atexit
ISystemSupport.flush() // module-wide
index URL

Backend for System.flush()

XDCspec declarations sourced in xdc/runtime/ISystemSupport.xdc
Void flush();
DETAILS
This function is simply called by System_flush to output any characters buffered by the underlying SystemSupport module to an output device.
ISystemSupport.putch() // module-wide
index URL

Backend for System.printf() and System.putch()

XDCspec declarations sourced in xdc/runtime/ISystemSupport.xdc
Void putch(Char ch);
ARGUMENTS
ch — character to output
DETAILS
Output a single character. This function is called by System_printf() to write each character of formated output specified by its arguments.
ISystemSupport.ready() // module-wide
index URL

Test if character output can proceed

XDCspec declarations sourced in xdc/runtime/ISystemSupport.xdc
Bool ready();
DETAILS
This function is called by System prior to performing any character output. If this function returns FALSE, the System functions that would normally call putch() simply return (with an appropriate error status) without ever calling putch.
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.ITimestampClient
index URL

Timestamp Client Interface

This interface defines the methods used by client applications to get timestamp values. It is implemented by the Timestamp module.
XDCspec summary sourced in xdc/runtime/ITimestampClient.xdc
interface ITimestampClient { ...
// inherits xdc.runtime.IModule
XDCspec declarations sourced in xdc/runtime/ITimestampClient.xdc
package xdc.runtime;
interface ITimestampClient {
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Bits32 get32// Return a 32-bit timestamp();
    Void get64// Return a 64-bit timestamp(Types.Timestamp64 *result);
    Void getFreq// Get the timestamp timer's frequency (in Hz)(Types.FreqHz *freq);
}
metaonly config ITimestampClient.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/ITimestampClient.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
ITimestampClient.get32() // module-wide
index URL

Return a 32-bit timestamp

XDCspec declarations sourced in xdc/runtime/ITimestampClient.xdc
Bits32 get32();
RETURNS
Returns a 32-bit timestamp value. Use getFreq to convert this value into units of real time.
SEE
get64
ITimestampClient.get64() // module-wide
index URL

Return a 64-bit timestamp

XDCspec declarations sourced in xdc/runtime/ITimestampClient.xdc
Void get64(Types.Timestamp64 *result);
ARGUMENTS
result — pointer to 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide timestamp value where the current timestamp is written.
If the underlying hardware does not support 64-bit resolution, the hi field of result is always set to 0; see xdc.runtime.Types.Timestamp64. So, it is possible for the lo field to wrap around without any change to the hi field. Use getFreq to convert this value into units of real time.
SEE
get32
ITimestampClient.getFreq() // module-wide
index URL

Get the timestamp timer's frequency (in Hz)

XDCspec declarations sourced in xdc/runtime/ITimestampClient.xdc
Void getFreq(Types.FreqHz *freq);
ARGUMENTS
freq — pointer to a 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide frequency value where the timer's frequency (in Hz) is written; see xdc.runtime.Types.FreqHz. This function provides a way of converting timestamp values into units of real time.
SEE
get32, get64
generated on Sun, 25 Nov 2018 22:18:59 GMT


interface xdc.runtime.ITimestampProvider
index URL

Timestamp provider interface

This interface is implemented by platform-specific modules that "provide" underlying timestamp services for the xdc.runtime.Timestamp module. [ more ... ]
XDCspec summary sourced in xdc/runtime/ITimestampProvider.xdc
interface ITimestampProvider { ...
// inherits xdc.runtime.ITimestampClient
    // inherits xdc.runtime.IModule
XDCspec declarations sourced in xdc/runtime/ITimestampProvider.xdc
package xdc.runtime;
interface ITimestampProvider inherits ITimestampClient {
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Bits32 get32// Return a 32-bit timestamp();
    Void get64// Return a 64-bit timestamp(Types.Timestamp64 *result);
    Void getFreq// Get the timestamp timer's frequency (in Hz)(Types.FreqHz *freq);
}
DETAILS
This interface is implemented by platform-specific modules that "provide" underlying timestamp services for the xdc.runtime.Timestamp module.
Only the xdc.runtime.Timestamp module and the xdc.runtime.ITimestampClient interface should be directly referenced by platform-independent applications.
This interface is part of a design pattern that includes the ITimestampClient interface and the Timestamp module. This pattern allows client code to:
  • use the platform-independent interfaces provided by either ITimestampClient and Timestamp and remain 100% portable
  • optionally leverage platform-specific capabilities of any module that implements ITimestampProvider and still always have access to the platform-independent methods specified by ITimestampClient (because ITimestampProvider inherits from ITimestampClient)
This pattern is in contrast to other "provider" interfaces that exist only to specify the methods necessary to enable "higher-level" modules; client code *never* accesses these provider interfaces directly, clients always only use the higher-level modules.
metaonly config ITimestampProvider.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/ITimestampProvider.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
ITimestampProvider.get32() // module-wide
index URL

Return a 32-bit timestamp

XDCspec declarations sourced in xdc/runtime/ITimestampProvider.xdc
Bits32 get32();
RETURNS
Returns a 32-bit timestamp value. Use getFreq to convert this value into units of real time.
SEE
get64
ITimestampProvider.get64() // module-wide
index URL

Return a 64-bit timestamp

XDCspec declarations sourced in xdc/runtime/ITimestampProvider.xdc
Void get64(Types.Timestamp64 *result);
ARGUMENTS
result — pointer to 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide timestamp value where the current timestamp is written.
If the underlying hardware does not support 64-bit resolution, the hi field of result is always set to 0; see xdc.runtime.Types.Timestamp64. So, it is possible for the lo field to wrap around without any change to the hi field. Use getFreq to convert this value into units of real time.
SEE
get32
ITimestampProvider.getFreq() // module-wide
index URL

Get the timestamp timer's frequency (in Hz)

XDCspec declarations sourced in xdc/runtime/ITimestampProvider.xdc
Void getFreq(Types.FreqHz *freq);
ARGUMENTS
freq — pointer to a 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide frequency value where the timer's frequency (in Hz) is written; see xdc.runtime.Types.FreqHz. This function provides a way of converting timestamp values into units of real time.
SEE
get32, get64
generated on Sun, 25 Nov 2018 22:18:59 GMT


module xdc.runtime.Log
index URL

Event logging manager

  • C synopsis
  • Individual elements
  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
RTSC modules and the application code generate Log_Event events by calling the Log module's functions. The Log module then passes those events to an ILogger instance assigned to the event originating module, specified by that module's configuration parameter common$.logger. ILogger instances handle events, usually converting events to Log_EventRec records prior to recording, transmitting, or displaying them. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Log.xdc
#include <xdc/runtime/Log.h>
Functions
Void | Log_doPrint// Render an event as text via System_printf(Log_EventRec *evRec);
macro Void | Log_error0// Generate a Log "error event" with 0 arguments(CString fmt);
macro Void | Log_error1// Generate a Log "error event" with 1 argument(CString fmt, IArg a1);
macro Void | Log_error2// Generate a Log "error event" with 2 arguments(CString fmt, IArg a1, IArg a2);
macro Void | Log_error3// Generate a Log "error event" with 3 arguments(CString fmt, IArg a1, IArg a2, IArg a3);
macro Void | Log_error4// Generate a Log "error event" with 4 arguments(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
macro Void | Log_error5// Generate a Log "error event" with 5 arguments(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
macro Log_EventId | Log_getEventId// Get event ID of the specified (encoded) event(Log_Event evt);
macro Diags_Mask | Log_getMask// Get the Diags mask for the specified (encoded) event(Log_Event evt);
macro Void | Log_info0// Generate a Log "info event" with 0 arguments(CString fmt);
macro Void | Log_info1// Generate a Log "info event" with 1 argument(CString fmt, IArg a1);
macro Void | Log_info2// Generate a Log "info event" with 2 arguments(CString fmt, IArg a1, IArg a2);
macro Void | Log_info3// Generate a Log "info event" with 3 arguments(CString fmt, IArg a1, IArg a2, IArg a3);
macro Void | Log_info4// Generate a Log "info event" with 4 arguments(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
macro Void | Log_info5// Generate a Log "info event" with 5 arguments(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
macro Void | Log_print0// Generate a Log "print event" with 0 arguments(Diags_Mask mask, CString fmt);
macro Void | Log_print1// Generate a Log "print event" with 1 argument(Diags_Mask mask, CString fmt, IArg a1);
macro Void | Log_print2// Generate a Log "print event" with 2 arguments(Diags_Mask mask, CString fmt, IArg a1, IArg a2);
macro Void | Log_print3// Generate a Log "print event" with 3 arguments(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3);
macro Void | Log_print4// Generate a Log "print event" with 4 arguments(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
macro Void | Log_print5// Generate a Log "print event" with 5 arguments(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
macro Void | Log_print6// Generate a Log "print event" with 6 arguments(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6);
macro Void | Log_put0// Unconditionally put the specified Log event with 0 arguments(Log_Event evt, Types_ModuleId mid);
macro Void | Log_put1// Unconditionally put the specified Log event and 1 argument(Log_Event evt, Types_ModuleId mid, IArg a1);
macro Void | Log_put2// Unconditionally put the specified Log event and 2 arguments(Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
macro Void | Log_put4// Unconditionally put the specified Log event and 4 arguments(Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
macro Void | Log_put8// Unconditionally put the specified Log event and 8 arguments(Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
macro Void | Log_warning0// Generate a Log "warning event" with 0 arguments(CString fmt);
macro Void | Log_warning1// Generate a Log "warning event" with 1 argument(CString fmt, IArg a1);
macro Void | Log_warning2// Generate a Log "warning event" with 2 arguments(CString fmt, IArg a1, IArg a2);
macro Void | Log_warning3// Generate a Log "warning event" with 3 arguments(CString fmt, IArg a1, IArg a2, IArg a3);
macro Void | Log_warning4// Generate a Log "warning event" with 4 arguments(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
macro Void | Log_warning5// Generate a Log "warning event" with 5 arguments(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
macro Void | Log_write0// Generate a Log event with 0 arguments(Log_Event evt);
macro Void | Log_write1// Generate a Log event with 1 argument(Log_Event evt, IArg a1);
macro Void | Log_write2// Generate a Log event with 2 arguments(Log_Event evt, IArg a1, IArg a2);
macro Void | Log_write3// Generate a Log event with 3 arguments(Log_Event evt, IArg a1, IArg a2, IArg a3);
macro Void | Log_write4// Generate a Log event with 4 arguments(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4);
macro Void | Log_write5// Generate a Log event with 5 arguments(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
macro Void | Log_write6// Generate a Log event with 6 arguments(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6);
macro Void | Log_write7// Generate a Log event with 7 arguments(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7);
macro Void | Log_write8// Generate a Log event with 8 arguments(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
Functions common to all target modules
 | Log_Module_getMask// Returns the diagnostics mask for this module, Log_Module_hasMask// Test whether this module has a diagnostics mask, Log_Module_heap// The heap from which this module allocates memory, Log_Module_id// Get this module's unique id, Log_Module_setMask// Set the diagnostics mask for this module, Log_Module_startupDone// Test if this module has completed startup
Defines
#define | Log_NUMARGS// Maximum number of arguments supported in Log events (Int)8
#define | Log_PRINTFID// The EventId for Log_print() events (Log_EventId)0
Typedefs
typedef opaque | Log_Event// Log event type;
typedef Types_RopeId | Log_EventId// Unique ID embedded in each Event;
typedef struct | Log_EventRec// The target representation of a recorded event ...
Constants
extern const Log_Event | Log_L_construct// Lifecycle event posted when an instance is constructed;
extern const Log_Event | Log_L_create// Lifecycle event posted when an instance is created;
extern const Log_Event | Log_L_delete// Lifecycle event posted when an instance is deleted;
extern const Log_Event | Log_L_destruct// Lifecycle event posted when an instance is destructed;
extern const Log_Event | Log_L_error// Error event posted by Log_errorX API;
extern const Log_Event | Log_L_info// Info event posted by Log_infoX API;
extern const Log_Event | Log_L_warning// Warning event posted by Log_warningX API;
DETAILS
RTSC modules and the application code generate Log_Event events by calling the Log module's functions. The Log module then passes those events to an ILogger instance assigned to the event originating module, specified by that module's configuration parameter common$.logger. ILogger instances handle events, usually converting events to Log_EventRec records prior to recording, transmitting, or displaying them.
All events generated by a target module are stored and displayed by an ILogger, examples of which are instances of xdc.runtime.LoggerBuf or xdc.runtime.LoggerSys. At runtime, modules generate events through this module, rather than invoking directly their ILoggers. By doing so, modules can be configured to use different ILogger implementations without any changes to their source code.
A logger instance can accept Log events from any module, but a module can put Log events to only one logger instance. There can be one or more logger instances in a system. All Log calls that are not in a module are controlled by the module xdc.runtime.Main. For example, top-level application code or any existing sources that simply call the Log or Assert methods implicitly use the logger associated with the Main module.
The generation of a Log event is controlled by a module's diagnostics mask, which is described in details in Diags. Each Log event is associated with a mask. Log events are generated only when a particular bit is set in both the Log event mask and the module's diagnostics mask. For example, a Log event mask with the USER1 bit set is generated only when the USER1 bit is also set in the module's diagnostics mask.
There are two ways to generate Log events:
  • Log_write(), which is tailored for module writers and takes full advantage of the XDC configuration model. For example, the message string associated with the Log event need not be a part of the final application, significantly reducing the "footprint overhead" of embedding diagnostics in deployed systems. The Log_write[0-8]() functions allow up to 8 values to be passed to the logger. They expect the logger to handle any formatting. A Log event type allows you to specify the type of event.
  • Log_print(), which is designed for arbitrary C code. The Log_print[0-6]() functions allow up to 6 values to be passed along with a printf-like format string to the logger. They handle printf-style formatting.
Both functions are controlled by the module's diagnostics mask. Their storage or output is defined by the logger that is assigned to the module that calls the Log methods or to the xdc.runtime.Main module if the caller is not part of a module.
The Log function call sites are implemented in such a way that an optimizer can completely eliminate Log code from the program if the Log functions have been permanently disabled at configuration time. If the Log functions are permanently turned on at configuration time, then the optimizer can eliminate all runtime conditional checking and simply invoke the Log functions directly. Runtime checking is performed only when the Log functions are configured to be runtime modifiable.
The Log calls can also be completely removed by defining the symbol xdc_runtime_Log_DISABLE_ALL. This can be done on the compile line, e.g. -Dxdc_runtime_Log_DISABLE_ALL. This will completely remove the Log statements from any code compiled with this flag, regardless of the application's logging configuration or your compiler's optimization settings.
It is also possible to remove all logging except for Log_error, Log_warning, or Log_info statements. This is done by first defining xdc_runtime_Log_DISABLE_ALL, followed by defining one or more of the symbols below to leave that type of logging enabled:
  • xdc_runtime_Log_ENABLE_ERROR
  • xdc_runtime_Log_ENABLE_WARNING
  • xdc_runtime_Log_ENABLE_INFO
For example, to disable all Log statements except for Log_error, add the following to the compile line:
      -Dxdc_runtime_Log_DISABLE_ALL -Dxdc_runtime_Log_ENABLE_ERROR
EXAMPLES
Example 1: The following example defines a Log event, uses that Log event in a module, and configures the program to generate the Log event. In this example, both USER1 and USER2 bits are set in the event mask. This means that if either bit is set in the module's diagnostics mask, then the Log event will be generated.
This is a part of the XDC specification file for the Mod module (Mod.xdc):
  import xdc.runtime.Diags;
  import xdc.runtime.Log;

  config Log.Event L_someEvent = {
      mask: Diags.USER1 | Diags.USER2,
      level: Diags.LEVEL1,
      msg: "my log event message, arg1: 0x%x, arg2: 0x%x"
  };
This is a part of the C code implementation of the Mod module:
  #include <xdc/runtime/Log.h>
  UInt x, y;

  Log_write2(Mod_L_someEvent, (IArg)x, (IArg)y);
The following configuration script demonstrates how the application might control the Log statements embedded in the Mod module at configuration time. In this case, the configuration script arranges for the Log statements within the Mod module (shown above) to always generate events. Without these configuration statements, no Log events would be generated by this module.
This is part of the XDC configuration file for the application:
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
  var Mod = xdc.useModule('my.pkg.Mod');
  Mod.common$.diags_USER1 = Diags.ALWAYS_ON;
  Mod.common$.logger = LoggerSys.create();
Example 2: The following XDC configuration statements turn on enter and exit logging at configuration time for a module. Without any other changes in the runtime code, every time a module Mod's function is being called or exits, an event will be logged.
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var Mod = xdc.useModule('my.pkg.Mod');

  Mod.common$.diags_ENTER = Diags.ALWAYS_ON;
  Mod.common$.diags_EXIT = Diags.ALWAYS_ON;
Example 3: The following example configures a module to support enter and exit logging, but defers the actual activation and deactivation of the logging until runtime. See the Diags_setMask() function for details on specifying the control string.
This is a part of the XDC configuration file for the application:
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var Mod = xdc.useModule('my.pkg.Mod');

  Mod.common$.diags_ENTER = Diags.RUNTIME_OFF;
  Mod.common$.diags_EXIT = Diags.RUNTIME_OFF;
This is a part of the C code for the application:
  // turn on enter and exit logging in the module
  Diags_setMask("my.pkg.Mod+EX");

  // turn off enter and exit logging in the module
  Diags_setMask("my.pkg.Mod-EX");
const Log_NUMARGS
index URL

Maximum number of arguments supported in Log events

C synopsis target-domain
#define Log_NUMARGS (Int)8
const Log_PRINTFID
index URL

The EventId for Log_print() events

C synopsis target-domain
#define Log_PRINTFID (Log_EventId)0
typedef Log_Event
index URL

Log event type

C synopsis target-domain
typedef opaque Log_Event;
DETAILS
An Event is represented on the target as a 32-bit value that can be decoded offline to recover the Event information defined in a corresponding metaonly EventDesc. In addition, Events may be decoded at runtime via methods provided in this module; see getMask and getEventId.
When an event is "raised" a Types_Event is created which has the same event ID as the Log_Event but also encodes the module ID of the caller. This new event is passed to the underlying ILogger module along with any arguments associated with the event.
SEE
getMask, getEventId
typedef Log_EventId
index URL

Unique ID embedded in each Event

C synopsis target-domain
typedef Types_RopeId Log_EventId;
DETAILS
This ID must be used to compare two Events for equality. Event ids are not guaranteed to remain constant between different configurations of an application. For example, adding a module may cause the event ids of another module to change.
However, event ids declared by a module are guaranteed to be consecutive values starting from the first declared Log_Event and increasing to the last declared event. As a result, clients of a module can efficiently test ranges of events and modules can add new events, such as internal trace events, without breaking clients; simply be careful to add new events after any existing events in you module's .xdc specification.
SEE
getEventId, Event
struct Log_EventRec
index URL

The target representation of a recorded event

C synopsis target-domain
typedef struct Log_EventRec {
     Types_Timestamp64 tstamp;
    // time event was written
    Bits32 serial;
    // serial number of event
     Types_Event evt;
    // target encoding of an Event
    IArg arg[Log_NUMARGS];
    // arguments passed via Log_write/print
} Log_EventRec;
DETAILS
This structure defines how events are recorded on the target.
config Log_L_construct // module-wide
index URL

Lifecycle event posted when an instance is constructed

C synopsis target-domain
extern const Log_Event Log_L_construct;
config Log_L_create // module-wide
index URL

Lifecycle event posted when an instance is created

C synopsis target-domain
extern const Log_Event Log_L_create;
config Log_L_delete // module-wide
index URL

Lifecycle event posted when an instance is deleted

C synopsis target-domain
extern const Log_Event Log_L_delete;
config Log_L_destruct // module-wide
index URL

Lifecycle event posted when an instance is destructed

C synopsis target-domain
extern const Log_Event Log_L_destruct;
config Log_L_error // module-wide
index URL

Error event posted by Log_errorX API

C synopsis target-domain
extern const Log_Event Log_L_error;
DETAILS
This event is marked as a STATUS event and given the priority level of ERROR.
This event prints the Log call site (%$F) and a format string (%$S) which is recursively formatted with any additional arguments.
config Log_L_info // module-wide
index URL

Info event posted by Log_infoX API

C synopsis target-domain
extern const Log_Event Log_L_info;
DETAILS
This event is marked as an INFO event. The event priority is not specified in the event definition. Rather, it is specified as an argument to the Log_infoX APIs.
This event prints the Log call site (%$F) and a format string (%$S) which is recursively formatted with any addition arguments.
config Log_L_warning // module-wide
index URL

Warning event posted by Log_warningX API

C synopsis target-domain
extern const Log_Event Log_L_warning;
DETAILS
This event is marked as a STATUS event and given the priority level of WARNING.
This event prints the Log call site (%$F) and a format string (%$S) which is recursively formatted with any addition arguments.
Log_doPrint() // module-wide
index URL

Render an event as text via System_printf

C synopsis target-domain
Void Log_doPrint(Log_EventRec *evRec);
ARGUMENTS
evRec — a nonNULL pointer to an initialized Log_EventRec structure to be formated via System_printf.
DETAILS
This method is not gated and may make more than one call to System_printf. This utility method is typically used within the implementation of a logger which initializes Log_EventRec structures based on Log events produced by the application.
Log_error0() // module-wide
index URL

Generate a Log "error event" with 0 arguments

C synopsis target-domain
macro Void Log_error0(CString fmt);
SEE
error5
Log_error1() // module-wide
index URL

Generate a Log "error event" with 1 argument

C synopsis target-domain
macro Void Log_error1(CString fmt, IArg a1);
SEE
error5
Log_error2() // module-wide
index URL

Generate a Log "error event" with 2 arguments

C synopsis target-domain
macro Void Log_error2(CString fmt, IArg a1, IArg a2);
SEE
error5
Log_error3() // module-wide
index URL

Generate a Log "error event" with 3 arguments

C synopsis target-domain
macro Void Log_error3(CString fmt, IArg a1, IArg a2, IArg a3);
SEE
error5
Log_error4() // module-wide
index URL

Generate a Log "error event" with 4 arguments

C synopsis target-domain
macro Void Log_error4(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
SEE
error5
Log_error5() // module-wide
index URL

Generate a Log "error event" with 5 arguments

C synopsis target-domain
macro Void Log_error5(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
ARGUMENTS
fmt — a reference to a constant error string / fmt string
a1 — value for an additional parameter (e.g. an error code)
a2 — value for an additional parameter
a3 — value for an additional parameter
a4 — value for an additional parameter
a5 — value for an additional parameter
DETAILS
The Log_error APIs are intended to allow users to easily log error events in their code. Similar to the Log_print APIs, Log_error does not require that you define an event. You simply pass an informative error string which can optionally be formatted with additional arguments. The error is logged with the predefined event L_error.
Log_error prepends a string to the message which identifies it as an ERROR and specifies the filename and line number of the Log_error call site. A simple example:
  Log_error0("Invalid argument");
This event will be formatted as (assuming that the above call was line 35 of "MyCode.c")
  ERROR at "MyCode.c", line 35: Invalid argument
Users may provide additional information in the error event, such as a predefined error code or details of the error. These additional values will be used to format the string passed to Log_error.
Log_error does not use a variable length argument list--you must call the appropriate Log_errorX API based on the number of arguments.
SEE
for information about format strings.
EXAMPLES
The following example demonstrates a typical usage.
  Int myArg;

  Log_error1("Invalid argument: %d", myArg);
The above event is formatted as, for example:
  ERROR: "MyCode.c", line 35: Invalid argument: -1
Log_getEventId() // module-wide
index URL

Get event ID of the specified (encoded) event

C synopsis target-domain
macro Log_EventId Log_getEventId(Log_Event evt);
ARGUMENTS
evt — the Log event encoding a mask and event ID
DETAILS
This method is used to compare "known" Log events with "raised" Types_Event.
RETURNS
event ID of the specified event
SEE
Types.getEventId
Log_getMask() // module-wide
index URL

Get the Diags mask for the specified (encoded) event

C synopsis target-domain
macro Diags_Mask Log_getMask(Log_Event evt);
ARGUMENTS
evt — the Log event encoding a mask and event ID
RETURNS
Diags mask for the specified event
Log_info0() // module-wide
index URL

Generate a Log "info event" with 0 arguments

C synopsis target-domain
macro Void Log_info0(CString fmt);
SEE
info5
Log_info1() // module-wide
index URL

Generate a Log "info event" with 1 argument

C synopsis target-domain
macro Void Log_info1(CString fmt, IArg a1);
SEE
info5
Log_info2() // module-wide
index URL

Generate a Log "info event" with 2 arguments

C synopsis target-domain
macro Void Log_info2(CString fmt, IArg a1, IArg a2);
SEE
info5
Log_info3() // module-wide
index URL

Generate a Log "info event" with 3 arguments

C synopsis target-domain
macro Void Log_info3(CString fmt, IArg a1, IArg a2, IArg a3);
SEE
info5
Log_info4() // module-wide
index URL

Generate a Log "info event" with 4 arguments

C synopsis target-domain
macro Void Log_info4(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
SEE
info5
Log_info5() // module-wide
index URL

Generate a Log "info event" with 5 arguments

C synopsis target-domain
macro Void Log_info5(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
ARGUMENTS
fmt — reference to a constant event string / fmt string
a1 — value for an additional parameter (e.g. an event code)
a2 — value for an additional parameter
a3 — value for an additional parameter
a4 — value for an additional parameter
a5 — value for an additional parameter
DETAILS
The Log_info APIs are provided for easily logging generic "informational" events with call site information. They are similar to the Log_print APIs in that they do not require you to define an event-- you simply pass an informative printf-style string which can optionally be formatted with additional arguments. The info record is logged with the predefined event 'L_info'.
The Log_info APIs log the L_info event which uses the 'INFO' diags category. They do not allow you to specify an event priority.
Log_info prepends the filename and line number of the call site to the message.
EXAMPLES
The following example demonstrates a typical usage.
  Int load;

  Log_info1("Current load: %d", load);
The above event is formatted as, for example:
  "MyCode.c", line 15: Current load: 25
Log_print0() // module-wide
index URL

Generate a Log "print event" with 0 arguments

C synopsis target-domain
macro Void Log_print0(Diags_Mask mask, CString fmt);
SEE
print6
Log_print1() // module-wide
index URL

Generate a Log "print event" with 1 argument

C synopsis target-domain
macro Void Log_print1(Diags_Mask mask, CString fmt, IArg a1);
SEE
print6
Log_print2() // module-wide
index URL

Generate a Log "print event" with 2 arguments

C synopsis target-domain
macro Void Log_print2(Diags_Mask mask, CString fmt, IArg a1, IArg a2);
SEE
print6
Log_print3() // module-wide
index URL

Generate a Log "print event" with 3 arguments

C synopsis target-domain
macro Void Log_print3(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3);
SEE
print6
Log_print4() // module-wide
index URL

Generate a Log "print event" with 4 arguments

C synopsis target-domain
macro Void Log_print4(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
SEE
print6
Log_print5() // module-wide
index URL

Generate a Log "print event" with 5 arguments

C synopsis target-domain
macro Void Log_print5(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
SEE
print6
Log_print6() // module-wide
index URL

Generate a Log "print event" with 6 arguments

C synopsis target-domain
macro Void Log_print6(Diags_Mask mask, CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6);
ARGUMENTS
mask — enable bits and optional detail level for this event
fmt — a printf style format string
a1 — value for first format conversion character
a2 — value for second format conversion character
a3 — value for third format conversion character
a4 — value for fourth format conversion character
a5 — value for fifth format conversion character
a6 — value for sixth format conversion character
DETAILS
As a convenience to C (as well as assembly language) programmers, the Log module provides a variation of the ever-popular printf function. The print[0-6] functions generate a Log "print event" and route it to the current module's logger.
The arguments passed to print[0-6] may be characters, integers, strings, or pointers. However, because the declared type of the arguments is IArg, all pointer arguments must be cast to an IArg type. IArg is an integral type large enough to hold any pointer or an int. So, casting a pointer to an IArg does not cause any loss of information and C's normal integer conversions make the cast unnecessary for integral arguments.
The format string can use the following conversion characters. However, it is important to recall that all arguments referenced by these conversion characters have been converted to an IArg prior to conversion; so, the use of "length modifiers" should be avoided.
  Conversion Character    Description
  ------------------------------------------------
  %c                      Character
  %d                      Signed integer
  %u                      Unsigned integer
  %x                      Unsigned hexadecimal integer
  %o                      Unsigned octal integer
  %s                      Character string
  %p                      Pointer
  %f                      Single precision floating point (float)
Format strings, while very convenient, are a well known source of portability problems: each format specification must precisely match the types of the arguments passed. Underlying "printf" functions use the format string to determine how far to advance through their argument list. For targets where pointer types and integers are the same size there are no problems. However, suppose a target's pointer type is larger than its integer type. In this case, because integer arguments are widened to be of type IArg, a format specification of "%d" causes an underlying printf() implementation to read the extended part of the integer argument as part of the next argument(!).
To get around this problem and still allow the use of "natural" format specifications (e.g., %d and %x with optional width specifications), System.aprintf() is used which assumes that all arguments have been widened to be of type IArg.
See System.printf for complete details.
The %f format specifier is used to print a single precision float value. Note that %f assumes that sizeof(Float) <= sizeof(IArg). Most clients that interpret float values expect that they are represented in IEEE 754 floating point format. Therefore, it is recommended that the float values be converted into that format prior to supplying the values to Log functions in cases where targets do not generate the float values in IEEE 754 floating point format by default.
The first argument to a Log_print call is the diags category to be associated with the event.
It is also possible to associate an event level with the event to enable filtering of events based on event level. Conceptually, it is best to regard the event level as completely separate from the event's diags category; however, the priority value actually occupies a part of the diags mask. For this reason, it is possible to specify an event level by OR'ing the level with the diags mask. For example, to print an Diags_INFO event of Diags_LEVEL2, you'd simply write: (Diags_INFO | Diags_LEVEL2)
Specifying an event level is optional. Log_print calls which do not specify a level will receive the highest priority by default.
EXAMPLES
The following example demonstrates a typical usage.
  String  list[];
  UInt    i;

  Log_print2(Diags_USER2, "list[%u] = %s\n", i, (IArg)list[i]);
Note that the IArg cast above is only necessary for pointer arguments; C's normal parameter conversions implicitly convert integral arguments.
To simplify the conversion from float arguments to IArg, the standard header xdc/std.h provides a macro, named floatToArg(), to do this conversion in a type safe manner. So, the following statement will print "float = 2.3456":
    Log_print1(Diags_USER1, "float = %f", floatToArg(2.34567));
Note that, if you are formatting events on the target, you must also add support for floating point to ASCII conversion to System.printf; for more information, see the System.extendedFormats reference documenation. For example:
      var System = xdc.useModule('xdc.runtime.System');
      System.extendedFormats = "%f";
Log_put0() // module-wide
index URL

Unconditionally put the specified Log event with 0 arguments

C synopsis target-domain
macro Void Log_put0(Log_Event evt, Types_ModuleId mid);
SEE
put8
Log_put1() // module-wide
index URL

Unconditionally put the specified Log event and 1 argument

C synopsis target-domain
macro Void Log_put1(Log_Event evt, Types_ModuleId mid, IArg a1);
SEE
put8
Log_put2() // module-wide
index URL

Unconditionally put the specified Log event and 2 arguments

C synopsis target-domain
macro Void Log_put2(Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
SEE
put8
Log_put4() // module-wide
index URL

Unconditionally put the specified Log event and 4 arguments

C synopsis target-domain
macro Void Log_put4(Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
SEE
put8
Log_put8() // module-wide
index URL

Unconditionally put the specified Log event and 8 arguments

C synopsis target-domain
macro Void Log_put8(Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
ARGUMENTS
evt — the Log event to put into the log
mid — module ID of the module putting the event
a1 — value for first format conversion character
a2 — value for second format conversion character
a3 — value for third format conversion character
a4 — value for fourth format conversion character
a5 — value for fifth format conversion character
a6 — value for sixth format conversion character
a7 — value for seventh format conversion character
a8 — value for eighth format conversion character
DETAILS
This method unconditionally puts the specified Event evt into the log. The Types.ModuleId mid should be the module ID of the module which is putting the event.
Log_warning0() // module-wide
index URL

Generate a Log "warning event" with 0 arguments

C synopsis target-domain
macro Void Log_warning0(CString fmt);
SEE
warning5
Log_warning1() // module-wide
index URL

Generate a Log "warning event" with 1 argument

C synopsis target-domain
macro Void Log_warning1(CString fmt, IArg a1);
SEE
warning5
Log_warning2() // module-wide
index URL

Generate a Log "warning event" with 2 arguments

C synopsis target-domain
macro Void Log_warning2(CString fmt, IArg a1, IArg a2);
SEE
warning5
Log_warning3() // module-wide
index URL

Generate a Log "warning event" with 3 arguments

C synopsis target-domain
macro Void Log_warning3(CString fmt, IArg a1, IArg a2, IArg a3);
SEE
warning5
Log_warning4() // module-wide
index URL

Generate a Log "warning event" with 4 arguments

C synopsis target-domain
macro Void Log_warning4(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
SEE
warning5
Log_warning5() // module-wide
index URL

Generate a Log "warning event" with 5 arguments

C synopsis target-domain
macro Void Log_warning5(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
ARGUMENTS
fmt — reference to a constant warning string / fmt string
a1 — value for an additional parameter (e.g. a warning code)
a2 — value for an additional parameter
a3 — value for an additional parameter
a4 — value for an additional parameter
a5 — value for an additional parameter
DETAILS
The Log_warning APIs provide the same features as the Log_error APIs, but are used to specifically log "warning" events.
The Log_warning APIs are equivalent to the Log_error APIs except that they use the predefined L_warning event. Log_warning prepends a string to the message which identifies it as a WARNING and specifies the filename and line number of the Log_warning call site.
SEE
error5
EXAMPLES
The following example demonstrates a typical usage.
  Int myArg;

  Log_warning1("Value may be too high: %d", myArg);
The above event is formatted as:
  WARNING: "MyCode.c", line 50: Value may be too high: 4096
Log_write0() // module-wide
index URL

Generate a Log event with 0 arguments

C synopsis target-domain
macro Void Log_write0(Log_Event evt);
SEE
write8
Log_write1() // module-wide
index URL

Generate a Log event with 1 argument

C synopsis target-domain
macro Void Log_write1(Log_Event evt, IArg a1);
SEE
write8
Log_write2() // module-wide
index URL

Generate a Log event with 2 arguments

C synopsis target-domain
macro Void Log_write2(Log_Event evt, IArg a1, IArg a2);
SEE
write8
Log_write3() // module-wide
index URL

Generate a Log event with 3 arguments

C synopsis target-domain
macro Void Log_write3(Log_Event evt, IArg a1, IArg a2, IArg a3);
SEE
write8
Log_write4() // module-wide
index URL

Generate a Log event with 4 arguments

C synopsis target-domain
macro Void Log_write4(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4);
SEE
write8
Log_write5() // module-wide
index URL

Generate a Log event with 5 arguments

C synopsis target-domain
macro Void Log_write5(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
SEE
write8
Log_write6() // module-wide
index URL

Generate a Log event with 6 arguments

C synopsis target-domain
macro Void Log_write6(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6);
SEE
write8
Log_write7() // module-wide
index URL

Generate a Log event with 7 arguments

C synopsis target-domain
macro Void Log_write7(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7);
SEE
write8
Log_write8() // module-wide
index URL

Generate a Log event with 8 arguments

C synopsis target-domain
macro Void Log_write8(Log_Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
ARGUMENTS
evt — the Log event to write
a1 — value for first format conversion character
a2 — value for second format conversion character
a3 — value for third format conversion character
a4 — value for fourth format conversion character
a5 — value for fifth format conversion character
a6 — value for sixth format conversion character
a7 — value for seventh format conversion character
a8 — value for eighth format conversion character
DETAILS
If the mask in the specified Log event has any bit set which is also set in the current module's diagnostics mask, then this call to write will "raise" the given Log event.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Log_Module_id();
// Get this module's unique id
Bool Log_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Log_Module_heap();
// The heap from which this module allocates memory
Bool Log_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Log_Module_getMask();
// Returns the diagnostics mask for this module
Void Log_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Log.xdc
var Log = xdc.useModule('xdc.runtime.Log');
module-wide constants & types
    const Log.NUMARGS// Maximum number of arguments supported in Log events = 8;
    const Log.PRINTFID// The EventId for Log_print() events = 0;
    var obj = new Log.EventDesc// Log event descriptor;
        obj.mask// event enable mask = Bits16 ...
        obj.level// event level relative to other events = Diags.EventLevel ...
        obj.msg// event "printf" message format string = String ...
    var obj = new Log.EventRec// The target representation of a recorded event;
        obj.tstamp// time event was written = Types.Timestamp64 ...
        obj.serial// serial number of event = Bits32 ...
        obj.evt// target encoding of an Event = Bits32 ...
        obj.arg// arguments passed via Log_write/print = IArg[Log.NUMARGS] ...
module-wide config parameters
     Log.L_construct// Lifecycle event posted when an instance is constructed = Log.EventDesc {
        mask: Diags.LIFECYCLE,
        msg: "<-- construct: %p('%s')"
    };
     Log.L_create// Lifecycle event posted when an instance is created = Log.EventDesc {
        mask: Diags.LIFECYCLE,
        msg: "<-- create: %p('%s')"
    };
     Log.L_delete// Lifecycle event posted when an instance is deleted = Log.EventDesc {
        mask: Diags.LIFECYCLE,
        msg: "--> delete: (%p)"
    };
     Log.L_destruct// Lifecycle event posted when an instance is destructed = Log.EventDesc {
        mask: Diags.LIFECYCLE,
        msg: "--> destruct: (%p)"
    };
     Log.L_error// Error event posted by Log_errorX API = Log.EventDesc {
        mask: Diags.STATUS,
        level: Diags.ERROR,
        msg: "ERROR: %$F%$S"
    };
     Log.L_info// Info event posted by Log_infoX API = Log.EventDesc {
        mask: Diags.INFO,
        msg: "%$F%$S"
    };
     Log.L_warning// Warning event posted by Log_warningX API = Log.EventDesc {
        mask: Diags.STATUS,
        level: Diags.WARNING,
        msg: "WARNING: %$F%$S"
    };
     Log.common$// Common module configuration parameters = Types.Common$ undefined;
const Log.NUMARGS
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Maximum number of arguments supported in Log events

Configuration settings
const Log.NUMARGS = 8;
C SYNOPSIS
Log_NUMARGS
const Log.PRINTFID
index URL

The EventId for Log_print() events

Configuration settings
const Log.PRINTFID = 0;
C SYNOPSIS
Log_PRINTFID
metaonly struct Log.EventDesc
index URL

Log event descriptor

Configuration settings
var obj = new Log.EventDesc;
    obj.mask = Bits16 ...
    // event enable mask
    obj.level = Diags.EventLevel ...
    // event level relative to other events
    obj.msg = String ...
    // event "printf" message format string
DETAILS
Each Log event is defined by a Log event descriptor.
The mask defines which bits in the module's diagnostics mask enable this Log event. Events "posted" via Log_write are only written to the underlying logger if one of the mask's bits matches the caller's module diagnostics settings (see xdc.runtime.Types.common$).
The 'level' defines the event level of the event. While the diags bits selected in the 'mask' signify the "category" of the event (e.g. Entry/Exit, Analysis, Info), the 'level' field allows you to assign a "priority" or "detail level" to the event relative to other events in that category. There are four event levels defined by 'xdc.runtime.Diags.EventLevel'.
Filtering of events by level is handled by the ILogger implementation. ILogger implementations which also implement the IFilterLogger interface support filtering of events based on priority level.
Specifying an event level is optional. Events that don't specify a level will receive Diags.LEVEL1 by default, making them the highest priority and ensuring that they will not inadvertently be filtered out by level-based filtering.
The msg defines a printf style format string that defines how to render the arguments passed along the event in a Log_write call. For a description of the allowable format strings see print6.
SEE
write8, print6
struct Log.EventRec
index URL

The target representation of a recorded event

Configuration settings
var obj = new Log.EventRec;
    obj.tstamp = Types.Timestamp64 ...
    // time event was written
    obj.serial = Bits32 ...
    // serial number of event
    obj.evt = Bits32 ...
    // target encoding of an Event
    obj.arg = IArg[Log.NUMARGS] ...
    // arguments passed via Log_write/print
DETAILS
This structure defines how events are recorded on the target.
C SYNOPSIS
Log_EventRec
config Log.L_construct // module-wide
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Lifecycle event posted when an instance is constructed

Configuration settings
Log.L_construct = Log.EventDesc {
    mask: Diags.LIFECYCLE,
    msg: "<-- construct: %p('%s')"
};
C SYNOPSIS
Log_L_construct
config Log.L_create // module-wide
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Lifecycle event posted when an instance is created

Configuration settings
Log.L_create = Log.EventDesc {
    mask: Diags.LIFECYCLE,
    msg: "<-- create: %p('%s')"
};
C SYNOPSIS
Log_L_create
config Log.L_delete // module-wide
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Lifecycle event posted when an instance is deleted

Configuration settings
Log.L_delete = Log.EventDesc {
    mask: Diags.LIFECYCLE,
    msg: "--> delete: (%p)"
};
C SYNOPSIS
Log_L_delete
config Log.L_destruct // module-wide
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Lifecycle event posted when an instance is destructed

Configuration settings
Log.L_destruct = Log.EventDesc {
    mask: Diags.LIFECYCLE,
    msg: "--> destruct: (%p)"
};
C SYNOPSIS
Log_L_destruct
config Log.L_error // module-wide
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Error event posted by Log_errorX API

Configuration settings
Log.L_error = Log.EventDesc {
    mask: Diags.STATUS,
    level: Diags.ERROR,
    msg: "ERROR: %$F%$S"
};
DETAILS
This event is marked as a STATUS event and given the priority level of ERROR.
This event prints the Log call site (%$F) and a format string (%$S) which is recursively formatted with any additional arguments.
C SYNOPSIS
Log_L_error
config Log.L_info // module-wide
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Info event posted by Log_infoX API

Configuration settings
Log.L_info = Log.EventDesc {
    mask: Diags.INFO,
    msg: "%$F%$S"
};
DETAILS
This event is marked as an INFO event. The event priority is not specified in the event definition. Rather, it is specified as an argument to the Log_infoX APIs.
This event prints the Log call site (%$F) and a format string (%$S) which is recursively formatted with any addition arguments.
C SYNOPSIS
Log_L_info
config Log.L_warning // module-wide
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Warning event posted by Log_warningX API

Configuration settings
Log.L_warning = Log.EventDesc {
    mask: Diags.STATUS,
    level: Diags.WARNING,
    msg: "WARNING: %$F%$S"
};
DETAILS
This event is marked as a STATUS event and given the priority level of WARNING.
This event prints the Log call site (%$F) and a format string (%$S) which is recursively formatted with any addition arguments.
C SYNOPSIS
Log_L_warning
metaonly config Log.common$ // module-wide
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Common module configuration parameters

Configuration settings
Log.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.LoggerBuf
index URL

A logger which stores Log events in a buffer

  • C synopsis
  • Individual elements
  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
This module provides a logger which captures Log events to a buffer in realtime. The Log events stored in the buffer are unformatted; Log event formatting is deferred until some client reads the raw event data from the buffer. You can use LoggerBuf_flush() to process the Log events stored in the buffer and stream the formatted output to stdout (via System.printf). Alternatively, you can read a raw event (via getNextEntry) and send it to another client that has the resources to format the event for display. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/LoggerBuf.xdc
#include <xdc/runtime/LoggerBuf.h>
Functions
Void
LoggerBuf_construct// Initialize a new instance object inside the provided structure(LoggerBuf_Struct *structP, const LoggerBuf_Params *params, Error_Block *eb);
LoggerBuf_Handle
LoggerBuf_create// Allocate and initialize a new instance object and return its handle(const LoggerBuf_Params *params, Error_Block *eb);
Void
LoggerBuf_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(LoggerBuf_Handle *handleP);
Void
LoggerBuf_destruct// Finalize the instance object inside the provided structure(LoggerBuf_Struct *structP);
Void
LoggerBuf_flush// Read, clear, and output the contents of the log(LoggerBuf_Handle handle);
Void
LoggerBuf_flushAll// Flush logs of all instances that set exitFlush to true();
Int
LoggerBuf_getNextEntry// Fills the passed Log.EventRec with the next entry in the log(LoggerBuf_Handle handle, Log_EventRec *evtRec);
Void
LoggerBuf_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(LoggerBuf_Params *params);
Void
LoggerBuf_reset// Reset a log to empty state and enable it(LoggerBuf_Handle handle);
Functions common to all ILogger modules
Bool
LoggerBuf_disable// Disable a log(LoggerBuf_Handle handle);
Bool
LoggerBuf_enable// Enable a log(LoggerBuf_Handle handle);
Void
LoggerBuf_write0// Process a log event with 0 arguments(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid);
Void
LoggerBuf_write1// Process a log event with 1 arguments(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1);
Void
LoggerBuf_write2// Process a log event with 2 arguments(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
Void
LoggerBuf_write4// Process a log event with up to 4 arguments(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
Void
LoggerBuf_write8// Process a log event with up to 8 arguments(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
Functions common to all IFilterLogger modules
Diags_Mask
LoggerBuf_getFilterLevel// Returns the mask of diags categories currently set to the specified level(LoggerBuf_Handle handle, Diags_EventLevel level);
Void
LoggerBuf_setFilterLevel// Set the level of detail that instances will log(LoggerBuf_Handle handle, Diags_Mask mask, Diags_EventLevel filterLevel);
Functions common to all target instances
LoggerBuf_handle// Convert this instance structure pointer into an instance handle, LoggerBuf_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, LoggerBuf_Handle_downCast2// conditionally move 2 levels down the inheritance hierarchy; NULL upon failure, LoggerBuf_Handle_label// The label associated with this instance object, LoggerBuf_Handle_name// The name of this instance object, LoggerBuf_Handle_upCast// unconditionally move one level up the inheritance hierarchy, LoggerBuf_Handle_upCast2// unconditionally move 2 levels up the inheritance hierarchy, LoggerBuf_Object_count// The number of statically-created instance objects, LoggerBuf_Object_first// The handle of the first dynamically-created instance object, or NULL, LoggerBuf_Object_get// The handle of the i-th statically-created instance object (array == NULL), LoggerBuf_Object_heap// The heap used to allocate dynamically-created instance objects, LoggerBuf_Object_next// The handle of the next dynamically-created instance object, or NULL, LoggerBuf_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
LoggerBuf_Module_getMask// Returns the diagnostics mask for this module, LoggerBuf_Module_hasMask// Test whether this module has a diagnostics mask, LoggerBuf_Module_heap// The heap from which this module allocates memory, LoggerBuf_Module_id// Get this module's unique id, LoggerBuf_Module_setMask// Set the diagnostics mask for this module, LoggerBuf_Module_startupDone// Test if this module has completed startup
Typedefs
typedef enum
LoggerBuf_BufType// Type of log buffer ...
typedef LoggerBuf_Object *
LoggerBuf_Handle// Client reference to an instance object;
typedef struct
LoggerBuf_Object// Opaque internal representation of an instance object LoggerBuf_Object;
typedef struct
LoggerBuf_Params// Instance config-params structure ...
typedef struct
LoggerBuf_Struct// Opaque client structure large enough to hold an instance object LoggerBuf_Struct;
Constants
extern const Bool
LoggerBuf_enableFlush// Flush all logs at system exit;
extern const Error_Id
LoggerBuf_E_badLevel// Error raised if get or setFilterLevel receives a bad level value;
extern const Bool
LoggerBuf_filterByLevel// Support filtering of events by event level;
extern const Diags_Mask
LoggerBuf_level1Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL1;
extern const Diags_Mask
LoggerBuf_level2Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL2;
extern const Diags_Mask
LoggerBuf_level3Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL3;
extern const Diags_Mask
LoggerBuf_level4Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL4;
extern const ILogger_Handle
LoggerBuf_statusLogger// Route all 'STATUS' (error and warning) events to this logger;
DETAILS
This module provides a logger which captures Log events to a buffer in realtime. The Log events stored in the buffer are unformatted; Log event formatting is deferred until some client reads the raw event data from the buffer. You can use LoggerBuf_flush() to process the Log events stored in the buffer and stream the formatted output to stdout (via System.printf). Alternatively, you can read a raw event (via getNextEntry) and send it to another client that has the resources to format the event for display.
The implementation of this logger is fast with minimal stack usage making it appropriate for a realtime application. This logger writes all Log events to a circular buffer. As a result, the execution time of all Log methods bound to this type of logger are deterministic (and quite short) because there are no additional memory allocation calls after the circular buffer was allocated.
If this logger is used in a preemptive environment, then an appropriate gate must be assigned to the module. For example, if events are generated from an interrupt context, then a gate that disables interrupts must be used.
  var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
  LoggerBuf.common$.gate = ...some gate instance...
If the buffer type is circular, the log buffer of size numEntries contains the last numEntries of Log events. If the buffer type is fixed, the log buffer contains the first numEntries events.
LoggerBuf supports routing of 'STATUS' events (errors and warnings) to a separate ILogger instance. This is helpful in preserving these critical events, which may otherwise be overwritten by lower priority events. This feature is disabled by default. See statusLogger.
LoggerBuf implements the IFilterLogger interface and optionally supports filtering of events based on their detail level. This feature is disabled by default. See IFilterLogger.
EXAMPLES
Configuration example: The following XDC configuration statements create a logger instance, assign it as the default logger for all modules, and enable USER1 logging in all modules of the package my.pkg. See the Diags.setMaskMeta() function for details on specifying the module names.
  var Defaults = xdc.useModule('xdc.runtime.Defaults');
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');

  LoggerBuf.enableFlush = true;
  var LoggerBufParams = new LoggerBuf.Params();
  LoggerBufParams.exitFlush = true;
  Defaults.common$.logger = LoggerBuf.create(LoggerBufParams);
  Diags.setMaskMeta("my.pkg.%", Diags.USER1, Diags.RUNTIME_ON);
enum LoggerBuf_BufType
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Type of log buffer

C synopsis target-domain
typedef enum LoggerBuf_BufType {
    LoggerBuf_BufType_CIRCULAR,
    // The log buffer wraps, overwriting old entries
    LoggerBuf_BufType_FIXED
    // The log buffer halts collection when full
} LoggerBuf_BufType;
config LoggerBuf_E_badLevel // module-wide
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Error raised if get or setFilterLevel receives a bad level value

C synopsis target-domain
extern const Error_Id LoggerBuf_E_badLevel;
config LoggerBuf_enableFlush // module-wide
index URL

Flush all logs at system exit

C synopsis target-domain
extern const Bool LoggerBuf_enableFlush;
config LoggerBuf_filterByLevel // module-wide
index URL

Support filtering of events by event level

C synopsis target-domain
extern const Bool LoggerBuf_filterByLevel;
DETAILS
To improve logging performance, this feature can be disabled by setting filterByLevel to false.
See 'setFilterLevel' for an explanation of level filtering.
config LoggerBuf_level1Mask // module-wide
index URL

Mask of diags categories whose initial filtering level is Diags.LEVEL1

C synopsis target-domain
extern const Diags_Mask LoggerBuf_level1Mask;
DETAILS
See 'level4Mask' for details.
config LoggerBuf_level2Mask // module-wide
index URL

Mask of diags categories whose initial filtering level is Diags.LEVEL2

C synopsis target-domain
extern const Diags_Mask LoggerBuf_level2Mask;
DETAILS
See 'level4Mask' for details.
config LoggerBuf_level3Mask // module-wide
index URL

Mask of diags categories whose initial filtering level is Diags.LEVEL3

C synopsis target-domain
extern const Diags_Mask LoggerBuf_level3Mask;
DETAILS
See 'level4Mask' for details.
config LoggerBuf_level4Mask // module-wide
index URL

Mask of diags categories whose initial filtering level is Diags.LEVEL4

C synopsis target-domain
extern const Diags_Mask LoggerBuf_level4Mask;
DETAILS
If IFilterLogger.filterByLevel is true, then all LoggerBuf instances will filter incoming events based on their event level.
The LoggerBuf module allows for specifying a different filter level for every Diags bit. These filtering levels are module wide; LoggerBuf does not support specifying the levels on a per-instance basis.
The IFilterLogger.setFilterLevel function can be used to change the filtering levels at runtime.
The default filtering levels are assigned using the level1Mask - level4Mask config parameters. These are used to specify, for each of the four event levels, the set of bits which should filter at that level by default.
The default filtering configuration sets the filter level to Diags.LEVEL4 for all logging-related diags bits so that all events are logged by default.
config LoggerBuf_statusLogger // module-wide
index URL

Route all 'STATUS' (error and warning) events to this logger

C synopsis target-domain
extern const ILogger_Handle LoggerBuf_statusLogger;
DETAILS
If a statusLogger is specified, all LoggerBuf instances will check to determine if any of the events they receive are errors or warnings (if their diags mask includes the STATUS category), and will log these events to the statusLogger.
Error events are infrequent, but it's generally critical that they be seen. In a typical system, non-error events easily outnumber any error events, and the logger is likely to wrap, overwriting any error events. To protect these events from being overwritten and lost, they can be sent to their own separate logger to preserve them.
The default value is null, indicating that the STATUS events will just be logged by the logger they were sent to.
LoggerBuf_flushAll() // module-wide
index URL

Flush logs of all instances that set exitFlush to true

C synopsis target-domain
Void LoggerBuf_flushAll();
DETAILS
The user is responsible for making sure that no LoggerBuf instances are created or deleted during the execution of this function.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId LoggerBuf_Module_id();
// Get this module's unique id
Bool LoggerBuf_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle LoggerBuf_Module_heap();
// The heap from which this module allocates memory
Bool LoggerBuf_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 LoggerBuf_Module_getMask();
// Returns the diagnostics mask for this module
Void LoggerBuf_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct LoggerBuf_Object LoggerBuf_Object;
// Opaque internal representation of an instance object
typedef LoggerBuf_Object *LoggerBuf_Handle;
// Client reference to an instance object
typedef struct LoggerBuf_Struct LoggerBuf_Struct;
// Opaque client structure large enough to hold an instance object
LoggerBuf_Handle LoggerBuf_handle(LoggerBuf_Struct *structP);
// Convert this instance structure pointer into an instance handle
LoggerBuf_Struct *LoggerBuf_struct(LoggerBuf_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
index URL

C synopsis target-domain
typedef struct LoggerBuf_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
     IHeap_Handle bufHeap;
    // The heap that contains the Log buffer for dynamic instances
     LoggerBuf_BufType bufType;
    // Log buffer type
    Bool exitFlush;
    // Flush log at system exit
    UInt numEntries;
    // Number of entries in buffer
} LoggerBuf_Params;
Void LoggerBuf_Params_init(LoggerBuf_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config LoggerBuf_Params.bufHeap // instance
index URL

The heap that contains the Log buffer for dynamic instances

C synopsis target-domain
struct LoggerBuf_Params {
     ...
     IHeap_Handle bufHeap;
DETAILS
The default value null means the buffer will be allocated from the Memory.defaultHeapInstance heap.
config LoggerBuf_Params.bufType // instance
index URL

Log buffer type

C synopsis target-domain
struct LoggerBuf_Params {
     ...
     LoggerBuf_BufType bufType;
config LoggerBuf_Params.exitFlush // instance
index URL

Flush log at system exit

C synopsis target-domain
struct LoggerBuf_Params {
     ...
    Bool exitFlush;
DETAILS
Only used when module parameter enableFlush is true.
config LoggerBuf_Params.numEntries // instance
index URL

Number of entries in buffer

C synopsis target-domain
struct LoggerBuf_Params {
     ...
    UInt numEntries;
DETAILS
Each entry is large enough to store one Log event containing up to 4 optional arguments. Events containing more than 4 arguments (such as those from Log.write5) use 2 entries.
numEntries must be a power of 2.
Runtime Instance Creation
index URL

C synopsis target-domain
LoggerBuf_Handle LoggerBuf_create(const LoggerBuf_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void LoggerBuf_construct(LoggerBuf_Struct *structP, const LoggerBuf_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
SEE
LoggerBuf.Params
Instance Deletion
index URL

C synopsis target-domain
Void LoggerBuf_delete(LoggerBuf_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void LoggerBuf_destruct(LoggerBuf_Struct *structP);
// Finalize the instance object inside the provided structure
LoggerBuf_disable() // instance
index URL

Disable a log

C synopsis target-domain
Bool LoggerBuf_disable(LoggerBuf_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
DETAILS
Events written to a disabled log are silently discarded.
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
LoggerBuf_enable() // instance
index URL

Enable a log

C synopsis target-domain
Bool LoggerBuf_enable(LoggerBuf_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
LoggerBuf_flush() // instance
index URL

Read, clear, and output the contents of the log

C synopsis target-domain
Void LoggerBuf_flush(LoggerBuf_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
DETAILS
This method reads, clears, and "prints" each Log event (via System.printf) in the log.
LoggerBuf_getFilterLevel() // instance
index URL

Returns the mask of diags categories currently set to the specified level

C synopsis target-domain
Diags_Mask LoggerBuf_getFilterLevel(LoggerBuf_Handle handle, Diags_EventLevel level);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
DETAILS
See 'setFilterLevel' for an explanation of level filtering.
LoggerBuf_getNextEntry() // instance
index URL

Fills the passed Log.EventRec with the next entry in the log

C synopsis target-domain
Int LoggerBuf_getNextEntry(LoggerBuf_Handle handle, Log_EventRec *evtRec);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
evtRec — pointer to a supplied EventRec object where the next entry in the log is copied to
DETAILS
This function is used to read and clear Log events from the buffer maintained by the LoggerBuf instance. The Log event can then be transmitted and displayed on a host.
A read pointer is maintained in the LoggerBuf instance and points to the next record to read. Entries are not necessarily returned in chronological order, since buffers of type BufType_CIRCULAR can wrap.
RETURNS
This function reports the number of entries actually read. The only values that can be returned are:
  • 0 no more entries to read
  • 1 or 2 read a complete entry written by write4 or write8
  • -1 cleared an incomplete/overwritten entry, more entries to read
LoggerBuf_reset() // instance
index URL

Reset a log to empty state and enable it

C synopsis target-domain
Void LoggerBuf_reset(LoggerBuf_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
WARNING
This method is not synchronized with other instance methods and, as a result, it must never be called when there is a chance that another instance method is currently in operation or when another method on this instance may preempt this call.
LoggerBuf_setFilterLevel() // instance
index URL

Set the level of detail that instances will log

C synopsis target-domain
Void LoggerBuf_setFilterLevel(LoggerBuf_Handle handle, Diags_Mask mask, Diags_EventLevel filterLevel);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
mask — The diags categories to set the level for
filterLevel — The new filtering level for the specified categories
DETAILS
Events with the specified level or higher will be logged, events below the specified level will be dropped.
Events are filtered first by diags category, then by level. If an event's diags category is disabled in the module's diags mask, then it will be filtered out regardless of level. The event will not even be passed to the logger.
This API allows for setting the filtering level for more than one diags category at a time. The mask parameter can be a single category or multiple categories combined, and the level will be set for all of those categories.
LoggerBuf_write0() // instance
index URL

Process a log event with 0 arguments

C synopsis target-domain
Void LoggerBuf_write0(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
DETAILS
Same as write4 except with 0 arguments rather than 4.
SEE
ILogger.write4()
LoggerBuf_write1() // instance
index URL

Process a log event with 1 arguments

C synopsis target-domain
Void LoggerBuf_write1(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
DETAILS
Same as write4 except with 1 arguments rather than 4.
SEE
ILogger.write4()
LoggerBuf_write2() // instance
index URL

Process a log event with 2 arguments

C synopsis target-domain
Void LoggerBuf_write2(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
DETAILS
Same as write4 except with 2 arguments rather than 4.
SEE
ILogger.write4()
LoggerBuf_write4() // instance
index URL

Process a log event with up to 4 arguments

C synopsis target-domain
Void LoggerBuf_write4(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
evt — event to be logged
mid — module ID of the module which logged the event
a1 — arbitrary argument passed by caller
DETAILS
The evt argument is of type Log.Event, which encodes the Log.EventId, the Diags.Mask, and the Diags.EventLevel of the event. The event ID can be obtained via Types.getEventId(evt), the Diags mask can be obtained via Diags.getMask(evt), and the event level can be obtained via Diags.getLevel(evt).
The modId argument is the module ID of the module that logged the event.
The event information can be used by the logger to handle different events specially. For example, the event ID can be used to compare against other known Log.Events.
      if (Log_getEventId(MY_EVENT) == Log_getEventId(evt)) {
          :
      }
The Diags mask and event level can be used for filtering of events based on event level (see IFilterLogger), or even routing events to separate loggers based on diags category (see, for example, LoggerBuf.statusLogger).
The Diags mask and event level are useful for handling the event, but are generally not recorded by the logger because they are not needed in decoding and displaying the event. A more suitable value to record is a Types.Event, which encodes the event ID and module ID. For example, the Log.EventRec type stores a Types.Event in its record definition. A Types.Event can be created using the Types.makeEvent API given the event ID and module ID.
The event ID value of 0 is used to indicate an event triggered by a call to one of the Log_print[0-6] methods. These methods take a format string rather than a Log_Event argument and, as a result, the event ID encoded in evt is 0 and the parameter a1 is the format string.
Non-zero event IDs can also be used to access the msg string associated with the Log.EventDesc that originally defined the Log event.
      Log_EventId id = Log_getEventId(evt));
      if (id != 0) {
          String msg = Text_ropeText(id);
          System_aprintf(msg, a1, a2, a3, a4);
      }
This works because an event's ID is simply an offset into a table of characters (maintained by the Text module) containing the event's msg string.
The arguments a1, a2, etc. are parameters that are to be interpreted according to the message format string associated with evt.
SEE
Log.Event, Log.EventDesc, Text.ropeText, Log.getEventId
LoggerBuf_write8() // instance
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Process a log event with up to 8 arguments

C synopsis target-domain
Void LoggerBuf_write8(LoggerBuf_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
ARGUMENTS
handle — handle of a previously-created LoggerBuf instance object
DETAILS
Same as write4 except with 8 arguments rather than 4.
SEE
ILogger.write4()
Instance Convertors
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C synopsis target-domain
IFilterLogger_Handle LoggerBuf_Handle_upCast(LoggerBuf_Handle handle);
// unconditionally move one level up the inheritance hierarchy
LoggerBuf_Handle LoggerBuf_Handle_downCast(IFilterLogger_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
ILogger_Handle LoggerBuf_Handle_upCast2(LoggerBuf_Handle handle);
// unconditionally move 2 levels up the inheritance hierarchy
LoggerBuf_Handle LoggerBuf_Handle_downCast2(ILogger_Handle handle);
// conditionally move 2 levels down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int LoggerBuf_Object_count();
// The number of statically-created instance objects
LoggerBuf_Handle LoggerBuf_Object_get(LoggerBuf_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
LoggerBuf_Handle LoggerBuf_Object_first();
// The handle of the first dynamically-created instance object, or NULL
LoggerBuf_Handle LoggerBuf_Object_next(LoggerBuf_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle LoggerBuf_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *LoggerBuf_Handle_label(LoggerBuf_Handle handle, Types_Label *buf);
// The label associated with this instance object
String LoggerBuf_Handle_name(LoggerBuf_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/LoggerBuf.xdc
var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
local proxy modules
     LoggerBuf.TimestampProxy// User supplied time-stamp proxy = ITimestampClient.Module null
         LoggerBuf.TimestampProxy.delegate$ = ITimestampClient.Module null
module-wide constants & types
    values of type LoggerBuf.BufType// Type of log buffer
        const LoggerBuf.BufType_CIRCULAR// The log buffer wraps, overwriting old entries;
        const LoggerBuf.BufType_FIXED// The log buffer halts collection when full;
    var obj = new LoggerBuf.BasicView// ;
        obj.label = String ...
        obj.lastSerial = Int ...
        obj.numEntries = UInt ...
        obj.type = String ...
        obj.enabledFlag = Bool ...
    var obj = new LoggerBuf.RecordView// ;
        obj.serial = Int ...
        obj.timestampRaw = Long ...
        obj.modName = String ...
        obj.text = String ...
        obj.eventId = Int ...
        obj.eventName = String ...
        obj.arg0 = IArg ...
        obj.arg1 = IArg ...
        obj.arg2 = IArg ...
        obj.arg3 = IArg ...
        obj.arg4 = IArg ...
        obj.arg5 = IArg ...
        obj.arg6 = IArg ...
        obj.arg7 = IArg ...
    var obj = new LoggerBuf.StopModeData// Data added to the RTA MetaData file to support stop mode RTA;
        obj.bufferSymbol = String ...
        obj.bufferSize = Int ...
module-wide config parameters
     LoggerBuf.E_badLevel// Error raised if get or setFilterLevel receives a bad level value = Error.Desc {
        msg: "E_badLevel: Bad filter level value: %d"
    };
     LoggerBuf.enableFlush// Flush all logs at system exit = Bool false;
     LoggerBuf.filterByLevel// Support filtering of events by event level = Bool false;
     LoggerBuf.level1Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL1 = Bits16 0;
     LoggerBuf.level2Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL2 = Bits16 0;
     LoggerBuf.level3Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL3 = Bits16 0;
     LoggerBuf.level4Mask// Mask of diags categories whose initial filtering level is Diags.LEVEL4 = Bits16 Diags.ALL_LOGGING;
     LoggerBuf.statusLogger// Route all 'STATUS' (error and warning) events to this logger = ILogger.Handle null;
     LoggerBuf.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     LoggerBuf.getMetaArgs// Returns any meta data needed to support RTA(Any inst, Any instNum) returns Any
per-instance config parameters
    var params = new LoggerBuf.Params// Instance config-params object;
        params.bufHeap// The heap that contains the Log buffer for dynamic instances = IHeap.Handle null;
        params.bufSection// Section name for the buffer managed by the static instance = String null;
        params.bufType// Log buffer type = LoggerBuf.BufType LoggerBuf.BufType_CIRCULAR;
        params.exitFlush// Flush log at system exit = Bool false;
        params.numEntries// Number of entries in buffer = UInt 64;
per-instance creation
    var inst = LoggerBuf.create// Create an instance-object(params);
proxy LoggerBuf.TimestampProxy
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User supplied time-stamp proxy

Configuration settings
LoggerBuf.TimestampProxy = ITimestampClient.Module null
// some delegate module inheriting the ITimestampClient interface
    LoggerBuf.TimestampProxy.delegate$ = ITimestampClient.Module null
    // explicit access to the currently bound delegate module
DETAILS
This proxy allows LoggerBuf to use a timestamp server different from the server used by xdc.runtime.Timestamp. However, if not supplied by a user, this proxy defaults to whichever timestamp server is used by Timestamp.
enum LoggerBuf.BufType
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Type of log buffer

Configuration settings
values of type LoggerBuf.BufType
    const LoggerBuf.BufType_CIRCULAR;
    // The log buffer wraps, overwriting old entries
    const LoggerBuf.BufType_FIXED;
    // The log buffer halts collection when full
C SYNOPSIS
LoggerBuf_BufType
metaonly struct LoggerBuf.BasicView
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Configuration settings
var obj = new LoggerBuf.BasicView;
    obj.label = String ...
    obj.lastSerial = Int ...
    obj.numEntries = UInt ...
    obj.type = String ...
    obj.enabledFlag = Bool ...
metaonly struct LoggerBuf.RecordView
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Configuration settings
var obj = new LoggerBuf.RecordView;
    obj.serial = Int ...
    obj.timestampRaw = Long ...
    obj.modName = String ...
    obj.text = String ...
    obj.eventId = Int ...
    obj.eventName = String ...
    obj.arg0 = IArg ...
    obj.arg1 = IArg ...
    obj.arg2 = IArg ...
    obj.arg3 = IArg ...
    obj.arg4 = IArg ...
    obj.arg5 = IArg ...
    obj.arg6 = IArg ...
    obj.arg7 = IArg ...
metaonly struct LoggerBuf.StopModeData
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Data added to the RTA MetaData file to support stop mode RTA

Configuration settings
var obj = new LoggerBuf.StopModeData;
    obj.bufferSymbol = String ...
    obj.bufferSize = Int ...
config LoggerBuf.E_badLevel // module-wide
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Error raised if get or setFilterLevel receives a bad level value

Configuration settings
LoggerBuf.E_badLevel = Error.Desc {
    msg: "E_badLevel: Bad filter level value: %d"
};
C SYNOPSIS
LoggerBuf_E_badLevel
config LoggerBuf.enableFlush // module-wide
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Flush all logs at system exit

Configuration settings
LoggerBuf.enableFlush = Bool false;
C SYNOPSIS
LoggerBuf_enableFlush
config LoggerBuf.filterByLevel // module-wide
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Support filtering of events by event level

Configuration settings
LoggerBuf.filterByLevel = Bool false;
DETAILS
To improve logging performance, this feature can be disabled by setting filterByLevel to false.
See 'setFilterLevel' for an explanation of level filtering.
C SYNOPSIS
LoggerBuf_filterByLevel
config LoggerBuf.level1Mask // module-wide
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Mask of diags categories whose initial filtering level is Diags.LEVEL1

Configuration settings
LoggerBuf.level1Mask = Bits16 0;
DETAILS
See 'level4Mask' for details.
C SYNOPSIS
LoggerBuf_level1Mask
config LoggerBuf.level2Mask // module-wide
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Mask of diags categories whose initial filtering level is Diags.LEVEL2

Configuration settings
LoggerBuf.level2Mask = Bits16 0;
DETAILS
See 'level4Mask' for details.
C SYNOPSIS
LoggerBuf_level2Mask
config LoggerBuf.level3Mask // module-wide
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Mask of diags categories whose initial filtering level is Diags.LEVEL3

Configuration settings
LoggerBuf.level3Mask = Bits16 0;
DETAILS
See 'level4Mask' for details.
C SYNOPSIS
LoggerBuf_level3Mask
config LoggerBuf.level4Mask // module-wide
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Mask of diags categories whose initial filtering level is Diags.LEVEL4

Configuration settings
LoggerBuf.level4Mask = Bits16 Diags.ALL_LOGGING;
DETAILS
If IFilterLogger.filterByLevel is true, then all LoggerBuf instances will filter incoming events based on their event level.
The LoggerBuf module allows for specifying a different filter level for every Diags bit. These filtering levels are module wide; LoggerBuf does not support specifying the levels on a per-instance basis.
The IFilterLogger.setFilterLevel function can be used to change the filtering levels at runtime.
The default filtering levels are assigned using the level1Mask - level4Mask config parameters. These are used to specify, for each of the four event levels, the set of bits which should filter at that level by default.
The default filtering configuration sets the filter level to Diags.LEVEL4 for all logging-related diags bits so that all events are logged by default.
C SYNOPSIS
LoggerBuf_level4Mask
config LoggerBuf.statusLogger // module-wide
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Route all 'STATUS' (error and warning) events to this logger

Configuration settings
LoggerBuf.statusLogger = ILogger.Handle null;
DETAILS
If a statusLogger is specified, all LoggerBuf instances will check to determine if any of the events they receive are errors or warnings (if their diags mask includes the STATUS category), and will log these events to the statusLogger.
Error events are infrequent, but it's generally critical that they be seen. In a typical system, non-error events easily outnumber any error events, and the logger is likely to wrap, overwriting any error events. To protect these events from being overwritten and lost, they can be sent to their own separate logger to preserve them.
The default value is null, indicating that the STATUS events will just be logged by the logger they were sent to.
C SYNOPSIS
LoggerBuf_statusLogger
metaonly config LoggerBuf.common$ // module-wide
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Common module configuration parameters

Configuration settings
LoggerBuf.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly LoggerBuf.getMetaArgs() // module-wide
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Returns any meta data needed to support RTA

Configuration settings
LoggerBuf.getMetaArgs(Any inst, Any instNum) returns Any
DETAILS
This meta data should be returned in the form of a structure which can be converted into XML. This data is added to the RTA XML file during the application's configuration, and can be accessed later through the xdc.rta.MetaData module.
The MetaData is returned per instance of the ILogger module. The instance object is passed to the function as the first argument.
The second argument is the index of the instance in the list of the ILogger's static instances.
Instance Config Parameters
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Configuration settings
var params = new LoggerBuf.Params;
// Instance config-params object
    params.bufHeap = IHeap.Handle null;
    // The heap that contains the Log buffer for dynamic instances
    params.bufSection = String null;
    // Section name for the buffer managed by the static instance
    params.bufType = LoggerBuf.BufType LoggerBuf.BufType_CIRCULAR;
    // Log buffer type
    params.exitFlush = Bool false;
    // Flush log at system exit
    params.numEntries = UInt 64;
    // Number of entries in buffer
config LoggerBuf.Params.bufHeap // instance
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The heap that contains the Log buffer for dynamic instances

Configuration settings
var params = new LoggerBuf.Params;
...
params.bufHeap = IHeap.Handle null;
DETAILS
The default value null means the buffer will be allocated from the Memory.defaultHeapInstance heap.
C SYNOPSIS
LoggerBuf_Params.bufHeap
config LoggerBuf.Params.bufType // instance
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Log buffer type

Configuration settings
var params = new LoggerBuf.Params;
...
params.bufType = LoggerBuf.BufType LoggerBuf.BufType_CIRCULAR;
C SYNOPSIS
LoggerBuf_Params.bufType
config LoggerBuf.Params.exitFlush // instance
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Flush log at system exit

Configuration settings
var params = new LoggerBuf.Params;
...
params.exitFlush = Bool false;
DETAILS
Only used when module parameter enableFlush is true.
C SYNOPSIS
LoggerBuf_Params.exitFlush
config LoggerBuf.Params.numEntries // instance
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Number of entries in buffer

Configuration settings
var params = new LoggerBuf.Params;
...
params.numEntries = UInt 64;
DETAILS
Each entry is large enough to store one Log event containing up to 4 optional arguments. Events containing more than 4 arguments (such as those from Log.write5) use 2 entries.
numEntries must be a power of 2.
C SYNOPSIS
LoggerBuf_Params.numEntries
metaonly config LoggerBuf.Params.bufSection // instance
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Section name for the buffer managed by the static instance

Configuration settings
var params = new LoggerBuf.Params;
...
params.bufSection = String null;
DETAILS
The default section is the 'dataSection' in the platform.
Static Instance Creation
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Configuration settings
var params = new LoggerBuf.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = LoggerBuf.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
SEE
LoggerBuf.Params
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.LoggerCallback
index URL

A logger that passes events to a user supplied callback function

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in xdc/runtime/LoggerCallback.xdc
#include <xdc/runtime/LoggerCallback.h>
Functions
Void | LoggerCallback_construct// Initialize a new instance object inside the provided structure(LoggerCallback_Struct *structP, const LoggerCallback_Params *params);
LoggerCallback_Handle | LoggerCallback_create// Allocate and initialize a new instance object and return its handle(const LoggerCallback_Params *params, Error_Block *eb);
UArg | LoggerCallback_defaultCreate// Default create function (always returns 0)(UArg); // linked as extern xdc_runtime_LoggerCallback_defaultCreate
Void | LoggerCallback_defaultOutput// Default output function (always does nothing)(UArg,Log_EventRec*,Int); // linked as extern xdc_runtime_LoggerCallback_defaultOutput
Void | LoggerCallback_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(LoggerCallback_Handle *handleP);
Void | LoggerCallback_destruct// Finalize the instance object inside the provided structure(LoggerCallback_Struct *structP);
Void | LoggerCallback_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(LoggerCallback_Params *params);
Functions common to all ILogger modules
Bool | LoggerCallback_disable// Disable a log(LoggerCallback_Handle handle);
Bool | LoggerCallback_enable// Enable a log(LoggerCallback_Handle handle);
Void | LoggerCallback_write0// Process a log event with 0 arguments(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid);
Void | LoggerCallback_write1// Process a log event with 1 arguments(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1);
Void | LoggerCallback_write2// Process a log event with 2 arguments(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
Void | LoggerCallback_write4// Process a log event with up to 4 arguments(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
Void | LoggerCallback_write8// Process a log event with up to 8 arguments(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
Functions common to all target instances
 | LoggerCallback_handle// Convert this instance structure pointer into an instance handle, LoggerCallback_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, LoggerCallback_Handle_label// The label associated with this instance object, LoggerCallback_Handle_name// The name of this instance object, LoggerCallback_Handle_upCast// unconditionally move one level up the inheritance hierarchy, LoggerCallback_Object_count// The number of statically-created instance objects, LoggerCallback_Object_first// The handle of the first dynamically-created instance object, or NULL, LoggerCallback_Object_get// The handle of the i-th statically-created instance object (array == NULL), LoggerCallback_Object_heap// The heap used to allocate dynamically-created instance objects, LoggerCallback_Object_next// The handle of the next dynamically-created instance object, or NULL, LoggerCallback_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | LoggerCallback_Module_getMask// Returns the diagnostics mask for this module, LoggerCallback_Module_hasMask// Test whether this module has a diagnostics mask, LoggerCallback_Module_heap// The heap from which this module allocates memory, LoggerCallback_Module_id// Get this module's unique id, LoggerCallback_Module_setMask// Set the diagnostics mask for this module, LoggerCallback_Module_startupDone// Test if this module has completed startup
Typedefs
typedef UArg | (*LoggerCallback_CreateInstFxn// Logger instance create callback function signature)(UArg);
typedef LoggerCallback_Object * | LoggerCallback_Handle// Client reference to an instance object;
typedef struct | LoggerCallback_Object// Opaque internal representation of an instance object LoggerCallback_Object;
typedef Void | (*LoggerCallback_OutputFxn// Character output callback function signature)(UArg,Log_EventRec*,Int);
typedef struct | LoggerCallback_Params// Instance config-params structure ...
typedef struct | LoggerCallback_Struct// Opaque client structure large enough to hold an instance object LoggerCallback_Struct;
Constants
extern const LoggerCallback_CreateInstFxn | LoggerCallback_createInstFxn// User supplied logger instance create function;
extern const LoggerCallback_OutputFxn | LoggerCallback_outputFxn// User supplied character callback function;
EXAMPLES
Configuration example: The following XDC configuration statements create a logger instance, plug in the user defined functions, assign it as the default logger for all modules, and enable USER1 logging in all modules of the package my.pkg. See the Diags.setMaskMeta() function for details on specifying the module names.
  var Defaults = xdc.useModule('xdc.runtime.Defaults');
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var LoggerCallback = xdc.useModule('xdc.runtime.LoggerCallback');
  LoggerCallback.outputFxn = "&userOutputFunc";
  LoggerCallback.createInstFxn = "&userCreateInstFunc";

  var loggerParams = new Logger.Params();
  loggerParams.arg = 1;
  Defaults.common$.logger = LoggerCallback.create(loggerParams);
  Diags.setMaskMeta("my.pkg.%", Diags.USER1, Diags.RUNTIME_ON);
typedef LoggerCallback_CreateInstFxn
index URL

Logger instance create callback function signature

C synopsis target-domain
typedef UArg (*LoggerCallback_CreateInstFxn)(UArg);
DETAILS
LoggerCallback.arg is passed as an argument to this function. The return value from this function will be passed as an argument to the outputFxn. In case of multiple LoggerCallback instances, the return value can be used in outputFxn to differentiate among the instances.
typedef LoggerCallback_OutputFxn
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Character output callback function signature

C synopsis target-domain
typedef Void (*LoggerCallback_OutputFxn)(UArg,Log_EventRec*,Int);
DETAILS
The first argument is the parameter returned by the call to createInstFxn. The second argument is a pointer to Log.EventRec record. The third argument is the number of arguments inLog.EventRec
Note: Only evt and arg fields in Log_EventRec record are filled and passed to the user supplied function.
config LoggerCallback_createInstFxn // module-wide
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User supplied logger instance create function

C synopsis target-domain
extern const LoggerCallback_CreateInstFxn LoggerCallback_createInstFxn;
DETAILS
This function is called when the LoggerCallback.create is called.
By default, this function is configured with a default create function. The default create function always returns 0.
config LoggerCallback_outputFxn // module-wide
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User supplied character callback function

C synopsis target-domain
extern const LoggerCallback_OutputFxn LoggerCallback_outputFxn;
DETAILS
This function is called when the Log module needs to output an event. e.g. Log.write4() or Log.print2()
By default, this function is configured with a default output function. The default function does nothing and returns.
extern LoggerCallback_defaultCreate
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Default create function (always returns 0)

C synopsis target-domain
UArg LoggerCallback_defaultCreate(UArg); // linked as extern xdc_runtime_LoggerCallback_defaultCreate
extern LoggerCallback_defaultOutput
index URL

Default output function (always does nothing)

C synopsis target-domain
Void LoggerCallback_defaultOutput(UArg,Log_EventRec*,Int); // linked as extern xdc_runtime_LoggerCallback_defaultOutput
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId LoggerCallback_Module_id();
// Get this module's unique id
Bool LoggerCallback_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle LoggerCallback_Module_heap();
// The heap from which this module allocates memory
Bool LoggerCallback_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 LoggerCallback_Module_getMask();
// Returns the diagnostics mask for this module
Void LoggerCallback_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct LoggerCallback_Object LoggerCallback_Object;
// Opaque internal representation of an instance object
typedef LoggerCallback_Object *LoggerCallback_Handle;
// Client reference to an instance object
typedef struct LoggerCallback_Struct LoggerCallback_Struct;
// Opaque client structure large enough to hold an instance object
LoggerCallback_Handle LoggerCallback_handle(LoggerCallback_Struct *structP);
// Convert this instance structure pointer into an instance handle
LoggerCallback_Struct *LoggerCallback_struct(LoggerCallback_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct LoggerCallback_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
    UArg arg;
    // User supplied argument for the user supplied create function
} LoggerCallback_Params;
Void LoggerCallback_Params_init(LoggerCallback_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config LoggerCallback_Params.arg // instance
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User supplied argument for the user supplied create function

C synopsis target-domain
struct LoggerCallback_Params {
     ...
    UArg arg;
DETAILS
This user supplied argument will be passed back as an argument to the createInstFxn function. It can be used by the LoggerCallback.createInstFxn function at runtime to differentiate between the multiple logger instances configured in the user config script.
The user can skip configuring this argument. In such a case, the default value 0 will be passed back as an argument to the createInstFxn function.
Runtime Instance Creation
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C synopsis target-domain
LoggerCallback_Handle LoggerCallback_create(const LoggerCallback_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void LoggerCallback_construct(LoggerCallback_Struct *structP, const LoggerCallback_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
Instance Deletion
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C synopsis target-domain
Void LoggerCallback_delete(LoggerCallback_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void LoggerCallback_destruct(LoggerCallback_Struct *structP);
// Finalize the instance object inside the provided structure
LoggerCallback_disable() // instance
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Disable a log

C synopsis target-domain
Bool LoggerCallback_disable(LoggerCallback_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerCallback instance object
DETAILS
Events written to a disabled log are silently discarded.
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
LoggerCallback_enable() // instance
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Enable a log

C synopsis target-domain
Bool LoggerCallback_enable(LoggerCallback_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerCallback instance object
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
LoggerCallback_write0() // instance
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Process a log event with 0 arguments

C synopsis target-domain
Void LoggerCallback_write0(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid);
ARGUMENTS
handle — handle of a previously-created LoggerCallback instance object
DETAILS
Same as write4 except with 0 arguments rather than 4.
SEE
ILogger.write4()
LoggerCallback_write1() // instance
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Process a log event with 1 arguments

C synopsis target-domain
Void LoggerCallback_write1(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1);
ARGUMENTS
handle — handle of a previously-created LoggerCallback instance object
DETAILS
Same as write4 except with 1 arguments rather than 4.
SEE
ILogger.write4()
LoggerCallback_write2() // instance
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Process a log event with 2 arguments

C synopsis target-domain
Void LoggerCallback_write2(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
ARGUMENTS
handle — handle of a previously-created LoggerCallback instance object
DETAILS
Same as write4 except with 2 arguments rather than 4.
SEE
ILogger.write4()
LoggerCallback_write4() // instance
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Process a log event with up to 4 arguments

C synopsis target-domain
Void LoggerCallback_write4(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
ARGUMENTS
handle — handle of a previously-created LoggerCallback instance object
evt — event to be logged
mid — module ID of the module which logged the event
a1 — arbitrary argument passed by caller
DETAILS
The evt argument is of type Log.Event, which encodes the Log.EventId, the Diags.Mask, and the Diags.EventLevel of the event. The event ID can be obtained via Types.getEventId(evt), the Diags mask can be obtained via Diags.getMask(evt), and the event level can be obtained via Diags.getLevel(evt).
The modId argument is the module ID of the module that logged the event.
The event information can be used by the logger to handle different events specially. For example, the event ID can be used to compare against other known Log.Events.
      if (Log_getEventId(MY_EVENT) == Log_getEventId(evt)) {
          :
      }
The Diags mask and event level can be used for filtering of events based on event level (see IFilterLogger), or even routing events to separate loggers based on diags category (see, for example, LoggerBuf.statusLogger).
The Diags mask and event level are useful for handling the event, but are generally not recorded by the logger because they are not needed in decoding and displaying the event. A more suitable value to record is a Types.Event, which encodes the event ID and module ID. For example, the Log.EventRec type stores a Types.Event in its record definition. A Types.Event can be created using the Types.makeEvent API given the event ID and module ID.
The event ID value of 0 is used to indicate an event triggered by a call to one of the Log_print[0-6] methods. These methods take a format string rather than a Log_Event argument and, as a result, the event ID encoded in evt is 0 and the parameter a1 is the format string.
Non-zero event IDs can also be used to access the msg string associated with the Log.EventDesc that originally defined the Log event.
      Log_EventId id = Log_getEventId(evt));
      if (id != 0) {
          String msg = Text_ropeText(id);
          System_aprintf(msg, a1, a2, a3, a4);
      }
This works because an event's ID is simply an offset into a table of characters (maintained by the Text module) containing the event's msg string.
The arguments a1, a2, etc. are parameters that are to be interpreted according to the message format string associated with evt.
SEE
Log.Event, Log.EventDesc, Text.ropeText, Log.getEventId
LoggerCallback_write8() // instance
index URL

Process a log event with up to 8 arguments

C synopsis target-domain
Void LoggerCallback_write8(LoggerCallback_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
ARGUMENTS
handle — handle of a previously-created LoggerCallback instance object
DETAILS
Same as write4 except with 8 arguments rather than 4.
SEE
ILogger.write4()
Instance Convertors
index URL

C synopsis target-domain
ILogger_Handle LoggerCallback_Handle_upCast(LoggerCallback_Handle handle);
// unconditionally move one level up the inheritance hierarchy
LoggerCallback_Handle LoggerCallback_Handle_downCast(ILogger_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
index URL

C synopsis target-domain
Int LoggerCallback_Object_count();
// The number of statically-created instance objects
LoggerCallback_Handle LoggerCallback_Object_get(LoggerCallback_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
LoggerCallback_Handle LoggerCallback_Object_first();
// The handle of the first dynamically-created instance object, or NULL
LoggerCallback_Handle LoggerCallback_Object_next(LoggerCallback_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle LoggerCallback_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *LoggerCallback_Handle_label(LoggerCallback_Handle handle, Types_Label *buf);
// The label associated with this instance object
String LoggerCallback_Handle_name(LoggerCallback_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/LoggerCallback.xdc
var LoggerCallback = xdc.useModule('xdc.runtime.LoggerCallback');
module-wide config parameters
     LoggerCallback.createInstFxn// User supplied logger instance create function = UArg(*)(UArg) "&xdc_runtime_LoggerCallback_defaultCreate";
     LoggerCallback.outputFxn// User supplied character callback function = Void(*)(UArg,Log.EventRec*,Int) "&xdc_runtime_LoggerCallback_defaultOutput";
     LoggerCallback.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     LoggerCallback.getMetaArgs// Returns any meta data needed to support RTA(Any inst, Any instNum) returns Any
per-instance config parameters
    var params = new LoggerCallback.Params// Instance config-params object;
        params.arg// User supplied argument for the user supplied create function = UArg 0;
per-instance creation
    var inst = LoggerCallback.create// Create an instance-object(params);
config LoggerCallback.createInstFxn // module-wide
index URL

User supplied logger instance create function

Configuration settings
LoggerCallback.createInstFxn = UArg(*)(UArg) "&xdc_runtime_LoggerCallback_defaultCreate";
DETAILS
This function is called when the LoggerCallback.create is called.
By default, this function is configured with a default create function. The default create function always returns 0.
C SYNOPSIS
LoggerCallback_createInstFxn
config LoggerCallback.outputFxn // module-wide
index URL

User supplied character callback function

Configuration settings
LoggerCallback.outputFxn = Void(*)(UArg,Log.EventRec*,Int) "&xdc_runtime_LoggerCallback_defaultOutput";
DETAILS
This function is called when the Log module needs to output an event. e.g. Log.write4() or Log.print2()
By default, this function is configured with a default output function. The default function does nothing and returns.
C SYNOPSIS
LoggerCallback_outputFxn
metaonly config LoggerCallback.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
LoggerCallback.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly LoggerCallback.getMetaArgs() // module-wide
index URL

Returns any meta data needed to support RTA

Configuration settings
LoggerCallback.getMetaArgs(Any inst, Any instNum) returns Any
DETAILS
This meta data should be returned in the form of a structure which can be converted into XML. This data is added to the RTA XML file during the application's configuration, and can be accessed later through the xdc.rta.MetaData module.
The MetaData is returned per instance of the ILogger module. The instance object is passed to the function as the first argument.
The second argument is the index of the instance in the list of the ILogger's static instances.
Instance Config Parameters
index URL

Configuration settings
var params = new LoggerCallback.Params;
// Instance config-params object
    params.arg = UArg 0;
    // User supplied argument for the user supplied create function
config LoggerCallback.Params.arg // instance
index URL

User supplied argument for the user supplied create function

Configuration settings
var params = new LoggerCallback.Params;
...
params.arg = UArg 0;
DETAILS
This user supplied argument will be passed back as an argument to the createInstFxn function. It can be used by the LoggerCallback.createInstFxn function at runtime to differentiate between the multiple logger instances configured in the user config script.
The user can skip configuring this argument. In such a case, the default value 0 will be passed back as an argument to the createInstFxn function.
C SYNOPSIS
LoggerCallback_Params.arg
Static Instance Creation
index URL

Configuration settings
var params = new LoggerCallback.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = LoggerCallback.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.LoggerSys
index URL

A logger which routes events to the System_printf function

  • C synopsis
  • Individual elements
  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
This logger processes log events as they are generated and routes them through the System_printf() function. The final disposition of the log event is dependent on which system provider has been assigned to the System.SupportProxy configuration parameter. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/LoggerSys.xdc
#include <xdc/runtime/LoggerSys.h>
Functions
Void | LoggerSys_construct// Initialize a new instance object inside the provided structure(LoggerSys_Struct *structP, const LoggerSys_Params *params);
LoggerSys_Handle | LoggerSys_create// Allocate and initialize a new instance object and return its handle(const LoggerSys_Params *params, Error_Block *eb);
Void | LoggerSys_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(LoggerSys_Handle *handleP);
Void | LoggerSys_destruct// Finalize the instance object inside the provided structure(LoggerSys_Struct *structP);
Void | LoggerSys_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(LoggerSys_Params *params);
Functions common to all ILogger modules
Bool | LoggerSys_disable// Disable a log(LoggerSys_Handle handle);
Bool | LoggerSys_enable// Enable a log(LoggerSys_Handle handle);
Void | LoggerSys_write0// Process a log event with 0 arguments(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid);
Void | LoggerSys_write1// Process a log event with 1 arguments(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1);
Void | LoggerSys_write2// Process a log event with 2 arguments(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
Void | LoggerSys_write4// Process a log event with up to 4 arguments(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
Void | LoggerSys_write8// Process a log event with up to 8 arguments(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
Functions common to all target instances
 | LoggerSys_handle// Convert this instance structure pointer into an instance handle, LoggerSys_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, LoggerSys_Handle_label// The label associated with this instance object, LoggerSys_Handle_name// The name of this instance object, LoggerSys_Handle_upCast// unconditionally move one level up the inheritance hierarchy, LoggerSys_Object_count// The number of statically-created instance objects, LoggerSys_Object_first// The handle of the first dynamically-created instance object, or NULL, LoggerSys_Object_get// The handle of the i-th statically-created instance object (array == NULL), LoggerSys_Object_heap// The heap used to allocate dynamically-created instance objects, LoggerSys_Object_next// The handle of the next dynamically-created instance object, or NULL, LoggerSys_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | LoggerSys_Module_getMask// Returns the diagnostics mask for this module, LoggerSys_Module_hasMask// Test whether this module has a diagnostics mask, LoggerSys_Module_heap// The heap from which this module allocates memory, LoggerSys_Module_id// Get this module's unique id, LoggerSys_Module_setMask// Set the diagnostics mask for this module, LoggerSys_Module_startupDone// Test if this module has completed startup
Typedefs
typedef LoggerSys_Object * | LoggerSys_Handle// Client reference to an instance object;
typedef struct | LoggerSys_Object// Opaque internal representation of an instance object LoggerSys_Object;
typedef struct | LoggerSys_Params// Instance config-params structure ...
typedef struct | LoggerSys_Struct// Opaque client structure large enough to hold an instance object LoggerSys_Struct;
DETAILS
This logger processes log events as they are generated and routes them through the System_printf() function. The final disposition of the log event is dependent on which system provider has been assigned to the System.SupportProxy configuration parameter.
Note that the log events are processed within the runtime context of the Log_write() or Log_print() function that generated the event. It is important to account for the processing overhead and stack usage imposed on the runtime context. The cost of this processing is defined by the implementation of the system provider.
EXAMPLES
Configuration example: The following XDC configuration statements create a logger instance, assign it as the default logger for all modules, and enable USER1 logging in all modules of the package my.pkg. See the Diags.setMaskMeta() function for details on specifying the module names.
  var Defaults = xdc.useModule('xdc.runtime.Defaults');
  var Diags = xdc.useModule('xdc.runtime.Diags');
  var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');

  var LoggerSysParams = new LoggerSys.Params();
  Defaults.common$.logger = LoggerSys.create(LoggerSysParams);
  Diags.setMaskMeta("my.pkg.%", Diags.USER1, Diags.RUNTIME_ON);
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId LoggerSys_Module_id();
// Get this module's unique id
Bool LoggerSys_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle LoggerSys_Module_heap();
// The heap from which this module allocates memory
Bool LoggerSys_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 LoggerSys_Module_getMask();
// Returns the diagnostics mask for this module
Void LoggerSys_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct LoggerSys_Object LoggerSys_Object;
// Opaque internal representation of an instance object
typedef LoggerSys_Object *LoggerSys_Handle;
// Client reference to an instance object
typedef struct LoggerSys_Struct LoggerSys_Struct;
// Opaque client structure large enough to hold an instance object
LoggerSys_Handle LoggerSys_handle(LoggerSys_Struct *structP);
// Convert this instance structure pointer into an instance handle
LoggerSys_Struct *LoggerSys_struct(LoggerSys_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
index URL

C synopsis target-domain
typedef struct LoggerSys_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
} LoggerSys_Params;
Void LoggerSys_Params_init(LoggerSys_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
Runtime Instance Creation
index URL

C synopsis target-domain
LoggerSys_Handle LoggerSys_create(const LoggerSys_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void LoggerSys_construct(LoggerSys_Struct *structP, const LoggerSys_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
The logger instance will route all log events it receives to the System.printf function.
Instance Deletion
index URL

C synopsis target-domain
Void LoggerSys_delete(LoggerSys_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void LoggerSys_destruct(LoggerSys_Struct *structP);
// Finalize the instance object inside the provided structure
LoggerSys_disable() // instance
index URL

Disable a log

C synopsis target-domain
Bool LoggerSys_disable(LoggerSys_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerSys instance object
DETAILS
Events written to a disabled log are silently discarded.
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
LoggerSys_enable() // instance
index URL

Enable a log

C synopsis target-domain
Bool LoggerSys_enable(LoggerSys_Handle handle);
ARGUMENTS
handle — handle of a previously-created LoggerSys instance object
RETURNS
The function returns the state of the log (TRUE if enabled, FALSE if disabled) before the call. This return value allows clients to restore the previous state. Note: not thread safe.
LoggerSys_write0() // instance
index URL

Process a log event with 0 arguments

C synopsis target-domain
Void LoggerSys_write0(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid);
ARGUMENTS
handle — handle of a previously-created LoggerSys instance object
DETAILS
Same as write4 except with 0 arguments rather than 4.
SEE
ILogger.write4()
LoggerSys_write1() // instance
index URL

Process a log event with 1 arguments

C synopsis target-domain
Void LoggerSys_write1(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1);
ARGUMENTS
handle — handle of a previously-created LoggerSys instance object
DETAILS
Same as write4 except with 1 arguments rather than 4.
SEE
ILogger.write4()
LoggerSys_write2() // instance
index URL

Process a log event with 2 arguments

C synopsis target-domain
Void LoggerSys_write2(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2);
ARGUMENTS
handle — handle of a previously-created LoggerSys instance object
DETAILS
Same as write4 except with 2 arguments rather than 4.
SEE
ILogger.write4()
LoggerSys_write4() // instance
index URL

Process a log event with up to 4 arguments

C synopsis target-domain
Void LoggerSys_write4(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4);
ARGUMENTS
handle — handle of a previously-created LoggerSys instance object
evt — event to be logged
mid — module ID of the module which logged the event
a1 — arbitrary argument passed by caller
DETAILS
The evt argument is of type Log.Event, which encodes the Log.EventId, the Diags.Mask, and the Diags.EventLevel of the event. The event ID can be obtained via Types.getEventId(evt), the Diags mask can be obtained via Diags.getMask(evt), and the event level can be obtained via Diags.getLevel(evt).
The modId argument is the module ID of the module that logged the event.
The event information can be used by the logger to handle different events specially. For example, the event ID can be used to compare against other known Log.Events.
      if (Log_getEventId(MY_EVENT) == Log_getEventId(evt)) {
          :
      }
The Diags mask and event level can be used for filtering of events based on event level (see IFilterLogger), or even routing events to separate loggers based on diags category (see, for example, LoggerBuf.statusLogger).
The Diags mask and event level are useful for handling the event, but are generally not recorded by the logger because they are not needed in decoding and displaying the event. A more suitable value to record is a Types.Event, which encodes the event ID and module ID. For example, the Log.EventRec type stores a Types.Event in its record definition. A Types.Event can be created using the Types.makeEvent API given the event ID and module ID.
The event ID value of 0 is used to indicate an event triggered by a call to one of the Log_print[0-6] methods. These methods take a format string rather than a Log_Event argument and, as a result, the event ID encoded in evt is 0 and the parameter a1 is the format string.
Non-zero event IDs can also be used to access the msg string associated with the Log.EventDesc that originally defined the Log event.
      Log_EventId id = Log_getEventId(evt));
      if (id != 0) {
          String msg = Text_ropeText(id);
          System_aprintf(msg, a1, a2, a3, a4);
      }
This works because an event's ID is simply an offset into a table of characters (maintained by the Text module) containing the event's msg string.
The arguments a1, a2, etc. are parameters that are to be interpreted according to the message format string associated with evt.
SEE
Log.Event, Log.EventDesc, Text.ropeText, Log.getEventId
LoggerSys_write8() // instance
index URL

Process a log event with up to 8 arguments

C synopsis target-domain
Void LoggerSys_write8(LoggerSys_Handle handle, Log_Event evt, Types_ModuleId mid, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
ARGUMENTS
handle — handle of a previously-created LoggerSys instance object
DETAILS
Same as write4 except with 8 arguments rather than 4.
SEE
ILogger.write4()
Instance Convertors
index URL

C synopsis target-domain
ILogger_Handle LoggerSys_Handle_upCast(LoggerSys_Handle handle);
// unconditionally move one level up the inheritance hierarchy
LoggerSys_Handle LoggerSys_Handle_downCast(ILogger_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
index URL

C synopsis target-domain
Int LoggerSys_Object_count();
// The number of statically-created instance objects
LoggerSys_Handle LoggerSys_Object_get(LoggerSys_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
LoggerSys_Handle LoggerSys_Object_first();
// The handle of the first dynamically-created instance object, or NULL
LoggerSys_Handle LoggerSys_Object_next(LoggerSys_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle LoggerSys_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *LoggerSys_Handle_label(LoggerSys_Handle handle, Types_Label *buf);
// The label associated with this instance object
String LoggerSys_Handle_name(LoggerSys_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/LoggerSys.xdc
var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
local proxy modules
     LoggerSys.TimestampProxy// User supplied time-stamp proxy = ITimestampClient.Module null
         LoggerSys.TimestampProxy.delegate$ = ITimestampClient.Module null
module-wide config parameters
     LoggerSys.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     LoggerSys.getMetaArgs// Returns any meta data needed to support RTA(Any inst, Any instNum) returns Any
per-instance config parameters
    var params = new LoggerSys.Params// Instance config-params object;
per-instance creation
    var inst = LoggerSys.create// Create an instance-object(params);
proxy LoggerSys.TimestampProxy
index URL

User supplied time-stamp proxy

Configuration settings
LoggerSys.TimestampProxy = ITimestampClient.Module null
// some delegate module inheriting the ITimestampClient interface
    LoggerSys.TimestampProxy.delegate$ = ITimestampClient.Module null
    // explicit access to the currently bound delegate module
DETAILS
This proxy allows LoggerSys to use a timestamp server different from the server used by xdc.runtime.Timestamp. However, if not supplied by a user, this proxy defaults to whichever timestamp server is used by Timestamp.
metaonly config LoggerSys.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
LoggerSys.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly LoggerSys.getMetaArgs() // module-wide
index URL

Returns any meta data needed to support RTA

Configuration settings
LoggerSys.getMetaArgs(Any inst, Any instNum) returns Any
DETAILS
This meta data should be returned in the form of a structure which can be converted into XML. This data is added to the RTA XML file during the application's configuration, and can be accessed later through the xdc.rta.MetaData module.
The MetaData is returned per instance of the ILogger module. The instance object is passed to the function as the first argument.
The second argument is the index of the instance in the list of the ILogger's static instances.
Instance Config Parameters
index URL

Configuration settings
var params = new LoggerSys.Params;
// Instance config-params object
Static Instance Creation
index URL

Configuration settings
var params = new LoggerSys.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = LoggerSys.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
The logger instance will route all log events it receives to the System.printf function.
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.Main
index URL

Configuration "stand-in" for application code

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module is used to enable "module" configuration of application code that is not part of a module. Configuration of this Main module is used for all code not in a module. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Main.xdc
#include <xdc/runtime/Main.h>
Functions common to all target modules
Main_Module_getMask// Returns the diagnostics mask for this module, Main_Module_hasMask// Test whether this module has a diagnostics mask, Main_Module_heap// The heap from which this module allocates memory, Main_Module_id// Get this module's unique id, Main_Module_setMask// Set the diagnostics mask for this module, Main_Module_startupDone// Test if this module has completed startup
DETAILS
This module is used to enable "module" configuration of application code that is not part of a module. Configuration of this Main module is used for all code not in a module.
For example, an ILogger "service provider" for all code that is not in a RTSC module can be configured by setting this module's logger; when code that is not in a module calls Log_print(), for example, this module's ILogger handles the event.
Since this module is "gated", the user can also assign a gate to this module for use by any code that is not in a module. This gate can be used to serialize access to global data by multiple threads in the system.
      #include <xdc/runtime/Main.h>
      #include <xdc/runtime/Gate.h>
          :
      int global = 0;
      int main() {
          :       // create a bunch of threads
      }

      void thread() {
          IArg key = Gate_enterModule();  // enter critical section
          global++;                       // safely update global data
          Gate_leaveModule(key);          // leave critical section
      }
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Main_Module_id();
// Get this module's unique id
Bool Main_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Main_Module_heap();
// The heap from which this module allocates memory
Bool Main_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Main_Module_getMask();
// Returns the diagnostics mask for this module
Void Main_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Main.xdc
var Main = xdc.useModule('xdc.runtime.Main');
module-wide config parameters
     Main.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config Main.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Main.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.Memory
index URL

Static and run-time memory manager

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
All memory allocations are performed either by
  Memory.staticPlace() at build time or through
  Memory_alloc() (or its varients Memory_calloc(),
  Memory_valloc(), etc.) at run-time.
[ more ... ]
C synopsis target-domain sourced in xdc/runtime/Memory.xdc
#include <xdc/runtime/Memory.h>
Functions
Ptr | Memory_alloc// Allocate a block of memory from a heap(IHeap_Handle heap, SizeT size, SizeT align, Error_Block *eb);
Ptr | Memory_calloc// Allocate a block of memory from a heap and zero out the contents(IHeap_Handle heap, SizeT size, SizeT align, Error_Block *eb);
Void | Memory_free// Frees the space if the heap manager offers such functionality(IHeap_Handle heap, Ptr block, SizeT size);
SizeT | Memory_getMaxDefaultTypeAlign// Return the largest alignment required by the target();
Void | Memory_getStats// Obtain statistics from a heap(IHeap_Handle heap, Memory_Stats *stats);
Bool | Memory_query// Test for a particular xdc.runtime.IHeap quality(IHeap_Handle heap, Int qual);
Ptr | Memory_valloc// Allocate a block of memory from a heap and initialize the contents to the value specified(IHeap_Handle heap, SizeT size, SizeT align, Char value, Error_Block *eb);
Functions common to all target modules
 | Memory_Module_getMask// Returns the diagnostics mask for this module, Memory_Module_hasMask// Test whether this module has a diagnostics mask, Memory_Module_heap// The heap from which this module allocates memory, Memory_Module_id// Get this module's unique id, Memory_Module_setMask// Set the diagnostics mask for this module, Memory_Module_startupDone// Test if this module has completed startup
Defines
#define | Memory_Q_BLOCKING// Blocking quality (Int)1
Typedefs
typedef UArg | Memory_Size// Type to be used to specify heap buffer sizes;
typedef struct | Memory_Stats// Memory heap statistics ...
Constants
extern const IHeap_Handle | Memory_defaultHeapInstance// The default heap;
DETAILS
All memory allocations are performed either by
  Memory.staticPlace() at build time or through
  Memory_alloc() (or its varients Memory_calloc(),
  Memory_valloc(), etc.) at run-time.
Run-time memory management is performed by modules that implement the xdc.runtime.IHeap interface. The Memory module itself simply provides a common interface for any variety of system and application specific memory management policies implemented by IHeap modules; for example, HeadStd and HeadMin.
Heap instances are created statically or dynamically via heap specific create functions and these instances are then passed as an input parameter to the Memory calls that have a xdc.runtime.IHeap.Handle parameter.
const Memory_Q_BLOCKING
index URL

Blocking quality

C synopsis target-domain
#define Memory_Q_BLOCKING (Int)1
DETAILS
xdc.runtime.IHeaps with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
typedef Memory_Size
index URL

Type to be used to specify heap buffer sizes

C synopsis target-domain
typedef UArg Memory_Size;
struct Memory_Stats
index URL

Memory heap statistics

C synopsis target-domain
typedef struct Memory_Stats {
     Memory_Size totalSize;
     Memory_Size totalFreeSize;
     Memory_Size largestFreeSize;
} Memory_Stats;
FIELDS
totalSize — total size (in MADUs) of heap.
totalFreeSize — current size (in MADUs) of free memory in the heap
largestFreeSize — current largest contiguous free block (in MADUs)
DETAILS
This structure defines generic statistics that must be supplied by each module that implements the xdc.runtime.IHeap interface.
config Memory_defaultHeapInstance // module-wide
index URL

The default heap

C synopsis target-domain
extern const IHeap_Handle Memory_defaultHeapInstance;
DETAILS
If no heap is specified in the Memory module's methods (i.e. heap == NULL) defaultHeapInstance is used. If defaultHeapInstance is not set (or set to null), a xdc.runtime.HeapStd heap instance is created and assigned to this configuration parameter. The size of the heap is determined by the xdc.runtime.HeapStd.HEAP_MAX parameter.
By default, all modules are configured with a null instance heap. Instances created by modules with a null instance heap are allocated from the defaultHeapInstance heap.
Memory_alloc() // module-wide
index URL

Allocate a block of memory from a heap

C synopsis target-domain
Ptr Memory_alloc(IHeap_Handle heap, SizeT size, SizeT align, Error_Block *eb);
ARGUMENTS
heap — heap from which the memory is allocated
The heap is created by a module that implements the xdc.runtime.IHeap interface. If heap is NULL, the defaultHeapInstance is used.
size — requested memory block size (in MADUs)
align — alignment (in MADUs) of the block of memory
A value of 0 denotes maximum default type alignment.
eb — pointer to error block
RETURNS
If the allocation was successful, Memory_alloc() returns non-NULL pointer to the allocated and uninitialized block; otherwise it returns NULL and the error block will indicate the cause of the error.
Memory_calloc() // module-wide
index URL

Allocate a block of memory from a heap and zero out the contents

C synopsis target-domain
Ptr Memory_calloc(IHeap_Handle heap, SizeT size, SizeT align, Error_Block *eb);
ARGUMENTS
heap — heap from which the memory is allocated
The heap is created by a module that implements the xdc.runtime.IHeap interface. If heap is NULL, the defaultHeapInstance is used.
size — requested memory block size (in MADUs)
align — alignment (in MADUs) of the block of memory
A value of 0 denotes maximum default type alignment.
eb — pointer to error block
RETURNS
If the allocation was successful, Memory_calloc() returns non-NULL pointer to the allocated and initialized block; otherwise it returns NULL and the error block will indicate the cause of the error.
Memory_free() // module-wide
index URL

Frees the space if the heap manager offers such functionality

C synopsis target-domain
Void Memory_free(IHeap_Handle heap, Ptr block, SizeT size);
ARGUMENTS
heap — heap that the block of memory will be freed back to.
The heap is created by a module that implements the xdc.runtime.IHeap interface. If heap is NULL, the defaultHeapInstance is used.
block — block of memory to free back to the heap
size — size (in MADUs) of the block of memory to free.
Memory_getMaxDefaultTypeAlign() // module-wide
index URL

Return the largest alignment required by the target

C synopsis target-domain
SizeT Memory_getMaxDefaultTypeAlign();
DETAILS
getMaxDefaultTypeAlign returns the largest alignment required for all the standard base types supported by the current configuration's target (Program.build.target)
This is the runtime version of the getMaxDefaultTypeAlignMeta function.
RETURNS
Returns target-specific alignment in MADUs.
SEE
getMaxDefaultTypeAlignMeta
Memory_getStats() // module-wide
index URL

Obtain statistics from a heap

C synopsis target-domain
Void Memory_getStats(IHeap_Handle heap, Memory_Stats *stats);
ARGUMENTS
heap — the heap to get the statistics from
The heap is created by a module that implements the xdc.runtime.IHeap interface. If heap is NULL, the defaultHeapInstance is used.
stats — the output buffer for the returned statistics
Memory_query() // module-wide
index URL

Test for a particular xdc.runtime.IHeap quality

C synopsis target-domain
Bool Memory_query(IHeap_Handle heap, Int qual);
ARGUMENTS
heap — the heap to query
The heap is created by a module that implements the xdc.runtime.IHeap interface. If heap is NULL, the defaultHeapInstance is queried
qual — quality to test
For example: Q_BLOCKING.
DETAILS
There currently is only one quality, namely Q_BLOCKING.
RETURNS
If heap has the qual quality, this method returns TRUE, otherwise it returns FALSE.
Memory_valloc() // module-wide
index URL

Allocate a block of memory from a heap and initialize the contents to the value specified

C synopsis target-domain
Ptr Memory_valloc(IHeap_Handle heap, SizeT size, SizeT align, Char value, Error_Block *eb);
ARGUMENTS
heap — heap from which the memory is allocated
The heap is created by a module that implements the xdc.runtime.IHeap interface. If heap is NULL, the defaultHeapInstance is used.
size — requested memory block size (in MADUs)
align — alignment (in MADUs) of the block of memory
A value of 0 denotes maximum default type alignment.
value — value to initialize the contents of the block
eb — pointer to error block
RETURNS
If the allocation was successful, Memory_valloc() returns non-NULL pointer to the allocated and initialized block; otherwise it returns NULL and the error block will indicate the cause of the error.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Memory_Module_id();
// Get this module's unique id
Bool Memory_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Memory_Module_heap();
// The heap from which this module allocates memory
Bool Memory_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Memory_Module_getMask();
// Returns the diagnostics mask for this module
Void Memory_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Memory.xdc
var Memory = xdc.useModule('xdc.runtime.Memory');
module-wide constants & types
    const Memory.Q_BLOCKING// Blocking quality = 1;
    var obj = new Memory.Stats// Memory heap statistics;
        obj.totalSize = UArg ...
        obj.totalFreeSize = UArg ...
        obj.largestFreeSize = UArg ...
module-wide config parameters
     Memory.defaultHeapInstance// The default heap = IHeap.Handle undefined;
     Memory.common$// Common module configuration parameters = Types.Common$ undefined;
     Memory.defaultHeapSize// The size (in target MADUs) of the defaultHeapInstance = Int 0x1000;
module-wide functions
     Memory.getMaxDefaultTypeAlignMeta// Return the largest alignment required by the target() returns SizeT
     Memory.staticPlace// Statically places buffers(Any obj, SizeT align, String section) returns Bool
const Memory.Q_BLOCKING
index URL

Blocking quality

Configuration settings
const Memory.Q_BLOCKING = 1;
DETAILS
xdc.runtime.IHeaps with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
C SYNOPSIS
Memory_Q_BLOCKING
struct Memory.Stats
index URL

Memory heap statistics

Configuration settings
var obj = new Memory.Stats;
    obj.totalSize = UArg ...
    obj.totalFreeSize = UArg ...
    obj.largestFreeSize = UArg ...
FIELDS
totalSize — total size (in MADUs) of heap.
totalFreeSize — current size (in MADUs) of free memory in the heap
largestFreeSize — current largest contiguous free block (in MADUs)
DETAILS
This structure defines generic statistics that must be supplied by each module that implements the xdc.runtime.IHeap interface.
C SYNOPSIS
Memory_Stats
config Memory.defaultHeapInstance // module-wide
index URL

The default heap

Configuration settings
Memory.defaultHeapInstance = IHeap.Handle undefined;
DETAILS
If no heap is specified in the Memory module's methods (i.e. heap == NULL) defaultHeapInstance is used. If defaultHeapInstance is not set (or set to null), a xdc.runtime.HeapStd heap instance is created and assigned to this configuration parameter. The size of the heap is determined by the xdc.runtime.HeapStd.HEAP_MAX parameter.
By default, all modules are configured with a null instance heap. Instances created by modules with a null instance heap are allocated from the defaultHeapInstance heap.
C SYNOPSIS
Memory_defaultHeapInstance
metaonly config Memory.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Memory.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly config Memory.defaultHeapSize // module-wide
index URL

The size (in target MADUs) of the defaultHeapInstance

Configuration settings
Memory.defaultHeapSize = Int 0x1000;
DETAILS
This parameters is used when the defaultHeapInstance is not configured.
metaonly Memory.getMaxDefaultTypeAlignMeta() // module-wide
index URL

Return the largest alignment required by the target

Configuration settings
Memory.getMaxDefaultTypeAlignMeta() returns SizeT
DETAILS
This method scans the standard base types supported by the current configuration's target (Program.build.target) and returns the largest alignment required for these types.
RETURNS
Returns target-specific alignment in MADUs.
SEE
xdc.bld.ITarget.stdTypes
metaonly Memory.staticPlace() // module-wide
index URL

Statically places buffers

Configuration settings
Memory.staticPlace(Any obj, SizeT align, String section) returns Bool
ARGUMENTS
obj — object to place
This object always has the length property; obj.length determines the size of the allocated buffer for obj
align — the alignment required by obj
section — section name to contain obj
This parameter names the section where obj will be placed. If this parameter is null, no explicit placement is done.
DETAILS
This function places the object specified by obj into the specified memory section. The section string is a target-specific name that is interpreted by the underlying target tool-chain. In the case of TI tool-chains, this section can be a subsection (e.g. ".data:someSection").
The amount of memory that is created for obj is dependent on its size and the value of the property length. The length (number of elements in an array) is set before the staticPlace() is called. For example, setting obj.length = 5; before calling staticPlace(), will create 5 * sizeof (obj) MADUs of memory.
If 0 is specified for the alignment, the allocated buffer is aligned as determined by the target toolchain. For instance, if obj is an array of structs that have only 16-bit integers, the alignment would be on a 16-bit boundary.
All non-zero alignments must be a power of 2. Not all targets support directives that allow one to specify alignment. The readonly config parameter Program.build.target.alignDirectiveSupported can be used to determine if the target supports alignment directives.
RETURNS
Returns false if the alignment request cannot be honored. The obj is still placed regardless of the return code.
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.Registry
index URL

Register modules that are not statically configured

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module provides a mechanism by which legacy C code can have its own module logging support, including having a name and its own diags mask. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Registry.xdc
#include <xdc/runtime/Registry.h>
Functions
Registry_Result | Registry_addModule// Add a runtime module to the registry with the specified name(Registry_Desc *desc, CString modName);
Registry_Desc * | Registry_findById// Find registered module's descriptor from its module ID(Types_ModuleId mid);
Registry_Desc * | Registry_findByName// Find the registered module with the given name(CString modName);
Bool | Registry_getMask// Get the specified module's diagnostic mask(CString name, Types_DiagsMask *mask);
Types_ModuleId | Registry_getModuleId// Get the module id associated with a specified module descriptor(Registry_Desc *desc);
CString | Registry_getModuleName// Get the module name associated with a specified module descriptor(Registry_Desc *desc);
Registry_Desc * | Registry_getNextModule// Scan the current list of registered modules(Registry_Desc *desc);
Bool | Registry_isMember// Determines if the specified module ID belongs to a registered module(Types_ModuleId mid);
Functions common to all target modules
 | Registry_Module_getMask// Returns the diagnostics mask for this module, Registry_Module_hasMask// Test whether this module has a diagnostics mask, Registry_Module_heap// The heap from which this module allocates memory, Registry_Module_id// Get this module's unique id, Registry_Module_setMask// Set the diagnostics mask for this module, Registry_Module_startupDone// Test if this module has completed startup
Typedefs
typedef Types_RegDesc | Registry_Desc// Registry module descriptor;
typedef enum | Registry_Result// Status codes ...
DETAILS
This module provides a mechanism by which legacy C code can have its own module logging support, including having a name and its own diags mask.
Without the Registry, all logging done by legacy C code is handled by the xdc.runtime.Main module. This means that all Log events will be marked as coming from "xdc.runtime.Main", and there is only a single diagnostics mask for the runtime control of logging across all legacy C code. The Registry module allows legacy C code to have the same granular control over logging as statically defined RTSC modules.
To use the Registry module, legacy code must define the symbol Registry_CURDESC to be the name of an externally declared Registery_Desc structure. This symbol must be defined before the inclusion of any xdc/runtime header files. If any xdc/runtime header files are included before the definition of this symbol, the Registry module may not function properly.
Note: by defining this symbol on the compile line, rather than in the file, one can easily compile code to be used in one of two environments:
  1. a fixed configuration environment where modules are registered via Registry_addModule(), or
  2. a "normal" configurable environment in which this code is assumed to be part of the Main module.
The Registry_Desc structure must then be registered by calling Registry_addModule(). The structure is typically registered and initialized within main().
For example:
  //Define the required symbol, Registry_CURDESC, to this file's
  //Registry_Desc object
  #define Registry_CURDESC    mainDesc
  #include <xdc/runtime/Registry.h>

  //Declare the Registry_Desc object, the name is unimportant
  Registry_Desc mainDesc;

  Int main(Int argc, String argv[]) {

  //Register this file as a module "main"
  Registry_addModule(&mainDesc, "main");
Once registered, the legacy code may call Log APIs without any other change and the formatted Log events will show as coming from the registered modules. Also, the logging by the legacy code is now filtered by its own diagnostic mask. The bits of this mask can be set using Diags_setMask.
Continuing the previous example:
  //Initialize the legacy code's diags mask to enable USER1.
  Diags_setMask("main=1");
  }
All events logged by registered modules will be sent to the logger configured for the Registry module. For example, to configure the logger for use by all modules managed by Registry:
  Registry.common$.logger = LoggerBuf.create();
Since the registered modules are not known until runtime, it is not possible to statically configure the diagnostics masks for individual registered modules. However, it is possible to configure diagnostics categories to be permanently off or on for ALL registered modules. This is done by configuring the diagnostic mask for the Registry module. Diagnostic categories set to Diags.ALWAYS_OFF will be permanently off for all Registry modules. Categories set to Diags.ALWAYS_ON will be permanently on for all modules managed by Registry.
In order to enable runtime configuration of individual Registry module masks, all relevant diagnostic categories must be set to Diags.RUNTIME_OFF or Diags.RUNTIME_ON in the Registry module's mask.
enum Registry_Result
index URL

Status codes

C synopsis target-domain
typedef enum Registry_Result {
    Registry_SUCCESS,
    // The module was added successfully
    Registry_ALLOC_FAILED,
    // reserved
    Registry_ALREADY_ADDED,
    // The module has already been added or another module with the same name is present
    Registry_ALL_IDS_USED
    // No more module ids available for new modules
} Registry_Result;
typedef Registry_Desc
index URL

Registry module descriptor

C synopsis target-domain
typedef Types_RegDesc Registry_Desc;
Registry_addModule() // module-wide
index URL

Add a runtime module to the registry with the specified name

C synopsis target-domain
Registry_Result Registry_addModule(Registry_Desc *desc, CString modName);
ARGUMENTS
desc — non-NULL pointer to a {#Desc Registry_Desc} structure.
modName — non-NULL string name of the module being registered.
DETAILS
The desc parameter and the modName string provided must both be permanent since the Registry will maintain references to both of these.
RETURNS
Registry_addModule returns one of the following Result status values indicating success or the cause of failure:
  • SUCCESS
  • ALREADY_ADDED
  • ALL_IDS_USED There are a total of 16,384 - 1 module ids available for use by Registry.
Registry_findById() // module-wide
index URL

Find registered module's descriptor from its module ID

C synopsis target-domain
Registry_Desc *Registry_findById(Types_ModuleId mid);
ARGUMENTS
mid — any module id
RETURNS
If the ID mid is registered via Registry_addModule(), this function returns the pointer to the registered Registry_Desc structure; otherwise it returns NULL.
Registry_findByName() // module-wide
index URL

Find the registered module with the given name

C synopsis target-domain
Registry_Desc *Registry_findByName(CString modName);
ARGUMENTS
modName — non-NULL string name of a registered module
RETURNS
If the name modName is registered via Registry_addModule(), this function returns the pointer to the registered Registry_Desc structure; otherwise it returns NULL.
Registry_getMask() // module-wide
index URL

Get the specified module's diagnostic mask

C synopsis target-domain
Bool Registry_getMask(CString name, Types_DiagsMask *mask);
ARGUMENTS
modName — non-NULL string name of a registered module
mask — non-NULL pointer to a mask to be initialized to the the current state of the diagnostics mask associated with modName
RETURNS
The function returns TRUE if name identifies a registered module; otherwise, it return FALSE.
Registry_getModuleId() // module-wide
index URL

Get the module id associated with a specified module descriptor

C synopsis target-domain
Types_ModuleId Registry_getModuleId(Registry_Desc *desc);
ARGUMENTS
desc — non-NULL pointer to a {#Desc Registry_Desc} structure.
RETURNS
If the specified module descriptor has been initialized via a successful call to Registry_addModule(), this function returns the module id assigned by Registry_addModule(); otherwise, its return value is indeterminate.
Registry_getModuleName() // module-wide
index URL

Get the module name associated with a specified module descriptor

C synopsis target-domain
CString Registry_getModuleName(Registry_Desc *desc);
ARGUMENTS
desc — non-NULL pointer to a {#Desc Registry_Desc} structure.
RETURNS
If the specified module descriptor has been initialized via a successful call to Registry_addModule(), this function returns the module name passed Registry_addModule(); otherwise, its return value is indeterminate.
Registry_getNextModule() // module-wide
index URL

Scan the current list of registered modules

C synopsis target-domain
Registry_Desc *Registry_getNextModule(Registry_Desc *desc);
ARGUMENTS
desc — optionally NULL pointer to a Registry_Desc structure. If desc is NULL, a pointer to the first structure is returned. If desc is non-NULL and equal to a previous return value of this function, a pointer to the "next" Registry_Desc structure is returned.
DETAILS
This function used to scan the list of all Registry_Desc structures currently being managed by the Registry module.
RETURNS
This function returns a non-NULL pointer to one of the Registry_Desc structures added via Registry_Desc structures or NULL in the case that
  • there are no more module's in the list after desc, or
  • there are no modules registered
Registry_isMember() // module-wide
index URL

Determines if the specified module ID belongs to a registered module

C synopsis target-domain
Bool Registry_isMember(Types_ModuleId mid);
ARGUMENTS
mid — any module id
RETURNS
This function returns TRUE if and only if the specified module id is a valid Registry module id. It does not search registered module ids, but simply checks if the id is within the range of valid Registry module ids.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Registry_Module_id();
// Get this module's unique id
Bool Registry_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Registry_Module_heap();
// The heap from which this module allocates memory
Bool Registry_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Registry_Module_getMask();
// Returns the diagnostics mask for this module
Void Registry_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Registry.xdc
var Registry = xdc.useModule('xdc.runtime.Registry');
module-wide constants & types
    values of type Registry.Result// Status codes
        const Registry.SUCCESS// The module was added successfully;
        const Registry.ALLOC_FAILED// reserved;
        const Registry.ALREADY_ADDED// The module has already been added or another module with the same name is present;
        const Registry.ALL_IDS_USED// No more module ids available for new modules;
module-wide config parameters
     Registry.common$// Common module configuration parameters = Types.Common$ undefined;
enum Registry.Result
index URL

Status codes

Configuration settings
values of type Registry.Result
    const Registry.SUCCESS;
    // The module was added successfully
    const Registry.ALLOC_FAILED;
    // reserved
    const Registry.ALREADY_ADDED;
    // The module has already been added or another module with the same name is present
    const Registry.ALL_IDS_USED;
    // No more module ids available for new modules
C SYNOPSIS
Registry_Result
metaonly config Registry.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Registry.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.Reset

metaonly module xdc.runtime.Reset
index URL

Startup reset function manager

  • DETAILS
  • WARNING
  • SEE
  • Configuration settings
  • Individual elements
This module defines an initial reset function and can be used without requiring any other xdc.runtime module. The reset function is called as early as possible in the application startup and is intended for platform-specific hardware initialization. [ more ... ]
Configuration settings sourced in xdc/runtime/Reset.xdc
var Reset = xdc.useModule('xdc.runtime.Reset');
module-wide config parameters
     Reset.fxns// List of functions to call at reset = Startup.InitFxn[] [ ];
DETAILS
This module defines an initial reset function and can be used without requiring any other xdc.runtime module. The reset function is called as early as possible in the application startup and is intended for platform-specific hardware initialization.
The reset function sequentially calls each of the functions added to the fxns array starting from index 0. If Startup.resetFxn is defined, it is called before any of the functions defined by the fxns array.
By providing an array of startup functions, rather than a single function as Startup does, modules that need very early initialization can simply add their initialization to the list of functions to be called without having to implement a "chaining" mechanism or requiring the user to implement and maintain an application reset function.
WARNING
The reset function is _not_ supported on all platforms and, as a result, you should never place any "portable" code that is required for your application in this function. Use the Startup module to define required application startup functions.
SEE
Startup
config Reset.fxns // module-wide
index URL

List of functions to call at reset

Configuration settings
Reset.fxns = Startup.InitFxn[] [ ];
DETAILS
This array defines the functions that will be executed by the reset initialization function (xdc_runtime_Startup_reset__I) _in addition to_ the function specified by Startup.resetFxn.
The following code fragment shows how to add the externally defined function myReset() to this array.
      var Reset = xdc.useModule("xdc.runtime.Reset");
      Reset.fxns[Reset.fxns.length++] = "&myReset";
WARNING
Although the functions specified in fxns[] are ordinary C functions, they are often called _before_ the C runtime is fully initialized; e.g., they may be called _before_ static variables are initialized. Reset functions should only assume that a minimal execution stack has initialized.
SEE
Startup.resetFxn
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.Rta
index URL

The Rta module contains target and configuration code for providing RTA support

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The 'Command' enum defines the available control commands, and the 'CommandPacket' structure defines the format of commands received from the host. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Rta.xdc
#include <xdc/runtime/Rta.h>
Functions
Void | Rta_acknowledgeCmd// (Rta_ResponsePacket *resp);
Void | Rta_changePeriod// (Rta_ResponsePacket *resp, UArg period);
Void | Rta_disableLog// (Rta_ResponsePacket *resp, UArg log);
Void | Rta_enableLog// (Rta_ResponsePacket *resp, UArg log);
Void | Rta_getCpuSpeed// (Rta_ResponsePacket *resp);
Void | Rta_processCommand// Executes a command packet and prepares the response packet(Rta_CommandPacket *cmd, Rta_ResponsePacket *resp);
Void | Rta_readMask// (Rta_ResponsePacket *resp, UArg addr);
Void | Rta_resetLog// (Rta_ResponsePacket *resp, UArg log);
Void | Rta_writeMask// (Rta_ResponsePacket *resp, UArg addr, UArg val);
Functions common to all target modules
 | Rta_Module_getMask// Returns the diagnostics mask for this module, Rta_Module_hasMask// Test whether this module has a diagnostics mask, Rta_Module_heap// The heap from which this module allocates memory, Rta_Module_id// Get this module's unique id, Rta_Module_setMask// Set the diagnostics mask for this module, Rta_Module_startupDone// Test if this module has completed startup
Typedefs
typedef Int | Rta_Command// Command ids;
typedef struct | Rta_CommandPacket// Structure of command received from host TODO - Either the types should be changed to 32-bits, or the packet size information should be added to the RTA XML file ...
typedef struct | Rta_ResponsePacket// Structure of response packet sent back to host ...
Constants
extern const Assert_Id | Rta_A_invalidLogger// Assert if logger id in control command is invalid;
extern const String | Rta_controlTransportClassName// The name of the xdc.rta.IControlTransport class to use;
extern const String | Rta_dataTransportClassName// The name of the xdc.rta.IDataTransport class to use;
extern const Error_Id | Rta_E_badCommand// Error raised if Agent receives an invalid command;
extern const Log_Event | Rta_LD_cmdRcvd// Logged when the Agent receives a command;
extern const Log_Event | Rta_LD_writeMask// Logged when a diags mask is changed;
DETAILS
The 'Command' enum defines the available control commands, and the 'CommandPacket' structure defines the format of commands received from the host.
All commands should send back a response, even if only to acknowledge receipt and completion of the command. The format of the response is defined by the 'ResponsePacket' structure.
The Rta_processCommand can be used to process commands received from a host to call the appropriate API. Alternatively, the individual APIs can be called if not all of the defined commands are used.
enum Rta_Command
index URL

Command ids

C synopsis target-domain
typedef Int Rta_Command;
enum {
    Rta_Command_READ_MASK,
    Rta_Command_WRITE_MASK,
    Rta_Command_LOGGER_OFF,
    Rta_Command_LOGGER_ON,
    Rta_Command_GET_CPU_SPEED,
    Rta_Command_RESET_LOGGER,
    Rta_Command_CHANGE_PERIOD,
    Rta_Command_START_TX,
    Rta_Command_STOP_TX
} ;
struct Rta_CommandPacket
index URL

Structure of command received from host TODO - Either the types should be changed to 32-bits, or the packet size information should be added to the RTA XML file

C synopsis target-domain
typedef struct Rta_CommandPacket {
     Rta_Command cmdId;
    UArg arg0;
    UArg arg1;
} Rta_CommandPacket;
struct Rta_ResponsePacket
index URL

Structure of response packet sent back to host

C synopsis target-domain
typedef struct Rta_ResponsePacket {
     Rta_Command cmdId;
    UArg resp0;
    UArg resp1;
} Rta_ResponsePacket;
config Rta_A_invalidLogger // module-wide
index URL

Assert if logger id in control command is invalid

C synopsis target-domain
extern const Assert_Id Rta_A_invalidLogger;
config Rta_E_badCommand // module-wide
index URL

Error raised if Agent receives an invalid command

C synopsis target-domain
extern const Error_Id Rta_E_badCommand;
config Rta_LD_cmdRcvd // module-wide
index URL

Logged when the Agent receives a command

C synopsis target-domain
extern const Log_Event Rta_LD_cmdRcvd;
config Rta_LD_writeMask // module-wide
index URL

Logged when a diags mask is changed

C synopsis target-domain
extern const Log_Event Rta_LD_writeMask;
config Rta_controlTransportClassName // module-wide
index URL

The name of the xdc.rta.IControlTransport class to use

C synopsis target-domain
extern const String Rta_controlTransportClassName;
DETAILS
The class specified here can be used on the host for communicating with this target application to send control commands and receive responses.
config Rta_dataTransportClassName // module-wide
index URL

The name of the xdc.rta.IDataTransport class to use

C synopsis target-domain
extern const String Rta_dataTransportClassName;
DETAILS
The class specified here can be used on the host for reading RTA data from this target application.
Rta_acknowledgeCmd() // module-wide
index URL
C synopsis target-domain
Void Rta_acknowledgeCmd(Rta_ResponsePacket *resp);
Rta_changePeriod() // module-wide
index URL
C synopsis target-domain
Void Rta_changePeriod(Rta_ResponsePacket *resp, UArg period);
Rta_disableLog() // module-wide
index URL
C synopsis target-domain
Void Rta_disableLog(Rta_ResponsePacket *resp, UArg log);
Rta_enableLog() // module-wide
index URL
C synopsis target-domain
Void Rta_enableLog(Rta_ResponsePacket *resp, UArg log);
Rta_getCpuSpeed() // module-wide
index URL
C synopsis target-domain
Void Rta_getCpuSpeed(Rta_ResponsePacket *resp);
Rta_processCommand() // module-wide
index URL

Executes a command packet and prepares the response packet

C synopsis target-domain
Void Rta_processCommand(Rta_CommandPacket *cmd, Rta_ResponsePacket *resp);
ARGUMENTS
cmd — The CommandPacket to execute.
resp — The ResponsePacket to populate with the response.
DETAILS
This API will execute the command specified by the command packet argument, and will store the response information in the response packet argument.
Rta_readMask() // module-wide
index URL
C synopsis target-domain
Void Rta_readMask(Rta_ResponsePacket *resp, UArg addr);
Rta_resetLog() // module-wide
index URL
C synopsis target-domain
Void Rta_resetLog(Rta_ResponsePacket *resp, UArg log);
Rta_writeMask() // module-wide
index URL
C synopsis target-domain
Void Rta_writeMask(Rta_ResponsePacket *resp, UArg addr, UArg val);
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Rta_Module_id();
// Get this module's unique id
Bool Rta_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Rta_Module_heap();
// The heap from which this module allocates memory
Bool Rta_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Rta_Module_getMask();
// Returns the diagnostics mask for this module
Void Rta_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Rta.xdc
var Rta = xdc.useModule('xdc.runtime.Rta');
module-wide constants & types
    values of type Rta.Command// Command ids
        const Rta.Command_READ_MASK;
        const Rta.Command_WRITE_MASK;
        const Rta.Command_LOGGER_OFF;
        const Rta.Command_LOGGER_ON;
        const Rta.Command_GET_CPU_SPEED;
        const Rta.Command_RESET_LOGGER;
        const Rta.Command_CHANGE_PERIOD;
        const Rta.Command_START_TX;
        const Rta.Command_STOP_TX;
    var obj = new Rta.CommandPacket// Structure of command received from host TODO - Either the types should be changed to 32-bits, or the packet size information should be added to the RTA XML file;
        obj.cmdId = Rta.Command ...
        obj.arg0 = UArg ...
        obj.arg1 = UArg ...
    var obj = new Rta.ResponsePacket// Structure of response packet sent back to host;
        obj.cmdId = Rta.Command ...
        obj.resp0 = UArg ...
        obj.resp1 = UArg ...
module-wide config parameters
     Rta.A_invalidLogger// Assert if logger id in control command is invalid = Assert.Desc {
        msg: "A_invalidLogger: The logger id %d is invalid."
    };
     Rta.E_badCommand// Error raised if Agent receives an invalid command = Error.Desc {
        msg: "E_badCommand: Received invalid command, id: %d."
    };
     Rta.LD_cmdRcvd// Logged when the Agent receives a command = Log.EventDesc {
        mask: Diags.USER2,
        msg: "LD_cmdRcvd: Received command: %d, arg0: 0x%x, arg1: 0x%x"
    };
     Rta.LD_writeMask// Logged when a diags mask is changed = Log.EventDesc {
        mask: Diags.USER2,
        msg: "LD_writeMask: Mask addres: 0x%x, New mask value: 0x%x"
    };
     Rta.controlTransportClassName// The name of the xdc.rta.IControlTransport class to use = String "";
     Rta.dataTransportClassName// The name of the xdc.rta.IDataTransport class to use = String "";
     Rta.common$// Common module configuration parameters = Types.Common$ undefined;
enum Rta.Command
index URL

Command ids

Configuration settings
values of type Rta.Command
    const Rta.Command_READ_MASK;
    const Rta.Command_WRITE_MASK;
    const Rta.Command_LOGGER_OFF;
    const Rta.Command_LOGGER_ON;
    const Rta.Command_GET_CPU_SPEED;
    const Rta.Command_RESET_LOGGER;
    const Rta.Command_CHANGE_PERIOD;
    const Rta.Command_START_TX;
    const Rta.Command_STOP_TX;
C SYNOPSIS
Rta_Command
struct Rta.CommandPacket
index URL

Structure of command received from host TODO - Either the types should be changed to 32-bits, or the packet size information should be added to the RTA XML file

Configuration settings
var obj = new Rta.CommandPacket;
    obj.cmdId = Rta.Command ...
    obj.arg0 = UArg ...
    obj.arg1 = UArg ...
C SYNOPSIS
Rta_CommandPacket
struct Rta.ResponsePacket
index URL

Structure of response packet sent back to host

Configuration settings
var obj = new Rta.ResponsePacket;
    obj.cmdId = Rta.Command ...
    obj.resp0 = UArg ...
    obj.resp1 = UArg ...
C SYNOPSIS
Rta_ResponsePacket
config Rta.A_invalidLogger // module-wide
index URL

Assert if logger id in control command is invalid

Configuration settings
Rta.A_invalidLogger = Assert.Desc {
    msg: "A_invalidLogger: The logger id %d is invalid."
};
C SYNOPSIS
Rta_A_invalidLogger
config Rta.E_badCommand // module-wide
index URL

Error raised if Agent receives an invalid command

Configuration settings
Rta.E_badCommand = Error.Desc {
    msg: "E_badCommand: Received invalid command, id: %d."
};
C SYNOPSIS
Rta_E_badCommand
config Rta.LD_cmdRcvd // module-wide
index URL

Logged when the Agent receives a command

Configuration settings
Rta.LD_cmdRcvd = Log.EventDesc {
    mask: Diags.USER2,
    msg: "LD_cmdRcvd: Received command: %d, arg0: 0x%x, arg1: 0x%x"
};
C SYNOPSIS
Rta_LD_cmdRcvd
config Rta.LD_writeMask // module-wide
index URL

Logged when a diags mask is changed

Configuration settings
Rta.LD_writeMask = Log.EventDesc {
    mask: Diags.USER2,
    msg: "LD_writeMask: Mask addres: 0x%x, New mask value: 0x%x"
};
C SYNOPSIS
Rta_LD_writeMask
config Rta.controlTransportClassName // module-wide
index URL

The name of the xdc.rta.IControlTransport class to use

Configuration settings
Rta.controlTransportClassName = String "";
DETAILS
The class specified here can be used on the host for communicating with this target application to send control commands and receive responses.
C SYNOPSIS
Rta_controlTransportClassName
config Rta.dataTransportClassName // module-wide
index URL

The name of the xdc.rta.IDataTransport class to use

Configuration settings
Rta.dataTransportClassName = String "";
DETAILS
The class specified here can be used on the host for reading RTA data from this target application.
C SYNOPSIS
Rta_dataTransportClassName
metaonly config Rta.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Rta.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:00 GMT


module xdc.runtime.Startup
index URL

The xdc.runtime startup bootstrap

  • C synopsis
  • Individual elements
  • DETAILS
  • STARTUP SEQUENCE
  • MODULE INITIALIZATION
  • EXAMPLES
  • Configuration settings
  • Individual elements
This module manages the very early startup initialization that occurs before C's main() function is invoked. This initialization typically consists of setting hardware specific registers that control watchdog timers, access to memory, cache settings, clock speeds, etc. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Startup.xdc
#include <xdc/runtime/Startup.h>
Functions
Void | Startup_exec// Execute the startup functions of all resident modules();
Bool | Startup_rtsDone// Query the state of the xdc.runtime package();
Functions common to all target modules
 | Startup_Module_getMask// Returns the diagnostics mask for this module, Startup_Module_hasMask// Test whether this module has a diagnostics mask, Startup_Module_heap// The heap from which this module allocates memory, Startup_Module_id// Get this module's unique id, Startup_Module_setMask// Set the diagnostics mask for this module, Startup_Module_startupDone// Test if this module has completed startup
Defines
#define | Startup_DONE// Returned from module startup functions no further calls are required (Int)-1
#define | Startup_NOTDONE// Initial value of state argument passed to module startup functions (Int)0
Typedefs
typedef Void | (*Startup_InitFxn// Type of function assignable to firstFxns, lastFxns, or resetFxn)();
Constants
extern const Startup_InitFxn | Startup_firstFxns// List of functions called before module startup[length];
extern const Startup_InitFxn | Startup_lastFxns// List of functions called after module startup[length];
extern const Int | Startup_maxPasses// Max number of iterations over the set of startup functions;
DETAILS
This module manages the very early startup initialization that occurs before C's main() function is invoked. This initialization typically consists of setting hardware specific registers that control watchdog timers, access to memory, cache settings, clock speeds, etc.
In addition to configuration parameters that allow the user to add custom startup functions, this module also provides services that allow modules to automatically add initialiazation functions to the startup sequence.
STARTUP SEQUENCE
The following list defines the startup sequence and, in particular, when user provided startup functions are invoked:
  1. CPU is initialized and initial C stack setup is performed.
  2. The function specified by Startup.resetFxn is called. Startup.resetFxn is called only on platforms where reset is performed before running a program. For example, boot code for all TI targets invokes Startup.resetFxn, but this function is not invoked on Microsoft targets.
  3. C runtime initialization is performed.
  4. Functions from the array Startup.firstFxns are called.
  5. All Mod_Module_startup functions (see Module Initialization below) are called in a loop until all such functions return Startup_DONE or the maxPasses threshold is reached.
  6. Functions from the array Startup.lastFxns are called.
  7. The function main is called.
The steps 4 - 6 occur during C++ static object initialization. Since the ANSI C++ Language Standard does not provide a means to control the order of C++ constructors, if a C++ constructor uses an XDC module, there is no guarantee that the module's startup function already ran. Therefore, any C++ constructor that needs XDC modules' services should call Startup_exec first to force all startup related functions from steps 4 - 6 to run, before the constructor uses any XDC module.
Also, if a target does not support C++, the steps 4 - 6 will not run automatically. It is then up to a user's code to invoke Startup_exec, possibly as the first step in main.
MODULE INITIALIZATION
Every module can optionally define a startup function which is called before main(). Modules declare that they want to participate in this startup sequence via the @ModuleStartup attribute in the module's spec file. Modules that use this attribute must also implement the following startup function:
      Int Mod_Module_startup(Int state);
where "Mod" is the name of the module requesting startup support.
The parameter to the startup function serves as "state variable" whose initial value will be Startup_NOTDONE. If startup() returns a value other than Startup_DONE, it will be called in a subsequent pass with this return value passed in as state. To ensure this process terminates, no startup function is ever called more than maxPasses times.
For situations in which the startup of one module depends upon another having completed its startup processing, the following function is automatically defined for all modules and proxies:
      Bool Mod_Module_startupDone();
where "Mod" is the name of some module or proxy. These predicates can be used as guards inside of a startup function to probe whether a particular module has completed its own startup processing. As a convenience, the function Startup_rtsDone() probes the necessary set of xdc.runtime modules required to support instance create() functions, and should be called before any startup-time instance creation and/or memory allocation is performed.
      Int Mod_Module_startup(Int state)
      {
          if (!Startup_rtsDone()) {
              return (Startup_NOTDONE);
          }
              .
              .
              .
          return (Startup_DONE);
      }
EXAMPLES
The following code shows how to add custom startup functions to this module.
      var Startup = xdc.useModule('xdc.runtime.Startup');
      Startup.resetFxn = "&myResetFxn";
      Startup.firstFxns[Startup.firstFxns.length++] = "&myFirst";
      Startup.lastFxns[Startup.lastFxns.length++] = "&myLast";
const Startup_DONE
index URL

Returned from module startup functions no further calls are required

C synopsis target-domain
#define Startup_DONE (Int)-1
const Startup_NOTDONE
index URL

Initial value of state argument passed to module startup functions

C synopsis target-domain
#define Startup_NOTDONE (Int)0
typedef Startup_InitFxn
index URL

Type of function assignable to firstFxns, lastFxns, or resetFxn

C synopsis target-domain
typedef Void (*Startup_InitFxn)();
config Startup_firstFxns // module-wide
index URL

List of functions called before module startup

C synopsis target-domain
extern const Startup_InitFxn Startup_firstFxns[length];
SEE
Startup Sequence
config Startup_lastFxns // module-wide
index URL

List of functions called after module startup

C synopsis target-domain
extern const Startup_InitFxn Startup_lastFxns[length];
SEE
Startup Sequence
config Startup_maxPasses // module-wide
index URL

Max number of iterations over the set of startup functions

C synopsis target-domain
extern const Int Startup_maxPasses;
Startup_exec() // module-wide
index URL

Execute the startup functions of all resident modules

C synopsis target-domain
Void Startup_exec();
DETAILS
Note that this function is idempotent, and can be called at any point in the platform/target startup sequence in which "ordinary" C functions can execute. By default, this function is called as part of the standard C++ static initialization sequence.
If your target compiler does not support C++, this function must be called at least once prior to using any xdc.runtime modules. Simply call this function at the very beginning of main().
Startup_rtsDone() // module-wide
index URL

Query the state of the xdc.runtime package

C synopsis target-domain
Bool Startup_rtsDone();
DETAILS
This function is used by module startup functions to determine when it is possible to use the xdc.runtime modules; e.g. to allocate memory, create instances managed by some module (even those outside the xdc.runtime package), call a Log function, etc.
RETURNS
Returns TRUE when all xdc.runtime modules have completed initialization.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Startup_Module_id();
// Get this module's unique id
Bool Startup_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Startup_Module_heap();
// The heap from which this module allocates memory
Bool Startup_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Startup_Module_getMask();
// Returns the diagnostics mask for this module
Void Startup_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Startup.xdc
var Startup = xdc.useModule('xdc.runtime.Startup');
module-wide constants & types
    const Startup.DONE// Returned from module startup functions no further calls are required = -1;
    const Startup.NOTDONE// Initial value of state argument passed to module startup functions = 0;
module-wide config parameters
     Startup.firstFxns// List of functions called before module startup = Startup.InitFxn[length] [ ];
     Startup.lastFxns// List of functions called after module startup = Startup.InitFxn[length] [ ];
     Startup.maxPasses// Max number of iterations over the set of startup functions = Int 32;
     Startup.common$// Common module configuration parameters = Types.Common$ undefined;
     Startup.resetFxn// Function to be called by during initialization = Void(*)() null;
const Startup.DONE
index URL

Returned from module startup functions no further calls are required

Configuration settings
const Startup.DONE = -1;
C SYNOPSIS
Startup_DONE
const Startup.NOTDONE
index URL

Initial value of state argument passed to module startup functions

Configuration settings
const Startup.NOTDONE = 0;
C SYNOPSIS
Startup_NOTDONE
config Startup.firstFxns // module-wide
index URL

List of functions called before module startup

Configuration settings
Startup.firstFxns = Startup.InitFxn[length] [ ];
SEE
Startup Sequence
C SYNOPSIS
Startup_firstFxns
config Startup.lastFxns // module-wide
index URL

List of functions called after module startup

Configuration settings
Startup.lastFxns = Startup.InitFxn[length] [ ];
SEE
Startup Sequence
C SYNOPSIS
Startup_lastFxns
config Startup.maxPasses // module-wide
index URL

Max number of iterations over the set of startup functions

Configuration settings
Startup.maxPasses = Int 32;
C SYNOPSIS
Startup_maxPasses
metaonly config Startup.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Startup.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly config Startup.resetFxn // module-wide
index URL

Function to be called by during initialization

Configuration settings
Startup.resetFxn = Void(*)() null;
DETAILS
This function is called only on platforms where reset is performed before running the program. The purpose of this function is to set up the hardware registers (cache, external memory interface, etc.) before any other code executes.
This function is called as early as possible in the program initialization process.
SEE
Startup Sequence
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.SysCallback
index URL

ISystemSupport implementation for user callback functions

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module provides a implementation of the ISystemSupport interface that simply calls back the user defined functions to enable the System module's functionality. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/SysCallback.xdc
#include <xdc/runtime/SysCallback.h>
Functions
Void | SysCallback_defaultAbort// Default abort function that does nothing(CString); // linked as extern xdc_runtime_SysCallback_defaultAbort
Void | SysCallback_defaultExit// Default exit function that does nothing(Int); // linked as extern xdc_runtime_SysCallback_defaultExit
Void | SysCallback_defaultFlush// Default flush function that does nothing(); // linked as extern xdc_runtime_SysCallback_defaultFlush
Void | SysCallback_defaultPutch// Default putch function that does nothing(Char); // linked as extern xdc_runtime_SysCallback_defaultPutch
Bool | SysCallback_defaultReady// Default ready function that does nothing(); // linked as extern xdc_runtime_SysCallback_defaultReady
Functions common to all ISystemSupport modules
Void | SysCallback_abort// Backend for System.abort()(CString str);
Void | SysCallback_exit// Backend for System.exit()(Int stat);
Void | SysCallback_flush// Backend for System.flush()();
Void | SysCallback_putch// Backend for System.printf() and System.putch()(Char ch);
Bool | SysCallback_ready// Test if character output can proceed();
Functions common to all target modules
 | SysCallback_Module_getMask// Returns the diagnostics mask for this module, SysCallback_Module_hasMask// Test whether this module has a diagnostics mask, SysCallback_Module_heap// The heap from which this module allocates memory, SysCallback_Module_id// Get this module's unique id, SysCallback_Module_setMask// Set the diagnostics mask for this module, SysCallback_Module_startupDone// Test if this module has completed startup
Typedefs
typedef Void | (*SysCallback_AbortFxn// Abort function signature)(CString);
typedef Void | (*SysCallback_ExitFxn// Exit function signature)(Int);
typedef Void | (*SysCallback_FlushFxn// Flush function signature)();
typedef Void | (*SysCallback_PutchFxn// Putch function signature)(Char);
typedef Bool | (*SysCallback_ReadyFxn// Ready function signature)();
Constants
extern const SysCallback_AbortFxn | SysCallback_abortFxn// User supplied abort function;
extern const SysCallback_ExitFxn | SysCallback_exitFxn// User supplied exit function;
extern const SysCallback_FlushFxn | SysCallback_flushFxn// User supplied flush function;
extern const SysCallback_PutchFxn | SysCallback_putchFxn// User supplied character output function;
extern const SysCallback_ReadyFxn | SysCallback_readyFxn// User supplied ready function;
DETAILS
This module provides a implementation of the ISystemSupport interface that simply calls back the user defined functions to enable the System module's functionality.
Configuration is as shown below.
  var SysCallback = xdc.useModule('xdc.runtime.SysCallback');
  SysCallback.abortFxn = "&userAbort";
  SysCallback.exitFxn  = "&userExit";
  SysCallback.flushFxn = "&userFlush";
  SysCallback.putchFxn = "&userPutch";
  SysCallback.readyFxn = "&userReady";
typedef SysCallback_AbortFxn
index URL

Abort function signature

C synopsis target-domain
typedef Void (*SysCallback_AbortFxn)(CString);
typedef SysCallback_ExitFxn
index URL

Exit function signature

C synopsis target-domain
typedef Void (*SysCallback_ExitFxn)(Int);
typedef SysCallback_FlushFxn
index URL

Flush function signature

C synopsis target-domain
typedef Void (*SysCallback_FlushFxn)();
typedef SysCallback_PutchFxn
index URL

Putch function signature

C synopsis target-domain
typedef Void (*SysCallback_PutchFxn)(Char);
typedef SysCallback_ReadyFxn
index URL

Ready function signature

C synopsis target-domain
typedef Bool (*SysCallback_ReadyFxn)();
config SysCallback_abortFxn // module-wide
index URL

User supplied abort function

C synopsis target-domain
extern const SysCallback_AbortFxn SysCallback_abortFxn;
DETAILS
This function is called when the application calls System.abort() function. If the user supplied funtion returns, the abort function of the ANSI C Standard library is called. For more information see the System.abort() documentation.
By default, this function is configured with a default abort function. This default abort function spins forever and never returns.
config SysCallback_exitFxn // module-wide
index URL

User supplied exit function

C synopsis target-domain
extern const SysCallback_ExitFxn SysCallback_exitFxn;
DETAILS
This function is called when the application calls System.exit() function. If the user supplied function returns, the ANSI C Standard Library atexit processing will be completed. For more information see the System.exit() documentation.
By default, this function is configured with a default exit function. The default exit function does nothing and returns.
config SysCallback_flushFxn // module-wide
index URL

User supplied flush function

C synopsis target-domain
extern const SysCallback_FlushFxn SysCallback_flushFxn;
DETAILS
This function is called when the application calls System.flush() function.
By default, this function is configured with a default flush function. The default flush function does nothing and returns.
config SysCallback_putchFxn // module-wide
index URL

User supplied character output function

C synopsis target-domain
extern const SysCallback_PutchFxn SysCallback_putchFxn;
DETAILS
This function is called whenever the System module needs to output a character; e.g., during System.printf() or System.putch().
By default, this function is configured with a default putch function. The default putch function drops the characters.
config SysCallback_readyFxn // module-wide
index URL

User supplied ready function

C synopsis target-domain
extern const SysCallback_ReadyFxn SysCallback_readyFxn;
DETAILS
This function is called by the System module prior to performing any character output to check if the SystemSupport module is ready to accept the character. For more information see the ISystemSupport.ready() documentation.
By default, this function is configured with a default ready function. The default ready function returns TRUE always.
SysCallback_abort() // module-wide
index URL

Backend for System.abort()

C synopsis target-domain
Void SysCallback_abort(CString str);
ARGUMENTS
str — message to output just prior to aborting
If non-NULL, this string should be output just prior to terminating.
DETAILS
This function is called by System.abort() prior to calling the ANSI C Standard library function abort(). So, to ensure the abort processing of the system's ANSI C Standard library completes, this function should return to its caller.
SysCallback_exit() // module-wide
index URL

Backend for System.exit()

C synopsis target-domain
Void SysCallback_exit(Int stat);
ARGUMENTS
stat — status value passed to all "atexit" handlers
This value is passed to all "atexit" handles bound via System.atexit().
DETAILS
This function is called as part the normal "atexit" processing performed by the ANSI C Standard Library's exit() function; System.exit() directly calls ANSI exit().
This function is called after all "atexit" handlers bound via System.atexit() are run and it is always called while "inside" the the System gate.
To ensure that all exit processing of the system's ANSI C Standard Library completes, this function should return to its caller. Exit handlers bound using the ANSI C Standard Library atexit() function may run before or after this function.
SEE
System.atexit
SysCallback_flush() // module-wide
index URL

Backend for System.flush()

C synopsis target-domain
Void SysCallback_flush();
DETAILS
This function is simply called by System_flush to output any characters buffered by the underlying SystemSupport module to an output device.
SysCallback_putch() // module-wide
index URL

Backend for System.printf() and System.putch()

C synopsis target-domain
Void SysCallback_putch(Char ch);
ARGUMENTS
ch — character to output
DETAILS
Output a single character. This function is called by System_printf() to write each character of formated output specified by its arguments.
SysCallback_ready() // module-wide
index URL

Test if character output can proceed

C synopsis target-domain
Bool SysCallback_ready();
DETAILS
This function is called by System prior to performing any character output. If this function returns FALSE, the System functions that would normally call putch() simply return (with an appropriate error status) without ever calling putch.
extern SysCallback_defaultAbort
index URL

Default abort function that does nothing

C synopsis target-domain
Void SysCallback_defaultAbort(CString); // linked as extern xdc_runtime_SysCallback_defaultAbort
DETAILS
This default abort function spins forever and never returns.
extern SysCallback_defaultExit
index URL

Default exit function that does nothing

C synopsis target-domain
Void SysCallback_defaultExit(Int); // linked as extern xdc_runtime_SysCallback_defaultExit
DETAILS
The default exit function does nothing and returns.
extern SysCallback_defaultFlush
index URL

Default flush function that does nothing

C synopsis target-domain
Void SysCallback_defaultFlush(); // linked as extern xdc_runtime_SysCallback_defaultFlush
DETAILS
The default flush function does nothing and returns.
extern SysCallback_defaultPutch
index URL

Default putch function that does nothing

C synopsis target-domain
Void SysCallback_defaultPutch(Char); // linked as extern xdc_runtime_SysCallback_defaultPutch
DETAILS
The default putch function drops the characters.
extern SysCallback_defaultReady
index URL

Default ready function that does nothing

C synopsis target-domain
Bool SysCallback_defaultReady(); // linked as extern xdc_runtime_SysCallback_defaultReady
DETAILS
The default ready function returns TRUE always.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId SysCallback_Module_id();
// Get this module's unique id
Bool SysCallback_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SysCallback_Module_heap();
// The heap from which this module allocates memory
Bool SysCallback_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SysCallback_Module_getMask();
// Returns the diagnostics mask for this module
Void SysCallback_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/SysCallback.xdc
var SysCallback = xdc.useModule('xdc.runtime.SysCallback');
module-wide config parameters
     SysCallback.abortFxn// User supplied abort function = Void(*)(CString) "&xdc_runtime_SysCallback_defaultAbort";
     SysCallback.exitFxn// User supplied exit function = Void(*)(Int) "&xdc_runtime_SysCallback_defaultExit";
     SysCallback.flushFxn// User supplied flush function = Void(*)() "&xdc_runtime_SysCallback_defaultFlush";
     SysCallback.putchFxn// User supplied character output function = Void(*)(Char) "&xdc_runtime_SysCallback_defaultPutch";
     SysCallback.readyFxn// User supplied ready function = Bool(*)() "&xdc_runtime_SysCallback_defaultReady";
     SysCallback.common$// Common module configuration parameters = Types.Common$ undefined;
config SysCallback.abortFxn // module-wide
index URL

User supplied abort function

Configuration settings
SysCallback.abortFxn = Void(*)(CString) "&xdc_runtime_SysCallback_defaultAbort";
DETAILS
This function is called when the application calls System.abort() function. If the user supplied funtion returns, the abort function of the ANSI C Standard library is called. For more information see the System.abort() documentation.
By default, this function is configured with a default abort function. This default abort function spins forever and never returns.
C SYNOPSIS
SysCallback_abortFxn
config SysCallback.exitFxn // module-wide
index URL

User supplied exit function

Configuration settings
SysCallback.exitFxn = Void(*)(Int) "&xdc_runtime_SysCallback_defaultExit";
DETAILS
This function is called when the application calls System.exit() function. If the user supplied function returns, the ANSI C Standard Library atexit processing will be completed. For more information see the System.exit() documentation.
By default, this function is configured with a default exit function. The default exit function does nothing and returns.
C SYNOPSIS
SysCallback_exitFxn
config SysCallback.flushFxn // module-wide
index URL

User supplied flush function

Configuration settings
SysCallback.flushFxn = Void(*)() "&xdc_runtime_SysCallback_defaultFlush";
DETAILS
This function is called when the application calls System.flush() function.
By default, this function is configured with a default flush function. The default flush function does nothing and returns.
C SYNOPSIS
SysCallback_flushFxn
config SysCallback.putchFxn // module-wide
index URL

User supplied character output function

Configuration settings
SysCallback.putchFxn = Void(*)(Char) "&xdc_runtime_SysCallback_defaultPutch";
DETAILS
This function is called whenever the System module needs to output a character; e.g., during System.printf() or System.putch().
By default, this function is configured with a default putch function. The default putch function drops the characters.
C SYNOPSIS
SysCallback_putchFxn
config SysCallback.readyFxn // module-wide
index URL

User supplied ready function

Configuration settings
SysCallback.readyFxn = Bool(*)() "&xdc_runtime_SysCallback_defaultReady";
DETAILS
This function is called by the System module prior to performing any character output to check if the SystemSupport module is ready to accept the character. For more information see the ISystemSupport.ready() documentation.
By default, this function is configured with a default ready function. The default ready function returns TRUE always.
C SYNOPSIS
SysCallback_readyFxn
metaonly config SysCallback.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
SysCallback.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.SysMin
index URL

Minimal implementation of ISystemSupport

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This implementation provides a fully functional implementation of all methods specified by ISystemSupport. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/SysMin.xdc
#include <xdc/runtime/SysMin.h>
Functions common to all ISystemSupport modules
Void | SysMin_abort// Backend for System.abort()(CString str);
Void | SysMin_exit// Backend for System.exit()(Int stat);
Void | SysMin_flush// Backend for System.flush()();
Void | SysMin_putch// Backend for System.printf() and System.putch()(Char ch);
Bool | SysMin_ready// Test if character output can proceed();
Functions common to all target modules
 | SysMin_Module_getMask// Returns the diagnostics mask for this module, SysMin_Module_hasMask// Test whether this module has a diagnostics mask, SysMin_Module_heap// The heap from which this module allocates memory, SysMin_Module_id// Get this module's unique id, SysMin_Module_setMask// Set the diagnostics mask for this module, SysMin_Module_startupDone// Test if this module has completed startup
Typedefs
typedef Void | (*SysMin_OutputFxn// Output characters in the specified buffer)(Char*,UInt);
Constants
extern const SizeT | SysMin_bufSize// Size (in MAUs) of the output;
extern const Bool | SysMin_flushAtExit// Flush the internal buffer during exit or abort;
extern const SysMin_OutputFxn | SysMin_outputFxn// User supplied character output function;
DETAILS
This implementation provides a fully functional implementation of all methods specified by ISystemSupport.
The module maintains an internal buffer (with a configurable size) that stores on the "output". When full, the data is over-written. When System_flush() is called the characters in the internal buffer are "output" using the user configurable outputFxn.
As with all ISystemSupport modules, this module is the back-end for the System module; application code does not directly call these functions.
typedef SysMin_OutputFxn
index URL

Output characters in the specified buffer

C synopsis target-domain
typedef Void (*SysMin_OutputFxn)(Char*,UInt);
DETAILS
The first parameter is a pointer to a buffer of characters to be output. The second parameter is the number of characters in the buffer to output.
This function may be called with 0 as the second parameter. In this case, the function should simply return.
config SysMin_bufSize // module-wide
index URL

Size (in MAUs) of the output

C synopsis target-domain
extern const SizeT SysMin_bufSize;
DETAILS
An internal buffer of this size is allocated. All output is stored in this internal buffer.
If 0 is specified for the size, no buffer is created, all output is dropped, and SysMin.ready() always returns FALSE.
config SysMin_flushAtExit // module-wide
index URL

Flush the internal buffer during exit or abort

C synopsis target-domain
extern const Bool SysMin_flushAtExit;
DETAILS
If the application's target is a TI target, the internal buffer is flushed via the HOSTwrite function in the TI C Run Time Support (RTS) library.
If the application's target is not a TI target, the internal buffer is flushed to stdout via fwrite(..., stdout).
Setting this parameter to false reduces the footprint of the application at the expense of not getting output when the application ends via a System_exit(), System_abort(), exit() or abort().
config SysMin_outputFxn // module-wide
index URL

User supplied character output function

C synopsis target-domain
extern const SysMin_OutputFxn SysMin_outputFxn;
DETAILS
If this parameter is set to a non-null value, the specified function will be called by System.flush() to output any characters buffered within SysMin.
For example, if you define a function named myOutputFxn, the following configuration fragment will cause SysMin to call myOutputFxn whenever the character buffer is flushed.
      var SysMin = xdc.useModule("xdc.runtime.SysMin");
      SysMin.outputFxn = "&myOutputFxn";
If this parameter is not set, a default function will be used which uses the ANSI C Standard Library function fwrite() (or HOSTwrite in the TI C Run Time Support library) to output accumulated output characters.
SEE
OutputFxn
SysMin_abort() // module-wide
index URL

Backend for System.abort()

C synopsis target-domain
Void SysMin_abort(CString str);
ARGUMENTS
str — message to output just prior to aborting
If non-NULL, this string should be output just prior to terminating.
message to output just prior to aborting
If non-NULL, this string should be output just prior to terminating.
DETAILS
This function is called by System.abort() prior to calling the ANSI C Standard library function abort(). So, to ensure the abort processing of the system's ANSI C Standard library completes, this function should return to its caller.
This abort function writes the string to the internal output buffer and then gives all internal output to the outputFxn function if the flushAtExit configuration parameter is true.
SEE
ISystemSupport.abort
SysMin_exit() // module-wide
index URL

Backend for System.exit()

C synopsis target-domain
Void SysMin_exit(Int stat);
ARGUMENTS
stat — status value passed to all "atexit" handlers
This value is passed to all "atexit" handles bound via System.atexit().
DETAILS
This function is called as part the normal "atexit" processing performed by the ANSI C Standard Library's exit() function; System.exit() directly calls ANSI exit().
This function is called after all "atexit" handlers bound via System.atexit() are run and it is always called while "inside" the the System gate.
To ensure that all exit processing of the system's ANSI C Standard Library completes, this function should return to its caller. Exit handlers bound using the ANSI C Standard Library atexit() function may run before or after this function.
This exit function gives all internal output to the outputFxn function if the flushAtExit configuration parameter is true.
SEE
System.atexit, ISystemSupport.exit
SysMin_flush() // module-wide
index URL

Backend for System.flush()

C synopsis target-domain
Void SysMin_flush();
DETAILS
This function is simply called by System_flush to output any characters buffered by the underlying SystemSupport module to an output device.
The flush writes the contents of the internal character buffer via the outputFxn function.
WARNING
The System gate is used for thread safety during the entire flush operation, so care must be taken when flushing with this ISystemSupport module. Depending on the nature of the System gate, your application's interrupt latency may become a function of the bufSize parameter!
SEE
ISystemSupport.flush
SysMin_putch() // module-wide
index URL

Backend for System.printf() and System.putch()

C synopsis target-domain
Void SysMin_putch(Char ch);
ARGUMENTS
ch — character to output
DETAILS
Output a single character. This function is called by System_printf() to write each character of formated output specified by its arguments.
This function appends the character to an internal circular buffer. In the event that this buffer is not "flushed" (via flush) before the output pointer wraps, the oldest previously put character will be overwritten.
SysMin_flush passes the internal buffer to the outputFxn function and resets the internal buffer.
If the flushAtExit configuration parameter is true, SysMin_flush is implicitly called by exit and abort.
SEE
ISystemSupport.putch
SysMin_ready() // module-wide
index URL

Test if character output can proceed

C synopsis target-domain
Bool SysMin_ready();
DETAILS
This function is called by System prior to performing any character output. If this function returns FALSE, the System functions that would normally call putch() simply return (with an appropriate error status) without ever calling putch.
This function returns true if the internal buffer is non-zero.
SEE
ISystemSupport.ready
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId SysMin_Module_id();
// Get this module's unique id
Bool SysMin_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SysMin_Module_heap();
// The heap from which this module allocates memory
Bool SysMin_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SysMin_Module_getMask();
// Returns the diagnostics mask for this module
Void SysMin_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/SysMin.xdc
var SysMin = xdc.useModule('xdc.runtime.SysMin');
module-wide constants & types
    var obj = new SysMin.BufferEntryView// ;
        obj.entry = String ...
    var obj = new SysMin.ModuleView// ;
        obj.outBuf = Ptr ...
        obj.outBufIndex = UInt ...
        obj.wrapped = Bool ...
module-wide config parameters
     SysMin.bufSize// Size (in MAUs) of the output = SizeT 1024;
     SysMin.flushAtExit// Flush the internal buffer during exit or abort = Bool true;
     SysMin.outputFxn// User supplied character output function = Void(*)(Char*,UInt) null;
     SysMin.common$// Common module configuration parameters = Types.Common$ undefined;
     SysMin.sectionName// Section where the internal character output buffer is placed = String null;
metaonly struct SysMin.BufferEntryView
index URL
Configuration settings
var obj = new SysMin.BufferEntryView;
    obj.entry = String ...
metaonly struct SysMin.ModuleView
index URL
Configuration settings
var obj = new SysMin.ModuleView;
    obj.outBuf = Ptr ...
    obj.outBufIndex = UInt ...
    obj.wrapped = Bool ...
config SysMin.bufSize // module-wide
index URL

Size (in MAUs) of the output

Configuration settings
SysMin.bufSize = SizeT 1024;
DETAILS
An internal buffer of this size is allocated. All output is stored in this internal buffer.
If 0 is specified for the size, no buffer is created, all output is dropped, and SysMin.ready() always returns FALSE.
C SYNOPSIS
SysMin_bufSize
config SysMin.flushAtExit // module-wide
index URL

Flush the internal buffer during exit or abort

Configuration settings
SysMin.flushAtExit = Bool true;
DETAILS
If the application's target is a TI target, the internal buffer is flushed via the HOSTwrite function in the TI C Run Time Support (RTS) library.
If the application's target is not a TI target, the internal buffer is flushed to stdout via fwrite(..., stdout).
Setting this parameter to false reduces the footprint of the application at the expense of not getting output when the application ends via a System_exit(), System_abort(), exit() or abort().
C SYNOPSIS
SysMin_flushAtExit
config SysMin.outputFxn // module-wide
index URL

User supplied character output function

Configuration settings
SysMin.outputFxn = Void(*)(Char*,UInt) null;
DETAILS
If this parameter is set to a non-null value, the specified function will be called by System.flush() to output any characters buffered within SysMin.
For example, if you define a function named myOutputFxn, the following configuration fragment will cause SysMin to call myOutputFxn whenever the character buffer is flushed.
      var SysMin = xdc.useModule("xdc.runtime.SysMin");
      SysMin.outputFxn = "&myOutputFxn";
If this parameter is not set, a default function will be used which uses the ANSI C Standard Library function fwrite() (or HOSTwrite in the TI C Run Time Support library) to output accumulated output characters.
SEE
OutputFxn
C SYNOPSIS
SysMin_outputFxn
metaonly config SysMin.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
SysMin.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly config SysMin.sectionName // module-wide
index URL

Section where the internal character output buffer is placed

Configuration settings
SysMin.sectionName = String null;
DETAILS
The default is to have no explicit placement; i.e., the linker is free to place it anywhere in the memory map.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.SysStd
index URL

Implementation of ISystemSupport using ANSI C Standard Library

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This implementation provides a fully functional implementation of all methods specified by ISystemSupport. As with all ISystemSupport modules, this module is the back-end for the System module. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/SysStd.xdc
#include <xdc/runtime/SysStd.h>
Functions common to all ISystemSupport modules
Void | SysStd_abort// Backend for System.abort()(CString str);
Void | SysStd_exit// Backend for System.exit()(Int stat);
Void | SysStd_flush// Backend for System.flush()();
Void | SysStd_putch// Backend for System.printf() and System.putch()(Char ch);
Bool | SysStd_ready// Test if character output can proceed();
Functions common to all target modules
 | SysStd_Module_getMask// Returns the diagnostics mask for this module, SysStd_Module_hasMask// Test whether this module has a diagnostics mask, SysStd_Module_heap// The heap from which this module allocates memory, SysStd_Module_id// Get this module's unique id, SysStd_Module_setMask// Set the diagnostics mask for this module, SysStd_Module_startupDone// Test if this module has completed startup
DETAILS
This implementation provides a fully functional implementation of all methods specified by ISystemSupport. As with all ISystemSupport modules, this module is the back-end for the System module.
This implementation relies on the target's runtime support libraries (i.e. fflush() and putchar()). Therefore the functions are re-entrant (thread-safe) if the underlying rts library is re-entrant.
SysStd_abort() // module-wide
index URL

Backend for System.abort()

C synopsis target-domain
Void SysStd_abort(CString str);
ARGUMENTS
str — message to output just prior to aborting
If non-NULL, this string should be output just prior to terminating.
DETAILS
This function is called by System.abort() prior to calling the ANSI C Standard library function abort(). So, to ensure the abort processing of the system's ANSI C Standard library completes, this function should return to its caller.
This abort function writes the string via putchar() and flushes via fflush() to stdout.
SEE
ISystemSupport.abort
SysStd_exit() // module-wide
index URL

Backend for System.exit()

C synopsis target-domain
Void SysStd_exit(Int stat);
ARGUMENTS
stat — status value passed to all "atexit" handlers
This value is passed to all "atexit" handles bound via System.atexit().
DETAILS
This function is called as part the normal "atexit" processing performed by the ANSI C Standard Library's exit() function; System.exit() directly calls ANSI exit().
This function is called after all "atexit" handlers bound via System.atexit() are run and it is always called while "inside" the the System gate.
To ensure that all exit processing of the system's ANSI C Standard Library completes, this function should return to its caller. Exit handlers bound using the ANSI C Standard Library atexit() function may run before or after this function.
This exit function flushes via fflush() to stdout.
SEE
System.atexit, ISystemSupport.exit
SysStd_flush() // module-wide
index URL

Backend for System.flush()

C synopsis target-domain
Void SysStd_flush();
DETAILS
This function is simply called by System_flush to output any characters buffered by the underlying SystemSupport module to an output device.
This flush function flushes via fflush() to stdout.
SEE
ISystemSupport.flush
SysStd_putch() // module-wide
index URL

Backend for System.printf() and System.putch()

C synopsis target-domain
Void SysStd_putch(Char ch);
ARGUMENTS
ch — character to output
DETAILS
Output a single character. This function is called by System_printf() to write each character of formated output specified by its arguments.
This function outputs the character via putchar().
SEE
ISystemSupport.putch
SysStd_ready() // module-wide
index URL

Test if character output can proceed

C synopsis target-domain
Bool SysStd_ready();
DETAILS
This function is called by System prior to performing any character output. If this function returns FALSE, the System functions that would normally call putch() simply return (with an appropriate error status) without ever calling putch.
This always returns TRUE.
SEE
ISystemSupport.ready
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId SysStd_Module_id();
// Get this module's unique id
Bool SysStd_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SysStd_Module_heap();
// The heap from which this module allocates memory
Bool SysStd_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SysStd_Module_getMask();
// Returns the diagnostics mask for this module
Void SysStd_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/SysStd.xdc
var SysStd = xdc.useModule('xdc.runtime.SysStd');
module-wide config parameters
     SysStd.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config SysStd.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
SysStd.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.System
index URL

Basic system services

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module provides basic low-level "system" services; e.g., character output, printf-like output, and exit handling. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/System.xdc
#include <xdc/runtime/System.h>
Functions
Void | System_abort// Print a message and abort currently running executable(CString str);
Void | System_abortSpin// Lightweight implementation of abortFxn function();
Void | System_abortStd// ANSI C Standard implementation of abortFxn function();
Int | System_aprintf// printf where all optional arguments are IArgs(CString fmt, ...);
Int | System_asprintf// sprintf where all optional arguments are IArgs(Char buf[], CString fmt, ...);
Bool | System_atexit// Add an exit handler(System_AtexitHandler handler);
Int | System_avprintf// vprintf where all optional arguments are IArgs(CString fmt, VaList va);
Int | System_avsprintf// vsprintf where all optional arguments are IArgs(Char buf[], CString fmt, VaList va);
Void | System_exit// Exit currently running executable(Int stat);
Void | System_exitSpin// Implements an exitFxn function(Int stat);
Void | System_exitStd// Implements an exitFxn function(Int stat);
Void | System_flush// Flush standard System I/O();
Int | System_printf// A smaller faster printf(CString fmt, ...);
Void | System_processAtExit// Processes all functions bound via System_atexit(Int stat);
Void | System_putch// Output a single character(Char ch);
Int | System_snprintf// Write formated output to a character buffer(Char buf[], SizeT n, CString fmt, ...);
Int | System_sprintf// Write formated output to a character buffer(Char buf[], CString fmt, ...);
Int | System_vprintf// A VaList printf(CString fmt, VaList va);
Int | System_vsnprintf// A VaList snprintf(Char buf[], SizeT n, CString fmt, VaList va);
Int | System_vsprintf// A VaList sprintf(Char buf[], CString fmt, VaList va);
Functions common to all target modules
 | System_Module_getMask// Returns the diagnostics mask for this module, System_Module_hasMask// Test whether this module has a diagnostics mask, System_Module_heap// The heap from which this module allocates memory, System_Module_id// Get this module's unique id, System_Module_setMask// Set the diagnostics mask for this module, System_Module_startupDone// Test if this module has completed startup
Defines
#define | System_STATUS_UNKNOWN// Unknown exit status value (Int)0xCAFE
Typedefs
typedef Void | (*System_AbortFxn// System abort function prototype)();
typedef Void | (*System_AtexitHandler// System's atexit function prototype)(Int);
typedef Void | (*System_ExitFxn// System exit function prototype)(Int);
Constants
extern const System_AbortFxn | System_abortFxn// Abort handler function;
extern const Assert_Id | System_A_cannotFitIntoArg// Assert that the target's Float type fits in an IArg;
extern const System_ExitFxn | System_exitFxn// Exit handler function;
extern const Int | System_maxAtexitHandlers// Maximum number of dynamic atexit handlers allowed in the system;
DETAILS
This module provides basic low-level "system" services; e.g., character output, printf-like output, and exit handling.
This module is gated and other modules use its gate via the Gate.enterSystem and Gate.leaveSystem. The System gate must be enterable by any thread in a multi-threaded environments. For example, in many real-time multi-threaded environments some types of threads, such as Interrupt Service Routines (ISRs), are not allowed to call operations that block the caller. In such an environment, either the System gate must disable all interrupts or ISRs must never call a function in the xdc.runtime package.
const System_STATUS_UNKNOWN
index URL

Unknown exit status value

C synopsis target-domain
#define System_STATUS_UNKNOWN (Int)0xCAFE
DETAILS
When the program exits by calling System_exit() the System's atexit functions are passed the status value passed to System_exit(). However, if the program exits using the ANSI C Standard Library exit() function, the System's atexit functions are passed System_STATUS_UNKNOWN; ANSI C atexit functions are not passed the exit status.
typedef System_AbortFxn
index URL

System abort function prototype

C synopsis target-domain
typedef Void (*System_AbortFxn)();
DETAILS
Functions of this type can be plugged into System's abort function that will be executed during abnormal application termination.
SEE
abort
typedef System_AtexitHandler
index URL

System's atexit function prototype

C synopsis target-domain
typedef Void (*System_AtexitHandler)(Int);
DETAILS
Functions of this type can be added to the list of functions that are executed during application termination.
SEE
atexit
typedef System_ExitFxn
index URL

System exit function prototype

C synopsis target-domain
typedef Void (*System_ExitFxn)(Int);
DETAILS
Functions of this type can be plugged into System's exit function that will be executed during normal application termination.
SEE
exit
config System_A_cannotFitIntoArg // module-wide
index URL

Assert that the target's Float type fits in an IArg

C synopsis target-domain
extern const Assert_Id System_A_cannotFitIntoArg;
DETAILS
This assertion is triggered when the %f format specifier is used, the argument treated as an IArg, but for the current target sizeof(Float) > sizeof(IArg).
config System_abortFxn // module-wide
index URL

Abort handler function

C synopsis target-domain
extern const System_AbortFxn System_abortFxn;
DETAILS
This configuration parameter allows user to plug in their own abort function. By default abortStd which calls ANSI C Standard abort() is plugged in. Alternatively abortSpin can be plugged which loops infinitely.
config System_exitFxn // module-wide
index URL

Exit handler function

C synopsis target-domain
extern const System_ExitFxn System_exitFxn;
DETAILS
This configuration parameter allows user to plug in their own exit function. By default exitStd which calls ANSI C Standard exit() is plugged in. Alternatively exitSpin can be plugged which loops infinitely.
config System_maxAtexitHandlers // module-wide
index URL

Maximum number of dynamic atexit handlers allowed in the system

C synopsis target-domain
extern const Int System_maxAtexitHandlers;
DETAILS
Maximum number of System atexit handlers set during runtime via the System.atexit function.
System_abort() // module-wide
index URL

Print a message and abort currently running executable

C synopsis target-domain
Void System_abort(CString str);
ARGUMENTS
str — abort message (not a format string)
DETAILS
This is called when an executable abnormally terminates. The System gate is entered, the SupportProxy's abort function is called and then abortFxn is called. No exit functions bound via System_atexit() or the ANSI C Standard Library atexit() functions are executed.
System_abortSpin() // module-wide
index URL

Lightweight implementation of abortFxn function

C synopsis target-domain
Void System_abortSpin();
DETAILS
This functions loops indefinitely. This can used as an alternative abortFxn when a lightweight implementation is required instead of the ANSI C Standard abort().
System_abortStd() // module-wide
index URL

ANSI C Standard implementation of abortFxn function

C synopsis target-domain
Void System_abortStd();
DETAILS
This function calls ANSI C Standard abort() to terminate currently running executable. This function is used by default in abortFxn.
System_aprintf() // module-wide
index URL

printf where all optional arguments are IArgs

C synopsis target-domain
Int System_aprintf(CString fmt, ...);
DETAILS
This function will treat each argument as though it was widened to be of type IArg prior to being passed to the printf function
SEE
printf
System_asprintf() // module-wide
index URL

sprintf where all optional arguments are IArgs

C synopsis target-domain
Int System_asprintf(Char buf[], CString fmt, ...);
DETAILS
This function will treat each argument as though it was widened to be of type IArg prior to being passed to the sprintf function.
SEE
sprintf
System_atexit() // module-wide
index URL

Add an exit handler

C synopsis target-domain
Bool System_atexit(System_AtexitHandler handler);
ARGUMENTS
handler — the AtexitHandler to invoke during system exit processing.
DETAILS
System_atexit pushes handler onto an internal stack of functions to be executed when system is exiting (e.g. System_exit is called). Up to maxAtexitHandlers functions can be specified in this manner. During the exit processing, the functions are popped off the internal stack and called until the stack is empty.
The System gate is entered before the System_atexit functions are called.
The SupportProxy's ISystemSupport.exit function is called after all the atexit functions are called.
RETURNS
If FALSE is returned, the exit handler was not added and it will not be called during an exit.
System_avprintf() // module-wide
index URL

vprintf where all optional arguments are IArgs

C synopsis target-domain
Int System_avprintf(CString fmt, VaList va);
DETAILS
This function will treat each argument as though it was widened to be of type IArg prior to being passed to the vprintf function.
SEE
vprintf
System_avsprintf() // module-wide
index URL

vsprintf where all optional arguments are IArgs

C synopsis target-domain
Int System_avsprintf(Char buf[], CString fmt, VaList va);
DETAILS
This function is identical to sprintf except that its arguments are passed via a VaList (a "varargs list").
This function will treat each argument as though it was widened to be of type IArg prior to being passed to the vsprintf function
SEE
vsprintf
System_exit() // module-wide
index URL

Exit currently running executable

C synopsis target-domain
Void System_exit(Int stat);
ARGUMENTS
stat — exit status to return to calling environment.
DETAILS
This function is called when an executable needs to terminate normally. This function processes all functions bound via System_atexit and then calls exitFxn. The SupportProxy's exit function is called during this time.
System_exitSpin() // module-wide
index URL

Implements an exitFxn function

C synopsis target-domain
Void System_exitSpin(Int stat);
ARGUMENTS
stat — exit status to return to calling environment.
DETAILS
This functions loops indefinitely. This can used as an alternative exitFxn when a light weight implementation is required instead of the ANSI C Standard exit().
System_exitStd() // module-wide
index URL

Implements an exitFxn function

C synopsis target-domain
Void System_exitStd(Int stat);
ARGUMENTS
stat — exit status to return to calling environment.
DETAILS
This function calls ANSI C Standard exit() to terminate currently running executable normally. This function is used by default in exitFxn.
System_flush() // module-wide
index URL

Flush standard System I/O

C synopsis target-domain
Void System_flush();
DETAILS
This function causes any buffered output characters are "written" to the output device.
The SupportProxy's flush function is called by this function.
System_printf() // module-wide
index URL

A smaller faster printf

C synopsis target-domain
Int System_printf(CString fmt, ...);
ARGUMENTS
fmt — a 'printf-style' format string
DETAILS
This function behaves much like the ANSI C Standard printf but does not support the full range of format strings specified by the C Standard. In addition, several non-standard format specifiers are recognized.
FORMAT STRINGS
The format string is a character string composed of zero or more directives: ordinary characters (not %), which are copied unchanged to the output stream; and conversion specifications, each of which results in fetching zero or more subsequent arguments. Each conversion specification is introduced by the character %, and ends with a conversion specifier. In between there may be (in this order) zero or more flags, an optional minimum field width, an optional precision and an optional length modifier.
FLAGS
The following flags are supported:
-
The converted value is to be left adjusted on the field boundary (the default is right justification.)
0
The value should be zero padded. For d, i, o, u, and x conversions, the converted value is padded on the left with zeros rather than blanks.
FIELD WIDTH
The optional field width specifier is a decimal digit string (with nonzero first digit) specifying a minimum field width. If the converted value has fewer characters than the field width, it will be padded with spaces on the left (or right, if the left-adjustment flag has been given). Instead of a decimal digit string one may write * to specify that the field width is given in the next argument. A negative field width is taken as a '-' flag followed by a positive field width.
PRECISION
The optional precision specifier is a period ('.') followed by an optional decimal digit string. Instead of a decimal digit string one may write * to specify that the precision is given in the next argument which must be of type int.
If the precision is given as just '.', or the precision is negative, the precision is taken to be zero. This gives the minimum number of digits to appear for d, i, o, u, and x conversions, or the maximum number of characters to be printed from a string for s conversions.
LENGTH MODIFIERS
The optional length modifier is a single character from the following list.
l
A following integer conversion corresponds to a long int or unsigned long int argument
CONVERSION SPECIFIERS
The following conversion specifiers are supported.
d, i
signed integer
u
unsigned decimal
x
unsigned hex
o
unsigned octal
p
pointer (@ + hex num)
c
character
s
string
EXTENDED CONVERSION SPECIFIERS
The following conversion specifiers are optionally supported. See the extendedFormats configuration parameter for more information about how to enable these conversion specifiers.
f
decimal floating point.
$
non-ANSI conversion prefix. This prefix indicates that the next character identifies a non-ANSI standard conversion. See the next section for details.
NON ANSI CONVERSION SPECIFIERS
Among the extended conversion specifiers are unique specifiers which are not part of ANSI printf. These are specified using a $, for example %$L.
These unique specifiers do not support the minimum field width attribute. Certain specifiers have additional restrictions; see below.
'$L'
The argument is treated as a pointer to a Types.Label and is converted to an appropriate string.
'$F'
Displays a file and line number; used for displaying the call site. This specifier consumes two arguments, the file and line number, in that order. See an example below.
'$S'
The argument is treated as a format string, and is recursively formatted using any following arguments. This specifier does not support the use of the "precision" field for specifying maximum string length.
The following are example uses of the %$F and %$S format specifiers.
In this call using %$F, the compiler recognizes these symbols and fills in the file and line number.
  System_printf("%$F", __FILE__, __LINE__);
This call outputs, for example,
  "MyCode.c", line 35:
Here is an example using %$S, passing a recursive format string.
  System_printf("Msg: %$S", "My msg, code: %d", 5);
This outputs:
  Msg: My msg, code: 5
RETURNS
printf returns the number of characters printed.
System_processAtExit() // module-wide
index URL

Processes all functions bound via System_atexit

C synopsis target-domain
Void System_processAtExit(Int stat);
ARGUMENTS
stat — exit status which will passed to all functions processed.
DETAILS
This function is called by System_exit to process all functions bound via System_atexit. User can add this to ANSI C standard atexit function so that all functions bound via System_atexit are processed when ANSI C standard exit function is called.
System_putch() // module-wide
index URL

Output a single character

C synopsis target-domain
Void System_putch(Char ch);
ARGUMENTS
ch — character to be output.
DETAILS
The SupportProxy's putch function is called by this function.
System_snprintf() // module-wide
index URL

Write formated output to a character buffer

C synopsis target-domain
Int System_snprintf(Char buf[], SizeT n, CString fmt, ...);
ARGUMENTS
buf — a character output buffer
n — the maximum number of characters, including '\0', written to the output buffer buf
fmt — a 'printf-style' format string
DETAILS
This function is identical to sprintf except that at most n characters are copied to the specified character buffer buf. If n is zero, nothing is written to character buffer. Otherwise, output characters beyond the n - 1 are discarded rather than being written to the character buf, and a null character is written at the end of the characters written into the buffer.
RETURNS
snprintf returns the number of characters that would have been written had n been sufficiently large, not counting the terminating '\0' character.
System_sprintf() // module-wide
index URL

Write formated output to a character buffer

C synopsis target-domain
Int System_sprintf(Char buf[], CString fmt, ...);
ARGUMENTS
buf — a character output buffer
fmt — a 'printf-style' format string
DETAILS
This function is identical to printf except that the output is copied to the specified character buffer buf followed by a terminating '\0' character.
RETURNS
sprintf returns the number of characters output not including the '\0' termination character.
System_vprintf() // module-wide
index URL

A VaList printf

C synopsis target-domain
Int System_vprintf(CString fmt, VaList va);
ARGUMENTS
fmt — a standard 'printf-style' format string.
va — an args list that points to the arguments referenced by the fmt string
DETAILS
This function is identical to printf except that its arguments are passed via a VaList (a "varargs list").
RETURNS
vprintf returns the number of characters output.
System_vsnprintf() // module-wide
index URL

A VaList snprintf

C synopsis target-domain
Int System_vsnprintf(Char buf[], SizeT n, CString fmt, VaList va);
ARGUMENTS
buf — a character output buffer
n — at most number of characters including '\0' written to output buffer
fmt — a standard 'printf-style' format string.
va — an arguments list that points to the arguments referenced by the fmt string
DETAILS
This function is identical to snprintf except that its arguments are passed via a VaList (a "varargs list").
RETURNS
vsnprintf returns the number of characters that would have been written had n been sufficiently large, not counting the terminating '\0' character.
System_vsprintf() // module-wide
index URL

A VaList sprintf

C synopsis target-domain
Int System_vsprintf(Char buf[], CString fmt, VaList va);
ARGUMENTS
buf — a character output buffer
fmt — a standard 'printf-style' format string.
va — an arguments list that points to the arguments referenced by the fmt string
DETAILS
This function is identical to sprintf except that its arguments are passed via a VaList (a "varargs list").
RETURNS
vsprintf returns the number of characters output.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId System_Module_id();
// Get this module's unique id
Bool System_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle System_Module_heap();
// The heap from which this module allocates memory
Bool System_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 System_Module_getMask();
// Returns the diagnostics mask for this module
Void System_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/System.xdc
var System = xdc.useModule('xdc.runtime.System');
local proxy modules
     System.SupportProxy// The implementation module of the low-level system functions = ISystemSupport.Module null
         System.SupportProxy.delegate$ = ISystemSupport.Module null
module-wide constants & types
    const System.STATUS_UNKNOWN// Unknown exit status value = 0xCAFE;
module-wide config parameters
     System.A_cannotFitIntoArg// Assert that the target's Float type fits in an IArg = Assert.Desc {
        msg: "A_cannotFitIntoArg: sizeof(Float) > sizeof(Arg)"
    };
     System.abortFxn// Abort handler function = Void(*)() System.abortStd;
     System.exitFxn// Exit handler function = Void(*)(Int) System.exitStd;
     System.maxAtexitHandlers// Maximum number of dynamic atexit handlers allowed in the system = Int 8;
     System.common$// Common module configuration parameters = Types.Common$ undefined;
     System.extendedFormats// Optional conversions supported by System_printf = String "%$L%$S%$F";
module-wide functions
     System.atexitMeta// Add an exit handler during configuration(Void(*)(Int) handler) returns Void
proxy System.SupportProxy
index URL

The implementation module of the low-level system functions

Configuration settings
System.SupportProxy = ISystemSupport.Module null
// some delegate module inheriting the ISystemSupport interface
    System.SupportProxy.delegate$ = ISystemSupport.Module null
    // explicit access to the currently bound delegate module
DETAILS
This configuration parameter allows one to "bind" a different implementation of the low-level services required to implement System.
      var System = xdc.useModule("xdc.runtime.System");
      var SysStd = xdc.useModule("xdc.runtime.SysStd");
      System.SupportProxy = SysStd;
If this parameter is not set, it defaults to SysMin.
const System.STATUS_UNKNOWN
index URL

Unknown exit status value

Configuration settings
const System.STATUS_UNKNOWN = 0xCAFE;
DETAILS
When the program exits by calling System_exit() the System's atexit functions are passed the status value passed to System_exit(). However, if the program exits using the ANSI C Standard Library exit() function, the System's atexit functions are passed System_STATUS_UNKNOWN; ANSI C atexit functions are not passed the exit status.
C SYNOPSIS
System_STATUS_UNKNOWN
config System.A_cannotFitIntoArg // module-wide
index URL

Assert that the target's Float type fits in an IArg

Configuration settings
System.A_cannotFitIntoArg = Assert.Desc {
    msg: "A_cannotFitIntoArg: sizeof(Float) > sizeof(Arg)"
};
DETAILS
This assertion is triggered when the %f format specifier is used, the argument treated as an IArg, but for the current target sizeof(Float) > sizeof(IArg).
C SYNOPSIS
System_A_cannotFitIntoArg
config System.abortFxn // module-wide
index URL

Abort handler function

Configuration settings
System.abortFxn = Void(*)() System.abortStd;
DETAILS
This configuration parameter allows user to plug in their own abort function. By default abortStd which calls ANSI C Standard abort() is plugged in. Alternatively abortSpin can be plugged which loops infinitely.
C SYNOPSIS
System_abortFxn
config System.exitFxn // module-wide
index URL

Exit handler function

Configuration settings
System.exitFxn = Void(*)(Int) System.exitStd;
DETAILS
This configuration parameter allows user to plug in their own exit function. By default exitStd which calls ANSI C Standard exit() is plugged in. Alternatively exitSpin can be plugged which loops infinitely.
C SYNOPSIS
System_exitFxn
config System.maxAtexitHandlers // module-wide
index URL

Maximum number of dynamic atexit handlers allowed in the system

Configuration settings
System.maxAtexitHandlers = Int 8;
DETAILS
Maximum number of System atexit handlers set during runtime via the System.atexit function.
C SYNOPSIS
System_maxAtexitHandlers
metaonly config System.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
System.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly config System.extendedFormats // module-wide
index URL

Optional conversions supported by System_printf

Configuration settings
System.extendedFormats = String "%$L%$S%$F";
DETAILS
This string specifies the set of optional argument conversion specifiers required by the application. By reducing the number of optional conversions understood by the System printf methods, it is possible to significantly reduce the code size footprint of the System module. This configuration parameter enables one to balance printf functionality against code size footprint.
The format of this string is simply a concatenated list of the desired conversion specifiers (with the leading % character). For example, to support both %f and %$L set extendedFormats to "%$L%f".
To disable all optional converstions, set extendedFormats to null or the empty string ("").
For a complete list of supported extensions, see the System_printf "Extended_Format_Specifiers" section.
NOTE
If an optional conversion is used by some part of the application and it is not specified in extendedFormats, the conversion character(s) and leading % are treated as ordinary characters to be output. As a result, all subsequent arguments will almost certainly be converted using the wrong conversion specifier!
SEE
printf
metaonly System.atexitMeta() // module-wide
index URL

Add an exit handler during configuration

Configuration settings
System.atexitMeta(Void(*)(Int) handler) returns Void
ARGUMENTS
handler — the AtexitHandler to invoke during system exit processing.
DETAILS
This is the static counterpart to System_atexit(). This method can be used to add atexit handlers at configuration time. These handlers do not count against the maxAtexitHandlers.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.Text
index URL

Runtime text handling services

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module efficiently manages a collection of strings that have common substrings. Collections with a high degree of commonality are stored in much less space than as ordinary table of independent C strings. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Text.xdc
#include <xdc/runtime/Text.h>
Functions
Int | Text_putLab// Convert label to an ASCII character sequence(Types_Label *lab, Char **bufp, Int len);
Int | Text_putMod// Convert module ID to its ASCII name(Types_ModuleId mid, Char **bufp, Int len);
Int | Text_putSite// Convert call site structure to an ASCII character sequence(Types_Site *site, Char **bufp, Int len);
Functions common to all target modules
 | Text_Module_getMask// Returns the diagnostics mask for this module, Text_Module_hasMask// Test whether this module has a diagnostics mask, Text_Module_heap// The heap from which this module allocates memory, Text_Module_id// Get this module's unique id, Text_Module_setMask// Set the diagnostics mask for this module, Text_Module_startupDone// Test if this module has completed startup
Typedefs
typedef Types_Label | Text_Label// ;
Constants
extern const Bool | Text_isLoaded// Ensure character-strings are loaded in target memory;
extern const String | Text_nameEmpty// Default NULL instance name;
extern const String | Text_nameStatic// Default static instance name;
extern const String | Text_nameUnknown// Default unknowable instance name;
DETAILS
This module efficiently manages a collection of strings that have common substrings. Collections with a high degree of commonality are stored in much less space than as ordinary table of independent C strings.
To further save space, the "compressed" representation need not even be loaded in the target's memory; see isLoaded.
The total space available for the compressed representation of text strings is limited to 64K characters; each string is represented by a 16-bit "rope id".
typedef Text_Label
index URL
C synopsis target-domain
typedef Types_Label Text_Label;
config Text_isLoaded // module-wide
index URL

Ensure character-strings are loaded in target memory

C synopsis target-domain
extern const Bool Text_isLoaded;
DETAILS
Character strings managed by this module are allocated together with other character strings, and loaded to the target, when this parameter is set to its default value true. If this parameter is set to false, the character strings managed by Text are removed from the application.
A consequence of setting this parameter to false is that all names assigned to static instances are set to NULL, and cannot be displayed by the code loaded to the target. Also, the Log Events that automatically print instance names will print NULL for any static instance. The same code would print the pointers to the names if this parameter is set to true and 'isLoaded is set to 'false`.
ROV is not affected by this parameter and it will also correctly display names of static instances in their modules' views. ROV detects these names from the saved configuration files.
Module and event IDs are still unique and Log.Events within one module have consecutive IDs.
config Text_nameEmpty // module-wide
index URL

Default NULL instance name

C synopsis target-domain
extern const String Text_nameEmpty;
DETAILS
The name used if the instance's name has been set to NULL.
config Text_nameStatic // module-wide
index URL

Default static instance name

C synopsis target-domain
extern const String Text_nameStatic;
DETAILS
The name of an instance if the name exists but it's not loaded on the target.
config Text_nameUnknown // module-wide
index URL

Default unknowable instance name

C synopsis target-domain
extern const String Text_nameUnknown;
DETAILS
The name of an instance if the module's instances are configured to not have names.
Text_putLab() // module-wide
index URL

Convert label to an ASCII character sequence

C synopsis target-domain
Int Text_putLab(Types_Label *lab, Char **bufp, Int len);
ARGUMENTS
lab — address of the label to interpret
bufp — address of the output buffer pointer or NULL
If bufp is NULL, the label's characters are output via System.putch().
len — maximum number of characters to generate
If len is negative, the number of characters to be generated is not limited.
DETAILS
This function converts a Types.Label to a sequence of ASCII characters, writes the characters to the supplied buffer, updates the buffer pointer to point to the location after the last output character, and returns the number of characters output.
No more than len characters will be output. If the label would otherwise be longer, the output is truncated at the point where a potential overflow is detected. The return value always reflects the number of characters output, but it may be less than len.
Label structures can be initialized from any module's instance handle using the module's Mod_Handle_label() method. See Types.Label for more information.
RETURNS
The return value always reflects the number of characters output, but it may be less than len.
SEE
Types.Label
Text_putMod() // module-wide
index URL

Convert module ID to its ASCII name

C synopsis target-domain
Int Text_putMod(Types_ModuleId mid, Char **bufp, Int len);
ARGUMENTS
mid — ID of the module
bufp — address of the output buffer pointer or NULL
If bufp is NULL, the module's name characters are output via System.putch().
len — maximum number of characters to generate
If len is negative, the number of characters to be generated is not limited.
DETAILS
This function converts a Types.ModuleId to a sequence of ASCII characters, writes the characters to the supplied buffer, updates the buffer pointer to point to the location after the last output character, and returns the number of characters output.
No more than len characters will be output. If the module name would otherwise be longer, the output is truncated at the point where a potential overflow is detected. The return value always reflects the number of characters output, but it may be less than len.
RETURNS
The return value always reflects the number of characters output, but it may be less than len.
Text_putSite() // module-wide
index URL

Convert call site structure to an ASCII character sequence

C synopsis target-domain
Int Text_putSite(Types_Site *site, Char **bufp, Int len);
ARGUMENTS
site — address of the call site structure to interpret
bufp — address of the output buffer pointer or NULL
If bufp is NULL, the site's name characters are output via System.putch().
len — maximum number of characters to generate
If len is negative, the number of characters to be generated is not limited.
DETAILS
This function converts a Types.Site to a sequence of ASCII characters, writes the characters to the supplied buffer, updates the buffer pointer to point to the location after the last output character, and returns the number of characters output.
No more than len characters will be output. If the sequence would otherwise be longer, the output is truncated at the point where a potential overflow is detected.
RETURNS
The return value always reflects the number of characters output, but it may be less than len.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Text_Module_id();
// Get this module's unique id
Bool Text_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Text_Module_heap();
// The heap from which this module allocates memory
Bool Text_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Text_Module_getMask();
// Returns the diagnostics mask for this module
Void Text_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Text.xdc
var Text = xdc.useModule('xdc.runtime.Text');
module-wide config parameters
     Text.isLoaded// Ensure character-strings are loaded in target memory = Bool true;
     Text.nameEmpty// Default NULL instance name = String "{empty-instance-name}";
     Text.nameStatic// Default static instance name = String "{static-instance-name}";
     Text.nameUnknown// Default unknowable instance name = String "{unknown-instance-name}";
     Text.common$// Common module configuration parameters = Types.Common$ undefined;
config Text.isLoaded // module-wide
index URL

Ensure character-strings are loaded in target memory

Configuration settings
Text.isLoaded = Bool true;
DETAILS
Character strings managed by this module are allocated together with other character strings, and loaded to the target, when this parameter is set to its default value true. If this parameter is set to false, the character strings managed by Text are removed from the application.
A consequence of setting this parameter to false is that all names assigned to static instances are set to NULL, and cannot be displayed by the code loaded to the target. Also, the Log Events that automatically print instance names will print NULL for any static instance. The same code would print the pointers to the names if this parameter is set to true and 'isLoaded is set to 'false`.
ROV is not affected by this parameter and it will also correctly display names of static instances in their modules' views. ROV detects these names from the saved configuration files.
Module and event IDs are still unique and Log.Events within one module have consecutive IDs.
C SYNOPSIS
Text_isLoaded
config Text.nameEmpty // module-wide
index URL

Default NULL instance name

Configuration settings
Text.nameEmpty = String "{empty-instance-name}";
DETAILS
The name used if the instance's name has been set to NULL.
C SYNOPSIS
Text_nameEmpty
config Text.nameStatic // module-wide
index URL

Default static instance name

Configuration settings
Text.nameStatic = String "{static-instance-name}";
DETAILS
The name of an instance if the name exists but it's not loaded on the target.
C SYNOPSIS
Text_nameStatic
config Text.nameUnknown // module-wide
index URL

Default unknowable instance name

Configuration settings
Text.nameUnknown = String "{unknown-instance-name}";
DETAILS
The name of an instance if the module's instances are configured to not have names.
C SYNOPSIS
Text_nameUnknown
metaonly config Text.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Text.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.Timestamp
index URL

Timestamp services

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module provides xdc.runtime.ITimestampClient APIs for the xdc Runtime Support Library. Calls to these APIs are forwarded to a platform specific xdc.runtime.ITimestampProvider implementation. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Timestamp.xdc
#include <xdc/runtime/Timestamp.h>
Functions common to all ITimestampClient modules
Bits32 | Timestamp_get32// Return a 32-bit timestamp();
Void | Timestamp_get64// Return a 64-bit timestamp(Types_Timestamp64 *result);
Void | Timestamp_getFreq// Get the timestamp timer's frequency (in Hz)(Types_FreqHz *freq);
Functions common to all target modules
 | Timestamp_Module_getMask// Returns the diagnostics mask for this module, Timestamp_Module_hasMask// Test whether this module has a diagnostics mask, Timestamp_Module_heap// The heap from which this module allocates memory, Timestamp_Module_id// Get this module's unique id, Timestamp_Module_setMask// Set the diagnostics mask for this module, Timestamp_Module_startupDone// Test if this module has completed startup
DETAILS
This module provides xdc.runtime.ITimestampClient APIs for the xdc Runtime Support Library. Calls to these APIs are forwarded to a platform specific xdc.runtime.ITimestampProvider implementation.
A user can attach their own ITimestampProvider module using the following config file command:
  xdc.runtime.Timestamp.SupportProxy = xdc.useModule("usersTimestampProvider");
If no such SupportProxy initialization is done, the xdc.runtime.TimestampNull ITimestampProvider implementation, which provides null stubs for the APIs, will be attached by default.
If the user is developing code using CCS, the xdc.runtime.TimestampStd ITimestampProvider implementation, which uses the ANSI C clock() function, may provide a satisfactory timestamp source (remember to enable the profile clock in CCS).
To use the TimestampStd implementation, add the following to your config script:
  xdc.runtime.Timestamp.SupportProxy = xdc.useModule("xdc.runtime.TimestampStd");
Timestamp_get32() // module-wide
index URL

Return a 32-bit timestamp

C synopsis target-domain
Bits32 Timestamp_get32();
RETURNS
Returns a 32-bit timestamp value. Use getFreq to convert this value into units of real time.
SEE
get64
Timestamp_get64() // module-wide
index URL

Return a 64-bit timestamp

C synopsis target-domain
Void Timestamp_get64(Types_Timestamp64 *result);
ARGUMENTS
result — pointer to 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide timestamp value where the current timestamp is written.
If the underlying hardware does not support 64-bit resolution, the hi field of result is always set to 0; see xdc.runtime.Types.Timestamp64. So, it is possible for the lo field to wrap around without any change to the hi field. Use getFreq to convert this value into units of real time.
SEE
get32
Timestamp_getFreq() // module-wide
index URL

Get the timestamp timer's frequency (in Hz)

C synopsis target-domain
Void Timestamp_getFreq(Types_FreqHz *freq);
ARGUMENTS
freq — pointer to a 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide frequency value where the timer's frequency (in Hz) is written; see xdc.runtime.Types.FreqHz. This function provides a way of converting timestamp values into units of real time.
SEE
get32, get64
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Timestamp_Module_id();
// Get this module's unique id
Bool Timestamp_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Timestamp_Module_heap();
// The heap from which this module allocates memory
Bool Timestamp_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Timestamp_Module_getMask();
// Returns the diagnostics mask for this module
Void Timestamp_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Timestamp.xdc
var Timestamp = xdc.useModule('xdc.runtime.Timestamp');
local proxy modules
     Timestamp.SupportProxy// User supplied time stamp provider module = ITimestampProvider.Module null
         Timestamp.SupportProxy.delegate$ = ITimestampProvider.Module null
module-wide config parameters
     Timestamp.common$// Common module configuration parameters = Types.Common$ undefined;
proxy Timestamp.SupportProxy
index URL

User supplied time stamp provider module

Configuration settings
Timestamp.SupportProxy = ITimestampProvider.Module null
// some delegate module inheriting the ITimestampProvider interface
    Timestamp.SupportProxy.delegate$ = ITimestampProvider.Module null
    // explicit access to the currently bound delegate module
DETAILS
The SupportProxy module provides application/platform specific implementations of the xdc.runtime.ITimestampProvider APIs.
If not explicitly supplied by the user, this proxy defaults to xdc.runtime.TimestampNull, which provides null stubs for all of the ITimestampProvider APIs.
metaonly config Timestamp.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Timestamp.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.TimestampNull
index URL

Empty implementation of ITimestampProvider

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in xdc/runtime/TimestampNull.xdc
#include <xdc/runtime/TimestampNull.h>
Functions common to all ITimestampClient modules
Bits32 | TimestampNull_get32// Return a 32-bit timestamp();
Void | TimestampNull_get64// Return a 64-bit timestamp(Types_Timestamp64 *result);
Void | TimestampNull_getFreq// Get the timestamp timer's frequency (in Hz)(Types_FreqHz *freq);
Functions common to all target modules
 | TimestampNull_Module_getMask// Returns the diagnostics mask for this module, TimestampNull_Module_hasMask// Test whether this module has a diagnostics mask, TimestampNull_Module_heap// The heap from which this module allocates memory, TimestampNull_Module_id// Get this module's unique id, TimestampNull_Module_setMask// Set the diagnostics mask for this module, TimestampNull_Module_startupDone// Test if this module has completed startup
TimestampNull_get32() // module-wide
index URL

Return a 32-bit timestamp

C synopsis target-domain
Bits32 TimestampNull_get32();
RETURNS
Returns a 32-bit timestamp value. Use getFreq to convert this value into units of real time.
SEE
get64
TimestampNull_get64() // module-wide
index URL

Return a 64-bit timestamp

C synopsis target-domain
Void TimestampNull_get64(Types_Timestamp64 *result);
ARGUMENTS
result — pointer to 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide timestamp value where the current timestamp is written.
If the underlying hardware does not support 64-bit resolution, the hi field of result is always set to 0; see xdc.runtime.Types.Timestamp64. So, it is possible for the lo field to wrap around without any change to the hi field. Use getFreq to convert this value into units of real time.
SEE
get32
TimestampNull_getFreq() // module-wide
index URL

Get the timestamp timer's frequency (in Hz)

C synopsis target-domain
Void TimestampNull_getFreq(Types_FreqHz *freq);
ARGUMENTS
freq — pointer to a 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide frequency value where the timer's frequency (in Hz) is written; see xdc.runtime.Types.FreqHz. This function provides a way of converting timestamp values into units of real time.
SEE
get32, get64
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId TimestampNull_Module_id();
// Get this module's unique id
Bool TimestampNull_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle TimestampNull_Module_heap();
// The heap from which this module allocates memory
Bool TimestampNull_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 TimestampNull_Module_getMask();
// Returns the diagnostics mask for this module
Void TimestampNull_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/TimestampNull.xdc
var TimestampNull = xdc.useModule('xdc.runtime.TimestampNull');
module-wide config parameters
     TimestampNull.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config TimestampNull.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
TimestampNull.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.TimestampStd
index URL

Implementation of ITimestampProvider using ANSI C clock()

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in xdc/runtime/TimestampStd.xdc
#include <xdc/runtime/TimestampStd.h>
Functions common to all ITimestampClient modules
Bits32 | TimestampStd_get32// Return a 32-bit timestamp();
Void | TimestampStd_get64// Return a 64-bit timestamp(Types_Timestamp64 *result);
Void | TimestampStd_getFreq// Get the timestamp timer's frequency (in Hz)(Types_FreqHz *freq);
Functions common to all target modules
 | TimestampStd_Module_getMask// Returns the diagnostics mask for this module, TimestampStd_Module_hasMask// Test whether this module has a diagnostics mask, TimestampStd_Module_heap// The heap from which this module allocates memory, TimestampStd_Module_id// Get this module's unique id, TimestampStd_Module_setMask// Set the diagnostics mask for this module, TimestampStd_Module_startupDone// Test if this module has completed startup
TimestampStd_get32() // module-wide
index URL

Return a 32-bit timestamp

C synopsis target-domain
Bits32 TimestampStd_get32();
RETURNS
Returns a 32-bit timestamp value. Use getFreq to convert this value into units of real time.
SEE
get64
TimestampStd_get64() // module-wide
index URL

Return a 64-bit timestamp

C synopsis target-domain
Void TimestampStd_get64(Types_Timestamp64 *result);
ARGUMENTS
result — pointer to 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide timestamp value where the current timestamp is written.
If the underlying hardware does not support 64-bit resolution, the hi field of result is always set to 0; see xdc.runtime.Types.Timestamp64. So, it is possible for the lo field to wrap around without any change to the hi field. Use getFreq to convert this value into units of real time.
SEE
get32
TimestampStd_getFreq() // module-wide
index URL

Get the timestamp timer's frequency (in Hz)

C synopsis target-domain
Void TimestampStd_getFreq(Types_FreqHz *freq);
ARGUMENTS
freq — pointer to a 64-bit result
This parameter is a pointer to a structure representing a 64-bit wide frequency value where the timer's frequency (in Hz) is written; see xdc.runtime.Types.FreqHz. This function provides a way of converting timestamp values into units of real time.
SEE
get32, get64
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId TimestampStd_Module_id();
// Get this module's unique id
Bool TimestampStd_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle TimestampStd_Module_heap();
// The heap from which this module allocates memory
Bool TimestampStd_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 TimestampStd_Module_getMask();
// Returns the diagnostics mask for this module
Void TimestampStd_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/TimestampStd.xdc
var TimestampStd = xdc.useModule('xdc.runtime.TimestampStd');
module-wide config parameters
     TimestampStd.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config TimestampStd.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
TimestampStd.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:01 GMT


module xdc.runtime.Types
index URL

Basic constants and types

  • C synopsis
  • Individual elements
  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
This module defines basic constants and types used throughout the xdc.runtime package and, in some cases, in every module. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/Types.xdc
#include <xdc/runtime/Types.h>
Functions
macro Types_RopeId | Types_getEventId// Get event ID of the specified event(Types_Event evt);
macro Types_ModuleId | Types_getModuleId// Get the module ID for the specified event(Types_Event evt);
macro Types_Event | Types_makeEvent// Make an Event from an Event ID and a module ID(Types_RopeId id, Types_ModuleId callSite);
Functions common to all target modules
 | Types_Module_getMask// Returns the diagnostics mask for this module, Types_Module_hasMask// Test whether this module has a diagnostics mask, Types_Module_heap// The heap from which this module allocates memory, Types_Module_id// Get this module's unique id, Types_Module_setMask// Set the diagnostics mask for this module, Types_Module_startupDone// Test if this module has completed startup
Typedefs
typedef enum | Types_CreatePolicy// Instance creation policy ...
typedef Bits16 | Types_DiagsMask// ;
typedef Bits32 | Types_Event// ILogger event encoding;
typedef struct | Types_FreqHz// Frequency-in-hertz struct ...
typedef struct | Types_Label// Instance label struct ...
typedef Bits16 | Types_ModuleId// Unique module identifier;
typedef enum | Types_OutputPolicy// Destination file for module's functions ...
typedef struct | Types_RegDesc// Registry module descriptor ...
typedef struct | Types_Site// Error site description struct ...
typedef struct | Types_Timestamp64// 64-bit timestamp struct ...
DETAILS
This module defines basic constants and types used throughout the xdc.runtime package and, in some cases, in every module.
The Common$ structure defined by the Types module is available for (or common to) all modules. Every field of the Common$ structure is a configuration parameter that may be set within a configuration script for any module (not just the xdc.runtime modules). The fields of this structure are typically read by the modules in the xdc.runtime package at configuration time to control the generation of data structures that are embedded in the application and referenced by these modules at runtime.
Every module has a configuration parameter named common$ that is of type Common$. This allows the user of any module to control the module's diagnostics, where its instances are allocated, how they are allocated, and (for gated modules) what gate it should use to protect critical sections.
EXAMPLES
Configuration example: The following configuration script specifies that the instance objects managed by the Memory module in the xdc.runtime package should be placed in the ".fast" memory section and that ENTRY diagnostics should be available at runtime.
      var Memory = xdc.useModule('xdc.runtime.Memory");
      Memory.common$.instanceSection = ".fast";
      Memory.common$.diags_ENTRY = Diags.RUNTIME_OFF
Note that by setting Memory.common$.diags_ENTRY to Diags.RUNTIME_OFF we are both enabling ENTRY events and specifying that they are initially disabled; they must be explicitly enabled at runtime. See the Diags modules for additional information.
enum Types_CreatePolicy
index URL

Instance creation policy

C synopsis target-domain
typedef enum Types_CreatePolicy {
    Types_STATIC_POLICY,
    // static creation only; no runtime create/delete
    Types_CREATE_POLICY,
    // dynamic creation, but no deletion
    Types_DELETE_POLICY
    // dynamic creation and deletion
} Types_CreatePolicy;
enum Types_OutputPolicy
index URL

Destination file for module's functions

C synopsis target-domain
typedef enum Types_OutputPolicy {
    Types_COMMON_FILE,
    // functions are in the common C file
    Types_SEPARATE_FILE,
    // module has its own separate file
    Types_NO_FILE
    // functions are not generated
} Types_OutputPolicy;
typedef Types_DiagsMask
index URL
C synopsis target-domain
typedef Bits16 Types_DiagsMask;
typedef Types_Event
index URL

ILogger event encoding

C synopsis target-domain
typedef Bits32 Types_Event;
DETAILS
Whereas a Log.Event encodes an event ID and a mask, a Types_Event encodes the same event ID and the module ID of the module containing the call site that generated the Types_Event.
typedef Types_ModuleId
index URL

Unique module identifier

C synopsis target-domain
typedef Bits16 Types_ModuleId;
DETAILS
Module IDs are assigned at configuration time based in the set of modules that are "used" in the application. So, although each module has a unique 16-bit ID at runtime this ID may vary between configurations of the application.
To save precious data space, module names are managed by the Text module and it is this table that is used to assign module IDs. If the table is maintained on the target, the module ID is an "index" into this table; otherwise, the module ID is simply a unique integer less than the total number of modules in the application.
Although module IDs are not independent of an application's configuration, a module's ID may be compared to a runtime value symbolically. Every module has a (generated) method that returns the module's ID; e.g., a module named Task has a method named Task_Module_id() which returns Task's module ID.
      #include <xdc/runtime/Types.h>
      #include <ti/sysbios/knl/Task.h>
         :
      void checkId(Types_ModuleId modId) {
          if (Task_Module_id() == modId) {
              System_printf("Task module");
          }
      }
struct Types_FreqHz
index URL

Frequency-in-hertz struct

C synopsis target-domain
typedef struct Types_FreqHz {
    Bits32 hi;
    // most significant 32-bits of frequency
    Bits32 lo;
    // least significant 32-bits of frequency
} Types_FreqHz;
struct Types_Label
index URL

Instance label struct

C synopsis target-domain
typedef struct Types_Label {
    Ptr handle;
    // instance object address
     Types_ModuleId modId;
    // corresponding module id
    String iname;
    // name supplied during instance creation
    Bool named;
    // true, if iname is available
} Types_Label;
DETAILS
Label structures are used to provide human readable names for instance handles.
It is possible to initialize a Label from any instance handle. All modules that support instances provide a method named Mod_Handle_label() which, given an instance handle and a pointer to a Label structure, initializes the structure with all available information. For example, the following code fragment initializes a Label from an instance of the HeapMin module.
      HeapMin_Handle heap;
      Types_Label label;
      HeapMin_Handle_label(heap, &label);
Unless you explicitly disable it, System_printf can be used to convert a pointer to a Label into an human readable "instance name". Continuing with the example above, the following line can be used to print an instance's label.
      System_printf("heap instance name: %$L\n", &label);
SEE
System.printf, System.extendedFormats, Text.putLabel
struct Types_RegDesc
index URL

Registry module descriptor

C synopsis target-domain
typedef struct Types_RegDesc {
     Types_RegDesc *next;
    CString modName;
     Types_ModuleId id;
     Types_DiagsMask mask;
} Types_RegDesc;
struct Types_Site
index URL

Error site description struct

C synopsis target-domain
typedef struct Types_Site {
     Types_ModuleId mod;
    // module id of this site
    CString file;
    // filename of this site
    Int line;
    // line number of this site
} Types_Site;
FIELDS
mod — the module id of the module containing the call site
file — the name of the file containing the call site or NULL; some call sites omit the file name to save data space.
line — the line number within the file named
DETAILS
This structure describes the location of the line that raised an error.
struct Types_Timestamp64
index URL

64-bit timestamp struct

C synopsis target-domain
typedef struct Types_Timestamp64 {
    Bits32 hi;
    // most significant 32-bits of timestamp
    Bits32 lo;
    // least significant 32-bits of timestamp
} Types_Timestamp64;
DETAILS
Some platforms only support 32-bit timestamps. In this case, the most significant 32-bits are always set to 0.
Types_getEventId() // module-wide
index URL

Get event ID of the specified event

C synopsis target-domain
macro Types_RopeId Types_getEventId(Types_Event evt);
ARGUMENTS
evt — an event created via makeEvent
DETAILS
This method is used to get an ID that can be compared to other "known" IDs. For example, after a Types_Event is generated, the following code determines if the event corresponds to a Log.L_create event:
      Bool isCreateEvent(Types_Event evt) {
          return (Log_getEventId(Log_L_create) == Types_getEventId(evt));
      }
RETURNS
This function returns the event ID of a specified event.
Types_getModuleId() // module-wide
index URL

Get the module ID for the specified event

C synopsis target-domain
macro Types_ModuleId Types_getModuleId(Types_Event evt);
ARGUMENTS
evt — an event created via makeEvent
RETURNS
This function returns the module ID of a specified event.
Types_makeEvent() // module-wide
index URL

Make an Event from an Event ID and a module ID

C synopsis target-domain
macro Types_Event Types_makeEvent(Types_RopeId id, Types_ModuleId callSite);
ARGUMENTS
id — ID of the event itself
callSite — the module from which this event originated
RETURNS
This function returns an event.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Types_Module_id();
// Get this module's unique id
Bool Types_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Types_Module_heap();
// The heap from which this module allocates memory
Bool Types_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Types_Module_getMask();
// Returns the diagnostics mask for this module
Void Types_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/Types.xdc
var Types = xdc.useModule('xdc.runtime.Types');
module-wide constants & types
    values of type Types.CreatePolicy// Instance creation policy
        const Types.STATIC_POLICY// static creation only; no runtime create/delete;
        const Types.CREATE_POLICY// dynamic creation, but no deletion;
        const Types.DELETE_POLICY// dynamic creation and deletion;
    values of type Types.OutputPolicy// Destination file for module's functions
        const Types.COMMON_FILE// functions are in the common C file;
        const Types.SEPARATE_FILE// module has its own separate file;
        const Types.NO_FILE// functions are not generated;
    var obj = new Types.Common$// Common module config struct;
        obj.diags_ASSERT// module's Diags assert mode = Diags.Mode ...
        obj.diags_ENTRY// module's function entry Diags mode = Diags.Mode ...
        obj.diags_EXIT// module's function exit Diags mode = Diags.Mode ...
        obj.diags_INTERNAL// module's internal assert mode = Diags.Mode ...
        obj.diags_LIFECYCLE// module's instance lifecycle mode = Diags.Mode ...
        obj.diags_STATUS// module's errors and warnings = Diags.Mode ...
        obj.diags_USER1// module's user1 Diags mode = Diags.Mode ...
        obj.diags_USER2// module's user2 Diags mode = Diags.Mode ...
        obj.diags_USER3// module's user3 Diags mode = Diags.Mode ...
        obj.diags_USER4// module's user4 Diags mode = Diags.Mode ...
        obj.diags_USER5// module's user5 Diags mode = Diags.Mode ...
        obj.diags_USER6// module's user6 Diags mode = Diags.Mode ...
        obj.diags_USER7// module's user7 Diags mode = Diags.Mode ...
        obj.diags_INFO// module's informational event mode = Diags.Mode ...
        obj.diags_USER8// module's user8 Diags mode = Diags.Mode ...
        obj.diags_ANALYSIS// module's Diags analysis mode = Diags.Mode ...
        obj.fxntab = Bool ...
        obj.gate// module's gate = IGateProvider.Handle ...
        obj.gateParams// gate params for module created gates = Ptr ...
        obj.instanceHeap// module's instance heap = IHeap.Handle ...
        obj.instanceSection// memory section for module's instances = String ...
        obj.logger// module's logger = ILogger.Handle ...
        obj.outPolicy// destination file for module's code = Types.OutputPolicy ...
        obj.memoryPolicy// module's memory policy = Types.CreatePolicy ...
        obj.namedInstance// true => instances have string names = Bool ...
        obj.namedModule// true => module's name is on target = Bool ...
        obj.romPatchTable = Bool ...
    var obj = new Types.FreqHz// Frequency-in-hertz struct;
        obj.hi// most significant 32-bits of frequency = Bits32 ...
        obj.lo// least significant 32-bits of frequency = Bits32 ...
    var obj = new Types.Label// Instance label struct;
        obj.handle// instance object address = Ptr ...
        obj.modId// corresponding module id = Bits16 ...
        obj.iname// name supplied during instance creation = String ...
        obj.named// true, if iname is available = Bool ...
    var obj = new Types.RegDesc// Registry module descriptor;
        obj.next = Types.RegDesc* ...
        obj.modName = CString ...
        obj.id = Bits16 ...
        obj.mask = Bits16 ...
    var obj = new Types.Site// Error site description struct;
        obj.mod// module id of this site = Bits16 ...
        obj.file// filename of this site = CString ...
        obj.line// line number of this site = Int ...
    var obj = new Types.Timestamp64// 64-bit timestamp struct;
        obj.hi// most significant 32-bits of timestamp = Bits32 ...
        obj.lo// least significant 32-bits of timestamp = Bits32 ...
module-wide config parameters
     Types.common$// Common module configuration parameters = Types.Common$ undefined;
enum Types.CreatePolicy
index URL

Instance creation policy

Configuration settings
values of type Types.CreatePolicy
    const Types.STATIC_POLICY;
    // static creation only; no runtime create/delete
    const Types.CREATE_POLICY;
    // dynamic creation, but no deletion
    const Types.DELETE_POLICY;
    // dynamic creation and deletion
C SYNOPSIS
Types_CreatePolicy
enum Types.OutputPolicy
index URL

Destination file for module's functions

Configuration settings
values of type Types.OutputPolicy
    const Types.COMMON_FILE;
    // functions are in the common C file
    const Types.SEPARATE_FILE;
    // module has its own separate file
    const Types.NO_FILE;
    // functions are not generated
C SYNOPSIS
Types_OutputPolicy
metaonly struct Types.Common$
index URL

Common module config struct

Configuration settings
var obj = new Types.Common$;
    obj.diags_ASSERT = Diags.Mode ...
    // module's Diags assert mode
    obj.diags_ENTRY = Diags.Mode ...
    // module's function entry Diags mode
    obj.diags_EXIT = Diags.Mode ...
    // module's function exit Diags mode
    obj.diags_INTERNAL = Diags.Mode ...
    // module's internal assert mode
    obj.diags_LIFECYCLE = Diags.Mode ...
    // module's instance lifecycle mode
    obj.diags_STATUS = Diags.Mode ...
    // module's errors and warnings
    obj.diags_USER1 = Diags.Mode ...
    // module's user1 Diags mode
    obj.diags_USER2 = Diags.Mode ...
    // module's user2 Diags mode
    obj.diags_USER3 = Diags.Mode ...
    // module's user3 Diags mode
    obj.diags_USER4 = Diags.Mode ...
    // module's user4 Diags mode
    obj.diags_USER5 = Diags.Mode ...
    // module's user5 Diags mode
    obj.diags_USER6 = Diags.Mode ...
    // module's user6 Diags mode
    obj.diags_USER7 = Diags.Mode ...
    // module's user7 Diags mode
    obj.diags_INFO = Diags.Mode ...
    // module's informational event mode
    obj.diags_USER8 = Diags.Mode ...
    // module's user8 Diags mode
    obj.diags_ANALYSIS = Diags.Mode ...
    // module's Diags analysis mode
    obj.fxntab = Bool ...
    obj.gate = IGateProvider.Handle ...
    // module's gate
    obj.gateParams = Ptr ...
    // gate params for module created gates
    obj.instanceHeap = IHeap.Handle ...
    // module's instance heap
    obj.instanceSection = String ...
    // memory section for module's instances
    obj.logger = ILogger.Handle ...
    // module's logger
    obj.outPolicy = Types.OutputPolicy ...
    // destination file for module's code
    obj.memoryPolicy = Types.CreatePolicy ...
    // module's memory policy
    obj.namedInstance = Bool ...
    // true => instances have string names
    obj.namedModule = Bool ...
    // true => module's name is on target
    obj.romPatchTable = Bool ...
FIELDS
diags_ASSERT — The Diags.ASSERT bit of a module's diagnostics mask.
diags_ENTRY — The Diags.ENTRY category of a module's diagnostics mask.
diags_EXIT — The Diags.EXIT category of a module's diagnostics mask.
diags_INTERNAL — The Diags.INTERNAL bit of a module's diagnostics mask.
diags_LIFECYCLE — The Diags.LIFECYCLE category of a module's diagnostics mask.
diags_STATUS — The Diags.STATUS category of a module's diagnostics mask.
diags_USER1 — The Diags.USER1 category of a module's diagnostics mask.
diags_USER2 — The Diags.USER2 category of a module's diagnostics mask.
diags_USER3 — The Diags.USER3 category of a module's diagnostics mask.
diags_USER4 — The Diags.USER4 category of a module's diagnostics mask.
diags_USER5 — The Diags.USER5 category of a module's diagnostics mask.
diags_USER6 — The Diags.USER6 category of a module's diagnostics mask.
diags_USER7 — The Diags.USER7 category of a module's diagnostics mask. The bit for this category has been repurposed for the Diags.INFO category, so the use of USER7 has been deprecated.
diags_INFO — The Diags.INFO category of a module's diagnostics mask.
diags_USER8 — The Diags.USER8 category of a module's diagnostics mask. The bit for this category has been repurposed for the Diags.ANALYSIS category, so the use of USER8 has been deprecated.
diags_ANALYSIS — The Diags.ANALYSIS category of a module's diagnostics mask.
fxntab — This configuration parameter is only applicable to modules that inherit an interface and have instance objects. Setting fxntab to false can save some data space but also prevents the application from using instance objects through abstract interfaces.
Function tables are used whenever it's necessary to call a module's methods via an abstract interface; e.g., the Memory module calls methods defined by the IHeap interface but there may be several distinct modules that implement this interface. In order for this type of call to be possible, instance objects contain a reference to a function table containing the instance module's functions; the caller gets the module's function from the instance object and calls through a function pointer. Every module that inherits an interface has such a table and modules that do not inherit an interface do not have a function table.
If this configuration parameter is set to false, the module's instance objects will NOT be initialized with a reference to their module's function table and, since the function table will not be referenced by the application, the resulting executable will be smaller. However, if this parameter is false you must never attempt to use this module's instance objects via reference this module through an abstract interface. Since this is often hard to determine, especially as an application evolves over time, you should only set this parameter to false when you are absolutely sure that the module's functions are always only being directly called and you need to absolutely minimize the data footprint of your application.
The default for this parameter is true.
gate — A handle to the module-level IGateProvider instance to be used when this module calls functions from Gate
gateParams — Gate parameters used by this module to create the gates used when this module calls Gate_allocInstance
instanceHeap — Identifies the heap from which this module should allocate memory.
instanceSection — Identifies the section in which instances created by this module should be placed.
logger — The handle of the logger instance used by the module. All log events generated by the module are routed to this logger instance. See ILogger for details on the logger interface. See LoggerBuf and LoggerSys for two examples of logger modules provided by the xdc.runtime package.
memoryPolicy — Specifies whether this module should allow static object creation only (STATIC_POLICY), dynamic object creation but not deletion (CREATE_POLICY), or both dynamic object creation and deletion (DELETE_POLICY).
namedInstance — If set to true, each instance object is given an additional field to hold a string name that is used when displaying information about an instance. Setting this to true increases the size of the module's instance objects by a single word but improves the usability of tools that display instance objects. If set to false, assignments of instance names are silently ignored. This allows one to remove instance name support to save space without having to change any source code. See IInstance.name for details.
namedModule — If set to true, this module's string name is retained on the target so that it can be displayed as part of Log and Error events. Setting this to false saves data space in the application at the expense of readability of log and error messages associated with this module.
Note: setting this to false also prevents one from controlling the module's diagnostics at runtime via Diags.setMask(). This method uses the module's name to lookup the module's diagnostics mask. It is still possible to control the module's diagnostics at design-time from a configuration script.
DETAILS
Every module contains this structure during the configuration phase. The fields of this structure are set in configuration scripts and referenced by the modules in the xdc.runtime package. For default values of these fields, see Defaults.
SEE
Diags, Defaults
struct Types.FreqHz
index URL

Frequency-in-hertz struct

Configuration settings
var obj = new Types.FreqHz;
    obj.hi = Bits32 ...
    // most significant 32-bits of frequency
    obj.lo = Bits32 ...
    // least significant 32-bits of frequency
C SYNOPSIS
Types_FreqHz
struct Types.Label
index URL

Instance label struct

Configuration settings
var obj = new Types.Label;
    obj.handle = Ptr ...
    // instance object address
    obj.modId = Bits16 ...
    // corresponding module id
    obj.iname = String ...
    // name supplied during instance creation
    obj.named = Bool ...
    // true, if iname is available
DETAILS
Label structures are used to provide human readable names for instance handles.
It is possible to initialize a Label from any instance handle. All modules that support instances provide a method named Mod_Handle_label() which, given an instance handle and a pointer to a Label structure, initializes the structure with all available information. For example, the following code fragment initializes a Label from an instance of the HeapMin module.
      HeapMin_Handle heap;
      Types_Label label;
      HeapMin_Handle_label(heap, &label);
Unless you explicitly disable it, System_printf can be used to convert a pointer to a Label into an human readable "instance name". Continuing with the example above, the following line can be used to print an instance's label.
      System_printf("heap instance name: %$L\n", &label);
SEE
System.printf, System.extendedFormats, Text.putLabel
C SYNOPSIS
Types_Label
struct Types.RegDesc
index URL

Registry module descriptor

Configuration settings
var obj = new Types.RegDesc;
    obj.next = Types.RegDesc* ...
    obj.modName = CString ...
    obj.id = Bits16 ...
    obj.mask = Bits16 ...
C SYNOPSIS
Types_RegDesc
struct Types.Site
index URL

Error site description struct

Configuration settings
var obj = new Types.Site;
    obj.mod = Bits16 ...
    // module id of this site
    obj.file = CString ...
    // filename of this site
    obj.line = Int ...
    // line number of this site
FIELDS
mod — the module id of the module containing the call site
file — the name of the file containing the call site or NULL; some call sites omit the file name to save data space.
line — the line number within the file named
DETAILS
This structure describes the location of the line that raised an error.
C SYNOPSIS
Types_Site
struct Types.Timestamp64
index URL

64-bit timestamp struct

Configuration settings
var obj = new Types.Timestamp64;
    obj.hi = Bits32 ...
    // most significant 32-bits of timestamp
    obj.lo = Bits32 ...
    // least significant 32-bits of timestamp
DETAILS
Some platforms only support 32-bit timestamps. In this case, the most significant 32-bits are always set to 0.
C SYNOPSIS
Types_Timestamp64
metaonly config Types.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Types.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:19:01 GMT


package xdc.runtime.knl
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XDC Runtime support for OS-related primitives

XDCspec declarations sourced in xdc/runtime/knl/package.xdc
package xdc.runtime.knl [1, 0, 0] {
    interface ICacheSupport;
    // Interface for OS specific back-end
    interface IGateProcessSupport;
    // Interface for OS specific back-end
    interface IGateThreadSupport;
    // Interface for OS specific back-end
    interface ISemProcessSupport;
    // Interface for OS specific back-end
    interface ISemThreadSupport;
    // Interface for OS specific back-end
    interface ISemaphore;
    // Interface implemented by all front-end semaphore providers
    interface ISync;
    // OS independent synchronization
    interface IThreadSupport;
    // Interface for OS specific back-end
    module Cache;
    // Cache Services
    module CacheSupportNull;
    // Empty ICacheSupport implementation
    module GateH;
    // Provides APIs to protect critical sections when an IGate.Handle is available
    module GateProcess;
    // Provides protection of critical sections across processes
    module GateProcessSupportNull;
    // Empty IGateProcessSupport implementation
    module GateThread;
    // Provides protection of critical sections across threads
    module GateThreadSupportNull;
    // Empty IGateProcessSupport implementation
    module SemProcess;
    // SemProcess Manager
    module SemThread;
    // SemThread Manager
    module Semaphore;
    // Provides semaphore services when an ISemaphore.Handle is available
    module Sync;
    // Provides synchronization APIs when an ISync.Handle is available
    module SyncGeneric;
    // Generic ISync implementation
    module SyncNull;
    // Empty ISync implementation used mainly for testing
    module SyncSemThread;
    // A ISync implementation based on a SemThread. [EXPERIMENTAL]
    module Thread;
    // Thread services
}
generated on Sun, 25 Nov 2018 22:18:57 GMT


module xdc.runtime.knl.Cache
index URL

Cache Services

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The Cache module provide APIs to allow applications to maintain cache coherency. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/knl/Cache.xdc
#include <xdc/runtime/knl/Cache.h>
Functions
Bool | Cache_inv// Invalidate range of memory for all cache(s)(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
Bool | Cache_wait// Wait for a previous cache operation to complete(Error_Block *eb);
Bool | Cache_wb// Writes back a range of memory from all cache(s)(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
Bool | Cache_wbInv// Write back and invalidate range of memory(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
Functions common to all target modules
 | Cache_Module_getMask// Returns the diagnostics mask for this module, Cache_Module_hasMask// Test whether this module has a diagnostics mask, Cache_Module_heap// The heap from which this module allocates memory, Cache_Module_id// Get this module's unique id, Cache_Module_setMask// Set the diagnostics mask for this module, Cache_Module_startupDone// Test if this module has completed startup
DETAILS
The Cache module provide APIs to allow applications to maintain cache coherency.
This module will use an OS specific delegate (back-end) to manipulate the cache. This module has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used.
Here is an example showing how the proxy is bound to an BIOS 6.x specific delegate.
  var Cache = xdc.useModule('xdc.runtime.knl.Cache');
  Cache.Proxy = xdc.useModule('ti.sysbios.xdcruntime.CacheSupport');
Typically the package containing the delegates have a Settings module that will bind all xdc.runtime.knl proxies. The following example sets up all the xdc.runtime.knl proxies.
  xdc.useModule("ti.sysbios.xdcruntime.Settings");
Cache_inv() // module-wide
index URL

Invalidate range of memory for all cache(s)

C synopsis target-domain
Bool Cache_inv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Invalidate the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines in range are invalidated for all cache types.
RETURNS
true for success; false for error.
Cache_wait() // module-wide
index URL

Wait for a previous cache operation to complete

C synopsis target-domain
Bool Cache_wait(Error_Block *eb);
ARGUMENTS
eb — error block
DETAILS
Wait for the cache wb/wbInv/inv operation to complete. A cache operation is not truly complete until it has worked its way through all buffering and all memory writes have landed in the source memory.
RETURNS
true for success; false for error.
Cache_wb() // module-wide
index URL

Writes back a range of memory from all cache(s)

C synopsis target-domain
Bool Cache_wb(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Writes back the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines within the range are left valid in all caches and the data within the range will be written back to the source memory.
RETURNS
true for success; false for error.
Cache_wbInv() // module-wide
index URL

Write back and invalidate range of memory

C synopsis target-domain
Bool Cache_wbInv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Writes back and invalidates the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines within the range are written back to the source memory and then invalidated for all cache types.
RETURNS
true for success; false for error.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Cache_Module_id();
// Get this module's unique id
Bool Cache_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Cache_Module_heap();
// The heap from which this module allocates memory
Bool Cache_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Cache_Module_getMask();
// Returns the diagnostics mask for this module
Void Cache_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/knl/Cache.xdc
var Cache = xdc.useModule('xdc.runtime.knl.Cache');
local proxy modules
     Cache.Proxy// ICacheSupport proxy = ICacheSupport.Module null
         Cache.Proxy.delegate$ = ICacheSupport.Module null
module-wide config parameters
     Cache.common$// Common module configuration parameters = Types.Common$ undefined;
proxy Cache.Proxy
index URL

ICacheSupport proxy

Configuration settings
Cache.Proxy = ICacheSupport.Module null
// some delegate module inheriting the ICacheSupport interface
    Cache.Proxy.delegate$ = ICacheSupport.Module null
    // explicit access to the currently bound delegate module
DETAILS
Cache will use this proxy to access the cache hardware using OS specific APIs.
metaonly config Cache.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Cache.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.CacheSupportNull
index URL

Empty ICacheSupport implementation

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in xdc/runtime/knl/CacheSupportNull.xdc
#include <xdc/runtime/knl/CacheSupportNull.h>
Functions common to all ICacheSupport modules
Bool | CacheSupportNull_inv// Invalidates range of memory(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
Bool | CacheSupportNull_wait// Wait for a previous cache operation to complete(Error_Block *eb);
Bool | CacheSupportNull_wb// Writes a range of memory from all cache(s)(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
Bool | CacheSupportNull_wbInv// Writes back and invalidates range fo memory(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
Functions common to all target modules
 | CacheSupportNull_Module_getMask// Returns the diagnostics mask for this module, CacheSupportNull_Module_hasMask// Test whether this module has a diagnostics mask, CacheSupportNull_Module_heap// The heap from which this module allocates memory, CacheSupportNull_Module_id// Get this module's unique id, CacheSupportNull_Module_setMask// Set the diagnostics mask for this module, CacheSupportNull_Module_startupDone// Test if this module has completed startup
CacheSupportNull_inv() // module-wide
index URL

Invalidates range of memory

C synopsis target-domain
Bool CacheSupportNull_inv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Invalidate the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines in range are invalidated for all the 'type' caches.
RETURNS
true for success; false for error.
CacheSupportNull_wait() // module-wide
index URL

Wait for a previous cache operation to complete

C synopsis target-domain
Bool CacheSupportNull_wait(Error_Block *eb);
DETAILS
Wait for the cache wb/wbInv/inv operation to complete. A cache operation is not truly complete until it has worked its way through all buffering and all memory writes have landed in the source memory.
RETURNS
true for success; false for error.
CacheSupportNull_wb() // module-wide
index URL

Writes a range of memory from all cache(s)

C synopsis target-domain
Bool CacheSupportNull_wb(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Writes the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines within the range are left valid in the 'type' caches and the data within the range will be written to the source memory.
RETURNS
true for success; false for error.
CacheSupportNull_wbInv() // module-wide
index URL

Writes back and invalidates range fo memory

C synopsis target-domain
Bool CacheSupportNull_wbInv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error_Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Writes and invalidates the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines within the range are written to the source memory and then invalidated for all 'type' caches.
RETURNS
true for success; false for error.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId CacheSupportNull_Module_id();
// Get this module's unique id
Bool CacheSupportNull_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle CacheSupportNull_Module_heap();
// The heap from which this module allocates memory
Bool CacheSupportNull_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 CacheSupportNull_Module_getMask();
// Returns the diagnostics mask for this module
Void CacheSupportNull_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/knl/CacheSupportNull.xdc
var CacheSupportNull = xdc.useModule('xdc.runtime.knl.CacheSupportNull');
module-wide config parameters
     CacheSupportNull.common$// Common module configuration parameters = Types.Common$ undefined;
metaonly config CacheSupportNull.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
CacheSupportNull.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.GateH
index URL

Provides APIs to protect critical sections when an IGate.Handle is available

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
An application can isolate itself from IGate implementations by using this module. The application must first obtain an IGate.Handle. It can get such a handle by directly calling GateThread.create or GateProcess.create. Then the application can use the generic APIs provided by this module. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/knl/GateH.xdc
#include <xdc/runtime/knl/GateH.h>
Functions
IArg | GateH_enter// Enter a gate(IGateProvider_Handle hdl);
Void | GateH_leave// Leave a gate(IGateProvider_Handle hdl, IArg key);
Functions common to all target modules
 | GateH_Module_getMask// Returns the diagnostics mask for this module, GateH_Module_hasMask// Test whether this module has a diagnostics mask, GateH_Module_heap// The heap from which this module allocates memory, GateH_Module_id// Get this module's unique id, GateH_Module_setMask// Set the diagnostics mask for this module, GateH_Module_startupDone// Test if this module has completed startup
DETAILS
An application can isolate itself from IGate implementations by using this module. The application must first obtain an IGate.Handle. It can get such a handle by directly calling GateThread.create or GateProcess.create. Then the application can use the generic APIs provided by this module.
The underlying gates are nesting in nature and users have to leave the gate as many times as they entered it.
GateH_enter() // module-wide
index URL

Enter a gate

C synopsis target-domain
IArg GateH_enter(IGateProvider_Handle hdl);
ARGUMENTS
hdl — IGateProvider.Handle
RETURNS
key
GateH_leave() // module-wide
index URL

Leave a gate

C synopsis target-domain
Void GateH_leave(IGateProvider_Handle hdl, IArg key);
ARGUMENTS
hdl — IGateProvider.Handle
key — key returned by enter();
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId GateH_Module_id();
// Get this module's unique id
Bool GateH_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle GateH_Module_heap();
// The heap from which this module allocates memory
Bool GateH_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 GateH_Module_getMask();
// Returns the diagnostics mask for this module
Void GateH_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/knl/GateH.xdc
var GateH = xdc.useModule('xdc.runtime.knl.GateH');
local proxy modules
     GateH.Proxy// Proxy used for optimization = IGateProvider.Module null
         GateH.Proxy.delegate$ = IGateProvider.Module null
         GateH.Proxy.abstractInstances$ = false
module-wide config parameters
     GateH.common$// Common module configuration parameters = Types.Common$ undefined;
proxy GateH.Proxy
index URL

Proxy used for optimization

Configuration settings
GateH.Proxy = IGateProvider.Module null
// some delegate module inheriting the IGateProvider interface
    GateH.Proxy.delegate$ = IGateProvider.Module null
    // explicit access to the currently bound delegate module
    GateH.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
DETAILS
The GateH.Proxy config param may be used to optimize this module. If all the instances supplied to GateH functions are created using the same module (e.g. GateMutex), then setting this Proxy to that module and disabling abstract instances will allow for better run-time optimization.
Caution: all instances used by GateH in a given executable must be created by the same module in order to use this optimization technique.
Configuration Script
 var GateH = xdc.useModule('xdc.runtime.knl.GateH');
 GateH.Proxy = xdc.useModule('ti.sysbios.gates.GateMutex');
 GateH.Proxy.abstractInstances$ = false;
Target Code
 #include <xdc/runtime/IGateProvider.h>
 #include <xdc/runtime/knl/GateH.h>
 #include <ti/sysbios/gates/GateMutex.h>

 GateMutex_Handle gate;
 IGateProvider_Handle igate;
 IArg key;

 gate = GateMutex_create(NULL, NULL);
 igate = GateMutex_Handle_upCast(gate);

 key = GateH_enter(igate);
 ...
 GateH_leave(igate, key);
metaonly config GateH.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
GateH.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.GateProcess
index URL

Provides protection of critical sections across processes

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module provides services through its proxy IGateProcessSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/knl/GateProcess.xdc
#include <xdc/runtime/knl/GateProcess.h>
Functions
Void | GateProcess_construct// Initialize a new instance object inside the provided structure(GateProcess_Struct *structP, const GateProcess_Params *params, Error_Block *eb);
GateProcess_Handle | GateProcess_create// Allocate and initialize a new instance object and return its handle(const GateProcess_Params *params, Error_Block *eb);
Void | GateProcess_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(GateProcess_Handle *handleP);
Void | GateProcess_destruct// Finalize the instance object inside the provided structure(GateProcess_Struct *structP);
Int | GateProcess_getReferenceCount// Get the number of processes with references to this Gate(GateProcess_Handle handle, Error_Block *eb);
Void | GateProcess_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(GateProcess_Params *params);
Functions common to all IGateProvider modules
IArg | GateProcess_enter// Enter this gate(GateProcess_Handle handle);
Void | GateProcess_leave// Leave this gate(GateProcess_Handle handle, IArg key);
Bool | GateProcess_query// Runtime test for a particular gate quality(Int qual);
Functions common to all target instances
 | GateProcess_handle// Convert this instance structure pointer into an instance handle, GateProcess_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, GateProcess_Handle_label// The label associated with this instance object, GateProcess_Handle_name// The name of this instance object, GateProcess_Handle_upCast// unconditionally move one level up the inheritance hierarchy, GateProcess_Object_count// The number of statically-created instance objects, GateProcess_Object_first// The handle of the first dynamically-created instance object, or NULL, GateProcess_Object_get// The handle of the i-th statically-created instance object (array == NULL), GateProcess_Object_heap// The heap used to allocate dynamically-created instance objects, GateProcess_Object_next// The handle of the next dynamically-created instance object, or NULL, GateProcess_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | GateProcess_Module_getMask// Returns the diagnostics mask for this module, GateProcess_Module_hasMask// Test whether this module has a diagnostics mask, GateProcess_Module_heap// The heap from which this module allocates memory, GateProcess_Module_id// Get this module's unique id, GateProcess_Module_setMask// Set the diagnostics mask for this module, GateProcess_Module_startupDone// Test if this module has completed startup
Defines
#define | GateProcess_GETREFCOUNT_FAILED// Status returned by getReferenceCount when there is an error (Int)-1
#define | GateProcess_Q_BLOCKING// Blocking quality (Int)1
#define | GateProcess_Q_PREEMPTING// Preempting quality (Int)2
Typedefs
typedef GateProcess_Object * | GateProcess_Handle// Client reference to an instance object;
typedef struct | GateProcess_Object// Opaque internal representation of an instance object GateProcess_Object;
typedef struct | GateProcess_Params// Instance config-params structure ...
typedef struct | GateProcess_Struct// Opaque client structure large enough to hold an instance object GateProcess_Struct;
Constants
extern const Assert_Id | GateProcess_A_invalidKey// Assert when an invalid key is passed to create;
DETAILS
This module provides services through its proxy IGateProcessSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used.
Here is an example showing how the proxy is bound to an BIOS 6.x specific delegate.
  var GateProcess = xdc.useModule('xdc.runtime.knl.GateProcess');
  GateProcess.Proxy =
      xdc.useModule('ti.sysbios.xdcruntime.GateProcessSupport');
Typically the package containing the delegates have a Settings module that will bind all xdc.runtime.knl proxies. The following example sets up all the xdc.runtime.knl proxies.
  xdc.useModule("ti.sysbios.xdcruntime.Settings");
const GateProcess_GETREFCOUNT_FAILED
index URL

Status returned by getReferenceCount when there is an error

C synopsis target-domain
#define GateProcess_GETREFCOUNT_FAILED (Int)-1
const GateProcess_Q_BLOCKING
index URL

Blocking quality

C synopsis target-domain
#define GateProcess_Q_BLOCKING (Int)1
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const GateProcess_Q_PREEMPTING
index URL

Preempting quality

C synopsis target-domain
#define GateProcess_Q_PREEMPTING (Int)2
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
config GateProcess_A_invalidKey // module-wide
index URL

Assert when an invalid key is passed to create

C synopsis target-domain
extern const Assert_Id GateProcess_A_invalidKey;
GateProcess_query() // module-wide
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Runtime test for a particular gate quality

C synopsis target-domain
Bool GateProcess_query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId GateProcess_Module_id();
// Get this module's unique id
Bool GateProcess_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle GateProcess_Module_heap();
// The heap from which this module allocates memory
Bool GateProcess_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 GateProcess_Module_getMask();
// Returns the diagnostics mask for this module
Void GateProcess_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
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C synopsis target-domain
typedef struct GateProcess_Object GateProcess_Object;
// Opaque internal representation of an instance object
typedef GateProcess_Object *GateProcess_Handle;
// Client reference to an instance object
typedef struct GateProcess_Struct GateProcess_Struct;
// Opaque client structure large enough to hold an instance object
GateProcess_Handle GateProcess_handle(GateProcess_Struct *structP);
// Convert this instance structure pointer into an instance handle
GateProcess_Struct *GateProcess_struct(GateProcess_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct GateProcess_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
    Int key;
    // globally unique key for SysV-style semaphore
} GateProcess_Params;
Void GateProcess_Params_init(GateProcess_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config GateProcess_Params.key // instance
index URL

globally unique key for SysV-style semaphore

C synopsis target-domain
struct GateProcess_Params {
     ...
    Int key;
DETAILS
This is a required parameter.
Runtime Instance Creation
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C synopsis target-domain
GateProcess_Handle GateProcess_create(const GateProcess_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void GateProcess_construct(GateProcess_Struct *structP, const GateProcess_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new GateProcess object which is initialized to count. All gates created with the same key reference the same underlying synchronization object and work between processes. For compatibility with the IGateProvider interface the argument key is passes in the params struct rather than as a full argument, but it is required. Therefore calling this function with a NULL params struct is illegal.
Instance Deletion
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C synopsis target-domain
Void GateProcess_delete(GateProcess_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void GateProcess_destruct(GateProcess_Struct *structP);
// Finalize the instance object inside the provided structure
GateProcess_enter() // instance
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Enter this gate

C synopsis target-domain
IArg GateProcess_enter(GateProcess_Handle handle);
ARGUMENTS
handle — handle of a previously-created GateProcess instance object
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
GateProcess_getReferenceCount() // instance
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Get the number of processes with references to this Gate

C synopsis target-domain
Int GateProcess_getReferenceCount(GateProcess_Handle handle, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created GateProcess instance object
eb — Pointer to Error.Block
RETURNS
Returns the number of processes that possess a reference to this gate, or GETREFCOUNT_FAILED if an error occured.
GateProcess_leave() // instance
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Leave this gate

C synopsis target-domain
Void GateProcess_leave(GateProcess_Handle handle, IArg key);
ARGUMENTS
handle — handle of a previously-created GateProcess instance object
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
Instance Convertors
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C synopsis target-domain
IGateProvider_Handle GateProcess_Handle_upCast(GateProcess_Handle handle);
// unconditionally move one level up the inheritance hierarchy
GateProcess_Handle GateProcess_Handle_downCast(IGateProvider_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int GateProcess_Object_count();
// The number of statically-created instance objects
GateProcess_Handle GateProcess_Object_get(GateProcess_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
GateProcess_Handle GateProcess_Object_first();
// The handle of the first dynamically-created instance object, or NULL
GateProcess_Handle GateProcess_Object_next(GateProcess_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle GateProcess_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *GateProcess_Handle_label(GateProcess_Handle handle, Types_Label *buf);
// The label associated with this instance object
String GateProcess_Handle_name(GateProcess_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/GateProcess.xdc
var GateProcess = xdc.useModule('xdc.runtime.knl.GateProcess');
local proxy modules
     GateProcess.Proxy// Proxy that needs to be bound to an OS specific delegate = IGateProcessSupport.Module null
         GateProcess.Proxy.delegate$ = IGateProcessSupport.Module null
         GateProcess.Proxy.abstractInstances$ = false
module-wide constants & types
    const GateProcess.GETREFCOUNT_FAILED// Status returned by getReferenceCount when there is an error = -1;
    const GateProcess.Q_BLOCKING// Blocking quality = 1;
    const GateProcess.Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
     GateProcess.A_invalidKey// Assert when an invalid key is passed to create = Assert.Desc {
        msg: "A_invalidKey: the key must be set to a non-default value"
    };
     GateProcess.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     GateProcess.queryMeta// Configuration time test for a particular gate quality(Int qual) returns Bool
per-instance config parameters
    var params = new GateProcess.Params// Instance config-params object;
        params.key// globally unique key for SysV-style semaphore = Int -1;
per-instance creation
    var inst = GateProcess.create// Create an instance-object(params);
proxy GateProcess.Proxy
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Proxy that needs to be bound to an OS specific delegate

Configuration settings
GateProcess.Proxy = IGateProcessSupport.Module null
// some delegate module inheriting the IGateProcessSupport interface
    GateProcess.Proxy.delegate$ = IGateProcessSupport.Module null
    // explicit access to the currently bound delegate module
    GateProcess.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
const GateProcess.GETREFCOUNT_FAILED
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Status returned by getReferenceCount when there is an error

Configuration settings
const GateProcess.GETREFCOUNT_FAILED = -1;
C SYNOPSIS
GateProcess_GETREFCOUNT_FAILED
const GateProcess.Q_BLOCKING
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Blocking quality

Configuration settings
const GateProcess.Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
C SYNOPSIS
GateProcess_Q_BLOCKING
const GateProcess.Q_PREEMPTING
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Preempting quality

Configuration settings
const GateProcess.Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
C SYNOPSIS
GateProcess_Q_PREEMPTING
config GateProcess.A_invalidKey // module-wide
index URL

Assert when an invalid key is passed to create

Configuration settings
GateProcess.A_invalidKey = Assert.Desc {
    msg: "A_invalidKey: the key must be set to a non-default value"
};
C SYNOPSIS
GateProcess_A_invalidKey
metaonly config GateProcess.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
GateProcess.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly GateProcess.queryMeta() // module-wide
index URL

Configuration time test for a particular gate quality

Configuration settings
GateProcess.queryMeta(Int qual) returns Bool
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Instance Config Parameters
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Configuration settings
var params = new GateProcess.Params;
// Instance config-params object
    params.key = Int -1;
    // globally unique key for SysV-style semaphore
config GateProcess.Params.key // instance
index URL

globally unique key for SysV-style semaphore

Configuration settings
var params = new GateProcess.Params;
...
params.key = Int -1;
DETAILS
This is a required parameter.
C SYNOPSIS
GateProcess_Params.key
Static Instance Creation
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Configuration settings
var params = new GateProcess.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GateProcess.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new GateProcess object which is initialized to count. All gates created with the same key reference the same underlying synchronization object and work between processes. For compatibility with the IGateProvider interface the argument key is passes in the params struct rather than as a full argument, but it is required. Therefore calling this function with a NULL params struct is illegal.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.GateProcessSupportNull
index URL

Empty IGateProcessSupport implementation

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in xdc/runtime/knl/GateProcessSupportNull.xdc
#include <xdc/runtime/knl/GateProcessSupportNull.h>
Functions
Void
GateProcessSupportNull_construct// Initialize a new instance object inside the provided structure(GateProcessSupportNull_Struct *structP, const GateProcessSupportNull_Params *params);
GateProcessSupportNull_Handle
GateProcessSupportNull_create// Allocate and initialize a new instance object and return its handle(const GateProcessSupportNull_Params *params, Error_Block *eb);
Void
GateProcessSupportNull_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(GateProcessSupportNull_Handle *handleP);
Void
GateProcessSupportNull_destruct// Finalize the instance object inside the provided structure(GateProcessSupportNull_Struct *structP);
Void
GateProcessSupportNull_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(GateProcessSupportNull_Params *params);
Functions common to all IGateProvider modules
IArg
GateProcessSupportNull_enter// Enter this gate(GateProcessSupportNull_Handle handle);
Void
GateProcessSupportNull_leave// Leave this gate(GateProcessSupportNull_Handle handle, IArg key);
Bool
GateProcessSupportNull_query// Runtime test for a particular gate quality(Int qual);
Functions common to all IGateProcessSupport modules
Int
GateProcessSupportNull_getReferenceCount// Get the number of processes with references to this Gate(GateProcessSupportNull_Handle handle, Error_Block *err);
Functions common to all target instances
GateProcessSupportNull_handle// Convert this instance structure pointer into an instance handle, GateProcessSupportNull_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, GateProcessSupportNull_Handle_downCast2// conditionally move 2 levels down the inheritance hierarchy; NULL upon failure, GateProcessSupportNull_Handle_downCast3// conditionally move 3 levels down the inheritance hierarchy; NULL upon failure, GateProcessSupportNull_Handle_label// The label associated with this instance object, GateProcessSupportNull_Handle_name// The name of this instance object, GateProcessSupportNull_Handle_upCast// unconditionally move one level up the inheritance hierarchy, GateProcessSupportNull_Handle_upCast2// unconditionally move 2 levels up the inheritance hierarchy, GateProcessSupportNull_Handle_upCast3// unconditionally move 3 levels up the inheritance hierarchy, GateProcessSupportNull_Object_count// The number of statically-created instance objects, GateProcessSupportNull_Object_first// The handle of the first dynamically-created instance object, or NULL, GateProcessSupportNull_Object_get// The handle of the i-th statically-created instance object (array == NULL), GateProcessSupportNull_Object_heap// The heap used to allocate dynamically-created instance objects, GateProcessSupportNull_Object_next// The handle of the next dynamically-created instance object, or NULL, GateProcessSupportNull_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
GateProcessSupportNull_Module_getMask// Returns the diagnostics mask for this module, GateProcessSupportNull_Module_hasMask// Test whether this module has a diagnostics mask, GateProcessSupportNull_Module_heap// The heap from which this module allocates memory, GateProcessSupportNull_Module_id// Get this module's unique id, GateProcessSupportNull_Module_setMask// Set the diagnostics mask for this module, GateProcessSupportNull_Module_startupDone// Test if this module has completed startup
Defines
#define
GateProcessSupportNull_GETREFCOUNT_FAILED// Status returned by getReferenceCount when there is an error (Int)-1
#define
GateProcessSupportNull_Q_BLOCKING// Blocking quality (Int)1
#define
GateProcessSupportNull_Q_PREEMPTING// Preempting quality (Int)2
Typedefs
typedef GateProcessSupportNull_Object *
GateProcessSupportNull_Handle// Client reference to an instance object;
typedef struct
GateProcessSupportNull_Object// Opaque internal representation of an instance object GateProcessSupportNull_Object;
typedef struct
GateProcessSupportNull_Params// Instance config-params structure ...
typedef struct
GateProcessSupportNull_Struct// Opaque client structure large enough to hold an instance object GateProcessSupportNull_Struct;
const GateProcessSupportNull_GETREFCOUNT_FAILED
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Status returned by getReferenceCount when there is an error

C synopsis target-domain
#define GateProcessSupportNull_GETREFCOUNT_FAILED (Int)-1
const GateProcessSupportNull_Q_BLOCKING
index URL

Blocking quality

C synopsis target-domain
#define GateProcessSupportNull_Q_BLOCKING (Int)1
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const GateProcessSupportNull_Q_PREEMPTING
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Preempting quality

C synopsis target-domain
#define GateProcessSupportNull_Q_PREEMPTING (Int)2
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
GateProcessSupportNull_query() // module-wide
index URL

Runtime test for a particular gate quality

C synopsis target-domain
Bool GateProcessSupportNull_query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId GateProcessSupportNull_Module_id();
// Get this module's unique id
Bool GateProcessSupportNull_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle GateProcessSupportNull_Module_heap();
// The heap from which this module allocates memory
Bool GateProcessSupportNull_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 GateProcessSupportNull_Module_getMask();
// Returns the diagnostics mask for this module
Void GateProcessSupportNull_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
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C synopsis target-domain
typedef struct GateProcessSupportNull_Object GateProcessSupportNull_Object;
// Opaque internal representation of an instance object
typedef GateProcessSupportNull_Object *GateProcessSupportNull_Handle;
// Client reference to an instance object
typedef struct GateProcessSupportNull_Struct GateProcessSupportNull_Struct;
// Opaque client structure large enough to hold an instance object
GateProcessSupportNull_Handle GateProcessSupportNull_handle(GateProcessSupportNull_Struct *structP);
// Convert this instance structure pointer into an instance handle
GateProcessSupportNull_Struct *GateProcessSupportNull_struct(GateProcessSupportNull_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct GateProcessSupportNull_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
    Int key;
    // globally unique key for SysV-style semaphore
} GateProcessSupportNull_Params;
Void GateProcessSupportNull_Params_init(GateProcessSupportNull_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config GateProcessSupportNull_Params.key // instance
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globally unique key for SysV-style semaphore

C synopsis target-domain
struct GateProcessSupportNull_Params {
     ...
    Int key;
Runtime Instance Creation
index URL

C synopsis target-domain
GateProcessSupportNull_Handle GateProcessSupportNull_create(const GateProcessSupportNull_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void GateProcessSupportNull_construct(GateProcessSupportNull_Struct *structP, const GateProcessSupportNull_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new GateProcess object which is initialized to count. All gates created with the same key reference the same underlying synchronization object and work between processes. The underlying synchronization object should be automatically deleted when all references to it have been deleted, and the reference count should An implementation for a platform on which this is technically impossible (e.g. an operating system that does not support multiple processes) may provide a 'toy' implemenation with behavior matching that of IGateProcessSupport.
Instance Deletion
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C synopsis target-domain
Void GateProcessSupportNull_delete(GateProcessSupportNull_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void GateProcessSupportNull_destruct(GateProcessSupportNull_Struct *structP);
// Finalize the instance object inside the provided structure
GateProcessSupportNull_enter() // instance
index URL

Enter this gate

C synopsis target-domain
IArg GateProcessSupportNull_enter(GateProcessSupportNull_Handle handle);
ARGUMENTS
handle — handle of a previously-created GateProcessSupportNull instance object
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
GateProcessSupportNull_getReferenceCount() // instance
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Get the number of processes with references to this Gate

C synopsis target-domain
Int GateProcessSupportNull_getReferenceCount(GateProcessSupportNull_Handle handle, Error_Block *err);
ARGUMENTS
handle — handle of a previously-created GateProcessSupportNull instance object
err — Pointer to Error.Block
RETURNS
Returns the number of processes that possess a reference to this gate, or GETREFCOUNT_FAILED if an error occured. A 'toy' implementation should always return 0.
GateProcessSupportNull_leave() // instance
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Leave this gate

C synopsis target-domain
Void GateProcessSupportNull_leave(GateProcessSupportNull_Handle handle, IArg key);
ARGUMENTS
handle — handle of a previously-created GateProcessSupportNull instance object
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
Instance Convertors
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C synopsis target-domain
IGateProcessSupport_Handle GateProcessSupportNull_Handle_upCast(GateProcessSupportNull_Handle handle);
// unconditionally move one level up the inheritance hierarchy
GateProcessSupportNull_Handle GateProcessSupportNull_Handle_downCast(IGateProcessSupport_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
IGateThreadSupport_Handle GateProcessSupportNull_Handle_upCast2(GateProcessSupportNull_Handle handle);
// unconditionally move 2 levels up the inheritance hierarchy
GateProcessSupportNull_Handle GateProcessSupportNull_Handle_downCast2(IGateThreadSupport_Handle handle);
// conditionally move 2 levels down the inheritance hierarchy; NULL upon failure
IGateProvider_Handle GateProcessSupportNull_Handle_upCast3(GateProcessSupportNull_Handle handle);
// unconditionally move 3 levels up the inheritance hierarchy
GateProcessSupportNull_Handle GateProcessSupportNull_Handle_downCast3(IGateProvider_Handle handle);
// conditionally move 3 levels down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
index URL

C synopsis target-domain
Int GateProcessSupportNull_Object_count();
// The number of statically-created instance objects
GateProcessSupportNull_Handle GateProcessSupportNull_Object_get(GateProcessSupportNull_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
GateProcessSupportNull_Handle GateProcessSupportNull_Object_first();
// The handle of the first dynamically-created instance object, or NULL
GateProcessSupportNull_Handle GateProcessSupportNull_Object_next(GateProcessSupportNull_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle GateProcessSupportNull_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *GateProcessSupportNull_Handle_label(GateProcessSupportNull_Handle handle, Types_Label *buf);
// The label associated with this instance object
String GateProcessSupportNull_Handle_name(GateProcessSupportNull_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/GateProcessSupportNull.xdc
var GateProcessSupportNull = xdc.useModule('xdc.runtime.knl.GateProcessSupportNull');
module-wide constants & types
    const GateProcessSupportNull.GETREFCOUNT_FAILED// Status returned by getReferenceCount when there is an error = -1;
    const GateProcessSupportNull.Q_BLOCKING// Blocking quality = 1;
    const GateProcessSupportNull.Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
     GateProcessSupportNull.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     GateProcessSupportNull.queryMeta// Configuration time test for a particular gate quality(Int qual) returns Bool
per-instance config parameters
    var params = new GateProcessSupportNull.Params// Instance config-params object;
        params.key// globally unique key for SysV-style semaphore = Int -1;
per-instance creation
    var inst = GateProcessSupportNull.create// Create an instance-object(params);
const GateProcessSupportNull.GETREFCOUNT_FAILED
index URL

Status returned by getReferenceCount when there is an error

Configuration settings
const GateProcessSupportNull.GETREFCOUNT_FAILED = -1;
C SYNOPSIS
GateProcessSupportNull_GETREFCOUNT_FAILED
const GateProcessSupportNull.Q_BLOCKING
index URL

Blocking quality

Configuration settings
const GateProcessSupportNull.Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
C SYNOPSIS
GateProcessSupportNull_Q_BLOCKING
const GateProcessSupportNull.Q_PREEMPTING
index URL

Preempting quality

Configuration settings
const GateProcessSupportNull.Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
C SYNOPSIS
GateProcessSupportNull_Q_PREEMPTING
metaonly config GateProcessSupportNull.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
GateProcessSupportNull.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly GateProcessSupportNull.queryMeta() // module-wide
index URL

Configuration time test for a particular gate quality

Configuration settings
GateProcessSupportNull.queryMeta(Int qual) returns Bool
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Instance Config Parameters
index URL

Configuration settings
var params = new GateProcessSupportNull.Params;
// Instance config-params object
    params.key = Int -1;
    // globally unique key for SysV-style semaphore
config GateProcessSupportNull.Params.key // instance
index URL

globally unique key for SysV-style semaphore

Configuration settings
var params = new GateProcessSupportNull.Params;
...
params.key = Int -1;
C SYNOPSIS
GateProcessSupportNull_Params.key
Static Instance Creation
index URL

Configuration settings
var params = new GateProcessSupportNull.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GateProcessSupportNull.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new GateProcess object which is initialized to count. All gates created with the same key reference the same underlying synchronization object and work between processes. The underlying synchronization object should be automatically deleted when all references to it have been deleted, and the reference count should An implementation for a platform on which this is technically impossible (e.g. an operating system that does not support multiple processes) may provide a 'toy' implemenation with behavior matching that of IGateProcessSupport.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.GateThread
index URL

Provides protection of critical sections across threads

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module provides services through its proxy IGateThreadSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/knl/GateThread.xdc
#include <xdc/runtime/knl/GateThread.h>
Functions
Void | GateThread_construct// Initialize a new instance object inside the provided structure(GateThread_Struct *structP, const GateThread_Params *params, Error_Block *eb);
GateThread_Handle | GateThread_create// Allocate and initialize a new instance object and return its handle(const GateThread_Params *params, Error_Block *eb);
Void | GateThread_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(GateThread_Handle *handleP);
Void | GateThread_destruct// Finalize the instance object inside the provided structure(GateThread_Struct *structP);
Void | GateThread_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(GateThread_Params *params);
Functions common to all IGateProvider modules
IArg | GateThread_enter// Enter this gate(GateThread_Handle handle);
Void | GateThread_leave// Leave this gate(GateThread_Handle handle, IArg key);
Bool | GateThread_query// Runtime test for a particular gate quality(Int qual);
Functions common to all target instances
 | GateThread_handle// Convert this instance structure pointer into an instance handle, GateThread_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, GateThread_Handle_label// The label associated with this instance object, GateThread_Handle_name// The name of this instance object, GateThread_Handle_upCast// unconditionally move one level up the inheritance hierarchy, GateThread_Object_count// The number of statically-created instance objects, GateThread_Object_first// The handle of the first dynamically-created instance object, or NULL, GateThread_Object_get// The handle of the i-th statically-created instance object (array == NULL), GateThread_Object_heap// The heap used to allocate dynamically-created instance objects, GateThread_Object_next// The handle of the next dynamically-created instance object, or NULL, GateThread_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | GateThread_Module_getMask// Returns the diagnostics mask for this module, GateThread_Module_hasMask// Test whether this module has a diagnostics mask, GateThread_Module_heap// The heap from which this module allocates memory, GateThread_Module_id// Get this module's unique id, GateThread_Module_setMask// Set the diagnostics mask for this module, GateThread_Module_startupDone// Test if this module has completed startup
Defines
#define | GateThread_Q_BLOCKING// Blocking quality (Int)1
#define | GateThread_Q_PREEMPTING// Preempting quality (Int)2
Typedefs
typedef GateThread_Object * | GateThread_Handle// Client reference to an instance object;
typedef struct | GateThread_Object// Opaque internal representation of an instance object GateThread_Object;
typedef struct | GateThread_Params// Instance config-params structure ...
typedef struct | GateThread_Struct// Opaque client structure large enough to hold an instance object GateThread_Struct;
DETAILS
This module provides services through its proxy IGateThreadSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used.
Here is an example showing how the proxy is bound to an BIOS 6.x specific delegate.
  var GateThread = xdc.useModule('xdc.runtime.knl.GateThread');
  GateThread.Proxy =
      xdc.useModule('ti.sysbios.xdcruntime.GateThreadSupport');
Typically the package containing the delegates have a Settings module that will bind all xdc.runtime.knl proxies. The following example sets up all the xdc.runtime.knl proxies.
  xdc.useModule("ti.sysbios.xdcruntime.Settings");
const GateThread_Q_BLOCKING
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Blocking quality

C synopsis target-domain
#define GateThread_Q_BLOCKING (Int)1
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const GateThread_Q_PREEMPTING
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Preempting quality

C synopsis target-domain
#define GateThread_Q_PREEMPTING (Int)2
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
GateThread_query() // module-wide
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Runtime test for a particular gate quality

C synopsis target-domain
Bool GateThread_query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId GateThread_Module_id();
// Get this module's unique id
Bool GateThread_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle GateThread_Module_heap();
// The heap from which this module allocates memory
Bool GateThread_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 GateThread_Module_getMask();
// Returns the diagnostics mask for this module
Void GateThread_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
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C synopsis target-domain
typedef struct GateThread_Object GateThread_Object;
// Opaque internal representation of an instance object
typedef GateThread_Object *GateThread_Handle;
// Client reference to an instance object
typedef struct GateThread_Struct GateThread_Struct;
// Opaque client structure large enough to hold an instance object
GateThread_Handle GateThread_handle(GateThread_Struct *structP);
// Convert this instance structure pointer into an instance handle
GateThread_Struct *GateThread_struct(GateThread_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct GateThread_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
} GateThread_Params;
Void GateThread_Params_init(GateThread_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
Runtime Instance Creation
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C synopsis target-domain
GateThread_Handle GateThread_create(const GateThread_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void GateThread_construct(GateThread_Struct *structP, const GateThread_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
Instance Deletion
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C synopsis target-domain
Void GateThread_delete(GateThread_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void GateThread_destruct(GateThread_Struct *structP);
// Finalize the instance object inside the provided structure
GateThread_enter() // instance
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Enter this gate

C synopsis target-domain
IArg GateThread_enter(GateThread_Handle handle);
ARGUMENTS
handle — handle of a previously-created GateThread instance object
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
GateThread_leave() // instance
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Leave this gate

C synopsis target-domain
Void GateThread_leave(GateThread_Handle handle, IArg key);
ARGUMENTS
handle — handle of a previously-created GateThread instance object
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
Instance Convertors
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C synopsis target-domain
IGateProvider_Handle GateThread_Handle_upCast(GateThread_Handle handle);
// unconditionally move one level up the inheritance hierarchy
GateThread_Handle GateThread_Handle_downCast(IGateProvider_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int GateThread_Object_count();
// The number of statically-created instance objects
GateThread_Handle GateThread_Object_get(GateThread_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
GateThread_Handle GateThread_Object_first();
// The handle of the first dynamically-created instance object, or NULL
GateThread_Handle GateThread_Object_next(GateThread_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle GateThread_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *GateThread_Handle_label(GateThread_Handle handle, Types_Label *buf);
// The label associated with this instance object
String GateThread_Handle_name(GateThread_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/GateThread.xdc
var GateThread = xdc.useModule('xdc.runtime.knl.GateThread');
local proxy modules
     GateThread.Proxy// Proxy that needs to be bound to an OS specific delegate = IGateThreadSupport.Module null
         GateThread.Proxy.delegate$ = IGateThreadSupport.Module null
         GateThread.Proxy.abstractInstances$ = false
module-wide constants & types
    const GateThread.Q_BLOCKING// Blocking quality = 1;
    const GateThread.Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
     GateThread.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     GateThread.queryMeta// Configuration time test for a particular gate quality(Int qual) returns Bool
per-instance config parameters
    var params = new GateThread.Params// Instance config-params object;
per-instance creation
    var inst = GateThread.create// Create an instance-object(params);
proxy GateThread.Proxy
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Proxy that needs to be bound to an OS specific delegate

Configuration settings
GateThread.Proxy = IGateThreadSupport.Module null
// some delegate module inheriting the IGateThreadSupport interface
    GateThread.Proxy.delegate$ = IGateThreadSupport.Module null
    // explicit access to the currently bound delegate module
    GateThread.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
const GateThread.Q_BLOCKING
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Blocking quality

Configuration settings
const GateThread.Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
C SYNOPSIS
GateThread_Q_BLOCKING
const GateThread.Q_PREEMPTING
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Preempting quality

Configuration settings
const GateThread.Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
C SYNOPSIS
GateThread_Q_PREEMPTING
metaonly config GateThread.common$ // module-wide
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Common module configuration parameters

Configuration settings
GateThread.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly GateThread.queryMeta() // module-wide
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Configuration time test for a particular gate quality

Configuration settings
GateThread.queryMeta(Int qual) returns Bool
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Instance Config Parameters
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Configuration settings
var params = new GateThread.Params;
// Instance config-params object
Static Instance Creation
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Configuration settings
var params = new GateThread.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GateThread.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.GateThreadSupportNull
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Empty IGateProcessSupport implementation

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in xdc/runtime/knl/GateThreadSupportNull.xdc
#include <xdc/runtime/knl/GateThreadSupportNull.h>
Functions
Void
GateThreadSupportNull_construct// Initialize a new instance object inside the provided structure(GateThreadSupportNull_Struct *structP, const GateThreadSupportNull_Params *params);
GateThreadSupportNull_Handle
GateThreadSupportNull_create// Allocate and initialize a new instance object and return its handle(const GateThreadSupportNull_Params *params, Error_Block *eb);
Void
GateThreadSupportNull_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(GateThreadSupportNull_Handle *handleP);
Void
GateThreadSupportNull_destruct// Finalize the instance object inside the provided structure(GateThreadSupportNull_Struct *structP);
Void
GateThreadSupportNull_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(GateThreadSupportNull_Params *params);
Functions common to all IGateProvider modules
IArg
GateThreadSupportNull_enter// Enter this gate(GateThreadSupportNull_Handle handle);
Void
GateThreadSupportNull_leave// Leave this gate(GateThreadSupportNull_Handle handle, IArg key);
Bool
GateThreadSupportNull_query// Runtime test for a particular gate quality(Int qual);
Functions common to all target instances
GateThreadSupportNull_handle// Convert this instance structure pointer into an instance handle, GateThreadSupportNull_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, GateThreadSupportNull_Handle_downCast2// conditionally move 2 levels down the inheritance hierarchy; NULL upon failure, GateThreadSupportNull_Handle_label// The label associated with this instance object, GateThreadSupportNull_Handle_name// The name of this instance object, GateThreadSupportNull_Handle_upCast// unconditionally move one level up the inheritance hierarchy, GateThreadSupportNull_Handle_upCast2// unconditionally move 2 levels up the inheritance hierarchy, GateThreadSupportNull_Object_count// The number of statically-created instance objects, GateThreadSupportNull_Object_first// The handle of the first dynamically-created instance object, or NULL, GateThreadSupportNull_Object_get// The handle of the i-th statically-created instance object (array == NULL), GateThreadSupportNull_Object_heap// The heap used to allocate dynamically-created instance objects, GateThreadSupportNull_Object_next// The handle of the next dynamically-created instance object, or NULL, GateThreadSupportNull_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
GateThreadSupportNull_Module_getMask// Returns the diagnostics mask for this module, GateThreadSupportNull_Module_hasMask// Test whether this module has a diagnostics mask, GateThreadSupportNull_Module_heap// The heap from which this module allocates memory, GateThreadSupportNull_Module_id// Get this module's unique id, GateThreadSupportNull_Module_setMask// Set the diagnostics mask for this module, GateThreadSupportNull_Module_startupDone// Test if this module has completed startup
Defines
#define
GateThreadSupportNull_Q_BLOCKING// Blocking quality (Int)1
#define
GateThreadSupportNull_Q_PREEMPTING// Preempting quality (Int)2
Typedefs
typedef GateThreadSupportNull_Object *
GateThreadSupportNull_Handle// Client reference to an instance object;
typedef struct
GateThreadSupportNull_Object// Opaque internal representation of an instance object GateThreadSupportNull_Object;
typedef struct
GateThreadSupportNull_Params// Instance config-params structure ...
typedef struct
GateThreadSupportNull_Struct// Opaque client structure large enough to hold an instance object GateThreadSupportNull_Struct;
const GateThreadSupportNull_Q_BLOCKING
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Blocking quality

C synopsis target-domain
#define GateThreadSupportNull_Q_BLOCKING (Int)1
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const GateThreadSupportNull_Q_PREEMPTING
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Preempting quality

C synopsis target-domain
#define GateThreadSupportNull_Q_PREEMPTING (Int)2
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
GateThreadSupportNull_query() // module-wide
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Runtime test for a particular gate quality

C synopsis target-domain
Bool GateThreadSupportNull_query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId GateThreadSupportNull_Module_id();
// Get this module's unique id
Bool GateThreadSupportNull_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle GateThreadSupportNull_Module_heap();
// The heap from which this module allocates memory
Bool GateThreadSupportNull_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 GateThreadSupportNull_Module_getMask();
// Returns the diagnostics mask for this module
Void GateThreadSupportNull_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
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C synopsis target-domain
typedef struct GateThreadSupportNull_Object GateThreadSupportNull_Object;
// Opaque internal representation of an instance object
typedef GateThreadSupportNull_Object *GateThreadSupportNull_Handle;
// Client reference to an instance object
typedef struct GateThreadSupportNull_Struct GateThreadSupportNull_Struct;
// Opaque client structure large enough to hold an instance object
GateThreadSupportNull_Handle GateThreadSupportNull_handle(GateThreadSupportNull_Struct *structP);
// Convert this instance structure pointer into an instance handle
GateThreadSupportNull_Struct *GateThreadSupportNull_struct(GateThreadSupportNull_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct GateThreadSupportNull_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
} GateThreadSupportNull_Params;
Void GateThreadSupportNull_Params_init(GateThreadSupportNull_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
Runtime Instance Creation
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C synopsis target-domain
GateThreadSupportNull_Handle GateThreadSupportNull_create(const GateThreadSupportNull_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void GateThreadSupportNull_construct(GateThreadSupportNull_Struct *structP, const GateThreadSupportNull_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
Instance Deletion
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C synopsis target-domain
Void GateThreadSupportNull_delete(GateThreadSupportNull_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void GateThreadSupportNull_destruct(GateThreadSupportNull_Struct *structP);
// Finalize the instance object inside the provided structure
GateThreadSupportNull_enter() // instance
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Enter this gate

C synopsis target-domain
IArg GateThreadSupportNull_enter(GateThreadSupportNull_Handle handle);
ARGUMENTS
handle — handle of a previously-created GateThreadSupportNull instance object
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
GateThreadSupportNull_leave() // instance
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Leave this gate

C synopsis target-domain
Void GateThreadSupportNull_leave(GateThreadSupportNull_Handle handle, IArg key);
ARGUMENTS
handle — handle of a previously-created GateThreadSupportNull instance object
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
Instance Convertors
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C synopsis target-domain
IGateThreadSupport_Handle GateThreadSupportNull_Handle_upCast(GateThreadSupportNull_Handle handle);
// unconditionally move one level up the inheritance hierarchy
GateThreadSupportNull_Handle GateThreadSupportNull_Handle_downCast(IGateThreadSupport_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
IGateProvider_Handle GateThreadSupportNull_Handle_upCast2(GateThreadSupportNull_Handle handle);
// unconditionally move 2 levels up the inheritance hierarchy
GateThreadSupportNull_Handle GateThreadSupportNull_Handle_downCast2(IGateProvider_Handle handle);
// conditionally move 2 levels down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int GateThreadSupportNull_Object_count();
// The number of statically-created instance objects
GateThreadSupportNull_Handle GateThreadSupportNull_Object_get(GateThreadSupportNull_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
GateThreadSupportNull_Handle GateThreadSupportNull_Object_first();
// The handle of the first dynamically-created instance object, or NULL
GateThreadSupportNull_Handle GateThreadSupportNull_Object_next(GateThreadSupportNull_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle GateThreadSupportNull_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *GateThreadSupportNull_Handle_label(GateThreadSupportNull_Handle handle, Types_Label *buf);
// The label associated with this instance object
String GateThreadSupportNull_Handle_name(GateThreadSupportNull_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/GateThreadSupportNull.xdc
var GateThreadSupportNull = xdc.useModule('xdc.runtime.knl.GateThreadSupportNull');
module-wide constants & types
    const GateThreadSupportNull.Q_BLOCKING// Blocking quality = 1;
    const GateThreadSupportNull.Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
     GateThreadSupportNull.common$// Common module configuration parameters = Types.Common$ undefined;
module-wide functions
     GateThreadSupportNull.queryMeta// Configuration time test for a particular gate quality(Int qual) returns Bool
per-instance config parameters
    var params = new GateThreadSupportNull.Params// Instance config-params object;
per-instance creation
    var inst = GateThreadSupportNull.create// Create an instance-object(params);
const GateThreadSupportNull.Q_BLOCKING
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Blocking quality

Configuration settings
const GateThreadSupportNull.Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
C SYNOPSIS
GateThreadSupportNull_Q_BLOCKING
const GateThreadSupportNull.Q_PREEMPTING
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Preempting quality

Configuration settings
const GateThreadSupportNull.Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
C SYNOPSIS
GateThreadSupportNull_Q_PREEMPTING
metaonly config GateThreadSupportNull.common$ // module-wide
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Common module configuration parameters

Configuration settings
GateThreadSupportNull.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
metaonly GateThreadSupportNull.queryMeta() // module-wide
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Configuration time test for a particular gate quality

Configuration settings
GateThreadSupportNull.queryMeta(Int qual) returns Bool
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Instance Config Parameters
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Configuration settings
var params = new GateThreadSupportNull.Params;
// Instance config-params object
Static Instance Creation
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Configuration settings
var params = new GateThreadSupportNull.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = GateThreadSupportNull.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
generated on Sun, 25 Nov 2018 22:18:56 GMT


interface xdc.runtime.knl.ICacheSupport
index URL

Interface for OS specific back-end

The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.Cache module.
XDCspec summary sourced in xdc/runtime/knl/ICacheSupport.xdc
interface ICacheSupport { ...
// inherits xdc.runtime.IModule
XDCspec declarations sourced in xdc/runtime/knl/ICacheSupport.xdc
package xdc.runtime.knl;
interface ICacheSupport {
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Bool inv// Invalidates range of memory(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
    Bool wait// Wait for a previous cache operation to complete(Error.Block *eb);
    Bool wb// Writes a range of memory from all cache(s)(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
    Bool wbInv// Writes back and invalidates range fo memory(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
}
metaonly config ICacheSupport.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/ICacheSupport.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
ICacheSupport.inv() // module-wide
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Invalidates range of memory

XDCspec declarations sourced in xdc/runtime/knl/ICacheSupport.xdc
Bool inv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Invalidate the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines in range are invalidated for all the 'type' caches.
RETURNS
true for success; false for error.
ICacheSupport.wait() // module-wide
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Wait for a previous cache operation to complete

XDCspec declarations sourced in xdc/runtime/knl/ICacheSupport.xdc
Bool wait(Error.Block *eb);
DETAILS
Wait for the cache wb/wbInv/inv operation to complete. A cache operation is not truly complete until it has worked its way through all buffering and all memory writes have landed in the source memory.
RETURNS
true for success; false for error.
ICacheSupport.wb() // module-wide
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Writes a range of memory from all cache(s)

XDCspec declarations sourced in xdc/runtime/knl/ICacheSupport.xdc
Bool wb(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Writes the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines within the range are left valid in the 'type' caches and the data within the range will be written to the source memory.
RETURNS
true for success; false for error.
ICacheSupport.wbInv() // module-wide
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Writes back and invalidates range fo memory

XDCspec declarations sourced in xdc/runtime/knl/ICacheSupport.xdc
Bool wbInv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
ARGUMENTS
blockPtr — start address of range to be invalidated
byteCnt — number of bytes to be invalidated
wait — wait until the operation is completed
eb — error block
DETAILS
Writes and invalidates the range of memory within the specified starting address and byte count. The range of addresses operated on gets quantized to whole cache lines in each cache. All lines within the range are written to the source memory and then invalidated for all 'type' caches.
RETURNS
true for success; false for error.
generated on Sun, 25 Nov 2018 22:18:55 GMT


interface xdc.runtime.knl.IGateProcessSupport
index URL

Interface for OS specific back-end

  • Specification synopsis
  • Individual elements
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.GateProcess module. [ more ... ]
XDCspec summary sourced in xdc/runtime/knl/IGateProcessSupport.xdc
interface IGateProcessSupport { ...
// inherits xdc.runtime.knl.IGateThreadSupport
    // inherits xdc.runtime.IGateProvider
        // inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
package xdc.runtime.knl;
interface IGateProcessSupport inherits IGateThreadSupport {
module-wide constants & types
    const Int GETREFCOUNT_FAILED// Status returned by getReferenceCount when there is an error = -1;
    const Int Q_BLOCKING// Blocking quality = 1;
    const Int Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Bool query// Runtime test for a particular gate quality(Int qual);
    metaonly Bool queryMeta// Configuration time test for a particular gate quality(Int qual);
instance:
per-instance config parameters
    config Int key// globally unique key for SysV-style semaphore = -1;
per-instance creation
     create// Create an instance-object();
per-instance functions
    IArg enter// Enter this gate();
    Int getReferenceCount// Get the number of processes with references to this Gate(Error.Block *err);
    Void leave// Leave this gate(IArg key);
}
DETAILS
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.GateProcess module.
The implementation of IGateThreadSupport should try to implement a gate that supports priority inversion.
const IGateProcessSupport.GETREFCOUNT_FAILED
index URL

Status returned by getReferenceCount when there is an error

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
const Int GETREFCOUNT_FAILED = -1;
const IGateProcessSupport.Q_BLOCKING
index URL

Blocking quality

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
const Int Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const IGateProcessSupport.Q_PREEMPTING
index URL

Preempting quality

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
const Int Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
metaonly config IGateProcessSupport.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
IGateProcessSupport.query() // module-wide
index URL

Runtime test for a particular gate quality

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
Bool query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
metaonly IGateProcessSupport.queryMeta() // module-wide
index URL

Configuration time test for a particular gate quality

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
metaonly Bool queryMeta(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
config IGateProcessSupport.Params.key // instance
index URL

globally unique key for SysV-style semaphore

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
config Int key = -1;
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
create();
// Create an instance-object
DETAILS
This function creates a new GateProcess object which is initialized to count. All gates created with the same key reference the same underlying synchronization object and work between processes. The underlying synchronization object should be automatically deleted when all references to it have been deleted, and the reference count should An implementation for a platform on which this is technically impossible (e.g. an operating system that does not support multiple processes) may provide a 'toy' implemenation with behavior matching that of IGateProcessSupport.
IGateProcessSupport.enter() // instance
index URL

Enter this gate

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
IArg enter();
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
IGateProcessSupport.getReferenceCount() // instance
index URL

Get the number of processes with references to this Gate

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
Int getReferenceCount(Error.Block *err);
ARGUMENTS
err — Pointer to Error.Block
RETURNS
Returns the number of processes that possess a reference to this gate, or GETREFCOUNT_FAILED if an error occured. A 'toy' implementation should always return 0.
IGateProcessSupport.leave() // instance
index URL

Leave this gate

XDCspec declarations sourced in xdc/runtime/knl/IGateProcessSupport.xdc
Void leave(IArg key);
ARGUMENTS
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
generated on Sun, 25 Nov 2018 22:18:56 GMT


interface xdc.runtime.knl.IGateThreadSupport
index URL

Interface for OS specific back-end

  • Specification synopsis
  • Individual elements
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.GateThread module. [ more ... ]
XDCspec summary sourced in xdc/runtime/knl/IGateThreadSupport.xdc
interface IGateThreadSupport { ...
// inherits xdc.runtime.IGateProvider
    // inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
package xdc.runtime.knl;
interface IGateThreadSupport inherits IGateProvider {
module-wide constants & types
    const Int Q_BLOCKING// Blocking quality = 1;
    const Int Q_PREEMPTING// Preempting quality = 2;
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Bool query// Runtime test for a particular gate quality(Int qual);
    metaonly Bool queryMeta// Configuration time test for a particular gate quality(Int qual);
instance:
per-instance creation
     create// Create an instance-object();
per-instance functions
    IArg enter// Enter this gate();
    Void leave// Leave this gate(IArg key);
}
DETAILS
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.GateThread module.
The implementation of IGateThreadSupport should try to implement a gate that supports priority inversion.
See xdc.runtime.knl for more details.
const IGateThreadSupport.Q_BLOCKING
index URL

Blocking quality

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
const Int Q_BLOCKING = 1;
DETAILS
Gates with this "quality" may cause the calling thread to block; i.e., suspend execution until another thread leaves the gate.
const IGateThreadSupport.Q_PREEMPTING
index URL

Preempting quality

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
const Int Q_PREEMPTING = 2;
DETAILS
Gates with this "quality" allow other threads to preempt the thread that has already entered the gate.
metaonly config IGateThreadSupport.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
IGateThreadSupport.query() // module-wide
index URL

Runtime test for a particular gate quality

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
Bool query(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
metaonly IGateThreadSupport.queryMeta() // module-wide
index URL

Configuration time test for a particular gate quality

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
metaonly Bool queryMeta(Int qual);
ARGUMENTS
qual — constant describing a quality
RETURNS
Returns TRUE if the gate has the given quality, and FALSE otherwise, which includes the case when the gate does not recognize the constant describing the quality.
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
create();
// Create an instance-object
IGateThreadSupport.enter() // instance
index URL

Enter this gate

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
IArg enter();
DETAILS
Each gate provider can implement mutual exclusion using different algorithms; e.g., disabling all scheduling, disabling the scheduling of all threads below a specified "priority level", suspending the caller when the gate has been entered by another thread and re-enabling it when the the other thread leaves the gate. However, in all cases, after this method returns that caller has exclusive access to the data protected by this gate.
A thread may reenter a gate without blocking or failing.
RETURNS
Returns a "key" that is used to leave this gate; this value is used to restore thread preemption to the state that existed just prior to entering this gate.
IGateThreadSupport.leave() // instance
index URL

Leave this gate

XDCspec declarations sourced in xdc/runtime/knl/IGateThreadSupport.xdc
Void leave(IArg key);
ARGUMENTS
key — the value returned by a matching call to enter
DETAILS
This method is only called by threads that have previously entered this gate via enter. After this method returns, the caller must not access the data structure protected by this gate (unless the caller has entered the gate more than once and other calls to leave remain to balance the number of previous calls to enter).
generated on Sun, 25 Nov 2018 22:18:56 GMT


interface xdc.runtime.knl.ISemaphore
index URL

Interface implemented by all front-end semaphore providers

  • Specification synopsis
  • Individual elements
SemThread and SemProcess. [EXPERIMENTAL] Semaphores can be used for synchronization and mutual exclusion. [ more ... ]
XDCspec summary sourced in xdc/runtime/knl/ISemaphore.xdc
interface ISemaphore { ...
// inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
package xdc.runtime.knl;
interface ISemaphore {
module-wide constants & types
    const UInt FOREVER// Used as the timeout value to specify wait forever = ~(0);
    enum Mode// Types of semaphores {
         Mode_COUNTING// Counting semaphore,
         Mode_BINARY// Binary Semaphore
    };
    enum PendStatus// Error codes returned by Semaphore_pend {
         PendStatus_ERROR,
         PendStatus_TIMEOUT,
         PendStatus_SUCCESS
    };
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
instance:
per-instance config parameters
    config ISemaphore.Mode mode// Semaphore mode. Default is COUNTING = ISemaphore.Mode_COUNTING;
per-instance functions
    Int pend// Wait for the semaphore to become available(UInt timeout, Error.Block *eb);
    Bool post// Increment the semaphore count(Error.Block *eb);
}
DETAILS
SemThread and SemProcess. [EXPERIMENTAL] Semaphores can be used for synchronization and mutual exclusion.
pend() is used to wait for a semaphore. The timeout parameter allows the caller to wait until a timeout, wait indefinitely, or not wait at all. The return value indicates whether or not the wait was successful.
post() is used to signal a semaphore. If no thread is waiting on the semaphore, then post() increments the semaphore count (for binary semaphores, the count is always 0 or 1).
const ISemaphore.FOREVER
index URL

Used as the timeout value to specify wait forever

XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
const UInt FOREVER = ~(0);
enum ISemaphore.Mode
index URL

Types of semaphores

XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
enum Mode {
    Mode_COUNTING,
    // Counting semaphore
    Mode_BINARY
    // Binary Semaphore
};
enum ISemaphore.PendStatus
index URL

Error codes returned by Semaphore_pend

XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
enum PendStatus {
    PendStatus_ERROR,
    PendStatus_TIMEOUT,
    PendStatus_SUCCESS
};
metaonly config ISemaphore.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
config ISemaphore.Params.mode // instance
index URL

Semaphore mode. Default is COUNTING

XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
config ISemaphore.Mode mode = ISemaphore.Mode_COUNTING;
DETAILS
When mode is BINARY , the semaphore has only two states, available and unavailable. When mode is COUNTING, the semaphore keeps track of number of times a semaphore is posted.
ISemaphore.pend() // instance
index URL

Wait for the semaphore to become available

XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
Int pend(UInt timeout, Error.Block *eb);
ARGUMENTS
timeout — timeout in microseconds
eb — error block
DETAILS
  • PendStatus_ERROR if an error occured.
  • PendStatus_TIMEOUT denotes timeout.
  • PendStatus_SUCCESS semaphore was decremented. details.
RETURNS
refer to description above
ISemaphore.post() // instance
index URL

Increment the semaphore count

XDCspec declarations sourced in xdc/runtime/knl/ISemaphore.xdc
Bool post(Error.Block *eb);
ARGUMENTS
eb — error block
RETURNS
true for success, false for error in error block
generated on Sun, 25 Nov 2018 22:18:56 GMT


interface xdc.runtime.knl.ISemProcessSupport
index URL

Interface for OS specific back-end

  • Specification synopsis
  • Individual elements
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules however require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.SemProcess module. [ more ... ]
XDCspec summary sourced in xdc/runtime/knl/ISemProcessSupport.xdc
interface ISemProcessSupport { ...
// inherits xdc.runtime.knl.ISemaphore
    // inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
package xdc.runtime.knl;
interface ISemProcessSupport inherits ISemaphore {
module-wide constants & types
    const UInt FOREVER// Used as the timeout value to specify wait forever = ~(0);
    enum Mode// Types of semaphores {
         Mode_COUNTING// Counting semaphore,
         Mode_BINARY// Binary Semaphore
    };
    enum PendStatus// Error codes returned by Semaphore_pend {
         PendStatus_ERROR,
         PendStatus_TIMEOUT,
         PendStatus_SUCCESS
    };
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
instance:
per-instance config parameters
    config ISemaphore.Mode mode// Semaphore mode. Default is COUNTING = ISemaphore.Mode_COUNTING;
per-instance creation
     create// Create an instance-object(Int count, Int key);
per-instance functions
    Int pend// Wait for the semaphore to become available(UInt timeout, Error.Block *eb);
    Bool post// Increment the semaphore count(Error.Block *eb);
}
DETAILS
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules however require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.SemProcess module.
create() takes a 32-bit integer key parameter to be used for identifying the semaphore to create across processes. For example, for Linux System V semaphores, the key is necessary so that different processes can access the same semaphore.
const ISemProcessSupport.FOREVER
index URL

Used as the timeout value to specify wait forever

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
const UInt FOREVER = ~(0);
enum ISemProcessSupport.Mode
index URL

Types of semaphores

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
enum Mode {
    Mode_COUNTING,
    // Counting semaphore
    Mode_BINARY
    // Binary Semaphore
};
enum ISemProcessSupport.PendStatus
index URL

Error codes returned by Semaphore_pend

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
enum PendStatus {
    PendStatus_ERROR,
    PendStatus_TIMEOUT,
    PendStatus_SUCCESS
};
metaonly config ISemProcessSupport.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
config ISemProcessSupport.Params.mode // instance
index URL

Semaphore mode. Default is COUNTING

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
config ISemaphore.Mode mode = ISemaphore.Mode_COUNTING;
DETAILS
When mode is BINARY , the semaphore has only two states, available and unavailable. When mode is COUNTING, the semaphore keeps track of number of times a semaphore is posted.
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
create(Int count, Int key);
// Create an instance-object
ARGUMENTS
count — initial semaphore count
key — globally unique key
DETAILS
This function creates a new SemProcess object which is initialized to count. All semaphores created with the same key reference the same underlying synchronization object and work between processes. The underlying synchronization object should be automatically deleted when all references to it have been deleted, and the reference count should be maintained consistently across process forks or similar operations. An implementation for a platform on which this is technically impossible (e.g. an operating system that does not support multiple processes) may provide a 'toy' implementation with behavior matching that of ISemProcessSupport.
ISemProcessSupport.pend() // instance
index URL

Wait for the semaphore to become available

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
Int pend(UInt timeout, Error.Block *eb);
ARGUMENTS
timeout — timeout in microseconds
eb — error block
DETAILS
  • PendStatus_ERROR if an error occured.
  • PendStatus_TIMEOUT denotes timeout.
  • PendStatus_SUCCESS semaphore was decremented. details.
RETURNS
refer to description above
ISemProcessSupport.post() // instance
index URL

Increment the semaphore count

XDCspec declarations sourced in xdc/runtime/knl/ISemProcessSupport.xdc
Bool post(Error.Block *eb);
ARGUMENTS
eb — error block
RETURNS
true for success, false for error in error block
generated on Sun, 25 Nov 2018 22:18:56 GMT


interface xdc.runtime.knl.ISemThreadSupport
index URL

Interface for OS specific back-end

  • Specification synopsis
  • Individual elements
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.SemThread module. [ more ... ]
XDCspec summary sourced in xdc/runtime/knl/ISemThreadSupport.xdc
interface ISemThreadSupport { ...
// inherits xdc.runtime.knl.ISemaphore
    // inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
package xdc.runtime.knl;
interface ISemThreadSupport inherits ISemaphore {
module-wide constants & types
    const UInt FOREVER// Used as the timeout value to specify wait forever = ~(0);
    enum Mode// Types of semaphores {
         Mode_COUNTING// Counting semaphore,
         Mode_BINARY// Binary Semaphore
    };
    enum PendStatus// Error codes returned by Semaphore_pend {
         PendStatus_ERROR,
         PendStatus_TIMEOUT,
         PendStatus_SUCCESS
    };
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
instance:
per-instance config parameters
    config ISemaphore.Mode mode// Semaphore mode. Default is COUNTING = ISemaphore.Mode_COUNTING;
per-instance creation
     create// Create an instance-object(Int count);
per-instance functions
    Int pend// Wait for the semaphore to become available(UInt timeout, Error.Block *eb);
    Bool post// Increment the semaphore count(Error.Block *eb);
}
DETAILS
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.SemThread module.
This interface adds the create() function.
const ISemThreadSupport.FOREVER
index URL

Used as the timeout value to specify wait forever

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
const UInt FOREVER = ~(0);
enum ISemThreadSupport.Mode
index URL

Types of semaphores

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
enum Mode {
    Mode_COUNTING,
    // Counting semaphore
    Mode_BINARY
    // Binary Semaphore
};
enum ISemThreadSupport.PendStatus
index URL

Error codes returned by Semaphore_pend

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
enum PendStatus {
    PendStatus_ERROR,
    PendStatus_TIMEOUT,
    PendStatus_SUCCESS
};
metaonly config ISemThreadSupport.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
config ISemThreadSupport.Params.mode // instance
index URL

Semaphore mode. Default is COUNTING

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
config ISemaphore.Mode mode = ISemaphore.Mode_COUNTING;
DETAILS
When mode is BINARY , the semaphore has only two states, available and unavailable. When mode is COUNTING, the semaphore keeps track of number of times a semaphore is posted.
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
create(Int count);
// Create an instance-object
ARGUMENTS
count — initial semaphore count
DETAILS
This function creates a new Semaphore object which is initialized to count.
ISemThreadSupport.pend() // instance
index URL

Wait for the semaphore to become available

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
Int pend(UInt timeout, Error.Block *eb);
ARGUMENTS
timeout — timeout in microseconds
eb — error block
DETAILS
  • PendStatus_ERROR if an error occured.
  • PendStatus_TIMEOUT denotes timeout.
  • PendStatus_SUCCESS semaphore was decremented. details.
RETURNS
refer to description above
ISemThreadSupport.post() // instance
index URL

Increment the semaphore count

XDCspec declarations sourced in xdc/runtime/knl/ISemThreadSupport.xdc
Bool post(Error.Block *eb);
ARGUMENTS
eb — error block
RETURNS
true for success, false for error in error block
generated on Sun, 25 Nov 2018 22:18:56 GMT


interface xdc.runtime.knl.ISync
index URL

OS independent synchronization

  • Specification synopsis
  • Individual elements
This interface allows clients to select method of synchronization in an OS independent way. [ more ... ]
XDCspec summary sourced in xdc/runtime/knl/ISync.xdc
interface ISync { ...
// inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
package xdc.runtime.knl;
interface ISync {
module-wide constants & types
    const UInt NO_WAIT// Used to specify no waiting = 0;
    const Int Q_BLOCKING// Blocking quality = 1;
    const UInt WAIT_FOREVER// Used to wait forever = ~(0);
    enum WaitStatus// Error codes returned by ISync_wait {
         WaitStatus_ERROR,
         WaitStatus_TIMEOUT,
         WaitStatus_SUCCESS
    };
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
instance:
per-instance creation
     create// Create an instance-object();
per-instance functions
    Bool query// Query for a particular quality(Int qual);
    Void signal// Called at completion of an activity();
    Int wait// Called to wait/poll for completion of an activity(UInt timeout, Error.Block *eb);
}
DETAILS
This interface allows clients to select method of synchronization in an OS independent way.
Modules that require the user to pick a synchronization method, will request a Handle. Clients of such modules can pick a blocking ISync implementation or a non-blocking implementation.
This interface specifies two main functions signal and wait. These two functions are always used in pairs in modules that use ISync instances. The signal() function is used to signal completion of an activity. The wait() function will allow the module to block or poll for completion of the same activity.
ISync mandates that the sync mechanism be binary and not support counters. Although the wait() function seems meaningless in the case of non-blocking sync, it allows modules to be written generically and support all ISync implementations. For non-blocking ISync the wait() function will return WaitStatus_TIMEOUT to denote timeout.
const ISync.NO_WAIT
index URL

Used to specify no waiting

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
const UInt NO_WAIT = 0;
const ISync.Q_BLOCKING
index URL

Blocking quality

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
const Int Q_BLOCKING = 1;
DETAILS
Implementations with this "quality" may cause the calling thread to block;
const ISync.WAIT_FOREVER
index URL

Used to wait forever

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
const UInt WAIT_FOREVER = ~(0);
enum ISync.WaitStatus
index URL

Error codes returned by ISync_wait

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
enum WaitStatus {
    WaitStatus_ERROR,
    WaitStatus_TIMEOUT,
    WaitStatus_SUCCESS
};
metaonly config ISync.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
create();
// Create an instance-object
ISync.query() // instance
index URL

Query for a particular quality

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
Bool query(Int qual);
ARGUMENTS
qual — quality
RETURNS
TRUE or FALSE.
DETAILS
FALSE is returned if quality not supported.
ISync.signal() // instance
index URL

Called at completion of an activity

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
Void signal();
DETAILS
This function is non-blocking. It is also required that the underlying sync be binary in nature.
This function does not take an Error.Block intentionally because it can be called from ISR context.
ISync.wait() // instance
index URL

Called to wait/poll for completion of an activity

XDCspec declarations sourced in xdc/runtime/knl/ISync.xdc
Int wait(UInt timeout, Error.Block *eb);
ARGUMENTS
timeout — Timeout in microseconds
eb — Hist Pointer to Error.Block
RETURNS
Refer to description above
DETAILS
This function can block. Non-blocking implementations should return WaitStatus_TIMEOUT to indicate a timeout.
  • WaitStatus_ERROR if an error occured.
  • WaitStatus_TIMEOUT denotes timeout.
  • WaitStatus_SUCCESS semaphore was decremented.
generated on Sun, 25 Nov 2018 22:18:56 GMT


interface xdc.runtime.knl.IThreadSupport
index URL

Interface for OS specific back-end

  • Specification synopsis
  • Individual elements
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.Thread module. [ more ... ]
XDCspec summary sourced in xdc/runtime/knl/IThreadSupport.xdc
interface IThreadSupport { ...
// inherits xdc.runtime.IModule
instance: ...
XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
package xdc.runtime.knl;
interface IThreadSupport {
module-wide constants & types
    const Int GETPRI_FAILED// The error status for getPriority when an error is captured in the Error.Block = -2;
    const Int INVALID_OS_PRIORITY// Invalid OS priority value = 0;
    enum CompStatus// Status returned by compareOsPriorities when an error occurs {
         CompStatus_ERROR,
         CompStatus_LOWER,
         CompStatus_EQUAL,
         CompStatus_HIGHER
    };
    enum Priority// Thread priorities which are mapped to OS specific value by Proxy {
         Priority_INVALID,
         Priority_LOWEST,
         Priority_BELOW_NORMAL,
         Priority_NORMAL,
         Priority_ABOVE_NORMAL,
         Priority_HIGHEST
    };
    typedef Void (*RunFxn// typedef for function that gets called when the Thread runs)(IArg);
    struct Stat// Struct to hold thread statistics from stat {
        SizeT stackSize;
        SizeT stackUsed;
    };
module-wide config parameters
    metaonly config Types.Common$ common$// Common module configuration parameters;
module-wide functions
    Int compareOsPriorities// Compare two priority values and find out which one represents a higher priority(Int p1, Int p2, Error.Block *eb);
     IThreadSupport.Handle self// Acquire the currently executing thread's handle(Error.Block *eb);
    Bool sleep// Sleep for certain number of microseconds(UInt timeout, Error.Block *eb);
    Bool start// Start threads running(Error.Block *eb);
    Bool yield// Yield the currently scheduled thread(Error.Block *eb);
instance:
per-instance config parameters
    config IArg arg// Thread function argument. Default is NULL = null;
    config Int osPriority// OS specific thread priority = IThreadSupport.INVALID_OS_PRIORITY;
    config IThreadSupport.Priority priority// Thread priority = IThreadSupport.Priority_NORMAL;
    config SizeT stackSize// Thread stack size. If left at zero, OS default is used = 0;
    config Ptr tls// User-specified thread local storage data = null;
per-instance creation
     create// Create an instance-object(IThreadSupport.RunFxn fxn);
per-instance functions
    Ptr getOsHandle// Get the OS thread handle();
    Int getOsPriority// Obtain a thread's os specific priority(Error.Block *eb);
     IThreadSupport.Priority getPriority// Obtain a thread's priority(Error.Block *eb);
    Ptr getTls// Obtain a thread's local storage pointer();
    Bool join// Join on a Thread(Error.Block *eb);
    Bool setOsPriority// Set a thread's priority(Int newPri, Error.Block *eb);
    Bool setPriority// Set a thread's priority(IThreadSupport.Priority newPri, Error.Block *eb);
    Void setTls// Set a thread's local storage pointer(Ptr tls);
    Bool stat// Obtain a thread's stats(IThreadSupport.Stat *buf, Error.Block *eb);
}
DETAILS
The xdc.runtime.knl package contains modules that provide typical OS services. These xdc.runtime.knl modules require proxies to be bound to an OS specific delegate. This specifies the interface to be implemented by the OS specific delegate for xdc.runtime.knl.Thread module.
Refer to xdc.runtime.knl.Thread for more details on the APIs.
const IThreadSupport.GETPRI_FAILED
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The error status for getPriority when an error is captured in the Error.Block

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
const Int GETPRI_FAILED = -2;
const IThreadSupport.INVALID_OS_PRIORITY
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Invalid OS priority value

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
const Int INVALID_OS_PRIORITY = 0;
enum IThreadSupport.CompStatus
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Status returned by compareOsPriorities when an error occurs

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
enum CompStatus {
    CompStatus_ERROR,
    CompStatus_LOWER,
    CompStatus_EQUAL,
    CompStatus_HIGHER
};
enum IThreadSupport.Priority
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Thread priorities which are mapped to OS specific value by Proxy

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
enum Priority {
    Priority_INVALID,
    Priority_LOWEST,
    Priority_BELOW_NORMAL,
    Priority_NORMAL,
    Priority_ABOVE_NORMAL,
    Priority_HIGHEST
};
typedef IThreadSupport.RunFxn
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typedef for function that gets called when the Thread runs

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
typedef Void (*RunFxn)(IArg);
struct IThreadSupport.Stat
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Struct to hold thread statistics from stat

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
struct Stat {
    SizeT stackSize;
    SizeT stackUsed;
};
metaonly config IThreadSupport.common$ // module-wide
index URL

Common module configuration parameters

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
metaonly config Types.Common$ common$;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
IThreadSupport.compareOsPriorities() // module-wide
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Compare two priority values and find out which one represents a higher priority

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Int compareOsPriorities(Int p1, Int p2, Error.Block *eb);
ARGUMENTS
p1 — priority one
p2 — priority two
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.compareOsPriorities for more details.
  • CompStatus_ERROR if an error occured
  • CompStatus_LOWER if p1 is lower than p2
  • CompStatus_EQUAL if p1=p2
  • CompStatus_HIGHER if p1 is higher than p2 details.
RETURNS
Refer to description above
IThreadSupport.self() // module-wide
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Acquire the currently executing thread's handle

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
IThreadSupport.Handle self(Error.Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.self for more details.
RETURNS
Handle in case of success; null for error;
IThreadSupport.sleep() // module-wide
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Sleep for certain number of microseconds

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Bool sleep(UInt timeout, Error.Block *eb);
ARGUMENTS
timeout — timeout in microseconds
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.sleep for more details.
RETURNS
true for success; false for failure
IThreadSupport.start() // module-wide
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Start threads running

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Bool start(Error.Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.start for more details.
RETURNS
true for success; false for failure
IThreadSupport.yield() // module-wide
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Yield the currently scheduled thread

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Bool yield(Error.Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.yield for more details.
RETURNS
true for success; false for failure
config IThreadSupport.Params.arg // instance
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Thread function argument. Default is NULL

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
config IArg arg = null;
config IThreadSupport.Params.osPriority // instance
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OS specific thread priority

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
config Int osPriority = IThreadSupport.INVALID_OS_PRIORITY;
DETAILS
Used to specify an OS specific value for priority. If set this value takes precedence over priority.
config IThreadSupport.Params.priority // instance
index URL

Thread priority

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
config IThreadSupport.Priority priority = IThreadSupport.Priority_NORMAL;
DETAILS
Thread defines several constants which allows applications to select a priority in an OS independent way. Priority_LOWEST, Priority_BELOW_NORMAL, Priority_NORMAL, Priority_ABOVE_NORMAL and Priority_HIGHEST. These values get mapped to OS specific priorities by the OS specific delegate.
config IThreadSupport.Params.stackSize // instance
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Thread stack size. If left at zero, OS default is used

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
config SizeT stackSize = 0;
config IThreadSupport.Params.tls // instance
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User-specified thread local storage data

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
config Ptr tls = null;
Static Instance Creation
index URL

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
create(IThreadSupport.RunFxn fxn);
// Create an instance-object
ARGUMENTS
fxn — function for new thread to begin execution
DETAILS
This function spawns a new thread calling the function fxn.
IThreadSupport.getOsHandle() // instance
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Get the OS thread handle

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Ptr getOsHandle();
RETURNS
null in case of error
IThreadSupport.getOsPriority() // instance
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Obtain a thread's os specific priority

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Int getOsPriority(Error.Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
DETAILS
For OSes that support dynamic priority boosting, the value returned is the base priority of the thread.
Refer to xdc.runtime.knl.Thread.getOsPriority for more details.
RETURNS
thread priority in case of success; GETPRI_FAILED in case of error;
IThreadSupport.getPriority() // instance
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Obtain a thread's priority

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
IThreadSupport.Priority getPriority(Error.Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.getPriority for more details.
RETURNS
thread priority in case of success; Priority_INVALID in case of error;
IThreadSupport.getTls() // instance
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Obtain a thread's local storage pointer

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Ptr getTls();
RETURNS
null in case of error
IThreadSupport.join() // instance
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Join on a Thread

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Bool join(Error.Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.join for more details.
RETURNS
true for success; false for failure
IThreadSupport.setOsPriority() // instance
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Set a thread's priority

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Bool setOsPriority(Int newPri, Error.Block *eb);
ARGUMENTS
newPri — new thread priority
eb — Pointer to Error.Block
DETAILS
This API sets the base priority of the thread on OSes that support dynamic priority boosting
Refer to xdc.runtime.knl.Thread.setOsPriority for more details.
RETURNS
true for success; false for failure
IThreadSupport.setPriority() // instance
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Set a thread's priority

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Bool setPriority(IThreadSupport.Priority newPri, Error.Block *eb);
ARGUMENTS
newPri — new thread priority
eb — Pointer to Error.Block
DETAILS
Refer to xdc.runtime.knl.Thread.setPriority for more details.
RETURNS
true for success; false for failure
IThreadSupport.setTls() // instance
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Set a thread's local storage pointer

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Void setTls(Ptr tls);
ARGUMENTS
tls — thread tls
IThreadSupport.stat() // instance
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Obtain a thread's stats

XDCspec declarations sourced in xdc/runtime/knl/IThreadSupport.xdc
Bool stat(IThreadSupport.Stat *buf, Error.Block *eb);
ARGUMENTS
buf — Pointer to Stat
eb — Pointer to Error.Block
RETURNS
true for success; false for failure
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.Semaphore
index URL

Provides semaphore services when an ISemaphore.Handle is available

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
An application can isolate itself from ISemaphore implementations by using this module. The application must first obtain an ISemaphore.Handle. It make get such a handle by directly calling SemThread.create or SemProcess.create. Then the application can use the generic APIs provided by this module.
C synopsis target-domain sourced in xdc/runtime/knl/Semaphore.xdc
#include <xdc/runtime/knl/Semaphore.h>
Functions
Int | Semaphore_pend// Wait for the semaphore to have a nonzero count, then decrement it(ISemaphore_Handle sem, UInt timeout, Error_Block *eb);
Bool | Semaphore_post// Increment the semaphore count(ISemaphore_Handle sem, Error_Block *eb);
Functions common to all target modules
 | Semaphore_Module_getMask// Returns the diagnostics mask for this module, Semaphore_Module_hasMask// Test whether this module has a diagnostics mask, Semaphore_Module_heap// The heap from which this module allocates memory, Semaphore_Module_id// Get this module's unique id, Semaphore_Module_setMask// Set the diagnostics mask for this module, Semaphore_Module_startupDone// Test if this module has completed startup
Defines
#define | Semaphore_FOREVER// Used as the timeout value to specify wait forever (UInt)ISemaphore.FOREVER
Typedefs
typedef enum | Semaphore_PendStatus// Error codes returned by Semaphore_pend ...
const Semaphore_FOREVER
index URL

Used as the timeout value to specify wait forever

C synopsis target-domain
#define Semaphore_FOREVER (UInt)ISemaphore.FOREVER
enum Semaphore_PendStatus
index URL

Error codes returned by Semaphore_pend

C synopsis target-domain
typedef enum Semaphore_PendStatus {
    Semaphore_PendStatus_ERROR,
    Semaphore_PendStatus_TIMEOUT,
    Semaphore_PendStatus_SUCCESS
} Semaphore_PendStatus;
Semaphore_pend() // module-wide
index URL

Wait for the semaphore to have a nonzero count, then decrement it

C synopsis target-domain
Int Semaphore_pend(ISemaphore_Handle sem, UInt timeout, Error_Block *eb);
ARGUMENTS
sem — ISemaphore.Handle to be used
timeout — timeout in microseconds or Semaphore_FOREVER to wait forever
eb — Pointer to Error.Block
DETAILS
The function returns one of the following:
  • PendStatus_ERROR if an error occured.
  • PendStatus_TIMEOUT denotes timeout.
  • PendStatus_SUCCESS semaphore was decremented.
RETURNS
status returned. (refer to above description)
Semaphore_post() // module-wide
index URL

Increment the semaphore count

C synopsis target-domain
Bool Semaphore_post(ISemaphore_Handle sem, Error_Block *eb);
ARGUMENTS
sem — ISemaphore.Handle to be used
eb — Pointer to Error.Block
RETURNS
true for success, false for error in Error block.
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId Semaphore_Module_id();
// Get this module's unique id
Bool Semaphore_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Semaphore_Module_heap();
// The heap from which this module allocates memory
Bool Semaphore_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Semaphore_Module_getMask();
// Returns the diagnostics mask for this module
Void Semaphore_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/knl/Semaphore.xdc
var Semaphore = xdc.useModule('xdc.runtime.knl.Semaphore');
local proxy modules
     Semaphore.Proxy// Proxy used for optimization = ISemaphore.Module null
         Semaphore.Proxy.delegate$ = ISemaphore.Module null
         Semaphore.Proxy.abstractInstances$ = false
module-wide constants & types
    const Semaphore.FOREVER// Used as the timeout value to specify wait forever = ISemaphore.FOREVER;
    values of type Semaphore.PendStatus// Error codes returned by Semaphore_pend
        const Semaphore.PendStatus_ERROR;
        const Semaphore.PendStatus_TIMEOUT;
        const Semaphore.PendStatus_SUCCESS;
module-wide config parameters
     Semaphore.common$// Common module configuration parameters = Types.Common$ undefined;
proxy Semaphore.Proxy
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Proxy used for optimization

Configuration settings
Semaphore.Proxy = ISemaphore.Module null
// some delegate module inheriting the ISemaphore interface
    Semaphore.Proxy.delegate$ = ISemaphore.Module null
    // explicit access to the currently bound delegate module
    Semaphore.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
DETAILS
If ALL ISemaphore.Handles were created using the same module (e.g SemProcess) then setting this Proxy to SemProcess and setting Semaphore.Proxy.abstractInstances$ = false, Semaphore APIs can have better performance.
const Semaphore.FOREVER
index URL

Used as the timeout value to specify wait forever

Configuration settings
const Semaphore.FOREVER = ISemaphore.FOREVER;
C SYNOPSIS
Semaphore_FOREVER
enum Semaphore.PendStatus
index URL

Error codes returned by Semaphore_pend

Configuration settings
values of type Semaphore.PendStatus
    const Semaphore.PendStatus_ERROR;
    const Semaphore.PendStatus_TIMEOUT;
    const Semaphore.PendStatus_SUCCESS;
C SYNOPSIS
Semaphore_PendStatus
metaonly config Semaphore.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Semaphore.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.SemProcess
index URL

SemProcess Manager

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module manages multi-process semaphores through its proxy ISemProcessSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/knl/SemProcess.xdc
#include <xdc/runtime/knl/SemProcess.h>
Functions
Void | SemProcess_construct// Initialize a new instance object inside the provided structure(SemProcess_Struct *structP, Int count, UInt32 key, const SemProcess_Params *params, Error_Block *eb);
SemProcess_Handle | SemProcess_create// Allocate and initialize a new instance object and return its handle(Int count, UInt32 key, const SemProcess_Params *params, Error_Block *eb);
Void | SemProcess_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(SemProcess_Handle *handleP);
Void | SemProcess_destruct// Finalize the instance object inside the provided structure(SemProcess_Struct *structP);
Void | SemProcess_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(SemProcess_Params *params);
Functions common to all ISemaphore modules
Int | SemProcess_pend// Wait for the semaphore to become available(SemProcess_Handle handle, UInt timeout, Error_Block *eb);
Bool | SemProcess_post// Increment the semaphore count(SemProcess_Handle handle, Error_Block *eb);
Functions common to all target instances
 | SemProcess_handle// Convert this instance structure pointer into an instance handle, SemProcess_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, SemProcess_Handle_label// The label associated with this instance object, SemProcess_Handle_name// The name of this instance object, SemProcess_Handle_upCast// unconditionally move one level up the inheritance hierarchy, SemProcess_Object_count// The number of statically-created instance objects, SemProcess_Object_first// The handle of the first dynamically-created instance object, or NULL, SemProcess_Object_get// The handle of the i-th statically-created instance object (array == NULL), SemProcess_Object_heap// The heap used to allocate dynamically-created instance objects, SemProcess_Object_next// The handle of the next dynamically-created instance object, or NULL, SemProcess_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | SemProcess_Module_getMask// Returns the diagnostics mask for this module, SemProcess_Module_hasMask// Test whether this module has a diagnostics mask, SemProcess_Module_heap// The heap from which this module allocates memory, SemProcess_Module_id// Get this module's unique id, SemProcess_Module_setMask// Set the diagnostics mask for this module, SemProcess_Module_startupDone// Test if this module has completed startup
Defines
#define | SemProcess_FOREVER// Used as the timeout value to specify wait forever (UInt)~(0)
Typedefs
typedef SemProcess_Object * | SemProcess_Handle// Client reference to an instance object;
typedef enum | SemProcess_Mode// Types of semaphores ...
typedef struct | SemProcess_Object// Opaque internal representation of an instance object SemProcess_Object;
typedef struct | SemProcess_Params// Instance config-params structure ...
typedef enum | SemProcess_PendStatus// Error codes returned by Semaphore_pend ...
typedef struct | SemProcess_Struct// Opaque client structure large enough to hold an instance object SemProcess_Struct;
DETAILS
This module manages multi-process semaphores through its proxy ISemProcessSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used.
Here is an example showing how the proxy is bound to an BIOS 6.x specific delegate.
  var SemProcess = xdc.useModule('xdc.runtime.knl.SemProcess');
  SemProcess.Proxy = xdc.useModule('ti.sysbios.xdcruntime.SemProcessSupport');
Typically the package containing the delegates have a Settings module that will bind all xdc.runtime.knl proxies. The following example sets up all the xdc.runtime.knl proxies.
  xdc.useModule("ti.sysbios.xdcruntime.Settings");
const SemProcess_FOREVER
index URL

Used as the timeout value to specify wait forever

C synopsis target-domain
#define SemProcess_FOREVER (UInt)~(0)
enum SemProcess_Mode
index URL

Types of semaphores

C synopsis target-domain
typedef enum SemProcess_Mode {
    SemProcess_Mode_COUNTING,
    // Counting semaphore
    SemProcess_Mode_BINARY
    // Binary Semaphore
} SemProcess_Mode;
enum SemProcess_PendStatus
index URL

Error codes returned by Semaphore_pend

C synopsis target-domain
typedef enum SemProcess_PendStatus {
    SemProcess_PendStatus_ERROR,
    SemProcess_PendStatus_TIMEOUT,
    SemProcess_PendStatus_SUCCESS
} SemProcess_PendStatus;
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId SemProcess_Module_id();
// Get this module's unique id
Bool SemProcess_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SemProcess_Module_heap();
// The heap from which this module allocates memory
Bool SemProcess_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SemProcess_Module_getMask();
// Returns the diagnostics mask for this module
Void SemProcess_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct SemProcess_Object SemProcess_Object;
// Opaque internal representation of an instance object
typedef SemProcess_Object *SemProcess_Handle;
// Client reference to an instance object
typedef struct SemProcess_Struct SemProcess_Struct;
// Opaque client structure large enough to hold an instance object
SemProcess_Handle SemProcess_handle(SemProcess_Struct *structP);
// Convert this instance structure pointer into an instance handle
SemProcess_Struct *SemProcess_struct(SemProcess_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
index URL

C synopsis target-domain
typedef struct SemProcess_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
     ISemaphore_Mode mode;
    // Semaphore mode. Default is COUNTING
} SemProcess_Params;
Void SemProcess_Params_init(SemProcess_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config SemProcess_Params.mode // instance
index URL

Semaphore mode. Default is COUNTING

C synopsis target-domain
struct SemProcess_Params {
     ...
     ISemaphore_Mode mode;
DETAILS
When mode is BINARY , the semaphore has only two states, available and unavailable. When mode is COUNTING, the semaphore keeps track of number of times a semaphore is posted.
Runtime Instance Creation
index URL

C synopsis target-domain
SemProcess_Handle SemProcess_create(Int count, UInt32 key, const SemProcess_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void SemProcess_construct(SemProcess_Struct *structP, Int count, UInt32 key, const SemProcess_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
count — initial semaphore count
key — globally unique key for SysV-style semaphore
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new SemProcess object which is initialized to count. All semaphores created with the same key reference the same underlying synchronization object and work between processes.
Instance Deletion
index URL

C synopsis target-domain
Void SemProcess_delete(SemProcess_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void SemProcess_destruct(SemProcess_Struct *structP);
// Finalize the instance object inside the provided structure
SemProcess_pend() // instance
index URL

Wait for the semaphore to become available

C synopsis target-domain
Int SemProcess_pend(SemProcess_Handle handle, UInt timeout, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created SemProcess instance object
timeout — timeout in microseconds
eb — error block
DETAILS
  • PendStatus_ERROR if an error occured.
  • PendStatus_TIMEOUT denotes timeout.
  • PendStatus_SUCCESS semaphore was decremented. details.
RETURNS
refer to description above
SemProcess_post() // instance
index URL

Increment the semaphore count

C synopsis target-domain
Bool SemProcess_post(SemProcess_Handle handle, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created SemProcess instance object
eb — error block
RETURNS
true for success, false for error in error block
Instance Convertors
index URL

C synopsis target-domain
ISemaphore_Handle SemProcess_Handle_upCast(SemProcess_Handle handle);
// unconditionally move one level up the inheritance hierarchy
SemProcess_Handle SemProcess_Handle_downCast(ISemaphore_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
index URL

C synopsis target-domain
Int SemProcess_Object_count();
// The number of statically-created instance objects
SemProcess_Handle SemProcess_Object_get(SemProcess_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
SemProcess_Handle SemProcess_Object_first();
// The handle of the first dynamically-created instance object, or NULL
SemProcess_Handle SemProcess_Object_next(SemProcess_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle SemProcess_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *SemProcess_Handle_label(SemProcess_Handle handle, Types_Label *buf);
// The label associated with this instance object
String SemProcess_Handle_name(SemProcess_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/SemProcess.xdc
var SemProcess = xdc.useModule('xdc.runtime.knl.SemProcess');
local proxy modules
     SemProcess.Proxy// Proxy that needs to be bound to an OS specific delegate = ISemProcessSupport.Module null
         SemProcess.Proxy.delegate$ = ISemProcessSupport.Module null
         SemProcess.Proxy.abstractInstances$ = false
module-wide constants & types
    const SemProcess.FOREVER// Used as the timeout value to specify wait forever = ~(0);
    values of type SemProcess.Mode// Types of semaphores
        const SemProcess.Mode_COUNTING// Counting semaphore;
        const SemProcess.Mode_BINARY// Binary Semaphore;
    values of type SemProcess.PendStatus// Error codes returned by Semaphore_pend
        const SemProcess.PendStatus_ERROR;
        const SemProcess.PendStatus_TIMEOUT;
        const SemProcess.PendStatus_SUCCESS;
module-wide config parameters
     SemProcess.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new SemProcess.Params// Instance config-params object;
        params.mode// Semaphore mode. Default is COUNTING = ISemaphore.Mode ISemaphore.Mode_COUNTING;
per-instance creation
    var inst = SemProcess.create// Create an instance-object(Int count, UInt32 key, params);
proxy SemProcess.Proxy
index URL

Proxy that needs to be bound to an OS specific delegate

Configuration settings
SemProcess.Proxy = ISemProcessSupport.Module null
// some delegate module inheriting the ISemProcessSupport interface
    SemProcess.Proxy.delegate$ = ISemProcessSupport.Module null
    // explicit access to the currently bound delegate module
    SemProcess.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
const SemProcess.FOREVER
index URL

Used as the timeout value to specify wait forever

Configuration settings
const SemProcess.FOREVER = ~(0);
C SYNOPSIS
SemProcess_FOREVER
enum SemProcess.Mode
index URL

Types of semaphores

Configuration settings
values of type SemProcess.Mode
    const SemProcess.Mode_COUNTING;
    // Counting semaphore
    const SemProcess.Mode_BINARY;
    // Binary Semaphore
C SYNOPSIS
SemProcess_Mode
enum SemProcess.PendStatus
index URL

Error codes returned by Semaphore_pend

Configuration settings
values of type SemProcess.PendStatus
    const SemProcess.PendStatus_ERROR;
    const SemProcess.PendStatus_TIMEOUT;
    const SemProcess.PendStatus_SUCCESS;
C SYNOPSIS
SemProcess_PendStatus
metaonly config SemProcess.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
SemProcess.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
index URL

Configuration settings
var params = new SemProcess.Params;
// Instance config-params object
    params.mode = ISemaphore.Mode ISemaphore.Mode_COUNTING;
    // Semaphore mode. Default is COUNTING
config SemProcess.Params.mode // instance
index URL

Semaphore mode. Default is COUNTING

Configuration settings
var params = new SemProcess.Params;
...
params.mode = ISemaphore.Mode ISemaphore.Mode_COUNTING;
DETAILS
When mode is BINARY , the semaphore has only two states, available and unavailable. When mode is COUNTING, the semaphore keeps track of number of times a semaphore is posted.
C SYNOPSIS
SemProcess_Params.mode
Static Instance Creation
index URL

Configuration settings
var params = new SemProcess.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SemProcess.create(Int count, UInt32 key, params);
// Create an instance-object
ARGUMENTS
count — initial semaphore count
key — globally unique key for SysV-style semaphore
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new SemProcess object which is initialized to count. All semaphores created with the same key reference the same underlying synchronization object and work between processes.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.SemThread
index URL

SemThread Manager

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module manages semaphores through its proxy ISemThreadSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/knl/SemThread.xdc
#include <xdc/runtime/knl/SemThread.h>
Functions
Void | SemThread_construct// Initialize a new instance object inside the provided structure(SemThread_Struct *structP, Int count, const SemThread_Params *params, Error_Block *eb);
SemThread_Handle | SemThread_create// Allocate and initialize a new instance object and return its handle(Int count, const SemThread_Params *params, Error_Block *eb);
Void | SemThread_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(SemThread_Handle *handleP);
Void | SemThread_destruct// Finalize the instance object inside the provided structure(SemThread_Struct *structP);
Void | SemThread_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(SemThread_Params *params);
Functions common to all ISemaphore modules
Int | SemThread_pend// Wait for the semaphore to become available(SemThread_Handle handle, UInt timeout, Error_Block *eb);
Bool | SemThread_post// Increment the semaphore count(SemThread_Handle handle, Error_Block *eb);
Functions common to all target instances
 | SemThread_handle// Convert this instance structure pointer into an instance handle, SemThread_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, SemThread_Handle_label// The label associated with this instance object, SemThread_Handle_name// The name of this instance object, SemThread_Handle_upCast// unconditionally move one level up the inheritance hierarchy, SemThread_Object_count// The number of statically-created instance objects, SemThread_Object_first// The handle of the first dynamically-created instance object, or NULL, SemThread_Object_get// The handle of the i-th statically-created instance object (array == NULL), SemThread_Object_heap// The heap used to allocate dynamically-created instance objects, SemThread_Object_next// The handle of the next dynamically-created instance object, or NULL, SemThread_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | SemThread_Module_getMask// Returns the diagnostics mask for this module, SemThread_Module_hasMask// Test whether this module has a diagnostics mask, SemThread_Module_heap// The heap from which this module allocates memory, SemThread_Module_id// Get this module's unique id, SemThread_Module_setMask// Set the diagnostics mask for this module, SemThread_Module_startupDone// Test if this module has completed startup
Defines
#define | SemThread_FOREVER// Used as the timeout value to specify wait forever (UInt)~(0)
Typedefs
typedef SemThread_Object * | SemThread_Handle// Client reference to an instance object;
typedef enum | SemThread_Mode// Types of semaphores ...
typedef struct | SemThread_Object// Opaque internal representation of an instance object SemThread_Object;
typedef struct | SemThread_Params// Instance config-params structure ...
typedef enum | SemThread_PendStatus// Error codes returned by Semaphore_pend ...
typedef struct | SemThread_Struct// Opaque client structure large enough to hold an instance object SemThread_Struct;
DETAILS
This module manages semaphores through its proxy ISemThreadSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used.
Here is an example showing how the proxy is bound to an BIOS 6.x specific delegate.
  var SemThread = xdc.useModule('xdc.runtime.knl.SemThread');
  SemThread.Proxy = xdc.useModule('ti.sysbios.xdcruntime.SemThreadSupport');
Typically the package containing the delegates have a Settings module that will bind all xdc.runtime.knl proxies. The following example sets up all the xdc.runtime.knl proxies.
  xdc.useModule("ti.sysbios.xdcruntime.Settings");
const SemThread_FOREVER
index URL

Used as the timeout value to specify wait forever

C synopsis target-domain
#define SemThread_FOREVER (UInt)~(0)
enum SemThread_Mode
index URL

Types of semaphores

C synopsis target-domain
typedef enum SemThread_Mode {
    SemThread_Mode_COUNTING,
    // Counting semaphore
    SemThread_Mode_BINARY
    // Binary Semaphore
} SemThread_Mode;
enum SemThread_PendStatus
index URL

Error codes returned by Semaphore_pend

C synopsis target-domain
typedef enum SemThread_PendStatus {
    SemThread_PendStatus_ERROR,
    SemThread_PendStatus_TIMEOUT,
    SemThread_PendStatus_SUCCESS
} SemThread_PendStatus;
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId SemThread_Module_id();
// Get this module's unique id
Bool SemThread_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SemThread_Module_heap();
// The heap from which this module allocates memory
Bool SemThread_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SemThread_Module_getMask();
// Returns the diagnostics mask for this module
Void SemThread_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct SemThread_Object SemThread_Object;
// Opaque internal representation of an instance object
typedef SemThread_Object *SemThread_Handle;
// Client reference to an instance object
typedef struct SemThread_Struct SemThread_Struct;
// Opaque client structure large enough to hold an instance object
SemThread_Handle SemThread_handle(SemThread_Struct *structP);
// Convert this instance structure pointer into an instance handle
SemThread_Struct *SemThread_struct(SemThread_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
index URL

C synopsis target-domain
typedef struct SemThread_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
     ISemaphore_Mode mode;
    // Semaphore mode. Default is COUNTING
} SemThread_Params;
Void SemThread_Params_init(SemThread_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config SemThread_Params.mode // instance
index URL

Semaphore mode. Default is COUNTING

C synopsis target-domain
struct SemThread_Params {
     ...
     ISemaphore_Mode mode;
DETAILS
When mode is BINARY , the semaphore has only two states, available and unavailable. When mode is COUNTING, the semaphore keeps track of number of times a semaphore is posted.
Runtime Instance Creation
index URL

C synopsis target-domain
SemThread_Handle SemThread_create(Int count, const SemThread_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void SemThread_construct(SemThread_Struct *structP, Int count, const SemThread_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
count — initial semaphore count
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new SemThread object which is initialized to count.
Instance Deletion
index URL

C synopsis target-domain
Void SemThread_delete(SemThread_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void SemThread_destruct(SemThread_Struct *structP);
// Finalize the instance object inside the provided structure
SemThread_pend() // instance
index URL

Wait for the semaphore to become available

C synopsis target-domain
Int SemThread_pend(SemThread_Handle handle, UInt timeout, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created SemThread instance object
timeout — timeout in microseconds
eb — error block
DETAILS
  • PendStatus_ERROR if an error occured.
  • PendStatus_TIMEOUT denotes timeout.
  • PendStatus_SUCCESS semaphore was decremented. details.
RETURNS
refer to description above
SemThread_post() // instance
index URL

Increment the semaphore count

C synopsis target-domain
Bool SemThread_post(SemThread_Handle handle, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created SemThread instance object
eb — error block
RETURNS
true for success, false for error in error block
Instance Convertors
index URL

C synopsis target-domain
ISemaphore_Handle SemThread_Handle_upCast(SemThread_Handle handle);
// unconditionally move one level up the inheritance hierarchy
SemThread_Handle SemThread_Handle_downCast(ISemaphore_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
index URL

C synopsis target-domain
Int SemThread_Object_count();
// The number of statically-created instance objects
SemThread_Handle SemThread_Object_get(SemThread_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
SemThread_Handle SemThread_Object_first();
// The handle of the first dynamically-created instance object, or NULL
SemThread_Handle SemThread_Object_next(SemThread_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle SemThread_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *SemThread_Handle_label(SemThread_Handle handle, Types_Label *buf);
// The label associated with this instance object
String SemThread_Handle_name(SemThread_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/SemThread.xdc
var SemThread = xdc.useModule('xdc.runtime.knl.SemThread');
local proxy modules
     SemThread.Proxy// Proxy that needs to be bound to an OS specific delegate = ISemThreadSupport.Module null
         SemThread.Proxy.delegate$ = ISemThreadSupport.Module null
         SemThread.Proxy.abstractInstances$ = false
module-wide constants & types
    const SemThread.FOREVER// Used as the timeout value to specify wait forever = ~(0);
    values of type SemThread.Mode// Types of semaphores
        const SemThread.Mode_COUNTING// Counting semaphore;
        const SemThread.Mode_BINARY// Binary Semaphore;
    values of type SemThread.PendStatus// Error codes returned by Semaphore_pend
        const SemThread.PendStatus_ERROR;
        const SemThread.PendStatus_TIMEOUT;
        const SemThread.PendStatus_SUCCESS;
module-wide config parameters
     SemThread.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new SemThread.Params// Instance config-params object;
        params.mode// Semaphore mode. Default is COUNTING = ISemaphore.Mode ISemaphore.Mode_COUNTING;
per-instance creation
    var inst = SemThread.create// Create an instance-object(Int count, params);
proxy SemThread.Proxy
index URL

Proxy that needs to be bound to an OS specific delegate

Configuration settings
SemThread.Proxy = ISemThreadSupport.Module null
// some delegate module inheriting the ISemThreadSupport interface
    SemThread.Proxy.delegate$ = ISemThreadSupport.Module null
    // explicit access to the currently bound delegate module
    SemThread.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
const SemThread.FOREVER
index URL

Used as the timeout value to specify wait forever

Configuration settings
const SemThread.FOREVER = ~(0);
C SYNOPSIS
SemThread_FOREVER
enum SemThread.Mode
index URL

Types of semaphores

Configuration settings
values of type SemThread.Mode
    const SemThread.Mode_COUNTING;
    // Counting semaphore
    const SemThread.Mode_BINARY;
    // Binary Semaphore
C SYNOPSIS
SemThread_Mode
enum SemThread.PendStatus
index URL

Error codes returned by Semaphore_pend

Configuration settings
values of type SemThread.PendStatus
    const SemThread.PendStatus_ERROR;
    const SemThread.PendStatus_TIMEOUT;
    const SemThread.PendStatus_SUCCESS;
C SYNOPSIS
SemThread_PendStatus
metaonly config SemThread.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
SemThread.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
index URL

Configuration settings
var params = new SemThread.Params;
// Instance config-params object
    params.mode = ISemaphore.Mode ISemaphore.Mode_COUNTING;
    // Semaphore mode. Default is COUNTING
config SemThread.Params.mode // instance
index URL

Semaphore mode. Default is COUNTING

Configuration settings
var params = new SemThread.Params;
...
params.mode = ISemaphore.Mode ISemaphore.Mode_COUNTING;
DETAILS
When mode is BINARY , the semaphore has only two states, available and unavailable. When mode is COUNTING, the semaphore keeps track of number of times a semaphore is posted.
C SYNOPSIS
SemThread_Params.mode
Static Instance Creation
index URL

Configuration settings
var params = new SemThread.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SemThread.create(Int count, params);
// Create an instance-object
ARGUMENTS
count — initial semaphore count
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function creates a new SemThread object which is initialized to count.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.Sync
index URL

Provides synchronization APIs when an ISync.Handle is available

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
The application must first obtain an ISync.Handle. It can get such a handle by directly calling SyncGeneric.create or SyncSemThread.create. Then the application can use the generic APIs provided by this module.
C synopsis target-domain sourced in xdc/runtime/knl/Sync.xdc
#include <xdc/runtime/knl/Sync.h>
Functions
Bool | Sync_query// Query for a particular quality(ISync_Handle sync, Int qual);
Void | Sync_signal// Called at completion of an activity(ISync_Handle sync);
Int | Sync_wait// Called to wait/poll for completion of an activity(ISync_Handle sync, UInt timeout, Error_Block *eb);
Functions common to all target modules
 | Sync_Module_getMask// Returns the diagnostics mask for this module, Sync_Module_hasMask// Test whether this module has a diagnostics mask, Sync_Module_heap// The heap from which this module allocates memory, Sync_Module_id// Get this module's unique id, Sync_Module_setMask// Set the diagnostics mask for this module, Sync_Module_startupDone// Test if this module has completed startup
Defines
#define | Sync_NO_WAIT// Used to specify no waiting (UInt)ISync.NO_WAIT
#define | Sync_WAIT_FOREVER// Used to wait forever (UInt)ISync.WAIT_FOREVER
Typedefs
typedef enum | Sync_WaitStatus// Error codes returned by Sync_wait ...
const Sync_NO_WAIT
index URL

Used to specify no waiting

C synopsis target-domain
#define Sync_NO_WAIT (UInt)ISync.NO_WAIT
const Sync_WAIT_FOREVER
index URL

Used to wait forever

C synopsis target-domain
#define Sync_WAIT_FOREVER (UInt)ISync.WAIT_FOREVER
enum Sync_WaitStatus
index URL

Error codes returned by Sync_wait

C synopsis target-domain
typedef enum Sync_WaitStatus {
    Sync_WaitStatus_ERROR,
    Sync_WaitStatus_TIMEOUT,
    Sync_WaitStatus_SUCCESS
} Sync_WaitStatus;
Sync_query() // module-wide
index URL

Query for a particular quality

C synopsis target-domain
Bool Sync_query(ISync_Handle sync, Int qual);
ARGUMENTS
sync — sync handle
qual — quality
DETAILS
FALSE is returned if quality not supported.
RETURNS
TRUE or FALSE
Sync_signal() // module-wide
index URL

Called at completion of an activity

C synopsis target-domain
Void Sync_signal(ISync_Handle sync);
ARGUMENTS
sync — sync handle
DETAILS
This function is non-blocking. It is also required that the underlying sync be binary in nature.
Sync_wait() // module-wide
index URL

Called to wait/poll for completion of an activity

C synopsis target-domain
Int Sync_wait(ISync_Handle sync, UInt timeout, Error_Block *eb);
ARGUMENTS
sync — sync handle
timeout — timeout in microseconds
DETAILS
This function can block and typically waits for a semaphore to become available.
Non-blocking implementations should return WaitStatus_TIMEOUT.
RETURNS
  • WaitStatus_ERROR if an error occured.
  • WaitStatus_TIMEOUT denotes timeout.
  • WaitStatus_SUCCESS semaphore was decremented.
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Sync_Module_id();
// Get this module's unique id
Bool Sync_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Sync_Module_heap();
// The heap from which this module allocates memory
Bool Sync_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Sync_Module_getMask();
// Returns the diagnostics mask for this module
Void Sync_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/runtime/knl/Sync.xdc
var Sync = xdc.useModule('xdc.runtime.knl.Sync');
local proxy modules
     Sync.Proxy// Platform-specific implementation = ISync.Module null
         Sync.Proxy.delegate$ = ISync.Module null
         Sync.Proxy.abstractInstances$ = false
module-wide constants & types
    const Sync.NO_WAIT// Used to specify no waiting = ISync.NO_WAIT;
    const Sync.WAIT_FOREVER// Used to wait forever = ISync.WAIT_FOREVER;
    values of type Sync.WaitStatus// Error codes returned by Sync_wait
        const Sync.WaitStatus_ERROR;
        const Sync.WaitStatus_TIMEOUT;
        const Sync.WaitStatus_SUCCESS;
module-wide config parameters
     Sync.common$// Common module configuration parameters = Types.Common$ undefined;
proxy Sync.Proxy
index URL

Platform-specific implementation

Configuration settings
Sync.Proxy = ISync.Module null
// some delegate module inheriting the ISync interface
    Sync.Proxy.delegate$ = ISync.Module null
    // explicit access to the currently bound delegate module
    Sync.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
DETAILS
If ALL ISync.Handles were created using the same module (e.g SyncSemProcess), then setting Proxy to SyncSemProcess and Sync.Proxy.abstractInstances$ to false will improve the performance of the Sync APIs.
const Sync.NO_WAIT
index URL

Used to specify no waiting

Configuration settings
const Sync.NO_WAIT = ISync.NO_WAIT;
C SYNOPSIS
Sync_NO_WAIT
const Sync.WAIT_FOREVER
index URL

Used to wait forever

Configuration settings
const Sync.WAIT_FOREVER = ISync.WAIT_FOREVER;
C SYNOPSIS
Sync_WAIT_FOREVER
enum Sync.WaitStatus
index URL

Error codes returned by Sync_wait

Configuration settings
values of type Sync.WaitStatus
    const Sync.WaitStatus_ERROR;
    const Sync.WaitStatus_TIMEOUT;
    const Sync.WaitStatus_SUCCESS;
C SYNOPSIS
Sync_WaitStatus
metaonly config Sync.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Sync.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:56 GMT


module xdc.runtime.knl.SyncGeneric
index URL

Generic ISync implementation

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module allows users to plug in their own functions for signal, wait and query.
C synopsis target-domain sourced in xdc/runtime/knl/SyncGeneric.xdc
#include <xdc/runtime/knl/SyncGeneric.h>
Functions
Void | SyncGeneric_construct// Initialize a new instance object inside the provided structure(SyncGeneric_Struct *structP, const SyncGeneric_Params *params);
SyncGeneric_Handle | SyncGeneric_create// Allocate and initialize a new instance object and return its handle(const SyncGeneric_Params *params, Error_Block *eb);
Void | SyncGeneric_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(SyncGeneric_Handle *handleP);
Void | SyncGeneric_destruct// Finalize the instance object inside the provided structure(SyncGeneric_Struct *structP);
Void | SyncGeneric_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(SyncGeneric_Params *params);
Functions common to all ISync modules
Bool | SyncGeneric_query// Query for a particular quality(SyncGeneric_Handle handle, Int qual);
Void | SyncGeneric_signal// Called at completion of an activity(SyncGeneric_Handle handle);
Int | SyncGeneric_wait// Called to wait/poll for completion of an activity(SyncGeneric_Handle handle, UInt timeout, Error_Block *eb);
Functions common to all target instances
 | SyncGeneric_handle// Convert this instance structure pointer into an instance handle, SyncGeneric_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, SyncGeneric_Handle_label// The label associated with this instance object, SyncGeneric_Handle_name// The name of this instance object, SyncGeneric_Handle_upCast// unconditionally move one level up the inheritance hierarchy, SyncGeneric_Object_count// The number of statically-created instance objects, SyncGeneric_Object_first// The handle of the first dynamically-created instance object, or NULL, SyncGeneric_Object_get// The handle of the i-th statically-created instance object (array == NULL), SyncGeneric_Object_heap// The heap used to allocate dynamically-created instance objects, SyncGeneric_Object_next// The handle of the next dynamically-created instance object, or NULL, SyncGeneric_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | SyncGeneric_Module_getMask// Returns the diagnostics mask for this module, SyncGeneric_Module_hasMask// Test whether this module has a diagnostics mask, SyncGeneric_Module_heap// The heap from which this module allocates memory, SyncGeneric_Module_id// Get this module's unique id, SyncGeneric_Module_setMask// Set the diagnostics mask for this module, SyncGeneric_Module_startupDone// Test if this module has completed startup
Defines
#define | SyncGeneric_NO_WAIT// Used to specify no waiting (UInt)0
#define | SyncGeneric_Q_BLOCKING// Blocking quality (Int)1
#define | SyncGeneric_WAIT_FOREVER// Used to wait forever (UInt)~(0)
Typedefs
typedef SyncGeneric_Object * | SyncGeneric_Handle// Client reference to an instance object;
typedef struct | SyncGeneric_Object// Opaque internal representation of an instance object SyncGeneric_Object;
typedef struct | SyncGeneric_Params// Instance config-params structure ...
typedef Bool | (*SyncGeneric_QueryFunc// typedef for user specified wait function)(Int);
typedef Void | (*SyncGeneric_SignalFunc// typedef for user specified signal function)(UArg);
typedef struct | SyncGeneric_Struct// Opaque client structure large enough to hold an instance object SyncGeneric_Struct;
typedef Bool | (*SyncGeneric_WaitFunc// typedef for user specified wait function)(UArg,UInt);
typedef enum | SyncGeneric_WaitStatus// Error codes returned by ISync_wait ...
const SyncGeneric_NO_WAIT
index URL

Used to specify no waiting

C synopsis target-domain
#define SyncGeneric_NO_WAIT (UInt)0
const SyncGeneric_Q_BLOCKING
index URL

Blocking quality

C synopsis target-domain
#define SyncGeneric_Q_BLOCKING (Int)1
DETAILS
Implementations with this "quality" may cause the calling thread to block;
const SyncGeneric_WAIT_FOREVER
index URL

Used to wait forever

C synopsis target-domain
#define SyncGeneric_WAIT_FOREVER (UInt)~(0)
enum SyncGeneric_WaitStatus
index URL

Error codes returned by ISync_wait

C synopsis target-domain
typedef enum SyncGeneric_WaitStatus {
    SyncGeneric_WaitStatus_ERROR,
    SyncGeneric_WaitStatus_TIMEOUT,
    SyncGeneric_WaitStatus_SUCCESS
} SyncGeneric_WaitStatus;
typedef SyncGeneric_QueryFunc
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typedef for user specified wait function

C synopsis target-domain
typedef Bool (*SyncGeneric_QueryFunc)(Int);
typedef SyncGeneric_SignalFunc
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typedef for user specified signal function

C synopsis target-domain
typedef Void (*SyncGeneric_SignalFunc)(UArg);
typedef SyncGeneric_WaitFunc
index URL

typedef for user specified wait function

C synopsis target-domain
typedef Bool (*SyncGeneric_WaitFunc)(UArg,UInt);
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId SyncGeneric_Module_id();
// Get this module's unique id
Bool SyncGeneric_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SyncGeneric_Module_heap();
// The heap from which this module allocates memory
Bool SyncGeneric_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SyncGeneric_Module_getMask();
// Returns the diagnostics mask for this module
Void SyncGeneric_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
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C synopsis target-domain
typedef struct SyncGeneric_Object SyncGeneric_Object;
// Opaque internal representation of an instance object
typedef SyncGeneric_Object *SyncGeneric_Handle;
// Client reference to an instance object
typedef struct SyncGeneric_Struct SyncGeneric_Struct;
// Opaque client structure large enough to hold an instance object
SyncGeneric_Handle SyncGeneric_handle(SyncGeneric_Struct *structP);
// Convert this instance structure pointer into an instance handle
SyncGeneric_Struct *SyncGeneric_struct(SyncGeneric_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct SyncGeneric_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
    UArg signalArg;
    // user signal function arg
     SyncGeneric_QueryFunc userQuery;
    // user query function
     SyncGeneric_SignalFunc userSignal;
    // user signal function
     SyncGeneric_WaitFunc userWait;
    // user wait function
    UArg waitArg;
    // user wait function arg
} SyncGeneric_Params;
Void SyncGeneric_Params_init(SyncGeneric_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config SyncGeneric_Params.signalArg // instance
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user signal function arg

C synopsis target-domain
struct SyncGeneric_Params {
     ...
    UArg signalArg;
config SyncGeneric_Params.userQuery // instance
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user query function

C synopsis target-domain
struct SyncGeneric_Params {
     ...
     SyncGeneric_QueryFunc userQuery;
config SyncGeneric_Params.userSignal // instance
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user signal function

C synopsis target-domain
struct SyncGeneric_Params {
     ...
     SyncGeneric_SignalFunc userSignal;
config SyncGeneric_Params.userWait // instance
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user wait function

C synopsis target-domain
struct SyncGeneric_Params {
     ...
     SyncGeneric_WaitFunc userWait;
config SyncGeneric_Params.waitArg // instance
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user wait function arg

C synopsis target-domain
struct SyncGeneric_Params {
     ...
    UArg waitArg;
Runtime Instance Creation
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C synopsis target-domain
SyncGeneric_Handle SyncGeneric_create(const SyncGeneric_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void SyncGeneric_construct(SyncGeneric_Struct *structP, const SyncGeneric_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
Instance Deletion
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C synopsis target-domain
Void SyncGeneric_delete(SyncGeneric_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void SyncGeneric_destruct(SyncGeneric_Struct *structP);
// Finalize the instance object inside the provided structure
SyncGeneric_query() // instance
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Query for a particular quality

C synopsis target-domain
Bool SyncGeneric_query(SyncGeneric_Handle handle, Int qual);
ARGUMENTS
handle — handle of a previously-created SyncGeneric instance object
qual — quality
RETURNS
TRUE or FALSE.
DETAILS
FALSE is returned if quality not supported.
SyncGeneric_signal() // instance
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Called at completion of an activity

C synopsis target-domain
Void SyncGeneric_signal(SyncGeneric_Handle handle);
ARGUMENTS
handle — handle of a previously-created SyncGeneric instance object
DETAILS
This function is non-blocking. It is also required that the underlying sync be binary in nature.
This function does not take an Error.Block intentionally because it can be called from ISR context.
SyncGeneric_wait() // instance
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Called to wait/poll for completion of an activity

C synopsis target-domain
Int SyncGeneric_wait(SyncGeneric_Handle handle, UInt timeout, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created SyncGeneric instance object
timeout — Timeout in microseconds
eb — Hist Pointer to Error.Block
RETURNS
Refer to description above
DETAILS
This function can block. Non-blocking implementations should return WaitStatus_TIMEOUT to indicate a timeout.
  • WaitStatus_ERROR if an error occured.
  • WaitStatus_TIMEOUT denotes timeout.
  • WaitStatus_SUCCESS semaphore was decremented.
Instance Convertors
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C synopsis target-domain
ISync_Handle SyncGeneric_Handle_upCast(SyncGeneric_Handle handle);
// unconditionally move one level up the inheritance hierarchy
SyncGeneric_Handle SyncGeneric_Handle_downCast(ISync_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int SyncGeneric_Object_count();
// The number of statically-created instance objects
SyncGeneric_Handle SyncGeneric_Object_get(SyncGeneric_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
SyncGeneric_Handle SyncGeneric_Object_first();
// The handle of the first dynamically-created instance object, or NULL
SyncGeneric_Handle SyncGeneric_Object_next(SyncGeneric_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle SyncGeneric_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *SyncGeneric_Handle_label(SyncGeneric_Handle handle, Types_Label *buf);
// The label associated with this instance object
String SyncGeneric_Handle_name(SyncGeneric_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/SyncGeneric.xdc
var SyncGeneric = xdc.useModule('xdc.runtime.knl.SyncGeneric');
module-wide constants & types
    const SyncGeneric.NO_WAIT// Used to specify no waiting = 0;
    const SyncGeneric.Q_BLOCKING// Blocking quality = 1;
    const SyncGeneric.WAIT_FOREVER// Used to wait forever = ~(0);
    values of type SyncGeneric.WaitStatus// Error codes returned by ISync_wait
        const SyncGeneric.WaitStatus_ERROR;
        const SyncGeneric.WaitStatus_TIMEOUT;
        const SyncGeneric.WaitStatus_SUCCESS;
module-wide config parameters
     SyncGeneric.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new SyncGeneric.Params// Instance config-params object;
        params.signalArg// user signal function arg = UArg null;
        params.userQuery// user query function = Bool(*)(Int) null;
        params.userSignal// user signal function = Void(*)(UArg) null;
        params.userWait// user wait function = Bool(*)(UArg,UInt) null;
        params.waitArg// user wait function arg = UArg null;
per-instance creation
    var inst = SyncGeneric.create// Create an instance-object(params);
const SyncGeneric.NO_WAIT
index URL

Used to specify no waiting

Configuration settings
const SyncGeneric.NO_WAIT = 0;
C SYNOPSIS
SyncGeneric_NO_WAIT
const SyncGeneric.Q_BLOCKING
index URL

Blocking quality

Configuration settings
const SyncGeneric.Q_BLOCKING = 1;
DETAILS
Implementations with this "quality" may cause the calling thread to block;
C SYNOPSIS
SyncGeneric_Q_BLOCKING
const SyncGeneric.WAIT_FOREVER
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Used to wait forever

Configuration settings
const SyncGeneric.WAIT_FOREVER = ~(0);
C SYNOPSIS
SyncGeneric_WAIT_FOREVER
enum SyncGeneric.WaitStatus
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Error codes returned by ISync_wait

Configuration settings
values of type SyncGeneric.WaitStatus
    const SyncGeneric.WaitStatus_ERROR;
    const SyncGeneric.WaitStatus_TIMEOUT;
    const SyncGeneric.WaitStatus_SUCCESS;
C SYNOPSIS
SyncGeneric_WaitStatus
metaonly config SyncGeneric.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
SyncGeneric.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
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Configuration settings
var params = new SyncGeneric.Params;
// Instance config-params object
    params.signalArg = UArg null;
    // user signal function arg
    params.userQuery = Bool(*)(Int) null;
    // user query function
    params.userSignal = Void(*)(UArg) null;
    // user signal function
    params.userWait = Bool(*)(UArg,UInt) null;
    // user wait function
    params.waitArg = UArg null;
    // user wait function arg
config SyncGeneric.Params.signalArg // instance
index URL

user signal function arg

Configuration settings
var params = new SyncGeneric.Params;
...
params.signalArg = UArg null;
C SYNOPSIS
SyncGeneric_Params.signalArg
config SyncGeneric.Params.userQuery // instance
index URL

user query function

Configuration settings
var params = new SyncGeneric.Params;
...
params.userQuery = Bool(*)(Int) null;
C SYNOPSIS
SyncGeneric_Params.userQuery
config SyncGeneric.Params.userSignal // instance
index URL

user signal function

Configuration settings
var params = new SyncGeneric.Params;
...
params.userSignal = Void(*)(UArg) null;
C SYNOPSIS
SyncGeneric_Params.userSignal
config SyncGeneric.Params.userWait // instance
index URL

user wait function

Configuration settings
var params = new SyncGeneric.Params;
...
params.userWait = Bool(*)(UArg,UInt) null;
C SYNOPSIS
SyncGeneric_Params.userWait
config SyncGeneric.Params.waitArg // instance
index URL

user wait function arg

Configuration settings
var params = new SyncGeneric.Params;
...
params.waitArg = UArg null;
C SYNOPSIS
SyncGeneric_Params.waitArg
Static Instance Creation
index URL

Configuration settings
var params = new SyncGeneric.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SyncGeneric.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
generated on Sun, 25 Nov 2018 22:18:57 GMT


module xdc.runtime.knl.SyncNull
index URL

Empty ISync implementation used mainly for testing

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
C synopsis target-domain sourced in xdc/runtime/knl/SyncNull.xdc
#include <xdc/runtime/knl/SyncNull.h>
Functions
Void | SyncNull_construct// Initialize a new instance object inside the provided structure(SyncNull_Struct *structP, const SyncNull_Params *params);
SyncNull_Handle | SyncNull_create// Allocate and initialize a new instance object and return its handle(const SyncNull_Params *params, Error_Block *eb);
Void | SyncNull_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(SyncNull_Handle *handleP);
Void | SyncNull_destruct// Finalize the instance object inside the provided structure(SyncNull_Struct *structP);
Void | SyncNull_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(SyncNull_Params *params);
Functions common to all ISync modules
Bool | SyncNull_query// Query for a particular quality(SyncNull_Handle handle, Int qual);
Void | SyncNull_signal// Called at completion of an activity(SyncNull_Handle handle);
Int | SyncNull_wait// Called to wait/poll for completion of an activity(SyncNull_Handle handle, UInt timeout, Error_Block *eb);
Functions common to all target instances
 | SyncNull_handle// Convert this instance structure pointer into an instance handle, SyncNull_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, SyncNull_Handle_label// The label associated with this instance object, SyncNull_Handle_name// The name of this instance object, SyncNull_Handle_upCast// unconditionally move one level up the inheritance hierarchy, SyncNull_Object_count// The number of statically-created instance objects, SyncNull_Object_first// The handle of the first dynamically-created instance object, or NULL, SyncNull_Object_get// The handle of the i-th statically-created instance object (array == NULL), SyncNull_Object_heap// The heap used to allocate dynamically-created instance objects, SyncNull_Object_next// The handle of the next dynamically-created instance object, or NULL, SyncNull_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | SyncNull_Module_getMask// Returns the diagnostics mask for this module, SyncNull_Module_hasMask// Test whether this module has a diagnostics mask, SyncNull_Module_heap// The heap from which this module allocates memory, SyncNull_Module_id// Get this module's unique id, SyncNull_Module_setMask// Set the diagnostics mask for this module, SyncNull_Module_startupDone// Test if this module has completed startup
Defines
#define | SyncNull_NO_WAIT// Used to specify no waiting (UInt)0
#define | SyncNull_Q_BLOCKING// Blocking quality (Int)1
#define | SyncNull_WAIT_FOREVER// Used to wait forever (UInt)~(0)
Typedefs
typedef SyncNull_Object * | SyncNull_Handle// Client reference to an instance object;
typedef struct | SyncNull_Object// Opaque internal representation of an instance object SyncNull_Object;
typedef struct | SyncNull_Params// Instance config-params structure ...
typedef struct | SyncNull_Struct// Opaque client structure large enough to hold an instance object SyncNull_Struct;
typedef enum | SyncNull_WaitStatus// Error codes returned by ISync_wait ...
const SyncNull_NO_WAIT
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Used to specify no waiting

C synopsis target-domain
#define SyncNull_NO_WAIT (UInt)0
const SyncNull_Q_BLOCKING
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Blocking quality

C synopsis target-domain
#define SyncNull_Q_BLOCKING (Int)1
DETAILS
Implementations with this "quality" may cause the calling thread to block;
const SyncNull_WAIT_FOREVER
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Used to wait forever

C synopsis target-domain
#define SyncNull_WAIT_FOREVER (UInt)~(0)
enum SyncNull_WaitStatus
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Error codes returned by ISync_wait

C synopsis target-domain
typedef enum SyncNull_WaitStatus {
    SyncNull_WaitStatus_ERROR,
    SyncNull_WaitStatus_TIMEOUT,
    SyncNull_WaitStatus_SUCCESS
} SyncNull_WaitStatus;
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId SyncNull_Module_id();
// Get this module's unique id
Bool SyncNull_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SyncNull_Module_heap();
// The heap from which this module allocates memory
Bool SyncNull_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SyncNull_Module_getMask();
// Returns the diagnostics mask for this module
Void SyncNull_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct SyncNull_Object SyncNull_Object;
// Opaque internal representation of an instance object
typedef SyncNull_Object *SyncNull_Handle;
// Client reference to an instance object
typedef struct SyncNull_Struct SyncNull_Struct;
// Opaque client structure large enough to hold an instance object
SyncNull_Handle SyncNull_handle(SyncNull_Struct *structP);
// Convert this instance structure pointer into an instance handle
SyncNull_Struct *SyncNull_struct(SyncNull_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct SyncNull_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
} SyncNull_Params;
Void SyncNull_Params_init(SyncNull_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
Runtime Instance Creation
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C synopsis target-domain
SyncNull_Handle SyncNull_create(const SyncNull_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void SyncNull_construct(SyncNull_Struct *structP, const SyncNull_Params *params);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
Instance Deletion
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C synopsis target-domain
Void SyncNull_delete(SyncNull_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void SyncNull_destruct(SyncNull_Struct *structP);
// Finalize the instance object inside the provided structure
SyncNull_query() // instance
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Query for a particular quality

C synopsis target-domain
Bool SyncNull_query(SyncNull_Handle handle, Int qual);
ARGUMENTS
handle — handle of a previously-created SyncNull instance object
qual — quality
RETURNS
TRUE or FALSE.
DETAILS
FALSE is returned if quality not supported.
SyncNull_signal() // instance
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Called at completion of an activity

C synopsis target-domain
Void SyncNull_signal(SyncNull_Handle handle);
ARGUMENTS
handle — handle of a previously-created SyncNull instance object
DETAILS
This function is non-blocking. It is also required that the underlying sync be binary in nature.
This function does not take an Error.Block intentionally because it can be called from ISR context.
SyncNull_wait() // instance
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Called to wait/poll for completion of an activity

C synopsis target-domain
Int SyncNull_wait(SyncNull_Handle handle, UInt timeout, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created SyncNull instance object
timeout — Timeout in microseconds
eb — Hist Pointer to Error.Block
RETURNS
Refer to description above
DETAILS
This function can block. Non-blocking implementations should return WaitStatus_TIMEOUT to indicate a timeout.
  • WaitStatus_ERROR if an error occured.
  • WaitStatus_TIMEOUT denotes timeout.
  • WaitStatus_SUCCESS semaphore was decremented.
Instance Convertors
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C synopsis target-domain
ISync_Handle SyncNull_Handle_upCast(SyncNull_Handle handle);
// unconditionally move one level up the inheritance hierarchy
SyncNull_Handle SyncNull_Handle_downCast(ISync_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int SyncNull_Object_count();
// The number of statically-created instance objects
SyncNull_Handle SyncNull_Object_get(SyncNull_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
SyncNull_Handle SyncNull_Object_first();
// The handle of the first dynamically-created instance object, or NULL
SyncNull_Handle SyncNull_Object_next(SyncNull_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle SyncNull_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *SyncNull_Handle_label(SyncNull_Handle handle, Types_Label *buf);
// The label associated with this instance object
String SyncNull_Handle_name(SyncNull_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/SyncNull.xdc
var SyncNull = xdc.useModule('xdc.runtime.knl.SyncNull');
module-wide constants & types
    const SyncNull.NO_WAIT// Used to specify no waiting = 0;
    const SyncNull.Q_BLOCKING// Blocking quality = 1;
    const SyncNull.WAIT_FOREVER// Used to wait forever = ~(0);
    values of type SyncNull.WaitStatus// Error codes returned by ISync_wait
        const SyncNull.WaitStatus_ERROR;
        const SyncNull.WaitStatus_TIMEOUT;
        const SyncNull.WaitStatus_SUCCESS;
module-wide config parameters
     SyncNull.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new SyncNull.Params// Instance config-params object;
per-instance creation
    var inst = SyncNull.create// Create an instance-object(params);
const SyncNull.NO_WAIT
index URL

Used to specify no waiting

Configuration settings
const SyncNull.NO_WAIT = 0;
C SYNOPSIS
SyncNull_NO_WAIT
const SyncNull.Q_BLOCKING
index URL

Blocking quality

Configuration settings
const SyncNull.Q_BLOCKING = 1;
DETAILS
Implementations with this "quality" may cause the calling thread to block;
C SYNOPSIS
SyncNull_Q_BLOCKING
const SyncNull.WAIT_FOREVER
index URL

Used to wait forever

Configuration settings
const SyncNull.WAIT_FOREVER = ~(0);
C SYNOPSIS
SyncNull_WAIT_FOREVER
enum SyncNull.WaitStatus
index URL

Error codes returned by ISync_wait

Configuration settings
values of type SyncNull.WaitStatus
    const SyncNull.WaitStatus_ERROR;
    const SyncNull.WaitStatus_TIMEOUT;
    const SyncNull.WaitStatus_SUCCESS;
C SYNOPSIS
SyncNull_WaitStatus
metaonly config SyncNull.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
SyncNull.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
index URL

Configuration settings
var params = new SyncNull.Params;
// Instance config-params object
Static Instance Creation
index URL

Configuration settings
var params = new SyncNull.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SyncNull.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
generated on Sun, 25 Nov 2018 22:18:57 GMT


module xdc.runtime.knl.SyncSemThread
index URL

A ISync implementation based on a SemThread. [EXPERIMENTAL]

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module implements the ti.sdo.utils.ISync interface using the xdc.runtime.knl.SemThread module.
C synopsis target-domain sourced in xdc/runtime/knl/SyncSemThread.xdc
#include <xdc/runtime/knl/SyncSemThread.h>
Functions
Void | SyncSemThread_construct// Initialize a new instance object inside the provided structure(SyncSemThread_Struct *structP, const SyncSemThread_Params *params, Error_Block *eb);
SyncSemThread_Handle | SyncSemThread_create// Allocate and initialize a new instance object and return its handle(const SyncSemThread_Params *params, Error_Block *eb);
Void | SyncSemThread_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(SyncSemThread_Handle *handleP);
Void | SyncSemThread_destruct// Finalize the instance object inside the provided structure(SyncSemThread_Struct *structP);
Void | SyncSemThread_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(SyncSemThread_Params *params);
Functions common to all ISync modules
Bool | SyncSemThread_query// Query for a particular quality(SyncSemThread_Handle handle, Int qual);
Void | SyncSemThread_signal// Called at completion of an activity(SyncSemThread_Handle handle);
Int | SyncSemThread_wait// Called to wait/poll for completion of an activity(SyncSemThread_Handle handle, UInt timeout, Error_Block *eb);
Functions common to all target instances
 | SyncSemThread_handle// Convert this instance structure pointer into an instance handle, SyncSemThread_Handle_downCast// conditionally move one level down the inheritance hierarchy; NULL upon failure, SyncSemThread_Handle_label// The label associated with this instance object, SyncSemThread_Handle_name// The name of this instance object, SyncSemThread_Handle_upCast// unconditionally move one level up the inheritance hierarchy, SyncSemThread_Object_count// The number of statically-created instance objects, SyncSemThread_Object_first// The handle of the first dynamically-created instance object, or NULL, SyncSemThread_Object_get// The handle of the i-th statically-created instance object (array == NULL), SyncSemThread_Object_heap// The heap used to allocate dynamically-created instance objects, SyncSemThread_Object_next// The handle of the next dynamically-created instance object, or NULL, SyncSemThread_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | SyncSemThread_Module_getMask// Returns the diagnostics mask for this module, SyncSemThread_Module_hasMask// Test whether this module has a diagnostics mask, SyncSemThread_Module_heap// The heap from which this module allocates memory, SyncSemThread_Module_id// Get this module's unique id, SyncSemThread_Module_setMask// Set the diagnostics mask for this module, SyncSemThread_Module_startupDone// Test if this module has completed startup
Defines
#define | SyncSemThread_NO_WAIT// Used to specify no waiting (UInt)0
#define | SyncSemThread_Q_BLOCKING// Blocking quality (Int)1
#define | SyncSemThread_WAIT_FOREVER// Used to wait forever (UInt)~(0)
Typedefs
typedef SyncSemThread_Object * | SyncSemThread_Handle// Client reference to an instance object;
typedef struct | SyncSemThread_Object// Opaque internal representation of an instance object SyncSemThread_Object;
typedef struct | SyncSemThread_Params// Instance config-params structure ...
typedef struct | SyncSemThread_Struct// Opaque client structure large enough to hold an instance object SyncSemThread_Struct;
typedef enum | SyncSemThread_WaitStatus// Error codes returned by ISync_wait ...
const SyncSemThread_NO_WAIT
index URL

Used to specify no waiting

C synopsis target-domain
#define SyncSemThread_NO_WAIT (UInt)0
const SyncSemThread_Q_BLOCKING
index URL

Blocking quality

C synopsis target-domain
#define SyncSemThread_Q_BLOCKING (Int)1
DETAILS
Implementations with this "quality" may cause the calling thread to block;
const SyncSemThread_WAIT_FOREVER
index URL

Used to wait forever

C synopsis target-domain
#define SyncSemThread_WAIT_FOREVER (UInt)~(0)
enum SyncSemThread_WaitStatus
index URL

Error codes returned by ISync_wait

C synopsis target-domain
typedef enum SyncSemThread_WaitStatus {
    SyncSemThread_WaitStatus_ERROR,
    SyncSemThread_WaitStatus_TIMEOUT,
    SyncSemThread_WaitStatus_SUCCESS
} SyncSemThread_WaitStatus;
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId SyncSemThread_Module_id();
// Get this module's unique id
Bool SyncSemThread_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle SyncSemThread_Module_heap();
// The heap from which this module allocates memory
Bool SyncSemThread_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 SyncSemThread_Module_getMask();
// Returns the diagnostics mask for this module
Void SyncSemThread_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
index URL

C synopsis target-domain
typedef struct SyncSemThread_Object SyncSemThread_Object;
// Opaque internal representation of an instance object
typedef SyncSemThread_Object *SyncSemThread_Handle;
// Client reference to an instance object
typedef struct SyncSemThread_Struct SyncSemThread_Struct;
// Opaque client structure large enough to hold an instance object
SyncSemThread_Handle SyncSemThread_handle(SyncSemThread_Struct *structP);
// Convert this instance structure pointer into an instance handle
SyncSemThread_Struct *SyncSemThread_struct(SyncSemThread_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct SyncSemThread_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
} SyncSemThread_Params;
Void SyncSemThread_Params_init(SyncSemThread_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
Runtime Instance Creation
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C synopsis target-domain
SyncSemThread_Handle SyncSemThread_create(const SyncSemThread_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void SyncSemThread_construct(SyncSemThread_Struct *structP, const SyncSemThread_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
Instance Deletion
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C synopsis target-domain
Void SyncSemThread_delete(SyncSemThread_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void SyncSemThread_destruct(SyncSemThread_Struct *structP);
// Finalize the instance object inside the provided structure
SyncSemThread_query() // instance
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Query for a particular quality

C synopsis target-domain
Bool SyncSemThread_query(SyncSemThread_Handle handle, Int qual);
ARGUMENTS
handle — handle of a previously-created SyncSemThread instance object
qual — quality
RETURNS
TRUE or FALSE.
DETAILS
FALSE is returned if quality not supported.
SyncSemThread_signal() // instance
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Called at completion of an activity

C synopsis target-domain
Void SyncSemThread_signal(SyncSemThread_Handle handle);
ARGUMENTS
handle — handle of a previously-created SyncSemThread instance object
DETAILS
This function is non-blocking. It is also required that the underlying sync be binary in nature.
This function does not take an Error.Block intentionally because it can be called from ISR context.
SyncSemThread_wait() // instance
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Called to wait/poll for completion of an activity

C synopsis target-domain
Int SyncSemThread_wait(SyncSemThread_Handle handle, UInt timeout, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created SyncSemThread instance object
timeout — Timeout in microseconds
eb — Hist Pointer to Error.Block
RETURNS
Refer to description above
DETAILS
This function can block. Non-blocking implementations should return WaitStatus_TIMEOUT to indicate a timeout.
  • WaitStatus_ERROR if an error occured.
  • WaitStatus_TIMEOUT denotes timeout.
  • WaitStatus_SUCCESS semaphore was decremented.
Instance Convertors
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C synopsis target-domain
ISync_Handle SyncSemThread_Handle_upCast(SyncSemThread_Handle handle);
// unconditionally move one level up the inheritance hierarchy
SyncSemThread_Handle SyncSemThread_Handle_downCast(ISync_Handle handle);
// conditionally move one level down the inheritance hierarchy; NULL upon failure
Instance Built-Ins
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C synopsis target-domain
Int SyncSemThread_Object_count();
// The number of statically-created instance objects
SyncSemThread_Handle SyncSemThread_Object_get(SyncSemThread_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
SyncSemThread_Handle SyncSemThread_Object_first();
// The handle of the first dynamically-created instance object, or NULL
SyncSemThread_Handle SyncSemThread_Object_next(SyncSemThread_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle SyncSemThread_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *SyncSemThread_Handle_label(SyncSemThread_Handle handle, Types_Label *buf);
// The label associated with this instance object
String SyncSemThread_Handle_name(SyncSemThread_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/SyncSemThread.xdc
var SyncSemThread = xdc.useModule('xdc.runtime.knl.SyncSemThread');
module-wide constants & types
    const SyncSemThread.NO_WAIT// Used to specify no waiting = 0;
    const SyncSemThread.Q_BLOCKING// Blocking quality = 1;
    const SyncSemThread.WAIT_FOREVER// Used to wait forever = ~(0);
    values of type SyncSemThread.WaitStatus// Error codes returned by ISync_wait
        const SyncSemThread.WaitStatus_ERROR;
        const SyncSemThread.WaitStatus_TIMEOUT;
        const SyncSemThread.WaitStatus_SUCCESS;
module-wide config parameters
     SyncSemThread.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new SyncSemThread.Params// Instance config-params object;
per-instance creation
    var inst = SyncSemThread.create// Create an instance-object(params);
const SyncSemThread.NO_WAIT
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Used to specify no waiting

Configuration settings
const SyncSemThread.NO_WAIT = 0;
C SYNOPSIS
SyncSemThread_NO_WAIT
const SyncSemThread.Q_BLOCKING
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Blocking quality

Configuration settings
const SyncSemThread.Q_BLOCKING = 1;
DETAILS
Implementations with this "quality" may cause the calling thread to block;
C SYNOPSIS
SyncSemThread_Q_BLOCKING
const SyncSemThread.WAIT_FOREVER
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Used to wait forever

Configuration settings
const SyncSemThread.WAIT_FOREVER = ~(0);
C SYNOPSIS
SyncSemThread_WAIT_FOREVER
enum SyncSemThread.WaitStatus
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Error codes returned by ISync_wait

Configuration settings
values of type SyncSemThread.WaitStatus
    const SyncSemThread.WaitStatus_ERROR;
    const SyncSemThread.WaitStatus_TIMEOUT;
    const SyncSemThread.WaitStatus_SUCCESS;
C SYNOPSIS
SyncSemThread_WaitStatus
metaonly config SyncSemThread.common$ // module-wide
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Common module configuration parameters

Configuration settings
SyncSemThread.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
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Configuration settings
var params = new SyncSemThread.Params;
// Instance config-params object
Static Instance Creation
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Configuration settings
var params = new SyncSemThread.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = SyncSemThread.create(params);
// Create an instance-object
ARGUMENTS
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
generated on Sun, 25 Nov 2018 22:18:57 GMT


module xdc.runtime.knl.Thread
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Thread services

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module manages threads through a proxy which inherits from IThreadSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used. [ more ... ]
C synopsis target-domain sourced in xdc/runtime/knl/Thread.xdc
#include <xdc/runtime/knl/Thread.h>
Functions
Int | Thread_compareOsPriorities// Compare two os specific priority values and find out which one represents a higher priority(Int p1, Int p2, Error_Block *eb);
Void | Thread_construct// Initialize a new instance object inside the provided structure(Thread_Struct *structP, Thread_RunFxn fxn, const Thread_Params *params, Error_Block *eb);
Thread_Handle | Thread_create// Allocate and initialize a new instance object and return its handle(Thread_RunFxn fxn, const Thread_Params *params, Error_Block *eb);
Void | Thread_delete// Finalize and free this previously allocated instance object, setting the referenced handle to NULL(Thread_Handle *handleP);
Void | Thread_destruct// Finalize the instance object inside the provided structure(Thread_Struct *structP);
Ptr | Thread_getOsHandle// Get the OS thread handle(Thread_Handle handle);
Int | Thread_getOsPriority// Obtain a thread's OS specific priority(Thread_Handle handle, Error_Block *eb);
Thread_Priority | Thread_getPriority// Obtain a thread's priority(Thread_Handle handle, Error_Block *eb);
Ptr | Thread_getTls// Obtain a thread's local storage(Thread_Handle handle);
Bool | Thread_join// Block calling thread until given thread terminates(Thread_Handle handle, Error_Block *eb);
Void | Thread_Params_init// Initialize this config-params structure with supplier-specified defaults before instance creation(Thread_Params *params);
Thread_Handle | Thread_self// Return the currently executing thread's handle(Error_Block *eb);
Bool | Thread_setOsPriority// Set a thread's priority(Thread_Handle handle, Int newPri, Error_Block *eb);
Bool | Thread_setPriority// Set a thread's priority(Thread_Handle handle, Thread_Priority newPri, Error_Block *eb);
Void | Thread_setTls// Change a thread's local storage(Thread_Handle handle, Ptr tls);
Bool | Thread_sleep// Sleep for given number of microseconds(UInt timeout, Error_Block *eb);
Bool | Thread_start// Start threads running(Error_Block *eb);
Bool | Thread_stat// Get thread statistics(Thread_Handle handle, Thread_Stat *buf, Error_Block *eb);
Bool | Thread_yield// Yield the currently scheduled thread(Error_Block *eb);
Functions common to all target instances
 | Thread_handle// Convert this instance structure pointer into an instance handle, Thread_Handle_label// The label associated with this instance object, Thread_Handle_name// The name of this instance object, Thread_Object_count// The number of statically-created instance objects, Thread_Object_first// The handle of the first dynamically-created instance object, or NULL, Thread_Object_get// The handle of the i-th statically-created instance object (array == NULL), Thread_Object_heap// The heap used to allocate dynamically-created instance objects, Thread_Object_next// The handle of the next dynamically-created instance object, or NULL, Thread_struct// Convert this instance handle into an instance structure pointer
Functions common to all target modules
 | Thread_Module_getMask// Returns the diagnostics mask for this module, Thread_Module_hasMask// Test whether this module has a diagnostics mask, Thread_Module_heap// The heap from which this module allocates memory, Thread_Module_id// Get this module's unique id, Thread_Module_setMask// Set the diagnostics mask for this module, Thread_Module_startupDone// Test if this module has completed startup
Defines
#define | Thread_GETPRI_FAILED// Status returned by getPri when an error occurs (Int)-2
#define | Thread_INVALID_OS_PRIORITY// Invalid OS priority value (Int)0
Typedefs
typedef enum | Thread_CompStatus// Status returned by compareOsPriorities when an error occurs ...
typedef Thread_Object * | Thread_Handle// Client reference to an instance object;
typedef struct | Thread_Object// Opaque internal representation of an instance object Thread_Object;
typedef struct | Thread_Params// Instance config-params structure ...
typedef enum | Thread_Priority// Thread priorities which are mapped to OS specific value by Proxy ...
typedef Void | (*Thread_RunFxn// Typedef for thread function)(IArg);
typedef struct | Thread_Stat// Struct to hold thread statistics from stat ...
typedef struct | Thread_Struct// Opaque client structure large enough to hold an instance object Thread_Struct;
Constants
extern const Assert_Id | Thread_A_zeroTimeout// Assert when timeout passed to sleep is zero;
extern const SizeT | Thread_defaultStackSize// Default thread stack size;
DETAILS
This module manages threads through a proxy which inherits from IThreadSupport interface. It has a module wide config parameter Proxy which needs to be bound to an OS specific delegate before this module can be used.
Here is an example showing how the proxy is bound to a BIOS 6.x specific delegate.
  var Thread = xdc.useModule('xdc.runtime.knl.Thread');
  Thread.Proxy = xdc.useModule('ti.sysbios.xdcruntime.ThreadSupport');
Typically a package containing the delegates has a Settings module that will bind all xdc.runtime.knl proxies. The following example sets up all the xdc.runtime.knl proxies.
  xdc.useModule('ti.sysbios.xdcruntime.Settings');
const Thread_GETPRI_FAILED
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Status returned by getPri when an error occurs

C synopsis target-domain
#define Thread_GETPRI_FAILED (Int)-2
const Thread_INVALID_OS_PRIORITY
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Invalid OS priority value

C synopsis target-domain
#define Thread_INVALID_OS_PRIORITY (Int)0
enum Thread_CompStatus
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Status returned by compareOsPriorities when an error occurs

C synopsis target-domain
typedef enum Thread_CompStatus {
    Thread_CompStatus_ERROR,
    Thread_CompStatus_LOWER,
    Thread_CompStatus_EQUAL,
    Thread_CompStatus_HIGHER
} Thread_CompStatus;
enum Thread_Priority
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Thread priorities which are mapped to OS specific value by Proxy

C synopsis target-domain
typedef enum Thread_Priority {
    Thread_Priority_INVALID,
    Thread_Priority_LOWEST,
    Thread_Priority_BELOW_NORMAL,
    Thread_Priority_NORMAL,
    Thread_Priority_ABOVE_NORMAL,
    Thread_Priority_HIGHEST
} Thread_Priority;
typedef Thread_RunFxn
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Typedef for thread function

C synopsis target-domain
typedef Void (*Thread_RunFxn)(IArg);
struct Thread_Stat
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Struct to hold thread statistics from stat

C synopsis target-domain
typedef struct Thread_Stat {
    SizeT stackSize;
    SizeT stackUsed;
} Thread_Stat;
config Thread_A_zeroTimeout // module-wide
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Assert when timeout passed to sleep is zero

C synopsis target-domain
extern const Assert_Id Thread_A_zeroTimeout;
config Thread_defaultStackSize // module-wide
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Default thread stack size

C synopsis target-domain
extern const SizeT Thread_defaultStackSize;
Thread_compareOsPriorities() // module-wide
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Compare two os specific priority values and find out which one represents a higher priority

C synopsis target-domain
Int Thread_compareOsPriorities(Int p1, Int p2, Error_Block *eb);
ARGUMENTS
p1 — priority one
p2 — priority two
eb — Pointer to Error.Block
DETAILS
  • CompStatus_ERROR if an error occured
  • CompStatus_LOWER if p1 is lower than p2
  • CompStatus_EQUAL if p1=p2
  • CompStatus_HIGHER if p1 is higher than p2 details.
RETURNS
refer to description above
Thread_self() // module-wide
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Return the currently executing thread's handle

C synopsis target-domain
Thread_Handle Thread_self(Error_Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
RETURNS
Returns a handle to the currently executing thread. If the current thread is the main thread, this function returns NULL. NULL is also returned in case of error.
Thread_sleep() // module-wide
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Sleep for given number of microseconds

C synopsis target-domain
Bool Thread_sleep(UInt timeout, Error_Block *eb);
ARGUMENTS
timeout — timeout in microseconds
eb — Pointer to Error.Block
DETAILS
This function is gauranteed to sleep for at least as long as the timeout value but the actual sleep time may be longer. NOTE: The timeout value cannot be zero.
RETURNS
true for success; false for error
Thread_start() // module-wide
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Start threads running

C synopsis target-domain
Bool Thread_start(Error_Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
DETAILS
This function can be used to start all statically created threads, and all threads created dynamically before this function is called. Any thread created after this function is called, starts automatically (i.e., there is no need to call Thread_start() more than once).
RETURNS
true for success; false for error
Thread_yield() // module-wide
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Yield the currently scheduled thread

C synopsis target-domain
Bool Thread_yield(Error_Block *eb);
ARGUMENTS
eb — Pointer to Error.Block
RETURNS
true for success; false for error
Module-Wide Built-Ins
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C synopsis target-domain
Types_ModuleId Thread_Module_id();
// Get this module's unique id
Bool Thread_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Thread_Module_heap();
// The heap from which this module allocates memory
Bool Thread_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Thread_Module_getMask();
// Returns the diagnostics mask for this module
Void Thread_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Instance Object Types
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C synopsis target-domain
typedef struct Thread_Object Thread_Object;
// Opaque internal representation of an instance object
typedef Thread_Object *Thread_Handle;
// Client reference to an instance object
typedef struct Thread_Struct Thread_Struct;
// Opaque client structure large enough to hold an instance object
Thread_Handle Thread_handle(Thread_Struct *structP);
// Convert this instance structure pointer into an instance handle
Thread_Struct *Thread_struct(Thread_Handle handle);
// Convert this instance handle into an instance structure pointer
Instance Config Parameters
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C synopsis target-domain
typedef struct Thread_Params {
// Instance config-params structure
     IInstance_Params *instance;
    // Common per-instance configs
    IArg arg;
    // Thread function argument. Default is 0
    Int osPriority;
    // OS specific thread priority
     Thread_Priority priority;
    // Specify the new thread's priority
    SizeT stackSize;
    // Thread stack size
    Ptr tls;
    // Thread local storage
} Thread_Params;
Void Thread_Params_init(Thread_Params *params);
// Initialize this config-params structure with supplier-specified defaults before instance creation
config Thread_Params.arg // instance
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Thread function argument. Default is 0

C synopsis target-domain
struct Thread_Params {
     ...
    IArg arg;
config Thread_Params.osPriority // instance
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OS specific thread priority

C synopsis target-domain
struct Thread_Params {
     ...
    Int osPriority;
DETAILS
Used to specify an OS specific value for priority. If set this value takes precedence over priority.
config Thread_Params.priority // instance
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Specify the new thread's priority

C synopsis target-domain
struct Thread_Params {
     ...
     Thread_Priority priority;
DETAILS
Thread defines several constants which allows applications to select a priority in an OS independent way: Priority_LOWEST, Priority_BELOW_NORMAL, Priority_NORMAL, Priority_ABOVE_NORMAL and Priority_HIGHEST. These values get mapped to OS specific priorities by the OS specific delegate.
config Thread_Params.stackSize // instance
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Thread stack size

C synopsis target-domain
struct Thread_Params {
     ...
    SizeT stackSize;
DETAILS
The default value of 0 means that defaultStackSize is used.
config Thread_Params.tls // instance
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Thread local storage

C synopsis target-domain
struct Thread_Params {
     ...
    Ptr tls;
DETAILS
User data associated with a thread. Must persist for the life of the thread.
Runtime Instance Creation
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C synopsis target-domain
Thread_Handle Thread_create(Thread_RunFxn fxn, const Thread_Params *params, Error_Block *eb);
// Allocate and initialize a new instance object and return its handle
Void Thread_construct(Thread_Struct *structP, Thread_RunFxn fxn, const Thread_Params *params, Error_Block *eb);
// Initialize a new instance object inside the provided structure
ARGUMENTS
fxn — function for new thread to begin execution
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function spawns a new thread calling the function fxn.
Instance Deletion
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C synopsis target-domain
Void Thread_delete(Thread_Handle *handleP);
// Finalize and free this previously allocated instance object, setting the referenced handle to NULL
Void Thread_destruct(Thread_Struct *structP);
// Finalize the instance object inside the provided structure
Thread_getOsHandle() // instance
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Get the OS thread handle

C synopsis target-domain
Ptr Thread_getOsHandle(Thread_Handle handle);
ARGUMENTS
handle — handle of a previously-created Thread instance object
RETURNS
OS thread handle
Thread_getOsPriority() // instance
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Obtain a thread's OS specific priority

C synopsis target-domain
Int Thread_getOsPriority(Thread_Handle handle, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created Thread instance object
eb — Pointer to Error.Block
DETAILS
For OSes that support dynamic priority boosting, the value returned is the base priority of the thread.
RETURNS
thread priority in case of success; GETPRI_FAILED in case of error;
Thread_getPriority() // instance
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Obtain a thread's priority

C synopsis target-domain
Thread_Priority Thread_getPriority(Thread_Handle handle, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created Thread instance object
eb — Pointer to Error.Block
DETAILS
For OSes that support dynamic priority boosting, this function retrieves the base priority of the thread.
RETURNS
thread priority in case of success; PRIORITY_INVALID in case of error;
Thread_getTls() // instance
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Obtain a thread's local storage

C synopsis target-domain
Ptr Thread_getTls(Thread_Handle handle);
ARGUMENTS
handle — handle of a previously-created Thread instance object
RETURNS
null when tls has not been set.
Thread_join() // instance
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Block calling thread until given thread terminates

C synopsis target-domain
Bool Thread_join(Thread_Handle handle, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created Thread instance object
eb — Pointer to Error.Block
DETAILS
Use this functions to ensure that a thread has terminated. It is OK to call this function on a thread that has already terminated.
RETURNS
true for success; false for error
Thread_setOsPriority() // instance
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Set a thread's priority

C synopsis target-domain
Bool Thread_setOsPriority(Thread_Handle handle, Int newPri, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created Thread instance object
newPri — new thread priority
eb — Pointer to Error.Block
DETAILS
This API sets the base priority of the thread on OSes that support dynamic priority boosting
RETURNS
true for success; false for error
Thread_setPriority() // instance
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Set a thread's priority

C synopsis target-domain
Bool Thread_setPriority(Thread_Handle handle, Thread_Priority newPri, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created Thread instance object
newPri — new thread priority
eb — Pointer to Error.Block
DETAILS
For OSes that support dynamic priority boosting, this function changes the base priority of the thread.
RETURNS
true for success; false for error
Thread_setTls() // instance
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Change a thread's local storage

C synopsis target-domain
Void Thread_setTls(Thread_Handle handle, Ptr tls);
ARGUMENTS
handle — handle of a previously-created Thread instance object
tls — tls
Thread_stat() // instance
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Get thread statistics

C synopsis target-domain
Bool Thread_stat(Thread_Handle handle, Thread_Stat *buf, Error_Block *eb);
ARGUMENTS
handle — handle of a previously-created Thread instance object
buf — Pointer to Stat
eb — Pointer to Error.Block
RETURNS
true for success; false for failure
Instance Built-Ins
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C synopsis target-domain
Int Thread_Object_count();
// The number of statically-created instance objects
Thread_Handle Thread_Object_get(Thread_Object *array, Int i);
// The handle of the i-th statically-created instance object (array == NULL)
Thread_Handle Thread_Object_first();
// The handle of the first dynamically-created instance object, or NULL
Thread_Handle Thread_Object_next(Thread_Handle handle);
// The handle of the next dynamically-created instance object, or NULL
IHeap_Handle Thread_Object_heap();
// The heap used to allocate dynamically-created instance objects
Types_Label *Thread_Handle_label(Thread_Handle handle, Types_Label *buf);
// The label associated with this instance object
String Thread_Handle_name(Thread_Handle handle);
// The name of this instance object
Configuration settings sourced in xdc/runtime/knl/Thread.xdc
var Thread = xdc.useModule('xdc.runtime.knl.Thread');
local proxy modules
     Thread.Proxy// Proxy that needs to be bound to an OS specific delegate = IThreadSupport.Module null
         Thread.Proxy.delegate$ = IThreadSupport.Module null
         Thread.Proxy.abstractInstances$ = false
module-wide constants & types
    const Thread.GETPRI_FAILED// Status returned by getPri when an error occurs = -2;
    const Thread.INVALID_OS_PRIORITY// Invalid OS priority value = 0;
    values of type Thread.CompStatus// Status returned by compareOsPriorities when an error occurs
        const Thread.CompStatus_ERROR;
        const Thread.CompStatus_LOWER;
        const Thread.CompStatus_EQUAL;
        const Thread.CompStatus_HIGHER;
    values of type Thread.Priority// Thread priorities which are mapped to OS specific value by Proxy
        const Thread.Priority_INVALID;
        const Thread.Priority_LOWEST;
        const Thread.Priority_BELOW_NORMAL;
        const Thread.Priority_NORMAL;
        const Thread.Priority_ABOVE_NORMAL;
        const Thread.Priority_HIGHEST;
    var obj = new Thread.Stat// Struct to hold thread statistics from stat;
        obj.stackSize = SizeT ...
        obj.stackUsed = SizeT ...
module-wide config parameters
     Thread.A_zeroTimeout// Assert when timeout passed to sleep is zero = Assert.Desc {
        msg: "A_zeroTimeout: Timeout value annot be zero"
    };
     Thread.defaultStackSize// Default thread stack size = SizeT 0;
     Thread.common$// Common module configuration parameters = Types.Common$ undefined;
per-instance config parameters
    var params = new Thread.Params// Instance config-params object;
        params.arg// Thread function argument. Default is 0 = IArg 0;
        params.osPriority// OS specific thread priority = Int Thread.INVALID_OS_PRIORITY;
        params.priority// Specify the new thread's priority = Thread.Priority Thread.Priority_NORMAL;
        params.stackSize// Thread stack size = SizeT 0;
        params.tls// Thread local storage = Ptr null;
per-instance creation
    var inst = Thread.create// Create an instance-object(Void(*)(IArg) fxn, params);
proxy Thread.Proxy
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Proxy that needs to be bound to an OS specific delegate

Configuration settings
Thread.Proxy = IThreadSupport.Module null
// some delegate module inheriting the IThreadSupport interface
    Thread.Proxy.delegate$ = IThreadSupport.Module null
    // explicit access to the currently bound delegate module
    Thread.Proxy.abstractInstances$ = false
    // use indirect runtime function calls if true
const Thread.GETPRI_FAILED
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Status returned by getPri when an error occurs

Configuration settings
const Thread.GETPRI_FAILED = -2;
C SYNOPSIS
Thread_GETPRI_FAILED
const Thread.INVALID_OS_PRIORITY
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Invalid OS priority value

Configuration settings
const Thread.INVALID_OS_PRIORITY = 0;
C SYNOPSIS
Thread_INVALID_OS_PRIORITY
enum Thread.CompStatus
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Status returned by compareOsPriorities when an error occurs

Configuration settings
values of type Thread.CompStatus
    const Thread.CompStatus_ERROR;
    const Thread.CompStatus_LOWER;
    const Thread.CompStatus_EQUAL;
    const Thread.CompStatus_HIGHER;
C SYNOPSIS
Thread_CompStatus
enum Thread.Priority
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Thread priorities which are mapped to OS specific value by Proxy

Configuration settings
values of type Thread.Priority
    const Thread.Priority_INVALID;
    const Thread.Priority_LOWEST;
    const Thread.Priority_BELOW_NORMAL;
    const Thread.Priority_NORMAL;
    const Thread.Priority_ABOVE_NORMAL;
    const Thread.Priority_HIGHEST;
C SYNOPSIS
Thread_Priority
struct Thread.Stat
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Struct to hold thread statistics from stat

Configuration settings
var obj = new Thread.Stat;
    obj.stackSize = SizeT ...
    obj.stackUsed = SizeT ...
C SYNOPSIS
Thread_Stat
config Thread.A_zeroTimeout // module-wide
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Assert when timeout passed to sleep is zero

Configuration settings
Thread.A_zeroTimeout = Assert.Desc {
    msg: "A_zeroTimeout: Timeout value annot be zero"
};
C SYNOPSIS
Thread_A_zeroTimeout
config Thread.defaultStackSize // module-wide
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Default thread stack size

Configuration settings
Thread.defaultStackSize = SizeT 0;
C SYNOPSIS
Thread_defaultStackSize
metaonly config Thread.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Thread.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
Instance Config Parameters
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Configuration settings
var params = new Thread.Params;
// Instance config-params object
    params.arg = IArg 0;
    // Thread function argument. Default is 0
    params.osPriority = Int Thread.INVALID_OS_PRIORITY;
    // OS specific thread priority
    params.priority = Thread.Priority Thread.Priority_NORMAL;
    // Specify the new thread's priority
    params.stackSize = SizeT 0;
    // Thread stack size
    params.tls = Ptr null;
    // Thread local storage
config Thread.Params.arg // instance
index URL

Thread function argument. Default is 0

Configuration settings
var params = new Thread.Params;
...
params.arg = IArg 0;
C SYNOPSIS
Thread_Params.arg
config Thread.Params.osPriority // instance
index URL

OS specific thread priority

Configuration settings
var params = new Thread.Params;
...
params.osPriority = Int Thread.INVALID_OS_PRIORITY;
DETAILS
Used to specify an OS specific value for priority. If set this value takes precedence over priority.
C SYNOPSIS
Thread_Params.osPriority
config Thread.Params.priority // instance
index URL

Specify the new thread's priority

Configuration settings
var params = new Thread.Params;
...
params.priority = Thread.Priority Thread.Priority_NORMAL;
DETAILS
Thread defines several constants which allows applications to select a priority in an OS independent way: Priority_LOWEST, Priority_BELOW_NORMAL, Priority_NORMAL, Priority_ABOVE_NORMAL and Priority_HIGHEST. These values get mapped to OS specific priorities by the OS specific delegate.
C SYNOPSIS
Thread_Params.priority
config Thread.Params.stackSize // instance
index URL

Thread stack size

Configuration settings
var params = new Thread.Params;
...
params.stackSize = SizeT 0;
DETAILS
The default value of 0 means that defaultStackSize is used.
C SYNOPSIS
Thread_Params.stackSize
config Thread.Params.tls // instance
index URL

Thread local storage

Configuration settings
var params = new Thread.Params;
...
params.tls = Ptr null;
DETAILS
User data associated with a thread. Must persist for the life of the thread.
C SYNOPSIS
Thread_Params.tls
Static Instance Creation
index URL

Configuration settings
var params = new Thread.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Thread.create(Void(*)(IArg) fxn, params);
// Create an instance-object
ARGUMENTS
fxn — function for new thread to begin execution
params — per-instance config params, or NULL to select default values (target-domain only)
eb — active error-handling block, or NULL to select default policy (target-domain only)
DETAILS
This function spawns a new thread calling the function fxn.
generated on Sun, 25 Nov 2018 22:18:57 GMT


package xdc.services.getset
index URL

Callback notification on RTSC config parameters

XDCspec declarations sourced in xdc/services/getset/package.xdc
package xdc.services.getset [1, 0, 0] {
    module GetSet;
    // Callback notification on RTSC config parameters
}
SEE
JavaDoc (No Frames), (Frames)
generated on Sun, 25 Nov 2018 22:18:52 GMT


module xdc.services.getset.GetSet

metaonly module xdc.services.getset.GetSet
index URL

Callback notification on RTSC config parameters

  • DETAILS
  • SEE
  • Configuration settings
  • Individual elements
Lets user code receive a notification whenever a config param of a module or instance is read or modified. [ more ... ]
Configuration settings sourced in xdc/services/getset/GetSet.xdc
var GetSet = xdc.useModule('xdc.services.getset.GetSet');
module-wide config parameters
     GetSet.debug// Print execution trace info showing the flow of getters and setters = Bool false;
     GetSet.maxIterations// Limit the number of iterations allowed for a group to converge, to help debug. The default value of 0 means no limit = Int 0;
     GetSet.maxStackDepth// Set the maximum allowed depth of recursively nested setters, as a debugging aid. The default value of 0 means no limit = Int 0;
module-wide functions
     GetSet.createGroup// Create a group of related setter functions() returns Any
     GetSet.init// Add support for getters and setters to all fields of an object(Any obj) returns Any
     GetSet.onGet// Add a getter function to a field(Any obj, Any sel, Any getter) returns Any
     GetSet.onSet// Add a setter function to a field(Any obj, Any sel, Any setter) returns Any
DETAILS
Lets user code receive a notification whenever a config param of a module or instance is read or modified.
SEE
JavaDoc
config GetSet.debug // module-wide
index URL

Print execution trace info showing the flow of getters and setters

Configuration settings
GetSet.debug = Bool false;
config GetSet.maxIterations // module-wide
index URL

Limit the number of iterations allowed for a group to converge, to help debug. The default value of 0 means no limit

Configuration settings
GetSet.maxIterations = Int 0;
config GetSet.maxStackDepth // module-wide
index URL

Set the maximum allowed depth of recursively nested setters, as a debugging aid. The default value of 0 means no limit

Configuration settings
GetSet.maxStackDepth = Int 0;
GetSet.createGroup() // module-wide
index URL

Create a group of related setter functions

Configuration settings
GetSet.createGroup() returns Any
DETAILS
The purpose of a group is to control interactions between setters. If each setter acts like an interrupt, then a group is like an interrupt controller that determines when setters are permitted to run.
Each group is non-reentrant. Once any setter in the group is running, it runs to completion before any other setter in the same group may run. This allows the setters to modify internal state without interference from other setters that operate on the same internal state.
Each group runs to completion. When a setter in the group runs, it might modify other config params and cause further setters in the same group to run. All of these complete before control is returned to the original execution flow. From the point of view of code outside the group, all the setters ran as an atomic operation.
Groups may be interrupted. When a setter modifies a config param that is being monitored by a second group, the second group starts running immediately. It will run to completion before returning control to the first group. So the first group sees the second group as atomic. This allows groups to be tested independently, and combined without affecting their behavior.
Cycles aren't permitted in the execution flow between groups. If a setter gets triggered from a group that has already been interrupted, it is deferred and run when control eventually returns to its own group. Cycles between groups can break the appearance of atomic execution, and so should be avoided when possible.
RETURNS
A Java object of class Group. Can then use Group.onSet() to add functions to the group.
EXAMPLE
The following example code forces the values of the config params ModA.a and ModB.b to be equal:
    var group = GetSet.createGroup();
    group.onSet(ModA, "a", function aToB(){ ModB.b = ModA.a; });
    group.onSet(ModB, "b", function bToA(){ ModA.a = ModB.b; });
GetSet.init() // module-wide
index URL

Add support for getters and setters to all fields of an object

Configuration settings
GetSet.init(Any obj) returns Any
DETAILS
Initializes getter and setter support for every field of the object. The object can be a module, instance, or structure.
This is a convenience function. The onSet and onGet functions already add support to the one field of interest. The init function is useful mostly to make fields visible to global setters and getters, for example for debugging.
GetSet.onGet() // module-wide
index URL

Add a getter function to a field

Configuration settings
GetSet.onGet(Any obj, Any sel, Any getter) returns Any
DETAILS
Each getter acts like an interrupt that is triggered by a read a field of an object. The field could be a config param of a module or an instance, or a field of a struct.
EXAMPLE
The following example prints a message on any read of a config param named cfg in module pkg.Mod:
    GetSet.onGet(Mod, "cfg", function(sel, val) {
        // prints "pkg.Mod.cfg returned <value>"
        print(this.$name + "." + sel + " returned " + val);
    });
GetSet.onSet() // module-wide
index URL

Add a setter function to a field

Configuration settings
GetSet.onSet(Any obj, Any sel, Any setter) returns Any
DETAILS
Each setter acts like an interrupt that is triggered by modifying a field of an object. The field could be a config param of a module or an instance, or a field of a struct.
Setters execute only when the field actually changes value. They do not execute if the field's current value is written back to it.
Setters may themselves modify fields, and so trigger other setters. The original execution flow resumes when all fields stop changing value. In the case of cycles between setters, typically this means that at least one setter executes twice and makes no further changes the second time through.
If the setter throws a JavaScript Error or Java exception, then the field's original value is restored. The exception bubbles back through the call stack, so that if a setter caused a cascade of changes, all are restored to their original values.
EXAMPLE
The following example prints a message on any write to a config param named cfg in module pkg.Mod:
    GetSet.onSet(Mod, "cfg", function(sel, val, oldVal, exception) {
        // prints "pkg.Mod.cfg set to <value>"
        print(this.$name + "." + sel + " changed to " + val);
        // prints previous value before change
        print("  was " + oldVal);
    });
The following example makes it an error to change Mod.cfg:
    GetSet.onSet(Mod, "cfg", function(sel, val, oldVal, exception) {
        // don't throw an exception if already recovering from one
        if (!exception) {
            throw new Error("You'll never change me!");
        }
    });
generated on Sun, 25 Nov 2018 22:18:52 GMT


package xdc.services.global
index URL

Common XDC utility classes

XDCspec declarations sourced in xdc/services/global/package.xdc
package xdc.services.global [1, 0, 0] {
    module Clock;
    // Elapsed time measurement functions
    module Trace;
    // Trace support
}
generated on Sun, 25 Nov 2018 22:18:53 GMT


module xdc.services.global.Clock

metaonly module xdc.services.global.Clock
index URL

Elapsed time measurement functions

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/services/global/Clock.xdc
var Clock = xdc.useModule('xdc.services.global.Clock');
module-wide config parameters
     Clock.enable// Enable output from this module = Bool false;
     Clock.showMemory// Enable memory usage output = Bool false;
module-wide functions
     Clock.getElapsedTime// Get elapsed time from last reset() returns Any
     Clock.print// Report elapsed time from last reset(String msg) returns Void
     Clock.reset// Set elapsed time to 0() returns Void
config Clock.enable // module-wide
index URL

Enable output from this module

Configuration settings
Clock.enable = Bool false;
DETAILS
If false, all output is suppressed.
The initial value of this configuration parameter can be set on the xs command line. For example,
      xs -Dxdc.services.global.Clock.enable=true ...
sets the initial value of enable to true.
If the value is not set on the command line, its initial value defaults to false.
config Clock.showMemory // module-wide
index URL

Enable memory usage output

Configuration settings
Clock.showMemory = Bool false;
DETAILS
If false, memory usage output is suppressed
Clock.getElapsedTime() // module-wide
index URL

Get elapsed time from last reset

Configuration settings
Clock.getElapsedTime() returns Any
Clock.print() // module-wide
index URL

Report elapsed time from last reset

Configuration settings
Clock.print(String msg) returns Void
Clock.reset() // module-wide
index URL

Set elapsed time to 0

Configuration settings
Clock.reset() returns Void
generated on Sun, 25 Nov 2018 22:18:53 GMT


module xdc.services.global.Trace

metaonly module xdc.services.global.Trace
index URL

Trace support

  • Configuration settings
  • Individual elements
This module allows system integrators to selectively enable trace statements, from within XDCscripts. Trace statements can be selected based on the file (capsule) and the package in which they are located. For example, trace statements from file Mod.xs in package myPkgs.pkgA' can be enabled either with Trace.capsuleEnable(["myPkgs/pkgA/Mod"]) or with Trace.packageEnable(["myPkgs.pkgA"])`. [ more ... ]
Configuration settings sourced in xdc/services/global/Trace.xdc
var Trace = xdc.useModule('xdc.services.global.Trace');
module-wide config parameters
     Trace.packageLoad// Enable trace of loaded packages = Bool false;
     Trace.useModule// Enable trace of used modules = Bool false;
module-wide functions
     Trace.addSupergroup// Add a group that contains other groups(String supergroup, String[] subgroups) returns Void
     Trace.capsuleEnable// Enable trace output from selected capsules(String[] capsules) returns String[]
     Trace.groupEnable// Enable trace output from selected groups(String[] groups) returns String[]
     Trace.packageEnable// Enable trace output from selected packages(String[] packages) returns String[]
     Trace.setLevel// Set the verbosity level(Int level) returns Int
DETAILS
This module allows system integrators to selectively enable trace statements, from within XDCscripts. Trace statements can be selected based on the file (capsule) and the package in which they are located. For example, trace statements from file Mod.xs in package myPkgs.pkgA' can be enabled either with Trace.capsuleEnable(["myPkgs/pkgA/Mod"]) or with Trace.packageEnable(["myPkgs.pkgA"])`.
Trace statements can also belong to groups, strings defined by package producers when they need to group related trace statements, distributed across different modules and packages, into trace units that can be disabled or enabled as a whole. If some of the trace statements from file Mod.xs are tagged to belong to a group "init", the following will activate them:
  Trace.groupEnable(["init"]);
Each trace statement by default belongs to the group "all". To activate all trace statements:
  Trace.setLevel(2);
  Trace.groupEnable(["all"]);
config Trace.packageLoad // module-wide
index URL

Enable trace of loaded packages

Configuration settings
Trace.packageLoad = Bool false;
DETAILS
This setting enables the messages related to loading packages. If true, whenever a package is loaded, the following info is displayed:
  • name of a package loading another package
  • name of the loaded package
  • repository from which the package is being loaded
config Trace.useModule // module-wide
index URL

Enable trace of used modules

Configuration settings
Trace.useModule = Bool false;
DETAILS
This setting enables the messages that inform when the function xdc.useModule() is invoked on a module, and when a module's module$use function is invoked.
Trace.addSupergroup() // module-wide
index URL

Add a group that contains other groups

Configuration settings
Trace.addSupergroup(String supergroup, String[] subgroups) returns Void
ARGUMENTS
supergroup — name of the new group
subgroups — array of the existing trace groups
DETAILS
This function allows giving a name to an array of existing trace groups.
Trace.capsuleEnable() // module-wide
index URL

Enable trace output from selected capsules

Configuration settings
Trace.capsuleEnable(String[] capsules) returns String[]
ARGUMENTS
capsules — array of capsule names
DETAILS
Capsules are either XDCscript files or Java source files. The function parameter is treated as an array of JavaScript regular expressions, therefore it can contain partial capsule names.
If this function is invoked repeatedly, each new call replaces the array of currently enabled capsules with the array supplied as the parameter. The array of the currently enabled capsules is returned. If the function is invoked with a zero-length array, it returns the currently enabled capsules, but it also leaves them active. Therefore, the sequence of calls that would add new capsules instead of replacing the current ones is:
  var current = Trace.capsuleEnable([]);
  current[current.length++] = "pkg/ModA.xs";
  current[current.length++] = "pkg/ModB.xs";
  Trace.capsuleEnable(current);
To disable trace for all capsules, the function must be invoked with an empty string as the only element of the array.
  Trace.capsuleEnable([""]);
RETURN
array of currently enabled capsule names
Trace.groupEnable() // module-wide
index URL

Enable trace output from selected groups

Configuration settings
Trace.groupEnable(String[] groups) returns String[]
ARGUMENTS
groups — array of groups
DETAILS
A group is a string defined by package producers when they need to group related trace statements, distributed across different modules and packages, into trace units that can be disabled or enabled as a whole. The function parameter is treated as an array of JavaScript regular expressions, therefore it can contain partial group names.
If this function is invoked repeatedly, each new call replaces the array of currently enabled groups with the array supplied as the parameter. The array of the currently enabled groups is returned. If the function is invoked with a zero-length array, it returns the currently enabled groups, but it also leaves them active. Therefore, the sequence of calls that would add new groups instead of replacing the current ones is:
  var current = Trace.groupEnable([]);
  current[current.length++] = "libPkgs";
  Trace.groupEnable(current);
To disable trace for all groups, the function must be invoked with an empty string as the only element of the array.
  Trace.groupEnable([""]);
RETURN
array of currently enabled groups
Trace.packageEnable() // module-wide
index URL

Enable trace output from selected packages

Configuration settings
Trace.packageEnable(String[] packages) returns String[]
ARGUMENTS
packages — array of package names
DETAILS
Packages that can be enabled through this function are RTSC packages and Java packages. The function parameter is treated as an array of JavaScript regular expressions, therefore it can contain partial package names.
If this function is invoked repeatedly, each new call replaces the array of currently enabled packages with the array supplied as the parameter. The array of the currently enabled packages is returned. If the function is invoked with a zero-length array, it returns the currently enabled packages, but it also leaves them active. Therefore, the sequence of calls that would add new packages instead of replacing the current ones is:
  var current = Trace.packageEnable([]);
  current[current.length++] = "ti.targets";
  Trace.packageEnable(current);
To disable trace for all packages, the function must be invoked with an empty string as the only element of the array.
  Trace.packageEnable([""]);
RETURN
array of currently enabled package names
Trace.setLevel() // module-wide
index URL

Set the verbosity level

Configuration settings
Trace.setLevel(Int level) returns Int
DETAILS
This function limits trace output to trace statement tagged with level equal or lower than this function's parameter. By default, the verbosity level is set to 0, which is the least verbose level. The most verbose level is 2.
generated on Sun, 25 Nov 2018 22:18:53 GMT


package xdc.services.mapping
index URL

Java classes to support target and platform mapping based on JSON files

XDCspec declarations sourced in xdc/services/mapping/package.xdc
package xdc.services.mapping [1, 0, 0] {
}
generated on Sun, 25 Nov 2018 22:18:52 GMT


package xdc.services.spec
index URL

Java classes to access XDCspec information

  • DETAILS
  • NOTE
  • XDCSCRIPT EXAMPLES
  • SEE
This package contains several Java classes that enable clients to retrieve inforation about modules, interfaces, and packages from their specification files (i.e., *.xdc files). Being Java classes, the APIs provided are available to both Java applications and XDCscripts (via the $spec property of the module, interface, or package). [ more ... ]
XDCspec declarations sourced in xdc/services/spec/package.xdc
requires xdc.shelf;
package xdc.services.spec [1, 0, 0] {
}
DETAILS
This package contains several Java classes that enable clients to retrieve inforation about modules, interfaces, and packages from their specification files (i.e., *.xdc files). Being Java classes, the APIs provided are available to both Java applications and XDCscripts (via the $spec property of the module, interface, or package).
[Pkg]
Package related information available from a package's $spec property.
[Unit]
Module (or interface) related information available from a module's (or interface's) $spec property.
NOTE
When accessing the Java methods provided by this package via XDCscript, you can either either use their liternames (e.g., getName()) or use the JavaBeans pattern of getters and setters in which the method getName() can be accessed via just name. The examples below provide examples of how this pattern can be used.
XDCSCRIPT EXAMPLES
Get the declared name of a module:
      var Mod = xdc.module('pkg.Mod');
      print("Module declared as " + Mod.$spec.getName());
This same example can be written using the JavaBean pattern as follows:
      var Mod = xdc.module('pkg.Mod');
      print("Module declared as " + Mod.$spec.name);
SEE
Javadoc
generated on Sun, 25 Nov 2018 22:18:52 GMT


package xdc.shelf
index URL

Third party open source tools required by XDCtools

The following jars are part of this package: [ more ... ]
XDCspec declarations sourced in xdc/shelf/package.xdc
package xdc.shelf [1, 0, 0] {
}
DETAILS
The following jars are part of this package:
Jar | Version | License | From | Description
js.jar | 1.7R4 | MPL 2.0 (note) | http://www.mozilla.org/rhino | Java implementation of JavaScript 1.5
antlr.jar | 3.1.1 | BSD | http://www.antlr.org | LR parser generator used to implement the RTSC IDL
tar.jar | 2.5 | Public Domain | http://www.trustice.com/java/tar | tar file reader
In addition to the jars above, XDCtools requires the following third-party software:
Name | Version | License | From | Description
gmake | 4.2.1 | GPL v3 | http://savannah.gnu.org/projects/make | command run by the `xdc` command to create and build packages
J2SE Runtime Environment(JRE) | 1.7.0_80 | Oracle Binary Code License Agreement for the Java SE Platform Products and JavaFX | http://www.oracle.com/technetwork/java/javase/ | XDCtools core functionality is implemented in Java. Also required by the Rhino JavaScript engine shipped with XDCtools.
Although the following tools are not required, they are optionally shipped with XDCtools distributions to ensure consistent behavior across various development platforms.
Exe | Version | License | From | Description
zip, unzip | 2.32 and 5.52 | info-zip | http://www.info-zip.org | command line utilities to zip and unzip package releases
tar | 1.29 | GPL v3 | http://www.gnu.org/software/tar | command line utilities to archive package directories
sh, gunzip, gzip, sed | cygwin 1.5.25-15 | GPL v3 | http://cygwin.com | (Windows only) korn shell compatible shell used by GNU make
cat, cp, date, echo, mkdir, mv, pwd, rm, touch | cygwin 1.5.25-15 (coreutils 6.10) | GPL v3 | http://cygwin.com | (Windows only) common utilites called from GNU make makefiles
All other files that are part of XDCtools are licensed under either EPL v1.0 or dual-licensed under EDL v1.0.
generated on Sun, 25 Nov 2018 22:19:01 GMT


package xdc.shelf.local
index URL

Container for third party jars required to rebuild XDCtools

XDCspec declarations sourced in xdc/shelf/local/package.xdc
package xdc.shelf.local [1, 0, 0] {
}
generated on Sun, 25 Nov 2018 22:19:01 GMT


package xdc.targets.omf
index URL

ELF parser support

XDCspec declarations sourced in xdc/targets/omf/package.xdc
package xdc.targets.omf {
}
generated on Sun, 25 Nov 2018 22:19:02 GMT


package xdc.tools
index URL

Command line tool support

XDCspec declarations sourced in xdc/tools/package.xdc
package xdc.tools [1, 0, 0] {
    interface ICmd;
    // Generic xdc-script (xs) command
    module Cmdr;
    // Command line tool context
}
generated on Sun, 25 Nov 2018 22:18:49 GMT


module xdc.tools.Cmdr

metaonly module xdc.tools.Cmdr
index URL

Command line tool context

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/tools/Cmdr.xdc
var Cmdr = xdc.useModule('xdc.tools.Cmdr');
module-wide constants & types
    values of type Cmdr.Context//
        const Cmdr.SHELL;
        const Cmdr.SCRIPT;
per-instance config parameters
    var params = new Cmdr.Params// Instance config-params object;
        params.tid// = Int 0;
per-instance creation
    var inst = Cmdr.create// Create an instance-object(Any cmdmod, params);
per-instance functions
     inst.error// Throw an error exception with the specified message(Any msg) returns Any
     inst.getopts// Parse command-line arguments into config params(Any inst, Any args) returns Any
     inst.info// Output informational message to stdout(Any msg) returns Any
     inst.time// Output elapsed time since command start to stderr(Any msg) returns Any
     inst.usage// Output command usage message to stderr(Any msg) returns Any
     inst.verbose// Set verbose flag as specified(Any flag) returns Any
     inst.warning// Output specified warning message to stderr(Any msg) returns Any
enum Cmdr.Context
index URL
Configuration settings
values of type Cmdr.Context
    const Cmdr.SHELL;
    const Cmdr.SCRIPT;
Instance Config Parameters
index URL

Configuration settings
var params = new Cmdr.Params;
// Instance config-params object
    params.tid = Int 0;
    //
config Cmdr.Params.tid // instance
index URL
Configuration settings
var params = new Cmdr.Params;
...
params.tid = Int 0;
Static Instance Creation
index URL

Configuration settings
var params = new Cmdr.Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
var inst = Cmdr.create(Any cmdmod, params);
// Create an instance-object
Cmdr.error() // instance
index URL

Throw an error exception with the specified message

Configuration settings
inst.error(Any msg) returns Any
DETAILS
If msg is null or the empty string (""), the message "fatal error" is used.
Cmdr.getopts() // instance
index URL

Parse command-line arguments into config params

Configuration settings
inst.getopts(Any inst, Any args) returns Any
ARGUMENTS
inst — instance with config parameters to set
args — an array of command-line arguments
DETAILS
This function accepts an array of command-line arguments, and uses them to set the values of config parameters in a module instance. Parsing is controlled by the XDC declarations of the instance config params.
USAGE
The following command-line argument syntaxes are supported, following the syntax supported by GNU getopt() and getopt_long():
    -f                a boolean flag with short name
    -f value          a number or string with short name
    -fvalue
    -f=value
    --longname        a boolean flag with long name
    --longname value  a number or string with long name
    --longname=value  a number or string with long name
In addition the following non-standard syntaxes are supported:
    -f:value
    --longnamevalue
    --longname:value
DECLARATION
The long and short names of the config parameter are declared by the @CommandOption() attribute of the XDC spec language. For example to declare a boolean flag with a short name of "-f" and a long name of "--flag", and a default value of false:
     @ CommandOption("f,flag")
     config Bool myFlag = false;
Options of type Bool with no argument are assigned the value "true". The types String and Int can also be used, and always require an argument to be given on the command line.
COMBINING SHORT FLAGS
Short-name options can be combined on the command line where there is no ambiguity, for example the following usages are equivalent:
    -a -b -c -f filename
    -abcf filename
MULTIPLE OCCURRENCES
If the config param is declared as an array, the option may be used multiple times on the command line and each occurence will be recorded. For example the following records all -I options, in order:
    @ CommandOption("I")
    config String includeDirs[] = [];
REQUIRED OPTIONS
If the config param has no default value declared, then it is required on the command line.
RETURNS
The following return values are used to determine whether or not to proceed with the command and, if not, what the exit status of the command should be.
undefined
the command options have been successfully parsed and the command should be run.
0 (zero)
the command options have been successfully parsed and the command does not need to be run and should exit with a successful exit status (0).
non-zero integral value
an error occured in the parsing the options and the command should not be run and should exit with a non-zero exit status.
Cmdr.info() // instance
index URL

Output informational message to stdout

Configuration settings
inst.info(Any msg) returns Any
Cmdr.time() // instance
index URL

Output elapsed time since command start to stderr

Configuration settings
inst.time(Any msg) returns Any
Cmdr.usage() // instance
index URL

Output command usage message to stderr

Configuration settings
inst.usage(Any msg) returns Any
DETAILS
If msg is defined and non-empty, the command name and msg are output before the usage information.
Cmdr.verbose() // instance
index URL

Set verbose flag as specified

Configuration settings
inst.verbose(Any flag) returns Any
Cmdr.warning() // instance
index URL

Output specified warning message to stderr

Configuration settings
inst.warning(Any msg) returns Any
generated on Sun, 25 Nov 2018 22:18:49 GMT


interface xdc.tools.ICmd

metaonly interface xdc.tools.ICmd
index URL

Generic xdc-script (xs) command

  • DETAILS
  • COMMAND LINE EXAMPLE
  • XDCSCRIPT EXAMPLE
Modules that implement this interface can serve as "commands" that can be executed from the command line (via xs) or from within XDCscript scripts (without having to fork a separate process to run xs). [ more ... ]
XDCspec summary sourced in xdc/tools/ICmd.xdc
metaonly interface ICmd { ...
instance: ...
XDCspec declarations sourced in xdc/tools/ICmd.xdc
package xdc.tools;
metaonly interface ICmd {
module-wide config parameters
    config String usage// Usage for this command[] = [ ];
module-wide functions
     function exec// xs script entry point(args);
     function main// xs shell entry point(args);
instance:
per-instance functions
    Any run// Underlying implementation of the command(Cmdr.Instance cmdr, String args[]);
}
DETAILS
Modules that implement this interface can serve as "commands" that can be executed from the command line (via xs) or from within XDCscript scripts (without having to fork a separate process to run xs).
COMMAND LINE EXAMPLE
The following example runs the xdc.tools.path tool from the command line to get an array of names of all packages below the current working directory (".").
      xs xdc.tools.path -n -a -PR .
XDCSCRIPT EXAMPLE
The following example runs the xdc.tools.path tool from within a script to get an array of names of all packages below the current working directory (".").
      var Main = xdc.module('xdc.tools.path.Main');
      var result = Main.exec(["-n", "-a", "-PR", "."]);
config ICmd.usage // module-wide
index URL

Usage for this command

XDCspec declarations sourced in xdc/tools/ICmd.xdc
config String usage[] = [ ];
ICmd.exec() // module-wide
index URL

xs script entry point

XDCspec declarations sourced in xdc/tools/ICmd.xdc
function exec(args);
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
ICmd.main() // module-wide
index URL

xs shell entry point

XDCspec declarations sourced in xdc/tools/ICmd.xdc
function main(args);
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
ICmd.run() // instance
index URL

Underlying implementation of the command

XDCspec declarations sourced in xdc/tools/ICmd.xdc
Any run(Cmdr.Instance cmdr, String args[]);
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:49 GMT


package xdc.tools.cdoc
index URL

RTSC documentation generator

  • USAGE
  • OPTIONS
  • DETAILS
  • EXAMPLES
  • NOTE
cdoc is a package documentation generation utility. It builds a directory of browsable HTML documentation using the meta- information stored in RTSC packages. [ more ... ]
XDCspec declarations sourced in xdc/tools/cdoc/package.xdc
package xdc.tools.cdoc [1, 0, 0] {
    module Example;
    // XDOC markup language examples for modules and interfaces
    module Main;
    // Command implementation
    module Markup;
    // XDCspec doc markup language examples
}
USAGE
xs xdc.tools.cdoc [--help]
    [-od:dir] [-title text] [--start package] [--indexonly] [--doxytags file] [--doxybase dir] [-h] [-n] [-b] [-s] [-P pkg-dir...|-Pr repo-dir...|-A]
OPTIONS
-od
Place the generated files in the named directory
-title
Generated HTML pages will show the string in the page title
--start
Set start page to specified package

The opening page is, by default, the documentation for the alphabetically first package processed. This option allows you to explicitly specify the package used.

If "" is specified, the start page will be blank.

If the package specified is not processed, no warning or error results; it is assumed that when the documentation is used the specified package documentation will exist.

-s
Include .xdc file sources

In the generated documentation for each .xdc file, link to a pretty-printed view of the .xdc file source text.

-P
The subsequent directories are package directories

Generates documentation for each of the specified packages.

-Pr
The subsequent directories are repositories of packages

Generates documentation for all packages rooted in each of the specified repositories.

-A
Generate documentation for all packages on the package path
-b
Generate a single "big" output
-h
Generate html pages only, not table of contents or index
-n
Generate nodoc'd docs
--quiet
Quiet mode
--indexonly
Generate index and table of contents only
--doxytags
Process doxygen links, using this argument as the tag file
--doxybase
The directory containing doxygen html files
--style
Use specified style sheet
DETAILS
cdoc is a package documentation generation utility. It builds a directory of browsable HTML documentation using the meta- information stored in RTSC packages.
This utility is invoked via the XDCtools xs command. In the examples below we assume that the alias cdoc is defined as follows:
      $(XDCROOT)/xs xdc.tools.cdoc
where $(XDCROOT) is the installation directory of the XDCtools toolset.
EXAMPLES
In the examples below we assume that the alias cdoc is defined as $(XDCROOT)/xs xdc.tools.cdoc, where $(XDCROOT) is the installation directory of the XDCtools toolset.
1. To generate documentation for the package in the current working directory:
      cdoc
Since no package is specified and no output directory is specified, documentation is generated for the package in the current working directory and the output is placed in the package's ./package/cdoc sub-directory.
2. To generate documentation with the title "My Packages" for all packages installed in the myPackages repository:
      cdoc -title "My Packages" -Pr myPackages
Since no output directory was specified and documentation will be for more than one package, the generated files are placed in the directory ./cdoc.
3. To generate documentation for the package located in ./ti/bios and put results in the directory ./html.
      cdoc -od:html -P ti/bios
NOTE
cdoc processes the XML files that are generated *after* a package is built (actually after the .interfaces goal is built). One must first build a package before generating its documentation. If you change a .xdc file and re-run cdoc without rebuilding the package, the change in the .xdc file will not show up in the generated docs.
When interatively updating a package's .xdc files and examining the generated documentation, it is useful to define a command alias that first "compiles" the package's .xdc files and then runs the cdoc tool. For example, if your shell is Korn shell compatible, the following command alias ensures that any changes in .xdc files will show up in the generated documents:
      function cdoc {
          $XDCROOT/xdc .interfaces
          $XDCROOT/xs xdc.tools.cdoc $*
      }
generated on Sun, 25 Nov 2018 22:18:50 GMT


module xdc.tools.cdoc.Example
index URL

XDOC markup language examples for modules and interfaces

  • C synopsis
  • Individual elements
  • Configuration settings
  • Individual elements
This module demonstrates the features of XDOC on the declarations of an XDC module. View the source text of this .xdc file for details on how to use these examples.
C synopsis target-domain sourced in xdc/tools/cdoc/Example.xdc
#include <xdc/tools/cdoc/Example.h>
Functions
Void | Example_aFunction// Example function documentation(Int aParam);
Functions common to all target modules
 | Example_Module_getMask// Returns the diagnostics mask for this module, Example_Module_hasMask// Test whether this module has a diagnostics mask, Example_Module_heap// The heap from which this module allocates memory, Example_Module_id// Get this module's unique id, Example_Module_setMask// Set the diagnostics mask for this module, Example_Module_startupDone// Test if this module has completed startup
Typedefs
typedef struct | Example_ACmd// Example "tagged union" documentation ...
typedef enum | Example_AnEnum// Example enum documentation ...
typedef struct | Example_AStruct// Example structure declaration ...
typedef Int | Example_ATypedEnum// Example typed enumeration;
typedef union | Example_AUnion// Example union documentation ...
Constants
extern const Example_AUnion | Example_u// Example statically initialized union documentation;
enum Example_ATypedEnum
index URL

Example typed enumeration

C synopsis target-domain
typedef Int Example_ATypedEnum;
enum {
    Example_LOOP,
    Example_PRINT
} ;
VALUES
LOOP — example "typed" enum value documentation
DETAILS
This declaration defines a new type named ATypedEnum which is an alias of Int and two constants of type ATypedEnum.
Unlike ordinary C enums, where the compiler is free to choose an arbitrary type for enums, this declaration ensures that the new type is of a specific named type (in this case, Int).
enum Example_AnEnum
index URL

Example enum documentation

C synopsis target-domain
typedef enum Example_AnEnum {
    Example_AVALUE
} Example_AnEnum;
VALUES
AVALUE — example enum value documentation
struct Example_ACmd
index URL

Example "tagged union" documentation

C synopsis target-domain
typedef struct Example_ACmd {
     Example_ATypedEnum cmdId;
    union {
        struct {
            Int count;
        } loop;
        struct {
            String msg;
        } print;
    } args;
} Example_ACmd;
FIELDS
args — example structure field documentation
DETAILS
This structure illustrates the "tagged union" pattern: one field of the structure indicates how to interpret the rest of the structure.
struct Example_AStruct
index URL

Example structure declaration

C synopsis target-domain
typedef struct Example_AStruct {
    Int aField;
} Example_AStruct;
FIELDS
aField — example field documentation
union Example_AUnion
index URL

Example union documentation

C synopsis target-domain
typedef union Example_AUnion {
    String aString;
    Int anInt;
} Example_AUnion;
FIELDS
aString — example union field documentation
config Example_u // module-wide
index URL

Example statically initialized union documentation

C synopsis target-domain
extern const Example_AUnion Example_u;
Example_aFunction() // module-wide
index URL

Example function documentation

C synopsis target-domain
Void Example_aFunction(Int aParam);
ARGUMENTS
aParam — example function parameter documentation
Module-Wide Built-Ins
index URL

C synopsis target-domain
Types_ModuleId Example_Module_id();
// Get this module's unique id
Bool Example_Module_startupDone();
// Test if this module has completed startup
IHeap_Handle Example_Module_heap();
// The heap from which this module allocates memory
Bool Example_Module_hasMask();
// Test whether this module has a diagnostics mask
Bits16 Example_Module_getMask();
// Returns the diagnostics mask for this module
Void Example_Module_setMask(Bits16 mask);
// Set the diagnostics mask for this module
Configuration settings sourced in xdc/tools/cdoc/Example.xdc
var Example = xdc.useModule('xdc.tools.cdoc.Example');
module-wide constants & types
    values of type Example.ATypedEnum// Example typed enumeration
        const Example.LOOP;
        const Example.PRINT;
    values of type Example.AnEnum// Example enum documentation
        const Example.AVALUE;
    var obj = new Example.ACmd// Example "tagged union" documentation;
        obj.cmdId = Example.ATypedEnum ...
        obj.args = Example.__struct__1 ...
    var obj = new Example.AStruct// Example structure declaration;
        obj.aField = Int ...
    var obj = new Example.AUnion// Example union documentation;
        obj.aString = String ...
module-wide config parameters
     Example.u// Example statically initialized union documentation = Example.AUnion {
        aString: 'hello',
        anInt: 1234
    };
     Example.common$// Common module configuration parameters = Types.Common$ undefined;
enum Example.ATypedEnum
index URL

Example typed enumeration

Configuration settings
values of type Example.ATypedEnum
    const Example.LOOP;
    const Example.PRINT;
VALUES
LOOP — example "typed" enum value documentation
DETAILS
This declaration defines a new type named ATypedEnum which is an alias of Int and two constants of type ATypedEnum.
Unlike ordinary C enums, where the compiler is free to choose an arbitrary type for enums, this declaration ensures that the new type is of a specific named type (in this case, Int).
C SYNOPSIS
Example_ATypedEnum
enum Example.AnEnum
index URL

Example enum documentation

Configuration settings
values of type Example.AnEnum
    const Example.AVALUE;
VALUES
AVALUE — example enum value documentation
C SYNOPSIS
Example_AnEnum
struct Example.ACmd
index URL

Example "tagged union" documentation

Configuration settings
var obj = new Example.ACmd;
    obj.cmdId = Example.ATypedEnum ...
    obj.args = Example.__struct__1 ...
FIELDS
args — example structure field documentation
DETAILS
This structure illustrates the "tagged union" pattern: one field of the structure indicates how to interpret the rest of the structure.
C SYNOPSIS
Example_ACmd
struct Example.AStruct
index URL

Example structure declaration

Configuration settings
var obj = new Example.AStruct;
    obj.aField = Int ...
FIELDS
aField — example field documentation
C SYNOPSIS
Example_AStruct
union Example.AUnion
index URL

Example union documentation

Configuration settings
var obj = new Example.AUnion;
    obj.aString = String ...
FIELDS
aString — example union field documentation
C SYNOPSIS
Example_AUnion
config Example.u // module-wide
index URL

Example statically initialized union documentation

Configuration settings
Example.u = Example.AUnion {
    aString: 'hello',
    anInt: 1234
};
C SYNOPSIS
Example_u
metaonly config Example.common$ // module-wide
index URL

Common module configuration parameters

Configuration settings
Example.common$ = Types.Common$ undefined;
DETAILS
All modules have this configuration parameter. Its name contains the '$' character to ensure it does not conflict with configuration parameters declared by the module. This allows new configuration parameters to be added in the future without any chance of breaking existing modules.
generated on Sun, 25 Nov 2018 22:18:50 GMT


module xdc.tools.cdoc.Main

metaonly module xdc.tools.cdoc.Main
index URL

Command implementation

  • DETAILS
  • EXAMPLES
  • NOTE
  • Configuration settings
  • Individual elements
cdoc is a package documentation generation utility. It builds a directory of browsable HTML documentation using the meta- information stored in RTSC packages. [ more ... ]
Configuration settings sourced in xdc/tools/cdoc/Main.xdc
var Main = xdc.useModule('xdc.tools.cdoc.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '[-od:dir] [-title text] [--start package] [--indexonly] [--doxytags file] [--doxybase dir] [-h] [-n] [-b] [-s] [-P pkg-dir...|-Pr repo-dir...|-A]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.aopt// Generate documentation for all packages on the package path = Bool false;
        params.bopt// Generate a single "big" output = Bool false;
        params.doxybase// The directory containing doxygen html files = String null;
        params.doxytags// Process doxygen links, using this argument as the tag file = String null;
        params.hopt// Generate html pages only, not table of contents or index = Bool false;
        params.iopt// Generate index and table of contents only = Bool false;
        params.nopt// Generate nodoc'd docs = Bool false;
        params.outdir// Place the generated files in the named directory = String null;
        params.popt// The subsequent directories are package directories = Bool false;
        params.qopt// Quiet mode = Bool false;
        params.ropt// The subsequent directories are repositories of packages = Bool false;
        params.sopt// Include .xdc file sources = Bool false;
        params.start// Set start page to specified package = String null;
        params.style// Use specified style sheet = String null;
        params.title// Generated HTML pages will show the string in the page title = String null;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
cdoc is a package documentation generation utility. It builds a directory of browsable HTML documentation using the meta- information stored in RTSC packages.
This utility is invoked via the XDCtools xs command. In the examples below we assume that the alias cdoc is defined as follows:
      $(XDCROOT)/xs xdc.tools.cdoc
where $(XDCROOT) is the installation directory of the XDCtools toolset.
EXAMPLES
In the examples below we assume that the alias cdoc is defined as $(XDCROOT)/xs xdc.tools.cdoc, where $(XDCROOT) is the installation directory of the XDCtools toolset.
1. To generate documentation for the package in the current working directory:
      cdoc
Since no package is specified and no output directory is specified, documentation is generated for the package in the current working directory and the output is placed in the package's ./package/cdoc sub-directory.
2. To generate documentation with the title "My Packages" for all packages installed in the myPackages repository:
      cdoc -title "My Packages" -Pr myPackages
Since no output directory was specified and documentation will be for more than one package, the generated files are placed in the directory ./cdoc.
3. To generate documentation for the package located in ./ti/bios and put results in the directory ./html.
      cdoc -od:html -P ti/bios
NOTE
cdoc processes the XML files that are generated *after* a package is built (actually after the .interfaces goal is built). One must first build a package before generating its documentation. If you change a .xdc file and re-run cdoc without rebuilding the package, the change in the .xdc file will not show up in the generated docs.
When interatively updating a package's .xdc files and examining the generated documentation, it is useful to define a command alias that first "compiles" the package's .xdc files and then runs the cdoc tool. For example, if your shell is Korn shell compatible, the following command alias ensures that any changes in .xdc files will show up in the generated documents:
      function cdoc {
          $XDCROOT/xdc .interfaces
          $XDCROOT/xs xdc.tools.cdoc $*
      }
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '[-od:dir] [-title text] [--start package] [--indexonly] [--doxytags file] [--doxybase dir] [-h] [-n] [-b] [-s] [-P pkg-dir...|-Pr repo-dir...|-A]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.aopt = Bool false;
    // Generate documentation for all packages on the package path
    params.bopt = Bool false;
    // Generate a single "big" output
    params.doxybase = String null;
    // The directory containing doxygen html files
    params.doxytags = String null;
    // Process doxygen links, using this argument as the tag file
    params.hopt = Bool false;
    // Generate html pages only, not table of contents or index
    params.iopt = Bool false;
    // Generate index and table of contents only
    params.nopt = Bool false;
    // Generate nodoc'd docs
    params.outdir = String null;
    // Place the generated files in the named directory
    params.popt = Bool false;
    // The subsequent directories are package directories
    params.qopt = Bool false;
    // Quiet mode
    params.ropt = Bool false;
    // The subsequent directories are repositories of packages
    params.sopt = Bool false;
    // Include .xdc file sources
    params.start = String null;
    // Set start page to specified package
    params.style = String null;
    // Use specified style sheet
    params.title = String null;
    // Generated HTML pages will show the string in the page title
config Main.Params.aopt // instance
index URL

Generate documentation for all packages on the package path

Configuration settings
var params = new Main.Params;
...
params.aopt = Bool false;
config Main.Params.bopt // instance
index URL

Generate a single "big" output

Configuration settings
var params = new Main.Params;
...
params.bopt = Bool false;
config Main.Params.doxybase // instance
index URL

The directory containing doxygen html files

Configuration settings
var params = new Main.Params;
...
params.doxybase = String null;
config Main.Params.doxytags // instance
index URL

Process doxygen links, using this argument as the tag file

Configuration settings
var params = new Main.Params;
...
params.doxytags = String null;
config Main.Params.hopt // instance
index URL

Generate html pages only, not table of contents or index

Configuration settings
var params = new Main.Params;
...
params.hopt = Bool false;
config Main.Params.iopt // instance
index URL

Generate index and table of contents only

Configuration settings
var params = new Main.Params;
...
params.iopt = Bool false;
config Main.Params.nopt // instance
index URL

Generate nodoc'd docs

Configuration settings
var params = new Main.Params;
...
params.nopt = Bool false;
config Main.Params.outdir // instance
index URL

Place the generated files in the named directory

Configuration settings
var params = new Main.Params;
...
params.outdir = String null;
config Main.Params.popt // instance
index URL

The subsequent directories are package directories

Configuration settings
var params = new Main.Params;
...
params.popt = Bool false;
DETAILS
Generates documentation for each of the specified packages.
config Main.Params.qopt // instance
index URL

Quiet mode

Configuration settings
var params = new Main.Params;
...
params.qopt = Bool false;
config Main.Params.ropt // instance
index URL

The subsequent directories are repositories of packages

Configuration settings
var params = new Main.Params;
...
params.ropt = Bool false;
DETAILS
Generates documentation for all packages rooted in each of the specified repositories.
config Main.Params.sopt // instance
index URL

Include .xdc file sources

Configuration settings
var params = new Main.Params;
...
params.sopt = Bool false;
DETAILS
In the generated documentation for each .xdc file, link to a pretty-printed view of the .xdc file source text.
config Main.Params.start // instance
index URL

Set start page to specified package

Configuration settings
var params = new Main.Params;
...
params.start = String null;
DETAILS
The opening page is, by default, the documentation for the alphabetically first package processed. This option allows you to explicitly specify the package used.
If "" is specified, the start page will be blank.
If the package specified is not processed, no warning or error results; it is assumed that when the documentation is used the specified package documentation will exist.
config Main.Params.style // instance
index URL

Use specified style sheet

Configuration settings
var params = new Main.Params;
...
params.style = String null;
config Main.Params.title // instance
index URL

Generated HTML pages will show the string in the page title

Configuration settings
var params = new Main.Params;
...
params.title = String null;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:50 GMT


module xdc.tools.cdoc.Markup

metaonly module xdc.tools.cdoc.Markup
index URL

XDCspec doc markup language examples

  • DETAILS
  • HEADINGS
  • PARAGRAPH FORMATTING
  • CHARACTER FORMATTING
  • LIST TYPES
  • CDOC HYPERLINKS
  • SEE
  • EXTERNAL HTML LINKS
  • LINKING TO OTHER DOCUMENTATION FILES
  • LINKING TO DOXYGEN DOCUMENTATION
  • Configuration settings
  • Individual elements
This module demonstrates the features of XDCspec doc and gives usage examples for the XDCspec doc markup language. View the source text of this .xdc file for details on how to use these examples. [ more ... ]
Configuration settings sourced in xdc/tools/cdoc/Markup.xdc
var Markup = xdc.useModule('xdc.tools.cdoc.Markup');
DETAILS
This module demonstrates the features of XDCspec doc and gives usage examples for the XDCspec doc markup language. View the source text of this .xdc file for details on how to use these examples.
HEADINGS
Major headings can be inserted into the document using the following syntax:
    @tag(headingText)
The available tags are:
@a(headingText)
Add a heading to the end ("a" for "after") of the details section.
@b(headingText)
Add a heading to the start ("b" for "before") of the details section.
Since XDCtools 3.05, @a and @b tags can accept space characters in headings. Prior to this, heading text could contain no spaces.
PARAGRAPH FORMATTING
Paragraphs can be marked in several different styles using the following syntax:
 @p(style)
  paragraph text here...

  another paragraph...
 @p
The available paragraph styles are:
@p(text) or @p
Plain text -- this is the default.
@p(code)
Fragments of source code or pseudo-code. Paragraphs of this type are rendered in a fixed-width font.
@p(html)
HTML markup. Paragraphs of this type are copied directly into the XDCspec doc output, with no interpretation.
CHARACTER FORMATTING
LIST TYPES
Lists in several styles can be created using the syntax:
 @p(style)
  - first list item
    continued...
  - second list item
 @p
The available list styles are bulleted list, numbered list, and definition list, and they look like this:
  • The blist bulleted list style is an unnumbered, unordered list
  • Rendered using the HTML <UL> element.
  1. The nlist numbered list style is an ordered, numbered list
  2. Rendered using the HTML <OL> element.
Definition List
The dlist definition list style has a minor heading for each item in the list
Rendering
Rendered using the HTML <DL> element.
CDOC HYPERLINKS
HTML hyperlinks between XDCspec doc pages can be inserted using the inline keyword. link takes as a parameter the name of an XDCspec element, and optionally some additional formatting text. The XDCspec element can name a package, a module or interface, or a declaration within a module or interface. The general syntax is:
    {@link [pkgName.][modName][#decl][suffText] [altText]}
where:
pkgName
is the name of a package.
modName
is the name of a module or interface within the package.
decl
is the name of a declaration within the module or interface, for example a function or config parameter. Note that decl is delimited by a '#' character to distinguish it from the name of a package, module or interface.
suffText
is text to be appended to the text of the link. For example, '()' might be appended to denote a void function. The suffix text must contain no spaces.
altText
is alternate text to be used instead of the XDCspec name of the link target.
Write this: | To reference this:
{@link pkgName} | a package
{@link pkgName.moduleName} | a module
{@link moduleName} | a module in the same package
{@link pkgName.moduleName#declName} | a decl in a module
{@link moduleName#declName} | a decl in the same package
{@link #declName} | a decl in the same module
{@link #declName(arg1,arg2)} | a function with explicit args given in suffText
{@link #declName defined here} | a decl with the explicit link text "defined here"
Examples are:
Example.AStruct
xdc.tools.cdoc.Example
a struct with alternate text
SEE
Example.AStruct
EXTERNAL HTML LINKS
Documentation can also include HTML hyperlinks to web sites, using the syntax:
    {@link http://serverName/pathName[#anchor] [altText]}
The URL must include a resource type, typically "http:" or "ftp:".
Examples are:
http://ti.com
Texas Instruments
LINKING TO OTHER DOCUMENTATION FILES
It is possible to deliver other documentation files along with a package, and link to it from XDCspec doc. The documentation files must be placed in a subdirectory of the package with the name 'doc-files'. Hyperlinks to files in this directory are created using the syntax:
    {@link ./doc-files/filename[#anchor] [altText]}
    {@link pkgDir/doc-files/fileName[#anchor] [altText]}
The file name is specified using the same syntax as the xdc.findFile() function. That is, filenames within the current package must begin with "./". Links to files in other packages must use the fully qualified package name, with slashes ('/') instead of dots ('.') in the name.
Write this: | To reference this:
{@link ./doc-files/filename } | a file in the current package
{@link pkgDir/doc-files/filename } | a file in another package
Examples are:
./doc-files/example.html
xdc/tools/cdoc/doc-files/example.html
LINKING TO DOXYGEN DOCUMENTATION
It is possible to link to Doxygen documentation. Hyperlinks to are created using the syntax:
    {@link doxy(name)}
In a SEE section use:
    doxy(name)

To link to: | Use: | Example:
File | filePrefix.fileSuffix | doxy(Engine.h)
Function | functionName() | doxy(Engine_open())
#define | #defineName | doxy(#Engine_GTNAME)
Struct | structName | doxy(IALG_Fxns)
Struct field | structName::structField | doxy(IALG_Fxns::algAlloc)
Enum | enumName | doxy(IALG_MemAttrs)
Enumerator | enumName::enumerator | doxy(IALG_MemAttrs::IALG_PERSIST)
Typedef | ::typedefName | doxy(::Engine_Handle)
Variable | #variableName | doxy(#Engine_ATTRS)
See xdc.tools.cdoc usage for how to specify the location of the Doxygen files.
generated on Sun, 25 Nov 2018 22:18:50 GMT


package xdc.tools.cdoc.sg
index URL

Interactive Package Documentation Browser

XDCspec declarations sourced in xdc/tools/cdoc/sg/package.xdc
requires xdc.tools.sg;
package xdc.tools.cdoc.sg {
    module Main;
    // Interactive Package Documentation Browser
}
USAGE
      xs xdc.tools.cdoc.sg [unit-name ...] [-Pr rdir ...]
This tool is used to interactively browse package documentation for all packages found in the specified repositories rdir .... If no repositories are specified after the optional -Pr flag, the repositories in the current package path are used.
If one or more "unit-names" are specified, the corresponding package, module, or interface reference pages are opened during startup.
This utility is invoked via the XDC xs command, where the alias xs is defined as follows:
      $XDCROOT/xs
and $XDCROOT is the installation directory of the XDC toolset.
generated on Sun, 25 Nov 2018 22:18:49 GMT


module xdc.tools.cdoc.sg.Main

metaonly module xdc.tools.cdoc.sg.Main
index URL

Interactive Package Documentation Browser

  • Configuration settings
  • Individual elements
Configuration settings sourced in xdc/tools/cdoc/sg/Main.xdc
var Main = xdc.useModule('xdc.tools.cdoc.sg.Main');
module-wide functions
     Main.main// (Any args) returns Any
Main.main() // module-wide
index URL
Configuration settings
Main.main(Any args) returns Any
generated on Sun, 25 Nov 2018 22:18:49 GMT


package xdc.tools.check
index URL

Check compatibility of specified packages

  • USAGE
  • OPTIONS
  • DETAILS
This tools scans the specified repositories looking for package incompatibilities. [ more ... ]
XDCspec declarations sourced in xdc/tools/check/package.xdc
package xdc.tools.check [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.check [--help]
    [-[ax]] [-v] [-t target] [-e exclude_pattern] [-H header] [repository ...]
OPTIONS
-a
Return an array of strings
-v
Print informative messages during execution
-x
Return a Results struct as XML
-H
Prepend Header label to output
-e
Exclude packages or targets from checks

Do not check compatibility of packages or targets whose names match the regular expression exclude.

-m
Allow checking multiple versions of the same package

By default, when a package appears in more than repository named on the command line, this tool only checks the first occurance of the package. Setting this option forces all versions of all packages in the specified repositories to be included in the checks.

-t
Target to check

During the compatibility checks this tool ensures that for all targets used by all packages are compatible with the latest target referenced by any package. If this option is set, the check tool will only validate compatibility for the specified target. In addition, if the target string contains a target compatibility key, all packages that reference the target will be checked for compatibility with the specified key.

The format of this string is either

      <target_name>:<target_key>

or

      <target_name>

where <target_name> is the full name of a target and <target_key> is an optional target-specific compatibility key. The optional target compatibility key can be used to validate the set of packages against a specific compiler tool chain.

DETAILS
This tools scans the specified repositories looking for package incompatibilities.
By default, if a package appears in more than one repository, only the package in the first repository is added to the set of packages to check. This allows one to check the consistency of all packages that can be found along a specified package path by simply listing the package path repositories on the command line.
This tool performs the following checks:
  • the latest version of each target used by any package is compatible with all other versions used; and
  • the "built-with" versions of all packages are compatible with the versions of the packages contained in the specified repositories
If no repositories are specified, the repositories named in the current package path are checked.
generated on Sun, 25 Nov 2018 22:18:50 GMT


module xdc.tools.check.Main

metaonly module xdc.tools.check.Main
index URL

Command implementation

  • Configuration settings
  • Individual elements
This tools scans the specified repositories looking for package incompatibilities. [ more ... ]
Configuration settings sourced in xdc/tools/check/Main.xdc
var Main = xdc.useModule('xdc.tools.check.Main');
module-wide constants & types
    var obj = new Main.Results// XML output format;
        obj.header// user specified header = String ...
        obj.errors// array of all errors detected = String[] ...
        obj.warnings// array of all warnings detected = String[] ...
        obj.targets = Main.Target[] ...
    var obj = new Main.Target// ;
        obj.name// target name = String ...
        obj.keys = Main.__struct__1[] ...
            obj.keys.key// target compatibility key used = String ...
            obj.keys.packages// all packages using target with this key = String[] ...
module-wide config parameters
     Main.usage// Usage message = String[] [
        '[-[ax]] [-v] [-t target] [-e exclude_pattern] [-H header] [repository ...]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.arrFlag// Return an array of strings = Bool false;
        params.exclude// Exclude packages or targets from checks = String null;
        params.header// Prepend Header label to output = String null;
        params.multipleFlag// Allow checking multiple versions of the same package = Bool false;
        params.target// Target to check = String null;
        params.verboseFlag// Print informative messages during execution = Bool false;
        params.xmlFlag// Return a Results struct as XML = Bool false;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
This tools scans the specified repositories looking for package incompatibilities.
By default, if a package appears in more than one repository, only the package in the first repository is added to the set of packages to check. This allows one to check the consistency of all packages that can be found along a specified package path by simply listing the package path repositories on the command line.
This tool performs the following checks:
  • the latest version of each target used by any package is compatible with all other versions used; and
  • the "built-with" versions of all packages are compatible with the versions of the packages contained in the specified repositories
If no repositories are specified, the repositories named in the current package path are checked.
struct Main.Results
index URL

XML output format

Configuration settings
var obj = new Main.Results;
    obj.header = String ...
    // user specified header
    obj.errors = String[] ...
    // array of all errors detected
    obj.warnings = String[] ...
    // array of all warnings detected
    obj.targets = Main.Target[] ...
DETAILS
This structure defines the "schema" for the XML output.
struct Main.Target
index URL
Configuration settings
var obj = new Main.Target;
    obj.name = String ...
    // target name
    obj.keys = Main.__struct__1[] ...
        obj.keys.key = String ...
        // target compatibility key used
        obj.keys.packages = String[] ...
        // all packages using target with this key
config Main.usage // module-wide
index URL

Usage message

Configuration settings
Main.usage = String[] [
    '[-[ax]] [-v] [-t target] [-e exclude_pattern] [-H header] [repository ...]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.arrFlag = Bool false;
    // Return an array of strings
    params.exclude = String null;
    // Exclude packages or targets from checks
    params.header = String null;
    // Prepend Header label to output
    params.multipleFlag = Bool false;
    // Allow checking multiple versions of the same package
    params.target = String null;
    // Target to check
    params.verboseFlag = Bool false;
    // Print informative messages during execution
    params.xmlFlag = Bool false;
    // Return a Results struct as XML
config Main.Params.arrFlag // instance
index URL

Return an array of strings

Configuration settings
var params = new Main.Params;
...
params.arrFlag = Bool false;
config Main.Params.exclude // instance
index URL

Exclude packages or targets from checks

Configuration settings
var params = new Main.Params;
...
params.exclude = String null;
DETAILS
Do not check compatibility of packages or targets whose names match the regular expression exclude.
config Main.Params.header // instance
index URL

Prepend Header label to output

Configuration settings
var params = new Main.Params;
...
params.header = String null;
config Main.Params.multipleFlag // instance
index URL

Allow checking multiple versions of the same package

Configuration settings
var params = new Main.Params;
...
params.multipleFlag = Bool false;
DETAILS
By default, when a package appears in more than repository named on the command line, this tool only checks the first occurance of the package. Setting this option forces all versions of all packages in the specified repositories to be included in the checks.
config Main.Params.target // instance
index URL

Target to check

Configuration settings
var params = new Main.Params;
...
params.target = String null;
DETAILS
During the compatibility checks this tool ensures that for all targets used by all packages are compatible with the latest target referenced by any package. If this option is set, the check tool will only validate compatibility for the specified target. In addition, if the target string contains a target compatibility key, all packages that reference the target will be checked for compatibility with the specified key.
The format of this string is either
      <target_name>:<target_key>
or
      <target_name>
where <target_name> is the full name of a target and <target_key> is an optional target-specific compatibility key. The optional target compatibility key can be used to validate the set of packages against a specific compiler tool chain.
config Main.Params.verboseFlag // instance
index URL

Print informative messages during execution

Configuration settings
var params = new Main.Params;
...
params.verboseFlag = Bool false;
config Main.Params.xmlFlag // instance
index URL

Return a Results struct as XML

Configuration settings
var params = new Main.Params;
...
params.xmlFlag = Bool false;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:50 GMT


package xdc.tools.closure
index URL

A command line tool that creates 100% self-contained configurations

This package contains a command line tool that creates a "closure" containing all packages loaded in the process of configuring an application and replaces all absolute path references with references withing the closure.
XDCspec declarations sourced in xdc/tools/closure/package.xdc
requires xdc.tools.path;
requires xdc.tools.repoman;
package xdc.tools.closure [1, 0, 0] {
    module Main;
    // Creates a directory containing all packages/files referenced by a configuration
}
generated on Sun, 25 Nov 2018 22:18:52 GMT


module xdc.tools.closure.Main

metaonly module xdc.tools.closure.Main
index URL

Creates a directory containing all packages/files referenced by a configuration

  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
The purpose of this tool is to build a single directory containing all packages loaded in the process of configuring an application. The bundle is built in a user-selected repository, which can be then relocated to a different location or to a different host, where the application being configured can be recompiled and relinked. [ more ... ]
Configuration settings sourced in xdc/tools/closure/Main.xdc
var Main = xdc.useModule('xdc.tools.closure.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '[-v] [--filter=N] [-i pkg1 [-i pkg2 ...]] [-d dst_dir] package_base_dir'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.aggFilter// Alias for --filter=5 = Bool false;
        params.destination// Name of the destination directory = String "";
        params.filter// Set the level of deleting nonessential files = UInt 3;
        params.includes// Additional packages to be included in the bundle = String[] [ ];
        params.verboseFlag// Print informative messages during execution = Bool false;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
The purpose of this tool is to build a single directory containing all packages loaded in the process of configuring an application. The bundle is built in a user-selected repository, which can be then relocated to a different location or to a different host, where the application being configured can be recompiled and relinked.
The closure tool can run only after xdc.tools.configuro runs and finishes the configuration step. Then, `xdc.tools.closure' detects all packages involved in the configuration and copies them to a new repository. All absolute paths in the relevant generated files that could be accessed by the user's makefile, when the application is rebuilt, are transformed into the paths relative to the the directory containing the closed bundle.
Some files in the copied packages are deleted to keep the size of the closed bundle manageable. The default filtering setting causes only selected files to be deleted, for example C sources or object files that are copied into a library. A user has an option of requesting other evels of filtering from not filtering anything to the most aggressive filtering of files, which leaves in the closed bundle only header files and libraries referenced by linker command files. Here are the filtering levels:
  • 0 - all files are preserved
  • 1 - C/C++ sources, object files, Java sources and class files, PDF files and internal RTSC files are deleted
  • 2 - left for future expansion, currently same as 1
  • 3 - libraries not referenced by the linker command file are also deleted
  • 4 - same as 3
  • 5 - only rov.xs file used by the ROV tools is left
  • 6 - all nonessential file are removed
  • 7+ - same as 6
EXAMPLES
      xs xdc.tools.configuro -t gnu.targets.arm.GCArmv6 -o configPkg
      xs xdc.tools.closure -d D:/bundle C:/examples/memory/configPkg
After xdc.tools.configuro creates a configuration in configPkg, xdc.tools.closure gathers all packages loaded during the configuration into a repository located in D:/bundle.
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '[-v] [--filter=N] [-i pkg1 [-i pkg2 ...]] [-d dst_dir] package_base_dir'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.aggFilter = Bool false;
    // Alias for --filter=5
    params.destination = String "";
    // Name of the destination directory
    params.filter = UInt 3;
    // Set the level of deleting nonessential files
    params.includes = String[] [ ];
    // Additional packages to be included in the bundle
    params.verboseFlag = Bool false;
    // Print informative messages during execution
config Main.Params.aggFilter // instance
index URL

Alias for --filter=5

Configuration settings
var params = new Main.Params;
...
params.aggFilter = Bool false;
DETAILS
This flag was used for requesting aggressive filtering. It was superceded by 'filter'.
config Main.Params.destination // instance
index URL

Name of the destination directory

Configuration settings
var params = new Main.Params;
...
params.destination = String "";
config Main.Params.filter // instance
index URL

Set the level of deleting nonessential files

Configuration settings
var params = new Main.Params;
...
params.filter = UInt 3;
DETAILS
Library and header files are the only files that must be present for the bundle generated by this tool to be used when building an application. Other files are optional, and might be used by other tools if present. The levels of filtering that can be specified by this parameter are: 0 - all files are preserved 1 - C sources, object files, Java sources and class files, PDF files and internal RTSC files are deleted 2 - left for future expansion, currently same as 1 3 - libraries not referenced by the linker command file are also deleted 4 - same as 3 5 - only rov.xs file used by the ROV tools is left 6 - all nonessential file are removed 7+ - same as 6
config Main.Params.includes // instance
index URL

Additional packages to be included in the bundle

Configuration settings
var params = new Main.Params;
...
params.includes = String[] [ ];
config Main.Params.verboseFlag // instance
index URL

Print informative messages during execution

Configuration settings
var params = new Main.Params;
...
params.verboseFlag = Bool false;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:52 GMT


package xdc.tools.configuro
index URL

Command-line configuration tool

  • USAGE
  • OPTIONS
  • DETAILS
  • INPUTS
  • OUTPUTS
This command allows RTSC content, in the form of reusable modules built using the XDCtools tooling, to be imported into a system integrator's embedded application. It is the recommended method for integrating RTSC content into non-RTSC application build environments. [ more ... ]
XDCspec declarations sourced in xdc/tools/configuro/package.xdc
requires xdc.tools.mkpkg;
package xdc.tools.configuro [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.configuro [--help]
    [-v | -q]
    [-@ optionsfile]
    [-o outdir]
    [-b config_bld | -c codegen_dir | --cb]
    [-t target] [-p platform[:instance]] [-r profile]
    [-Dname=value]
    [-w | -x regexp]
    [--rtsName pkg_name]
    [--cfgArgs args_string]
    [--linkTemplate linker_template]
    [--pkg] [--generationOnly]
    [--compileOptions compile_options_string]
    [--linkOptions linker_options_string]
    [--oc compiler.opt] [--ol linker.cmd]
    infile.cfg
OPTIONS
-o
Pathname of the output directory

A directory containing the generated build artifacts, in particular the compiler.opt and linker.cmd files.

The last component of the output directory path must be a valid ANSI C identifier; i.e., it must consist entirely of alphanumeric or '_' characters and must not start with a number. So, the names '0app' and 'app-test' are not valid but '0app/config' and 'app-test/config' are valid.

By default, the output directory has the same name as the configuration script, minus the .cfg extension, within the same parent directory as this script. As a result, the directory name constraint above applies to the name of the configuration script.

-t
Name of the RTSC target module

The name of a RTSC target module to use, for example ti.targets.C64P.

If no config.bld file is given, then this is a required parameter.

If a config.bld file is given then this parameter is optional, and by default the target will be Build.targets[0] from the user's config.bld. If Build.targets contains more than one entry, then this option can be used to override that default.

-c
Root directory of the code generation tools

The path to the installation directory of the compiler and linker for the selected target. The definition of "installation directory" can vary from compiler to compiler, but is most commonly the directory that contains a "bin" subdirectory.

If no config.bld file is given, then this is a required parameter.

If a config.bld file is given then this parameter is optional, and by default the compiler will be the one configured there. This option can still be used, to override the default established in config.bld.

-p
Name of the RTSC platform package (and optionally instance)

The name of a RTSC platform package to use, using the syntax my.pkg.name or my.pkg.name:instanceName. For example, ti.platforms.sim64Pxx or ti.platforms.generic:custom.

This is an optional parameter, and by default the platform is the one that the selected target names as its default. The user may override this default in their config.bld or by using this parameter.

The optional :instanceName suffix names a pre-configured variant of the platform, which can be set up either in the user's config.bld or in the platform package itself. For more details, see Build.platformTable and the IPlatform interface.

-r
Build profile to use

The name of the build profile to use for the RTSC content, for example 'release' or 'debug'. The list of allowed profiles is determined by the RTSC target module named.

-b
Read build environment from the named config.bld file

A config.bld file can optionally be used to hold the values of the target, compiler root directory, platform, and other more advanced options. This is a convenient way to share a common build environment between multiple projects.

The format of the file is JavaScript statements with the XDCscript extensions. The script should set the properties of the Build global object.

If no config.bld file is given then the target and compiler root directory are required command-line parameters.

--cb
Use a config.bld found along the package path

Find a config.bld by searching the package path, instead of via an explicit pathname. Looks for a file named config.bld in any of the directories named along the package path, in order. The directories are not searched recursively.

-D
Set a Java property in the configuration script

Allows values to be injected from the command line into the config.bld file. For example, the option -Dmyprop=myval creates a property named myprop with string value "myval". This can be read in config.bld using the XDCscript syntax environment["myprop"].

--rtsName
Set the name of the RTSC runtime package

The name of a package containing pre-built libraries containing the xdc.runtime modules. If this parameter is null (or undefined) the name of the rts package is taken from the target (xdc.bld.ITarget.rtsName). If this parameter is set to the empty string (""), then no rts package is included in the configuration. Finally, if this parameter is non-null and non-empty, it should be the name of a package along the package path that can supply pre-built versions of the modules in the xdc.runtime package.

--cfgArgs
Optional arguments passed to configuration script

This option lets the user pass values into the configuration script from the command line. The argument is an expression in JavaScript syntax. Its value is available in the configuration script under the name Program.build.cfgArgs.

The JavaScript expression is evaluated in the configuration domain after the platform package is imported, immediately before calling the user's configuration script.

This string has the same effect as the cfgArgs string in xdc.bld.Executable.Attrs.

You can pass multiple values to configuration scripts using the syntax of a JavaScript Object constant:

      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ... app.cfg

The configuration script can read the various fields as, e.g.:

      if (Program.build.cfgArgs.foo == "hello") {
          :
      }

--linkTemplate
Linker command file template

If this option is provided it overrides the template supplied by the platform, giving the caller complete control over the generated linker command file.

-v
Show verbose details during build

This option produces the same verbose output as the xdc command with the XDCOPTIONS=v parameter.

-q
Minimize details during build

This option produces the same output as the xdc command with the XDCOPTIONS=qq parameter.

-x
Exclude packages matching regexp from compatibility checking

A JavaScript regular expression that is used to select packages that should be excluded from the set of packages checked during configuration.

-w
Treat package version incompatibilites as warnings

If set to "true", force any incompatibilities detected to be treated as warnings only; otherwise incompatibilities are fatal.

--pkg
Create the build model generated output files but do not build

This option creates the output directory and key generated files but does not process the user's configuration script. It is used by internal tooling to snapshot the RTSC build settings implied by the configuro command line parameters.

--generationOnly
Create the configuration generated source files but do not build

This option runs the configuration step but does not compile the generated source files. This option is used by internal tooling to eliminate unnecessary build steps.

--compileOptions
Add compile options for C files in the configuration package

This option accepts one or more compiler options that are added to the compiler command line when compiling C files in the generated configuration package. If multiple compiler options are given, the whole string containing options must be surrounded by quotes.

--linkOptions
Add linker options for libraries in the configuration package

This option accepts one or more linker options which are used to pull in the correct libraries during link. If multiple linker options are given, the whole string containing options must be surrounded by quotes.

--oc
Set the name of the compiler options file (default is "compiler.opt")
--ol
Set the name of the linker command file (default is "linker.cmd")
DETAILS
This command allows RTSC content, in the form of reusable modules built using the XDCtools tooling, to be imported into a system integrator's embedded application. It is the recommended method for integrating RTSC content into non-RTSC application build environments.
Configuro lets the system integrator identify and customize the RTSC content they wish to use, and computes a set of libraries, command-line flags and other artifacts to include in their application build. By changing the values of configuration settings, the integrator can trade off the functionality, memory footprint, and even performance of the RTSC content to best meet the needs of their application.
INPUTS
infile.cfg
A user-supplied configuration script that names a set of RTSC modules, and optionally changes their configuration settings.
OUTPUTS
outdir/
A directory containing all generated build artifacts.
outdir/compiler.opt
A file containing C compiler command-line flags. These flags must included on the compiler command line for any C source file that directly accesses the RTSC content. The flags define the header file include paths, and machine-mode compiler flags to ensure object code compatibility between all included content.
outdir/linker.cmd
A file containing linker command-line flags. These flags must be included on the linker command line for the final link of the application. The flags list needed libraries and object files, and on some platforms define the embedded system memory map.
For example:
      xs xdc.tools.configuro myconfig.cfg
generated on Sun, 25 Nov 2018 22:18:49 GMT


module xdc.tools.configuro.Main

metaonly module xdc.tools.configuro.Main
index URL

Command implementation

  • DETAILS
  • INPUTS
  • OUTPUTS
  • Configuration settings
  • Individual elements
This command allows RTSC content, in the form of reusable modules built using the XDCtools tooling, to be imported into a system integrator's embedded application. It is the recommended method for integrating RTSC content into non-RTSC application build environments. [ more ... ]
Configuration settings sourced in xdc/tools/configuro/Main.xdc
var Main = xdc.useModule('xdc.tools.configuro.Main');
module-wide config parameters
     Main.usage// usage help message = String[] [
        '[-v | -q]',
        '[-@ optionsfile]',
        '[-o outdir]',
        '[-b config_bld | -c codegen_dir | --cb]',
        '[-t target] [-p platform[:instance]] [-r profile]',
        '[-Dname=value]',
        '[-w | -x regexp]',
        '[--rtsName pkg_name]',
        '[--cfgArgs args_string]',
        '[--linkTemplate linker_template]',
        '[--pkg] [--generationOnly]',
        '[--compileOptions compile_options_string]',
        '[--linkOptions linker_options_string]',
        '[--oc compiler.opt] [--ol linker.cmd]',
        'infile.cfg'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.cfgArgs// Optional arguments passed to configuration script = String null;
        params.compileOptions// Add compile options for C files in the configuration package = String "";
        params.compilerOptionsFile// Set the name of the compiler options file (default is "compiler.opt") = String "compiler.opt";
        params.configbld// Read build environment from the named config.bld file = String null;
        params.defines// Set a Java property in the configuration script = String[] [ ];
        params.exclude// Exclude packages matching regexp from compatibility checking = String null;
        params.generationOnly// Create the configuration generated source files but do not build = Bool false;
        params.linkOptions// Add linker options for libraries in the configuration package = String "";
        params.linkTemplate// Linker command file template = String null;
        params.linkerCommandFile// Set the name of the linker command file (default is "linker.cmd") = String "linker.cmd";
        params.mkPkgOnly// Create the build model generated output files but do not build = Bool false;
        params.output// Pathname of the output directory = String null;
        params.platform// Name of the RTSC platform package (and optionally instance) = String null;
        params.profile// Build profile to use = String 'release';
        params.quiet// Minimize details during build = Bool false;
        params.rootdir// Root directory of the code generation tools = String null;
        params.rtsName// Set the name of the RTSC runtime package = String null;
        params.searchForConfigBld// Use a config.bld found along the package path = Bool false;
        params.target// Name of the RTSC target module = String null;
        params.verbose// Show verbose details during build = Bool false;
        params.warn// Treat package version incompatibilites as warnings = Bool false;
per-instance functions
     inst.gen// Generate and build the configuration package(String infile) returns Int
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
This command allows RTSC content, in the form of reusable modules built using the XDCtools tooling, to be imported into a system integrator's embedded application. It is the recommended method for integrating RTSC content into non-RTSC application build environments.
Configuro lets the system integrator identify and customize the RTSC content they wish to use, and computes a set of libraries, command-line flags and other artifacts to include in their application build. By changing the values of configuration settings, the integrator can trade off the functionality, memory footprint, and even performance of the RTSC content to best meet the needs of their application.
INPUTS
infile.cfg
A user-supplied configuration script that names a set of RTSC modules, and optionally changes their configuration settings.
OUTPUTS
outdir/
A directory containing all generated build artifacts.
outdir/compiler.opt
A file containing C compiler command-line flags. These flags must included on the compiler command line for any C source file that directly accesses the RTSC content. The flags define the header file include paths, and machine-mode compiler flags to ensure object code compatibility between all included content.
outdir/linker.cmd
A file containing linker command-line flags. These flags must be included on the linker command line for the final link of the application. The flags list needed libraries and object files, and on some platforms define the embedded system memory map.
For example:
      xs xdc.tools.configuro myconfig.cfg
config Main.usage // module-wide
index URL

usage help message

Configuration settings
Main.usage = String[] [
    '[-v | -q]',
    '[-@ optionsfile]',
    '[-o outdir]',
    '[-b config_bld | -c codegen_dir | --cb]',
    '[-t target] [-p platform[:instance]] [-r profile]',
    '[-Dname=value]',
    '[-w | -x regexp]',
    '[--rtsName pkg_name]',
    '[--cfgArgs args_string]',
    '[--linkTemplate linker_template]',
    '[--pkg] [--generationOnly]',
    '[--compileOptions compile_options_string]',
    '[--linkOptions linker_options_string]',
    '[--oc compiler.opt] [--ol linker.cmd]',
    'infile.cfg'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.cfgArgs = String null;
    // Optional arguments passed to configuration script
    params.compileOptions = String "";
    // Add compile options for C files in the configuration package
    params.compilerOptionsFile = String "compiler.opt";
    // Set the name of the compiler options file (default is "compiler.opt")
    params.configbld = String null;
    // Read build environment from the named config.bld file
    params.defines = String[] [ ];
    // Set a Java property in the configuration script
    params.exclude = String null;
    // Exclude packages matching regexp from compatibility checking
    params.generationOnly = Bool false;
    // Create the configuration generated source files but do not build
    params.linkOptions = String "";
    // Add linker options for libraries in the configuration package
    params.linkTemplate = String null;
    // Linker command file template
    params.linkerCommandFile = String "linker.cmd";
    // Set the name of the linker command file (default is "linker.cmd")
    params.mkPkgOnly = Bool false;
    // Create the build model generated output files but do not build
    params.output = String null;
    // Pathname of the output directory
    params.platform = String null;
    // Name of the RTSC platform package (and optionally instance)
    params.profile = String 'release';
    // Build profile to use
    params.quiet = Bool false;
    // Minimize details during build
    params.rootdir = String null;
    // Root directory of the code generation tools
    params.rtsName = String null;
    // Set the name of the RTSC runtime package
    params.searchForConfigBld = Bool false;
    // Use a config.bld found along the package path
    params.target = String null;
    // Name of the RTSC target module
    params.verbose = Bool false;
    // Show verbose details during build
    params.warn = Bool false;
    // Treat package version incompatibilites as warnings
config Main.Params.cfgArgs // instance
index URL

Optional arguments passed to configuration script

Configuration settings
var params = new Main.Params;
...
params.cfgArgs = String null;
DETAILS
This option lets the user pass values into the configuration script from the command line. The argument is an expression in JavaScript syntax. Its value is available in the configuration script under the name Program.build.cfgArgs.
The JavaScript expression is evaluated in the configuration domain after the platform package is imported, immediately before calling the user's configuration script.
This string has the same effect as the cfgArgs string in xdc.bld.Executable.Attrs.
You can pass multiple values to configuration scripts using the syntax of a JavaScript Object constant:
      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ... app.cfg
The configuration script can read the various fields as, e.g.:
      if (Program.build.cfgArgs.foo == "hello") {
          :
      }
NOTE
Different command line shells, such as UNIX bash verses Windows cmd.exe, interpret quotes on the command line very differently. As a result, the syntax necessary to pass a string such as "hello" to configuro can vary depending on the shell you use.
For most UNIX shells, it is possible to use single quotes around the use of double quotes as in the example above. However, since Windows cmd.exe does not treat the single quote as a special character, it is necessary to use a backslash, '\', to ensure that the double quote characters are passed to the configuro tool.
Windows cmd.exe:
      xs xdc.tools.configuro --cfgArgs "{foo:\"hello\", bar:2}" ...
UNIX bash, ksh, csh, ...:
      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ...
SEE
xdc.bld.Executable.Attrs
config Main.Params.compileOptions // instance
index URL

Add compile options for C files in the configuration package

Configuration settings
var params = new Main.Params;
...
params.compileOptions = String "";
DETAILS
This option accepts one or more compiler options that are added to the compiler command line when compiling C files in the generated configuration package. If multiple compiler options are given, the whole string containing options must be surrounded by quotes.
config Main.Params.compilerOptionsFile // instance
index URL

Set the name of the compiler options file (default is "compiler.opt")

Configuration settings
var params = new Main.Params;
...
params.compilerOptionsFile = String "compiler.opt";
config Main.Params.configbld // instance
index URL

Read build environment from the named config.bld file

Configuration settings
var params = new Main.Params;
...
params.configbld = String null;
DETAILS
A config.bld file can optionally be used to hold the values of the target, compiler root directory, platform, and other more advanced options. This is a convenient way to share a common build environment between multiple projects.
The format of the file is JavaScript statements with the XDCscript extensions. The script should set the properties of the Build global object.
If no config.bld file is given then the target and compiler root directory are required command-line parameters.
config Main.Params.defines // instance
index URL

Set a Java property in the configuration script

Configuration settings
var params = new Main.Params;
...
params.defines = String[] [ ];
DETAILS
Allows values to be injected from the command line into the config.bld file. For example, the option -Dmyprop=myval creates a property named myprop with string value "myval". This can be read in config.bld using the XDCscript syntax environment["myprop"].
config Main.Params.exclude // instance
index URL

Exclude packages matching regexp from compatibility checking

Configuration settings
var params = new Main.Params;
...
params.exclude = String null;
DETAILS
A JavaScript regular expression that is used to select packages that should be excluded from the set of packages checked during configuration.
SEE
xdc.cfg
config Main.Params.generationOnly // instance
index URL

Create the configuration generated source files but do not build

Configuration settings
var params = new Main.Params;
...
params.generationOnly = Bool false;
DETAILS
This option runs the configuration step but does not compile the generated source files. This option is used by internal tooling to eliminate unnecessary build steps.
config Main.Params.linkOptions // instance
index URL

Add linker options for libraries in the configuration package

Configuration settings
var params = new Main.Params;
...
params.linkOptions = String "";
DETAILS
This option accepts one or more linker options which are used to pull in the correct libraries during link. If multiple linker options are given, the whole string containing options must be surrounded by quotes.
config Main.Params.linkTemplate // instance
index URL

Linker command file template

Configuration settings
var params = new Main.Params;
...
params.linkTemplate = String null;
DETAILS
If this option is provided it overrides the template supplied by the platform, giving the caller complete control over the generated linker command file.
SEE
xdc.cfg.Program.linkTemplate
config Main.Params.linkerCommandFile // instance
index URL

Set the name of the linker command file (default is "linker.cmd")

Configuration settings
var params = new Main.Params;
...
params.linkerCommandFile = String "linker.cmd";
config Main.Params.mkPkgOnly // instance
index URL

Create the build model generated output files but do not build

Configuration settings
var params = new Main.Params;
...
params.mkPkgOnly = Bool false;
DETAILS
This option creates the output directory and key generated files but does not process the user's configuration script. It is used by internal tooling to snapshot the RTSC build settings implied by the configuro command line parameters.
config Main.Params.output // instance
index URL

Pathname of the output directory

Configuration settings
var params = new Main.Params;
...
params.output = String null;
DETAILS
A directory containing the generated build artifacts, in particular the compiler.opt and linker.cmd files.
The last component of the output directory path must be a valid ANSI C identifier; i.e., it must consist entirely of alphanumeric or '_' characters and must not start with a number. So, the names '0app' and 'app-test' are not valid but '0app/config' and 'app-test/config' are valid.
By default, the output directory has the same name as the configuration script, minus the .cfg extension, within the same parent directory as this script. As a result, the directory name constraint above applies to the name of the configuration script.
config Main.Params.platform // instance
index URL

Name of the RTSC platform package (and optionally instance)

Configuration settings
var params = new Main.Params;
...
params.platform = String null;
DETAILS
The name of a RTSC platform package to use, using the syntax my.pkg.name or my.pkg.name:instanceName. For example, ti.platforms.sim64Pxx or ti.platforms.generic:custom.
This is an optional parameter, and by default the platform is the one that the selected target names as its default. The user may override this default in their config.bld or by using this parameter.
The optional :instanceName suffix names a pre-configured variant of the platform, which can be set up either in the user's config.bld or in the platform package itself. For more details, see Build.platformTable and the IPlatform interface.
config Main.Params.profile // instance
index URL

Build profile to use

Configuration settings
var params = new Main.Params;
...
params.profile = String 'release';
DETAILS
The name of the build profile to use for the RTSC content, for example 'release' or 'debug'. The list of allowed profiles is determined by the RTSC target module named.
config Main.Params.quiet // instance
index URL

Minimize details during build

Configuration settings
var params = new Main.Params;
...
params.quiet = Bool false;
DETAILS
This option produces the same output as the xdc command with the XDCOPTIONS=qq parameter.
config Main.Params.rootdir // instance
index URL

Root directory of the code generation tools

Configuration settings
var params = new Main.Params;
...
params.rootdir = String null;
DETAILS
The path to the installation directory of the compiler and linker for the selected target. The definition of "installation directory" can vary from compiler to compiler, but is most commonly the directory that contains a "bin" subdirectory.
If no config.bld file is given, then this is a required parameter.
If a config.bld file is given then this parameter is optional, and by default the compiler will be the one configured there. This option can still be used, to override the default established in config.bld.
config Main.Params.rtsName // instance
index URL

Set the name of the RTSC runtime package

Configuration settings
var params = new Main.Params;
...
params.rtsName = String null;
DETAILS
The name of a package containing pre-built libraries containing the xdc.runtime modules. If this parameter is null (or undefined) the name of the rts package is taken from the target (xdc.bld.ITarget.rtsName). If this parameter is set to the empty string (""), then no rts package is included in the configuration. Finally, if this parameter is non-null and non-empty, it should be the name of a package along the package path that can supply pre-built versions of the modules in the xdc.runtime package.
SEE
xdc.bld.ITarget.rtsName, xdc.bld.Executable.Attrs
config Main.Params.searchForConfigBld // instance
index URL

Use a config.bld found along the package path

Configuration settings
var params = new Main.Params;
...
params.searchForConfigBld = Bool false;
DETAILS
Find a config.bld by searching the package path, instead of via an explicit pathname. Looks for a file named config.bld in any of the directories named along the package path, in order. The directories are not searched recursively.
config Main.Params.target // instance
index URL

Name of the RTSC target module

Configuration settings
var params = new Main.Params;
...
params.target = String null;
DETAILS
The name of a RTSC target module to use, for example ti.targets.C64P.
If no config.bld file is given, then this is a required parameter.
If a config.bld file is given then this parameter is optional, and by default the target will be Build.targets[0] from the user's config.bld. If Build.targets contains more than one entry, then this option can be used to override that default.
config Main.Params.verbose // instance
index URL

Show verbose details during build

Configuration settings
var params = new Main.Params;
...
params.verbose = Bool false;
DETAILS
This option produces the same verbose output as the xdc command with the XDCOPTIONS=v parameter.
config Main.Params.warn // instance
index URL

Treat package version incompatibilites as warnings

Configuration settings
var params = new Main.Params;
...
params.warn = Bool false;
DETAILS
If set to "true", force any incompatibilities detected to be treated as warnings only; otherwise incompatibilities are fatal.
SEE
xdc.cfg
Main.gen() // instance
index URL

Generate and build the configuration package

Configuration settings
inst.gen(String infile) returns Int
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:49 GMT


package xdc.tools.path
index URL

Package Repository Path Display Tool

  • USAGE
  • OPTIONS
  • DETAILS
  • EXAMPLES
  • SEE
This tool displays the packages located along the specified package repository path. Repositories can be specified by explicitly naming them via the -Pr option or implicitly by not passing -Pr; in this case, the set of repositories searched corresponds to the set of repositories defined by the current package path: [ more ... ]
XDCspec declarations sourced in xdc/tools/path/package.xdc
requires xdc.tools;
package xdc.tools.path [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.path [--help]
    [-n] [-x] [-v] [-H header] [-p] [-c] [-P package_base_dir ...|-Pr repository ...|-PR directory ...]
OPTIONS
-p
Echo path
-n
Display package names only
-a
Return an array of strings
-x
Return a Results struct as XML
-v
Print informative messages during execution
-H
Header label
-Pr, -d
Use specified directory args instead of xdc.path
-PR
Recursively find all packages

Recursively descend into specified directories and find every package, including packages whose repository is not one of the specified directories.

-P
Only display information for the package directories
-c, --checkpath
Check repositories for possible errors
DETAILS
This tool displays the packages located along the specified package repository path. Repositories can be specified by explicitly naming them via the -Pr option or implicitly by not passing -Pr; in this case, the set of repositories searched corresponds to the set of repositories defined by the current package path:
      $XDCPATH;$XDCROOT/packages;^
where $XDCPATH is the value of the the user settable prefix of the package path, $XDCROOT is the installation directory of the XDC tools, and ^ is the repository of the package in the current working directory (if it exists).
EXAMPLES
1. To display information about the packages on the package path (in this example, the package path is just C:/xdc-o00/packages):
    xs xdc.tools.path
Output:
    Package Name:      gnu.gdb.jserver
    Repository:        C:/xdc-o00/packages
    Release Name:      gnu_gdb_jserver
    Label:             default
    Compatibility Key: 1, 0, 0, 0, 87
    Date:              11/20/2006  20:38

    Package Name:      gnu.targets
    Repository:        C:/xdc-o00/packages
    Release Name:      gnu_targets
    Label:             default
    Compatibility Key: 1, 0, 0, 0, 194
    Date:              11/20/2006  20:38
2. To display the names of the packages on the package path (in this example, the package path is just C:/xdc-o00/packages):
    xs xdc.tools.path -n
Output:
    gnu.gdb.jserver
    gnu.targets
    gnu.targets.rts470MV
    gnu.targets.rts470uC
    gnu.targets.rts5
3. To simply, echo the current package path:
    xs xdc.tools.path -p
Output:
    C:/xdc-o00/packages
4. To display information about the packages "rooted" in the repository C:/CCStudio_v3.3/bios_5_31/packages:
    xs xdc.tools.path -Pr C:/CCStudio_v3.3/bios_5_31/packages
Output:
    Package Name:      ti.platforms.dsk5402
    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
    Release Name:      ti_platforms_dsk5402
    Label:             default
    Compatibility Key: 1, 0, 0, 24
    Date:              05/11/2006  19:10

    Package Name:      ti.platforms.dsk5416
    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
    Release Name:      ti_platforms_dsk5416
    Label:             default
    Compatibility Key: 1, 0, 0, 24
    Date:              05/11/2006  19:10

    Package Name:      ti.platforms.dsk5510
    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
    Release Name:      ti_platforms_dsk5510
    Label:             default
    Compatibility Key: 1, 0, 0, 24
    Date:              05/11/2006  19:10
5. To display the names of all packages in or below the directory C:/CCStudio_v3.3/bios_5_31/packages:
    xs xdc.tools.path -n -PR C:/CCStudio_v3.3/bios_5_31/packages
Output:
    ti.platforms.dsk5402
    ti.platforms.dsk5416
    ti.platforms.dsk5510
    ti.platforms.dsk6211
SEE
xdc.tools.path
generated on Sun, 25 Nov 2018 22:18:50 GMT


module xdc.tools.path.Main

metaonly module xdc.tools.path.Main
index URL

Command implementation

  • DETAILS
  • EXAMPLES
  • SEE
  • Configuration settings
  • Individual elements
This tool displays the packages located along the specified package repository path. Repositories can be specified by explicitly naming them via the -Pr option or implicitly by not passing -Pr; in this case, the set of repositories searched corresponds to the set of repositories defined by the current package path: [ more ... ]
Configuration settings sourced in xdc/tools/path/Main.xdc
var Main = xdc.useModule('xdc.tools.path.Main');
module-wide constants & types
    var obj = new Main.CheckResults// ;
        obj.repository = String ...
        obj.warnings = String[] ...
    var obj = new Main.DirResults// return value for xml directory echo;
        obj.header// user-specified header = String ...
        obj.dir// array of package base directories = String[] ...
        obj.checkResults = Main.CheckResults[] ...
    var obj = new Main.NameResults// return value for xml package names;
        obj.header// user-specified header = String ...
        obj.path// package path = String ...
        obj.name// array of names = String[] ...
        obj.checkResults = Main.CheckResults[] ...
    var obj = new Main.PathResults// return value for xml package path;
        obj.header// user-specified header = String ...
        obj.path// package path = String ...
        obj.checkResults = Main.CheckResults[] ...
    var obj = new Main.Pkg// struct used for xml package info;
        obj.name = String ...
        obj.repository = String ...
        obj.release = String ...
        obj.label = String ...
        obj.key = String ...
        obj.date = String ...
        obj.providerId = String ...
        obj.originalProviderId = String ...
        obj.producerId = String ...
    var obj = new Main.Results// return value for xml package info;
        obj.header// user-specified header = String ...
        obj.path// package path = String ...
        obj.pkg// array of packages = Main.Pkg[] ...
        obj.checkResults = Main.CheckResults[] ...
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '[-n] [-x] [-v] [-H header] [-p] [-c] [-P package_base_dir ...|-Pr repository ...|-PR directory ...]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.arrFlag// Return an array of strings = Bool false;
        params.checkFlag// Check repositories for possible errors = Bool false;
        params.directoriesFlag// Only display information for the package directories = Bool false;
        params.header// Header label = String null;
        params.pathFlag// Echo path = Bool false;
        params.recurseFlag// Recursively find all packages = Bool false;
        params.repositoriesFlag// Use specified directory args instead of xdc.path = Bool false;
        params.shortFlag// Display package names only = Bool false;
        params.verboseFlag// Print informative messages during execution = Bool false;
        params.xmlFlag// Return a Results struct as XML = Bool false;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
This tool displays the packages located along the specified package repository path. Repositories can be specified by explicitly naming them via the -Pr option or implicitly by not passing -Pr; in this case, the set of repositories searched corresponds to the set of repositories defined by the current package path:
      $XDCPATH;$XDCROOT/packages;^
where $XDCPATH is the value of the the user settable prefix of the package path, $XDCROOT is the installation directory of the XDC tools, and ^ is the repository of the package in the current working directory (if it exists).
EXAMPLES
1. To display information about the packages on the package path (in this example, the package path is just C:/xdc-o00/packages):
    xs xdc.tools.path
Output:
    Package Name:      gnu.gdb.jserver
    Repository:        C:/xdc-o00/packages
    Release Name:      gnu_gdb_jserver
    Label:             default
    Compatibility Key: 1, 0, 0, 0, 87
    Date:              11/20/2006  20:38

    Package Name:      gnu.targets
    Repository:        C:/xdc-o00/packages
    Release Name:      gnu_targets
    Label:             default
    Compatibility Key: 1, 0, 0, 0, 194
    Date:              11/20/2006  20:38
2. To display the names of the packages on the package path (in this example, the package path is just C:/xdc-o00/packages):
    xs xdc.tools.path -n
Output:
    gnu.gdb.jserver
    gnu.targets
    gnu.targets.rts470MV
    gnu.targets.rts470uC
    gnu.targets.rts5
3. To simply, echo the current package path:
    xs xdc.tools.path -p
Output:
    C:/xdc-o00/packages
4. To display information about the packages "rooted" in the repository C:/CCStudio_v3.3/bios_5_31/packages:
    xs xdc.tools.path -Pr C:/CCStudio_v3.3/bios_5_31/packages
Output:
    Package Name:      ti.platforms.dsk5402
    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
    Release Name:      ti_platforms_dsk5402
    Label:             default
    Compatibility Key: 1, 0, 0, 24
    Date:              05/11/2006  19:10

    Package Name:      ti.platforms.dsk5416
    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
    Release Name:      ti_platforms_dsk5416
    Label:             default
    Compatibility Key: 1, 0, 0, 24
    Date:              05/11/2006  19:10

    Package Name:      ti.platforms.dsk5510
    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
    Release Name:      ti_platforms_dsk5510
    Label:             default
    Compatibility Key: 1, 0, 0, 24
    Date:              05/11/2006  19:10
5. To display the names of all packages in or below the directory C:/CCStudio_v3.3/bios_5_31/packages:
    xs xdc.tools.path -n -PR C:/CCStudio_v3.3/bios_5_31/packages
Output:
    ti.platforms.dsk5402
    ti.platforms.dsk5416
    ti.platforms.dsk5510
    ti.platforms.dsk6211
SEE
xdc.tools.path
struct Main.CheckResults
index URL
Configuration settings
var obj = new Main.CheckResults;
    obj.repository = String ...
    obj.warnings = String[] ...
struct Main.DirResults
index URL

return value for xml directory echo

Configuration settings
var obj = new Main.DirResults;
    obj.header = String ...
    // user-specified header
    obj.dir = String[] ...
    // array of package base directories
    obj.checkResults = Main.CheckResults[] ...
struct Main.NameResults
index URL

return value for xml package names

Configuration settings
var obj = new Main.NameResults;
    obj.header = String ...
    // user-specified header
    obj.path = String ...
    // package path
    obj.name = String[] ...
    // array of names
    obj.checkResults = Main.CheckResults[] ...
struct Main.PathResults
index URL

return value for xml package path

Configuration settings
var obj = new Main.PathResults;
    obj.header = String ...
    // user-specified header
    obj.path = String ...
    // package path
    obj.checkResults = Main.CheckResults[] ...
struct Main.Pkg
index URL

struct used for xml package info

Configuration settings
var obj = new Main.Pkg;
    obj.name = String ...
    obj.repository = String ...
    obj.release = String ...
    obj.label = String ...
    obj.key = String ...
    obj.date = String ...
    obj.providerId = String ...
    obj.originalProviderId = String ...
    obj.producerId = String ...
struct Main.Results
index URL

return value for xml package info

Configuration settings
var obj = new Main.Results;
    obj.header = String ...
    // user-specified header
    obj.path = String ...
    // package path
    obj.pkg = Main.Pkg[] ...
    // array of packages
    obj.checkResults = Main.CheckResults[] ...
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '[-n] [-x] [-v] [-H header] [-p] [-c] [-P package_base_dir ...|-Pr repository ...|-PR directory ...]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.arrFlag = Bool false;
    // Return an array of strings
    params.checkFlag = Bool false;
    // Check repositories for possible errors
    params.directoriesFlag = Bool false;
    // Only display information for the package directories
    params.header = String null;
    // Header label
    params.pathFlag = Bool false;
    // Echo path
    params.recurseFlag = Bool false;
    // Recursively find all packages
    params.repositoriesFlag = Bool false;
    // Use specified directory args instead of xdc.path
    params.shortFlag = Bool false;
    // Display package names only
    params.verboseFlag = Bool false;
    // Print informative messages during execution
    params.xmlFlag = Bool false;
    // Return a Results struct as XML
config Main.Params.arrFlag // instance
index URL

Return an array of strings

Configuration settings
var params = new Main.Params;
...
params.arrFlag = Bool false;
config Main.Params.checkFlag // instance
index URL

Check repositories for possible errors

Configuration settings
var params = new Main.Params;
...
params.checkFlag = Bool false;
config Main.Params.directoriesFlag // instance
index URL

Only display information for the package directories

Configuration settings
var params = new Main.Params;
...
params.directoriesFlag = Bool false;
config Main.Params.header // instance
index URL

Header label

Configuration settings
var params = new Main.Params;
...
params.header = String null;
config Main.Params.pathFlag // instance
index URL

Echo path

Configuration settings
var params = new Main.Params;
...
params.pathFlag = Bool false;
config Main.Params.recurseFlag // instance
index URL

Recursively find all packages

Configuration settings
var params = new Main.Params;
...
params.recurseFlag = Bool false;
DETAILS
Recursively descend into specified directories and find every package, including packages whose repository is not one of the specified directories.
config Main.Params.repositoriesFlag // instance
index URL

Use specified directory args instead of xdc.path

Configuration settings
var params = new Main.Params;
...
params.repositoriesFlag = Bool false;
config Main.Params.shortFlag // instance
index URL

Display package names only

Configuration settings
var params = new Main.Params;
...
params.shortFlag = Bool false;
config Main.Params.verboseFlag // instance
index URL

Print informative messages during execution

Configuration settings
var params = new Main.Params;
...
params.verboseFlag = Bool false;
config Main.Params.xmlFlag // instance
index URL

Return a Results struct as XML

Configuration settings
var params = new Main.Params;
...
params.xmlFlag = Bool false;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:50 GMT


package xdc.tools.path.sg
index URL

Graphical interface to path tool

  • USAGE
  • OPTIONS
  • USAGE
  • DETAILS
  • BUGS
This graphical interactive tool displays the packages located along any specified package repository path. [ more ... ]
XDCspec declarations sourced in xdc/tools/path/sg/package.xdc
requires xdc.tools.sg;
requires xdc.tools.path;
requires xdc.tools.sg.widgets;
package xdc.tools.path.sg [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.path.sg [--help]
    [--packagepath PATH]
OPTIONS
--packagepath
package path to scan for packages
USAGE
    xs xdc.tools.path.sg [--packagepath PATH]
DETAILS
This graphical interactive tool displays the packages located along any specified package repository path.
At startup, this tool shows the packages located along the current package path; i.e.,
      $XDCPATH;$XDCROOT/packages;^
where $XDCPATH is the value of the the user settable prefix of the package path, $XDCROOT is the installation directory of the XDC tools, and ^ is the repository of the package in the current working directory (if it exists). To specify a package path other than the current package path, use the --packagepath option. Only semicolon delimited canonical paths should be specifed as arguments with the --packagepath option. Environment variables such as $XDCROOT and special designators such as '^' should not be used.
BUGS
This tool scans all packages available along the current package path before displaying the user interface. So, a repository in the package path that contains a large number of sub-directories, such as '/', causes very long delays before the user interface is displayed.
While it is easy to see that you should not put '/' in the package path, it is less obvious that installing a package at '/' has the same effect.
generated on Sun, 25 Nov 2018 22:18:50 GMT


module xdc.tools.path.sg.Main

metaonly module xdc.tools.path.sg.Main
index URL

Command implementation

  • USAGE
  • DETAILS
  • BUGS
  • Configuration settings
  • Individual elements
This graphical interactive tool displays the packages located along any specified package repository path. [ more ... ]
Configuration settings sourced in xdc/tools/path/sg/Main.xdc
var Main = xdc.useModule('xdc.tools.path.sg.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '[--packagepath PATH]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.pathArg// package path to scan for packages = String null;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
USAGE
    xs xdc.tools.path.sg [--packagepath PATH]
DETAILS
This graphical interactive tool displays the packages located along any specified package repository path.
At startup, this tool shows the packages located along the current package path; i.e.,
      $XDCPATH;$XDCROOT/packages;^
where $XDCPATH is the value of the the user settable prefix of the package path, $XDCROOT is the installation directory of the XDC tools, and ^ is the repository of the package in the current working directory (if it exists). To specify a package path other than the current package path, use the --packagepath option. Only semicolon delimited canonical paths should be specifed as arguments with the --packagepath option. Environment variables such as $XDCROOT and special designators such as '^' should not be used.
BUGS
This tool scans all packages available along the current package path before displaying the user interface. So, a repository in the package path that contains a large number of sub-directories, such as '/', causes very long delays before the user interface is displayed.
While it is easy to see that you should not put '/' in the package path, it is less obvious that installing a package at '/' has the same effect.
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '[--packagepath PATH]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.pathArg = String null;
    // package path to scan for packages
config Main.Params.pathArg // instance
index URL

package path to scan for packages

Configuration settings
var params = new Main.Params;
...
params.pathArg = String null;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:50 GMT


package xdc.tools.product
index URL

Interfaces for products contributing RTSC packages

XDCspec declarations sourced in xdc/tools/product/package.xdc
package xdc.tools.product [1, 0, 0] {
    interface IProduct;
    // Interface specifying product details
    interface IProductTemplate;
    // Interface to provide examples for a product
    interface IProductView;
    // Define a product as a logical group of RTSC modules
}
generated on Sun, 25 Nov 2018 22:18:51 GMT


interface xdc.tools.product.IProduct

metaonly interface xdc.tools.product.IProduct
index URL

Interface specifying product details

This interface allows products describe themselves for the benefit of development tools such as IDE's. For example, a tool can read the information provided by a product that implements this interface and generate an eclipse plugin that leverages the product's "resources". [ more ... ]
XDCspec summary sourced in xdc/tools/product/IProduct.xdc
metaonly interface IProduct { ...
XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
package xdc.tools.product;
metaonly interface IProduct {
module-wide constants & types
    metaonly struct HelpToc// Help table of contents (TOC) element {
        String label// Help element description;
        String filePath// Path to help doc;
        Bool tocFile// Indicates whether element is a TOC file;
    };
    metaonly struct MacroDescriptor// Macro Descriptor structure {
        String name// Macro name;
        String desc// Macro description;
    };
    metaonly struct PluginDescriptor// Plugin Descriptor structure {
        String id// Plugin id;
        String version// Plugin version;
        String path// Plugin path;
    };
    metaonly struct Target// Structure containing information on RTSC targets {
        String sourceFile// Name of a file with target mapping;
    };
    metaonly struct UrlDescriptor// URL Descriptor structure {
        String url// Uniform Resource Locator(URL);
        String text// Summary text for the URL;
        String targetText// (optional) Summary for target portion;
    };
module-wide config parameters
    config String bundleName// Product bundle name;
    config String companyName// Name of company releasing product;
    config String copyRightNotice// Copyright notice for product;
    config String docsLocArr// Directories containing documents in the product[];
    config Bool exclusive// This product is a singleton = false;
    config IProduct.PluginDescriptor externalPlugins// External plugins delivered with the product[];
    config String externalRequirements// External plugins required by this product[];
    config IProduct.HelpToc helpTocArr// Array of table of contents elements in product[];
    config String icon// Icon to be displayed alongside the product description;
    config String id// A unique product id;
    config IProduct.UrlDescriptor licenseDescriptor// License information for product;
    config IProduct.MacroDescriptor macro// Macro associated with the product;
    config String name// Product name;
    config String otherFiles// Array of paths to files or directories to copy into the product[];
    config String platformSourceFile// File with available RTSC platforms;
    config IProduct.UrlDescriptor productDescriptor// Product description;
    config String productViewModule// Name of module implementing xdc.tools.product.IProductView;
    config String projectSpecPath// Directory containing project spec files = "resources";
    config String repositoryArr// Repositories contained in the product[];
    config IProduct.Target targetFile// File with available RTSC target modules;
    config String templateModule// Name of module implementing xdc.tools.product.IProductTemplate;
    config String tocIndexFile// Top level help index file;
    config IProduct.UrlDescriptor updateSite// Update site for product;
    config String version// Product version;
}
DETAILS
This interface allows products describe themselves for the benefit of development tools such as IDE's. For example, a tool can read the information provided by a product that implements this interface and generate an eclipse plugin that leverages the product's "resources".
By expressing the product's information in this interface, a product can be delivered into multiple development tools without explicit knowledge of these tools. For example, an online "product repository" can extract sufficient information from this interface to enable it to provide a searchable catalog of interesting products.
This is an experimental interface and is subject to change
struct IProduct.HelpToc
index URL

Help table of contents (TOC) element

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
metaonly struct HelpToc {
    String label;
    // Help element description
    String filePath;
    // Path to help doc
    Bool tocFile;
    // Indicates whether element is a TOC file
};
FIELDS
label — Summary description of help element which is displayed in the global table of contents.
filePath — Relative path to help documentation file or a secondary table of contents file or a URL. Relative paths are relative to the directories specified in docsLocArr; files are searched for, in order, within each directory and the first file found that matches the name is used.
tocFile — Flag indicates whether the element is a table of contents (TOC) file. Tools may process TOC files in a special way. For example, a tool to generate eclipse plugins must copy the TOC file to the plugin folder for integrating with eclipse help.
DETAILS
A help TOC element defines a file, URL, or a secondary table of contents that is referenced from a global table of contents.
struct IProduct.MacroDescriptor
index URL

Macro Descriptor structure

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
metaonly struct MacroDescriptor {
    String name;
    // Macro name
    String desc;
    // Macro description
};
struct IProduct.PluginDescriptor
index URL

Plugin Descriptor structure

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
metaonly struct PluginDescriptor {
    String id;
    // Plugin id
    String version;
    // Plugin version
    String path;
    // Plugin path
};
FIELDS
id — Plugin id
version — Plugin version
path — Path to plugin relative to IProduct implementation
struct IProduct.Target
index URL

Structure containing information on RTSC targets

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
metaonly struct Target {
    String sourceFile;
    // Name of a file with target mapping
};
FIELDS
sourceFile — The path to a file that defines the mapping in a JSON file
DETAILS
Products specify the mapping between device names and/or device family names and a RTSC target module in a JSON file located in the product itself. The field sourceFile contains the file name including the path relative to the top directory of the product.
The content of the file is read whenever a product is used in a project and the information from the file is leveraged by tools to derive an appropriate RTSC target when given a device name, device family, endiness, and OMF selection (COFF verses ELF).
The JSON file contains objects, and each object is matched against the device and build options selected for a particular project. If all object attributes, except for the target specification, are matched by supplied options, the target represented by the object is returned. Objects are matched against the options in the order they are listed in the JSON file. As soon as a match is found, the search stops.
Currently used object attributes that are matched against build options are deviceFamily, deviceName, deviceVariant, endianness and elf. Object attributes that specify a target are packageName and baseTargetName, where packageName is the name of a package that contains targets, while baseTargetName is a name of a target module in that package.
In particular, if the device name and family name selected for a project match deviceNamePattern and deviceFamilyPattern in an object, the target name generated will be:
      <packageName>[.elf].<baseTargetName>[_big_endian]
The strings ".elf" and "_big_endian" are added if the corresponding project options are specified.
Suppose, for example, a product specifies the following target mapping:
  {
      deviceName:          "MSP430F5.*",
      deviceFamily:        "MSP430.*",
      packageName:         "ti.targets.msp430",
      baseTargetName:      "MSP430X"
  }
If the device specified is "MSP430F5529", the family is "MSP430", and the OMF is COFF, the generated target will be:
      ti.targets.msp430.MSP430X
On the other hand, if the OMF is ELF the target will be:
      ti.targets.msp430.elf.MSP430X
struct IProduct.UrlDescriptor
index URL

URL Descriptor structure

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
metaonly struct UrlDescriptor {
    String url;
    // Uniform Resource Locator(URL)
    String text;
    // Summary text for the URL
    String targetText;
    // (optional) Summary for target portion
};
FIELDS
url — Uniform Resource Locator(URL)
text — Summary text for the URL
targetText — Optional summary text for any target content portion
config IProduct.bundleName // module-wide
index URL

Product bundle name

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String bundleName;
DETAILS
Product bundle name is embedded in the top level folder name of the product. Example: The top level folder for XDCtools version 3.16.02.31-eng is xdctools_3_16_02_31-eng. In this case the bundle name is xdctools. The bundle name is used by tools to discover the product installed on a filesystem.
config IProduct.companyName // module-wide
index URL

Name of company releasing product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String companyName;
DETAILS
Example : "Texas Instruments"
config IProduct.copyRightNotice // module-wide
index URL

Copyright notice for product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String copyRightNotice;
config IProduct.docsLocArr // module-wide
index URL

Directories containing documents in the product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String docsLocArr[];
DETAILS
Directories are specified relative to the product installation directory. These directories are searched when resolving URI links to specific pages within the docs.
config IProduct.exclusive // module-wide
index URL

This product is a singleton

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config Bool exclusive = false;
DETAILS
This flag indicates whether multiple versions of this product are accessable within the IDE or whether only the latest version is available.
When flag is set to true it indicates that only one version of the product can be active in the system. Otherwise the system can handle multiple versions of the same product.
config IProduct.externalPlugins // module-wide
index URL

External plugins delivered with the product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config IProduct.PluginDescriptor externalPlugins[];
config IProduct.externalRequirements // module-wide
index URL

External plugins required by this product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String externalRequirements[];
config IProduct.helpTocArr // module-wide
index URL

Array of table of contents elements in product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config IProduct.HelpToc helpTocArr[];
DETAILS
Tools generating table of contents are required to preserve the order of elements specified in this array.
config IProduct.icon // module-wide
index URL

Icon to be displayed alongside the product description

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String icon;
DETAILS
In TIREX, this file is used in the top page, where all products are listed, with their icons and names under icons.
config IProduct.id // module-wide
index URL

A unique product id

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String id;
DETAILS
For example, product developers may choose to follow namespace conventions for Java packages or Eclipse plugins to specify a unique id like org.eclipse.rtsc.xdctools.product.
config IProduct.licenseDescriptor // module-wide
index URL

License information for product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config IProduct.UrlDescriptor licenseDescriptor;
VALUES
url — field should contain the URL containing the license text.
text — field should contain a summary description of the license
config IProduct.macro // module-wide
index URL

Macro associated with the product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config IProduct.MacroDescriptor macro;
DETAILS
Product macros are often used in IDEs for providing portable build environments. A unique macro name should be selected for the product.
config IProduct.name // module-wide
index URL

Product name

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String name;
DETAILS
String containing product name eg. System BIOS
config IProduct.otherFiles // module-wide
index URL

Array of paths to files or directories to copy into the product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String otherFiles[];
DETAILS
A product may need to contain "arbitrary" files important to its operation. For example a product may provide text, images and video files that provide templates or branding information for the product. These files may then be consumed by tools like IDE's via hooks defined in the IDE framework.
The source file path is defined relative to the directory containing the implementation of IProduct. All files or directories are copied to the base directory of the plugin; e.g., "../branding/about.ini" is copied to "about.ini" at the top of the plugin.
Path names that begin with the prefix "tc:" are copied into "target content" plugin whereas path names with any other prefix (such as "ui:" or no prefix) are copied into the "IDE plugin".
config IProduct.platformSourceFile // module-wide
index URL

File with available RTSC platforms

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String platformSourceFile;
DETAILS
This parameter points to a JSON file that contains names of platform packages, and project properties that must be matched for a specific platform to be selected. The file path is relative to the top directory of the product. The RTSC platforms should be delivered in the repositories defined in repositoryArr
config IProduct.productDescriptor // module-wide
index URL

Product description

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config IProduct.UrlDescriptor productDescriptor;
VALUES
url — the url field should contain a product-specific "home" page URL or, if there is none, the URL of organization releasing the product.
text — the text field should contain summary description of the target content portion of the product.
config IProduct.productViewModule // module-wide
index URL

Name of module implementing xdc.tools.product.IProductView

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String productViewModule;
DETAILS
Products must provide a module that implements the xdc.tools.product.IProductView interface. This module defines the "top-level" modules that are visible to the user and must be delivered in the repositories defined in repositoryArr.
config IProduct.projectSpecPath // module-wide
index URL

Directory containing project spec files

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String projectSpecPath = "resources";
DETAILS
This path is relative to the product install location.
config IProduct.repositoryArr // module-wide
index URL

Repositories contained in the product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String repositoryArr[];
DETAILS
Repositories are specified relative to the product installation directory.
config IProduct.targetFile // module-wide
index URL

File with available RTSC target modules

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config IProduct.Target targetFile;
DETAILS
The RTSC target modules should be delivered in the repositories defined in repositoryArr
config IProduct.templateModule // module-wide
index URL

Name of module implementing xdc.tools.product.IProductTemplate

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String templateModule;
DETAILS
Products that deliver examples provide a module that implements the xdc.tools.product.IProductTemplate interface. This module must be delivered in one of the repositories defined in repositoryArr.
config IProduct.tocIndexFile // module-wide
index URL

Top level help index file

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String tocIndexFile;
DETAILS
In eclipse help, for example, this file is displayed when the product's top-level entry is selected in eclipse's help table of contents. If this file is not provided a very basic list of links to the entries listed in @{link #helpTocArr} is displayed.
config IProduct.updateSite // module-wide
index URL

Update site for product

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config IProduct.UrlDescriptor updateSite;
VALUES
url — the url field should contain the URL containing product upgrades.
text — the text field should contain summary description of the update site
config IProduct.version // module-wide
index URL

Product version

XDCspec declarations sourced in xdc/tools/product/IProduct.xdc
config String version;
DETAILS
The product version should follow the format -major.minor.service.qualifier where major,minor and service are integers and qualifier is a string. Example - 3.16.02.31-eng.
Products may specify their own guidelines for updating major,minor,service and qualifier portions of the version number as long as they are unique for the product. Products may also choose to follow popular versioning conventions like those followed for versioning Eclipse plugins.
generated on Sun, 25 Nov 2018 22:18:51 GMT


interface xdc.tools.product.IProductTemplate

metaonly interface xdc.tools.product.IProductTemplate
index URL

Interface to provide examples for a product

This interface allows products to contribute examples to development environments like IDE's. This is an experimental interface and is subject to change.
XDCspec summary sourced in xdc/tools/product/IProductTemplate.xdc
metaonly interface IProductTemplate { ...
XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
package xdc.tools.product;
metaonly interface IProductTemplate {
module-wide constants & types
    metaonly struct Board// Structure defining properties of a board used in the example {
        String tiCloudName// name used in TI Cloud TIREX;
    };
    metaonly struct FileDesc// Structure defining properties of a file included in an example {
        String path// path to file or folder;
        Bool excludeFromBuild// exclude from build;
        Bool openOnCreation// open on project creation;
        Bool copyIntoConfiguration// copy into RTSC configuration;
        String action// Flag indicating whether the file should be copied into the project or linked to;
        String targetDirectory// directory into which the path file/folder should be copied into;
    };
    metaonly struct Filter// Structure defining filter properties for an example {
        String deviceFamily;
        String deviceVariant;
        String deviceId;
        String endianness;
        String toolChain;
        String outputFormat;
    };
    metaonly struct TemplateGroup// TemplateGroup structure {
        String id;
        String name;
        String description;
        String groups[];
    };
    metaonly struct TemplateInfo// TemplateInfo structure {
        String title// Title of this example;
        String name// Name of the project imported from this template;
         IProductTemplate.FileDesc fileList// List of files along with properties for this example[];
        String description// Description of this example;
        String target// RTSC target;
        String platform// RTSC platform;
         IProductTemplate.Board board// Properties of the board;
        String buildProfile// RTSC build profile;
        String linkerCommandFile// Linker file for this example;
        String compilerBuildOptions// Special compiler options;
        String linkerBuildOptions// Special linker options;
        String requiredProducts// List of products required to build this example[];
        String xdcToolsVersion// Version of xdctools this template requires eg. '3.24.6.63';
        String groups// Array of group ids for groups containing this example[];
        Bool legacyTcf;
        String configuroOptions// configuro options;
        Bool configOnly// Indicates whether only a RTSC configuration project should be created for this example;
        Bool isHybrid// Indicates whether application and configuration content exists in one project;
        Bool isFragment// Indicates whether this template can be applied "incrementally" to an already existing project;
         IProductTemplate.Filter filterArr// Array of filters for this example[];
        Bool ignoreDefaults// Indicates if settings from the device XML file are ignored;
        String options// Comma separated attributes;
        String references// Comma separated list of referenced project names;
        String buildCommandFlags// Comma seperated list of build-command flags;
        Bool launchWizard// Flag indicating to launch the New Project Wizard allowing the user to adjust the details;
        String preBuildStep// Shell cmd to run before the build. Cmd is run within the debug/release directory;
        String postBuildStep// Shell cmd to run after the build. Cmd is run within the debug/release directory;
        String projectType// type of project. If this field is not set, a default will be used that is based on other settings. If it is set to "ccs", the project will be a "Code Composer Studio" project;
        String outputType// type of output produced by this project: "executable" or "staticLibrary", or "any". The "any" type indicates that this project template applies to type of output, executable, library, etc;
    };
module-wide config parameters
    config IProductTemplate.TemplateInfo templateArr// Examples contained in the product[];
    config IProductTemplate.TemplateGroup templateGroupArr// Array of template group ids[] = [ ];
}
struct IProductTemplate.Board
index URL

Structure defining properties of a board used in the example

XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
metaonly struct Board {
    String tiCloudName;
    // name used in TI Cloud TIREX
};
FIELDS
tirexName — TIREX on Cloud recognizes board under its previously defined name. We have to use these names to get the tree structure that uses the names.
struct IProductTemplate.FileDesc
index URL

Structure defining properties of a file included in an example

XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
metaonly struct FileDesc {
    String path;
    // path to file or folder
    Bool excludeFromBuild;
    // exclude from build
    Bool openOnCreation;
    // open on project creation
    Bool copyIntoConfiguration;
    // copy into RTSC configuration
    String action;
    // Flag indicating whether the file should be copied into the project or linked to
    String targetDirectory;
    // directory into which the path file/folder should be copied into
};
FIELDS
path — Path to file or folder relative to the package containing the implementation of IProductTemplate. If the path points to a file then the file is copied or linked into the project. If the path points to a directory then the entire directory and contents are copied into the project.
excludeFromBuild — Flag indicating whether file should be excluded from build inside an IDE project
openOnCreation — Flag indicating whether the file should be opened when a project containing the example file is created by the IDE.
copyIntoConfiguration — Flag indicating whether the file should be copied into RTSC configuration. This flag applies only when the isHybrid flag of the template is set to false.
action — Flag indicating whether the file should be copied into the project or linked in. For example, the trexgen tool recognizes the following flags: "COPY" - copy the file into the project "LINK" - link the file into the project
targetDirectory — The file or folder from the path field will be copied into this target directory within the project folder.
struct IProductTemplate.Filter
index URL

Structure defining filter properties for an example

XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
metaonly struct Filter {
    String deviceFamily;
    String deviceVariant;
    String deviceId;
    String endianness;
    String toolChain;
    String outputFormat;
};
FIELDS
deviceFamily — String indicating the device family eg. "MSP430","C6000"
deviceVariant — String indicating device variant eg. "C674X", "CortexA8"
deviceId — String indicating the device part number eg. "TMS320C6747"
endianness — String indicating the device endianness eg. "little", "big"
toolChain — String indicating the tool chain eg. "TI", "GNU"
outputFormat — String indicating the object file format eg. "COFF", "ELF"
DETAILS
This structure allows products to define constraints for their examples. IDEs use the Filter properties of an example to decide whether the example should be presented to the user.
The filter is evaluated by performing an 'AND' operation on its individual elements. In other words, all the defined elements must evaluate to true for the filter to evaluate to true.
Each example typically defines an array of more than one filter; see TemplateInfo.filterArr. This filter array is evaluated using the 'OR' operation. In other words, the example is presented to the user when any one of the filters evaluate to true.
Each filter property can be an arbitrary Java regular expression. In addition, each allows the user to define the NOT property by inserting a "~" character at the start of the string. For example, if the deviceFamily field is set to "~MSP430", the example will be displayed for all device families except "MSP430".
struct IProductTemplate.TemplateGroup
index URL

TemplateGroup structure

XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
metaonly struct TemplateGroup {
    String id;
    String name;
    String description;
    String groups[];
};
FIELDS
id — Unique id for the template group
name — Name of the group
description — Description of the group
groups — Array of group ids used to specify membership of other groups.
DETAILS
This structure may be used to define a hierarchy of examples for the product. Examples may be logically organized into groups with a unique id and may specify membership of other groups by referring to their ids in the groups array. In this manner, the example producer can define a tree topology of examples for their product. Once the template groups are defined, the individual examples may specify their membership within a template group in the groups array of TemplateInfo. The example provider may specify all the defined groups for their product in templateGroupArr.
struct IProductTemplate.TemplateInfo
index URL

TemplateInfo structure

XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
metaonly struct TemplateInfo {
    String title;
    // Title of this example
    String name;
    // Name of the project imported from this template
     IProductTemplate.FileDesc fileList[];
    // List of files along with properties for this example
    String description;
    // Description of this example
    String target;
    // RTSC target
    String platform;
    // RTSC platform
     IProductTemplate.Board board;
    // Properties of the board
    String buildProfile;
    // RTSC build profile
    String linkerCommandFile;
    // Linker file for this example
    String compilerBuildOptions;
    // Special compiler options
    String linkerBuildOptions;
    // Special linker options
    String requiredProducts[];
    // List of products required to build this example
    String xdcToolsVersion;
    // Version of xdctools this template requires eg. '3.24.6.63'
    String groups[];
    // Array of group ids for groups containing this example
    Bool legacyTcf;
    String configuroOptions;
    // configuro options
    Bool configOnly;
    // Indicates whether only a RTSC configuration project should be created for this example
    Bool isHybrid;
    // Indicates whether application and configuration content exists in one project
    Bool isFragment;
    // Indicates whether this template can be applied "incrementally" to an already existing project
     IProductTemplate.Filter filterArr[];
    // Array of filters for this example
    Bool ignoreDefaults;
    // Indicates if settings from the device XML file are ignored
    String options;
    // Comma separated attributes
    String references;
    // Comma separated list of referenced project names
    String buildCommandFlags;
    // Comma seperated list of build-command flags
    Bool launchWizard;
    // Flag indicating to launch the New Project Wizard allowing the user to adjust the details
    String preBuildStep;
    // Shell cmd to run before the build. Cmd is run within the debug/release directory
    String postBuildStep;
    // Shell cmd to run after the build. Cmd is run within the debug/release directory
    String projectType;
    // type of project. If this field is not set, a default will be used that is based on other settings. If it is set to "ccs", the project will be a "Code Composer Studio" project
    String outputType;
    // type of output produced by this project: "executable" or "staticLibrary", or "any". The "any" type indicates that this project template applies to type of output, executable, library, etc
};
FIELDS
title — String containing the title of the template
name — String containing the name of the project created from this template
fileList — Array of FileDesc defining the properties of the files contributed by this example.
description — String containing description of example
target — String containing RTSC target
platform — String containing RTSC platform
buildProfile — String containing RTSC build profile
linkerCommandFile — Linker command file for the example. If this is set to the empty string then no linker command file is added by the IDE to the example. If this is not defined, then the wizard picks the default linker command file for the selected device.
compilerBuildOptions — Special compiler options required to build template. For example the template may need special -I and -D options to build and these may be specified here.
linkerBuildOptions — Special linker options to build template
requiredProducts — Products required to build this example. Products are identified by their globally unique xdc.tools.product.IProduct.id eg. 'com.ti.bios'. Dependency on a minimum version of a product may be defined in the following manner : <product-id>:<min-version>
xdcToolsVersion — String containing XDCTools the exact version required eg. '3.24.6.63'. Note that this number must be an 'eclipse' version number: no leading 0's in the first three segments and the forth is treated as an arbitrary string.
If this string is undefined, any version of XDCtools will be allowed.
If the exact version doesn't exist for some reason, the project will still be created, but the project will give a 'this version of XDCtools doesn't exist' warning. The user can then select a version that is hopefully compatible.
groups — Array of strings referring example groups that a particular example may belong. Products may provide examples that are part of an existing example group eg."Empty Projects" that are defined elsewhere. The groups are identified by an unique id.
configOnly — Flag indicating to the IDE whether example contributes only to a RTSC configuration project.
configuroOptions — This string contains options that are passed to xdc.tools.configuro. You must be careful to quote embedded special characters in this string in such a way that they can be directly embedded in an XML file. For example, to pass '-foo "bar"' to configuro you must use the string '-foo &quot;bar&quot;'.
isHybrid — Flag indicating to the IDE whether example contains RTSC configuration and target content files in one project. If this field is set to true, then the IDE consuming this example will create one project with all the files. Otherwise, multiple projects will be created - one containing the target content and the other containing the RTSC configuration files. This flag applies only when configOnly flag is set to false.
filterArr — Array of Filter. Used to specify the constraints for a particular example. The filter array is evaluated using an OR operation on the individual array elements. Note that individual elements within a filter is evaluated with the 'AND' operation.
ignoreDefaults — Property filter commonly specifies a device. Each device has an XML file with default settings, which are applied to a project, in addition to properties specified here. Whe this parameter is set to 'true', these default options are ignored.
options — Comma separated list of options used to specify various configurable items for this template. For example, the trexgen tool recognizes the following flags: "NPW" - display this example in the New Project Wizard, and "TREX" - display this example in the Resource Explorer
references — Comma separated list of referenced project names
buildCommandFlags — Comma separated list of build-command flags.
launchWizard — Flag indicating to launch the New Project wizard allowing the user to adjust the details.
preBuildStep — Shell cmd to run before the build. Cmd is run within the debug/release directory
postBuildStep — Shell cmd to run after the build. Cmd is run within the debug/release directory
config IProductTemplate.templateArr // module-wide
index URL

Examples contained in the product

XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
config IProductTemplate.TemplateInfo templateArr[];
config IProductTemplate.templateGroupArr // module-wide
index URL

Array of template group ids

XDCspec declarations sourced in xdc/tools/product/IProductTemplate.xdc
config IProductTemplate.TemplateGroup templateGroupArr[] = [ ];
DETAILS
This array may be optionally specified by Products that organize their examples into groups.
generated on Sun, 25 Nov 2018 22:18:51 GMT


interface xdc.tools.product.IProductView

metaonly interface xdc.tools.product.IProductView
index URL

Define a product as a logical group of RTSC modules

This interface allows a product to define logical groups of RTSC modules delivered with it. Implementations of this interface are typically consumed within development environments like IDE's to render a graphical tree view of the product consisting of these groups. [ more ... ]
XDCspec summary sourced in xdc/tools/product/IProductView.xdc
metaonly interface IProductView { ...
XDCspec declarations sourced in xdc/tools/product/IProductView.xdc
package xdc.tools.product;
metaonly interface IProductView {
module-wide constants & types
    metaonly struct ProductElemDesc// ProductElemDesc structure {
        String elemName// Name of group or module;
        String moduleName// Name of module;
        String iconFileName// Icon file name representing element;
         IProductView.ProductElemDesc elemArray// Array of ProductElemDesc[];
    };
module-wide config parameters
    config String homeModule// Top-level module for this product;
    config String linksToArray// Array of IDs of products accessable from this product's home module[];
module-wide functions
     IProductView.ProductElemDesc getProductDescriptor// Return this product's tree view();
}
DETAILS
This interface allows a product to define logical groups of RTSC modules delivered with it. Implementations of this interface are typically consumed within development environments like IDE's to render a graphical tree view of the product consisting of these groups.
This is an experimental interface and is subject to change.
struct IProductView.ProductElemDesc
index URL

ProductElemDesc structure

XDCspec declarations sourced in xdc/tools/product/IProductView.xdc
metaonly struct ProductElemDesc {
    String elemName;
    // Name of group or module
    String moduleName;
    // Name of module
    String iconFileName;
    // Icon file name representing element
     IProductView.ProductElemDesc elemArray[];
    // Array of ProductElemDesc
};
FIELDS
elemName — Name of element. Elements can be either groups or modules
moduleName — In case of a leaf node this field will contain the module name. For intermediate tree nodes the module name will be set to null
iconFileName — The name of the icon file that is associated with this element. In xdctools 3.23, this path must be relative to the package containing the IProductView implementation.
In xdctools 3.24.01 (or above), this path may be relative or absolute. If it's relative, it's first searched for in the package containing the IProductView implementation module and, if this fails, the relative path is searched via xdc.findFile(). If the icon is still not found, a default icon will be used.
elemArray — Array used to define children of a node.
DETAILS
This structure is used to define the logical tree "view" of a product. This view is composed of elements that are either modules or groups: modules at the leaves of the tree and groups elsewhere.
config IProductView.homeModule // module-wide
index URL

Top-level module for this product

XDCspec declarations sourced in xdc/tools/product/IProductView.xdc
config String homeModule;
DETAILS
The homeModule is a distinguished "top-level" module that is used by GUI's as a starting point, or "home page", to navigate to the other content managed by this product.
config IProductView.linksToArray // module-wide
index URL

Array of IDs of products accessable from this product's home module

XDCspec declarations sourced in xdc/tools/product/IProductView.xdc
config String linksToArray[];
DETAILS
This array of product IDs is used to determine a hierarchical relationship between products and if a product's modules can be reached from another product's home page. If product A "links to" product B, then product B's home page can be closed so long as product A's home page is open.
IProductView.getProductDescriptor() // module-wide
index URL

Return this product's tree view

XDCspec declarations sourced in xdc/tools/product/IProductView.xdc
IProductView.ProductElemDesc getProductDescriptor();
DETAILS
This method is typically invoked by development tools like IDE's to get the product view tree structure.
RETURNS
Returns root node of tree of ProductElemDesc structures
generated on Sun, 25 Nov 2018 22:18:51 GMT


package xdc.tools.product.plugingen
index URL

Command-line tool for generating eclipse plugins for RTSC content

  • USAGE
  • OPTIONS
  • DETAILS
  • EXAMPLE
The plugingen tool allows RTSC content producers to create eclipse plugins that allows their content to be integrated in the CCS environment. As input, the tool requires [ more ... ]
XDCspec declarations sourced in xdc/tools/product/plugingen/package.xdc
package xdc.tools.product.plugingen [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.product.plugingen [--help]
    [-p product_root_directory]
     -m module
    [-o outdir]
    [-f pluginFragment]
OPTIONS
-p
Product root directory

This option names the product root directory that is used by the tool to generate the plugin. For example, its declared repositories are added to the package path and are searched for contributed platforms.

If the '-o' option is not specified, the tool generates the plugin in a sub-directory named eclipse in the product root directory.

If this option is not specified, the product root directory is assumed to be ./.

-m
Input description of the plug-in to be specified

This required option names a module that implements xdc.tools.product.IProduct.

-o
Output directory in which the plugin will be generated

This option names the directory in which the plugin will be generated in a sub-directory named eclipse. If this option is not specified the tool will generate the plugin in the product root directory specified with the '-p' option.

-f
Text file containing plugin fragment

This option names the text file containing a plugin fragment. This allows users to contribute extensions to the UI plugins generated by the tool.

The tool does not perform syntax checking of the contributed fragment. Users need to ensure the correctness of the contributed fragment. Note that syntactically incorrect fragments can disable the plugin completely in the eclipse platform.

--generation_format
Plugin generation format
--suppress_product_type_info
This Option is now removed from PluginGen. We shall throw an error to flag this change to users

Suppress generation of product type information

This option generates eclipse plugin without the product type information. Should only be invoked to generate plugins whose product type information was hard coded into CCS 4.x prior to the creation of this tool.

This option should not be used by _any_ new products.

DETAILS
The plugingen tool allows RTSC content producers to create eclipse plugins that allows their content to be integrated in the CCS environment. As input, the tool requires
  • a RTSC module implementing xdc.tools.product.IProduct
Refer to ExampleProduct for an implementation of IProduct.
The tool may also be used to generate starter examples that will showup in the new project wizard. This is accomplished by implementing IProductTemplate and setting the templateModule configuration parameter of the IProduct implementation to the name of the implementation module. Refer to Examples for a sample implementation of IProductTemplate.
The XGCONF product view maybe developed by implementing IProductView and setting the productViewModule configuration parameter of the IProduct implementation to the name of the implementation module. Refer to ProductView.xdc and ProductView.xs for a sample implementation of IProductView.
The tool operates on a product that is either specified by the -p option or is present in the folder from which the tool is executed. The tool will create the plugin in a sub-folder named eclipse in the output directory specified with -o option. If the -o option is not specified the plugin is created in the product root directory.
EXAMPLE
      xs xdc.tools.product.plugingen
                      -p exampleprod_1_0_0_00
                      -m xdc.tools.product.plugingen.examples.ExampleProduct
generated on Sun, 25 Nov 2018 22:18:51 GMT


module xdc.tools.product.plugingen.Main

metaonly module xdc.tools.product.plugingen.Main
index URL

Command implementation

  • DETAILS
  • EXAMPLE
  • Configuration settings
  • Individual elements
The plugingen tool allows RTSC content producers to create eclipse plugins that allows their content to be integrated in the CCS environment. As input, the tool requires [ more ... ]
Configuration settings sourced in xdc/tools/product/plugingen/Main.xdc
var Main = xdc.useModule('xdc.tools.product.plugingen.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '[-p product_root_directory]',
        ' -m module',
        '[-o outdir]',
        '[-f pluginFragment]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.generationFormat// Plugin generation format = String null;
        params.outputDir// Output directory in which the plugin will be generated = String null;
        params.pluginFragment// Text file containing plugin fragment = String null;
        params.productDir// Product root directory = String "./";
        params.productModule// Input description of the plug-in to be specified = String undefined;
        params.suppressProductTypeInfo// This Option is now removed from PluginGen. We shall throw an error to flag this change to users = Bool false;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
The plugingen tool allows RTSC content producers to create eclipse plugins that allows their content to be integrated in the CCS environment. As input, the tool requires
  • a RTSC module implementing xdc.tools.product.IProduct
Refer to ExampleProduct for an implementation of IProduct.
The tool may also be used to generate starter examples that will showup in the new project wizard. This is accomplished by implementing IProductTemplate and setting the templateModule configuration parameter of the IProduct implementation to the name of the implementation module. Refer to Examples for a sample implementation of IProductTemplate.
The XGCONF product view maybe developed by implementing IProductView and setting the productViewModule configuration parameter of the IProduct implementation to the name of the implementation module. Refer to ProductView.xdc and ProductView.xs for a sample implementation of IProductView.
The tool operates on a product that is either specified by the -p option or is present in the folder from which the tool is executed. The tool will create the plugin in a sub-folder named eclipse in the output directory specified with -o option. If the -o option is not specified the plugin is created in the product root directory.
EXAMPLE
      xs xdc.tools.product.plugingen
                      -p exampleprod_1_0_0_00
                      -m xdc.tools.product.plugingen.examples.ExampleProduct
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '[-p product_root_directory]',
    ' -m module',
    '[-o outdir]',
    '[-f pluginFragment]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.generationFormat = String null;
    // Plugin generation format
    params.outputDir = String null;
    // Output directory in which the plugin will be generated
    params.pluginFragment = String null;
    // Text file containing plugin fragment
    params.productDir = String "./";
    // Product root directory
    params.productModule = String undefined;
    // Input description of the plug-in to be specified
    params.suppressProductTypeInfo = Bool false;
    // This Option is now removed from PluginGen. We shall throw an error to flag this change to users
config Main.Params.generationFormat // instance
index URL

Plugin generation format

Configuration settings
var params = new Main.Params;
...
params.generationFormat = String null;
config Main.Params.outputDir // instance
index URL

Output directory in which the plugin will be generated

Configuration settings
var params = new Main.Params;
...
params.outputDir = String null;
DETAILS
This option names the directory in which the plugin will be generated in a sub-directory named eclipse. If this option is not specified the tool will generate the plugin in the product root directory specified with the '-p' option.
config Main.Params.pluginFragment // instance
index URL

Text file containing plugin fragment

Configuration settings
var params = new Main.Params;
...
params.pluginFragment = String null;
DETAILS
This option names the text file containing a plugin fragment. This allows users to contribute extensions to the UI plugins generated by the tool.
The tool does not perform syntax checking of the contributed fragment. Users need to ensure the correctness of the contributed fragment. Note that syntactically incorrect fragments can disable the plugin completely in the eclipse platform.
config Main.Params.productDir // instance
index URL

Product root directory

Configuration settings
var params = new Main.Params;
...
params.productDir = String "./";
DETAILS
This option names the product root directory that is used by the tool to generate the plugin. For example, its declared repositories are added to the package path and are searched for contributed platforms.
If the '-o' option is not specified, the tool generates the plugin in a sub-directory named eclipse in the product root directory.
If this option is not specified, the product root directory is assumed to be ./.
config Main.Params.productModule // instance
index URL

Input description of the plug-in to be specified

Configuration settings
var params = new Main.Params;
...
params.productModule = String undefined;
DETAILS
This required option names a module that implements xdc.tools.product.IProduct.
config Main.Params.suppressProductTypeInfo // instance
index URL

This Option is now removed from PluginGen. We shall throw an error to flag this change to users

Configuration settings
var params = new Main.Params;
...
params.suppressProductTypeInfo = Bool false;
DETAILS
Suppress generation of product type information
This option generates eclipse plugin without the product type information. Should only be invoked to generate plugins whose product type information was hard coded into CCS 4.x prior to the creation of this tool.
This option should not be used by _any_ new products.
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:51 GMT


package xdc.tools.product.trexgen
index URL

Command-line tool for generating projectspec files for RTSC content

  • USAGE
  • OPTIONS
  • DETAILS
  • EXAMPLE
The trexgen tool allows RTSC content producers to create projectspec files that allow their content to be integrated in the CCS Resource Explorer environment. As input, the tool requires [ more ... ]
XDCspec declarations sourced in xdc/tools/product/trexgen/package.xdc
package xdc.tools.product.trexgen [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.product.trexgen [--help]
    [-p product_root_directory]
     -m module
    [-o outdir]
OPTIONS
-p
Product root directory

This option names the product root directory that is used by the tool to generate the projectspec files. For example, it's declared repositories are added to the package path and are searched for contributed platforms.

If the '-o' option is not specified, the tool generates the resources directory in the product root directory.

If this option is not specified, the product root directory is assumed to be ./.

-m
Input description of the plug-in to be specified

This required option names a module that implements xdc.tools.product.IProduct.

-o
Output directory in which the plugin will be generated

This option names the directory in which the project spec will be generated in a sub-directory named eclipse. If this option is not specified the tool will generate the plugin in the product root directory specified with the '-p' option.

--generation_format
Plugin generation format
DETAILS
The trexgen tool allows RTSC content producers to create projectspec files that allow their content to be integrated in the CCS Resource Explorer environment. As input, the tool requires
  • a RTSC module implementing xdc.tools.product.IProduct
Refer to ExampleProduct for an implementation of IProduct.
The tool generates starter examples that will show up in the Resource explorer. This is accomplished by implementing IProductTemplate and setting the templateModule configuration parameter of the IProduct implementation to the name of the implementation module. Refer to Examples for a sample implementation of IProductTemplate.
The tool operates on a product that is either specified by the -p option or is present in the folder from which the tool is executed. The tool will create the resources sub-folder in the output directory specified with -o option. If the -o option is not specified the resources is created in the product root directory.
The tool will search the repositories specified in the module implementing xdc.tools.product.IProduct for RTSC platforms. This search can be disabled by specifying the--disable_repo_search option. The user needs to ensure that the repositories are installed in the product root directory before using the tool.
EXAMPLE
      xs xdc.tools.product.trexgen
                      -p exampleprod_1_0_0_00
                      -m xdc.tools.product.plugingen.examples.ExampleProduct
generated on Sun, 25 Nov 2018 22:18:51 GMT


module xdc.tools.product.trexgen.Main

metaonly module xdc.tools.product.trexgen.Main
index URL

Command implementation

  • DETAILS
  • EXAMPLE
  • Configuration settings
  • Individual elements
The trexgen tool allows RTSC content producers to create projectspec files that allow their content to be integrated in the CCS Resource Explorer environment. As input, the tool requires [ more ... ]
Configuration settings sourced in xdc/tools/product/trexgen/Main.xdc
var Main = xdc.useModule('xdc.tools.product.trexgen.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '[-p product_root_directory]',
        ' -m module',
        '[-o outdir]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.generationFormat// Plugin generation format = String null;
        params.outputDir// Output directory in which the plugin will be generated = String null;
        params.productDir// Product root directory = String "./";
        params.productModule// Input description of the plug-in to be specified = String undefined;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
The trexgen tool allows RTSC content producers to create projectspec files that allow their content to be integrated in the CCS Resource Explorer environment. As input, the tool requires
  • a RTSC module implementing xdc.tools.product.IProduct
Refer to ExampleProduct for an implementation of IProduct.
The tool generates starter examples that will show up in the Resource explorer. This is accomplished by implementing IProductTemplate and setting the templateModule configuration parameter of the IProduct implementation to the name of the implementation module. Refer to Examples for a sample implementation of IProductTemplate.
The tool operates on a product that is either specified by the -p option or is present in the folder from which the tool is executed. The tool will create the resources sub-folder in the output directory specified with -o option. If the -o option is not specified the resources is created in the product root directory.
The tool will search the repositories specified in the module implementing xdc.tools.product.IProduct for RTSC platforms. This search can be disabled by specifying the--disable_repo_search option. The user needs to ensure that the repositories are installed in the product root directory before using the tool.
EXAMPLE
      xs xdc.tools.product.trexgen
                      -p exampleprod_1_0_0_00
                      -m xdc.tools.product.plugingen.examples.ExampleProduct
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '[-p product_root_directory]',
    ' -m module',
    '[-o outdir]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.generationFormat = String null;
    // Plugin generation format
    params.outputDir = String null;
    // Output directory in which the plugin will be generated
    params.productDir = String "./";
    // Product root directory
    params.productModule = String undefined;
    // Input description of the plug-in to be specified
config Main.Params.generationFormat // instance
index URL

Plugin generation format

Configuration settings
var params = new Main.Params;
...
params.generationFormat = String null;
config Main.Params.outputDir // instance
index URL

Output directory in which the plugin will be generated

Configuration settings
var params = new Main.Params;
...
params.outputDir = String null;
DETAILS
This option names the directory in which the project spec will be generated in a sub-directory named eclipse. If this option is not specified the tool will generate the plugin in the product root directory specified with the '-p' option.
config Main.Params.productDir // instance
index URL

Product root directory

Configuration settings
var params = new Main.Params;
...
params.productDir = String "./";
DETAILS
This option names the product root directory that is used by the tool to generate the projectspec files. For example, it's declared repositories are added to the package path and are searched for contributed platforms.
If the '-o' option is not specified, the tool generates the resources directory in the product root directory.
If this option is not specified, the product root directory is assumed to be ./.
config Main.Params.productModule // instance
index URL

Input description of the plug-in to be specified

Configuration settings
var params = new Main.Params;
...
params.productModule = String undefined;
DETAILS
This required option names a module that implements xdc.tools.product.IProduct.
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:51 GMT


package xdc.tools.repoman
index URL

Repository Manager tool

  • USAGE
  • OPTIONS
  • DETAILS
  • EXAMPLES
This tool creates and manages package repositories. It displays information about archived packages, extracts archived packages, extracts repositories from bundles and deletes packages from repositories. [ more ... ]
XDCspec declarations sourced in xdc/tools/repoman/package.xdc
requires xdc.tools;
requires xdc.shelf;
requires xdc.services.global;
package xdc.tools.repoman [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.repoman [--help]
    -t [-v] [-p pathname] [packagename...|packagefile...]
    -n [-v] [-p pathname] [packagename...|packagefile...]
    -x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] packagename...|packagefile...
    -x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] -b bundlerepository [packagename...] bundleFile
    -d [-v] [-F] [-r destrepo] packagename...
    -c [-v] [-F] [--providerId] [-r destrepo] [-p pathname] packagename...
    --rsave -f file [-p searchpath] repository...
    --rrestore -f file [-p searchpath] [index-spec]
    --rcreate -f file [-p searchpath] [index-spec] destrepository...
    [-F] --providerId providerId [repository...]
OPTIONS
-t
Display package info
-n
Display package names only
-x
Extract package(s)
-d
Delete package(s)
-p
Path arg
-r
Repository arg
-D
Include package dependencies
-R
Recursive include package dependencies
-a
Return an array of strings
-X
Return a Results struct as XML
-v
Print informative messages during execution
-b
Bundle repository arg
-F
Force incompatible packages
-c
Copy package(s)
-f
file arg to save/restore repository
--rsave
Save a repository's information to file
--rrestore
Restore one or more repositories from information in file
--rcreate
Create one or more repositories from information in file
--providerId
providerId for a repository
DETAILS
This tool creates and manages package repositories. It displays information about archived packages, extracts archived packages, extracts repositories from bundles and deletes packages from repositories.
Information about archived packages can be displayed with the '-t' and '-n' options. The '-p' argument is used to specify a directory in which to search. If the '-p' arg is omitted, the current directory is searched. Specific packages can searched for by specifying one or more package names, or one or more package archives at the end of the command line. If no packages are specified, information on all packages found in the search directory will be displayed.
Archived packages can be extracted to a repository with the '-x' option. '-x -D' will extract dependent packages, too. '-x -R' will recursively extract dependent packages. If any of the packages in the specified package list are not compatible, the operation will be aborted. '-F' can be used to force all packages to be extracted, regardles of compatibility. The '-p' arg is used to specify a directory to search in. If not specified, the current directory will be searched. The '-x' option also extracts a repository or packages from a bundle. In this case, the last argument specifies the bundle from which to extract the repository. The repository to be extracted is specified with the '-b' arg. If just packages are to be extracted, one or more package names should follow the name of the repository that they should be extracted from.
Packages can be deleted from a repository with '-d'. If the package has any subdirectores that contain packages, they will be left intact. After the package is deleted, if the package has no subdirectories with packages, empty directories that are part of the fully qualified package will be deleted, too.
Packages can be copied between repositories with '-c'. If the package being copied already exists in the destination repository, it will be deleted prior to being replaced.
The '-r' argument specifies a destination repository. If '-r' is omitted, the repository of the current package is used. If there is no current package, the current directory is used.
When a package name is given, it can be specified in full, such as 'ti.platforms.sim6xxx', or the wildcard characters '*' and '?' may be used, as in 'ti.platforms.*' or 'ti.catalog.c??00'. A version/key can also be attached to a package name in the following manner: 'ti.platforms.c6000[1,0,0,0,313835]'. A prefix of the full version/key may also be used: 'ti.platforms.c6000[1,0]'.
If a package name has multiple matches either with or without a version/key specified, the most recent will be selected. Wildcards may also be used when naming a package archive file.
EXAMPLES
xs xdc.tools.repoman -t
Displays all info on all archived packages in the current directory
xs xdc.tools.repoman -t -p C:\xdc-o19\exports
Displays all info on all archived packages in C:\xdc-o19\exports
xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti.platforms.*
Displays all info on archived packages whose names begin with ti.platforms. in C:\xdc-o19\exports
xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti_platforms*.tar
Displays all info on packages in files that match ti_platforms*.tar in C:\xdc-o19\exports
xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti.catalog.c6000 ti.catalog.sim6xxx
Displays all info on archived packages ti.catalog.c6000 and ti.catalog.sim6xxx in C:\xdc-o19\exports
xs xdc.tools.repoman -t http://www.sanb.design.ti.com/ti_sdo_ce_wizards_genserver.tar
Displays all info on archived package ti_sdo_ce_wizards_genserver.tar at URL http://www.sanb.design.ti.com
xs xdc.tools.repoman -x
Extracts all archived packages in the current directory to the current repository
xs xdc.tools.repoman -x -r C:\myrepo\packages -p C:\exports
Extracts all archived packages in C:\exports to C:\myrepo\packages repository
xs xdc.tools.repoman -x -r C:\myrepo\packages -p C:\exports ti.catalog.*
Extracts packages matching ti.catalog.* from c:\exports to c:\myrepo\packages
xs xdc.tools.repoman -x -r C:\myrepo\packages C:\exports\ti_catalog*.tar
Extracts packages from files matching C:\exports\ti_catalog*.tar to c:\myrepo\packages
xs xdc.tools.repoman -x -r C:\myrepo\packages C:\exports\ti_catalog*.tar
Extracts packages from files matching C:\exports\ti_catalog*.tar to c:\myrepo\packages
xs xdc.tools.repoman -x -R -r C:\myrepo -p C:\xdc-o19\exports ti.platforms.sim6xxx
Extracts the package ti.platforms.sim6xxx and all recursively dependent packages from C:\xdc-o19\exports to C:\myrepo
xs xdc.tools.repoman -x -r C:\ -b packages C:\exports\xdc_core.tar.gz
Extracts the repository 'packages' from bundle C:\exports\xdc_core.tar.gz to C:\
xs xdc.tools.repoman -x -r C:\myrepo -b examples ti.xdais.dm.examples.videnc1_copy C:\xdais_6_24.tar.gz
Extracts the package ti.xdais.dm.examples.videnc1_copy from repository 'examples' in bundle C:\xdais_6_24.tar.gz to C:\myrepo
xs xdc.tools.repoman -x -r C:\myrepo http://www.sanb.design.ti.com/ti_sdo_ce_wizards_genserver.tar
Extracts package ti_sdo_ce_wizards_genserver.tar at URL http://www.sanb.design.ti.com to c:\myrepo
xs xdc.tools.repoman -r C:\myrepo -b examples http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/xdais/7_10/exports/xdais_7_10.tar.gz
Extracts all of the packages in repository 'examples' from bundle xdais_7_10.tar.gz at URL http://... to C:\myrepo
xs xdc.tools.repoman -x -r C:\myrepo -b examples ti.xdais.dm.examples.videnc1_copy http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/xdais/6_24/exports/xdais_6_24.tar.gz
Extracts the package ti.xdais.dm.examples.videnc1_copy in repository 'examples' from bundle xdais_7_10.tar.gz at URL http://... to C:\myrepo
xs xdc.tools.repoman -c -r C:\destdir\packages -p C:\srcdir\packages ti.catalog.c6000
Copies the package ti.catalog.c6000 from C:\srcdir\packages to C:\destdir\packages
xs xdc.tools.repoman --rsave -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs c:/myrepo
Saves package information for repository c:/myrepo to file c:/repoinfo.rmn. Also saves the search path c:/pkgarchives;c:/testpkgs
xs xdc.tools.repoman --rrestore -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs
Restores all of the packages in the repository referenced in c:/repoinfo.rmn. Uses the search path c:/pkgarchives;c:/testpkgs to find and copy packages. Will create the repository if it doesn't exist.
xs xdc.tools.repoman --rcreate -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs c:/mynewrepo
Creates the new repository c:/mynewrepo from the repository referenced in the file c:/repoinfo.rmn. Uses the search path c:/pkgarchives;c:/testpkgs to find and copy packages. If successful, the newly created repository will be identical to its predecessor referenced in c:/repoinfo.rmn.
xs xdc.tools.repoman --providerId my_codec_engine c:/codec_engine_2_23/mypackages
Assigns the providerId attribute in c:/codec_engine_2_23/mypackages/.repo.xml the value my_codec_engine. If c:/codec_engine_2_23/mypackages/.repo.xml does not exist, it will be created.
generated on Sun, 25 Nov 2018 22:18:51 GMT


module xdc.tools.repoman.Main

metaonly module xdc.tools.repoman.Main
index URL

Command implementation

  • DETAILS
  • EXAMPLES
  • Configuration settings
  • Individual elements
This tool creates and manages package repositories. It displays information about archived packages, extracts archived packages, extracts repositories from bundles and deletes packages from repositories. [ more ... ]
Configuration settings sourced in xdc/tools/repoman/Main.xdc
var Main = xdc.useModule('xdc.tools.repoman.Main');
module-wide constants & types
    var obj = new Main.NameResults// ;
        obj.pkgName// array of PkgName structures = Main.PkgName[] ...
    var obj = new Main.Pkg// ;
        obj.name = String ...
        obj.file = String ...
        obj.release = String ...
        obj.label = String ...
        obj.version = String ...
        obj.date = String ...
        obj.buildable = String ...
        obj.originalProviderId = String ...
        obj.producerId = String ...
        obj.reqs = String[] ...
        obj.refs = String[] ...
        obj.repository = Main.Repo[] ...
    var obj = new Main.PkgName// ;
        obj.name = String ...
        obj.repository = Main.Repo[] ...
    var obj = new Main.Repo// represents a repository in a bundle;
        obj.name = String ...
        obj.pkg = String[] ...
    var obj = new Main.Results// ;
        obj.repository = String ...
        obj.providerId = String ...
        obj.producerId = String ...
        obj.writable = Bool ...
        obj.pkg// array of package info structures = Main.Pkg[] ...
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '-t [-v] [-p pathname] [packagename...|packagefile...]',
        '-n [-v] [-p pathname] [packagename...|packagefile...]',
        '-x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] packagename...|packagefile...',
        '-x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] -b bundlerepository [packagename...] bundleFile',
        '-d [-v] [-F] [-r destrepo] packagename...',
        '-c [-v] [-F] [--providerId] [-r destrepo] [-p pathname] packagename...',
        '--rsave -f file [-p searchpath] repository...',
        '--rrestore -f file [-p searchpath] [index-spec]',
        '--rcreate -f file [-p searchpath] [index-spec] destrepository...',
        '[-F] --providerId providerId [repository...]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.arrFlag// Return an array of strings = Bool false;
        params.bundleRepositoryArg// Bundle repository arg = String null;
        params.copyFlag// Copy package(s) = Bool false;
        params.deleteFlag// Delete package(s) = Bool false;
        params.dependentFlag// Include package dependencies = Bool false;
        params.extractFlag// Extract package(s) = Bool false;
        params.fileArg// file arg to save/restore repository = String null;
        params.forceFlag// Force incompatible packages = Bool false;
        params.infoFlag// Display package info = Bool false;
        params.namesFlag// Display package names only = Bool false;
        params.pathArg// Path arg = String null;
        params.provIdArg// providerId for a repository = String null;
        params.rcreateFlag// Create one or more repositories from information in file = Bool false;
        params.recursiveDepFlag// Recursive include package dependencies = Bool false;
        params.repositoryArg// Repository arg = String null;
        params.rrestoreFlag// Restore one or more repositories from information in file = Bool false;
        params.rsaveFlag// Save a repository's information to file = Bool false;
        params.verboseFlag// Print informative messages during execution = Bool false;
        params.xmlFlag// Return a Results struct as XML = Bool false;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
This tool creates and manages package repositories. It displays information about archived packages, extracts archived packages, extracts repositories from bundles and deletes packages from repositories.
Information about archived packages can be displayed with the '-t' and '-n' options. The '-p' argument is used to specify a directory in which to search. If the '-p' arg is omitted, the current directory is searched. Specific packages can searched for by specifying one or more package names, or one or more package archives at the end of the command line. If no packages are specified, information on all packages found in the search directory will be displayed.
Archived packages can be extracted to a repository with the '-x' option. '-x -D' will extract dependent packages, too. '-x -R' will recursively extract dependent packages. If any of the packages in the specified package list are not compatible, the operation will be aborted. '-F' can be used to force all packages to be extracted, regardles of compatibility. The '-p' arg is used to specify a directory to search in. If not specified, the current directory will be searched. The '-x' option also extracts a repository or packages from a bundle. In this case, the last argument specifies the bundle from which to extract the repository. The repository to be extracted is specified with the '-b' arg. If just packages are to be extracted, one or more package names should follow the name of the repository that they should be extracted from.
Packages can be deleted from a repository with '-d'. If the package has any subdirectores that contain packages, they will be left intact. After the package is deleted, if the package has no subdirectories with packages, empty directories that are part of the fully qualified package will be deleted, too.
Packages can be copied between repositories with '-c'. If the package being copied already exists in the destination repository, it will be deleted prior to being replaced.
The '-r' argument specifies a destination repository. If '-r' is omitted, the repository of the current package is used. If there is no current package, the current directory is used.
When a package name is given, it can be specified in full, such as 'ti.platforms.sim6xxx', or the wildcard characters '*' and '?' may be used, as in 'ti.platforms.*' or 'ti.catalog.c??00'. A version/key can also be attached to a package name in the following manner: 'ti.platforms.c6000[1,0,0,0,313835]'. A prefix of the full version/key may also be used: 'ti.platforms.c6000[1,0]'.
If a package name has multiple matches either with or without a version/key specified, the most recent will be selected. Wildcards may also be used when naming a package archive file.
EXAMPLES
xs xdc.tools.repoman -t
Displays all info on all archived packages in the current directory
xs xdc.tools.repoman -t -p C:\xdc-o19\exports
Displays all info on all archived packages in C:\xdc-o19\exports
xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti.platforms.*
Displays all info on archived packages whose names begin with ti.platforms. in C:\xdc-o19\exports
xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti_platforms*.tar
Displays all info on packages in files that match ti_platforms*.tar in C:\xdc-o19\exports
xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti.catalog.c6000 ti.catalog.sim6xxx
Displays all info on archived packages ti.catalog.c6000 and ti.catalog.sim6xxx in C:\xdc-o19\exports
xs xdc.tools.repoman -t http://www.sanb.design.ti.com/ti_sdo_ce_wizards_genserver.tar
Displays all info on archived package ti_sdo_ce_wizards_genserver.tar at URL http://www.sanb.design.ti.com
xs xdc.tools.repoman -x
Extracts all archived packages in the current directory to the current repository
xs xdc.tools.repoman -x -r C:\myrepo\packages -p C:\exports
Extracts all archived packages in C:\exports to C:\myrepo\packages repository
xs xdc.tools.repoman -x -r C:\myrepo\packages -p C:\exports ti.catalog.*
Extracts packages matching ti.catalog.* from c:\exports to c:\myrepo\packages
xs xdc.tools.repoman -x -r C:\myrepo\packages C:\exports\ti_catalog*.tar
Extracts packages from files matching C:\exports\ti_catalog*.tar to c:\myrepo\packages
xs xdc.tools.repoman -x -r C:\myrepo\packages C:\exports\ti_catalog*.tar
Extracts packages from files matching C:\exports\ti_catalog*.tar to c:\myrepo\packages
xs xdc.tools.repoman -x -R -r C:\myrepo -p C:\xdc-o19\exports ti.platforms.sim6xxx
Extracts the package ti.platforms.sim6xxx and all recursively dependent packages from C:\xdc-o19\exports to C:\myrepo
xs xdc.tools.repoman -x -r C:\ -b packages C:\exports\xdc_core.tar.gz
Extracts the repository 'packages' from bundle C:\exports\xdc_core.tar.gz to C:\
xs xdc.tools.repoman -x -r C:\myrepo -b examples ti.xdais.dm.examples.videnc1_copy C:\xdais_6_24.tar.gz
Extracts the package ti.xdais.dm.examples.videnc1_copy from repository 'examples' in bundle C:\xdais_6_24.tar.gz to C:\myrepo
xs xdc.tools.repoman -x -r C:\myrepo http://www.sanb.design.ti.com/ti_sdo_ce_wizards_genserver.tar
Extracts package ti_sdo_ce_wizards_genserver.tar at URL http://www.sanb.design.ti.com to c:\myrepo
xs xdc.tools.repoman -r C:\myrepo -b examples http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/xdais/7_10/exports/xdais_7_10.tar.gz
Extracts all of the packages in repository 'examples' from bundle xdais_7_10.tar.gz at URL http://... to C:\myrepo
xs xdc.tools.repoman -x -r C:\myrepo -b examples ti.xdais.dm.examples.videnc1_copy http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/xdais/6_24/exports/xdais_6_24.tar.gz
Extracts the package ti.xdais.dm.examples.videnc1_copy in repository 'examples' from bundle xdais_7_10.tar.gz at URL http://... to C:\myrepo
xs xdc.tools.repoman -c -r C:\destdir\packages -p C:\srcdir\packages ti.catalog.c6000
Copies the package ti.catalog.c6000 from C:\srcdir\packages to C:\destdir\packages
xs xdc.tools.repoman --rsave -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs c:/myrepo
Saves package information for repository c:/myrepo to file c:/repoinfo.rmn. Also saves the search path c:/pkgarchives;c:/testpkgs
xs xdc.tools.repoman --rrestore -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs
Restores all of the packages in the repository referenced in c:/repoinfo.rmn. Uses the search path c:/pkgarchives;c:/testpkgs to find and copy packages. Will create the repository if it doesn't exist.
xs xdc.tools.repoman --rcreate -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs c:/mynewrepo
Creates the new repository c:/mynewrepo from the repository referenced in the file c:/repoinfo.rmn. Uses the search path c:/pkgarchives;c:/testpkgs to find and copy packages. If successful, the newly created repository will be identical to its predecessor referenced in c:/repoinfo.rmn.
xs xdc.tools.repoman --providerId my_codec_engine c:/codec_engine_2_23/mypackages
Assigns the providerId attribute in c:/codec_engine_2_23/mypackages/.repo.xml the value my_codec_engine. If c:/codec_engine_2_23/mypackages/.repo.xml does not exist, it will be created.
struct Main.NameResults
index URL
Configuration settings
var obj = new Main.NameResults;
    obj.pkgName = Main.PkgName[] ...
    // array of PkgName structures
struct Main.Pkg
index URL
Configuration settings
var obj = new Main.Pkg;
    obj.name = String ...
    obj.file = String ...
    obj.release = String ...
    obj.label = String ...
    obj.version = String ...
    obj.date = String ...
    obj.buildable = String ...
    obj.originalProviderId = String ...
    obj.producerId = String ...
    obj.reqs = String[] ...
    obj.refs = String[] ...
    obj.repository = Main.Repo[] ...
struct Main.PkgName
index URL
Configuration settings
var obj = new Main.PkgName;
    obj.name = String ...
    obj.repository = Main.Repo[] ...
struct Main.Repo
index URL

represents a repository in a bundle

Configuration settings
var obj = new Main.Repo;
    obj.name = String ...
    obj.pkg = String[] ...
struct Main.Results
index URL
Configuration settings
var obj = new Main.Results;
    obj.repository = String ...
    obj.providerId = String ...
    obj.producerId = String ...
    obj.writable = Bool ...
    obj.pkg = Main.Pkg[] ...
    // array of package info structures
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '-t [-v] [-p pathname] [packagename...|packagefile...]',
    '-n [-v] [-p pathname] [packagename...|packagefile...]',
    '-x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] packagename...|packagefile...',
    '-x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] -b bundlerepository [packagename...] bundleFile',
    '-d [-v] [-F] [-r destrepo] packagename...',
    '-c [-v] [-F] [--providerId] [-r destrepo] [-p pathname] packagename...',
    '--rsave -f file [-p searchpath] repository...',
    '--rrestore -f file [-p searchpath] [index-spec]',
    '--rcreate -f file [-p searchpath] [index-spec] destrepository...',
    '[-F] --providerId providerId [repository...]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.arrFlag = Bool false;
    // Return an array of strings
    params.bundleRepositoryArg = String null;
    // Bundle repository arg
    params.copyFlag = Bool false;
    // Copy package(s)
    params.deleteFlag = Bool false;
    // Delete package(s)
    params.dependentFlag = Bool false;
    // Include package dependencies
    params.extractFlag = Bool false;
    // Extract package(s)
    params.fileArg = String null;
    // file arg to save/restore repository
    params.forceFlag = Bool false;
    // Force incompatible packages
    params.infoFlag = Bool false;
    // Display package info
    params.namesFlag = Bool false;
    // Display package names only
    params.pathArg = String null;
    // Path arg
    params.provIdArg = String null;
    // providerId for a repository
    params.rcreateFlag = Bool false;
    // Create one or more repositories from information in file
    params.recursiveDepFlag = Bool false;
    // Recursive include package dependencies
    params.repositoryArg = String null;
    // Repository arg
    params.rrestoreFlag = Bool false;
    // Restore one or more repositories from information in file
    params.rsaveFlag = Bool false;
    // Save a repository's information to file
    params.verboseFlag = Bool false;
    // Print informative messages during execution
    params.xmlFlag = Bool false;
    // Return a Results struct as XML
config Main.Params.arrFlag // instance
index URL

Return an array of strings

Configuration settings
var params = new Main.Params;
...
params.arrFlag = Bool false;
config Main.Params.bundleRepositoryArg // instance
index URL

Bundle repository arg

Configuration settings
var params = new Main.Params;
...
params.bundleRepositoryArg = String null;
config Main.Params.copyFlag // instance
index URL

Copy package(s)

Configuration settings
var params = new Main.Params;
...
params.copyFlag = Bool false;
config Main.Params.deleteFlag // instance
index URL

Delete package(s)

Configuration settings
var params = new Main.Params;
...
params.deleteFlag = Bool false;
config Main.Params.dependentFlag // instance
index URL

Include package dependencies

Configuration settings
var params = new Main.Params;
...
params.dependentFlag = Bool false;
config Main.Params.extractFlag // instance
index URL

Extract package(s)

Configuration settings
var params = new Main.Params;
...
params.extractFlag = Bool false;
config Main.Params.fileArg // instance
index URL

file arg to save/restore repository

Configuration settings
var params = new Main.Params;
...
params.fileArg = String null;
config Main.Params.forceFlag // instance
index URL

Force incompatible packages

Configuration settings
var params = new Main.Params;
...
params.forceFlag = Bool false;
config Main.Params.infoFlag // instance
index URL

Display package info

Configuration settings
var params = new Main.Params;
...
params.infoFlag = Bool false;
config Main.Params.namesFlag // instance
index URL

Display package names only

Configuration settings
var params = new Main.Params;
...
params.namesFlag = Bool false;
config Main.Params.pathArg // instance
index URL

Path arg

Configuration settings
var params = new Main.Params;
...
params.pathArg = String null;
config Main.Params.provIdArg // instance
index URL

providerId for a repository

Configuration settings
var params = new Main.Params;
...
params.provIdArg = String null;
config Main.Params.rcreateFlag // instance
index URL

Create one or more repositories from information in file

Configuration settings
var params = new Main.Params;
...
params.rcreateFlag = Bool false;
config Main.Params.recursiveDepFlag // instance
index URL

Recursive include package dependencies

Configuration settings
var params = new Main.Params;
...
params.recursiveDepFlag = Bool false;
config Main.Params.repositoryArg // instance
index URL

Repository arg

Configuration settings
var params = new Main.Params;
...
params.repositoryArg = String null;
config Main.Params.rrestoreFlag // instance
index URL

Restore one or more repositories from information in file

Configuration settings
var params = new Main.Params;
...
params.rrestoreFlag = Bool false;
config Main.Params.rsaveFlag // instance
index URL

Save a repository's information to file

Configuration settings
var params = new Main.Params;
...
params.rsaveFlag = Bool false;
config Main.Params.verboseFlag // instance
index URL

Print informative messages during execution

Configuration settings
var params = new Main.Params;
...
params.verboseFlag = Bool false;
config Main.Params.xmlFlag // instance
index URL

Return a Results struct as XML

Configuration settings
var params = new Main.Params;
...
params.xmlFlag = Bool false;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:51 GMT


package xdc.tools.repoman.sg
index URL

Graphical interface to repoman tool

  • USAGE
  • OPTIONS
  • DETAILS
  • SEE
For more information about how to use this tool, see the xdc.tools.repoman.sg User's Guide. [ more ... ]
XDCspec declarations sourced in xdc/tools/repoman/sg/package.xdc
requires xdc.tools.sg;
package xdc.tools.repoman.sg [1, 0, 0] {
    module Main;
    // Command implementation
}
USAGE
xs xdc.tools.repoman.sg [--help]
    [--packagepath PATH]
OPTIONS
--packagepath
repositories to scan for packages
DETAILS
For more information about how to use this tool, see the xdc.tools.repoman.sg User's Guide.
SEE
xdc.tools.repoman
generated on Sun, 25 Nov 2018 22:18:51 GMT


module xdc.tools.repoman.sg.Main

metaonly module xdc.tools.repoman.sg.Main
index URL

Command implementation

  • DETAILS
  • SEE
  • Configuration settings
  • Individual elements
For more information about how to use this tool, see the xdc.tools.repoman.sg User's Guide. [ more ... ]
Configuration settings sourced in xdc/tools/repoman/sg/Main.xdc
var Main = xdc.useModule('xdc.tools.repoman.sg.Main');
module-wide config parameters
     Main.usage// Usage for this command = String[] [
        '[--packagepath PATH]'
    ];
module-wide functions
     Main.exec// xs script entry point(Any args) returns Any
     Main.main// xs shell entry point(Any args) returns Any
per-instance config parameters
    var params = new Main.Params// Instance config-params object;
        params.pathArg// repositories to scan for packages = String null;
per-instance functions
     inst.run// Underlying implementation of the command(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
For more information about how to use this tool, see the xdc.tools.repoman.sg User's Guide.
SEE
xdc.tools.repoman
config Main.usage // module-wide
index URL

Usage for this command

Configuration settings
Main.usage = String[] [
    '[--packagepath PATH]'
];
Main.exec() // module-wide
index URL

xs script entry point

Configuration settings
Main.exec(Any args) returns Any
DETAILS
This function is called from within other XDCscript scripts and performs the same operations as main() except that, rather than output the return value of inst.run(), this value is simply returned to the caller of exec().
Main.main() // module-wide
index URL

xs shell entry point

Configuration settings
Main.main(Any args) returns Any
DETAILS
This function
  • creates a no-arg instance, inst, of the module inheriting this interface;
  • parses command line arguments placing all options in the config params of the inheriting module;
  • creates a xdc.tools.Cmdr instance, cmdr;
  • calls inst.run() with the cmdr and any command line command line arguments not parsed as options; and
  • outputs the return result from inst.run()
Instance Config Parameters
index URL

Configuration settings
var params = new Main.Params;
// Instance config-params object
    params.pathArg = String null;
    // repositories to scan for packages
config Main.Params.pathArg // instance
index URL

repositories to scan for packages

Configuration settings
var params = new Main.Params;
...
params.pathArg = String null;
Main.run() // instance
index URL

Underlying implementation of the command

Configuration settings
inst.run(Cmdr.Instance cmdr, String[] args) returns Any
DETAILS
Since this method is used to support both command line tools and other XDCscript scripts, it is important to avoid explicit termination of the JVM via java.lang.System.exit(); doing so precludes callers from handling failures.
Implementations should instead call
  • cmdr.error() when encountering a fatal error.
  • cmdr.warning() when encountering a non-fatal error.
  • cmdr.info() when simply generating an informative message.
generated on Sun, 25 Nov 2018 22:18:51 GMT


XDCtools 3.51.01.18 GA Release Notes

November 25, 2018

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available as:

  • Compressed .zip file archive

All documentation is delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

This release includes a preview implementation of "C ROV": the ability to add ROV support for arbitrary C libraries without having to create a RTSC module. For more information see ROV for C Modules.

In addition, this release includes several significant improvements to the ROV2 user interface: it's now possible to

  • create custom tables from one or more table cells and save as a dashboard,
  • save and restore all of ROV's local storage to an external file (allowing one to import all ROV settings from one workspace into another),
  • use crtl-arrow keys to bring views to the foreground, and
  • set the default font to be fixed-width

In addition, this release includes an update from GNU Make 3.81 to 4.2.

To see a complete list of issues fixed in RTSC 3.51.x, click here.

The TI JIRA project release summary for XDCtools 3.51.01.18 is here.

Note: XDCtools 3.51.x is the last release stream to support 32-bit Windows hosts. Future release streams will only support 64-bit hosts.

back to top

Upgrade and Compatibility Information

XDCtools 3.51.x has two significant compatibility requirements:
  • when used in CCS, CCS must be version CCS 7.1.x (or above), and
  • packages built using any version of XDCtools prior to 3.50.00 must be rebuilt using 3.50.00 (or above) before they can be used with this release

Code Composer Studio (CCS)

XDCtools 3.51 must only be used in CCS 7.1.x (or above).

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS, that have dependencies on specific targets and platforms.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Generated Module headers: All generated module headers have been changed to support "const clean" configuration files (see Bug 506855) Because of this, all non-meta-only modules built with earlier releases must be rebuilt using XDCtools 3.50 (or above) in order to use the xdc.runtime provided by this release. As a result, XDCtools 3.50 (or above) can't be used with packages containing non-meta-only modules that were built using XDCtools 3.32 or earlier. In particular:

SYS/BIOS 6.46 packages can't be used with XDCtools 3.50 (or above); you must use SYS/BIOS 6.50.00 (or above)

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows 7 (32bit), Windows 8, Windows 10
  • Linux Ubuntu 12.04 (64bit), Ubuntu 14.04 (64bit), Ubuntu 15.10 (64bit)
  • Mac OS X Mavericks 10.9 (64bit), Yosemite 10.10 (64bit), El Capitan 10.11 (64bit)

Note: XDCtools 3.51.x is the last release stream to support 32-bit Windows hosts. Future release streams will only support 64-bit hosts.

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS), which includes any necessary device support or explicitly adds a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.1.1.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: November 25, 2018 Build Ver: 3.51.01.18 Rev: z18


package xdc.shelf
index URL

Third party open source tools required by XDCtools

The following jars are part of this package: [ more ... ]
XDCspec declarations sourced in xdc/shelf/package.xdc
package xdc.shelf [1, 0, 0] {
}
DETAILS
The following jars are part of this package:
Jar | Version | License | From | Description
js.jar | 1.7R4 | MPL 2.0 (note) | http://www.mozilla.org/rhino | Java implementation of JavaScript 1.5
antlr.jar | 3.1.1 | BSD | http://www.antlr.org | LR parser generator used to implement the RTSC IDL
tar.jar | 2.5 | Public Domain | http://www.trustice.com/java/tar | tar file reader
In addition to the jars above, XDCtools requires the following third-party software:
Name | Version | License | From | Description
gmake | 4.2.1 | GPL v3 | http://savannah.gnu.org/projects/make | command run by the `xdc` command to create and build packages
J2SE Runtime Environment(JRE) | 1.7.0_80 | Oracle Binary Code License Agreement for the Java SE Platform Products and JavaFX | http://www.oracle.com/technetwork/java/javase/ | XDCtools core functionality is implemented in Java. Also required by the Rhino JavaScript engine shipped with XDCtools.
Although the following tools are not required, they are optionally shipped with XDCtools distributions to ensure consistent behavior across various development platforms.
Exe | Version | License | From | Description
zip, unzip | 2.32 and 5.52 | info-zip | http://www.info-zip.org | command line utilities to zip and unzip package releases
tar | 1.29 | GPL v3 | http://www.gnu.org/software/tar | command line utilities to archive package directories
sh, gunzip, gzip, sed | cygwin 1.5.25-15 | GPL v3 | http://cygwin.com | (Windows only) korn shell compatible shell used by GNU make
cat, cp, date, echo, mkdir, mv, pwd, rm, touch | cygwin 1.5.25-15 (coreutils 6.10) | GPL v3 | http://cygwin.com | (Windows only) common utilites called from GNU make makefiles
All other files that are part of XDCtools are licensed under either EPL v1.0 or dual-licensed under EDL v1.0.
generated on Sun, 25 Nov 2018 22:22:42 GMT


RTSC/XDCtools 3.51.01.18

revision 3.51.01.18

RTSC/XDCtools

Real‑Time Software Components for Embedded Platforms

Welcome to RTSC!

RTSC is a C-based programming model for developing, delivering, and deploying Real-Time Software Components targeted for embedded platforms. The XDCtools product includes tooling and runtime elements for component-based programming using RTSC.

This following material applies to XDCtools 3.51.01.18. You can also view the most up to date documentation online at rtsc.eclipse.org.

Getting started

Using RTSC with CCStudio v4 Getting started and Flash tutorials

Document binders

General Information | White-papers and high-level FAQs
RTSC Programming | From primers to advanced topics
XDCtools User's Guide | Working with the XDCtools product
XDCtools Reference Manual | Detailing all elements of the XDCtools product

Packages

API Reference (cdoc) RTSC packages in the XDCtools product

Other documents

Release notes | Release notes for XDCtools 3.51.01.18
License | For XDCtools and bundled third-party files

Copyright © 2008 The Eclipse Foundation. All Rights Reserved


About the docs directory
========================

The documents in this directory can be viewed several ways:
 -- online at http://rtsc.eclipse.org/docs-tip
 -- using the Eclipse Help viewer after installing the
    "RTSC/XDCtools (IDE Support)" feature
 -- unzipping the "docs.zip" file and viewing with any web browser

To unzip the "docs.zip" file, use any .zip file handler program to expand
it directly into the docs directory. The docs can then be accessed via the
"index.html" file.

Note: Don't move, remove, or rename the "docs.zip" file itself, since
Eclipse Help displays its content directly from this file.


Supported Targets

XDCtools 3.51.00.13. Supported Targets (build host: Linux)
Target Name (suffix) | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.arm.A15F (a15fg) | gnu.targets.arm.rtsv7A | 6.3.1 | 6.3.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F (a8fg) | gnu.targets.arm.rtsv7A | 6.3.1 | 6.3.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F (a9fg) | gnu.targets.arm.rtsv7A | 6.3.1 | 6.3.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T (v5T) | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 (v6) | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A (v7A) | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7AF (v7AF) | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.M3 (m3g) | gnu.targets.arm.rtsv7M | 6.3.1 | 6.3.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M33F (m33fg) | gnu.targets.arm.rtsv8M | 6.3.1 | 6.3.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M33F
gnu.targets.arm.M4 (m4g) | gnu.targets.arm.rtsv7M | 6.3.1 | 6.3.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.M4F (m4fg) | gnu.targets.arm.rtsv7M | 6.3.1 | 6.3.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.arm.M3 (rm3) | iar.targets.arm.rts | 8.11.1 | 8.20.2 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M33 (rm33) | iar.targets.arm.rts | 8.11.1 | 8.20.2 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M33
iar.targets.arm.M4 (rm4) | iar.targets.arm.rts | 8.11.1 | 8.20.2 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F (rm4f) | iar.targets.arm.rts | 8.11.1 | 8.20.2 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
ti.targets.C28_float (28FP) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large (28L) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C674 (674) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.arm.clang.M3 (m3) | ti.targets.arm.rtsarm | 8.0.0 | 8.0.0 | -Dxdc_target_types__=ti/targets/arm/clang/std.h -Dxdc_target_name__=M3
ti.targets.arm.clang.M33F (m33f) | ti.targets.arm.rtsarm | 8.0.0 | 8.0.0 | -Dxdc_target_types__=ti/targets/arm/clang/std.h -Dxdc_target_name__=M33F
ti.targets.arm.clang.M4 (m4) | ti.targets.arm.rtsarm | 8.0.0 | 8.0.0 | -Dxdc_target_types__=ti/targets/arm/clang/std.h -Dxdc_target_name__=M4
ti.targets.arm.clang.M4F (m4f) | ti.targets.arm.rtsarm | 8.0.0 | 8.0.0 | -Dxdc_target_types__=ti/targets/arm/clang/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.Arm9 (e9) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.M3 (em3) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M4 (em4) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F (em4f) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R5F (er5f) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R5F
ti.targets.arp32.elf.ARP32 (earp32) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far (earp32F) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C66 (e66) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C674 (e674) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-g08) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name (suffix)
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an executable. Each target has a unique "suffix" that is appended to a single letter qualifier ('a', 'o', and 'x') to form a file extension for target-specific files:
  *.a<suffix> - archives (libraries),
  *.o<suffix> - object files, and
  *.x<suffix> - executable files.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 31 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.A53F | this target disabled generation of its docs
gnu.targets.Linux86_64 | this target disabled generation of its docs
gnu.targets.MacOS86_64 | this target disabled generation of its docs
ti.targets.arm.elf.R4Ft | this target disabled generation of its docs
ti.targets.elf.C64P | this target disabled generation of its docs
ti.targets.elf.C28_float | this target disabled generation of its docs
ti.targets.C64P | this target disabled generation of its docs
gnu.targets.Linux86 | not configured for Linux testing
gnu.targets.Mingw | no linker version
microsoft.targets.Net32 | no linker version
microsoft.targets.VC98 | no pre-built xdc.runtime is supplied for this target
microsoft.targets.Win32 | not configured for Linux testing
microsoft.targets.Win64 | not configured for Linux testing
ti.targets.C28 | no pre-built xdc.runtime is supplied for this target
ti.targets.C66 | no pre-built xdc.runtime is supplied for this target


XDC Packages

  • all packages
    • gnu.targets
      • ITarget
      • Linux86
      • Mingw
    • gnu.targets.arm
      • A15F
      • A8F
      • A9F
      • GCArmv5T
      • GCArmv6
      • GCArmv7A
      • GCArmv7AF
      • IM
      • ITarget
      • M3
      • M33F
      • M4
      • M4F
    • gnu.targets.arm.rtsv5T
    • gnu.targets.arm.rtsv6
    • gnu.targets.arm.rtsv7A
      • Settings
    • gnu.targets.arm.rtsv7M
      • Settings
    • gnu.targets.arm.rtsv8A
      • Settings
    • gnu.targets.arm.rtsv8M
      • Settings
    • gnu.targets.rts86GW
    • gnu.targets.rts86M
    • gnu.targets.rts86U
    • host.platforms.PC
      • Intel80586
      • Platform
    • host.platforms.SUN
      • Platform
      • SunSparc7
    • host.platforms.arm
      • Platform
    • host.platforms.macos
      • Intel80586
      • Platform
    • iar.targets
    • iar.targets.arm
      • ITarget
      • M3
      • M33
      • M4
      • M4F
    • iar.targets.arm.rts
      • Settings
      • VectorTable
    • iar.targets.msp430
      • ITarget
      • MSP430
      • MSP430X_large
      • MSP430X_small
    • iar.targets.msp430.rts
      • Settings
    • iar.tools.configuro
      • Main
    • microsoft.targets
      • ITarget
      • Net32
      • VC98
      • Win32
    • microsoft.targets.rts
    • ti.catalog
      • ICpuDataSheet
    • ti.catalog.arm
      • AM1705
      • AM1707
      • AM1806
      • AM1808
      • CortexM3
      • IOMAP2x3x
      • IOMAP3xxx
      • ITMS320DA8xx
      • OMAP2430
      • OMAP2431
      • OMAP2530
      • OMAP2531
      • OMAP3403
      • OMAP3405
      • OMAP3425
      • OMAP3503
      • OMAP3505
      • OMAP3515
      • OMAP3517
      • OMAP3525
      • OMAP3530
      • OMAPL108
      • OMAPL118
      • OMAPL137
      • OMAPL138
      • TMS320C1030
      • TMS320C3430
      • TMS320C5912
      • TMS320CDM510
      • TMS320CDM6446
      • TMS320CDM6467
      • TMS320CDM730
      • TMS320CDM740
      • TMS320DA828
      • TMS320DA830
      • TMS320DA840
      • TMS320DA850
      • TMS320DM355
      • TMS320DM357
      • TMS320DM365
      • TMS470R10
      • TMS570LS20216
      • TMS570PSF762
      • TNETV107X
    • ti.catalog.arm.cortexa15
      • C66AK2E05
      • DRA7XX
      • ITCI663X
      • OMAP5430
      • TCI6630K2L
      • TCI6636K2H
      • TCI6638K2K
      • TCI66AK2G02
      • Vayu
    • ti.catalog.arm.cortexa53
      • CortexA
    • ti.catalog.arm.cortexa8
      • AM3358
      • AM3359
      • AM3505
      • AM3517
      • DM37XX
      • IAM335X
      • IOMAP3xxx
      • ITI811X
      • ITI813X
      • ITI8148
      • ITI8168
      • OMAP3403
      • OMAP3405
      • OMAP3425
      • OMAP3503
      • OMAP3505
      • OMAP3515
      • OMAP3517
      • OMAP3525
      • OMAP3530
      • TMS320C3430
      • TMS320C6A8149
      • TMS320C6A8168
      • TMS320DM8148
      • TMS320DM8168
      • TMS320TI811X
      • TMS320TI813X
      • TMS320TI814X
      • TMS320TI816X
    • ti.catalog.arm.cortexa9
      • AM437X
      • OMAP4430
    • ti.catalog.arm.cortexm3
      • CC13xx
      • CC26xx
      • CortexM
      • CortexM3
      • F28M35x
      • ITI811X
      • ITI813X
      • ITI8148
      • ITI8168
      • OMAP4430
      • Tiva
      • TMS320C6A8149
      • TMS320C6A8168
      • TMS320DM8148
      • TMS320DM8168
      • TMS320TI811X
      • TMS320TI813X
      • TMS320TI814X
      • TMS320TI816X
    • ti.catalog.arm.cortexm3.concertoInit
      • Boot
    • ti.catalog.arm.cortexm33
      • CortexM
    • ti.catalog.arm.cortexm4
      • CC13xx
      • CC26xx
      • CC32xx
      • DRA7XX
      • MSP432
      • MSP432E
      • OMAP5430
      • TDA3XX
      • Tiva
      • Vayu
    • ti.catalog.arm.cortexm4.tiva.ce
      • Boot
    • ti.catalog.arm.cortexr4
      • CortexR
    • ti.catalog.arm.cortexr5
      • CortexR
    • ti.catalog.arm.peripherals.timers
      • Timer
    • ti.catalog.arp32
      • Arctic
      • DRA7XX
      • TDA3XX
      • TMS320C6A8149
      • Vayu
    • ti.catalog.c2800
      • F28M35x
      • ITMS320C28026
      • ITMS320C28027
      • ITMS320C28032
      • ITMS320C28034
      • ITMS320C28342
      • ITMS320C28344
      • ITMS320C28346
      • ITMS320C283xx
      • ITMS320C28xx
      • ITMS320F28065
      • ITMS320F28069
      • TMS320C2801
      • TMS320C28015
      • TMS320C28016
      • TMS320C2802
      • TMS320C28020
      • TMS320C28021
      • TMS320C28022
      • TMS320C28023
      • TMS320C28026
      • TMS320C28027
      • TMS320C28030
      • TMS320C28031
      • TMS320C28032
      • TMS320C28033
      • TMS320C28034
      • TMS320C28035
      • TMS320C28044
      • TMS320C2806
      • TMS320C2808
      • TMS320C2809
      • TMS320C2810
      • TMS320C2811
      • TMS320C2812
      • TMS320C28232
      • TMS320C28234
      • TMS320C28235
      • TMS320C28332
      • TMS320C28334
      • TMS320C28335
      • TMS320C28341
      • TMS320C28342
      • TMS320C28343
      • TMS320C28344
      • TMS320C28345
      • TMS320C28346
      • TMS320F28062
      • TMS320F28063
      • TMS320F28064
      • TMS320F28065
      • TMS320F28066
      • TMS320F28067
      • TMS320F28068
      • TMS320F28069
    • ti.catalog.c2800.concertoInit
      • Boot
    • ti.catalog.c2800.init
      • Boot
    • ti.catalog.c2800.initF2837x
      • Boot
    • ti.catalog.c6000
      • Arctic
      • C64
      • C64P
      • C66
      • C67
      • C674
      • DM37XX
      • DRA7XX
      • IAntara
      • IC6x
      • ICacheInfo
      • IDaVinci
      • IHimalaya
      • IOMAP2x3x
      • IOMAP3xxx
      • ITI811X
      • ITI8148
      • ITI8168
      • ITMS320C642x
      • ITMS320C6452
      • ITMS320C64_128K
      • ITMS320C64_1M
      • ITMS320C64_256K
      • ITMS320C64_512K
      • ITMS320C6655
      • ITMS320C6x0x
      • ITMS320C6x1x
      • ITMS320CDM6467
      • ITMS320CDRA44x
      • ITMS320CDRA45x
      • ITMS320CDRx40x
      • ITMS320CTCI6484
      • ITMS320CTCI6486
      • ITMS320CTCI648x
      • ITMS320CTCI6497
      • ITMS320DA8xx
      • ITMS320TCI6608
      • ITMS320TCI6616
      • ITMS320TCI663x
      • Kepler
      • OMAP2431
      • OMAP2530
      • OMAP2531
      • OMAP3425
      • OMAP3525
      • OMAP3530
      • OMAP4430
      • OMAP5430
      • OMAPL137
      • OMAPL138
      • TCI66AK2G02
      • TDA3XX
      • TMS320C2430
      • TMS320C3430
      • TMS320C6201
      • TMS320C6202
      • TMS320C6203
      • TMS320C6203B
      • TMS320C6204
      • TMS320C6205
      • TMS320C6211
      • TMS320C6211B
      • TMS320C6410
      • TMS320C6411
      • TMS320C6412
      • TMS320C6413
      • TMS320C6414
      • TMS320C6415
      • TMS320C6416
      • TMS320C6418
      • TMS320C6421
      • TMS320C6424
      • TMS320C6428
      • TMS320C6452
      • TMS320C6454
      • TMS320C6455
      • TMS320C6457
      • TMS320C6472
      • TMS320C6474
      • TMS320C6654
      • TMS320C6655
      • TMS320C6657
      • TMS320C6670
      • TMS320C6671
      • TMS320C6672
      • TMS320C6674
      • TMS320C6678
      • TMS320C66AK2E02
      • TMS320C66AK2E05
      • TMS320C66AK2H06
      • TMS320C66AK2H12
      • TMS320C6701
      • TMS320C6711
      • TMS320C6711B
      • TMS320C6712
      • TMS320C6713
      • TMS320C6722
      • TMS320C6726
      • TMS320C6727
      • TMS320C6742
      • TMS320C6743
      • TMS320C6745
      • TMS320C6746
      • TMS320C6747
      • TMS320C6748
      • TMS320C6A8149
      • TMS320C6A8168
      • TMS320CDA700
      • TMS320CDA700SIM
      • TMS320CDA705
      • TMS320CDA707
      • TMS320CDA710
      • TMS320CDM415
      • TMS320CDM420
      • TMS320CDM421
      • TMS320CDM425
      • TMS320CDM426
      • TMS320CDM640
      • TMS320CDM641
      • TMS320CDM642
      • TMS320CDM6431
      • TMS320CDM6433
      • TMS320CDM6435
      • TMS320CDM6437
      • TMS320CDM6441
      • TMS320CDM6443
      • TMS320CDM6446
      • TMS320CDM6467
      • TMS320CDM647
      • TMS320CDM648
      • TMS320CDM730
      • TMS320CDM740
      • TMS320CDRA402
      • TMS320CDRA404
      • TMS320CDRA406
      • TMS320CDRA414
      • TMS320CDRA416
      • TMS320CDRA442
      • TMS320CDRA444
      • TMS320CDRA446
      • TMS320CDRA447
      • TMS320CDRA457
      • TMS320CDRA459
      • TMS320CDRI300
      • TMS320CF761990
      • TMS320CTCI6482
      • TMS320CTCI6484
      • TMS320CTCI6486
      • TMS320CTCI6487
      • TMS320CTCI6488
      • TMS320CTCI6498
      • TMS320CTNETV2685
      • TMS320DA802
      • TMS320DA803
      • TMS320DA804
      • TMS320DA805
      • TMS320DA807
      • TMS320DA808
      • TMS320DA810
      • TMS320DA828
      • TMS320DA830
      • TMS320DA840
      • TMS320DA850
      • TMS320DM357
      • TMS320DM8148
      • TMS320DM8168
      • TMS320TCI6485
      • TMS320TCI6489
      • TMS320TCI6608
      • TMS320TCI6614
      • TMS320TCI6616
      • TMS320TCI6618
      • TMS320TCI6630K2L
      • TMS320TCI6634
      • TMS320TCI6636
      • TMS320TCI6638
      • TMS320TI811X
      • TMS320TI814X
      • TMS320TI816X
      • TNETV107X
      • Vayu
    • ti.catalog.msp430
      • IMSP430
      • MSP430
    • ti.catalog.msp430.f22xx
      • IMSP430x22xx
      • MSP430F223x
      • MSP430F225x
      • MSP430F2274
    • ti.catalog.msp430.f54xx
      • IMSP430F54xx
      • MSP430F5418
      • MSP430F5419
      • MSP430F5435
      • MSP430F5436
      • MSP430F5437
      • MSP430F5438
    • ti.catalog.msp430.f55xx
      • CC430F6137
      • IMSP430F55xx
      • MSP430F5529
    • ti.catalog.msp430.init
      • Boot
    • ti.catalog.msp430.peripherals.adc
      • ADC10
      • ADC10_B
      • ADC12
      • ADC12_B
      • IADC
      • SD16_A
    • ti.catalog.msp430.peripherals.clock
      • BCSplus
      • CS
      • CS_A
      • IClock
      • UCS
    • ti.catalog.msp430.peripherals.communication
      • EUSCI_A0
      • EUSCI_A1
      • EUSCI_B0
      • IEUSCI
      • IUSCI
      • IUSCI_A0_SPI
      • IUSCI_A0_UART
      • IUSCI_A1_SPI
      • IUSCI_A1_UART
      • IUSCI_B0_I2C
      • IUSCI_B0_SPI
      • IUSCI_B1_I2C
      • IUSCI_B1_SPI
      • IUSCI_I2C
      • IUSCI_SPI
      • IUSCI_UART
      • IUSI
      • USCI_A0_SPI_2xx
      • USCI_A0_UART_2xx
      • USCI_A1_SPI_2xx
      • USCI_A1_UART_2xx
      • USCI_B0_I2C_2xx
      • USCI_B0_SPI_2xx
      • USCI_B1_I2C_2xx
      • USCI_B1_SPI_2xx
      • USI
    • ti.catalog.msp430.peripherals.comparator
      • Comparator_Aplus
      • Comparator_D
      • Comparator_E
      • IComparator
    • ti.catalog.msp430.peripherals.dac
      • DAC12
      • IDAC
    • ti.catalog.msp430.peripherals.dma
      • DMA
      • IDMA
    • ti.catalog.msp430.peripherals.frctl
      • FRCTL
      • IFRCTL
    • ti.catalog.msp430.peripherals.gpio
      • GPIO_MSP430F20x1
      • GPIO_MSP430F20x2
      • GPIO_MSP430F20x3
      • GPIO_MSP430F21x1
      • GPIO_MSP430F21x2
      • GPIO_MSP430F22x2
      • GPIO_MSP430F22x4
      • GPIO_MSP430F23x
      • GPIO_MSP430F23x0
      • GPIO_MSP430F241x
      • GPIO_MSP430F24x
      • GPIO_MSP430F24x1
      • GPIO_MSP430F261x
      • GPIO_MSP430F543xA
      • GPIO_MSP430FR5736_32_26_22
      • GPIO_MSP430FR5737_33_27_23
      • GPIO_MSP430FR5738_34_30_28_24_20
      • GPIO_MSP430FR5739_35_31_29_25_21
      • GPIO_MSP430FR59xx_FR58xx
      • GPIO_MSP430G2210
      • GPIO_MSP430G2230
      • GPIO_MSP430G2x01
      • GPIO_MSP430G2x02
      • GPIO_MSP430G2x03
      • GPIO_MSP430G2x11
      • GPIO_MSP430G2x12
      • GPIO_MSP430G2x13
      • GPIO_MSP430G2x21
      • GPIO_MSP430G2x31
      • GPIO_MSP430G2x32
      • GPIO_MSP430G2x33
      • GPIO_MSP430G2x44
      • GPIO_MSP430G2x52
      • GPIO_MSP430G2x53
      • GPIO_MSP430G2x55
      • IGPIO
    • ti.catalog.msp430.peripherals.gpio_grace3
      • GPIO_MSP430FR5736_32_26_22
      • GPIO_MSP430FR5737_33_27_23
      • GPIO_MSP430FR5738_34_30_28_24_20
      • GPIO_MSP430FR5739_35_31_29_25_21
      • GPIO_MSP430FR59xx_FR58xx
      • IGPIO
    • ti.catalog.msp430.peripherals.interrupt
      • Interrupt_Controller
    • ti.catalog.msp430.peripherals.memory
      • Flash_2xx
      • IFlash
    • ti.catalog.msp430.peripherals.oa
      • IOA
      • OA_2
    • ti.catalog.msp430.peripherals.pinmux
      • IPinMux
      • PinMux
    • ti.catalog.msp430.peripherals.pmm
      • IPMM
      • PMM
    • ti.catalog.msp430.peripherals.ref
      • IREF
      • REF
      • REF_A
    • ti.catalog.msp430.peripherals.rtc
      • IRTC
      • RTC_B
    • ti.catalog.msp430.peripherals.special_function
      • IE1
      • IE2
      • SFRIE1
      • SR
    • ti.catalog.msp430.peripherals.svs
      • ISVS
      • SVS
    • ti.catalog.msp430.peripherals.timer
      • ITimer
      • ITimer_A
      • ITimer_B
      • Timer0_A3
      • Timer0_A5
      • Timer0_B3
      • Timer0_B7
      • Timer1_A2
      • Timer1_A3
      • Timer1_B3
      • Timer2_A2
      • Timer2_A3
      • Timer2_B3
      • Timer3_A2
      • Timer3_A5
      • Timer_A2
      • Timer_A3
      • Timer_A5
      • Timer_B3
      • Timer_B7
    • ti.catalog.msp430.peripherals.watchdog
      • IWDT
      • WDTplus
      • WDT_A
    • ti.catalog.peripherals.hdvicp2
      • HDVICP2
    • ti.mcu.msp430.include
    • ti.platforms.arm
      • Platform
    • ti.platforms.arp32
      • Platform
    • ti.platforms.beaglebone
      • Platform
    • ti.platforms.c6000
      • Platform
    • ti.platforms.c6x
      • Platform
    • ti.platforms.concertoC28
      • Platform
    • ti.platforms.concertoM3
      • Platform
    • ti.platforms.control28027
      • Platform
    • ti.platforms.control28035
      • Platform
    • ti.platforms.control28069
      • Platform
    • ti.platforms.control28335
      • Platform
    • ti.platforms.control28346
      • Platform
    • ti.platforms.cortexA
      • Platform
    • ti.platforms.cortexM
      • Platform
    • ti.platforms.cortexR
      • Platform
    • ti.platforms.dsk6455
      • Platform
    • ti.platforms.dskTCI6482
      • Platform
    • ti.platforms.evm3530
      • Platform
    • ti.platforms.evm6424
      • Platform
    • ti.platforms.evm6452
      • Platform
    • ti.platforms.evm6457
      • Platform
    • ti.platforms.evm6472
      • Platform
    • ti.platforms.evm6474
      • Platform
    • ti.platforms.evm6614
      • Platform
    • ti.platforms.evm6657
      • Platform
    • ti.platforms.evm6670
      • Platform
    • ti.platforms.evm6678
      • Platform
    • ti.platforms.evm6747
      • Platform
    • ti.platforms.evm6748
      • Platform
    • ti.platforms.evmAM3359
      • Platform
    • ti.platforms.evmAM3505
      • Platform
    • ti.platforms.evmAM3517
      • Platform
    • ti.platforms.evmAM437X
      • Platform
    • ti.platforms.evmAM571X
      • Platform
    • ti.platforms.evmAM572X
      • Platform
    • ti.platforms.evmC66AK2E
      • Platform
    • ti.platforms.evmC6A8149
      • Platform
    • ti.platforms.evmDA830
      • Platform
    • ti.platforms.evmDA850
      • Platform
    • ti.platforms.evmDM355
      • Platform
    • ti.platforms.evmDM365
      • Platform
    • ti.platforms.evmDM37XX
      • Platform
    • ti.platforms.evmDM6437
      • Platform
    • ti.platforms.evmDM648
      • Platform
    • ti.platforms.evmDM8148
      • Platform
    • ti.platforms.evmDM8168
      • Platform
    • ti.platforms.evmDRA7XX
      • Platform
    • ti.platforms.evmOMAPL137
      • Platform
    • ti.platforms.evmOMAPL138
      • Platform
    • ti.platforms.evmTCI6484
      • Platform
    • ti.platforms.evmTCI6486
      • Platform
    • ti.platforms.evmTCI6488
      • Platform
    • ti.platforms.evmTCI6630K2L
      • Platform
    • ti.platforms.evmTCI6636K2H
      • Platform
    • ti.platforms.evmTCI6638K2K
      • Platform
    • ti.platforms.evmTCI66AK2G02
      • Platform
    • ti.platforms.evmTDA3XX
      • Platform
    • ti.platforms.evmTI811X
      • Platform
    • ti.platforms.evmTI813X
      • Platform
    • ti.platforms.evmTI814X
      • Platform
    • ti.platforms.evmTI816X
      • Platform
    • ti.platforms.evmTNETV107X
      • Platform
    • ti.platforms.evmTNETV2685
      • Platform
    • ti.platforms.ezdsp28235
      • Platform
    • ti.platforms.ezdsp28335
      • Platform
    • ti.platforms.generic
      • Platform
    • ti.platforms.idkAM571X
      • Platform
    • ti.platforms.idkAM572X
      • Platform
    • ti.platforms.load6x
      • Platform
    • ti.platforms.msp430
      • Platform
    • ti.platforms.rf432s0xx
      • Platform
    • ti.platforms.sdp3430
      • Platform
    • ti.platforms.sdp4430
      • Platform
    • ti.platforms.sdp5430
      • Platform
    • ti.platforms.sim28xx
      • Platform
    • ti.platforms.sim470xx
      • Platform
    • ti.platforms.sim64Pxx
      • Platform
    • ti.platforms.sim6xxx
      • Platform
    • ti.platforms.simARP32
      • Platform
    • ti.platforms.simArctic
      • Platform
    • ti.platforms.simCM3
      • Platform
    • ti.platforms.simDM8168
      • Platform
    • ti.platforms.simKepler
      • Platform
    • ti.platforms.simTCI6608
      • Platform
    • ti.platforms.simTCI6616
      • Platform
    • ti.platforms.simTesla
      • Platform
    • ti.platforms.simVayu
      • Platform
    • ti.platforms.simplelink
      • Platform
    • ti.platforms.stellaris
    • ti.platforms.tiva
      • Platform
    • ti.platforms.tms320x28
      • Platform
    • ti.sdoarch.standards.pkg
      • IVersion
    • ti.targets
      • C28
      • C28_float
      • C28_large
      • C66
      • C66_big_endian
      • C674
      • C674_big_endian
      • ITarget
    • ti.targets.arm.clang
      • M3
      • M33F
      • M4
      • M4F
    • ti.targets.arm.elf
      • A8Fnv
      • Arm9
      • IA8
      • IArm
      • IM0
      • IM3
      • IM4
      • IR4
      • IR5
      • M0
      • M3
      • M4
      • M4F
      • R5F
    • ti.targets.arm.rtsarm
      • Settings
    • ti.targets.arp32.elf
      • ARP32
      • ARP32_far
      • IARP32
    • ti.targets.arp32.rts
      • Settings
    • ti.targets.elf
      • C66
      • C66_big_endian
      • C674
      • C674_big_endian
      • ITarget
    • ti.targets.msp430
      • MSP430
      • MSP430X
    • ti.targets.msp430.elf
      • MSP430
      • MSP430X
      • MSP430X_small
    • ti.targets.msp430.rts430
      • Settings
    • ti.targets.omf.cof
      • Settings
    • ti.targets.omf.elf
    • ti.targets.rts2800
      • Settings
    • ti.targets.rts6000
      • Settings
    • xdc
      • IPackage
      • Warnings
    • xdc.bld
      • BuildEnvironment
      • Executable
      • ITarget
      • ITarget2
      • ITarget3
      • ITargetFilter
      • Library
      • Manifest
      • Object
      • PackageContents
      • Release
      • Repository
      • Script
      • Test
      • Utils
    • xdc.cfg
      • Program
      • SourceDir
    • xdc.platform
      • ExeContext
      • ICpuDataSheet
      • IExeContext
      • IPeripheral
      • IPlatform
      • Utils
    • xdc.platform.generic
      • Platform
    • xdc.rov
      • CallStack
      • ICallBack
      • ICallStack
      • Model
      • Program
      • StateReader
      • StructureDecoder
      • ViewInfo
      • ViewXml
    • xdc.rov.monserver
      • Main
      • ProgressCallBack
      • Support
    • xdc.rov.runtime
      • Monitor
    • xdc.rov.testserver
      • DummyCallBack
      • Main
      • Support
    • xdc.rta.tools.file
      • Main
    • xdc.runtime
      • Assert
      • Defaults
      • Diags
      • Error
      • Gate
      • GateNull
      • HeapMin
      • HeapStd
      • IFilterLogger
      • IGateProvider
      • IHeap
      • IInstance
      • ILogger
      • IModule
      • ISystemSupport
      • ITimestampClient
      • ITimestampProvider
      • Log
      • LoggerBuf
      • LoggerCallback
      • LoggerSys
      • Main
      • Memory
      • Registry
      • Reset
      • Rta
      • Startup
      • SysCallback
      • SysMin
      • SysStd
      • System
      • Text
      • Timestamp
      • TimestampNull
      • TimestampStd
      • Types
    • xdc.runtime.knl
      • Cache
      • CacheSupportNull
      • GateH
      • GateProcess
      • GateProcessSupportNull
      • GateThread
      • GateThreadSupportNull
      • ICacheSupport
      • IGateProcessSupport
      • IGateThreadSupport
      • ISemaphore
      • ISemProcessSupport
      • ISemThreadSupport
      • ISync
      • IThreadSupport
      • Semaphore
      • SemProcess
      • SemThread
      • Sync
      • SyncGeneric
      • SyncNull
      • SyncSemThread
      • Thread
    • xdc.services.getset
      • GetSet
    • xdc.services.global
      • Clock
      • Trace
    • xdc.services.mapping
    • xdc.services.spec
    • xdc.shelf
    • xdc.shelf.local
    • xdc.targets.omf
    • xdc.tools
      • Cmdr
      • ICmd
    • xdc.tools.cdoc
      • Example
      • Main
      • Markup
    • xdc.tools.cdoc.sg
      • Main
    • xdc.tools.check
      • Main
    • xdc.tools.closure
      • Main
    • xdc.tools.configuro
      • Main
    • xdc.tools.path
      • Main
    • xdc.tools.path.sg
      • Main
    • xdc.tools.product
      • IProduct
      • IProductTemplate
      • IProductView
    • xdc.tools.product.plugingen
      • Main
    • xdc.tools.product.trexgen
      • Main
    • xdc.tools.repoman
      • Main
    • xdc.tools.repoman.sg
      • Main
  • all modules
    • A15F
    • A8F
    • A8Fnv
    • A9F
    • ADC10
    • ADC10_B
    • ADC12
    • ADC12_B
    • AM1705
    • AM1707
    • AM1806
    • AM1808
    • AM3358
    • AM3359
    • AM3505
    • AM3517
    • AM437X
    • Arctic
      • ti.catalog.arp32
      • ti.catalog.c6000
    • Arm9
    • ARP32
    • ARP32_far
    • Assert
    • BCSplus
    • Boot
      • ti.catalog.arm.cortexm3.concertoInit
      • ti.catalog.arm.cortexm4.tiva.ce
      • ti.catalog.c2800.concertoInit
      • ti.catalog.c2800.init
      • ti.catalog.c2800.initF2837x
      • ti.catalog.msp430.init
    • BuildEnvironment
    • C28
    • C28_float
    • C28_large
    • C64
    • C64P
    • C66
      • ti.catalog.c6000
      • ti.targets
      • ti.targets.elf
    • C66AK2E05
    • C66_big_endian
      • ti.targets
      • ti.targets.elf
    • C67
    • C674
      • ti.catalog.c6000
      • ti.targets
      • ti.targets.elf
    • C674_big_endian
      • ti.targets
      • ti.targets.elf
    • Cache
    • CacheSupportNull
    • CallStack
    • CC13xx
      • ti.catalog.arm.cortexm3
      • ti.catalog.arm.cortexm4
    • CC26xx
      • ti.catalog.arm.cortexm3
      • ti.catalog.arm.cortexm4
    • CC32xx
    • CC430F6137
    • Clock
    • Cmdr
    • Comparator_Aplus
    • Comparator_D
    • Comparator_E
    • CortexA
    • CortexM
      • ti.catalog.arm.cortexm3
      • ti.catalog.arm.cortexm33
    • CortexM3
      • ti.catalog.arm
      • ti.catalog.arm.cortexm3
    • CortexR
      • ti.catalog.arm.cortexr4
      • ti.catalog.arm.cortexr5
    • CS
    • CS_A
    • DAC12
    • Defaults
    • Diags
    • DM37XX
      • ti.catalog.arm.cortexa8
      • ti.catalog.c6000
    • DMA
    • DRA7XX
      • ti.catalog.arm.cortexa15
      • ti.catalog.arm.cortexm4
      • ti.catalog.arp32
      • ti.catalog.c6000
    • DummyCallBack
    • Error
    • EUSCI_A0
    • EUSCI_A1
    • EUSCI_B0
    • Example
    • ExeContext
    • Executable
    • F28M35x
      • ti.catalog.arm.cortexm3
      • ti.catalog.c2800
    • Flash_2xx
    • FRCTL
    • Gate
    • GateH
    • GateNull
    • GateProcess
    • GateProcessSupportNull
    • GateThread
    • GateThreadSupportNull
    • GCArmv5T
    • GCArmv6
    • GCArmv7A
    • GCArmv7AF
    • GetSet
    • GPIO_MSP430F20x1
    • GPIO_MSP430F20x2
    • GPIO_MSP430F20x3
    • GPIO_MSP430F21x1
    • GPIO_MSP430F21x2
    • GPIO_MSP430F22x2
    • GPIO_MSP430F22x4
    • GPIO_MSP430F23x
    • GPIO_MSP430F23x0
    • GPIO_MSP430F241x
    • GPIO_MSP430F24x
    • GPIO_MSP430F24x1
    • GPIO_MSP430F261x
    • GPIO_MSP430F543xA
    • GPIO_MSP430FR5736_32_26_22
      • ti.catalog.msp430.peripherals.gpio
      • ti.catalog.msp430.peripherals.gpio_grace3
    • GPIO_MSP430FR5737_33_27_23
      • ti.catalog.msp430.peripherals.gpio
      • ti.catalog.msp430.peripherals.gpio_grace3
    • GPIO_MSP430FR5738_34_30_28_24_20
      • ti.catalog.msp430.peripherals.gpio
      • ti.catalog.msp430.peripherals.gpio_grace3
    • GPIO_MSP430FR5739_35_31_29_25_21
      • ti.catalog.msp430.peripherals.gpio
      • ti.catalog.msp430.peripherals.gpio_grace3
    • GPIO_MSP430FR59xx_FR58xx
      • ti.catalog.msp430.peripherals.gpio
      • ti.catalog.msp430.peripherals.gpio_grace3
    • GPIO_MSP430G2210
    • GPIO_MSP430G2230
    • GPIO_MSP430G2x01
    • GPIO_MSP430G2x02
    • GPIO_MSP430G2x03
    • GPIO_MSP430G2x11
    • GPIO_MSP430G2x12
    • GPIO_MSP430G2x13
    • GPIO_MSP430G2x21
    • GPIO_MSP430G2x31
    • GPIO_MSP430G2x32
    • GPIO_MSP430G2x33
    • GPIO_MSP430G2x44
    • GPIO_MSP430G2x52
    • GPIO_MSP430G2x53
    • GPIO_MSP430G2x55
    • HDVICP2
    • HeapMin
    • HeapStd
    • IA8
    • IADC
    • IAM335X
    • IAntara
    • IArm
    • IARP32
    • IC6x
    • ICacheInfo
    • ICacheSupport
    • ICallBack
    • ICallStack
    • IClock
    • ICmd
    • IComparator
    • ICpuDataSheet
      • ti.catalog
      • xdc.platform
    • IDAC
    • IDaVinci
    • IDMA
    • IE1
    • IE2
    • IEUSCI
    • IExeContext
    • IFilterLogger
    • IFlash
    • IFRCTL
    • IGateProcessSupport
    • IGateProvider
    • IGateThreadSupport
    • IGPIO
      • ti.catalog.msp430.peripherals.gpio
      • ti.catalog.msp430.peripherals.gpio_grace3
    • IHeap
    • IHimalaya
    • IInstance
    • ILogger
    • IM
    • IM0
    • IM3
    • IM4
    • IModule
    • IMSP430
    • IMSP430F54xx
    • IMSP430F55xx
    • IMSP430x22xx
    • Intel80586
      • host.platforms.macos
      • host.platforms.PC
    • Interrupt_Controller
    • IOA
    • IOMAP2x3x
      • ti.catalog.arm
      • ti.catalog.c6000
    • IOMAP3xxx
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
      • ti.catalog.c6000
    • IPackage
    • IPeripheral
    • IPinMux
    • IPlatform
    • IPMM
    • IProduct
    • IProductTemplate
    • IProductView
    • IR4
    • IR5
    • IREF
    • IRTC
    • ISemaphore
    • ISemProcessSupport
    • ISemThreadSupport
    • ISVS
    • ISync
    • ISystemSupport
    • ITarget
      • gnu.targets
      • gnu.targets.arm
      • iar.targets.arm
      • iar.targets.msp430
      • microsoft.targets
      • ti.targets
      • ti.targets.elf
      • xdc.bld
    • ITarget2
    • ITarget3
    • ITargetFilter
    • ITCI663X
    • IThreadSupport
    • ITI811X
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • ITI813X
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
    • ITI8148
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • ITI8168
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • ITimer
    • ITimer_A
    • ITimer_B
    • ITimestampClient
    • ITimestampProvider
    • ITMS320C28026
    • ITMS320C28027
    • ITMS320C28032
    • ITMS320C28034
    • ITMS320C28342
    • ITMS320C28344
    • ITMS320C28346
    • ITMS320C283xx
    • ITMS320C28xx
    • ITMS320C642x
    • ITMS320C6452
    • ITMS320C64_128K
    • ITMS320C64_1M
    • ITMS320C64_256K
    • ITMS320C64_512K
    • ITMS320C6655
    • ITMS320C6x0x
    • ITMS320C6x1x
    • ITMS320CDM6467
    • ITMS320CDRA44x
    • ITMS320CDRA45x
    • ITMS320CDRx40x
    • ITMS320CTCI6484
    • ITMS320CTCI6486
    • ITMS320CTCI648x
    • ITMS320CTCI6497
    • ITMS320DA8xx
      • ti.catalog.arm
      • ti.catalog.c6000
    • ITMS320F28065
    • ITMS320F28069
    • ITMS320TCI6608
    • ITMS320TCI6616
    • ITMS320TCI663x
    • IUSCI
    • IUSCI_A0_SPI
    • IUSCI_A0_UART
    • IUSCI_A1_SPI
    • IUSCI_A1_UART
    • IUSCI_B0_I2C
    • IUSCI_B0_SPI
    • IUSCI_B1_I2C
    • IUSCI_B1_SPI
    • IUSCI_I2C
    • IUSCI_SPI
    • IUSCI_UART
    • IUSI
    • IVersion
    • IWDT
    • Kepler
    • Library
    • Linux86
    • Log
    • LoggerBuf
    • LoggerCallback
    • LoggerSys
    • M0
    • M3
      • gnu.targets.arm
      • iar.targets.arm
      • ti.targets.arm.clang
      • ti.targets.arm.elf
    • M33
    • M33F
      • gnu.targets.arm
      • ti.targets.arm.clang
    • M4
      • gnu.targets.arm
      • iar.targets.arm
      • ti.targets.arm.clang
      • ti.targets.arm.elf
    • M4F
      • gnu.targets.arm
      • iar.targets.arm
      • ti.targets.arm.clang
      • ti.targets.arm.elf
    • Main
      • iar.tools.configuro
      • xdc.rov.monserver
      • xdc.rov.testserver
      • xdc.rta.tools.file
      • xdc.runtime
      • xdc.tools.cdoc
      • xdc.tools.cdoc.sg
      • xdc.tools.check
      • xdc.tools.closure
      • xdc.tools.configuro
      • xdc.tools.path
      • xdc.tools.path.sg
      • xdc.tools.product.plugingen
      • xdc.tools.product.trexgen
      • xdc.tools.repoman
      • xdc.tools.repoman.sg
    • Manifest
    • Markup
    • Memory
    • Mingw
    • Model
    • Monitor
    • MSP430
      • iar.targets.msp430
      • ti.catalog.msp430
      • ti.targets.msp430
      • ti.targets.msp430.elf
    • MSP430F223x
    • MSP430F225x
    • MSP430F2274
    • MSP430F5418
    • MSP430F5419
    • MSP430F5435
    • MSP430F5436
    • MSP430F5437
    • MSP430F5438
    • MSP430F5529
    • MSP430X
      • ti.targets.msp430
      • ti.targets.msp430.elf
    • MSP430X_large
    • MSP430X_small
      • iar.targets.msp430
      • ti.targets.msp430.elf
    • MSP432
    • MSP432E
    • Net32
    • OA_2
    • Object
    • OMAP2430
    • OMAP2431
      • ti.catalog.arm
      • ti.catalog.c6000
    • OMAP2530
      • ti.catalog.arm
      • ti.catalog.c6000
    • OMAP2531
      • ti.catalog.arm
      • ti.catalog.c6000
    • OMAP3403
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
    • OMAP3405
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
    • OMAP3425
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
      • ti.catalog.c6000
    • OMAP3503
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
    • OMAP3505
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
    • OMAP3515
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
    • OMAP3517
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
    • OMAP3525
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
      • ti.catalog.c6000
    • OMAP3530
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
      • ti.catalog.c6000
    • OMAP4430
      • ti.catalog.arm.cortexa9
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • OMAP5430
      • ti.catalog.arm.cortexa15
      • ti.catalog.arm.cortexm4
      • ti.catalog.c6000
    • OMAPL108
    • OMAPL118
    • OMAPL137
      • ti.catalog.arm
      • ti.catalog.c6000
    • OMAPL138
      • ti.catalog.arm
      • ti.catalog.c6000
    • PackageContents
    • PinMux
    • Platform
      • host.platforms.arm
      • host.platforms.macos
      • host.platforms.PC
      • host.platforms.SUN
      • ti.platforms.arm
      • ti.platforms.arp32
      • ti.platforms.beaglebone
      • ti.platforms.c6000
      • ti.platforms.c6x
      • ti.platforms.concertoC28
      • ti.platforms.concertoM3
      • ti.platforms.control28027
      • ti.platforms.control28035
      • ti.platforms.control28069
      • ti.platforms.control28335
      • ti.platforms.control28346
      • ti.platforms.cortexA
      • ti.platforms.cortexM
      • ti.platforms.cortexR
      • ti.platforms.dsk6455
      • ti.platforms.dskTCI6482
      • ti.platforms.evm3530
      • ti.platforms.evm6424
      • ti.platforms.evm6452
      • ti.platforms.evm6457
      • ti.platforms.evm6472
      • ti.platforms.evm6474
      • ti.platforms.evm6614
      • ti.platforms.evm6657
      • ti.platforms.evm6670
      • ti.platforms.evm6678
      • ti.platforms.evm6747
      • ti.platforms.evm6748
      • ti.platforms.evmAM3359
      • ti.platforms.evmAM3505
      • ti.platforms.evmAM3517
      • ti.platforms.evmAM437X
      • ti.platforms.evmAM571X
      • ti.platforms.evmAM572X
      • ti.platforms.evmC66AK2E
      • ti.platforms.evmC6A8149
      • ti.platforms.evmDA830
      • ti.platforms.evmDA850
      • ti.platforms.evmDM355
      • ti.platforms.evmDM365
      • ti.platforms.evmDM37XX
      • ti.platforms.evmDM6437
      • ti.platforms.evmDM648
      • ti.platforms.evmDM8148
      • ti.platforms.evmDM8168
      • ti.platforms.evmDRA7XX
      • ti.platforms.evmOMAPL137
      • ti.platforms.evmOMAPL138
      • ti.platforms.evmTCI6484
      • ti.platforms.evmTCI6486
      • ti.platforms.evmTCI6488
      • ti.platforms.evmTCI6630K2L
      • ti.platforms.evmTCI6636K2H
      • ti.platforms.evmTCI6638K2K
      • ti.platforms.evmTCI66AK2G02
      • ti.platforms.evmTDA3XX
      • ti.platforms.evmTI811X
      • ti.platforms.evmTI813X
      • ti.platforms.evmTI814X
      • ti.platforms.evmTI816X
      • ti.platforms.evmTNETV107X
      • ti.platforms.evmTNETV2685
      • ti.platforms.ezdsp28235
      • ti.platforms.ezdsp28335
      • ti.platforms.generic
      • ti.platforms.idkAM571X
      • ti.platforms.idkAM572X
      • ti.platforms.load6x
      • ti.platforms.msp430
      • ti.platforms.rf432s0xx
      • ti.platforms.sdp3430
      • ti.platforms.sdp4430
      • ti.platforms.sdp5430
      • ti.platforms.sim28xx
      • ti.platforms.sim470xx
      • ti.platforms.sim64Pxx
      • ti.platforms.sim6xxx
      • ti.platforms.simArctic
      • ti.platforms.simARP32
      • ti.platforms.simCM3
      • ti.platforms.simDM8168
      • ti.platforms.simKepler
      • ti.platforms.simplelink
      • ti.platforms.simTCI6608
      • ti.platforms.simTCI6616
      • ti.platforms.simTesla
      • ti.platforms.simVayu
      • ti.platforms.tiva
      • ti.platforms.tms320x28
      • xdc.platform.generic
    • PMM
    • Program
      • xdc.cfg
      • xdc.rov
    • ProgressCallBack
    • R5F
    • REF
    • REF_A
    • Registry
    • Release
    • Repository
    • Reset
    • Rta
    • RTC_B
    • Script
    • SD16_A
    • Semaphore
    • SemProcess
    • SemThread
    • Settings
      • gnu.targets.arm.rtsv7A
      • gnu.targets.arm.rtsv7M
      • gnu.targets.arm.rtsv8A
      • gnu.targets.arm.rtsv8M
      • iar.targets.arm.rts
      • iar.targets.msp430.rts
      • ti.targets.arm.rtsarm
      • ti.targets.arp32.rts
      • ti.targets.msp430.rts430
      • ti.targets.omf.cof
      • ti.targets.rts2800
      • ti.targets.rts6000
    • SFRIE1
    • SourceDir
    • SR
    • Startup
    • StateReader
    • StructureDecoder
    • SunSparc7
    • Support
      • xdc.rov.monserver
      • xdc.rov.testserver
    • SVS
    • Sync
    • SyncGeneric
    • SyncNull
    • SyncSemThread
    • SysCallback
    • SysMin
    • SysStd
    • System
    • TCI6630K2L
    • TCI6636K2H
    • TCI6638K2K
    • TCI66AK2G02
      • ti.catalog.arm.cortexa15
      • ti.catalog.c6000
    • TDA3XX
      • ti.catalog.arm.cortexm4
      • ti.catalog.arp32
      • ti.catalog.c6000
    • Test
    • Text
    • Thread
    • Timer
    • Timer0_A3
    • Timer0_A5
    • Timer0_B3
    • Timer0_B7
    • Timer1_A2
    • Timer1_A3
    • Timer1_B3
    • Timer2_A2
    • Timer2_A3
    • Timer2_B3
    • Timer3_A2
    • Timer3_A5
    • Timer_A2
    • Timer_A3
    • Timer_A5
    • Timer_B3
    • Timer_B7
    • Timestamp
    • TimestampNull
    • TimestampStd
    • Tiva
      • ti.catalog.arm.cortexm3
      • ti.catalog.arm.cortexm4
    • TMS320C1030
    • TMS320C2430
    • TMS320C2801
    • TMS320C28015
    • TMS320C28016
    • TMS320C2802
    • TMS320C28020
    • TMS320C28021
    • TMS320C28022
    • TMS320C28023
    • TMS320C28026
    • TMS320C28027
    • TMS320C28030
    • TMS320C28031
    • TMS320C28032
    • TMS320C28033
    • TMS320C28034
    • TMS320C28035
    • TMS320C28044
    • TMS320C2806
    • TMS320C2808
    • TMS320C2809
    • TMS320C2810
    • TMS320C2811
    • TMS320C2812
    • TMS320C28232
    • TMS320C28234
    • TMS320C28235
    • TMS320C28332
    • TMS320C28334
    • TMS320C28335
    • TMS320C28341
    • TMS320C28342
    • TMS320C28343
    • TMS320C28344
    • TMS320C28345
    • TMS320C28346
    • TMS320C3430
      • ti.catalog.arm
      • ti.catalog.arm.cortexa8
      • ti.catalog.c6000
    • TMS320C5912
    • TMS320C6201
    • TMS320C6202
    • TMS320C6203
    • TMS320C6203B
    • TMS320C6204
    • TMS320C6205
    • TMS320C6211
    • TMS320C6211B
    • TMS320C6410
    • TMS320C6411
    • TMS320C6412
    • TMS320C6413
    • TMS320C6414
    • TMS320C6415
    • TMS320C6416
    • TMS320C6418
    • TMS320C6421
    • TMS320C6424
    • TMS320C6428
    • TMS320C6452
    • TMS320C6454
    • TMS320C6455
    • TMS320C6457
    • TMS320C6472
    • TMS320C6474
    • TMS320C6654
    • TMS320C6655
    • TMS320C6657
    • TMS320C6670
    • TMS320C6671
    • TMS320C6672
    • TMS320C6674
    • TMS320C6678
    • TMS320C66AK2E02
    • TMS320C66AK2E05
    • TMS320C66AK2H06
    • TMS320C66AK2H12
    • TMS320C6701
    • TMS320C6711
    • TMS320C6711B
    • TMS320C6712
    • TMS320C6713
    • TMS320C6722
    • TMS320C6726
    • TMS320C6727
    • TMS320C6742
    • TMS320C6743
    • TMS320C6745
    • TMS320C6746
    • TMS320C6747
    • TMS320C6748
    • TMS320C6A8149
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.arp32
      • ti.catalog.c6000
    • TMS320C6A8168
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • TMS320CDA700
    • TMS320CDA700SIM
    • TMS320CDA705
    • TMS320CDA707
    • TMS320CDA710
    • TMS320CDM415
    • TMS320CDM420
    • TMS320CDM421
    • TMS320CDM425
    • TMS320CDM426
    • TMS320CDM510
    • TMS320CDM640
    • TMS320CDM641
    • TMS320CDM642
    • TMS320CDM6431
    • TMS320CDM6433
    • TMS320CDM6435
    • TMS320CDM6437
    • TMS320CDM6441
    • TMS320CDM6443
    • TMS320CDM6446
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320CDM6467
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320CDM647
    • TMS320CDM648
    • TMS320CDM730
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320CDM740
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320CDRA402
    • TMS320CDRA404
    • TMS320CDRA406
    • TMS320CDRA414
    • TMS320CDRA416
    • TMS320CDRA442
    • TMS320CDRA444
    • TMS320CDRA446
    • TMS320CDRA447
    • TMS320CDRA457
    • TMS320CDRA459
    • TMS320CDRI300
    • TMS320CF761990
    • TMS320CTCI6482
    • TMS320CTCI6484
    • TMS320CTCI6486
    • TMS320CTCI6487
    • TMS320CTCI6488
    • TMS320CTCI6498
    • TMS320CTNETV2685
    • TMS320DA802
    • TMS320DA803
    • TMS320DA804
    • TMS320DA805
    • TMS320DA807
    • TMS320DA808
    • TMS320DA810
    • TMS320DA828
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320DA830
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320DA840
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320DA850
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320DM355
    • TMS320DM357
      • ti.catalog.arm
      • ti.catalog.c6000
    • TMS320DM365
    • TMS320DM8148
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • TMS320DM8168
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • TMS320F28062
    • TMS320F28063
    • TMS320F28064
    • TMS320F28065
    • TMS320F28066
    • TMS320F28067
    • TMS320F28068
    • TMS320F28069
    • TMS320TCI6485
    • TMS320TCI6489
    • TMS320TCI6608
    • TMS320TCI6614
    • TMS320TCI6616
    • TMS320TCI6618
    • TMS320TCI6630K2L
    • TMS320TCI6634
    • TMS320TCI6636
    • TMS320TCI6638
    • TMS320TI811X
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • TMS320TI813X
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
    • TMS320TI814X
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • TMS320TI816X
      • ti.catalog.arm.cortexa8
      • ti.catalog.arm.cortexm3
      • ti.catalog.c6000
    • TMS470R10
    • TMS570LS20216
    • TMS570PSF762
    • TNETV107X
      • ti.catalog.arm
      • ti.catalog.c6000
    • Trace
    • Types
    • UCS
    • USCI_A0_SPI_2xx
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    • USCI_B0_SPI_2xx
    • USCI_B1_I2C_2xx
    • USCI_B1_SPI_2xx
    • USI
    • Utils
      • xdc.bld
      • xdc.platform
    • Vayu
      • ti.catalog.arm.cortexa15
      • ti.catalog.arm.cortexm4
      • ti.catalog.arp32
      • ti.catalog.c6000
    • VC98
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        • TMS320C28335
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        • TMS320C28342
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        • TMS320C28344
        • TMS320C28345
        • TMS320C28346
        • TMS320F28062
        • TMS320F28063
        • TMS320F28064
        • TMS320F28065
        • TMS320F28066
        • TMS320F28067
        • TMS320F28068
        • TMS320F28069
      • c6000
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        • Kepler
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        • TMS320C6205
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        • TMS320C6211B
        • TMS320C6410
        • TMS320C6411
        • TMS320C6412
        • TMS320C6413
        • TMS320C6414
        • TMS320C6415
        • TMS320C6416
        • TMS320C6418
        • TMS320C6421
        • TMS320C6424
        • TMS320C6428
        • TMS320C6452
        • TMS320C6454
        • TMS320C6455
        • TMS320C6457
        • TMS320C6472
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        • TMS320C6657
        • TMS320C6670
        • TMS320C6671
        • TMS320C6672
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interface gnu.targets.ITarget

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== gnu.targets.ITarget ========
    14     *  Interface to GCC compatible compilers
    15     */
    16    @TargetHeader("xdc/bld/stddefs.xdt")
    17    metaonly interface ITarget inherits xdc.bld.ITarget3 {
    18
    19        override readonly config string stdInclude = "gnu/targets/std.h";
    20        override config string dllExt = ".so";
    21
    22        /*!
    23         *  ======== GCCVERS ========
    24         *  Version number of the GCC compiler; e.g., "3.2".
    25         *
    26         *  This string can be supplied by the user, otherwise it is obtained
    27         *  by running "gcc -dumpversion".
    28         */
    29        config string GCCVERS = null;
    30
    31        /*!
    32         *  ======== BINVERS ========
    33         *  Version number of binutils used with the compiler; e.g., "2.19".
    34         *
    35         *  This string can be supplied by the user, otherwise it is obtained
    36         *  by running "ld -v".
    37         */
    38        config string BINVERS = null;
    39
    40        /*!
    41         *  ======== version ========
    42         *  The Compatibility Key associated with this target.
    43         *
    44         *  The first two components of this target's Compatibility Key are '1,0'.
    45         *  The rest of the Key represents the compiler version. The third
    46         *  component combines the major and the minor version number in the format
    47         *  Major.Minor. The fourth component is the patch number.
    48         *
    49         *  @a(Example)
    50         *  If this target's `rootDir` points to the compiler version 3.4.6, the
    51         *  Compatibility Key is [1,0,3.4,6].
    52         *
    53         */
    54        override metaonly config String version;
    55
    56        /*!
    57         *  ======== GCCTARG ========
    58         *  The name of the platform executing programs produced by this target
    59         *
    60         *  This string can be supplied by the user, otherwise is is obtained
    61         *  from the compiler and follows the GNU standard format
    62         *  (<cpu>-<manufacturer>-<os> or <cpu>-<manufacturer>-<kernel>-<os>);
    63         *  e.g., "arm-none-eabi" or "x86_64-unknown-linux-gnu".
    64         *
    65         *  When building a GCC compiler, there are three different execution
    66         *  platforms to consider: the platform used to "build" the compiler, the
    67         *  "host" platform that runs the compiler, and the "target" platform
    68         *  that runs the executables produced by the compiler. All three
    69         *  platforms are identified using a
    70         *  {@link http://sources.redhat.com/autobook/autobook/autobook_17.html configuration name}
    71         *  defined by GNU Autotools.  `GCCTARG` is the name of the "target"
    72         *  platform.
    73         */
    74        config string GCCTARG = null;
    75
    76        /*!
    77         *  ======== LONGNAME ========
    78         *  @_nodoc
    79         *  The "long name" of the gcc compiler
    80         *
    81         *  This name is used (in conjunction with rootDir) to find the compiler
    82         *  and linker for this target. The format of `LONGNAME` is always
    83         *  "/bin/<machine>-gcc". For majority of the targets, the default value
    84         *  for `LONGNAME` does not ever need to be changed. But, there are
    85         *  targets where the different but compatible compilers may have
    86         *  different `LONGNAME` parameters. For such targets and compilers,
    87         *  `LONGNAME` can be set in `config.bld`.
    88         *
    89         *  @a(Example)
    90         *  If a version 2010q1 of the CodeSourcery GNU toolchain for Arm is
    91         *  installed in C:/CodeSourcery/arm-2010q1, the following settings in
    92         *  `config.bld` configure `gnu.targets.arm.GCArmv6` target to use that
    93         *  toolchain:
    94         *  @p(code)
    95         *  var GCArmv6 = xdc.module("gnu.targets.arm.GCArmv6");
    96         *  GCArmv6.rootDir = "C:/CodeSourcery/arm-2010q1";
    97         *  GCArmv6.LONGNAME = "bin/arm-none-linux-gnueabi-gcc";
    98         *  @p
    99         *
   100         */
   101        config string LONGNAME = null;
   102
   103        /*!
   104         *  ======== CYGWIN ========
   105         *  Is the target's compiler a cygwin executable
   106         *
   107         *  Since file names produced by cygwin-based tools differ from the
   108         *  names understood by other Windows executables, it is important
   109         *  to avoid using the names output by cygwin tools as input to
   110         *  non-cygwin programs.  This property tells the target whether
   111         *  or not it's possible to use the output from `gcc -MD -MF`, for
   112         *  example.
   113         */
   114        readonly config Bool CYGWIN = false;
   115
   116        /*!
   117         *  ======== noStdLinkScript ========
   118         *  Don't use the standard linker script
   119         *
   120         *  If `true`, add a `-T` flag before the generated `package/cfg/*.xdl`
   121         *  file passed to the linker.  This flag suppresses use of the
   122         *  standard linker script implicit in the GCC flow, which effectively
   123         *  says the generated `.xdl` file assumes total control for all
   124         *  `MEMORY` and `SECTION` directives.
   125         *
   126         */
   127        config Bool noStdLinkScript = false;
   128
   129        /*
   130         *  ======== profiles ========
   131         */
   132        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   133            ["debug", {
   134                compileOpts: {
   135                    copts: "-g",
   136                    defs:  "-D_DEBUG_=1",
   137                },
   138                linkOpts: "-g",
   139            }],
   140
   141            ["release", {
   142                compileOpts: {
   143                    copts: "-O2 -ffunction-sections -fdata-sections",
   144                },
   145                linkOpts: "-Wl,--gc-sections",
   146            }],
   147
   148            ["profile", {
   149                compileOpts: {
   150                    copts: "-g -pg",
   151                },
   152                linkOpts: "-pg"     /* can't use -static here */
   153            }],
   154
   155            ["coverage", {
   156                compileOpts: {
   157                    copts: "-fprofile-arcs -ftest-coverage",
   158                },
   159                linkOpts: "-fprofile-arcs -ftest-coverage",
   160            }],
   161        ];
   162
   163        /*!
   164         *  ======== versionMap ========
   165         *  Map of GCC compiler version numbers to compatibility keys.
   166         *
   167         *  This map translates version string information from the compiler
   168         *  into a compatibility key.  The compatibilty key is used to
   169         *  validate consistency among a collection of packages used in
   170         *  a configuration.
   171         *
   172         *  The compiler version string is "gcc<ver>", where <ver> is
   173         *  GCCVERS.
   174         *
   175         *  If a compiler version is not found in this map the default is
   176         *  "1,0,<ver>", where <ver> is the compiler version number.  Thus,
   177         *  the user only needs to extend this table when a significant
   178         *  incompatibility occurs or when two versions of the compiler should
   179         *  be treated as 100% compatible.
   180         */
   181        override config string versionMap[string] = [
   182            ["gcc3.2", "1,0,3.2,0"],
   183        ];
   184
   185        /*!
   186         *  ======== remoteHost ========
   187         *  Remote host used to run compiler, linker, and archiver tools
   188         *
   189         *  If `remoteHost` is `null` (or `undefined`), the configured compiler
   190         *  is run locally; otherwise, `remoteHost` is taken to be the host name
   191         *  of the machine that that should be used to run the specified compiler.
   192         *
   193         *  All target commands are prefixed with a command that uses `rsh` to run
   194         *  the commands on the specified host.  Thus, in order to use this
   195         *  setting, the remote machine must be support `rsh` and the user must
   196         *  have permission to run commands from the local machine on the remote
   197         *  host named `remoteHost`.  This usually involves adding a line to the
   198         *  user's `~/.rhosts` file on the remote machine of the form:
   199         *  @p(code)
   200         *      local-machine-name user-name
   201         *  @p
   202         *  where `local-machine-name` is the name of the local machine and
   203         * `user-name` is the user's login name on the local machine.
   204         */
   205        config string remoteHost;
   206
   207        /*!
   208         *  ======== ar ========
   209         *  The command used to create an archive
   210         */
   211        override readonly config xdc.bld.ITarget2.Command ar = {
   212            cmd: "$(rootDir)/bin/ar",
   213            opts: "cr"
   214        };
   215
   216        /*!
   217         *  ======== lnk ========
   218         *  The command used to link executables.
   219         */
   220        override readonly config xdc.bld.ITarget2.Command lnk = {
   221            cmd: "$(rootDir)/bin/gcc",
   222            opts: ""
   223        };
   224
   225        override config xdc.bld.ITarget2.Options lnkOpts = {
   226            prefix: "",
   227            suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/lib"
   228        };
   229
   230        /*!
   231         *  ======== cc ========
   232         *  The command used to compile C/C++ source files into object files
   233         */
   234        override readonly config xdc.bld.ITarget2.Command cc = {
   235            cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
   236            opts: ""
   237        };
   238
   239        /*!
   240         *  ======== asm ========
   241         *  The command used to assembles assembly source files into object files
   242         */
   243        override readonly config xdc.bld.ITarget2.Command asm = {
   244            cmd: "$(rootDir)/bin/gcc -c -x assembler",
   245            opts: ""
   246        };
   247
   248        /*!
   249         *  ======== includeOpts ========
   250         *  Additional user configurable target-specific include path options
   251         */
   252        override config string includeOpts = "";
   253
   254        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   255
   256        /*
   257         *  ======== initVers ========
   258         *  The function that detects the version of the Gnu compiler.
   259         */
   260        String initVers();
   261
   262        /*!
   263         *  ======== asmName ========
   264         *  The function that converts a C name into an assembly name
   265         */
   266        String asmName(String CName);
   267
   268        /*!
   269         *  ======== bspLib ========
   270         *  bspLib is assigned the name of the BSP library. The specified library
   271         *  is included on the link line.
   272         */
   273        config string bspLib = null;
   274    }
   275    /*
   276     *  @(#) gnu.targets; 1, 0, 1,0; 9-28-2018 17:07:25; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   277
   278     */
   279


module gnu.targets.Linux86

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Linux86.xdc ========
    14     *  Native 32-bit x86 Linux target (ILP32)
    15     *
    16     *  This module defines the native target for 32-bit (ILP32) Linux
    17     *  on an x86 platform.
    18     */
    19    metaonly module Linux86 inherits gnu.targets.ITarget {
    20        override readonly config string name                = "Linux86";
    21        override readonly config string os                  = "Linux";
    22        override readonly config string suffix              = "86U";
    23        override readonly config string isa                 = "i686";
    24        override readonly config xdc.bld.ITarget.Model model= {
    25            endian: "little"
    26        };
    27        override readonly config string rts                 = "gnu.targets.rts86U";
    28        override config string platform                     = "host.platforms.PC";
    29
    30        /*!
    31         *  ======== cc ========
    32         *  The command used to compile C/C++ source files into object files
    33         *
    34         *  The `-m32` flag is required to ensure that this target supports
    35         *  32-bit Linux systems.
    36         */
    37        override readonly config xdc.bld.ITarget2.Command cc = {
    38            cmd: "$(rootDir)/bin/gcc -c -MD -MF $@.dep",
    39            opts: "-m32"
    40        };
    41
    42        /*!
    43         *  ======== asm ========
    44         *  The command used to assembles assembly source files into object files
    45         */
    46        override readonly config xdc.bld.ITarget2.Command asm = {
    47            cmd: "$(rootDir)/bin/gcc -c -x assembler",
    48            opts: "-m32"
    49        };
    50
    51        /*!
    52         *  ======== lnk ========
    53         *  The command used to link executables.
    54         *
    55         *  The `-m32` flag is required to ensure that this target supports
    56         *  32-bit Linux systems.
    57         */
    58        override readonly config xdc.bld.ITarget2.Command lnk = {
    59            cmd: "$(rootDir)/bin/gcc",
    60            opts: "-m32"
    61        };
    62
    63        /*
    64         *  ======== ccOpts ========
    65         */
    66        override config xdc.bld.ITarget2.Options ccOpts = {
    67            prefix: "-fPIC -Wunused",
    68            suffix: "-Dfar="
    69        };
    70
    71        /*
    72         *  ======== includeOpts ========
    73         *  $(rootDir)/include        - contains compiler specific headers
    74         *
    75         *  GCC compilers for Linux automatically add this directory, but at least
    76         *  in some cases, the directory is added searched after standard system
    77         *  directories. This way, we ensure $(rootDir)/include is searched
    78         *  before standard system directories.
    79         */
    80        override config string includeOpts = "-isystem $(rootDir)/include";
    81
    82        /*
    83         *  ======== stdTypes ========
    84         */
    85        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    86            t_IArg          : { size: 4, align: 4 },
    87            t_Char          : { size: 1, align: 1 },
    88            t_Double        : { size: 8, align: 4 },
    89            t_Float         : { size: 4, align: 4 },
    90            t_Fxn           : { size: 4, align: 4 },
    91            t_Int           : { size: 4, align: 4 },
    92            t_Int8          : { size: 1, align: 1 },
    93            t_Int16         : { size: 2, align: 2 },
    94            t_Int32         : { size: 4, align: 4 },
    95            t_Int64         : { size: 8, align: 4 },
    96            t_Long          : { size: 4, align: 4 },
    97            t_LDouble       : { size: 12, align: 4 },
    98            t_LLong         : { size: 8, align: 4 },
    99            t_Ptr           : { size: 4, align: 4 },
   100            t_Short         : { size: 2, align: 2 },
   101            t_Size          : { size: 4, align: 4 },
   102        };
   103    }
   104    /*
   105     *  @(#) gnu.targets; 1, 0, 1,0; 9-28-2018 17:07:25; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   106
   107     */
   108


module gnu.targets.Mingw

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== Mingw.xdc ========
    15     *  MinGW native Windows target
    16     *
    17     *  This module defines a native target for Windows using the mingw compiler.
    18     *
    19     *  The mingw compiler is a freely available (www.mingw.org) port of GCC that
    20     *  can build Windows compatible libraries, DLLs, and executables.
    21     */
    22    metaonly module Mingw inherits gnu.targets.ITarget {
    23        override readonly config string name                 = "Mingw";
    24        override readonly config string os                   = "Windows";
    25        override readonly config string suffix               = "86GW";
    26        override readonly config string isa                  = "x86";
    27        override readonly config xdc.bld.ITarget.Model model = {
    28            endian: "little"
    29        };
    30
    31        override readonly config string rts = "gnu.targets.rts86GW";
    32
    33        override config string platform = "host.platforms.PC";
    34
    35        /*!
    36         *  ======== cmdPrefix ========
    37         *  Prefix to put in front of each command
    38         *
    39         *  This string is put in front of every Command before being passed to
    40         *  the shell for execution.  This string can be used to run the compiler
    41         *  in emulation environments.
    42         */
    43        config String cmdPrefix = "";
    44
    45        override config xdc.bld.ITarget2.Options ccOpts = {
    46            prefix: "-Wunused",
    47            suffix: "-Dfar= "
    48        };
    49
    50        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    51            t_IArg          : { size: 4, align: 4 },
    52            t_Char          : { size: 1, align: 1 },
    53            t_Double        : { size: 8, align: 4 },
    54            t_Float         : { size: 4, align: 4 },
    55            t_Fxn           : { size: 4, align: 4 },
    56            t_Int           : { size: 4, align: 4 },
    57            t_Int8          : { size: 1, align: 1 },
    58            t_Int16         : { size: 2, align: 2 },
    59            t_Int32         : { size: 4, align: 4 },
    60            t_Int64         : { size: 8, align: 4 },
    61            t_Long          : { size: 4, align: 4 },
    62            t_LDouble       : { size: 12, align: 4 },
    63            t_LLong         : { size: 8, align: 4 },
    64            t_Ptr           : { size: 4, align: 4 },
    65            t_Short         : { size: 2, align: 2 },
    66            t_Size          : { size: 4, align: 4 },
    67        };
    68    }
    69    /*
    70     *  @(#) gnu.targets; 1, 0, 1,0; 9-28-2018 17:07:26; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    71
    72     */
    73


package gnu.targets

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     *
    12     */
    13    requires xdc.bld;
    14
    15    /*!
    16     *  ======== gnu.targets ========
    17     *  Package of targets for the GNU gcc code generation tools
    18     *
    19     *  The targets in this package are designed to enable host application
    20     *  development; e.g., the build of the XDCtools product's C-based command
    21     *  line tools.
    22     */
    23    package gnu.targets [1, 0, 1] {
    24        module Linux86, Linux86_64;
    25        module Mingw;
    26        module MacOS86_64;
    27        interface ITarget;
    28    }
    29    /*
    30     *  @(#) gnu.targets; 1, 0, 1,0; 9-28-2018 17:07:26; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    31
    32     */
    33


module gnu.targets.arm.A8F

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  Copyright (c) 2012-2017 Texas Instruments and others.
     8     *  All rights reserved. This program and the accompanying materials
     9     *  are made available under the terms of the Eclipse Public License v1.0
    10     *  which accompanies this distribution, and is available at
    11     *  http://www.eclipse.org/legal/epl-v10.html
    12     *
    13     *  Contributors:
    14     *      Texas Instruments - initial implementation
    15     */
    16    import xdc.bld.ITarget2;
    17
    18    /*!
    19     *  ======== A8F.xdc ========
    20     *  Embedded Cortex A8, little endian, hard-float, bare metal target
    21     *
    22     *  This module defines an embedded bare metal target on Cortex A8. The target
    23     *  generates code compatible with the "v7A" architecture.
    24     *
    25     */
    26    metaonly module A8F inherits gnu.targets.arm.ITarget {
    27        override readonly config string name                = "A8F";
    28        override readonly config string suffix              = "a8fg";
    29        override readonly config string isa                 = "v7A";
    30        override readonly config xdc.bld.ITarget.Model model= {
    31            endian: "little",
    32            shortEnums: true
    33        };
    34
    35        override readonly config Bool alignDirectiveSupported = true;
    36
    37        override readonly config string rts = "gnu.targets.arm.rtsv7A";
    38        override config string platform     = "ti.platforms.evmAM3359";
    39
    40        override config string GCCTARG = "arm-none-eabi";
    41
    42        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    43
    44        override readonly config ITarget2.Command cc = {
    45            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    46            opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    47        };
    48
    49        readonly config ITarget2.Command ccBin = {
    50            cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    51            opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    52        };
    53
    54        override config ITarget2.Options ccOpts = {
    55            prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    56            suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    57        };
    58
    59        /*!
    60         *  ======== ccConfigOpts ========
    61         *  User configurable compiler options for the generated config C file.
    62         */
    63        override config ITarget2.Options ccConfigOpts = {
    64            prefix: "$(ccOpts.prefix)",
    65            suffix: "$(ccOpts.suffix)"
    66        };
    67
    68        override readonly config ITarget2.Command asm = {
    69            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    70            opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard"
    71        };
    72
    73        readonly config ITarget2.Command asmBin = {
    74            cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    75            opts: "-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard"
    76        };
    77
    78        override config ITarget2.Options lnkOpts = {
    79            prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
    80            suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    81        };
    82
    83        readonly config ITarget2.Command arBin = {
    84            cmd: "bin/arm-none-eabi-ar ",
    85            opts: ""
    86        };
    87
    88        /*!
    89         *  ======== bspLib ========
    90         *  bspLib is assigned the name of the BSP library. The specified library
    91         *  is included on the link line.
    92         *
    93         *  Possible values for this field are "nosys" and "rdimon" with the default
    94         *  being "nosys".
    95         */
    96        override config string bspLib = "nosys";
    97
    98        /*!
    99         *  ======== includeOpts ========
   100         *  Additional user configurable target-specific include path options
   101         *
   102         *  This target uses newlib-nano run-time.
   103         */
   104        override config string includeOpts = "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
   105
   106        /*
   107         *  ======== profiles ========
   108         */
   109        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   110            ["debug", {
   111                compileOpts: {
   112                    copts: "-g",
   113                    defs:  "-D_DEBUG_=1",
   114                },
   115                linkOpts: "-g",
   116            }],
   117
   118            ["release", {
   119                compileOpts: {
   120                    copts: " -O2 ",
   121                },
   122                linkOpts: " ",
   123            }],
   124        ];
   125
   126        /*
   127         *  ======== compatibleSuffixes ========
   128         */
   129        override config String compatibleSuffixes[] = [];
   130
   131        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   132            t_IArg          : { size: 4, align: 4 },
   133            t_Char          : { size: 1, align: 1 },
   134            t_Double        : { size: 8, align: 8 },
   135            t_Float         : { size: 4, align: 4 },
   136            t_Fxn           : { size: 4, align: 4 },
   137            t_Int           : { size: 4, align: 4 },
   138            t_Int8          : { size: 1, align: 1 },
   139            t_Int16         : { size: 2, align: 2 },
   140            t_Int32         : { size: 4, align: 4 },
   141            t_Int64         : { size: 8, align: 8 },
   142            t_Long          : { size: 4, align: 4 },
   143            t_LDouble       : { size: 8, align: 8 },
   144            t_LLong         : { size: 8, align: 8 },
   145            t_Ptr           : { size: 4, align: 4 },
   146            t_Short         : { size: 2, align: 2 },
   147            t_Size          : { size: 4, align: 4 },
   148        };
   149    }
   150    /*
   151     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   152
   153     */
   154


module gnu.targets.arm.A9F

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  Copyright (c) 2012-2017 Texas Instruments and others.
     8     *  All rights reserved. This program and the accompanying materials
     9     *  are made available under the terms of the Eclipse Public License v1.0
    10     *  which accompanies this distribution, and is available at
    11     *  http://www.eclipse.org/legal/epl-v10.html
    12     *
    13     *  Contributors:
    14     *      Texas Instruments - initial implementation
    15     */
    16    import xdc.bld.ITarget2;
    17
    18    /*!
    19     *  ======== A9F.xdc ========
    20     *  Embedded Cortex A9, little endian, hard-float, bare metal target
    21     *
    22     *  This module defines an embedded bare metal target on Cortex A9. The target
    23     *  generates code compatible with the "v7A" architecture.
    24     *
    25     */
    26    metaonly module A9F inherits gnu.targets.arm.ITarget {
    27        override readonly config string name                = "A9F";
    28        override readonly config string suffix              = "a9fg";
    29        override readonly config string isa                 = "v7A9";
    30        override readonly config xdc.bld.ITarget.Model model= {
    31            endian: "little",
    32            shortEnums: true
    33        };
    34
    35        override readonly config Bool alignDirectiveSupported = true;
    36
    37        override readonly config string rts = "gnu.targets.arm.rtsv7A";
    38        override config string platform     = "ti.platforms.sdp4430";
    39
    40        override config string GCCTARG = "arm-none-eabi";
    41
    42        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    43
    44        override readonly config ITarget2.Command cc = {
    45            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    46            opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    47        };
    48
    49        readonly config ITarget2.Command ccBin = {
    50            cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    51            opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    52        };
    53
    54        override config ITarget2.Options ccOpts = {
    55            prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    56            suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    57        };
    58
    59        /*!
    60         *  ======== ccConfigOpts ========
    61         *  User configurable compiler options for the generated config C file.
    62         */
    63        override config ITarget2.Options ccConfigOpts = {
    64            prefix: "$(ccOpts.prefix)",
    65            suffix: "$(ccOpts.suffix)"
    66        };
    67
    68        override readonly config ITarget2.Command asm = {
    69            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    70            opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard"
    71        };
    72
    73        readonly config ITarget2.Command asmBin = {
    74            cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    75            opts: "-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard"
    76        };
    77
    78        override config ITarget2.Options lnkOpts = {
    79            prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
    80            suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    81        };
    82
    83        readonly config ITarget2.Command arBin = {
    84            cmd: "bin/arm-none-eabi-ar ",
    85            opts: ""
    86        };
    87
    88        /*!
    89         *  ======== bspLib ========
    90         *  bspLib is assigned the name of the BSP library. The specified library
    91         *  is included on the link line.
    92         *
    93         *  Possible values for this field are "nosys" and "rdimon" with the default
    94         *  being "nosys".
    95         */
    96        override config string bspLib = "nosys";
    97
    98        /*!
    99         *  ======== includeOpts ========
   100         *  Additional user configurable target-specific include path options
   101         *
   102         *  This target uses newlib-nano run-time.
   103         */
   104        override config string includeOpts = "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
   105
   106        /*
   107         *  ======== profiles ========
   108         */
   109        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   110            ["debug", {
   111                compileOpts: {
   112                    copts: "-g",
   113                    defs:  "-D_DEBUG_=1",
   114                },
   115                linkOpts: "-g",
   116            }],
   117
   118            ["release", {
   119                compileOpts: {
   120                    copts: " -O2 ",
   121                },
   122                linkOpts: " ",
   123            }],
   124        ];
   125
   126        /*
   127         *  ======== compatibleSuffixes ========
   128         */
   129        override config String compatibleSuffixes[] = [];
   130
   131        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   132            t_IArg          : { size: 4, align: 4 },
   133            t_Char          : { size: 1, align: 1 },
   134            t_Double        : { size: 8, align: 8 },
   135            t_Float         : { size: 4, align: 4 },
   136            t_Fxn           : { size: 4, align: 4 },
   137            t_Int           : { size: 4, align: 4 },
   138            t_Int8          : { size: 1, align: 1 },
   139            t_Int16         : { size: 2, align: 2 },
   140            t_Int32         : { size: 4, align: 4 },
   141            t_Int64         : { size: 8, align: 8 },
   142            t_Long          : { size: 4, align: 4 },
   143            t_LDouble       : { size: 8, align: 8 },
   144            t_LLong         : { size: 8, align: 8 },
   145            t_Ptr           : { size: 4, align: 4 },
   146            t_Short         : { size: 2, align: 2 },
   147            t_Size          : { size: 4, align: 4 },
   148        };
   149    }
   150    /*
   151     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   152
   153     */
   154


module gnu.targets.arm.A15F

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  Copyright (c) 2012-2017 Texas Instruments and others.
     8     *  All rights reserved. This program and the accompanying materials
     9     *  are made available under the terms of the Eclipse Public License v1.0
    10     *  which accompanies this distribution, and is available at
    11     *  http://www.eclipse.org/legal/epl-v10.html
    12     *
    13     *  Contributors:
    14     *      Texas Instruments - initial implementation
    15     */
    16    import xdc.bld.ITarget2;
    17
    18    /*!
    19     *  ======== A15F.xdc ========
    20     *  Embedded Cortex A15, little endian, hard-float, bare metal target
    21     *
    22     *  This module defines an embedded bare metal target on Cortex A15. The target
    23     *  generates code compatible with the "v7A" architecture.
    24     *
    25     */
    26    metaonly module A15F inherits gnu.targets.arm.ITarget {
    27        override readonly config string name                = "A15F";
    28        override readonly config string suffix              = "a15fg";
    29        override readonly config string isa                 = "v7A15";
    30        override readonly config xdc.bld.ITarget.Model model= {
    31            endian: "little",
    32            shortEnums: true
    33        };
    34
    35        override readonly config Bool alignDirectiveSupported = true;
    36
    37        override readonly config string rts = "gnu.targets.arm.rtsv7A";
    38        override config string platform     = "ti.platforms.sdp5430";
    39
    40        override config string GCCTARG = "arm-none-eabi";
    41
    42        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    43
    44        override readonly config ITarget2.Command cc = {
    45            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    46            opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    47        };
    48
    49        readonly config ITarget2.Command ccBin = {
    50            cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    51            opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mabi=aapcs -g"
    52        };
    53
    54        override config ITarget2.Options ccOpts = {
    55            prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    56            suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    57        };
    58
    59        /*!
    60         *  ======== ccConfigOpts ========
    61         *  User configurable compiler options for the generated config C file.
    62         */
    63        override config ITarget2.Options ccConfigOpts = {
    64            prefix: "$(ccOpts.prefix)",
    65            suffix: "$(ccOpts.suffix)"
    66        };
    67
    68        override readonly config ITarget2.Command asm = {
    69            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    70            opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard"
    71        };
    72
    73        readonly config ITarget2.Command asmBin = {
    74            cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    75            opts: "-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard"
    76        };
    77
    78        override config ITarget2.Options lnkOpts = {
    79            prefix: "-mfloat-abi=hard -nostartfiles -Wl,-static -Wl,--gc-sections",
    80            suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    81        };
    82
    83        readonly config ITarget2.Command arBin = {
    84            cmd: "bin/arm-none-eabi-ar ",
    85            opts: ""
    86        };
    87
    88        /*!
    89         *  ======== bspLib ========
    90         *  bspLib is assigned the name of the BSP library. The specified library
    91         *  is included on the link line.
    92         *
    93         *  Possible values for this field are "nosys" and "rdimon" with the default
    94         *  being "nosys".
    95         */
    96        override config string bspLib = "nosys";
    97
    98        /*!
    99         *  ======== includeOpts ========
   100         *  Additional user configurable target-specific include path options
   101         *
   102         *  This target uses newlib-nano run-time.
   103         */
   104        override config string includeOpts = "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
   105
   106        /*
   107         *  ======== profiles ========
   108         */
   109        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   110            ["debug", {
   111                compileOpts: {
   112                    copts: "-g",
   113                    defs:  "-D_DEBUG_=1",
   114                },
   115                linkOpts: "-g",
   116            }],
   117
   118            ["release", {
   119                compileOpts: {
   120                    copts: " -O2 ",
   121                },
   122                linkOpts: " ",
   123            }],
   124        ];
   125
   126        /*
   127         *  ======== compatibleSuffixes ========
   128         */
   129        override config String compatibleSuffixes[] = [];
   130
   131        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   132            t_IArg          : { size: 4, align: 4 },
   133            t_Char          : { size: 1, align: 1 },
   134            t_Double        : { size: 8, align: 8 },
   135            t_Float         : { size: 4, align: 4 },
   136            t_Fxn           : { size: 4, align: 4 },
   137            t_Int           : { size: 4, align: 4 },
   138            t_Int8          : { size: 1, align: 1 },
   139            t_Int16         : { size: 2, align: 2 },
   140            t_Int32         : { size: 4, align: 4 },
   141            t_Int64         : { size: 8, align: 8 },
   142            t_Long          : { size: 4, align: 4 },
   143            t_LDouble       : { size: 8, align: 8 },
   144            t_LLong         : { size: 8, align: 8 },
   145            t_Ptr           : { size: 4, align: 4 },
   146            t_Short         : { size: 2, align: 2 },
   147            t_Size          : { size: 4, align: 4 },
   148        };
   149    }
   150    /*
   151     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   152
   153     */
   154


module gnu.targets.arm.GCArmv5T

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    import xdc.bld.ITarget2;
    13
    14    /*!
    15     *  ======== GCArmv5T.xdc ========
    16     *  Embedded little endian Arm v5TE Linux target
    17     *
    18     *  This module defines an embedded target for Linux on Arm. The target
    19     *  generates code compatible with the "v5TE" architecture.
    20     *
    21     */
    22    metaonly module GCArmv5T inherits gnu.targets.arm.ITarget {
    23        override readonly config string name                = "GCArmv5T";
    24        override readonly config string os                  = "Linux";
    25        override readonly config string suffix              = "v5T";
    26        override readonly config string isa                 = "v5T";
    27        override readonly config xdc.bld.ITarget.Model model= {
    28            endian: "little"
    29        };
    30
    31        override readonly config string rts = "gnu.targets.arm.rtsv5T";
    32        override config string platform     = "host.platforms.arm";
    33
    34        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    35
    36        override readonly config ITarget2.Command cc = {
    37            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    38            opts: "-march=armv5t"
    39        };
    40
    41        override config ITarget2.Options ccOpts = {
    42            prefix: "-fPIC -Wunused",
    43            suffix: "-Dfar= "
    44        };
    45
    46        override readonly config ITarget2.Command asm = {
    47            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    48            opts: "-march=armv5t"
    49        };
    50
    51        override config ITarget2.Options lnkOpts = {
    52            prefix: "",
    53            suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    54        };
    55
    56        /*
    57         *  ======== compatibleSuffixes ========
    58         */
    59        override config String compatibleSuffixes[] = ["470MV", "v5t"];
    60
    61        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    62            t_IArg          : { size: 4, align: 4 },
    63            t_Char          : { size: 1, align: 1 },
    64            t_Double        : { size: 8, align: 4 },
    65            t_Float         : { size: 4, align: 4 },
    66            t_Fxn           : { size: 4, align: 4 },
    67            t_Int           : { size: 4, align: 4 },
    68            t_Int8          : { size: 1, align: 1 },
    69            t_Int16         : { size: 2, align: 2 },
    70            t_Int32         : { size: 4, align: 4 },
    71            t_Int64         : { size: 8, align: 4 },
    72            t_Long          : { size: 4, align: 4 },
    73            t_LDouble       : { size: 8, align: 4 },
    74            t_LLong         : { size: 8, align: 4 },
    75            t_Ptr           : { size: 4, align: 4 },
    76            t_Short         : { size: 2, align: 2 },
    77            t_Size          : { size: 4, align: 4 },
    78        };
    79    }
    80    /*
    81     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    82
    83     */
    84


module gnu.targets.arm.GCArmv6

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    import xdc.bld.ITarget2;
    14
    15    /*!
    16     *  ======== GCArmv6.xdc ========
    17     *  Embedded little endian Arm v6 Linux target
    18     *
    19     *  This module defines an embedded target for Linux on Arm. The target
    20     *  generates code compatible with the "v6" architecture.
    21     *
    22     */
    23    metaonly module GCArmv6 inherits gnu.targets.arm.ITarget {
    24        override readonly config string name                = "GCArmv6";
    25        override readonly config string os                  = "Linux";
    26        override readonly config string suffix              = "v6";
    27        override readonly config string isa                 = "v6";
    28        override readonly config xdc.bld.ITarget.Model model= {
    29            endian: "little"
    30        };
    31
    32        override readonly config string rts = "gnu.targets.arm.rtsv6";
    33        override config string platform     = "host.platforms.arm";
    34
    35        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    36
    37        override readonly config ITarget2.Command cc = {
    38            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    39            opts: "-march=armv6"
    40        };
    41
    42        override config ITarget2.Options ccOpts = {
    43            prefix: "-fPIC -Wunused",
    44            suffix: "-Dfar= "
    45        };
    46
    47        override readonly config ITarget2.Command asm = {
    48            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    49            opts: "-march=armv6"
    50        };
    51
    52        override config ITarget2.Options lnkOpts = {
    53            prefix: "",
    54            suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    55        };
    56
    57        /*
    58         *  ======== compatibleSuffixes ========
    59         */
    60        override config String compatibleSuffixes[] = ["v5T", "470MV", "v5t"];
    61
    62        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    63            t_IArg          : { size: 4, align: 4 },
    64            t_Char          : { size: 1, align: 1 },
    65            t_Double        : { size: 8, align: 4 },
    66            t_Float         : { size: 4, align: 4 },
    67            t_Fxn           : { size: 4, align: 4 },
    68            t_Int           : { size: 4, align: 4 },
    69            t_Int8          : { size: 1, align: 1 },
    70            t_Int16         : { size: 2, align: 2 },
    71            t_Int32         : { size: 4, align: 4 },
    72            t_Int64         : { size: 8, align: 4 },
    73            t_Long          : { size: 4, align: 4 },
    74            t_LDouble       : { size: 8, align: 4 },
    75            t_LLong         : { size: 8, align: 4 },
    76            t_Ptr           : { size: 4, align: 4 },
    77            t_Short         : { size: 2, align: 2 },
    78            t_Size          : { size: 4, align: 4 },
    79        };
    80    }
    81    /*
    82     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    83
    84     */
    85


module gnu.targets.arm.GCArmv7A

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    import xdc.bld.ITarget2;
    13
    14    /*!
    15     *  ======== GCArmv7A.xdc ========
    16     *  Embedded little endian Arm v7A Linux target
    17     *
    18     *  This module defines an embedded target for Linux on Arm. The target
    19     *  generates code compatible with the "v7A" architecture.
    20     *
    21     */
    22    metaonly module GCArmv7A inherits gnu.targets.arm.ITarget {
    23        override readonly config string name                = "GCArmv7A";
    24        override readonly config string os                  = "Linux";
    25        override readonly config string suffix              = "v7A";
    26        override readonly config string isa                 = "v7A";
    27        override readonly config xdc.bld.ITarget.Model model= {
    28            endian: "little"
    29        };
    30
    31        override readonly config string rts = "gnu.targets.arm.rtsv7A";
    32        override config string platform     = "host.platforms.arm";
    33
    34        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    35
    36        /*
    37         *  ======== cc ========
    38         */
    39        override readonly config ITarget2.Command cc = {
    40            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    41            opts: "-march=armv7-a"
    42        };
    43
    44        /*
    45         *  ======== ccOpts ========
    46         */
    47        override config ITarget2.Options ccOpts = {
    48            prefix: "-fPIC -Wunused",
    49            suffix: "-Dfar= "
    50        };
    51
    52        /*
    53         *  ======== asm ========
    54         */
    55        override readonly config ITarget2.Command asm = {
    56            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    57            opts: "-march=armv7-a"
    58        };
    59
    60        /*
    61         *  ======== lnkOpts ========
    62         */
    63        override config ITarget2.Options lnkOpts = {
    64            prefix: "",
    65            suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    66        };
    67
    68        /*
    69         *  ======== compatibleSuffixes ========
    70         */
    71        override config String compatibleSuffixes[] = ["v6", "v5T", "470MV", "v5t"];
    72
    73        /*
    74         *  ======== stdTypes ========
    75         */
    76        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    77            t_IArg          : { size: 4, align: 4 },
    78            t_Char          : { size: 1, align: 1 },
    79            t_Double        : { size: 8, align: 4 },
    80            t_Float         : { size: 4, align: 4 },
    81            t_Fxn           : { size: 4, align: 4 },
    82            t_Int           : { size: 4, align: 4 },
    83            t_Int8          : { size: 1, align: 1 },
    84            t_Int16         : { size: 2, align: 2 },
    85            t_Int32         : { size: 4, align: 4 },
    86            t_Int64         : { size: 8, align: 4 },
    87            t_Long          : { size: 4, align: 4 },
    88            t_LDouble       : { size: 8, align: 4 },
    89            t_LLong         : { size: 8, align: 4 },
    90            t_Ptr           : { size: 4, align: 4 },
    91            t_Short         : { size: 2, align: 2 },
    92            t_Size          : { size: 4, align: 4 },
    93        };
    94    }
    95    /*
    96     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    97
    98     */
    99


module gnu.targets.arm.GCArmv7AF

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    import xdc.bld.ITarget2;
    13
    14    /*!
    15     *  ======== GCArmv7AF.xdc ========
    16     *  Embedded little endian Arm v7A Linux target with hardware floating point
    17     *  operations
    18     *
    19     *  This module defines an embedded target for Linux on Arm. The target
    20     *  generates code compatible with the "v7A" architecture.
    21     *
    22     */
    23    metaonly module GCArmv7AF inherits gnu.targets.arm.ITarget {
    24        override readonly config string name                = "GCArmv7AF";
    25        override readonly config string os                  = "Linux";
    26        override readonly config string suffix              = "v7AF";
    27        override readonly config string isa                 = "v7A";
    28        override readonly config xdc.bld.ITarget.Model model= {
    29            endian: "little"
    30        };
    31
    32        override readonly config string rts = "gnu.targets.arm.rtsv7A";
    33        override config string platform     = "host.platforms.arm";
    34
    35        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    36
    37        /*
    38         *  ======== cc ========
    39         */
    40        override readonly config ITarget2.Command cc = {
    41            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    42            opts: "-march=armv7-a -mfloat-abi=hard"
    43        };
    44
    45        /*
    46         *  ======== ccOpts ========
    47         */
    48        override config ITarget2.Options ccOpts = {
    49            prefix: "-fPIC -Wunused",
    50            suffix: "-Dfar= "
    51        };
    52
    53        /*
    54         *  ======== asm ========
    55         */
    56        override readonly config ITarget2.Command asm = {
    57            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    58            opts: "-Wa,-march=armv7-a -Wa,-mfloat-abi=hard"
    59        };
    60
    61        /*
    62         *  ======== lnkOpts ========
    63         */
    64        override config ITarget2.Options lnkOpts = {
    65            prefix: "",
    66            suffix: "-Wl,-Map=$(XDCCFGDIR)/$@.map -lstdc++ -L$(rootDir)/$(GCCTARG)/lib"
    67        };
    68
    69        /*
    70         *  ======== compatibleSuffixes ========
    71         */
    72        override config String compatibleSuffixes[] = [];
    73
    74        /*
    75         *  ======== stdTypes ========
    76         */
    77        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    78            t_IArg          : { size: 4, align: 4 },
    79            t_Char          : { size: 1, align: 1 },
    80            t_Double        : { size: 8, align: 4 },
    81            t_Float         : { size: 4, align: 4 },
    82            t_Fxn           : { size: 4, align: 4 },
    83            t_Int           : { size: 4, align: 4 },
    84            t_Int8          : { size: 1, align: 1 },
    85            t_Int16         : { size: 2, align: 2 },
    86            t_Int32         : { size: 4, align: 4 },
    87            t_Int64         : { size: 8, align: 4 },
    88            t_Long          : { size: 4, align: 4 },
    89            t_LDouble       : { size: 8, align: 4 },
    90            t_LLong         : { size: 8, align: 4 },
    91            t_Ptr           : { size: 4, align: 4 },
    92            t_Short         : { size: 2, align: 2 },
    93            t_Size          : { size: 4, align: 4 },
    94        };
    95    }
    96    /*
    97     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    98
    99     */
   100


interface gnu.targets.arm.IM

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  Copyright (c) 2008-2017 Texas Instruments and others.
     8     *  All rights reserved. This program and the accompanying materials
     9     *  are made available under the terms of the Eclipse Public License v1.0
    10     *  which accompanies this distribution, and is available at
    11     *  http://www.eclipse.org/legal/epl-v10.html
    12     *
    13     *  Contributors:
    14     *      Texas Instruments - initial implementation
    15     */
    16    import xdc.bld.ITarget2;
    17
    18    /*!
    19     *  ======== IM.xdc ========
    20     *  Common interface for Cortex M bare metal targets
    21     *
    22     *  This defines common parameters of Cortex M bare metal targets. The targets
    23     *  generate code compatible with the "v7M" or "v8M" architecture.
    24     */
    25    metaonly interface IM inherits gnu.targets.arm.ITarget {
    26        override readonly config xdc.bld.ITarget.Model model= {
    27            endian: "little",
    28            codeModel: "thumb2",
    29            shortEnums: true
    30        };
    31
    32        override readonly config Bool alignDirectiveSupported = true;
    33        override readonly config string rts = "gnu.targets.arm.rtsv7M";
    34        override config string platform     = "ti.platforms.tiva:TM4C1294NCPDT";
    35
    36        override config string GCCTARG = "arm-none-eabi";
    37
    38        override readonly config String stdInclude = "gnu/targets/arm/std.h";
    39
    40        override config ITarget2.Options ccOpts = {
    41            prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    42            suffix: "-Dfar= -D__DYNAMIC_REENT__ "
    43        };
    44
    45        /*!
    46         *  ======== ccConfigOpts ========
    47         *  User configurable compiler options for the generated config C file.
    48         */
    49        override config ITarget2.Options ccConfigOpts = {
    50            prefix: "$(ccOpts.prefix)",
    51            suffix: "$(ccOpts.suffix)"
    52        };
    53
    54        readonly config ITarget2.Command arBin = {
    55            cmd: "bin/arm-none-eabi-ar ",
    56            opts: ""
    57        };
    58
    59        /*!
    60         *  ======== bspLib ========
    61         *  bspLib is assigned the name of the BSP library. The specified library
    62         *  is included on the link line.
    63         *
    64         *  Possible values for this field are "nosys" and "rdimon" with the default
    65         *  being "nosys".
    66         */
    67        override config string bspLib = "nosys";
    68
    69        /*
    70         *  ======== profiles ========
    71         */
    72        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    73            ["debug", {
    74                compileOpts: {
    75                    copts: "-g",
    76                    defs:  "-D_DEBUG_=1",
    77                },
    78                linkOpts: "-g",
    79            }],
    80
    81            ["release", {
    82                compileOpts: {
    83                    copts: " -O2 ",
    84                },
    85                linkOpts: " ",
    86            }],
    87        ];
    88
    89        /*
    90         *  ======== compatibleSuffixes ========
    91         */
    92        override config String compatibleSuffixes[] = [];
    93
    94        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    95            t_IArg          : { size: 4, align: 4 },
    96            t_Char          : { size: 1, align: 1 },
    97            t_Double        : { size: 8, align: 8 },
    98            t_Float         : { size: 4, align: 4 },
    99            t_Fxn           : { size: 4, align: 4 },
   100            t_Int           : { size: 4, align: 4 },
   101            t_Int8          : { size: 1, align: 1 },
   102            t_Int16         : { size: 2, align: 2 },
   103            t_Int32         : { size: 4, align: 4 },
   104            t_Int64         : { size: 8, align: 8 },
   105            t_Long          : { size: 4, align: 4 },
   106            t_LDouble       : { size: 8, align: 8 },
   107            t_LLong         : { size: 8, align: 8 },
   108            t_Ptr           : { size: 4, align: 4 },
   109            t_Short         : { size: 2, align: 2 },
   110            t_Size          : { size: 4, align: 4 },
   111        };
   112    }
   113    /*
   114     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   115
   116     */
   117


interface gnu.targets.arm.ITarget

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== gnu.targets.arm.ITarget ========
    14     *  Interface to GCC compatible Arm compilers
    15     */
    16    metaonly interface ITarget inherits gnu.targets.ITarget {
    17        /*!
    18         *  ======== ar ========
    19         *  The command used to create an archive
    20         */
    21        override readonly config xdc.bld.ITarget2.Command ar = {
    22            cmd: "$(rootDir)/bin/$(GCCTARG)-ar",
    23            opts: "cr"
    24        };
    25
    26        /*!
    27         *  ======== lnk ========
    28         *  The command used to link executables.
    29         */
    30        override readonly config xdc.bld.ITarget2.Command lnk = {
    31            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc",
    32            opts: ""
    33        };
    34
    35        /*!
    36         *  ======== cc ========
    37         *  The command used to compile C/C++ source files into object files
    38         */
    39        override readonly config xdc.bld.ITarget2.Command cc = {
    40            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    41            opts: ""
    42        };
    43
    44        /*!
    45         *  ======== asm ========
    46         *  The command used to assembles assembly source files into object files
    47         */
    48        override readonly config xdc.bld.ITarget2.Command asm = {
    49            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler",
    50            opts: ""
    51        };
    52
    53        /*
    54         *  ======== profiles ========
    55         *
    56         *  -fdata-sections is removed from "release" because of
    57         *  https://bugs.launchpad.net/gcc-linaro/+bug/1329080. It applies only to
    58         *  Linux-on-Arm targets. The bare metal targets specify -fdata-sections
    59         *  in their ccOpts, so this change doesn't affect them.
    60         */
    61        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    62            ["debug", {
    63                compileOpts: {
    64                    copts: "-g",
    65                    defs:  "-D_DEBUG_=1",
    66                },
    67                linkOpts: "-g",
    68            }],
    69
    70            ["release", {
    71                compileOpts: {
    72                    copts: "-O2 -ffunction-sections",
    73                },
    74                linkOpts: "-Wl,--gc-sections",
    75            }],
    76
    77            ["profile", {
    78                compileOpts: {
    79                    copts: "-g -pg",
    80                },
    81                linkOpts: "-pg"     /* can't use -static here */
    82            }],
    83
    84            ["coverage", {
    85                compileOpts: {
    86                    copts: "-fprofile-arcs -ftest-coverage",
    87                },
    88                linkOpts: "-fprofile-arcs -ftest-coverage",
    89            }],
    90        ];
    91
    92
    93
    94    }
    95    /*
    96     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    97
    98     */
    99


module gnu.targets.arm.M3

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  Copyright (c) 2008-2017 Texas Instruments and others.
     8     *  All rights reserved. This program and the accompanying materials
     9     *  are made available under the terms of the Eclipse Public License v1.0
    10     *  which accompanies this distribution, and is available at
    11     *  http://www.eclipse.org/legal/epl-v10.html
    12     *
    13     *  Contributors:
    14     *      Texas Instruments - initial implementation
    15     */
    16    import xdc.bld.ITarget2;
    17
    18    /*!
    19     *  ======== M3.xdc ========
    20     *  Embedded little endian Cortex M3 bare metal target
    21     *
    22     *  This module defines an embedded bare metal target on Cortex M3. The target
    23     *  generates code compatible with the "v7M" architecture.
    24     *
    25     */
    26    metaonly module M3 inherits IM {
    27        override readonly config string name                = "M3";
    28        override readonly config string suffix              = "m3g";
    29        override readonly config string isa                 = "v7M";
    30
    31        override config string platform     = "ti.platforms.tiva:TM4C1294NCPDT";
    32
    33        override readonly config ITarget2.Command cc = {
    34            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    35            opts: "-mcpu=cortex-m3 -mthumb -mabi=aapcs -g"
    36        };
    37
    38        readonly config ITarget2.Command ccBin = {
    39            cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    40            opts: "-mcpu=cortex-m3 -mthumb -mabi=aapcs -g"
    41        };
    42
    43        override readonly config ITarget2.Command asm = {
    44            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    45            opts: "-Wa,-mcpu=cortex-m3 -Wa,-mthumb"
    46        };
    47
    48        readonly config ITarget2.Command asmBin = {
    49            cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    50            opts: "-Wa,-mcpu=cortex-m3 -Wa,-mthumb"
    51        };
    52
    53        override config ITarget2.Options lnkOpts = {
    54            prefix: "-mthumb -march=armv7-m -nostartfiles -Wl,-static -Wl,--gc-sections",
    55            suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7-m -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    56        };
    57
    58        /*!
    59         *  ======== includeOpts ========
    60         *  Additional user configurable target-specific include path options
    61         *
    62         *  This target uses newlib-nano run-time.
    63         */
    64        override config string includeOpts = "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
    65    }
    66    /*
    67     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    68
    69     */
    70


module gnu.targets.arm.M4

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  Copyright (c) 2008-2017 Texas Instruments and others.
     8     *  All rights reserved. This program and the accompanying materials
     9     *  are made available under the terms of the Eclipse Public License v1.0
    10     *  which accompanies this distribution, and is available at
    11     *  http://www.eclipse.org/legal/epl-v10.html
    12     *
    13     *  Contributors:
    14     *      Texas Instruments - initial implementation
    15     */
    16    import xdc.bld.ITarget2;
    17
    18    /*!
    19     *  ======== M4.xdc ========
    20     *  Embedded Cortex M4, little endian, bare metal target
    21     *
    22     *  This module defines an embedded bare metal target on Cortex M4. The target
    23     *  generates code compatible with the "v7M" architecture.
    24     *
    25     */
    26    metaonly module M4 inherits IM {
    27        override readonly config string name                = "M4";
    28        override readonly config string suffix              = "m4g";
    29        override readonly config string isa                 = "v7M4";
    30
    31        override readonly config ITarget2.Command cc = {
    32            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    33            opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mabi=aapcs -g"
    34        };
    35
    36        readonly config ITarget2.Command ccBin = {
    37            cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    38            opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=soft -mabi=aapcs -g"
    39        };
    40
    41        override readonly config ITarget2.Command asm = {
    42            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    43            opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb"
    44        };
    45
    46        readonly config ITarget2.Command asmBin = {
    47            cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    48            opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb"
    49        };
    50
    51        override config ITarget2.Options lnkOpts = {
    52            prefix: "-mthumb -march=armv7e-m -nostartfiles -Wl,-static -Wl,--gc-sections ",
    53            suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7e-m -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    54        };
    55
    56        /*!
    57         *  ======== includeOpts ========
    58         *  Additional user configurable target-specific include path options
    59         *
    60         *  This target uses newlib-nano run-time.
    61         */
    62        override config string includeOpts = "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
    63    }
    64    /*
    65     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:32; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    66
    67     */
    68


module gnu.targets.arm.M4F

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  Copyright (c) 2008-2017 Texas Instruments and others.
     8     *  All rights reserved. This program and the accompanying materials
     9     *  are made available under the terms of the Eclipse Public License v1.0
    10     *  which accompanies this distribution, and is available at
    11     *  http://www.eclipse.org/legal/epl-v10.html
    12     *
    13     *  Contributors:
    14     *      Texas Instruments - initial implementation
    15     */
    16    import xdc.bld.ITarget2;
    17
    18    /*!
    19     *  ======== M4F.xdc ========
    20     *  Embedded Cortex M4F, little endian, bare metal target
    21     *
    22     *  This module defines an embedded bare metal target on Cortex M4F. The target
    23     *  generates code compatible with the "v7M" architecture.
    24     *
    25     */
    26    metaonly module M4F inherits IM {
    27        override readonly config string name                = "M4F";
    28        override readonly config string suffix              = "m4fg";
    29        override readonly config string isa                 = "v7M4";
    30
    31        override readonly config ITarget2.Command cc = {
    32            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    33            opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -g"
    34        };
    35
    36        readonly config ITarget2.Command ccBin = {
    37            cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    38            opts: "-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mabi=aapcs -g"
    39        };
    40
    41        override readonly config ITarget2.Command asm = {
    42            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    43            opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv4-sp-d16 "
    44        };
    45
    46        readonly config ITarget2.Command asmBin = {
    47            cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    48            opts: "-Wa,-mcpu=cortex-m4 -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv4-sp-d16 "
    49        };
    50
    51        override config ITarget2.Options lnkOpts = {
    52            prefix: "-mthumb -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -nostartfiles -Wl,-static -Wl,--gc-sections ",
    53            suffix: "-L$(packageBase)/libs/install-native/$(GCCTARG)/lib/thumb/v7e-m/fpv4-sp/hard -Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    54        };
    55
    56        /*!
    57         *  ======== includeOpts ========
    58         *  Additional user configurable target-specific include path options
    59         *
    60         *  This target uses newlib-nano run-time.
    61         */
    62        override config string includeOpts = "-I$(packageBase)/libs/install-native/$(GCCTARG)/include/newlib-nano -I$(packageBase)/libs/install-native/$(GCCTARG)/include";
    63    }
    64    /*
    65     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:32; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    66
    67     */
    68


module gnu.targets.arm.M33F

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2017, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37
    38    import xdc.bld.ITarget2;
    39
    40    /*!
    41     *  ======== M33F.xdc ========
    42     *  Embedded Cortex M33F, little endian, bare metal target
    43     *
    44     *  This module defines an embedded bare metal target on Cortex M33F. The target
    45     *  generates code compatible with the "v8M" architecture.
    46     *
    47     */
    48    metaonly module M33F inherits IM {
    49        override readonly config string name                = "M33F";
    50        override readonly config string suffix              = "m33fg";
    51        override readonly config string isa                 = "v8M";
    52        override readonly config string rts         = "gnu.targets.arm.rtsv8M";
    53        override config string platform             = "ti.platforms.cortexM:FVP_MPS2";
    54
    55        override readonly config ITarget2.Command cc = {
    56            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -MD -MF $@.dep",
    57            opts: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mabi=aapcs -g"
    58        };
    59
    60        readonly config ITarget2.Command ccBin = {
    61            cmd: "bin/arm-none-eabi-gcc -c -MD -MF $@.dep",
    62            opts: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mabi=aapcs -g"
    63        };
    64
    65        override config ITarget2.Options ccOpts = {
    66            prefix: "-Wunused -Wunknown-pragmas -ffunction-sections -fdata-sections ",
    67            suffix: "-Dfar= "
    68        };
    69
    70        /*!
    71         *  ======== ccConfigOpts ========
    72         *  User configurable compiler options for the generated config C file.
    73         */
    74        override config ITarget2.Options ccConfigOpts = {
    75            prefix: "$(ccOpts.prefix)",
    76            suffix: "$(ccOpts.suffix)"
    77        };
    78
    79        override config String includeOpts = "-I$(rootDir)/$(GCCTARG)/include/newlib-nano -I$(rootDir)/$(GCCTARG)/include";
    80
    81        override readonly config ITarget2.Command asm = {
    82            cmd: "$(rootDir)/bin/$(GCCTARG)-gcc -c -x assembler-with-cpp",
    83            opts: "-Wa,-march=armv8-m.main -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv5-sp-d16 "
    84        };
    85
    86        readonly config ITarget2.Command asmBin = {
    87            cmd: "bin/arm-none-eabi-gcc -c -x assembler-with-cpp",
    88            opts: "-Wa,-march=armv8-m.main -Wa,-mthumb -Wa,-mfloat-abi=hard -Wa,-mfpu=fpv5-sp-d16 "
    89        };
    90
    91        override config ITarget2.Options lnkOpts = {
    92            prefix: "-march=armv8-m.main -mtune=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -nostartfiles -Wl,-static -Wl,--gc-sections ",
    93            suffix: "-Wl,--start-group -lgcc -lc -lm -Wl,--end-group --specs=nano.specs -Wl,-Map=$(XDCCFGDIR)/$@.map"
    94        };
    95
    96        /*!
    97         *  ======== bspLib ========
    98         *  bspLib is assigned the name of the BSP library. The specified library
    99         *  is included on the link line.
   100         *
   101         *  Possible values for this field are "nosys" and "rdimon" with the default
   102         *  being "nosys".
   103         */
   104        override config string bspLib = "nosys";
   105    }
   106    /*
   107     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:31; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   108
   109     */
   110


package gnu.targets.arm

     1    /*
     2     *  Copyright (c) 2008-2016 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     *
    12     */
    13    requires xdc.bld;
    14    requires gnu.targets;
    15
    16    /*!
    17     *  ======== gnu.targets.arm ========
    18     *  GCC-based code generation targets for Arm
    19     *
    20     *  This package offers a generic support for different GNU Arm compilers.
    21     */
    22    package gnu.targets.arm [1,0,0] {
    23        interface ITarget, IM;
    24        module GCArmv5T, GCArmv6, GCArmv7A, GCArmv7AF;
    25        module M3, M4, M4F;
    26        module M33F;
    27        module A8F, A9F, A15F;
    28        module A53F;
    29    }
    30
    31    /*
    32     *  @(#) gnu.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:32; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    33
    34     */
    35


package gnu.targets.arm.rtsv5T

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== gnu.targets.arm.rtsv5T ========
    16     *  Runtime support package for the gnu.targets.arm.GCArmv5T target
    17     *
    18     *  This package builds a library of standard XDC system support functions
    19     *  using sources from the xdc.runtime package (to avoid having multiple
    20     *  copies of the same source in different runtime support packages for
    21     *  different ISAs).
    22     *
    23     *  The compiler used to build the library in this package is Montavista
    24     *  3.4.3-25.0.24.0500846 compiler.
    25     */
    26    package gnu.targets.arm.rtsv5T [1,0,0] {
    27    }
    28    /*
    29     *  @(#) gnu.targets.arm.rtsv5T; 1, 0, 0,0; 9-28-2018 17:34:45; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    30
    31     */
    32


package gnu.targets.arm.rtsv6

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== gnu.targets.arm.rtsv6 ========
    16     *  Runtime support package for the gnu.targets.arm.GCArmv6 target.
    17     *
    18     *  This package builds a library of standard XDC system support functions
    19     *  using sources from the xdc.runtime package (to avoid having multiple
    20     *  copies of the same source in different runtime support packages for
    21     *  different ISAs).
    22     *
    23     *  The compiler used to build the library in this package is Codesourcery
    24     *  4.3.2 (2008q3-72) compiler.
    25     */
    26    package gnu.targets.arm.rtsv6 [1,0,0] {
    27    }
    28    /*
    29     *  @(#) gnu.targets.arm.rtsv6; 1, 0, 0,0; 9-28-2018 17:34:51; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    30
    31     */
    32


package gnu.targets.arm.rtsv7A

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== gnu.targets.arm.rtsv7A ========
    16     *  Runtime support package for the gnu.targets.arm.GCArmv7A target.
    17     *
    18     *  This package builds a library of standard XDC system support functions
    19     *  using sources from the xdc.runtime package (to avoid having multiple
    20     *  copies of the same source in different runtime support packages for
    21     *  different ISAs).
    22     *
    23     *  The compiler used to build the library in this package is Codesourcery
    24     *  4.3.2 (2008q3-72) compiler.
    25     */
    26    package gnu.targets.arm.rtsv7A [1,0,0] {
    27        module Settings;
    28    }
    29    /*
    30     *  @(#) gnu.targets.arm.rtsv7A; 1, 0, 0,0; 9-28-2018 17:34:59; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    31
    32     */
    33


module gnu.targets.arm.rtsv7A.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package gnu.targets.arm.rtsv7A;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39    /*
    40     *  @(#) gnu.targets.arm.rtsv7A; 1, 0, 0,0; 9-28-2018 17:34:59; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    41
    42     */
    43


package gnu.targets.arm.rtsv7M

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== gnu.targets.arm.rtsv7M ========
    16     *  Runtime support package for the gnu.targets.arm.GCArmv7M target.
    17     *
    18     *  This package builds a library of standard XDC system support functions
    19     *  using sources from the xdc.runtime package (to avoid having multiple copies
    20     *  of the same source in different runtime support packages for different
    21     *  ISAs).
    22     */
    23    package gnu.targets.arm.rtsv7M [1,0,0] {
    24        module Settings;
    25    }
    26    /*
    27     *  @(#) gnu.targets.arm.rtsv7M; 1, 0, 0,0; 9-28-2018 17:35:07; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    28
    29     */
    30


module gnu.targets.arm.rtsv7M.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package gnu.targets.arm.rtsv7M;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39    /*
    40     *  @(#) gnu.targets.arm.rtsv7M; 1, 0, 0,0; 9-28-2018 17:35:07; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    41
    42     */
    43


package gnu.targets.arm.rtsv8A

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2016, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37    /*
    38     *  ======== package.xdc ========
    39     */
    40
    41    requires xdc.runtime;
    42
    43    /*!
    44     *  ======== gnu.targets.arm.rtsv8A ========
    45     *  Runtime support package for ARM v8A targets.
    46     *
    47     *  This package builds a library of standard XDC system support functions
    48     *  using sources from the xdc.runtime package (to avoid having multiple
    49     *  copies of the same source in different runtime support packages for
    50     *  different ISAs).
    51     *
    52     *  The compiler used to build the library in this package is Linaro
    53     *  Aarch64 gcc compiler
    54     */
    55    package gnu.targets.arm.rtsv8A [1,0,0] {
    56        module Settings;
    57    }
    58    /*
    59     *  @(#) gnu.targets.arm.rtsv8A; 1, 0, 0,0; 9-28-2018 17:35:15; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    60
    61     */
    62


module gnu.targets.arm.rtsv8A.Settings

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2016, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37    /*
    38     *  ======== Settings.xdc ========
    39     */
    40
    41    package gnu.targets.arm.rtsv8A;
    42
    43    /*!
    44     *  ======== Settings ========
    45     *  Collection of parameters relevant for this package as a whole
    46     */
    47
    48    module Settings {
    49
    50        /*!
    51         *  ======== bootOnly ========
    52         *  Allow supplying only the boot code library
    53         *
    54         *  This package can supply the boot code and the library with the
    55         *  implementation of xdc.runtime modules. If this parameter is set to
    56         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    57         *  and the xdc.runtime implementation are supplied.
    58         */
    59        metaonly config Bool bootOnly = false;
    60    }
    61    /*
    62     *  @(#) gnu.targets.arm.rtsv8A; 1, 0, 0,0; 9-28-2018 17:35:15; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    63
    64     */
    65


package gnu.targets.arm.rtsv8M

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2017, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37    requires xdc.runtime;
    38
    39    /*!
    40     *  ======== gnu.targets.arm.rtsv8M ========
    41     *  Runtime support package for GNU ARMv8M targets.
    42     *
    43     *  This package builds a library of standard XDC system support functions
    44     *  using sources from the xdc.runtime package (to avoid having multiple copies
    45     *  of the same source in different runtime support packages for different
    46     *  ISAs).
    47     */
    48    package gnu.targets.arm.rtsv8M [1,0,0] {
    49        module Settings;
    50    }
    51    /*
    52     *  @(#) gnu.targets.arm.rtsv8M; 1, 0, 0,0; 9-28-2018 17:35:22; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    53
    54     */
    55


module gnu.targets.arm.rtsv8M.Settings

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2017, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37    /*
    38     *  ======== Settings.xdc ========
    39     */
    40
    41    package gnu.targets.arm.rtsv8M;
    42
    43    /*!
    44     *  ======== Settings ========
    45     *  Collection of parameters relevant for this package as a whole
    46     *
    47     */
    48
    49    module Settings {
    50
    51        /*!
    52         *  ======== bootOnly ========
    53         *  Allow supplying only the boot code library
    54         *
    55         *  This package can supply the boot code and the library with the
    56         *  implementation of xdc.runtime modules. If this parameter is set to
    57         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    58         *  and the xdc.runtime implementation are supplied.
    59         */
    60        metaonly config Bool bootOnly = false;
    61    }
    62    /*
    63     *  @(#) gnu.targets.arm.rtsv8M; 1, 0, 0,0; 9-28-2018 17:35:22; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    64
    65     */
    66


package gnu.targets.rts86GW

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    requires xdc.runtime;
     7
     8    /*!
     9     *  ======== gnu.targets.rts86GW ========
    10     *  Runtime support package for the x86 targets using the mingw codegen tools.
    11     *
    12     *  This package builds a library of standard XDC system support functions.
    13     *  In particular, it builds several implementations of the
    14     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    15     *  that are part of the xdc.runtime package (to avoid having multiple copies
    16     *  of the same source in different runtime support packages for different
    17     *  ISAs.
    18     */
    19    package gnu.targets.rts86GW [1,0,0] {
    20    }
    21    /*
    22     *  @(#) gnu.targets.rts86GW; 1, 0, 0,0; 9-28-2018 17:35:28; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    23
    24     */
    25


package gnu.targets.rts86M

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== gnu.targets.rts86M ========
    16     *  Runtime support package for the MacOS x86 targets
    17     *
    18     *  This package builds a library of standard XDC system support functions.
    19     *  In particular, it builds several implementations of the
    20     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    21     *  that are part of the xdc.runtime package (to avoid having multiple copies
    22     *  of the same source in different runtime support packages for different
    23     *  ISAs.
    24     */
    25    package gnu.targets.rts86M [1, 0, 0] {
    26    }
    27    /*
    28     *  @(#) gnu.targets.rts86M; 1, 0, 0,0; 9-28-2018 17:35:33; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    29
    30     */
    31


package gnu.targets.rts86U

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== gnu.targets.rts86U ========
    16     *  Runtime support package for the x86 targets.
    17     *
    18     *  This package builds a library of standard XDC system support functions.
    19     *  In particular, it builds several implementations of the
    20     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    21     *  that are part of the xdc.runtime package (to avoid having multiple copies
    22     *  of the same source in different runtime support packages for different
    23     *  ISAs.
    24     */
    25    package gnu.targets.rts86U [1,0,0] {
    26    }
    27    /*
    28     *  @(#) gnu.targets.rts86U; 1, 0, 0,0; 9-28-2018 17:35:39; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    29
    30     */
    31


package host.platforms.arm

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== host.platform.arm ========
    37     *  Platform package for the ARM-based platforms running an OS with virtual
    38     *  memory.
    39     */
    40    package host.platforms.arm [1,0,0,0] {
    41        module Platform;
    42    }


module host.platforms.arm.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    package host.platforms.arm;
    39
    40    /*!
    41     *  ======== Platform ========
    42     *  ARM-on-Linux platform support
    43     *
    44     *  This module implements xdc.platform.IPlatform and defines configuration
    45     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    46     */
    47
    48    metaonly module Platform inherits xdc.platform.IPlatform
    49    {
    50        /*!
    51         *  ======== BOARD ========
    52         *  @_nodoc
    53         *  this structure exists to satisfy the
    54         *  IPlatform interface requirements; these fields are largely
    55         *  unnecessary for host platforms.
    56         */
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "ARM",
    60            boardFamily:    "ARM",
    61            boardRevision:  null
    62        };
    63
    64    instance:
    65
    66        /*!
    67         *  ======== deviceName ========
    68         *  The CPU simulated by this platform.
    69         *
    70         *  This parameter is required.
    71         */
    72        config string deviceName = "TMS320CDM6446";
    73
    74        /*!
    75         *  ======== catalogName ========
    76         *  The name of the package that contains the module 'deviceName'.
    77         *
    78         *  This parameter is required.
    79         */
    80        config string catalogName = "ti.catalog.arm";
    81    }


module host.platforms.macos.Intel80586

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Intel80586.xdc. ========
    14     */
    15
    16    /*!
    17     *  ======== Intel80586 ========
    18     *  Pentium device data sheet module.
    19     *
    20     *  This module provides basic data suitable for Intel Pentium based
    21     *  native builds.
    22     */
    23    metaonly module Intel80586 inherits xdc.platform.ICpuDataSheet
    24    {
    25    instance:
    26        override config string cpuCore          = "586";
    27        override config string cpuCoreRevision   = "1.0";
    28        override config int    minProgUnitSize   = 1;
    29        override config int    minDataUnitSize   = 1;
    30        override config int    dataWordSize     = 4;
    31
    32        /*!
    33         *  ======== memMap ========
    34         *  The memory map returned be getMemeoryMap().
    35         */
    36        config xdc.platform.IPlatform.Memory memMap[string] = [];
    37    }
    38    /*
    39     *  @(#) host.platforms.macos; 1, 0, 0,1; 11-21-2018 13:29:05; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    40     */
    41


package host.platforms.macos

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.platform;
    13
    14    /*!
    15     *  ======== host.platform.macos ========
    16     *  Platform package for the MacOS platform.
    17     *
    18     *  This package implements the interfaces (xdc.platform.IPlatform) necessary
    19     *  to build and run executables on a MacOS platform.
    20     */
    21    package host.platforms.macos [1, 0, 0] {
    22        module Platform;
    23        module Intel80586;
    24    }
    25    /*
    26     *  @(#) host.platforms.macos; 1, 0, 0,1; 11-21-2018 13:29:06; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    27     */
    28


module host.platforms.macos.Platform

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Platform.xdc ========
    14     */
    15
    16    package host.platforms.macos;
    17
    18    /*!
    19     *  ======== Platform ========
    20     *  Native macos platform support
    21     *
    22     *  This module implements xdc.platform.IPlatform and defines configuration
    23     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    24     *
    25     *  The configuration parameters are initialized in this package's
    26     *  configuration script (package.cfg) and "bound" to the TCOM object
    27     *  model.  Once they are part of the model, these parameters are
    28     *  queried by a program's configuration script.
    29     *
    30     *  This particular platform has a single Cpu, and therefore, only
    31     *  declares a single CPU configuration object.  Multi-CPU platforms
    32     *  would declare multiple Cpu configuration parameters (one per
    33     *  platform CPU).
    34     */
    35
    36    metaonly module Platform inherits xdc.platform.IPlatform
    37    {
    38        /*!
    39         *  ======== BOARD ========
    40         *  @_nodoc this structure (and CPU below) exists to satisfy the
    41         *  IPlatform interface requirements; these fields are largely
    42         *  unnecessary for host platforms.
    43         */
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "intel-x86",
    47            boardFamily:    "intel-x86",
    48            boardRevision:  null
    49        };
    50
    51        /*!
    52         *  ======== CPU ========
    53         *  @_nodoc
    54         */
    55        readonly config xdc.platform.IExeContext.Cpu CPU = {
    56            id:             "0",
    57            clockRate:      1000.0,
    58            catalogName:    "host.platforms.macos",
    59            deviceName:     "Intel80586",
    60            revision:       "",
    61        };
    62
    63    instance:
    64    }
    65    /*
    66     *  @(#) host.platforms.macos; 1, 0, 0,1; 11-21-2018 13:29:06; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    67     */
    68


module host.platforms.PC.Intel80586

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Intel80586.xdc. ========
    14     */
    15
    16    package host.platforms.PC;
    17
    18    /*!
    19     *  ======== Intel80586 ========
    20     *  Pentium device data sheet module.
    21     *
    22     *  This module provides basic data suitable for Intel Pentium based
    23     *  native builds.
    24     */
    25    metaonly module Intel80586 inherits xdc.platform.ICpuDataSheet
    26    {
    27    instance:
    28        override config string cpuCore          = "586";
    29        override config string cpuCoreRevision   = "1.0";
    30        override config int    minProgUnitSize   = 1;
    31        override config int    minDataUnitSize   = 1;
    32        override config int    dataWordSize     = 4;
    33
    34        /*!
    35         *  ======== memMap ========
    36         *  The memory map returned be getMemeoryMap().
    37         */
    38        config xdc.platform.IPlatform.Memory memMap[string] = [];
    39    }
    40    /*
    41     *  @(#) host.platforms.PC; 1, 0, 0,1; 11-21-2018 13:28:47; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    42     */
    43


package host.platforms.PC

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.platform;
    13
    14    /*!
    15     *  ======== host.platform.PC ========
    16     *  Platform package for the PC platform.
    17     *
    18     *  This package implements the interfaces (xdc.platform.IPlatform) necessary
    19     *  to build and run executables on a PC platform.  This platform supports
    20     *  multiple host operating systems; Linux, Windows, etc.
    21     */
    22    package host.platforms.PC [1,0,0] {
    23        module Platform;
    24        module Intel80586;
    25    }
    26    /*
    27     *  @(#) host.platforms.PC; 1, 0, 0,1; 11-21-2018 13:28:47; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    28     */
    29


module host.platforms.PC.Platform

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Platform.xdc ========
    14     */
    15
    16    package host.platforms.PC;
    17
    18    /*!
    19     *  ======== Platform ========
    20     *  Native PC platform support
    21     *
    22     *  This module implements xdc.platform.IPlatform and defines configuration
    23     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    24     *
    25     *  The configuration parameters are initialized in this package's
    26     *  configuration script (package.cfg) and "bound" to the TCOM object
    27     *  model.  Once they are part of the model, these parameters are
    28     *  queried by a program's configuration script.
    29     *
    30     *  This particular platform has a single Cpu, and therefore, only
    31     *  declares a single CPU configuration object.  Multi-CPU platforms
    32     *  would declare multiple Cpu configuration parameters (one per
    33     *  platform CPU).
    34     */
    35
    36    metaonly module Platform inherits xdc.platform.IPlatform
    37    {
    38        /*!
    39         *  ======== BOARD ========
    40         *  @_nodoc this structure (and CPU below) exists to satisfy the
    41         *  IPlatform interface requirements; these fields are largely
    42         *  unnecessary for host platforms.
    43         */
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "intel-x86",
    47            boardFamily:    "intel-x86",
    48            boardRevision:  null
    49        };
    50
    51        /*!
    52         *  ======== CPU ========
    53         *  @_nodoc
    54         */
    55        readonly config xdc.platform.IExeContext.Cpu CPU = {
    56            id:             "0",
    57            clockRate:      1000.0,
    58            catalogName:    "host.platforms.PC",
    59            deviceName:     "Intel80586",
    60            revision:       "",
    61        };
    62
    63    instance:
    64    }
    65    /*
    66     *  @(#) host.platforms.PC; 1, 0, 0,1; 11-21-2018 13:28:47; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    67     */
    68


package host.platforms.SUN

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.platform;
    13
    14    /*!
    15     *  ======== host.platform.SUN ========
    16     *  Platform package for the SUN Sparc platform.
    17     *
    18     *  This package implements the interfaces (xdc.platform.IPlatform) necessary
    19     *  to build and run executables on a SUN Sparc platform.
    20     */
    21    package host.platforms.SUN [1,0,0,1] {
    22        module Platform;
    23        module SunSparc7;
    24    }
    25    /*
    26     *  @(#) host.platforms.SUN; 1, 0, 0, 1,1; 11-21-2018 13:28:52; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    27     */
    28


module host.platforms.SUN.Platform

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Platform.xdc ========
    14     */
    15
    16    package host.platforms.SUN;
    17
    18    /*!
    19     *  ======== Platform ========
    20     *  Native SUN Solaris platform support
    21     *
    22     *  This module implements xdc.platform.IPlatform and defines configuration
    23     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    24     *
    25     *  The configuration parameters are initialized in this package's
    26     *  configuration script (package.cfg) and "bound" to the TCOM object
    27     *  model.  Once they are part of the model, these parameters are
    28     *  queried by a program's configuration script.
    29     *
    30     *  This particular platform has a single Cpu, and therefore, only
    31     *  declares a single CPU configuration object.  Multi-CPU platforms
    32     *  would declare multiple Cpu configuration parameters (one per
    33     *  platform CPU).
    34     */
    35    metaonly module Platform inherits xdc.platform.IPlatform
    36    {
    37        /*!
    38         *  ======== BOARD ========
    39         *  @_nodoc this structure (and CPU below) exists to satisfy the
    40         *  IPlatform interface requirements; these fields are largely
    41         *  unnecessary for host platforms.
    42         */
    43        readonly config xdc.platform.IPlatform.Board BOARD = {
    44            id:             "0",
    45            boardName:      "sun-sparc",
    46            boardFamily:    "sun-sparc",
    47            boardRevision:  null
    48        };
    49
    50        /*!
    51         *  ======== CPU ========
    52         *  @_nodoc
    53         */
    54        readonly config xdc.platform.IExeContext.Cpu CPU = {
    55            id:             "0",
    56            clockRate:      750.0,
    57            catalogName:    "host.platforms.SUN",
    58            deviceName:     "SunSparc7",
    59            revision:       "",
    60        };
    61
    62    instance:
    63        config String remoteHost;
    64    }
    65    /*
    66     *  @(#) host.platforms.SUN; 1, 0, 0, 1,1; 11-21-2018 13:28:52; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    67     */
    68


module host.platforms.SUN.SunSparc7

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package host.platforms.SUN;
    13
    14    /*!
    15     *  ======== SunSparc7 ========
    16     *  Sparc device data sheet module.
    17     *
    18     *  This module provides basic data suitable for SUN Solaris native
    19     *  builds.
    20     */
    21    metaonly module SunSparc7 inherits xdc.platform.ICpuDataSheet
    22    {
    23    instance:
    24        override config string cpuCore          = "sparc7";
    25        override config string cpuCoreRevision   = "1.0";
    26        override config int    minProgUnitSize   = 1;
    27        override config int    minDataUnitSize   = 1;
    28        override config int    dataWordSize     = 4;
    29
    30        /*!
    31         *  ======== memMap ========
    32         *  The memory map returned be getMemeoryMap().
    33         */
    34        config xdc.platform.IPlatform.Memory memMap[string] = [];
    35    }
    36    /*
    37     *  @(#) host.platforms.SUN; 1, 0, 0, 1,1; 11-21-2018 13:28:52; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    38     */
    39


package iar.targets

     1    /*
     2     *  Copyright (c) 2017 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     *
    12     */
    13    requires xdc.bld;
    14
    15    /*!
    16     *  ======== iar.targets ========
    17     *  Package of targets for the IAR code generation tools
    18     *
    19     *  The targets in this package are designed to enable host application
    20     *  development; e.g., the build of the XDCtools product's C-based command
    21     *  line tools.
    22     */
    23    package iar.targets [1, 0, 1] {
    24    }
    25    /*
    26     *  @(#) iar.targets; 1, 0, 1,0; 9-28-2018 17:07:36; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    27
    28     */
    29


interface iar.targets.arm.ITarget

     1    /*
     2     *  Copyright (c) 2013 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== ITarget ========
    14     *  IAR ARM extension to the base `xdc.bld.ITarget3` interface.
    15     */
    16    @TargetHeader("xdc/bld/stddefs.xdt")
    17    metaonly interface ITarget inherits xdc.bld.ITarget3 {
    18
    19        override readonly config String rts = "iar.targets.arm.rts";
    20
    21        override config string stdInclude = "iar/targets/arm/std.h";
    22
    23        /*
    24         *  ======== binDir ========
    25         *  Code gen tools bin directory path
    26         */
    27        config string binDir = "$(rootDir)/bin/";
    28
    29        /*!
    30         *  ======== model ========
    31         *  Little endian, thumb2 model
    32         */
    33        override readonly config xdc.bld.ITarget.Model model = {
    34            endian: "little",
    35            codeModel: "thumb2",
    36            shortEnums: true
    37        };
    38
    39        /*!
    40         *  ======== ccOpts ========
    41         *  User configurable compiler options.
    42         */
    43        override config Options ccOpts = {
    44            prefix: "--silent",
    45            suffix: ""
    46        };
    47
    48        /*!
    49         *  ======== asmOpts ========
    50         *  User configurable assembler options.
    51         */
    52        override config Options asmOpts = {
    53            prefix: "-S",
    54            suffix: ""
    55        };
    56
    57        /*!
    58         *  ======== ar ========
    59         *  The command used to create an archive
    60         */
    61        override readonly config Command ar = {
    62            cmd: "iarchive",
    63            opts: ""
    64        };
    65
    66        /*!
    67         *  ======== arOpts ========
    68         *  User configurable archiver options.
    69         */
    70        override config Options arOpts = {
    71            prefix: "--silent",
    72            suffix: ""
    73        };
    74
    75        /*!
    76         *  ======== lnkOpts ========
    77         *  User configurable linker options.
    78         */
    79        override config xdc.bld.ITarget2.Options lnkOpts = {
    80            prefix: "--silent",
    81            suffix: "--map $(XDCCFGDIR)/$@.map  --redirect _Printf=_PrintfSmall --redirect _Scanf=_ScanfSmall ",
    82        };
    83
    84        /*!
    85         *  ======== vers ========
    86         *  The command used to get the tool-chain to return a version number.
    87         */
    88        readonly config Command vers = {
    89            cmd: "iccarm",
    90            opts: "-v"
    91        };
    92
    93        /*!
    94         *  ======== extension ========
    95         *  The IAR assembly file extension recognised by this target.
    96         */
    97        override config Extension extensions[string] = [
    98            [".asm",  {suf: ".asm", typ: "asm"}],
    99            [".c",    {suf: ".c",   typ: "c"  }],
   100            [".cpp",  {suf: ".cpp", typ: "cpp"}],
   101            [".cxx",  {suf: ".cxx", typ: "cpp"}],
   102            [".C",    {suf: ".C",   typ: "cpp"}],
   103            [".cc",   {suf: ".cc",  typ: "cpp"}],
   104            [".s",    {suf: ".s",   typ: "asm"}],
   105            [".sv7M", {suf: ".sv7M",typ: "asm"}],
   106            [".sv8M", {suf: ".sv8M",typ: "asm"}],
   107        ];
   108
   109        /*!
   110         *  ======== includeOpts ========
   111         *  Additional user configurable target-specific include path options
   112         */
   113        override config String includeOpts = "";
   114
   115        /*!
   116         *  ======== cmdPrefix ========
   117         *  Prefix to put in front of each command
   118         *
   119         *  This string is put in front of every Command before being passed to
   120         *  the shell for execution.  This string can be used to run the compiler
   121         *  in emulation environments.
   122         *
   123         *  LC_ALL=C must be set for code gen to run on SUSE
   124         */
   125        config String cmdPrefix = "LC_ALL=C ";
   126
   127        /*!
   128         *  ======== alignDirectiveSupported ========
   129         *  The compiler supports an align directive.
   130         */
   131        override readonly config Bool alignDirectiveSupported = true;
   132
   133        /*!
   134         *  ======== stdTypes  ========
   135         *  Size and alignment for standard base types
   136         */
   137        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   138            t_IArg          : { size: 4, align: 4 },
   139            t_Char          : { size: 1, align: 1 },
   140            t_Double        : { size: 8, align: 8 },
   141            t_Float         : { size: 4, align: 4 },
   142            t_Fxn           : { size: 4, align: 4 },
   143            t_Int           : { size: 4, align: 4 },
   144            t_Int8          : { size: 1, align: 1 },
   145            t_Int16         : { size: 2, align: 2 },
   146            t_Int32         : { size: 4, align: 4 },
   147            t_Long          : { size: 4, align: 4 },
   148            t_LDouble       : { size: 8, align: 8 },
   149            t_LLong         : { size: 8, align: 8 },
   150            t_Ptr           : { size: 4, align: 4 },
   151            t_Short         : { size: 2, align: 2 },
   152            t_Size          : { size: 4, align: 4 },
   153            t_Int64         : { size: 8, align: 8 },
   154        };
   155
   156        /*!
   157         *  ======== profiles ========
   158         *  Standard options profiles.
   159         */
   160        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   161            ["debug", {
   162                compileOpts: {
   163                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h",
   164                },
   165                linkOpts: "--semihosting=iar_breakpoint",
   166            }],
   167            ["release", {
   168                compileOpts: {
   169                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Normal.h",
   170                },
   171                linkOpts: "--semihosting=iar_breakpoint",
   172            }],
   173            ["debug_full", {
   174                compileOpts: {
   175                    copts: "--debug --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h",
   176                },
   177                linkOpts: "--semihosting=iar_breakpoint",
   178            }],
   179            ["release_full", {
   180                compileOpts: {
   181                    copts: "-Ohs --dlib_config $(rootDir)/inc/c/DLib_Config_Full.h",
   182                },
   183                linkOpts: "--semihosting=iar_breakpoint",
   184            }],
   185        ];
   186
   187        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   188    }
   189    /*
   190     *  @(#) iar.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:41; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   191
   192     */
   193


module iar.targets.arm.M3

     1    /*
     2     *  Copyright (c) 2013-2015 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== M3 ========
    14     *  IAR M3 target
    15     */
    16    metaonly module M3 inherits ITarget
    17    {
    18        override readonly config String name = "M3";
    19
    20        override readonly config String suffix = "rm3";
    21
    22        override readonly config String isa  = "v7M";
    23
    24        override config string platform  = "ti.platforms.tiva:TM4C1294NCPDT:1";
    25
    26        /*!
    27         *  ======== cc ========
    28         *  The command used to compile C/C++ source files into object files
    29         */
    30        override readonly config Command cc = {
    31            cmd: "iccarm",
    32            opts: "--aeabi --cpu=Cortex-M3 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
    33        };
    34
    35        /*!
    36         *  ======== asm ========
    37         *  The command used to assembles assembly source files into object files
    38         */
    39        override readonly config Command asm = {
    40            cmd: "iasmarm",
    41            opts: "--cpu Cortex-M3 --endian little"
    42        };
    43
    44        /*!
    45         *  ======== lnk ========
    46         *  The command used to link executables.
    47         */
    48        override readonly config Command lnk = {
    49            cmd: "ilinkarm",
    50            opts: "--cpu=Cortex-M3"
    51        };
    52    }
    53    /*
    54     *  @(#) iar.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:41; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    55
    56     */
    57


module iar.targets.arm.M4

     1    /*
     2     *  Copyright (c) 2013-2015 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== M4 ========
    14     *  IAR M4 target
    15     */
    16    metaonly module M4 inherits ITarget
    17    {
    18        override readonly config String name = "M4";
    19
    20        override readonly config String suffix = "rm4";
    21
    22        override readonly config String isa  = "v7M4";
    23
    24        override config string platform  = "ti.platforms.tiva:TM4C1294NCPDT:1";
    25
    26        /*!
    27         *  ======== cc ========
    28         *  The command used to compile C/C++ source files into object files
    29         */
    30        override readonly config Command cc = {
    31            cmd: "iccarm",
    32            opts: "--aeabi --cpu=Cortex-M4 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
    33        };
    34
    35        /*!
    36         *  ======== asm ========
    37         *  The command used to assembles assembly source files into object files
    38         */
    39        override readonly config Command asm = {
    40            cmd: "iasmarm",
    41            opts: "--cpu Cortex-M4 --endian little"
    42        };
    43
    44        /*!
    45         *  ======== lnk ========
    46         *  The command used to link executables.
    47         */
    48        override readonly config Command lnk = {
    49            cmd: "ilinkarm",
    50            opts: "--cpu=Cortex-M4"
    51        };
    52    }
    53    /*
    54     *  @(#) iar.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:41; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    55
    56     */
    57


module iar.targets.arm.M4F

     1    /*
     2     *  Copyright (c) 2013-2015 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== M4F ========
    14     *  IAR M4F target
    15     */
    16    metaonly module M4F inherits ITarget
    17    {
    18        override readonly config String name = "M4F";
    19
    20        override readonly config String suffix = "rm4f";
    21
    22        override readonly config String isa  = "v7M4";
    23
    24        override config string platform  = "ti.platforms.tiva:TM4C1294NCPDT:1";
    25
    26        /*!
    27         *  ======== cc ========
    28         *  The command used to compile C/C++ source files into object files
    29         */
    30        override readonly config Command cc = {
    31            cmd: "iccarm",
    32            opts: "--aeabi --cpu=Cortex-M4F --diag_suppress=Pa050,Go005 --endian=little -e --fpu=VFPv4_sp --thumb"
    33        };
    34
    35        /*!
    36         *  ======== asm ========
    37         *  The command used to assembles assembly source files into object files
    38         */
    39        override readonly config Command asm = {
    40            cmd: "iasmarm",
    41            opts: "--cpu Cortex-M4F --endian little --fpu VFPv4_sp "
    42        };
    43
    44        /*!
    45         *  ======== lnk ========
    46         *  The command used to link executables.
    47         */
    48        override readonly config Command lnk = {
    49            cmd: "ilinkarm",
    50            opts: "--cpu=Cortex-M4F"
    51        };
    52    }
    53    /*
    54     *  @(#) iar.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:41; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    55
    56     */
    57


module iar.targets.arm.M33

     1    /*
     2     *  Copyright (c) 2017 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== M33 ========
    14     *  IAR M33 target
    15     */
    16    metaonly module M33 inherits ITarget
    17    {
    18        override readonly config String name = "M33";
    19
    20        override readonly config String suffix = "rm33";
    21
    22        override readonly config String isa  = "v8M";
    23
    24        override config string platform  = "ti.platforms.cortexM:FVP_MPS2:1";
    25
    26        /*!
    27         *  ======== cc ========
    28         *  The command used to compile C/C++ source files into object files
    29         */
    30        override readonly config Command cc = {
    31            cmd: "iccarm",
    32            opts: "--aeabi --cpu=Cortex-M33 --diag_suppress=Pa050,Go005 --endian=little -e --thumb"
    33        };
    34
    35        /*!
    36         *  ======== asm ========
    37         *  The command used to assembles assembly source files into object files
    38         */
    39        override readonly config Command asm = {
    40            cmd: "iasmarm",
    41            opts: "--cpu Cortex-M33 --endian little "
    42        };
    43
    44        /*!
    45         *  ======== lnk ========
    46         *  The command used to link executables.
    47         */
    48        override readonly config Command lnk = {
    49            cmd: "ilinkarm",
    50            opts: "--cpu=Cortex-M33"
    51        };
    52    }
    53    /*
    54     *  @(#) iar.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:41; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    55
    56     */
    57


package iar.targets.arm

     1    /*
     2     *  Copyright (c) 2013-2017 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== iar.targets.arm ========
    15     *  IAR-based code generation targets for ARM devices
    16     */
    17    package iar.targets.arm [1,0,0] {
    18        module M3, M4, M4F, M33;
    19        interface ITarget;
    20    }
    21    /*
    22     *  @(#) iar.targets.arm; 1, 0, 0,0; 9-28-2018 17:07:41; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    23
    24     */
    25


package iar.targets.arm.rts

     1    /*
     2     *  Copyright (c) 2013 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== iar.targets.arm.rts ========
    15     *  Runtime support package for ARM devices for use with the IAR toolchain
    16     */
    17    package iar.targets.arm.rts [1,0,0] {
    18        module Settings;
    19        module VectorTable;
    20    }
    21    /*
    22     *  @(#) iar.targets.arm.rts; 1, 0, 0,0; 9-28-2018 17:35:50; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    23
    24     */
    25


module iar.targets.arm.rts.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package iar.targets.arm.rts;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39    /*
    40     *  @(#) iar.targets.arm.rts; 1, 0, 0,0; 9-28-2018 17:35:50; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    41
    42     */
    43


module iar.targets.arm.rts.VectorTable

     1    /*
     2     *  Copyright (c) 2013 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== VectorTable ========
    14     *  IAR's vector table module
    15     */
    16    metaonly module VectorTable
    17    {
    18        /*!
    19         *  ======== getVectorTableLib  ========
    20         *  Configurable vector table library option
    21         *
    22         *  By default, the IAR's vector table library in this package is pulled
    23         *  in during link phase. RTOS and other products which define their own
    24         *  vector table can disable using the vector table library provided by
    25         *  this package by setting `getVectorTableLib` config parameter to false.
    26         */
    27        config Bool getVectorTableLib = true;
    28
    29    }
    30    /*
    31     *  @(#) iar.targets.arm.rts; 1, 0, 0,0; 9-28-2018 17:35:50; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    32
    33     */
    34


interface iar.targets.msp430.ITarget

     1    /*
     2     *  Copyright (c) 2012 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== ITarget ========
    14     *  A IAR extension to the base `xdc.bld.ITarget3` interface.
    15     */
    16    @TargetHeader("xdc/bld/stddefs.xdt")
    17    metaonly interface ITarget inherits xdc.bld.ITarget3 {
    18
    19        override readonly config String rts = "iar.targets.msp430.rts";
    20
    21        override config string stdInclude = "iar/targets/msp430/std.h";
    22
    23        override config String platform = "ti.platforms.msp430:MSP430F5438:1";
    24
    25        config string binDir = "$(rootDir)/bin/";
    26
    27        /*!
    28         *  ======== ccOpts ========
    29         *  User configurable compiler options.
    30         *
    31         *  Defaults:
    32         *  @p(dlist)
    33         *      -`--silent`
    34         *          Silent operation
    35         *      -`--diag_suppress`
    36         *          Pa050 complains about Unix EOL characters
    37         *          Go005 complains about function inlining
    38         *  @p
    39         */
    40        override config Options ccOpts = {
    41            prefix: "--silent",
    42            suffix: "--diag_suppress=Pa050,Go005"
    43        };
    44
    45        /*!
    46         *  ======== asmOpts ========
    47         *  User configurable assembler options.
    48         *
    49         *  Defaults:
    50         *  @p(dlist)
    51         *      -`-S`
    52         *          Silent operation
    53         *  @p
    54         */
    55        override config Options asmOpts = {
    56            prefix: "-S",
    57            suffix: ""
    58        };
    59
    60        /*!
    61         *  ======== ar ========
    62         *  The command used to create an archive
    63         */
    64        override readonly config Command ar = {
    65            cmd: "xar",
    66            opts: ""
    67        };
    68
    69        /*!
    70         *  ======== arOpts ========
    71         *  User configurable archiver options.
    72         */
    73        override config Options arOpts = {
    74            prefix: "",
    75            suffix: ""
    76        };
    77
    78        /*!
    79         *  ======== xlib ========
    80         *  The command used to modify a library
    81         *
    82         *  Defaults:
    83         *  @p(dlist)
    84         *      -`-c`
    85         *        run command line
    86         *  @p
    87         */
    88        readonly config Command xlib = {
    89            cmd: "xlib",
    90            opts: "-c"
    91        };
    92
    93        /*!
    94         *  ======== xlibOpts ========
    95         *  User configurable xlib options.
    96         *
    97         *  Defaults:
    98         *  @p(dlist)
    99         *      -`MAKE-LIBRARY`
   100         *        changes a module to library type
   101         *  @p
   102         */
   103        config Options xlibOpts = {
   104            prefix: "",
   105            suffix: "\"MAKE-LIBRARY $@\""
   106        };
   107
   108        /*!
   109         *  ======== lnk ========
   110         *  The command used to link executables.
   111         */
   112        override readonly config Command lnk = {
   113            cmd: "xlink",
   114            opts: ""
   115        };
   116
   117        /*!
   118         *  ======== lnkOpts ========
   119         *  User configurable linker options.
   120         *
   121         *  Defaults:
   122         *  @p(dlist)
   123         *      -`-S`
   124         *          Silent operation
   125         *      -`-xens`
   126         *          Cross reference list generated in map file
   127         *      -`-l`
   128         *          Generates a map file
   129         *      -`-rt`
   130         *          Plugins in IAR debugger low level functions
   131         *      -`-e`
   132         *          Redirects function call to another function at link time
   133         *      -`-s`
   134         *          Program entry point
   135         *  @p
   136         */
   137        override config xdc.bld.ITarget2.Options lnkOpts = {
   138            prefix: "-S",
   139            suffix: "-xens -l $(XDCCFGDIR)/$@.map -rt -e_PrintfSmall=_Printf -e_ScanfSmall=_Scanf -s __program_start",
   140        };
   141
   142        /*!
   143         *  ======== vers ========
   144         *  The command used to get the tool-chain to return a version number.
   145         */
   146        readonly config Command vers = {
   147            cmd: "icc430",
   148            opts: "-v"
   149        };
   150
   151        /*!
   152         *  ======== extension ========
   153         *  The IAR assembly file extension recognised by this target.
   154         */
   155        override config Extension extensions[string] = [
   156            [".asm", {suf: ".asm", typ: "asm"}],
   157            [".c",   {suf: ".c",   typ: "c"  }],
   158            [".cpp", {suf: ".cpp", typ: "cpp"}],
   159            [".cxx", {suf: ".cxx", typ: "cpp"}],
   160            [".C",   {suf: ".C",   typ: "cpp"}],
   161            [".cc",  {suf: ".cc",  typ: "cpp"}],
   162            [".s43", {suf: ".s43", typ: "asm"}],
   163        ];
   164
   165        override config String includeOpts = "";
   166
   167        /*!
   168         *  ======== cmdPrefix ========
   169         *  Prefix to put in front of each command
   170         *
   171         *  This string is put in front of every Command before being passed to
   172         *  the shell for execution.  This string can be used to run the compiler
   173         *  in emulation environments.
   174         */
   175        config String cmdPrefix = "";
   176
   177        /*!
   178         *  ======== alignDirectiveSupported ========
   179         *  The compiler supports an align directive.
   180         */
   181        override readonly config Bool alignDirectiveSupported = true;
   182
   183    }
   184    /*
   185     *  @(#) iar.targets.msp430; 1, 0, 0,0; 9-28-2018 17:07:46; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   186
   187     */
   188


module iar.targets.msp430.MSP430

     1    /*
     2     *  Copyright (c) 2012-2016 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== MSP430 ========
    14     *  IAR MSP430 little endian, small code model, small data model target
    15     */
    16    metaonly module MSP430 inherits ITarget
    17    {
    18        override readonly config String name             = "MSP430";
    19        override readonly config String suffix           = "r430";
    20        override readonly config String isa              = "430";
    21        override readonly config xdc.bld.ITarget.Model model = {
    22            endian: "little",
    23            codeModel: "small",
    24            dataModel: "small",
    25            shortEnums: true
    26        };
    27
    28        /*!
    29         *  ======== cc ========
    30         *  The command used to compile C/C++ source files into object files
    31         *
    32         *  Defaults:
    33         *  @p(dlist)
    34         *      -`-e`
    35         *          enable compiler extensions so it's possible to get segment
    36         *          start addresses in C, via:
    37         *          @p(code)
    38         *              #pragma segment = "CSTACK"
    39         *              isrStack = __segment_begin("CSTACK");
    40         *          @p
    41         *      -`--core=430`
    42         *          MSP430 architecture
    43         *      -`--data_model`
    44         *          Small data model for 430 core
    45         *  @p
    46         */
    47        override readonly config Command cc = {
    48            cmd: "icc430",
    49            opts: "-e --core=430 --data_model=small"
    50        };
    51
    52        /*!
    53         *  ======== asm ========
    54         *  The command used to assembles assembly source files into object files
    55         */
    56        override readonly config Command asm = {
    57            cmd: "a430",
    58            opts: "--data_model small"
    59        };
    60
    61        /*!
    62         *  ======== profiles ========
    63         *  Standard options profiles for the IAR MSP430 tool-chain.
    64         */
    65        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    66            ["debug", {
    67                compileOpts: {
    68                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430fn.h",
    69                },
    70                linkOpts: "$(rootDir)/lib/dlib/dl430fn.r43",
    71            }],
    72            ["release", {
    73                compileOpts: {
    74                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430fn.h",
    75                },
    76                linkOpts: "$(rootDir)/lib/dlib/dl430fn.r43",
    77            }],
    78            ["debug_full", {
    79                compileOpts: {
    80                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430ff.h",
    81                },
    82                linkOpts: "$(rootDir)/lib/dlib/dl430ff.r43",
    83            }],
    84            ["release_full", {
    85                compileOpts: {
    86                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430ff.h",
    87                },
    88                linkOpts: "$(rootDir)/lib/dlib/dl430ff.r43",
    89            }],
    90        ];
    91
    92        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
    93            t_IArg          : { size: 2, align: 2 },
    94            t_Char          : { size: 1, align: 1 },
    95            t_Double        : { size: 4, align: 2 },
    96            t_Float         : { size: 4, align: 2 },
    97            t_Fxn           : { size: 2, align: 2 },
    98            t_Int           : { size: 2, align: 2 },
    99            t_Int8          : { size: 1, align: 1 },
   100            t_Int16         : { size: 2, align: 2 },
   101            t_Int32         : { size: 4, align: 2 },
   102            t_Long          : { size: 4, align: 2 },
   103            t_LDouble       : { size: 4, align: 2 },
   104            t_LLong         : { size: 8, align: 2 },
   105            t_Ptr           : { size: 2, align: 2 },
   106            t_Short         : { size: 2, align: 2 },
   107            t_Size          : { size: 2, align: 2 },
   108        };
   109
   110    }
   111    /*
   112     *  @(#) iar.targets.msp430; 1, 0, 0,0; 9-28-2018 17:07:46; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   113
   114     */
   115


module iar.targets.msp430.MSP430X_large

     1    /*
     2     *  Copyright (c) 2014-2016 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== MSP430X_large ========
    14     *  IAR MSP430X little endian, large code model, large data model target.
    15     */
    16
    17    metaonly module MSP430X_large inherits ITarget
    18    {
    19        override readonly config String name             = "MSP430X_large";
    20        override readonly config String suffix           = "r430XL";
    21        override readonly config String isa              = "430X";
    22        override readonly config xdc.bld.ITarget.Model model = {
    23            endian: "little",
    24            codeModel: "large",
    25            dataModel: "large",
    26            shortEnums: true
    27        };
    28
    29        /*!
    30         *  ======== cc ========
    31         *  The command used to compile C/C++ source files into object files
    32         *
    33         *  Defaults:
    34         *  @p(dlist)
    35         *      -`-e`
    36         *          enable compiler extensions so it's possible to get segment
    37         *          start addresses in C, via:
    38         *          @p(code)
    39         *              #pragma segment = "CSTACK"
    40         *              isrStack = __segment_begin("CSTACK");
    41         *          @p
    42         *      -`--core=430X`
    43         *          MSP430X architecture
    44         *      -`--data_model`
    45         *          Large data model for 430X core
    46         *  @p
    47         */
    48        override readonly config Command cc = {
    49            cmd: "icc430",
    50            opts: "-e --core=430X --data_model=large"
    51        };
    52
    53        /*!
    54         *  ======== asm ========
    55         *  The command used to assembles assembly source files into object files
    56         *
    57         *  Defaults:
    58         *  @p(dlist)
    59         *      -`-v1`
    60         *          MSP430X architecture
    61         *      -`-D__LARGE_DATA_MODEL__`
    62         *          indicate that this is large model to assembly code; IAR does
    63         *          currently have any pre-defined macros for this purpose; we use
    64         *          this symbol because it is the same as that used by the TI
    65         *          compiler (so some degree of portability is possible).
    66         *  @p
    67         */
    68        override readonly config Command asm = {
    69            cmd: "a430",
    70            opts: "-v1 --data_model large --code_model large -D__LARGE_DATA_MODEL__ -DUSE_LARGE_CODE_MODEL=1"
    71        };
    72
    73        /*!
    74         *  ======== profiles ========
    75         *  Standard options profiles for the IAR MSP430 tool-chain.
    76         */
    77        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    78            ["debug", {
    79                compileOpts: {
    80                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xllfn.h",
    81                },
    82                linkOpts: "$(rootDir)/lib/dlib/dl430xllfn.r43",
    83            }],
    84            ["release", {
    85                compileOpts: {
    86                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xllfn.h",
    87                },
    88                linkOpts: "$(rootDir)/lib/dlib/dl430xllfn.r43",
    89            }],
    90            ["debug_full", {
    91                compileOpts: {
    92                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xllff.h",
    93                },
    94                linkOpts: "$(rootDir)/lib/dlib/dl430xllff.r43",
    95            }],
    96            ["release_full", {
    97                compileOpts: {
    98                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xllff.h",
    99                },
   100                linkOpts: "$(rootDir)/lib/dlib/dl430xllff.r43",
   101            }],
   102
   103        ];
   104
   105        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   106            t_IArg          : { size: 4, align: 2 },
   107            t_Char          : { size: 1, align: 1 },
   108            t_Double        : { size: 4, align: 2 },
   109            t_Float         : { size: 4, align: 2 },
   110            t_Fxn           : { size: 4, align: 2 },
   111            t_Int           : { size: 2, align: 2 },
   112            t_Int8          : { size: 1, align: 1 },
   113            t_Int16         : { size: 2, align: 2 },
   114            t_Int32         : { size: 4, align: 2 },
   115            t_Long          : { size: 4, align: 2 },
   116            t_LDouble       : { size: 4, align: 2 },
   117            t_LLong         : { size: 8, align: 2 },
   118            t_Ptr           : { size: 4, align: 2 },
   119            t_Short         : { size: 2, align: 2 },
   120            t_Size          : { size: 4, align: 2 },
   121        };
   122    }
   123    /*
   124     *  @(#) iar.targets.msp430; 1, 0, 0,0; 9-28-2018 17:07:46; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   125
   126     */
   127


module iar.targets.msp430.MSP430X_small

     1    /*
     2     *  Copyright (c) 2014-2016 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== MSP430X_small ========
    14     *  IAR MSP430X little endian, large code model, small data model target.
    15     */
    16
    17    metaonly module MSP430X_small inherits ITarget
    18    {
    19        override readonly config String name             = "MSP430X_small";
    20        override readonly config String suffix           = "r430XS";
    21        override readonly config String isa              = "430X";
    22        override readonly config xdc.bld.ITarget.Model model = {
    23            endian: "little",
    24            codeModel: "large",
    25            dataModel: "small",
    26            shortEnums: true
    27        };
    28
    29        /*!
    30         *  ======== cc ========
    31         *  The command used to compile C/C++ source files into object files
    32         *
    33         *  Defaults:
    34         *  @p(dlist)
    35         *      -`-e`
    36         *          enable compiler extensions so it's possible to get segment
    37         *          start addresses in C, via:
    38         *          @p(code)
    39         *              #pragma segment = "CSTACK"
    40         *              isrStack = __segment_begin("CSTACK");
    41         *          @p
    42         *      -`--core=430X`
    43         *          MSP430X architecture
    44         *      -`--data_model`
    45         *          Small data model for MSP430X architecture
    46         *      -`--save_reg20`
    47         *          All 20 bits of registers are preserved in all interrupt functions
    48         *  @p
    49         */
    50        override readonly config Command cc = {
    51            cmd: "icc430",
    52            opts: "-e --core=430X --data_model=small --save_reg20"
    53        };
    54
    55        /*!
    56         *  ======== asm ========
    57         *  The command used to assembles assembly source files into object files
    58         *
    59         *  Defaults:
    60         *  @p(dlist)
    61         *      -`-v1`
    62         *          MSP430X architecture
    63         *      -`-D__SMALL_DATA_MODEL__`
    64         *          indicate that this is small model to assembly code; IAR does
    65         *          currently have any pre-defined macros for this purpose; we use
    66         *          this symbol because it is the same as that used by the TI
    67         *          compiler (so some degree of portability is possible).
    68         *  @p
    69         */
    70        override readonly config Command asm = {
    71            cmd: "a430",
    72            opts: "-v1 --data_model small --code_model large -D__SMALL_DATA_MODEL__ -DUSE_LARGE_CODE_MODEL=1"
    73        };
    74
    75        /*!
    76         *  ======== profiles ========
    77         *  Standard options profiles for the IAR MSP430 tool-chain.
    78         */
    79        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    80            ["debug", {
    81                compileOpts: {
    82                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xlsfn.h",
    83                },
    84                linkOpts: "$(rootDir)/lib/dlib/dl430xlsfn.r43",
    85            }],
    86            ["release", {
    87                compileOpts: {
    88                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xlsfn.h",
    89                },
    90                linkOpts: "$(rootDir)/lib/dlib/dl430xlsfn.r43",
    91            }],
    92            ["debug_full", {
    93                compileOpts: {
    94                    copts: "--debug --dlib_config $(rootDir)/lib/dlib/dl430xlsff.h",
    95                },
    96                linkOpts: "$(rootDir)/lib/dlib/dl430xlsff.r43",
    97            }],
    98            ["release_full", {
    99                compileOpts: {
   100                    copts: "-Ohs --dlib_config $(rootDir)/lib/dlib/dl430xlsff.h",
   101                },
   102                linkOpts: "$(rootDir)/lib/dlib/dl430xlsff.r43",
   103            }],
   104        ];
   105
   106        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   107            t_IArg          : { size: 4, align: 2 },
   108            t_Char          : { size: 1, align: 1 },
   109            t_Double        : { size: 4, align: 2 },
   110            t_Float         : { size: 4, align: 2 },
   111            t_Fxn           : { size: 4, align: 2 },
   112            t_Int           : { size: 2, align: 2 },
   113            t_Int8          : { size: 1, align: 1 },
   114            t_Int16         : { size: 2, align: 2 },
   115            t_Int32         : { size: 4, align: 2 },
   116            t_Long          : { size: 4, align: 2 },
   117            t_LDouble       : { size: 4, align: 2 },
   118            t_LLong         : { size: 8, align: 2 },
   119            t_Ptr           : { size: 2, align: 2 },
   120            t_Short         : { size: 2, align: 2 },
   121            t_Size          : { size: 2, align: 2 },
   122        };
   123    }
   124    /*
   125     *  @(#) iar.targets.msp430; 1, 0, 0,0; 9-28-2018 17:07:46; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   126
   127     */
   128


package iar.targets.msp430

     1    /*
     2     *  Copyright (c) 2012 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== iar.targets.msp430 ========
    15     *  IAR-based code generation targets for MSP430 devices
    16     */
    17    package iar.targets.msp430 [1,0,0] {
    18        module MSP430, MSP430X_large, MSP430X_small;
    19        interface ITarget;
    20    }
    21    /*
    22     *  @(#) iar.targets.msp430; 1, 0, 0,0; 9-28-2018 17:07:46; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    23
    24     */
    25


package iar.targets.msp430.rts

     1    /*
     2     *  Copyright (c) 2012 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== iar.targets.msp430.rts ========
    15     *  Runtime support package for MSP430 devices for use with the IAR toolchain
    16     */
    17    package iar.targets.msp430.rts [1,0,0] {
    18        module Settings;
    19    }
    20    /*
    21     *  @(#) iar.targets.msp430.rts; 1, 0, 0,0; 9-28-2018 17:35:59; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    22
    23     */
    24


module iar.targets.msp430.rts.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package iar.targets.msp430.rts;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39    /*
    40     *  @(#) iar.targets.msp430.rts; 1, 0, 0,0; 9-28-2018 17:35:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    41
    42     */
    43


module iar.tools.configuro.Main

     1    /*
     2     *  Copyright (c) 2013 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Main ========
    14     *  Command-line configuration tool for IAR Embedded Workbench
    15     *
    16     *  This command-line tool computes the appropriate configuro options from the
    17     *  set of options passed from the IAR Workbench (for ex. target/platform
    18     *  from compile options). With these options, the xdc.tools.configuro tool
    19     *  is executed to compute the set of libraries, command-line flags and
    20     *  the other artifacts needed to build the application in IAR Workbench.
    21     *
    22     *  @a(INPUTS)
    23     *  @p(dlist)
    24     *    - `-o outdir (Optional)`
    25     *      Optionally an output directory can be provided.
    26     *    - `-c codegen_dir`
    27     *      Root directory of the code generation tools.
    28     *    - `--device device_name_string`
    29     *      The name of the device.
    30     *    - `--compileOptions compile_options_string`
    31     *      The command line options passed to the compiler.
    32     *    - `--linkOptions linker_options_string`
    33     *      The command line options passed to the linker.
    34     *    - `--profile profile`
    35     *      The build profile.
    36     *    - `--projFile project_file (Optional)`
    37     *      IAR Embedded Workbench project file. This is optional when
    38     *      infile.cfg is passed on command line.
    39     *    - `infile.cfg (Optional)`
    40     *      A user-supplied configuration script that names a set of RTSC
    41     *      modules, and optionally changes their configuration settings.
    42     *      If provided, it will override the --projFile option.
    43     *  @p
    44     *
    45     *  @a(OUTPUTS)
    46     *  @p(dlist)
    47     *    - `outdir/`
    48     *      A directory containing all generated build artifacts.
    49     *    - `outdir/compiler.defs`
    50     *      A file containing C compiler command-line flags. These flags must
    51     *      included on the compiler command line for any C source file that
    52     *      directly accesses the RTSC content. The flags define the header file
    53     *      and include paths to ensure object code compatibility between all
    54     *      all included content.
    55     *    - `outdir/linker.cmd`
    56     *      A file containing linker command-line flags. These flags must be
    57     *      included on the linker command line for the final link of the
    58     *      application. The flags list needed libraries and object files,
    59     *      and on some platforms define the embedded system memory map.
    60     *  @p
    61     *
    62     *  For example:
    63     *  @p(code)
    64     *      xs iar.tools.configuro -c "<codegen_dir>" --cc "<compiler>"
    65     *         --device "<device_name>" --cfgArgs "<cfg_script_args>"
    66     *         --compileOptions "<compiler_options>" --linkOptions "<link_options>"
    67     *         --profile "<profile>" infile.cfg
    68     *  @p
    69     */
    70    metaonly module Main inherits xdc.tools.ICmd {
    71
    72        /*!
    73         * usage help message
    74         */
    75        override config String usage[] = [
    76            '[-o outdir (optional)]',
    77            '[-c codegen_dir]',
    78            '[--cc compiler_name_string]',
    79            '[--device device_name]',
    80            '[--cfgArgs args_string]',
    81            '[--compileOptions compile_options_string]',
    82            '[--linkOptions linker_options_string]',
    83            '[--profile profile]',
    84            '[--projFile project_file (optional)]',
    85            'infile.cfg (optional)'
    86        ];
    87
    88    instance:
    89
    90        /*!
    91         *  ======== output ========
    92         *  Pathname of the output directory
    93         *
    94         *  A directory containing the generated build artifacts, in particular
    95         *  the `compiler.defs` and `linker.cmd` files.
    96         *
    97         *  The last component of the output directory path must be a valid
    98         *  ANSI C identifier; i.e., it must consist entirely of alphanumeric or
    99         *  '_' characters and must not start with a number.  So, the names
   100         *  '0app' and 'app-test' are not valid but '0app/config' and
   101         *  'app-test/config' are valid.
   102         *
   103         *  This is optional parameter. By default, the output directory has the
   104         *  name `configPkg` and will be  within the `{#cfgDir}` directory.
   105         */
   106        @CommandOption("o")
   107        config String output = "";
   108
   109        /*!
   110         *  ======== rootDir ========
   111         *  Root directory of the code generation tools
   112         *
   113         *  The path to the installation directory of the compiler and linker
   114         *  for the selected target. The definition of "installation directory"
   115         *  can vary from compiler to compiler, but is most commonly the
   116         *  directory that contains a "bin" subdirectory.
   117         */
   118        @CommandOption("c")
   119        config String rootDir = null;
   120
   121        /*!
   122         *  ======== compiler ========
   123         *  @_nodoc
   124         *  The name of the compiler
   125         *
   126         *  The compiler name is required to find the target and platform
   127         *  xdc.tools.configuro options.
   128         */
   129        @CommandOption("cc")
   130        config String compiler = "";
   131
   132        /*!
   133         *  ======== device ========
   134         *  The name of the device
   135         *
   136         *  The device name has to be passed to the xdc.tools.configuro tool.
   137         */
   138        @CommandOption("device")
   139        config String device = null;
   140
   141        /*!
   142         *  ======== compileOptions ========
   143         *  Compile options used for building C files
   144         *
   145         *  The compiler options are required to find the target and platform
   146         *  options for xdc.tools.configuro.
   147         */
   148        @CommandOption("compileOptions")
   149        config String compileOptions = null;
   150
   151        /*!
   152         *  ======== linkOptions ========
   153         *  Linker options used for linking libraries
   154         *
   155         *  The linker options are required to pull in the correct libraries
   156         *  during link.
   157         */
   158        @CommandOption("linkOptions")
   159        config String linkOptions = null;
   160
   161        /*!
   162         *  ======== profile ========
   163         *  Build profile
   164         */
   165        @CommandOption("profile")
   166        config String profile = "";
   167
   168        /*!
   169         *  ======== cfgArgs ========
   170         *  Optional arguments passed to configuration script
   171         *
   172         *  This option lets the user pass values into the configuration script
   173         *  from the command line. The argument is an expression in JavaScript
   174         *  syntax.  Its value is available in the configuration script under the
   175         *  name `Program.build.cfgArgs`.
   176         *
   177         *  The JavaScript expression is evaluated in the configuration domain
   178         *  after the platform package is imported, immediately before calling
   179         *  the user's configuration script.
   180         *
   181         *  This string has the same effect as the `cfgArgs` string in
   182         *  `{@link xdc.bld.Executable#Attrs}`.
   183         *
   184         *  You can pass multiple values to configuration scripts using the
   185         *  syntax of a JavaScript `Object` constant:
   186         *  @p(code)
   187         *      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ... app.cfg
   188         *  @p
   189         *
   190         *  The configuration script can read the various fields as, e.g.:
   191         *  @p(code)
   192         *      if (Program.build.cfgArgs.foo == "hello") {
   193         *          :
   194         *      }
   195         *  @p
   196         *
   197         *  @a(Note)
   198         *  Different command line shells, such as UNIX `bash` verses Windows
   199         *  `cmd.exe`, interpret quotes on the command line very differently.
   200         *  As a result, the syntax necessary to pass a string such as "hello"
   201         *  to `configuro` can vary depending on the shell you use.
   202         *
   203         *  For most UNIX shells, it is possible to use single quotes around the
   204         *  use of double quotes as in the example above.  However, since Windows
   205         *  `cmd.exe` does not treat the single quote as a special character, it
   206         *  is necessary to use a backslash, '\', to ensure that the double quote
   207         *  characters are passed to the configuro tool.
   208         *
   209         *  Windows `cmd.exe`:
   210         *  @p(code)
   211         *      xs xdc.tools.configuro --cfgArgs "{foo:\"hello\", bar:2}" ...
   212         *  @p
   213         *
   214         *  UNIX `bash`, `ksh`, `csh`, ...:
   215         *  @p(code)
   216         *      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ...
   217         *  @p
   218         *
   219         *  @see xdc.bld.Executable#Attrs
   220         */
   221        @CommandOption("cfgArgs")
   222        config String cfgArgs = "";
   223
   224        /*!
   225         *  ======== projFile ========
   226         *  IAR Embedded project file.
   227         *
   228         *  This file is searched for the RTSC configuration file (.cfg).
   229         */
   230        @CommandOption("projFile")
   231        config String projFile = "";
   232    }
   233    /*
   234     *  @(#) iar.tools.configuro; 1, 0, 0,0; 1-9-2017 12:51:04; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   235     */
   236


package iar.tools.configuro

     1    /*
     2     *  Copyright (c) 2013 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== iar.tools.configuro ========
    15     *  Command-line configuration tool for IAR
    16     */
    17    package iar.tools.configuro [1, 0, 0] {
    18        module Main;
    19    }
    20    /*
    21     *  @(#) iar.tools.configuro; 1, 0, 0,0; 1-9-2017 12:51:04; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    22     */
    23


interface microsoft.targets.ITarget

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ITarget.xdc ========
    14     */
    15    package microsoft.targets;
    16
    17    /*!
    18     *  ======== ITarget ========
    19     *  A Microsoft-specific extension to the base xdc.bld.ITarget3 interface.
    20     */
    21    @TargetHeader("xdc/bld/stddefs.xdt")
    22    metaonly interface ITarget inherits xdc.bld.ITarget3 {
    23
    24        override readonly config string stdInclude = "microsoft/targets/std.h";
    25        override config string dllExt     = ".dll";
    26
    27        /*!
    28         *  ======== debugGen ========
    29         *  Debugger/IDE project file generation support.
    30         *
    31         *  The settings below generate VC project files that enable one
    32         *  to debug (and even rebuild) Executables from within the VC GUI.
    33         *
    34         *  To avoid unnecessary build time overhead, these files are not always
    35         *  generated; by default, they are only generated for "debug" profiles.
    36         *  The generation of these files is controlled by the
    37         *  `{@link xdc.cfg.Program#gen}` configuration parameter.  To force these
    38         *  files to be generated for a particular executable, add the following
    39         *  line to the executable's program configuration script:
    40         *  @p(code)
    41         *      Program.gen.debuggerFiles = true;
    42         *  @p
    43         *  It is also possible to control the generation via build options; see
    44         *  `{@link xdc.bld.ITarget#DebugGen}`.
    45         *
    46         *  To debug an executable: double click on the generated *.vcproj file,
    47         *      when the debugger comes up, type F11 (step into).
    48         *
    49         *  The first time you debug an executable, the VC debugger may prompt
    50         *  you for a "solution file" to save.  Click OK (accepting the solution
    51         *  file name), and you will be at the first statement of your
    52         *  executable.
    53         *
    54         *  To set command line arguments prior to debugging: open the
    55         *  executable's "Project Properties" dialog (select the
    56         *  executable in the "Solution Explorer" window and pull-down
    57         *  View->"Property Pages" or type shift-F4), select "Debugging"
    58         *  in the left-most pane of the executable's "Property Pages", and
    59         *  enter command line arguments in the "Command Arguments" text box.
    60         *
    61         *  @see  http://msdn.microsoft.com/library/default.asp?url=/library/en-us/vsdebug/html/vxtskdebugginganexecreatedwithoutvisualstudioproject.asp
    62         */
    63        override config xdc.bld.ITarget.DebugGen debugGen = {
    64            execTemplate: "microsoft/targets/vc_exec.xdt",
    65            execPattern: "$(cfgName).vcproj"
    66        };
    67
    68        /*!
    69         *  ======== profiles ========
    70         *  Standard options profiles for the microsoft tool-chain.
    71         */
    72        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    73            ["debug", {
    74                compileOpts: {
    75                    copts: "-Z7 -Odi -MTd",
    76                    defs:  "-D_DEBUG=1",
    77                },
    78                linkOpts: "-debug msvcrt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib",
    79            }],
    80
    81            ["release", {
    82                compileOpts: {
    83                    copts: "-O2 -MT",
    84                    defs:  "",
    85                },
    86                linkOpts: "msvcrt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib",
    87            }],
    88        ];
    89
    90        /*!
    91         *  ======== setPath ========
    92         *  Return path needed to find necessary DLLS
    93         *
    94         *  The microsoft compilers often require one or more directories to
    95         *  be in the PATH; this allows the compiler to find necessary DLLs.
    96         *  A target implementing this function returns a string with path
    97         *  components separated by ";".
    98         */
    99        function setPath();
   100
   101        /*!
   102         *  ======== cmdPrefix ========
   103         *  Prefix to put in front of each command
   104         *
   105         *  This string is put in front of every Command before being passed to
   106         *  the shell for execution.  This string can be used to run the compiler
   107         *  in emulation environments.
   108         */
   109        config String cmdPrefix = "";
   110
   111        /*!
   112         *  ======== strictANSI ========
   113         *  Disable Microsoft C/C++ language extensions
   114         *
   115         *  Set to true if you plan to port your program to other environments.
   116         *  The compiler treats extended keywords as simple identifiers, disables
   117         *  the other Microsoft extensions, and automatically defines the
   118         *  `__STDC__` predefined macro for C programs. This option shows up
   119         *  as `"-Za"` on the command line when strictANSI is set to `true`.
   120         */
   121        config bool strictANSI = true;
   122
   123        /*!
   124         *  ======== version ========
   125         *  The Compatibility Key associated with this target.
   126         *
   127         *  The first two components of this target Compatibility Key are '1,0'.
   128         *  The rest of the Key represents the compiler version. The third
   129         *  component combines the major and the minor version number in the format
   130         *  Major.Minor. The fourth component is the build number.
   131         *
   132         *  @a(Example)
   133         *  If this target's `rootDir` points to the Visual C++ 2005 Express
   134         *  Edition, the output of the command `cl` may contains the compiler
   135         *  version string 14.00.50727.42. The Compatibility Key is
   136         *  [1,0,14.00,50727].
   137         *
   138         */
   139        override metaonly config String version;
   140
   141        /*!
   142         *  ======== stdTypes ========
   143         *  @_nodoc
   144         */
   145        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   146            t_IArg          : { size: 4, align: 1 },
   147            t_Char          : { size: 1, align: 1 },
   148            t_Double        : { size: 8, align: 1 },
   149            t_Float         : { size: 4, align: 1 },
   150            t_Fxn           : { size: 4, align: 1 },
   151            t_Int           : { size: 4, align: 1 },
   152            t_Int8          : { size: 1, align: 1 },
   153            t_Int16         : { size: 2, align: 1 },
   154            t_Int32         : { size: 4, align: 1 },
   155            t_Int64         : { size: 8, align: 1 },
   156            t_Long          : { size: 4, align: 1 },
   157            t_LDouble       : { size: 8, align: 1 },
   158            t_Ptr           : { size: 4, align: 1 },
   159            t_Short         : { size: 2, align: 1 },
   160            t_Size          : { size: 4, align: 1 },
   161        };
   162    }
   163    /*
   164     *  @(#) microsoft.targets; 1, 0, 2, 0,0; 9-28-2018 17:07:51; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   165
   166     */
   167


module microsoft.targets.Net32

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Net32.xdc ========
    14     */
    15    package microsoft.targets;
    16
    17    /*!
    18     *  ======== Net32 ========
    19     *  Microsoft .Net 32-bit native target
    20     *
    21     *  This target supports the free Microsoft .Net C/C++ compiler; aka the
    22     *  Microsoft Visual C++ Toolkit 2003 available from
    23     *  http://msdn.microsoft.com/visualc/vctoolkit2003.
    24     */
    25    metaonly module Net32 inherits microsoft.targets.ITarget {
    26
    27        override readonly config string name                    = "Net32";
    28        override readonly config string os                      = "Windows";
    29        override readonly config string suffix                  = "86N";
    30        override readonly config string isa                     = "x86";
    31        override readonly config xdc.bld.ITarget.Model model    = {
    32            endian: "little"
    33        };
    34
    35        /*!
    36         *  ======== profiles ========
    37         *  User modifiable default profiles
    38         */
    39        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    40            ["debug", {
    41                compileOpts: {
    42                    copts: "-Z7 -Od -MTd",
    43                    defs:  "-D_DEBUG=1",
    44                },
    45                linkOpts: "libcmt.lib kernel32.lib",
    46            }],
    47
    48            ["release", {
    49                compileOpts: {
    50                    copts: "-Oxi -MT",
    51                },
    52                linkOpts: "libcmt.lib kernel32.lib",
    53            }],
    54        ];
    55
    56        override readonly config string rts     = "microsoft.targets.rts";
    57        override config string platform         = "host.platforms.PC";
    58        override config string execExt          = ".exe";
    59
    60        /*!
    61         *  ======== ar ========
    62         *  The archiver command and all required options
    63         *  @p(dlist)
    64         *      -`-nologo`
    65         *          don't display archiver copyright
    66         */
    67        override readonly config xdc.bld.ITarget2.Command ar = {
    68            cmd: "$(rootDir)/bin/link.exe -lib -nologo",
    69            opts: ""
    70        };
    71
    72        /*!
    73         *  ======== cc ========
    74         *  The compile command and all required options
    75         *  @p(dlist)
    76         *      -`-c`
    77         *          don't link
    78         *      -`-nologo`
    79         *          don't display compiler copyright
    80         */
    81        override readonly config xdc.bld.ITarget2.Command cc = {
    82            cmd: "$(rootDir)/bin/cl",
    83            opts: "-nologo -c",
    84        };
    85
    86        /*!
    87         *  ======== asm ========
    88         *  The assemble command and all required options
    89         *  @p(dlist)
    90         *      -`-c`
    91         *          don't link
    92         */
    93        override readonly config xdc.bld.ITarget2.Command asm = {
    94            cmd: "$(rootDir)/bin/cl",
    95            opts: "-nologo -c",
    96        };
    97
    98        /*!
    99         *  ======== lnk ========
   100         *  The linker command and all required options
   101         *  @p(dlist)
   102         *      -`-nologo`
   103         *          Don't display linker copyright
   104         */
   105        override readonly config xdc.bld.ITarget2.Command lnk = {
   106            cmd: "$(rootDir)/bin/link -nologo",
   107            opts: ""
   108        };
   109
   110        /*!
   111         *  ======== ccOpts ========
   112         *  User modifiable default options.
   113         *  @p(dlist)
   114         *      -`-G5`
   115         *          Optimizes code to favor the Pentium processor
   116         *      -`-W3`
   117         *          enable all warnings recommended for production purposes.
   118         */
   119        override config xdc.bld.ITarget2.Options ccOpts = {
   120            prefix: "-G5 -W3",
   121        };
   122
   123        /*!
   124         *  ======== lnkOpts ========
   125         *  User modifiable linker options
   126         *  @p(dlist)
   127         *      -`-libpath`...
   128         *              directories to search for toolchain specific libraries
   129         *      -`-nodefaultlib`
   130         *              don't search for default libraries when linking; all
   131         *              libraries used must be explicitly named
   132         *      -`-incremental:no`
   133         *              link for execution (no subsequent link will occur)
   134         *      -`-machine:ix86`
   135         *              link for the Intel x86 architecture
   136         *      -`-map:$(XDCCFGDIR)/$@.map`
   137         *              output any link map information to the specified file
   138         *              ($(XDCCFGDIR) is usually package/cfg)
   139         *      -`-pdb:$(XDCCFGDIR)/$@.pdb`
   140         *              output any program debug information to the specified file
   141         *              ($(XDCCFGDIR) is usually package/cfg)
   142         */
   143        override config xdc.bld.ITarget2.Options lnkOpts = {
   144            prefix: "-libpath:$(rootDir)/lib",
   145            suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -mapinfo:exports -machine:ix86 -nodefaultlib -incremental:no"
   146        };
   147
   148        /*!
   149         *  ======== includeOpts ========
   150         *  User modifiable default include directories
   151         *  @p(dlist)
   152         *      -`-I$(rootDir)/include`
   153         *          include compiler specific headers
   154         */
   155        override config string includeOpts = "-I$(rootDir)/include";
   156
   157         /*!
   158          *  ======== stdTypes ========
   159          *  @_nodoc
   160          */
   161         override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   162            t_IArg          : { size: 4, align: 4 },
   163            t_Char          : { size: 1, align: 1 },
   164            t_Double        : { size: 8, align: 8 },
   165            t_Float         : { size: 4, align: 4 },
   166            t_Fxn           : { size: 4, align: 4 },
   167            t_Int           : { size: 4, align: 4 },
   168            t_Int8          : { size: 1, align: 1 },
   169            t_Int16         : { size: 2, align: 2 },
   170            t_Int32         : { size: 4, align: 4 },
   171            t_Int64         : { size: 8, align: 8 },
   172            t_Long          : { size: 4, align: 4 },
   173            t_LDouble       : { size: 8, align: 8 },
   174            t_Ptr           : { size: 4, align: 4 },
   175            t_Short         : { size: 2, align: 2 },
   176            t_Size          : { size: 4, align: 4 },
   177          };
   178
   179    }
   180    /*
   181     *  @(#) microsoft.targets; 1, 0, 2, 0,0; 9-28-2018 17:07:52; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   182
   183     */
   184


package microsoft.targets

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== microsoft.targets ========
    14     *  Targets that wrap Microsoft code generation tools.
    15     */
    16    package microsoft.targets [1,0,2,0] {
    17        module VC98;
    18        module Win32;
    19        module Net32;
    20        interface ITarget;
    21    }
    22    /*
    23     *  @(#) microsoft.targets; 1, 0, 2, 0,0; 9-28-2018 17:07:52; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    24
    25     */
    26


module microsoft.targets.VC98

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== VC98.xdc ========
    15     *  Microsoft Windows 32-bit target using the Visual C/C++ 6.x compiler
    16     */
    17
    18    metaonly module VC98 inherits microsoft.targets.ITarget {
    19
    20        override readonly config string name                    = "VC98";
    21        override readonly config string os                      = "Windows";
    22        override readonly config string suffix                  = "86";
    23        override readonly config string isa                     = "x86";
    24        override readonly config xdc.bld.ITarget.Model model    = {
    25            endian: "little"
    26        };
    27
    28        override readonly config string rts = "microsoft.targets.rts";
    29        override config string platform     = "host.platforms.PC";
    30        override config string execExt      = ".exe";
    31
    32        /*!
    33         *  ======== path ========
    34         *  Path components added during execution of commands
    35         *
    36         *  The VC98 compiler DLLs are located in the vc98/bin subdirectory
    37         *  the pdb DLL is located in $(rootDir)/msdev98/bin.
    38         */
    39        readonly config string path =
    40            "$(rootDir)/vc98/bin;$(rootDir)/common/msdev98/bin";
    41
    42        /*!
    43         *  ======== ar ========
    44         *  The archiver command and all required options
    45         *  @p(dlist)
    46         *      -`-nologo`
    47         *          don't display archiver copyright
    48         */
    49        override readonly config xdc.bld.ITarget2.Command ar = {
    50            cmd: "$(rootDir)/vc98/bin/lib",
    51            opts: "-nologo"
    52        };
    53
    54        /*!
    55         *  ======== cc ========
    56         *  The compile command and all required options
    57         *  @p(dlist)
    58         *      -`-W3`
    59         *          enable all warnings recommended for production purposes.
    60         *      -`-Zp1`
    61         *          Packs structure members on 1-byte boundry
    62         *      -`-c`
    63         *          don't link
    64         *      -`-nologo`
    65         *          don't display compiler copyright
    66         */
    67        override readonly config xdc.bld.ITarget2.Command cc = {
    68            cmd: "$(rootDir)/vc98/bin/cl.exe -nologo -c",
    69            opts: '-W3 -Zp1 -DWIN32 -D_DLL -D_AFXDLL -DEXPORT=""'
    70        };
    71
    72        /*!
    73         *  ======== asm ========
    74         *  The assemble command and all required options
    75         *  @p(dlist)
    76         *      -`-c`
    77         *          don't link
    78         *      -`-nologo`
    79         *          don't display compiler copyright
    80         */
    81        override readonly config xdc.bld.ITarget2.Command asm = {
    82            cmd: "$(rootDir)/vc98/bin/cl.exe -nologo -c",
    83            opts: ""
    84        };
    85
    86        /*!
    87         *  ======== lnk ========
    88         *  The linker command and all required options
    89         *  @p(dlist)
    90         *      -`-nologo`
    91         *          Don't display linker copyright
    92         */
    93        override readonly config xdc.bld.ITarget2.Command lnk = {
    94            cmd: "$(rootDir)/vc98/bin/link -nologo",
    95            opts: ""
    96        };
    97
    98        /*!
    99         *  ======== ccOpts ========
   100         *  User modifiable default options.
   101         *  @p(dlist)
   102         *      -`-G5`
   103         *          Optimizes code to favor the Pentium processor
   104         *      -`-Ob1`
   105         *          Expand only functions marked as inline or, in a C++
   106         *          member function, defined within a class declaration
   107         *      -`-Gs`
   108         *          Probe stack to automatically grow stack as necessary
   109         *      -`-GX`
   110         *          Enables synchronous exception handling
   111         *      -`-WL`
   112         *          Write errors/warnings on a single output line
   113         */
   114        override config xdc.bld.ITarget2.Options ccOpts = {
   115            prefix: "-G5 -Ob1 -Gs -GX",
   116            suffix: "-Dfar= "
   117        };
   118
   119        /*!
   120         *  ======== lnkOpts ========
   121         *  User modifiable linker options
   122         *  @p(dlist)
   123         *      -`-libpath`...
   124         *              directories to search for toolchain specific libraries
   125         *      -`-nodefaultlib`
   126         *              don't search for default libraries when linking; all
   127         *              libraries used must be explicitly named
   128         *      -`-incremental:no`
   129         *              link for execution (no subsequent link will occur)
   130         *      -`-machine:ix86`
   131         *              link for the Intel x86 architecture
   132         *      -`-map:$(XDCCFGDIR)/$@.map`
   133         *              output any link map information to the specified file
   134         *              ($(XDCCFGDIR) is usually package/cfg)
   135         *      -`-pdb:$(XDCCFGDIR)/$@.pdb`
   136         *              output any program debug information to the specified file
   137         *              ($(XDCCFGDIR) is usually package/cfg)
   138         */
   139        override config xdc.bld.ITarget2.Options lnkOpts = {
   140            prefix: "-libpath:$(rootDir)/vc98/lib -libpath:$(rootDir)/vc98/mfc/lib",
   141            suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -machine:ix86 -nodefaultlib -incremental:no"
   142        };
   143
   144        /*!
   145         *  ======== includeOpts ========
   146         *  User modifiable include paths
   147         *  @p(dlist)
   148         *      -`-I$(rootDir)/include`
   149         *          include compiler specific headers
   150         */
   151        override config string includeOpts = "-I$(rootDir)/vc98/include -I$(rootDir)/vc98/mfc/include -I$(rootDir)/vc98/atl/include";
   152
   153
   154        /*!
   155         *  ======== profiles ========
   156         *  User modifiable default profiles
   157         */
   158        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   159            ["debug", {
   160                compileOpts: {
   161                    copts: "-Z7 -Odi -MTd",
   162                    defs:  "-D_DEBUG=1",
   163                },
   164                linkOpts: "-debug mfc42.lib mfcs42.lib msvcrt.lib msvcirt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib",
   165            }],
   166
   167            ["release", {
   168                compileOpts: {
   169                    copts: "-O2 -MT",
   170                    defs:  "",
   171                },
   172                linkOpts: "mfc42.lib mfcs42.lib msvcrt.lib msvcirt.lib setargv.obj oldnames.lib ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib",
   173            }],
   174        ];
   175    }
   176    /*
   177     *  @(#) microsoft.targets; 1, 0, 2, 0,0; 9-28-2018 17:07:52; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   178
   179     */
   180


module microsoft.targets.Win32

     1    /*
     2     *  Copyright (c) 2009-2018 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Win32.xdc ========
    14     */
    15
    16    /*!
    17     *  ======== Win32 ========
    18     *  Microsoft Windows 32-bit target using the Visual C/C++ compiler
    19     *
    20     *  This target can be configured to be used with different versions of
    21     *  Microsoft Visual C/C++ and different installations of Platform SDK (or a
    22     *  newer equivalent Windows SDK). The optional Platform SDK is needed only
    23     *  for building applications that use Windows API.
    24     *  The target `Win32` contains default configurations for Visual C/C++
    25     *  versions 8.0, and 14.0, but in order to support future versions of
    26     *  Visual C/C++ and different Windows SDK installations, there
    27     *  is a parameter {@link #sdkPath}, which users can set in their `config.bld`
    28     *  files to enable usage of this target with their installations.
    29     *
    30     *  Unlike the Visual C/C++ 6.x tool chain, this compiler complies very
    31     *  closely with the C/C++ language specification.  This target may be
    32     *  necessary in situations that take full advantage of the C++ language.
    33     */
    34    metaonly module Win32 inherits microsoft.targets.ITarget {
    35
    36        override readonly config string name                = "Win32";
    37        override readonly config string os                  = "Windows";
    38        override readonly config string suffix              = "86W";
    39        override readonly config string isa                 = "x86";
    40        override readonly config xdc.bld.ITarget.Model model = {
    41            endian: "little"
    42        };
    43
    44        override readonly config string rts = "microsoft.targets.rts";
    45
    46        override config string platform     = "host.platforms.PC";
    47        override config string execExt      = ".exe";
    48
    49        /*!
    50         *  ======== path ========
    51         *  Path components added during execution of commands
    52         */
    53        readonly config string path =
    54            "$(rootDir)/VC/bin;$(rootDir)/Common7/IDE";
    55
    56        /*!
    57         *  ======== SDKPath ========
    58         *
    59         *  A structure type that defines Windows SDK paths to be used for building
    60         *  Windows applications with this target.
    61         *
    62         *  A Windows SDK installation is needed for building programs that use
    63         *  Windows API. However, Windows SDK installations can be anywhere on the
    64         *  disk and also include SDK version numbers (10.0.10586.0 for example).
    65         *  Therefore, these paths can't be derived from the target's rootDir.
    66         *
    67         *  @field(includePath) Absolute path to the Include directory of a Windows
    68         *  SDK installation. Windows SDK is required if the target is used to build
    69         *  executables that use Windows API.
    70         *
    71         *  @field(libraryPath) Absolute path to the Lib directory of a Windows
    72         *  SDK installation.
    73         *
    74         *  @field(libs) List of Windows SDK libraries to be added to the linker
    75         * command line.
    76         */
    77        struct SDKPath {
    78            string includePath[];
    79            string libraryPath[];
    80            string libs;
    81        };
    82
    83        /*!
    84         *  ======== sdkPath ========
    85         *  Location of the header and library files in a Windows SDK installation
    86         *
    87         *  This parameter contains paths to the optional Windows SDK.
    88         *
    89         *  @a(Examples)
    90         *  If the content of `sdkPath`, set in `config.bld` is
    91         *  @p(code)
    92         *      Win32.sdkPath = {
    93         *          includePath: "C:/PROGRA~2/WI3CF2~1/10/Include/10.0.10586.0/ucrt",
    94         *          libraryPath: "C:/PROGRA~2/WI3CF2~1/10/Lib/10.0.10586.0/um/x86";
    95         *          libs: " libucrt.lib setargv.obj oldnames.lib ole32.lib
    96         * oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib
    97         * advapi32.lib shell32.lib comctl32.lib mfc70.lib ucrt.lib"
    98         *      };
    99         *  the contents of `includePath`, `libraryPath` and `libs` are added to
   100         *  appropriate command lines.
   101         *
   102         *  If Windows SDK is not installed or needed, sdkPath's `includePath` and
   103         *  `libraryPath` should be empty.
   104         *  @p
   105         *
   106         */
   107        config SDKPath sdkPath = {
   108            includePath: [],
   109            libraryPath: [],
   110            libs: "ole32.lib oleaut32.lib olepro32.lib uuid.lib kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib comctl32.lib"
   111        };
   112
   113        /*!
   114         *  ======== profiles ========
   115         *  Standard options profiles are overwritten because we can't use 'MTs'
   116         *  and -D_DEBUG=1. Both of them added the debug version of the C runtime
   117         *  library to the manifest.
   118         */
   119        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   120            ["debug", {
   121                compileOpts: {
   122                    copts: "-Z7 -Odi -MTd",
   123                    defs:  "",
   124                },
   125                linkOpts: "-debug msvcrtd.lib vcruntimed.lib ucrtd.lib oldnames.lib",
   126            }],
   127
   128            ["release", {
   129                compileOpts: {
   130                    copts: "-O2 -MT",
   131                    defs:  "",
   132                },
   133                linkOpts: "msvcrt.lib vcruntime.lib ucrt.lib oldnames.lib",
   134            }],
   135        ];
   136
   137        /*!
   138         *  ======== ar ========
   139         *  The archiver command and all required options
   140         *  @p(dlist)
   141         *      -`-nologo`
   142         *          don't display archiver copyright
   143         */
   144        override readonly config xdc.bld.ITarget2.Command ar = {
   145            cmd: "$(rootDir)/VC/bin/lib.exe -nologo",
   146            opts: ""
   147        };
   148
   149        /*!
   150         *  ======== cc ========
   151         *  The compile command and all required options
   152         *  @p(dlist)
   153         *      -`-W3`
   154         *          enable all warnings recommended for production purposes.
   155         *      -`-c`
   156         *          don't link
   157         *      -`-nologo`
   158         *          don't display compiler copyright
   159         *      -`-Zp1`
   160         *          Packs structure members on 1-byte boundry
   161         */
   162        override readonly config xdc.bld.ITarget2.Command cc = {
   163            cmd: "$(rootDir)/VC/bin/cl.exe -nologo -c",
   164            opts: '-Zp1 -W3 -D_DLL -DWINVER=_WIN32_WINNT_WIN7 -D_WIN32_WINNT=_WIN32_WINNT_WIN7 -DWIN32 -DEXPORT=""'
   165        };
   166
   167        /*!
   168         *  ======== asm ========
   169         *  The assemble command and all required options
   170         *  @p(dlist)
   171         *      -`-c`
   172         *          don't link
   173         *      -`-nologo`
   174         *          don't display macro assembler copyright
   175         */
   176        override readonly config xdc.bld.ITarget2.Command asm = {
   177            cmd: "$(rootDir)/VC/bin/ml -c",
   178            opts: "-nologo"
   179        };
   180
   181        /*!
   182         *  ======== lnk ========
   183         *  The linker command and all required options
   184         *  @p(dlist)
   185         *      -`-nologo`
   186         *          Don't display linker copyright
   187         */
   188        override readonly config xdc.bld.ITarget2.Command lnk = {
   189            cmd: "$(rootDir)/VC/bin/link",
   190            opts: "-nologo"
   191        };
   192
   193        /*!
   194         *  ======== ccOpts ========
   195         *  User modifiable default options.
   196         *  @p(dlist)
   197         *      -`-G5` (removed because it is incompatible with VC8.0)
   198         *          Optimizes code to favor the Pentium processor
   199         *      -`-Ob1`
   200         *          Expand only functions marked as inline or, in a C++
   201         *          member function, defined within a class declaration
   202         *      -`-Gs`
   203         *          Probe stack to automatically grow stack as necessary
   204         *      -`-GX` (removed because it is incompatible with VC8.0)
   205         *          Enables synchronous exception handling
   206         *      -`-WL`
   207         *          Write errors/warnings on a single output line
   208         */
   209        override config xdc.bld.ITarget2.Options ccOpts = {
   210            prefix: "-Ob1 -Gs",
   211            suffix: "-Dfar= "
   212        };
   213
   214        /*!
   215         *  ======== lnkOpts ========
   216         *  User modifiable linker options
   217         *  @p(dlist)
   218         *      -`-libpath`
   219         *              directories to search for toolchain specific libraries
   220         *      -`-nodefaultlib`
   221         *              don't search for default libraries when linking; all
   222         *              libraries used must be explicitly named
   223         *      -`-incremental:no`
   224         *              link for execution (no subsequent link will occur)
   225         *      -`-machine:ix86`
   226         *              link for the Intel x86 architecture
   227         *      -`-map:$(XDCCFGDIR)/$@.map`
   228         *              output any link map information to the specified file
   229         *              ($(XDCCFGDIR) is usually package/cfg)
   230         *      -`-pdb:$(XDCCFGDIR)/$@.pdb`
   231         *              output any program debug information to the specified file
   232         *              ($(XDCCFGDIR) is usually package/cfg)
   233         */
   234        override config xdc.bld.ITarget2.Options lnkOpts = {
   235            prefix: "-libpath:$(rootDir)/VC/lib -libpath:$(rootDir)/VC/atlmfc/lib",
   236            suffix: "-map:$(XDCCFGDIR)/$@.map -pdb:$(XDCCFGDIR)/$@.pdb -machine:ix86 -nodefaultlib -incremental:no"
   237        };
   238
   239        /*!
   240         *  ======== includeOpts ========
   241         *  User modifiable include paths
   242         *  @p(dlist)
   243         *      -`-I$(rootDir)/$(compilerDir)/include`
   244         *          include compiler specific headers
   245         */
   246        override config string includeOpts = "-I$(rootDir)/VC/include -I$(rootDir)/VC/atlmfc/include";
   247    }
   248    /*
   249     *  @(#) microsoft.targets; 1, 0, 2, 0,0; 9-28-2018 17:07:52; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   250
   251     */
   252


package microsoft.targets.rts

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== microsoft.targets.rts ========
    16     *  Runtime support package for the x86 targets for use with Microsoft tools.
    17     *
    18     *  This package builds a library of standard XDC system support functions.
    19     *  In particular, it builds several implementations of the
    20     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    21     *  that are part of the xdc.runtime package (to avoid having multiple copies
    22     *  of the same source in different runtime support packages for different
    23     *  ISAs.
    24     */
    25    package microsoft.targets.rts [1,0,0] {
    26    }
    27    /*
    28     *  @(#) microsoft.targets.rts; 1, 0, 0,0; 9-28-2018 17:36:08; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    29
    30     */
    31


interface ti.catalog.ICpuDataSheet

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ICpuDataSheet.xdc ========
    35     */
    36
    37    /*!
    38     *  ======== ICpuDataSheet ========
    39     *  TI-specific extensions to xdc.platform.ICpuDataSheet
    40     */
    41    metaonly interface ICpuDataSheet inherits xdc.platform.ICpuDataSheet {
    42
    43    instance:
    44
    45        /*!
    46         *  ======== isa ========
    47         *  @_nodoc
    48         */
    49        config string isa;
    50    }


package ti.catalog

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog ========
    35     *  TI device specifications
    36     */
    37    package ti.catalog [1,0,0] {
    38        interface ICpuDataSheet;
    39    }


module ti.catalog.arm.AM1705

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM1705.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM1705 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.AM1707

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM1707.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM1707 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.AM1806

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM1806.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM1806 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.AM1808

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM1808.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM1808 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.CortexM3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== CortexM3.xdc ========
    35     */
    36
    37    package ti.catalog.arm;
    38
    39    /*!
    40     *  ======== CortexM3 ========
    41     *  The CortexM3 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     *
    46     */
    47    metaonly module CortexM3 inherits ti.catalog.ICpuDataSheet
    48    {
    49    instance:
    50        override config string cpuCore           = "CM3";
    51        override config string isa               = "v7M";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string] = [];
    62    };


interface ti.catalog.arm.IOMAP2x3x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IOMAP2x3x.xdc ========
    35     *
    36     */
    37
    38    metaonly interface IOMAP2x3x inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "v6";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "2.1";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53            ["SRAM", {
    54                comment:    "On-Chip SRAM",
    55                name:       "SRAM",
    56                base:       0x40200000,
    57                len:        0x0000F800,
    58                space:      "code/data",
    59                access:     "RWX"
    60            }],
    61
    62        ];
    63    }


interface ti.catalog.arm.IOMAP3xxx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IOMAP3xxx.xdc ========
    35     *
    36     */
    37
    38    metaonly interface IOMAP3xxx inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "v7A";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53            ["SRAM", {
    54                comment:    "On-Chip SRAM",
    55                name:       "SRAM",
    56                base:       0x40200000,
    57                len:        0x00010000,
    58                space:      "code/data",
    59                access:     "RWX"
    60            }],
    61
    62        ];
    63    }


interface ti.catalog.arm.ITMS320DA8xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320DA8xx.xdc ========
    35     *
    36     */
    37
    38    metaonly interface ITMS320DA8xx inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "v5T";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53            ["IRAM", {
    54                comment:    "8KB ARM local RAM",
    55                name:       "IRAM",
    56                base:       0xFFFF0000,
    57                len:        0x00002000,
    58                space:      "code/data",
    59                access:     "RWX"
    60            }],
    61            ["L3_CBA_RAM", {
    62                comment:    "128KB ARM/DSP local shared RAM",
    63                name:       "L3_CBA_RAM",
    64                base:       0x80000000,
    65                len:        0x00020000,
    66                space:      "code/data",
    67                access:     "RWX"
    68            }],
    69        ];
    70    }


module ti.catalog.arm.OMAP2430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP2430.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP2430 inherits IOMAP2x3x
    39    {
    40
    41    }


module ti.catalog.arm.OMAP2431

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP2431.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP2431 inherits IOMAP2x3x
    39    {
    40
    41    }


module ti.catalog.arm.OMAP2530

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP2530.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP2530 inherits IOMAP2x3x
    39    {
    40
    41    }


module ti.catalog.arm.OMAP2531

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP2531.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP2531 inherits IOMAP2x3x
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3403

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3403.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3403 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3405

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3405.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3405 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3425

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3425.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3425 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3503

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3503.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3503 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3505

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3505.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3505 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3515

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3515.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3515 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3517

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3517.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3517 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3525

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3525.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3525 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAP3530

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3530.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3530 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.OMAPL108

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAPL108.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAPL108 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.OMAPL118

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAPL118.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAPL118 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.OMAPL137

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAPL137.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAPL137 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.OMAPL138

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAPL138.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAPL138 inherits ITMS320DA8xx
    39    {
    40    }


package ti.catalog.arm

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34    requires ti.catalog.arm.peripherals.timers;
    35
    36    /*!
    37     *  ======== ti.catalog.arm ========
    38     *  Package of devices for the arm family of Arm processors.
    39     *
    40     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    41     *  interface. This interface is used by platforms (modules that implement
    42     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    43     */
    44    package ti.catalog.arm [1,0,1] {
    45        module TMS470R10;
    46        module TMS320C5912;
    47        module TMS320C1030;
    48        module TMS320CDM6446, TMS320CDM6467;
    49        module TMS320DM355, TMS320DM357, TMS320DM365;
    50        module TMS320CDM510;
    51        interface IOMAP2x3x;
    52        module OMAP2430, OMAP2431, OMAP2530, OMAP2531;
    53        interface IOMAP3xxx;
    54        module OMAP3403, OMAP3405, OMAP3503, OMAP3505, OMAP3515, OMAP3517;
    55        module OMAP3425, OMAP3525, TMS320C3430, OMAP3530;
    56        interface ITMS320DA8xx;
    57        module TMS320DA828, TMS320DA830;
    58        module OMAPL137;
    59        module CortexM3;
    60        module TMS570PSF762, TMS570LS20216;
    61        module TMS320DA840, TMS320DA850;
    62        module AM1705, AM1707;
    63        module AM1806, AM1808;
    64        module OMAPL108, OMAPL118, OMAPL138;
    65        module TMS320CDM730, TMS320CDM740;
    66        module TNETV107X;
    67    }


module ti.catalog.arm.TMS320C1030

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C1030 inherits ti.catalog.ICpuDataSheet
    34    {
    35    instance:
    36        override config string cpuCore           = "Arm9";
    37        override config string isa               = "v5T";
    38        override config string cpuCoreRevision   = "1.0";
    39        override config int    minProgUnitSize   = 1;
    40        override config int    minDataUnitSize   = 1;
    41        override config int    dataWordSize      = 4;
    42
    43        /*!
    44         *  ======== memMap ========
    45         *  The memory map returned be getMemoryMap().
    46         */
    47        config xdc.platform.IPlatform.Memory memMap[string] = [];
    48    }


module ti.catalog.arm.TMS320C3430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C3430.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320C3430 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.TMS320C5912

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C5912 inherits ti.catalog.ICpuDataSheet
    34    {
    35    instance:
    36        override config string cpuCore           = "Arm9";
    37        override config string isa               = "v5T";
    38        override config string cpuCoreRevision   = "1.0";
    39        override config int    minProgUnitSize   = 1;
    40        override config int    minDataUnitSize   = 1;
    41        override config int    dataWordSize      = 4;
    42
    43        /*!
    44         *  ======== memMap ========
    45         *  The memory map returned be getMemoryMap().
    46         */
    47        config xdc.platform.IPlatform.Memory memMap[string] = [];
    48    }


module ti.catalog.arm.TMS320CDM510

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM510.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320CDM510 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "Arm9";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53            ["IRAM", {
    54                comment:    "Internal ARM Instruction RAM",
    55                name:       "IRAM",
    56                base:       0x00000004,
    57                len:        0x00007ffc,
    58                space:      "code",
    59                access:     "RWX"
    60            }],
    61
    62            ["DRAM", {
    63                comment:    "Internal ARM Data RAM",
    64                name:       "DRAM",
    65                base:       0x00010004,
    66                len:        0x00007ffc,
    67                space:      "data",
    68                access:     "RW"
    69            }],
    70        ];
    71    }


module ti.catalog.arm.TMS320CDM730

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM730.xdc ========
    35     */
    36
    37    /*!
    38     *  ======== TMS320CDM730 ========
    39     *  The TMS320CDM730 device data sheet module.
    40     *
    41     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    42     *  used by platforms to obtain "data sheet" information about this device.
    43     *
    44     */
    45    metaonly module TMS320CDM730 inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        override config string cpuCore           = "CM3";
    49        override config string isa               = "v7M";
    50        override config string cpuCoreRevision   = "1.0";
    51        override config int    minProgUnitSize   = 1;
    52        override config int    minDataUnitSize   = 1;
    53        override config int    dataWordSize      = 4;
    54
    55        /*!
    56         *  ======== memMap ========
    57         *  The memory map returned be getMemoryMap().
    58         */
    59        config xdc.platform.IPlatform.Memory memMap[string] = [
    60
    61            /*
    62             * AMMU mapped L2 ROM virtual address
    63             * Physical address is 0x55000000
    64             */
    65            ["L2_ROM", {
    66                name: "L2_ROM",
    67                base: 0x00000000,
    68                len:  0x00004000
    69            }],
    70
    71            /*
    72             * AMMU mapped L2 RAM virtual address
    73             * Physical address is 0x55020000
    74         * Size is 256K
    75             */
    76            ["L2_RAM", {
    77                name: "L2_RAM",
    78                base: 0x20000000,
    79                len:  0x00040000
    80            }],
    81        ];
    82    };


module ti.catalog.arm.TMS320CDM740

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM740.xdc ========
    35     */
    36
    37    /*!
    38     *  ======== TMS320CDM740 ========
    39     *  The TMS320CDM740 device data sheet module.
    40     *
    41     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    42     *  used by platforms to obtain "data sheet" information about this device.
    43     *
    44     */
    45    metaonly module TMS320CDM740 inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        override config string cpuCore           = "CM3";
    49        override config string isa               = "v7M";
    50        override config string cpuCoreRevision   = "1.0";
    51        override config int    minProgUnitSize   = 1;
    52        override config int    minDataUnitSize   = 1;
    53        override config int    dataWordSize      = 4;
    54
    55        /*!
    56         *  ======== memMap ========
    57         *  The memory map returned be getMemoryMap().
    58         */
    59        config xdc.platform.IPlatform.Memory memMap[string] = [
    60
    61            /*
    62             * AMMU mapped L2 ROM virtual address
    63             * Physical address is 0x55000000
    64             */
    65            ["L2_ROM", {
    66                name: "L2_ROM",
    67                base: 0x00000000,
    68                len:  0x00004000
    69            }],
    70
    71            /*
    72             * AMMU mapped L2 RAM virtual address
    73             * Physical address is 0x55020000
    74         * Size is 256K
    75             */
    76            ["L2_RAM", {
    77                name: "L2_RAM",
    78                base: 0x20000000,
    79                len:  0x00040000
    80            }],
    81        ];
    82    };


module ti.catalog.arm.TMS320CDM6446

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6446.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320CDM6446 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "Arm9";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53            ["IRAM0", {
    54                comment:    "Internal ARM Instruction RAM0",
    55                name:       "IRAM0",
    56                base:       0x00000000,
    57                len:        0x00002000,
    58                space:      "code",
    59                access:     "RWX"
    60            }],
    61
    62            ["IRAM1", {
    63                comment:    "Internal ARM Instruction RAM1",
    64                name:       "IRAM1",
    65                base:       0x00002000,
    66                len:        0x00002000,
    67                space:      "code",
    68                access:     "RWX"
    69            }],
    70
    71            ["DRAM0", {
    72                comment:    "Internal ARM Data RAM0",
    73                name:       "DRAM0",
    74                base:       0x00008000,
    75                len:        0x00002000,
    76                space:      "data",
    77                access:     "RW"
    78            }],
    79
    80            ["DRAM1", {
    81                comment:    "Internal ARM Data RAM1",
    82                name:       "DRAM1",
    83                base:       0x0000A000,
    84                len:        0x00002000,
    85                space:      "data",
    86                access:     "RW"
    87            }],
    88        ];
    89    }


module ti.catalog.arm.TMS320CDM6467

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6467.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320CDM6467 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "Arm9";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53            ["IRAM0", {
    54                comment:    "Internal ARM Instruction RAM0",
    55                name:       "IRAM0",
    56                base:       0x00000000,
    57                len:        0x00002000,
    58                space:      "code",
    59                access:     "RWX"
    60            }],
    61
    62            ["IRAM1", {
    63                comment:    "Internal ARM Instruction RAM1",
    64                name:       "IRAM1",
    65                base:       0x00002000,
    66                len:        0x00002000,
    67                space:      "code",
    68                access:     "RWX"
    69            }],
    70
    71            ["DRAM0", {
    72                comment:    "Internal ARM Data RAM0",
    73                name:       "DRAM0",
    74                base:       0x00008000,
    75                len:        0x00002000,
    76                space:      "data",
    77                access:     "RW"
    78            }],
    79
    80            ["DRAM1", {
    81                comment:    "Internal ARM Data RAM1",
    82                name:       "DRAM1",
    83                base:       0x0000A000,
    84                len:        0x00002000,
    85                space:      "data",
    86                access:     "RW"
    87            }],
    88        ];
    89    }


module ti.catalog.arm.TMS320DA828

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA828.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DA828 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.TMS320DA830

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA830.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DA830 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.TMS320DA840

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA840.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DA840 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.TMS320DA850

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA850.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DA850 inherits ITMS320DA8xx
    39    {
    40    }


module ti.catalog.arm.TMS320DM355

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM355.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DM355 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "Arm9";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string] = [
    53            ["IRAM0", {
    54                comment:    "Internal ARM Instruction RAM0",
    55                name:       "IRAM0",
    56                base:       0x00000000,
    57                len:        0x00004000,
    58                space:      "code",
    59                access:     "RWX"
    60            }],
    61
    62            ["DRAM1", {
    63                comment:    "Internal ARM Data RAM1",
    64                name:       "DRAM1",
    65                base:       0x00014000,
    66                len:        0x00004000,
    67                space:      "data",
    68                access:     "RW"
    69            }],
    70        ];
    71    }


module ti.catalog.arm.TMS320DM357

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM357.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DM357 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "Arm9";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string] = TMS320DM355.memMap;
    53    }


module ti.catalog.arm.TMS320DM365

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM365.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DM365 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "Arm9";
    42        override config string isa               = "v5T";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string] = TMS320DM355.memMap;
    53    }


module ti.catalog.arm.TMS470R10

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS470R10.xdc ========
    35     */
    36
    37    package ti.catalog.arm;
    38
    39    /*!
    40     *  ======== TMS470R10 ========
    41     *  The C470 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     *
    46     *  Warning: The data for this module comes from the linker command file
    47     *  shipped with the TI 470 tools and does NOT come from any published data
    48     *  sheet.
    49     */
    50    metaonly module TMS470R10 inherits ti.catalog.ICpuDataSheet
    51    {
    52    instance:
    53        override config string   cpuCore        = "470";
    54        override config string   isa            = "v4T";
    55
    56        override config int     minProgUnitSize = 1;
    57        override config int     minDataUnitSize = 1;
    58        override config int     dataWordSize    = 4;
    59
    60        override config string   cpuCoreRevision = "1.0";
    61
    62        /*!
    63         *  ======== memMap ========
    64         *  The default memory map for this device
    65         */
    66        config xdc.platform.IPlatform.Memory memMap[string]  = [
    67            ["P_MEM", {
    68                comment: "Program Memory (ROM)",
    69                name: "P_MEM",
    70                base: 0x00000000,
    71                len: 0x00030000,
    72                space: "code"
    73            }],
    74
    75            ["D_MEM", {
    76                comment: "Data Memory (RAM)",
    77                name: "D_MEM",
    78                base: 0x00030000,
    79                len: 0x00050000,
    80                space: "data"
    81            }],
    82        ];
    83    };


module ti.catalog.arm.TMS570LS20216

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS570LS20216.xdc ========
    35     */
    36    package ti.catalog.arm;
    37
    38    /*!
    39     *  ======== TMS570LS20216 ========
    40     *  The C470 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     *  Warning: The data for this module comes from the linker command file
    46     *  shipped with the TI 470 tools and does NOT come from any published data
    47     *  sheet.
    48     */
    49    metaonly module TMS570LS20216 inherits ti.catalog.ICpuDataSheet
    50    {
    51    instance:
    52        override config string cpuCore           = "R4";
    53        override config string isa               = "v7R";
    54        override config string cpuCoreRevision   = "1.0";
    55        override config int    minProgUnitSize   = 1;
    56        override config int    minDataUnitSize   = 1;
    57        override config int    dataWordSize      = 4;
    58
    59        /*!
    60         *  ======== memMap ========
    61         *  The default memory map for this device
    62         */
    63        config xdc.platform.IPlatform.Memory memMap[string]  = [
    64            ["LO_FLASH", {
    65                name:       "FLASH",
    66                base:       0x00000000,
    67                len:        0x00200000,
    68                space:      "code",
    69                access:     "RX"
    70            }],
    71            ["HI_IRAM", {
    72                name:       "IRAM",
    73                base:       0x08000000,
    74                len:        0x00028000,
    75                space:      "code/data",
    76                access:     "RWX"
    77            }],
    78            ["HI_FLASH", {
    79                name:       "FLASH",
    80                base:       0x20000000,
    81                len:        0x00080000,
    82                space:      "code",
    83                access:     "RX"
    84            }],
    85            ["LO_IRAM", {
    86                name:       "IRAM",
    87                base:       0x00000000,
    88                len:        0x00028000,
    89                space:      "code/data",
    90                access:     "RWX"
    91            }],
    92        ];
    93    };


module ti.catalog.arm.TMS570PSF762

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS570PSF762.xdc ========
    35     */
    36    package ti.catalog.arm;
    37
    38    /*!
    39     *  ======== TMS570PSF762 ========
    40     *  The C470 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     *  Warning: The data for this module comes from the linker command file
    46     *  shipped with the TI 470 tools and does NOT come from any published data
    47     *  sheet.
    48     */
    49    metaonly module TMS570PSF762 inherits ti.catalog.ICpuDataSheet
    50    {
    51
    52    instance:
    53        override config string cpuCore           = "R4";
    54        override config string isa               = "v7R";
    55        override config string cpuCoreRevision   = "1.0";
    56        override config int    minProgUnitSize   = 1;
    57        override config int    minDataUnitSize   = 1;
    58        override config int    dataWordSize      = 4;
    59
    60        /*!
    61         *  ======== memMap ========
    62         *  The default memory map for this device
    63         */
    64        config xdc.platform.IPlatform.Memory memMap[string]  = [
    65            ["LO_FLASH", {
    66                name:       "FLASH",
    67                base:       0x00000000,
    68                len:        0x00080000,
    69                space:      "code",
    70                access:     "RX"
    71            }],
    72            ["HI_IRAM", {
    73                name:       "IRAM",
    74                base:       0x08000000,
    75                len:        0x0000A000,
    76                space:      "code/data",
    77                access:     "RWX"
    78            }],
    79            ["HI_FLASH", {
    80                name:       "FLASH",
    81                base:       0x20000000,
    82                len:        0x00080000,
    83                space:      "code",
    84                access:     "RX"
    85            }],
    86            ["LO_IRAM", {
    87                name:       "IRAM",
    88                base:       0x00000000,
    89                len:        0x0000A000,
    90                space:      "code/data",
    91                access:     "RWX"
    92            }],
    93        ];
    94    };


module ti.catalog.arm.TNETV107X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TNETV107X.xdc ========
    35     *
    36     */
    37
    38    metaonly module TNETV107X inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "Arm11";
    42        override config string isa               = "v6";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        config xdc.platform.IPlatform.Memory memMap[string] = [
    49            ["SRAM", {
    50                comment:    "On-Chip SRAM",
    51                name:       "SRAM",
    52                base:       0x20000000,
    53                len:        0x00010000,
    54                space:      "code/data",
    55                access:     "RWX"
    56            }],
    57        ];
    58    }


module ti.catalog.arm.cortexa15.C66AK2E05

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== C66AK2E05.xdc ========
    35     */
    36
    37    metaonly module C66AK2E05 inherits ITCI663X
    38    {
    39    }


module ti.catalog.arm.cortexa15.DRA7XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== DRA7XX.xdc ========
    35     *
    36     */
    37
    38    metaonly module DRA7XX inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    42
    43        override config string cpuCore           = "v7A15";
    44        override config string isa               = "v7A15";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The memory map returned be getMemoryMap().
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["SRAM", {
    56                comment:    "On-Chip SRAM",
    57                name:       "SRAM",
    58                base:       0x402F0000,
    59                len:        0x00010000,
    60                space:      "code/data",
    61                access:     "RWX"
    62            }],
    63
    64            /*
    65             * On-chip RAM memory
    66             */
    67            ["OCMC_RAM1", {
    68                comment:    "OCMC (On-chip RAM) Bank 1 (512KB)",
    69                name: "OCMC_RAM1",
    70                base: 0x40300000,
    71                len:  0x00080000
    72            }],
    73
    74            /*
    75             * On-chip RAM memory
    76             */
    77            ["OCMC_RAM2", {
    78                comment:    "OCMC (On-chip RAM) Bank 2 (1MB)",
    79                name: "OCMC_RAM2",
    80                base: 0x40400000,
    81                len:  0x00100000
    82            }],
    83
    84            /*
    85             * On-chip RAM memory
    86             */
    87            ["OCMC_RAM3", {
    88                comment:    "OCMC (On-chip RAM) Bank 3 (1MB)",
    89                name: "OCMC_RAM3",
    90                base: 0x40500000,
    91                len:  0x00100000
    92            }]
    93        ];
    94    }


interface ti.catalog.arm.cortexa15.ITCI663X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITCI663X.xdc ========
    35     */
    36
    37    metaonly interface ITCI663X inherits ti.catalog.ICpuDataSheet
    38    {
    39    instance:
    40        override config string cpuCore           = "v7A15";
    41        override config string isa               = "v7A15";
    42        override config string cpuCoreRevision   = "1.0";
    43        override config int    minProgUnitSize   = 1;
    44        override config int    minDataUnitSize   = 1;
    45        override config int    dataWordSize      = 4;
    46
    47        /*!
    48         *  ======== memMap ========
    49         *  The memory map returned be getMemoryMap().
    50         */
    51        config xdc.platform.IPlatform.Memory memMap[string]  = [
    52        ];
    53    }


module ti.catalog.arm.cortexa15.OMAP5430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP5430.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP5430 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    42
    43        override config string cpuCore           = "v7A15";
    44        override config string isa               = "v7A15";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The memory map returned be getMemoryMap().
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["SRAM", {
    56                comment:    "On-Chip SRAM",
    57                name:       "SRAM",
    58                base:       0x402F0000,
    59                len:        0x00008000,
    60                space:      "code/data",
    61                access:     "RWX"
    62            }],
    63        ];
    64    }


package ti.catalog.arm.cortexa15

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34    requires ti.catalog.peripherals.hdvicp2;
    35
    36    /*!
    37     *  ======== ti.catalog.arm.cortexa15  ========
    38     *  Package of devices for the arm Cortex A15 family of Arm processors.
    39     *
    40     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    41     *  interface. This interface is used by platforms (modules that implement
    42     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    43     */
    44    package ti.catalog.arm.cortexa15 [1,0,0] {
    45        interface ITCI663X;
    46        module OMAP5430;
    47        module Vayu;
    48        module DRA7XX;
    49        module C66AK2E05;
    50        module TCI6630K2L;
    51        module TCI6636K2H;
    52        module TCI6638K2K;
    53        module TCI66AK2G02;
    54    }


module ti.catalog.arm.cortexa15.TCI66AK2G02

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TCI66AK2G02.xdc ========
    35     *
    36     */
    37
    38    metaonly module TCI66AK2G02 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "v7A15";
    42        override config string isa               = "v7A15";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53        ];
    54    }


module ti.catalog.arm.cortexa15.TCI6630K2L

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TCI6630K2L.xdc ========
    35     */
    36
    37    metaonly module TCI6630K2L inherits ITCI663X
    38    {
    39    }


module ti.catalog.arm.cortexa15.TCI6636K2H

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TCI6636K2H.xdc ========
    35     *
    36     */
    37
    38    metaonly module TCI6636K2H inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "v7A15";
    42        override config string isa               = "v7A15";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53        ];
    54    }


module ti.catalog.arm.cortexa15.TCI6638K2K

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TCI6638K2K.xdc ========
    35     */
    36
    37    metaonly module TCI6638K2K inherits ITCI663X
    38    {
    39    }


module ti.catalog.arm.cortexa15.Vayu

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP5430.xdc ========
    35     *
    36     */
    37
    38    metaonly module Vayu inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    42
    43        override config string cpuCore           = "v7A15";
    44        override config string isa               = "v7A15";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The memory map returned be getMemoryMap().
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["SRAM", {
    56                comment:    "On-Chip SRAM",
    57                name:       "SRAM",
    58                base:       0x402F0000,
    59                len:        0x00008000,
    60                space:      "code/data",
    61                access:     "RWX"
    62            }],
    63        ];
    64    }


module ti.catalog.arm.cortexa53.CortexA

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CortexA.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all CortexA devices.
    38     */
    39
    40    metaonly module CortexA inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string  cpuCore           = "A53";
    44        override config string  isa               = "v8A";
    45        override config string  cpuCoreRevision   = "1.0";
    46        override config int     minProgUnitSize   = 1;
    47        override config int     minDataUnitSize   = 1;
    48        override config int     dataWordSize      = 4;
    49    }


package ti.catalog.arm.cortexa53

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== ti.catalog.arm.cortexa53  ========
    37     *  Package of devices for the Cortex-A53 family of ARM processors.
    38     *
    39     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    40     *  interface. This interface is used by platforms (modules that implement
    41     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    42     */
    43    package ti.catalog.arm.cortexa53 [1,0,0] {
    44        module CortexA;
    45    }


module ti.catalog.arm.cortexa8.AM3358

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM3359.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM3358 inherits IAM335X
    39    {
    40    };


module ti.catalog.arm.cortexa8.AM3359

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM3359.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM3359 inherits IAM335X
    39    {
    40    };


module ti.catalog.arm.cortexa8.AM3505

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM3505.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM3505 inherits IOMAP3xxx
    39    {
    40    }


module ti.catalog.arm.cortexa8.AM3517

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM3517.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM3517 inherits IOMAP3xxx
    39    {
    40    }


module ti.catalog.arm.cortexa8.DM37XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== DM37XX.xdc ========
    35     */
    36
    37    metaonly module DM37XX inherits IOMAP3xxx
    38    {
    39    }


interface ti.catalog.arm.cortexa8.IAM335X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IAM335x.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== IAM335x ========
    40     *  An interface implemented by all TI8168 devices
    41     *
    42     *  This interface is defined to factor common data about all TI8168 type devices
    43     *  into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface IAM335X inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp1;
    50        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp2;
    51
    52        override config string cpuCore           = "v7A";
    53        override config string isa               = "v7A";
    54        override config string cpuCoreRevision   = "1.0";
    55        override config int    minProgUnitSize   = 1;
    56        override config int    minDataUnitSize   = 1;
    57        override config int    dataWordSize      = 4;
    58
    59        /*!
    60         *  ======== memMap ========
    61         *  The memory map returned be getMemoryMap().
    62         */
    63        config xdc.platform.IPlatform.Memory memMap[string]  = [
    64            ["SRAM_LO", {
    65                comment:    "Secure SRAM locked",
    66                name:       "SRAM_LO",
    67                base:       0x402F0000,
    68                len:        0x00000400,
    69                space:      "code/data",
    70                access:     "RWX"
    71            }],
    72
    73            ["SRAM_HI", {
    74                comment:    "Secure SRAM open",
    75                name:       "SRAM_HI",
    76                base:       0x402F0400,
    77                len:        0x0000FC00,
    78                space:      "code/data",
    79                access:     "RWX"
    80            }],
    81
    82            /*
    83             * OCMC (On-chip RAM)
    84             * Size is 64K
    85             */
    86            ["OCMC", {
    87                name:       "OCMC_SRAM",
    88                base:       0x40300000,
    89                len:        0x00010000,
    90                space:      "code/data",
    91                access:     "RWX"
    92            }],
    93        ];
    94    }


interface ti.catalog.arm.cortexa8.IOMAP3xxx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IOMAP3xxx.xdc ========
    35     *
    36     */
    37
    38    metaonly interface IOMAP3xxx inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "v7A";
    42        override config string isa               = "v7A";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53            ["SRAM", {
    54                comment:    "On-Chip SRAM",
    55                name:       "SRAM",
    56                base:       0x40200000,
    57                len:        0x00010000,
    58                space:      "code/data",
    59                access:     "RWX"
    60            }],
    61
    62        ];
    63    }


interface ti.catalog.arm.cortexa8.ITI811X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI811X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI811X ========
    40     *  An interface implemented by all TI811X devices
    41     *
    42     *  This interface is defined to factor common data about all TI811X type
    43     *  devices into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI811X inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49
    50        override config string cpuCore           = "v7A";
    51        override config string isa               = "v7A";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string]  = [
    62            ["SRAM", {
    63                comment:    "On-Chip SRAM",
    64                name:       "SRAM",
    65                base:       0x402F0000,
    66                len:        0x10000,
    67                space:      "code/data",
    68                access:     "RWX"
    69            }],
    70
    71            /*
    72             * OCMC (On-chip RAM)
    73             * Size is 128K
    74             */
    75            ["OCMC", {
    76                name: "OCMC",
    77                base: 0x40300000,
    78                len:  0x20000
    79            }],
    80        ];
    81    }


interface ti.catalog.arm.cortexa8.ITI813X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI813X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI813X ========
    40     *  An interface implemented by all TI813X devices
    41     *
    42     *  This interface is defined to factor common data about all TI813X type
    43     *  devices into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI813X inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49
    50        override config string cpuCore           = "v7A";
    51        override config string isa               = "v7A";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string]  = [
    62            ["SRAM", {
    63                comment:    "On-Chip SRAM",
    64                name:       "SRAM",
    65                base:       0x402F0000,
    66                len:        0x10000,
    67                space:      "code/data",
    68                access:     "RWX"
    69            }],
    70
    71            /*
    72             * OCMC (On-chip RAM)
    73             * Size is 128K
    74             */
    75            ["OCMC", {
    76                name: "OCMC",
    77                base: 0x40300000,
    78                len:  0x20000
    79            }],
    80        ];
    81    }


interface ti.catalog.arm.cortexa8.ITI8148

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI8148.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI8148 ========
    40     *  An interface implemented by all TI8148 devices
    41     *
    42     *  This interface is defined to factor common data about all TI8148 type devices
    43     *  into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI8148 inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49
    50        override config string cpuCore           = "v7A";
    51        override config string isa               = "v7A";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string]  = [
    62            ["SRAM", {
    63                comment:    "On-Chip SRAM",
    64                name:       "SRAM",
    65                base:       0x402F0000,
    66                len:        0x10000,
    67                space:      "code/data",
    68                access:     "RWX"
    69            }],
    70
    71            /*
    72             * OCMC (On-chip RAM)
    73             * Size is 128K
    74             */
    75            ["OCMC", {
    76                name: "OCMC",
    77                base: 0x40300000,
    78                len:  0x20000
    79            }],
    80        ];
    81    }


interface ti.catalog.arm.cortexa8.ITI8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI8168.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI8168 ========
    40     *  An interface implemented by all TI8168 devices
    41     *
    42     *  This interface is defined to factor common data about all TI8168 type devices
    43     *  into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI8168 inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp1;
    50        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp2;
    51
    52        override config string cpuCore           = "v7A";
    53        override config string isa               = "v7A";
    54        override config string cpuCoreRevision   = "1.0";
    55        override config int    minProgUnitSize   = 1;
    56        override config int    minDataUnitSize   = 1;
    57        override config int    dataWordSize      = 4;
    58
    59        /*!
    60         *  ======== memMap ========
    61         *  The memory map returned be getMemoryMap().
    62         */
    63        config xdc.platform.IPlatform.Memory memMap[string]  = [
    64            ["SRAM", {
    65                comment:    "On-Chip SRAM",
    66                name:       "SRAM",
    67                base:       0x402F0000,
    68                len:        0x10000,
    69                space:      "code/data",
    70                access:     "RWX"
    71            }],
    72
    73            /*
    74             * OCMC (On-chip RAM) Bank 0
    75             * Size is 256K
    76             */
    77            ["OCMC_0", {
    78                name: "OCMC_0",
    79                base: 0x40300000,
    80                len:  0x40000
    81            }],
    82
    83            /*
    84             * OCMC (On-chip RAM) Bank 1
    85             * Size is 256K
    86             */
    87            ["OCMC_1", {
    88                name: "OCMC_1",
    89                base: 0x40400000,
    90                len:  0x40000
    91            }],
    92
    93        ];
    94    }


module ti.catalog.arm.cortexa8.OMAP3403

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3403.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3403 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3405

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3405.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3405 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3425

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3425.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3425 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3503

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3503.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3503 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3505

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3505.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3505 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3515

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3515.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3515 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3517

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3517.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3517 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3525

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3525.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3525 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.OMAP3530

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3530.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP3530 inherits IOMAP3xxx
    39    {
    40
    41    }


package ti.catalog.arm.cortexa8

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34    requires ti.catalog.peripherals.hdvicp2;
    35
    36    /*!
    37     *  ======== ti.catalog.arm.cortexa8 ========
    38     *  Package of devices for the Cortex A8 family of Arm processors.
    39     *
    40     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    41     *  interface. This interface is used by platforms (modules that implement
    42     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    43     */
    44    package ti.catalog.arm.cortexa8 [1,0,0] {
    45        interface IOMAP3xxx;
    46        module OMAP3403, OMAP3405, OMAP3503, OMAP3505, OMAP3515, OMAP3517;
    47        module OMAP3425, OMAP3525, TMS320C3430, OMAP3530, DM37XX;
    48
    49        interface ITI8168;
    50        module TMS320TI816X;
    51        module TMS320DM8168;
    52        module TMS320C6A8168;
    53
    54        interface ITI8148;
    55        module TMS320TI814X;
    56        module TMS320DM8148;
    57
    58        interface IAM335X;
    59        module AM3358, AM3359;
    60
    61        module AM3505, AM3517;
    62
    63        interface ITI813X;
    64        module TMS320TI813X;
    65
    66        interface ITI811X;
    67        module TMS320TI811X;
    68
    69        module TMS320C6A8149;
    70    }


module ti.catalog.arm.cortexa8.TMS320C6A8149

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6A8149.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320C6A8149 inherits ITI8148
    39    {
    40    };


module ti.catalog.arm.cortexa8.TMS320C6A8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6A8168.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320C6A8168 inherits ITI8168
    39    {
    40    };


module ti.catalog.arm.cortexa8.TMS320C3430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C3430.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320C3430 inherits IOMAP3xxx
    39    {
    40
    41    }


module ti.catalog.arm.cortexa8.TMS320DM8148

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM8148.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DM8148 inherits ITI8148
    39    {
    40    };


module ti.catalog.arm.cortexa8.TMS320DM8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM8168.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320DM8168 inherits ITI8168
    39    {
    40    };


module ti.catalog.arm.cortexa8.TMS320TI811X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI811X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TI811X ========
    40     */
    41    metaonly module TMS320TI811X inherits ITI811X
    42    {
    43    };


module ti.catalog.arm.cortexa8.TMS320TI813X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI813X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TI813X ========
    40     */
    41    metaonly module TMS320TI813X inherits ITI813X
    42    {
    43    };


module ti.catalog.arm.cortexa8.TMS320TI814X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI814X.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320TI814X inherits ITI8148
    39    {
    40    };


module ti.catalog.arm.cortexa8.TMS320TI816X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI816X.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320TI816X inherits ITI8168
    39    {
    40    };


module ti.catalog.arm.cortexa9.AM437X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== AM437X.xdc ========
    35     *
    36     */
    37
    38    metaonly module AM437X inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        override config string cpuCore           = "v7A9";
    42        override config string isa               = "v7A9";
    43        override config string cpuCoreRevision   = "1.0";
    44        override config int    minProgUnitSize   = 1;
    45        override config int    minDataUnitSize   = 1;
    46        override config int    dataWordSize      = 4;
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The memory map returned be getMemoryMap().
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53                [
    54                "OCMCRAM", {
    55                                comment:    "On-Chip SRAM",
    56                                name:       "OCMCRAM",
    57                                base:       0x40300000,
    58                                len:        0x00020000,
    59                                space:      "code/data",
    60                                access:     "RWX"
    61                            }
    62            ],
    63                [
    64                "L2SRAM", {
    65                                comment:    "L2 Cache SRAM",
    66                                name:       "L2SRAM",
    67                                base:       0x40500000,
    68                                len:        0x00040000,
    69                                space:      "code/data",
    70                                access:     "RWX"
    71                            }
    72            ]
    73        ];
    74    }


module ti.catalog.arm.cortexa9.OMAP4430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP4430.xdc ========
    35     *
    36     */
    37
    38    metaonly module OMAP4430 inherits ti.catalog.ICpuDataSheet
    39    {
    40    instance:
    41        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    42
    43        override config string cpuCore           = "v7A9";
    44        override config string isa               = "v7A9";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The memory map returned be getMemoryMap().
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["SRAM", {
    56                comment:    "On-Chip SRAM",
    57                name:       "SRAM",
    58                base:       0x402F0000,
    59                len:        0x00008000,
    60                space:      "code/data",
    61                access:     "RWX"
    62            }],
    63        ];
    64    }


package ti.catalog.arm.cortexa9

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34    requires ti.catalog.peripherals.hdvicp2;
    35
    36    /*!
    37     *  ======== ti.catalog.arm.cortexa9  ========
    38     *  Package of devices for the arm Cortex A9 family of Arm processors.
    39     *
    40     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    41     *  interface. This interface is used by platforms (modules that implement
    42     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    43     */
    44    package ti.catalog.arm.cortexa9 [1,0,0] {
    45        module OMAP4430;
    46        module AM437X;
    47    }


module ti.catalog.arm.cortexm3.CC13xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CC13xx.xdc ========
    35     *  Generic CC13xx Cpu definition
    36     *
    37     *  This definition represents all CC13xx devices.
    38     */
    39
    40    metaonly module CC13xx inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM3";
    44        override config string   isa            = "v7M";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm3.CC26xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CC26xx.xdc ========
    35     *  Generic CC26xx Cpu definition
    36     *
    37     *  This definition represents all CC26xx devices.
    38     */
    39
    40    metaonly module CC26xx inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM3";
    44        override config string   isa            = "v7M";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm3.CortexM3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== CortexM3.xdc ========
    35     */
    36
    37    package ti.catalog.arm.cortexm3;
    38
    39    /*!
    40     *  ======== CortexM3 ========
    41     *  The CortexM3 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     *
    46     */
    47    metaonly module CortexM3 inherits ti.catalog.ICpuDataSheet
    48    {
    49    instance:
    50        override config string cpuCore           = "CM3";
    51        override config string isa               = "v7M";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string] = [];
    62    };


module ti.catalog.arm.cortexm3.CortexM

     1    /*
     2     * Copyright (c) 2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CortexM.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all CortexM devices.
    38     */
    39
    40    metaonly module CortexM inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string  cpuCore           = "M3";
    44        override config string  isa               = "v7M";
    45        override config string  cpuCoreRevision   = "1.0";
    46        override config int     minProgUnitSize   = 1;
    47        override config int     minDataUnitSize   = 1;
    48        override config int     dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm3.F28M35x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== F28M35x.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== F28M35x.xdc ========
    40     *  The F28M35x device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46
    47    metaonly module F28M35x inherits ti.catalog.ICpuDataSheet
    48    {
    49
    50    instance:
    51        override config string cpuCore           = "CM3";
    52        override config string isa               = "v7M";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        config ti.catalog.arm.peripherals.timers.Timer.Instance timer0;
    59        config ti.catalog.arm.peripherals.timers.Timer.Instance timer1;
    60        config ti.catalog.arm.peripherals.timers.Timer.Instance timer2;
    61        config ti.catalog.arm.peripherals.timers.Timer.Instance timer3;
    62
    63        /*!
    64         *  ======== memMap ========
    65         *  The memory map returned by getMemoryMap().
    66         */
    67        config xdc.platform.IPlatform.Memory memMap[string] = [
    68            ["BOOTROM", {
    69                comment: "On-Chip Boot ROM",
    70                name: "BOOTROM",
    71                base: 0x0,
    72                len:  0x10000,
    73                space: "code",
    74                access: "RX"
    75            }],
    76
    77            ["FLASH_BOOT", {
    78                comment: "Branch for boot from Flash",
    79                name: "FLASH_BOOT",
    80                base: 0x200030,
    81                len:  0x4,
    82                space: "code/data",
    83                access: "RWX"
    84            }],
    85
    86            ["FLASH", {
    87                comment: "512KB Flash memory",
    88                name: "FLASH",
    89                base: 0x200034,
    90                len:  0x7FFC8,
    91                space: "code/data",
    92                access: "RWX"
    93            }],
    94
    95            ["OTP", {
    96                comment: "4KB OTP memory",
    97                name: "OTP",
    98                base: 0x680000,
    99                len:  0x1000,
   100                space: "code",
   101                access: "RWX"
   102            }],
   103
   104            ["C03SRAM", {
   105                comment: "32KB On-Chip RAM Memory",
   106                name: "C03SRAM",
   107                base: 0x20000000,
   108                len:  0x8000,
   109                space: "code/data",
   110                access: "RWX"
   111            }],
   112
   113            ["S07SHRAM", {
   114                comment: "64KB On-Chip Shared RAM Memory",
   115                name: "S07SHRAM",
   116                base: 0x20008000,
   117                len:  0x10000,
   118                space: "code/data",
   119                access: "RWX"
   120            }],
   121
   122            ["CTOMMSGRAM", {
   123                comment: "C28 to M3 MSG RAM Memory",
   124                name: "CTOMMSGRAM",
   125                base: 0x2007F000,
   126                len:  0x800,
   127                space: "data",
   128                access: "R"
   129            }],
   130
   131            ["MTOCMSGRAM", {
   132                comment: "M3 to C28 MSG RAM Memory",
   133                name: "MTOCMSGRAM",
   134                base: 0x2007F800,
   135                len:  0x800,
   136                space: "data",
   137                access: "RW"
   138            }],
   139        ];
   140    };


interface ti.catalog.arm.cortexm3.ITI811X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI811X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI811X ========
    40     *  An interface implemented by all TI811X devices
    41     *
    42     *  This interface is defined to factor common data about all TI811X type
    43     *  devices into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI811X inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49
    50        override config string cpuCore           = "CM3";
    51        override config string isa               = "v7M";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string] = [
    62
    63            /*
    64             * AMMU mapped L2 BOOT virtual address
    65             * Physical address is 0x5502_0000, virt is 0x00000000
    66             * Reset vectors and other boot code is placed here.
    67             *
    68             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    69             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    70             * The remaining 240K is placed in the L2_RAM definition.
    71             */
    72            ["L2_BOOT", {
    73                name: "L2_BOOT",
    74                base: 0x00000000,
    75                len:  0x4000
    76            }],
    77
    78            /*
    79             * AMMU mapped L2 RAM virtual address
    80             * Physical address is 0x5502_4000, virt is 0x2000_4000
    81             *
    82             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    83             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    84             * The remaining 240K is placed in the L2_RAM definition.
    85             */
    86            ["L2_RAM", {
    87                name: "L2_RAM",
    88                base: 0x20004000,
    89                len:  0x3C000
    90            }],
    91
    92            /*
    93             * OCMC (On-chip RAM)
    94             * Physical address is 0x40300000
    95             * Size is 128K
    96             */
    97            ["OCMC", {
    98                name: "OCMC",
    99                base: 0x00300000,
   100                len:  0x20000
   101            }],
   102        ];
   103    };


interface ti.catalog.arm.cortexm3.ITI813X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI813X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI813X ========
    40     *  An interface implemented by all TI813X devices
    41     *
    42     *  This interface is defined to factor common data about all TI813X
    43     *  type devices into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI813X inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49
    50        override config string cpuCore           = "CM3";
    51        override config string isa               = "v7M";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string] = [
    62
    63            /*
    64             * AMMU mapped L2 BOOT virtual address
    65             * Physical address is 0x5502_0000, virt is 0x00000000
    66             * Reset vectors and other boot code is placed here.
    67             *
    68             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    69             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    70             * The remaining 240K is placed in the L2_RAM definition.
    71             */
    72            ["L2_BOOT", {
    73                name: "L2_BOOT",
    74                base: 0x00000000,
    75                len:  0x4000
    76            }],
    77
    78            /*
    79             * AMMU mapped L2 RAM virtual address
    80             * Physical address is 0x5502_4000, virt is 0x2000_4000
    81             *
    82             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    83             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    84             * The remaining 240K is placed in the L2_RAM definition.
    85             */
    86            ["L2_RAM", {
    87                name: "L2_RAM",
    88                base: 0x20004000,
    89                len:  0x3C000
    90            }],
    91
    92            /*
    93             * OCMC (On-chip RAM)
    94             * Physical address is 0x40300000
    95             * Size is 128K
    96             */
    97            ["OCMC", {
    98                name: "OCMC",
    99                base: 0x00300000,
   100                len:  0x20000
   101            }],
   102        ];
   103    };


interface ti.catalog.arm.cortexm3.ITI8148

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI8148.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI8148 ========
    40     *  An interface implemented by all TI8148 devices
    41     *
    42     *  This interface is defined to factor common data about all TI8148 type devices
    43     *  into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI8148 inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49
    50        override config string cpuCore           = "CM3";
    51        override config string isa               = "v7M";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string] = [
    62
    63            /*
    64             * AMMU mapped L2 BOOT virtual address
    65             * Physical address is 0x5502_0000, virt is 0x00000000
    66             * Reset vectors and other boot code is placed here.
    67             *
    68             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    69             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    70             * The remaining 240K is placed in the L2_RAM definition.
    71             */
    72            ["L2_BOOT", {
    73                name: "L2_BOOT",
    74                base: 0x00000000,
    75                len:  0x4000
    76            }],
    77
    78            /*
    79             * AMMU mapped L2 RAM virtual address
    80             * Physical address is 0x5502_4000, virt is 0x2000_4000
    81             *
    82             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    83             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    84             * The remaining 240K is placed in the L2_RAM definition.
    85             */
    86            ["L2_RAM", {
    87                name: "L2_RAM",
    88                base: 0x20004000,
    89                len:  0x3C000
    90            }],
    91
    92            /*
    93             * OCMC (On-chip RAM)
    94             * Physical address is 0x40300000
    95             * Size is 128K
    96             */
    97            ["OCMC", {
    98                name: "OCMC",
    99                base: 0x00300000,
   100                len:  0x20000
   101            }],
   102        ];
   103    };


interface ti.catalog.arm.cortexm3.ITI8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI8168.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITI8168 ========
    40     *  An interface implemented by all TI8168 devices
    41     *
    42     *  This interface is defined to factor common data about all TI8168 type devices
    43     *  into a single place; they all have the same internal memory.
    44     */
    45    metaonly interface ITI8168 inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    49        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp1;
    50        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp2;
    51
    52        override config string cpuCore           = "CM3";
    53        override config string isa               = "v7M";
    54        override config string cpuCoreRevision   = "1.0";
    55        override config int    minProgUnitSize   = 1;
    56        override config int    minDataUnitSize   = 1;
    57        override config int    dataWordSize      = 4;
    58
    59        /*!
    60         *  ======== memMap ========
    61         *  The memory map returned be getMemoryMap().
    62         */
    63        config xdc.platform.IPlatform.Memory memMap[string] = [
    64
    65            /*
    66             * AMMU mapped L2 BOOT virtual address
    67             * Physical address is 0x5502_0000, virt is 0x00000000
    68             * Reset vectors and other boot code is placed here.
    69             *
    70             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    71             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    72             * The remaining 240K is placed in the L2_RAM definition.
    73             */
    74            ["L2_BOOT", {
    75                name: "L2_BOOT",
    76                base: 0x00000000,
    77                len:  0x4000
    78            }],
    79
    80            /*
    81             * AMMU mapped L2 RAM virtual address
    82             * Physical address is 0x5502_4000, virt is 0x2000_4000
    83             *
    84             * Note that actual L2 RAM is 256K starting at 0x5502_0000.
    85             * The first 16K is reserved for reset vectors (i.e. L2_BOOT).
    86             * The remaining 240K is placed in the L2_RAM definition.
    87             */
    88            ["L2_RAM", {
    89                name: "L2_RAM",
    90                base: 0x20004000,
    91                len:  0x3C000
    92            }],
    93
    94            /*
    95             * OCMC (On-chip RAM) Bank 0
    96             * Physical address is 0x40300000
    97             * Size is 256K
    98             */
    99            ["OCMC_0", {
   100                name: "OCMC_0",
   101                base: 0x00300000,
   102                len:  0x40000
   103            }],
   104
   105            /*
   106             * OCMC (On-chip RAM) Bank 1
   107             * Physical address is 0x40400000
   108             * Size is 256K
   109             */
   110            ["OCMC_1", {
   111                name: "OCMC_1",
   112                base: 0x00400000,
   113                len:  0x40000
   114            }],
   115        ];
   116    };


module ti.catalog.arm.cortexm3.OMAP4430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP4430.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== OMAP4430 ========
    40     *  The OMAP4430 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module OMAP4430 inherits ti.catalog.ICpuDataSheet
    47    {
    48    instance:
    49        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    50
    51        override config string cpuCore           = "CM3";
    52        override config string isa               = "v7M";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        /*!
    59         *  ======== memMap ========
    60         *  The memory map returned be getMemoryMap().
    61         */
    62        config xdc.platform.IPlatform.Memory memMap[string] = [
    63
    64            /*
    65             * AMMU mapped L2 ROM virtual address
    66             * Physical address is 0x55000000
    67             */
    68            ["L2_ROM", {
    69                name: "L2_ROM",
    70                base: 0x00000000,
    71                len:  0x00004000
    72            }],
    73
    74            /*
    75             * AMMU mapped L2 RAM virtual address
    76             * Physical address is 0x55020000
    77             */
    78            ["L2_RAM", {
    79                name: "L2_RAM",
    80                base: 0x20000000,
    81                len:  0x00010000
    82            }],
    83        ];
    84    };


package ti.catalog.arm.cortexm3

     1    /*
     2     * Copyright (c) 2016-2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34    requires ti.catalog.peripherals.hdvicp2;
    35
    36    /*!
    37     *  ======== ti.catalog.arm.cortexm3 ========
    38     *  Package of devices for the arm Cortex M3 family of Arm processors.
    39     *
    40     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    41     *  interface. This interface is used by platforms (modules that implement
    42     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    43     */
    44    package ti.catalog.arm.cortexm3 [1,0,0] {
    45        module OMAP4430;
    46
    47        interface ITI8168;
    48        module TMS320DM8168;
    49        module TMS320TI816X;
    50        module TMS320C6A8168;
    51
    52        interface ITI8148;
    53        module TMS320DM8148;
    54        module TMS320TI814X;
    55
    56        module CC13xx, CC26xx, F28M35x, Tiva;
    57
    58        module CortexM;
    59        module CortexM3;
    60
    61        interface ITI813X;
    62        module TMS320TI813X;
    63
    64        interface ITI811X;
    65        module TMS320TI811X;
    66
    67        module TMS320C6A8149;
    68    }


module ti.catalog.arm.cortexm3.Tiva

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Tiva.xdc ========
    35     *  Generic Tiva Cpu definition
    36     *
    37     *  This device represents all Tiva devices independent.
    38     */
    39
    40    metaonly module Tiva inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM3";
    44        override config string   isa            = "v7M";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm3.TMS320C6A8149

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6A8149.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320C6A8149 ========
    40     *  The TMS320C6A8149 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320C6A8149 inherits ITI8148
    47    {
    48    };


module ti.catalog.arm.cortexm3.TMS320C6A8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6A8168.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320C6A8168 ========
    40     *  The TMS320C6A8168 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320C6A8168 inherits ITI8168
    47    {
    48    };


module ti.catalog.arm.cortexm3.TMS320DM8148

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM8148.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320DM8148 ========
    40     *  The TMS320DM8148 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320DM8148 inherits ITI8148
    47    {
    48    };


module ti.catalog.arm.cortexm3.TMS320DM8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM8168.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320DM8168 ========
    40     *  The TMS320DM8168 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320DM8168 inherits ITI8168
    47    {
    48    };


module ti.catalog.arm.cortexm3.TMS320TI811X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI811X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TI811X ========
    40     *  The TMS320TI811X device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320TI811X inherits ITI811X
    47    {
    48    };


module ti.catalog.arm.cortexm3.TMS320TI813X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI813X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TI813X ========
    40     *  The TMS320TI813X device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320TI813X inherits ITI813X
    47    {
    48    };


module ti.catalog.arm.cortexm3.TMS320TI814X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI814X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TI814X ========
    40     *  The TMS320TI814X device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320TI814X inherits ITI8148
    47    {
    48    };


module ti.catalog.arm.cortexm3.TMS320TI816X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI816X.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TI816X ========
    40     *  The TMS320TI816X device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TMS320TI816X inherits ITI8168
    47    {
    48    };


module ti.catalog.arm.cortexm3.concertoInit.Boot

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Boot.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.arm.cortexm3.concertoInit;
    39
    40    import xdc.rov.ViewInfo;
    41
    42    /*!
    43     *  ======== Boot ========
    44     *  Concerto M3 Boot Support.
    45     *
    46     *  The Boot module supports boot initialization for the Concerto M3 core.
    47     *  A special boot init function is created based on the configuration
    48     *  settings for this module.  This function is hooked into the
    49     *  xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
    50     *  to cinit processing).
    51     *
    52     *  The code to support the boot module is placed in a separate section
    53     *  named `".text:.bootCodeSection"` to allow placement of this section in
    54     *  the linker .cmd file if necessary. This section is a subsection of the
    55     *  `".text"` section so this code will be placed into the .text section unless
    56     *  explicitly placed, either through
    57     *  `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
    58     *  command file.
    59     */
    60    @Template("./Boot.xdt")
    61    @NoRuntime
    62    module Boot
    63    {
    64        /*! System PLL Fractional Multiplier (SPLLFMULT) value */
    65        metaonly enum FractMult {
    66            Fract_0  = 0x000,       /*! Fractional multiplier is 0 */
    67            Fract_25 = 0x100,       /*! Fractional multiplier is 0.25 */
    68            Fract_50 = 0x200,       /*! Fractional multiplier is 0.5 */
    69            Fract_75 = 0x300        /*! Fractional multiplier is 0.75 */
    70        }
    71
    72        /*! System Clock Divider (SYSDIVSEL) value */
    73        metaonly enum SysDiv {
    74            Div_1 = 0x0,            /*! Divide by 1 */
    75            Div_2 = 0x1,            /*! Divide by 2 */
    76            Div_4 = 0x2,            /*! Divide by 4 */
    77            Div_8 = 0x3             /*! Divide by 8 */
    78        };
    79
    80        /*! M3 Subsystem Clock Divider (M3SSDIVSEL) value */
    81        metaonly enum M3Div {
    82            M3Div_1 = 0x0,          /*! Divide by 1 */
    83            M3Div_2 = 0x1,          /*! Divide by 2 */
    84            M3Div_4 = 0x2           /*! Divide by 4 */
    85        };
    86
    87        metaonly struct ModuleView {
    88            Bool configureClocks;
    89            UInt OSCCLK;
    90            UInt SPLLIMULT;
    91            String SPLLFMULT;
    92            String SYSDIVSEL;
    93            String M3SSDIVSEL;
    94            Bool bootC28;
    95        }
    96
    97        @Facet
    98        metaonly config ViewInfo.Instance rovViewInfo =
    99            ViewInfo.create({
   100                viewMap: [
   101                [
   102                    'Module',
   103                    {
   104                        type: ViewInfo.MODULE,
   105                        viewInitFxn: 'viewInitModule',
   106                        structName: 'ModuleView'
   107                    }
   108                ],
   109                ]
   110            });
   111
   112         /*!
   113         *  Flash controller configuration flag, default is true.
   114         *
   115         *  Set to true to enable the configuration of the Flash controller
   116         *  wait states, program and data cache.
   117         */
   118        metaonly config Bool configureFlashController = true;
   119
   120        /*!
   121         *  Clock configuration flag, default is false.
   122         *
   123         *  Set to true to configure the PLL and system and M3 subsystem clock
   124         *  dividers.
   125         */
   126        config Bool configureClocks = false;
   127
   128        /*!
   129         *  ======== sharedMemoryEnable ========
   130         *  Shared RAM memory enable mask.
   131         *
   132         *  This parameter is used for writing the MEMCNF register.
   133         *  By default, all shared RAM segments will be enabled at runtime.
   134         *  To disable a shared RAM segment, set the corresponding bit to 0.
   135         *  If any data is loaded to a shared RAM segment, the segment must
   136         *  be enabled prior to loading the program through other means.
   137         */
   138        config Bits32 sharedMemoryEnable = 0xffffffff;
   139
   140        /*!
   141         *  ======== sharedMemoryOwnerMask ========
   142         *  Shared RAM owner select mask.
   143         *
   144         *  This parameter is used for writing the MSxMSEL register.
   145         *  By default, each value of each shared RAM select bit is '0'.
   146         *  This means the M3 is the owner and has write access based upon
   147         *  the sharedMemoryAccess bits.  Setting a '1' in any bit position
   148         *  makes the C28 the owner of that shared RAM segment.
   149         */
   150        config Bits32 sharedMemoryOwnerMask = 0;
   151
   152        /*!
   153         *  ======== sharedMemoryAccess ========
   154         *  Shared RAM M3 write access.
   155         *
   156         *  This parameter is used for writing the MSxSRCR registers.
   157         *  It determines the M3 write access for each shared RAM segment only
   158         *  when the M3 is the owner of the shared RAM segment.
   159         *  By default, the M3 is allowed to CPU fetch, DMA write, and CPU write.
   160         *
   161         *  Bit 0 is for CPU fetch. 0 - fetch allowed, 1 - fetch not allowed
   162         *  Bit 1 is for DMA write. 0 - write allowed, 1 - write not allowed
   163         *  Bit 2 is for CPU write. 0 - write allowed, 1 - write not allowed
   164         */
   165        config Bits32 sharedMemoryAccess[8];
   166
   167        /*!
   168         *  OSCCLK input frequency to PLL, in MHz. Default is 20 MHz.
   169         *
   170         *  This is the frequency of the oscillator clock (OSCCLK) input to the
   171         *  PLL.
   172         */
   173        metaonly config UInt OSCCLK = 20;
   174
   175        /*! System PLL Integer Multiplier (SPLLIMULT) value */
   176        metaonly config UInt SPLLIMULT = 1;
   177
   178        /*! System PLL Fractional Multiplier (SPLLFMULT) value */
   179        metaonly config FractMult SPLLFMULT = Fract_0;
   180
   181        /*! System Clock Divider (SYSDIVSEL) value */
   182        metaonly config SysDiv SYSDIVSEL = Div_8;
   183
   184        /*! M3 Subsystem Clock Divider (M3SSDIVSEL) value */
   185        metaonly config M3Div M3SSDIVSEL = M3Div_4;
   186
   187        /*!
   188         *  Flash controller wait states configuration flag, default is true.
   189         *
   190         *  Set to true to configure the Flash controller wait states.  The number
   191         *  of wait states is computed based upon the CPU frequency.
   192         */
   193        metaonly config Bool configureFlashWaitStates = true;
   194
   195        /*!
   196         *  Flash controller program cache enable flag, default is true.
   197         *
   198         *  Set to true to enable the Flash controller's program cache.
   199         */
   200        metaonly config Bool enableFlashProgramCache = true;
   201
   202        /*!
   203         *  Flash controller data cache enable flag, default is true.
   204         *
   205         *  Set to true to enable the Flash controller's data cache.
   206         */
   207        metaonly config Bool enableFlashDataCache = true;
   208
   209        /*!
   210         *  Function to be called when Limp mode is detected.
   211         *
   212         *  This function is called when the Boot module is about to configure
   213         *  the PLL, but finds the device operating in Limp mode (i.e., the mode
   214         *  when a missing OSCCLK input has been detected).
   215         *
   216         *  If this function is not specified by the application, a default
   217         *  function will be used, which spins in an infinite loop.
   218         */
   219        metaonly config Fxn limpAbortFunction;
   220
   221        /*!
   222         *  Boot from Flash flag.  Default is true.
   223         *
   224         *  Set to true to enable booting the M3 from Flash.
   225         */
   226        metaonly config Bool bootFromFlash = true;
   227
   228        /*!
   229         *  Initiate booting of the C28 processor.  Default is false.
   230         *
   231         *  Set to true to enable the M3 to initiate boot of the C28.
   232         *
   233         *  If enabled, this will occur after the optional clock configuration
   234         *  step, enabled by `{@link #configureClocks}`.
   235         */
   236        metaonly config Bool bootC28 = false;
   237
   238        /*!
   239         *  Initialize C28 RAM regions before booting the C28 processor.
   240         *  Default is true.
   241         *
   242         *  Set to true to enable initialization of these C28 RAM regions: M1,
   243         *  CtoM, LO, L1, L2, and L3.  RAM locations will be zeroed, and the ECC or
   244         *  parity bits will be initialized.
   245         */
   246        metaonly config Bool initC28RAMs = true;
   247
   248        /*!
   249         *  Configure Shared RAM regions before booting the C28 processor.
   250         *  Default is true.
   251         *
   252         *  Set to true to enable Shared RAM regions S0-S7, to set the
   253         *  owner of each region and the write access permissions for the onwer.
   254         */
   255        metaonly config Bool configSharedRAMs = true;
   256
   257        /*!
   258         *  ======== loadSegment ========
   259         *  Specifies where to load the flash function
   260         *
   261         *  If 'configureFlashWaitStates' is true, then this parameter
   262         *  determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
   263         *  section gets loaded.
   264         */
   265        metaonly config String loadSegment;
   266
   267        /*!
   268         *  ======== runSegment ========
   269         *  Specifies where to run the flash function
   270         *
   271         *  If 'configureFlashWaitStates' is true then this parameter
   272         *  determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
   273         *  section gets executed at runtime.
   274         */
   275        metaonly config String runSegment;
   276
   277        /*!
   278         *  @_nodoc
   279         *  ======== getFrequency ========
   280         *  Gets the resulting M3 CPU frequency (in Hz) given the Clock
   281         *  configuration parameters.
   282         *
   283         */
   284        UInt32 getFrequency();
   285
   286        /*!
   287         *  @_nodoc
   288         *  ======== registerFreqListener ========
   289         *  Register a module to be notified whenever the frequency changes.
   290         *
   291         *  The registered module must have a function named 'fireFrequencyUpdate'
   292         *  which takes the new frequency as an argument.
   293         */
   294        function registerFreqListener();
   295
   296    internal:
   297
   298        /* The computed timestamp frequency */
   299        metaonly config UInt timestampFreq;
   300
   301        /* Used to display the computed M3 frequency value in the Grace page. */
   302        metaonly config String displayFrequency;
   303
   304        /* Used to display the computed C28 frequency value in the Grace page. */
   305        metaonly config String displayFrequency28;
   306
   307        /* The computed Flash wait states */
   308        metaonly config UInt flashWaitStates = 3;
   309
   310        /* The computed values to write the MSxSRCR registers */
   311        metaonly config Bits32 MSxSRCR[2];
   312
   313    };


package ti.catalog.arm.cortexm3.concertoInit

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ti.catalog.arm.cortexm3.concertoInit ========
    40     *  Concerto M3 boot time initialization support
    41     */
    42    package ti.catalog.arm.cortexm3.concertoInit[1,0,0] {
    43        module Boot;
    44    }


module ti.catalog.arm.cortexm33.CortexM

     1    /*
     2     * Copyright (c) 2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CortexM.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all CortexM devices.
    38     */
    39
    40    metaonly module CortexM inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string  cpuCore           = "M33";
    44        override config string  isa               = "v8M";
    45        override config string  cpuCoreRevision   = "1.0";
    46        override config int     minProgUnitSize   = 1;
    47        override config int     minDataUnitSize   = 1;
    48        override config int     dataWordSize      = 4;
    49    }


package ti.catalog.arm.cortexm33

     1    /*
     2     * Copyright (c) 2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== ti.catalog.arm.cortexm33  ========
    37     *  Package of devices for the Cortex-M33 family of ARM processors.
    38     *
    39     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    40     *  interface. This interface is used by platforms (modules that implement
    41     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    42     */
    43    package ti.catalog.arm.cortexm33 [1,0,0] {
    44        module CortexM;
    45    }


module ti.catalog.arm.cortexm4.CC13xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CC13xx.xdc ========
    35     *  Generic CC13xx Cpu definition
    36     *
    37     *  This definition represents all CC13xx devices.
    38     */
    39
    40    metaonly module CC13xx inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM4";
    44        override config string   isa            = "v7M4";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm4.CC26xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CC26xx.xdc ========
    35     *  Generic CC26xx Cpu definition
    36     *
    37     *  This definition represents all CC26xx devices.
    38     */
    39
    40    metaonly module CC26xx inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM4";
    44        override config string   isa            = "v7M4";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm4.CC32xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CC32xx.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all CC32xx devices independent.
    38     */
    39
    40    metaonly module CC32xx inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM4";
    44        override config string   isa            = "v7M4";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm4.DRA7XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== DRA7XX.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== DRA7XX ========
    40     *  The DRA7XX device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module DRA7XX inherits ti.catalog.ICpuDataSheet
    47    {
    48    instance:
    49        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    50
    51        override config string cpuCore           = "CM4";
    52        override config string isa               = "v7M4";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        /*!
    59         *  ======== memMap ========
    60         *  The memory map returned be getMemoryMap().
    61         */
    62        config xdc.platform.IPlatform.Memory memMap[string] = [
    63
    64            /*
    65             * AMMU mapped L2 ROM virtual address
    66             * Physical address is 0x55000000
    67             */
    68            ["L2_ROM", {
    69                name: "L2_ROM",
    70                base: 0x00000000,
    71                len:  0x00004000
    72            }],
    73
    74            /*
    75             * AMMU mapped L2 RAM virtual address
    76             * Physical address is 0x55020000
    77             */
    78            ["L2_RAM", {
    79                name: "L2_RAM",
    80                base: 0x20000000,
    81                len:  0x00010000
    82            }],
    83
    84            /*
    85             * On-chip RAM memory
    86             */
    87            ["OCMC_RAM1", {
    88                comment:    "OCMC (On-chip RAM) Bank 1 (512KB)",
    89                name: "OCMC_RAM1",
    90                base: 0x40300000,
    91                len:  0x00080000
    92            }],
    93
    94            /*
    95             * On-chip RAM memory
    96             */
    97            ["OCMC_RAM2", {
    98                comment:    "OCMC (On-chip RAM) Bank 2 (1MB)",
    99                name: "OCMC_RAM2",
   100                base: 0x40400000,
   101                len:  0x00100000
   102            }],
   103
   104            /*
   105             * On-chip RAM memory
   106             */
   107            ["OCMC_RAM3", {
   108                comment:    "OCMC (On-chip RAM) Bank 3 (1MB)",
   109                name: "OCMC_RAM3",
   110                base: 0x40500000,
   111                len:  0x00100000
   112            }]
   113        ];
   114    };


module ti.catalog.arm.cortexm4.MSP432

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== MSP432.xdc ========
    35     *  Generic MSP432 definition
    36     *
    37     *  This generic device represents all MSP432 devices.
    38     */
    39
    40    metaonly module MSP432 inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM4";
    44        override config string   isa            = "v7M4";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm4.MSP432E

     1    /*
     2     * Copyright (c) 2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== MSP432E.xdc ========
    35     *  Generic MSP432E Cpu definition
    36     *
    37     *  This device represents all MSP432E devices independent.
    38     */
    39
    40    metaonly module MSP432E inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM4";
    44        override config string   isa            = "v7M4";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm4.OMAP5430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP5430.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== OMAP5430 ========
    40     *  The OMAP5430 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module OMAP5430 inherits ti.catalog.ICpuDataSheet
    47    {
    48    instance:
    49        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    50
    51        override config string cpuCore           = "CM4";
    52        override config string isa               = "v7M4";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        /*!
    59         *  ======== memMap ========
    60         *  The memory map returned be getMemoryMap().
    61         */
    62        config xdc.platform.IPlatform.Memory memMap[string] = [
    63
    64            /*
    65             * AMMU mapped L2 ROM virtual address
    66             * Physical address is 0x55000000
    67             */
    68            ["L2_ROM", {
    69                name: "L2_ROM",
    70                base: 0x00000000,
    71                len:  0x00004000
    72            }],
    73
    74            /*
    75             * AMMU mapped L2 RAM virtual address
    76             * Physical address is 0x55020000
    77             */
    78            ["L2_RAM", {
    79                name: "L2_RAM",
    80                base: 0x20000000,
    81                len:  0x00010000
    82            }],
    83        ];
    84    };


package ti.catalog.arm.cortexm4

     1    /*
     2     * Copyright (c) 2016-2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.arm.cortexm4 ========
    35     *  Package of devices for the arm Cortex M4 family of Arm processors.
    36     *
    37     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    38     *  interface. This interface is used by platforms (modules that implement
    39     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    40     */
    41    package ti.catalog.arm.cortexm4 [1,0,0] {
    42        module Tiva;
    43        module OMAP5430;
    44        module Vayu;
    45        module DRA7XX;
    46        module TDA3XX;
    47        module CC32xx;
    48        module MSP432;
    49        module MSP432E;
    50        module CC13xx;
    51        module CC26xx;
    52    }


module ti.catalog.arm.cortexm4.TDA3XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TDA3XX.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TDA3XX ========
    40     *  The TDA3XX device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module TDA3XX inherits ti.catalog.ICpuDataSheet
    47    {
    48    instance:
    49        override config string cpuCore           = "CM4";
    50        override config string isa               = "v7M4";
    51        override config string cpuCoreRevision   = "1.0";
    52        override config int    minProgUnitSize   = 1;
    53        override config int    minDataUnitSize   = 1;
    54        override config int    dataWordSize      = 4;
    55
    56        /*!
    57         *  ======== memMap ========
    58         *  The memory map returned be getMemoryMap().
    59         */
    60        config xdc.platform.IPlatform.Memory memMap[string] = [
    61
    62                /*
    63                 * AMMU mapped L2 ROM virtual address
    64                 * Physical address is 0x55000000
    65                 */
    66                ["L2_ROM", {
    67                    name: "L2_ROM",
    68                    base: 0x00000000,
    69                    len:  0x00004000
    70                }],
    71
    72                /*
    73                 * AMMU mapped L2 RAM virtual address
    74                 * Physical address is 0x55020000
    75                 */
    76                ["L2_RAM", {
    77                    name: "L2_RAM",
    78                    base: 0x20000000,
    79                len:  0x00010000
    80            }],
    81
    82            /*
    83                 * On-chip RAM memory
    84                 */
    85                ["OCMC_RAM", {
    86                    name: "OCMC_RAM",
    87                    base: 0x40300000,
    88                len:  0x00080000
    89            }]
    90        ];
    91    };


module ti.catalog.arm.cortexm4.Tiva

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Tiva.xdc ========
    35     *  Generic Tiva Cpu definition
    36     *
    37     *  This device represents all Tiva devices independent.
    38     */
    39
    40    metaonly module Tiva inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "CM4";
    44        override config string   isa            = "v7M4";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


module ti.catalog.arm.cortexm4.Vayu

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Vayu.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Vayu ========
    40     *  The Vayu device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     *
    45     */
    46    metaonly module Vayu inherits ti.catalog.ICpuDataSheet
    47    {
    48    instance:
    49        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    50
    51        override config string cpuCore           = "CM4";
    52        override config string isa               = "v7M4";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        /*!
    59         *  ======== memMap ========
    60         *  The memory map returned be getMemoryMap().
    61         */
    62        config xdc.platform.IPlatform.Memory memMap[string] = [
    63
    64            /*
    65             * AMMU mapped L2 ROM virtual address
    66             * Physical address is 0x55000000
    67             */
    68            ["L2_ROM", {
    69                name: "L2_ROM",
    70                base: 0x00000000,
    71                len:  0x00004000
    72            }],
    73
    74            /*
    75             * AMMU mapped L2 RAM virtual address
    76             * Physical address is 0x55020000
    77             */
    78            ["L2_RAM", {
    79                name: "L2_RAM",
    80                base: 0x20000000,
    81                len:  0x00010000
    82            }],
    83        ];
    84    };


module ti.catalog.arm.cortexm4.tiva.ce.Boot

     1    /*
     2     * Copyright (c) 2013-2018, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     * */
    32
    33    /*
    34     *  ======== Boot.xdc ========
    35     */
    36
    37    package ti.catalog.arm.cortexm4.tiva.ce;
    38
    39    import xdc.rov.ViewInfo;
    40    import xdc.runtime.Assert;
    41
    42    /*!
    43     *  ======== Boot ========
    44     *  Stellaris M3 Boot Support.
    45     *
    46     *  The Boot module supports boot initialization for the Stellaris M3 devices.
    47     *  A special boot init function is created based on the configuration
    48     *  settings for this module.  This function is hooked into the
    49     *  xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
    50     *  to cinit processing).
    51     *
    52     *  The code to support the boot module is placed in a separate section
    53     *  named `".text:.bootCodeSection"` to allow placement of this section in
    54     *  the linker .cmd file if necessary. This section is a subsection of the
    55     *  `".text"` section so this code will be placed into the .text section unless
    56     *  explicitly placed, either through
    57     *  `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
    58     *  command file.
    59     */
    60    @Template("./Boot.xdt")
    61    module Boot
    62    {
    63        metaonly struct ModuleView {
    64            Bool    configureClock;
    65            Bool    sysClockDivEnable;
    66            String  sysClockDiv;
    67            Bool    pwmClockDivEnable;
    68            String  pwmClockDiv;
    69            String  xtal;
    70            String  oscSrc;
    71            Bool    pllBypass;
    72            Bool    ioscDisable;
    73            Bool    moscDisable;
    74        }
    75
    76        @Facet
    77        metaonly config ViewInfo.Instance rovViewInfo =
    78            ViewInfo.create({
    79                viewMap: [
    80                [
    81                    'Module',
    82                    {
    83                        type: ViewInfo.MODULE,
    84                        viewInitFxn: 'viewInitModule',
    85                        structName: 'ModuleView'
    86                    }
    87                ],
    88                ]
    89            });
    90
    91
    92        metaonly enum SysDiv {
    93            SYSDIV_1     = 0x07800000,  /*! CPU clock is osc/pll / 1 */
    94            SYSDIV_2     = 0x00C00000,  /*! CPU clock is osc/pll / 2 */
    95            SYSDIV_3     = 0x01400000,  /*! CPU clock is osc/pll / 3 */
    96            SYSDIV_4     = 0x01C00000,  /*! CPU clock is osc/pll / 4 */
    97            SYSDIV_5     = 0x02400000,  /*! CPU clock is osc/pll / 5 */
    98            SYSDIV_6     = 0x02C00000,  /*! CPU clock is osc/pll / 6 */
    99            SYSDIV_7     = 0x03400000,  /*! CPU clock is osc/pll / 7 */
   100            SYSDIV_8     = 0x03C00000,  /*! CPU clock is osc/pll / 8 */
   101            SYSDIV_9     = 0x04400000,  /*! CPU clock is osc/pll / 9 */
   102            SYSDIV_10    = 0x04C00000,  /*! CPU clock is osc/pll / 10 */
   103            SYSDIV_11    = 0x05400000,  /*! CPU clock is osc/pll / 11 */
   104            SYSDIV_12    = 0x05C00000,  /*! CPU clock is osc/pll / 12 */
   105            SYSDIV_13    = 0x06400000,  /*! CPU clock is osc/pll / 13 */
   106            SYSDIV_14    = 0x06C00000,  /*! CPU clock is osc/pll / 14 */
   107            SYSDIV_15    = 0x07400000,  /*! CPU clock is osc/pll / 15 */
   108            SYSDIV_16    = 0x07C00000,  /*! CPU clock is osc/pll / 16 */
   109            SYSDIV_17    = 0x88400000,  /*! CPU clock is osc/pll / 17 */
   110            SYSDIV_18    = 0x88C00000,  /*! CPU clock is osc/pll / 18 */
   111            SYSDIV_19    = 0x89400000,  /*! CPU clock is osc/pll / 19 */
   112            SYSDIV_20    = 0x89C00000,  /*! CPU clock is osc/pll / 20 */
   113            SYSDIV_21    = 0x8A400000,  /*! CPU clock is osc/pll / 21 */
   114            SYSDIV_22    = 0x8AC00000,  /*! CPU clock is osc/pll / 22 */
   115            SYSDIV_23    = 0x8B400000,  /*! CPU clock is osc/pll / 23 */
   116            SYSDIV_24    = 0x8BC00000,  /*! CPU clock is osc/pll / 24 */
   117            SYSDIV_25    = 0x8C400000,  /*! CPU clock is osc/pll / 25 */
   118            SYSDIV_26    = 0x8CC00000,  /*! CPU clock is osc/pll / 26 */
   119            SYSDIV_27    = 0x8D400000,  /*! CPU clock is osc/pll / 27 */
   120            SYSDIV_28    = 0x8DC00000,  /*! CPU clock is osc/pll / 28 */
   121            SYSDIV_29    = 0x8E400000,  /*! CPU clock is osc/pll / 29 */
   122            SYSDIV_30    = 0x8EC00000,  /*! CPU clock is osc/pll / 30 */
   123            SYSDIV_31    = 0x8F400000,  /*! CPU clock is osc/pll / 31 */
   124            SYSDIV_32    = 0x8FC00000,  /*! CPU clock is osc/pll / 32 */
   125            SYSDIV_33    = 0x90400000,  /*! CPU clock is osc/pll / 33 */
   126            SYSDIV_34    = 0x90C00000,  /*! CPU clock is osc/pll / 34 */
   127            SYSDIV_35    = 0x91400000,  /*! CPU clock is osc/pll / 35 */
   128            SYSDIV_36    = 0x91C00000,  /*! CPU clock is osc/pll / 36 */
   129            SYSDIV_37    = 0x92400000,  /*! CPU clock is osc/pll / 37 */
   130            SYSDIV_38    = 0x92C00000,  /*! CPU clock is osc/pll / 38 */
   131            SYSDIV_39    = 0x93400000,  /*! CPU clock is osc/pll / 39 */
   132            SYSDIV_40    = 0x93C00000,  /*! CPU clock is osc/pll / 40 */
   133            SYSDIV_41    = 0x94400000,  /*! CPU clock is osc/pll / 41 */
   134            SYSDIV_42    = 0x94C00000,  /*! CPU clock is osc/pll / 42 */
   135            SYSDIV_43    = 0x95400000,  /*! CPU clock is osc/pll / 43 */
   136            SYSDIV_44    = 0x95C00000,  /*! CPU clock is osc/pll / 44 */
   137            SYSDIV_45    = 0x96400000,  /*! CPU clock is osc/pll / 45 */
   138            SYSDIV_46    = 0x96C00000,  /*! CPU clock is osc/pll / 46 */
   139            SYSDIV_47    = 0x97400000,  /*! CPU clock is osc/pll / 47 */
   140            SYSDIV_48    = 0x97C00000,  /*! CPU clock is osc/pll / 48 */
   141            SYSDIV_49    = 0x98400000,  /*! CPU clock is osc/pll / 49 */
   142            SYSDIV_50    = 0x98C00000,  /*! CPU clock is osc/pll / 50 */
   143            SYSDIV_51    = 0x99400000,  /*! CPU clock is osc/pll / 51 */
   144            SYSDIV_52    = 0x99C00000,  /*! CPU clock is osc/pll / 52 */
   145            SYSDIV_53    = 0x9A400000,  /*! CPU clock is osc/pll / 53 */
   146            SYSDIV_54    = 0x9AC00000,  /*! CPU clock is osc/pll / 54 */
   147            SYSDIV_55    = 0x9B400000,  /*! CPU clock is osc/pll / 55 */
   148            SYSDIV_56    = 0x9BC00000,  /*! CPU clock is osc/pll / 56 */
   149            SYSDIV_57    = 0x9C400000,  /*! CPU clock is osc/pll / 57 */
   150            SYSDIV_58    = 0x9CC00000,  /*! CPU clock is osc/pll / 58 */
   151            SYSDIV_59    = 0x9D400000,  /*! CPU clock is osc/pll / 59 */
   152            SYSDIV_60    = 0x9DC00000,  /*! CPU clock is osc/pll / 60 */
   153            SYSDIV_61    = 0x9E400000,  /*! CPU clock is osc/pll / 61 */
   154            SYSDIV_62    = 0x9EC00000,  /*! CPU clock is osc/pll / 62 */
   155            SYSDIV_63    = 0x9F400000,  /*! CPU clock is osc/pll / 63 */
   156            SYSDIV_64    = 0x9FC00000,  /*! CPU clock is osc/pll / 64 */
   157            SYSDIV_2_5   = 0xC1000000,  /*! CPU clock is osc/pll / 2.5 */
   158            SYSDIV_3_5   = 0xC1800000,  /*! CPU clock is osc/pll / 3.5 */
   159            SYSDIV_4_5   = 0xC2000000,  /*! CPU clock is osc/pll / 4.5 */
   160            SYSDIV_5_5   = 0xC2800000,  /*! CPU clock is osc/pll / 5.5 */
   161            SYSDIV_6_5   = 0xC3000000,  /*! CPU clock is osc/pll / 6.5 */
   162            SYSDIV_7_5   = 0xC3800000,  /*! CPU clock is osc/pll / 7.5 */
   163            SYSDIV_8_5   = 0xC4000000,  /*! CPU clock is osc/pll / 8.5 */
   164            SYSDIV_9_5   = 0xC4800000,  /*! CPU clock is osc/pll / 9.5 */
   165            SYSDIV_10_5  = 0xC5000000,  /*! CPU clock is osc/pll / 10.5 */
   166            SYSDIV_11_5  = 0xC5800000,  /*! CPU clock is osc/pll / 11.5 */
   167            SYSDIV_12_5  = 0xC6000000,  /*! CPU clock is osc/pll / 12.5 */
   168            SYSDIV_13_5  = 0xC6800000,  /*! CPU clock is osc/pll / 13.5 */
   169            SYSDIV_14_5  = 0xC7000000,  /*! CPU clock is osc/pll / 14.5 */
   170            SYSDIV_15_5  = 0xC7800000,  /*! CPU clock is osc/pll / 15.5 */
   171            SYSDIV_16_5  = 0xC8000000,  /*! CPU clock is osc/pll / 16.5 */
   172            SYSDIV_17_5  = 0xC8800000,  /*! CPU clock is osc/pll / 17.5 */
   173            SYSDIV_18_5  = 0xC9000000,  /*! CPU clock is osc/pll / 18.5 */
   174            SYSDIV_19_5  = 0xC9800000,  /*! CPU clock is osc/pll / 19.5 */
   175            SYSDIV_20_5  = 0xCA000000,  /*! CPU clock is osc/pll / 20.5 */
   176            SYSDIV_21_5  = 0xCA800000,  /*! CPU clock is osc/pll / 21.5 */
   177            SYSDIV_22_5  = 0xCB000000,  /*! CPU clock is osc/pll / 22.5 */
   178            SYSDIV_23_5  = 0xCB800000,  /*! CPU clock is osc/pll / 23.5 */
   179            SYSDIV_24_5  = 0xCC000000,  /*! CPU clock is osc/pll / 24.5 */
   180            SYSDIV_25_5  = 0xCC800000,  /*! CPU clock is osc/pll / 25.5 */
   181            SYSDIV_26_5  = 0xCD000000,  /*! CPU clock is osc/pll / 26.5 */
   182            SYSDIV_27_5  = 0xCD800000,  /*! CPU clock is osc/pll / 27.5 */
   183            SYSDIV_28_5  = 0xCE000000,  /*! CPU clock is osc/pll / 28.5 */
   184            SYSDIV_29_5  = 0xCE800000,  /*! CPU clock is osc/pll / 29.5 */
   185            SYSDIV_30_5  = 0xCF000000,  /*! CPU clock is osc/pll / 30.5 */
   186            SYSDIV_31_5  = 0xCF800000,  /*! CPU clock is osc/pll / 31.5 */
   187            SYSDIV_32_5  = 0xD0000000,  /*! CPU clock is osc/pll / 32.5 */
   188            SYSDIV_33_5  = 0xD0800000,  /*! CPU clock is osc/pll / 33.5 */
   189            SYSDIV_34_5  = 0xD1000000,  /*! CPU clock is osc/pll / 34.5 */
   190            SYSDIV_35_5  = 0xD1800000,  /*! CPU clock is osc/pll / 35.5 */
   191            SYSDIV_36_5  = 0xD2000000,  /*! CPU clock is osc/pll / 36.5 */
   192            SYSDIV_37_5  = 0xD2800000,  /*! CPU clock is osc/pll / 37.5 */
   193            SYSDIV_38_5  = 0xD3000000,  /*! CPU clock is osc/pll / 38.5 */
   194            SYSDIV_39_5  = 0xD3800000,  /*! CPU clock is osc/pll / 39.5 */
   195            SYSDIV_40_5  = 0xD4000000,  /*! CPU clock is osc/pll / 40.5 */
   196            SYSDIV_41_5  = 0xD4800000,  /*! CPU clock is osc/pll / 41.5 */
   197            SYSDIV_42_5  = 0xD5000000,  /*! CPU clock is osc/pll / 42.5 */
   198            SYSDIV_43_5  = 0xD5800000,  /*! CPU clock is osc/pll / 43.5 */
   199            SYSDIV_44_5  = 0xD6000000,  /*! CPU clock is osc/pll / 44.5 */
   200            SYSDIV_45_5  = 0xD6800000,  /*! CPU clock is osc/pll / 45.5 */
   201            SYSDIV_46_5  = 0xD7000000,  /*! CPU clock is osc/pll / 46.5 */
   202            SYSDIV_47_5  = 0xD7800000,  /*! CPU clock is osc/pll / 47.5 */
   203            SYSDIV_48_5  = 0xD8000000,  /*! CPU clock is osc/pll / 48.5 */
   204            SYSDIV_49_5  = 0xD8800000,  /*! CPU clock is osc/pll / 49.5 */
   205            SYSDIV_50_5  = 0xD9000000,  /*! CPU clock is osc/pll / 50.5 */
   206            SYSDIV_51_5  = 0xD9800000,  /*! CPU clock is osc/pll / 51.5 */
   207            SYSDIV_52_5  = 0xDA000000,  /*! CPU clock is osc/pll / 52.5 */
   208            SYSDIV_53_5  = 0xDA800000,  /*! CPU clock is osc/pll / 53.5 */
   209            SYSDIV_54_5  = 0xDB000000,  /*! CPU clock is osc/pll / 54.5 */
   210            SYSDIV_55_5  = 0xDB800000,  /*! CPU clock is osc/pll / 55.5 */
   211            SYSDIV_56_5  = 0xDC000000,  /*! CPU clock is osc/pll / 56.5 */
   212            SYSDIV_57_5  = 0xDC800000,  /*! CPU clock is osc/pll / 57.5 */
   213            SYSDIV_58_5  = 0xDD000000,  /*! CPU clock is osc/pll / 58.5 */
   214            SYSDIV_59_5  = 0xDD800000,  /*! CPU clock is osc/pll / 59.5 */
   215            SYSDIV_60_5  = 0xDE000000,  /*! CPU clock is osc/pll / 60.5 */
   216            SYSDIV_61_5  = 0xDE800000,  /*! CPU clock is osc/pll / 61.5 */
   217            SYSDIV_62_5  = 0xDF000000,  /*! CPU clock is osc/pll / 62.5 */
   218            SYSDIV_63_5  = 0xDF800000   /*! CPU clock is osc/pll / 63.5 */
   219        }
   220
   221        metaonly enum PwmDiv {
   222            PWMDIV_1     = 0x00000000,  /*! PWM clock /1 */
   223            PWMDIV_2     = 0x00100000,  /*! PWM clock /2 */
   224            PWMDIV_4     = 0x00120000,  /*! PWM clock /4 */
   225            PWMDIV_8     = 0x00140000,  /*! PWM clock /8 */
   226            PWMDIV_16    = 0x00160000,  /*! PWM clock /16 */
   227            PWMDIV_32    = 0x00180000,  /*! PWM clock /32 */
   228            PWMDIV_64    = 0x001A0000   /*! PWM clock /64 */
   229        }
   230
   231        metaonly enum XtalFreq {
   232            XTAL_1MHZ    = 0x00000000,  /*! 1.0 MHz */
   233            XTAL_1_84MHZ = 0x00000040,  /*! 1.8432 MHz */
   234            XTAL_2MHZ    = 0x00000080,  /*! 2.0 MHz */
   235            XTAL_2_45MHZ = 0x000000C0,  /*! 2.4576 MHz */
   236            XTAL_3_57MHZ = 0x00000100,  /*! 3.579545 MHz */
   237            XTAL_3_68MHZ = 0x00000140,  /*! 3.6864 MHz */
   238            XTAL_4MHZ    = 0x00000180,  /*! 4.0 MHz */
   239            XTAL_4_09MHZ = 0x000001C0,  /*! 4.096 MHz */
   240            XTAL_4_91MHZ = 0x00000200,  /*! 4.9152 MHz */
   241            XTAL_5MHZ    = 0x00000240,  /*! 5.0 MHz */
   242            XTAL_5_12MHZ = 0x00000280,  /*! 5.12 MHz */
   243            XTAL_6MHZ    = 0x000002C0,  /*! 6.0 MHz */
   244            XTAL_6_14MHZ = 0x00000300,  /*! 6.144 MHz */
   245            XTAL_7_37MHZ = 0x00000340,  /*! 7.3728 MHz */
   246            XTAL_8MHZ    = 0x00000380,  /*! 8.0 MHz */
   247            XTAL_8_19MHZ = 0x000003C0,  /*! 8.192 MHz */
   248            XTAL_10MHZ   = 0x00000400,  /*! 10.0 MHz (USB) */
   249            XTAL_12MHZ   = 0x00000440,  /*! 12.0 MHz (USB) */
   250            XTAL_12_2MHZ = 0x00000480,  /*! 12.288 MHz */
   251            XTAL_13_5MHZ = 0x000004C0,  /*! 13.56 MHz */
   252            XTAL_14_3MHZ = 0x00000500,  /*! 14.31818 MHz */
   253            XTAL_16MHZ   = 0x00000540,  /*! 16.0 MHz (USB) */
   254            XTAL_16_3MHZ = 0x00000580,  /*! 16.384 MHz */
   255            XTAL_18MHZ   = 0x000005C0,  /*! 18.0 MHz */
   256            XTAL_20MHZ   = 0x00000600,  /*! 20.0 MHz */
   257            XTAL_24MHZ   = 0x00000640,  /*! 24.0 MHz */
   258            XTAL_25MHZ   = 0x00000680   /*! 25.0 MHz */
   259        }
   260
   261        metaonly enum OscSrc {
   262            OSCSRC_MAIN     = 0x00000000,  /*! Main oscillator */
   263            OSCSRC_INT      = 0x00000010,  /*! Internal oscillator */
   264            OSCSRC_INT4     = 0x00000020,  /*! Internal oscillator / 4 */
   265            OSCSRC_INT30    = 0x00000030,  /*! Internal 30 KHz oscillator */
   266            OSCSRC_EXT4_19  = 0x80000028,  /*! External 4.19 MHz */
   267            OSCSRC_EXT32    = 0x80000038   /*! External 32 KHz */
   268        }
   269
   270        /* The LDO setting is not supported on TIVA devices */
   271        metaonly enum LdoOut {
   272            LDOPCTL_2_55V    = 0x0000001F,  /* LDO output of 2.55V */
   273            LDOPCTL_2_60V    = 0x0000001E,  /* LDO output of 2.60V */
   274            LDOPCTL_2_65V    = 0x0000001D,  /* LDO output of 2.65V */
   275            LDOPCTL_2_70V    = 0x0000001C,  /* LDO output of 2.70V */
   276            LDOPCTL_2_75V    = 0x0000001B,  /* LDO output of 2.75V */
   277            LDOPCTL_2_25V    = 0x00000005,  /* LDO output of 2.25V */
   278            LDOPCTL_2_30V    = 0x00000004,  /* LDO output of 2.30V */
   279            LDOPCTL_2_35V    = 0x00000003,  /* LDO output of 2.35V */
   280            LDOPCTL_2_40V    = 0x00000002,  /* LDO output of 2.40V */
   281            LDOPCTL_2_45V    = 0x00000001,  /* LDO output of 2.45V */
   282            LDOPCTL_2_50V    = 0x00000000   /* LDO output of 2.50V */
   283        }
   284
   285        metaonly enum VcoFreq {
   286            VCO_480          = 0xF1000000,  /*! VCO is 480 MHz */
   287            VCO_320          = 0xF0000000   /*! VCO is 320 MHz */
   288        }
   289
   290        /*! Asserted in Boot_sysCtlClockSet */
   291        config Assert.Id A_mustUseEnhancedClockMode = {
   292            msg: "A_mustUseEnhancedClockMode: This device requires the Enhanced Clock Mode."
   293        };
   294
   295        /*! Asserted in Boot_sysCtlClockFreqSet */
   296        config Assert.Id A_mustNotUseEnhancedClockMode = {
   297            msg: "A_mustNotUseEnhancedClockMode: This device does not support the Enhanced Clock Mode."
   298        };
   299
   300
   301        /*!
   302         *  Clock configuration flag, default is false.
   303         *
   304         *  Set to true to automatically configure the Clock.
   305         */
   306        metaonly config Bool configureClock = false;
   307
   308        /*! SYS Clock Divisor */
   309        metaonly config SysDiv sysClockDiv = SYSDIV_1;
   310
   311        /*! PWM Clock Divisor */
   312        metaonly config PwmDiv pwmClockDiv = PWMDIV_1;
   313
   314        /*! Crystal Value */
   315        metaonly config XtalFreq xtal = XTAL_1MHZ;
   316
   317        /*! Oscillator Source */
   318        metaonly config OscSrc oscSrc = OSCSRC_MAIN;
   319
   320        /*! VCO frequency */
   321        metaonly config VcoFreq vcoFreq = VCO_320;
   322
   323        /*! PLL Bypass flag */
   324        metaonly config Bool pllBypass = false;
   325
   326        /*! Internal Oscillator Disable flag */
   327        metaonly config Bool ioscDisable = false;
   328
   329        /*! Main Oscillator Disable flag */
   330        metaonly config Bool moscDisable = false;
   331
   332        /*!
   333         *  @_nodoc
   334         *  LDO configuration flag, default is false.
   335         *
   336         *  Set to true to automatically configure the LDO.
   337         */
   338        metaonly config Bool configureLdo = false;
   339
   340        /*!
   341         *  @_nodoc
   342         *  LDO VADJ setting, default is 2.5V
   343         */
   344        metaonly config LdoOut ldoOut = LDOPCTL_2_50V;
   345
   346        /*!
   347         *  Enahnced Clocking Mode.
   348         *
   349         *  Must be set to true for OneMCU devices that support this feature.
   350         */
   351        metaonly config Bool enhancedClockMode = false;
   352
   353        /*!
   354         *  Desired CPU Clock Frequency in Hz.
   355         *
   356         *  Configurable only on devices with "Enhanced Clocking Mode" support.
   357         */
   358        metaonly config UInt cpuFrequency = 40000000;
   359
   360        /*
   361         *  @_nodoc
   362         *  ======== sysCtlClockSet ========
   363         *  wrapper for Boot_sysCtlClockSetI()
   364         *  verifies that this function is correct for this devices.
   365         *  then calls Boot_sysCtlClockSetI()
   366         *
   367         *  param ulConfig is the required configuration of the device clocking.
   368         */
   369        @DirectCall
   370        Void sysCtlClockSet(ULong ulConfig);
   371
   372        /*
   373         *  @_nodoc
   374         *  ======== sysCtlClockFreqSet ========
   375         *  Configures the system clock.
   376         *
   377         *  wrapper for Boot_sysCtlClockFreqSetI()
   378         *  verifies that this function is correct for this devices.
   379         *  then calls Boot_sysCtlClockFreqSetI()
   380         *
   381         *  @param ulConfig is the required configuration of the device clocking.
   382         *  @param ulSysClock is the requested processor frequency.
   383         *
   384         *  @return The actual configured system clock frequency in Hz or zero if the
   385         *  value could not be changed due to a parameter error or PLL lock failure.
   386         */
   387        @DirectCall
   388        ULong sysCtlClockFreqSet(ULong ulConfig, ULong ulSysClock);
   389
   390        /*!
   391         *  @_nodoc
   392         *  ======== registerFreqListener ========
   393         *  Register a module to be notified whenever the frequency changes.
   394         *
   395         *  The registered module must have a function named 'fireFrequencyUpdate'
   396         *  which takes the new frequency as an argument.
   397         */
   398        function registerFreqListener();
   399
   400    internal:
   401
   402        /*
   403         *  ======== sysCtlClockSetI ========
   404         *  Configures the system clock. (legacy function)
   405         *
   406         *  param ulConfig is the required configuration of the device clocking.
   407         */
   408        Void sysCtlClockSetI(ULong ulConfig);
   409
   410        /*
   411         *  ======== sysCtlClockFreqSetI ========
   412         *  Configures the system clock.
   413         *
   414         *  @param ulConfig is the required configuration of the device clocking.
   415         *  @param ulSysClock is the requested processor frequency.
   416         *
   417         *  @return The actual configured system clock frequency in Hz or zero if the
   418         *  value could not be changed due to a parameter error or PLL lock failure.
   419         */
   420        ULong sysCtlClockFreqSetI(ULong ulConfig, ULong ulSysClock);
   421
   422        /*
   423         *  ======== sysCtlDelayI ========
   424         *  Provides a small delay.
   425         *
   426         *  @param ulCount is the number of delay loop iterations to perform.
   427         */
   428        Void sysCtlDelayI(ULong ulCount);
   429
   430        /*
   431         *  ======== init ========
   432         *  Generated entry point into clock initialization function.
   433         *
   434         *  Installed as a Startup.firstFxn.
   435         *  Calls either Boot_sysCtlClockSet() or Boot_sysCtlClockFreqSet()
   436         *  depending on value of 'Boot.enhancedClockMode'.
   437         */
   438        Void init();
   439
   440        /*!
   441         *  computed RCC value based on settings
   442         */
   443        metaonly config UInt ulConfig;
   444
   445        /*!
   446         *  computed cpu frequency based on clock settings
   447         */
   448        metaonly config UInt computedCpuFrequency;
   449
   450    };


package ti.catalog.arm.cortexm4.tiva.ce

     1    /*
     2     *  ======== package.xdc ========
     3     *
     4     *! Revision History
     5     *! ================
     6     *! 10-Aug-2009 agd     created
     7     */
     8
     9    /*!
    10     *  ======== ti.catalog.arm.cortexm4.tiva.ce ========
    11     *  Cortex LM3 boot time initialization support
    12     */
    13    package ti.catalog.arm.cortexm4.tiva.ce [1,0,0] {
    14        module Boot;
    15    }


module ti.catalog.arm.cortexr4.CortexR

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CortexR.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all CortexR devices.
    38     */
    39
    40    metaonly module CortexR inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "R4";
    44        override config string   isa            = "v7R";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


package ti.catalog.arm.cortexr4

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== ti.catalog.arm.cortexr5  ========
    37     *  Package of devices for the arm Cortex R5 family of Arm processors.
    38     *
    39     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    40     *  interface. This interface is used by platforms (modules that implement
    41     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    42     */
    43    package ti.catalog.arm.cortexr4 [1,0,0] {
    44        module CortexR;
    45    }


module ti.catalog.arm.cortexr5.CortexR

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== CortexR.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all CortexR devices.
    38     */
    39
    40    metaonly module CortexR inherits ti.catalog.ICpuDataSheet
    41    {
    42    instance:
    43        override config string   cpuCore        = "R5";
    44        override config string   isa            = "v7R";
    45        override config string cpuCoreRevision   = "1.0";
    46        override config int    minProgUnitSize   = 1;
    47        override config int    minDataUnitSize   = 1;
    48        override config int    dataWordSize      = 4;
    49    }


package ti.catalog.arm.cortexr5

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== ti.catalog.arm.cortexr5  ========
    37     *  Package of devices for the arm Cortex R5 family of Arm processors.
    38     *
    39     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    40     *  interface. This interface is used by platforms (modules that implement
    41     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    42     */
    43    package ti.catalog.arm.cortexr5 [1,0,0] {
    44        module CortexR;
    45    }


package ti.catalog.arm.peripherals.timers

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.arm.peripherals.timers ========
    35     *  Arm timer peripherals
    36     */
    37    package ti.catalog.arm.peripherals.timers {
    38        module Timer;
    39    }


module ti.catalog.arm.peripherals.timers.Timer

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer ========
    35     *  Minimal timer definition
    36     */
    37    metaonly module Timer inherits xdc.platform.IPeripheral {
    38
    39    instance:
    40        /*!
    41         *  ======== baseAddr ========
    42         *  Address of the peripheral's control register.
    43         *
    44         *  A peripheral's registers are commonly accessed through a structure
    45         *  that defines the offsets of a particular register from the lowest
    46         *  address mapped to a peripheral. That lowest address is specified by
    47         *  this parameter.
    48         */
    49        config UInt baseAddr;
    50
    51        /*!
    52         *  ======== intNum ========
    53         *  Interrupt source number
    54         *
    55         */
    56        config UInt intNum;
    57    }


module ti.catalog.arp32.Arctic

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Arctic.xdc ========
    35     */
    36
    37    package ti.catalog.arp32;
    38
    39    /*!
    40     *  ======== Arctic ========
    41     *  The Arctic device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     *
    46     */
    47    metaonly module Arctic inherits ti.catalog.ICpuDataSheet
    48    {
    49    instance:
    50        override config string cpuCore           = "ARP32";
    51        override config string isa               = "arp32";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string]  = [
    62
    63            ["DMEM", {
    64                comment: "32KB data memory",
    65                name: "DMEM",
    66                base: 0x40020000,
    67                len:  0x8000,
    68                space: "data",
    69                page: 1,
    70                access: "RW"
    71            }],
    72
    73            ["WBUF", {
    74                comment: "VCOP work buffer",
    75                name: "WBUF",
    76                base: 0x40040000,
    77                len:  0x8000,
    78                space: "data",
    79                page: 1,
    80                access: "RW"
    81            }],
    82
    83            ["IBUFLA", {
    84                comment: "Image buffer low copy A",
    85                name: "IBUFLA",
    86                base: 0x40050000,
    87                len:  0x4000,
    88                space: "data",
    89                page: 1,
    90                access: "RW"
    91            }],
    92
    93            ["IBUFHA", {
    94                comment: "Image buffer high copy A",
    95                name: "IBUFHA",
    96                base: 0x40054000,
    97                len:  0x4000,
    98                space: "data",
    99                page: 1,
   100                access: "RW"
   101            }],
   102
   103            ["IBUFLB", {
   104                comment: "Image buffer low copy B",
   105                name: "IBUFLB",
   106                base: 0x40070000,
   107                len:  0x4000,
   108                space: "data",
   109                page: 1,
   110                access: "RW"
   111            }],
   112
   113            ["IBUFHB", {
   114                comment: "Image buffer high copy B",
   115                name: "IBUFHB",
   116                base: 0x40074000,
   117                len:  0x4000,
   118                space: "data",
   119                page: 1,
   120                access: "RW"
   121            }],
   122
   123            ["L3MEM", {
   124                comment:    "1MB L3 Memory",
   125                name:       "L3MEM",
   126                base:       0x40300000,
   127                len:        0x00100000,
   128                space:      "code/data",
   129                page: 1,
   130                access:     "RWX"
   131            }],
   132        ];
   133    };


module ti.catalog.arp32.DRA7XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== DRA7XX.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.arp32;
    39
    40    /*!
    41     *  ======== DRA7XX ========
    42     *  The DRA7XX device data sheet module.
    43     *
    44     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     *
    47     */
    48    metaonly module DRA7XX inherits ti.catalog.ICpuDataSheet
    49    {
    50    instance:
    51        override config string cpuCore           = "ARP32";
    52        override config string isa               = "arp32";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        /*!
    59         *  ======== memMap ========
    60         *  The memory map returned be getMemoryMap().
    61         */
    62        config xdc.platform.IPlatform.Memory memMap[string]  = [
    63
    64            ["DMEM", {
    65                comment: "32KB data memory",
    66                name: "DMEM",
    67                base: 0x40020000,
    68                len:  0x8000,
    69                space: "data",
    70                page: 1,
    71                access: "RW"
    72            }],
    73
    74            ["WBUF", {
    75                comment: "VCOP work buffer",
    76                name: "WBUF",
    77                base: 0x40040000,
    78                len:  0x8000,
    79                space: "data",
    80                page: 1,
    81                access: "RW"
    82            }],
    83
    84            ["IBUFLA", {
    85                comment: "Image buffer low copy A",
    86                name: "IBUFLA",
    87                base: 0x40050000,
    88                len:  0x4000,
    89                space: "data",
    90                page: 1,
    91                access: "RW"
    92            }],
    93
    94            ["IBUFHA", {
    95                comment: "Image buffer high copy A",
    96                name: "IBUFHA",
    97                base: 0x40054000,
    98                len:  0x4000,
    99                space: "data",
   100                page: 1,
   101                access: "RW"
   102            }],
   103
   104            ["IBUFLB", {
   105                comment: "Image buffer low copy B",
   106                name: "IBUFLB",
   107                base: 0x40070000,
   108                len:  0x4000,
   109                space: "data",
   110                page: 1,
   111                access: "RW"
   112            }],
   113
   114            ["IBUFHB", {
   115                comment: "Image buffer high copy B",
   116                name: "IBUFHB",
   117                base: 0x40074000,
   118                len:  0x4000,
   119                space: "data",
   120                page: 1,
   121                access: "RW"
   122            }],
   123
   124            ["OCMC_RAM1", {
   125                comment:    "OCMC (On-chip RAM) Bank 1 (512KB)",
   126                name:       "OCMC_RAM1",
   127                base:       0x40300000,
   128                len:        0x00080000,
   129                space:      "code/data",
   130                page: 1,
   131                access:     "RWX"
   132            }],
   133
   134            ["OCMC_RAM2", {
   135                comment:    "OCMC (On-chip RAM) Bank 2 (1MB)",
   136                name:       "OCMC_RAM2",
   137                base:       0x40400000,
   138                len:        0x00100000,
   139                space:      "code/data",
   140                page: 1,
   141                access:     "RWX"
   142            }],
   143
   144            ["OCMC_RAM3", {
   145                comment:    "OCMC (On-chip RAM) Bank 3 (1MB)",
   146                name:       "OCMC_RAM3",
   147                base:       0x40500000,
   148                len:        0x00100000,
   149                space:      "code/data",
   150                page: 1,
   151                access:     "RWX"
   152            }],
   153
   154        ];
   155    };


package ti.catalog.arp32

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== ti.catalog.arp32 ========
    37     *  Package of devices for the arp32 family of DSPs.
    38     *
    39     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    40     *  interface.  This interface is used by platforms (modules that implement
    41     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    42     */
    43    package ti.catalog.arp32 [1,0,0,0] {
    44        module TMS320C6A8149;
    45        module Arctic;
    46        module Vayu;
    47        module DRA7XX;
    48        module TDA3XX;
    49    }


module ti.catalog.arp32.TDA3XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TDA3XX.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.arp32;
    39
    40    /*!
    41     *  ======== TDA3XX ========
    42     *  The TDA3XX device data sheet module.
    43     *
    44     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     *
    47     */
    48    metaonly module TDA3XX inherits ti.catalog.ICpuDataSheet
    49    {
    50    instance:
    51        override config string cpuCore           = "ARP32";
    52        override config string isa               = "arp32";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        /*!
    59         *  ======== memMap ========
    60         *  The memory map returned be getMemoryMap().
    61         */
    62        config xdc.platform.IPlatform.Memory memMap[string]  = [
    63
    64            ["DMEM", {
    65                comment: "32KB data memory",
    66                name: "DMEM",
    67                base: 0x40020000,
    68                len:  0x8000,
    69                space: "data",
    70                page: 1,
    71                access: "RW"
    72            }],
    73
    74            ["WBUF", {
    75                comment: "VCOP work buffer",
    76                name: "WBUF",
    77                base: 0x40040000,
    78                len:  0x8000,
    79                space: "data",
    80                page: 1,
    81                access: "RW"
    82            }],
    83
    84            ["IBUFLA", {
    85                comment: "Image buffer low copy A",
    86                name: "IBUFLA",
    87                base: 0x40050000,
    88                len:  0x4000,
    89                space: "data",
    90                page: 1,
    91                access: "RW"
    92            }],
    93
    94            ["IBUFHA", {
    95                comment: "Image buffer high copy A",
    96                name: "IBUFHA",
    97                base: 0x40054000,
    98                len:  0x4000,
    99                space: "data",
   100                page: 1,
   101                access: "RW"
   102            }],
   103
   104            ["IBUFLB", {
   105                comment: "Image buffer low copy B",
   106                name: "IBUFLB",
   107                base: 0x40070000,
   108                len:  0x4000,
   109                space: "data",
   110                page: 1,
   111                access: "RW"
   112            }],
   113
   114            ["IBUFHB", {
   115                comment: "Image buffer high copy B",
   116                name: "IBUFHB",
   117                base: 0x40074000,
   118                len:  0x4000,
   119                space: "data",
   120                page: 1,
   121                access: "RW"
   122            }]
   123        ];
   124    };


module ti.catalog.arp32.TMS320C6A8149

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6A8149.xdc ========
    35     */
    36
    37    package ti.catalog.arp32;
    38
    39    /*!
    40     *  ======== TMS320C6A8149 ========
    41     *  The TMS320C6A8149 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     *
    46     */
    47    metaonly module TMS320C6A8149 inherits ti.catalog.ICpuDataSheet
    48    {
    49    instance:
    50        override config string cpuCore           = "ARP32";
    51        override config string isa               = "arp32";
    52        override config string cpuCoreRevision   = "1.0";
    53        override config int    minProgUnitSize   = 1;
    54        override config int    minDataUnitSize   = 1;
    55        override config int    dataWordSize      = 4;
    56
    57        /*!
    58         *  ======== memMap ========
    59         *  The memory map returned be getMemoryMap().
    60         */
    61        config xdc.platform.IPlatform.Memory memMap[string]  = [
    62
    63            ["DMEM", {
    64                comment: "32KB data memory",
    65                name: "DMEM",
    66                base: 0x40020000,
    67                len:  0x8000,
    68                space: "data",
    69                page: 1,
    70                access: "RW"
    71            }],
    72
    73            ["WBUF", {
    74                comment: "VCOP work buffer",
    75                name: "WBUF",
    76                base: 0x40040000,
    77                len:  0x8000,
    78                space: "data",
    79                page: 1,
    80                access: "RW"
    81            }],
    82
    83            ["IBUFLA", {
    84                comment: "Image buffer low copy A",
    85                name: "IBUFLA",
    86                base: 0x40050000,
    87                len:  0x4000,
    88                space: "data",
    89                page: 1,
    90                access: "RW"
    91            }],
    92
    93            ["IBUFHA", {
    94                comment: "Image buffer high copy A",
    95                name: "IBUFHA",
    96                base: 0x40054000,
    97                len:  0x4000,
    98                space: "data",
    99                page: 1,
   100                access: "RW"
   101            }],
   102
   103            ["IBUFLB", {
   104                comment: "Image buffer low copy B",
   105                name: "IBUFLB",
   106                base: 0x40070000,
   107                len:  0x4000,
   108                space: "data",
   109                page: 1,
   110                access: "RW"
   111            }],
   112
   113            ["IBUFHB", {
   114                comment: "Image buffer high copy B",
   115                name: "IBUFHB",
   116                base: 0x40074000,
   117                len:  0x4000,
   118                space: "data",
   119                page: 1,
   120                access: "RW"
   121            }],
   122
   123            ["OCMC", {
   124                comment:    "128KB L3 OCMC Memory",
   125                name:       "OCMC",
   126                base:       0x40300000,
   127                len:        0x00020000,
   128                space:      "code/data",
   129                page: 1,
   130                access:     "RWX"
   131            }],
   132        ];
   133    };


module ti.catalog.arp32.Vayu

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Vayu.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.arp32;
    39
    40    /*!
    41     *  ======== Vayu ========
    42     *  The Vayu device data sheet module.
    43     *
    44     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     *
    47     */
    48    metaonly module Vayu inherits ti.catalog.ICpuDataSheet
    49    {
    50    instance:
    51        override config string cpuCore           = "ARP32";
    52        override config string isa               = "arp32";
    53        override config string cpuCoreRevision   = "1.0";
    54        override config int    minProgUnitSize   = 1;
    55        override config int    minDataUnitSize   = 1;
    56        override config int    dataWordSize      = 4;
    57
    58        /*!
    59         *  ======== memMap ========
    60         *  The memory map returned be getMemoryMap().
    61         */
    62        config xdc.platform.IPlatform.Memory memMap[string]  = [
    63
    64            ["DMEM", {
    65                comment: "32KB data memory",
    66                name: "DMEM",
    67                base: 0x40020000,
    68                len:  0x8000,
    69                space: "data",
    70                page: 1,
    71                access: "RW"
    72            }],
    73
    74            ["WBUF", {
    75                comment: "VCOP work buffer",
    76                name: "WBUF",
    77                base: 0x40040000,
    78                len:  0x8000,
    79                space: "data",
    80                page: 1,
    81                access: "RW"
    82            }],
    83
    84            ["IBUFLA", {
    85                comment: "Image buffer low copy A",
    86                name: "IBUFLA",
    87                base: 0x40050000,
    88                len:  0x4000,
    89                space: "data",
    90                page: 1,
    91                access: "RW"
    92            }],
    93
    94            ["IBUFHA", {
    95                comment: "Image buffer high copy A",
    96                name: "IBUFHA",
    97                base: 0x40054000,
    98                len:  0x4000,
    99                space: "data",
   100                page: 1,
   101                access: "RW"
   102            }],
   103
   104            ["IBUFLB", {
   105                comment: "Image buffer low copy B",
   106                name: "IBUFLB",
   107                base: 0x40070000,
   108                len:  0x4000,
   109                space: "data",
   110                page: 1,
   111                access: "RW"
   112            }],
   113
   114            ["IBUFHB", {
   115                comment: "Image buffer high copy B",
   116                name: "IBUFHB",
   117                base: 0x40074000,
   118                len:  0x4000,
   119                space: "data",
   120                page: 1,
   121                access: "RW"
   122            }]
   123        ];
   124    };


module ti.catalog.c2800.F28M35x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== F28M35x.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== F28M35x ========
    41     *  The F28M35x device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module F28M35x inherits ITMS320C283xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["M01SARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "M01SARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 1,
    62                space: "code/data",
    63                access: "RWX"
    64            }],
    65
    66            ["PIEVECT", {
    67                comment: "On-Chip PIEVECT RAM Memory",
    68                name: "PIEVECT",
    69                base: 0xD00,
    70                len:  0x100,
    71                page: 0,
    72                space: "data",
    73                access: "RW"
    74            }],
    75
    76            ["L03SARAM", {
    77                comment: "On-Chip RAM Memory",
    78                name: "L03SARAM",
    79                base: 0x8000,
    80                len:  0x4000,
    81                page: 1,
    82                space: "code/data",
    83                access: "RWX"
    84            }],
    85
    86            ["S07SHRAM", {
    87                comment: "On-Chip Shared RAM Memory",
    88                name: "S07SHRAM",
    89                base: 0xC000,
    90                len:  0x8000,
    91                page: 1,
    92                space: "code/data",
    93                access: "RWX"
    94            }],
    95
    96            ["CTOMMSGRAM", {
    97                comment: "C28 to M3 MSG RAM Memory",
    98                name: "CTOMMSGRAM",
    99                base: 0x3F800,
   100                len:  0x00400,
   101                page: 1,
   102                space: "data",
   103                access: "RW"
   104            }],
   105
   106            ["MTOCMSGRAM", {
   107                comment: "M3 to C28 MSG RAM Memory",
   108                name: "MTOCMSGRAM",
   109                base: 0x3FC00,
   110                len:  0x00400,
   111                page: 1,
   112                space: "data",
   113                access: "R"
   114            }],
   115
   116            ["OTP", {
   117                comment: "1K X 16 OTP memory",
   118                name: "OTP",
   119                base: 0x240400,
   120                len:  0x000400,
   121                page: 0,
   122                space: "code",
   123                access: "RWX"
   124            }],
   125
   126            ["FLASH", {
   127                comment: "256K X 16 Flash memory",
   128                name: "FLASH",
   129                base: 0x100000,
   130                len:  0x03fffe,
   131                page: 0,
   132                space: "code/data",
   133                access: "RWX"
   134            }],
   135
   136            ["BEGIN", {
   137                comment: "Used for Flash boot",
   138                name: "BEGIN",
   139                base: 0x13fffe,
   140                len:  0x000002,
   141                page: 0,
   142                space: "code/data",
   143                access: "RWX"
   144            }],
   145
   146            ["BOOTROM", {
   147                comment: "On-Chip Boot ROM",
   148                name: "BOOTROM",
   149                base: 0x3f8000,
   150                len:  0x008000,
   151                page: 0,
   152                space: "code",
   153                access: "RX"
   154            }],
   155        ];
   156    };


interface ti.catalog.c2800.ITMS320C28xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28xx.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320C28xx ========
    40     *  An interface implemented by all TMS320C28xx devices.
    41     *
    42     *  This interface is defined to factor common data about this family into
    43     *  a single place; all TMS320C28xx devices extend this interface.
    44     */
    45    metaonly interface ITMS320C28xx inherits ti.catalog.ICpuDataSheet
    46    {
    47    instance:
    48        override config string   cpuCore        = "2800";
    49        override config string   isa            = "28";
    50
    51        override config int     minProgUnitSize = 2;
    52        override config int     minDataUnitSize = 1;
    53        override config int     dataWordSize    = 2;
    54    };


interface ti.catalog.c2800.ITMS320C283xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C283xx.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320C283xx ========
    40     *  An interface implemented by all TMS320C28xx devices.
    41     *
    42     *  This interface is defined to factor common data about this family into
    43     *  a single place; all TMS320C28xx devices extend this interface.
    44     */
    45    metaonly interface ITMS320C283xx inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   isa            = "28FP";
    49    };


interface ti.catalog.c2800.ITMS320C28026

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28026.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320C28026 ========
    40     *  The C28026 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C28026 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["LSARAM", {
    74                comment: "L0 SARAM (4K x 16)",
    75                name: "LSARAM",
    76                base: 0x8000,
    77                len:  0x1000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["FLASH", {
    83                comment: "16K X 16 Flash memory",
    84                name: "FLASH",
    85                base: 0x3f4000,
    86                len:  0x003f80,
    87                page: 0,
    88                space: "code"
    89            }],
    90
    91            ["BEGIN", {
    92                comment: "FLASH boot entry point",
    93                name: "BEGIN",
    94                base: 0x3f7ff6,
    95                len:  0x000002,
    96                page: 0,
    97                space: "code"
    98            }],
    99
   100            ["BOOTROM", {
   101                comment: "On-Chip Boot ROM",
   102                name: "BOOTROM",
   103                base: 0x3fe000,
   104                len:  0x001fc0,
   105                page: 0,
   106                space: "code"
   107            }],
   108        ];
   109    }


interface ti.catalog.c2800.ITMS320C28027

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28027.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320C28027 ========
    40     *  The C28027 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C28027 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["LSARAM", {
    74                comment: "L0 SARAM (4K x 16)",
    75                name: "LSARAM",
    76                base: 0x8000,
    77                len:  0x1000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["FLASH", {
    83                comment: "32K X 16 Flash memory",
    84                name: "FLASH",
    85                base: 0x3f0000,
    86                len:  0x007f80,
    87                page: 0,
    88                space: "code"
    89            }],
    90
    91            ["BEGIN", {
    92                comment: "FLASH boot entry point",
    93                name: "BEGIN",
    94                base: 0x3f7ff6,
    95                len:  0x000002,
    96                page: 0,
    97                space: "code"
    98            }],
    99            ["BOOTROM", {
   100                comment: "On-Chip Boot ROM",
   101                name: "BOOTROM",
   102                base: 0x3fe000,
   103                len:  0x001fc0,
   104                page: 0,
   105                space: "code"
   106            }],
   107        ];
   108    }


interface ti.catalog.c2800.ITMS320C28032

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28032.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320C28032 ========
    40     *  The C28032 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C28032 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["LSARAM", {
    74                comment: "On-Chip RAM Memory",
    75                name: "LSARAM",
    76                base: 0x8000,
    77                len:  0x800,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["DPSARAM", {
    83                comment: "DPSARAM (6K x 16)",
    84                name: "DPSARAM",
    85                base: 0x8800,
    86                len:  0xa000,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["FLASH", {
    92                comment: "32K X 16 Flash memory",
    93                name: "FLASH",
    94                base: 0x3f0000,
    95                len:  0x007f80,
    96                page: 0,
    97                space: "code"
    98            }],
    99
   100            ["BEGIN", {
   101                comment: "FLASH boot entry point",
   102                name: "BEGIN",
   103                base: 0x3f7ff6,
   104                len:  0x000002,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["BOOTROM", {
   110                comment: "On-Chip Boot ROM",
   111                name: "BOOTROM",
   112                base: 0x3fe000,
   113                len:  0x001fc0,
   114                page: 0,
   115                space: "code"
   116            }],
   117        ];
   118    }


interface ti.catalog.c2800.ITMS320C28034

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28034.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320C28034 ========
    40     *  The C28034 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C28034 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["LSARAM", {
    74                comment: "LSARAM (2K x 16)",
    75                name: "LSARAM",
    76                base: 0x8000,
    77                len:  0x0800,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["DPSARAM", {
    83                comment: "DPSARAM (6K x 16)",
    84                name: "DPSARAM",
    85                base: 0x8800,
    86                len:  0x1800,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["FLASH", {
    92                comment: "64K X 16 Flash memory",
    93                name: "FLASH",
    94                base: 0x3e8000,
    95                len:  0x00ff80,
    96                page: 0,
    97                space: "code"
    98            }],
    99
   100            ["BEGIN", {
   101                comment: "FLASH boot entry point",
   102                name: "BEGIN",
   103                base: 0x3f7ff6,
   104                len:  0x000002,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["BOOTROM", {
   110                comment: "On-Chip Boot ROM",
   111                name: "BOOTROM",
   112                base: 0x3fe000,
   113                len:  0x001fc0,
   114                page: 0,
   115                space: "code"
   116            }],
   117        ];
   118    }


interface ti.catalog.c2800.ITMS320C28342

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28342.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C28342 ========
    40     *  The C28342 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C28342 inherits ITMS320C283xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L03SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L03SARAM",
    77                base: 0x8000,
    78                len:  0x8000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["H01SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "H01SARAM",
    86                base: 0x300000,
    87                len:  0x010000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["BOOTROM", {
    93                comment: "On-Chip Boot ROM",
    94                name: "BOOTROM",
    95                base: 0x3fe000,
    96                len:  0x1fc0,
    97                page: 0,
    98                space: "code"
    99            }],
   100        ];
   101    }


interface ti.catalog.c2800.ITMS320C28344

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28344.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C28344 ========
    40     *  The C28344 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C28344 inherits ITMS320C283xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["L03SARAM", {
    74                comment: "On-Chip RAM Memory",
    75                name: "L03SARAM",
    76                base: 0x8000,
    77                len:  0x8000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["L47SARAM", {
    83                comment: "On-Chip RAM Memory",
    84                name: "L47SARAM",
    85                base: 0x10000,
    86                len:  0x8000,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["H01SARAM", {
    92                comment: "On-Chip RAM Memory",
    93                name: "H01SARAM",
    94                base: 0x300000,
    95                len:  0x010000,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["BOOTROM", {
   101                comment: "On-Chip Boot ROM",
   102                name: "BOOTROM",
   103                base: 0x3fe000,
   104                len:  0x1fc0,
   105                page: 0,
   106                space: "code"
   107            }],
   108        ];
   109    }


interface ti.catalog.c2800.ITMS320C28346

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28346.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C28346 ========
    40     *  The C28346 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C28346 inherits ITMS320C283xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["L03SARAM", {
    74                comment: "On-Chip RAM Memory",
    75                name: "L03SARAM",
    76                base: 0x8000,
    77                len:  0x8000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["L47SARAM", {
    83                comment: "On-Chip RAM Memory",
    84                name: "L47SARAM",
    85                base: 0x10000,
    86                len:  0x8000,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["H05SARAM", {
    92                comment: "On-Chip RAM Memory",
    93                name: "H05SARAM",
    94                base: 0x300000,
    95                len:  0x030000,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["BOOTROM", {
   101                comment: "On-Chip Boot ROM",
   102                name: "BOOTROM",
   103                base: 0x3fe000,
   104                len:  0x1fc0,
   105                page: 0,
   106                space: "code"
   107            }],
   108        ];
   109    };


interface ti.catalog.c2800.ITMS320F28065

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320F28065.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320F28065 ========
    40     */
    41    metaonly interface ITMS320F28065 inherits ITMS320C283xx
    42    {
    43    instance:
    44        override config string   cpuCoreRevision = "1.0";
    45
    46        /*!
    47         *  ======== memMap ========
    48         *  The default memory map for this device
    49         */
    50        config xdc.platform.IPlatform.Memory memMap[string]  = [
    51            ["MSARAM", {
    52                comment: "On-Chip RAM Memory",
    53                name: "MSARAM",
    54                base: 0x0,
    55                len:  0x800,
    56                page: 0,
    57                space: "code/data"
    58            }],
    59
    60            ["PIEVECT", {
    61                comment: "On-Chip PIEVECT RAM Memory",
    62                name:    "PIEVECT",
    63                base:    0xD00,
    64                len:     0x100,
    65                page: 1,
    66                space:   "data"
    67            }],
    68
    69            ["L03DPSARAM", {
    70                comment: "L0-L3 DPSARAM (8K x 16)",
    71                name: "L03DPSARAM",
    72                base: 0x8000,
    73                len:  0x2000,
    74                page: 0,
    75                space: "code/data"
    76            }],
    77
    78            ["L4SARAM", {
    79                comment: "L4 SARAM (8K x 16)",
    80                name: "L4SARAM",
    81                base: 0xA000,
    82                len:  0x2000,
    83                page: 0,
    84                space: "code/data"
    85            }],
    86
    87            /* L5-L8 DPSARAM had to be split on 0xFFFF, to allow stack allocation
    88             * to L56DPSARAM and still be sure stack will stay below 0xFFFF.
    89             */
    90            ["L56DPSARAM", {
    91                comment: "L5-L6 DPSARAM (16K x 16)",
    92                name: "L56DPSARAM",
    93                base: 0xC000,
    94                len:  0x4000,
    95                page: 0,
    96                space: "code/data"
    97            }],
    98
    99            ["L78DPSARAM", {
   100                comment: "L7-L8 DPSARAM (16K x 16)",
   101                name: "L78DPSARAM",
   102                base: 0x10000,
   103                len:  0x04000,
   104                page: 0,
   105                space: "code/data"
   106            }],
   107
   108            ["OTP", {
   109                comment: "1K X 16 OTP memory",
   110                name: "OTP",
   111                base: 0x3D7800,
   112                len:  0x0003FA,
   113                page: 0,
   114                space: "code"
   115            }],
   116
   117            ["FLASH", {
   118                comment: "64K X 16 Flash memory",
   119                name: "FLASH",
   120                base: 0x3E8000,
   121                len:  0x00FF80,
   122                page: 0,
   123                space: "code"
   124            }],
   125
   126            ["BEGIN", {
   127                comment: "FLASH boot entry point",
   128                name: "BEGIN",
   129                base: 0x3f7ff6,
   130                len:  0x000002,
   131                page: 0,
   132                space: "code"
   133            }],
   134
   135            ["BOOTROM", {
   136                comment: "On-Chip Boot ROM",
   137                name: "BOOTROM",
   138                base: 0x3F8000,
   139                len:  0x007FC0,
   140                page: 0,
   141                space: "code"
   142            }],
   143        ];
   144    }


interface ti.catalog.c2800.ITMS320F28069

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320F28069.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320F28069 ========
    40     */
    41    metaonly interface ITMS320F28069 inherits ITMS320C283xx
    42    {
    43    instance:
    44        override config string   cpuCoreRevision = "1.0";
    45
    46        /*!
    47         *  ======== memMap ========
    48         *  The default memory map for this device
    49         */
    50        config xdc.platform.IPlatform.Memory memMap[string]  = [
    51            ["MSARAM", {
    52                comment: "On-Chip RAM Memory",
    53                name: "MSARAM",
    54                base: 0x0,
    55                len:  0x800,
    56                page: 0,
    57                space: "code/data"
    58            }],
    59
    60            ["PIEVECT", {
    61                comment: "On-Chip PIEVECT RAM Memory",
    62                name:    "PIEVECT",
    63                base:    0xD00,
    64                len:     0x100,
    65                page: 1,
    66                space:   "data"
    67            }],
    68
    69            ["L03DPSARAM", {
    70                comment: "L0-L3 DPSARAM (8K x 16)",
    71                name: "L03DPSARAM",
    72                base: 0x8000,
    73                len:  0x2000,
    74                page: 0,
    75                space: "code/data"
    76            }],
    77
    78            ["L4SARAM", {
    79                comment: "L4 SARAM (8K x 16)",
    80                name: "L4SARAM",
    81                base: 0xA000,
    82                len:  0x2000,
    83                page: 0,
    84                space: "code/data"
    85            }],
    86
    87            /* L5-L8 DPSARAM had to be split on 0xFFFF, to allow stack allocation
    88             * to L56DPSARAM and still be sure stack will stay below 0xFFFF.
    89             */
    90            ["L56DPSARAM", {
    91                comment: "L5-L6 DPSARAM (16K x 16)",
    92                name: "L56DPSARAM",
    93                base: 0xC000,
    94                len:  0x4000,
    95                page: 0,
    96                space: "code/data"
    97            }],
    98
    99            ["L78DPSARAM", {
   100                comment: "L7-L8 DPSARAM (16K x 16)",
   101                name: "L78DPSARAM",
   102                base: 0x10000,
   103                len:  0x04000,
   104                page: 0,
   105                space: "code/data"
   106            }],
   107
   108            ["OTP", {
   109                comment: "1K X 16 OTP memory",
   110                name: "OTP",
   111                base: 0x3D7800,
   112                len:  0x0003FA,
   113                page: 0,
   114                space: "code"
   115            }],
   116
   117            ["FLASH", {
   118                comment: "128K X 16 Flash memory",
   119                name: "FLASH",
   120                base: 0x3D8000,
   121                len:  0x01FF80,
   122                page: 0,
   123                space: "code"
   124            }],
   125
   126            ["BEGIN", {
   127                comment: "FLASH boot entry point",
   128                name: "BEGIN",
   129                base: 0x3f7ff6,
   130                len:  0x000002,
   131                page: 0,
   132                space: "code"
   133            }],
   134
   135            ["BOOTROM", {
   136                comment: "On-Chip Boot ROM",
   137                name: "BOOTROM",
   138                base: 0x3F8000,
   139                len:  0x007FC0,
   140                page: 0,
   141                space: "code"
   142            }],
   143        ];
   144    }


package ti.catalog.c2800

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== ti.catalog.c2800 ========
    37     *  Package of devices for the c2800 family of DSPs.
    38     *
    39     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    40     *  interface. This interface is used by platforms (modules that implement
    41     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    42     */
    43    package ti.catalog.c2800 [1,0,0,0] {
    44        interface ITMS320C28xx,ITMS320C283xx;
    45
    46        module TMS320C2801, TMS320C2802, TMS320C2806, TMS320C2808, TMS320C2809;
    47        module TMS320C2810, TMS320C2811, TMS320C2812, TMS320C28015, TMS320C28016;
    48        module TMS320C28232, TMS320C28234, TMS320C28235;
    49        module TMS320C28332, TMS320C28334, TMS320C28335;
    50
    51        /* Piccolo Devices */
    52        module TMS320C28020, TMS320C28021;
    53        interface ITMS320C28026;
    54        module TMS320C28022, TMS320C28026;
    55        interface ITMS320C28027;
    56        module TMS320C28023, TMS320C28027;
    57
    58        /* Piccolo-B Devices */
    59        module TMS320C28030, TMS320C28031;
    60        interface ITMS320C28032;
    61        module TMS320C28032, TMS320C28033;
    62        interface ITMS320C28034;
    63        module TMS320C28034, TMS320C28035;
    64
    65        module TMS320C28044;
    66
    67        /* Delfino Devices */
    68        interface ITMS320C28342;
    69        module TMS320C28341, TMS320C28342;
    70        interface ITMS320C28344;
    71        module TMS320C28343, TMS320C28344;
    72        interface ITMS320C28346;
    73        module TMS320C28345, TMS320C28346;
    74
    75        /* Octave Devices */
    76        module TMS320F28062, TMS320F28063;
    77        interface ITMS320F28065;
    78        module TMS320F28064, TMS320F28065;
    79        module TMS320F28066;
    80        interface ITMS320F28069;
    81        module TMS320F28067, TMS320F28068, TMS320F28069;
    82
    83        module F28M35x;
    84    }


module ti.catalog.c2800.TMS320C2801

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2801.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C2801 ========
    41     *  The C2801 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C2801 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name: "PIEVECT",
    68                base: 0xD00,
    69                len:  0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["LSARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "LSARAM",
    77                base: 0x8000,
    78                len:  0x1000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["OTP", {
    84                comment: "1K X 16 OTP memory",
    85                name: "OTP",
    86                base: 0x3D7800,
    87                len:  0x000400,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["FLASH", {
    93                comment: "16K X 16 Flash memory",
    94                name: "FLASH",
    95                base: 0x3F4000,
    96                len:  0x004000,
    97                page: 0,
    98                space: "code/data"
    99            }],
   100
   101            ["BOOTROM", {
   102                comment: "On-Chip Boot ROM",
   103                name: "BOOTROM",
   104                base: 0x3FF000,
   105                len:  0x000FC0,
   106                page: 0,
   107                space: "code/data"
   108            }],
   109        ];
   110    };


module ti.catalog.c2800.TMS320C2802

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2802.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C2802 ========
    41     *  The C2802 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C2802 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name: "PIEVECT",
    68                base: 0xD00,
    69                len:  0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["LSARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "LSARAM",
    77                base: 0x8000,
    78                len:  0x1000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["OTP", {
    84                comment: "1K X 16 OTP memory",
    85                name: "OTP",
    86                base: 0x3D7800,
    87                len:  0x000400,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["FLASH", {
    93                comment: "32K X 16 Flash memory",
    94                name: "FLASH",
    95                base: 0x3F0000,
    96                len:  0x008000,
    97                page: 0,
    98                space: "code/data"
    99            }],
   100
   101            ["BOOTROM", {
   102                comment: "On-Chip Boot ROM",
   103                name: "BOOTROM",
   104                base: 0x3FF000,
   105                len:  0x000FC0,
   106                page: 0,
   107                space: "code/data"
   108            }],
   109        ];
   110    };


module ti.catalog.c2800.TMS320C2806

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2806.xdc ========
    35     *
    36     *! 07-Apr-2005 sasha   Moved L1SARAM from 0x3F9000 to 0x9000 (Cindy's review)
    37     *! 17-Mar-2005 sasha   Created
    38     */
    39    package ti.catalog.c2800;
    40
    41    /*!
    42     *  ======== TMS320C2806 ========
    43     *  The C2806 device data sheet module.
    44     *
    45     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    46     *  by platforms to obtain "data sheet" information about this device.
    47     */
    48    metaonly module TMS320C2806 inherits ITMS320C28xx
    49    {
    50    instance:
    51        override config string   cpuCoreRevision = "1.0";
    52
    53        /*!
    54         *  ======== memMap ========
    55         *  The default memory map for this device
    56         */
    57        config xdc.platform.IPlatform.Memory memMap[string]  = [
    58            ["MSARAM", {
    59                comment: "On-Chip RAM Memory",
    60                name: "MSARAM",
    61                base: 0x0,
    62                len:  0x800,
    63                page: 0,
    64                space: "code/data"
    65            }],
    66
    67            ["PIEVECT", {
    68                comment: "On-Chip PIEVECT RAM Memory",
    69                name:    "PIEVECT",
    70                base:    0xD00,
    71                len:     0x100,
    72                page: 1,
    73                space:   "data"
    74            }],
    75
    76            ["L0SARAM", {
    77                comment: "On-Chip RAM Memory",
    78                name: "L0SARAM",
    79                base: 0x8000,
    80                len:  0x1000,
    81                page: 0,
    82                space: "code/data"
    83            }],
    84
    85            ["L1SARAM", {
    86                comment: "On-Chip RAM Memory",
    87                name: "L1SARAM",
    88                base: 0x9000,
    89                len:  0x1000,
    90                page: 0,
    91                space: "code/data"
    92            }],
    93
    94            ["OTP", {
    95                comment: "1K X 16 OTP memory",
    96                name: "OTP",
    97                base: 0x3D7800,
    98                len:  0x000400,
    99                page: 0,
   100                space: "code/data"
   101            }],
   102
   103            ["FLASH", {
   104                comment: "32K X 16 Flash memory",
   105                name: "FLASH",
   106                base: 0x3F0000,
   107                len:  0x007f80,
   108                page: 0,
   109                space: "code/data"
   110            }],
   111
   112            ["BEGIN", {
   113                comment: "FLASH boot entry point",
   114                name: "BEGIN",
   115                base: 0x3f7ff6,
   116                len:  0x000002,
   117                page: 0,
   118                space: "code"
   119            }],
   120
   121            ["BOOTROM", {
   122                comment: "On-Chip Boot ROM",
   123                name: "BOOTROM",
   124                base: 0x3FC000,
   125                len:  0x003FC0,
   126                page: 0,
   127                space: "code/data"
   128            }],
   129        ];
   130    };


module ti.catalog.c2800.TMS320C2808

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2808.xdc ========
    35     *
    36     *! 07-Apr-2005 sasha   Moved H0SARAM from 0x3FA000 to 0xA000 (Cindy's review)
    37     *! 08-Mar-2005 sasha   Created from C2808.tci.
    38     */
    39    package ti.catalog.c2800;
    40
    41    /*!
    42     *  ======== TMS320C2808 ========
    43     *  The C2808 device data sheet module.
    44     *
    45     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    46     *  by platforms to obtain "data sheet" information about this device.
    47     */
    48    metaonly module TMS320C2808 inherits ITMS320C28xx
    49    {
    50    instance:
    51        override config string   cpuCoreRevision = "1.0";
    52
    53        /*!
    54         *  ======== memMap ========
    55         *  The default memory map for this device
    56         */
    57        config xdc.platform.IPlatform.Memory memMap[string]  = [
    58            ["MSARAM", {
    59                comment: "On-Chip RAM Memory",
    60                name: "MSARAM",
    61                base: 0x0,
    62                len:  0x800,
    63                page: 0,
    64                space: "code/data"
    65            }],
    66
    67            ["PIEVECT", {
    68                comment: "On-Chip PIEVECT RAM Memory",
    69                name:    "PIEVECT",
    70                base:    0xD00,
    71                len:     0x100,
    72                page: 1,
    73                space:   "data"
    74            }],
    75
    76            ["LSARAM", {
    77                comment: "On-Chip RAM Memory",
    78                name: "LSARAM",
    79                base: 0x8000,
    80                len:  0x2000,
    81                page: 0,
    82                space: "code/data"
    83            }],
    84
    85            ["OTP", {
    86                comment: "1K X 16 OTP memory",
    87                name: "OTP",
    88                base: 0x3D7800,
    89                len:  0x000400,
    90                page: 0,
    91                space: "code/data"
    92            }],
    93
    94            ["FLASH", {
    95                comment: "64K X 16 Flash memory",
    96                name: "FLASH",
    97                base: 0x3E8000,
    98                len:  0x00ff80,
    99                page: 0,
   100                space: "code/data"
   101            }],
   102
   103            ["BEGIN", {
   104                comment: "FLASH boot entry point",
   105                name: "BEGIN",
   106                base: 0x3f7ff6,
   107                len:  0x000002,
   108                page: 0,
   109                space: "code"
   110            }],
   111
   112            ["H0SARAM", {
   113                comment: "On-Chip RAM Memory",
   114                name: "H0SARAM",
   115                base: 0xA000,
   116                len:  0x2000,
   117                page: 0,
   118                space: "code/data"
   119            }],
   120
   121            ["BOOTROM", {
   122                comment: "On-Chip Boot ROM",
   123                name: "BOOTROM",
   124                base: 0x3FF000,
   125                len:  0x000FC0,
   126                page: 0,
   127                space: "code/data"
   128            }],
   129        ];
   130    };


module ti.catalog.c2800.TMS320C2809

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2809.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C2809 ========
    41     *  The C2809 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C2809 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["LSARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "LSARAM",
    77                base: 0x8000,
    78                len:  0x2000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["OTP", {
    84                comment: "1K X 16 OTP memory",
    85                name: "OTP",
    86                base: 0x3D7800,
    87                len:  0x000400,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["FLASH", {
    93                comment: "128K X 16 Flash memory",
    94                name: "FLASH",
    95                base: 0x3D8000,
    96                len:  0x01ff80,
    97                page: 0,
    98                space: "code/data"
    99            }],
   100
   101            ["BEGIN", {
   102                comment: "FLASH boot entry point",
   103                name: "BEGIN",
   104                base: 0x3f7ff6,
   105                len:  0x000002,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["H0SARAM", {
   111                comment: "On-Chip RAM Memory",
   112                name: "H0SARAM",
   113                base: 0xA000,
   114                len:  0x2000,
   115                page: 0,
   116                space: "code/data"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3FF000,
   123                len:  0x000FC0,
   124                page: 0,
   125                space: "code/data"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C2810

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2810.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C2810 ========
    41     *  The C2810 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C2810 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55
    56        config xdc.platform.IPlatform.Memory memMap[string]  = TMS320C2812.memMap;
    57    };


module ti.catalog.c2800.TMS320C2811

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2811.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C2811 ========
    41     *  The C2811 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C2811 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55
    56        config xdc.platform.IPlatform.Memory memMap[string]  = TMS320C2812.memMap;
    57    };


module ti.catalog.c2800.TMS320C2812

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2812.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C2812 ========
    40     *  The C2812 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C2812 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["LSARAM", {
    74                comment: "On-Chip RAM Memory",
    75                name: "LSARAM",
    76                base: 0x8000,
    77                len:  0x2000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["OTP", {
    83                comment: "2K X 16 OTP memory",
    84                name: "OTP",
    85                base: 0x3d7800,
    86                len:  0x400,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["FLASH", {
    92                comment: "128K X 16 Flash memory",
    93                name: "FLASH",
    94                base: 0x3d8000,
    95                len:  0x1ff80,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["BEGIN", {
   101                comment: "FLASH boot entry point",
   102                name: "BEGIN",
   103                base: 0x3f7ff6,
   104                len:  0x000002,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["H0SARAM", {
   110                comment: "On-Chip RAM Memory",
   111                name: "H0SARAM",
   112                base: 0x3f8000,
   113                len:  0x2000,
   114                page: 0,
   115                space: "code/data"
   116            }],
   117
   118            ["BOOTROM", {
   119                comment: "On-Chip Boot ROM",
   120                name: "BOOTROM",
   121                base: 0x3ff000,
   122                len:  0xfc0,
   123                page: 0,
   124                space: "code/data"
   125            }],
   126        ];
   127    };


module ti.catalog.c2800.TMS320C28015

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28015.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28015 ========
    41     *  The C28015 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28015 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name: "PIEVECT",
    68                base: 0xD00,
    69                len:  0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["LSARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "LSARAM",
    77                base: 0x8000,
    78                len:  0x1000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["OTP", {
    84                comment: "1K X 16 OTP memory",
    85                name: "OTP",
    86                base: 0x3D7800,
    87                len:  0x000400,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["FLASH", {
    93                comment: "16K X 16 Flash memory",
    94                name: "FLASH",
    95                base: 0x3F4000,
    96                len:  0x003f80,
    97                page: 0,
    98                space: "code/data"
    99            }],
   100
   101            ["BEGIN", {
   102                comment: "FLASH boot entry point",
   103                name: "BEGIN",
   104                base: 0x3f7ff6,
   105                len:  0x000002,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BOOTROM", {
   111                comment: "On-Chip Boot ROM",
   112                name: "BOOTROM",
   113                base: 0x3FF000,
   114                len:  0x000FC0,
   115                page: 0,
   116                space: "code/data"
   117            }],
   118        ];
   119    };


module ti.catalog.c2800.TMS320C28016

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28016.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28016 ========
    41     *  The C28016 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28016 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name: "PIEVECT",
    68                base: 0xD00,
    69                len:  0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["LSARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "LSARAM",
    77                base: 0x8000,
    78                len:  0x1000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["OTP", {
    84                comment: "1K X 16 OTP memory",
    85                name: "OTP",
    86                base: 0x3D7800,
    87                len:  0x000400,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["FLASH", {
    93                comment: "16K X 16 Flash memory",
    94                name: "FLASH",
    95                base: 0x3F4000,
    96                len:  0x003f80,
    97                page: 0,
    98                space: "code/data"
    99            }],
   100
   101            ["BEGIN", {
   102                comment: "FLASH boot entry point",
   103                name: "BEGIN",
   104                base: 0x3f7ff6,
   105                len:  0x000002,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BOOTROM", {
   111                comment: "On-Chip Boot ROM",
   112                name: "BOOTROM",
   113                base: 0x3FF000,
   114                len:  0x000FC0,
   115                page: 0,
   116                space: "code/data"
   117            }],
   118        ];
   119    };


module ti.catalog.c2800.TMS320C28020

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28020.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C28020 ========
    40     *  The C28020 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C28020 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["LSARAM", {
    74                comment: "L0 SARAM (1K x 16)",
    75                name: "LSARAM",
    76                base: 0x8000,
    77                len:  0x0400,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["FLASH", {
    83                comment: "16K X 16 Flash memory",
    84                name: "FLASH",
    85                base: 0x3f4000,
    86                len:  0x003f80,
    87                page: 0,
    88                space: "code"
    89            }],
    90
    91            ["BEGIN", {
    92                comment: "FLASH boot entry point",
    93                name: "BEGIN",
    94                base: 0x3f7ff6,
    95                len:  0x000002,
    96                page: 0,
    97                space: "code"
    98            }],
    99
   100            ["BOOTROM", {
   101                comment: "On-Chip Boot ROM",
   102                name: "BOOTROM",
   103                base: 0x3fe000,
   104                len:  0x001fc0,
   105                page: 0,
   106                space: "code"
   107            }],
   108        ];
   109    }


module ti.catalog.c2800.TMS320C28021

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C28021.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C28021 ========
    40     *  The C28021 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C28021 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["LSARAM", {
    74                comment: "L0 SARAM (3K x 16)",
    75                name: "LSARAM",
    76                base: 0x8000,
    77                len:  0x0c00,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["FLASH", {
    83                comment: "32K X 16 Flash memory",
    84                name: "FLASH",
    85                base: 0x3f0000,
    86                len:  0x007f80,
    87                page: 0,
    88                space: "code"
    89            }],
    90
    91            ["BEGIN", {
    92                comment: "FLASH boot entry point",
    93                name: "BEGIN",
    94                base: 0x3f7ff6,
    95                len:  0x000002,
    96                page: 0,
    97                space: "code"
    98            }],
    99
   100            ["BOOTROM", {
   101                comment: "On-Chip Boot ROM",
   102                name: "BOOTROM",
   103                base: 0x3fe000,
   104                len:  0x001fc0,
   105                page: 0,
   106                space: "code"
   107            }],
   108        ];
   109    }


module ti.catalog.c2800.TMS320C28022

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28022 inherits ITMS320C28026
    34    {
    35    }


module ti.catalog.c2800.TMS320C28023

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28023 inherits ITMS320C28027
    34    {
    35    }


module ti.catalog.c2800.TMS320C28026

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28026 inherits ITMS320C28026
    34    {
    35    }


module ti.catalog.c2800.TMS320C28027

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28027 inherits ITMS320C28027
    34    {
    35    }


module ti.catalog.c2800.TMS320C28030

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28030.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C28030 ========
    40     *  The C28030 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C28030 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name: "PIEVECT",
    67                base: 0xD00,
    68                len:  0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["DPSARAM", {
    74                comment: "On-Chip DPSARAM Memory",
    75                name: "DPSARAM",
    76                base: 0x9000,
    77                len:  0x1000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["OTP", {
    83                comment: "1K X 16 OTP memory",
    84                name: "OTP",
    85                base: 0x3D7800,
    86                len:  0x000400,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["FLASH", {
    92                comment: "16K X 16 Flash memory",
    93                name: "FLASH",
    94                base: 0x3F4000,
    95                len:  0x003f80,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["BEGIN", {
   101                comment: "FLASH boot entry point",
   102                name: "BEGIN",
   103                base: 0x3f7ff6,
   104                len:  0x000002,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["L0SARAM", {
   110                comment: "On-Chip L0 SARAM Memory",
   111                name: "L0SARAM",
   112                base: 0x3F8000,
   113                len:  0x000800,
   114                page: 0,
   115                space: "code/data"
   116            }],
   117
   118            ["BOOTROM", {
   119                comment: "On-Chip Boot ROM",
   120                name: "BOOTROM",
   121                base: 0x3FE000,
   122                len:  0x001FC0,
   123                page: 0,
   124                space: "code/data"
   125            }],
   126        ];
   127    };


module ti.catalog.c2800.TMS320C28031

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28031.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320C28031 ========
    40     *  The C28031 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C28031 inherits ITMS320C28xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name: "PIEVECT",
    67                base: 0xD00,
    68                len:  0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["DPSARAM", {
    74                comment: "On-Chip DPSARAM Memory",
    75                name: "DPSARAM",
    76                base: 0x8800,
    77                len:  0x1800,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["OTP", {
    83                comment: "1K X 16 OTP memory",
    84                name: "OTP",
    85                base: 0x3D7800,
    86                len:  0x000400,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["FLASH", {
    92                comment: "32K X 16 Flash memory",
    93                name: "FLASH",
    94                base: 0x3F0000,
    95                len:  0x007f80,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["BEGIN", {
   101                comment: "FLASH boot entry point",
   102                name: "BEGIN",
   103                base: 0x3f7ff6,
   104                len:  0x000002,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["L0SARAM", {
   110                comment: "On-Chip L0 SARAM Memory",
   111                name: "L0SARAM",
   112                base: 0x3F8000,
   113                len:  0x000800,
   114                page: 0,
   115                space: "code/data"
   116            }],
   117
   118            ["BOOTROM", {
   119                comment: "On-Chip Boot ROM",
   120                name: "BOOTROM",
   121                base: 0x3FE000,
   122                len:  0x001FC0,
   123                page: 0,
   124                space: "code/data"
   125            }],
   126        ];
   127    };


module ti.catalog.c2800.TMS320C28032

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28032 inherits ITMS320C28032
    34    {
    35    }


module ti.catalog.c2800.TMS320C28033

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28033 inherits ITMS320C28032
    34    {
    35    }


module ti.catalog.c2800.TMS320C28034

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28034 inherits ITMS320C28034
    34    {
    35    }


module ti.catalog.c2800.TMS320C28035

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28035 inherits ITMS320C28034
    34    {
    35    }


module ti.catalog.c2800.TMS320C28044

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28044.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28044 ========
    41     *  The C28044 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28044 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L0SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L0SARAM",
    77                base: 0x8000,
    78                len:  0x1000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["L1SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "L1SARAM",
    86                base: 0x9000,
    87                len:  0x1000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["OTP", {
    93                comment: "1K X 16 OTP memory",
    94                name: "OTP",
    95                base: 0x3D7800,
    96                len:  0x000400,
    97                page: 0,
    98                space: "code/data"
    99            }],
   100
   101            ["FLASH", {
   102                comment: "64K X 16 Flash memory",
   103                name: "FLASH",
   104                base: 0x3E8000,
   105                len:  0x00ff80,
   106                page: 0,
   107                space: "code/data"
   108            }],
   109
   110            ["BEGIN", {
   111                comment: "FLASH boot entry point",
   112                name: "BEGIN",
   113                base: 0x3f7ff6,
   114                len:  0x000002,
   115                page: 0,
   116                space: "code"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3FF000,
   123                len:  0x000FC0,
   124                page: 0,
   125                space: "code/data"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C28232

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28232.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28232 ========
    41     *  The 28232 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28232 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L03SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L03SARAM",
    77                base: 0x8000,
    78                len:  0x4000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["L47SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "L47SARAM",
    86                base: 0xC000,
    87                len:  0x2000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["OTP", {
    93                comment: "1K X 16 OTP memory",
    94                name: "OTP",
    95                base: 0x380400,
    96                len:  0x400,
    97                page: 0,
    98                space: "code"
    99            }],
   100
   101            ["FLASH", {
   102                comment: "64K X 16 Flash memory",
   103                name: "FLASH",
   104                base: 0x330000,
   105                len:  0x00ff80,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BEGIN", {
   111                comment: "FLASH boot entry point",
   112                name: "BEGIN",
   113                base: 0x33fff6,
   114                len:  0x000002,
   115                page: 0,
   116                space: "code"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3fe000,
   123                len:  0x1fc0,
   124                page: 0,
   125                space: "code"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C28234

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28234.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28234 ========
    41     *  The 28234 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28234 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L03SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L03SARAM",
    77                base: 0x8000,
    78                len:  0x4000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["L47SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "L47SARAM",
    86                base: 0xC000,
    87                len:  0x4000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["OTP", {
    93                comment: "1K X 16 OTP memory",
    94                name: "OTP",
    95                base: 0x380400,
    96                len:  0x400,
    97                page: 0,
    98                space: "code"
    99            }],
   100
   101            ["FLASH", {
   102                comment: "128K X 16 Flash memory",
   103                name: "FLASH",
   104                base: 0x320000,
   105                len:  0x01ff80,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BEGIN", {
   111                comment: "FLASH boot entry point",
   112                name: "BEGIN",
   113                base: 0x33fff6,
   114                len:  0x000002,
   115                page: 0,
   116                space: "code"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3fe000,
   123                len:  0x1fc0,
   124                page: 0,
   125                space: "code"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C28235

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28235.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28235 ========
    41     *  The C28235 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28235 inherits ITMS320C28xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L03SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L03SARAM",
    77                base: 0x8000,
    78                len:  0x4000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["L47SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "L47SARAM",
    86                base: 0xC000,
    87                len:  0x4000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["OTP", {
    93                comment: "1K X 16 OTP memory",
    94                name: "OTP",
    95                base: 0x380400,
    96                len:  0x400,
    97                page: 0,
    98                space: "code"
    99            }],
   100
   101            ["FLASH", {
   102                comment: "256K X 16 Flash memory",
   103                name: "FLASH",
   104                base: 0x300000,
   105                len:  0x03ff80,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BEGIN", {
   111                comment: "FLASH boot entry point",
   112                name: "BEGIN",
   113                base: 0x33fff6,
   114                len:  0x000002,
   115                page: 0,
   116                space: "code"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3fe000,
   123                len:  0x1fc0,
   124                page: 0,
   125                space: "code"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C28332

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28332.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28332 ========
    41     *  The C28332 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28332 inherits ITMS320C283xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L03SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L03SARAM",
    77                base: 0x8000,
    78                len:  0x4000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["L47SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "L47SARAM",
    86                base: 0xC000,
    87                len:  0x2000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["OTP", {
    93                comment: "1K X 16 OTP memory",
    94                name: "OTP",
    95                base: 0x380400,
    96                len:  0x400,
    97                page: 0,
    98                space: "code"
    99            }],
   100
   101            ["FLASH", {
   102                comment: "64K X 16 Flash memory",
   103                name: "FLASH",
   104                base: 0x330000,
   105                len:  0x00ff80,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BEGIN", {
   111                comment: "FLASH boot entry point",
   112                name: "BEGIN",
   113                base: 0x33fff6,
   114                len:  0x000002,
   115                page: 0,
   116                space: "code"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3fe000,
   123                len:  0x1fc0,
   124                page: 0,
   125                space: "code"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C28334

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28334.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28334 ========
    41     *  The C28334 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28334 inherits ITMS320C283xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L03SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L03SARAM",
    77                base: 0x8000,
    78                len:  0x4000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["L47SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "L47SARAM",
    86                base: 0xC000,
    87                len:  0x4000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["OTP", {
    93                comment: "1K X 16 OTP memory",
    94                name: "OTP",
    95                base: 0x380400,
    96                len:  0x400,
    97                page: 0,
    98                space: "code"
    99            }],
   100
   101            ["FLASH", {
   102                comment: "128K X 16 Flash memory",
   103                name: "FLASH",
   104                base: 0x320000,
   105                len:  0x01ff80,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BEGIN", {
   111                comment: "FLASH boot entry point",
   112                name: "BEGIN",
   113                base: 0x33fff6,
   114                len:  0x000002,
   115                page: 0,
   116                space: "code"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3fe000,
   123                len:  0x1fc0,
   124                page: 0,
   125                space: "code"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C28335

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C28335.xdc ========
    35     *
    36     */
    37    package ti.catalog.c2800;
    38
    39    /*!
    40     *  ======== TMS320C28335 ========
    41     *  The C28335 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    44     *  by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C28335 inherits ITMS320C283xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["MSARAM", {
    57                comment: "On-Chip RAM Memory",
    58                name: "MSARAM",
    59                base: 0x0,
    60                len:  0x800,
    61                page: 0,
    62                space: "code/data"
    63            }],
    64
    65            ["PIEVECT", {
    66                comment: "On-Chip PIEVECT RAM Memory",
    67                name:    "PIEVECT",
    68                base:    0xD00,
    69                len:     0x100,
    70                page: 1,
    71                space:   "data"
    72            }],
    73
    74            ["L03SARAM", {
    75                comment: "On-Chip RAM Memory",
    76                name: "L03SARAM",
    77                base: 0x8000,
    78                len:  0x4000,
    79                page: 0,
    80                space: "code/data"
    81            }],
    82
    83            ["L47SARAM", {
    84                comment: "On-Chip RAM Memory",
    85                name: "L47SARAM",
    86                base: 0xC000,
    87                len:  0x4000,
    88                page: 0,
    89                space: "code/data"
    90            }],
    91
    92            ["OTP", {
    93                comment: "1K X 16 OTP memory",
    94                name: "OTP",
    95                base: 0x380400,
    96                len:  0x400,
    97                page: 0,
    98                space: "code"
    99            }],
   100
   101            ["FLASH", {
   102                comment: "256K X 16 Flash memory",
   103                name: "FLASH",
   104                base: 0x300000,
   105                len:  0x03ff80,
   106                page: 0,
   107                space: "code"
   108            }],
   109
   110            ["BEGIN", {
   111                comment: "FLASH boot entry point",
   112                name: "BEGIN",
   113                base: 0x33fff6,
   114                len:  0x000002,
   115                page: 0,
   116                space: "code"
   117            }],
   118
   119            ["BOOTROM", {
   120                comment: "On-Chip Boot ROM",
   121                name: "BOOTROM",
   122                base: 0x3fe000,
   123                len:  0x1fc0,
   124                page: 0,
   125                space: "code"
   126            }],
   127        ];
   128    };


module ti.catalog.c2800.TMS320C28341

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28341 inherits ITMS320C28342
    34    {
    35    }


module ti.catalog.c2800.TMS320C28342

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28342 inherits ITMS320C28342
    34    {
    35    }


module ti.catalog.c2800.TMS320C28343

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28343 inherits ITMS320C28344
    34    {
    35    }


module ti.catalog.c2800.TMS320C28344

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28344 inherits ITMS320C28344
    34    {
    35    }


module ti.catalog.c2800.TMS320C28345

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28345 inherits ITMS320C28346
    34    {
    35    }


module ti.catalog.c2800.TMS320C28346

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    metaonly module TMS320C28346 inherits ITMS320C28346
    34    {
    35    }


module ti.catalog.c2800.TMS320F28062

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28062.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320F28062 ========
    40     *  The F28062 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320F28062 inherits ITMS320C283xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["L03DPSARAM", {
    74                comment: "L0-L3 DPSARAM (8K x 16)",
    75                name: "L03DPSARAM",
    76                base: 0x8000,
    77                len:  0x2000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["L4SARAM", {
    83                comment: "L4 SARAM (8K x 16)",
    84                name: "L4SARAM",
    85                base: 0xA000,
    86                len:  0x2000,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["L5DPSARAM", {
    92                comment: "L5 DPSARAM (8K x 16)",
    93                name: "L5DPSARAM",
    94                base: 0xC000,
    95                len:  0x2000,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["OTP", {
   101                comment: "1K X 16 OTP memory",
   102                name: "OTP",
   103                base: 0x3D7800,
   104                len:  0x0003FA,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["FLASH", {
   110                comment: "64K X 16 Flash memory",
   111                name: "FLASH",
   112                base: 0x3E8000,
   113                len:  0x00FF80,
   114                page: 0,
   115                space: "code"
   116            }],
   117
   118            ["BEGIN", {
   119                comment: "FLASH boot entry point",
   120                name: "BEGIN",
   121                base: 0x3f7ff6,
   122                len:  0x000002,
   123                page: 0,
   124                space: "code"
   125            }],
   126
   127            ["BOOTROM", {
   128                comment: "On-Chip Boot ROM",
   129                name: "BOOTROM",
   130                base: 0x3F8000,
   131                len:  0x007FC0,
   132                page: 0,
   133                space: "code"
   134            }],
   135        ];
   136    }


module ti.catalog.c2800.TMS320F28063

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28063.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320F28063 ========
    40     *  The F28063 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320F28063 inherits ITMS320C283xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["L03DPSARAM", {
    74                comment: "L0-L3 DPSARAM (8K x 16)",
    75                name: "L03DPSARAM",
    76                base: 0x8000,
    77                len:  0x2000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["L4SARAM", {
    83                comment: "L4 SARAM (8K x 16)",
    84                name: "L4SARAM",
    85                base: 0xA000,
    86                len:  0x2000,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["L56DPSARAM", {
    92                comment: "L5-L6 DPSARAM (16K x 16)",
    93                name: "L56DPSARAM",
    94                base: 0xC000,
    95                len:  0x4000,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["OTP", {
   101                comment: "1K X 16 OTP memory",
   102                name: "OTP",
   103                base: 0x3D7800,
   104                len:  0x0003FA,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["FLASH", {
   110                comment: "64K X 16 Flash memory",
   111                name: "FLASH",
   112                base: 0x3E8000,
   113                len:  0x00FF80,
   114                page: 0,
   115                space: "code"
   116            }],
   117
   118            ["BEGIN", {
   119                comment: "FLASH boot entry point",
   120                name: "BEGIN",
   121                base: 0x3f7ff6,
   122                len:  0x000002,
   123                page: 0,
   124                space: "code"
   125            }],
   126
   127            ["BOOTROM", {
   128                comment: "On-Chip Boot ROM",
   129                name: "BOOTROM",
   130                base: 0x3F8000,
   131                len:  0x007FC0,
   132                page: 0,
   133                space: "code"
   134            }],
   135        ];
   136    }


module ti.catalog.c2800.TMS320F28064

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28064.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320F28064 ========
    40     *  The F28064 device data sheet module.
    41     *
    42     */
    43    metaonly module TMS320F28064 inherits ITMS320F28065
    44    {
    45    }


module ti.catalog.c2800.TMS320F28065

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28065.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320F28065 ========
    40     *  The F28065 device data sheet module.
    41     *
    42     */
    43    metaonly module TMS320F28065 inherits ITMS320F28065
    44    {
    45    }


module ti.catalog.c2800.TMS320F28066

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28066.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== ITMS320F28066 ========
    40     *  The F28066 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is used
    43     *  by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320F28066 inherits ITMS320C283xx
    46    {
    47    instance:
    48        override config string   cpuCoreRevision = "1.0";
    49
    50        /*!
    51         *  ======== memMap ========
    52         *  The default memory map for this device
    53         */
    54        config xdc.platform.IPlatform.Memory memMap[string]  = [
    55            ["MSARAM", {
    56                comment: "On-Chip RAM Memory",
    57                name: "MSARAM",
    58                base: 0x0,
    59                len:  0x800,
    60                page: 0,
    61                space: "code/data"
    62            }],
    63
    64            ["PIEVECT", {
    65                comment: "On-Chip PIEVECT RAM Memory",
    66                name:    "PIEVECT",
    67                base:    0xD00,
    68                len:     0x100,
    69                page: 1,
    70                space:   "data"
    71            }],
    72
    73            ["L03DPSARAM", {
    74                comment: "L0-L3 DPSARAM (8K x 16)",
    75                name: "L03DPSARAM",
    76                base: 0x8000,
    77                len:  0x2000,
    78                page: 0,
    79                space: "code/data"
    80            }],
    81
    82            ["L4SARAM", {
    83                comment: "L4 SARAM (8K x 16)",
    84                name: "L4SARAM",
    85                base: 0xA000,
    86                len:  0x2000,
    87                page: 0,
    88                space: "code/data"
    89            }],
    90
    91            ["L56DPSARAM", {
    92                comment: "L5-L6 DPSARAM (16K x 16)",
    93                name: "L56DPSARAM",
    94                base: 0xC000,
    95                len:  0x4000,
    96                page: 0,
    97                space: "code/data"
    98            }],
    99
   100            ["OTP", {
   101                comment: "1K X 16 OTP memory",
   102                name: "OTP",
   103                base: 0x3D7800,
   104                len:  0x0003FA,
   105                page: 0,
   106                space: "code"
   107            }],
   108
   109            ["FLASH", {
   110                comment: "128K X 16 Flash memory",
   111                name: "FLASH",
   112                base: 0x3D8000,
   113                len:  0x01FF80,
   114                page: 0,
   115                space: "code"
   116            }],
   117
   118            ["BEGIN", {
   119                comment: "FLASH boot entry point",
   120                name: "BEGIN",
   121                base: 0x3f7ff6,
   122                len:  0x000002,
   123                page: 0,
   124                space: "code"
   125            }],
   126
   127            ["BOOTROM", {
   128                comment: "On-Chip Boot ROM",
   129                name: "BOOTROM",
   130                base: 0x3F8000,
   131                len:  0x007FC0,
   132                page: 0,
   133                space: "code"
   134            }],
   135        ];
   136    }


module ti.catalog.c2800.TMS320F28067

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28067.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320F28067 ========
    40     *  The F28067 device data sheet module.
    41     *
    42     */
    43    metaonly module TMS320F28067 inherits ITMS320F28069
    44    {
    45    }


module ti.catalog.c2800.TMS320F28068

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28068.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320F28068 ========
    40     *  The F28068 device data sheet module.
    41     *
    42     */
    43    metaonly module TMS320F28068 inherits ITMS320F28069
    44    {
    45    }


module ti.catalog.c2800.TMS320F28069

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320F28069.xdc ========
    35     */
    36    package ti.catalog.c2800;
    37
    38    /*!
    39     *  ======== TMS320F28069 ========
    40     *  The F28069 device data sheet module.
    41     *
    42     */
    43    metaonly module TMS320F28069 inherits ITMS320F28069
    44    {
    45    }


module ti.catalog.c2800.concertoInit.Boot

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Boot.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c2800.concertoInit;
    39
    40    /*!
    41     *  ======== Boot ========
    42     *  Concerto C28 Boot Support.
    43     *
    44     *  This Boot module can be used to generate a small section that supports
    45     *  booting the C28 processor from Flash.  It consists of a single
    46     *  "LB _c_int00" instruction.
    47     *
    48     *  When `{@link #bootFromFlash}` is true, the instruction will be placed
    49     *  at "BEGIN", as defined in the linker command file.
    50     *
    51     *  Boot also supports initializing Flash controller wait states, enabling
    52     *  program prefetches, and data caching within the Flash controller.
    53     */
    54    @Template("./Boot.xdt")
    55    @NoRuntime
    56    module Boot
    57    {
    58        /*!
    59         *  Boot from Flash flag.  Default is true.
    60         *
    61         *  Set to true to enable booting the C28 from Flash.
    62         */
    63        metaonly config Bool bootFromFlash = true;
    64
    65        /*!
    66         *  Flash controller configuration flag, default is true.
    67         *
    68         *  Set to true to enable the configuration of the Flash controller
    69         *  wait states, program and data cache.
    70         */
    71        metaonly config Bool configureFlashController = true;
    72
    73        /*!
    74         *  Flash controller wait states configuration flag, default is true.
    75         *
    76         *  Set to true to configure the Flash controller wait states.  The number
    77         *  of wait states is computed based upon the CPU frequency.
    78         */
    79        metaonly config Bool configureFlashWaitStates = true;
    80
    81        /*!
    82         *  Flash controller program prefetch enable flag, default is false.
    83         *
    84         *  Set to true to enable the Flash controller's program prefetch.
    85         *
    86         *  WARNING: Program prefetch must not be enabled on pre Revision A devices
    87         *  if there are any fast branch instructions in the program image.  See
    88         *  the device errata for more information.
    89         */
    90        metaonly config Bool enableFlashProgramPrefetch = false;
    91
    92        /*!
    93         *  Flash controller data cache enable flag, default is true.
    94         *
    95         *  Set to true to enable the Flash controller's data cache.
    96         */
    97        metaonly config Bool enableFlashDataCache = true;
    98
    99        /*!
   100         *  ======== loadSegment ========
   101         *  Specifies where to load the flash function (include the 'PAGE' number)
   102         *
   103         *  If 'configureFlashWaitStates' is true, then this parameter
   104         *  determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
   105         *  section gets loaded.
   106         */
   107        metaonly config String loadSegment;
   108
   109        /*!
   110         *  ======== runSegment ========
   111         *  Specifies where to run the flash function (include the 'PAGE' number)
   112         *
   113         *  If 'configureFlashWaitStates' is true then this parameter
   114         *  determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
   115         *  section gets executed at runtime.
   116         */
   117        metaonly config String runSegment;
   118
   119    internal:
   120
   121        /* The computed Flash wait states */
   122        metaonly config UInt flashWaitStates = 3;
   123    };


package ti.catalog.c2800.concertoInit

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ti.catalog.c2800.concertoInit ========
    40     *  Concerto 28xx boot time initialization support
    41     */
    42    package ti.catalog.c2800.concertoInit[1,0,0] {
    43        module Boot;
    44    }


module ti.catalog.c2800.init.Boot

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Boot.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c2800.init;
    39
    40    import xdc.rov.ViewInfo;
    41
    42    /*!
    43     *  ======== Boot ========
    44     *  28x Boot Support.
    45     *
    46     *  The Boot module supports boot initialization for the 28x devices.
    47     *  A special boot init function is created based on the configuration
    48     *  settings for this module.  This function is hooked into the
    49     *  xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
    50     *  to cinit processing).
    51     *
    52     *  The code to support the boot module is placed in a separate section
    53     *  named `".text:.bootCodeSection"` to allow placement of this section in
    54     *  the linker .cmd file if necessary. This section is a subsection of the
    55     *  `".text"` section so this code will be placed into the .text section unless
    56     *  explicitly placed, either through
    57     *  `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
    58     *  command file.
    59     */
    60    @Template("./Boot.xdt")
    61    @NoRuntime
    62    module Boot
    63    {
    64        /*! PLL type */
    65        metaonly enum Type {
    66            Type_280x,   /*! 280x (PLL configuration not supported for this type) */
    67            Type_281x,   /*! 281x (PLL configuration not supported for this type) */
    68            Type_282xx_283xx,         /*! 282xx or 283xx */
    69            Type_2802x_2803x_2806x,   /*! 2802x or 2803x or 2806x */
    70            Type_2834x                /*! 2834x */
    71        };
    72
    73        metaonly struct ModuleView {
    74            Bool         disableWatchdog;
    75            Bool         configurePll;
    76            UInt         pllcrDIV;
    77            UInt         pllstsDIVSEL;
    78        }
    79
    80        @Facet
    81        metaonly config ViewInfo.Instance rovViewInfo =
    82            ViewInfo.create({
    83                viewMap: [
    84                [
    85                    'Module',
    86                    {
    87                        type: ViewInfo.MODULE,
    88                        viewInitFxn: 'viewInitModule',
    89                        structName: 'ModuleView'
    90                    }
    91                ],
    92                ]
    93            });
    94
    95        /*!
    96         *  Watchdog disable flag, default is false.
    97         *
    98         *  Set to true to disable the watchdog timer.
    99         */
   100        metaonly config Bool disableWatchdog = false;
   101
   102        /*!
   103         *  PLL type.
   104         *
   105         *  The default will be determined by platform specification, or by the
   106         *  device ID for the generic (tms320c28) platform.
   107         */
   108        metaonly config Type pllType;
   109
   110        /*!
   111         *  PLL configuration flag, default is false.
   112         *
   113         *  Set to true to configure the PLL.
   114         */
   115        metaonly config Bool configurePll = false;
   116
   117        /*!
   118         *  OSCCLK input frequency to PLL, in MHz. Default is 10 MHz.
   119         *
   120         *  This is the frequency of the oscillator clock (OSCCLK) input to the
   121         *  PLL.  On some devices (e.g., TMS320C28346) this will correspond to the
   122         *  frequency of an external crystal or clock input.  On others
   123         *  (e.g., TMS320F28069) this will correspond to the frequency of an
   124         *  internal oscillator which is the default OSCCLK coming out of reset.
   125         */
   126        metaonly config UInt pllOSCCLK = 10;
   127
   128        /*!
   129         *  PLLCR[DIV] clocking ratio value. Default is 10.
   130         *
   131         *  This is the actual value written to the DIV bits in
   132         *  the PLL Control Register (PLLCR)
   133         */
   134        metaonly config UInt pllcrDIV = 10;
   135
   136        /*!
   137         *  PLLSTS[DIVSEL] divide select value. Default is 2.
   138         *
   139         *  This is the actual value written to the DIVSEL bits in
   140         *  the PLL Status Register (PLLSTS).
   141         *
   142         *  This configuration parameter applies for all of the
   143         *  enumerated PLL types, except for "Type_280x".
   144         */
   145        metaonly config UInt pllstsDIVSEL = 2;
   146
   147        /*!
   148         *  Function to be called when Limp mode is detected.
   149         *
   150         *  This function is called when the Boot module is about to configure
   151         *  the PLL, but finds the device operating in Limp mode (i.e., the mode
   152         *  when a missing OSCCLK input has been detected).
   153         *
   154         *  If this function is not specified by the application, a default
   155         *  function will be used, which does an ESTOP0 and then enters an
   156         *  infinite loop.
   157         */
   158        metaonly config Fxn limpAbortFunction;
   159
   160        /*!
   161         *  Boot from FLASH flag, default is false.
   162         *
   163         *  Set to true to enable booting from FLASH.  When set to true,
   164         *  a long branch (LB) to the c_int00 entry point will be placed at
   165         *  the BEGIN section address defined in the linker command file.
   166         */
   167        metaonly config Bool bootFromFlash = false;
   168
   169        /*!
   170         * Configure the external memory interface (XINTF) for eZdsp283xx
   171         * boards.
   172         *
   173         * This external memory interface configuration is applicable only for
   174         * eZdsp283xx boards; it should not be enabled for any other boards.
   175         */
   176        metaonly config Bool enableEzdspXintfConfig = false;
   177
   178        /*!
   179         * @_nodoc
   180         *  Default abort function to be called when PLL Limp mode is detected
   181         */
   182        metaonly Void defaultLimpAbort();
   183
   184        /*!
   185         *  ======== getFrequency ========
   186         *  Gets the resulting output frequency (in Hz) given the PLL configuration
   187         *  parameters.
   188         */
   189        metaonly UInt32 getFrequency();
   190
   191        /*!
   192         *  ======== registerFreqListener ========
   193         *  Register a module to be notified whenever the frequency changes.
   194         *
   195         *  The registered module must have a function named 'fireFrequencyUpdate'
   196         *  which takes the new frequency as an argument.
   197         */
   198        metaonly function registerFreqListener(listener);
   199
   200    internal:
   201
   202        /* Used to display the computed frequency value in the Grace page. */
   203        metaonly config String displayFrequency;
   204
   205        /* Used to indicate if using on a Concerto device */
   206        metaonly config Bool concertoDevice = false;
   207
   208    };


package ti.catalog.c2800.init

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ti.catalog.c2800.init ========
    40     *  C28xx boot time initialization support
    41     */
    42    package ti.catalog.c2800.init[1,0,0] {
    43        module Boot;
    44    }


module ti.catalog.c2800.initF2837x.Boot

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Boot.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c2800.initF2837x;
    39
    40    import xdc.rov.ViewInfo;
    41
    42    /*!
    43     *  ======== Boot ========
    44     *  Soprano Boot Support.
    45     *
    46     *  The Boot module supports boot initialization for the C28 Soprano cores.
    47     *  A special boot init function is created based on the configuration
    48     *  settings for this module.  This function is hooked into the
    49     *  xdc.runtime.Reset.fxns[] array and called very early at boot time (prior
    50     *  to cinit processing).
    51     *
    52     *  The code to support the boot module is placed in a separate section
    53     *  named `".text:.bootCodeSection"` to allow placement of this section in
    54     *  the linker .cmd file if necessary. This section is a subsection of the
    55     *  `".text"` section so this code will be placed into the .text section unless
    56     *  explicitly placed, either through
    57     *  `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
    58     *  command file.
    59     */
    60    @Template("./Boot.xdt")
    61    @NoRuntime
    62    module Boot
    63    {
    64        /*! System PLL Fractional Multiplier (SPLLFMULT) value */
    65        metaonly enum FractMult {
    66            Fract_0  = 0x000,       /*! Fractional multiplier is 0    */
    67            Fract_25 = 0x100,       /*! Fractional multiplier is 0.25 */
    68            Fract_50 = 0x200,       /*! Fractional multiplier is 0.5  */
    69            Fract_75 = 0x300        /*! Fractional multiplier is 0.75 */
    70        }
    71
    72        /*! Oscillator Clock Source Select Bit for OSCCLK */
    73        metaonly enum OscClk {
    74            OscClk_INTOSC2  = 0x0, /*! internal oscillator 2 (default on reset) */
    75            OscClk_XTAL     = 0x1, /*! external oscillator */
    76            OscClk_INTOSC1  = 0x2, /*! internal oscillator 1 */
    77            OscClk_RESERVED = 0x3  /*! reserved (default to INTOSC1) */
    78        }
    79
    80        metaonly struct ModuleView {
    81            Bool configureClocks;
    82            UInt OSCCLK;
    83            UInt SPLLIMULT;
    84            String SPLLFMULT;
    85            String SYSCLKDIVSEL;
    86            Bool bootCPU2;
    87        }
    88
    89        @Facet
    90        metaonly config ViewInfo.Instance rovViewInfo =
    91            ViewInfo.create({
    92                viewMap: [
    93                [
    94                    'Module',
    95                    {
    96                        type: ViewInfo.MODULE,
    97                        viewInitFxn: 'viewInitModule',
    98                        structName: 'ModuleView'
    99                    }
   100                ],
   101                ]
   102            });
   103
   104        /*!
   105         *  Clock configuration flag, default is false.
   106         *
   107         *  Set to true to configure the PLL and system subsystem clock
   108         *  dividers.
   109         */
   110        config Bool configureClocks = false;
   111
   112        /*!
   113         *  Oscillator Clock source select bit for OSCCLK
   114         *
   115         *  The default on reset is INTOSC2
   116         */
   117        metaonly config OscClk OSCCLKSRCSEL = OscClk_INTOSC2;
   118
   119        /*!
   120         *  Watchdog disable flag, default is false.
   121         *
   122         *  Set to true to disable the watchdog timer.
   123         */
   124        metaonly config Bool disableWatchdog = false;
   125
   126        /*!
   127         *  OSCCLK input frequency to PLL, in MHz.
   128         *
   129         *  This is the frequency of the oscillator clock (OSCCLK) input to the
   130         *  PLL.  The default internal oscillator is 10 Mhz.
   131         */
   132        metaonly config UInt OSCCLK = 10;
   133
   134        /*! System PLL Integer Multiplier (SPLLIMULT) value */
   135        metaonly config UInt SPLLIMULT = 1;
   136
   137        /*! System PLL Fractional Multiplier (SPLLFMULT) value */
   138        metaonly config FractMult SPLLFMULT = Fract_0;
   139
   140        /*! System Clock Divider Select (SYSCLKDIVSEL) value */
   141        metaonly config UInt SYSCLKDIVSEL = 2;
   142
   143        /*!
   144         *  Flash controller configuration flag, default is true.
   145         *
   146         *  Set to true to enable the configuration of the Flash controller
   147         *  wait states, program and data cache.
   148         */
   149        metaonly config Bool configureFlashController = true;
   150
   151        /*!
   152         *  Flash controller wait states configuration flag, default is true.
   153         *
   154         *  Set to true to configure the Flash controller wait states.  The number
   155         *  of wait states is computed based upon the CPU frequency.
   156         */
   157        metaonly config Bool configureFlashWaitStates = true;
   158
   159        /*!
   160         *  Flash controller program cache enable flag, default is true.
   161         *
   162         *  Set to true to enable the Flash controller's program cache.
   163         */
   164        metaonly config Bool enableFlashProgramCache = true;
   165
   166        /*!
   167         *  Flash controller data cache enable flag, default is true.
   168         *
   169         *  Set to true to enable the Flash controller's data cache.
   170         */
   171        metaonly config Bool enableFlashDataCache = true;
   172
   173        /*!
   174         *  Function to be called when Limp mode is detected.
   175         *
   176         *  This function is called when the Boot module is about to configure
   177         *  the PLL, but finds the device operating in Limp mode (i.e., the mode
   178         *  when a missing OSCCLK input has been detected).
   179         *
   180         *  If this function is not specified by the application, a default
   181         *  function will be used, which spins in an infinite loop.
   182         */
   183        metaonly config Fxn limpAbortFunction;
   184
   185        /*!
   186         *  Boot from Flash flag.  Default is true.
   187         *
   188         *  Set to true to enable booting CPU1 from Flash.
   189         */
   190        metaonly config Bool bootFromFlash = true;
   191
   192        /*!
   193         *  Initiate booting of the CPU2 processor.  Default is false.
   194         *
   195         *  Set to true to enable CPU1 to initiate boot of CPU2.
   196         *
   197         *  If enabled, this will occur after the optional clock configuration
   198         *  step, enabled by `{@link #configureClocks}`.
   199         */
   200        metaonly config Bool bootCPU2 = false;
   201
   202        /*!
   203         *  Configure Shared RAM regions before booting the C28 processor.
   204         *  Default is true.
   205         *
   206         *  Set to true to enable Shared RAM regions S0-S7, to set the
   207         *  owner of each region and the write access permissions for the onwer.
   208         */
   209        metaonly config Bool configSharedRAMs = true;
   210
   211       /*!
   212         *  ======== sharedMemoryOwnerMask ========
   213         *  Shared RAM owner select mask.
   214         *
   215         *  This parameter is used for writing the GSxMSEL register.
   216         *  By default, each value of each shared RAM select bit is '0'.
   217         *  This means the CPU1 is the owner and has write access.
   218         *  Setting a '1' in any bit position makes CPU2 the owner of that
   219         *  shared RAM segment.
   220         */
   221        metaonly config Bits32 sharedMemoryOwnerMask = 0;
   222
   223        /*!
   224         *  ======== loadSegment ========
   225         *  Specifies where to load the flash function (include the 'PAGE' number)
   226         *
   227         *  If 'configureFlashWaitStates' is true, then this parameter
   228         *  determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
   229         *  section gets loaded.
   230         */
   231        metaonly config String loadSegment;
   232
   233        /*!
   234         *  ======== runSegment ========
   235         *  Specifies where to run the flash function (include the 'PAGE' number)
   236         *
   237         *  If 'configureFlashWaitStates' is true then this parameter
   238         *  determines where the ".ti_catalog_c2800_initF2837x_flashfuncs"
   239         *  section gets executed at runtime.
   240         */
   241        metaonly config String runSegment;
   242
   243        /*!
   244         *  @_nodoc
   245         *  ======== getFrequency ========
   246         *  Gets the resulting CPU frequency (in Hz) given the Clock
   247         *  configuration parameters.
   248         *
   249         */
   250        UInt32 getFrequency();
   251
   252        /*!
   253         *  @_nodoc
   254         *  ======== registerFreqListener ========
   255         *  Register a module to be notified whenever the frequency changes.
   256         *
   257         *  The registered module must have a function named 'fireFrequencyUpdate'
   258         *  which takes the new frequency as an argument.
   259         */
   260        function registerFreqListener();
   261
   262    internal:
   263
   264        /* The computed timestamp frequency */
   265        metaonly config UInt timestampFreq;
   266
   267        /* Used to display the computed CPU frequency value in the Grace page. */
   268        metaonly config String displayFrequency;
   269
   270        /* The computed Flash wait states */
   271        metaonly config UInt flashWaitStates = 3;
   272
   273    };


package ti.catalog.c2800.initF2837x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ti.catalog.c2800.initF2837x ========
    40     *  2837x and 2807x boot time initialization support
    41     */
    42    package ti.catalog.c2800.initF2837x[1,0,0] {
    43        module Boot;
    44    }


module ti.catalog.c6000.Arctic

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Arctic.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Arctic ========
    40     *  The Arctic device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module Arctic inherits ti.catalog.ICpuDataSheet
    46    {
    47        config long cacheSizeL1[string] = [
    48            ["0k",  0x0000],
    49            ["4k",  0x1000],
    50            ["8k",  0x2000],
    51            ["16k", 0x4000],
    52            ["32k", 0x8000],
    53        ];
    54
    55        config long cacheSizeL2[string] = [
    56            ["0k",   0x00000],
    57            ["32k",  0x08000],
    58            ["64k",  0x10000],
    59            ["128k", 0x20000],
    60            ["256k", 0x40000],
    61            ["512k", 0x80000],
    62        ];
    63
    64        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    65             ['l1PMode',{desc:"L1P Cache",
    66                         base: 0xE00000,
    67                         map : [["0k",0x0000],
    68                                ["4k",0x1000],
    69                                ["8k",0x2000],
    70                                ["16k",0x4000],
    71                                ["32k",0x8000]],
    72                         defaultValue: "32k",
    73                         memorySection: "L1PSRAM"}],
    74
    75                     ['l1DMode',{desc:"L1D Cache",
    76                         base: 0xF00000,
    77                         map : [["0k",0x0000],
    78                                ["4k",0x1000],
    79                                ["8k",0x2000],
    80                                ["16k",0x4000],
    81                                ["32k",0x8000]],
    82                         defaultValue: "32k",
    83                         memorySection: "L1DSRAM"}],
    84
    85             ['l2Mode',{desc:"L2 Cache",
    86                         base: 0x800000,
    87                         map : [["0k",0x0000],
    88                                ["32k",0x8000],
    89                                ["64k",0x10000],
    90                                ["128k",0x20000],
    91                                ["256k",0x40000],
    92                                ["512k",0x80000]],
    93                         defaultValue: "0k",
    94                         memorySection: "IRAM"}],
    95        ];
    96
    97    instance:
    98
    99        override config string   cpuCore        = "C674";
   100        override config string   isa = "674";
   101        override config string   cpuCoreRevision = "1.0";
   102
   103        override config int     minProgUnitSize = 1;
   104        override config int     minDataUnitSize = 1;
   105        override config int     dataWordSize    = 4;
   106
   107        /*!
   108         *  ======== memMap ========
   109         *  The default memory map for this device
   110         */
   111        config xdc.platform.IPlatform.Memory memMap[string]  = [
   112            ["IRAM", {
   113                comment:    "Internal 512KB L2 RAM/cache memory",
   114                name:       "IRAM",
   115                base:       0x00800000,
   116                len:        0x00080000,
   117                space:      "code/data",
   118                access:     "RWX"
   119            }],
   120
   121            ["L1PSRAM", {
   122                comment:    "Internal 32KB L1 program/cache memory",
   123                name:       "L1PSRAM",
   124                base:       0x00E00000,
   125                len:        0x00008000,
   126                space:      "code",
   127                access:     "RX"
   128            }],
   129
   130            ["L1DSRAM", {
   131                comment:    "Internal 32KB L1 data/cache memory",
   132                name:       "L1DSRAM",
   133                base:       0x00F00000,
   134                len:        0x00008000,
   135                space:      "data",
   136                access:     "RW"
   137            }],
   138
   139            ["L3MEM", {
   140                comment:    "1MB L3 Memory",
   141                name:       "L3MEM",
   142                base:       0x40300000,
   143                len:        0x00100000,
   144                space:      "code/data",
   145                access:     "RWX"
   146            }],
   147
   148            ["DMEM", {
   149                comment:    "ARP32 Internal data memory",
   150                name:       "DMEM",
   151                base:       0x59020000,
   152                len:        0x8000,
   153                space:      "data",
   154                access:     "RW"
   155            }],
   156        ];
   157    };


module ti.catalog.c6000.C64

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== C64.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all C64 devices.
    38     */
    39
    40    metaonly module C64 inherits ti.catalog.c6000.IC6x
    41    {
    42    instance:
    43        override config string cpuCore         = "6400";
    44        override config string isa             = "64";
    45        override config string cpuCoreRevision = "1.0";
    46        override config int    minProgUnitSize = 1;
    47        override config int    minDataUnitSize = 1;
    48        override config int    dataWordSize    = 4;
    49    }


module ti.catalog.c6000.C64P

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== C64P.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all C64P devices.
    38     */
    39
    40    metaonly module C64P inherits ti.catalog.c6000.IC6x
    41    {
    42    instance:
    43        override config string cpuCore         = "64x+";
    44        override config string isa             = "64P";
    45        override config string cpuCoreRevision = "1.0";
    46        override config int    minProgUnitSize = 1;
    47        override config int    minDataUnitSize = 1;
    48        override config int    dataWordSize    = 4;
    49    }


module ti.catalog.c6000.C66

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== C66.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all C66 devices.
    38     */
    39
    40    metaonly module C66 inherits ti.catalog.c6000.IC6x
    41    {
    42    instance:
    43        override config string cpuCore         = "6600";
    44        override config string isa             = "66";
    45        override config string cpuCoreRevision = "1.0";
    46        override config int    minProgUnitSize = 1;
    47        override config int    minDataUnitSize = 1;
    48        override config int    dataWordSize    = 4;
    49    }


module ti.catalog.c6000.C67

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== C67.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all C67 devices.
    38     */
    39
    40    metaonly module C67 inherits ti.catalog.c6000.IC6x
    41    {
    42    instance:
    43        override config string cpuCore         = "6700";
    44        override config string isa             = "67";
    45        override config string cpuCoreRevision = "1.0";
    46        override config int    minProgUnitSize = 1;
    47        override config int    minDataUnitSize = 1;
    48        override config int    dataWordSize    = 4;
    49    }


module ti.catalog.c6000.C674

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== C674.xdc ========
    35     *  Generic Cpu definition
    36     *
    37     *  This device represents all C674 devices.
    38     */
    39
    40    metaonly module C674 inherits ti.catalog.c6000.IC6x
    41    {
    42    instance:
    43        override config string cpuCore         = "C674";
    44        override config string isa             = "674";
    45        override config string cpuCoreRevision = "1.0";
    46        override config int    minProgUnitSize = 1;
    47        override config int    minDataUnitSize = 1;
    48        override config int    dataWordSize    = 4;
    49    }


module ti.catalog.c6000.DM37XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== DMA37XX.xdc ========
    35     */
    36    package ti.catalog.c6000;
    37
    38    /*!
    39     *  ======== DM37XX ========
    40     *  An interface implemented by DM37XX devices.
    41     *
    42     */
    43    metaonly module DM37XX inherits ti.catalog.ICpuDataSheet
    44    {
    45
    46        config long cacheSizeL1[string] = [
    47            ["0k",  0x0000],
    48            ["4k",  0x1000],
    49            ["8k",  0x2000],
    50            ["16k", 0x4000],
    51            ["32k", 0x8000],
    52        ];
    53
    54        config long cacheSizeL2[string] = [
    55            ["0k",  0x00000],
    56            ["32k", 0x08000],
    57            ["64k", 0x10000]
    58        ];
    59
    60        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    61                 ['l1PMode',{desc:"L1P Cache",
    62                             base: 0x11E00000,
    63                             map : [["0k",0x0000],
    64                                    ["4k",0x1000],
    65                                    ["8k",0x2000],
    66                                    ["16k",0x4000],
    67                                    ["32k",0x8000]],
    68                             defaultValue: "32k",
    69                             memorySection: "L1PSRAM"}],
    70
    71                 ['l1DMode',{desc:"L1D Cache",
    72                             base: 0x11F00000,
    73                             map : [["0k",0x0000],
    74                                    ["4k",0x1000],
    75                                    ["8k",0x2000],
    76                                    ["16k",0x4000],
    77                                    ["32k",0x8000]],
    78                             defaultValue: "32k",
    79                             memorySection: "L1DSRAM"}],
    80
    81                 ['l2Mode',{desc:"L2 Cache",
    82                             base: 0x11800000,
    83                             map : [["0k",0x0000],
    84                                    ["32k",0x8000],
    85                                    ["64k",0x10000]],
    86                             defaultValue: "0k",
    87                             memorySection: "IRAM"}],
    88
    89        ];
    90
    91    instance:
    92        override config int     minProgUnitSize = 1;
    93        override config int     minDataUnitSize = 1;
    94        override config int     dataWordSize    = 4;
    95
    96        override config string  cpuCore         = "64x+";
    97        override config string  isa             = "64P";
    98        override config string  cpuCoreRevision = "1.0";
    99
   100        config xdc.platform.IPlatform.Memory memMap[string]  = [
   101            ["IROM", {
   102                comment:    "Internal 16KB L2 ROM",
   103                name:       "IROM",
   104                base:       0x007E0000,
   105                len:        0x00004000,
   106                space:      "code/data",
   107                access:     "RX"
   108            }],
   109
   110            ["IRAM", {
   111                comment:    "Internal 96KB L2 memory",
   112                name:       "IRAM",
   113                base:       0x007F8000,
   114                len:        0x00018000,
   115                space:      "code/data",
   116                access:     "RWX"
   117            }],
   118
   119            ["L1PSRAM", {
   120                comment:    "Internal 32KB L1 program memory",
   121                name:       "L1PSRAM",
   122                base:       0x00E00000,
   123                len:        0x00008000,
   124                space:      "code",
   125                access:     "RWX"
   126            }],
   127
   128            ["L1DSRAM", {
   129                comment:    "Internal 80KB L1 data memory",
   130                name:       "L1DSRAM",
   131                base:       0x00F04000,
   132                len:        0x00014000,
   133                space:      "data",
   134                access:     "RW"
   135            }],
   136        ];
   137    };


module ti.catalog.c6000.DRA7XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== DRA7XX.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== DRA7XX ========
    42     *  The DRA7XX device data sheet module.
    43     *
    44     *  This module implements the ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     */
    47    metaonly module DRA7XX inherits ti.catalog.ICpuDataSheet
    48    {
    49
    50        config long cacheSizeL1[string] = [
    51            ["0k",  0x0000],
    52            ["4k",  0x1000],
    53            ["8k",  0x2000],
    54            ["16k", 0x4000],
    55            ["32k", 0x8000]
    56        ];
    57
    58        config long cacheSizeL2[string] = [
    59            ["0k",    0x000000],
    60            ["32k",   0x008000],
    61            ["64k",   0x010000],
    62            ["128k",  0x020000],
    63            ["256k",  0x040000]
    64        ];
    65
    66        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    67                 ['l1PMode',{desc:"L1P Cache",
    68                             base: 0x00E00000,
    69                             map : [["0k" ,0x0000],
    70                                    ["4k" ,0x1000],
    71                                    ["8k" ,0x2000],
    72                                    ["16k",0x4000],
    73                                    ["32k",0x8000]],
    74                             defaultValue: "32k",
    75                             memorySection: "L1PSRAM"}],
    76
    77                 ['l1DMode',{desc:"L1D Cache",
    78                             base: 0x00F00000,
    79                             map : [["0k"  ,0x0000],
    80                                    ["4k"  ,0x1000],
    81                                    ["8k"  ,0x2000],
    82                                    ["16k" ,0x4000],
    83                                    ["32k" ,0x8000]],
    84                             defaultValue: "32k",
    85                             memorySection: "L1DSRAM"}],
    86
    87                 ['l2Mode',{desc:"L2 Cache",
    88                             base: 0x00800000,
    89                             map : [["0k"   ,0x0000],
    90                                    ["32k"  ,0x8000],
    91                                    ["64k"  ,0x10000],
    92                                ["128k" ,0x020000],
    93                                    ["256k" ,0x040000]],
    94                             defaultValue: "0k",
    95                             memorySection: "L2SRAM"}],
    96
    97        ];
    98
    99    instance:
   100        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
   101        override config string   cpuCore        = "6600";
   102        override config string   isa = "66";
   103        override config string   cpuCoreRevision = "1.0";
   104
   105        override config int     minProgUnitSize = 1;
   106        override config int     minDataUnitSize = 1;
   107        override config int     dataWordSize    = 4;
   108
   109        /*!
   110         *  ======== memMap ========
   111         *  The default memory map for this device
   112         */
   113        config xdc.platform.IPlatform.Memory memMap[string]  = [
   114            ["L2SRAM", {
   115                comment:    "256KB L2 SRAM/CACHE",
   116                name:       "L2SRAM",
   117                base:       0x00800000,
   118                len:        0x00040000,
   119                space:      "code/data",
   120                access:     "RWX"
   121            }],
   122
   123            ["L1PSRAM", {
   124                comment:    "32KB RAM/CACHE L1 program memory",
   125                name:       "L1PSRAM",
   126                base:       0x00E00000,
   127                len:        0x00008000,
   128                space:      "code",
   129                access:     "RWX"
   130            }],
   131
   132            ["L1DSRAM", {
   133                comment:    "32KB RAM/CACHE L1 data memory",
   134                name:       "L1DSRAM",
   135                base:       0x00F00000,
   136                len:        0x00008000,
   137                space:      "data",
   138                access:     "RW"
   139            }],
   140
   141            ["OCMC_RAM1", {
   142                comment:    "OCMC (On-chip RAM) Bank 1 (512KB)",
   143                name:       "OCMC_RAM1",
   144                base:       0x40300000,
   145                len:        0x00080000,
   146                space:      "code/data",
   147                access:     "RWX"
   148            }],
   149
   150            ["OCMC_RAM2", {
   151                comment:    "OCMC (On-chip RAM) Bank 2 (1MB)",
   152                name:       "OCMC_RAM2",
   153                base:       0x40400000,
   154                len:        0x00100000,
   155                space:      "code/data",
   156                access:     "RWX"
   157            }],
   158
   159            ["OCMC_RAM3", {
   160                comment:    "OCMC (On-chip RAM) Bank 3 (1MB)",
   161                name:       "OCMC_RAM3",
   162                base:       0x40500000,
   163                len:        0x00100000,
   164                space:      "code/data",
   165                access:     "RWX"
   166            }],
   167        ];
   168    };


interface ti.catalog.c6000.IAntara

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IAntara.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== IAntara ========
    41     *  The Antara device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly interface IAntara inherits ti.catalog.ICpuDataSheet
    47    {
    48    instance:
    49        override config int     minProgUnitSize = 1;
    50        override config int     minDataUnitSize = 1;
    51        override config int     dataWordSize    = 4;
    52
    53        override config string   cpuCore        = "67x+";
    54        override config string   isa = "67P";
    55        override config string   cpuCoreRevision = "1.0";
    56
    57        config xdc.platform.IPlatform.Memory memMap[string]  = [
    58            ["IRAM", {
    59                name:       "IRAM",
    60                comment:    "Internal memory",
    61                base:       0x10000000,
    62                len:        0x00040000,
    63                space:      "code/data",
    64                access:     "RWX"
    65            }],
    66        ];
    67    };


interface ti.catalog.c6000.IC6x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IC6x.xdc ========
    35     *  An interface implemented by all C6x devices
    36     *
    37     *  This interface is defined to factor common data about all C6x type
    38     *  devices into a single place; they all have the same internal memory.
    39     */
    40
    41    metaonly interface IC6x inherits ti.catalog.ICpuDataSheet
    42    {
    43    instance:
    44        override config string cpuCore         = "6600";
    45        override config string isa             = "66";
    46        override config string cpuCoreRevision = "1.0";
    47        override config int    minProgUnitSize = 1;
    48        override config int    minDataUnitSize = 1;
    49        override config int    dataWordSize    = 4;
    50    }


interface ti.catalog.c6000.ICacheInfo

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ICacheInfo.xdc ========
    35     */
    36
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly interface ICacheInfo {
    41        /*!
    42         *  ======== CacheDesc ========
    43         *  Structure used by ICpuDataSheet implementations to
    44         *  specify device cache modes.
    45         *
    46         *  A map is defined by an ICpuDataSheet implementation
    47         *  that maps a string denoting a device register setting
    48         *  to a CacheDesc structure. This maybe used in implementing
    49         *  the 'getMemoryMap' method. An example of such a map is shown below :
    50         *
    51         *   readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    52             *    ['l1PMode',{desc:"L1P Cache",
    53             *                map : [["0k",0x0000],
    54             *                       ["4k",0x1000],
    55             *                       ["8k",0x2000],
    56             *                       ["16k",0x4000],
    57             *                       ["32k",0x8000]],
    58             *                defaultValue: "32k",
    59             *                memorySection: "L1PSRAM"}],
    60             *
    61             *        ['l1DMode',{desc:"L1D Cache",
    62             *                map : [["0k",0x0000],
    63             *                       ["4k",0x1000],
    64             *                       ["8k",0x2000],
    65             *                       ["16k",0x4000],
    66             *                       ["32k",0x8000]],
    67             *                defaultValue: "32k",
    68             *                memorySection: "L1DSRAM"}],
    69             *
    70             *    ['l2Mode',{desc:"L2 Cache",
    71             *                map : [["0k",0x0000],
    72             *                       ["32k",0x8000],
    73             *                       ["64k",0x10000],
    74             *                       ["128k",0x20000],
    75             *                       ["256k",0x40000]],
    76             *                defaultValue: "0k",
    77             *                memorySection: "IRAM"}],
    78         *
    79         *   ];
    80         *
    81         *  @_nodoc
    82         */
    83        struct CacheDesc {
    84            string desc;          /*! String describing the register setting */
    85            Int base;             /*! base address of cache */
    86            unsigned map[string]; /*! A hash of cache modes to cache size*/
    87            string defaultValue;  /*! The default cache mode for the device */
    88            string memorySection; /*! The associated memory section */
    89        };
    90
    91
    92    }


interface ti.catalog.c6000.IDaVinci

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IDaVinci.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== IDaVinci ========
    41     *  An interface implemented by all DaVinci devices
    42     *
    43     *  This interface is defined to factor common data about all DaVinci devices
    44     *  into a single place; they are all the same from the configuration point of
    45     *  view.
    46     */
    47    metaonly interface IDaVinci inherits ti.catalog.ICpuDataSheet
    48    {
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",  0x00000],
    59            ["32k", 0x08000],
    60            ["64k", 0x10000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64                 ['l1PMode',{desc: "L1P Cache",
    65                             base: 0x11E08000,
    66                             map : [["0k",0x0000],
    67                                    ["4k",0x1000],
    68                                    ["8k",0x2000],
    69                                    ["16k",0x4000],
    70                                    ["32k",0x8000]],
    71                             defaultValue: "32k",
    72                             memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc: "L1D Cache",
    75                             base: 0x11F04000,
    76                             map : [["0k",0x0000],
    77                                    ["4k",0x1000],
    78                                    ["8k",0x2000],
    79                                    ["16k",0x4000],
    80                                    ["32k",0x8000]],
    81                             defaultValue: "32k",
    82                             memorySection: "L1DSRAM"}],
    83
    84                 ['l2Mode',{desc: "L2 Cache",
    85                             base: 0x11800000,
    86                             map : [["0k",0x0000],
    87                                    ["32k",0x8000],
    88                                    ["64k",0x10000]],
    89                             defaultValue: "0k",
    90                             memorySection: "IRAM"}],
    91
    92        ];
    93
    94    instance:
    95
    96        override config string   cpuCore        = "64x+";
    97        override config string   isa = "64P";
    98        override config string   cpuCoreRevision = "1.0";
    99
   100        override config int     minProgUnitSize = 1;
   101        override config int     minDataUnitSize = 1;
   102        override config int     dataWordSize    = 4;
   103
   104        /*!
   105         *  ======== memMap ========
   106         *  The default memory map for this device
   107         */
   108        config xdc.platform.IPlatform.Memory memMap[string]  = [
   109            ["IRAM", {
   110                comment:    "Internal 64KB UMAP0 memory",
   111                name:       "IRAM",
   112                base:       0x11800000,
   113                len:        0x00010000,
   114                space:      "code/data",
   115                access:     "RWX"
   116            }],
   117
   118            ["L1PSRAM", {
   119                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   120                name:       "L1PSRAM",
   121                base:       0x11E08000,
   122                len:        0x00008000,
   123                space:      "code",
   124                access:     "RWX"
   125            }],
   126
   127            ["L1DSRAM", {
   128                comment:    "Internal 80KB RAM/CACHE L1 data memory",
   129                name:       "L1DSRAM",
   130                base:       0x11F04000,
   131                len:        0x00014000,
   132                space:      "data",
   133                access:     "RW"
   134            }],
   135
   136            ["ARM_RAM", {
   137                comment:    "Internal ARM RAM memory",
   138                name:       "ARM_RAM",
   139                base:       0x10008000,
   140                len:        0x00004000,
   141                space:      "data",
   142                access:     "RW"
   143            }],
   144        ];
   145    };


interface ti.catalog.c6000.IHimalaya

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IHimalaya.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== IHimalaya ========
    41     *  An interface implemented by all Himalaya devices
    42     *
    43     *  This interface is defined to factor common data about all Himalaya devices
    44     *  into a single place; they are all the same from the configuration point of
    45     *  view.
    46     */
    47    metaonly interface IHimalaya inherits ti.catalog.ICpuDataSheet
    48    {
    49
    50        config long cacheSizeL1[string] = [
    51            ["0k",  0x0000],
    52            ["4k",  0x1000],
    53            ["8k",  0x2000],
    54            ["16k", 0x4000],
    55            ["32k", 0x8000],
    56        ];
    57
    58        config long cacheSizeL2[string] = [
    59            ["0k",   0x00000],
    60            ["32k",  0x08000],
    61            ["64k",  0x10000],
    62            ["128k", 0x20000],
    63            ["256k", 0x40000]
    64        ];
    65
    66        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    67                 ['l1PMode',{desc:"L1P Cache",
    68                             base:0xE00000,
    69                             map : [["0k",0x0000],
    70                                    ["4k",0x1000],
    71                                    ["8k",0x2000],
    72                                    ["16k",0x4000],
    73                                    ["32k",0x8000]],
    74                             defaultValue: "32k",
    75                             memorySection: "L1PSRAM"}],
    76
    77                     ['l1DMode',{desc:"L1D Cache",
    78                             base:0xF00000,
    79                             map : [["0k",0x0000],
    80                                    ["4k",0x1000],
    81                                    ["8k",0x2000],
    82                                    ["16k",0x4000],
    83                                    ["32k",0x8000]],
    84                             defaultValue: "32k",
    85                             memorySection: "L1DSRAM"}],
    86
    87                 ['l2Mode',{desc:"L2 Cache",
    88                             base:0x800000,
    89                             map : [["0k",0x0000],
    90                                    ["32k",0x8000],
    91                                    ["64k",0x10000],
    92                                    ["128k", 0x20000],
    93                                ["256k", 0x40000]],
    94                             defaultValue: "0k",
    95                             memorySection: "IRAM"}],
    96
    97        ];
    98
    99    instance:
   100
   101        override config string   cpuCore         = "64x+";
   102        override config string   isa = "64P";
   103        override config string   cpuCoreRevision = "1.0";
   104
   105        override config int     minProgUnitSize = 1;
   106        override config int     minDataUnitSize = 1;
   107        override config int     dataWordSize    = 4;
   108
   109        /*!
   110         *  ======== memMap ========
   111         *  The default memory map for this device
   112         */
   113        config xdc.platform.IPlatform.Memory memMap[string]  = [
   114            ["IRAM", {
   115                comment:    "Internal 2MB UMAP0 memory",
   116                name:       "IRAM",
   117                base:       0x800000,
   118                len:        0x200000,
   119                space:      "code/data",
   120                access:     "RWX"
   121            }],
   122
   123            ["L1PSRAM", {
   124                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   125                name:       "L1PSRAM",
   126                base:       0xE00000,
   127                len:        0x008000,
   128                space:      "code",
   129                access:     "RWX"
   130            }],
   131
   132            ["L1DSRAM", {
   133                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   134                name:       "L1DSRAM",
   135                base:       0xF00000,
   136                len:        0x008000,
   137                space:      "data",
   138                access:     "RW"
   139            }],
   140
   141        ];
   142    };


interface ti.catalog.c6000.IOMAP2x3x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IOMAP2x3x.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== IOMAP2x3x ========
    41     *  An interface implemented by all OMAP2x3x devices
    42     *
    43     *  This interface is defined to factor common data about all OMAP2x3x devices
    44     *  into a single place; they all have the same internal memory.
    45     */
    46    metaonly interface IOMAP2x3x inherits ti.catalog.ICpuDataSheet
    47    {
    48
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",  0x00000],
    59            ["32k", 0x08000],
    60            ["64k", 0x10000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64                 ['l1PMode',{desc:"L1P Cache",
    65                             base:0x10E00000,
    66                             map : [["0k",0x0000],
    67                                    ["4k",0x1000],
    68                                    ["8k",0x2000],
    69                                    ["16k",0x4000],
    70                                    ["32k",0x8000]],
    71                             defaultValue: "32k",
    72                             memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc:"L1D Cache",
    75                             base:0x10F04000,
    76                             map : [["0k",0x0000],
    77                                    ["4k",0x1000],
    78                                    ["8k",0x2000],
    79                                    ["16k",0x4000],
    80                                    ["32k",0x8000]],
    81                             defaultValue: "32k",
    82                             memorySection: "L1DSRAM"}],
    83
    84                 ['l2Mode',{desc:"L2 Cache",
    85                             base: 0x10800000,
    86                             map : [["0k",0x0000],
    87                                    ["32k",0x8000],
    88                                    ["64k",0x10000]],
    89                             defaultValue: "0k",
    90                             memorySection: "IRAM"}],
    91
    92        ];
    93
    94    instance:
    95        override config int     minProgUnitSize = 1;
    96        override config int     minDataUnitSize = 1;
    97        override config int     dataWordSize    = 4;
    98
    99        override config string   cpuCore        = "64x+";
   100        override config string   isa = "64P";
   101
   102        config xdc.platform.IPlatform.Memory memMap[string]  = [
   103            ["IRAM", {
   104                comment:    "Internal 64KB L2 UMAP0 memory",
   105                name:       "IRAM",
   106                base:       0x10800000,
   107                len:        0x00010000,
   108                space:      "code/data",
   109                access:     "RWX"
   110            }],
   111
   112            ["L1PSRAM", {
   113                comment:    "Internal 32KB L1 program memory",
   114                name:       "L1PSRAM",
   115                base:       0x10E00000,
   116                len:        0x00008000,
   117                space:      "code",
   118                access:     "RWX"
   119            }],
   120
   121            ["L1DSRAM", {
   122                comment:    "Internal 80KB L1 data memory",
   123                name:       "L1DSRAM",
   124                base:       0x10F04000,
   125                len:        0x00014000,
   126                space:      "data",
   127                access:     "RW"
   128            }],
   129        ];
   130    };


interface ti.catalog.c6000.IOMAP3xxx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== IOMAP3xxx.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== IOMAP3xxx ========
    41     *  An interface implemented by all OMAP3xxx devices
    42     *
    43     *  This interface is defined to factor common data about all OMAP3xxx devices
    44     *  into a single place; they all have the same internal memory.
    45     */
    46    metaonly interface IOMAP3xxx inherits ti.catalog.ICpuDataSheet
    47    {
    48
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",  0x00000],
    59            ["32k", 0x08000],
    60            ["64k", 0x10000]
    61        ];
    62
    63       readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64                 ['l1PMode',{desc:"L1P Cache",
    65                             base:0x10E00000,
    66                             map : [["0k",0x0000],
    67                                    ["4k",0x1000],
    68                                    ["8k",0x2000],
    69                                    ["16k",0x4000],
    70                                    ["32k",0x8000]],
    71                             defaultValue: "32k",
    72                             memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc:"L1D Cache",
    75                             base:0x10F04000,
    76                             map : [["0k",0x0000],
    77                                    ["4k",0x1000],
    78                                    ["8k",0x2000],
    79                                    ["16k",0x4000],
    80                                    ["32k",0x8000]],
    81                             defaultValue: "32k",
    82                             memorySection: "L1DSRAM"}],
    83
    84                 ['l2Mode',{desc:"L2 Cache",
    85                             base:0x107F8000,
    86                             map : [["0k",0x0000],
    87                                    ["32k",0x8000],
    88                                    ["64k",0x10000]],
    89                             defaultValue: "0k",
    90                             memorySection: "IRAM"}],
    91
    92        ];
    93
    94    instance:
    95        override config int     minProgUnitSize = 1;
    96        override config int     minDataUnitSize = 1;
    97        override config int     dataWordSize    = 4;
    98
    99        override config string   cpuCore        = "64x+";
   100        override config string   isa = "64P";
   101
   102        config xdc.platform.IPlatform.Memory memMap[string]  = [
   103            ["IRAM", {
   104                comment:    "Internal 96KB L2 UMAP0 memory",
   105                name:       "IRAM",
   106                base:       0x107F8000,
   107                len:        0x00018000,
   108                space:      "code/data",
   109                access:     "RWX"
   110            }],
   111
   112            ["L1PSRAM", {
   113                comment:    "Internal 32KB L1 program memory",
   114                name:       "L1PSRAM",
   115                base:       0x10E00000,
   116                len:        0x00008000,
   117                space:      "code",
   118                access:     "RWX"
   119            }],
   120
   121            ["L1DSRAM", {
   122                comment:    "Internal 80KB L1 data memory",
   123                name:       "L1DSRAM",
   124                base:       0x10F04000,
   125                len:        0x00014000,
   126                space:      "data",
   127                access:     "RW"
   128            }],
   129        ];
   130    };


interface ti.catalog.c6000.ITI811X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI811X.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITI811X ========
    41     *  An interface implemented by all TI811X devices
    42     *
    43     *  This interface is defined to factor common data about all TI811X type
    44     *  devices into a single place; they all have the same internal memory.
    45     */
    46    metaonly interface ITI811X inherits ti.catalog.ICpuDataSheet
    47    {
    48        config long cacheSizeL1[string] = [
    49            ["0k",  0x0000],
    50            ["4k",  0x1000],
    51            ["8k",  0x2000],
    52            ["16k", 0x4000],
    53            ["32k", 0x8000],
    54        ];
    55
    56        config long cacheSizeL2[string] = [
    57            ["0k",  0x00000],
    58            ["32k", 0x08000],
    59            ["64k", 0x10000],
    60            ["128k",0x20000],
    61            ["256k",0x40000],
    62        ];
    63
    64        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    65                 ['l1PMode',{desc:"L1P Cache",
    66                                 base:0x10E00000,
    67                             map : [["0k",0x0000],
    68                                    ["4k",0x1000],
    69                                    ["8k",0x2000],
    70                                    ["16k",0x4000],
    71                                    ["32k",0x8000]],
    72                             defaultValue: "32k",
    73                             memorySection: "L1PSRAM"}],
    74
    75                     ['l1DMode',{desc:"L1D Cache",
    76                                 base:0x10F00000,
    77                             map : [["0k",0x0000],
    78                                    ["4k",0x1000],
    79                                    ["8k",0x2000],
    80                                    ["16k",0x4000],
    81                                    ["32k",0x8000]],
    82                             defaultValue: "32k",
    83                             memorySection: "L1DSRAM"}],
    84
    85                 ['l2Mode',{desc:"L2 Cache",
    86                                 base:0x10800000,
    87                             map : [["0k",0x0000],
    88                                    ["32k",0x8000],
    89                                    ["64k",0x10000],
    90                                    ["128k",0x20000],
    91                                    ["256k",0x40000]],
    92                             defaultValue: "0k",
    93                             memorySection: "IRAM"}],
    94
    95        ];
    96
    97    instance:
    98        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    99
   100        override config int     minProgUnitSize = 1;
   101        override config int     minDataUnitSize = 1;
   102        override config int     dataWordSize    = 4;
   103
   104        override config string   cpuCore        = "674";
   105        override config string   isa            = "674";
   106        override config string   cpuCoreRevision = "1.0";
   107
   108        config xdc.platform.IPlatform.Memory memMap[string]  = [
   109
   110            ["IRAM", {
   111                comment:    "Internal 256KB L2 memory",
   112                name:       "IRAM",
   113                base:       0x10800000,
   114                len:        0x40000,
   115                space:      "code/data",
   116                access:     "RWX"
   117            }],
   118
   119            ["L1PSRAM", {
   120                comment:    "Internal 32KB L1 program memory",
   121                name:       "L1PSRAM",
   122                base:       0x10E00000,
   123                len:        0x8000,
   124                space:      "code",
   125                access:     "RWX"
   126            }],
   127
   128            ["L1DSRAM", {
   129                comment:    "Internal 32KB L1 data memory",
   130                name:       "L1DSRAM",
   131                base:       0x10F00000,
   132                len:        0x8000,
   133                space:      "data",
   134                access:     "RW"
   135            }],
   136
   137            ["OCMC", {
   138                comment:    "OCMC (On-chip RAM) (128KB)",
   139                name:       "OCMC",
   140                base:       0x40300000,
   141                len:        0x20000,
   142                space:      "code/data",
   143                access:     "RWX"
   144            }],
   145        ];
   146    };


interface ti.catalog.c6000.ITI8148

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI8148.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITI8148 ========
    41     *  An interface implemented by all TI8148 devices
    42     *
    43     *  This interface is defined to factor common data about all TI8148 type devices
    44     *  into a single place; they all have the same internal memory.
    45     */
    46    metaonly interface ITI8148 inherits ti.catalog.ICpuDataSheet
    47    {
    48        config long cacheSizeL1[string] = [
    49            ["0k",  0x0000],
    50            ["4k",  0x1000],
    51            ["8k",  0x2000],
    52            ["16k", 0x4000],
    53            ["32k", 0x8000],
    54        ];
    55
    56        config long cacheSizeL2[string] = [
    57            ["0k",  0x00000],
    58            ["32k", 0x08000],
    59            ["64k", 0x10000],
    60            ["128k",0x20000],
    61            ["256k",0x40000],
    62        ];
    63
    64        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    65                 ['l1PMode',{desc:"L1P Cache",
    66                                 base:0x10E00000,
    67                             map : [["0k",0x0000],
    68                                    ["4k",0x1000],
    69                                    ["8k",0x2000],
    70                                    ["16k",0x4000],
    71                                    ["32k",0x8000]],
    72                             defaultValue: "32k",
    73                             memorySection: "L1PSRAM"}],
    74
    75                     ['l1DMode',{desc:"L1D Cache",
    76                                 base:0x10F00000,
    77                             map : [["0k",0x0000],
    78                                    ["4k",0x1000],
    79                                    ["8k",0x2000],
    80                                    ["16k",0x4000],
    81                                    ["32k",0x8000]],
    82                             defaultValue: "32k",
    83                             memorySection: "L1DSRAM"}],
    84
    85                 ['l2Mode',{desc:"L2 Cache",
    86                                 base:0x10800000,
    87                             map : [["0k",0x0000],
    88                                    ["32k",0x8000],
    89                                    ["64k",0x10000],
    90                                    ["128k",0x20000],
    91                                    ["256k",0x40000]],
    92                             defaultValue: "0k",
    93                             memorySection: "IRAM"}],
    94
    95        ];
    96
    97    instance:
    98        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    99
   100        override config int     minProgUnitSize = 1;
   101        override config int     minDataUnitSize = 1;
   102        override config int     dataWordSize    = 4;
   103
   104        override config string   cpuCore        = "674";
   105        override config string   isa            = "674";
   106        override config string   cpuCoreRevision = "1.0";
   107
   108        config xdc.platform.IPlatform.Memory memMap[string]  = [
   109
   110            ["IRAM", {
   111                comment:    "Internal 256KB L2 memory",
   112                name:       "IRAM",
   113                base:       0x10800000,
   114                len:        0x40000,
   115                space:      "code/data",
   116                access:     "RWX"
   117            }],
   118
   119            ["L1PSRAM", {
   120                comment:    "Internal 32KB L1 program memory",
   121                name:       "L1PSRAM",
   122                base:       0x10E00000,
   123                len:        0x8000,
   124                space:      "code",
   125                access:     "RWX"
   126            }],
   127
   128            ["L1DSRAM", {
   129                comment:    "Internal 32KB L1 data memory",
   130                name:       "L1DSRAM",
   131                base:       0x10F00000,
   132                len:        0x8000,
   133                space:      "data",
   134                access:     "RW"
   135            }],
   136
   137            ["OCMC", {
   138                comment:    "OCMC (On-chip RAM) (128KB)",
   139                name:       "OCMC",
   140                base:       0x40300000,
   141                len:        0x20000,
   142                space:      "code/data",
   143                access:     "RWX"
   144            }],
   145        ];
   146    };


interface ti.catalog.c6000.ITI8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITI8168.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITI8168 ========
    41     *  An interface implemented by all TI8168 devices
    42     *
    43     *  This interface is defined to factor common data about all TI8168 type devices
    44     *  into a single place; they all have the same internal memory.
    45     */
    46    metaonly interface ITI8168 inherits ti.catalog.ICpuDataSheet
    47    {
    48
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",   0x00000],
    59            ["32k",  0x08000],
    60            ["64k",  0x10000],
    61            ["128k", 0x20000],
    62            ["256k", 0x40000],
    63        ];
    64
    65        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    66                 ['l1PMode', {desc: "L1P Cache",
    67                             base: 0x10E00000,
    68                             map : [["0k",  0x0000],
    69                                    ["4k",  0x1000],
    70                                    ["8k",  0x2000],
    71                                    ["16k", 0x4000],
    72                                    ["32k", 0x8000]],
    73                             defaultValue: "32k",
    74                             memorySection: "L1PSRAM"}],
    75
    76                     ['l1DMode', {desc: "L1D Cache",
    77                             base: 0x10F00000,
    78                             map : [["0k",  0x0000],
    79                                    ["4k",  0x1000],
    80                                    ["8k",  0x2000],
    81                                    ["16k", 0x4000],
    82                                    ["32k", 0x8000]],
    83                             defaultValue: "32k",
    84                             memorySection: "L1DSRAM"}],
    85
    86                 ['l2Mode', {desc: "L2 Cache",
    87                             base: 0x10800000,
    88                             map : [["0k",   0x00000],
    89                                    ["32k",  0x08000],
    90                                    ["64k",  0x10000],
    91                                    ["128k", 0x20000],
    92                                    ["256k", 0x40000]],
    93                             defaultValue: "0k",
    94                             memorySection: "IRAM"}],
    95
    96        ];
    97
    98    instance:
    99        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
   100        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp1;
   101        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp2;
   102
   103        override config int     minProgUnitSize = 1;
   104        override config int     minDataUnitSize = 1;
   105        override config int     dataWordSize    = 4;
   106
   107        override config string   cpuCore        = "674";
   108        override config string   isa            = "674";
   109        override config string   cpuCoreRevision = "1.0";
   110
   111        config xdc.platform.IPlatform.Memory memMap[string]  = [
   112
   113            ["IRAM", {
   114                comment:    "Internal 256KB L2 memory",
   115                name:       "IRAM",
   116                base:       0x10800000,
   117                len:        0x40000,
   118                space:      "code/data",
   119                access:     "RWX"
   120            }],
   121
   122            ["L1PSRAM", {
   123                comment:    "Internal 32KB L1 program memory",
   124                name:       "L1PSRAM",
   125                base:       0x10E00000,
   126                len:        0x8000,
   127                space:      "code",
   128                access:     "RWX"
   129            }],
   130
   131            ["L1DSRAM", {
   132                comment:    "Internal 32KB L1 data memory",
   133                name:       "L1DSRAM",
   134                base:       0x10F00000,
   135                len:        0x8000,
   136                space:      "data",
   137                access:     "RW"
   138            }],
   139
   140            ["OCMC_0", {
   141                comment:    "OCMC (On-chip RAM) Bank 0 (256KB)",
   142                name:       "OCMC_0",
   143                base:       0x40300000,
   144                len:        0x40000,
   145                space:      "code/data",
   146                access:     "RWX"
   147            }],
   148
   149            ["OCMC_1", {
   150                comment:    "OCMC (On-chip RAM) Bank 1 (256KB)",
   151                name:       "OCMC_1",
   152                base:       0x40400000,
   153                len:        0x40000,
   154                space:      "code/data",
   155                access:     "RWX"
   156            }],
   157        ];
   158    };


interface ti.catalog.c6000.ITMS320C6x0x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C6x0x.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320C6x0x ========
    41     *  An interface implemented by all TMS320C6x0x devices.
    42     *
    43     *  This interface is defined to factor common data about this family into
    44     *  a single place; all TMS320C6x0x devices extend this interface.
    45     */
    46    metaonly interface ITMS320C6x0x inherits ti.catalog.ICpuDataSheet
    47    {
    48        config xdc.platform.IPlatform.Memory memBlock[string]  = [
    49            ["IPRAM0", {
    50                comment: "Internal Program memory map 0",
    51                name: "IPRAM",
    52                base: 0x1400000,
    53                len:  0x0010000,
    54                space: "code"
    55            }],
    56
    57            ["IPRAM1", {
    58                comment: "Internal Program memory map 1",
    59                name: "IPRAM",
    60                base: 0x0000000,
    61                len:  0x0010000,
    62                space: "code"
    63            }],
    64
    65            ["IDRAM", {
    66                comment: "Internal Data memory",
    67                name: "IDRAM",
    68                base: 0x80000000,
    69                len:  0x00010000,
    70                space: "data"
    71            }],
    72        ];
    73
    74
    75    instance:
    76        override config string   cpuCoreRevision = "1.0";
    77
    78        override config int     minProgUnitSize = 1;
    79        override config int     minDataUnitSize = 1;
    80        override config int     dataWordSize    = 4;
    81
    82        /*!
    83         *  ======== memMap ========
    84         *  The default memory map for this device
    85         */
    86        config xdc.platform.IPlatform.Memory memMap[string];
    87    }


interface ti.catalog.c6000.ITMS320C6x1x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C6x1x.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320C6x1x ========
    41     *  An interface implemented by all TMS320C6x1x devices.
    42     *
    43     *  This interface is defined to factor common data about this family into
    44     *  a single place; all TMS320C6x1x devices extend this interface.
    45     */
    46    metaonly interface ITMS320C6x1x inherits ti.catalog.ICpuDataSheet
    47    {
    48        config long cacheSize[string] = [
    49        ["SRAM",        0x0000],
    50            ["1-way cache", 0x4000],
    51            ["2-way cache", 0x8000],
    52            ["3-way cache", 0xc000],
    53            ["4-way cache", 0x10000],
    54            ["0k",  0x0000],
    55            ["16k", 0x4000],
    56            ["32k", 0x8000],
    57            ["48k", 0xc000],
    58            ["64k", 0x10000],
    59        ];
    60
    61        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    62             ['l2Mode',{desc:"L2 Cache",
    63                         map : [["SRAM",0x0000],
    64                                ["1-way cache",0x4000],
    65                                ["2-way cache",0x8000],
    66                                ["3-way cache",0xc000],
    67                                ["4-way cache",0x10000]],
    68                         defaultValue: "4-way cache",
    69                         memorySection: "IRAM"}]
    70        ];
    71
    72    instance:
    73        override config string   cpuCoreRevision = "1.0";
    74
    75        override config int     minProgUnitSize = 1;
    76        override config int     minDataUnitSize = 1;
    77        override config int     dataWordSize    = 4;
    78
    79        /*!
    80         *  ======== memMap ========
    81         *  The default memory map for this device
    82         */
    83        config xdc.platform.IPlatform.Memory memMap[string];
    84    }


interface ti.catalog.c6000.ITMS320C64_1M

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C64_1M.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320C64_1M ========
    41     *  An interface implemented by all TMS320C64xx devices with 1MB of internal
    42     *  memory.
    43     *
    44     *  This interface is defined to factor common data about this family into
    45     *  a single place; all TMS320C64xx devices with 1MB of internal
    46     *  memory extend this interface.
    47     */
    48    metaonly interface ITMS320C64_1M inherits ti.catalog.ICpuDataSheet
    49    {
    50
    51        config long cacheSize[string] = [
    52            ["4-way cache (0k)",   0x00000],
    53            ["4-way cache (32k)",  0x08000],
    54            ["4-way cache (64k)",  0x10000],
    55            ["4-way cache (128k)", 0x20000],
    56            ["4-way cache (256k)", 0x40000],
    57            ["0k",   0x00000],
    58            ["32k",  0x08000],
    59            ["64k",  0x10000],
    60            ["128k", 0x20000],
    61            ["256k", 0x40000],
    62        ];
    63
    64        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    65             ['l2Mode',{desc:"L2 Cache",
    66                         map : [["4-way cache (0k)",0x0000],
    67                                ["4-way cache (32k)",0x8000],
    68                                ["4-way cache (64k)",0x10000],
    69                                ["4-way cache (128k)",0x20000],
    70                                ["4-way cache (256k)",0x40000]],
    71                         defaultValue: "4-way cache (0k)",
    72                         memorySection: "IRAM"}]
    73        ];
    74
    75
    76    instance:
    77        override config int     minProgUnitSize = 1;
    78        override config int     minDataUnitSize = 1;
    79        override config int     dataWordSize    = 4;
    80
    81        override config string   cpuCore        = "6400";
    82        override config string   isa = "64";
    83        override config string   cpuCoreRevision = "1.0";
    84
    85        /*!
    86         *  ======== memMap ========
    87         *  The default memory map for this device
    88         */
    89        config xdc.platform.IPlatform.Memory memMap[string]  = [
    90            ["IRAM", {
    91                name:       "IRAM",
    92                comment:    "Internal L2 memory",
    93                base:       0x000000,
    94                len:        0x100000,
    95                space:      "code/data",
    96                access:     "RWX"
    97            }],
    98        ];
    99    }


interface ti.catalog.c6000.ITMS320C64_128K

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C64_128K.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320C64_128K ========
    41     *  An interface implemented by all TMS320C64xx devices with 128KB of internal
    42     *  memory.
    43     *
    44     *  This interface is defined to factor common data about this family into
    45     *  a single place; all TMS320C64xx devices with 128KB of internal
    46     *  memory extend this interface.
    47     */
    48    metaonly interface ITMS320C64_128K inherits ti.catalog.ICpuDataSheet
    49    {
    50
    51        config long cacheSize[string] = [
    52            ["4-way cache (0k)",   0x00000],
    53            ["4-way cache (32k)",  0x08000],
    54            ["4-way cache (64k)",  0x10000],
    55            ["4-way cache (128k)", 0x20000],
    56            ["0k",   0x00000],
    57            ["32k",  0x08000],
    58            ["64k",  0x10000],
    59            ["128k", 0x20000],
    60        ];
    61
    62        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    63             ['l2Mode',{desc:"L2 Cache",
    64                         map : [["4-way cache (0k)",0x0000],
    65                                ["4-way cache (32k)",0x8000],
    66                                ["4-way cache (64k)",0x10000],
    67                                ["4-way cache (128k)",0x20000]],
    68                         defaultValue: "4-way cache (0k)",
    69                         memorySection: "IRAM"}]
    70        ];
    71
    72    instance:
    73        override config int     minProgUnitSize = 1;
    74        override config int     minDataUnitSize = 1;
    75        override config int     dataWordSize    = 4;
    76
    77        override config string   cpuCore        = "6400";
    78        override config string   isa = "64";
    79        override config string   cpuCoreRevision = "1.0";
    80
    81        /*!
    82         *  ======== memMap ========
    83         *  The default memory map for this device
    84         */
    85        config xdc.platform.IPlatform.Memory memMap[string]  = [
    86            ["IRAM", {
    87                name:       "IRAM",
    88                comment:    "Internal L2 memory",
    89                base:       0x00000,
    90                len:        0x20000,
    91                space:      "code/data",
    92                access:     "RWX"
    93            }],
    94        ];
    95    }


interface ti.catalog.c6000.ITMS320C64_256K

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C64_256K.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320C64_256K ========
    41     *  An interface implemented by all TMS320C64xx devices with 256KB of internal
    42     *  memory.
    43     *
    44     *  This interface is defined to factor common data about this family into
    45     *  a single place; all TMS320C64xx devices with 256KB of internal
    46     *  memory extend this interface.
    47     */
    48    metaonly interface ITMS320C64_256K inherits ti.catalog.ICpuDataSheet
    49    {
    50
    51        config long cacheSize[string] = [
    52            ["4-way cache (0k)",   0x00000],
    53            ["4-way cache (32k)",  0x08000],
    54            ["4-way cache (64k)",  0x10000],
    55            ["4-way cache (128k)", 0x20000],
    56            ["4-way cache (256k)", 0x40000],
    57            ["0k",   0x00000],
    58            ["32k",  0x08000],
    59            ["64k",  0x10000],
    60            ["128k", 0x20000],
    61            ["256k", 0x40000],
    62        ];
    63
    64        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    65             ['l2Mode',{desc:"L2 Cache",
    66                         map : [["4-way cache (0k)",0x0000],
    67                                ["4-way cache (32k)",0x8000],
    68                                ["4-way cache (64k)",0x10000],
    69                                ["4-way cache (128k)",0x20000],
    70                                ["4-way cache (256k)",0x40000]],
    71                         defaultValue: "4-way cache (0k)",
    72                         memorySection: "IRAM"}]
    73        ];
    74
    75    instance:
    76        override config int     minProgUnitSize = 1;
    77        override config int     minDataUnitSize = 1;
    78        override config int     dataWordSize    = 4;
    79
    80        override config string   cpuCore        = "6400";
    81        override config string   isa = "64";
    82        override config string   cpuCoreRevision = "1.0";
    83
    84        /*!
    85         *  ======== memMap ========
    86         *  The default memory map for this device
    87         */
    88        config xdc.platform.IPlatform.Memory memMap[string]  = [
    89            ["IRAM", {
    90                name:       "IRAM",
    91                comment:    "Internal L2 memory",
    92                base:       0x00000,
    93                len:        0x40000,
    94                space:      "code/data",
    95                access:     "RWX"
    96            }],
    97        ];
    98    }


interface ti.catalog.c6000.ITMS320C64_512K

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C64_512K.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320C64_512K ========
    41     *  An interface implemented by all TMS320C64xx devices with 512KB of internal
    42     *  memory.
    43     *
    44     *  This interface is defined to factor common data about this family into
    45     *  a single place; all TMS320C64xx devices with 512KB of internal
    46     *  memory extend this interface.
    47     */
    48    metaonly interface ITMS320C64_512K inherits ti.catalog.ICpuDataSheet
    49    {
    50
    51        config long cacheSize[string] = [
    52            ["4-way cache (0k)",   0x00000],
    53            ["4-way cache (32k)",  0x08000],
    54            ["4-way cache (64k)",  0x10000],
    55            ["4-way cache (128k)", 0x20000],
    56            ["4-way cache (256k)", 0x40000],
    57            ["0k",   0x00000],
    58            ["32k",  0x08000],
    59            ["64k",  0x10000],
    60            ["128k", 0x20000],
    61            ["256k", 0x40000],
    62        ];
    63
    64        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    65             ['l2Mode',{desc:"L2 Cache",
    66                         map : [["4-way cache (0k)",0x0000],
    67                                ["4-way cache (32k)",0x8000],
    68                                ["4-way cache (64k)",0x10000],
    69                                ["4-way cache (128k)",0x20000],
    70                                ["4-way cache (256k)",0x40000]],
    71                         defaultValue: "4-way cache (0k)",
    72                         memorySection: "IRAM"}]
    73        ];
    74
    75    instance:
    76        override config int     minProgUnitSize = 1;
    77        override config int     minDataUnitSize = 1;
    78        override config int     dataWordSize    = 4;
    79
    80        override config string   cpuCore        = "6400";
    81        override config string   isa="64";
    82        override config string   cpuCoreRevision = "1.0";
    83
    84        /*!
    85         *  ======== memMap ========
    86         *  The default memory map for this device
    87         */
    88        config xdc.platform.IPlatform.Memory memMap[string]  = [
    89            ["IRAM", {
    90                name:       "IRAM",
    91                comment:    "Internal L2 memory",
    92                base:       0x00000,
    93                len:        0x80000,
    94                space:      "code/data",
    95                access:     "RWX"
    96            }],
    97        ];
    98    }


interface ti.catalog.c6000.ITMS320C642x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C642x.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITMS320C642x ========
    40     *  The C642x device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly interface ITMS320C642x inherits ti.catalog.ICpuDataSheet
    46    {
    47        config long cacheSizeL1[string] = [
    48            ["0k",  0x0000],
    49            ["4k",  0x1000],
    50            ["8k",  0x2000],
    51            ["16k", 0x4000],
    52            ["32k", 0x8000],
    53        ];
    54
    55        config long cacheSizeL2[string] = [
    56            ["0k",   0x00000],
    57            ["32k",  0x08000],
    58            ["64k",  0x10000],
    59            ["128k", 0x20000]
    60        ];
    61
    62        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    63                 ['l1PMode',{desc:"L1P Cache",
    64                             base:0x10E08000,
    65                             map : [["0k",0x0000],
    66                                    ["4k",0x1000],
    67                                    ["8k",0x2000],
    68                                    ["16k",0x4000],
    69                                    ["32k",0x8000]],
    70                             defaultValue: "32k",
    71                             memorySection: "L1PSRAM"}],
    72
    73                     ['l1DMode',{desc:"L1D Cache",
    74                             base:0x10F04000,
    75                             map : [["0k",0x0000],
    76                                    ["4k",0x1000],
    77                                    ["8k",0x2000],
    78                                    ["16k",0x4000],
    79                                    ["32k",0x8000]],
    80                             defaultValue: "32k",
    81                             memorySection: "L1DSRAM"}],
    82
    83                 ['l2Mode',{desc:"L2 Cache",
    84                             base:0x10800000,
    85                             map : [["0k",0x0000],
    86                                    ["32k",0x8000],
    87                                    ["64k",0x10000],
    88                                    ["128k",0x20000]],
    89                             defaultValue: "0k",
    90                             memorySection: "IRAM"}],
    91
    92        ];
    93
    94    instance:
    95
    96        override config string   cpuCore        = "64x+";
    97        override config string   isa = "64P";
    98        override config string   cpuCoreRevision = "1.0";
    99
   100        override config int     minProgUnitSize = 1;
   101        override config int     minDataUnitSize = 1;
   102        override config int     dataWordSize    = 4;
   103
   104        /*!
   105         *  ======== memMap ========
   106         *  The default memory map for this device
   107         */
   108        config xdc.platform.IPlatform.Memory memMap[string]  = [
   109            ["IRAM", {
   110                comment:    "Internal 128KB UMAP0 memory",
   111                name:       "IRAM",
   112                base:       0x10800000,
   113                len:        0x00020000,
   114                space:      "code/data",
   115                access:     "RWX"
   116            }],
   117
   118            ["L1PSRAM", {
   119                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   120                name:       "L1PSRAM",
   121                base:       0x10E08000,
   122                len:        0x00008000,
   123                space:      "code",
   124                access:     "RWX"
   125            }],
   126
   127            ["L1DSRAM", {
   128                comment:    "Internal 80KB RAM/CACHE L1 data memory",
   129                name:       "L1DSRAM",
   130                base:       0x10F04000,
   131                len:        0x00014000,
   132                space:      "data",
   133                access:     "RW"
   134            }],
   135        ];
   136    };


interface ti.catalog.c6000.ITMS320C6452

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C6452.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320C6452 ========
    41     *  The interface for 6452 and similar devices' data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly interface ITMS320C6452 inherits ti.catalog.ICpuDataSheet
    47    {
    48
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",   0x00000],
    59            ["32k",  0x08000],
    60            ["64k",  0x10000],
    61            ["128k", 0x20000],
    62            ["256k", 0x40000]
    63        ];
    64
    65        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    66                 ['l1PMode',{desc:"L1P Cache",
    67                             base:0xE00000,
    68                             map : [["0k",0x0000],
    69                                    ["4k",0x1000],
    70                                    ["8k",0x2000],
    71                                    ["16k",0x4000],
    72                                    ["32k",0x8000]],
    73                             defaultValue: "32k",
    74                             memorySection: "L1PSRAM"}],
    75
    76                     ['l1DMode',{desc:"L1D Cache",
    77                             base:0xF00000,
    78                             map : [["0k",0x0000],
    79                                    ["4k",0x1000],
    80                                    ["8k",0x2000],
    81                                    ["16k",0x4000],
    82                                    ["32k",0x8000]],
    83                             defaultValue: "32k",
    84                             memorySection: "L1DSRAM"}],
    85
    86                 ['l2Mode',{desc:"L2 Cache",
    87                             base:0xA00000,
    88                             map : [["0k",0x0000],
    89                                    ["32k",0x8000],
    90                                    ["64k",0x10000],
    91                                    ["128k",0x20000],
    92                                    ["256k",0x40000]],
    93                             defaultValue: "0k",
    94                             memorySection: "IRAM"}],
    95        ];
    96
    97    instance:
    98
    99        override config string   cpuCore        = "64x+";
   100        override config string   isa = "64P";
   101        override config string   cpuCoreRevision = "1.0";
   102
   103        override config int     minProgUnitSize = 1;
   104        override config int     minDataUnitSize = 1;
   105        override config int     dataWordSize    = 4;
   106
   107        /*!
   108         *  ======== memMap ========
   109         *  The default memory map for this device
   110         */
   111        config xdc.platform.IPlatform.Memory memMap[string]  = [
   112            ["IRAM", {
   113                comment:    "Internal 1408KB L2 RAM/CACHE",
   114                name:       "IRAM",
   115                base:       0xA00000,
   116                len:        0x160000,
   117                space:      "code/data",
   118                access:     "RWX"
   119            }],
   120
   121            ["L1PSRAM", {
   122                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   123                name:       "L1PSRAM",
   124                base:       0xE00000,
   125                len:        0x008000,
   126                space:      "code",
   127                access:     "RWX"
   128            }],
   129
   130            ["L1DSRAM", {
   131                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   132                name:       "L1DSRAM",
   133                base:       0xF00000,
   134                len:        0x008000,
   135                space:      "data",
   136                access:     "RW"
   137            }],
   138
   139        ];
   140    };


interface ti.catalog.c6000.ITMS320C6655

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320C6655.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly interface ITMS320C6655 inherits ti.catalog.ICpuDataSheet
    41    {
    42        config long cacheSizeL1[string] = [
    43            ["0k",  0x0000],
    44            ["4k",  0x1000],
    45            ["8k",  0x2000],
    46            ["16k", 0x4000],
    47            ["32k", 0x8000],
    48        ];
    49
    50        config long cacheSizeL2[string] = [
    51            ["0k",    0x000000],
    52            ["32k",   0x008000],
    53            ["64k",   0x010000],
    54            ["128k",  0x020000],
    55            ["256k",  0x040000],
    56            ["512k",  0x080000],
    57            ["1024k", 0x100000]
    58        ];
    59
    60        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    61            ['l1PMode', {
    62                desc:"L1P Cache",
    63                base: 0x00E00000,
    64                map : [
    65                    ["0k",0x0000],
    66                    ["4k",0x1000],
    67                    ["8k",0x2000],
    68                    ["16k",0x4000],
    69                    ["32k",0x8000]
    70                ],
    71                defaultValue: "32k",
    72                memorySection: "L1PSRAM"
    73            }],
    74            ['l1DMode', {
    75                desc:"L1D Cache",
    76                base: 0x00F00000,
    77                map : [
    78                    ["0k",0x0000],
    79                    ["4k",0x1000],
    80                    ["8k",0x2000],
    81                    ["16k",0x4000],
    82                    ["32k",0x8000]
    83                ],
    84                defaultValue: "32k",
    85                memorySection: "L1DSRAM"
    86            }],
    87            ['l2Mode', {
    88                desc:"L2 Cache",
    89                base: 0x00800000,
    90                map : [
    91                    ["0k",0x0000],
    92                    ["32k",0x8000],
    93                    ["64k",0x10000],
    94                    ["128k",0x020000],
    95                    ["256k",0x040000],
    96                    ["512k",0x080000],
    97                    ["1024k", 0x100000]
    98                ],
    99                defaultValue: "0k",
   100                memorySection: "L2SRAM"
   101            }],
   102        ];
   103
   104    instance:
   105
   106        override config string   cpuCore        = "6600";
   107        override config string   isa = "66";
   108        override config string   cpuCoreRevision = "1.0";
   109
   110        override config int     minProgUnitSize = 1;
   111        override config int     minDataUnitSize = 1;
   112        override config int     dataWordSize    = 4;
   113
   114        /*!
   115         *  ======== memMap ========
   116         *  The default memory map for this device
   117         */
   118        config xdc.platform.IPlatform.Memory memMap[string]  = [
   119            ["L2SRAM", {
   120                comment:    "1MB L2 SRAM/CACHE",
   121                name:       "L2SRAM",
   122                base:       0x00800000,
   123                len:        0x00100000,
   124                space:      "code/data",
   125                access:     "RWX"
   126            }],
   127
   128            ["L1PSRAM", {
   129                comment:    "32KB RAM/CACHE L1 program memory",
   130                name:       "L1PSRAM",
   131                base:       0x00E00000,
   132                len:        0x00008000,
   133                space:      "code",
   134                access:     "RWX"
   135            }],
   136
   137            ["L1DSRAM", {
   138                comment:    "32KB RAM/CACHE L1 data memory",
   139                name:       "L1DSRAM",
   140                base:       0x00F00000,
   141                len:        0x00008000,
   142                space:      "data",
   143                access:     "RW"
   144            }],
   145
   146            ["MSMCSRAM", {
   147                comment:    "1MB MSMC SRAM",
   148                name:       "MSMCSRAM",
   149                base:       0x0C000000,
   150                len:        0x00100000,
   151                space:      "code/data",
   152                access:     "RWX"
   153            }],
   154        ];
   155    };


interface ti.catalog.c6000.ITMS320CDM6467

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CDM6467.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320CDM6467 ========
    41     *  An interface implemented by all DaVinci-HD devices
    42     *
    43     *  This interface is defined to factor common data about all DaVinci-HD devices
    44     *  into a single place; they are all the same from the configuration point of
    45     *  view.
    46     */
    47    metaonly interface ITMS320CDM6467 inherits ti.catalog.ICpuDataSheet
    48    {
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",   0x00000],
    59            ["32k",  0x08000],
    60            ["64k",  0x10000],
    61            ["128k", 0x20000],
    62        ];
    63
    64        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    65             ['l1PMode',{desc:"L1P Cache",
    66                         base:0x11E00000,
    67                         map : [["0k",0x0000],
    68                                ["4k",0x1000],
    69                                ["8k",0x2000],
    70                                ["16k",0x4000],
    71                                ["32k",0x8000]],
    72                         defaultValue: "32k",
    73                         memorySection: "L1PSRAM"}],
    74
    75             ['l1DMode',{desc:"L1D Cache",
    76                         base: 0x11F00000,
    77                         map : [["0k",0x0000],
    78                                ["4k",0x1000],
    79                                ["8k",0x2000],
    80                                ["16k",0x4000],
    81                                ["32k",0x8000]],
    82                         defaultValue: "32k",
    83                         memorySection: "L1DSRAM"}],
    84
    85             ['l2Mode',{desc:"L2 Cache",
    86                         base:0x11818000,
    87                         map : [["0k",0x0000],
    88                                ["32k",0x8000],
    89                                ["64k",0x10000],
    90                                ["128k",0x20000]],
    91                         defaultValue: "0k",
    92                         memorySection: "IRAM"}]
    93
    94        ];
    95
    96    instance:
    97
    98        override config string   cpuCore        = "64x+";
    99        override config string   isa = "64P";
   100        override config string   cpuCoreRevision = "1.0";
   101
   102        override config int     minProgUnitSize = 1;
   103        override config int     minDataUnitSize = 1;
   104        override config int     dataWordSize    = 4;
   105
   106        /*!
   107         *  ======== memMap ========
   108         *  The default memory map for this device
   109         */
   110        config xdc.platform.IPlatform.Memory memMap[string]  = [
   111            ["ARM_RAM", {
   112                comment:    "Internal ARM RAM memory",
   113                name:       "ARM_RAM",
   114                base:       0x10010000,
   115                len:        0x00008000,
   116                space:      "data",
   117                access:     "RW"
   118            }],
   119
   120            ["IRAM", {
   121                comment:    "Internal 128KB UMAP0 memory",
   122                name:       "IRAM",
   123                base:       0x11818000,
   124                len:        0x00020000,
   125                space:      "code/data",
   126                access:     "RWX"
   127            }],
   128
   129            ["L1PSRAM", {
   130                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   131                name:       "L1PSRAM",
   132                base:       0x11E00000,
   133                len:        0x00008000,
   134                space:      "code",
   135                access:     "RWX"
   136            }],
   137
   138            ["L1DSRAM", {
   139                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   140                name:       "L1DSRAM",
   141                base:       0x11F00000,
   142                len:        0x00008000,
   143                space:      "data",
   144                access:     "RW"
   145            }],
   146        ];
   147    };


interface ti.catalog.c6000.ITMS320CDRA44x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CDRA44x.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITMS320CDRA44x ========
    40     *  An interface implemented by all DRA44x devices
    41     *
    42     *  This interface is defined to factor common data about all DRA44x devices
    43     *  into a single place; they are all the same from the configuration point of
    44     *  view.
    45     */
    46    metaonly interface ITMS320CDRA44x inherits ti.catalog.ICpuDataSheet
    47    {
    48        config long cacheSizeL1[string] = [
    49            ["0k",  0x0000],
    50            ["4k",  0x1000],
    51            ["8k",  0x2000],
    52            ["16k", 0x4000],
    53            ["32k", 0x8000],
    54        ];
    55
    56        config long cacheSizeL2[string] = [
    57            ["0k",  0x00000],
    58            ["32k", 0x08000],
    59            ["64k", 0x10000]
    60        ];
    61
    62        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    63             ['l1PMode',{desc:"L1P Cache",
    64                         base: 0x11E08000,
    65                         map : [["0k",0x0000],
    66                                ["4k",0x1000],
    67                                ["8k",0x2000],
    68                                ["16k",0x4000],
    69                                ["32k",0x8000]],
    70                         defaultValue: "32k",
    71                         memorySection: "L1PSRAM"}],
    72
    73             ['l1DMode',{desc:"L1D Cache",
    74                         base:0x11F04000,
    75                         map : [["0k",0x0000],
    76                                ["4k",0x1000],
    77                                ["8k",0x2000],
    78                                ["16k",0x4000],
    79                                ["32k",0x8000]],
    80                         defaultValue: "32k",
    81                         memorySection: "L1DSRAM"}],
    82
    83             ['l2Mode',{desc:"L2 Cache",
    84                         base:0x11800000,
    85                         map : [["0k",0x0000],
    86                                ["32k",0x8000],
    87                                ["64k",0x10000]],
    88                         defaultValue: "0k",
    89                         memorySection: "IRAM"}]
    90
    91        ];
    92
    93    instance:
    94
    95        override config string   cpuCore        = "64x+";
    96        override config string   isa            = "64P";
    97        override config string   cpuCoreRevision = "1.0";
    98
    99        override config int     minProgUnitSize = 1;
   100        override config int     minDataUnitSize = 1;
   101        override config int     dataWordSize    = 4;
   102
   103        /*!
   104         *  ======== memMap ========
   105         *  The default memory map for this device
   106         */
   107        config xdc.platform.IPlatform.Memory memMap[string]  = [
   108            ["IRAM", {
   109                comment:    "Internal 64KB UMAP0 memory",
   110                name:       "IRAM",
   111                base:       0x11800000,
   112                len:        0x00010000,
   113                space:      "code/data",
   114                access:     "RWX"
   115            }],
   116
   117            ["L1PSRAM", {
   118                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   119                name:       "L1PSRAM",
   120                base:       0x11E08000,
   121                len:        0x00008000,
   122                space:      "code",
   123                access:     "RWX"
   124            }],
   125
   126            ["L1DSRAM", {
   127                comment:    "Internal 80KB RAM/CACHE L1 data memory",
   128                name:       "L1DSRAM",
   129                base:       0x11F04000,
   130                len:        0x00014000,
   131                space:      "data",
   132                access:     "RW"
   133            }],
   134
   135            ["ARM_RAM", {
   136                comment:    "Internal ARM RAM memory",
   137                name:       "ARM_RAM",
   138                base:       0x10008000,
   139                len:        0x00004000,
   140                space:      "data",
   141                access:     "RW"
   142            }],
   143        ];
   144    };


interface ti.catalog.c6000.ITMS320CDRA45x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CDRA45x.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITMS320CDRA45x ========
    40     *  An interface implemented by all DRA45x devices
    41     *
    42     *  This interface is defined to factor common data about all DRA45x devices
    43     *  into a single place; they are all the same from the configuration point of
    44     *  view.
    45     */
    46    metaonly interface ITMS320CDRA45x inherits ti.catalog.ICpuDataSheet
    47    {
    48        config long cacheSizeL1[string] = [
    49            ["0k",  0x0000],
    50            ["4k",  0x1000],
    51            ["8k",  0x2000],
    52            ["16k", 0x4000],
    53            ["32k", 0x8000],
    54        ];
    55
    56        config long cacheSizeL2[string] = [
    57            ["0k",  0x00000],
    58            ["32k", 0x08000],
    59            ["64k", 0x10000],
    60            ["128k", 0x20000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64                 ['l1PMode',{desc:"L1P Cache",
    65                             base:0x11E08000,
    66                             map : [["0k",0x0000],
    67                                    ["4k",0x1000],
    68                                    ["8k",0x2000],
    69                                    ["16k",0x4000],
    70                                    ["32k",0x8000]],
    71                             defaultValue: "32k",
    72                             memorySection: "L1PSRAM"}],
    73
    74                 ['l1DMode',{desc:"L1D Cache",
    75                             base:0x11F04000,
    76                             map : [["0k",0x0000],
    77                                    ["4k",0x1000],
    78                                    ["8k",0x2000],
    79                                    ["16k",0x4000],
    80                                    ["32k",0x8000]],
    81                             defaultValue: "32k",
    82                             memorySection: "L1DSRAM"}],
    83
    84                 ['l2Mode',{desc:"L2 Cache",
    85                             base:0x11800000,
    86                             map : [["0k",0x0000],
    87                                    ["32k",0x8000],
    88                                    ["64k",0x10000],
    89                                    ["128k",0x20000]],
    90                             defaultValue: "0k",
    91                             memorySection: "IRAM"}],
    92
    93        ];
    94
    95    instance:
    96
    97        override config string   cpuCore        = "64x+";
    98        override config string   isa            = "64P";
    99        override config string   cpuCoreRevision = "1.0";
   100
   101        override config int     minProgUnitSize = 1;
   102        override config int     minDataUnitSize = 1;
   103        override config int     dataWordSize    = 4;
   104
   105        /*!
   106         *  ======== memMap ========
   107         *  The default memory map for this device
   108         */
   109        config xdc.platform.IPlatform.Memory memMap[string]  = [
   110            ["IRAM", {
   111                comment:    "Internal 128KB UMAP0 memory",
   112                name:       "IRAM",
   113                base:       0x11800000,
   114                len:        0x00020000,
   115                space:      "code/data",
   116                access:     "RWX"
   117            }],
   118
   119            ["L1PSRAM", {
   120                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   121                name:       "L1PSRAM",
   122                base:       0x11E08000,
   123                len:        0x00008000,
   124                space:      "code",
   125                access:     "RWX"
   126            }],
   127
   128            ["L1DSRAM", {
   129                comment:    "Internal 80KB RAM/CACHE L1 data memory",
   130                name:       "L1DSRAM",
   131                base:       0x11F04000,
   132                len:        0x00014000,
   133                space:      "data",
   134                access:     "RW"
   135            }],
   136
   137            ["ARM_RAM", {
   138                comment:    "Internal ARM RAM memory",
   139                name:       "ARM_RAM",
   140                base:       0x10008000,
   141                len:        0x00004000,
   142                space:      "data",
   143                access:     "RW"
   144            }],
   145        ];
   146    };


interface ti.catalog.c6000.ITMS320CDRx40x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CDRx40x.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITMS320CDRx40x ========
    40     *  An interface implemented by all DRx40x and DRx41x devices
    41     *
    42     *  This interface is defined to factor common data about all DRA40x and
    43     *  DRA41x devices into a single file; they are all configured in the same way.
    44     */
    45    metaonly interface ITMS320CDRx40x inherits ti.catalog.ICpuDataSheet
    46    {
    47        config long cacheSizeL1[string] = [
    48            ["0k",  0x0000],
    49            ["4k",  0x1000],
    50            ["8k",  0x2000],
    51            ["16k", 0x4000],
    52            ["32k", 0x8000],
    53        ];
    54
    55        config long cacheSizeL2[string] = [
    56            ["0k",  0x00000],
    57            ["32k", 0x08000],
    58            ["64k", 0x10000],
    59            ["128k",0x20000],
    60        ];
    61
    62        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    63             ['l1PMode',{desc:"L1P Cache",
    64                         base:0x11E00000,
    65                         map : [["0k",0x0000],
    66                                ["4k",0x1000],
    67                                ["8k",0x2000],
    68                                ["16k",0x4000]],
    69                         defaultValue: "16k",
    70                         memorySection: "L1PSRAM"}],
    71
    72             ['l1DMode',{desc:"L1D Cache",
    73                         base:0x11F00000,
    74                         map : [["0k",0x0000],
    75                                ["4k",0x1000],
    76                                ["8k",0x2000],
    77                                ["16k",0x4000],
    78                                ["32k",0x8000]],
    79                         defaultValue: "32k",
    80                         memorySection: "L1DSRAM"}],
    81
    82             ['l2Mode',{desc:"L2 Cache",
    83                         base: 0x11810000,
    84                         map : [["0k",0x0000],
    85                                ["32k",0x8000],
    86                                ["64k",0x10000],
    87                                ["128k",0x20000]],
    88                         defaultValue: "0k",
    89                         memorySection: "IRAM"}]
    90
    91        ];
    92
    93    instance:
    94
    95        override config string   cpuCore        = "64x+";
    96        override config string   isa            = "64P";
    97        override config string   cpuCoreRevision = "1.0";
    98
    99        override config int     minProgUnitSize = 1;
   100        override config int     minDataUnitSize = 1;
   101        override config int     dataWordSize    = 4;
   102
   103        /*!
   104         *  ======== memMap ========
   105         *  The default memory map for this device
   106         */
   107        config xdc.platform.IPlatform.Memory memMap[string]  = [
   108            ["IRAM", {
   109                comment:    "Internal 192KB UMAP0 memory",
   110                name:       "IRAM",
   111                base:       0x11810000,
   112                len:        0x00030000,
   113                space:      "code/data",
   114                access:     "RWX"
   115            }],
   116
   117            ["L1PSRAM", {
   118                comment:    "Internal 16KB RAM/CACHE L1 program memory",
   119                name:       "L1PSRAM",
   120                base:       0x11E00000,
   121                len:        0x00004000,
   122                space:      "code",
   123                access:     "RWX"
   124            }],
   125
   126            ["L1DSRAM", {
   127                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   128                name:       "L1DSRAM",
   129                base:       0x11F00000,
   130                len:        0x00008000,
   131                space:      "data",
   132                access:     "RW"
   133            }],
   134
   135            ["ARM_RAM", {
   136                comment:    "Internal ARM RAM memory",
   137                name:       "ARM_RAM",
   138                base:       0x10008000,
   139                len:        0x00004000,
   140                space:      "data",
   141                access:     "RW"
   142            }],
   143        ];
   144    };


interface ti.catalog.c6000.ITMS320CTCI648x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CTCI648x.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITMS320CTCI648x ========
    40     *  An interface implemented by TCI6487 and TCI6488 devices
    41     *
    42     *  This interface is defined to factor common data about TCI6487 and TCI6488
    43     *  devices into a single place; they are all the same from the configuration
    44     *  point of view.
    45     */
    46    metaonly interface ITMS320CTCI648x inherits ti.catalog.ICpuDataSheet
    47    {
    48
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",   0x00000],
    59            ["32k",  0x08000],
    60            ["64k",  0x10000],
    61            ["128k", 0x20000],
    62            ["256k", 0x40000]
    63        ];
    64
    65        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    66                     ['l1PMode',{desc:"L1P Cache",
    67                                 base: 0xE00000,
    68                                 map : [["0k",0x0000],
    69                                        ["4k",0x1000],
    70                                        ["8k",0x2000],
    71                                        ["16k",0x4000],
    72                                        ["32k",0x8000]],
    73                                 defaultValue: "32k",
    74                                 memorySection: "L1PSRAM"}],
    75
    76                             ['l1DMode',{desc:"L1D Cache",
    77                                 base: 0xF00000,
    78                                 map : [["0k",0x0000],
    79                                        ["4k",0x1000],
    80                                        ["8k",0x2000],
    81                                        ["16k",0x4000],
    82                                        ["32k",0x8000]],
    83                                 defaultValue: "32k",
    84                                 memorySection: "L1DSRAM"}],
    85
    86                 ['l2Mode',{desc:"L2 Cache",
    87                                 base: 0x00800000,
    88                                 map : [["0k",0x0000],
    89                                    ["32k",0x8000],
    90                                    ["64k",0x10000],
    91                                    ["128k",0x20000],
    92                                    ["256k",0x40000]],
    93                                 defaultValue: "0k",
    94                                 memorySection: "L2RAM"}]
    95
    96        ];
    97
    98        config xdc.platform.IPlatform.Memory memBlock[string]  = [
    99            ["ASYMGEM0L2RAM", {
   100                comment:    "1536K L2 RAM/CACHE memory",
   101                name:       "L2RAM",
   102                base:       0x00800000,
   103                len:        0x00180000,
   104                space:      "code/data",
   105                access:     "RWX"
   106            }],
   107
   108            ["ASYMGEM1L2RAM", {
   109                comment:    "1024K L2 RAM/CACHE memory",
   110                name:       "L2RAM",
   111                base:       0x00800000,
   112                len:        0x00100000,
   113                space:      "code/data",
   114                access:     "RWX"
   115            }],
   116
   117            ["ASYMGEM2L2RAM", {
   118                comment:    "512K L2 RAM/CACHE memory",
   119                name:       "L2RAM",
   120                base:       0x00800000,
   121                len:        0x00080000,
   122                space:      "code/data",
   123                access:     "RWX"
   124            }],
   125
   126            ["SYMGEML2RAM", {
   127                comment:    "1024K L2 RAM/CACHE memory",
   128                name:       "L2RAM",
   129                base:       0x00800000,
   130                len:        0x00100000,
   131                space:      "code/data",
   132                access:     "RWX"
   133            }],
   134
   135        ];
   136
   137    instance:
   138
   139        override config string   cpuCore        = "64x+";
   140        override config string   isa = "64P";
   141        override config string   cpuCoreRevision = "1.0";
   142
   143        override config int     minProgUnitSize = 1;
   144        override config int     minDataUnitSize = 1;
   145        override config int     dataWordSize    = 4;
   146
   147        /*!
   148         *  ======== memMap ========
   149         *  The default memory map for this device
   150         */
   151        config xdc.platform.IPlatform.Memory memMap[string] = [
   152
   153            ["L1PSRAM", {
   154                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   155                name:       "L1PSRAM",
   156                base:       0xE00000,
   157                len:        0x008000,
   158                space:      "code",
   159                access:     "RWX"
   160            }],
   161
   162            ["L1DSRAM", {
   163                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   164                name:       "L1DSRAM",
   165                base:       0xF00000,
   166                len:        0x008000,
   167                space:      "data",
   168                access:     "RW"
   169            }],
   170        ];
   171
   172    };


interface ti.catalog.c6000.ITMS320CTCI6484

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CTCI6484.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320CTCI6484 ========
    41     */
    42    metaonly interface ITMS320CTCI6484 inherits ti.catalog.ICpuDataSheet
    43    {
    44
    45        config long cacheSizeL1[string] = [
    46            ["0k",  0x0000],
    47            ["4k",  0x1000],
    48            ["8k",  0x2000],
    49            ["16k", 0x4000],
    50            ["32k", 0x8000],
    51        ];
    52
    53        config long cacheSizeL2[string] = [
    54            ["0k",    0x000000],
    55            ["32k",   0x008000],
    56            ["64k",   0x010000],
    57            ["128k",  0x020000],
    58            ["256k",  0x040000],
    59            ["512k",  0x080000],
    60            ["1024k", 0x100000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64             ['l1PMode',{desc:"L1P Cache",
    65                         base: 0xE00000,
    66                         map : [["0k",0x0000],
    67                                ["4k",0x1000],
    68                                ["8k",0x2000],
    69                                ["16k",0x4000],
    70                                ["32k",0x8000]],
    71                         defaultValue: "32k",
    72                         memorySection: "L1PSRAM"}],
    73
    74             ['l1DMode',{desc:"L1D Cache",
    75                         base:0xF00000,
    76                         map : [["0k",0x0000],
    77                                ["4k",0x1000],
    78                                ["8k",0x2000],
    79                                ["16k",0x4000],
    80                                ["32k",0x8000]],
    81                         defaultValue: "32k",
    82                         memorySection: "L1DSRAM"}],
    83
    84             ['l2Mode',{desc:"L2 Cache",
    85                         base:0x800000,
    86                         map : [["0k",0x0000],
    87                                ["32k",0x8000],
    88                                ["64k",0x10000],
    89                                ["128k",0x20000],
    90                                ["256k",0x40000],
    91                                ["512k",  0x080000],
    92                                ["1024k", 0x100000]],
    93                         defaultValue: "0k",
    94                         memorySection: "IRAM"}],
    95
    96        ];
    97
    98    instance:
    99
   100        override config string   cpuCore        = "64x+";
   101        override config string   isa            = "64P";
   102        override config string   cpuCoreRevision = "1.0";
   103
   104        override config int     minProgUnitSize = 1;
   105        override config int     minDataUnitSize = 1;
   106        override config int     dataWordSize    = 4;
   107
   108        /*!
   109         *  ======== memMap ========
   110         *  The default memory map for this device
   111         */
   112        config xdc.platform.IPlatform.Memory memMap[string]  = [
   113            ["IRAM", {
   114                comment:    "Internal 2MB L2 memory",
   115                name:       "IRAM",
   116                base:       0x800000,
   117                len:        0x200000,
   118                space:      "code/data",
   119                access:     "RWX"
   120            }],
   121
   122            ["L1PSRAM", {
   123                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   124                name:       "L1PSRAM",
   125                base:       0xE00000,
   126                len:        0x008000,
   127                space:      "code",
   128                access:     "RWX"
   129            }],
   130
   131            ["L1DSRAM", {
   132                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   133                name:       "L1DSRAM",
   134                base:       0xF00000,
   135                len:        0x008000,
   136                space:      "data",
   137                access:     "RW"
   138            }],
   139
   140        ];
   141    };


interface ti.catalog.c6000.ITMS320CTCI6486

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CTCI6486.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== ITMS320CTCI6486 ========
    40     *  An interface implemented by TCI6486 like devices
    41     *
    42     */
    43    metaonly interface ITMS320CTCI6486 inherits ti.catalog.ICpuDataSheet
    44    {
    45        config long cacheSizeL1[string] = [
    46            ["0k",  0x0000],
    47            ["4k",  0x1000],
    48            ["8k",  0x2000],
    49            ["16k", 0x4000],
    50            ["32k", 0x8000],
    51        ];
    52
    53        config long cacheSizeL2[string] = [
    54            ["0k",   0x00000],
    55            ["32k",  0x08000],
    56            ["64k",  0x10000],
    57            ["128k", 0x20000],
    58            ["256k", 0x40000]
    59        ];
    60
    61        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =
    62
    63            [
    64                     ['l1PMode',{desc:"L1P Cache",
    65                                 base:0xE00000,
    66                                 map : [["0k",0x0000],
    67                                        ["4k",0x1000],
    68                                        ["8k",0x2000],
    69                                        ["16k",0x4000],
    70                                        ["32k",0x8000]],
    71                                 defaultValue: "32k",
    72                                 memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc:"L1D Cache",
    75                                 base:0xF00000,
    76                                 map : [["0k",0x0000],
    77                                        ["4k",0x1000],
    78                                        ["8k",0x2000],
    79                                        ["16k",0x4000],
    80                                        ["32k",0x8000]],
    81                                 defaultValue: "32k",
    82                                 memorySection: "L1DSRAM"}],
    83
    84                 ['l2Mode',{desc:"L2 Cache",
    85                                 base:0x00800000,
    86                                 map : [["0k",0x0000],
    87                                    ["32k",0x8000],
    88                                    ["64k",0x10000],
    89                                    ["128k",0x20000],
    90                                    ["256k",0x40000]],
    91                                 defaultValue: "0k",
    92                                 memorySection: "LL2RAM"}],
    93
    94            ];
    95
    96    instance:
    97
    98        override config string   cpuCore        = "64x+";
    99        override config string   isa="64P";
   100        override config string   cpuCoreRevision = "1.0";
   101
   102        override config int     minProgUnitSize = 1;
   103        override config int     minDataUnitSize = 1;
   104        override config int     dataWordSize    = 4;
   105
   106        /*!
   107         *  ======== memMap ========
   108         *  The default memory map for this device
   109         */
   110        config xdc.platform.IPlatform.Memory memMap[string]  = [
   111            ["LL2RAM", {
   112                comment:    "608K Local L2 RAM/CACHE memory",
   113                name:       "LL2RAM",
   114                base:       0x00800000,
   115                len:        0x00098000,
   116                space:      "code/data",
   117                access:     "RWX"
   118            }],
   119
   120            ["L1PSRAM", {
   121                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   122                name:       "L1PSRAM",
   123                base:       0xE00000,
   124                len:        0x008000,
   125                space:      "code",
   126                access:     "RWX"
   127            }],
   128
   129            ["L1DSRAM", {
   130                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   131                name:       "L1DSRAM",
   132                base:       0xF00000,
   133                len:        0x008000,
   134                space:      "data",
   135                access:     "RW"
   136            }],
   137
   138            ["SL2RAM", {
   139                comment:    "768K Shared L2 RAM memory",
   140                name:       "SL2RAM",
   141                base:       0x00200000,
   142                len:        0x000C0000,
   143                space:      "code/data",
   144                access:     "RWX"
   145            }],
   146        ];
   147    };


interface ti.catalog.c6000.ITMS320CTCI6497

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320CTCI6497.xdc ========
    35     *
    36     */
    37
    38     package ti.catalog.c6000;
    39
    40    metaonly interface ITMS320CTCI6497 inherits ti.catalog.ICpuDataSheet
    41    {
    42
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        config long cacheSizeL2[string] = [
    52            ["0k",    0x000000],
    53            ["32k",   0x008000],
    54            ["64k",   0x010000],
    55            ["128k",  0x020000],
    56            ["256k",  0x040000],
    57            ["512k",  0x080000],
    58            ["1024k", 0x100000]
    59        ];
    60
    61        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    62                 ['l1PMode',{desc:"L1P Cache",
    63                             base: 0x00E00000,
    64                             map : [["0k",0x0000],
    65                                    ["4k",0x1000],
    66                                    ["8k",0x2000],
    67                                    ["16k",0x4000],
    68                                    ["32k",0x8000]],
    69                             defaultValue: "32k",
    70                             memorySection: "L1PSRAM"}],
    71
    72                     ['l1DMode',{desc:"L1D Cache",
    73                             base: 0x00F00000,
    74                             map : [["0k",0x0000],
    75                                    ["4k",0x1000],
    76                                    ["8k",0x2000],
    77                                    ["16k",0x4000],
    78                                    ["32k",0x8000]],
    79                             defaultValue: "32k",
    80                             memorySection: "L1DSRAM"}],
    81
    82                 ['l2Mode',{desc:"L2 Cache",
    83                             base: 0x00800000,
    84                             map : [["0k",0x0000],
    85                                    ["32k",0x8000],
    86                                    ["64k",0x10000],
    87                                ["128k",  0x020000],
    88                                    ["256k",  0x040000],
    89                                    ["512k",  0x080000],
    90                                ["1024k", 0x100000]],
    91                             defaultValue: "0k",
    92                             memorySection: "L2SRAM"}],
    93
    94        ];
    95
    96    instance:
    97
    98        override config string   cpuCore        = "64x+";
    99        override config string   isa = "64P";
   100        override config string   cpuCoreRevision = "1.0";
   101
   102        override config int     minProgUnitSize = 1;
   103        override config int     minDataUnitSize = 1;
   104        override config int     dataWordSize    = 4;
   105
   106        /*!
   107         *  ======== memMap ========
   108         *  The default memory map for this device
   109         */
   110        config xdc.platform.IPlatform.Memory memMap[string]  = [
   111            ["L2SRAM", {
   112                comment:    "1MB L2 SRAM/CACHE",
   113                name:       "L2SRAM",
   114                base:       0x00800000,
   115                len:        0x00100000,
   116                space:      "code/data",
   117                access:     "RWX"
   118            }],
   119
   120            ["L1PSRAM", {
   121                comment:    "32KB RAM/CACHE L1 program memory",
   122                name:       "L1PSRAM",
   123                base:       0x00E00000,
   124                len:        0x00008000,
   125                space:      "code",
   126                access:     "RWX"
   127            }],
   128
   129            ["L1DSRAM", {
   130                comment:    "32KB RAM/CACHE L1 data memory",
   131                name:       "L1DSRAM",
   132                base:       0x00F00000,
   133                len:        0x00008000,
   134                space:      "data",
   135                access:     "RW"
   136            }],
   137
   138            ["MSMCSRAM", {
   139                comment:    "2MB MSMC SRAM",
   140                name:       "MSMCSRAM",
   141                base:       0x0C000000,
   142                len:        0x00200000,
   143                space:      "code/data",
   144                access:     "RWX"
   145            }],
   146        ];
   147    };


interface ti.catalog.c6000.ITMS320DA8xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320DA8xx.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== ITMS320DA8xx ========
    41     *  An interface implemented by TMS320DA8xx devices.
    42     *
    43     */
    44    metaonly interface ITMS320DA8xx inherits ti.catalog.ICpuDataSheet
    45    {
    46
    47        config long cacheSizeL1[string] = [
    48            ["0k",  0x0000],
    49            ["4k",  0x1000],
    50            ["8k",  0x2000],
    51            ["16k", 0x4000],
    52            ["32k", 0x8000],
    53        ];
    54
    55        config long cacheSizeL2[string] = [
    56            ["0k",  0x00000],
    57            ["32k", 0x08000],
    58            ["64k", 0x10000],
    59            ["128k",0x20000],
    60            ["256k",0x40000],
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64                 ['l1PMode',{desc:"L1P Cache",
    65                             base: 0x11E00000,
    66                             map : [["0k",0x0000],
    67                                    ["4k",0x1000],
    68                                    ["8k",0x2000],
    69                                    ["16k",0x4000],
    70                                    ["32k",0x8000]],
    71                             defaultValue: "32k",
    72                             memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc:"L1D Cache",
    75                             base: 0x11F00000,
    76                             map : [["0k",0x0000],
    77                                    ["4k",0x1000],
    78                                    ["8k",0x2000],
    79                                    ["16k",0x4000],
    80                                    ["32k",0x8000]],
    81                             defaultValue: "32k",
    82                             memorySection: "L1DSRAM"}],
    83
    84                 ['l2Mode',{desc:"L2 Cache",
    85                             base: 0x11800000,
    86                             map : [["0k",0x0000],
    87                                    ["32k",0x8000],
    88                                    ["64k",0x10000],
    89                                    ["128k",0x20000],
    90                                    ["256k",0x40000]],
    91                             defaultValue: "0k",
    92                             memorySection: "IRAM"}],
    93
    94        ];
    95
    96    instance:
    97        override config int     minProgUnitSize = 1;
    98        override config int     minDataUnitSize = 1;
    99        override config int     dataWordSize    = 4;
   100
   101        override config string   cpuCore        = "C674";
   102        override config string   isa = "674";
   103        override config string   cpuCoreRevision = "1.0";
   104
   105        config xdc.platform.IPlatform.Memory memMap[string]  = [
   106            ["IROM", {
   107                comment:    "Internal 1MB L2 ROM",
   108                name:       "IROM",
   109                base:       0x11700000,
   110                len:        0x00100000,
   111                space:      "code/data",
   112                access:     "RX"
   113            }],
   114
   115            ["IRAM", {
   116                comment:    "Internal 256KB L2 memory",
   117                name:       "IRAM",
   118                base:       0x11800000,
   119                len:        0x00040000,
   120                space:      "code/data",
   121                access:     "RWX"
   122            }],
   123
   124            ["L1PSRAM", {
   125                comment:    "Internal 32KB L1 program memory",
   126                name:       "L1PSRAM",
   127                base:       0x11E00000,
   128                len:        0x00008000,
   129                space:      "code",
   130                access:     "RWX"
   131            }],
   132
   133            ["L1DSRAM", {
   134                comment:    "Internal 32KB L1 data memory",
   135                name:       "L1DSRAM",
   136                base:       0x11F00000,
   137                len:        0x00008000,
   138                space:      "data",
   139                access:     "RW"
   140            }],
   141
   142            ["L3_CBA_RAM", {
   143                comment:    "128KB ARM/DSP local shared RAM",
   144                name:       "L3_CBA_RAM",
   145                base:       0x80000000,
   146                len:        0x00020000,
   147                space:      "code/data",
   148                access:     "RWX"
   149            }],
   150        ];
   151    };


interface ti.catalog.c6000.ITMS320TCI663x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320TCI663x.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly interface ITMS320TCI663x inherits ti.catalog.ICpuDataSheet
    41    {
    42        /* These are the available sizes for L1 caches */
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        /* These are the available sizes for L2 cche */
    52        config long cacheSizeL2[string] = [
    53            ["0k",    0x000000],
    54            ["32k",   0x008000],
    55            ["64k",   0x010000],
    56            ["128k",  0x020000],
    57            ["256k",  0x040000],
    58            ["512k",  0x080000],
    59            ["1024k", 0x100000]
    60        ];
    61
    62        /* This is used by platform wizard for setting default cache sizes */
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64            ['l1PMode', {
    65                desc:"L1P Cache",
    66                base: 0x00E00000,
    67                map : [
    68                    ["0k",0x0000],
    69                    ["4k",0x1000],
    70                    ["8k",0x2000],
    71                    ["16k",0x4000],
    72                    ["32k",0x8000]
    73                ],
    74                defaultValue: "32k",
    75                memorySection: "L1PSRAM"
    76            }],
    77            ['l1DMode', {
    78                desc:"L1D Cache",
    79                base: 0x00F00000,
    80                map : [
    81                    ["0k",0x0000],
    82                    ["4k",0x1000],
    83                    ["8k",0x2000],
    84                    ["16k",0x4000],
    85                    ["32k",0x8000]
    86                ],
    87                defaultValue: "32k",
    88                memorySection: "L1DSRAM"
    89            }],
    90            ['l2Mode', {
    91                desc:"L2 Cache",
    92                base: 0x00800000,
    93                map : [
    94                    ["0k",0x0000],
    95                    ["32k",0x8000],
    96                    ["64k",0x10000],
    97                    ["128k",  0x020000],
    98                    ["256k",  0x040000],
    99                    ["512k",  0x080000],
   100                    ["1024k", 0x100000]
   101                ],
   102                defaultValue: "0k",
   103                memorySection: "L2SRAM"}
   104            ],
   105        ];
   106
   107    instance:
   108
   109        override config string   cpuCore        = "6600";
   110        override config string   isa = "66";
   111        override config string   cpuCoreRevision = "1.0";
   112
   113        override config int     minProgUnitSize = 1;
   114        override config int     minDataUnitSize = 1;
   115        override config int     dataWordSize    = 4;
   116
   117        /*!
   118         *  ======== memMap ========
   119         *  The default memory map for this device
   120         */
   121        config xdc.platform.IPlatform.Memory memMap[string]  = [
   122            ["L2SRAM", {
   123                comment:    "1MB L2 SRAM/CACHE",
   124                name:       "L2SRAM",
   125                base:       0x00800000,
   126                len:        0x00100000,
   127                space:      "code/data",
   128                access:     "RWX"
   129            }],
   130
   131            ["L1PSRAM", {
   132                comment:    "32KB RAM/CACHE L1 program memory",
   133                name:       "L1PSRAM",
   134                base:       0x00E00000,
   135                len:        0x00008000,
   136                space:      "code",
   137                access:     "RWX"
   138            }],
   139
   140            ["L1DSRAM", {
   141                comment:    "32KB RAM/CACHE L1 data memory",
   142                name:       "L1DSRAM",
   143                base:       0x00F00000,
   144                len:        0x00008000,
   145                space:      "data",
   146                access:     "RW"
   147            }],
   148
   149            ["MSMCSRAM", {
   150                comment:    "6MB MSMC SRAM",
   151                name:       "MSMCSRAM",
   152                base:       0x0C000000,
   153                len:        0x00600000,
   154                space:      "code/data",
   155                access:     "RWX"
   156            }],
   157        ];
   158    };


interface ti.catalog.c6000.ITMS320TCI6608

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320TCI6608.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly interface ITMS320TCI6608 inherits ti.catalog.ICpuDataSheet
    41    {
    42
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        config long cacheSizeL2[string] = [
    52            ["0k",    0x000000],
    53            ["32k",   0x008000],
    54            ["64k",   0x010000],
    55            ["128k",  0x020000],
    56            ["256k",  0x040000],
    57            ["512k",  0x080000]
    58        ];
    59
    60        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    61                 ['l1PMode',{desc:"L1P Cache",
    62                             base: 0x00E00000,
    63                             map : [["0k",0x0000],
    64                                    ["4k",0x1000],
    65                                    ["8k",0x2000],
    66                                    ["16k",0x4000],
    67                                    ["32k",0x8000]],
    68                             defaultValue: "32k",
    69                             memorySection: "L1PSRAM"}],
    70
    71                     ['l1DMode',{desc:"L1D Cache",
    72                             base: 0x00F00000,
    73                             map : [["0k",0x0000],
    74                                    ["4k",0x1000],
    75                                    ["8k",0x2000],
    76                                    ["16k",0x4000],
    77                                    ["32k",0x8000]],
    78                             defaultValue: "32k",
    79                             memorySection: "L1DSRAM"}],
    80
    81                 ['l2Mode',{desc:"L2 Cache",
    82                             base: 0x00800000,
    83                             map : [["0k",0x0000],
    84                                    ["32k",0x8000],
    85                                    ["64k",0x10000],
    86                                ["128k",  0x020000],
    87                                    ["256k",  0x040000],
    88                                    ["512k",  0x080000]],
    89                             defaultValue: "0k",
    90                             memorySection: "L2SRAM"}],
    91
    92        ];
    93
    94    instance:
    95
    96        override config string   cpuCore        = "6600";
    97        override config string   isa = "66";
    98        override config string   cpuCoreRevision = "1.0";
    99
   100        override config int     minProgUnitSize = 1;
   101        override config int     minDataUnitSize = 1;
   102        override config int     dataWordSize    = 4;
   103
   104        /*!
   105         *  ======== memMap ========
   106         *  The default memory map for this device
   107         */
   108        config xdc.platform.IPlatform.Memory memMap[string]  = [
   109            ["L2SRAM", {
   110                comment:    "512KB L2 SRAM/CACHE",
   111                name:       "L2SRAM",
   112                base:       0x00800000,
   113                len:        0x00080000,
   114                space:      "code/data",
   115                access:     "RWX"
   116            }],
   117
   118            ["L1PSRAM", {
   119                comment:    "32KB RAM/CACHE L1 program memory",
   120                name:       "L1PSRAM",
   121                base:       0x00E00000,
   122                len:        0x00008000,
   123                space:      "code",
   124                access:     "RWX"
   125            }],
   126
   127            ["L1DSRAM", {
   128                comment:    "32KB RAM/CACHE L1 data memory",
   129                name:       "L1DSRAM",
   130                base:       0x00F00000,
   131                len:        0x00008000,
   132                space:      "data",
   133                access:     "RW"
   134            }],
   135
   136            ["MSMCSRAM", {
   137                comment:    "4MB MSMC SRAM",
   138                name:       "MSMCSRAM",
   139                base:       0x0C000000,
   140                len:        0x00400000,
   141                space:      "code/data",
   142                access:     "RWX"
   143            }],
   144        ];
   145    };


interface ti.catalog.c6000.ITMS320TCI6616

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== ITMS320TCI6616.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly interface ITMS320TCI6616 inherits ti.catalog.ICpuDataSheet
    41    {
    42
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        config long cacheSizeL2[string] = [
    52            ["0k",    0x000000],
    53            ["32k",   0x008000],
    54            ["64k",   0x010000],
    55            ["128k",  0x020000],
    56            ["256k",  0x040000],
    57            ["512k",  0x080000],
    58            ["1024k", 0x100000]
    59        ];
    60
    61        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    62                 ['l1PMode',{desc:"L1P Cache",
    63                             base: 0x00E00000,
    64                             map : [["0k",0x0000],
    65                                    ["4k",0x1000],
    66                                    ["8k",0x2000],
    67                                    ["16k",0x4000],
    68                                    ["32k",0x8000]],
    69                             defaultValue: "32k",
    70                             memorySection: "L1PSRAM"}],
    71
    72                     ['l1DMode',{desc:"L1D Cache",
    73                             base: 0x00F00000,
    74                             map : [["0k",0x0000],
    75                                    ["4k",0x1000],
    76                                    ["8k",0x2000],
    77                                    ["16k",0x4000],
    78                                    ["32k",0x8000]],
    79                             defaultValue: "32k",
    80                             memorySection: "L1DSRAM"}],
    81
    82                 ['l2Mode',{desc:"L2 Cache",
    83                             base: 0x00800000,
    84                             map : [["0k",0x0000],
    85                                    ["32k",0x8000],
    86                                    ["64k",0x10000],
    87                                ["128k",  0x020000],
    88                                    ["256k",  0x040000],
    89                                    ["512k",  0x080000],
    90                                ["1024k", 0x100000]],
    91                             defaultValue: "0k",
    92                             memorySection: "L2SRAM"}],
    93
    94        ];
    95
    96    instance:
    97
    98        override config string   cpuCore        = "6600";
    99        override config string   isa = "66";
   100        override config string   cpuCoreRevision = "1.0";
   101
   102        override config int     minProgUnitSize = 1;
   103        override config int     minDataUnitSize = 1;
   104        override config int     dataWordSize    = 4;
   105
   106        /*!
   107         *  ======== memMap ========
   108         *  The default memory map for this device
   109         */
   110        config xdc.platform.IPlatform.Memory memMap[string]  = [
   111            ["L2SRAM", {
   112                comment:    "1MB L2 SRAM/CACHE",
   113                name:       "L2SRAM",
   114                base:       0x00800000,
   115                len:        0x00100000,
   116                space:      "code/data",
   117                access:     "RWX"
   118            }],
   119
   120            ["L1PSRAM", {
   121                comment:    "32KB RAM/CACHE L1 program memory",
   122                name:       "L1PSRAM",
   123                base:       0x00E00000,
   124                len:        0x00008000,
   125                space:      "code",
   126                access:     "RWX"
   127            }],
   128
   129            ["L1DSRAM", {
   130                comment:    "32KB RAM/CACHE L1 data memory",
   131                name:       "L1DSRAM",
   132                base:       0x00F00000,
   133                len:        0x00008000,
   134                space:      "data",
   135                access:     "RW"
   136            }],
   137
   138            ["MSMCSRAM", {
   139                comment:    "2MB MSMC SRAM",
   140                name:       "MSMCSRAM",
   141                base:       0x0C000000,
   142                len:        0x00200000,
   143                space:      "code/data",
   144                access:     "RWX"
   145            }],
   146        ];
   147    };


module ti.catalog.c6000.Kepler

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Kepler.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly module Kepler inherits ti.catalog.ICpuDataSheet
    41    {
    42
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        config long cacheSizeL2[string] = [
    52            ["0k",    0x000000],
    53            ["32k",   0x008000],
    54            ["64k",   0x010000],
    55            ["128k",  0x020000],
    56            ["256k",  0x040000],
    57            ["512k",  0x080000],
    58            ["1024k", 0x100000]
    59        ];
    60
    61        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    62            ['l1PMode',
    63                {desc:"L1P Cache",
    64                    base: 0x00E00000,
    65                        map : [["0k",0x0000],
    66                               ["4k",0x1000],
    67                               ["8k",0x2000],
    68                               ["16k",0x4000],
    69                               ["32k",0x8000]],
    70                         defaultValue: "32k",
    71                         memorySection: "L1PSRAM"
    72                }
    73            ],
    74            ['l1DMode',
    75                {desc:"L1D Cache",
    76                     base: 0x00F00000,
    77                         map : [["0k",0x0000],
    78                                ["4k",0x1000],
    79                                ["8k",0x2000],
    80                                ["16k",0x4000],
    81                                ["32k",0x8000]],
    82                         defaultValue: "32k",
    83                         memorySection: "L1DSRAM"
    84                }
    85            ],
    86            ['l2Mode',
    87                {desc:"L2 Cache",
    88                     base: 0x00800000,
    89                         map : [["0k",0x0000],
    90                                ["32k",0x8000],
    91                                ["64k",0x10000],
    92                                ["128k",  0x020000],
    93                                ["256k",  0x040000],
    94                                ["512k",  0x080000],
    95                                ["1024k", 0x100000]],
    96                         defaultValue: "0k",
    97                         memorySection: "L2SRAM"
    98                }
    99            ],
   100        ];
   101
   102    instance:
   103
   104        override config string   cpuCore        = "6600";
   105        override config string   isa = "66";
   106        override config string   cpuCoreRevision = "1.0";
   107
   108        override config int     minProgUnitSize = 1;
   109        override config int     minDataUnitSize = 1;
   110        override config int     dataWordSize    = 4;
   111
   112        /*!
   113         *  ======== memMap ========
   114         *  The default memory map for this device
   115         */
   116        config xdc.platform.IPlatform.Memory memMap[string]  = [
   117            ["L2SRAM", {
   118                comment:    "1MB L2 SRAM/CACHE",
   119                name:       "L2SRAM",
   120                base:       0x00800000,
   121                len:        0x00100000,
   122                space:      "code/data",
   123                access:     "RWX"
   124            }],
   125
   126            ["L1PSRAM", {
   127                comment:    "32KB RAM/CACHE L1 program memory",
   128                name:       "L1PSRAM",
   129                base:       0x00E00000,
   130                len:        0x00008000,
   131                space:      "code",
   132                access:     "RWX"
   133            }],
   134
   135            ["L1DSRAM", {
   136                comment:    "32KB RAM/CACHE L1 data memory",
   137                name:       "L1DSRAM",
   138                base:       0x00F00000,
   139                len:        0x00008000,
   140                space:      "data",
   141                access:     "RW"
   142            }],
   143
   144            ["MSMCSRAM", {
   145                comment:    "6MB MSMC SRAM",
   146                name:       "MSMCSRAM",
   147                base:       0x0C000000,
   148                len:        0x00600000,
   149                space:      "code/data",
   150                access:     "RWX"
   151            }],
   152        ];
   153    };


module ti.catalog.c6000.OMAP2431

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP2431.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP2431 ========
    41     *  OMAP2431 device data sheet module
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module OMAP2431 inherits IOMAP2x3x
    47    {
    48
    49    instance:
    50
    51        override config string   cpuCoreRevision = "1.0";
    52    };


module ti.catalog.c6000.OMAP2530

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP2530.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP2530 ========
    41     *  OMAP2530 device data sheet module
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module OMAP2530 inherits IOMAP2x3x
    47    {
    48
    49    instance:
    50
    51        override config string   cpuCoreRevision = "1.0";
    52
    53    };


module ti.catalog.c6000.OMAP2531

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP2531.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP2531 ========
    41     *  OMAP2531 device data sheet module
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module OMAP2531 inherits IOMAP2x3x
    47    {
    48
    49    instance:
    50
    51        override config string   cpuCoreRevision = "1.0";
    52
    53    };


module ti.catalog.c6000.OMAP3425

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3425.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP3425 ========
    41     *  OMAP3425 device data sheet module
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module OMAP3425 inherits IOMAP3xxx
    47    {
    48
    49    instance:
    50        override config string   cpuCoreRevision = "2.1";
    51    };


module ti.catalog.c6000.OMAP3525

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3525.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP3525 ========
    41     *  OMAP3525 device data sheet module
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module OMAP3525 inherits IOMAP3xxx
    47    {
    48
    49    instance:
    50        override config string   cpuCoreRevision = "2.1";
    51    };


module ti.catalog.c6000.OMAP3530

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP3530.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP3530 ========
    41     *  OMAP3530 device data sheet module
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module OMAP3530 inherits IOMAP3xxx
    47    {
    48
    49    instance:
    50        override config string   cpuCoreRevision = "2.1";
    51    };


module ti.catalog.c6000.OMAP4430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP4430.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP4430 ========
    41     *  The C64T device data sheet module.
    42     */
    43    metaonly module OMAP4430 inherits ti.catalog.ICpuDataSheet
    44    {
    45
    46    instance:
    47        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    48
    49        override config int     minProgUnitSize = 1;
    50        override config int     minDataUnitSize = 1;
    51        override config int     dataWordSize    = 4;
    52
    53        override config string   cpuCore         = "64T";
    54        override config string   isa             = "64T";
    55        override config string   cpuCoreRevision = "1.0";
    56
    57        config xdc.platform.IPlatform.Memory memMap[string]  = [
    58
    59            ["L2SRAM", {
    60                comment:    "Shared 256KB SRAM",
    61                name:       "L2SRAM",
    62                base:       0x10900000,
    63                len:        0x00040000,
    64                space:      "code/data",
    65                access:     "RWX"
    66            }],
    67        ];
    68    };


module ti.catalog.c6000.OMAP5430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAP5430.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAP5430 ========
    41     *  The C64T device data sheet module.
    42     */
    43    metaonly module OMAP5430 inherits ti.catalog.ICpuDataSheet
    44    {
    45
    46    instance:
    47        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
    48
    49        override config int     minProgUnitSize = 1;
    50        override config int     minDataUnitSize = 1;
    51        override config int     dataWordSize    = 4;
    52
    53        override config string   cpuCore         = "64T";
    54        override config string   isa             = "64T";
    55        override config string   cpuCoreRevision = "1.0";
    56
    57        config xdc.platform.IPlatform.Memory memMap[string]  = [
    58
    59            ["L2SRAM", {
    60                comment:    "Shared 256KB SRAM",
    61                name:       "L2SRAM",
    62                base:       0x10900000,
    63                len:        0x00040000,
    64                space:      "code/data",
    65                access:     "RWX"
    66            }],
    67        ];
    68    };


module ti.catalog.c6000.OMAPL137

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAPL137.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAPL137 ========
    41     *  The C64P device data sheet module.
    42     */
    43    metaonly module OMAPL137 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.OMAPL138

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== OMAPL138.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== OMAPL138 ========
    41     *  The C64P device data sheet module.
    42     */
    43    metaonly module OMAPL138 inherits ITMS320DA8xx
    44    {
    45    };


package ti.catalog.c6000

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform;
    34
    35    /*!
    36     *  ======== ti.catalog.c6000 ========
    37     *  Package of devices for the c6000 family of DSPs.
    38     *
    39     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    40     *  interface.  This interface is used by platforms (modules that implement
    41     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    42     */
    43    package ti.catalog.c6000 [1,0,0,0] {
    44        interface ICacheInfo;
    45        interface ITMS320C6x0x, ITMS320C6x1x;
    46        interface ITMS320C64_1M, ITMS320C64_128K, ITMS320C64_256K, ITMS320C64_512K;
    47        interface IAntara, IDaVinci, IHimalaya;
    48        interface ITMS320C642x;
    49        interface ITMS320CTCI648x, ITMS320CTCI6484, ITMS320CTCI6486;
    50        interface ITMS320CTCI6497;
    51        interface ITMS320TCI6608, ITMS320TCI6616;
    52        interface ITMS320CDRx40x, ITMS320CDRA44x, ITMS320CDRA45x;
    53        interface ITMS320DA8xx;
    54        interface ITMS320C6452, ITMS320CDM6467;
    55        module TMS320C6452, TMS320CDM647, TMS320CDM648, TMS320CTNETV2685;
    56        module TMS320C6428;
    57        module TMS320C6711;
    58        module TMS320C6711B;
    59        module TMS320C6712;
    60        module TMS320C6713;
    61        module TMS320C6211;
    62        module TMS320C6211B;
    63        module TMS320C6410;
    64        module TMS320C6411;
    65        module TMS320C6412;
    66        module TMS320C6413;
    67        module TMS320C6414;
    68        module TMS320C6415;
    69        module TMS320C6416;
    70        module TMS320C6418;
    71        module TMS320C6421, TMS320C6424;
    72        module TMS320CDM640;
    73        module TMS320CDM641;
    74        module TMS320CDM642;
    75        module TMS320CDA700;
    76        module TMS320CDA705;
    77        module TMS320CDA707;
    78        module TMS320CDA710;
    79        module TMS320CDA700SIM;
    80        module TMS320CDRA442, TMS320CDRA444, TMS320CDRA446, TMS320CDRA447;
    81        module TMS320CDRA457, TMS320CDRA459;
    82        module TMS320C6722, TMS320C6726, TMS320C6727;
    83        module TMS320CDM415;
    84        module TMS320CDM420;
    85        module TMS320CDM421;
    86        module TMS320CDM425;
    87        module TMS320CDM426;
    88        module TMS320CDM6431, TMS320CDM6433, TMS320CDM6435, TMS320CDM6437;
    89        module TMS320CDM6441, TMS320CDM6443;
    90        module TMS320CDM6446, TMS320DM357;
    91        module TMS320CDM6467;
    92        module TMS320CDRI300;
    93        module TMS320CTCI6482, TMS320CTCI6484;
    94        module TMS320CTCI6486;
    95        module TMS320TCI6485, TMS320CTCI6487, TMS320CTCI6488, TMS320TCI6489;
    96        module TMS320CTCI6498;
    97        module TMS320TCI6608, TMS320TCI6614, TMS320TCI6616, TMS320TCI6618;
    98        module TMS320C6670, TMS320C6671, TMS320C6672, TMS320C6674, TMS320C6678;
    99        module Kepler;
   100        module TMS320C6454, TMS320C6455;
   101        module TMS320C2430;
   102        module TMS320C3430;
   103        module TMS320C6701, TMS320C6201, TMS320C6202, TMS320C6203, TMS320C6203B;
   104        module TMS320C6204;
   105        module TMS320C6205;
   106        module TMS320CDRA406, TMS320CDRA402, TMS320CDRA404;
   107        module TMS320CDRA414, TMS320CDRA416;
   108        module TMS320CF761990;
   109
   110        interface IOMAP2x3x, IOMAP3xxx;
   111        module OMAP2431, OMAP2530, OMAP2531, OMAP3425, OMAP3525, OMAP3530, OMAP4430, OMAP5430;
   112        module TMS320DA802, TMS320DA803, TMS320DA804;
   113        module TMS320DA805, TMS320DA807, TMS320DA808, TMS320DA810;
   114        module TMS320DA828, TMS320DA830;
   115        module TMS320C6472, TMS320C6474;
   116        module TMS320C6747, TMS320C6745, TMS320C6743;
   117        module OMAPL137, OMAPL138;
   118        module TMS320C6457;
   119        module TMS320DA840, TMS320DA850;
   120        module TMS320C6742, TMS320C6746, TMS320C6748;
   121        module TNETV107X;
   122
   123        interface ITI8168;
   124        module TMS320TI816X;
   125        module TMS320CDM740, TMS320CDM730, TMS320DM8168;
   126        module TMS320C6A8168;
   127
   128        interface ITI8148;
   129        module TMS320TI814X;
   130        module TMS320DM8148;
   131
   132        interface ITI811X;
   133        module TMS320TI811X;
   134
   135        module Arctic;
   136        module TMS320C6A8149;
   137
   138        interface ITMS320C6655;
   139        module TMS320C6654;
   140        module TMS320C6655;
   141        module TMS320C6657;
   142
   143        module Vayu;
   144        module DRA7XX;
   145        module TDA3XX;
   146
   147        interface ITMS320TCI663x;
   148        module TMS320TCI6634;
   149        module TMS320TCI6636;
   150        module TMS320TCI6638;
   151        module TMS320TCI6630K2L;
   152        module TMS320C66AK2H06;
   153        module TMS320C66AK2H12;
   154        module TMS320C66AK2E02;
   155        module TMS320C66AK2E05;
   156        module TCI66AK2G02;
   157
   158        interface IC6x;
   159        module C64;
   160        module C64P;
   161        module C66;
   162        module C67;
   163        module C674;
   164
   165        module DM37XX;
   166    }


module ti.catalog.c6000.TCI66AK2G02

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C66AK2G02.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly module TCI66AK2G02 inherits ti.catalog.ICpuDataSheet
    41    {
    42        /* These are the available sizes for L1 caches */
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        /* These are the available sizes for L2 cche */
    52        config long cacheSizeL2[string] = [
    53            ["0k",    0x000000],
    54            ["32k",   0x008000],
    55            ["64k",   0x010000],
    56            ["128k",  0x020000],
    57            ["256k",  0x040000],
    58            ["512k",  0x080000],
    59            ["1024k", 0x100000]
    60        ];
    61
    62        /* This is used by platform wizard for setting default cache sizes */
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64            ['l1PMode', {
    65                desc:"L1P Cache",
    66                base: 0x00E00000,
    67                map : [
    68                    ["0k", 0x0000],
    69                    ["4k", 0x1000],
    70                    ["8k", 0x2000],
    71                    ["16k",0x4000],
    72                    ["32k",0x8000]
    73                ],
    74                defaultValue: "32k",
    75                memorySection: "L1PSRAM"
    76            }],
    77            ['l1DMode', {
    78                desc:"L1D Cache",
    79                base: 0x00F00000,
    80                map : [
    81                    ["0k", 0x0000],
    82                    ["4k", 0x1000],
    83                    ["8k", 0x2000],
    84                    ["16k",0x4000],
    85                    ["32k",0x8000]
    86                ],
    87                defaultValue: "32k",
    88                memorySection: "L1DSRAM"
    89            }],
    90            ['l2Mode', {
    91                desc:"L2 Cache",
    92                base: 0x00800000,
    93                map : [
    94                    ["0k",    0x0000],
    95                    ["32k",   0x8000],
    96                    ["64k",   0x10000],
    97                    ["128k",  0x020000],
    98                    ["256k",  0x040000],
    99                    ["512k",  0x080000],
   100                    ["1024k", 0x100000]
   101                ],
   102                defaultValue: "0k",
   103                memorySection: "L2SRAM"}
   104            ],
   105        ];
   106
   107    instance:
   108
   109        override config string   cpuCore        = "6600";
   110        override config string   isa = "66";
   111        override config string   cpuCoreRevision = "1.0";
   112
   113        override config int     minProgUnitSize = 1;
   114        override config int     minDataUnitSize = 1;
   115        override config int     dataWordSize    = 4;
   116
   117        /*!
   118         *  ======== memMap ========
   119         *  The default memory map for this device
   120         */
   121        config xdc.platform.IPlatform.Memory memMap[string]  = [
   122            ["L2SRAM", {
   123                comment:    "1MB L2 SRAM/CACHE",
   124                name:       "L2SRAM",
   125                base:       0x00800000,
   126                len:        0x00100000,
   127                space:      "code/data",
   128                access:     "RWX"
   129            }],
   130
   131            ["L1PSRAM", {
   132                comment:    "32KB RAM/CACHE L1 program memory",
   133                name:       "L1PSRAM",
   134                base:       0x00E00000,
   135                len:        0x00008000,
   136                space:      "code",
   137                access:     "RWX"
   138            }],
   139
   140            ["L1DSRAM", {
   141                comment:    "32KB RAM/CACHE L1 data memory",
   142                name:       "L1DSRAM",
   143                base:       0x00F00000,
   144                len:        0x00008000,
   145                space:      "data",
   146                access:     "RW"
   147            }],
   148
   149            ["MSMCSRAM", {
   150                comment:    "1MB MSMC SRAM",
   151                name:       "MSMCSRAM",
   152                base:       0x0C000000,
   153                len:        0x00100000,
   154                space:      "code/data",
   155                access:     "RWX"
   156            }],
   157        ];
   158    };


module ti.catalog.c6000.TDA3XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TDA3XX.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== TDA3XX ========
    42     *  The TDA3XX device data sheet module.
    43     *
    44     *  This module implements the ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     */
    47    metaonly module TDA3XX inherits ti.catalog.ICpuDataSheet
    48    {
    49
    50        config long cacheSizeL1[string] = [
    51            ["0k",  0x0000],
    52            ["4k",  0x1000],
    53            ["8k",  0x2000],
    54            ["16k", 0x4000],
    55            ["32k", 0x8000]
    56        ];
    57
    58        config long cacheSizeL2[string] = [
    59            ["0k",    0x000000],
    60            ["32k",   0x008000],
    61            ["64k",   0x010000],
    62            ["128k",  0x020000],
    63            ["256k",  0x040000]
    64        ];
    65
    66        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    67                 ['l1PMode',{desc:"L1P Cache",
    68                             base: 0x00E00000,
    69                             map : [["0k" ,0x0000],
    70                                    ["4k" ,0x1000],
    71                                    ["8k" ,0x2000],
    72                                    ["16k",0x4000],
    73                                    ["32k",0x8000]],
    74                             defaultValue: "32k",
    75                             memorySection: "L1PSRAM"}],
    76
    77                 ['l1DMode',{desc:"L1D Cache",
    78                             base: 0x00F00000,
    79                             map : [["0k"  ,0x0000],
    80                                    ["4k"  ,0x1000],
    81                                    ["8k"  ,0x2000],
    82                                    ["16k" ,0x4000],
    83                                    ["32k" ,0x8000]],
    84                             defaultValue: "32k",
    85                             memorySection: "L1DSRAM"}],
    86
    87                 ['l2Mode',{desc:"L2 Cache",
    88                             base: 0x00800000,
    89                             map : [["0k"   ,0x0000],
    90                                    ["32k"  ,0x8000],
    91                                    ["64k"  ,0x10000],
    92                                ["128k" ,0x020000],
    93                                    ["256k" ,0x040000]],
    94                             defaultValue: "0k",
    95                             memorySection: "L2SRAM"}],
    96
    97        ];
    98
    99    instance:
   100        override config string   cpuCore         = "6600";
   101        override config string   isa             = "66";
   102        override config string   cpuCoreRevision = "1.0";
   103
   104        override config int      minProgUnitSize = 1;
   105        override config int      minDataUnitSize = 1;
   106        override config int      dataWordSize    = 4;
   107
   108        /*!
   109         *  ======== memMap ========
   110         *  The default memory map for this device
   111         */
   112        config xdc.platform.IPlatform.Memory memMap[string]  = [
   113            ["L2SRAM", {
   114                comment:    "288KB L2 SRAM/CACHE",
   115                name:       "L2SRAM",
   116                base:       0x00800000,
   117                len:        0x00048000,
   118                space:      "code/data",
   119                access:     "RWX"
   120            }],
   121
   122            ["L1PSRAM", {
   123                comment:    "32KB SRAM/CACHE L1 program memory",
   124                name:       "L1PSRAM",
   125                base:       0x00E00000,
   126                len:        0x00008000,
   127                space:      "code",
   128                access:     "RWX"
   129            }],
   130
   131            ["L1DSRAM", {
   132                comment:    "32KB SRAM/CACHE L1 data memory",
   133                name:       "L1DSRAM",
   134                base:       0x00F00000,
   135                len:        0x00008000,
   136                space:      "data",
   137                access:     "RW"
   138            }],
   139
   140            ["OCMC_RAM", {
   141                name:       "OCMC_RAM",
   142                base:       0x40300000,
   143                len:        0x00080000
   144            }]
   145        ];
   146    };


module ti.catalog.c6000.TMS320C6A8149

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6A8149.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6A8149 ========
    41     *  The C674 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6A8149 inherits ITI8148
    47    {
    48    };


module ti.catalog.c6000.TMS320C6A8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6A8168.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6A8168 ========
    41     *  The C674 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6A8168 inherits ITI8168
    47    {
    48    };


module ti.catalog.c6000.TMS320C66AK2E02

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C66AK2E02.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly module TMS320C66AK2E02 inherits ti.catalog.ICpuDataSheet
    41    {
    42        /* These are the available sizes for L1 caches */
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        /* These are the available sizes for L2 cche */
    52        config long cacheSizeL2[string] = [
    53            ["0k",    0x000000],
    54            ["32k",   0x008000],
    55            ["64k",   0x010000],
    56            ["128k",  0x020000],
    57            ["256k",  0x040000],
    58            ["512k",  0x080000]
    59        ];
    60
    61        /* This is used by platform wizard for setting default cache sizes */
    62        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    63            ['l1PMode', {
    64                desc:"L1P Cache",
    65                base: 0x00E00000,
    66                map : [
    67                    ["0k",0x0000],
    68                    ["4k",0x1000],
    69                    ["8k",0x2000],
    70                    ["16k",0x4000],
    71                    ["32k",0x8000]
    72                ],
    73                defaultValue: "32k",
    74                memorySection: "L1PSRAM"
    75            }],
    76            ['l1DMode', {
    77                desc:"L1D Cache",
    78                base: 0x00F00000,
    79                map : [
    80                    ["0k",0x0000],
    81                    ["4k",0x1000],
    82                    ["8k",0x2000],
    83                    ["16k",0x4000],
    84                    ["32k",0x8000]
    85                ],
    86                defaultValue: "32k",
    87                memorySection: "L1DSRAM"
    88            }],
    89            ['l2Mode', {
    90                desc:"L2 Cache",
    91                base: 0x00800000,
    92                map : [
    93                    ["0k",0x0000],
    94                    ["32k",0x8000],
    95                    ["64k",0x10000],
    96                    ["128k",  0x020000],
    97                    ["256k",  0x040000],
    98                    ["512k",  0x080000],
    99                ],
   100                defaultValue: "0k",
   101                memorySection: "L2SRAM"}
   102            ],
   103        ];
   104
   105    instance:
   106
   107        override config string   cpuCore        = "6600";
   108        override config string   isa = "66";
   109        override config string   cpuCoreRevision = "1.0";
   110
   111        override config int     minProgUnitSize = 1;
   112        override config int     minDataUnitSize = 1;
   113        override config int     dataWordSize    = 4;
   114
   115        /*!
   116         *  ======== memMap ========
   117         *  The default memory map for this device
   118         */
   119        config xdc.platform.IPlatform.Memory memMap[string]  = [
   120            ["L2SRAM", {
   121                comment:    "512KB L2 SRAM/CACHE",
   122                name:       "L2SRAM",
   123                base:       0x00800000,
   124                len:        0x00080000,
   125                space:      "code/data",
   126                access:     "RWX"
   127            }],
   128
   129            ["L1PSRAM", {
   130                comment:    "32KB RAM/CACHE L1 program memory",
   131                name:       "L1PSRAM",
   132                base:       0x00E00000,
   133                len:        0x00008000,
   134                space:      "code",
   135                access:     "RWX"
   136            }],
   137
   138            ["L1DSRAM", {
   139                comment:    "32KB RAM/CACHE L1 data memory",
   140                name:       "L1DSRAM",
   141                base:       0x00F00000,
   142                len:        0x00008000,
   143                space:      "data",
   144                access:     "RW"
   145            }],
   146
   147            ["MSMCSRAM", {
   148                comment:    "2MB MSMC SRAM",
   149                name:       "MSMCSRAM",
   150                base:       0x0C000000,
   151                len:        0x00200000,
   152                space:      "code/data",
   153                access:     "RWX"
   154            }],
   155        ];
   156    };


module ti.catalog.c6000.TMS320C66AK2E05

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C66AK2E05.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly module TMS320C66AK2E05 inherits ti.catalog.ICpuDataSheet
    41    {
    42        /* These are the available sizes for L1 caches */
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        /* These are the available sizes for L2 cche */
    52        config long cacheSizeL2[string] = [
    53            ["0k",    0x000000],
    54            ["32k",   0x008000],
    55            ["64k",   0x010000],
    56            ["128k",  0x020000],
    57            ["256k",  0x040000],
    58            ["512k",  0x080000],
    59        ];
    60
    61        /* This is used by platform wizard for setting default cache sizes */
    62        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    63            ['l1PMode', {
    64                desc:"L1P Cache",
    65                base: 0x00E00000,
    66                map : [
    67                    ["0k",0x0000],
    68                    ["4k",0x1000],
    69                    ["8k",0x2000],
    70                    ["16k",0x4000],
    71                    ["32k",0x8000]
    72                ],
    73                defaultValue: "32k",
    74                memorySection: "L1PSRAM"
    75            }],
    76            ['l1DMode', {
    77                desc:"L1D Cache",
    78                base: 0x00F00000,
    79                map : [
    80                    ["0k",0x0000],
    81                    ["4k",0x1000],
    82                    ["8k",0x2000],
    83                    ["16k",0x4000],
    84                    ["32k",0x8000]
    85                ],
    86                defaultValue: "32k",
    87                memorySection: "L1DSRAM"
    88            }],
    89            ['l2Mode', {
    90                desc:"L2 Cache",
    91                base: 0x00800000,
    92                map : [
    93                    ["0k",0x0000],
    94                    ["32k",0x8000],
    95                    ["64k",0x10000],
    96                    ["128k",  0x020000],
    97                    ["256k",  0x040000],
    98                    ["512k",  0x080000],
    99                ],
   100                defaultValue: "0k",
   101                memorySection: "L2SRAM"}
   102            ],
   103        ];
   104
   105    instance:
   106
   107        override config string   cpuCore        = "6600";
   108        override config string   isa = "66";
   109        override config string   cpuCoreRevision = "1.0";
   110
   111        override config int     minProgUnitSize = 1;
   112        override config int     minDataUnitSize = 1;
   113        override config int     dataWordSize    = 4;
   114
   115        /*!
   116         *  ======== memMap ========
   117         *  The default memory map for this device
   118         */
   119        config xdc.platform.IPlatform.Memory memMap[string]  = [
   120            ["L2SRAM", {
   121                comment:    "512KB L2 SRAM/CACHE",
   122                name:       "L2SRAM",
   123                base:       0x00800000,
   124                len:        0x00080000,
   125                space:      "code/data",
   126                access:     "RWX"
   127            }],
   128
   129            ["L1PSRAM", {
   130                comment:    "32KB RAM/CACHE L1 program memory",
   131                name:       "L1PSRAM",
   132                base:       0x00E00000,
   133                len:        0x00008000,
   134                space:      "code",
   135                access:     "RWX"
   136            }],
   137
   138            ["L1DSRAM", {
   139                comment:    "32KB RAM/CACHE L1 data memory",
   140                name:       "L1DSRAM",
   141                base:       0x00F00000,
   142                len:        0x00008000,
   143                space:      "data",
   144                access:     "RW"
   145            }],
   146
   147            ["MSMCSRAM", {
   148                comment:    "2MB MSMC SRAM",
   149                name:       "MSMCSRAM",
   150                base:       0x0C000000,
   151                len:        0x00200000,
   152                space:      "code/data",
   153                access:     "RWX"
   154            }],
   155        ];
   156    };


module ti.catalog.c6000.TMS320C66AK2H06

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C66AK2H06.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320C66AK2H06 inherits ITMS320TCI663x
    39    {
    40    }


module ti.catalog.c6000.TMS320C66AK2H12

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C66AK2H12.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320C66AK2H12 inherits ITMS320TCI663x
    39    {
    40    }


module ti.catalog.c6000.TMS320C2430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C2430.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C2430 ========
    41     *  The OMAP2430 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C2430 inherits IOMAP2x3x
    47    {
    48
    49    instance:
    50        override config string   cpuCoreRevision = "1.0";
    51
    52    };


module ti.catalog.c6000.TMS320C3430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C3430.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C3430 ========
    41     *  The C64P device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C3430 inherits IOMAP3xxx
    47    {
    48
    49    instance:
    50        override config string   cpuCoreRevision = "2.1";
    51    };


module ti.catalog.c6000.TMS320C6201

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6201.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6201 ========
    41     *  The C6201 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6201 inherits ITMS320C6x0x
    47    {
    48    instance:
    49        override config string   cpuCore        = "6200";
    50        override config string   isa = "62";
    51    };


module ti.catalog.c6000.TMS320C6202

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6202.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6202 ========
    41     *  The C6202 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6202 inherits ITMS320C6x0x
    47    {
    48        override config xdc.platform.IPlatform.Memory memBlock[string]  = [
    49            ["IPRAM0", {
    50                comment: "Internal Program memory map 0",
    51                name: "IPRAM",
    52                base: 0x1400000,
    53                len:  0x0040000,
    54                space: "code"
    55            }],
    56
    57            ["IPRAM1", {
    58                comment: "Internal Program memory map 1",
    59                name: "IPRAM",
    60                base: 0x0000000,
    61                len:  0x0040000,
    62                space: "code"
    63            }],
    64
    65            ["IDRAM", {
    66                comment: "Internal Data memory",
    67                name: "IDRAM",
    68                base: 0x80000000,
    69                len:  0x00020000,
    70                space: "data"
    71            }],
    72        ];
    73
    74    instance:
    75        override config string   cpuCore        = "6200";
    76        override config string   isa = "62";
    77    };


module ti.catalog.c6000.TMS320C6203

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6203.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6203 ========
    41     *  The C6203 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6203 inherits ITMS320C6x0x
    47    {
    48        override config xdc.platform.IPlatform.Memory memBlock[string]  = [
    49            ["IPRAM0", {
    50                comment: "Internal Program memory map 0",
    51                name: "IPRAM",
    52                base: 0x1400000,
    53                len:  0x0060000,
    54                space: "code"
    55            }],
    56
    57            ["IPRAM1", {
    58                comment: "Internal Program memory map 1",
    59                name: "IPRAM",
    60                base: 0x0000000,
    61                len:  0x0060000,
    62                space: "code"
    63            }],
    64
    65            ["IDRAM", {
    66                comment: "Internal Data memory",
    67                name: "IDRAM",
    68                base: 0x80000000,
    69                len:  0x00080000,
    70                space: "data"
    71            }],
    72        ];
    73
    74    instance:
    75        override config string   cpuCore        = "6200";
    76        override config string   isa = "62";
    77
    78    };


module ti.catalog.c6000.TMS320C6203B

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6203B.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6203B ========
    41     *  The C6203B device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6203B inherits ITMS320C6x0x
    47    {
    48        override config xdc.platform.IPlatform.Memory memBlock[string] =
    49            TMS320C6203.memBlock;
    50    instance:
    51        override config string   cpuCore        = "6200";
    52        override config string   isa = "62";
    53
    54    };


module ti.catalog.c6000.TMS320C6204

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6204.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6204 ========
    41     *  The C6204 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6204 inherits ITMS320C6x0x
    47    {
    48    instance:
    49        override config string   cpuCore        = "6200";
    50        override config string   isa = "62";
    51    };


module ti.catalog.c6000.TMS320C6205

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6205.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6205 ========
    41     *  The C6205 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6205 inherits ITMS320C6x0x
    47    {
    48    instance:
    49        override config string   cpuCore        = "6200";
    50        override config string   isa = "62";
    51    };


module ti.catalog.c6000.TMS320C6211

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6211.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6211 ========
    41     *  The C6211 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6211 inherits ITMS320C6x1x
    47    {
    48
    49    instance:
    50        override config string   cpuCore        = "6200";
    51        override config string   isa = "62";
    52
    53        override config xdc.platform.IPlatform.Memory memMap[string]  = [
    54            ["IRAM", {
    55                name:       "IRAM",
    56                comment:    "Internal L2 memory",
    57                base:       0x00000,
    58                len:        0x10000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62        ];
    63    };


module ti.catalog.c6000.TMS320C6211B

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6211B.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6211B ========
    41     *  The C6211B device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6211B inherits ITMS320C6x1x
    47    {
    48
    49    instance:
    50        override config string   cpuCore        = "6200";
    51        override config string   isa = "62";
    52
    53        /*!
    54         *  ======== memMap ========
    55         *  The default memory map for this device
    56         */
    57
    58        override config xdc.platform.IPlatform.Memory memMap[string] =
    59            TMS320C6211.memMap;
    60    };


module ti.catalog.c6000.TMS320C6410

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6410.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6410 ========
    41     *  The 6410 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6410 inherits ITMS320C64_128K
    47    {
    48    };


module ti.catalog.c6000.TMS320C6411

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6411.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6411 ========
    41     *  The 6411 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6411 inherits ITMS320C64_256K
    47    {
    48    };


module ti.catalog.c6000.TMS320C6412

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6412.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6412 ========
    41     *  The 6412 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6412 inherits ITMS320C64_256K
    47    {
    48    };


module ti.catalog.c6000.TMS320C6413

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6413.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6413 ========
    41     *  The 6413 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6413 inherits ITMS320C64_256K
    47    {
    48    };


module ti.catalog.c6000.TMS320C6414

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6414.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6414 ========
    41     *  The C6414 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6414 inherits ITMS320C64_1M
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320C6415

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6415.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6415 ========
    41     *  The C6415 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6415 inherits ITMS320C64_1M
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320C6416

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6416.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6416 ========
    41     *  The C6416 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6416 inherits ITMS320C64_1M
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320C6418

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6418.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6418 ========
    41     *  The C6418 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6418 inherits ITMS320C64_512K
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320C6421

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6421.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== TMS320C6421 ========
    42     *  The C6421 device data sheet module.
    43     *
    44     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     */
    47    metaonly module TMS320C6421 inherits ti.catalog.ICpuDataSheet
    48    {
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x4000]
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",   0x00000],
    59            ["32k",  0x08000],
    60            ["64k",  0x10000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64                     ['l1PMode',{desc:"L1P Cache",
    65                                 base: 0x10E0C000,
    66                                 map : [["0k",0x0000],
    67                                        ["4k",0x1000],
    68                                        ["8k",0x2000],
    69                                        ["16k",0x4000],
    70                                        ["32k",0x8000]],
    71                                 defaultValue: "32k",
    72                                 memorySection: "L1PSRAM"}],
    73
    74                             ['l1DMode',{desc:"L1D Cache",
    75                                 base: 0x10F0C000,
    76                                 map : [["0k",0x0000],
    77                                        ["4k",0x1000],
    78                                        ["8k",0x2000],
    79                                        ["16k",0x4000],
    80                                        ["32k",0x8000]],
    81                                 defaultValue: "32k",
    82                                 memorySection: "L1DSRAM"}],
    83
    84                 ['l2Mode',{desc:"L2 Cache",
    85                                 base: 0x10810000,
    86                                 map : [["0k",0x0000],
    87                                    ["32k",0x8000],
    88                                    ["64k",0x10000]],
    89                                 defaultValue: "0k",
    90                                 memorySection: "IRAM"}],
    91
    92        ];
    93
    94    instance:
    95
    96        override config string   cpuCore        = "64x+";
    97        override config string   isa = "64P";
    98        override config string   cpuCoreRevision = "1.0";
    99
   100        override config int     minProgUnitSize = 1;
   101        override config int     minDataUnitSize = 1;
   102        override config int     dataWordSize    = 4;
   103
   104        /*!
   105         *  ======== memMap ========
   106         *  The default memory map for this device
   107         */
   108        config xdc.platform.IPlatform.Memory memMap[string]  = [
   109            ["IRAM", {
   110                comment:    "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
   111                name:       "IRAM",
   112                base:       0x10810000,
   113                len:        0x00010000,
   114                space:      "code/data",
   115                access:     "RWX"
   116            }],
   117
   118            ["L1PSRAM", {
   119                comment:    "Internal 16KB RAM/CACHE L1 program memory",
   120                name:       "L1PSRAM",
   121                base:       0x10E0C000,
   122                len:        0x00004000,
   123                space:      "code",
   124                access:     "RWX"
   125            }],
   126
   127            ["L1DSRAM", {
   128                comment:    "Internal 48KB RAM/CACHE L1 data memory",
   129                name:       "L1DSRAM",
   130                base:       0x10F0C000,
   131                len:        0x0000C000,
   132                space:      "data",
   133                access:     "RW"
   134            }],
   135        ];
   136    };


module ti.catalog.c6000.TMS320C6424

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6424.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6424 ========
    41     *  The C6424 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6424 inherits ITMS320C642x
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320C6428

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6428.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6428 ========
    41     *  The 6428 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6428 inherits ITMS320C6452
    47    {
    48
    49    instance:
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        override config xdc.platform.IPlatform.Memory memMap[string] = [
    56            ["IRAM", {
    57                comment:    "Internal 512KB L2 RAM/CACHE",
    58                name:       "IRAM",
    59                base:       0xA00000,
    60                len:        0x080000,
    61                space:      "code/data",
    62                access:     "RWX"
    63            }],
    64
    65            ["L1PSRAM", {
    66                comment:    "Internal 32KB RAM/CACHE L1 program memory",
    67                name:       "L1PSRAM",
    68                base:       0xE00000,
    69                len:        0x008000,
    70                space:      "code",
    71                access:     "RWX"
    72            }],
    73
    74            ["L1DSRAM", {
    75                comment:    "Internal 32KB RAM/CACHE L1 data memory",
    76                name:       "L1DSRAM",
    77                base:       0xF00000,
    78                len:        0x008000,
    79                space:      "data",
    80                access:     "RW"
    81            }],
    82        ];
    83    };


module ti.catalog.c6000.TMS320C6452

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6452.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6452 ========
    41     *  The 6452 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6452 inherits ITMS320C6452
    47    {
    48    };


module ti.catalog.c6000.TMS320C6454

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6454.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320C6454 ========
    40     *  The 6454 device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C6454 inherits ti.catalog.ICpuDataSheet
    46    {
    47        config long cacheSizeL1[string] = [
    48            ["0k",  0x0000],
    49            ["4k",  0x1000],
    50            ["8k",  0x2000],
    51            ["16k", 0x4000],
    52            ["32k", 0x8000],
    53        ];
    54
    55        config long cacheSizeL2[string] = [
    56            ["0k",   0x00000],
    57            ["32k",  0x08000],
    58            ["64k",  0x10000],
    59            ["128k", 0x20000],
    60            ["256k", 0x40000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64             ['l1PMode',{desc:"L1P Cache",
    65                         base: 0xE00000,
    66                         map : [["0k",0x0000],
    67                                ["4k",0x1000],
    68                                ["8k",0x2000],
    69                                ["16k",0x4000],
    70                                ["32k",0x8000]],
    71                         defaultValue: "32k",
    72                         memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc:"L1D Cache",
    75                         base: 0xF00000,
    76                         map : [["0k",0x0000],
    77                                ["4k",0x1000],
    78                                ["8k",0x2000],
    79                                ["16k",0x4000],
    80                                ["32k",0x8000]],
    81                         defaultValue: "32k",
    82                         memorySection: "L1DSRAM"}],
    83
    84             ['l2Mode',{desc:"L2 Cache",
    85                         base: 0x800000,
    86                         map : [["0k",0x0000],
    87                                ["32k",0x8000],
    88                                ["64k",0x10000],
    89                                ["128k",0x20000],
    90                                ["256k",0x40000]],
    91                         defaultValue: "0k",
    92                         memorySection: "IRAM"}],
    93        ];
    94
    95    instance:
    96
    97        override config string   cpuCore        = "64x+";
    98        override config string   isa = "64P";
    99        override config string   cpuCoreRevision = "1.0";
   100
   101        override config int     minProgUnitSize = 1;
   102        override config int     minDataUnitSize = 1;
   103        override config int     dataWordSize    = 4;
   104
   105        /*!
   106         *  ======== memMap ========
   107         *  The default memory map for this device
   108         */
   109        config xdc.platform.IPlatform.Memory memMap[string]  = [
   110            ["IRAM", {
   111                comment:    "Internal 1MB UMAP0 memory",
   112                name:       "IRAM",
   113                base:       0x800000,
   114                len:        0x100000,
   115                space:      "code/data",
   116                access:     "RWX"
   117            }],
   118
   119            ["L1PSRAM", {
   120                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   121                name:       "L1PSRAM",
   122                base:       0xE00000,
   123                len:        0x008000,
   124                space:      "code",
   125                access:     "RWX"
   126            }],
   127
   128            ["L1DSRAM", {
   129                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   130                name:       "L1DSRAM",
   131                base:       0xF00000,
   132                len:        0x008000,
   133                space:      "data",
   134                access:     "RW"
   135            }],
   136
   137        ];
   138    };


module ti.catalog.c6000.TMS320C6455

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6455.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6455 ========
    41     *  The 6455 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6455 inherits IHimalaya
    47    {
    48    };


module ti.catalog.c6000.TMS320C6457

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6457.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320C6457 ========
    40     *  The 6457 device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C6457 inherits ITMS320CTCI6484
    46    {
    47    };


module ti.catalog.c6000.TMS320C6472

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6472.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320C6472 ========
    40     *  The 6472 device data sheet module.
    41     *
    42     */
    43    metaonly module TMS320C6472 inherits ITMS320CTCI6486
    44    {
    45    };


module ti.catalog.c6000.TMS320C6474

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6474.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320C6474 ========
    40     *  The 6474 device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320C6474 inherits ITMS320CTCI648x
    46    {
    47    };


module ti.catalog.c6000.TMS320C6654

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6654.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly module TMS320C6654 inherits ti.catalog.ICpuDataSheet
    41    {
    42        config long cacheSizeL1[string] = [
    43            ["0k",  0x0000],
    44            ["4k",  0x1000],
    45            ["8k",  0x2000],
    46            ["16k", 0x4000],
    47            ["32k", 0x8000],
    48        ];
    49
    50        config long cacheSizeL2[string] = [
    51            ["0k",    0x000000],
    52            ["32k",   0x008000],
    53            ["64k",   0x010000],
    54            ["128k",  0x020000],
    55            ["256k",  0x040000],
    56            ["512k",  0x080000],
    57            ["1024k", 0x100000]
    58        ];
    59
    60        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    61            ['l1PMode', {
    62                desc:"L1P Cache",
    63                base: 0x00E00000,
    64                map : [
    65                    ["0k",0x0000],
    66                    ["4k",0x1000],
    67                    ["8k",0x2000],
    68                    ["16k",0x4000],
    69                    ["32k",0x8000]
    70                ],
    71                defaultValue: "32k",
    72                memorySection: "L1PSRAM"
    73            }],
    74            ['l1DMode', {
    75                desc:"L1D Cache",
    76                base: 0x00F00000,
    77                map : [
    78                    ["0k",0x0000],
    79                    ["4k",0x1000],
    80                    ["8k",0x2000],
    81                    ["16k",0x4000],
    82                    ["32k",0x8000]
    83                ],
    84                defaultValue: "32k",
    85                memorySection: "L1DSRAM"
    86            }],
    87            ['l2Mode', {
    88                desc:"L2 Cache",
    89                base: 0x00800000,
    90                map : [
    91                    ["0k",0x0000],
    92                    ["32k",0x8000],
    93                    ["64k",0x10000],
    94                    ["128k",0x020000],
    95                    ["256k",0x040000],
    96                    ["512k",0x080000],
    97                    ["1024k", 0x100000]
    98                ],
    99                defaultValue: "0k",
   100                memorySection: "L2SRAM"
   101            }],
   102        ];
   103
   104    instance:
   105
   106        override config string   cpuCore        = "6600";
   107        override config string   isa = "66";
   108        override config string   cpuCoreRevision = "1.0";
   109
   110        override config int     minProgUnitSize = 1;
   111        override config int     minDataUnitSize = 1;
   112        override config int     dataWordSize    = 4;
   113
   114        /*!
   115         *  ======== memMap ========
   116         *  The default memory map for this device
   117         */
   118        config xdc.platform.IPlatform.Memory memMap[string]  = [
   119            ["L2SRAM", {
   120                comment:    "1MB L2 SRAM/CACHE",
   121                name:       "L2SRAM",
   122                base:       0x00800000,
   123                len:        0x00100000,
   124                space:      "code/data",
   125                access:     "RWX"
   126            }],
   127
   128            ["L1PSRAM", {
   129                comment:    "32KB RAM/CACHE L1 program memory",
   130                name:       "L1PSRAM",
   131                base:       0x00E00000,
   132                len:        0x00008000,
   133                space:      "code",
   134                access:     "RWX"
   135            }],
   136
   137            ["L1DSRAM", {
   138                comment:    "32KB RAM/CACHE L1 data memory",
   139                name:       "L1DSRAM",
   140                base:       0x00F00000,
   141                len:        0x00008000,
   142                space:      "data",
   143                access:     "RW"
   144            }],
   145        ];
   146    };


module ti.catalog.c6000.TMS320C6655

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6655.xdc ========
    35     */
    36
    37    metaonly module TMS320C6655 inherits ITMS320C6655
    38    {
    39    }


module ti.catalog.c6000.TMS320C6657

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6657.xdc ========
    35     */
    36
    37    metaonly module TMS320C6657 inherits ITMS320C6655
    38    {
    39    }


module ti.catalog.c6000.TMS320C6670

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6670.xdc ========
    35     */
    36
    37    metaonly module TMS320C6670 inherits ITMS320TCI6616
    38    {
    39    }


module ti.catalog.c6000.TMS320C6671

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6671.xdc ========
    35     */
    36
    37    metaonly module TMS320C6671 inherits ITMS320TCI6608
    38    {
    39    }


module ti.catalog.c6000.TMS320C6672

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6672.xdc ========
    35     */
    36
    37    metaonly module TMS320C6672 inherits ITMS320TCI6608
    38    {
    39    }


module ti.catalog.c6000.TMS320C6674

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6674.xdc ========
    35     */
    36
    37    metaonly module TMS320C6674 inherits ITMS320TCI6608
    38    {
    39    }


module ti.catalog.c6000.TMS320C6678

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6678.xdc ========
    35     */
    36
    37    metaonly module TMS320C6678 inherits ITMS320TCI6608
    38    {
    39    }


module ti.catalog.c6000.TMS320C6701

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6701.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6701 ========
    41     *  The C6701 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6701 inherits ITMS320C6x0x
    47    {
    48    instance:
    49        override config string   cpuCore        = "6700";
    50        override config string   isa = "67";
    51    };


module ti.catalog.c6000.TMS320C6711

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6711.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6711 ========
    41     *  The C6711B device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6711 inherits ITMS320C6x1x
    47    {
    48
    49    instance:
    50        override config string   cpuCore        = "6700";
    51        override config string   isa = "67";
    52
    53        /*!
    54         *  ======== memMap ========
    55         *  The default memory map for this device
    56         */
    57
    58        override config xdc.platform.IPlatform.Memory memMap[string] = TMS320C6211.memMap;
    59    };


module ti.catalog.c6000.TMS320C6711B

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C67111B.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6711B ========
    41     *  The C6711B device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6711B inherits ITMS320C6x1x
    47    {
    48
    49    instance:
    50        override config string   cpuCore        = "6700";
    51        override config string   isa = "67";
    52        /*!
    53         *  ======== memMap ========
    54         *  The default memory map for this device
    55         */
    56
    57        override config xdc.platform.IPlatform.Memory memMap[string] =
    58            TMS320C6211.memMap;
    59    };


module ti.catalog.c6000.TMS320C6712

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6712.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6712 ========
    41     *  The C6712 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6712 inherits ITMS320C6x1x
    47    {
    48
    49    instance:
    50        override config string   cpuCore        = "6700";
    51        override config string   isa = "67";
    52
    53        override config xdc.platform.IPlatform.Memory memMap[string] =
    54            TMS320C6211.memMap;
    55
    56    };


module ti.catalog.c6000.TMS320C6713

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6713.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6713 ========
    41     *  The C6713 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6713 inherits ITMS320C6x1x
    47    {
    48
    49    instance:
    50        override config string   cpuCore        = "6700";
    51        override config string   isa = "67";
    52
    53        override config xdc.platform.IPlatform.Memory memMap[string]  = [
    54            ["IRAM", {
    55                name:       "IRAM",
    56                comment:    "Internal L2 memory",
    57                base:       0x0,
    58                len:        0x40000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62        ];
    63    };


module ti.catalog.c6000.TMS320C6722

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6722.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6722 ========
    41     *  The C6722 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6722 inherits IAntara
    47    {
    48    instance:
    49        override config xdc.platform.IPlatform.Memory memMap[string]  = [
    50            ["IRAM", {
    51                name:       "IRAM",
    52                comment:    "Internal memory",
    53                base:       0x10000000,
    54                len:        0x00020000,
    55                space:      "code/data",
    56                access:     "RWX"
    57            }],
    58        ];
    59
    60    };


module ti.catalog.c6000.TMS320C6726

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6726.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6726 ========
    41     *  The C6726 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6726 inherits IAntara
    47    {
    48    };


module ti.catalog.c6000.TMS320C6727

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6727.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6727 ========
    41     *  The C6727 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320C6727 inherits IAntara
    47    {
    48    };


module ti.catalog.c6000.TMS320C6742

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6742.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6742 ========
    41     *  The C6742 device data sheet module.
    42     */
    43    metaonly module TMS320C6742 inherits ITMS320DA8xx
    44    {
    45    instance:
    46        override config xdc.platform.IPlatform.Memory memMap[string]  = [
    47            ["L2ROM", {
    48                comment:    "Internal 1MB L2 ROM",
    49                name:       "IROM",
    50                base:       0x11700000,
    51                len:        0x00100000,
    52                space:      "code/data",
    53                access:     "RX"
    54            }],
    55
    56            ["IRAM", {
    57                comment:    "Internal 64KB L2 memory",
    58                name:       "IRAM",
    59                base:       0x11800000,
    60                len:        0x00010000,
    61                space:      "code/data",
    62                access:     "RWX"
    63            }],
    64
    65            ["L1PSRAM", {
    66                comment:    "Internal 32KB L1 program memory",
    67                name:       "L1PSRAM",
    68                base:       0x11E00000,
    69                len:        0x00008000,
    70                space:      "code",
    71                access:     "RWX"
    72            }],
    73
    74            ["L1DSRAM", {
    75                comment:    "Internal 32KB L1 data memory",
    76                name:       "L1DSRAM",
    77                base:       0x11F00000,
    78                len:        0x00008000,
    79                space:      "data",
    80                access:     "RW"
    81            }],
    82        ];
    83    };


module ti.catalog.c6000.TMS320C6743

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6743.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6743 ========
    41     */
    42    metaonly module TMS320C6743 inherits ITMS320DA8xx
    43    {
    44    instance:
    45        override config xdc.platform.IPlatform.Memory memMap[string]  = [
    46            ["L2ROM", {
    47                comment:    "Internal 1MB L2 ROM",
    48                name:       "IROM",
    49                base:       0x11700000,
    50                len:        0x00100000,
    51                space:      "code/data",
    52                access:     "RX"
    53            }],
    54
    55            ["IRAM", {
    56                comment:    "Internal 128KB L2 memory",
    57                name:       "IRAM",
    58                base:       0x11800000,
    59                len:        0x00020000,
    60                space:      "code/data",
    61                access:     "RWX"
    62            }],
    63
    64            ["L1PSRAM", {
    65                comment:    "Internal 32KB L1 program memory",
    66                name:       "L1PSRAM",
    67                base:       0x11E00000,
    68                len:        0x00008000,
    69                space:      "code",
    70                access:     "RWX"
    71            }],
    72
    73            ["L1DSRAM", {
    74                comment:    "Internal 32KB L1 data memory",
    75                name:       "L1DSRAM",
    76                base:       0x11F00000,
    77                len:        0x00008000,
    78                space:      "data",
    79                access:     "RW"
    80            }],
    81        ];
    82    };


module ti.catalog.c6000.TMS320C6745

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6745.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6745 ========
    41     */
    42    metaonly module TMS320C6745 inherits ITMS320DA8xx
    43    {
    44    instance:
    45        override config xdc.platform.IPlatform.Memory memMap[string]  = [
    46            ["L2ROM", {
    47                comment:    "Internal 1MB L2 ROM",
    48                name:       "IROM",
    49                base:       0x11700000,
    50                len:        0x00100000,
    51                space:      "code/data",
    52                access:     "RX"
    53            }],
    54
    55            ["IRAM", {
    56                comment:    "Internal 256KB L2 memory",
    57                name:       "IRAM",
    58                base:       0x11800000,
    59                len:        0x00040000,
    60                space:      "code/data",
    61                access:     "RWX"
    62            }],
    63
    64            ["L1PSRAM", {
    65                comment:    "Internal 32KB L1 program memory",
    66                name:       "L1PSRAM",
    67                base:       0x11E00000,
    68                len:        0x00008000,
    69                space:      "code",
    70                access:     "RWX"
    71            }],
    72
    73            ["L1DSRAM", {
    74                comment:    "Internal 32KB L1 data memory",
    75                name:       "L1DSRAM",
    76                base:       0x11F00000,
    77                len:        0x00008000,
    78                space:      "data",
    79                access:     "RW"
    80            }],
    81        ];
    82    };


module ti.catalog.c6000.TMS320C6746

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6746.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6746 ========
    41     *  The C6746 device data sheet module.
    42     */
    43    metaonly module TMS320C6746 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320C6747

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6747.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6747 ========
    41     *  The C6747 device data sheet module.
    42     */
    43    metaonly module TMS320C6747 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320C6748

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320C6748.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320C6748 ========
    41     *  The C6748 device data sheet module.
    42     */
    43    metaonly module TMS320C6748 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320CDA700

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDA700.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDA700 ========
    41     *  The C67P device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDA700 inherits IAntara
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CDA700SIM

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA700SIM.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDA700SIM ========
    41     *  The C67P device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDA700SIM inherits IAntara
    47    {
    48    instance:
    49        override config string   cpuCore        = "67x+SIM";
    50    };


module ti.catalog.c6000.TMS320CDA705

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDA705.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDA705 ========
    41     *  The DA705 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDA705 inherits IAntara
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CDA707

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDA707.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDA707 ========
    41     *  The DA707 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDA707 inherits IAntara
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CDA710

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDA710.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDA710 ========
    41     *  The DA710 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDA710 inherits IAntara
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CDM415

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM415.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM415 ========
    41     *  The DM415 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM415 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM420

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM420.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM420 ========
    41     *  The DM420 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM420 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM421

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM421.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM421 ========
    41     *  The DM421 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM421 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM425

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM425.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM425 ========
    41     *  The DM425 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM425 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM426

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM426.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM426 ========
    41     *  The DM426 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM426 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM640

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM640.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM640 ========
    41     *  The DM640 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM640 inherits ITMS320C64_128K
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM641

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM641.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM641 ========
    41     *  The DM641 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM641 inherits ITMS320C64_128K
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM642

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM642.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM642 ========
    41     *  The DM642 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM642 inherits ITMS320C64_256K
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM647

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM647.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM647 ========
    41     *  The DM647 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM647 inherits ITMS320C6452
    47    {
    48
    49    instance:
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        override config xdc.platform.IPlatform.Memory memMap[string] = [
    56            ["IRAM", {
    57                comment:    "Internal 256KB L2 RAM/CACHE",
    58                name:       "IRAM",
    59                base:       0xA00000,
    60                len:        0x040000,
    61                space:      "code/data",
    62                access:     "RWX"
    63            }],
    64
    65            ["L1PSRAM", {
    66                comment:    "Internal 32KB RAM/CACHE L1 program memory",
    67                name:       "L1PSRAM",
    68                base:       0xE00000,
    69                len:        0x008000,
    70                space:      "code",
    71                access:     "RWX"
    72            }],
    73
    74            ["L1DSRAM", {
    75                comment:    "Internal 32KB RAM/CACHE L1 data memory",
    76                name:       "L1DSRAM",
    77                base:       0xF00000,
    78                len:        0x008000,
    79                space:      "data",
    80                access:     "RW"
    81            }],
    82        ];
    83    };


module ti.catalog.c6000.TMS320CDM648

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM648.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM648 ========
    41     *  The DM648 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM648 inherits ITMS320C6452
    47    {
    48
    49    instance:
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        override config xdc.platform.IPlatform.Memory memMap[string] = [
    56            ["IRAM", {
    57                comment:    "Internal 512KB L2 RAM/CACHE",
    58                name:       "IRAM",
    59                base:       0xA00000,
    60                len:        0x080000,
    61                space:      "code/data",
    62                access:     "RWX"
    63            }],
    64
    65            ["L1PSRAM", {
    66                comment:    "Internal 32KB RAM/CACHE L1 program memory",
    67                name:       "L1PSRAM",
    68                base:       0xE00000,
    69                len:        0x008000,
    70                space:      "code",
    71                access:     "RWX"
    72            }],
    73
    74            ["L1DSRAM", {
    75                comment:    "Internal 32KB RAM/CACHE L1 data memory",
    76                name:       "L1DSRAM",
    77                base:       0xF00000,
    78                len:        0x008000,
    79                space:      "data",
    80                access:     "RW"
    81            }],
    82        ];
    83    };


module ti.catalog.c6000.TMS320CDM730

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM730.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM730 ========
    41     *  The C674 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM730 inherits ITI8168
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM740

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM740.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM740 ========
    41     *  The C674 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM740 inherits ITI8168
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM6431

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6431.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== TMS320CDM6431 ========
    42     *  The DM6431 device data sheet module.
    43     *
    44     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     */
    47    metaonly module TMS320CDM6431 inherits ti.catalog.ICpuDataSheet
    48    {
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000]
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",   0x00000],
    59            ["32k",  0x08000],
    60            ["64k",  0x10000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64             ['l1PMode',{desc:"L1P Cache",
    65                         base: 0x10E08000,
    66                         map : [["0k",0x0000],
    67                                ["4k",0x1000],
    68                                ["8k",0x2000],
    69                                ["16k",0x4000],
    70                                ["32k",0x8000]],
    71                         defaultValue: "32k",
    72                         memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc:"L1D Cache",
    75                         base: 0x10F10000,
    76                         map : [["0k",0x0000],
    77                                ["4k",0x1000],
    78                                ["8k",0x2000],
    79                                ["16k",0x4000],
    80                                ["32k",0x8000]],
    81                         defaultValue: "32k",
    82                         memorySection: "L1DSRAM"}],
    83
    84             ['l2Mode',{desc:"L2 Cache",
    85                         base: 0x10810000,
    86                         map : [["0k",0x0000],
    87                                ["32k",0x8000],
    88                                ["64k",0x10000]],
    89                         defaultValue: "0k",
    90                         memorySection: "IRAM"}],
    91        ];
    92
    93    instance:
    94
    95        override config string   cpuCore        = "64x+";
    96        override config string   isa = "64P";
    97        override config string   cpuCoreRevision = "1.0";
    98
    99        override config int     minProgUnitSize = 1;
   100        override config int     minDataUnitSize = 1;
   101        override config int     dataWordSize    = 4;
   102
   103        /*!
   104         *  ======== memMap ========
   105         *  The default memory map for this device
   106         */
   107        config xdc.platform.IPlatform.Memory memMap[string]  = [
   108            ["IRAM", {
   109                comment:    "Internal 64KB L2 RAM/CACHE in UMAP0 memory",
   110                name:       "IRAM",
   111                base:       0x10810000,
   112                len:        0x00010000,
   113                space:      "code/data",
   114                access:     "RWX"
   115            }],
   116
   117            ["L1PSRAM", {
   118                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   119                name:       "L1PSRAM",
   120                base:       0x10E08000,
   121                len:        0x00008000,
   122                space:      "code",
   123                access:     "RWX"
   124            }],
   125
   126            ["L1DSRAM", {
   127                comment:    "Internal 32KB RAM/CACHE L1 data memory",
   128                name:       "L1DSRAM",
   129                base:       0x10F10000,
   130                len:        0x00008000,
   131                space:      "data",
   132                access:     "RW"
   133            }],
   134        ];
   135    };


module ti.catalog.c6000.TMS320CDM6433

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6433.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM6433 ========
    41     *  The DM6433 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM6433 inherits ITMS320C642x
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CDM6435

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6435.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM6435 ========
    41     *  The DM6435 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM6435 inherits ITMS320C642x
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CDM6437

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6437.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM6437 ========
    41     *  The DM6437 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM6437 inherits ITMS320C642x
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CDM6441

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6441.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM6441 ========
    41     *  The DM6441 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM6441 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM6443

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6443.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM6443 ========
    41     *  The DM6443 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM6443 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM6446

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6446.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM6446 ========
    41     *  The DM6446 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM6446 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320CDM6467

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDM6467.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDM6467 ========
    41     *  The DM6467 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDM6467 inherits ITMS320CDM6467
    47    {
    48    };


module ti.catalog.c6000.TMS320CDRA402

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA402.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA402 ========
    40     *  The DRA402 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA402 inherits ITMS320CDRx40x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA404

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA404.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA404 ========
    40     *  The DRA404 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA404 inherits ITMS320CDRx40x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA406

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA406.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA406 ========
    40     *  The DRA406 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA406 inherits ITMS320CDRx40x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA414

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA414.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA414 ========
    40     *  The DRA414 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA414 inherits ITMS320CDRx40x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA416

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA416.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA416 ========
    40     *  The DRA416 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA416 inherits ITMS320CDRx40x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA442

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA442.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA442 ========
    40     *  The DRA442 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA442 inherits ITMS320CDRA44x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA444

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA444.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA444 ========
    40     *  The DRA444 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA444 inherits ITMS320CDRA44x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA446

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA446.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA446 ========
    40     *  The DRA446 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA446 inherits ITMS320CDRA44x
    46    {
    47    };


module ti.catalog.c6000.TMS320CDRA447

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA447.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA447 ========
    40     *  The DRA447 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA447 inherits ITMS320CDRA44x
    46    {
    47
    48        override config long cacheSizeL2[string] = [
    49            ["0k",  0x00000],
    50            ["32k", 0x08000],
    51            ["64k", 0x10000],
    52            ["128k", 0x20000]
    53        ];
    54
    55        override readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    56                 ['l1PMode',{desc:"L1P Cache",
    57                             base: 0x11E08000,
    58                             map : [["0k",0x0000],
    59                                    ["4k",0x1000],
    60                                    ["8k",0x2000],
    61                                    ["16k",0x4000],
    62                                    ["32k",0x8000]],
    63                             defaultValue: "32k",
    64                             memorySection: "L1PSRAM"}],
    65
    66                     ['l1DMode',{desc:"L1D Cache",
    67                             base: 0x11F04000,
    68                             map : [["0k",0x0000],
    69                                    ["4k",0x1000],
    70                                    ["8k",0x2000],
    71                                    ["16k",0x4000],
    72                                    ["32k",0x8000]],
    73                             defaultValue: "32k",
    74                             memorySection: "L1DSRAM"}],
    75
    76                 ['l2Mode',{desc:"L2 Cache",
    77                             base: 0x11800000,
    78                             map : [["0k",0x0000],
    79                                    ["32k",0x8000],
    80                                    ["64k",0x10000],
    81                                    ],
    82                             defaultValue: "0k",
    83                             memorySection: "IRAM"}],
    84
    85        ];
    86
    87    instance:
    88
    89        /*!
    90         *  ======== memMap ========
    91         *  The default memory map for this device
    92         */
    93        override config xdc.platform.IPlatform.Memory memMap[string] = [
    94            ["IRAM", {
    95                comment:    "Internal 128KB UMAP0 memory",
    96                name:       "IRAM",
    97                base:       0x11800000,
    98                len:        0x00020000,
    99                space:      "code/data",
   100                access:     "RWX"
   101            }],
   102
   103            ["L1PSRAM", {
   104                comment:    "Internal 32KB RAM/CACHE L1 program memory",
   105                name:       "L1PSRAM",
   106                base:       0x11E08000,
   107                len:        0x00008000,
   108                space:      "code",
   109                access:     "RWX"
   110            }],
   111
   112            ["L1DSRAM", {
   113                comment:    "Internal 80KB RAM/CACHE L1 data memory",
   114                name:       "L1DSRAM",
   115                base:       0x11F04000,
   116                len:        0x00014000,
   117                space:      "data",
   118                access:     "RW"
   119            }],
   120
   121            ["ARM_RAM", {
   122                comment:    "Internal ARM RAM memory",
   123                name:       "ARM_RAM",
   124                base:       0x10008000,
   125                len:        0x00004000,
   126                space:      "data",
   127                access:     "RW"
   128            }],
   129        ];
   130
   131    };


module ti.catalog.c6000.TMS320CDRA457

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA457.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA457 ========
    40     *  The DRA457 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA457 inherits ITMS320CDRA45x
    46    {
    47    }


module ti.catalog.c6000.TMS320CDRA459

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRA459.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CDRA459 ========
    40     *  The DRA459 device data sheet module.
    41     *
    42     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CDRA459 inherits ITMS320CDRA45x
    46    {
    47    }


module ti.catalog.c6000.TMS320CDRI300

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CDRI300.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CDRI300 ========
    41     *  The DRI300 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CDRI300 inherits ITMS320C64_512K
    47    {
    48
    49    };


module ti.catalog.c6000.TMS320CF761990

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CF761990.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CF761990 ========
    41     *  The C64P device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CF761990 inherits ti.catalog.ICpuDataSheet
    47    {
    48
    49        config long cacheSizeL1[string] = [
    50            ["0k",  0x0000],
    51            ["4k",  0x1000],
    52            ["8k",  0x2000],
    53            ["16k", 0x4000],
    54            ["32k", 0x8000],
    55        ];
    56
    57        config long cacheSizeL2[string] = [
    58            ["0k",  0x00000],
    59            ["32k", 0x08000],
    60            ["64k", 0x10000]
    61        ];
    62
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64             ['l1PMode',{desc:"L1P Cache",
    65                         base: 0x11E08000,
    66                         map : [["0k",0x0000],
    67                                ["4k",0x1000],
    68                                ["8k",0x2000],
    69                                ["16k",0x4000],
    70                                ["32k",0x8000]],
    71                         defaultValue: "32k",
    72                         memorySection: "L1PSRAM"}],
    73
    74                     ['l1DMode',{desc:"L1D Cache",
    75                         base: 0x11F04000,
    76                         map : [["0k",0x0000],
    77                                ["4k",0x1000],
    78                                ["8k",0x2000],
    79                                ["16k",0x4000],
    80                                ["32k",0x8000]],
    81                         defaultValue: "32k",
    82                         memorySection: "L1DSRAM"}],
    83
    84             ['l2Mode',{desc:"L2 Cache",
    85                         base: 0x11800000,
    86                         map : [["0k",0x0000],
    87                                ["32k",0x8000],
    88                                ["64k",0x10000]],
    89                         defaultValue: "0k",
    90                         memorySection: "IRAM"}],
    91
    92        ];
    93
    94    instance:
    95        override config int     minProgUnitSize = 1;
    96        override config int     minDataUnitSize = 1;
    97        override config int     dataWordSize    = 4;
    98
    99        override config string   cpuCore        = "F761990";
   100        override config string   isa = "64P";
   101        override config string   cpuCoreRevision = "1.0";
   102
   103        config xdc.platform.IPlatform.Memory memMap[string]  = [
   104            ["IRAM", {
   105                comment:    "Internal 64KB L2 UMAP0 memory",
   106                name:       "IRAM",
   107                base:       0x11800000,
   108                len:        0x00010000,
   109                space:      "code/data",
   110                access:     "RWX"
   111            }],
   112
   113            ["L1PSRAM", {
   114                comment:    "Internal 32KB L1 program memory",
   115                name:       "L1PSRAM",
   116                base:       0x11E08000,
   117                len:        0x00008000,
   118                space:      "code",
   119                access:     "RWX"
   120            }],
   121
   122            ["L1DSRAM", {
   123                comment:    "Internal 80KB L1 data memory",
   124                name:       "L1DSRAM",
   125                base:       0x11F04000,
   126                len:        0x00014000,
   127                space:      "data",
   128                access:     "RW"
   129            }],
   130
   131            ["ARM_RAM0", {
   132                comment:    "Internal ARM RAM instruction memory",
   133                name:       "ARM_RAM0",
   134                base:       0x02000000,
   135                len:        0x00008000,
   136                space:      "code",
   137                access:     "RWX"
   138            }],
   139
   140            ["ARM_RAM1", {
   141                comment:    "Internal ARM RAM data memory",
   142                name:       "ARM_RAM1",
   143                base:       0x02008000,
   144                len:        0x00004000,
   145                space:      "data",
   146                access:     "RW"
   147            }],
   148        ];
   149    };


module ti.catalog.c6000.TMS320CTCI6482

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CTCI6482.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CTCI6482 ========
    41     *  The TCI6482 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CTCI6482 inherits IHimalaya
    47    {
    48    };


module ti.catalog.c6000.TMS320CTCI6484

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CTCI6484.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CTCI6484 ========
    41     */
    42    metaonly module TMS320CTCI6484 inherits ITMS320CTCI6484
    43    {
    44    };


module ti.catalog.c6000.TMS320CTCI6486

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CTCI6486.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CTCI6486 ========
    40     *  The TCI6486 device data sheet module.
    41     *
    42     */
    43    metaonly module TMS320CTCI6486 inherits ITMS320CTCI6486
    44    {
    45    };


module ti.catalog.c6000.TMS320CTCI6487

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CTCI6487.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CTCI6487 ========
    40     *  The TCI6487 device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CTCI6487 inherits ITMS320CTCI648x
    46    {
    47    };


module ti.catalog.c6000.TMS320CTCI6488

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CTCI6488.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320CTCI6488 ========
    40     *  The TCI6488 device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320CTCI6488 inherits ITMS320CTCI648x
    46    {
    47    };


module ti.catalog.c6000.TMS320CTCI6498

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CTCI6498.xdc ========
    35     */
    36
    37    metaonly module TMS320CTCI6498 inherits ITMS320CTCI6497
    38    {
    39    }


module ti.catalog.c6000.TMS320CTNETV2685

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320CTNETV2685.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320CTNETV2685 ========
    41     *  The TNETV2685 device data sheet module.
    42     *
    43     *  This module implements the ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320CTNETV2685 inherits ITMS320C6452
    47    {
    48    };


module ti.catalog.c6000.TMS320DA802

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA802.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA802 ========
    41     *  The DA802 device data sheet module.
    42     */
    43    metaonly module TMS320DA802 inherits ITMS320DA8xx
    44    {
    45        override config long cacheSizeL2[string] = [
    46                ["0k",  0x00000],
    47                ["32k", 0x08000],
    48                ["64k", 0x10000],
    49                ["128k", 0x20000]
    50        ];
    51
    52        override readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    53                ['l1PMode',{desc:"L1P Cache",
    54                             base: 0x11E00000,
    55                             map : [["0k",0x0000],
    56                                    ["4k",0x1000],
    57                                    ["8k",0x2000],
    58                                    ["16k",0x4000],
    59                                    ["32k",0x8000]],
    60                             defaultValue: "32k",
    61                             memorySection: "L1PSRAM"}],
    62
    63                ['l1DMode',{desc:"L1D Cache",
    64                             base: 0x11F00000,
    65                             map : [["0k",0x0000],
    66                                    ["4k",0x1000],
    67                                    ["8k",0x2000],
    68                                    ["16k",0x4000],
    69                                    ["32k",0x8000]],
    70                             defaultValue: "32k",
    71                             memorySection: "L1DSRAM"}],
    72
    73                ['l2Mode',{desc:"L2 Cache",
    74                             base: 0x11800000,
    75                             map : [["0k",0x0000],
    76                                    ["32k",0x8000],
    77                                    ["64k",0x10000],
    78                                    ["128k",0x20000]],
    79                             defaultValue: "0k",
    80                             memorySection: "IRAM"}],
    81
    82        ];
    83
    84
    85    instance:
    86
    87        /*!
    88         *  ======== memMap ========
    89         *  The default memory map for this device
    90         */
    91        override config xdc.platform.IPlatform.Memory memMap[string] = [
    92            ["IROM", {
    93                comment:    "Internal 1MB L2 ROM",
    94                name:       "IROM",
    95                base:       0x11700000,
    96                len:        0x00100000,
    97                space:      "code/data",
    98                access:     "RX"
    99            }],
   100
   101            ["IRAM", {
   102                comment:    "Internal 128KB L2 memory",
   103                name:       "IRAM",
   104                base:       0x11800000,
   105                len:        0x00020000,
   106                space:      "code/data",
   107                access:     "RWX"
   108            }],
   109
   110            ["L1PSRAM", {
   111                comment:    "Internal 32KB L1 program memory",
   112                name:       "L1PSRAM",
   113                base:       0x11E00000,
   114                len:        0x00008000,
   115                space:      "code",
   116                access:     "RWX"
   117            }],
   118
   119            ["L1DSRAM", {
   120                comment:    "Internal 32KB L1 data memory",
   121                name:       "L1DSRAM",
   122                base:       0x11F00000,
   123                len:        0x00008000,
   124                space:      "data",
   125                access:     "RW"
   126            }],
   127        ];
   128    };


module ti.catalog.c6000.TMS320DA803

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA803.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA803 ========
    41     *  The DA803 device data sheet module.
    42     */
    43    metaonly module TMS320DA803 inherits ITMS320DA8xx
    44    {
    45
    46    instance:
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        override config xdc.platform.IPlatform.Memory memMap[string] = [
    53            ["IROM", {
    54                comment:    "Internal 1MB L2 ROM",
    55                name:       "IROM",
    56                base:       0x11700000,
    57                len:        0x00100000,
    58                space:      "code/data",
    59                access:     "RX"
    60            }],
    61
    62            ["IRAM", {
    63                comment:    "Internal 256KB L2 memory",
    64                name:       "IRAM",
    65                base:       0x11800000,
    66                len:        0x00040000,
    67                space:      "code/data",
    68                access:     "RWX"
    69            }],
    70
    71            ["L1PSRAM", {
    72                comment:    "Internal 32KB L1 program memory",
    73                name:       "L1PSRAM",
    74                base:       0x11E00000,
    75                len:        0x00008000,
    76                space:      "code",
    77                access:     "RWX"
    78            }],
    79
    80            ["L1DSRAM", {
    81                comment:    "Internal 32KB L1 data memory",
    82                name:       "L1DSRAM",
    83                base:       0x11F00000,
    84                len:        0x00008000,
    85                space:      "data",
    86                access:     "RW"
    87            }],
    88        ];
    89    };


module ti.catalog.c6000.TMS320DA804

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA804.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA804 ========
    41     *  The DA804 device data sheet module.
    42     */
    43    metaonly module TMS320DA804 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320DA805

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA805.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA805 ========
    41     */
    42    metaonly module TMS320DA805 inherits ITMS320DA8xx
    43    {
    44    };


module ti.catalog.c6000.TMS320DA807

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA807.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA807 ========
    41     */
    42    metaonly module TMS320DA807 inherits ITMS320DA8xx
    43    {
    44    instance:
    45        override config xdc.platform.IPlatform.Memory memMap[string]  = [
    46            ["L2ROM", {
    47                comment:    "Internal 1MB L2 ROM",
    48                name:       "IROM",
    49                base:       0x11700000,
    50                len:        0x00100000,
    51                space:      "code/data",
    52                access:     "RX"
    53            }],
    54
    55            ["IRAM", {
    56                comment:    "Internal 256KB L2 memory",
    57                name:       "IRAM",
    58                base:       0x11800000,
    59                len:        0x00040000,
    60                space:      "code/data",
    61                access:     "RWX"
    62            }],
    63
    64            ["L1PSRAM", {
    65                comment:    "Internal 32KB L1 program memory",
    66                name:       "L1PSRAM",
    67                base:       0x11E00000,
    68                len:        0x00008000,
    69                space:      "code",
    70                access:     "RWX"
    71            }],
    72
    73            ["L1DSRAM", {
    74                comment:    "Internal 32KB L1 data memory",
    75                name:       "L1DSRAM",
    76                base:       0x11F00000,
    77                len:        0x00008000,
    78                space:      "data",
    79                access:     "RW"
    80            }],
    81        ];
    82    };


module ti.catalog.c6000.TMS320DA808

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA808.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA808 ========
    41     */
    42    metaonly module TMS320DA808 inherits ITMS320DA8xx
    43    {
    44    };


module ti.catalog.c6000.TMS320DA810

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA810.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA810 ========
    41     */
    42    metaonly module TMS320DA810 inherits ITMS320DA8xx
    43    {
    44    };


module ti.catalog.c6000.TMS320DA828

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA828.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA828 ========
    41     *  The C64P device data sheet module.
    42     */
    43    metaonly module TMS320DA828 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320DA830

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA830.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA830 ========
    41     *  The C64P device data sheet module.
    42     */
    43    metaonly module TMS320DA830 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320DA840

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA840.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA840 ========
    41     *  The C64P device data sheet module.
    42     */
    43    metaonly module TMS320DA840 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320DA850

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DA850.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DA850 ========
    41     *  The C64P device data sheet module.
    42     */
    43    metaonly module TMS320DA850 inherits ITMS320DA8xx
    44    {
    45    };


module ti.catalog.c6000.TMS320DM357

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM357.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DM357 ========
    41     *  The DM357 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320DM357 inherits IDaVinci
    47    {
    48    };


module ti.catalog.c6000.TMS320DM8148

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM8148.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DM8148 ========
    41     *  The C674 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320DM8148 inherits ITI8148
    47    {
    48    };


module ti.catalog.c6000.TMS320DM8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320DM8168.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320DM8168 ========
    41     *  The C674 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320DM8168 inherits ITI8168
    47    {
    48    };


module ti.catalog.c6000.TMS320TCI6485

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6485.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TCI6485 ========
    40     *  The TCI6485 device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320TCI6485 inherits ITMS320CTCI648x
    46    {
    47    };


module ti.catalog.c6000.TMS320TCI6489

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6489.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== TMS320TCI6489 ========
    40     *  The TCI6489 device data sheet module.
    41     *
    42     *  This module implements the ICpuDataSheet interface and is
    43     *  used by platforms to obtain "data sheet" information about this device.
    44     */
    45    metaonly module TMS320TCI6489 inherits ITMS320CTCI648x
    46    {
    47    };


module ti.catalog.c6000.TMS320TCI6608

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6608.xdc ========
    35     */
    36
    37    metaonly module TMS320TCI6608 inherits ITMS320TCI6608
    38    {
    39    }


module ti.catalog.c6000.TMS320TCI6614

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6614.xdc ========
    35     */
    36
    37    metaonly module TMS320TCI6614 inherits ITMS320TCI6616
    38    {
    39    }


module ti.catalog.c6000.TMS320TCI6616

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6616.xdc ========
    35     */
    36
    37    metaonly module TMS320TCI6616 inherits ITMS320TCI6616
    38    {
    39    }


module ti.catalog.c6000.TMS320TCI6618

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6618.xdc ========
    35     */
    36
    37    metaonly module TMS320TCI6618 inherits ITMS320TCI6616
    38    {
    39    }


module ti.catalog.c6000.TMS320TCI6630K2L

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6630K2L.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    metaonly module TMS320TCI6630K2L inherits ti.catalog.ICpuDataSheet
    41    {
    42        /* These are the available sizes for L1 caches */
    43        config long cacheSizeL1[string] = [
    44            ["0k",  0x0000],
    45            ["4k",  0x1000],
    46            ["8k",  0x2000],
    47            ["16k", 0x4000],
    48            ["32k", 0x8000],
    49        ];
    50
    51        /* These are the available sizes for L2 cche */
    52        config long cacheSizeL2[string] = [
    53            ["0k",    0x000000],
    54            ["32k",   0x008000],
    55            ["64k",   0x010000],
    56            ["128k",  0x020000],
    57            ["256k",  0x040000],
    58            ["512k",  0x080000],
    59            ["1024k", 0x100000]
    60        ];
    61
    62        /* This is used by platform wizard for setting default cache sizes */
    63        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    64            ['l1PMode', {
    65                desc:"L1P Cache",
    66                base: 0x00E00000,
    67                map : [
    68                    ["0k",0x0000],
    69                    ["4k",0x1000],
    70                    ["8k",0x2000],
    71                    ["16k",0x4000],
    72                    ["32k",0x8000]
    73                ],
    74                defaultValue: "32k",
    75                memorySection: "L1PSRAM"
    76            }],
    77            ['l1DMode', {
    78                desc:"L1D Cache",
    79                base: 0x00F00000,
    80                map : [
    81                    ["0k",0x0000],
    82                    ["4k",0x1000],
    83                    ["8k",0x2000],
    84                    ["16k",0x4000],
    85                    ["32k",0x8000]
    86                ],
    87                defaultValue: "32k",
    88                memorySection: "L1DSRAM"
    89            }],
    90            ['l2Mode', {
    91                desc:"L2 Cache",
    92                base: 0x00800000,
    93                map : [
    94                    ["0k",0x0000],
    95                    ["32k",0x8000],
    96                    ["64k",0x10000],
    97                    ["128k",  0x020000],
    98                    ["256k",  0x040000],
    99                    ["512k",  0x080000],
   100                    ["1024k", 0x100000]
   101                ],
   102                defaultValue: "0k",
   103                memorySection: "L2SRAM"}
   104            ],
   105        ];
   106
   107    instance:
   108
   109        override config string   cpuCore        = "6600";
   110        override config string   isa = "66";
   111        override config string   cpuCoreRevision = "1.0";
   112
   113        override config int     minProgUnitSize = 1;
   114        override config int     minDataUnitSize = 1;
   115        override config int     dataWordSize    = 4;
   116
   117        /*!
   118         *  ======== memMap ========
   119         *  The default memory map for this device
   120         */
   121        config xdc.platform.IPlatform.Memory memMap[string]  = [
   122            ["L2SRAM", {
   123                comment:    "1MB L2 SRAM/CACHE",
   124                name:       "L2SRAM",
   125                base:       0x00800000,
   126                len:        0x00100000,
   127                space:      "code/data",
   128                access:     "RWX"
   129            }],
   130
   131            ["L1PSRAM", {
   132                comment:    "32KB RAM/CACHE L1 program memory",
   133                name:       "L1PSRAM",
   134                base:       0x00E00000,
   135                len:        0x00008000,
   136                space:      "code",
   137                access:     "RWX"
   138            }],
   139
   140            ["L1DSRAM", {
   141                comment:    "32KB RAM/CACHE L1 data memory",
   142                name:       "L1DSRAM",
   143                base:       0x00F00000,
   144                len:        0x00008000,
   145                space:      "data",
   146                access:     "RW"
   147            }],
   148
   149            ["MSMCSRAM", {
   150                comment:    "2MB MSMC SRAM",
   151                name:       "MSMCSRAM",
   152                base:       0x0C000000,
   153                len:        0x00200000,
   154                space:      "code/data",
   155                access:     "RWX"
   156            }],
   157        ];
   158    };


module ti.catalog.c6000.TMS320TCI6634

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6634.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320TCI6634 inherits ITMS320TCI663x
    39    {
    40    }


module ti.catalog.c6000.TMS320TCI6636

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6636.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320TCI6636 inherits ITMS320TCI663x
    39    {
    40    }


module ti.catalog.c6000.TMS320TCI6638

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TCI6638.xdc ========
    35     *
    36     */
    37
    38    metaonly module TMS320TCI6638 inherits ITMS320TCI663x
    39    {
    40    }


module ti.catalog.c6000.TMS320TI811X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI811X.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== TMS320TI811X ========
    42     *  The C674 device data sheet module.
    43     *
    44     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     */
    47    metaonly module TMS320TI811X inherits ITI811X
    48    {
    49    };


module ti.catalog.c6000.TMS320TI814X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI814X.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== TMS320TI814X ========
    42     *  The C674 device data sheet module.
    43     *
    44     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     */
    47    metaonly module TMS320TI814X inherits ITI8148
    48    {
    49    };


module ti.catalog.c6000.TMS320TI816X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TMS320TI816X.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TMS320TI816X ========
    41     *  The C674 device data sheet module.
    42     *
    43     *  This module implements the xdc.platform.ICpuDataSheet interface and is
    44     *  used by platforms to obtain "data sheet" information about this device.
    45     */
    46    metaonly module TMS320TI816X inherits ITI8168
    47    {
    48    };


module ti.catalog.c6000.TNETV107X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== TNETV107X.xdc ========
    35     *
    36     */
    37    package ti.catalog.c6000;
    38
    39    /*!
    40     *  ======== TNETV107X ========
    41     */
    42    metaonly module TNETV107X inherits ti.catalog.ICpuDataSheet
    43    {
    44
    45        config long cacheSizeL1[string] = [
    46            ["0k",  0x0000],
    47            ["4k",  0x1000],
    48            ["8k",  0x2000],
    49            ["16k", 0x4000],
    50            ["32k", 0x8000],
    51        ];
    52
    53        config long cacheSizeL2[string] = [
    54            ["0k",   0x00000],
    55            ["32k",  0x08000],
    56            ["64k",  0x10000],
    57            ["128k", 0x20000]
    58        ];
    59
    60       readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    61            ['l1PMode',
    62                 {desc: "L1P Cache",
    63                  base: 0x11E08000,
    64                  map: [["0k", 0x0000],
    65                        ["4k", 0x1000],
    66                        ["8k", 0x2000],
    67                        ["16k", 0x4000],
    68                        ["32k", 0x8000]],
    69                  defaultValue: "32k",
    70                  memorySection: "L1PSRAM"}
    71            ],
    72
    73            ['l1DMode',
    74                {desc: "L1D Cache",
    75                 base: 0x11F04000,
    76                 map: [["0k", 0x0000],
    77                       ["4k", 0x1000],
    78                       ["8k", 0x2000],
    79                       ["16k", 0x4000],
    80                       ["32k", 0x8000]],
    81                 defaultValue: "32k",
    82                 memorySection: "L1DSRAM"}
    83            ],
    84
    85            ['l2Mode',
    86                {desc: "L2 Cache",
    87                 base: 0x11800000,
    88                 map: [["0k", 0x0000],
    89                       ["32k", 0x8000],
    90                       ["64k", 0x10000],
    91                       ["128k", 0x20000]],
    92                 defaultValue: "0k",
    93                 memorySection: "L2RAM"}
    94            ],
    95
    96        ];
    97
    98    instance:
    99        override config int     minProgUnitSize = 1;
   100        override config int     minDataUnitSize = 1;
   101        override config int     dataWordSize    = 4;
   102
   103        override config string   cpuCore        = "64x+";
   104        override config string   isa = "64P";
   105
   106        config xdc.platform.IPlatform.Memory memMap[string]  = [
   107            ["L2RAM", {
   108                comment:    "Internal 128KB L2 memory",
   109                name:       "L2RAM",
   110                base:       0x11800000,
   111                len:        0x00020000,
   112                space:      "code/data",
   113                access:     "RWX"
   114            }],
   115
   116            ["L1PSRAM", {
   117                comment:    "Internal 32KB L1 program memory",
   118                name:       "L1PSRAM",
   119                base:       0x11E08000,
   120                len:        0x00008000,
   121                space:      "code",
   122                access:     "RWX"
   123            }],
   124
   125            ["L1DSRAM", {
   126                comment:    "Internal 80KB L1 data memory",
   127                name:       "L1DSRAM",
   128                base:       0x11F04000,
   129                len:        0x00014000,
   130                space:      "data",
   131                access:     "RW"
   132            }],
   133        ];
   134    };


module ti.catalog.c6000.Vayu

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Vayu.xdc ========
    35     *
    36     */
    37
    38    package ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== Vayu ========
    42     *  The Vayu device data sheet module.
    43     *
    44     *  This module implements the ICpuDataSheet interface and is
    45     *  used by platforms to obtain "data sheet" information about this device.
    46     */
    47    metaonly module Vayu inherits ti.catalog.ICpuDataSheet
    48    {
    49
    50        config long cacheSizeL1[string] = [
    51            ["0k",  0x0000],
    52            ["4k",  0x1000],
    53            ["8k",  0x2000],
    54            ["16k", 0x4000],
    55            ["32k", 0x8000]
    56        ];
    57
    58        config long cacheSizeL2[string] = [
    59            ["0k",    0x000000],
    60            ["32k",   0x008000],
    61            ["64k",   0x010000],
    62            ["128k",  0x020000],
    63            ["256k",  0x040000]
    64        ];
    65
    66        readonly config ti.catalog.c6000.ICacheInfo.CacheDesc cacheMap[string] =  [
    67                 ['l1PMode',{desc:"L1P Cache",
    68                             base: 0x00E00000,
    69                             map : [["0k" ,0x0000],
    70                                    ["4k" ,0x1000],
    71                                    ["8k" ,0x2000],
    72                                    ["16k",0x4000],
    73                                    ["32k",0x8000]],
    74                             defaultValue: "32k",
    75                             memorySection: "L1PSRAM"}],
    76
    77                 ['l1DMode',{desc:"L1D Cache",
    78                             base: 0x00F00000,
    79                             map : [["0k"  ,0x0000],
    80                                    ["4k"  ,0x1000],
    81                                    ["8k"  ,0x2000],
    82                                    ["16k" ,0x4000],
    83                                    ["32k" ,0x8000]],
    84                             defaultValue: "32k",
    85                             memorySection: "L1DSRAM"}],
    86
    87                 ['l2Mode',{desc:"L2 Cache",
    88                             base: 0x00800000,
    89                             map : [["0k"   ,0x0000],
    90                                    ["32k"  ,0x8000],
    91                                    ["64k"  ,0x10000],
    92                                    ["128k" ,0x020000],
    93                                    ["256k" ,0x040000]],
    94                             defaultValue: "0k",
    95                             memorySection: "L2SRAM"}],
    96
    97        ];
    98
    99    instance:
   100        config ti.catalog.peripherals.hdvicp2.HDVICP2.Instance hdvicp0;
   101        override config string   cpuCore        = "6600";
   102        override config string   isa = "66";
   103        override config string   cpuCoreRevision = "1.0";
   104
   105        override config int     minProgUnitSize = 1;
   106        override config int     minDataUnitSize = 1;
   107        override config int     dataWordSize    = 4;
   108
   109        /*!
   110         *  ======== memMap ========
   111         *  The default memory map for this device
   112         */
   113        config xdc.platform.IPlatform.Memory memMap[string]  = [
   114            ["L2SRAM", {
   115                comment:    "256KB L2 SRAM/CACHE",
   116                name:       "L2SRAM",
   117                base:       0x00800000,
   118                len:        0x00040000,
   119                space:      "code/data",
   120                access:     "RWX"
   121            }],
   122
   123            ["L1PSRAM", {
   124                comment:    "32KB RAM/CACHE L1 program memory",
   125                name:       "L1PSRAM",
   126                base:       0x00E00000,
   127                len:        0x00008000,
   128                space:      "code",
   129                access:     "RWX"
   130            }],
   131
   132            ["L1DSRAM", {
   133                comment:    "32KB RAM/CACHE L1 data memory",
   134                name:       "L1DSRAM",
   135                base:       0x00F00000,
   136                len:        0x00008000,
   137                space:      "data",
   138                access:     "RW"
   139            }],
   140        ];
   141    };


interface ti.catalog.msp430.IMSP430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== IMSP430.xdc ========
    36     */
    37    package ti.catalog.msp430;
    38
    39    /*!
    40     *  ======== IMSP430 ========
    41     *  An interface implemented by all MSP430 devices.
    42     *
    43     *  This interface is defined to factor common data about this family into
    44     *  a single place; all MSP430 devices extend this interface.
    45     */
    46    metaonly interface IMSP430 inherits ti.catalog.ICpuDataSheet
    47    {
    48    instance:
    49        override config String  cpuCore         = "MSP430";
    50        override config String  isa             = "430";
    51        override config Int     minProgUnitSize = 1;
    52        override config Int     minDataUnitSize = 1;
    53        override config Int     dataWordSize    = 2;
    54
    55        /*!
    56         *  ======== vcc ========
    57         *  Stores current system VCC value in CFG script
    58         */
    59        config Float   vcc             = 0;
    60    };


module ti.catalog.msp430.MSP430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== MSP430.xdc ========
    36     *  Generic MSP430 Cpu definition
    37     *
    38     *  This device represents all MSP430 devices independent from the ISA. The
    39     *  parameter `{@link #isa}` is set to a JavaScript regular expression that
    40     *  covers all MSP430 ISAs.
    41     */
    42
    43    metaonly module MSP430 inherits IMSP430
    44    {
    45    instance:
    46        override config string   cpuCore    = "MSP430.*";
    47        override config string   isa        = "430.*";
    48        override config Float    vcc        = 1.8;
    49    }


package ti.catalog.msp430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    requires xdc.platform;
    35    requires ti.catalog;
    36
    37    /*!
    38     *  ======== ti.catalog.msp430 ========
    39     *  Package of devices for the msp430 family.
    40     *
    41     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    42     *  interface. This interface is used by platforms (modules that implement
    43     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    44     */
    45    package ti.catalog.msp430 [1,0,0] {
    46        interface IMSP430;
    47        module MSP430;
    48    }


interface ti.catalog.msp430.f22xx.IMSP430x22xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    import ti.catalog.msp430.peripherals.timer.Timer_A3;
    35    import ti.catalog.msp430.peripherals.timer.Timer_B3;
    36    import ti.catalog.msp430.peripherals.clock.BCSplus;
    37    import ti.catalog.msp430.peripherals.communication.USCI_A0_UART_2xx;
    38    import ti.catalog.msp430.peripherals.communication.USCI_A0_SPI_2xx;
    39    import ti.catalog.msp430.peripherals.communication.USCI_B0_SPI_2xx;
    40    import ti.catalog.msp430.peripherals.communication.USCI_B0_I2C_2xx;
    41    import ti.catalog.msp430.peripherals.adc.ADC10;
    42    import ti.catalog.msp430.peripherals.watchdog.WDTplus;
    43    import ti.catalog.msp430.peripherals.oa.OA_2;
    44    import ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x4;
    45    import ti.catalog.msp430.peripherals.memory.Flash_2xx;
    46    import ti.catalog.msp430.peripherals.special_function.IE1;
    47    import ti.catalog.msp430.peripherals.special_function.IE2;
    48    import ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller;
    49
    50    /*!
    51     *  ======== IMSP430x22xx.xdc ========
    52     *  Common definition for MSP430x22xx devices
    53     */
    54    metaonly interface IMSP430x22xx inherits ti.catalog.msp430.IMSP430
    55    {
    56
    57    instance:
    58
    59        config Timer_A3.Instance timer_A3;
    60        config Timer_B3.Instance timer_B3;
    61        config BCSplus.Instance clock;
    62        config USCI_A0_UART_2xx.Instance usci_A0_UART;
    63        config USCI_A0_SPI_2xx.Instance usci_A0_SPI;
    64        config USCI_B0_SPI_2xx.Instance usci_B0_SPI;
    65        config USCI_B0_I2C_2xx.Instance usci_B0_I2C;
    66        config ADC10.Instance adc10;
    67        config WDTplus.Instance wdtPlus;
    68        config OA_2.Instance oa;
    69        config GPIO_MSP430F22x4.Instance gpio;
    70        config Flash_2xx.Instance flash;
    71        config IE1.Instance interruptEnableRegister1;
    72        config IE2.Instance interruptEnableRegister2;
    73        config Interrupt_Controller.Instance interruptController;
    74
    75        /*!
    76         *  ======== commonMap ========
    77         *  Memory map elements shared by all MSP430x22xx devices
    78         */
    79        config xdc.platform.IPlatform.Memory commonMap[string]  = [
    80            ["PERIPHERALS_8BIT", {
    81                comment:    "Memory mapped I/O registers",
    82                name:       "PERIPHERALS_8BIT",
    83                base:       0x0010,
    84                len:        0x00F0,
    85                space:      "io",
    86                access:     "RW"
    87            }],
    88
    89            ["PERIPHERALS_16BIT", {
    90                comment:    "Memory mapped I/O registers",
    91                name:       "PERIPHERALS_16BIT",
    92                base:       0x0100,
    93                len:        0x0100,
    94                space:      "io",
    95                access:     "RW"
    96            }],
    97
    98            ["BSLSKEY", {
    99                comment:    "Boot loader security key",
   100                name:       "BSLSKEY",
   101                base:       0xFFDE,
   102                len:        0x0002,
   103                space:      "data",
   104                access:     "RI"
   105            }],
   106
   107            ["INT00", {
   108                comment:    "Reserved Vector (int00)",
   109                name:       "INT00",
   110                base:       0xFFE0,
   111                len:        0x0002,
   112                space:      "data",
   113                access:     "RW"
   114            }],
   115
   116            ["INT01", {
   117                comment:    "Reserved Vector (int01)",
   118                name:       "INT01",
   119                base:       0xFFE2,
   120                len:        0x0002,
   121                space:      "data",
   122                access:     "RW"
   123            }],
   124
   125            ["INT02", {
   126                comment:    "I/O Port P1 Vector (int02)",
   127                name:       "INT02",
   128                base:       0xFFE4,
   129                len:        0x0002,
   130                space:      "data",
   131                access:     "RW"
   132            }],
   133
   134            ["INT03", {
   135                comment:    "I/O Port P2 Vector (int03)",
   136                name:       "INT03",
   137                base:       0xFFE6,
   138                len:        0x0002,
   139                space:      "data",
   140                access:     "RW"
   141            }],
   142
   143            ["INT04", {
   144                comment:    "Reserved Vector (int04)",
   145                name:       "INT04",
   146                base:       0xFFE8,
   147                len:        0x0002,
   148                space:      "data",
   149                access:     "RW"
   150            }],
   151
   152            ["INT05", {
   153                comment:    "ADC10 Vector (int05)",
   154                name:       "INT05",
   155                base:       0xFFEA,
   156                len:        0x0002,
   157                space:      "data",
   158                access:     "RW"
   159            }],
   160
   161            ["INT06", {
   162                comment:    "USCI_A0/B0 Transmit Vector (int06)",
   163                name:       "INT06",
   164                base:       0xFFEC,
   165                len:        0x0002,
   166                space:      "data",
   167                access:     "RW"
   168            }],
   169
   170            ["INT07", {
   171                comment:    "USCI_A0/B0 Receive Vector (int07)",
   172                name:       "INT07",
   173                base:       0xFFEE,
   174                len:        0x0002,
   175                space:      "data",
   176                access:     "RW"
   177            }],
   178
   179            ["INT08", {
   180                comment:    "Timer_A3 TBCCR1 Vector (int08)",
   181                name:       "INT08",
   182                base:       0xFFF0,
   183                len:        0x0002,
   184                space:      "data",
   185                access:     "RW"
   186            }],
   187
   188            ["INT09", {
   189                comment:    "Timer_A3 TBCCR0 Vector (int09)",
   190                name:       "INT09",
   191                base:       0xFFF2,
   192                len:        0x0002,
   193                space:      "data",
   194                access:     "RW"
   195            }],
   196
   197            ["INT10", {
   198                comment:    "Watchdog Vector (int10)",
   199                name:       "INT10",
   200                base:       0xFFF4,
   201                len:        0x0002,
   202                space:      "data",
   203                access:     "RW"
   204            }],
   205
   206            ["INT11", {
   207                comment:    "Reserved Vector (int11)",
   208                name:       "INT11",
   209                base:       0xFFF6,
   210                len:        0x0002,
   211                space:      "data",
   212                access:     "RW"
   213            }],
   214
   215            ["INT12", {
   216                comment:    "Timer_B3 TBCCR1 Vector (int12)",
   217                name:       "INT12",
   218                base:       0xFFF8,
   219                len:        0x0002,
   220                space:      "data",
   221                access:     "RW"
   222            }],
   223
   224            ["INT13", {
   225                comment:    "Timer_B3 TBCCR0 Vector (int13)",
   226                name:       "INT13",
   227                base:       0xFFFA,
   228                len:        0x0002,
   229                space:      "data",
   230                access:     "RW"
   231            }],
   232
   233            ["INT14", {
   234                comment:    "NMI Vector (int14)",
   235                name:       "INT14",
   236                base:       0xFFFC,
   237                len:        0x0002,
   238                space:      "data",
   239                access:     "RW"
   240            }],
   241
   242            ["RESET", {
   243                comment:    "Reset Vector (int15)",
   244                name:       "RESET",
   245                base:       0xFFFE,
   246                len:        0x0002,
   247                space:      "data",
   248                access:     "RW"
   249            }],
   250
   251            ["INFOA", {
   252                comment:    "INFO Flash Memory Segment A",
   253                name:       "INFOA",
   254                base:       0x10C0,
   255                len:        0x0040,
   256                space:      "data",
   257                access:     "RW"
   258            }],
   259
   260            ["INFOB", {
   261                comment:    "INFO Flash Memory Segment B",
   262                name:       "INFOB",
   263                base:       0x1080,
   264                len:        0x0040,
   265                space:      "data",
   266                access:     "RW"
   267            }],
   268
   269            ["INFOC", {
   270                comment:    "INFO Flash Memory Segment C",
   271                name:       "INFOC",
   272                base:       0x1040,
   273                len:        0x0040,
   274                space:      "data",
   275                access:     "RW"
   276            }],
   277
   278            ["INFOD", {
   279                comment:    "INFO Flash Memory Segment D",
   280                name:       "INFOD",
   281                base:       0x1000,
   282                len:        0x0040,
   283                space:      "data",
   284                access:     "RW"
   285            }],
   286        ];
   287    }


module ti.catalog.msp430.f22xx.MSP430F223x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== MSP430F223x.xdc ========
    36     *  MSP430F223x Cpu definition
    37     *
    38     *  This device has 8KB + 256B of Flash Memory and 512B RAM.  The
    39     *  MSP430F2234 has two op-amps (OA) whereas the MSP430F2232 has none.
    40     */
    41
    42    metaonly module MSP430F223x inherits IMSP430x22xx
    43    {
    44    instance:
    45        /*!
    46         *  ======== deviceMap ========
    47         *  Device specific memory blocks
    48         *
    49         *  This memory together with the common family memory forms the
    50         *  complete memory map retuned by `getMemoryMap()`.
    51         */
    52        config xdc.platform.IPlatform.Memory deviceMap[string]  = [
    53            ["RAM", {
    54                comment:    "Data RAM",
    55                name:       "RAM",
    56                base:       0x200,
    57                len:        0x200,
    58                space:      "code/data",
    59                access:     "RWX"
    60            }],
    61
    62            ["FLASH", {
    63                comment:    "Program FLASH",
    64                name:       "FLASH",
    65                base:       0xE000,
    66                len:        0x1FDE,
    67                space:      "code",
    68                access:     "RWX"
    69            }],
    70        ];
    71    }


module ti.catalog.msp430.f22xx.MSP430F225x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== MSP430F225x.xdc ========
    36     *  MSP430F225x Cpu definition
    37     *
    38     *  This device has 16KB + 256B of Flash Memory and 512B RAM.  The
    39     *  MSP430F2254 has two op-amps (OA) whereas the MSP430F2252 has none.
    40     */
    41
    42    metaonly module MSP430F225x inherits IMSP430x22xx
    43    {
    44    instance:
    45        /*!
    46         *  ======== deviceMap ========
    47         *  Device specific memory blocks
    48         *
    49         *  This memory together with the common family memory forms the
    50         *  complete memory map retuned by `getMemoryMap()`.
    51         */
    52        config xdc.platform.IPlatform.Memory deviceMap[string]  = [
    53            ["RAM", {
    54                comment:    "Data RAM",
    55                name:       "RAM",
    56                base:       0x200,
    57                len:        0x200,
    58                space:      "code/data",
    59                access:     "RWX"
    60            }],
    61
    62            ["FLASH", {
    63                comment:    "Program FLASH",
    64                name:       "FLASH",
    65                base:       0xC000,
    66                len:        0x3FDE,
    67                space:      "code",
    68                access:     "RWX"
    69            }],
    70        ];
    71    }


module ti.catalog.msp430.f22xx.MSP430F2274

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F2274.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F2274 ========
    41     *  MSP430F2274 Cpu definition
    42     *
    43     *  This device has 32KB + 256B of Flash Memory and 1KB RAM.  The
    44     *  MSP430F2274 has two op-amps (OA).
    45     */
    46    metaonly module MSP430F2274 inherits IMSP430x22xx
    47    {
    48    instance:
    49        override config string   cpuCoreRevision = "1.0";
    50
    51        /*!
    52         *  ======== memMap ========
    53         *  The default memory map for this device
    54         */
    55        config xdc.platform.IPlatform.Memory memMap[string]  = [
    56            ["RAM", {
    57                comment:    "Data RAM",
    58                name:       "RAM",
    59                base:       0x200,
    60                len:        0x400,
    61                space:      "code/data",
    62                access:     "RWX"
    63            }],
    64
    65            ["FLASH", {
    66                comment:    "Program FLASH",
    67                name:       "FLASH",
    68                base:       0x8000,
    69                len:        0x7FDE,
    70                space:      "code",
    71                access:     "RWX"
    72            }],
    73        ];
    74    };


package ti.catalog.msp430.f22xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    requires xdc.platform;
    35    requires ti.catalog;
    36
    37    /*!
    38     *  ======== ti.catalog.msp430.f22xx ========
    39     *  Package of devices for the msp430.f22xx family.
    40     *
    41     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    42     *  interface. This interface is used by platforms (modules that implement
    43     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    44     */
    45    package ti.catalog.msp430.f22xx [1,0,0] {
    46        interface IMSP430x22xx;
    47        module MSP430F223x;
    48        module MSP430F225x;
    49        module MSP430F2274;
    50    }


interface ti.catalog.msp430.f54xx.IMSP430F54xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== IMSP430F54xx.xdc ========
    36     *  Common definitions for MSP430F54xx devices
    37     *
    38     *  This device can load code for different MSP430 ISAs - `MSP430` and
    39     *  `MSP430X`. The parameter `{@link #isa}` is set to a JavaScript regular
    40     *  expression that covers different MSP430 ISAs.
    41     *
    42     */
    43
    44    metaonly interface IMSP430F54xx inherits ti.catalog.msp430.IMSP430
    45    {
    46
    47    instance:
    48
    49        override config string   cpuCore = "MSP430X";
    50        override config string   isa     = "430|430X";
    51
    52        config ti.catalog.msp430.peripherals.special_function.IE1.Instance
    53            interruptEnableRegister1;
    54        config ti.catalog.msp430.peripherals.timer.Timer0_A5.Instance TA0;
    55        config ti.catalog.msp430.peripherals.timer.Timer1_A3.Instance TA1;
    56        config ti.catalog.msp430.peripherals.timer.Timer0_B7.Instance TB0;
    57        config ti.catalog.msp430.peripherals.watchdog.WDTplus.Instance wdtPlus;
    58        config ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller.Instance
    59            interruptController;
    60
    61        /*!
    62         *  ======== commonMap ========
    63         *  Memory map elements shared by all MSP430F54xx devices
    64         */
    65        config xdc.platform.IPlatform.Memory commonMap[string] = [
    66
    67            ["PERIPHERALS", {
    68                comment:    "Memory mapped peripherals",
    69                name:       "PERIPHERALS",
    70                base:       0x0,
    71                len:        0x1000,
    72                space:      "io",
    73                access:     "RW"
    74            }],
    75
    76            ["BSL", {
    77                comment:    "Bootstrap loader (flash)",
    78                name:       "BSL",
    79                base:       0x1000,
    80                len:        0x800,
    81                space:      "code",
    82                access:     "RW"
    83            }],
    84
    85            ["INFO", {
    86                comment:    "Information memory (flash)",
    87                name:       "INFO",
    88                base:       0x1800,
    89                len:        0x200,
    90                space:      "data",
    91                access:     "RW"
    92            }],
    93
    94            ["INT00", {
    95                comment: "Reserved Vector",
    96                name: "INT00",
    97                base: 0xFF80,
    98                len: 0x2,
    99                space: "data"
   100            }],
   101
   102            ["INT01", {
   103                comment: "Reserved Vector",
   104                name: "INT01",
   105                base: 0xFF82,
   106                len: 0x2,
   107                space: "data"
   108            }],
   109
   110            ["INT02", {
   111                comment: "Reserved Vector",
   112                name: "INT02",
   113                base: 0xFF84,
   114                len: 0x2,
   115                space: "data"
   116            }],
   117
   118            ["INT03", {
   119                comment: "Reserved Vector",
   120                name: "INT03",
   121                base: 0xFF86,
   122                len: 0x2,
   123                space: "data"
   124            }],
   125
   126            ["INT04", {
   127                comment: "Reserved Vector",
   128                name: "INT04",
   129                base: 0xFF88,
   130                len: 0x2,
   131                space: "data"
   132            }],
   133
   134            ["INT05", {
   135                comment: "Reserved Vector",
   136                name: "INT05",
   137                base: 0xFF8A,
   138                len: 0x2,
   139                space: "data"
   140            }],
   141
   142            ["INT06", {
   143                comment: "Reserved Vector",
   144                name: "INT06",
   145                base: 0xFF8C,
   146                len: 0x2,
   147                space: "data"
   148            }],
   149
   150            ["INT07", {
   151                comment: "Reserved Vector",
   152                name: "INT07",
   153                base: 0xFF8E,
   154                len: 0x2,
   155                space: "data"
   156            }],
   157
   158            ["INT08", {
   159                comment: "Reserved Vector",
   160                name: "INT08",
   161                base: 0xFF90,
   162                len: 0x2,
   163                space: "data"
   164            }],
   165
   166            ["INT09", {
   167                comment: "Reserved Vector",
   168                name: "INT09",
   169                base: 0xFF92,
   170                len: 0x2,
   171                space: "data"
   172            }],
   173
   174            ["INT10", {
   175                comment: "Reserved Vector",
   176                name: "INT10",
   177                base: 0xFF94,
   178                len: 0x2,
   179                space: "data"
   180            }],
   181
   182            ["INT11", {
   183                comment: "Reserved Vector",
   184                name: "INT11",
   185                base: 0xFF96,
   186                len: 0x2,
   187                space: "data"
   188            }],
   189
   190            ["INT12", {
   191                comment: "Reserved Vector",
   192                name: "INT12",
   193                base: 0xFF98,
   194                len: 0x2,
   195                space: "data"
   196            }],
   197
   198            ["INT13", {
   199                comment: "Reserved Vector",
   200                name: "INT13",
   201                base: 0xFF9A,
   202                len: 0x2,
   203                space: "data"
   204            }],
   205
   206            ["INT14", {
   207                comment: "Reserved Vector",
   208                name: "INT14",
   209                base: 0xFF9C,
   210                len: 0x2,
   211                space: "data"
   212            }],
   213
   214            ["INT15", {
   215                comment: "Reserved Vector",
   216                name: "INT15",
   217                base: 0xFF9E,
   218                len: 0x2,
   219                space: "data"
   220            }],
   221
   222            ["INT16", {
   223                comment: "Reserved Vector",
   224                name: "INT16",
   225                base: 0xFFA0,
   226                len: 0x2,
   227                space: "data"
   228            }],
   229
   230            ["INT17", {
   231                comment: "Reserved Vector",
   232                name: "INT17",
   233                base: 0xFFA2,
   234                len: 0x2,
   235                space: "data"
   236            }],
   237
   238            ["INT18", {
   239                comment: "Reserved Vector",
   240                name: "INT18",
   241                base: 0xFFA4,
   242                len: 0x2,
   243                space: "data"
   244            }],
   245
   246            ["INT19", {
   247                comment: "Reserved Vector",
   248                name: "INT19",
   249                base: 0xFFA6,
   250                len: 0x2,
   251                space: "data"
   252            }],
   253
   254            ["INT20", {
   255                comment: "Reserved Vector",
   256                name: "INT20",
   257                base: 0xFFA8,
   258                len: 0x2,
   259                space: "data"
   260            }],
   261
   262            ["INT21", {
   263                comment: "Reserved Vector",
   264                name: "INT21",
   265                base: 0xFFAA,
   266                len: 0x2,
   267                space: "data"
   268            }],
   269
   270            ["INT22", {
   271                comment: "Reserved Vector",
   272                name: "INT22",
   273                base: 0xFFAC,
   274                len: 0x2,
   275                space: "data"
   276            }],
   277
   278            ["INT23", {
   279                comment: "Reserved Vector",
   280                name: "INT23",
   281                base: 0xFFAE,
   282                len: 0x2,
   283                space: "data"
   284            }],
   285
   286            ["INT24", {
   287                comment: "Reserved Vector",
   288                name: "INT24",
   289                base: 0xFFB0,
   290                len: 0x2,
   291                space: "data"
   292            }],
   293
   294            ["INT25", {
   295                comment: "Reserved Vector",
   296                name: "INT25",
   297                base: 0xFFB2,
   298                len: 0x2,
   299                space: "data"
   300            }],
   301
   302            ["INT26", {
   303                comment: "Reserved Vector",
   304                name: "INT26",
   305                base: 0xFFB4,
   306                len: 0x2,
   307                space: "data"
   308            }],
   309
   310            ["INT27", {
   311                comment: "Reserved Vector",
   312                name: "INT27",
   313                base: 0xFFB6,
   314                len: 0x2,
   315                space: "data"
   316            }],
   317
   318            ["INT28", {
   319                comment: "Reserved Vector",
   320                name: "INT28",
   321                base: 0xFFB8,
   322                len: 0x2,
   323                space: "data"
   324            }],
   325
   326            ["INT29", {
   327                comment: "Reserved Vector",
   328                name: "INT29",
   329                base: 0xFFBA,
   330                len: 0x2,
   331                space: "data"
   332            }],
   333
   334            ["INT30", {
   335                comment: "Reserved Vector",
   336                name: "INT30",
   337                base: 0xFFBC,
   338                len: 0x2,
   339                space: "data"
   340            }],
   341
   342            ["INT31", {
   343                comment: "Reserved Vector",
   344                name: "INT31",
   345                base: 0xFFBE,
   346                len: 0x2,
   347                space: "data"
   348            }],
   349
   350            ["INT32", {
   351                comment: "Reserved Vector",
   352                name: "INT32",
   353                base: 0xFFC0,
   354                len: 0x2,
   355                space: "data"
   356            }],
   357
   358            ["INT33", {
   359                comment: "Reserved Vector",
   360                name: "INT33",
   361                base: 0xFFC2,
   362                len: 0x2,
   363                space: "data"
   364            }],
   365
   366            ["INT34", {
   367                comment: "Reserved Vector",
   368                name: "INT34",
   369                base: 0xFFC4,
   370                len: 0x2,
   371                space: "data"
   372            }],
   373
   374            ["INT35", {
   375                comment: "Reserved Vector",
   376                name: "INT35",
   377                base: 0xFFC6,
   378                len: 0x2,
   379                space: "data"
   380            }],
   381
   382            ["INT36", {
   383                comment: "Reserved Vector",
   384                name: "INT36",
   385                base: 0xFFC8,
   386                len: 0x2,
   387                space: "data"
   388            }],
   389
   390            ["INT37", {
   391                comment: "Reserved Vector",
   392                name: "INT37",
   393                base: 0xFFCA,
   394                len: 0x2,
   395                space: "data"
   396            }],
   397
   398            ["INT38", {
   399                comment: "Reserved Vector",
   400                name: "INT38",
   401                base: 0xFFCC,
   402                len: 0x2,
   403                space: "data"
   404            }],
   405
   406            ["INT39", {
   407                comment: "Reserved Vector",
   408                name: "INT39",
   409                base: 0xFFCE,
   410                len: 0x2,
   411                space: "data"
   412            }],
   413
   414            ["INT40", {
   415                comment: "Reserved Vector",
   416                name: "INT40",
   417                base: 0xFFD0,
   418                len: 0x2,
   419                space: "data"
   420            }],
   421
   422            ["INT41", {
   423                comment: "RTC_A Vector",
   424                name: "INT41",
   425                base: 0xFFD2,
   426                len: 0x2,
   427                space: "data"
   428            }],
   429
   430            ["INT42", {
   431                comment: "I/O Port P2 Vector",
   432                name: "INT42",
   433                base: 0xFFD4,
   434                len: 0x2,
   435                space: "data"
   436            }],
   437
   438            ["INT43", {
   439                comment: "USCI_B3 Receive/Transmit Vector",
   440                name: "INT43",
   441                base: 0xFFD6,
   442                len: 0x2,
   443                space: "data"
   444            }],
   445
   446            ["INT44", {
   447                comment: "USCI_A3 Receive/Transmit Vector",
   448                name: "INT44",
   449                base: 0xFFD8,
   450                len: 0x2,
   451                space: "data"
   452            }],
   453
   454            ["INT45", {
   455                comment: "USCI_B1 Receive/Transmit Vector",
   456                name: "INT45",
   457                base: 0xFFDA,
   458                len: 0x2,
   459                space: "data"
   460            }],
   461
   462            ["INT46", {
   463                comment: "USCI_A1 Receive/Transmit Vector",
   464                name: "INT46",
   465                base: 0xFFDC,
   466                len: 0x2,
   467                space: "data"
   468            }],
   469
   470            ["INT47", {
   471                comment: "I/O Port P1 Vector",
   472                name: "INT47",
   473                base: 0xFFDE,
   474                len: 0x2,
   475                space: "data"
   476            }],
   477
   478            ["INT48", {
   479                comment: "TA1 CCR1-CCR2 Vector",
   480                name: "INT48",
   481                base: 0xFFE0,
   482                len: 0x2,
   483                space: "data"
   484            }],
   485
   486            ["INT49", {
   487                comment: "TA1 CCR0 Vector",
   488                name: "INT49",
   489                base: 0xFFE2,
   490                len: 0x2,
   491                space: "data"
   492            }],
   493
   494            ["INT50", {
   495                comment: "DMA Vector",
   496                name: "INT50",
   497                base: 0xFFE4,
   498                len: 0x2,
   499                space: "data"
   500            }],
   501
   502            ["INT51", {
   503                comment: "USCI_B2 Receive/Transmit Vector",
   504                name: "INT51",
   505                base: 0xFFE6,
   506                len: 0x2,
   507                space: "data"
   508            }],
   509
   510            ["INT52", {
   511                comment: "USCI_A2 Receive/Transmit Vector",
   512                name: "INT52",
   513                base: 0xFFE8,
   514                len: 0x2,
   515                space: "data"
   516            }],
   517
   518            ["INT53", {
   519                comment: "TA0 CCR1-CCR4 Vector",
   520                name: "INT53",
   521                base: 0xFFEA,
   522                len: 0x2,
   523                space: "data"
   524            }],
   525
   526            ["INT54", {
   527                comment: "TA0 CCR0 Vector",
   528                name: "INT54",
   529                base: 0xFFEC,
   530                len: 0x2,
   531                space: "data"
   532            }],
   533
   534            ["INT55", {
   535                comment: "ADC12_A Vector",
   536                name: "INT55",
   537                base: 0xFFEE,
   538                len: 0x2,
   539                space: "data"
   540            }],
   541
   542            ["INT56", {
   543                comment: "USCI_B0 Receive/Transmit Vector",
   544                name: "INT56",
   545                base: 0xFFF0,
   546                len: 0x2,
   547                space: "data"
   548            }],
   549
   550            ["INT57", {
   551                comment: "USCI_A0 Receive/Transmit Vector",
   552                name: "INT57",
   553                base: 0xFFF2,
   554                len: 0x2,
   555                space: "data"
   556            }],
   557
   558            ["INT58", {
   559                comment: "Watchdog Timer_A Interval Timer Mode Vector",
   560                name: "INT58",
   561                base: 0xFFF4,
   562                len: 0x2,
   563                space: "data"
   564            }],
   565
   566            ["INT59", {
   567                comment: "TB0 CCR1-CCR6 Vector",
   568                name: "INT59",
   569                base: 0xFFF6,
   570                len: 0x2,
   571                space: "data"
   572            }],
   573
   574            ["INT60", {
   575                comment: "TB0 CCR0 Vector",
   576                name: "INT60",
   577                base: 0xFFF8,
   578                len: 0x2,
   579                space: "data"
   580            }],
   581
   582            ["INT61", {
   583                comment: "User NMI Vector",
   584                name: "INT61",
   585                base: 0xFFFA,
   586                len: 0x2,
   587                space: "data"
   588            }],
   589
   590            ["INT62", {
   591                comment: "System NMI Vector",
   592                name: "INT62",
   593                base: 0xFFFC,
   594                len: 0x2,
   595                space: "data"
   596            }],
   597
   598            ["RESET", {
   599                comment: "Reset Vector",
   600                name: "RESET",
   601                base: 0xFFFE,
   602                len:  0x2,
   603                space: "data"
   604            }],
   605        ];
   606    }


module ti.catalog.msp430.f54xx.MSP430F5418

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F5418.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F5418 ========
    41     *  MSP430F5418 CPU definition
    42     */
    43    metaonly module MSP430F5418 inherits IMSP430F54xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x1C00,
    58                len:        0x4000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x5C00,
    67                len:        0xA380,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71
    72            ["FLASH2", {
    73                comment:    "Extended Program FLASH",
    74                name:       "FLASH2",
    75                base:       0x10000,
    76                len:        0x15C00,
    77                space:      "code",
    78                access:     "RWX"
    79            }],
    80
    81        ];
    82    };


module ti.catalog.msp430.f54xx.MSP430F5419

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F5419.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F5419 ========
    41     *  MSP430F5419 CPU definition
    42     */
    43    metaonly module MSP430F5419 inherits IMSP430F54xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x1C00,
    58                len:        0x4000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x5C00,
    67                len:        0xA380,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71
    72            ["FLASH2", {
    73                comment:    "Extended Program FLASH",
    74                name:       "FLASH2",
    75                base:       0x10000,
    76                len:        0x15C00,
    77                space:      "code",
    78                access:     "RWX"
    79            }],
    80
    81        ];
    82    };


module ti.catalog.msp430.f54xx.MSP430F5435

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F5435.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F5435 ========
    41     *  MSP430F5435 CPU definition
    42     */
    43    metaonly module MSP430F5435 inherits IMSP430F54xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x1C00,
    58                len:        0x4000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x5C00,
    67                len:        0xA380,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71
    72            ["FLASH2", {
    73                comment:    "Extended Program FLASH",
    74                name:       "FLASH2",
    75                base:       0x10000,
    76                len:        0x25C00,
    77                space:      "code",
    78                access:     "RWX"
    79            }],
    80
    81        ];
    82    };


module ti.catalog.msp430.f54xx.MSP430F5436

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F5436.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F5436 ========
    41     *  MSP430F5436 CPU definition
    42     */
    43    metaonly module MSP430F5436 inherits IMSP430F54xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x1C00,
    58                len:        0x4000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x5C00,
    67                len:        0xA380,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71
    72            ["FLASH2", {
    73                comment:    "Extended Program FLASH",
    74                name:       "FLASH2",
    75                base:       0x10000,
    76                len:        0x25C00,
    77                space:      "code",
    78                access:     "RWX"
    79            }],
    80
    81        ];
    82    };


module ti.catalog.msp430.f54xx.MSP430F5437

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F5437.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F5437 ========
    41     *  MSP430F5437 CPU definition
    42     */
    43    metaonly module MSP430F5437 inherits IMSP430F54xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x1C00,
    58                len:        0x4000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x5C00,
    67                len:        0xA380,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71
    72            ["FLASH2", {
    73                comment:    "Extended Program FLASH",
    74                name:       "FLASH2",
    75                base:       0x10000,
    76                len:        0x35C00,
    77                space:      "code",
    78                access:     "RWX"
    79            }],
    80
    81        ];
    82    };


module ti.catalog.msp430.f54xx.MSP430F5438

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F5438.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F5438 ========
    41     *  MSP430F5438 CPU definition
    42     */
    43    metaonly module MSP430F5438 inherits IMSP430F54xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x1C00,
    58                len:        0x4000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x5C00,
    67                len:        0xA380,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71
    72            ["FLASH2", {
    73                comment:    "Extended Program FLASH",
    74                name:       "FLASH2",
    75                base:       0x10000,
    76                len:        0x35C00,
    77                space:      "code",
    78                access:     "RWX"
    79            }],
    80
    81        ];
    82    };


package ti.catalog.msp430.f54xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    requires xdc.platform;
    35    requires ti.catalog;
    36
    37    /*!
    38     *  ======== ti.catalog.msp430.f54xx ========
    39     *  Package of devices for the msp430.f54xx family
    40     *
    41     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    42     *  interface. This interface is used by platforms (modules that implement
    43     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    44     */
    45    package ti.catalog.msp430.f54xx [1,0,0] {
    46        interface IMSP430F54xx;
    47        module MSP430F5418;
    48        module MSP430F5419;
    49        module MSP430F5435;
    50        module MSP430F5436;
    51        module MSP430F5437;
    52        module MSP430F5438;
    53    }


module ti.catalog.msp430.f55xx.CC430F6137

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== CC430F6137.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== CC430F6137 ========
    41     *  CC430F6137 CPU definition
    42     */
    43    metaonly module CC430F6137 inherits IMSP430F55xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x1C00,
    58                len:        0x1000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x8000,
    67                len:        0x7F80,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71        ];
    72    };


interface ti.catalog.msp430.f55xx.IMSP430F55xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== IMSP430F55xx.xdc ========
    36     *  Common definitions for MSP430F55xx devices
    37     *
    38     *  This device can load code for different MSP430 ISAs - `MSP430` and
    39     *  `MSP430X`. The parameter `{@link #isa}` is set to a JavaScript regular
    40     *  expression that covers different MSP430 ISAs.
    41     *
    42     */
    43
    44    metaonly interface IMSP430F55xx inherits ti.catalog.msp430.IMSP430
    45    {
    46
    47    instance:
    48
    49        override config string   cpuCore = "MSP430X";
    50        override config string   isa     = "430|430X";
    51
    52        config ti.catalog.msp430.peripherals.special_function.IE1.Instance
    53            interruptEnableRegister1;
    54        config ti.catalog.msp430.peripherals.timer.Timer0_A5.Instance TA0;
    55        config ti.catalog.msp430.peripherals.timer.Timer1_A3.Instance TA1;
    56        config ti.catalog.msp430.peripherals.timer.Timer2_A3.Instance TA2;
    57        config ti.catalog.msp430.peripherals.timer.Timer0_B7.Instance TB0;
    58        config ti.catalog.msp430.peripherals.watchdog.WDTplus.Instance wdtPlus;
    59        config ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller.Instance
    60            interruptController;
    61
    62        /*!
    63         *  ======== commonMap ========
    64         *  Memory map elements shared by all MSP430F55xx devices
    65         */
    66        config xdc.platform.IPlatform.Memory commonMap[string] = [
    67
    68            ["PERIPHERALS", {
    69                comment:    "Memory mapped peripherals",
    70                name:       "PERIPHERALS",
    71                base:       0x0,
    72                len:        0x1000,
    73                space:      "io",
    74                access:     "RW"
    75            }],
    76
    77            ["BSL", {
    78                comment:    "Bootstrap loader (flash)",
    79                name:       "BSL",
    80                base:       0x1000,
    81                len:        0x800,
    82                space:      "code",
    83                access:     "RW"
    84            }],
    85
    86            ["INFOD", {
    87                comment:    "Information Memory D (flash)",
    88                name:       "INFOD",
    89                base:       0x1800,
    90                len:        0x80,
    91                space:      "data",
    92                access:     "RW"
    93            }],
    94
    95            ["INFOC", {
    96                comment:    "Information Memory C (flash)",
    97                name:       "INFOC",
    98                base:       0x1880,
    99                len:        0x80,
   100                space:      "data",
   101                access:     "RW"
   102            }],
   103
   104            ["INFOB", {
   105                comment:    "Information Memory B (flash)",
   106                name:       "INFOB",
   107                base:       0x1900,
   108                len:        0x80,
   109                space:      "data",
   110                access:     "RW"
   111            }],
   112
   113            ["INFOA", {
   114                comment:    "Information Memory A (flash)",
   115                name:       "INFOA",
   116                base:       0x1980,
   117                len:        0x80,
   118                space:      "data",
   119                access:     "RW"
   120            }],
   121
   122            ["INT00", {
   123                comment: "Reserved Vector",
   124                name: "INT00",
   125                base: 0xFF80,
   126                len: 0x2,
   127                space: "data"
   128            }],
   129
   130            ["INT01", {
   131                comment: "Reserved Vector",
   132                name: "INT01",
   133                base: 0xFF82,
   134                len: 0x2,
   135                space: "data"
   136            }],
   137
   138            ["INT02", {
   139                comment: "Reserved Vector",
   140                name: "INT02",
   141                base: 0xFF84,
   142                len: 0x2,
   143                space: "data"
   144            }],
   145
   146            ["INT03", {
   147                comment: "Reserved Vector",
   148                name: "INT03",
   149                base: 0xFF86,
   150                len: 0x2,
   151                space: "data"
   152            }],
   153
   154            ["INT04", {
   155                comment: "Reserved Vector",
   156                name: "INT04",
   157                base: 0xFF88,
   158                len: 0x2,
   159                space: "data"
   160            }],
   161
   162            ["INT05", {
   163                comment: "Reserved Vector",
   164                name: "INT05",
   165                base: 0xFF8A,
   166                len: 0x2,
   167                space: "data"
   168            }],
   169
   170            ["INT06", {
   171                comment: "Reserved Vector",
   172                name: "INT06",
   173                base: 0xFF8C,
   174                len: 0x2,
   175                space: "data"
   176            }],
   177
   178            ["INT07", {
   179                comment: "Reserved Vector",
   180                name: "INT07",
   181                base: 0xFF8E,
   182                len: 0x2,
   183                space: "data"
   184            }],
   185
   186            ["INT08", {
   187                comment: "Reserved Vector",
   188                name: "INT08",
   189                base: 0xFF90,
   190                len: 0x2,
   191                space: "data"
   192            }],
   193
   194            ["INT09", {
   195                comment: "Reserved Vector",
   196                name: "INT09",
   197                base: 0xFF92,
   198                len: 0x2,
   199                space: "data"
   200            }],
   201
   202            ["INT10", {
   203                comment: "Reserved Vector",
   204                name: "INT10",
   205                base: 0xFF94,
   206                len: 0x2,
   207                space: "data"
   208            }],
   209
   210            ["INT11", {
   211                comment: "Reserved Vector",
   212                name: "INT11",
   213                base: 0xFF96,
   214                len: 0x2,
   215                space: "data"
   216            }],
   217
   218            ["INT12", {
   219                comment: "Reserved Vector",
   220                name: "INT12",
   221                base: 0xFF98,
   222                len: 0x2,
   223                space: "data"
   224            }],
   225
   226            ["INT13", {
   227                comment: "Reserved Vector",
   228                name: "INT13",
   229                base: 0xFF9A,
   230                len: 0x2,
   231                space: "data"
   232            }],
   233
   234            ["INT14", {
   235                comment: "Reserved Vector",
   236                name: "INT14",
   237                base: 0xFF9C,
   238                len: 0x2,
   239                space: "data"
   240            }],
   241
   242            ["INT15", {
   243                comment: "Reserved Vector",
   244                name: "INT15",
   245                base: 0xFF9E,
   246                len: 0x2,
   247                space: "data"
   248            }],
   249
   250            ["INT16", {
   251                comment: "Reserved Vector",
   252                name: "INT16",
   253                base: 0xFFA0,
   254                len: 0x2,
   255                space: "data"
   256            }],
   257
   258            ["INT17", {
   259                comment: "Reserved Vector",
   260                name: "INT17",
   261                base: 0xFFA2,
   262                len: 0x2,
   263                space: "data"
   264            }],
   265
   266            ["INT18", {
   267                comment: "Reserved Vector",
   268                name: "INT18",
   269                base: 0xFFA4,
   270                len: 0x2,
   271                space: "data"
   272            }],
   273
   274            ["INT19", {
   275                comment: "Reserved Vector",
   276                name: "INT19",
   277                base: 0xFFA6,
   278                len: 0x2,
   279                space: "data"
   280            }],
   281
   282            ["INT20", {
   283                comment: "Reserved Vector",
   284                name: "INT20",
   285                base: 0xFFA8,
   286                len: 0x2,
   287                space: "data"
   288            }],
   289
   290            ["INT21", {
   291                comment: "Reserved Vector",
   292                name: "INT21",
   293                base: 0xFFAA,
   294                len: 0x2,
   295                space: "data"
   296            }],
   297
   298            ["INT22", {
   299                comment: "Reserved Vector",
   300                name: "INT22",
   301                base: 0xFFAC,
   302                len: 0x2,
   303                space: "data"
   304            }],
   305
   306            ["INT23", {
   307                comment: "Reserved Vector",
   308                name: "INT23",
   309                base: 0xFFAE,
   310                len: 0x2,
   311                space: "data"
   312            }],
   313
   314            ["INT24", {
   315                comment: "Reserved Vector",
   316                name: "INT24",
   317                base: 0xFFB0,
   318                len: 0x2,
   319                space: "data"
   320            }],
   321
   322            ["INT25", {
   323                comment: "Reserved Vector",
   324                name: "INT25",
   325                base: 0xFFB2,
   326                len: 0x2,
   327                space: "data"
   328            }],
   329
   330            ["INT26", {
   331                comment: "Reserved Vector",
   332                name: "INT26",
   333                base: 0xFFB4,
   334                len: 0x2,
   335                space: "data"
   336            }],
   337
   338            ["INT27", {
   339                comment: "Reserved Vector",
   340                name: "INT27",
   341                base: 0xFFB6,
   342                len: 0x2,
   343                space: "data"
   344            }],
   345
   346            ["INT28", {
   347                comment: "Reserved Vector",
   348                name: "INT28",
   349                base: 0xFFB8,
   350                len: 0x2,
   351                space: "data"
   352            }],
   353
   354            ["INT29", {
   355                comment: "Reserved Vector",
   356                name: "INT29",
   357                base: 0xFFBA,
   358                len: 0x2,
   359                space: "data"
   360            }],
   361
   362            ["INT30", {
   363                comment: "Reserved Vector",
   364                name: "INT30",
   365                base: 0xFFBC,
   366                len: 0x2,
   367                space: "data"
   368            }],
   369
   370            ["INT31", {
   371                comment: "Reserved Vector",
   372                name: "INT31",
   373                base: 0xFFBE,
   374                len: 0x2,
   375                space: "data"
   376            }],
   377
   378            ["INT32", {
   379                comment: "Reserved Vector",
   380                name: "INT32",
   381                base: 0xFFC0,
   382                len: 0x2,
   383                space: "data"
   384            }],
   385
   386            ["INT33", {
   387                comment: "Reserved Vector",
   388                name: "INT33",
   389                base: 0xFFC2,
   390                len: 0x2,
   391                space: "data"
   392            }],
   393
   394            ["INT34", {
   395                comment: "Reserved Vector",
   396                name: "INT34",
   397                base: 0xFFC4,
   398                len: 0x2,
   399                space: "data"
   400            }],
   401
   402            ["INT35", {
   403                comment: "Reserved Vector",
   404                name: "INT35",
   405                base: 0xFFC6,
   406                len: 0x2,
   407                space: "data"
   408            }],
   409
   410            ["INT36", {
   411                comment: "Reserved Vector",
   412                name: "INT36",
   413                base: 0xFFC8,
   414                len: 0x2,
   415                space: "data"
   416            }],
   417
   418            ["INT37", {
   419                comment: "Reserved Vector",
   420                name: "INT37",
   421                base: 0xFFCA,
   422                len: 0x2,
   423                space: "data"
   424            }],
   425
   426            ["INT38", {
   427                comment: "Reserved Vector",
   428                name: "INT38",
   429                base: 0xFFCC,
   430                len: 0x2,
   431                space: "data"
   432            }],
   433
   434            ["INT39", {
   435                comment: "Reserved Vector",
   436                name: "INT39",
   437                base: 0xFFCE,
   438                len: 0x2,
   439                space: "data"
   440            }],
   441
   442            ["INT40", {
   443                comment: "Reserved Vector",
   444                name: "INT40",
   445                base: 0xFFD0,
   446                len: 0x2,
   447                space: "data"
   448            }],
   449
   450            ["INT41", {
   451                comment: "RTC_A Vector",
   452                name: "INT41",
   453                base: 0xFFD2,
   454                len: 0x2,
   455                space: "data"
   456            }],
   457
   458            ["INT42", {
   459                comment: "I/O Port P2 Vector",
   460                name: "INT42",
   461                base: 0xFFD4,
   462                len: 0x2,
   463                space: "data"
   464            }],
   465
   466            ["INT43", {
   467                comment: "TA2 CCR1-CCR2 Vector",
   468                name: "INT43",
   469                base: 0xFFD6,
   470                len: 0x2,
   471                space: "data"
   472            }],
   473
   474            ["INT44", {
   475                comment: "TA2 CCR0 Vector",
   476                name: "INT44",
   477                base: 0xFFD8,
   478                len: 0x2,
   479                space: "data"
   480            }],
   481
   482            ["INT45", {
   483                comment: "USCI_B1 Receive/Transmit Vector",
   484                name: "INT45",
   485                base: 0xFFDA,
   486                len: 0x2,
   487                space: "data"
   488            }],
   489
   490            ["INT46", {
   491                comment: "USCI_A1 Receive/Transmit Vector",
   492                name: "INT46",
   493                base: 0xFFDC,
   494                len: 0x2,
   495                space: "data"
   496            }],
   497
   498            ["INT47", {
   499                comment: "I/O Port P1 Vector",
   500                name: "INT47",
   501                base: 0xFFDE,
   502                len: 0x2,
   503                space: "data"
   504            }],
   505
   506            ["INT48", {
   507                comment: "TA1 CCR1-CCR2 Vector",
   508                name: "INT48",
   509                base: 0xFFE0,
   510                len: 0x2,
   511                space: "data"
   512            }],
   513
   514            ["INT49", {
   515                comment: "TA1 CCR0 Vector",
   516                name: "INT49",
   517                base: 0xFFE2,
   518                len: 0x2,
   519                space: "data"
   520            }],
   521
   522            ["INT50", {
   523                comment: "DMA Vector",
   524                name: "INT50",
   525                base: 0xFFE4,
   526                len: 0x2,
   527                space: "data"
   528            }],
   529
   530            ["INT51", {
   531                comment: "USB_UBM Vector",
   532                name: "INT51",
   533                base: 0xFFE6,
   534                len: 0x2,
   535                space: "data"
   536            }],
   537
   538            ["INT52", {
   539                comment: "TA0 CCR1-CCR4 Vector",
   540                name: "INT52",
   541                base: 0xFFE8,
   542                len: 0x2,
   543                space: "data"
   544            }],
   545
   546            ["INT53", {
   547                comment: "TA0 CCR0 Vector",
   548                name: "INT53",
   549                base: 0xFFEA,
   550                len: 0x2,
   551                space: "data"
   552            }],
   553
   554            ["INT54", {
   555                comment: "ADC12_A Vector",
   556                name: "INT54",
   557                base: 0xFFEC,
   558                len: 0x2,
   559                space: "data"
   560            }],
   561
   562            ["INT55", {
   563                comment: "USCI_B0 Receive/Transmit Vector",
   564                name: "INT55",
   565                base: 0xFFEE,
   566                len: 0x2,
   567                space: "data"
   568            }],
   569
   570            ["INT56", {
   571                comment: "USCI_A0 Receive/Transmit Vector",
   572                name: "INT56",
   573                base: 0xFFF0,
   574                len: 0x2,
   575                space: "data"
   576            }],
   577
   578            ["INT57", {
   579                comment: "Watchdog Timer_A Interval Timer Mode Vector",
   580                name: "INT57",
   581                base: 0xFFF2,
   582                len: 0x2,
   583                space: "data"
   584            }],
   585
   586            ["INT58", {
   587                comment: "TB0 CCR1-CCR6 Vector",
   588                name: "INT58",
   589                base: 0xFFF4,
   590                len: 0x2,
   591                space: "data"
   592            }],
   593
   594            ["INT59", {
   595                comment: "TB0 CCR0 Vector",
   596                name: "INT59",
   597                base: 0xFFF6,
   598                len: 0x2,
   599                space: "data"
   600            }],
   601
   602            ["INT60", {
   603                comment: "Comp_B Vector",
   604                name: "INT60",
   605                base: 0xFFF8,
   606                len: 0x2,
   607                space: "data"
   608            }],
   609
   610            ["INT61", {
   611                comment: "User NMI Vector",
   612                name: "INT61",
   613                base: 0xFFFA,
   614                len: 0x2,
   615                space: "data"
   616            }],
   617
   618            ["INT62", {
   619                comment: "System NMI Vector",
   620                name: "INT62",
   621                base: 0xFFFC,
   622                len: 0x2,
   623                space: "data"
   624            }],
   625
   626            ["RESET", {
   627                comment: "Reset Vector",
   628                name: "RESET",
   629                base: 0xFFFE,
   630                len:  0x2,
   631                space: "data"
   632            }],
   633        ];
   634    }


module ti.catalog.msp430.f55xx.MSP430F5529

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*
    35     *  ======== MSP430F5529.xdc ========
    36     *
    37     */
    38
    39    /*!
    40     *  ======== MSP430F5529 ========
    41     *  MSP430F5529 CPU definition
    42     */
    43    metaonly module MSP430F5529 inherits IMSP430F55xx
    44    {
    45    instance:
    46        override config string   cpuCoreRevision = "1.0";
    47
    48        /*!
    49         *  ======== memMap ========
    50         *  The default memory map for this device
    51         */
    52        config xdc.platform.IPlatform.Memory memMap[string]  = [
    53
    54            ["RAM", {
    55                comment:    "Data RAM",
    56                name:       "RAM",
    57                base:       0x2400,
    58                len:        0x2000,
    59                space:      "code/data",
    60                access:     "RWX"
    61            }],
    62
    63            ["FLASH", {
    64                comment:    "Program FLASH",
    65                name:       "FLASH",
    66                base:       0x4400,
    67                len:        0xBB80,
    68                space:      "code",
    69                access:     "RWX"
    70            }],
    71
    72            ["FLASH2", {
    73                comment:    "Extended Program FLASH",
    74                name:       "FLASH2",
    75                base:       0x10000,
    76                len:        0x14400,
    77                space:      "code",
    78                access:     "RWX"
    79            }],
    80
    81        ];
    82    };


package ti.catalog.msp430.f55xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    requires xdc.platform;
    35    requires ti.catalog;
    36
    37    /*!
    38     *  ======== ti.catalog.msp430.f55xx ========
    39     *  Package of devices for the msp430.f55xx family.
    40     *
    41     *  Each module in this package implements the xdc.platform.ICpuDataSheet
    42     *  interface. This interface is used by platforms (modules that implement
    43     *  xdc.platform.IPlatform) to obtain the memory map supported by each CPU.
    44     */
    45    package ti.catalog.msp430.f55xx [1,0,0] {
    46        interface IMSP430F55xx;
    47        module CC430F6137;
    48        module MSP430F5529;
    49    }


module ti.catalog.msp430.init.Boot

     1    /*
     2     * Copyright (c) 2015, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Boot.xdc ========
    35     */
    36
    37    package ti.catalog.msp430.init;
    38
    39    import xdc.rov.ViewInfo;
    40
    41    /*!
    42     *  ======== Boot ========
    43     *  Boot time initialization code manager
    44     *
    45     *  The Boot module supports boot initialization for the MSP430 devices.
    46     *  A special boot init function is created based on the configuration
    47     *  settings for this module.  This function is hooked into the
    48     *  `{@link xdc.runtime.Reset#fxns xdc.runtime.Reset.fxns[]}` array and
    49     *  is called very early at boot time (prior to C runtime initialization).
    50     *
    51     *  The code to support the boot module is placed in a separate section
    52     *  named `".text:bootCodeSection"` to allow placement of this section in
    53     *  the linker .cmd file if necessary. This section is a subsection of the
    54     *  `".text"` section so this code will be placed into the .text section
    55     *  unless explicitly placed, either through
    56     *  `{@link xdc.cfg.Program#sectMap Program.sectMap}` or through a linker
    57     *  command file.
    58     */
    59    @Template("./Boot.xdt")
    60    metaonly module Boot
    61    {
    62        metaonly struct ModuleView {
    63            Bool         disableWatchdog;
    64            UInt         watchdogAddress;
    65            Bool         configureDCO;
    66            Bool         useLFXT;
    67        }
    68
    69        @Facet
    70        metaonly config ViewInfo.Instance rovViewInfo =
    71            ViewInfo.create({
    72                viewMap: [
    73                [
    74                    'Module',
    75                    {
    76                        type: ViewInfo.MODULE,
    77                        viewInitFxn: 'viewInitModule',
    78                        structName: 'ModuleView'
    79                    }
    80                ],
    81                ]
    82            });
    83
    84        /*!
    85         *  ======== disableWatchdog ========
    86         *  Watchdog disable flag
    87         *
    88         *  The default is `true`.  Set to `false` to not automatically disable the
    89         *  watchdog timer.
    90         */
    91        config Bool disableWatchdog = true;
    92
    93        /*!
    94         *  ======== watchdogAddress ========
    95         *  Watchdog control register address
    96         *
    97         *  The default (0x15c) is set for MSP430F54xx and MSP430F552x devices.
    98         *  Change for other devices.
    99         */
   100        config UInt watchdogAddress = 0x15c;
   101
   102        /*!
   103         *  ======== configureDCO ========
   104         *  Configure DCO flag
   105         *
   106         *  The default is `false`.  Set to `true` to initialize the DCO at boot.
   107         *
   108         */
   109        config Bool configureDCO = false;
   110
   111        /*!
   112         *  ======== useLFXT ========
   113         *  Use a low frequency crystal (LFXT) reference
   114         *
   115         *  The default is `false`.  Set to `true` to indicate a 32768Hz low
   116         *  frequency crystal is present, and available for configuring the clock
   117         *  system.
   118         *
   119         *  This configuration parameter is utilized for only a subset of MSP430
   120         *  device types, and only when `configureDCO` is set to `true`.
   121         *
   122         *  For FR58xx/FR59xx devices: if `useLFXT` is set to `true`, an LFXT
   123         *  will be used as reference, for generating more accurate clock
   124         *  frequencies.  Othewise, and by default, MODOSC will be used as
   125         *  reference.
   126         *
   127         *  For all other MSP430 device types: at present, the `useLFXT` parameter
   128         *  will be ignored, and an internal reference will be used instead.
   129         */
   130        config Bool useLFXT = false;
   131    };


package ti.catalog.msp430.init

     1    /*
     2     * Copyright (c) 2015, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.runtime;
    34
    35    /*!
    36     *  ======== ti.catalog.msp430.init ========
    37     *  MSP430 boot time initialization support
    38     *
    39     *  This package contains a `{@link Boot}` module that supplies minimal
    40     *  boot time initialization code.  This code optionally disables the
    41     *  watchdog timer (to ensure normal C initialization can complete before
    42     *  the watchdog resets the device) and configures the CPU clock.
    43     */
    44    package ti.catalog.msp430.init[1,0,0] {
    45        module Boot;
    46    }


module ti.catalog.msp430.peripherals.adc.ADC10

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ADC10 ========
    35     *  MSP430 10-bit Analog to Digital Converter
    36     */
    37    metaonly module ADC10 inherits IADC {
    38
    39        /*! ADC10 Start Conversion */
    40        enum ADC10SC_t {
    41            ADC10SC_OFF     = 0x000,        /*! No conversion. */
    42            ADC10SC         = 0x001         /*! Start ADC conversion manually. */
    43        };
    44
    45        /*! ADC10 Enable Conversion */
    46        enum ENC_t {
    47            ENC_OFF         = 0x000,        /*! Disable ADC. */
    48            ENC             = 0x002         /*! Enable ADC. */
    49        };
    50
    51        /*! ADC10 Interrupt Flag */
    52        enum ADC10IFG_t {
    53            ADC10IFG_OFF    = 0x000,        /*! Clear ADC interrupt flag. */
    54            ADC10IFG        = 0x004         /*! Set ADC interrupt flag. */
    55        };
    56
    57        /*! ADC10 Interrupt Enable */
    58        enum ADC10IE_t {
    59            ADC10IE_OFF = 0x000,            /*! Disable ADC interrupt. */
    60            ADC10IE     = 0x008             /*! Enable ADC interrupt. */
    61        };
    62
    63        /*! ADC10 On/Enable */
    64        enum ADC10ON_t {
    65            ADC10ON_OFF = 0x000,            /*! Switch Off ADC10. */
    66            ADC10ON     = 0x010             /*! Switch On ADC10. */
    67        };
    68
    69        /*! ADC10 Reference on */
    70        enum REFON_t {
    71            REFON_OFF   = 0x000,            /*! Disable ADC reference generator. */
    72            REFON       = 0x020             /*! Enable ADC reference generator. */
    73        };
    74
    75        /*! ADC10 Ref 0:1.5V / 1:2.5V */
    76        enum REF2_5V_t {
    77            REF2_5V_OFF = 0x000,            /*! Set reference voltage generator = 1.5V. */
    78            REF2_5V     = 0x040             /*! Set reference voltage generator = 2.5V. */
    79        };
    80
    81        /*! ADC10 Multiple SampleConversion */
    82        enum MSC_t {
    83            MSC_OFF = 0x000,                /*! Disable multiple sample and conversion. */
    84            MSC     = 0x080                 /*! Enable multiple sample and conversion. */
    85        };
    86
    87        /*! ADC10 Reference Burst Mode */
    88        enum REFBURST_t {
    89            REFBURST_OFF = 0x000,           /*! Reference buffer on continuously. */
    90            REFBURST     = 0x100            /*! Reference buffer on only during sample-and-conversion. */
    91        };
    92
    93        /*! ADC10 Enable output of Ref. */
    94        enum REFOUT_t {
    95            REFOUT_OFF      = 0x000,        /*! Reference output off. */
    96            REFOUT          = 0x200         /*! Reference output on. */
    97        };
    98
    99        /*! ADC10 Sampling Rate 0:200ksps / 1:50ksps */
   100        enum ADC10SR_t {
   101            ADC10SR_OFF = 0x000,            /*! Reference buffer supports up to ~200 ksps. */
   102            ADC10SR     = 0x400             /*! Reference buffer supports up to ~50 ksps. */
   103        };
   104
   105        /*! ADC10 Sample Hold Select 0 */
   106        enum ADC10SHT_t {
   107            ADC10SHT_0      = (0*0x800u),   /*! 4 x ADC10CLKs. */
   108            ADC10SHT_1      = (1*0x800u),   /*! 8 x ADC10CLKs. */
   109            ADC10SHT_2      = (2*0x800u),   /*! 16 x ADC10CLKs. */
   110            ADC10SHT_3      = 3*0x800u      /*! 64 x ADC10CLKs. */
   111        };
   112
   113        /*! ADC10 Reference Select 0 */
   114        enum SREF_t {
   115            SREF_0 = (0*0x2000u),           /*! VR+ = VCC and VR- = VSS. */
   116            SREF_1 = (1*0x2000u),           /*! VR+ = VREF+ and VR- = VSS. */
   117            SREF_2 = (2*0x2000u),           /*! VR+ = VeREF+ and VR- = VSS. */
   118            SREF_3 = (3*0x2000u),           /*! VR+ = Buffered VeREF+ and VR- = VSS. */
   119            SREF_4 = (4*0x2000u),           /*! VR+ = VCC and VR- = VREF-/ VeREF-. */
   120            SREF_5 = (5*0x2000u),           /*! VR+ = VREF+ and VR- = VREF-/ VeREF-. */
   121            SREF_6 = (6*0x2000u),           /*! VR+ = VeREF+ and VR- = VREF-/ VeREF-. */
   122            SREF_7 = 7*0x2000u              /*! VR+ = Buffered VeREF+ and VR- = VREF-/ VeREF-. */
   123        };
   124
   125        enum ADC10BUSY_t {
   126            ADC10BUSY_OFF = 0x0000,         /*! No operation is active. */
   127            ADC10BUSY     = 0x0001          /*! A sequence, sample, or conversion is active. */
   128        };
   129
   130        /*! Types of conversion */
   131        enum CONSEQ_t {
   132            CONSEQ_0 = (0*2u),              /*! Single channel single conversion. */
   133            CONSEQ_1 = (1*2u),              /*! Sequence of channels. */
   134            CONSEQ_2 = (2*2u),              /*! Repeat single channel. */
   135            CONSEQ_3 = 3*2u                 /*! Repeat sequence of channels. */
   136        };
   137
   138        /*! ADC10 Clock Source */
   139        enum ADC10SSEL_t {
   140            ADC10SSEL_0 = (0*8u),           /*! ADC10OSC. */
   141            ADC10SSEL_1 = (1*8u),           /*! ACLK. */
   142            ADC10SSEL_2 = (2*8u),           /*! MCLK.*/
   143            ADC10SSEL_3 = 3*8u              /*! SMCLK. */
   144        };
   145
   146        /*! ADC10 Clock Divider */
   147        enum ADC10DIV_t {
   148            ADC10DIV_0 = (0*0x20u),         /*! Divide by 1. */
   149            ADC10DIV_1 = (1*0x20u),         /*! Divide by 2. */
   150            ADC10DIV_2 = (2*0x20u),         /*! Divide by 3. */
   151            ADC10DIV_3 = (3*0x20u),         /*! Divide by 4. */
   152            ADC10DIV_4 = (4*0x20u),         /*! Divide by 5. */
   153            ADC10DIV_5 = (5*0x20u),         /*! Divide by 6. */
   154            ADC10DIV_6 = (6*0x20u),         /*! Divide by 7. */
   155            ADC10DIV_7 = 7*0x20u            /*! Divide by 8. */
   156        };
   157
   158        /*! ADC10 input signal inversion */
   159        enum ISSH_t {
   160            ISSH_OFF = 0x0000,              /*! Input signal not inverted. */
   161            ISSH     = 0x0100               /*! Input signal inverted. */
   162        };
   163
   164        /*! ADC10 output as 2's complement */
   165        enum ADC10DF_t {
   166            ADC10DF_OFF = 0x0000,           /*! ADC10 Data Format as binary. */
   167            ADC10DF     = 0x0200            /*! ADC10 Data Format as 2's complement */
   168        };
   169
   170        /*! ADC10 trigger */
   171        enum SHS_t {
   172            SHS_0 = (0*0x400u),             /*! ADC10SC. */
   173            SHS_1 = (1*0x400u),             /*! Timer_A OUT1. */
   174            SHS_2 = (2*0x400u),             /*! Timer_A OUT0. */
   175            SHS_3 = 3*0x400u                /*! Timer_A OUT2. */
   176        };
   177
   178        /*! ADC10 Channel Selection */
   179        enum INCH_t {
   180            INCH_0 = (0*0x1000u),           /*! ADC Channel 0. */
   181            INCH_1 = (1*0x1000u),           /*! ADC Channel 1. */
   182            INCH_2 = (2*0x1000u),           /*! ADC Channel 2. */
   183            INCH_3 = (3*0x1000u),           /*! ADC Channel 3. */
   184            INCH_4 = (4*0x1000u),           /*! ADC Channel 4. */
   185            INCH_5 = (5*0x1000u),           /*! ADC Channel 5. */
   186            INCH_6 = (6*0x1000u),           /*! ADC Channel 6. */
   187            INCH_7 = (7*0x1000u),           /*! ADC Channel 7. */
   188            INCH_8 = (8*0x1000u),           /*! ADC VeRef+. */
   189            INCH_9 = (9*0x1000u),           /*! ADC VeRef-. */
   190            INCH_10 = (10*0x1000u),         /*! Temperature Sensor. */
   191            INCH_11 = (11*0x1000u),         /*! ADC convert VCC. */
   192            INCH_12 = (12*0x1000u),         /*! ADC Channel 12. */
   193            INCH_13 = (13*0x1000u),         /*! ADC Channel 13. */
   194            INCH_14 = (14*0x1000u),         /*! ADC Channel 14. */
   195            INCH_15 = 15*0x1000u            /*! ADC Channel 15. */
   196        };
   197
   198        /*!
   199         *  ======== ADC10CT_t ========
   200         *  Data transfer modes
   201         *
   202         *  @see #ADC10DTC0
   203         */
   204        enum ADC10CT_t {
   205            ADC10CT_OFF = 0x000,            /*! Data is transferred is stopped after every conversion. */
   206            ADC10CT     = 0x004             /*! Data is transferred continuously after every conversion. */
   207        }
   208
   209        /*!
   210         *  ======== ADC10TB_t ========
   211         *  Block data transfer modes
   212         *
   213         *  @see #ADC10DTC0
   214         */
   215        enum ADC10TB_t {
   216            ADC10TB_OFF = 0x000,            /*! One-block transfer mode. */
   217            ADC10TB     = 0x008             /*! Two-block transfer mode. */
   218        }
   219        /* End of ADC10DTC0 Register Definitions */
   220
   221        /*!
   222         *  ======== ADC10CTL0_t ========
   223         *  ADC10 Control Register 0
   224         *
   225         *  @see #ADC10CTL0
   226         */
   227        struct ADC10CTL0_t {
   228            ADC10SC_t   ADC10SC;        /*! Start conversion. Software-controlled sample-and-conversion start.
   229                                          * ADC10SC and ENC may be set together with one instruction. ADC10SC is
   230                                          * reset automatically.
   231                                          *  0  No sample-and-conversion start
   232                                          *  1  Start sample-and-conversion */
   233            ENC_t       ENC;            /*! Enable conversion
   234                                          *  0  ADC10 disabled
   235                                          *  1  ADC10 enabled */
   236            ADC10IFG_t  ADC10IFG;       /*! ADC10 interrupt flag. This bit is set if ADC10MEM is loaded with a conversion
   237                                          * result. It is automatically reset when the interrupt request is accepted, or it may
   238                                          * be reset by software. When using the DTC this flag is set when a block of
   239                                          * transfers is completed.
   240                                          *  0  No interrupt pending
   241                                          *  1  Interrupt pending */
   242            ADC10IE_t   ADC10IE;        /*! ADC10 interrupt enable
   243                                          *  0  Interrupt disabled
   244                                          *  1  Interrupt enabled */
   245            ADC10ON_t   ADC10ON;        /*! ADC10 on
   246                                          *  0  ADC10 off
   247                                          *  1  ADC10 on */
   248            REFON_t     REFON;          /*! Reference generator on
   249                                          *  0  Reference off
   250                                          *  1  Reference on */
   251            REF2_5V_t   REF2_5V;        /*! Reference-generator voltage. REFON must also be set.
   252                                          *  0  1.5 V
   253                                          *  1  2.5 V */
   254            MSC_t       MSC;            /*! Multiple sample and conversion. Valid only for sequence or repeated modes.
   255                                          *  0  The sampling requires a rising edge of the SHI signal to trigger each
   256                                          *     sample-and-conversion.
   257                                          *  1  The first rising edge of the SHI signal triggers the sampling timer, but
   258                                          *     further sample-and-conversions are performed automatically as soon
   259                                          *     as the prior conversion is completed */
   260            REFBURST_t  REFBURST;       /*! Reference burst.
   261                                          *  0  Reference buffer on continuously
   262                                          *  1  Reference buffer on only during sample-and-conversion */
   263            REFOUT_t    REFOUT;         /*! Reference output
   264                                          *  0  Reference output off
   265                                          *  1  Reference output on, use internal reference
   266                                                voltage externally on pin VREF+ */
   267            ADC10SR_t   ADC10SR;        /*! ADC10 sampling rate. This bit selects the reference buffer drive capability for
   268                                          * the maximum sampling rate. Setting ADC10SR reduces the current
   269                                          * consumption of the reference buffer.
   270                                          *  0  Reference buffer supports up to ~200 ksps
   271                                          *  1  Reference buffer supports up to ~50 ksps */
   272            ADC10SHT_t  ADC10SHT;       /*! ADC10 sample-and-hold time
   273                                          *  00  4 x ADC10CLKs
   274                                          *  01  8 x ADC10CLKs
   275                                          *  10  16 x ADC10CLKs
   276                                          *  11  64 x ADC10CLKs */
   277            SREF_t      SREF;           /*! Select reference
   278                                          *  000  VR+ = VCC and VR- = VSS
   279                                          *  001  VR+ = VREF+ and VR- = VSS
   280                                          *  010  VR+ = VeREF+ and VR- = VSS
   281                                          *  011  VR+ = Buffered VeREF+ and VR- = VSS
   282                                          *  100  VR+ = VCC and VR- = VREF-/ VeREF-
   283                                          *  101  VR+ = VREF+ and VR- = VREF-/ VeREF-
   284                                          *  110  VR+ = VeREF+ and VR- = VREF-/ VeREF-
   285                                          *  111  VR+ = Buffered VeREF+ and VR- = VREF-/ VeREF- */
   286        }
   287
   288        /*!
   289         *  ======== ADC10CTL1_t ========
   290         *  ADC10 Control Register 1
   291         *
   292         *  @see #ADC10CTL1
   293         */
   294        struct ADC10CTL1_t {
   295            ADC10BUSY_t ADC10BUSY;      /*! ADC10 busy. This bit indicates an active sample or conversion operation
   296                                          *  0  No operation is active.
   297                                          *  1  A sequence, sample, or conversion is active. */
   298            CONSEQ_t    CONSEQ;         /*! Conversion sequence mode select
   299                                          *  00  Single-channel-single-conversion
   300                                          *  01  Sequence-of-channels
   301                                          *  10  Repeat-single-channel
   302                                          *  11  Repeat-sequence-of-channels */
   303            ADC10SSEL_t ADC10SSEL;      /*! ADC10 clock source select
   304                                          *  00  ADC10OSC
   305                                          *  01  ACLK
   306                                          *  10  MCLK
   307                                          *  11  SMCLK */
   308            ADC10DIV_t  ADC10DIV;       /*! ADC10 clock divider
   309                                          *  000  /1
   310                                          *  001  /2
   311                                          *  010  /3
   312                                          *  011  /4
   313                                          *  100  /5
   314                                          *  101  /6
   315                                          *  110  /7
   316                                          *  111  /8 */
   317            ISSH_t      ISSH;           /*! Invert signal sample-and-hold
   318                                          *  0  The sample-input signal is not inverted.
   319                                          *  1  The sample-input signal is inverted. */
   320            ADC10DF_t   ADC10DF;        /*! ADC10 data format
   321                                          *  0  Straight binary
   322                                          *  1  2s complement */
   323            SHS_t       SHS;            /*! Sample-and-hold source select
   324                                          *  00  ADC10SC bit
   325                                          *  01  Timer_A.OUT1
   326                                          *  10  Timer_A.OUT0
   327                                          *  11  Timer_A.OUT2 (Timer_A.OUT1 on MSP430x20x2 devices) */
   328            INCH_t      INCH;           /*! Input channel select. These bits select the channel for a single-conversion or
   329                                          * the highest channel for a sequence of conversions.
   330                                          *  0000  A0
   331                                          *  0001  A1
   332                                          *  0010  A2
   333                                          *  0011  A3
   334                                          *  0100  A4
   335                                          *  0101  A5
   336                                          *  0110  A6
   337                                          *  0111  A7
   338                                          *  1000  VeREF+
   339                                          *  1001  VREF-/VeREF-
   340                                          *  1010  Temperature sensor
   341                                          *  1011  (VCC ??? VSS) /
   342                                          *  1100  A12
   343                                          *  1101  A13
   344                                          *  1110  A14
   345                                          *  1111  A15 */
   346        }
   347
   348        /*!
   349         *  ======== ADC10DTC0_t ========
   350         *  Data Transfer Control Register 0
   351         *
   352         *  @see #ADC10DTC0
   353         */
   354        struct ADC10DTC0_t {
   355            ADC10TB_t   ADC10TB;        /*! ADC10 two-block mode
   356                                          *  0  One-block transfer mode
   357                                          *  1  Two-block transfer mode */
   358            ADC10CT_t   ADC10CT;        /*! ADC10 continuous transfer
   359                                          *  0  Data transfer stops when one block (one-block mode) or two blocks
   360                                          *     (two-block mode) have completed.
   361                                          *  1  Data is transferred continuously. DTC operation is stopped only if
   362                                          *     ADC10CT cleared, or ADC10SA is written to. */
   363        }
   364
   365    instance:
   366        /*! Control Register 0 */
   367        config ADC10CTL0_t  ADC10CTL0 = {
   368            ADC10SC :   ADC10SC_OFF,
   369            ENC     :   ENC_OFF,
   370            ADC10IFG:   ADC10IFG_OFF,
   371            ADC10IE :   ADC10IE_OFF,
   372            ADC10ON :   ADC10ON_OFF,
   373            REFON   :   REFON_OFF,
   374            REF2_5V :   REF2_5V_OFF,
   375            MSC     :   MSC_OFF,
   376            REFBURST:   REFBURST_OFF,
   377            REFOUT  :   REFOUT_OFF,
   378            ADC10SR :   ADC10SR_OFF,
   379            ADC10SHT:   ADC10SHT_0,
   380            SREF    :   SREF_0
   381        };
   382
   383        /*! Control Register 1 */
   384        config ADC10CTL1_t  ADC10CTL1 = {
   385            ADC10BUSY   :   ADC10BUSY_OFF,
   386            CONSEQ      :   CONSEQ_0,
   387            ADC10SSEL   :   ADC10SSEL_0,
   388            ADC10DIV    :   ADC10DIV_0,
   389            ISSH        :   ISSH_OFF,
   390            ADC10DF     :   ADC10DF_OFF,
   391            SHS         :   SHS_0,
   392            INCH        :   INCH_0
   393        };
   394
   395        /*!
   396         *  Analog (Input) Enable Control Register 0
   397         *
   398         *  Bit n enables the corresponding pin for analog
   399         *  input. Bit 0 corresponds to A0, bit 1 corresponds to A1, ...
   400         */
   401        config Bits16 ADC10AE0 = 0;
   402
   403        /*!
   404         *  Analog (Input) Enable Control Register 1
   405         *
   406         *  Bits 0, 1, 2, and 3 are reserved.
   407         *
   408         *  Starting with bit 4, bit n enables pin n+8 for analog
   409         *  input: Bit 4 corresponds to A12, bit 5 corresponds to A13, ...
   410         */
   411        config Bits16 ADC10AE1 = 0;
   412
   413        /*! Data Transfer Control Register 0 */
   414        config ADC10DTC0_t ADC10DTC0 = {
   415            ADC10TB : ADC10TB_OFF,
   416            ADC10CT : ADC10CT_OFF
   417        };
   418
   419        /*!
   420         *  Data Transfer Control Register 1
   421         *
   422         *  This register defines the number of transfers in each block: 0
   423         *  implies DTC is disabled, 1 through 0xff are valid transfer counts.
   424         */
   425        config Bits8  ADC10DTC1 = 0;
   426
   427        /*! Data Transfer Start Address */
   428        config Bits16 *ADC10SA = 0x200;
   429
   430        /*! ADC10 has 1 interrupt enable */
   431        config regIntVect_t interruptSource[1];
   432
   433        /*! Determine if each Register needs to be forced set or not */
   434        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   435        [
   436            { register : "ADC10CTL0" , regForceSet : false },
   437            { register : "ADC10CTL1" , regForceSet : false },
   438            { register : "ADC10AE0"  , regForceSet : false },
   439            { register : "ADC10AE1"  , regForceSet : false },
   440            { register : "ADC10DTC0" , regForceSet : false },
   441            { register : "ADC10DTC1" , regForceSet : false },
   442            { register : "ADC10SA"   , regForceSet : true }
   443        ];
   444    }


module ti.catalog.msp430.peripherals.adc.ADC10_B

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ADC10_B ========
    35     *  MSP430 10-bit Analog to Digital Converter
    36     */
    37    metaonly module ADC10_B inherits IADC {
    38
    39    instance:
    40        /*!
    41         *  ======== baseAddr ========
    42         *  Address of the peripheral's control register.
    43         *
    44         *  A peripheral's registers are commonly accessed through a structure
    45         *  that defines the offsets of a particular register from the lowest
    46         *  address mapped to a peripheral. That lowest address is specified by
    47         *  this parameter.
    48         */
    49        config UInt baseAddr;
    50
    51        /*! Interrupt enables */
    52        config regIntVect_t interruptSource[4];
    53
    54        /*! Determine if each Register needs to be forced set or not */
    55        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    56        [
    57        ];
    58    }


module ti.catalog.msp430.peripherals.adc.ADC12

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ADC12 ========
    35     *  MSP430 12-bit Analog to Digital Converter
    36     */
    37    metaonly module ADC12 inherits IADC {
    38
    39        /*! SHT1 Bits */
    40        enum ADC12SHT1_t {
    41            SHT1_0  = (0*0x1000u), /*! 4 ADC12CLK cycles */
    42            SHT1_1  = (1*0x1000u), /*! 8 ADC12CLK cycles */
    43            SHT1_2  = (2*0x1000u), /*! 16 ADC12CLK cycles */
    44            SHT1_3  = (3*0x1000u), /*! 32 ADC12CLK cycles */
    45            SHT1_4  = (4*0x1000u), /*! 64 ADC12CLK cycles */
    46            SHT1_5  = (5*0x1000u), /*! 96 ADC12CLK cycles */
    47            SHT1_6  = (6*0x1000u), /*! 128 ADC12CLK cycles */
    48            SHT1_7  = (7*0x1000u), /*! 192 ADC12CLK cycles */
    49            SHT1_8  = (8*0x1000u), /*! 256 ADC12CLK cycles */
    50            SHT1_9  = (9*0x1000u), /*! 384 ADC12CLK cycles */
    51            SHT1_10 = (10*0x1000u), /*! 512  ADC12CLK cycles */
    52            SHT1_11 = (11*0x1000u), /*! 768 ADC12CLK cycles */
    53            SHT1_12 = 12*0x1000u    /*! 1024 ADC12CLK cycles */
    54        };
    55
    56        /*! SHT0 Bits */
    57        enum ADC12SHT0_t {
    58            SHT0_0  = (0*0x1000u), /*! 4 ADC12CLK cycles */
    59            SHT0_1  = (1*0x1000u), /*! 8 ADC12CLK cycles */
    60            SHT0_2  = (2*0x1000u), /*! 16 ADC12CLK cycles */
    61            SHT0_3  = (3*0x1000u), /*! 32 ADC12CLK cycles */
    62            SHT0_4  = (4*0x1000u), /*! 64 ADC12CLK cycles */
    63            SHT0_5  = (5*0x1000u), /*! 96 ADC12CLK cycles */
    64            SHT0_6  = (6*0x1000u), /*! 128 ADC12CLK cycles */
    65            SHT0_7  = (7*0x1000u), /*! 192 ADC12CLK cycles */
    66            SHT0_8  = (8*0x1000u), /*! 256 ADC12CLK cycles */
    67            SHT0_9  = (9*0x1000u), /*! 384 ADC12CLK cycles */
    68            SHT0_10 = (10*0x1000u), /*! 512  ADC12CLK cycles */
    69            SHT0_11 = (11*0x1000u), /*! 768 ADC12CLK cycles */
    70            SHT0_12 = 12*0x1000u    /*! 1024 ADC12CLK cycles */
    71        };
    72
    73        /*! MSC Bit */
    74        enum MSC_t {
    75            MSC_OFF = 0x000,       /*! The sampling timer requires a rising edge of the SHI
    76                                    *  signal to trigger each sample-and-conversion */
    77            MSC     = 0x080        /*! The first rising edge of the SHI signal triggers
    78                                    *  the sampling timer, but further sample-and-conversions
    79                                    *  are performed automatically as soon as the prior conversion
    80                                    *  is completed */
    81        };
    82
    83        /*! REF2_5V Bit */
    84        enum REF2_5V_t {
    85            REF2_5V_OFF = 0x000,   /*! 1.5V */
    86            REF2_5V     = 0x040    /*! 2.5V */
    87        };
    88
    89        /*! REFON Bit */
    90        enum REFON_t {
    91            REFON_OFF   = 0x000,   /*! Reference off */
    92            REFON       = 0x020    /*! Reference on */
    93        };
    94
    95        /*! ADC12ON Bit */
    96        enum ADC12ON_t {
    97            ADC12ON_OFF = 0x000,   /*! ADC12 off */
    98            ADC12ON     = 0x010    /*! ADC12 on */
    99        };
   100
   101        /*! ADC12OVIE Bit */
   102        enum ADC12OVIE_t {
   103            ADC12OVIE_OFF = 0x000,   /*! Overflow interrupt disabled */
   104            ADC12OVIE     = 0x008    /*! Overflow interrupt enabled */
   105        };
   106
   107        /*! ADC12TOVIE Bit */
   108        enum ADC12TOVIE_t {
   109            ADC12TOVIE_OFF = 0x000,   /*! Conversion time overflow interrupt disabled */
   110            ADC12TOVIE     = 0x004    /*! Conversion time overflow interrupt disabled */
   111        };
   112
   113        /*! ENC Bit */
   114        enum ENC_t {
   115            ENC_OFF = 0x000,  /*! ADC12 disabled */
   116            ENC     = 0x002   /*! ADC12 enabled */
   117        };
   118
   119        /*! ADC12SC Bit */
   120        enum ADC12SC_t {
   121            ADC12SC_OFF = 0x000,  /*! No sample-and-conversion-start */
   122            ADC12SC     = 0x001   /*! Start sample-and-conversion */
   123        };
   124
   125        /*! CSTARTADD Bits */
   126        enum CSTARTADD_t {
   127            CSTARTADD_0  = (0*0x1000u), /*! ADC12MEM0 */
   128            CSTARTADD_1  = (1*0x1000u), /*! ADC12MEM1 */
   129            CSTARTADD_2  = (2*0x1000u), /*! ADC12MEM2 */
   130            CSTARTADD_3  = (3*0x1000u), /*! ADC12MEM3 */
   131            CSTARTADD_4  = (4*0x1000u), /*! ADC12MEM4 */
   132            CSTARTADD_5  = (5*0x1000u), /*! ADC12MEM5 */
   133            CSTARTADD_6  = (6*0x1000u), /*! ADC12MEM6 */
   134            CSTARTADD_7  = (7*0x1000u), /*! ADC12MEM7 */
   135            CSTARTADD_8  = (8*0x1000u), /*! ADC12MEM8 */
   136            CSTARTADD_9  = (9*0x1000u), /*! ADC12MEM9 */
   137            CSTARTADD_10 = (10*0x1000u), /*! ADC12MEM10 */
   138            CSTARTADD_11 = (11*0x1000u), /*! ADC12MEM11 */
   139            CSTARTADD_12 = (12*0x1000u), /*! ADC12MEM12 */
   140            CSTARTADD_13 = (13*0x1000u), /*! ADC12MEM13 */
   141            CSTARTADD_14 = (14*0x1000u), /*! ADC12MEM14 */
   142            CSTARTADD_15 = 15*0x1000u    /*! ADC12MEM15 */
   143        };
   144
   145        /*! SHS Bits */
   146        enum SHS_t {
   147            SHS_0 = (0*0x400u),    /*! ADC12SC bit */
   148            SHS_1 = (1*0x400u),    /*! Timer_A.OUT1 */
   149            SHS_2 = (2*0x400u),    /*! Timer_B.OUT0 */
   150            SHS_3 = 3*0x400u       /*! Timer_B.OUT1 */
   151        };
   152
   153        /*! SHP Bits */
   154        enum SHP_t {
   155            SHP_OFF = 0x0000,  /*! SAMPCON signal is sourced from the sample-input signal */
   156            SHP     = 0x0200   /*! SAMPCON signal is sourced from the sampling timer. */
   157        };
   158
   159        /*! ISSH Bits */
   160        enum ISSH_t {
   161            ISSH_OFF = 0x0000,  /*! The sample-input signal is not inverted */
   162            ISSH     = 0x0100   /*! The sample-input signal is inverted */
   163        };
   164
   165
   166        /*! ADC12DIV Bits */
   167        enum ADC12DIV_t {
   168            ADC12DIV_0 = (0*0x20u),    /*! Divide by 1 */
   169            ADC12DIV_1 = (1*0x20u),    /*! Divide by 2 */
   170            ADC12DIV_2 = (2*0x20u),    /*! Divide by 3 */
   171            ADC12DIV_3 = (3*0x20u),    /*! Divide by 4 */
   172            ADC12DIV_4 = (4*0x20u),    /*! Divide by 5 */
   173            ADC12DIV_5 = (5*0x20u),    /*! Divide by 6 */
   174            ADC12DIV_6 = (6*0x20u),    /*! Divide by 7 */
   175            ADC12DIV_7 = 7*0x20u       /*! Divide by 8 */
   176        };
   177
   178        /*! ADC12SSEL Bits */
   179        enum ADC12SSEL_t {
   180            ADC12SSEL_0 = (0*8u),   /*! ADC12OSC */
   181            ADC12SSEL_1 = (1*8u),   /*! ACLK */
   182            ADC12SSEL_2 = (2*8u),   /*! MCLK */
   183            ADC12SSEL_3 = 3*8u      /*! SMCLK */
   184        };
   185
   186        /*! CONSEQ Bits */
   187        enum CONSEQ_t {
   188            CONSEQ_0 = (0*2u),       /*! Single channel single conversion */
   189            CONSEQ_1 = (1*2u),       /*! Sequence of channels */
   190            CONSEQ_2 = (2*2u),       /*! Repeat single channel */
   191            CONSEQ_3 = 3*2u          /*! Repeat sequence of channels */
   192        };
   193
   194        /*! ADC12 Busy Bit */
   195        enum ADC12BUSY_t {
   196            ADC12BUSY_OFF = 0x0000,
   197            ADC12BUSY     = 0x0001
   198        };
   199
   200        /*! EOS Bit */
   201        enum EOS_t {
   202            EOS_OFF = 0x0000,  /*! Not end of sequence */
   203            EOS     = 0x0080   /*! End of sequence */
   204        };
   205
   206        /*! SREF Bits */
   207        enum SREF_t {
   208            SREF_0 = (0*0x10u),    /*! VR+ = AVcc and VR-- = AVss */
   209            SREF_1 = (1*0x10u),    /*! VR+ = VREF+ and VR-- = AVss */
   210            SREF_2 = (2*0x10u),    /*! VR+ = VeREF+ and VR-- = AVss */
   211            SREF_3 = (3*0x10u),    /*! VR+ = VeREF+ and VR-- = AVss */
   212            SREF_4 = (4*0x10u),    /*! VR+ = AVcc and VR-- = VREF--/ VeREF-- */
   213            SREF_5 = (5*0x10u),    /*! VR+ = VREF+ and VR-- = VREF--/ VeREF-- */
   214            SREF_6 = (6*0x10u),    /*! VR+ = VeREF+ and VR-- = VREF--/ VeREF-- */
   215            SREF_7 = 7*0x10u       /*! VR+ = VeREF+ and VR-- = VREF--/ VeREF-- */
   216        };
   217
   218        /*! ADC12 Interrupt Enable Bit 15 */
   219        enum ADC12IE15_t {
   220            ADC12IE15_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG15 bit */
   221            ADC12IE15     = 0x8000   /*! Enable the interrupt request for the ADC12IFG15 bit */
   222        };
   223
   224        /*! ADC12 Interrupt Enable Bit 14 */
   225        enum ADC12IE14_t {
   226            ADC12IE14_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG14 bit */
   227            ADC12IE14     = 0x4000   /*! Enable the interrupt request for the ADC12IFG14 bit */
   228        };
   229
   230        /*! ADC12 Interrupt Enable Bit 13 */
   231        enum ADC12IE13_t {
   232            ADC12IE13_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG13 bit */
   233            ADC12IE13     = 0x2000   /*! Enable the interrupt request for the ADC12IFG13 bit */
   234        };
   235
   236        /*! ADC12 Interrupt Enable Bit 12 */
   237        enum ADC12IE12_t {
   238            ADC12IE12_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG12 bit */
   239            ADC12IE12     = 0x1000   /*! Enable the interrupt request for the ADC12IFG12 bit */
   240        };
   241
   242        /*! ADC12 Interrupt Enable Bit 11 */
   243        enum ADC12IE11_t {
   244            ADC12IE11_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG11 bit */
   245            ADC12IE11     = 0x0800   /*! Enable the interrupt request for the ADC12IFG11 bit */
   246        };
   247
   248        /*! ADC12 Interrupt Enable Bit 10 */
   249        enum ADC12IE10_t {
   250            ADC12IE10_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG10 bit */
   251            ADC12IE10     = 0x0400   /*! Enable the interrupt request for the ADC12IFG10 bit */
   252        };
   253
   254        /*! ADC12 Interrupt Enable Bit 9 */
   255        enum ADC12IE9_t {
   256            ADC12IE9_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG9 bit */
   257            ADC12IE9     = 0x0200   /*! Enable the interrupt request for the ADC12IFG9 bit */
   258        };
   259
   260        /*! ADC12 Interrupt Enable Bit 8 */
   261        enum ADC12IE8_t {
   262            ADC12IE8_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG8 bit */
   263            ADC12IE8     = 0x0100   /*! Enable the interrupt request for the ADC12IFG8 bit */
   264        };
   265
   266        /*! ADC12 Interrupt Enable Bit 7 */
   267        enum ADC12IE7_t {
   268            ADC12IE7_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG7 bit */
   269            ADC12IE7     = 0x0080   /*! Enable the interrupt request for the ADC12IFG7 bit */
   270        };
   271
   272        /*! ADC12 Interrupt Enable Bit 6 */
   273        enum ADC12IE6_t {
   274            ADC12IE6_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG6 bit */
   275            ADC12IE6     = 0x0040   /*! Enable the interrupt request for the ADC12IFG6 bit */
   276        };
   277
   278        /*! ADC12 Interrupt Enable Bit 5 */
   279        enum ADC12IE5_t {
   280            ADC12IE5_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG5 bit */
   281            ADC12IE5     = 0x0020   /*! Enable the interrupt request for the ADC12IFG5 bit */
   282        };
   283
   284        /*! ADC12 Interrupt Enable Bit 4 */
   285        enum ADC12IE4_t {
   286            ADC12IE4_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG4 bit */
   287            ADC12IE4     = 0x0010   /*! Enable the interrupt request for the ADC12IFG4 bit */
   288        };
   289
   290        /*! ADC12 Interrupt Enable Bit 3 */
   291        enum ADC12IE3_t {
   292            ADC12IE3_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG3 bit */
   293            ADC12IE3     = 0x0008   /*! Enable the interrupt request for the ADC12IFG3 bit */
   294        };
   295
   296        /*! ADC12 Interrupt Enable Bit 2 */
   297        enum ADC12IE2_t {
   298            ADC12IE2_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG2 bit */
   299            ADC12IE2     = 0x0004   /*! Enable the interrupt request for the ADC12IFG2 bit */
   300        };
   301
   302        /*! ADC12 Interrupt Enable Bit 1 */
   303        enum ADC12IE1_t {
   304            ADC12IE1_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG1 bit */
   305            ADC12IE1     = 0x0002   /*! Enable the interrupt request for the ADC12IFG1 bit */
   306        };
   307
   308        /*! ADC12 Interrupt Enable Bit 0 */
   309        enum ADC12IE0_t {
   310            ADC12IE0_OFF = 0x0000,  /*! Disable the interrupt request for the ADC12IFG0 bit */
   311            ADC12IE0     = 0x0001   /*! Enable the interrupt request for the ADC12IFG0 bit */
   312        };
   313
   314        /*! INCH Bits */
   315        enum INCH_t {
   316            INCH_0 = (0),       /*! A0 */
   317            INCH_1 = (1),       /*! A1 */
   318            INCH_2 = (2),       /*! A2 */
   319            INCH_3 = (3),       /*! A3 */
   320            INCH_4 = (4),       /*! A4 */
   321            INCH_5 = (5),       /*! A5 */
   322            INCH_6 = (6),       /*! A6 */
   323            INCH_7 = (7),       /*! A7 */
   324            INCH_8 = (8),       /*! VeREF+ */
   325            INCH_9 = (9),       /*! VREF--/VeREF- */
   326            INCH_10 = (10),     /*! Temperature diode */
   327            INCH_11 = (11),     /*! (AVcc - AVss) / 2 */
   328            INCH_12 = (12),     /*! GND */
   329            INCH_13 = (13),     /*! GND */
   330            INCH_14 = (14),     /*! GND */
   331            INCH_15 = 15        /*! GND */
   332        };
   333
   334
   335        /*! ADC12IV Definitions */
   336        enum ADC12IV_t {
   337            ADC12IV_NONE        =  (0x0000),  /*! No Interrupt pending */
   338            ADC12IV_ADC12OVIFG  =  (0x0002),  /*! ADC12OVIFG */
   339            ADC12IV_ADC12TOVIFG =  (0x0004),  /*! ADC12TOVIFG */
   340            ADC12IV_ADC12IFG0   =  (0x0006),  /*! ADC12IFG0 */
   341            ADC12IV_ADC12IFG1   =  (0x0008),  /*! ADC12IFG1 */
   342            ADC12IV_ADC12IFG2   =  (0x000A),  /*! ADC12IFG2 */
   343            ADC12IV_ADC12IFG3   =  (0x000C),  /*! ADC12IFG3 */
   344            ADC12IV_ADC12IFG4   =  (0x000E),  /*! ADC12IFG4 */
   345            ADC12IV_ADC12IFG5   =  (0x0010),  /*! ADC12IFG5 */
   346            ADC12IV_ADC12IFG6   =  (0x0012),  /*! ADC12IFG6 */
   347            ADC12IV_ADC12IFG7   =  (0x0014),  /*! ADC12IFG7 */
   348            ADC12IV_ADC12IFG8   =  (0x0016),  /*! ADC12IFG8 */
   349            ADC12IV_ADC12IFG9   =  (0x0018),  /*! ADC12IFG9 */
   350            ADC12IV_ADC12IFG10  =  (0x001A),  /*! ADC12IFG10 */
   351            ADC12IV_ADC12IFG11  =  (0x001C),  /*! ADC12IFG11 */
   352            ADC12IV_ADC12IFG12  =  (0x001E),  /*! ADC12IFG12 */
   353            ADC12IV_ADC12IFG13  =  (0x0020),  /*! ADC12IFG13 */
   354            ADC12IV_ADC12IFG14  =  (0x0022),  /*! ADC12IFG14 */
   355            ADC12IV_ADC12IFG15  =  0x0024     /*! ADC12IFG15 */
   356        };
   357
   358        /*! ADC12 Control Register 0 */
   359        struct ADC12CTL0_t {
   360            ADC12SHT1_t ADC12SHT1;  /*! Sample-and-hold time. These bits define the number
   361                                     * of ADC12CLK cycles in the sampling period for registers
   362                                     * ADC12MEM8 to ADC12MEM15. */
   363            ADC12SHT0_t ADC12SHT0;  /*! Sample-and-hold time. These bits define the number
   364                                     * of ADC12CLK cycles in the sampling period for registers
   365                                     * ADC12MEM0 to ADC12MEM7. */
   366            MSC_t MSC;              /*! Multiple sample and conversion. Valid only for sequence
   367                                     * or repeated modes.
   368                                     * 0 The sampling timer requires a rising edge of the SHI signal
   369                                     *   to trigger each sample-and-conversion.
   370                                     * 1 The first rising edge of the SHI signal triggers the sampling
   371                                     *   timer, but further sample-and-conversions are performed
   372                                     *   automatically as soon as the prior conversion is completed. */
   373            REF2_5V_t REF2_5V;      /*! Reference generator voltage. REFON must also be set.
   374                                     * 0 1.5V
   375                                     * 1 2.5V */
   376            REFON_t REFON;          /*! Reference generator on
   377                                     * 0 Reference off
   378                                     * 1 Reference on */
   379            ADC12ON_t ADC12ON;      /*! ADC12 on
   380                                     * 0 ADC12 off
   381                                     * 1 ADC12 on */
   382            ADC12OVIE_t ADC12OVIE;  /*! ADC12MEMx overflow-interrupt enable. The GIE bit must also be
   383                                     * set to enable the interrupt.
   384                                     * 0 Overflow interrupt disabled
   385                                     * 1 Overflow interrupt enabled */
   386            ADC12TOVIE_t ADC12TOVIE;  /*! ADC12 conversion-time-overflow interrupt enable.
   387                                       * The GIE bit must also be set to enable the interrupt.
   388                                       * 0 Conversion time overflow interrupt disabled
   389                                       * 1 Conversion time overflow interrupt enabled */
   390            ENC_t ENC;               /*! Enable conversion
   391                                      * 0 ADC12 disabled
   392                                      * 1 ADC12 enabled */
   393            ADC12SC_t ADC12SC;       /*! Start conversion. Software-controlled sample-and-conversion start.
   394                                      * ADC12SC and ENC may be set together with one instruction. ADC12SC is
   395                                      * reset automatically.
   396                                      * 0 No sample-and-conversion-start
   397                                      * 1 Start sample-and-conversion */
   398        };
   399
   400        /*! ADC12 Control Register 1 */
   401        struct ADC12CTL1_t {
   402            CSTARTADD_t CSTARTADD;  /*! Conversion start address. These bits select which ADC12
   403                                     * conversion-memory register is used for a single conversion or for the first
   404                                     * conversion in a sequence. The value of CSTARTADDx is 0 to 0Fh,
   405                                     * corresponding to ADC12MEM0 to ADC12MEM15. */
   406            SHS_t SHS;              /*! Sample-and-hold source select
   407                                     * 00 ADC12SC bit
   408                                     * 01 Timer_A.OUT1
   409                                     * 10 Timer_B.OUT0
   410                                     * 11 Timer_B.OUT1 */
   411            SHP_t SHP;              /*! Sample-and-hold pulse-mode select. This bit selects the source of the
   412                                     * sampling signal (SAMPCON) to be either the output of the sampling timer or
   413                                     * the sample-input signal directly.
   414                                     * 0 SAMPCON signal is sourced from the sample-input signal.
   415                                     * 1 SAMPCON signal is sourced from the sampling timer. */
   416            ISSH_t ISSH;            /*! Invert signal sample-and-hold
   417                                     * 0 The sample-input signal is not inverted.
   418                                     * 1 The sample-input signal is inverted. */
   419            ADC12DIV_t ADC12DIV;    /*! ADC12 clock divider
   420                                     * 000 /1
   421                                     * 001 /2
   422                                     * 010 /3
   423                                     * 011 /4
   424                                     * 100 /5
   425                                     * 101 /6
   426                                     * 110 /7
   427                                     * 111 /8 */
   428            ADC12SSEL_t ADC12SSEL;  /*! ADC12 clock source select
   429                                     * 00 ADC12OSC
   430                                     * 01 ACLK
   431                                     * 10 MCLK
   432                                     * 11 SMCLK */
   433            CONSEQ_t CONSEQ;        /*! Conversion sequence mode select
   434                                     * 00 Single-channel, single-conversion
   435                                     * 01 Sequence-of-channels
   436                                     * 10 Repeat-single-channel
   437                                     * 11 Repeat-sequence-of-channels */
   438            ADC12BUSY_t ADC12BUSY;  /*! ADC12 busy. This bit indicates an active sample or conversion operation.
   439                                     * 0 No operation is active.
   440                                     * 1 A sequence, sample, or conversion is active. */
   441        };
   442
   443        /*! ADC12 Conversion Memory Control Registers */
   444        struct ADC12MCTL_t {
   445            EOS_t EOS;              /*! End of sequence. Indicates the last conversion in a sequence.
   446                                     * 0 Not end of sequence
   447                                     * 1 End of sequence */
   448            SREF_t SREF;            /*! Select reference
   449                                     * 000 VR+ = AVCC and VR-- = AVSS
   450                                     * 001 VR+ = VREF+ and VR-- = AVSS
   451                                     * 010 VR+ = VeREF+ and VR-- = AVSS
   452                                     * 011 VR+ = VeREF+ and VR-- = AVSS
   453                                     * 100 VR+ = AVCC and VR-- = VREF--/ VeREF--
   454                                     * 101 VR+ = VREF+ and VR-- = VREF--/ VeREF--
   455                                     * 110 VR+ = VeREF+ and VR-- = VREF--/ VeREF--
   456                                     * 111 VR+ = VeREF+ and VR-- = VREF--/ VeREF-- */
   457            INCH_t INCH;            /*! Input channel select
   458                                     * 0000 A0
   459                                     * 0001 A1
   460                                     * 0010 A2
   461                                     * 0011 A3
   462                                     * 0100 A4
   463                                     * 0101 A5
   464                                     * 0110 A6
   465                                     * 0111 A7
   466                                     * 1000 VeREF+
   467                                     * 1001 VREF--/VeREF--
   468                                     * 1010 Temperature diode
   469                                     * 1011 (AVCC ??? AVSS) /
   470                                     * 1100 GND
   471                                     * 1101 GND
   472                                     * 1110 GND
   473                                     * 1111 GND */
   474        };
   475
   476        /*! ADC12 Interrupt Enable Register */
   477        struct ADC12IE_t {
   478            ADC12IE15_t ADC12IE15;  /*! Enable or disable the interrupt request for the ADC12IFG15 bit.
   479                                     * 0 Interrupt disabled
   480                                     * 1 Interrupt enabled */
   481            ADC12IE14_t ADC12IE14;  /*! Enable or disable the interrupt request for the ADC12IFG14 bit.
   482                                     * 0 Interrupt disabled
   483                                     * 1 Interrupt enabled */
   484            ADC12IE13_t ADC12IE13;  /*! Enable or disable the interrupt request for the ADC12IFG13 bit.
   485                                     * 0 Interrupt disabled
   486                                     * 1 Interrupt enabled */
   487            ADC12IE12_t ADC12IE12;  /*! Enable or disable the interrupt request for the ADC12IFG12 bit.
   488                                     * 0 Interrupt disabled
   489                                     * 1 Interrupt enabled */
   490            ADC12IE11_t ADC12IE11;  /*! Enable or disable the interrupt request for the ADC12IFG11 bit.
   491                                     * 0 Interrupt disabled
   492                                     * 1 Interrupt enabled */
   493            ADC12IE10_t ADC12IE10;  /*! Enable or disable the interrupt request for the ADC12IFG10 bit.
   494                                     * 0 Interrupt disabled
   495                                     * 1 Interrupt enabled */
   496            ADC12IE9_t ADC12IE9;  /*! Enable or disable the interrupt request for the ADC12IFG9 bit.
   497                                   * 0 Interrupt disabled
   498                                   * 1 Interrupt enabled */
   499            ADC12IE8_t ADC12IE8;  /*! Enable or disable the interrupt request for the ADC12IFG8 bit.
   500                                   * 0 Interrupt disabled
   501                                   * 1 Interrupt enabled */
   502            ADC12IE7_t ADC12IE7;  /*! Enable or disable the interrupt request for the ADC12IFG7 bit.
   503                                   * 0 Interrupt disabled
   504                                   * 1 Interrupt enabled */
   505            ADC12IE6_t ADC12IE6;  /*! Enable or disable the interrupt request for the ADC12IFG6 bit.
   506                                   * 0 Interrupt disabled
   507                                   * 1 Interrupt enabled */
   508            ADC12IE5_t ADC12IE5;  /*! Enable or disable the interrupt request for the ADC12IFG5 bit.
   509                                   * 0 Interrupt disabled
   510                                   * 1 Interrupt enabled */
   511            ADC12IE4_t ADC12IE4;  /*! Enable or disable the interrupt request for the ADC12IFG4 bit.
   512                                   * 0 Interrupt disabled
   513                                   * 1 Interrupt enabled */
   514            ADC12IE3_t ADC12IE3;  /*! Enable or disable the interrupt request for the ADC12IFG3 bit.
   515                                   * 0 Interrupt disabled
   516                                   * 1 Interrupt enabled */
   517            ADC12IE2_t ADC12IE2;  /*! Enable or disable the interrupt request for the ADC12IFG2 bit.
   518                                   * 0 Interrupt disabled
   519                                   * 1 Interrupt enabled */
   520            ADC12IE1_t ADC12IE1;  /*! Enable or disable the interrupt request for the ADC12IFG1 bit.
   521                                   * 0 Interrupt disabled
   522                                   * 1 Interrupt enabled */
   523            ADC12IE0_t ADC12IE0;  /*! Enable or disable the interrupt request for the ADC12IFG0 bit.
   524                                   * 0 Interrupt disabled
   525                                   * 1 Interrupt enabled */
   526        };
   527
   528    instance:
   529        /*! ADC12CTL0 Register  */
   530        config ADC12CTL0_t  ADC12CTL0 = {
   531            ADC12SHT1 : SHT1_0,
   532            ADC12SHT0 : SHT0_0,
   533            MSC       : MSC_OFF,
   534            REF2_5V   : REF2_5V_OFF,
   535            REFON     : REFON_OFF,
   536            ADC12ON   : ADC12ON_OFF,
   537            ADC12OVIE : ADC12OVIE_OFF,
   538            ADC12TOVIE : ADC12TOVIE_OFF,
   539            ENC        : ENC_OFF,
   540            ADC12SC    : ADC12SC_OFF
   541        };
   542
   543        /*! ADC12CTL1 Register */
   544        config ADC12CTL1_t  ADC12CTL1 = {
   545            CSTARTADD   : CSTARTADD_0,
   546            SHS         : SHS_0,
   547            SHP         : SHP_OFF,
   548            ISSH        : ISSH_OFF,
   549            ADC12DIV    : ADC12DIV_0,
   550            ADC12SSEL   : ADC12SSEL_0,
   551            CONSEQ      : CONSEQ_0,
   552            ADC12BUSY   : ADC12BUSY_OFF
   553        };
   554
   555        /*! ADC12MCTL0 Register */
   556        config ADC12MCTL_t ADC12MCTL0 = {
   557            EOS    : EOS_OFF,
   558            SREF   : SREF_0,
   559            INCH   : INCH_0
   560        };
   561
   562        /*! ADC12MCTL1 Register */
   563        config ADC12MCTL_t ADC12MCTL1 = {
   564            EOS    : EOS_OFF,
   565            SREF   : SREF_0,
   566            INCH   : INCH_0
   567        };
   568
   569        /*! ADC12MCTL2 Register */
   570        config ADC12MCTL_t ADC12MCTL2 = {
   571            EOS    : EOS_OFF,
   572            SREF   : SREF_0,
   573            INCH   : INCH_0
   574        };
   575
   576        /*! ADC12MCTL3 Register */
   577        config ADC12MCTL_t ADC12MCTL3 = {
   578            EOS    : EOS_OFF,
   579            SREF   : SREF_0,
   580            INCH   : INCH_0
   581        };
   582
   583        /*! ADC12MCTL4 Register */
   584        config ADC12MCTL_t ADC12MCTL4 = {
   585            EOS    : EOS_OFF,
   586            SREF   : SREF_0,
   587            INCH   : INCH_0
   588        };
   589
   590        /*! ADC12MCTL5 Register */
   591        config ADC12MCTL_t ADC12MCTL5 = {
   592            EOS    : EOS_OFF,
   593            SREF   : SREF_0,
   594            INCH   : INCH_0
   595        };
   596
   597        /*! ADC12MCTL6 Register */
   598        config ADC12MCTL_t ADC12MCTL6 = {
   599            EOS    : EOS_OFF,
   600            SREF   : SREF_0,
   601            INCH   : INCH_0
   602        };
   603
   604        /*! ADC12MCTL7 Register */
   605        config ADC12MCTL_t ADC12MCTL7 = {
   606            EOS    : EOS_OFF,
   607            SREF   : SREF_0,
   608            INCH   : INCH_0
   609        };
   610
   611        /*! ADC12MCTL8 Register */
   612        config ADC12MCTL_t ADC12MCTL8 = {
   613            EOS    : EOS_OFF,
   614            SREF   : SREF_0,
   615            INCH   : INCH_0
   616        };
   617
   618        /*! ADC12MCTL9 Register */
   619        config ADC12MCTL_t ADC12MCTL9 = {
   620            EOS    : EOS_OFF,
   621            SREF   : SREF_0,
   622            INCH   : INCH_0
   623        };
   624
   625        /*! ADC12MCTL10 Register */
   626        config ADC12MCTL_t ADC12MCTL10 = {
   627            EOS    : EOS_OFF,
   628            SREF   : SREF_0,
   629            INCH   : INCH_0
   630        };
   631
   632        /*! ADC12MCTL11 Register */
   633        config ADC12MCTL_t ADC12MCTL11 = {
   634            EOS    : EOS_OFF,
   635            SREF   : SREF_0,
   636            INCH   : INCH_0
   637        };
   638
   639        /*! ADC12MCTL12 Register */
   640        config ADC12MCTL_t ADC12MCTL12 = {
   641            EOS    : EOS_OFF,
   642            SREF   : SREF_0,
   643            INCH   : INCH_0
   644        };
   645
   646        /*! ADC12MCTL13 Register */
   647        config ADC12MCTL_t ADC12MCTL13 = {
   648            EOS    : EOS_OFF,
   649            SREF   : SREF_0,
   650            INCH   : INCH_0
   651        };
   652
   653        /*! ADC12MCTL14 Register */
   654        config ADC12MCTL_t ADC12MCTL14 = {
   655            EOS    : EOS_OFF,
   656            SREF   : SREF_0,
   657            INCH   : INCH_0
   658        };
   659
   660        /*! ADC12MCTL15 Register */
   661        config ADC12MCTL_t ADC12MCTL15 = {
   662            EOS    : EOS_OFF,
   663            SREF   : SREF_0,
   664            INCH   : INCH_0
   665        };
   666
   667        /*! ADC12 Interrupt Enable Register */
   668        config ADC12IE_t ADC12IE = {
   669            ADC12IE15  : ADC12IE15_OFF,
   670            ADC12IE14  : ADC12IE14_OFF,
   671            ADC12IE13  : ADC12IE13_OFF,
   672            ADC12IE12  : ADC12IE12_OFF,
   673            ADC12IE11  : ADC12IE11_OFF,
   674            ADC12IE10  : ADC12IE10_OFF,
   675            ADC12IE9  : ADC12IE9_OFF,
   676            ADC12IE8  : ADC12IE8_OFF,
   677            ADC12IE7  : ADC12IE7_OFF,
   678            ADC12IE6  : ADC12IE6_OFF,
   679            ADC12IE5  : ADC12IE5_OFF,
   680            ADC12IE4  : ADC12IE4_OFF,
   681            ADC12IE3  : ADC12IE3_OFF,
   682            ADC12IE2  : ADC12IE2_OFF,
   683            ADC12IE1  : ADC12IE1_OFF,
   684            ADC12IE0  : ADC12IE0_OFF
   685        };
   686
   687
   688        /*! ADC12MEM0 Register */
   689        config Bits16 ADC12MEM0 = 0;
   690
   691        /*! ADC12MEM1 Register */
   692        config Bits16 ADC12MEM1 = 0;
   693
   694        /*! ADC12MEM2 Register */
   695        config Bits16 ADC12MEM2 = 0;
   696
   697        /*! ADC12MEM3 Register */
   698        config Bits16 ADC12MEM3 = 0;
   699
   700        /*! ADC12MEM4 Register */
   701        config Bits16 ADC12MEM4 = 0;
   702
   703        /*! ADC12MEM5 Register */
   704        config Bits16 ADC12MEM5 = 0;
   705
   706        /*! ADC12MEM6 Register */
   707        config Bits16 ADC12MEM6 = 0;
   708
   709        /*! ADC12MEM7 Register */
   710        config Bits16 ADC12MEM7 = 0;
   711
   712        /*! ADC12MEM8 Register */
   713        config Bits16 ADC12MEM8 = 0;
   714
   715        /*! ADC12MEM9 Register */
   716        config Bits16 ADC12MEM9 = 0;
   717
   718        /*! ADC12MEM10 Register */
   719        config Bits16 ADC12MEM10 = 0;
   720
   721        /*! ADC12MEM11 Register */
   722        config Bits16 ADC12MEM11 = 0;
   723
   724        /*! ADC12MEM12 Register */
   725        config Bits16 ADC12MEM12 = 0;
   726
   727        /*! ADC12MEM13 Register */
   728        config Bits16 ADC12MEM13 = 0;
   729
   730        /*! ADC12MEM14 Register */
   731        config Bits16 ADC12MEM14 = 0;
   732
   733        /*! ADC12MEM15 Register */
   734        config Bits16 ADC12MEM15 = 0;
   735
   736        /*! ADC12IV Register */
   737        config Bits16 ADC12IV = ADC12IV_NONE;
   738
   739        /*! ADC12IFG Register */
   740        config Bits16 ADC12IFG = 0;
   741
   742        /*! ADC12 has 16 interrupt enable */
   743        config regIntVect_t interruptSource[16];
   744
   745        /*! Determine if each Register needs to be forced set or not */
   746        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   747        [
   748            { register : "ADC12CTL0" , regForceSet : false },
   749            { register : "ADC12CTL1" , regForceSet : false },
   750            { register : "ADC12IFG" , regForceSet : false },
   751            { register : "ADC12IV" , regForceSet : false },
   752            { register : "ADC12IE" , regForceSet : false },
   753            { register : "ADC12MCTL0" , regForceSet : false },
   754            { register : "ADC12MCTL1" , regForceSet : false },
   755            { register : "ADC12MCTL2" , regForceSet : false },
   756            { register : "ADC12MCTL3" , regForceSet : false },
   757            { register : "ADC12MCTL4" , regForceSet : false },
   758            { register : "ADC12MCTL5" , regForceSet : false },
   759            { register : "ADC12MCTL6" , regForceSet : false },
   760            { register : "ADC12MCTL7" , regForceSet : false },
   761            { register : "ADC12MCTL8" , regForceSet : false },
   762            { register : "ADC12MCTL9" , regForceSet : false },
   763            { register : "ADC12MCTL10" , regForceSet : false },
   764            { register : "ADC12MCTL11" , regForceSet : false },
   765            { register : "ADC12MCTL12" , regForceSet : false },
   766            { register : "ADC12MCTL13" , regForceSet : false },
   767            { register : "ADC12MCTL14" , regForceSet : false },
   768            { register : "ADC12MCTL15" , regForceSet : false },
   769            { register : "ADC12MEM0" , regForceSet : false },
   770            { register : "ADC12MEM1" , regForceSet : false },
   771            { register : "ADC12MEM2" , regForceSet : false },
   772            { register : "ADC12MEM3" , regForceSet : false },
   773            { register : "ADC12MEM4" , regForceSet : false },
   774            { register : "ADC12MEM5" , regForceSet : false },
   775            { register : "ADC12MEM6" , regForceSet : false },
   776            { register : "ADC12MEM7" , regForceSet : false },
   777            { register : "ADC12MEM8" , regForceSet : false },
   778            { register : "ADC12MEM9" , regForceSet : false },
   779            { register : "ADC12MEM10" , regForceSet : false },
   780            { register : "ADC12MEM11" , regForceSet : false },
   781            { register : "ADC12MEM12" , regForceSet : false },
   782            { register : "ADC12MEM13" , regForceSet : false },
   783            { register : "ADC12MEM14" , regForceSet : false },
   784            { register : "ADC12MEM15" , regForceSet : false },
   785        ];
   786    }


module ti.catalog.msp430.peripherals.adc.ADC12_B

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ADC12_B ========
    35     *  MSP430 12-bit Analog to Digital Converter
    36     */
    37    metaonly module ADC12_B inherits IADC {
    38
    39    instance:
    40        /*!
    41         *  ======== baseAddr ========
    42         *  Address of the peripheral's control register.
    43         *
    44         *  A peripheral's registers are commonly accessed through a structure
    45         *  that defines the offsets of a particular register from the lowest
    46         *  address mapped to a peripheral. That lowest address is specified by
    47         *  this parameter.
    48         */
    49        config UInt baseAddr;
    50
    51        /*! Interrupt enables */
    52        config regIntVect_t interruptSource[35];
    53
    54        /*! Determine if each Register needs to be forced set or not */
    55        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    56        [
    57        ];
    58    }


interface ti.catalog.msp430.peripherals.adc.IADC

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     *  ======== IADC ========
    37     *  MSP430 Analog to Digital Converter Interface
    38     */
    39    metaonly interface IADC inherits xdc.platform.IPeripheral {
    40
    41        /*!
    42        *  ======== ForceSetDefaultRegister_t ========
    43        *  Force Set Default Register
    44        *
    45        *  Type to store if each register needs to be forced initialized
    46        *  even if the register is in default state.
    47        *
    48        *  @see #ForceSetDefaultRegister_t
    49        */
    50        struct ForceSetDefaultRegister_t {
    51            String     register;
    52            Bool       regForceSet;
    53        }
    54
    55        /*!
    56        *  ======== regIntVect_t ========
    57        *  Interrupt vector description
    58        *
    59        *  Type to describe a single interrupt vector pin and all its possible
    60        *  configurations.
    61        *
    62        *  @see #regIntVect_t
    63        */
    64        struct regIntVect_t {
    65            String                    registerName;
    66            String                    registerDescription;
    67            String                    isrToggleString;
    68            String                    priorityName;
    69            Bool                      interruptEnable;
    70            Bool                      interruptHandler;
    71            Int                       priority;
    72        }
    73
    74        /*!
    75         *  ======== create ========
    76         *  Create an instance of this peripheral
    77         */
    78        create(IClock.Instance clock);
    79
    80    instance:
    81        /*! @_nodoc */
    82        config IClock.Instance clock;
    83    }


package ti.catalog.msp430.peripherals.adc

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.adc ========
    35     *  MSP430 ADC peripherals
    36     */
    37    package ti.catalog.msp430.peripherals.adc [1, 0, 0] {
    38        module ADC10;
    39        interface IADC;
    40        module ADC12;
    41        module SD16_A;
    42        module ADC10_B;
    43        module ADC12_B;
    44    }


module ti.catalog.msp430.peripherals.adc.SD16_A

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== SD16_A ========
    35     *  MSP430F2xx Family SD16_A Module
    36     */
    37    metaonly module SD16_A inherits IADC {
    38
    39         /*! SD16XDIVx Bits */
    40         enum SD16XDIV_t {
    41             SD16XDIV_0 = 0x000,  /*! Divide by 1 */
    42             SD16XDIV_1 = 0x200,  /*! Divide by 3 */
    43             SD16XDIV_2 = 0x400,  /*! Divide by 16 */
    44             SD16XDIV_3 = 0x800   /*! Divide by 48 */
    45         };
    46
    47         /*! SD16LP Bit */
    48         enum SD16LP_t {
    49             SD16LP_OFF = 0x000,  /*! Low-power mode is disabled */
    50             SD16LP = 0x100       /*! Low-power mode is enabled. The maximum clock frequency for the SD16_A is reduced */
    51         };
    52
    53         /*! SD16DIVx Bits */
    54         enum SD16DIV_t {
    55             SD16DIV_0 = 0x00,  /*! Divide by 1 */
    56             SD16DIV_1 = 0x40,  /*! Divide by 2 */
    57             SD16DIV_2 = 0x80,  /*! Divide by 4 */
    58             SD16DIV_3 = 0xC0   /*! Divide by 8 */
    59         };
    60
    61         /*! SD16SSELx Bits */
    62         enum SD16SSEL_t {
    63             SD16SSEL_0 = 0x00,  /*! MCLK */
    64             SD16SSEL_1 = 0x10,  /*! SMCLK */
    65             SD16SSEL_2 = 0x20,  /*! ACLK */
    66             SD16SSEL_3 = 0x30   /*! External TACLK */
    67         };
    68
    69         /*! SD16VMIDON Bit */
    70         enum SD16VMIDON_t {
    71             SD16VMIDON_OFF = 0x00,  /*! Off */
    72             SD16VMIDON = 0x08       /*! On */
    73         };
    74
    75         /*! SD16REFON Bit */
    76         enum SD16REFON_t {
    77             SD16REFON_OFF = 0x00,  /*! Reference off */
    78             SD16REFON = 0x04       /*! Reference on */
    79         };
    80
    81         /*! SD16OVIE Bit */
    82         enum SD16OVIE_t {
    83             SD16OVIE_OFF = 0x00,  /*! Overflow interrupt disabled */
    84             SD16OVIE = 0x02       /*! Overflow interrupt enabled */
    85         };
    86
    87         /*! SD16BUFx Bits */
    88         enum SD16BUF_t {
    89             SD16BUF_0 = 0x0000,  /*! Buffer disabled */
    90             SD16BUF_1 = 0x2000,  /*! Slow speed/current */
    91             SD16BUF_2 = 0x4000,  /*! Medium speed/current */
    92             SD16BUF_3 = 0x6000   /*! High speed/current */
    93         };
    94
    95         /*! SD16UNI Bit */
    96         enum SD16UNI_t {
    97             SD16UNI_OFF = 0x0000,  /*! Bipolar mode */
    98             SD16UNI = 0x10000      /*! Unipolar mode */
    99         };
   100
   101         /*! SD16XOSR Bit */
   102         enum SD16XOSR_t {
   103             SD16XOSR_OFF = 0x000,  /*! Extended oversampling ratio. This bit, along with the SD16OSRx bits,
   104                                     * select the oversampling ratio. See SD16OSRx bit description for settings */
   105             SD16XOSR = 0x800       /*! Extended oversampling ratio. This bit, along with the SD16OSRx bits,
   106                                     * select the oversampling ratio. See SD16OSRx bit description for settings */
   107         };
   108
   109         /*! SD16SNGL Bit */
   110         enum SD16SNGL_t {
   111             SD16SNGL_OFF = 0x000,  /*! Continuous conversion mode */
   112             SD16SNGL = 0x400       /*! Single conversion mode */
   113         };
   114
   115         /*! SD16OSRx Bits */
   116         enum SD16OSR_t {
   117             SD16OSR_256 = 0x000, /*! SD16XOSR = 0 */
   118             SD16OSR_128 = 0x100, /*! SD16XOSR = 0 */
   119             SD16OSR_64 = 0x200,  /*! SD16XOSR = 0 */
   120             SD16OSR_32 = 0x300,  /*! SD16XOSR = 0 */
   121             SD16OSR_512 = 0x800, /*! SD16XOSR = 1 */
   122             SD16OSR_1024 = 0x900 /*! SD16XOSR = 1 */
   123         };
   124
   125         /*! SD16LSBTOG Bit */
   126         enum SD16LSBTOG_t {
   127             SD16LSBTOG_OFF = 0x00,  /*! SD16LSBACC does not toggle with each SD16MEM0 read */
   128             SD16LSBTOG = 0x80       /*! SD16LSBACC toggles with each SD16MEM0 read */
   129         };
   130
   131         /*! SD16LSBACC Bit */
   132         enum SD16LSBACC_t {
   133             SD16LSBACC_OFF = 0x00,  /*! SD16MEMx contains the most significant 16-bits of the conversion */
   134             SD16LSBACC = 0x40       /*! SD16MEMx contains the least significant 16-bits of the conversion */
   135         };
   136
   137         /*! SD16OVIFG Bit */
   138         enum SD16OVIFG_t {
   139             SD16OVIFG_OFF = 0x00,  /*! No overflow interrupt pending */
   140             SD16OVIFG = 0x20       /*! Overflow interrupt pending */
   141         };
   142
   143         /*! SD16DF Bit */
   144         enum SD16DF_t {
   145             SD16DF_OFF = 0x00,  /*! Offset binary */
   146             SD16DF = 0x10       /*! 2's complement */
   147         };
   148
   149         /*! SD16IE Bit */
   150         enum SD16IE_t {
   151             SD16IE_OFF = 0x00,  /*! Disabled */
   152             SD16IE = 0x08       /*! Enabled */
   153         };
   154
   155         /*! SD16IFG Bit */
   156         enum SD16IFG_t {
   157             SD16IFG_OFF = 0x00,  /*! No interrupt pending */
   158             SD16IFG = 0x04       /*! Interrupt pending */
   159         };
   160
   161         /*! SD16SC Bit */
   162         enum SD16SC_t {
   163             SD16SC_OFF = 0x00,  /*! No conversino start */
   164             SD16SC = 0x02       /*! Start conversion */
   165         };
   166
   167         /*! SD16INTDLYx Bits */
   168         enum SD16INTDLY_t {
   169             SD16INTDLY_0 = 0x00,  /*! Fourth sample causes interrupt */
   170             SD16INTDLY_1 = 0x40,  /*! Third sample causes interrupt */
   171             SD16INTDLY_2 = 0x80,  /*! Second sample causes interrupt */
   172             SD16INTDLY_3 = 0xC0   /*! First sample causes interrupt */
   173         };
   174
   175         /*! SD16GAINx Bits */
   176         enum SD16GAIN_t {
   177             SD16GAIN_1 = 0x00,  /*! Multiply by 1 */
   178             SD16GAIN_2 = 0x08,  /*! Multiply by 2 */
   179             SD16GAIN_4 = 0x10,  /*! Multiply by 4 */
   180             SD16GAIN_8 = 0x18,  /*! Multiply by 8 */
   181             SD16GAIN_16 = 0x20,  /*! Multiply by 16 */
   182             SD16GAIN_32 = 0x28   /*! Multiply by 32 */
   183         };
   184
   185         /*! SD16INCHx Bits */
   186         enum SD16INCH_t {
   187             SD16INCH_0 = 0x000,  /*! A0 */
   188             SD16INCH_1 = 0x001,  /*! A1 */
   189             SD16INCH_2 = 0x010,  /*! A2 */
   190             SD16INCH_3 = 0x011,  /*! A3 */
   191             SD16INCH_4 = 0x100,  /*! A4 */
   192             SD16INCH_5 = 0x101,  /*! A5 - (AVcc - AVss)/11 */
   193             SD16INCH_6 = 0x110,  /*! A6 - Temperature Sensor */
   194             SD16INCH_7 = 0x111   /*! A7 - Short PGA offset measurement */
   195         };
   196
   197
   198        /*! SD16_A Analog Enable Bit 7 */
   199        enum SD16AE7_t {
   200            SD16AE7_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   201            SD16AE7     = 0x0080   /*! External input enabled */
   202        };
   203
   204        /*! SD16_A Analog Enable Bit 6 */
   205        enum SD16AE6_t {
   206            SD16AE6_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   207            SD16AE6     = 0x0040   /*! External input enabled */
   208        };
   209
   210        /*! SD16_A Analog Enable Bit 5 */
   211        enum SD16AE5_t {
   212            SD16AE5_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   213            SD16AE5     = 0x0020   /*! External input enabled */
   214        };
   215
   216        /*! SD16_A Analog Enable Bit 4 */
   217        enum SD16AE4_t {
   218            SD16AE4_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   219            SD16AE4     = 0x0010   /*! External input enabled */
   220        };
   221
   222        /*! SD16_A Analog Enable Bit 3 */
   223        enum SD16AE3_t {
   224            SD16AE3_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   225            SD16AE3     = 0x0008   /*! External input enabled */
   226        };
   227
   228        /*! SD16_A Analog Enable Bit 2 */
   229        enum SD16AE2_t {
   230            SD16AE2_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   231            SD16AE2     = 0x0004   /*! External input enabled */
   232        };
   233
   234        /*! SD16_A Analog Enable Bit 1 */
   235        enum SD16AE1_t {
   236            SD16AE1_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   237            SD16AE1     = 0x0002   /*! External input enabled */
   238        };
   239
   240        /*! SD16_A Analog Enable Bit 0 */
   241        enum SD16AE0_t {
   242            SD16AE0_OFF = 0x0000,  /*! External input disabled. Negative inputs are internally connected to VSS. */
   243            SD16AE0     = 0x0001   /*! External input enabled */
   244        };
   245
   246        /*! SD16_A Interrupt */
   247        enum SD16IV_SD16OVIFG_t {
   248            SD16IV_SD16OVIFG_OFF = 0x0000,  /*! No Interrupt pending */
   249            SD16IV_SD16OVIFG     = 0x0002   /*! SD16OVIFG */
   250        };
   251
   252        /*! SD16_A SD16MEMx overflow */
   253        enum SD16IV_SD16MEM0_t {
   254            SD16IV_SD16MEM0_OFF = 0x0000,  /*! No Interrupt pending */
   255            SD16IV_SD16MEM0     = 0x0004   /*! SD16MEM0 SD16IFG */
   256        };
   257
   258        /*! SD16CTL Register */
   259        struct SD16CTL_t {
   260            SD16XDIV_t SD16XDIV;     /*! SD16_A clock divider
   261                                      * 000 Divide by 1
   262                                      * 001 Divide by 3
   263                                      * 010 Divide by 16
   264                                      * 011 Divide by 48
   265                                      * 1xx Reserved */
   266            SD16LP_t SD16LP;         /*! Low power mode. This bit selects a reduced speed, reduced power mode
   267                                      * 0 Low-power mode is disabled
   268                                      * 1 Low-power mode is enabled. The maximum clock frequency for the
   269                                      *  SD16_A is reduced. */
   270            SD16DIV_t SD16DIV;       /*! SD16_A clock divider
   271                                      * 00 Divide by 1
   272                                      * 01 Divide by 2
   273                                      * 10 Divide by 4
   274                                      * 11 Divide by 8 */
   275            SD16SSEL_t SD16SSEL;     /*! SD16_A clock source select
   276                                      * 00 MCLK
   277                                      * 01 SMCLK
   278                                      * 10 ACLK
   279                                      * External TACLK */
   280            SD16VMIDON_t SD16VMIDON; /*! VMID buffer on
   281                                      * 0 Off
   282                                      * 1 On */
   283            SD16REFON_t SD16REFON;   /*! Reference generator on
   284                                      * 0 Reference off
   285                                      * 1 Reference on */
   286            SD16OVIE_t SD16OVIE;     /*! SD16_A overflow interrupt enable. The GIE bit must also be set to enable the
   287                                      * interrupt.
   288                                      * 0 Overflow interrupt disabled
   289                                      * 1 Overflow interrupt enabled */
   290        };
   291
   292        /*! SD16CCTL0 Register */
   293        struct SD16CCTL0_t {
   294            SD16UNI_t SD16UNI;       /*! Unipolar mode select
   295                                      * 0 Bipolar mode
   296                                      * 1 Unipolar mode */
   297            SD16XOSR_t SD16XOSR;     /*! Extended oversampling ratio. This bit, along with the SD16OSRx bits,
   298                                      * select the oversampling ratio. See SD16OSRx bit description for settings. */
   299            SD16SNGL_t SD16SNGL;     /*! Single conversion mode select
   300                                      * 0 Continuous conversion mode
   301                                      * 1 Single conversion mode */
   302            SD16OSR_t SD16OSR;       /*! Oversampling ratio
   303                                      * When SD16XOSR = 0
   304                                      * 00 256
   305                                      * 01 128
   306                                      * 10 64
   307                                      * 11 32
   308                                      * When SD16XOSR = 1
   309                                      * 00 512
   310                                      * 01 1024
   311                                      * 10 Reserved
   312                                      * 11 Reserved */
   313            SD16LSBTOG_t SD16LSBTOG; /*! LSB toggle. This bit, when set, causes SD16LSBACC to toggle each time
   314                                      * the SD16MEM0 register is read.
   315                                      * 0 SD16LSBACC does not toggle with each SD16MEM0 read
   316                                      * 1 SD16LSBACC toggles with each SD16MEM0 read */
   317            SD16LSBACC_t SD16LSBACC; /*! LSB access. This bit allows access to the upper or lower 16-bits of the
   318                                      * SD16_A conversion result.
   319                                      * 0 SD16MEMx contains the most significant 16-bits of the conversion.
   320                                      * 1 SD16MEMx contains the least significant 16-bits of the conversion. */
   321            SD16OVIFG_t SD16OVIFG;   /*! SD16_A overflow interrupt flag
   322                                      * 0 No overflow interrupt pending
   323                                      * 1 Overflow interrupt pending */
   324            SD16DF_t SD16DF;         /*! SD16_A data format
   325                                      * 0 Offset binary
   326                                      * 1 2's complement */
   327            SD16IE_t SD16IE;         /*! SD16_A interrupt enable
   328                                      * 0 Disabled
   329                                      * 1 Enabled */
   330            SD16IFG_t SD16IFG;       /*! SD16_A interrupt flag. SD16IFG is set when new conversion results are
   331                                      * available. SD16IFG is automatically reset when the corresponding
   332                                      * SD16MEMx register is read, or may be cleared with software.
   333                                      * 0 No interrupt pending
   334                                      * 1 Interrupt pending */
   335            SD16SC_t SD16SC;         /*! SD16_A start conversion
   336                                      * 0 No conversion start
   337                                      * 1 Start conversion */
   338        };
   339
   340        /*! SD16INCTL0 Register */
   341        struct SD16INCTL0_t {
   342            SD16INTDLY_t SD16INTDLY;  /*! Interrupt delay generation after conversion start. These bits select the
   343                                       * delay for the first interrupt after conversion start.
   344                                       * 00 Fourth sample causes interrupt
   345                                       * 01 Third sample causes interrupt
   346                                       * 10 Second sample causes interrupt
   347                                       * 11 First sample causes interrupt */
   348
   349            SD16GAIN_t SD16GAIN;      /*! SD16_A preamplifier gain
   350                                       * 000 Multiply by 1
   351                                       * 001 Multiply by 2
   352                                       * 010 Multiply by 4
   353                                       * 011 Multiply by 8
   354                                       * 100 Multiply by 16
   355                                       * 101 Multiply by 32
   356                                       * 110 Reserved
   357                                       * 111 Reserved */
   358
   359            SD16INCH_t SD16INCH;      /*! SD16_A channel differential pair input
   360                                       * 000 A0
   361                                       * 001 A1
   362                                       * 010 A2
   363                                       * 011 A3
   364                                       * 100 A4
   365                                       * 101 A5-- (AVCC -- AVSS) / 11
   366                                       * 110 A6 -- Temperature Sensor
   367                                       * 111 A7 -- Short for PGA offset measurement */
   368        };
   369
   370        /*! SD16_A Analog Input Enable Register */
   371        struct SD16AE_t {
   372             SD16AE0_t SD16AE0; /*! SD16_A analog enable
   373                                 * 0 External input disabled. Negative inputs are internally connected to
   374                                 *   VSS.
   375                                 * 1 External input enabled */
   376             SD16AE1_t SD16AE1; /*! SD16_A analog enable
   377                                 * 0 External input disabled. Negative inputs are internally connected to
   378                                 *   VSS.
   379                                 * 1 External input enabled */
   380            SD16AE2_t SD16AE2; /*! SD16_A analog enable
   381                                * 0 External input disabled. Negative inputs are internally connected to
   382                                *   VSS.
   383                                * 1 External input enabled */
   384            SD16AE3_t SD16AE3; /*! SD16_A analog enable
   385                                * 0 External input disabled. Negative inputs are internally connected to
   386                                *   VSS.
   387                                * 1 External input enabled */
   388            SD16AE4_t SD16AE4; /*! SD16_A analog enable
   389                                * 0 External input disabled. Negative inputs are internally connected to
   390                                *   VSS.
   391                                * 1 External input enabled */
   392            SD16AE5_t SD16AE5; /*! SD16_A analog enable
   393                                * 0 External input disabled. Negative inputs are internally connected to
   394                                *   VSS.
   395                                * 1 External input enabled */
   396            SD16AE6_t SD16AE6; /*! SD16_A analog enable
   397                                * 0 External input disabled. Negative inputs are internally connected to
   398                                *   VSS.
   399                                * 1 External input enabled */
   400            SD16AE7_t SD16AE7; /*! SD16_A analog enable
   401                                * 0 External input disabled. Negative inputs are internally connected to
   402                                *   VSS.
   403                                * 1 External input enabled */
   404        };
   405
   406    instance:
   407
   408        /*! SD16CTL Register */
   409        config SD16CTL_t SD16CTL = {
   410            SD16XDIV    : SD16XDIV_0,
   411            SD16LP      : SD16LP_OFF,
   412            SD16DIV     : SD16DIV_0,
   413            SD16SSEL    : SD16SSEL_0,
   414            SD16VMIDON  : SD16VMIDON_OFF,
   415            SD16REFON   : SD16REFON_OFF,
   416            SD16OVIE    : SD16OVIE_OFF
   417        };
   418
   419        /*! SD16CCTL0 Register */
   420        config SD16CCTL0_t SD16CCTL0 = {
   421            SD16UNI     : SD16UNI_OFF,
   422            SD16XOSR    : SD16XOSR_OFF,
   423            SD16SNGL    : SD16SNGL_OFF,
   424            SD16OSR     : SD16OSR_256,
   425            SD16LSBTOG  : SD16LSBTOG_OFF,
   426            SD16LSBACC  : SD16LSBACC_OFF,
   427            SD16OVIFG   : SD16OVIFG_OFF,
   428            SD16DF      : SD16DF_OFF,
   429            SD16IE      : SD16IE_OFF,
   430            SD16IFG     : SD16IFG_OFF,
   431            SD16SC      : SD16SC_OFF
   432        };
   433
   434        /*! SD16INCTL0 Register */
   435        config SD16INCTL0_t SD16INCTL0 = {
   436            SD16INTDLY  : SD16INTDLY_0,
   437            SD16GAIN    : SD16GAIN_1,
   438            SD16INCH    : SD16INCH_0
   439        };
   440
   441        /*! SD16AE Register */
   442        config SD16AE_t SD16AE = {
   443            SD16AE0 : SD16AE0_OFF,
   444            SD16AE1 : SD16AE1_OFF,
   445            SD16AE2 : SD16AE2_OFF,
   446            SD16AE3 : SD16AE3_OFF,
   447            SD16AE4 : SD16AE4_OFF,
   448            SD16AE5 : SD16AE5_OFF,
   449            SD16AE6 : SD16AE6_OFF,
   450            SD16AE7 : SD16AE7_OFF
   451        };
   452
   453        /*! SD16IV Register */
   454        config Bits16 SD16IV = SD16IV_SD16OVIFG_OFF;
   455
   456        /*! SD16MEM0 Register */
   457        config Bits16 SD16MEM0 = SD16IV_SD16MEM0_OFF;
   458
   459        /*! ADC10 has 1 interrupt enable */
   460        config regIntVect_t interruptSource[2];
   461
   462        /*! Determine if each Register needs to be forced set or not */
   463        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   464        [
   465            { register : "SD16CTL" , regForceSet : false },
   466            { register : "SD16CCTL0" , regForceSet : false },
   467            { register : "SD16INCTL0" , regForceSet : false },
   468            { register : "SD16AE" , regForceSet : false },
   469            { register : "SD16IV" , regForceSet : false },
   470            { register : "SD16MEM0" , regForceSet : false }
   471        ];
   472    }


module ti.catalog.msp430.peripherals.clock.BCSplus

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== BSCplus ========
    36     *  MSP430 Basic Clock System
    37     */
    38    metaonly module BCSplus inherits IClock
    39    {
    40        /*! MOD0 Bit */
    41        enum MOD0_t {
    42            MOD0_OFF = 0x00,    /*! Disable MOD0 bit */
    43            MOD0 = 0x01         /*! Enable MOD0 bit */
    44        };
    45
    46        /*! MOD1 Bit */
    47        enum MOD1_t {
    48            MOD1_OFF = 0x00,    /*! Disable MOD1 bit */
    49            MOD1 = 0x02         /*! Enable MOD1 bit */
    50        };
    51
    52        /*! MOD2 Bit */
    53        enum MOD2_t {
    54            MOD2_OFF = 0x00,    /*! Disable MOD2 bit */
    55            MOD2 = 0x04         /*! Enable MOD2 bit */
    56        };
    57
    58        /*! MOD3 Bit */
    59        enum MOD3_t {
    60            MOD3_OFF = 0x00,    /*! Disable MOD3 bit */
    61            MOD3 = 0x08         /*! Enable MOD3 bit */
    62        };
    63
    64        /*! MOD4 Bit */
    65        enum MOD4_t {
    66            MOD4_OFF = 0x00,    /*! Disable MOD4 bit */
    67            MOD4 = 0x10         /*! Enable MOD4 bit */
    68        };
    69
    70        /*! DCO0 Bit */
    71        enum DCO0_t {
    72            DCO0_OFF = 0x00,    /*! Disable DCO0 bit */
    73            DCO0 = 0x20         /*! Enable DCO0 bit */
    74        };
    75
    76        /*! DCO1 Bit */
    77        enum DCO1_t {
    78            DCO1_OFF = 0x00,    /*! Disable DCO1 bit */
    79            DCO1 = 0x40         /*! Enable DCO1 bit */
    80        };
    81
    82        /*! DCO2 Bit */
    83        enum DCO2_t {
    84            DCO2_OFF = 0x00,    /*! Disable DCO2 bit */
    85            DCO2 = 0x80         /*! Enable DCO2 bit */
    86        };
    87
    88        enum XT2OFF_t {
    89            XT2OFF_OFF = 0x00,  /*! Enable XT2CLK */
    90            XT2OFF = 0x80       /*! Disable XT2CLK */
    91        };
    92
    93        enum XTS_t {
    94            XTS_OFF = 0x00,     /*! Low Frequency */
    95            XTS = 0x40          /*! High Frequency */
    96        };
    97
    98        enum RSEL0_t {
    99            RSEL0_OFF = 0x00,   /*! Disable RSEL0 bit */
   100            RSEL0 = 0x01        /*! Enable RSEL0 bit */
   101        };
   102
   103        enum RSEL1_t {
   104            RSEL1_OFF = 0x00,   /*! Disable RSEL1 bit */
   105            RSEL1 = 0x02        /*! Enable RSEL1 bit */
   106        };
   107
   108        enum RSEL2_t {
   109            RSEL2_OFF = 0x00,   /*! Disable RSEL2 bit */
   110            RSEL2 = 0x04        /*! Enable RSEL2 bit */
   111        };
   112
   113        enum RSEL3_t {
   114            RSEL3_OFF = 0x00,   /*! Disable RSEL3 bit */
   115            RSEL3 = 0x08        /*! Enable RSEL3 bit */
   116        };
   117
   118        /*! MCLK Source Select */
   119        enum SELM_t {
   120            SELM_0 = 0x00,      /*! DCOCLK */
   121    /*        SELM_1 = 0x40,       DCOCLK */
   122            SELM_2 = 0x80,      /*! XT2CLK/LFXTCLK */
   123            SELM_3 = 0xC0       /*! LFXTCLK */
   124        };
   125
   126        /*! ACLK Divider values */
   127        enum DIVA_t {
   128            DIVA_0 = 0x00,      /*! Divide by 1 */
   129            DIVA_1 = 0x10,      /*! Divide by 2 */
   130            DIVA_2 = 0x20,      /*! Divide by 4 */
   131            DIVA_3 = 0x30       /*! Divide by 8 */
   132        };
   133
   134        /*! MCLK Divider values */
   135        enum DIVM_t {
   136            DIVM_0 = 0x00,      /*! Divide by 1 */
   137            DIVM_1 = 0x10,      /*! Divide by 2 */
   138            DIVM_2 = 0x20,      /*! Divide by 4 */
   139            DIVM_3 = 0x30       /*! Divide by 8 */
   140        };
   141
   142        /*! SMCLK Divider values */
   143        enum DIVS_t {
   144            DIVS_0 = 0x00,      /*! Divide by 1 */
   145            DIVS_1 = 0x02,      /*! Divide by 2 */
   146            DIVS_2 = 0x04,      /*! Divide by 4 */
   147            DIVS_3 = 0x06       /*! Divide by 8 */
   148        };
   149
   150        enum SELS_t {
   151            SELS_OFF = 0x00,    /*! DCOCLK */
   152            SELS = 0x08         /*! XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when XT2 oscillator not present */
   153        };
   154
   155        enum DCOR_t {
   156            DCOR_OFF = 0x00,    /*! DCO uses internal resistor */
   157            DCOR = 0x01         /*! DCO uses external resistor */
   158        };
   159
   160        /*! XT2 frequency range select */
   161        enum XT2S_t {
   162            XT2S_0 = 0x00,      /*! 0.4 - 1 MHz */
   163            XT2S_1 = 0x40,      /*! 1 - 3 MHz */
   164            XT2S_2 = 0x80,      /*! 3 - 16 MHz */
   165            XT2S_3 = 0xC0       /*! Digital input signal */
   166        };
   167
   168        enum LFXT1S_t {
   169            LFXT1S_0 = 0x00,    /*! If XTS = 0, XT1 = 32768kHz Crystal ; If XTS = 1, XT1 = 0.4 - 1-MHz crystal or resonator */
   170            LFXT1S_1 = 0x10,    /*! If XTS = 0, XT1 = Reserved ; If XTS = 1, XT1 = 1 - 3-MHz crystal or resonator */
   171            LFXT1S_2 = 0x20,    /*! If XTS = 0, XT1 = VLOCLK ; If XTS = 1, XT1 = 3 - 16-MHz crystal or resonator */
   172            LFXT1S_3 = 0x30     /*! If XTS = 0, XT1 = Digital External ; If XTS = 1, XT1 = 0.4 - 16-MHz Digital External */
   173        };
   174
   175        enum XCAP_t {
   176            XCAP_0 = 0x00,      /*! ~1 pF */
   177            XCAP_1 = 0x04,      /*! ~6 pF */
   178            XCAP_2 = 0x08,      /*! ~10 pF */
   179            XCAP_3 = 0x0C       /*! ~12.5 pF */
   180        };
   181
   182        enum XT2OF_t {
   183            XT2OF_OFF = 0x00,   /*! No fault condition present */
   184            XT2OF = 0x02        /*! XT2 fault condition present */
   185        };
   186
   187        enum LFXT1OF_t {
   188            LFXT1OF_OFF = 0x00, /*! No fault condition present */
   189            LFXT1OF = 0x01      /*! LFXT1 fault condition present */
   190        };
   191
   192        struct DCOCTL_t {
   193            MOD0_t    MOD0;     /*! Modulation Bit 0 */
   194            MOD1_t    MOD1;     /*! Modulation Bit 1 */
   195            MOD2_t    MOD2;     /*! Modulation Bit 2 */
   196            MOD3_t    MOD3;     /*! Modulation Bit 3 */
   197            MOD4_t    MOD4;     /*! Modulation Bit 4 */
   198            DCO0_t    DCO0;     /*! DCO Select Bit 0 */
   199            DCO1_t    DCO1;     /*! DCO Select Bit 1 */
   200            DCO2_t    DCO2;     /*! DCO Select Bit 2 */
   201        }
   202
   203        /*!
   204         *  ======== BCSCTL1_t ========
   205         *  BCS Control Register 1
   206         *
   207         *  @field(XT2OFF)  This bit turns off the XT2 oscillator: 0 - XT2 is on,
   208         *                  1 - XT2 is off if it is not used for MCLK or SMCLK
   209         *
   210         *  @field(XTS)     0 - Low frequency mode; 1 - High frequency mode
   211         */
   212        struct BCSCTL1_t {
   213            XT2OFF_t  XT2OFF;       /*! XT2 off. This bit turns off the XT2 oscillator
   214                                      *  0  XT2 is on
   215                                      *  1  XT2 is off if it is not used for MCLK or SMCLK. */
   216            XTS_t     XTS;          /*! LFXT1 mode select.
   217                                       *  0  Low frequency mode
   218                                       *  1  High frequency mode */
   219            DIVA_t    DIVA;         /*! Divider for ACLK
   220                                      *  00  /1
   221                                      *  01  /2
   222                                      *  10  /4
   223                                      *  11  /8 */
   224            RSEL0_t   RSEL0;        /*! Range select bit 0 */
   225            RSEL1_t   RSEL1;        /*! Range select bit 1 */
   226            RSEL2_t   RSEL2;        /*! Range select bit 2 */
   227            RSEL3_t   RSEL3;        /*! Range select bit 3 */
   228        }
   229
   230        /*!
   231         *  ======== BCSCTL2_t ========
   232         *  BCS Control Register 2
   233         *
   234         *  @field(SELM) These bits select the MCLK source.
   235         *  @field(SELS) These bits select the SMCLK source. When
   236         *               XT2 oscillator present, 0 selects DCOCLK and
   237         *               1 selects XT2CLK; otherwise 0 selects LFXT1CLK and
   238         *               1 selects VLOCLK.
   239         *  @field(DCOR) 0 - Internal resistor, 1 - external resistor
   240         */
   241        struct BCSCTL2_t {
   242            SELM_t    SELM;         /*! Select MCLK. These bits select the MCLK source.
   243                                      *  00  DCOCLK
   244                                      *  01  DCOCLK
   245                                      *  10  XT2CLK when XT2 oscillator present on-chip. LFXT1CLK or VLOCLK
   246                                      *      when XT2 oscillator not present on-chip.
   247                                      *  11  LFXT1CLK or VLOCLK */
   248            DIVM_t    DIVM;         /*! Divider for MCLK
   249                                      *  00  /1
   250                                      *  01  /2
   251                                      *  10  /4
   252                                      *  11  /8 */
   253            SELS_t    SELS;         /*! Select SMCLK. This bit selects the SMCLK source.
   254                                      *  0  DCOCLK
   255                                      *  1  XT2CLK when XT2 oscillator present. LFXT1CLK or VLOCLK when
   256                                      *     XT2 oscillator not present */
   257            DIVS_t    DIVS;         /*! Divider for SMCLK
   258                                      *  00  /1
   259                                      *  01  /2
   260                                      *  10  /4
   261                                      *  11  /8 */
   262            DCOR_t    DCOR;         /*! DCO resistor select
   263                                      *  0  Internal resistor
   264                                      *  1  External resistor */
   265        }
   266
   267        /*!
   268         *  ======== BCSCTL3_t ========
   269         *  BCS Control register 3
   270         *
   271         *  @field(LFXT1S)  These bits select between LFXT1 and VLO and XTS = 0,
   272         *                  and select the frequency range for LFXT1 when XTS = 1
   273         *  @field(XCAP)    These bits select the effective capacitance seen by
   274         *                  the LFXT1 crystal when XTS = 0. If XTS = 1 or if
   275         *                  LFCT1Sx = 11, then XCAPx should be 00.
   276         */
   277        struct BCSCTL3_t {
   278            XT2S_t    XT2S;         /*! XT2 range select. These bits select the frequency range for XT2.
   279                                      *  00  0.4 - 1-MHz crystal or resonator
   280                                      *  01  1 - 3-MHz crystal or resonator
   281                                      *  10  3 - 16-MHz crystal or resonator
   282                                      *  11  Digital external 0.4 - 16-MHz clock source */
   283            LFXT1S_t  LFXT1S;       /*! Low-frequency clock select and LFXT1 range select. These bits select
   284                                      * between LFXT1 and VLO when XTS = 0, and select the frequency range
   285                                      * for LFXT1 when XTS = 1
   286                                      *
   287                                      *  When XTS = 0:
   288                                      *  00  32768 Hz Crystal on LFXT1
   289                                      *  01  Reserved
   290                                      *  10  VLOCLK (Reserved in MSP430x21x1 devices)
   291                                      *  11  Digital external clock source
   292                                      *
   293                                      *  When XTS = 1 (Not applicable for MSP430x20xx devices)
   294                                      *  00  0.4 - 1-MHz crystal or resonator
   295                                      *  01  1 - 3-MHz crystal or resonator
   296                                      *  10  3 - 16-MHz crystal or resonator
   297                                      *  11  Digital external 0.4 - 16-MHz clock source */
   298            XCAP_t    XCAP;         /*! Oscillator capacitor selection. These bits select the effective capacitance
   299                                      * seen by the LFXT1 crystal when XTS = 0. If XTS = 1 or if LFCT1Sx = 11
   300                                      * XCAPx should be 00.
   301                                      *  00  ~1 pF
   302                                      *  01  ~6 pF
   303                                      *  10  ~10 pF
   304                                      *  11  ~12.5 pF */
   305            XT2OF_t   XT2OF;        /*! XT2 oscillator fault
   306                                      *  0  No fault condition present
   307                                      *  1  Fault condition present */
   308            LFXT1OF_t LFXT1OF;      /*! LFXT1 oscillator fault
   309                                      *  0  No fault condition present
   310                                      *  1  Fault condition present */
   311        }
   312
   313    instance:
   314
   315        /*! DCO Clock Frequency Control */
   316        config DCOCTL_t DCOCTL = {
   317            MOD0        : MOD0_OFF,
   318            MOD1        : MOD1_OFF,
   319            MOD2        : MOD2_OFF,
   320            MOD3        : MOD3_OFF,
   321            MOD4        : MOD4_OFF,
   322            DCO0        : DCO0,
   323            DCO1        : DCO1,
   324            DCO2        : DCO2_OFF,
   325        };
   326
   327        /*! Basic Clock System Control 1 */
   328        config BCSCTL1_t  BCSCTL1 = {
   329            XT2OFF      : XT2OFF,
   330            XTS         : XTS_OFF,
   331            DIVA        : DIVA_0,
   332            RSEL0       : RSEL0,
   333            RSEL1       : RSEL1,
   334            RSEL2       : RSEL2,
   335            RSEL3       : RSEL3_OFF
   336        };
   337
   338        /*! Basic Clock System Control 2 */
   339        config BCSCTL2_t  BCSCTL2 = {
   340            SELM        : SELM_0,
   341            DIVM        : DIVM_0,
   342            SELS        : SELS_OFF,
   343            DIVS        : DIVS_0,
   344            DCOR        : DCOR_OFF
   345        };
   346
   347        /*! Basic Clock System Control 3 */
   348        config BCSCTL3_t  BCSCTL3 = {
   349            XT2S        : XT2S_0,
   350            LFXT1S      : LFXT1S_0,
   351            XCAP        : XCAP_1
   352        };
   353
   354        /*! Determine if each Register needs to be forced set or not */
   355        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   356        [
   357            { register : "DCOCTL"  , regForceSet : false },
   358            { register : "BCSCTL1" , regForceSet : false },
   359            { register : "BCSCTL2" , regForceSet : false },
   360            { register : "BCSCTL3" , regForceSet : false }
   361        ];
   362
   363        /*! Basic Clock System + pre-calibrated system frequency */
   364        config UInt preCalibratedValues = 0;
   365
   366        /*!
   367         *  ======== preCalibratedValues truth table ========
   368         *
   369         *  hasAllCal = false
   370         *    UInt - Description
   371         *       0 - 1 MHz
   372         *       1 - Custom
   373         *
   374         *  hasAllCal = true
   375         *    UInt - Description
   376         *       0 - 1 MHz
   377         *       1 - 8 MHz
   378         *       2 - 12 MHz
   379         *       3 - 16 MHz
   380         *       4 - Custom
   381         */
   382        config String preCalibratedValuesItems[length];
   383
   384        config float VLOCLKHz = 12000;
   385        config float WATCHCRYSTALCLKHz = 32768;
   386        config float LFXT1CLKHz = 0;
   387        config float XT2CLKHz = 0;
   388
   389        /*!
   390         *  ======== enableXT2 ========
   391         *  Set whether XT2 is used on the device. This is different than hasXT2
   392         *  variable.
   393         */
   394        config Bool enableXT2 = false;
   395    }


module ti.catalog.msp430.peripherals.clock.CS

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== CS ========
    36     *  MSP430 Clock System
    37     */
    38    metaonly module CS inherits IClock
    39    {
    40
    41    instance:
    42
    43        config Float VLOCLKHz = 8300;
    44        config Float WATCHCRYSTALCLKHz = 32768;
    45        config Float XT1CLKHz = 0;
    46        config Float XT2CLKHz = 0;
    47    }


module ti.catalog.msp430.peripherals.clock.CS_A

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== CS_A ========
    36     *  MSP430 Clock System
    37     */
    38    metaonly module CS_A inherits IClock
    39    {
    40
    41    instance:
    42        /*!
    43         *  ======== hasLFXT1 ========
    44         *  Specify if LFXT1 is available on the device.
    45         *
    46         *  Not all devices have low frequency clock. This specifies if
    47         *  it is available for a particular device.
    48         */
    49        config Bool hasLFXT1 = false;
    50
    51        config Float VLOCLKHz = 9400;
    52        config Float LFMODOSCHz = 39000;
    53        config Float MODOSCHz = 5000000;
    54        config Float WATCHCRYSTALCLKHz = 32768;
    55        config Float XT1CLKHz = 0;
    56        config Float XT2CLKHz = 0;
    57    }


interface ti.catalog.msp430.peripherals.clock.IClock

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== Clock ========
    36     *  MSP430 Master Clock
    37     */
    38    metaonly interface IClock inherits xdc.platform.IPeripheral {
    39
    40        /*!
    41        *  ======== ForceSetDefaultRegister_t ========
    42        *  Force Set Default Register
    43        *
    44        *  Type to store if each register needs to be forced initialized
    45        *  even if the register is in default state.
    46        *
    47        *  @see #ForceSetDefaultRegister_t
    48        */
    49        struct ForceSetDefaultRegister_t {
    50            String     register;
    51            Bool       regForceSet;
    52        }
    53
    54        /*!
    55        *  ======== AvailableClockVariations_t ========
    56        *  Available variations of clock in a device
    57        *
    58        *  Stores true/false if any of the clock variations are
    59        *  available.
    60        *
    61        *  @see #AvailableClockVariations_t
    62        */
    63        struct AvailableClockVariations_t {
    64            String     clockType;
    65            Bool       hasClock;
    66        }
    67
    68    instance:
    69
    70        /*!
    71         *  ======== baseAddr ========
    72         *  Address of the peripheral's control register.
    73         *
    74         *  A peripheral's registers are commonly accessed through a structure
    75         *  that defines the offsets of a particular register from the lowest
    76         *  address mapped to a peripheral. That lowest address is specified by
    77         *  this parameter.
    78         */
    79        config UInt baseAddr;
    80
    81        /*!
    82         *  ======== hasHFXT1 ========
    83         *  Specify if HFXT1 is available on the device.
    84         *
    85         *  Not all devices have high frequency clock. This specifies if
    86         *  it is available for a particular device.
    87         */
    88        config Bool hasHFXT1 = false;
    89
    90        /*!
    91         *  ======== hasXT2 ========
    92         *  Specify if XT2 is available on the device.
    93         *
    94         *  Not all devices have XT2 clock available. This specifies if
    95         *  it is available for a particular device.
    96         */
    97        config Bool hasXT2 = false;
    98
    99        /*!
   100         *  ======== hasRosc ========
   101         *  Specify if Rosc is available on the device.
   102         *
   103         *  Not all devices have Rosc circuitry. This specifies if
   104         *  it is available for a particular device.
   105         */
   106        config Bool hasRosc = false;
   107
   108        /*!
   109         *  ======== hasVLO ========
   110         *  Specify if VLO is available on the device.
   111         *
   112         *  Not all devices have very low frequency clock VLO. This specifies if
   113         *  it is available for a particular device.
   114         */
   115        config Bool hasVLO = false;
   116
   117        /*!
   118         *  ======== hasAllCal ========
   119         *  Specify if device has all calibration constants.
   120         *
   121         *  G1 devices do not.
   122         */
   123        config Bool hasAllCal = false;
   124
   125        /*!
   126         *  ======== maxCpuFrequency ========
   127         *  Maximum CPU frequency in Hertz
   128         */
   129        config Float maxCpuFrequency = 0;
   130
   131        /*!
   132         *  ======== DCOCLKHz ========
   133         *  DCO clock frequency in Hertz
   134         */
   135        readonly config Float DCOCLKHz = 1000000;
   136
   137        /*!
   138         *  ======== ACLKHz ========
   139         *  ACLK frequency in Hertz
   140         */
   141        readonly config Float ACLKHz;
   142
   143        /*!
   144         *  ======== MCLKHz ========
   145         *  MCLK frequency in Hertz
   146         */
   147        readonly config Float MCLKHz;
   148
   149        /*!
   150         *  ======== SMCLKHz ========
   151         *  SMCLK frequency in Hertz
   152         */
   153        readonly config Float SMCLKHz;
   154
   155        /*!
   156         *  ======== computeDCOCLKHz ========
   157         *  Initialize to the nearest available DCO clock frequency
   158         */
   159        void computeDCOCLKHz(Float DCOCLKHz);
   160    }


package ti.catalog.msp430.peripherals.clock

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.special_function;
    34
    35    /*!
    36     *  ======== ti.catalog.msp430.peripherals.clock ========
    37     *  MSP430 clock peripherals
    38     */
    39    package ti.catalog.msp430.peripherals.clock [1, 0, 0] {
    40        module BCSplus, UCS, CS, CS_A;
    41        interface IClock;
    42    }


module ti.catalog.msp430.peripherals.clock.UCS

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== UCS ========
    36     *  MSP430 Unified Clock System
    37     */
    38    metaonly module UCS inherits IClock
    39    {
    40        /*! DCO4 Bit */
    41        enum DCO4_t {
    42            DCO4_OFF = 0x0000,                  /*! Disable DCO4 bit */
    43            DCO4 = 0x1000                       /*! Enable DCO4 bit */
    44        };
    45
    46        /*! DCO3 Bit */
    47        enum DCO3_t {
    48            DCO3_OFF = 0x0000,                  /*! Disable DCO3 bit */
    49            DCO3 = 0x0800                       /*! Enable DCO3 bit */
    50        };
    51
    52        /*! DCO2 Bit */
    53        enum DCO2_t {
    54            DCO2_OFF = 0x0000,                  /*! Disable DCO2 bit */
    55            DCO2 = 0x0400                       /*! Enable DCO2 bit */
    56        };
    57
    58        /*! DCO1 Bit */
    59        enum DCO1_t {
    60            DCO1_OFF = 0x0000,                  /*! Disable DCO1 bit */
    61            DCO1 = 0x0200                       /*! Enable DCO1 bit */
    62        };
    63
    64        /*! DCO0 Bit */
    65        enum DCO0_t {
    66            DCO0_OFF = 0x0000,                  /*! Disable DCO0 bit */
    67            DCO0 = 0x0100                       /*! Enable DCO0 bit */
    68        };
    69
    70        /*! MOD4 Bit */
    71        enum MOD4_t {
    72            MOD4_OFF = 0x0000,                  /*! Disable MOD4 bit */
    73            MOD4 = 0x0080                       /*! Enable MOD4 bit */
    74        };
    75
    76        /*! MOD3 Bit */
    77        enum MOD3_t {
    78            MOD3_OFF = 0x0000,                  /*! Disable MOD3 bit */
    79            MOD3 = 0x0040                       /*! Enable MOD3 bit */
    80        };
    81
    82        /*! MOD2 Bit */
    83        enum MOD2_t {
    84            MOD2_OFF = 0x0000,                  /*! Disable MOD2 bit */
    85            MOD2 = 0x0020                       /*! Enable MOD2 bit */
    86        };
    87
    88        /*! MOD1 Bit */
    89        enum MOD1_t {
    90            MOD1_OFF = 0x0000,                  /*! Disable MOD1 bit */
    91            MOD1 = 0x0010                       /*! Enable MOD1 bit */
    92        };
    93
    94        /*! MOD0 Bit */
    95        enum MOD0_t {
    96            MOD0_OFF = 0x0000,                  /*! Disable MOD0 bit */
    97            MOD0 = 0x0080                       /*! Enable MOD0 bit */
    98        };
    99
   100        /*! DCO frequency range select */
   101        enum DCORSEL_t {
   102            DCORSEL_0 = 0x0000,                 /*! DCORSEL_0 */
   103            DCORSEL_1 = 0x0010,                 /*! DCORSEL_1 */
   104            DCORSEL_2 = 0x0020,                 /*! DCORSEL_2 */
   105            DCORSEL_3 = 0x0030,                 /*! DCORSEL_3 */
   106            DCORSEL_4 = 0x0040,                 /*! DCORSEL_4 */
   107            DCORSEL_5 = 0x0050,                 /*! DCORSEL_5 */
   108            DCORSEL_6 = 0x0060,                 /*! DCORSEL_6 */
   109            DCORSEL_7 = 0x0070                  /*! DCORSEL_7 */
   110        };
   111
   112        /*! DISMOD Bit */
   113        enum DISMOD_t {
   114            DISMOD_OFF = 0x0000,                /*! Modulation enabled */
   115            DISMOD = 0x0001                     /*! Modulation disabled */
   116        };
   117
   118        /*! FLL Loop Divider */
   119        enum FLLD_t {
   120            FLLD_0 = 0x0000,                    /*! Multiply Selected Loop Freq. 1 */
   121            FLLD_1 = 0x1000,                    /*! Multiply Selected Loop Freq. 2 */
   122            FLLD_2 = 0x2000,                    /*! Multiply Selected Loop Freq. 4 */
   123            FLLD_3 = 0x3000,                    /*! Multiply Selected Loop Freq. 8 */
   124            FLLD_4 = 0x4000,                    /*! Multiply Selected Loop Freq. 16 */
   125            FLLD_5 = 0x5000,                    /*! Multiply Selected Loop Freq. 32 */
   126            FLLD_6 = 0x6000,                    /*! Multiply Selected Loop Freq. 32 */
   127            FLLD_7 = 0x7000                     /*! Multiply Selected Loop Freq. 32 */
   128        };
   129
   130        /*! FLL Multiplier Bit 0 */
   131        enum FLLN0_t {
   132            FLLN0_OFF = 0x0000,                 /*! Disable FLLN bit 0 */
   133            FLLN0 = 0x0001                      /*! Enable FLLN bit 0 */
   134        };
   135
   136        /*! FLL Multiplier Bit 1 */
   137        enum FLLN1_t {
   138            FLLN1_OFF = 0x0000,                 /*! Disable FLLN bit 1 */
   139            FLLN1 = 0x0002                      /*! Enable FLLN bit 1 */
   140        };
   141
   142        /*! FLL Multiplier Bit 2 */
   143        enum FLLN2_t {
   144            FLLN2_OFF = 0x0000,                 /*! Disable FLLN bit 2 */
   145            FLLN2 = 0x0004                      /*! Enable FLLN bit 2 */
   146        };
   147
   148        /*! FLL Multiplier Bit 3 */
   149        enum FLLN3_t {
   150            FLLN3_OFF = 0x0000,                 /*! Disable FLLN bit 3 */
   151            FLLN3 = 0x0008                      /*! Enable FLLN bit 3 */
   152        };
   153
   154        /*! FLL Multiplier Bit 4 */
   155        enum FLLN4_t {
   156            FLLN4_OFF = 0x0000,                 /*! Disable FLLN bit 4 */
   157            FLLN4 = 0x0010                      /*! Enable FLLN bit 4 */
   158        };
   159
   160        /*! FLL Multiplier Bit 5 */
   161        enum FLLN5_t {
   162            FLLN5_OFF = 0x0000,                 /*! Disable FLLN bit 5 */
   163            FLLN5 = 0x0020                      /*! Enable FLLN bit 5 */
   164        };
   165
   166        /*! FLL Multiplier Bit 6 */
   167        enum FLLN6_t {
   168            FLLN6_OFF = 0x0000,                 /*! Disable FLLN bit 6 */
   169            FLLN6 = 0x0040                      /*! Enable FLLN bit 6 */
   170        };
   171
   172        /*! FLL Multiplier Bit 7 */
   173        enum FLLN7_t {
   174            FLLN7_OFF = 0x0000,                 /*! Disable FLLN bit 7 */
   175            FLLN7 = 0x0080                      /*! Enable FLLN bit 7 */
   176        };
   177
   178        /*! FLL Multiplier Bit 8 */
   179        enum FLLN8_t {
   180            FLLN8_OFF = 0x0000,                 /*! Disable FLLN bit 8 */
   181            FLLN8 = 0x0100                      /*! Enable FLLN bit 8 */
   182        };
   183
   184        /*! FLL Multiplier Bit 9 */
   185        enum FLLN9_t {
   186            FLLN9_OFF = 0x0000,                 /*! Disable FLLN bit 9 */
   187            FLLN9 = 0x0200                      /*! Enable FLLN bit 9 */
   188        };
   189
   190        /*! FLL Reference Select */
   191        enum SELREF_t {
   192            SELREF_0 = 0x0000,                  /*! FLL Reference by XT1CLK */
   193            SELREF_1 = 0x0010,                  /*! Reserved */
   194            SELREF_2 = 0x0020,                  /*! FLL Reference by REFOCLK */
   195            SELREF_3 = 0x0030,                  /*! Reserved */
   196            SELREF_4 = 0x0040,                  /*! Reserved */
   197            SELREF_5 = 0x0050,                  /*! FLL Reference by XT2CLK */
   198            SELREF_6 = 0x0060,                  /*! Reserved */
   199            SELREF_7 = 0x0070                   /*! Reserved */
   200        };
   201
   202        /*! FLL Reference Divider */
   203        enum FLLREFDIV_t {
   204            FLLREFDIV_0 = 0x0000,               /*! f(FLLREFCLK) / 1 */
   205            FLLREFDIV_1 = 0x0001,               /*! f(FLLREFCLK) / 2 */
   206            FLLREFDIV_2 = 0x0002,               /*! f(FLLREFCLK) / 4 */
   207            FLLREFDIV_3 = 0x0003,               /*! f(FLLREFCLK) / 8 */
   208            FLLREFDIV_4 = 0x0004,               /*! f(FLLREFCLK) / 12 */
   209            FLLREFDIV_5 = 0x0005,               /*! f(FLLREFCLK) / 16 */
   210            FLLREFDIV_6 = 0x0006,               /*! Reserved */
   211            FLLREFDIV_7 = 0x0007                /*! Reserved */
   212        };
   213
   214        /*! Select the ACLK source */
   215        enum SELA_t {
   216            SELA_0 = 0x0000,                    /*! XT1CLK */
   217            SELA_1 = 0x0100,                    /*! VLOCLK */
   218            SELA_2 = 0x0200,                    /*! REFOCLK */
   219            SELA_3 = 0x0300,                    /*! DCOCLK */
   220            SELA_4 = 0x0400,                    /*! DCOCLKDIV */
   221            SELA_5 = 0x0500,                    /*! XT2CLK */
   222            SELA_6 = 0x0600,                    /*! Reserved */
   223            SELA_7 = 0x0700                     /*! Reserved */
   224        };
   225
   226        /*! Select the SMCLK source */
   227        enum SELS_t {
   228            SELS_0 = 0x0000,                    /*! XT1CLK */
   229            SELS_1 = 0x0010,                    /*! VLOCLK */
   230            SELS_2 = 0x0020,                    /*! REFOCLK */
   231            SELS_3 = 0x0030,                    /*! DCOCLK */
   232            SELS_4 = 0x0040,                    /*! DCOCLKDIV */
   233            SELS_5 = 0x0050,                    /*! XT2CLK */
   234            SELS_6 = 0x0060,                    /*! Reserved */
   235            SELS_7 = 0x0070                     /*! Reserved */
   236        };
   237
   238        /*! Select the MCLK source */
   239        enum SELM_t {
   240            SELM_0 = 0x0000,                    /*! XT1CLK */
   241            SELM_1 = 0x0001,                    /*! VLOCLK */
   242            SELM_2 = 0x0002,                    /*! REFOCLK */
   243            SELM_3 = 0x0003,                    /*! DCOCLK */
   244            SELM_4 = 0x0004,                    /*! DCOCLKDIV */
   245            SELM_5 = 0x0005,                    /*! XT2CLK */
   246            SELM_6 = 0x0006,                    /*! Reserved */
   247            SELM_7 = 0x0007                     /*! Reserved */
   248        };
   249
   250        /*! ACLK source divider available at external pin */
   251        enum DIVPA_t {
   252            DIVPA_0 = 0x0000,                   /*! Divide by 1 */
   253            DIVPA_1 = 0x1000,                   /*! Divide by 2 */
   254            DIVPA_2 = 0x2000,                   /*! Divide by 4 */
   255            DIVPA_3 = 0x3000,                   /*! Divide by 8 */
   256            DIVPA_4 = 0x4000,                   /*! Divide by 16 */
   257            DIVPA_5 = 0x5000,                   /*! Divide by 32 */
   258            DIVPA_6 = 0x6000,                   /*! Reserved */
   259            DIVPA_7 = 0x7000                    /*! Reserved */
   260        };
   261
   262        /*! ACLK source divider */
   263        enum DIVA_t {
   264            DIVA_0 = 0x0000,                    /*! Divide by 1 */
   265            DIVA_1 = 0x0100,                    /*! Divide by 2 */
   266            DIVA_2 = 0x0200,                    /*! Divide by 4 */
   267            DIVA_3 = 0x0300,                    /*! Divide by 8 */
   268            DIVA_4 = 0x0400,                    /*! Divide by 16 */
   269            DIVA_5 = 0x0500,                    /*! Divide by 32 */
   270            DIVA_6 = 0x0600,                    /*! Reserved */
   271            DIVA_7 = 0x0700                     /*! Reserved */
   272        };
   273
   274        /*! SMCLK source divider */
   275        enum DIVS_t {
   276            DIVS_0 = 0x0000,                    /*! Divide by 1 */
   277            DIVS_1 = 0x0010,                    /*! Divide by 2 */
   278            DIVS_2 = 0x0020,                    /*! Divide by 4 */
   279            DIVS_3 = 0x0030,                    /*! Divide by 8 */
   280            DIVS_4 = 0x0040,                    /*! Divide by 16 */
   281            DIVS_5 = 0x0050,                    /*! Divide by 32 */
   282            DIVS_6 = 0x0060,                    /*! Reserved */
   283            DIVS_7 = 0x0070                     /*! Reserved */
   284        };
   285
   286        /*! MCLK source divider */
   287        enum DIVM_t {
   288            DIVM_0 = 0x0000,                    /*! Divide by 1 */
   289            DIVM_1 = 0x0010,                    /*! Divide by 2 */
   290            DIVM_2 = 0x0020,                    /*! Divide by 4 */
   291            DIVM_3 = 0x0030,                    /*! Divide by 8 */
   292            DIVM_4 = 0x0040,                    /*! Divide by 16 */
   293            DIVM_5 = 0x0050,                    /*! Divide by 32 */
   294            DIVM_6 = 0x0060,                    /*! Reserved */
   295            DIVM_7 = 0x0070                     /*! Reserved */
   296        };
   297
   298        /*! XT2 oscillator current */
   299        enum XT2DRIVE_t {
   300            XT2DRIVE_0 = 0x0000,                /*! 4 MHz to 8 MHz */
   301            XT2DRIVE_1 = 0x4000,                /*! 8 MHz to 16 MHz */
   302            XT2DRIVE_2 = 0x8000,                /*! 16 MHz to 24 MHz */
   303            XT2DRIVE_3 = 0xC000                 /*! 24 MHz to 32 MHz */
   304        };
   305
   306        /*! XT2 bypass select */
   307        enum XT2BYPASS_t {
   308            XT2BYPASS_OFF = 0x0000,             /*! XT2 sourced internally */
   309            XT2BYPASS = 0x1000                  /*! XT2 sourced externally from pin */
   310        };
   311
   312        /*! Turns off the XT2 oscillator */
   313        enum XT2OFF_t {
   314            XT2OFF_OFF = 0x0000,                /*! Enable XT2 */
   315            XT2OFF = 0x0100                     /*! Disable XT2*/
   316        };
   317
   318        /*! XT1 oscillator current */
   319        enum XT1DRIVE_t {
   320            XT1DRIVE_0 = 0x0000,                /*! XT1 drive 0 */
   321            XT1DRIVE_1 = 0x0040,                /*! XT1 drive 1 */
   322            XT1DRIVE_2 = 0x0080,                /*! XT1 drive 2 */
   323            XT1DRIVE_3 = 0x00C0                 /*! XT1 drive 3 */
   324        };
   325
   326        /*! XTS mode select */
   327        enum XTS_t {
   328            XTS_OFF = 0x0000,                   /*! Low Frequency */
   329            XTS = 0x0020                        /*! High Frequency */
   330        };
   331
   332        /*! XT1 bypass select */
   333        enum XT1BYPASS_t {
   334            XT1BYPASS_OFF = 0x0000,             /*! XT1 sourced internally */
   335            XT1BYPASS = 0x0010                  /*! XT1 sourced externally from pin */
   336        };
   337
   338        /*! XT1 oscillator capacitor select */
   339        enum XCAP_t {
   340            XCAP_0 = 0x0000,                    /*! XT1 Cap 0 */
   341            XCAP_1 = 0x0004,                    /*! XT1 Cap 1 */
   342            XCAP_2 = 0x0008,                    /*! XT1 Cap 2 */
   343            XCAP_3 = 0x000C                     /*! XT1 Cap 3 */
   344        };
   345
   346        /*! SMCLK off */
   347        enum SMCLKOFF_t {
   348            SMCLKOFF_OFF = 0x0000,              /*! SMCLK on */
   349            SMCLKOFF = 0x0002                   /*! SMCLK off */
   350        };
   351
   352        /*! Turns off the XT1 oscillator */
   353        enum XT1OFF_t {
   354            XT1OFF_OFF = 0x0000,                /*! Enable XT1 */
   355            XT1OFF = 0x0001                     /*! Disable XT1 */
   356        };
   357
   358        /*! XT2 oscillator fault flag */
   359        enum XT2OFFG_t {
   360            XT2OFFG_OFF = 0x0000,               /*! No fault condition present */
   361            XT2OFFG = 0x0008                    /*! XT2 fault condition present */
   362        };
   363
   364        /*! XT1 high frequency oscillator fault flag */
   365        enum XT1HFOFFG_t {
   366            XT1HFOFFG_OFF = 0x0000,             /*! No fault condition present */
   367            XT1HFOFFG = 0x0004                  /*! XT1 HF fault condition present */
   368        };
   369
   370        /*! XT1 low frequency oscillator fault flag */
   371        enum XT1LFOFFG_t {
   372            XT1LFOFFG_OFF = 0x0000,             /*! No fault condition present */
   373            XT1LFOFFG = 0x0002                  /*! XT1 LF fault condition present */
   374        };
   375
   376        /*! DCO fault flag */
   377        enum DCOFFG_t {
   378            DCOFFG_OFF = 0x0000,                /*! No fault condition present */
   379            DCOFFG = 0x0001                     /*! DCO fault condition present */
   380        };
   381
   382        /*! MODOSC clock request enable */
   383        enum MODOSCREQEN_t {
   384            MODOSCREQEN_OFF = 0x0000,           /*! MODOSC conditional requests are disabled */
   385            MODOSCREQEN = 0x0008                /*! MODOSC conditional requests are enabled */
   386        };
   387
   388        /*! SMCLK clock request enable */
   389        enum SMCLKREQEN_t {
   390            SMCLKREQEN_OFF = 0x0000,            /*! SMCLK conditional requests are disabled */
   391            SMCLKREQEN = 0x0004                 /*! SMCLK conditional requests are enabled */
   392        };
   393
   394        /*! MCLK clock request enable */
   395        enum MCLKREQEN_t {
   396            MCLKREQEN_OFF = 0x0000,             /*! MCLK conditional requests are disabled */
   397            MCLKREQEN = 0x0002                  /*! MCLK conditional requests are enabled */
   398        };
   399
   400        /*! ACLK clock request enable */
   401        enum ACLKREQEN_t {
   402            ACLKREQEN_OFF = 0x0000,             /*! ACLK conditional requests are disabled */
   403            ACLKREQEN = 0x0001                  /*! ACLK conditional requests are enabled */
   404        };
   405
   406        /*! Selects XT2 bypass input swing level */
   407        enum XT2BYPASSLV_t {
   408            XT2BYPASSLV_OFF = 0x0000,           /*! Input range from 0 to DVCC */
   409            XT2BYPASSLV = 0x0002                /*! Input range from 0 to DVIO */
   410        };
   411
   412        /*! Selects XT1 bypass input swing level */
   413        enum XT1BYPASSLV_t {
   414            XT1BYPASSLV_OFF = 0x0000,           /*! Input range from 0 to DVCC */
   415            XT1BYPASSLV = 0x0001                /*! Input range from 0 to DVIO */
   416        };
   417
   418        /*!
   419         *  ======== UCSCTL0_t ========
   420         *  Unified Clock System Control 0 Register
   421         *
   422         *  @field(DCO) DCO tap selection.
   423         *  @field(MOD) Modulation bit counter.
   424         */
   425        struct UCSCTL0_t {
   426            DCO0_t   DCO0;                      /*! DCO tap selection bit 0 */
   427            DCO1_t   DCO1;                      /*! DCO tap selection bit 1 */
   428            DCO2_t   DCO2;                      /*! DCO tap selection bit 2 */
   429            DCO3_t   DCO3;                      /*! DCO tap selection bit 3 */
   430            DCO4_t   DCO4;                      /*! DCO tap selection bit 4 */
   431            MOD0_t   MOD0;                      /*! Modulation bit counter bit 0 */
   432            MOD1_t   MOD1;                      /*! Modulation bit counter bit 1 */
   433            MOD2_t   MOD2;                      /*! Modulation bit counter bit 2 */
   434            MOD3_t   MOD3;                      /*! Modulation bit counter bit 3 */
   435            MOD4_t   MOD4;                      /*! Modulation bit counter bit 4 */
   436        }
   437
   438        /*!
   439         *  ======== UCSCTL1_t ========
   440         *  Unified Clock System Control 1 Register
   441         *
   442         *  @field(DCORSEL) DCO frequency range select. These bits select the DCO frequency range of operation defined in the
   443         *                  device-specific datasheet.
   444         *  @field(DISMOD)  0 Modulation enabled, 1 Modulation disabled.
   445         */
   446        struct UCSCTL1_t {
   447            DCORSEL_t   DCORSEL;                /*! DCO frequency range select. These bits select the DCO frequency range of operation defined in the
   448                                                 * device-specific datasheet. */
   449            DISMOD_t    DISMOD;                 /*! Modulation. This bit enables/disables the modulation.
   450                                                 *  0  Modulation enabled
   451                                                 *  1  Modulation disabled */
   452        }
   453
   454        /*!
   455         *  ======== UCSCTL2_t ========
   456         *  Unified Clock System Control 2 Register
   457         *
   458         *  @field(FLLD) FLL loop divider. These bits divide fDCOCLK in the FLL feedback loop. This results in an additional multiplier
   459         *               for the multiplier bits.
   460         *  @field(FLLN) Multiplier bits. These bits set the multiplier value N of the DCO. N must be greater than 0. Writing zero to
   461         *               FLLN causes N to be set to 1.
   462         */
   463        struct UCSCTL2_t {
   464            FLLD_t      FLLD;                   /*! FLL loop divider. These bits divide fDCOCLK in the FLL feedback loop. This results in an additional multiplier
   465                                                 * for the multiplier bits. See also multiplier bits.
   466                                                 *  000  fDCOCLK/1
   467                                                 *  001  fDCOCLK/2
   468                                                 *  010  fDCOCLK/4
   469                                                 *  011  fDCOCLK/8
   470                                                 *  100  fDCOCLK/16
   471                                                 *  101  fDCOCLK/32
   472                                                 *  110  Reserved for future use. Defaults to fDCOCLK/32
   473                                                 *  111  Reserved for future use. Defaults to fDCOCLK/32 */
   474            FLLN0_t     FLLN0;                  /*! Multiplier bit 0 */
   475            FLLN1_t     FLLN1;                  /*! Multiplier bit 1 */
   476            FLLN2_t     FLLN2;                  /*! Multiplier bit 2 */
   477            FLLN3_t     FLLN3;                  /*! Multiplier bit 3 */
   478            FLLN4_t     FLLN4;                  /*! Multiplier bit 4 */
   479            FLLN5_t     FLLN5;                  /*! Multiplier bit 5 */
   480            FLLN6_t     FLLN6;                  /*! Multiplier bit 6 */
   481            FLLN7_t     FLLN7;                  /*! Multiplier bit 7 */
   482            FLLN8_t     FLLN8;                  /*! Multiplier bit 8 */
   483            FLLN9_t     FLLN9;                  /*! Multiplier bit 9 */
   484        }
   485
   486        /*!
   487         *  ======== UCSCTL3_t ========
   488         *  Unified Clock System Control 3 Register
   489         *
   490         *  @field(SELREF) FLL reference select. These bits select the FLL reference clock source.
   491         *  @field(FLLREFDIV) FLL reference divider. These bits define the divide factor for fFLLREFCLK. The divided frequency is used as the
   492         *                    FLL reference frequency.
   493         */
   494        struct UCSCTL3_t {
   495            SELREF_t    SELREF;                 /*! FLL reference select. These bits select the FLL reference clock source.
   496                                                 *  000  XT1CLK
   497                                                 *  001  Reserved for future use. Defaults to XT1CLK.
   498                                                 *  010  REFOCLK
   499                                                 *  011  Reserved for future use. Defaults to REFOCLK.
   500                                                 *  100  Reserved for future use. Defaults to REFOCLK.
   501                                                 *  101  XT2CLK when available, otherwise REFOCLK.
   502                                                 *  110  Reserved for future use. XT2CLK when available, otherwise REFOCLK.
   503                                                 *  111  No selection. For the 'F543x and 'F541x non-A versions only, this defaults to XT2CLK. Reserved for
   504                                                 *       future use. XT2CLK when available, otherwise REFOCLK. */
   505            FLLREFDIV_t FLLREFDIV;              /*! FLL reference divider. These bits define the divide factor for fFLLREFCLK. The divided frequency is used as the
   506                                                 *  FLL reference frequency.
   507                                                 *  000  fFLLREFCLK/1
   508                                                 *  001  fFLLREFCLK/2
   509                                                 *  010  fFLLREFCLK/4
   510                                                 *  011  fFLLREFCLK/8
   511                                                 *  100  fFLLREFCLK/12
   512                                                 *  101  fFLLREFCLK/16
   513                                                 *  110  Reserved for future use. Defaults to fFLLREFCLK/16.
   514                                                 *  111  Reserved for future use. Defaults to fFLLREFCLK/16. */
   515        }
   516
   517        /*!
   518         *  ======== UCSCTL4_t ========
   519         *  Unified Clock System Control 4 Register
   520         *
   521         *  @field(SELA) Selects the ACLK source
   522         *  @field(SELS) Selects the SMCLK source
   523         *  @field(SELM) Selects the MCLK source
   524         */
   525         struct UCSCTL4_t {
   526           SELA_t       SELA;                   /*! Selects the ACLK source
   527                                                 *  000  XT1CLK
   528                                                 *  001  VLOCLK
   529                                                 *  010  REFOCLK
   530                                                 *  011  DCOCLK
   531                                                 *  100  DCOCLKDIV
   532                                                 *  101  XT2CLK when available, otherwise DCOCLKDIV
   533                                                 *  110  Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV.
   534                                                 *  111  Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. */
   535           SELS_t       SELS;                   /*! Selects the SMCLK source
   536                                                 *  000  XT1CLK
   537                                                 *  001  VLOCLK
   538                                                 *  010  REFOCLK
   539                                                 *  011  DCOCLK
   540                                                 *  100  DCOCLKDIV
   541                                                 *  101  XT2CLK when available, otherwise DCOCLKDIV
   542                                                 *  110  Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV.
   543                                                 *  111  Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. */
   544           SELM_t       SELM;                   /*! Selects the MCLK source
   545                                                 *  000  XT1CLK
   546                                                 *  001  VLOCLK
   547                                                 *  010  REFOCLK
   548                                                 *  011  DCOCLK
   549                                                 *  100  DCOCLKDIV
   550                                                 *  101  XT2CLK when available, otherwise DCOCLKDIV
   551                                                 *  110  Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV.
   552                                                 *  111  Reserved for future use. Defaults to XT2CLK when available, otherwise DCOCLKDIV. */
   553        }
   554
   555        /*!
   556         *  ======== UCSCTL5_t ========
   557         *  Unified Clock System Control 5 Register
   558         *
   559         *  @field(SELA) Selects the ACLK source
   560         *  @field(SELS) Selects the SMCLK source
   561         *  @field(SELM) Selects the MCLK source
   562         */
   563        struct UCSCTL5_t {
   564            DIVPA_t     DIVPA;                  /*! ACLK source divider available at external pin. Divides the frequency of ACLK and presents it to an external pin.
   565                                                 *  000  fACLK/1
   566                                                 *  001  fACLK/2
   567                                                 *  010  fACLK/4
   568                                                 *  011  fACLK/8
   569                                                 *  100  fACLK/16
   570                                                 *  101  fACLK/32
   571                                                 *  110  Reserved for future use. Defaults to fACLK/32.
   572                                                 *  111  Reserved for future use. Defaults to fACLK/32. */
   573            DIVA_t      DIVA;                   /*! ACLK source divider. Divides the frequency of the ACLK clock source.
   574                                                 *  000  fACLK/1
   575                                                 *  001  fACLK/2
   576                                                 *  010  fACLK/4
   577                                                 *  011  fACLK/8
   578                                                 *  100  fACLK/16
   579                                                 *  101  fACLK/32
   580                                                 *  110  Reserved for future use. Defaults to fACLK/32.
   581                                                 *  111  Reserved for future use. Defaults to fACLK/32. */
   582            DIVS_t      DIVS;                   /*! SMCLK source divider
   583                                                 *  000  fSMCLK/1
   584                                                 *  001  fSMCLK/2
   585                                                 *  010  fSMCLK/4
   586                                                 *  011  fSMCLK/8
   587                                                 *  100  fSMCLK/16
   588                                                 *  101  fSMCLK/32
   589                                                 *  110  Reserved for future use. Defaults to fSMCLK/32.
   590                                                 *  111  Reserved for future use. Defaults to fSMCLK/32. */
   591            DIVM_t      DIVM;                   /*! MCLK source divider
   592                                                 *  000  fMCLK/1
   593                                                 *  001  fMCLK/2
   594                                                 *  010  fMCLK/4
   595                                                 *  011  fMCLK/8
   596                                                 *  100  fMCLK/16
   597                                                 *  101  fMCLK/32
   598                                                 *  110  Reserved for future use. Defaults to fMCLK/32.
   599                                                 *  111  Reserved for future use. Defaults to fMCLK/32.*/
   600        }
   601
   602        /*!
   603         *  ======== UCSCTL6_t ========
   604         *  Unified Clock System Control 6 Register
   605         *
   606         *  @field(SELA) Selects the ACLK source
   607         *  @field(SELS) Selects the SMCLK source
   608         *  @field(SELM) Selects the MCLK source
   609         */
   610        struct UCSCTL6_t {
   611            XT2DRIVE_t  XT2DRIVE;               /*! The XT2 oscillator current can be adjusted to its drive needs. Initially, it starts with the highest supply current
   612                                                 *  for reliable and quick startup. If needed, user software can reduce the drive strength.
   613                                                 *  00  Lowest current consumption. XT2 oscillator operating range is 4 MHz to 8 MHz.
   614                                                 *  01  Increased drive strength XT2 oscillator. XT2 oscillator operating range is 8 MHz to 16 MHz.
   615                                                 *  10  Increased drive capability XT2 oscillator. XT2 oscillator operating range is 16 MHz to 24 MHz.
   616                                                 *  11  Maximum drive capability and maximum current consumption for both XT2 oscillator. XT2 oscillator
   617                                                 *      operating range is 24 MHz to 32 MHz. */
   618            XT2BYPASS_t XT2BYPASS;              /*! XT2 bypass select
   619                                                 *  0  XT2 sourced internally
   620                                                 *  1  XT2 sourced externally from pin */
   621            XT2OFF_t    XT2OFF;                 /*! Turns off the XT2 oscillator
   622                                                 *  0  XT2 is on if XT2 is selected via the port selection and XT2 is not in bypass mode of operation.
   623                                                 *  1  XT2 is off if it is not used as a source for ACLK, MCLK, or SMCLK or is not used as a reference source
   624                                                 *     required for FLL operation. */
   625            XT1DRIVE_t  XT1DRIVE;               /*! The XT1 oscillator current can be adjusted to its drive needs. Initially, it starts with the highest supply current
   626                                                 *  for reliable and quick startup. If needed, user software can reduce the drive strength.
   627                                                 *  00  Lowest current consumption for XT1 LF mode. XT1 oscillator operating range in HF mode is 4 MHz to
   628                                                 *      8 MHz.
   629                                                 *  01  Increased drive strength for XT1 LF mode. XT1 oscillator operating range in HF mode is 8 MHz to
   630                                                 *      16 MHz.
   631                                                 *  10  Increased drive capability for XT1 LF mode. XT1 oscillator operating range in HF mode is 16 MHz to
   632                                                 *      24 MHz.
   633                                                 *  11  Maximum drive capability and maximum current consumption for XT1 LF mode. XT1 oscillator operating
   634                                                 *      range in HF mode is 24 MHz to 32 MHz. */
   635            XTS_t       XTS;                    /*! XT1 mode select
   636                                                 *  0  Low-frequency mode. XCAP bits define the capacitance at the XIN and XOUT pins.
   637                                                 *  1  High-frequency mode. XCAP bits are not used. */
   638            XT1BYPASS_t XT1BYPASS;              /*! XT1 bypass select
   639                                                 *  0  XT1 sourced internally
   640                                                 *  1  XT1 sourced externally from pin */
   641            XCAP_t      XCAP;                   /*! Oscillator capacitor selection. These bits select the capacitors applied to the LF crystal or resonator in the LF
   642                                                 * mode (XTS = 0). The effective capacitance (seen by the crystal) is Ceff (CXIN + 2 pF)/2. It is assumed that
   643                                                 * CXIN = CXOUT and that a parasitic capacitance of 2 pF is added by the package and the printed circuit board. For
   644                                                 * details about the typical internal and the effective capacitors, refer to the device-specific data sheet. */
   645            SMCLKOFF_t  SMCLKOFF;               /*! SMCLK off. This bit turns off the SMCLK.
   646                                                 *  0  SMCLK on
   647                                                 *  1  SMCLK off */
   648            XT1OFF_t    XT1OFF;                 /*! XT1 off. This bit turns off the XT1.
   649                                                 *  0  XT1 is on if XT1 is selected via the port selection and XT1 is not in bypass mode of operation.
   650                                                 *  1  XT1 is off if it is not used as a source for ACLK, MCLK, or SMCLK or is not used as a reference source
   651                                                 *     required for FLL operation. */
   652        }
   653
   654        /*!
   655         *  ======== UCSCTL7_t ========
   656         *  Unified Clock System Control 7 Register
   657         *
   658         *  @field(XT2OFFG) 0 No fault condition, 1 XT2 fault
   659         *  @field(XT1HFOFFG) 0 No fault condition, 1 XT1 HF fault
   660         *  @field(XT1LFOFFG) 0 No fault condition, 1 XT1 LF fault
   661         *  @field(DCOFFG) 0 No fault condition, 1 DCO fault
   662         */
   663        struct UCSCTL7_t {
   664            XT2OFFG_t   XT2OFFG;                /*! XT2 oscillator fault flag. If this bit is set, the OFIFG flag is also set. XT2OFFG is set if a XT2 fault
   665                                                 * condition exists. XT2OFFG can be cleared via software. If the XT2 fault condition still remains,
   666                                                 * XT2OFFG is set.
   667                                                 *  0  No fault condition occurred after the last reset.
   668                                                 *  1  XT2 fault. An XT2 fault occurred after the last reset. */
   669            XT1HFOFFG_t XT1HFOFFG;              /*! XT1 oscillator fault flag (HF mode). If this bit is set, the OFIFG flag is also set. XT1HFOFFG is set if a
   670                                                 * XT1 fault condition exists. XT1HFOFFG can be cleared via software. If the XT1 fault condition still
   671                                                 * remains, XT1HFOFFG is set.
   672                                                 *  0  No fault condition occurred after the last reset.
   673                                                 *  1  XT1 fault. An XT1 fault occurred after the last reset. */
   674            XT1LFOFFG_t XT1LFOFFG;              /*! XT1 oscillator fault flag (LF mode). If this bit is set, the OFIFG flag is also set. XT1LFOFFG is set if a
   675                                                 * XT1 fault condition exists. XT1LFOFFG can be cleared via software. If the XT1 fault condition still
   676                                                 * remains, XT1LFOFFG is set.
   677                                                 *  0  No fault condition occurred after the last reset.
   678                                                 *  1  XT1 fault (LF mode). A XT1 fault occurred after the last reset. */
   679            DCOFFG_t    DCOFFG;                 /*! DCO fault flag. If this bit is set, the OFIFG flag is also set. The DCOFFG bit is set if DCO = {0} or
   680                                                 * DCO = {31}. DCOFFG can be cleared via software. If the DCO fault condition still remains, DCOFFG is
   681                                                 * set.
   682                                                 *  0  No fault condition occurred after the last reset.
   683                                                 *  1  DCO fault. A DCO fault occurred after the last reset. */
   684        }
   685
   686        /*!
   687         *  ======== UCSCTL8_t ========
   688         *  Unified Clock System Control 8 Register
   689         *
   690         *  @field(MODOSCREQEN) 0  MODOSC conditional requests are disabled
   691         *                      1  MODOSC conditional requests are enabled
   692         *  @field(SMCLKREQEN)  0  SMCLK conditional requests are disabled
   693         *                      1  SMCLK conditional requests are enabled
   694         *  @field(MCLKREQEN)   0  MCLK conditional requests are disabled
   695         *                      1  MCLK conditional requests are enabled
   696         *  @field(ACLKREQEN)   0  ACLK conditional requests are disabled
   697         *                      1  ACLK conditional requests are enabled
   698         */
   699        struct UCSCTL8_t {
   700            MODOSCREQEN_t   MODOSCREQEN;        /*! MODOSC clock request enable. Setting this enables conditional module requests for MODOSC.
   701                                                 *  0  MODOSC conditional requests are disabled.
   702                                                 *  1  MODOSC conditional requests are enabled. */
   703            SMCLKREQEN_t    SMCLKREQEN;         /*! SMCLK clock request enable. Setting this enables conditional module requests for SMCLK.
   704                                                 *  0  SMCLK conditional requests are disabled.
   705                                                 *  1  SMCLK conditional requests are enabled. */
   706            MCLKREQEN_t     MCLKREQEN;          /*! MCLK clock request enable. Setting this enables conditional module requests for MCLK
   707                                                 *  0  MCLK conditional requests are disabled.
   708                                                 *  1  MCLK conditional requests are enabled. */
   709            ACLKREQEN_t     ACLKREQEN;          /*! ACLK clock request enable. Setting this enables conditional module requests for ACLK
   710                                                 *  0  ACLK conditional requests are disabled.
   711                                                 *  1  ACLK conditional requests are enabled. */
   712        }
   713
   714        /*!
   715         *  ======== UCSCTL9_t ========
   716         *  Unified Clock System Control 9 Register
   717         *
   718         *  @field(XT2BYPASSLV) 0  Input range from 0 to DVCC
   719         *                      1  Input range from 0 to DVIO
   720         *  @field(XT1BYPASSLV) 0  Input range from 0 to DVCC
   721         *                      1  Input range from 0 to DVIO
   722         */
   723        struct UCSCTL9_t {
   724            XT2BYPASSLV_t   XT2BYPASSLV;        /*! Selects XT2 bypass input swing level. Must be set for reduced swing operation.
   725                                                 *  0  Input range from 0 to DVCC
   726                                                 *  1  Input range from 0 to DVIO */
   727            XT1BYPASSLV_t   XT1BYPASSLV;        /*! Selects XT1 bypass input swing level. Must be set for reduced swing operation.
   728                                                 *  0  Input range from 0 to DVCC
   729                                                 *  1  Input range from 0 to DVIO */
   730        }
   731
   732    /*
   733     * Driverlib definitions
   734     */
   735        /*! Select the clock source */
   736        enum UCS_CLK_SOURCE_t {
   737            UCS_XT1CLK_SELECT = 0x0000,         /*! XT1CLK */
   738            UCS_VLOCLK_SELECT = 0x0010,         /*! VLOCLK */
   739            UCS_REFOCLK_SELECT = 0x0020,        /*! REFOCLK */
   740            UCS_DCOCLK_SELECT = 0x0030,         /*! DCOCLK */
   741            UCS_DCOCLKDIV_SELECT = 0x0040,      /*! DCOCLKDIV */
   742            UCS_XT2CLK_SELECT = 0x0050          /*! XT2CLK */
   743        };
   744
   745        /*! Select clock source divider */
   746        enum UCS_CLK_SRC_DIVIDER_t {
   747            UCS_CLOCK_DIVIDER_1 = 0x0000,       /*! Divide by 1 */
   748            UCS_CLOCK_DIVIDER_2 = 0x0010,       /*! Divide by 2 */
   749            UCS_CLOCK_DIVIDER_4 = 0x0020,       /*! Divide by 4 */
   750            UCS_CLOCK_DIVIDER_8 = 0x0030,       /*! Divide by 8 */
   751            UCS_CLOCK_DIVIDER_12 = 0x0040,      /*! Divide by 12 */
   752            UCS_CLOCK_DIVIDER_16 = 0x0050,      /*! Divide by 16 */
   753            UCS_CLOCK_DIVIDER_32 = 0x0060       /*! Divide by 32 */
   754        };
   755
   756        /*! XT1 oscillator capacitor select */
   757        enum UCS_XCAP_t {
   758            UCS_XCAP_0 = 0x0000,                /*! ~ 2 pF */
   759            UCS_XCAP_1 = 0x0004,                /*! ~ 5.5 pF */
   760            UCS_XCAP_2 = 0x0008,                /*! ~ 8.5 pF */
   761            UCS_XCAP_3 = 0x000C                 /*! ~ 12 pF */
   762        };
   763
   764    instance:
   765
   766        /*! Unified Clock System Control 0 Register */
   767        config UCSCTL0_t UCSCTL0 = {
   768            DCO0        : DCO0_OFF,
   769            DCO1        : DCO1_OFF,
   770            DCO2        : DCO2_OFF,
   771            DCO3        : DCO3_OFF,
   772            DCO4        : DCO4_OFF,
   773            MOD0        : MOD0_OFF,
   774            MOD1        : MOD1_OFF,
   775            MOD2        : MOD2_OFF,
   776            MOD3        : MOD3_OFF,
   777            MOD4        : MOD4_OFF,
   778        };
   779
   780        /*! Unified Clock System Control 1 Register */
   781        config UCSCTL1_t UCSCTL1 = {
   782            DCORSEL     : DCORSEL_2,
   783            DISMOD      : DISMOD_OFF,
   784        };
   785
   786        /*! Unified Clock System Control 2 Register */
   787        config UCSCTL2_t UCSCTL2 = {
   788            FLLD        : FLLD_1,
   789            FLLN0       : FLLN0,
   790            FLLN1       : FLLN1,
   791            FLLN2       : FLLN2,
   792            FLLN3       : FLLN3,
   793            FLLN4       : FLLN4,
   794            FLLN5       : FLLN5_OFF,
   795            FLLN6       : FLLN6_OFF,
   796            FLLN7       : FLLN7_OFF,
   797            FLLN8       : FLLN8_OFF,
   798            FLLN9       : FLLN9_OFF,
   799        };
   800
   801        /*! Unified Clock System Control 3 Register */
   802        config UCSCTL3_t UCSCTL3 = {
   803            SELREF      : SELREF_0,
   804            FLLREFDIV   : FLLREFDIV_0,
   805        };
   806
   807        /*! Unified Clock System Control 4 Register */
   808        config UCSCTL4_t UCSCTL4 = {
   809            SELA        : SELA_0,
   810            SELS        : SELS_4,
   811            SELM        : SELM_4,
   812        };
   813
   814        /*! Unified Clock System Control 5 Register */
   815        config UCSCTL5_t UCSCTL5 = {
   816            DIVPA       : DIVPA_0,
   817            DIVA        : DIVA_0,
   818            DIVS        : DIVS_0,
   819            DIVM        : DIVM_0,
   820        };
   821
   822        /*! Unified Clock System Control 6 Register */
   823        config UCSCTL6_t UCSCTL6 = {
   824            XT2DRIVE    : XT2DRIVE_3,
   825            XT2BYPASS   : XT2BYPASS_OFF,
   826            XT2OFF      : XT2OFF,
   827            XT1DRIVE    : XT1DRIVE_3,
   828            XTS         : XTS,
   829            XT1BYPASS   : XT1BYPASS,
   830            XCAP        : XCAP_3,
   831            SMCLKOFF    : SMCLKOFF_OFF,
   832            XT1OFF      : XT1OFF,
   833        };
   834
   835        /*! Unified Clock System Control 7 Register */
   836        config UCSCTL7_t UCSCTL7 = {
   837            XT2OFFG     : XT2OFFG_OFF,
   838            XT1HFOFFG   : XT1HFOFFG_OFF,
   839            XT1LFOFFG   : XT1LFOFFG,
   840            DCOFFG      : DCOFFG,
   841        };
   842
   843        /*! Unified Clock System Control 8 Register */
   844        config UCSCTL8_t UCSCTL8 = {
   845            MODOSCREQEN : MODOSCREQEN_OFF,
   846            SMCLKREQEN  : SMCLKREQEN,
   847            MCLKREQEN   : MCLKREQEN,
   848            ACLKREQEN   : ACLKREQEN,
   849        };
   850
   851        /*! Unified Clock System Control 9 Register */
   852        config UCSCTL9_t UCSCTL9 = {
   853            XT2BYPASSLV : XT2BYPASSLV_OFF,
   854            XT1BYPASSLV : XT1BYPASSLV_OFF,
   855        };
   856
   857        /*! MCLK clock source select */
   858        config UCS_CLK_SOURCE_t UCS_MCLK_SOURCE = UCS_DCOCLKDIV_SELECT;
   859
   860        /*! SMCLK clock source select */
   861        config UCS_CLK_SOURCE_t UCS_SMCLK_SOURCE = UCS_DCOCLKDIV_SELECT;
   862
   863        /*! ACLK clock source select */
   864        config UCS_CLK_SOURCE_t UCS_ACLK_SOURCE = UCS_XT1CLK_SELECT;
   865
   866        /*! FLL reference clock source select */
   867        config UCS_CLK_SOURCE_t UCS_FLL_REF_CLK_SOURCE = UCS_XT1CLK_SELECT;
   868
   869        /*! MCLK clock source divider select */
   870        config UCS_CLK_SRC_DIVIDER_t UCS_MCLK_SRC_DIVIDER = UCS_CLOCK_DIVIDER_1;
   871
   872        /*! SMCLK clock source divider select */
   873        config UCS_CLK_SRC_DIVIDER_t UCS_SMCLK_SRC_DIVIDER = UCS_CLOCK_DIVIDER_1;
   874
   875        /*! ACLK clock source divider select */
   876        config UCS_CLK_SRC_DIVIDER_t UCS_ACLK_SRC_DIVIDER = UCS_CLOCK_DIVIDER_1;
   877
   878        /*! External pin ACLK clock source divider select */
   879        config UCS_CLK_SRC_DIVIDER_t UCS_PACLK_SRC_DIVIDER = UCS_CLOCK_DIVIDER_1;
   880
   881        /*! FLL reference clock source divider select */
   882        config UCS_CLK_SRC_DIVIDER_t UCS_FLL_REF_SRC_DIVIDER = UCS_CLOCK_DIVIDER_1;
   883
   884        /*! FLLN value */
   885        config UInt UCS_FLL_RATIO = 31;
   886
   887        /*! Set FLL target frequency */
   888        config Float UCS_FLL_FREQ = 0;
   889
   890        /*! Set XT1 drive strength */
   891        config XT1DRIVE_t UCS_XT1_DRIVE = XT1DRIVE_3;
   892
   893        /*! Set XT2 drive strength */
   894        config XT2DRIVE_t UCS_XT2_DRIVE = XT2DRIVE_3;
   895
   896        /*! Set oscillator capacitor. Available only in LF mode. See device-specific datasheet for actual values. */
   897        config UCS_XCAP_t UCS_XCAP = UCS_XCAP_3;
   898
   899        /*! Set XT1 in bypass mode. The frequency input at XIN1 pin requires 0 to VCC. */
   900        config Bool UCS_XT1BYPASS = false;
   901
   902        /*! Set XT2 in bypass mode. The frequency input at XIN2 pin requires 0 to VCC. */
   903        config Bool UCS_XT2BYPASS = false;
   904
   905        /*! MODOSC clock request enable. Setting this enables conditional module requests for MODOSC.
   906         *  0  MODOSC conditional requests are disabled.
   907         *  1  MODOSC conditional requests are enabled. */
   908        config MODOSCREQEN_t UCS_MODOSCREQEN = MODOSCREQEN_OFF;
   909
   910        /*! SMCLK clock request enable. Setting this enables conditional module requests for SMCLK.
   911         *  0  SMCLK conditional requests are disabled.
   912         *  1  SMCLK conditional requests are enabled. */
   913        config SMCLKREQEN_t UCS_SMCLKREQEN = SMCLKREQEN;
   914
   915        /*! MCLK clock request enable. Setting this enables conditional module requests for MCLK
   916         *  0  MCLK conditional requests are disabled.
   917         *  1  MCLK conditional requests are enabled. */
   918        config MCLKREQEN_t UCS_MCLKREQEN = MCLKREQEN;
   919
   920        /*! ACLK clock request enable. Setting this enables conditional module requests for ACLK
   921         *  0  ACLK conditional requests are disabled.
   922         *  1  ACLK conditional requests are enabled. */
   923        config ACLKREQEN_t UCS_ACLKREQEN = ACLKREQEN;
   924
   925        /*! Turns OFF SMCLK using the SMCLKOFF bit
   926         *  0  SMCLK On
   927         *  1  SMCLK Off */
   928        config Bool UCS_SMCLKOFF = false;
   929
   930        config Float VLOCLKHz = 12000;
   931        config Float WATCHCRYSTALCLKHz = 32768;
   932        config Float REFOCLKHz = 32768;
   933        config Float XT1CLKHz = 0;
   934        config Float XT2CLKHz = 0;
   935
   936        /*!
   937         *  ======== DCOCLKDIVHz ========
   938         *  Divided DCO clock frequency in Hertz
   939         */
   940        readonly config Float DCOCLKDIVHz;
   941
   942        /*! Determine if each Register needs to be forced set or not */
   943        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   944        [
   945            { register : "UCS_SMCLKREQEN"  , regForceSet : false },
   946            { register : "UCS_MCLKREQEN" , regForceSet : false },
   947            { register : "UCS_ACLKREQEN" , regForceSet : false },
   948            { register : "UCS_MODOSCREQEN" , regForceSet : false }
   949        ];
   950    }


module ti.catalog.msp430.peripherals.communication.EUSCI_A0

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Enhanced Univerisal Serial Communication Interface A0
    37     */
    38    metaonly module EUSCI_A0 inherits IEUSCI {
    39
    40        /*
    41         *  ======== create ========
    42         */
    43        create(IClock.Instance clock);
    44
    45    instance:
    46        /*! @_nodoc */
    47        config IClock.Instance clock;
    48
    49        /*!
    50         *  ======== baseAddr ========
    51         *  Address of the peripheral's control register.
    52         *
    53         *  A peripheral's registers are commonly accessed through a structure
    54         *  that defines the offsets of a particular register from the lowest
    55         *  address mapped to a peripheral. That lowest address is specified by
    56         *  this parameter.
    57         */
    58        config UInt baseAddr;
    59
    60        /*! USI interrupt enables */
    61        config regIntVect_t interruptSource[2];
    62
    63        /*! Determine if each Register needs to be forced set or not */
    64        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    65        [
    66        ];
    67    }


module ti.catalog.msp430.peripherals.communication.EUSCI_A1

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Enhanced Univerisal Serial Communication Interface A1
    37     */
    38    metaonly module EUSCI_A1 inherits IEUSCI {
    39
    40        /*
    41         *  ======== create ========
    42         */
    43        create(IClock.Instance clock);
    44
    45    instance:
    46        /*! @_nodoc */
    47        config IClock.Instance clock;
    48
    49        /*!
    50         *  ======== baseAddr ========
    51         *  Address of the peripheral's control register.
    52         *
    53         *  A peripheral's registers are commonly accessed through a structure
    54         *  that defines the offsets of a particular register from the lowest
    55         *  address mapped to a peripheral. That lowest address is specified by
    56         *  this parameter.
    57         */
    58        config UInt baseAddr;
    59
    60        /*! USI interrupt enables */
    61        config regIntVect_t interruptSource[2];
    62
    63        /*! Determine if each Register needs to be forced set or not */
    64        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    65        [
    66        ];
    67    }


module ti.catalog.msp430.peripherals.communication.EUSCI_B0

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Enhanced Univerisal Serial Communication Interface B0
    37     */
    38    metaonly module EUSCI_B0 inherits IEUSCI {
    39
    40        /*
    41         *  ======== create ========
    42         */
    43        create(IClock.Instance clock);
    44
    45    instance:
    46        /*! @_nodoc */
    47        config IClock.Instance clock;
    48
    49        /*!
    50         *  ======== baseAddr ========
    51         *  Address of the peripheral's control register.
    52         *
    53         *  A peripheral's registers are commonly accessed through a structure
    54         *  that defines the offsets of a particular register from the lowest
    55         *  address mapped to a peripheral. That lowest address is specified by
    56         *  this parameter.
    57         */
    58        config UInt baseAddr;
    59
    60        /*! USI interrupt enables */
    61        config regIntVect_t interruptSource[13];
    62
    63        /*! Determine if each Register needs to be forced set or not */
    64        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    65        [
    66        ];
    67    }


interface ti.catalog.msp430.peripherals.communication.IEUSCI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IEUSCI ========
    35     *  Enhanced Universal Serial Communication Interface
    36     */
    37    metaonly interface IEUSCI inherits xdc.platform.IPeripheral {
    38
    39        /*!
    40        *  ======== regIntVect_t ========
    41        *  Interrupt vector description
    42        *
    43        *  Type to describe a single interrupt vector pin and all its possible
    44        *  configurations.
    45        *
    46        *  @see #regIntVect_t
    47        */
    48        struct regIntVect_t {
    49            String                    registerName;
    50            String                    registerDescription;
    51            String                    isrToggleString;
    52            String                    priorityName;
    53            Bool                      interruptEnable;
    54            Bool                      interruptHandler;
    55            Int                       priority;
    56        }
    57
    58        /*!
    59        *  ======== ForceSetDefaultRegister_t ========
    60        *  Force Set Default Register
    61        *
    62        *  Type to store if each register needs to be forced initialized
    63        *  even if the register is in default state.
    64        *
    65        *  @see #ForceSetDefaultRegister_t
    66        */
    67        struct ForceSetDefaultRegister_t {
    68            String     register;
    69            Bool       regForceSet;
    70        }
    71
    72    instance:
    73
    74    }


interface ti.catalog.msp430.peripherals.communication.IUSCI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IUSCI ========
    35     *  Universal Serial Communication Interface
    36     */
    37    metaonly interface IUSCI inherits xdc.platform.IPeripheral {
    38        /*****************************************************************
    39         * REGISTER BIT DEFINITIONS                                      *
    40         *****************************************************************/
    41
    42        /*! MSB first select. Controls the direction of the receive and transmit shift register. */
    43        enum UCMSB_t {
    44            UCMSB_OFF = 0x00,       /*! LSB first */
    45            UCMSB = 0x02            /*! MSB first */
    46        };
    47
    48        /*! Character length. Selects 7-bit or 8-bit character length. */
    49        enum UC7BIT_t {
    50            UC7BIT_OFF = 0x00,      /*! 8-bit */
    51            UC7BIT = 0x02           /*! 7-bit */
    52        };
    53
    54        /*! Synchronous mode enable */
    55        enum UCSYNC_t {
    56            UCSYNC_OFF = 0x00,      /*! Asynchronous mode */
    57            UCSYNC = 0x02           /*! Synchronous Mode */
    58        };
    59
    60        /*! Receive erroneous-character interrupt-enable */
    61        enum UCRXEIE_t {
    62            UCRXEIE_OFF = 0x00,     /*! Erroneous characters rejected and UCAxRXIFG is not set */
    63            UCRXEIE = 0x02          /*! Erroneous characters received will set UCAxRXIFG */
    64        };
    65
    66        /*! Receive break character interrupt-enable */
    67        enum UCBRKIE_t {
    68            UCBRKIE_OFF = 0x00,     /*! Received break characters do not set UCAxRXIFG. */
    69            UCBRKIE = 0x02          /*! Received break characters set UCAxRXIFG. */
    70        };
    71
    72        /*! Dormant. Puts USCI into sleep mode. */
    73        enum UCDORM_t {
    74            UCDORM_OFF = 0x00,      /*! Not dormant. All received characters will set UCAxRXIFG. */
    75            UCDORM = 0x02           /*! Dormant. Only characters that are preceded by an idle-line or with
    76                                     * address bit set will set UCAxRXIFG. In UART mode with automatic baud
    77                                     * rate detection only the combination of a break and synch field will set
    78                                     * UCAxRXIFG. */
    79        };
    80
    81        /*! Transmit address. Next frame to be transmitted will be marked as address depending on the selected multiprocessor mode. */
    82        enum UCTXADDR_t {
    83            UCTXADDR_OFF = 0x00,    /*! Next frame transmitted is data */
    84            UCTXADDR = 0x02         /*! Next frame transmitted is an address */
    85        };
    86
    87        /*! Transmit break. Transmits a break with the next write to the transmit buffer.
    88         * In UART mode with automatic baud rate detection 055h must be written
    89         * into UCAxTXBUF to generate the required break/synch fields. Otherwise
    90         * 0h must be written into the transmit buffer. */
    91        enum UCTXBRK_t {
    92            UCTXBRK_OFF = 0x00,     /*! Next frame transmitted is not a break */
    93            UCTXBRK = 0x02          /*! Next frame transmitted is a break or a break/synch */
    94        };
    95
    96        /*! Software reset enable */
    97        enum UCSWRST_t {
    98            UCSWRST_OFF = 0x00,     /*! Disabled. USCI reset released for operation. */
    99            UCSWRST = 0x02          /*! Enabled. USCI logic held in reset state. */
   100        };
   101
   102        /*! Listen enable. The UCLISTEN bit selects loopback mode. */
   103        enum UCLISTEN_t {
   104            UCLISTEN_OFF = 0x00,   /*! Disabled. */
   105            UCLISTEN = 0x02        /*! Enabled. UCAxTXD is internally fed back to the receiver. */
   106        };
   107
   108        /*! Framing error flag */
   109        enum UCFE_t {
   110            UCFE_OFF = 0x00,        /*! 0 No error */
   111            UCFE = 0x02             /*! Character received with low stop bit */
   112        };
   113
   114        /*! Overrun error flag. */
   115        enum UCOE_t {
   116            UCOE_OFF = 0x00,        /*! No error. */
   117            UCOE = 0x02             /*! Overrun error occurred. */
   118        };
   119
   120        /*! Parity error flag. When UCPEN = 0, UCPE is read as 0. */
   121        enum UCPE_t {
   122            UCPE_OFF = 0x00,        /*! No error. */
   123            UCPE = 0x02             /*! Character received with parity error. */
   124        };
   125
   126        /*! Break detect flag */
   127        enum UCBRK_t {
   128            UCBRK_OFF = 0x00,       /*! No break condition */
   129            UCBRK = 0x02            /*! Break condition occurred */
   130        };
   131
   132        /*!  Bit 2 Receive error flag. This bit indicates a character was received with error(s).
   133         * When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also
   134         * set. UCRXERR is cleared when UCAxRXBUF is read. */
   135        enum UCRXERR_t {
   136            UCRXERR_OFF = 0x00,     /*! No receive errors detected */
   137            UCRXERR = 0x02          /*! Receive error detected */
   138        };
   139
   140        /*! Address received in address-bit multiprocessor mode. */
   141        enum UCADDR_t {
   142            UCADDR_OFF = 0x00,      /*! Received character is data */
   143            UCADDR = 0x02           /*! Received character is an address */
   144        };
   145
   146        /*!  Idle line detected in idle-line multiprocessor mode. */
   147        enum UCIDLE_t {
   148            UCIDLE_OFF = 0x00,      /*! No idle line detected */
   149            UCIDLE = 0x02           /*! Idle line detected */
   150        };
   151
   152        /*! USCI busy. This bit indicates if a transmit or receive operation is in progress. */
   153        enum UCBUSY_t {
   154            UCBUSY_OFF = 0x00,      /*! USCI inactive */
   155            UCBUSY = 0x01           /*! USCI transmitting or receiving */
   156        };
   157
   158        /*! USCI mode. The UCMODEx bits select the synchronous mode when UCSYNC = 1. */
   159        enum UCMODE_SYNC_t {
   160            UCMODE_0 = 0x00,        /*! 3-Pin SPI */
   161            UCMODE_1 = 0x01,        /*! 4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1 */
   162            UCMODE_2 = 0x02,        /*! 4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0 */
   163            UCMODE_3 = 0x04         /*! I2C Mode */
   164        };
   165
   166        /*!
   167        *  ======== regIntVect_t ========
   168        *  Interrupt vector description
   169        *
   170        *  Type to describe a single interrupt vector pin and all its possible
   171        *  configurations.
   172        *
   173        *  @see #regIntVect_t
   174        */
   175        struct regIntVect_t {
   176            String                    registerName;
   177            String                    registerDescription;
   178            String                    isrToggleString;
   179            String                    priorityName;
   180            Bool                      interruptEnable;
   181            Bool                      interruptHandler;
   182            Int                       priority;
   183        }
   184
   185        /*!
   186        *  ======== ForceSetDefaultRegister_t ========
   187        *  Force Set Default Register
   188        *
   189        *  Type to store if each register needs to be forced initialized
   190        *  even if the register is in default state.
   191        *
   192        *  @see #ForceSetDefaultRegister_t
   193        */
   194        struct ForceSetDefaultRegister_t {
   195            String     register;
   196            Bool       regForceSet;
   197        }
   198
   199    instance:
   200        /*!
   201         * Stores the UCLK external clock frequency in float
   202         */
   203        config float UCLKHz = 1000000;
   204
   205        /*!
   206        *  ======== setUCxxBR0 ========
   207        *  Sets UCxxBR0 register value based on which module
   208        *
   209        *  @see #setUCxxBR0
   210        */
   211        void setUCxxBR0(Bits8 value);
   212
   213        /*!
   214        *  ======== getUCxxBR0 ========
   215        *  Returns UCxxBR0 register value based on which module
   216        *
   217        *  @see #getUCxxBR0
   218        */
   219        Bits8 getUCxxBR0();
   220
   221        /*!
   222        *  ======== setUCxxBR1 ========
   223        *  Sets UCxxBR1 register value based on which module
   224        *
   225        *  @see #setUCxxBR1
   226        */
   227        void setUCxxBR1(Bits8 value);
   228
   229        /*!
   230        *  ======== getUCxxBR1 ========
   231        *  Returns UCxxBR1 register value based on which module
   232        *
   233        *  @see #getUCxxBR1
   234        */
   235        Bits8 getUCxxBR1();
   236
   237        /*!
   238         *  ======== getUCxxTXIE ========
   239         *  Gets UCxxTXIE bit
   240         *
   241         *  @see #getUCxxTXIE
   242         */
   243        Bool    getUCxxTXIE();
   244
   245        /*!
   246         *  ======== setUCxxTXIE ========
   247         *  Sets UCxxTXIE bit
   248         *
   249         *  @see #setUCxxTXIE
   250         */
   251        Bool    setUCxxTXIE(Bool set);
   252
   253        /*!
   254         *  ======== getUCxxRXIE ========
   255         *  Gets UCxxRXIE bit
   256         *
   257         *  @see #getUCxxRXIE
   258         */
   259        Bool    getUCxxRXIE();
   260
   261        /*!
   262         *  ======== setUCxxRXIE ========
   263         *  Sets UCxxRXIE bit
   264         *
   265         *  @see #setUCxxRXIE
   266         */
   267        Bool    setUCxxRXIE(Bool set);
   268    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_A0_SPI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface A0 SPI 2xx
    35     */
    36    metaonly interface IUSCI_A0_SPI inherits IUSCI_SPI {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCA0CTL0 = {
    41            UCCKPH      : UCCKPH_OFF,
    42            UCCKPL      : UCCKPL_OFF,
    43            UCMSB       : UCMSB_OFF,
    44            UC7BIT      : UC7BIT_OFF,
    45            UCMST       : UCMST_OFF,
    46            UCMODE      : UCMODE_0,
    47            UCSYNC      : UCSYNC,
    48        };
    49
    50        /*! Control Register 1 */
    51        config UCxCTL1_t UCA0CTL1 = {
    52            UCSSEL      : UCSSEL_0,
    53            UCSWRST     : UCSWRST,
    54        };
    55
    56        /*! Status Register */
    57        config UCxSTAT_t UCA0STAT = {
    58            UCLISTEN    : UCLISTEN_OFF,
    59            UCFE        : UCFE_OFF,
    60            UCOE        : UCOE_OFF,
    61            UCBUSY      : UCBUSY,
    62        };
    63
    64        /*! Bit Rate Control Register 0 */
    65        config Bits8 UCA0BR0 = 0;
    66
    67        /*! Bit Rate Control Register 1 */
    68        config Bits8 UCA0BR1 = 0;
    69
    70        /*! Receive Buffer Register */
    71        config Bits8 UCA0RXBUF = 0;
    72
    73        /*! Transmit Buffer Register */
    74        config Bits8 UCA0TXBUF = 0;
    75    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_A0_UART

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface A0 UART 2xx
    35     */
    36    metaonly interface IUSCI_A0_UART inherits IUSCI_UART {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCA0CTL0 = {
    41            UCPEN       : UCPEN_OFF,
    42            UCPAR       : UCPAR_OFF,
    43            UCMSB       : UCMSB_OFF,
    44            UC7BIT      : UC7BIT_OFF,
    45            UCSPB       : UCSPB_OFF,
    46            UCMODE      : UCMODE_0,
    47            UCSYNC      : UCSYNC_OFF,
    48        };
    49
    50        /*! Control Register 1 */
    51        config UCxCTL1_t UCA0CTL1 = {
    52            UCSSEL      : UCSSEL_0,
    53            UCRXEIE     : UCRXEIE_OFF,
    54            UCBRKIE     : UCBRKIE_OFF,
    55            UCDORM      : UCDORM_OFF,
    56            UCTXADDR    : UCTXADDR_OFF,
    57            UCTXBRK     : UCTXBRK_OFF,
    58            UCSWRST     : UCSWRST,
    59        };
    60
    61        /*! Modulation Control Register */
    62        config UCxMCTL_t UCA0MCTL = {
    63            UCBRF       : UCBRF_0,
    64            UCBRS       : UCBRS_0,
    65            UCOS16      : UCOS16_OFF,
    66        };
    67
    68        /*! Status Register */
    69        config UCxSTAT_t UCA0STAT = {
    70            UCLISTEN    : UCLISTEN_OFF,
    71            UCFE        : UCFE_OFF,
    72            UCOE        : UCOE_OFF,
    73            UCPE        : UCPE_OFF,
    74            UCBRK       : UCBRK_OFF,
    75            UCRXERR     : UCRXERR_OFF,
    76            UCADDR      : UCADDR_OFF,
    77            UCIDLE      : UCIDLE_OFF,
    78            UCBUSY      : UCBUSY,
    79        };
    80
    81        /*! IrDA Transmit Control Register */
    82        config UCxIRTCTL_t UCA0IRTCTL = {
    83            UCIRTXPL5   : UCIRTXPL5_OFF,
    84            UCIRTXPL4   : UCIRTXPL4_OFF,
    85            UCIRTXPL3   : UCIRTXPL3_OFF,
    86            UCIRTXPL2   : UCIRTXPL2_OFF,
    87            UCIRTXPL1   : UCIRTXPL1_OFF,
    88            UCIRTXPL0   : UCIRTXPL0_OFF,
    89            UCIRTXCLK   : UCIRTXCLK_OFF,
    90            UCIREN      : UCIREN_OFF,
    91        };
    92
    93        /*! IrDA Receive Control Register */
    94        config UCxIRRCTL_t UCA0IRRCTL = {
    95            UCIRRXFL5   : UCIRRXFL5_OFF,
    96            UCIRRXFL4   : UCIRRXFL4_OFF,
    97            UCIRRXFL3   : UCIRRXFL3_OFF,
    98            UCIRRXFL2   : UCIRRXFL2_OFF,
    99            UCIRRXFL1   : UCIRRXFL1_OFF,
   100            UCIRRXFL0   : UCIRRXFL0_OFF,
   101            UCIRRXPL    : UCIRRXPL_OFF,
   102            UCIRRXFE    : UCIRRXFE_OFF,
   103        };
   104
   105        /*! Auto Baud Rate Control Register */
   106        config UCxABCTL_t UCA0ABCTL = {
   107            UCDELIM1    : UCDELIM1_OFF,
   108            UCDELIM0    : UCDELIM0_OFF,
   109            UCSTOE      : UCSTOE_OFF,
   110            UCBTOE      : UCBTOE_OFF,
   111            UCABDEN     : UCABDEN_OFF,
   112        };
   113
   114        /*! Receive Buffer Register */
   115        config Bits8 UCA0RXBUF = 0;
   116
   117        /*! Transmit Buffer Register */
   118        config Bits8 UCA0TXBUF = 0;
   119
   120        /*! Baud rate control register 0 */
   121        config Bits8 UCA0BR0 = 0;
   122
   123        /*! Baud rate control register 1 */
   124        config Bits8 UCA0BR1 = 0;
   125    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_A1_SPI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface A1 SPI 2xx
    35     */
    36    metaonly interface IUSCI_A1_SPI inherits IUSCI_SPI {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCA1CTL0 = {
    41            UCCKPH      : UCCKPH_OFF,
    42            UCCKPL      : UCCKPL_OFF,
    43            UCMSB       : UCMSB_OFF,
    44            UC7BIT      : UC7BIT_OFF,
    45            UCMST       : UCMST_OFF,
    46            UCMODE      : UCMODE_0,
    47            UCSYNC      : UCSYNC,
    48        };
    49
    50        /*! Control Register 1 */
    51        config UCxCTL1_t UCA1CTL1 = {
    52            UCSSEL      : UCSSEL_0,
    53            UCSWRST     : UCSWRST,
    54        };
    55
    56        /*! Status Register */
    57        config UCxSTAT_t UCA1STAT = {
    58            UCLISTEN    : UCLISTEN_OFF,
    59            UCFE        : UCFE_OFF,
    60            UCOE        : UCOE_OFF,
    61            UCBUSY      : UCBUSY,
    62        };
    63
    64        /*! Bit Rate Control Register 0 */
    65        config Bits8 UCA1BR0 = 0;
    66
    67        /*! Bit Rate Control Register 1 */
    68        config Bits8 UCA1BR1 = 0;
    69
    70        /*! Receive Buffer Register */
    71        config Bits8 UCA1RXBUF = 0;
    72
    73        /*! Transmit Buffer Register */
    74        config Bits8 UCA1TXBUF = 0;
    75    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_A1_UART

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface A1 UART 2xx
    35     */
    36    metaonly interface IUSCI_A1_UART inherits IUSCI_UART {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCA1CTL0 = {
    41            UCPEN       : UCPEN_OFF,
    42            UCPAR       : UCPAR_OFF,
    43            UCMSB       : UCMSB_OFF,
    44            UC7BIT      : UC7BIT_OFF,
    45            UCSPB       : UCSPB_OFF,
    46            UCMODE      : UCMODE_0,
    47            UCSYNC      : UCSYNC_OFF,
    48        };
    49
    50        /*! Control Register 1 */
    51        config UCxCTL1_t UCA1CTL1 = {
    52            UCSSEL      : UCSSEL_0,
    53            UCRXEIE     : UCRXEIE_OFF,
    54            UCBRKIE     : UCBRKIE_OFF,
    55            UCDORM      : UCDORM_OFF,
    56            UCTXADDR    : UCTXADDR_OFF,
    57            UCTXBRK     : UCTXBRK_OFF,
    58            UCSWRST     : UCSWRST,
    59        };
    60
    61        /*! Modulation Control Register */
    62        config UCxMCTL_t UCA1MCTL = {
    63            UCBRF       : UCBRF_0,
    64            UCBRS       : UCBRS_0,
    65            UCOS16      : UCOS16_OFF,
    66        };
    67
    68        /*! Status Register */
    69        config UCxSTAT_t UCA1STAT = {
    70            UCLISTEN    : UCLISTEN_OFF,
    71            UCFE        : UCFE_OFF,
    72            UCOE        : UCOE_OFF,
    73            UCPE        : UCPE_OFF,
    74            UCBRK       : UCBRK_OFF,
    75            UCRXERR     : UCRXERR_OFF,
    76            UCADDR      : UCADDR_OFF,
    77            UCIDLE      : UCIDLE_OFF,
    78            UCBUSY      : UCBUSY,
    79        };
    80
    81        /*! IrDA Transmit Control Register */
    82        config UCxIRTCTL_t UCA1IRTCTL = {
    83            UCIRTXPL5   : UCIRTXPL5_OFF,
    84            UCIRTXPL4   : UCIRTXPL4_OFF,
    85            UCIRTXPL3   : UCIRTXPL3_OFF,
    86            UCIRTXPL2   : UCIRTXPL2_OFF,
    87            UCIRTXPL1   : UCIRTXPL1_OFF,
    88            UCIRTXPL0   : UCIRTXPL0_OFF,
    89            UCIRTXCLK   : UCIRTXCLK_OFF,
    90            UCIREN      : UCIREN_OFF,
    91        };
    92
    93        /*! IrDA Receive Control Register */
    94        config UCxIRRCTL_t UCA1IRRCTL = {
    95            UCIRRXFL5   : UCIRRXFL5_OFF,
    96            UCIRRXFL4   : UCIRRXFL4_OFF,
    97            UCIRRXFL3   : UCIRRXFL3_OFF,
    98            UCIRRXFL2   : UCIRRXFL2_OFF,
    99            UCIRRXFL1   : UCIRRXFL1_OFF,
   100            UCIRRXFL0   : UCIRRXFL0_OFF,
   101            UCIRRXPL    : UCIRRXPL_OFF,
   102            UCIRRXFE    : UCIRRXFE_OFF,
   103        };
   104
   105        /*! Auto Baud Rate Control Register */
   106        config UCxABCTL_t UCA1ABCTL = {
   107            UCDELIM1    : UCDELIM1_OFF,
   108            UCDELIM0    : UCDELIM0_OFF,
   109            UCSTOE      : UCSTOE_OFF,
   110            UCBTOE      : UCBTOE_OFF,
   111            UCABDEN     : UCABDEN_OFF,
   112        };
   113
   114        /*! Receive Buffer Register */
   115        config Bits8 UCA1RXBUF = 0;
   116
   117        /*! Transmit Buffer Register */
   118        config Bits8 UCA1TXBUF = 0;
   119
   120        /*! Baud rate control register 0 */
   121        config Bits8 UCA1BR0 = 0;
   122
   123        /*! Baud rate control register 1 */
   124        config Bits8 UCA1BR1 = 0;
   125    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_B0_I2C

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface B0 I2C 2xx
    35     */
    36    metaonly interface IUSCI_B0_I2C inherits IUSCI_I2C {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCB0CTL0 = {
    41            UCA10       : UCA10_OFF,
    42            UCSLA10     : UCSLA10_OFF,
    43            UCMM        : UCMM_OFF,
    44            UCMST       : UCMST_OFF,
    45            UCMODE      : UCMODE_0,
    46            UCSYNC      : UCSYNC,
    47        };
    48
    49        /*! Control Register 1 */
    50        config UCxCTL1_t UCB0CTL1 = {
    51            UCSSEL      : UCSSEL_0,
    52            UCTR        : UCTR_OFF,
    53            UCTXNACK    : UCTXNACK_OFF,
    54            UCTXSTP     : UCTXSTP_OFF,
    55            UCTXSTT     : UCTXSTT_OFF,
    56            UCSWRST     : UCSWRST,
    57        };
    58
    59        /*! Status Register */
    60        config UCxSTAT_t UCB0STAT = {
    61            UCSCLLOW    : UCSCLLOW,
    62            UCGC        : UCGC,
    63            UCBBUSY     : UCBBUSY,
    64            UCNACKIFG   : UCNACKIFG,
    65            UCSTPIFG    : UCSTPIFG,
    66            UCSTTIFG    : UCSTTIFG,
    67            UCALIFG     : UCALIFG,
    68        };
    69
    70        /*! I2C Own Address Register */
    71        config UCBxI2COA_t UCB0I2COA = {
    72            UCGCEN      : UCGCEN_OFF,
    73            I2COA       : 0,
    74        };
    75
    76        /*! I2C Slave Address Register */
    77        config Bits8 UCB0I2CSA = 0;
    78
    79        /*! Receive Buffer Register */
    80        config Bits8 UCB0RXBUF = 0;
    81
    82        /*! Transmit Buffer Register */
    83        config Bits8 UCB0TXBUF = 0;
    84
    85        /*! Bit Rate Control Register 0 */
    86        config Bits8 UCB0BR0 = 0;
    87
    88        /*! Bit Rate Control Register 1 */
    89        config Bits8 UCB0BR1 = 0;
    90    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_B0_SPI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface B0 SPI 2xx
    35     */
    36    metaonly interface IUSCI_B0_SPI inherits IUSCI_SPI {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCB0CTL0 = {
    41            UCCKPH      : UCCKPH_OFF,
    42            UCCKPL      : UCCKPL_OFF,
    43            UCMSB       : UCMSB_OFF,
    44            UC7BIT      : UC7BIT_OFF,
    45            UCMST       : UCMST_OFF,
    46            UCMODE      : UCMODE_0,
    47            UCSYNC      : UCSYNC,
    48        };
    49
    50        /*! Control Register 1 */
    51        config UCxCTL1_t UCB0CTL1 = {
    52            UCSSEL      : UCSSEL_0,
    53            UCSWRST     : UCSWRST,
    54        };
    55
    56        /*! Status Register */
    57        config UCxSTAT_t UCB0STAT = {
    58            UCLISTEN    : UCLISTEN_OFF,
    59            UCFE        : UCFE_OFF,
    60            UCOE        : UCOE_OFF,
    61            UCBUSY      : UCBUSY,
    62        };
    63
    64        /*! Bit Rate Control Register 0 */
    65        config Bits8 UCB0BR0 = 0;
    66
    67        /*! Bit Rate Control Register 1 */
    68        config Bits8 UCB0BR1 = 0;
    69
    70        /*! Receive Buffer Register */
    71        config Bits8 UCB0RXBUF = 0;
    72
    73        /*! Transmit Buffer Register */
    74        config Bits8 UCB0TXBUF = 0;
    75    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_B1_I2C

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface B1 I2C 2xx
    35     */
    36    metaonly interface IUSCI_B1_I2C inherits IUSCI_I2C {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCB1CTL0 = {
    41            UCA10       : UCA10_OFF,
    42            UCSLA10     : UCSLA10_OFF,
    43            UCMM        : UCMM_OFF,
    44            UCMST       : UCMST_OFF,
    45            UCMODE      : UCMODE_0,
    46            UCSYNC      : UCSYNC,
    47        };
    48
    49        /*! Control Register 1 */
    50        config UCxCTL1_t UCB1CTL1 = {
    51            UCSSEL      : UCSSEL_0,
    52            UCTR        : UCTR_OFF,
    53            UCTXNACK    : UCTXNACK_OFF,
    54            UCTXSTP     : UCTXSTP_OFF,
    55            UCTXSTT     : UCTXSTT_OFF,
    56            UCSWRST     : UCSWRST,
    57        };
    58
    59        /*! Status Register */
    60        config UCxSTAT_t UCB1STAT = {
    61            UCSCLLOW    : UCSCLLOW,
    62            UCGC        : UCGC,
    63            UCBBUSY     : UCBBUSY,
    64            UCNACKIFG   : UCNACKIFG,
    65            UCSTPIFG    : UCSTPIFG,
    66            UCSTTIFG    : UCSTTIFG,
    67            UCALIFG     : UCALIFG,
    68        };
    69
    70        /*! I2C Own Address Register */
    71        config UCBxI2COA_t UCB1I2COA = {
    72            UCGCEN      : UCGCEN_OFF,
    73            I2COA       : 0,
    74        };
    75
    76        /*! I2C Slave Address Register */
    77        config Bits8 UCB1I2CSA = 0;
    78
    79        /*! Receive Buffer Register */
    80        config Bits8 UCB1RXBUF = 0;
    81
    82        /*! Transmit Buffer Register */
    83        config Bits8 UCB1TXBUF = 0;
    84
    85        /*! Bit Rate Control Register 0 */
    86        config Bits8 UCB1BR0 = 0;
    87
    88        /*! Bit Rate Control Register 1 */
    89        config Bits8 UCB1BR1 = 0;
    90    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_B1_SPI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface B1 SPI 2xx
    35     */
    36    metaonly interface IUSCI_B1_SPI inherits IUSCI_SPI {
    37
    38    instance:
    39        /*! Control Register 0 */
    40        config UCxCTL0_t UCB1CTL0 = {
    41            UCCKPH      : UCCKPH_OFF,
    42            UCCKPL      : UCCKPL_OFF,
    43            UCMSB       : UCMSB_OFF,
    44            UC7BIT      : UC7BIT_OFF,
    45            UCMST       : UCMST_OFF,
    46            UCMODE      : UCMODE_0,
    47            UCSYNC      : UCSYNC,
    48        };
    49
    50        /*! Control Register 1 */
    51        config UCxCTL1_t UCB1CTL1 = {
    52            UCSSEL      : UCSSEL_0,
    53            UCSWRST     : UCSWRST,
    54        };
    55
    56        /*! Status Register */
    57        config UCxSTAT_t UCB1STAT = {
    58            UCLISTEN    : UCLISTEN_OFF,
    59            UCFE        : UCFE_OFF,
    60            UCOE        : UCOE_OFF,
    61            UCBUSY      : UCBUSY,
    62        };
    63
    64        /*! Bit Rate Control Register 0 */
    65        config Bits8 UCB1BR0 = 0;
    66
    67        /*! Bit Rate Control Register 1 */
    68        config Bits8 UCB1BR1 = 0;
    69
    70        /*! Receive Buffer Register */
    71        config Bits8 UCB1RXBUF = 0;
    72
    73        /*! Transmit Buffer Register */
    74        config Bits8 UCB1TXBUF = 0;
    75    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_I2C

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface
    35     */
    36    metaonly interface IUSCI_I2C inherits IUSCI {
    37
    38        //*****************************************************************
    39        //* REGISTER BIT DEFINITIONS                                      *
    40        //*****************************************************************
    41
    42        /*! Own addressing mode select */
    43        enum UCA10_t {
    44            UCA10_OFF = 0x00,       /*! Own address is a 7-bit address */
    45            UCA10 = 0x80            /*! Own address is a 10-bit address */
    46        };
    47
    48        /*! Slave addressing mode select */
    49        enum UCSLA10_t {
    50            UCSLA10_OFF = 0x00,     /*! Address slave with 7-bit address */
    51            UCSLA10 = 0x40          /*! Address slave with 10-bit address */
    52        };
    53
    54        /*! Multi-master environment select */
    55        enum UCMM_t {
    56            UCMM_OFF = 0x00,        /*! Single master environment. There is no other master in the system. The address compare unit is disabled. */
    57            UCMM = 0x20             /*! Multi master environment */
    58        };
    59
    60        /*! Master mode select */
    61        enum UCMST_t {
    62            UCMST_OFF = 0x00,       /*! Slave mode */
    63            UCMST = 0x40            /*! Master mode */
    64        };
    65
    66        /*! USCI clock source select. These bits select the BRCLK source clock. */
    67        enum UCSSEL_I2C_t {
    68            UCSSEL_0 = 0x00,        /*! UCLK */
    69            UCSSEL_1 = 0x01,        /*! ACLK */
    70            UCSSEL_2 = 0x02         /*! SMCLK */
    71    /*      UCSSEL_3 = 0x04         /*! SMCLK */
    72        };
    73
    74        /*! Transmitter/Receiver */
    75        enum UCTR_t {
    76            UCTR_OFF = 0x00,        /*! Receiver */
    77            UCTR = 0x10             /*! Transmitter */
    78        };
    79
    80        /*! Transmit a NACK */
    81        enum UCTXNACK_t {
    82            UCTXNACK_OFF = 0x00,    /*! Acknowledge normally */
    83            UCTXNACK = 0x08         /*! Generate NACK */
    84        };
    85
    86        /*! Transmit STOP condition in master mode */
    87        enum UCTXSTP_t {
    88            UCTXSTP_OFF = 0x00,     /*! No STOP generated */
    89            UCTXSTP = 0x10          /*! Generate STOP */
    90        };
    91
    92        /*! Transmit START condition in master mode */
    93        enum UCTXSTT_t {
    94            UCTXSTT_OFF = 0x00,     /*! Do not generate START condition */
    95            UCTXSTT = 0x10          /*! Generate START condition */
    96        };
    97
    98        /*! SCL low */
    99        enum UCSCLLOW_t {
   100            UCSCLLOW_OFF = 0x00,    /*! SCL is not held low */
   101            UCSCLLOW = 0x10         /*! SCL is held low */
   102        };
   103
   104        /*! General call address received */
   105        enum UCGC_t {
   106            UCGC_OFF = 0x00,        /*! No general call address received */
   107            UCGC = 0x10             /*! General call address received */
   108        };
   109
   110        /*! Bus busy */
   111        enum UCBBUSY_t {
   112            UCBBUSY_OFF = 0x00,     /*! Bus inactive */
   113            UCBBUSY = 0x10          /*! Bus busy */
   114        };
   115
   116        /*! Not-acknowledge received interrupt flag */
   117        enum UCNACKIFG_t {
   118            UCNACKIFG_OFF = 0x00,   /*! No interrupt pending */
   119            UCNACKIFG = 0x10        /*! Interrupt pending */
   120        };
   121
   122        /*! Stop condition interrupt flag */
   123        enum UCSTPIFG_t {
   124            UCSTPIFG_OFF = 0x00,    /*! No interrupt pending */
   125            UCSTPIFG = 0x10         /*! Interrupt pending */
   126        };
   127
   128        /*! Start condition interrupt flag */
   129        enum UCSTTIFG_t {
   130            UCSTTIFG_OFF = 0x00,    /*! No interrupt pending */
   131            UCSTTIFG = 0x10         /*! Interrupt pending */
   132        };
   133
   134        /*! Arbitration lost interrupt flag */
   135        enum UCALIFG_t {
   136            UCALIFG_OFF = 0x00,     /*! No interrupt pending */
   137            UCALIFG = 0x10          /*! Interrupt pending */
   138        };
   139
   140        /*! General call response enable */
   141        enum UCGCEN_t {
   142            UCGCEN_OFF = 0x00,      /*! Do not respond to a general call */
   143            UCGCEN = 0x80           /*! Respond to a general call */
   144        };
   145
   146        struct UCxCTL0_t {
   147            UCA10_t     UCA10;      /*! Own addressing mode select
   148                                     *  0  Own address is a 7-bit address
   149                                     *  1  Own address is a 10-bit address */
   150            UCSLA10_t   UCSLA10;    /*! Slave addressing mode select
   151                                     *  0  Address slave with 7-bit address
   152                                     *  1  Address slave with 10-bit address */
   153            UCMM_t      UCMM;       /*! Multi-master environment select
   154                                     *  0  Single master environment. There is no other master in the system.
   155                                     *     The address compare unit is disabled.
   156                                     *  1  Multi master environment */
   157            UCMST_t     UCMST;      /*! Master mode select. When a master looses arbitration in a multi-master
   158                                     *environment (UCMM = 1) the UCMST bit is automatically cleared and the
   159                                     *module acts as slave.
   160                                     *  0  Slave mode
   161                                     *  1  Master mode */
   162            UCMODE_SYNC_t UCMODE;   /*! USCI Mode. The UCMODEx bits select the synchronous mode when
   163                                     *UCSYNC = 1.
   164                                     *  00  3-pin SPI
   165                                     *  01  4-pin SPI (master/slave enabled if STE = 1)
   166                                     *  10  4-pin SPI (master/slave enabled if STE = 0)
   167                                     *  11  I2C mode */
   168            UCSYNC_t    UCSYNC;     /*! Synchronous mode enable
   169                                     *  0  Asynchronous mode
   170                                     *  1  Synchronous mode */
   171        }
   172
   173        struct UCxCTL1_t {
   174            UCSSEL_I2C_t UCSSEL;    /*! USCI clock source select. These bits select the BRCLK source clock.
   175                                     *  00  UCLKI
   176                                     *  01  ACLK
   177                                     *  10  SMCLK
   178                                     *  11  SMCLK */
   179            UCTR_t      UCTR;       /*! Transmitter/Receiver
   180                                     *  0  Receiver
   181                                     *  1  Transmitter */
   182            UCTXNACK_t  UCTXNACK;   /*! Transmit a NACK. UCTXNACK is automatically cleared after a NACK is
   183                                     *transmitted.
   184                                     *  0  Acknowledge normally
   185                                     *  1  Generate NACK */
   186            UCTXSTP_t   UCTXSTP;    /*! Transmit STOP condition in master mode. Ignored in slave mode. In
   187                                     *master receiver mode the STOP condition is preceded by a NACK.
   188                                     *UCTXSTP is automatically cleared after STOP is generated.
   189                                     *  0  No STOP generated
   190                                     *  1  Generate STOP */
   191            UCTXSTT_t   UCTXSTT;    /*! Transmit START condition in master mode. Ignored in slave mode. In
   192                                     *master receiver mode a repeated START condition is preceded by a
   193                                     *NACK. UCTXSTT is automatically cleared after START condition and
   194                                     *address information is transmitted.
   195                                     *Ignored in slave mode.
   196                                     *  0  Do not generate START condition
   197                                     *  1  Generate START condition */
   198            UCSWRST_t   UCSWRST;    /*! Software reset enable
   199                                     *  0  Disabled. USCI reset released for operation.
   200                                     *  1  Enabled. USCI logic held in reset state. */
   201        }
   202
   203        struct UCxSTAT_t {
   204            UCSCLLOW_t  UCSCLLOW;   /*! SCL low
   205                                     *  0  SCL is not held low
   206                                     *  1  SCL is held low */
   207            UCGC_t      UCGC;       /*! General call address received. UCGC is automatically cleared when a
   208                                     *START condition is received.
   209                                     *  0  No general call address received
   210                                     *  1  General call address received */
   211            UCBBUSY_t   UCBBUSY;    /*! Bus busy
   212                                     *  0  Bus inactive
   213                                     *  1  Bus busy */
   214            UCNACKIFG_t UCNACKIFG;  /*! Not-acknowledge received interrupt flag. UCNACKIFG is automatically
   215                                     *cleared when a START condition is received.
   216                                     *  0  No interrupt pending
   217                                     *  1  Interrupt pending */
   218            UCSTPIFG_t  UCSTPIFG;   /*!  Stop condition interrupt flag. UCSTPIFG is automatically cleared when a
   219                                     *START condition is received.
   220                                     *  0  No interrupt pending
   221                                     *  1  Interrupt pending */
   222            UCSTTIFG_t  UCSTTIFG;   /*! Start condition interrupt flag. UCSTTIFG is automatically cleared if a STOP
   223                                     *condition is received.
   224                                     *  0  No interrupt pending
   225                                     *  1  Interrupt pending */
   226            UCALIFG_t   UCALIFG;    /*! Arbitration lost interrupt flag
   227                                     *  0  No interrupt pending
   228                                     *  1  Interrupt pending */
   229        }
   230
   231        struct UCBxI2COA_t {
   232            UCGCEN_t    UCGCEN;     /*! General call response enable
   233                                     *  0  Do not respond to a general call
   234                                     *  1  Respond to a general call */
   235            Bits16      I2COA;      /*! I2C own address. The I2COAx bits contain the local address of the USCI_Bx
   236                                     *I2C controller. The address is right-justified. In 7-bit addressing mode Bit 6 is
   237                                     *the MSB, Bits 9-7 are ignored. In 10-bit addressing mode Bit 9 is the MSB. */
   238        }
   239
   240    instance:
   241        /*!
   242        *  ======== getUCBxI2CSA ========
   243        *  Returns UCBxI2CSA register value based on which module
   244        *
   245        *  @see #getUCBxI2CSA
   246        */
   247        Bits8 getUCBxI2CSA();
   248
   249        /*!
   250        *  ======== setUCBxI2CSA ========
   251        *  Sets UCxxI2CSA register value based on which module
   252        *
   253        *  @see #setUCBxI2CSA
   254        */
   255        void setUCBxI2CSA(Bits8 value);
   256    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_SPI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface
    35     */
    36    metaonly interface IUSCI_SPI inherits IUSCI {
    37
    38        //*****************************************************************
    39        //* REGISTER BIT DEFINITIONS                                      *
    40        //*****************************************************************
    41
    42        /*! Clock phase select. */
    43        enum UCCKPH_t {
    44            UCCKPH_OFF = 0x00,      /*! Data is changed on the first UCLK edge and captured on the following edge. */
    45            UCCKPH = 0x80           /*! Data is captured on the first UCLK edge and changed on the following edge. */
    46        };
    47
    48        /*! Clock polarity select. */
    49        enum UCCKPL_t {
    50            UCCKPL_OFF = 0x00,      /*! Inactive state is low */
    51            UCCKPL = 0x40           /*! Inactive state is high */
    52        };
    53
    54        /*! Master mode select */
    55        enum UCMST_t {
    56            UCMST_OFF = 0x00,       /*! Slave mode */
    57            UCMST = 0x40            /*! Master mode */
    58        };
    59
    60        /*! USCI clock source select. These bits select the BRCLK source clock. */
    61        enum UCSSEL_SPI_t {
    62            UCSSEL_0 = 0x00,        /*! NA */
    63            UCSSEL_1 = 0x01,        /*! ACLK */
    64            UCSSEL_2 = 0x02         /*! SMCLK */
    65    /*        UCSSEL_3 = 0x04      /*! SMCLK */
    66        };
    67
    68        struct UCxCTL0_t {
    69            UCCKPH_t    UCCKPH;     /*! Clock phase select.
    70                                     *  0  Data is changed on the first UCLK edge and captured on the
    71                                     *     following edge.
    72                                     *  1  Data is captured on the first UCLK edge and changed on the
    73                                     *     following edge. */
    74            UCCKPL_t    UCCKPL;     /*! Clock polarity select
    75                                     *  0  The inactive state is low
    76                                     *  1  The inactive state is high */
    77            UCMSB_t     UCMSB;      /*! MSB first select. Controls the direction of the receive and transmit shift
    78                                     *register.
    79                                     *  0  LSB first
    80                                     *  1  MSB first */
    81            UC7BIT_t    UC7BIT;     /*! Character length. Selects 7-bit or 8-bit character length.
    82                                     *  0  8-bit data
    83                                     *  1  7-bit data */
    84            UCMST_t     UCMST;      /*! Master mode select
    85                                     *  0  Slave mode
    86                                     *  1  Master mode */
    87            UCMODE_SYNC_t UCMODE;   /*! USCI mode. The UCMODEx bits select the synchronous mode when
    88                                     *UCSYNC = 1.
    89                                     *  00  3-Pin SPI
    90                                     *  01  4-Pin SPI with UCxSTE active high: slave enabled when UCxSTE = 1
    91                                     *  10  4-Pin SPI with UCxSTE active low: slave enabled when UCxSTE = 0
    92                                     *  11  I2C Mode */
    93            UCSYNC_t    UCSYNC;     /*! Synchronous mode enable
    94                                     *  0  Asynchronous mode
    95                                     *  1  Synchronous Mode */
    96        }
    97
    98        struct UCxCTL1_t {
    99            UCSSEL_SPI_t UCSSEL;    /*! USCI clock source select. These bits select the BRCLK source clock in
   100                                     *master mode. UCxCLK is always used in slave mode.
   101                                     *  00  NA
   102                                     *  01  ACLK
   103                                     *  10  SMCLK
   104                                     *  11  SMCLK */
   105            UCSWRST_t    UCSWRST;   /*! Software reset enable
   106                                     *  0  Disabled. USCI reset released for operation.
   107                                     *  1  Enabled. USCI logic held in reset state. */
   108        }
   109
   110        struct UCxSTAT_t {
   111            UCLISTEN_t  UCLISTEN;   /*! Listen enable. The UCLISTEN bit selects loopback mode.
   112                                     *  0  Disabled
   113                                     *  1  Enabled. UCAxTXD is internally fed back to the receiver. */
   114            UCFE_t      UCFE;       /*! Framing error flag. This bit indicates a bus conflict in 4-wire master mode.
   115                                     *UCFE is not used in 3-wire master or any slave mode.
   116                                     *  0  No error
   117                                     *  1  Bus conflict occurred */
   118            UCOE_t      UCOE;       /*! Overrun error flag. This bit is set when a character is transferred into
   119                                     *UCAxRXBUF before the previous character was read. UCOE is cleared
   120                                     *automatically when UCxRXBUF is read, and must not be cleared by
   121                                     *software. Otherwise, it will not function correctly.
   122                                     *  0  No error
   123                                     *  1  Overrun error occurred */
   124            UCBUSY_t    UCBUSY;     /*! USCI busy. This bit indicates if a transmit or receive operation is in
   125                                     *progress.
   126                                     *  0  USCI inactive
   127                                     *  1  USCI transmitting or receiving */
   128        }
   129    }


interface ti.catalog.msp430.peripherals.communication.IUSCI_UART

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     * Universal Serial Communication Interface
    35     */
    36    metaonly interface IUSCI_UART inherits IUSCI {
    37
    38        //*****************************************************************
    39        //* REGISTER BIT DEFINITIONS                                      *
    40        //*****************************************************************
    41
    42        /*! Parity enable */
    43        enum UCPEN_t {
    44            UCPEN_OFF = 0x00,       /*! Parity Disabled */
    45            UCPEN = 0x02            /*! Parity Enabled */
    46        };
    47
    48        /*! Parity select. UCPAR is not used when parity is disabled. */
    49        enum UCPAR_t {
    50            UCPAR_OFF = 0x00,       /*! Odd parity */
    51            UCPAR = 0x02            /*! Even parity */
    52        };
    53
    54        /*! Stop bit select. Number of stop bits. */
    55        enum UCSPB_t {
    56            UCSPB_OFF = 0x00,       /*! One stop bit */
    57            UCSPB = 0x02            /*! Two stop bits */
    58        };
    59
    60        /*! First modulation stage select */
    61        enum UCBRF_t {
    62            UCBRF_0 = 0x00,         /*! First stage 0 */
    63            UCBRF_1 = 0x10,         /*! First stage 1 */
    64            UCBRF_2 = 0x20,         /*! First stage 2 */
    65            UCBRF_3 = 0x30,         /*! First stage 3 */
    66            UCBRF_4 = 0x40,         /*! First stage 4 */
    67            UCBRF_5 = 0x50,         /*! First stage 5 */
    68            UCBRF_6 = 0x60,         /*! First stage 6 */
    69            UCBRF_7 = 0x70,         /*! First stage 7 */
    70            UCBRF_8 = 0x80,         /*! First stage 8 */
    71            UCBRF_9 = 0x90,         /*! First stage 9 */
    72            UCBRF_10 = 0xA0,        /*! First stage 10 */
    73            UCBRF_11 = 0xB0,        /*! First stage 11 */
    74            UCBRF_12 = 0xC0,        /*! First stage 12 */
    75            UCBRF_13 = 0xD0,        /*! First stage 13 */
    76            UCBRF_14 = 0xE0,        /*! First stage 14 */
    77            UCBRF_15 = 0xF0         /*! First stage 15 */
    78        };
    79
    80        /*! Second modulation stage select */
    81        enum UCBRS_t {
    82            UCBRS_0 = 0x00,         /*! Second stage 0 */
    83            UCBRS_1 = 0x02,         /*! Second stage 1 */
    84            UCBRS_2 = 0x04,         /*! Second stage 2 */
    85            UCBRS_3 = 0x06,         /*! Second stage 3 */
    86            UCBRS_4 = 0x08,         /*! Second stage 4 */
    87            UCBRS_5 = 0x0A,         /*! Second stage 5 */
    88            UCBRS_6 = 0x0C,         /*! Second stage 6 */
    89            UCBRS_7 = 0x0E          /*! Second stage 7 */
    90        };
    91
    92        /*! Oversampling mode enabled */
    93        enum UCOS16_t {
    94            UCOS16_OFF = 0x00,      /*! Disabled. */
    95            UCOS16 = 0x02           /*! Enabled. */
    96        };
    97
    98
    99            /*! IRDA Transmit Pulse Length Bit 5 */
   100        enum UCIRTXPL5_t {
   101            UCIRTXPL5_OFF = 0x00,   /*! Bit 5 OFF */
   102            UCIRTXPL5 = 0x80        /*! Bit 5 ON */
   103        };
   104
   105        /*! IRDA Transmit Pulse Length Bit 4 */
   106        enum UCIRTXPL4_t {
   107            UCIRTXPL4_OFF = 0x00,   /*! Bit 4 OFF */
   108            UCIRTXPL4 = 0x40        /*! Bit 4 ON */
   109        };
   110
   111        /*! IRDA Transmit Pulse Length Bit 3 */
   112        enum UCIRTXPL3_t {
   113            UCIRTXPL3_OFF = 0x00,   /*! Bit 3 OFF */
   114            UCIRTXPL3 = 0x20        /*! Bit 3 ON */
   115        };
   116
   117        /*! IRDA Transmit Pulse Length Bit 2 */
   118        enum UCIRTXPL2_t {
   119            UCIRTXPL2_OFF = 0x00,   /*! Bit 2 OFF */
   120            UCIRTXPL2 = 0x10        /*! Bit 2 ON */
   121        };
   122
   123        /*! IRDA Transmit Pulse Length Bit 1 */
   124        enum UCIRTXPL1_t {
   125            UCIRTXPL1_OFF = 0x00,   /*! Bit 1 OFF */
   126            UCIRTXPL1 = 0x08        /*! Bit 1 ON */
   127        };
   128
   129        /*! IRDA Transmit Pulse Length Bit 0 */
   130        enum UCIRTXPL0_t {
   131            UCIRTXPL0_OFF = 0x00,   /*! Bit 0 OFF */
   132            UCIRTXPL0 = 0x04        /*! Bit 0 ON */
   133        };
   134
   135        /*! IrDA transmit pulse clock select. */
   136        enum UCIRTXCLK_t {
   137            UCIRTXCLK_OFF = 0x00,   /*! BRCLK. */
   138            UCIRTXCLK = 0x02        /*! BITCLK16 when UCOS16 = 1. Otherwise, BRCLK. */
   139        };
   140
   141        /*! IrDA encoder/decoder enable. */
   142        enum UCIREN_t {
   143            UCIREN_OFF = 0x00,      /*! IrDA encoder/decoder disabled. */
   144            UCIREN = 0x02           /*! IrDA encoder/decoder enabled. */
   145        };
   146
   147        /*! IRDA Receive Filter Length Bit 5 */
   148        enum UCIRRXFL5_t {
   149            UCIRRXFL5_OFF = 0x00,   /*! Bit 5 OFF */
   150            UCIRRXFL5 = 0x80        /*! Bit 5 ON */
   151        };
   152
   153        /*! IRDA Receive Filter Length Bit 4 */
   154        enum UCIRRXFL4_t {
   155            UCIRRXFL4_OFF = 0x00,   /*! Bit 4 OFF */
   156            UCIRRXFL4 = 0x40        /*! Bit 4 ON */
   157        };
   158
   159        /*! IRDA Receive Filter Length Bit 3 */
   160        enum UCIRRXFL3_t {
   161            UCIRRXFL3_OFF = 0x00,   /*! Bit 3 OFF */
   162            UCIRRXFL3 = 0x20        /*! Bit 3 ON */
   163        };
   164
   165        /*! IRDA Receive Filter Length Bit 2 */
   166        enum UCIRRXFL2_t {
   167            UCIRRXFL2_OFF = 0x00,   /*! Bit 2 OFF */
   168            UCIRRXFL2 = 0x10        /*! Bit 2 ON */
   169        };
   170
   171        /*! IRDA Receive Filter Length Bit 1 */
   172        enum UCIRRXFL1_t {
   173            UCIRRXFL1_OFF = 0x00,   /*! Bit 1 OFF */
   174            UCIRRXFL1 = 0x08        /*! Bit 1 ON */
   175        };
   176
   177        /*! IRDA Receive Filter Length Bit 0 */
   178        enum UCIRRXFL0_t {
   179            UCIRRXFL0_OFF = 0x00,   /*! Bit 0 OFF */
   180            UCIRRXFL0 = 0x04        /*! Bit 0 ON */
   181        };
   182
   183        /*! IrDA receive input UCAxRXD polarity. */
   184        enum UCIRRXPL_t {
   185            UCIRRXPL_OFF = 0x00,    /*! IrDA transceiver delivers a high pulse when a light pulse is seen. */
   186            UCIRRXPL = 0x02         /*! IrDA transceiver delivers a low pulse when a light pulse is seen. */
   187        };
   188
   189        /*! IrDA receive filter enabled. */
   190        enum UCIRRXFE_t {
   191            UCIRRXFE_OFF = 0x00,    /*! Receive filter disabled. */
   192            UCIRRXFE = 0x02         /*! Receive filter enabled. */
   193        };
   194
   195        /*! Break/synch delimiter length bit 0 */
   196        enum UCDELIM0_t {
   197            UCDELIM0_OFF = 0x00,    /*! Break Sync Delimiter bit 0 Off */
   198            UCDELIM0 = 0x02         /*! Break Sync Delimiter bit 0 On */
   199        };
   200
   201        /*! Break/synch delimiter length bit 1 */
   202        enum UCDELIM1_t {
   203            UCDELIM1_OFF = 0x00,    /*! Break Sync Delimiter bit 1 Off */
   204            UCDELIM1 = 0x02         /*! Break Sync Delimiter bit 1 On */
   205        };
   206
   207        /*! Synch field time out error. */
   208        enum UCSTOE_t {
   209            UCSTOE_OFF = 0x00,      /*! No error. */
   210            UCSTOE = 0x02           /*! Length of synch field exceeded measurable time. */
   211        };
   212
   213        /*! Break time out error. */
   214        enum UCBTOE_t {
   215            UCBTOE_OFF = 0x00,      /*! No error. */
   216            UCBTOE = 0x02           /*! Length of break field exceeded 22 bit times. */
   217        };
   218
   219        /*! Automatic baud rate detect enable. */
   220        enum UCABDEN_t {
   221            UCABDEN_OFF = 0x00,     /*! Baud rate detection disabled. Length of break and synch field is not
   222                                     * measured. */
   223            UCABDEN = 0x02          /*! Baud rate detection enabled. Length of break and synch field is
   224                                     * measured and baud rate settings are changed accordingly. */
   225        };
   226
   227        /*! USCI mode. The UCMODEx bits select the asynchronous mode when UCSYNC = 0. */
   228        enum UCMODE_ASYNC_t {
   229            UCMODE_0 = 0x00,        /*! UART Mode. */
   230            UCMODE_1 = 0x01,        /*! Idle-Line Multiprocessor Mode. */
   231            UCMODE_2 = 0x02,        /*! Address-Bit Multiprocessor Mode. */
   232            UCMODE_3 = 0x04         /*! UART Mode with automatic baud rate detection. */
   233        };
   234
   235        /*! USCI clock source select. These bits select the BRCLK source clock. */
   236        enum UCSSEL_UART_t {
   237            UCSSEL_0 = 0x00,        /*! UCLK */
   238            UCSSEL_1 = 0x01,        /*! ACLK */
   239            UCSSEL_2 = 0x02         /*! SMCLK */
   240    /*        UCSSEL_3 = 0x04         /*! SMCLK */
   241        };
   242
   243        struct UCxCTL0_t {
   244            UCPEN_t     UCPEN;      /*! Parity enable
   245                                     *  0  Parity disabled.
   246                                     *  1  Parity enabled. Parity bit is generated (UCAxTXD) and expected
   247                                     *     (UCAxRXD). In address-bit multiprocessor mode, the address bit is
   248                                     *     included in the parity calculation. */
   249            UCPAR_t     UCPAR;      /*! Parity select. UCPAR is not used when parity is disabled.
   250                                     *  0  Odd parity
   251                                     *  1  Even parity */
   252            UCMSB_t     UCMSB;      /*! MSB first select. Controls the direction of the receive and transmit shift
   253                                     *register.
   254                                     *  0  LSB first
   255                                     *  1  MSB first */
   256            UC7BIT_t    UC7BIT;     /*! Character length. Selects 7-bit or 8-bit character length.
   257                                     *  0  8-bit data
   258                                     *  1  7-bit data */
   259            UCSPB_t     UCSPB;      /*! Stop bit select. Number of stop bits.
   260                                     *  0  One stop bit
   261                                     *  1  Two stop bits */
   262            UCMODE_ASYNC_t UCMODE;  /*! USCI mode. The UCMODEx bits select the asynchronous mode when
   263                                     *UCSYNC = 0.
   264                                     *  00  UART Mode.
   265                                     *  01  Idle-Line Multiprocessor Mode.
   266                                     *  10  Address-Bit Multiprocessor Mode.
   267                                     *  11  UART Mode with automatic baud rate detection. */
   268            UCSYNC_t    UCSYNC;     /*!Synchronous mode enable
   269                                     *  0  Asynchronous mode
   270                                     *  1  Synchronous Mode */
   271        }
   272
   273        struct UCxCTL1_t {
   274            UCSSEL_UART_t UCSSEL;   /*! USCI clock source select. These bits select the BRCLK source clock.
   275                                     *  00  UCLK
   276                                     *  01  ACLK
   277                                     *  10  SMCLK
   278                                     *  11  SMCLK */
   279            UCRXEIE_t   UCRXEIE;    /*! Receive erroneous-character interrupt-enable
   280                                     *  0  Erroneous characters rejected and UCAxRXIFG is not set
   281                                     *  1  Erroneous characters received will set UCAxRXIFG */
   282            UCBRKIE_t   UCBRKIE;    /*! Receive break character interrupt-enable
   283                                     *  0  Received break characters do not set UCAxRXIFG.
   284                                     *  1  Received break characters set UCAxRXIFG. */
   285            UCDORM_t    UCDORM;     /*! Dormant. Puts USCI into sleep mode.
   286                                     *  0  Not dormant. All received characters will set UCAxRXIFG.
   287                                     *  1  Dormant. Only characters that are preceded by an idle-line or with
   288                                     *     address bit set will set UCAxRXIFG. In UART mode with automatic baud
   289                                     *     rate detection only the combination of a break and synch field will set
   290                                     *     UCAxRXIFG. */
   291            UCTXADDR_t  UCTXADDR;   /*! Transmit address. Next frame to be transmitted will be marked as address
   292                                     *depending on the selected multiprocessor mode.
   293                                     *  0  Next frame transmitted is data
   294                                     *  1  Next frame transmitted is an address */
   295            UCTXBRK_t   UCTXBRK;    /*! Transmit break. Transmits a break with the next write to the transmit buffer.
   296                                     *In UART mode with automatic baud rate detection 055h must be written
   297                                     *into UCAxTXBUF to generate the required break/synch fields. Otherwise
   298                                     *0h must be written into the transmit buffer.
   299                                     *   0  Next frame transmitted is not a break
   300                                     *   1  Next frame transmitted is a break or a break/synch */
   301            UCSWRST_t   UCSWRST;    /*! Software reset enable
   302                                     *   0  Disabled. USCI reset released for operation.
   303                                     *   1  Enabled. USCI logic held in reset state. */
   304        }
   305
   306        struct UCxMCTL_t {
   307            UCBRF_t     UCBRF;      /*! First modulation stage select. These bits determine the modulation pattern
   308                                     *for BITCLK16 when UCOS16 = 1. Ignored with UCOS16 = 0. */
   309            UCBRS_t     UCBRS;      /*! Second modulation stage select. These bits determine the modulation
   310                                     *pattern for BITCLK. */
   311            UCOS16_t    UCOS16;     /*! Oversampling mode enabled
   312                                     *  0  Disabled
   313                                     *  1  Enabled */
   314        }
   315
   316        struct UCxSTAT_t {
   317            UCLISTEN_t  UCLISTEN;   /*! Listen enable. The UCLISTEN bit selects loopback mode.
   318                                     *  0  Disabled
   319                                     *  1  Enabled. UCAxTXD is internally fed back to the receiver. */
   320            UCFE_t      UCFE;       /*! Framing error flag
   321                                     *  0  No error
   322                                     *  1  Character received with low stop bit */
   323            UCOE_t      UCOE;       /*! Overrun error flag. This bit is set when a character is transferred into
   324                                     *UCAxRXBUF before the previous character was read. UCOE is cleared
   325                                     *automatically when UCxRXBUF is read, and must not be cleared by
   326                                     *software. Otherwise, it will not function correctly.
   327                                     *  0  No error
   328                                     *  1  Overrun error occurred */
   329            UCPE_t      UCPE;       /*! Parity error flag. When UCPEN = 0, UCPE is read as 0.
   330                                     *  0  No error
   331                                     *  1  Character received with parity error */
   332            UCBRK_t     UCBRK;      /*! Break detect flag
   333                                     *  0  No break condition
   334                                     *  1  Break condition occurred */
   335            UCRXERR_t   UCRXERR;    /*! Receive error flag. This bit indicates a character was received with error(s).
   336                                     *When UCRXERR = 1, on or more error flags (UCFE, UCPE, UCOE) is also
   337                                     *set. UCRXERR is cleared when UCAxRXBUF is read.
   338                                     *  0  No receive errors detected
   339                                     *  1  Receive error detected */
   340            UCADDR_t    UCADDR;     /*! Address received in address-bit multiprocessor mode.
   341                                     *  0  Received character is data
   342                                     *  1  Received character is an address */
   343            UCIDLE_t    UCIDLE;     /*! Idle line detected in idle-line multiprocessor mode.
   344                                     *  0  No idle line detected
   345                                     *  1  Idle line detected */
   346            UCBUSY_t    UCBUSY;     /*! USCI busy. This bit indicates if a transmit or receive operation is in
   347                                     *progress.
   348                                     *  0  USCI inactive
   349                                     *  1  USCI transmitting or receiving */
   350        }
   351
   352        struct UCxIRTCTL_t {
   353            UCIRTXPL5_t  UCIRTXPL5; /*! IRDA Transmit Pulse Length Bit 5 */
   354            UCIRTXPL4_t  UCIRTXPL4; /*! IRDA Transmit Pulse Length Bit 4 */
   355            UCIRTXPL3_t  UCIRTXPL3; /*! IRDA Transmit Pulse Length Bit 3 */
   356            UCIRTXPL2_t  UCIRTXPL2; /*! IRDA Transmit Pulse Length Bit 2 */
   357            UCIRTXPL1_t  UCIRTXPL1; /*! IRDA Transmit Pulse Length Bit 1 */
   358            UCIRTXPL0_t  UCIRTXPL0; /*! IRDA Transmit Pulse Length Bit 0 */
   359            UCIRTXCLK_t  UCIRTXCLK; /*! IrDA transmit pulse clock select
   360                                     *  0  BRCLK
   361                                     *  1  BITCLK16 when UCOS16 = 1. Otherwise, BRCLK */
   362            UCIREN_t     UCIREN;    /*! IrDA encoder/decoder enable.
   363                                     *  0  IrDA encoder/decoder disabled
   364                                     *  1  IrDA encoder/decoder enabled */
   365        }
   366
   367        struct UCxIRRCTL_t {
   368            UCIRRXFL5_t  UCIRRXFL5; /*! IRDA Receive Filter Length Bit 5 */
   369            UCIRRXFL4_t  UCIRRXFL4; /*! IRDA Receive Filter Length Bit 4 */
   370            UCIRRXFL3_t  UCIRRXFL3; /*! IRDA Receive Filter Length Bit 3 */
   371            UCIRRXFL2_t  UCIRRXFL2; /*! IRDA Receive Filter Length Bit 2 */
   372            UCIRRXFL1_t  UCIRRXFL1; /*! IRDA Receive Filter Length Bit 1 */
   373            UCIRRXFL0_t  UCIRRXFL0; /*! IRDA Receive Filter Length Bit 0 */
   374            UCIRRXPL_t   UCIRRXPL;  /*! IrDA receive input UCAxRXD polarity
   375                                     *  0  IrDA transceiver delivers a high pulse when a light pulse is seen
   376                                     *  1  IrDA transceiver delivers a low pulse when a light pulse is seen */
   377            UCIRRXFE_t   UCIRRXFE;  /*! IrDA receive filter enabled
   378                                     *  0  Receive filter disabled
   379                                     *  1  Receive filter enabled */
   380        }
   381
   382        struct UCxABCTL_t {
   383            UCDELIM1_t   UCDELIM1;  /*! Break/synch delimiter length
   384                                     *  00  1 bit time
   385                                     *  01  2 bit times
   386                                     *  10  3 bit times
   387                                     *  11  4 bit times */
   388            UCDELIM0_t   UCDELIM0;  /*! Break/synch delimiter length
   389                                     *  00  1 bit time
   390                                     *  01  2 bit times
   391                                     *  10  3 bit times
   392                                     *  11  4 bit times */
   393            UCSTOE_t     UCSTOE;    /*! Synch field time out error
   394                                     *  0  No error
   395                                     *  1  Length of synch field exceeded measurable time */
   396            UCBTOE_t     UCBTOE;    /*! Break time out error
   397                                     *  0  No error
   398                                     *  1  Length of break field exceeded 22 bit times */
   399            UCABDEN_t    UCABDEN;   /*! Automatic baud rate detect enable
   400                                     *  0  Baud rate detection disabled. Length of break and synch field is not
   401                                     *     measured.
   402                                     *  1  Baud rate detection enabled. Length of break and synch field is
   403                                     *     measured and baud rate settings are changed accordingly. */
   404        }
   405    }


interface ti.catalog.msp430.peripherals.communication.IUSI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IUSI ========
    35     *  Universal Serial Interface
    36     */
    37    metaonly interface IUSI inherits xdc.platform.IPeripheral {
    38        /*****************************************************************
    39         * REGISTER BIT DEFINITIONS                                      *
    40         *****************************************************************/
    41
    42        /*! USI SDI/SDA port enable.
    43         *Input in SPI mode, input or open drain output in I2C mode. */
    44        enum USIPE7_t {
    45            USIPE7_OFF = 0x00,      /*! USI function disabled */
    46            USIPE7 = 0x80           /*! USI function enabled */
    47        };
    48
    49        /*! USI SDO/SCL port enable.
    50         *Output in SPI mode, input or open drain output in I2C mode. */
    51        enum USIPE6_t {
    52            USIPE6_OFF = 0x00,      /*! USI function disabled */
    53            USIPE6 = 0x40           /*! USI function enabled */
    54        };
    55
    56        /*! USI SCLK port enable.
    57         *Input in SPI slave mode, or I2C mode, output in SPI master mode. */
    58        enum USIPE5_t {
    59            USIPE5_OFF = 0x00,      /*! USI function disabled */
    60            USIPE5 = 0x20           /*! USI function enabled */
    61        };
    62
    63        /*! LSB first select. This bit controls the direction of the receive and transmit shift register. */
    64        enum USILSB_t {
    65            USILSB_OFF = 0x00,      /*! MSB first */
    66            USILSB = 0x10           /*! LSB first */
    67        };
    68
    69        /*! Master select */
    70        enum USIMST_t {
    71            USIMST_OFF = 0x00,      /*! Slave mode */
    72            USIMST = 0x08           /*! Master mode */
    73        };
    74
    75        /*! Output latch control */
    76        enum USIGE_t {
    77            USIGE_OFF = 0x00,       /*! Output latch enable depends on shift clock */
    78            USIGE = 0x04            /*! Output latch always enabled and transparent */
    79        };
    80
    81        /*! Data output enable */
    82        enum USIOE_t {
    83            USIOE_OFF = 0x00,       /*! Output disabled */
    84            USIOE = 0x02            /*! Output enabled */
    85        };
    86
    87        /*! USI software reset */
    88        enum USISWRST_t {
    89            USISWRST_OFF = 0x00,    /*! USI released for operation. */
    90            USISWRST = 0x01         /*! USI logic held in reset state. */
    91        };
    92
    93        /*! Clock phase select */
    94        enum USICKPH_t {
    95            USICKPH_OFF = 0x00,     /*! Data is changed on the first SCLK edge and captured on the following edge. */
    96            USICKPH = 0x80          /*! Data is captured on the first SCLK edge and changed on the following edge. */
    97        };
    98
    99        /*! I2C mode enable */
   100        enum USII2C_t {
   101            USII2C_OFF = 0x00,      /*! I2C mode disabled */
   102            USII2C = 0x40           /*! I2C mode enabled */
   103        };
   104
   105        /*! START condition interrupt-enable */
   106        enum USISTTIE_t {
   107            USISTTIE_OFF = 0x00,    /*! Interrupt on START condition disabled */
   108            USISTTIE = 0x20         /*! Interrupt on START condition enabled */
   109        };
   110
   111        /*! USI counter interrupt enable */
   112        enum USIIE_t {
   113            USIIE_OFF = 0x00,       /*! Interrupt disabled */
   114            USIIE = 0x10            /*! Interrupt enabled */
   115        };
   116
   117        /*! Arbitration lost */
   118        enum USIAL_t {
   119            USIAL_OFF = 0x00,       /*! No arbitration lost condition */
   120            USIAL = 0x08            /*! Arbitration lost */
   121        };
   122
   123        /*! STOP condition received. USISTP is automatically cleared if USICNTx is
   124           *loaded with a value > 0 when USIIFGCC = 0. */
   125        enum USISTP_t {
   126            USISTP_OFF = 0x00,     /*! No STOP condition received */
   127            USISTP = 0x04          /*! STOP condition received */
   128        };
   129
   130        /*! START condition interrupt flag */
   131        enum USISTTIFG_t {
   132            USISTTIFG_OFF = 0x00,  /*! No START condition received. No interrupt pending. */
   133            USISTTIFG = 0x02       /*! START condition received. Interrupt pending. */
   134        };
   135
   136        /*! USI counter interrupt flag. Set when the USICNTx = 0. Automatically
   137           *cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0. */
   138        enum USIIFG_t {
   139            USIIFG_OFF = 0x00,     /*! No interrupt pending */
   140            USIIFG = 0x01          /*! Interrupt pending */
   141        };
   142
   143        /*! Clock divider select */
   144        enum USIDIV_t {
   145            USIDIV_0 = 0x00,       /*! Divide by 1 */
   146            USIDIV_1 = 0x20,       /*! Divide by 2 */
   147            USIDIV_2 = 0x40,       /*! Divide by 4 */
   148            USIDIV_3 = 0x60,       /*! Divide by 8 */
   149            USIDIV_4 = 0x80,       /*! Divide by 16 */
   150            USIDIV_5 = 0xA0,       /*! Divide by 32 */
   151            USIDIV_6 = 0xC0,       /*! Divide by 64 */
   152            USIDIV_7 = 0xE0        /*! Divide by 128 */
   153        };
   154
   155        /*! Clock source select. Not used in slave mode. */
   156        enum USISSEL_t {
   157            USISSEL_0 = 0x00,      /*! SCLK (Not used in SPI mode) */
   158            USISSEL_1 = 0x04,      /*! ACLK */
   159            USISSEL_2 = 0x08,      /*! SMCLK */
   160            USISSEL_3 = 0x0C,      /*! SMCLK */
   161            USISSEL_4 = 0x10,      /*! USISWCLK bit */
   162            USISSEL_5 = 0x14,      /*! TACCR0 */
   163            USISSEL_6 = 0x18,      /*! TACCR1 */
   164            USISSEL_7 = 0x1C       /*! TACCR2 (Reserved on MSP430F20xx devices) */
   165        };
   166
   167        /*! Clock polarity select */
   168        enum USICKPL_t {
   169            USICKPL_OFF = 0x00,     /*! Inactive state is low */
   170            USICKPL = 0x02          /*! Inactive state is high */
   171        };
   172
   173        /*! Software clock */
   174        enum USISWCLK_t {
   175            USISWCLK_OFF = 0x00,    /*! Input clock is low */
   176            USISWCLK = 0x01         /*! Input clock is high */
   177        };
   178
   179        /*! SCL release. The SCL line is released from low to idle. USISCLREL is
   180           *cleared if a START condition is detected. */
   181        enum USISCLREL_t {
   182            USISCLREL_OFF = 0x00,   /*! SCL line is held low if USIIFG is set */
   183            USISCLREL = 0x80        /*! SCL line is released */
   184        };
   185
   186        /*! 16-bit shift register enable */
   187        enum USI16B_t {
   188            USI16B_OFF = 0x00,      /*! 8-bit shift register mode. Low byte register USISRL is used. */
   189            USI16B = 0x40           /*! 16-bit shift register mode. Both high and low byte registers USISRL
   190                                       *and USISRH are used. USISR addresses all 16 bits simultaneously. */
   191        };
   192
   193        /*! USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be
   194           *cleared automatically when USICNTx is written with a value > 0. */
   195        enum USIIFGCC_t {
   196            USIIFGCC_OFF = 0x00,    /*! USIIFG automatically cleared on USICNTx update */
   197            USIIFGCC = 0x20         /*! USIIFG is not cleared automatically */
   198        };
   199
   200        /*! USI bit count - Bit4 */
   201        enum USICNT4_t {
   202            USICNT4_OFF = 0x00,     /*! USI bit count */
   203            USICNT4 = 0x10          /*! USI bit count */
   204        };
   205
   206        /*! USI bit count - Bit3 */
   207        enum USICNT3_t {
   208            USICNT3_OFF = 0x00,     /*! USI bit count */
   209            USICNT3 = 0x08          /*! USI bit count */
   210        };
   211
   212        /*! USI bit count - Bit2 */
   213        enum USICNT2_t {
   214            USICNT2_OFF = 0x00,     /*! USI bit count */
   215            USICNT2 = 0x04          /*! USI bit count */
   216        };
   217
   218        /*! USI bit count - Bit1 */
   219        enum USICNT1_t {
   220            USICNT1_OFF = 0x00,     /*! USI bit count */
   221            USICNT1 = 0x02          /*! USI bit count */
   222        };
   223
   224        /*! USI bit count - Bit0 */
   225        enum USICNT0_t {
   226            USICNT0_OFF = 0x00,     /*! USI bit count */
   227            USICNT0 = 0x01          /*! USI bit count */
   228        };
   229
   230        struct USICTL0_t {
   231            USIPE7_t    USIPE7;     /*! USI SDI/SDA port enable.
   232                                     *Input in SPI mode, input or open drain output in I2C mode.
   233                                     *  0  USI function disabled
   234                                     *  1  USI function enabled */
   235            USIPE6_t    USIPE6;     /*! USI SDO/SCL port enable.
   236                                     *Output in SPI mode, input or open drain output in I2C mode.
   237                                     *  0  USI function disabled
   238                                     *  1  USI function enabled */
   239            USIPE5_t    USIPE5;     /*! USI SCLK port enable.
   240                                     *Input in SPI slave mode, or I2C mode, output in SPI master mode.
   241                                     *  0  USI function disabled
   242                                     *  1  USI function enabled */
   243            USILSB_t    USILSB;     /*! LSB first select. This bit controls the direction of the receive and transmit shift register.
   244                                     *  0  MSB first
   245                                     *  1  LSB first */
   246            USIMST_t    USIMST;     /*! Master select
   247                                     *  0  Slave mode
   248                                     *  1  Master mode */
   249            USIGE_t     USIGE;      /*! Output latch control
   250                                     *  0  Output latch enable depends on shift clock
   251                                     *  1  Output latch always enabled and transparent */
   252            USIOE_t     USIOE;      /*! Data output enable
   253                                     *  0  Output disabled
   254                                     *  1  Output enabled */
   255            USISWRST_t  USISWRST;   /*! USI software reset
   256                                     *  0  USI released for operation.
   257                                     *  1  USI logic held in reset state. */
   258        }
   259
   260        struct USICTL1_t {
   261            USICKPH_t   USICKPH;    /*! Clock phase select
   262                                     *  0  Data is changed on the first SCLK edge and captured on the
   263                                     *     following edge.
   264                                     *  1  Data is captured on the first SCLK edge and changed on the
   265                                     *     following edge. */
   266            USII2C_t    USII2C;     /*! I2C mode enable
   267                                     *  0  I2C mode disabled
   268                                     *  1  I2C mode enabled*/
   269            USISTTIE_t  USISTTIE;   /*! START condition interrupt-enable
   270                                     *  0  Interrupt on START condition disabled
   271                                     *  1  Interrupt on START condition enabled */
   272            USIIE_t     USIIE;      /*! USI counter interrupt enable
   273                                     *  0  Interrupt disabled
   274                                     *  1  Interrupt enabled */
   275            USIAL_t     USIAL;      /*! Arbitration lost
   276                                     *  0  No arbitration lost condition
   277                                     *  1  Arbitration lost */
   278            USISTP_t    USISTP;     /*! STOP condition received. USISTP is automatically cleared if USICNTx is
   279                                     *loaded with a value > 0 when USIIFGCC = 0.
   280                                     *  0  No STOP condition received
   281                                     *  1  STOP condition received */
   282            USISTTIFG_t USISTTIFG;  /*! START condition interrupt flag
   283                                     *  0  No START condition received. No interrupt pending.
   284                                     *  1  START condition received. Interrupt pending. */
   285            USIIFG_t    USIIFG;     /*! USI counter interrupt flag. Set when the USICNTx = 0. Automatically
   286                                     *cleared if USICNTx is loaded with a value > 0 when USIIFGCC = 0.
   287                                     *  0  No interrupt pending
   288                                     *  1  Interrupt pending */
   289        }
   290
   291        struct USICKCTL_t {
   292            USIDIV_t    USIDIV;     /*! Clock divider select
   293                                     *  000  Divide by 1
   294                                     *  001  Divide by 2
   295                                     *  010  Divide by 4
   296                                     *  011  Divide by 8
   297                                     *  100  Divide by 16
   298                                     *  101  Divide by 32
   299                                     *  110  Divide by 64
   300                                     *  111  Divide by 128 */
   301            USISSEL_t   USISSEL;    /*! Clock source select. Not used in slave mode.
   302                                     *  000  SCLK (Not used in SPI mode)
   303                                     *  001  ACLK
   304                                     *  010  SMCLK
   305                                     *  011  SMCLK
   306                                     *  100  USISWCLK bit
   307                                     *  101  TACCR0
   308                                     *  110  TACCR1
   309                                     *  111  TACCR2 (Reserved on MSP430F20xx devices) */
   310            USICKPL_t   USICKPL;    /*! Clock polarity select
   311                                     *  0  Inactive state is low
   312                                     *  1  Inactive state is high */
   313            USISWCLK_t  USISWCLK;   /*! Software clock
   314                                     *  0  Input clock is low
   315                                     *  1  Input clock is high */
   316        }
   317
   318        struct USICNT_t {
   319            USISCLREL_t USISCLREL;  /*! SCL release. The SCL line is released from low to idle. USISCLREL is
   320                                     *  cleared if a START condition is detected.
   321                                     *  0  SCL line is held low if USIIFG is set
   322                                     *  1  SCL line is released */
   323            USI16B_t    USI16B;     /*! 16-bit shift register enable
   324                                     *  0  8-bit shift register mode. Low byte register USISRL is used.
   325                                     *  1  16-bit shift register mode. Both high and low byte registers USISRL
   326                                     *  and USISRH are used. USISR addresses all 16 bits simultaneously.*/
   327            USIIFGCC_t  USIIFGCC;   /*! USI interrupt flag clear control. When USIIFGCC = 1 the USIIFG will not be
   328                                     *cleared automatically when USICNTx is written with a value > 0.
   329                                     *  0  USIIFG automatically cleared on USICNTx update
   330                                     *  1  USIIFG is not cleared automatically */
   331            USICNT4_t   USICNT4;    /*! USI bit count bit 4
   332                                     *The USICNTx bits set the number of bits to be received or transmitted. */
   333            USICNT3_t   USICNT3;    /*! USI bit count bit 3
   334                                     *The USICNTx bits set the number of bits to be received or transmitted. */
   335            USICNT2_t   USICNT2;    /*! USI bit count bit 2
   336                                     *The USICNTx bits set the number of bits to be received or transmitted. */
   337            USICNT1_t   USICNT1;    /*! USI bit count bit 1
   338                                     *The USICNTx bits set the number of bits to be received or transmitted. */
   339            USICNT0_t   USICNT0;    /*! USI bit count bit 0
   340                                     *The USICNTx bits set the number of bits to be received or transmitted. */
   341        }
   342
   343        /*!
   344        *  ======== ForceSetDefaultRegister_t ========
   345        *  Force Set Default Register
   346        *
   347        *  Type to store if each register needs to be forced initialized
   348        *  even if the register is in default state.
   349        *
   350        *  @see #ForceSetDefaultRegister_t
   351        */
   352        struct ForceSetDefaultRegister_t {
   353            String     register;
   354            Bool       regForceSet;
   355        }
   356
   357        /*!
   358        *  ======== regIntVect_t ========
   359        *  Interrupt vector description
   360        *
   361        *  Type to describe a single interrupt vector pin and all its possible
   362        *  configurations.
   363        *
   364        *  @see #regIntVect_t
   365        */
   366        struct regIntVect_t {
   367            String                    registerName;
   368            String                    registerDescription;
   369            String                    isrToggleString;
   370            String                    priorityName;
   371            Bool                      interruptEnable;
   372            Bool                      interruptHandler;
   373            Int                       priority;
   374        }
   375
   376    instance:
   377
   378        /*!
   379        *  ======== setUSIIE ========
   380        *  Sets USIIE register
   381        *
   382        *  @see #setUSIIE
   383        */
   384        Bool setUSIIE(Bool set);
   385
   386        /*!
   387        *  ======== setUSIIE ========
   388        *  Gets USIIE register
   389        *
   390        *  @see #setUSIIE
   391        */
   392        Bool getUSIIE();
   393
   394        /*!
   395        *  ======== setUSISTTIE ========
   396        *  Sets USISTTIE register
   397        *
   398        *  @see #setUSISTTIE
   399        */
   400        Bool setUSISTTIE(Bool set);
   401
   402        /*!
   403        *  ======== getUSISTTIE ========
   404        *  Gets USISTTIE register
   405        *
   406        *  @see #getUSISTTIE
   407        */
   408        Bool getUSISTTIE();
   409    }


package ti.catalog.msp430.peripherals.communication

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.clock;
    34
    35    /*!
    36     *  ======== ti.catalog.msp430.peripherals.communication ========
    37     *  MSP430 USCI peripherals
    38     */
    39    package ti.catalog.msp430.peripherals.communication [1, 0, 0]
    40    {
    41        interface IUSI;
    42        interface IUSCI , IUSCI_I2C , IUSCI_SPI , IUSCI_UART;
    43        interface IUSCI_A0_UART , IUSCI_A0_SPI , IUSCI_A1_UART;
    44        interface IUSCI_B0_SPI , IUSCI_B0_I2C;
    45        interface IEUSCI;
    46        module USCI_A0_UART_2xx;
    47        module USCI_A0_SPI_2xx;
    48        module USCI_B0_SPI_2xx;
    49        module USCI_B0_I2C_2xx;
    50        module USCI_A1_UART_2xx;
    51        module USCI_A1_SPI_2xx;
    52        module USCI_B1_SPI_2xx;
    53        module USCI_B1_I2C_2xx;
    54        module USI;
    55        module EUSCI_A0;
    56        module EUSCI_A1;
    57        module EUSCI_B0;
    58    }


module ti.catalog.msp430.peripherals.communication.USCI_A0_SPI_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface A0 SPI 2xx
    37     */
    38    metaonly module USCI_A0_SPI_2xx inherits IUSCI_A0_SPI {
    39        /*
    40         *  ======== create ========
    41         */
    42        create(IClock.Instance clock);
    43
    44
    45
    46    instance:
    47        /*! @_nodoc */
    48        config IClock.Instance clock;
    49
    50        /*! Determine if each Register needs to be forced set or not */
    51        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    52        [
    53            { register : "UCA0CTL0"   , regForceSet : false },
    54            { register : "UCA0CTL1"   , regForceSet : false },
    55            { register : "UCA0BR0"    , regForceSet : false },
    56            { register : "UCA0BR1"    , regForceSet : false },
    57            { register : "UCA0STAT"   , regForceSet : false },
    58            { register : "UCA0RXBUF"  , regForceSet : false },
    59            { register : "UCA0TXBUF"  , regForceSet : false }
    60        ];
    61    }


module ti.catalog.msp430.peripherals.communication.USCI_A0_UART_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface A0 UART 2xx
    37     */
    38    metaonly module USCI_A0_UART_2xx inherits IUSCI_A0_UART {
    39        /* Add 2xx-specific stuff here */
    40
    41        /*
    42         *  ======== create ========
    43         */
    44        create(IClock.Instance clock);
    45
    46    instance:
    47        /*! @_nodoc */
    48        config IClock.Instance clock;
    49
    50        /*! Determine if each Register needs to be forced set or not */
    51        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    52        [
    53            { register : "UCA0CTL0"   , regForceSet : false },
    54            { register : "UCA0CTL1"   , regForceSet : false },
    55            { register : "UCA0BR0"    , regForceSet : false },
    56            { register : "UCA0BR1"    , regForceSet : false },
    57            { register : "UCA0MCTL"   , regForceSet : false },
    58            { register : "UCA0STAT"   , regForceSet : false },
    59            { register : "UCA0RXBUF"  , regForceSet : false },
    60            { register : "UCA0TXBUF"  , regForceSet : false },
    61            { register : "UCA0ABCTL"  , regForceSet : false },
    62            { register : "UCA0IRTCTL" , regForceSet : false },
    63            { register : "UCA0IRRCTL" , regForceSet : false }
    64        ];
    65    }


module ti.catalog.msp430.peripherals.communication.USCI_A1_SPI_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface A1 SPI 2xx
    37     */
    38    metaonly module USCI_A1_SPI_2xx inherits IUSCI_A1_SPI {
    39        /*
    40         *  ======== create ========
    41         */
    42        create(IClock.Instance clock);
    43
    44        /*! USCI_A1 transmit interrupt enable */
    45        enum UCA1TXIE_t {
    46            UCA1TXIE_OFF = 0x00,    /*! Interrupt disabled */
    47            UCA1TXIE = 0x02         /*! Interrupt enabled */
    48        };
    49
    50        /*! USCI_A1 receive interrupt enable */
    51        enum UCA1RXIE_t {
    52            UCA1RXIE_OFF = 0x00,     /*! Interrupt disabled */
    53            UCA1RXIE = 0x01          /*! Interrupt enabled */
    54        };
    55
    56        /*! USCI_A1 SPI Interrupt Enable Register */
    57        struct UC1IE_t {
    58            UCA1TXIE_t  UCA1TXIE;   /*! USCI_A1 transmit interrupt enable
    59                                     *  0  Interrupt disabled
    60                                     *  1  Interrupt enabled */
    61            UCA1RXIE_t  UCA1RXIE;   /*! USCI_A1 receive interrupt enable
    62                                     *  0  Interrupt disabled
    63                                     *  1  Interrupt enabled */
    64        }
    65
    66    instance:
    67        /*! @_nodoc */
    68        config IClock.Instance clock;
    69
    70        /*! USCI_A1 Interrupt Enable Register */
    71        config UC1IE_t UC1IE = {
    72            UCA1TXIE    : UCA1TXIE_OFF,
    73            UCA1RXIE    : UCA1RXIE_OFF
    74        };
    75
    76        /*! USCI_A1 UART interrupt enables */
    77        config regIntVect_t interruptSource[2];
    78
    79        /*! Determine if each Register needs to be forced set or not */
    80        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    81        [
    82            { register : "UCA1CTL0"   , regForceSet : false },
    83            { register : "UCA1CTL1"   , regForceSet : false },
    84            { register : "UCA1BR0"    , regForceSet : false },
    85            { register : "UCA1BR1"    , regForceSet : false },
    86            { register : "UCA1STAT"   , regForceSet : false },
    87            { register : "UCA1RXBUF"  , regForceSet : false },
    88            { register : "UCA1TXBUF"  , regForceSet : false },
    89            { register : "UC1IE"      , regForceSet : false }
    90        ];
    91    }


module ti.catalog.msp430.peripherals.communication.USCI_A1_UART_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface
    37     */
    38    metaonly module USCI_A1_UART_2xx inherits IUSCI_A1_UART {
    39        /* Add 2xx-specific stuff here */
    40
    41        /*
    42         *  ======== create ========
    43         */
    44        create(IClock.Instance clock);
    45
    46        /*! USCI_A1 transmit interrupt enable */
    47        enum UCA1TXIE_t {
    48            UCA1TXIE_OFF = 0x00,    /*! Interrupt disabled */
    49            UCA1TXIE = 0x02         /*! Interrupt enabled */
    50        };
    51
    52        /*! USCI_A1 receive interrupt enable */
    53        enum UCA1RXIE_t {
    54            UCA1RXIE_OFF = 0x00,     /*! Interrupt disabled */
    55            UCA1RXIE = 0x01          /*! Interrupt enabled */
    56        };
    57
    58        /*! USCI_Ax UART Interrupt Enable Register */
    59        struct UC1IE_t {
    60            UCA1TXIE_t  UCA1TXIE;   /*! USCI_A1 transmit interrupt enable
    61                                     *  0  Interrupt disabled
    62                                     *  1  Interrupt enabled */
    63            UCA1RXIE_t  UCA1RXIE;   /*! USCI_A1 receive interrupt enable
    64                                     *  0  Interrupt disabled
    65                                     *  1  Interrupt enabled */
    66        }
    67
    68    instance:
    69        /*! @_nodoc */
    70        config IClock.Instance clock;
    71
    72        /*! USCI_A1 Interrupt Enable Register */
    73        config UC1IE_t UC1IE = {
    74            UCA1TXIE    : UCA1TXIE_OFF,
    75            UCA1RXIE    : UCA1RXIE_OFF
    76        };
    77
    78        /*! USCI_A1 UART interrupt enables */
    79        config regIntVect_t interruptSource[2];
    80
    81        /*! Determine if each Register needs to be forced set or not */
    82        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    83        [
    84            { register : "UCA1CTL0"   , regForceSet : false },
    85            { register : "UCA1CTL1"   , regForceSet : false },
    86            { register : "UCA1BR0"    , regForceSet : false },
    87            { register : "UCA1BR1"    , regForceSet : false },
    88            { register : "UCA1MCTL"   , regForceSet : false },
    89            { register : "UCA1STAT"   , regForceSet : false },
    90            { register : "UCA1RXBUF"  , regForceSet : false },
    91            { register : "UCA1TXBUF"  , regForceSet : false },
    92            { register : "UCA1ABCTL"  , regForceSet : false },
    93            { register : "UCA1IRTCTL" , regForceSet : false },
    94            { register : "UCA1IRRCTL" , regForceSet : false },
    95            { register : "UC1IE"      , regForceSet : false }
    96        ];
    97    }


module ti.catalog.msp430.peripherals.communication.USCI_B0_I2C_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface B0 I2C 2xx
    37     */
    38    metaonly module USCI_B0_I2C_2xx inherits IUSCI_B0_I2C {
    39
    40        /*
    41         *  ======== create ========
    42         */
    43        create(IClock.Instance clock);
    44
    45        /*! Not-acknowledge interrupt enable */
    46        enum UCNACKIE_t {
    47            UCNACKIE_OFF = 0x00,    /*! Interrupt disabled */
    48            UCNACKIE = 0x80         /*! Interrupt enabled */
    49        };
    50
    51        /*! Stop condition interrupt enable */
    52        enum UCSTPIE_t {
    53            UCSTPIE_OFF = 0x00,     /*! Interrupt disabled */
    54            UCSTPIE = 0x80          /*! Interrupt enabled */
    55        };
    56
    57        /*! Start condition interrupt enable */
    58        enum UCSTTIE_t {
    59            UCSTTIE_OFF = 0x00,     /*! Interrupt disabled */
    60            UCSTTIE = 0x80          /*! Interrupt enabled */
    61        };
    62
    63        /*! Arbitration lost interrupt enable */
    64        enum UCALIE_t {
    65            UCALIE_OFF = 0x00,      /*! Interrupt disabled */
    66            UCALIE = 0x80           /*! Interrupt enabled */
    67        };
    68
    69        /*! USCI_Bx I2C Interrupt Enable Register */
    70        struct UCBxI2CIE_t {
    71            UCNACKIE_t  UCNACKIE;   /*! Not-acknowledge interrupt enable
    72                                     *  0  Interrupt disabled
    73                                     *  1  Interrupt enabled */
    74            UCSTPIE_t   UCSTPIE;    /*! Stop condition interrupt enable
    75                                     *  0  Interrupt disabled
    76                                     *  1  Interrupt enabled */
    77            UCSTTIE_t   UCSTTIE;    /*! Start condition interrupt enable
    78                                     *  0  Interrupt disabled
    79                                     *  1  Interrupt enabled */
    80            UCALIE_t    UCALIE;    /*! Arbitration lost interrupt enable
    81                                     *  0  Interrupt disabled
    82                                     *  1  Interrupt enabled */
    83        }
    84
    85    instance:
    86        /*! @_nodoc */
    87        config IClock.Instance clock;
    88
    89        /*! USCI_Bx I2C Interrupt Enable Register */
    90        config UCBxI2CIE_t UCB0I2CIE = {
    91            UCNACKIE    : UCNACKIE_OFF,
    92            UCSTPIE     : UCSTPIE_OFF,
    93            UCSTTIE     : UCSTTIE_OFF,
    94            UCALIE      : UCALIE_OFF,
    95        };
    96
    97       /*!
    98        *  ======== setUCNACKIE ========
    99        *  Sets UCNACKIE bit
   100        *
   101        *  @see #setUCNACKIE
   102        */
   103        Bool setUCNACKIE(Bool set);
   104
   105       /*!
   106        *  ======== getUCNACKIE ========
   107        *  Gets UCNACKIE bit
   108        *
   109        *  @see #getUCNACKIE
   110        */
   111        Bool getUCNACKIE();
   112
   113       /*!
   114        *  ======== setUCSTPIE ========
   115        *  Sets UCSTPIE bit
   116        *
   117        *  @see #setUCSTPIE
   118        */
   119        Bool setUCSTPIE(Bool set);
   120
   121       /*!
   122        *  ======== getUCSTPIE ========
   123        *  Gets UCSTPIE bit
   124        *
   125        *  @see #getUCSTPIE
   126        */
   127        Bool getUCSTPIE();
   128
   129       /*!
   130        *  ======== setUCSTTIE ========
   131        *  Sets UCSTTIE bit
   132        *
   133        *  @see #setUCSTTIE
   134        */
   135        Bool setUCSTTIE(Bool set);
   136
   137       /*!
   138        *  ======== getUCSTTIE ========
   139        *  Gets UCSTTIE bit
   140        *
   141        *  @see #getUCSTTIE
   142        */
   143        Bool getUCSTTIE();
   144
   145       /*!
   146        *  ======== setUCALIE ========
   147        *  Sets UCALIE bit
   148        *
   149        *  @see #setUCALIE
   150        */
   151        Bool setUCALIE(Bool set);
   152
   153       /*!
   154        *  ======== getUCALIE ========
   155        *  Gets UCALIE bit
   156        *
   157        *  @see #getUCALIE
   158        */
   159        Bool getUCALIE();
   160
   161        /*! USCI_B0 I2C interrupt enables */
   162        config regIntVect_t interruptSource[4];
   163
   164        /*! Determine if each Register needs to be forced set or not */
   165        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   166        [
   167            { register : "UCB0CTL0"   , regForceSet : false },
   168            { register : "UCB0CTL1"   , regForceSet : false },
   169            { register : "UCB0BR0"    , regForceSet : false },
   170            { register : "UCB0BR1"    , regForceSet : false },
   171            { register : "UCB0STAT"   , regForceSet : false },
   172            { register : "UCB0RXBUF"  , regForceSet : false },
   173            { register : "UCB0TXBUF"  , regForceSet : false },
   174            { register : "UCB0I2COA"  , regForceSet : false },
   175            { register : "UCB0I2CSA"  , regForceSet : false },
   176            { register : "UCB0I2CIE"  , regForceSet : false }
   177        ];
   178    }


module ti.catalog.msp430.peripherals.communication.USCI_B0_SPI_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface B0 SPI 2xx
    37     */
    38    metaonly module USCI_B0_SPI_2xx inherits IUSCI_B0_SPI {
    39
    40        /*
    41         *  ======== create ========
    42         */
    43        create(IClock.Instance clock);
    44
    45    instance:
    46        /*! @_nodoc */
    47        config IClock.Instance clock;
    48
    49        /*! Determine if each Register needs to be forced set or not */
    50        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    51        [
    52            { register : "UCB0CTL0"   , regForceSet : false },
    53            { register : "UCB0CTL1"   , regForceSet : false },
    54            { register : "UCB0BR0"    , regForceSet : false },
    55            { register : "UCB0BR1"    , regForceSet : false },
    56            { register : "UCB0STAT"   , regForceSet : false },
    57            { register : "UCB0RXBUF"  , regForceSet : false },
    58            { register : "UCB0TXBUF"  , regForceSet : false }
    59        ];
    60    }


module ti.catalog.msp430.peripherals.communication.USCI_B1_I2C_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface B1 I2C 2xx
    37     */
    38    metaonly module USCI_B1_I2C_2xx inherits IUSCI_B1_I2C {
    39
    40        /*
    41         *  ======== create ========
    42         */
    43        create(IClock.Instance clock);
    44
    45        /*! Not-acknowledge interrupt enable */
    46        enum UCNACKIE_t {
    47            UCNACKIE_OFF = 0x00,    /*! Interrupt disabled */
    48            UCNACKIE = 0x80         /*! Interrupt enabled */
    49        };
    50
    51        /*! Stop condition interrupt enable */
    52        enum UCSTPIE_t {
    53            UCSTPIE_OFF = 0x00,     /*! Interrupt disabled */
    54            UCSTPIE = 0x80          /*! Interrupt enabled */
    55        };
    56
    57        /*! Start condition interrupt enable */
    58        enum UCSTTIE_t {
    59            UCSTTIE_OFF = 0x00,     /*! Interrupt disabled */
    60            UCSTTIE = 0x80          /*! Interrupt enabled */
    61        };
    62
    63        /*! Arbitration lost interrupt enable */
    64        enum UCALIE_t {
    65            UCALIE_OFF = 0x00,      /*! Interrupt disabled */
    66            UCALIE = 0x80           /*! Interrupt enabled */
    67        };
    68
    69        /*! USCI_Bx I2C Interrupt Enable Register */
    70        struct UCBxI2CIE_t {
    71            UCNACKIE_t  UCNACKIE;   /*! Not-acknowledge interrupt enable
    72                                     *  0  Interrupt disabled
    73                                     *  1  Interrupt enabled */
    74            UCSTPIE_t   UCSTPIE;    /*! Stop condition interrupt enable
    75                                     *  0  Interrupt disabled
    76                                     *  1  Interrupt enabled */
    77            UCSTTIE_t   UCSTTIE;    /*! Start condition interrupt enable
    78                                     *  0  Interrupt disabled
    79                                     *  1  Interrupt enabled */
    80            UCALIE_t    UCALIE;    /*! Arbitration lost interrupt enable
    81                                     *  0  Interrupt disabled
    82                                     *  1  Interrupt enabled */
    83        }
    84
    85        /*! USCI_B1 transmit interrupt enable */
    86        enum UCB1TXIE_t {
    87            UCB1TXIE_OFF = 0x00,    /*! Interrupt disabled */
    88            UCB1TXIE = 0x08         /*! Interrupt enabled */
    89        };
    90
    91        /*! USCI_B1 receive interrupt enable */
    92        enum UCB1RXIE_t {
    93            UCB1RXIE_OFF = 0x00,     /*! Interrupt disabled */
    94            UCB1RXIE = 0x04          /*! Interrupt enabled */
    95        };
    96
    97        /*! USCI_xx SPI Interrupt Enable Register */
    98        struct UC1IE_t {
    99            UCB1TXIE_t  UCB1TXIE;   /*! USCI_B1 transmit interrupt enable
   100                                     *  0  Interrupt disabled
   101                                     *  1  Interrupt enabled */
   102            UCB1RXIE_t  UCB1RXIE;   /*! USCI_B1 receive interrupt enable
   103                                     *  0  Interrupt disabled
   104                                     *  1  Interrupt enabled */
   105        }
   106
   107    instance:
   108        /*! @_nodoc */
   109        config IClock.Instance clock;
   110
   111        /*! USCI_Bx I2C Interrupt Enable Register */
   112        config UCBxI2CIE_t UCB1I2CIE = {
   113            UCNACKIE    : UCNACKIE_OFF,
   114            UCSTPIE     : UCSTPIE_OFF,
   115            UCSTTIE     : UCSTTIE_OFF,
   116            UCALIE      : UCALIE_OFF,
   117        };
   118
   119        /*! USCI_B1 Interrupt Enable Register */
   120        config UC1IE_t UC1IE = {
   121            UCB1TXIE    : UCB1TXIE_OFF,
   122            UCB1RXIE    : UCB1RXIE_OFF
   123        };
   124
   125       /*!
   126        *  ======== setUCNACKIE ========
   127        *  Sets UCNACKIE bit
   128        *
   129        *  @see #setUCNACKIE
   130        */
   131        Bool setUCNACKIE(Bool set);
   132
   133       /*!
   134        *  ======== getUCNACKIE ========
   135        *  Gets UCNACKIE bit
   136        *
   137        *  @see #getUCNACKIE
   138        */
   139        Bool getUCNACKIE();
   140
   141       /*!
   142        *  ======== setUCSTPIE ========
   143        *  Sets UCSTPIE bit
   144        *
   145        *  @see #setUCSTPIE
   146        */
   147        Bool setUCSTPIE(Bool set);
   148
   149       /*!
   150        *  ======== getUCSTPIE ========
   151        *  Gets UCSTPIE bit
   152        *
   153        *  @see #getUCSTPIE
   154        */
   155        Bool getUCSTPIE();
   156
   157       /*!
   158        *  ======== setUCSTTIE ========
   159        *  Sets UCSTTIE bit
   160        *
   161        *  @see #setUCSTTIE
   162        */
   163        Bool setUCSTTIE(Bool set);
   164
   165       /*!
   166        *  ======== getUCSTTIE ========
   167        *  Gets UCSTTIE bit
   168        *
   169        *  @see #getUCSTTIE
   170        */
   171        Bool getUCSTTIE();
   172
   173       /*!
   174        *  ======== setUCALIE ========
   175        *  Sets UCALIE bit
   176        *
   177        *  @see #setUCALIE
   178        */
   179        Bool setUCALIE(Bool set);
   180
   181       /*!
   182        *  ======== getUCALIE ========
   183        *  Gets UCALIE bit
   184        *
   185        *  @see #getUCALIE
   186        */
   187        Bool getUCALIE();
   188
   189        /*! USCI_B1 I2C interrupt enables */
   190        config regIntVect_t interruptSource[6];
   191
   192        /*! Determine if each Register needs to be forced set or not */
   193        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   194        [
   195            { register : "UCB1CTL0"   , regForceSet : false },
   196            { register : "UCB1CTL1"   , regForceSet : false },
   197            { register : "UCB1BR0"    , regForceSet : false },
   198            { register : "UCB1BR1"    , regForceSet : false },
   199            { register : "UCB1STAT"   , regForceSet : false },
   200            { register : "UCB1RXBUF"  , regForceSet : false },
   201            { register : "UCB1TXBUF"  , regForceSet : false },
   202            { register : "UCB1I2COA"  , regForceSet : false },
   203            { register : "UCB1I2CSA"  , regForceSet : false },
   204            { register : "UCB1I2CIE"  , regForceSet : false },
   205            { register : "UC1IE"      , regForceSet : false }
   206        ];
   207    }


module ti.catalog.msp430.peripherals.communication.USCI_B1_SPI_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Communication Interface B1 SPI 2xx
    37     */
    38    metaonly module USCI_B1_SPI_2xx inherits IUSCI_B1_SPI {
    39        /*
    40         *  ======== create ========
    41         */
    42        create(IClock.Instance clock);
    43
    44        /*! USCI_B1 transmit interrupt enable */
    45        enum UCB1TXIE_t {
    46            UCB1TXIE_OFF = 0x00,    /*! Interrupt disabled */
    47            UCB1TXIE = 0x08         /*! Interrupt enabled */
    48        };
    49
    50        /*! USCI_B1 receive interrupt enable */
    51        enum UCB1RXIE_t {
    52            UCB1RXIE_OFF = 0x00,     /*! Interrupt disabled */
    53            UCB1RXIE = 0x04          /*! Interrupt enabled */
    54        };
    55
    56        /*! USCI_xx SPI Interrupt Enable Register */
    57        struct UC1IE_t {
    58            UCB1TXIE_t  UCB1TXIE;   /*! USCI_B1 transmit interrupt enable
    59                                     *  0  Interrupt disabled
    60                                     *  1  Interrupt enabled */
    61            UCB1RXIE_t  UCB1RXIE;   /*! USCI_B1 receive interrupt enable
    62                                     *  0  Interrupt disabled
    63                                     *  1  Interrupt enabled */
    64        }
    65
    66    instance:
    67        /*! @_nodoc */
    68        config IClock.Instance clock;
    69
    70        /*! USCI_B1 Interrupt Enable Register */
    71        config UC1IE_t UC1IE = {
    72            UCB1TXIE    : UCB1TXIE_OFF,
    73            UCB1RXIE    : UCB1RXIE_OFF
    74        };
    75
    76        /*! USCI_A1 SPI interrupt enables */
    77        config regIntVect_t interruptSource[2];
    78
    79        /*! Determine if each Register needs to be forced set or not */
    80        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    81        [
    82            { register : "UCB1CTL0"   , regForceSet : false },
    83            { register : "UCB1CTL1"   , regForceSet : false },
    84            { register : "UCB1BR0"    , regForceSet : false },
    85            { register : "UCB1BR1"    , regForceSet : false },
    86            { register : "UCB1STAT"   , regForceSet : false },
    87            { register : "UCB1RXBUF"  , regForceSet : false },
    88            { register : "UCB1TXBUF"  , regForceSet : false },
    89            { register : "UC1IE"      , regForceSet : false }
    90        ];
    91    }


module ti.catalog.msp430.peripherals.communication.USI

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     * Universal Serial Interface
    37     */
    38    metaonly module USI inherits IUSI {
    39        /*
    40         *  ======== create ========
    41         */
    42        create(IClock.Instance clock);
    43
    44    instance:
    45        /*! @_nodoc */
    46        config IClock.Instance clock;
    47
    48        /*! USI Control Register 0 */
    49        config USICTL0_t USICTL0 = {
    50            USIPE7      : USIPE7_OFF,
    51            USIPE6      : USIPE6_OFF,
    52            USIPE5      : USIPE5_OFF,
    53            USILSB      : USILSB_OFF,
    54            USIMST      : USIMST_OFF,
    55            USIGE       : USIGE_OFF,
    56            USIOE       : USIOE_OFF,
    57            USISWRST    : USISWRST,
    58        };
    59
    60        /*! USI Control Register 1 */
    61        config USICTL1_t USICTL1 = {
    62            USICKPH     : USICKPH_OFF,
    63            USII2C      : USII2C_OFF,
    64            USISTTIE    : USISTTIE_OFF,
    65            USIIE       : USIIE_OFF,
    66            USIAL       : USIAL_OFF,
    67            USISTP      : USISTP_OFF,
    68            USISTTIFG   : USISTTIFG_OFF,
    69            USIIFG      : USIIFG,
    70        };
    71
    72        /*! USI Clock Control Register */
    73        config USICKCTL_t USICKCTL = {
    74            USIDIV      : USIDIV_0,
    75            USISSEL     : USISSEL_0,
    76            USICKPL     : USICKPL_OFF,
    77            USISWCLK    : USISWCLK_OFF,
    78        };
    79
    80        /*! USI Bit Counter Register */
    81        config USICNT_t USICNT = {
    82            USISCLREL   : USISCLREL_OFF,
    83            USI16B      : USI16B_OFF,
    84            USIIFGCC    : USIIFGCC_OFF,
    85            USICNT4     : USICNT4_OFF,
    86            USICNT3     : USICNT3_OFF,
    87            USICNT2     : USICNT2_OFF,
    88            USICNT1     : USICNT1_OFF,
    89            USICNT0     : USICNT0_OFF,
    90        };
    91
    92        /*! USI interrupt enables */
    93        config regIntVect_t interruptSource[2];
    94
    95        /*! Determine if each Register needs to be forced set or not */
    96        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    97        [
    98            { register : "USICTL0"    , regForceSet : false },
    99            { register : "USICTL1"    , regForceSet : false },
   100            { register : "USICKCTL"   , regForceSet : false },
   101            { register : "USICNT"     , regForceSet : false }
   102        ];
   103    }


module ti.catalog.msp430.peripherals.comparator.Comparator_Aplus

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Comparator_Aplus ========
    35     *  MSP430F2xx Family Comparator_Aplus Module
    36     */
    37    metaonly module Comparator_Aplus inherits IComparator {
    38
    39        /*! CACTL1 Register */
    40        struct CACTL1_t {
    41            CAEX_t      CAEX;               /*! Comparator_A+ exchange. This bit exchanges the comparator inputs and
    42                                             *inverts the comparator output. */
    43            CARSEL_t    CARSEL;             /*! Comparator_A+ reference select. This bit selects which terminal the
    44                                             * VCAREF is applied to.
    45                                             * When CAEX = 0:
    46                                             * 0     VCAREF is applied to the + terminal
    47                                             * 1     VCAREF is applied to the - terminal
    48                                             * When CAEX = 1:
    49                                             * 0     VCAREF is applied to the - terminal
    50                                             * 1     VCAREF is applied to the + terminal */
    51
    52            CAREF_t     CAREF;              /*! Comparator_A+ reference. These bits select the reference voltage VCAREF.
    53                                             * 00 Internal reference off. An external reference can be applied.
    54                                             * 01 0.25*VCC
    55                                             * 10 0.50*VCC
    56                                             * 11 Diode reference is selected */
    57
    58            CAON_t      CAON;               /*! Comparator_A+ on. This bit turns on the comparator. When the
    59                                             * comparator is off it consumes no current. The reference circuitry is enabled
    60                                             * or disabled independently.
    61                                             * 0     Off
    62                                             * 1     On */
    63
    64            CAIES_t     CAIES;              /*! Comparator_A interrupt edge select
    65                                             * 0  Rising edge
    66                                             * 1  Falling edge */
    67
    68            CAIE_t      CAIE;               /*! Comparator_A+ interrupt enable
    69                                             * 0 Disabled
    70                                             * 1 Enabled */
    71
    72            CAIFG_t     CAIFG;              /*! The Comparator_A+ interrupt flag
    73                                             * 0 No interrupt pending
    74                                             * 1 Interrupt pending */
    75        }
    76
    77        /*! CACTL1 Register */
    78        struct CACTL2_t {
    79            CASHORT_t   CASHORT;            /*! Input short. This bit shorts the + and - input terminals.
    80                                             * 0 Inputs not shorted.
    81                                             * 1 Inputs shorted. */
    82            P2CA4_t     P2CA4;              /*! Input select. This bit together with P2CA0 selects the + terminal input when
    83                                             * CAEX = 0 and the - terminal input when CAEX = 1 */
    84
    85            P2CA3_t     P2CA3;              /*! Input select. These bits select the - terminal input when CAEX = 0 and the
    86                                             * + terminal input when CAEX = 1.
    87                                             * 000 No connection
    88                                             * 001 CA1
    89                                             * 010 CA2
    90                                             * 011 CA3
    91                                             * 100 CA4
    92                                             * 101 CA5
    93                                             * 110 CA6
    94                                             * 111 CA7 */
    95            P2CA2_t     P2CA2;              /*! Input select. These bits select the - terminal input when CAEX = 0 and the
    96                                             * + terminal input when CAEX = 1.
    97                                             * 000 No connection
    98                                             * 001 CA1
    99                                             * 010 CA2
   100                                             * 011 CA3
   101                                             * 100 CA4
   102                                             * 101 CA5
   103                                             * 110 CA6
   104                                             * 111 CA7 */
   105           P2CA1_t     P2CA1;              /*! Input select. These bits select the - terminal input when CAEX = 0 and the
   106                                             * + terminal input when CAEX = 1.
   107                                             * 000 No connection
   108                                             * 001 CA1
   109                                             * 010 CA2
   110                                             * 011 CA3
   111                                             * 100 CA4
   112                                             * 101 CA5
   113                                             * 110 CA6
   114                                             * 111 CA7 */
   115            P2CA0_t     P2CA0;              /*! Input select. This bit, together with P2CA4, selects the + terminal input
   116                                             * when CAEX = 0 and the - terminal input when CAEX = 1.
   117                                             * 00 No connection
   118                                             * 01 CA0
   119                                             * 10 CA1
   120                                             * 11 CA2 */
   121            CAF_t       CAF;                /*! Comparator_A+ output filter
   122                                             * 0 Comparator_A+ output is not filtered
   123                                             * 1 Comparator_A+ output is filtered */
   124        }
   125
   126        /*! CAPD, Register */
   127        struct CAPD_t {
   128            CAPD7_t     CAPD7;              /*! CAPD7 Comparator_A+ port disable
   129                                             * 0 The input buffer is enabled.
   130                                             * 1 The input buffer is disabled.*/
   131
   132            CAPD6_t     CAPD6;              /*! CAPD6 Comparator_A+ port disable
   133                                             *  0 The input buffer is enabled.
   134                                             *  1 The input buffer is disabled.*/
   135            CAPD5_t     CAPD5;              /*! CAPD5 Comparator_A+ port disable
   136                                             *  0 The input buffer is enabled.
   137                                             *  1 The input buffer is disabled.*/
   138            CAPD4_t     CAPD4;              /*! CAPD4 Comparator_A+ port disable
   139                                             *  0 The input buffer is enabled.
   140                                             *  1 The input buffer is disabled.*/
   141            CAPD3_t     CAPD3;              /*! CAPD3 Comparator_A+ port disable
   142                                             *  0 The input buffer is enabled.
   143                                             *  1 The input buffer is disabled.*/
   144            CAPD2_t     CAPD2;              /*! CAPD2 Comparator_A+ port disable
   145                                             *  0 The input buffer is enabled.
   146                                             *  1 The input buffer is disabled.*/
   147            CAPD1_t     CAPD1;              /*! CAPD1 Comparator_A+ port disable
   148                                             *  0 The input buffer is enabled.
   149                                             *  1 The input buffer is disabled.*/
   150            CAPD0_t     CAPD0;              /*! CAPD0 Comparator_A+ port disable
   151                                             *  0 The input buffer is enabled.
   152                                             *  1 The input buffer is disabled.*/
   153        }
   154
   155        /*!
   156         *  ======== create ========
   157         *  Create an instance of this peripheral.
   158         */
   159        create();
   160
   161    instance:
   162       /*! CACTL1 Register */
   163        config CACTL1_t CACTL1 = {
   164            CAEX    :    CAEX_OFF,
   165            CARSEL  :    CARSEL_OFF,
   166            CAREF   :    CAREF_0,
   167            CAON    :    CAON_OFF,
   168            CAIES   :    CAIES_OFF,
   169            CAIE    :    CAIE_OFF,
   170            CAIFG   :    CAIFG_OFF
   171         };
   172
   173        /*! CACTL2 Register */
   174        config CACTL2_t CACTL2 = {
   175            CASHORT :    CASHORT_OFF,
   176            P2CA4   :     P2CA4_OFF,
   177            P2CA3   :     P2CA3_OFF,
   178            P2CA2   :     P2CA2_OFF,
   179            P2CA1   :     P2CA1_OFF,
   180            P2CA0   :    P2CA0_OFF,
   181            CAF     :    CAF_OFF
   182        };
   183
   184        /*! CAPD, Register */
   185        config CAPD_t CAPD = {
   186            CAPD7   :    CAPD7_OFF,
   187            CAPD6   :    CAPD6_OFF,
   188            CAPD5   :    CAPD5_OFF,
   189            CAPD4   :    CAPD4_OFF,
   190            CAPD3   :    CAPD3_OFF,
   191            CAPD2   :    CAPD2_OFF,
   192            CAPD1   :    CAPD1_OFF,
   193            CAPD0   :    CAPD0_OFF
   194        };
   195
   196        /*! Comparator_A+ has 1 interrupt enable */
   197        config regIntVect_t interruptSource[1];
   198
   199         /*! Determine if each Register needs to be forced set or not */
   200        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   201        [
   202            { register : "CACTL1" , regForceSet : false },
   203            { register : "CACTL2" , regForceSet : false },
   204            { register : "CAPD" , regForceSet : false }
   205        ];
   206    }


module ti.catalog.msp430.peripherals.comparator.Comparator_D

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Comparator_D ========
    35     *  MSP430FR5xx Family Comparator_D Module
    36     */
    37    metaonly module Comparator_D inherits IComparator {
    38
    39        enum CDIE_t{
    40            CDIE_OFF    = 0x0000,       /*! Interrupt not enabled */
    41            CDIE        = 0x0100        /*! Interrupt enabled */
    42        };
    43
    44        enum CDIIE_t{
    45            CDIIE_OFF   = 0x0000,       /*! Interrupt not enabled inverted polarity*/
    46            CDIIE       = 0x0200        /*! Interrupt enabled inverted polarity */
    47        };
    48
    49        enum CDIFG_t{
    50            CDIFG_OFF   = 0x00,         /*! No interrupt pending */
    51            CDIFG       = 0x01          /*! Interrupt pending */
    52        };
    53
    54        enum CDIIFG_t{
    55            CDIIFG_OFF  = 0x00,         /*! No inverted interrupt pending */
    56            CDIIFG      = 0x02          /*! Inverted interrupt pending */
    57        };
    58
    59        struct CDIEALL_t {
    60            CDIE_t      CDIE;          /*!  Comparator D interrupt enable. This
    61                                        *   bit enables the CDIFG interrupt for
    62                                        *   comparator mode.
    63                                        *   0  Interrupt disabled
    64                                        *   1  Interrupt enabled */
    65
    66            CDIIE_t      CDIIE;         /*! Comparator D interrupt enable inverted polarity. This
    67                                        *   bit enables the CDIIFG interrupt for
    68                                        *   comparator mode.
    69                                        *   0  Interrupt disabled
    70                                        *   1  Interrupt enabled */
    71        }
    72
    73        struct CDIFGALL_t {
    74            CDIFG_t      CDIFG;         /*! Comparator D interrupt flag.
    75                                         *  0  No interrupt pending
    76                                         *  1  Interrupt pending */
    77
    78            CDIIFG_t     CDIIFG;         /*! Comparator D interrupt flag.
    79                                         *  0  No inverted interrupt pending
    80                                         *  1  Inverted interrupt pending */
    81        }
    82    instance:
    83        /*!
    84         *  ======== baseAddr ========
    85         *  Address of the peripheral's control register.
    86         *
    87         *  A peripheral's registers are commonly accessed through a structure
    88         *  that defines the offsets of a particular register from the lowest
    89         *  address mapped to a peripheral. That lowest address is specified by
    90         *  this parameter.
    91         */
    92        config UInt baseAddr;
    93
    94         /*!
    95         *  ======== interruptSource ========
    96         *  Comparator_D has own interrupt enables
    97         *  thus interruptSource is defined here
    98         */
    99        config regIntVect_t interruptSource[2];
   100
   101        /*!
   102         *  ======== CDIEALL ========
   103         * All the Interrupt Enables in Comparator_D
   104         */
   105        config CDIEALL_t CDIEALL = {
   106            CDIE        : CDIE_OFF,
   107            CDIIE       : CDIIE_OFF
   108        };
   109
   110        /*!
   111         *  ======== CDIFGALL ========
   112         * All the Interrupt Flags in Comparator_D
   113         */
   114        config CDIFGALL_t CDIFGALL = {
   115            CDIFG       : CDIFG_OFF,
   116            CDIIFG      : CDIIFG_OFF
   117        };
   118
   119        /*!
   120        *   ======== forceSetDefaultRegister ========
   121        * Determine if each Register needs to be forced set or not
   122        */
   123        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   124        [
   125            { register : "CDIEALL" , regForceSet : false },
   126            { register : "CDIFGALL" , regForceSet : false },
   127        ];
   128    }


module ti.catalog.msp430.peripherals.comparator.Comparator_E

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Comparator_E ========
    35     *  MSP430FR5xx Family Comparator_E Module
    36     */
    37    metaonly module Comparator_E inherits IComparator {
    38
    39    instance:
    40        /*!
    41         *  ======== baseAddr ========
    42         *  Address of the peripheral's control register.
    43         *
    44         *  A peripheral's registers are commonly accessed through a structure
    45         *  that defines the offsets of a particular register from the lowest
    46         *  address mapped to a peripheral. That lowest address is specified by
    47         *  this parameter.
    48         */
    49        config UInt baseAddr;
    50
    51        /*! Interrupt enables */
    52        config regIntVect_t interruptSource[2];
    53
    54        /*! Determine if each Register needs to be forced set or not */
    55        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    56        [
    57        ];
    58    }


interface ti.catalog.msp430.peripherals.comparator.IComparator

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IComparator ========
    35     *  MSP430 IComparator interface
    36     */
    37    metaonly interface IComparator inherits xdc.platform.IPeripheral {
    38
    39        /*! CAEX Bit */
    40        enum CAEX_t {
    41            CAEX_OFF = 0x0000,          /*! Disable CAEX bit */
    42            CAEX     = 0x0080           /*! Enable  CAEX bit */
    43        };
    44
    45        /*! CARSEL Bit */
    46        enum CARSEL_t {
    47            CARSEL_OFF     = 0x0000,    /*! Disable CARSEL bit */
    48            CARSEL         = 0x0040     /*! Enable  CARSEL bit */
    49         };
    50
    51         /*! CAREF Bit */
    52         enum CAREF_t {
    53             CAREF_0 = 0x0000,          /*! Reference Off */
    54             CAREF_1 = 0x0010,          /*! 0.25 * VCC */
    55             CAREF_2 = 0x0020,          /*! 0.50 * VCC */
    56             CAREF_3 = 0x0030           /*! Diode Reference */
    57         };
    58
    59        /*! CAON Bit */
    60        enum CAON_t {
    61             CAON_OFF = 0x0000,         /*! Disable CAON bit */
    62             CAON = 0x0008              /*! Enable  CAON bit */
    63          };
    64
    65        /*! CAIES Bit */
    66         enum CAIES_t {
    67             CAIES_OFF = 0x0000,        /*! Rising Edge */
    68             CAIES = 0x0004             /*! Falling Edge */
    69         };
    70
    71         /*! CAIE Bit */
    72         enum CAIE_t {
    73             CAIE_OFF = 0x0000,         /*! Disable CAIE bit */
    74             CAIE = 0x0002              /*! Enable  CAIE bit */
    75         };
    76
    77         /*! CAIFG Bit */
    78         enum CAIFG_t {
    79             CAIFG_OFF = 0x0000,        /*! Disable CAIFG bit */
    80             CAIFG = 0x0001             /*! Enable  CAIFG bit */
    81         };
    82
    83         /*! CASHORT Bit */
    84         enum CASHORT_t {
    85             CASHORT_OFF = 0x0000,      /*! Disable CASHORT bit */
    86             CASHORT = 0x0080           /*! Enable  CASHORT bit */
    87         };
    88
    89         /*! P2CA4 Bit */
    90         enum P2CA4_t {
    91             P2CA4_OFF = 0x0000,        /*! Disable P2CA4 bit */
    92             P2CA4 = 0x0040             /*! Enable  P2CA4 bit */
    93         };
    94
    95          /*! P2CA3 Bit */
    96         enum P2CA3_t {
    97             P2CA3_OFF = 0x0000,        /*! Disable P2CA3 bit */
    98             P2CA3 = 0x0020             /*! Enable  P2CA3 bit */
    99         };
   100
   101          /*! P2CA2 Bit */
   102         enum P2CA2_t {
   103             P2CA2_OFF = 0x0000,        /*! Disable P2CA2 bit */
   104             P2CA2 = 0x0010             /*! Enable  P2CA2 bit */
   105         };
   106
   107          /*! P2CA1 Bit */
   108         enum P2CA1_t {
   109             P2CA1_OFF = 0x0000,        /*! Disable P2CA1 bit */
   110             P2CA1 = 0x0008             /*! Enable  P2CA1 bit */
   111         };
   112
   113
   114         /*! P2CA0 Bit */
   115         enum P2CA0_t {
   116             P2CA0_OFF = 0x0000,        /*! Disable P2CA0 bit */
   117             P2CA0 = 0x0004             /*! Enable  P2CA0 bit */
   118         };
   119
   120         /*! CAF Bit */
   121         enum CAF_t {
   122             CAF_OFF = 0x0000,          /*! Disable CAF bit */
   123             CAF = 0x0002               /*! Enable  CAF bit */
   124         };
   125
   126         /*! CAPD7 Bit */
   127         enum CAPD7_t {
   128             CAPD7_OFF = 0x0000,        /*! Disable CAPD7 bit */
   129             CAPD7 = 0x0001             /*! Enable  CAPD7 bit */
   130         };
   131
   132         /*! CAPD6 Bit */
   133         enum CAPD6_t {
   134             CAPD6_OFF = 0x0000,        /*! Disable CAPD6 bit */
   135             CAPD6 = 0x0002             /*! Enable  CAPD6 bit */
   136         };
   137
   138         /*! CAPD5 Bit */
   139         enum CAPD5_t {
   140             CAPD5_OFF = 0x0000,        /*! Disable CAPD5 bit */
   141             CAPD5 = 0x0004             /*! Enable  CAPD5 bit */
   142         };
   143
   144         /*! CAPD4 Bit */
   145         enum CAPD4_t {
   146             CAPD4_OFF = 0x0000,        /*! Disable CAPD4 bit */
   147             CAPD4 = 0x0008             /*! Enable  CAPD4 bit */
   148         };
   149
   150         /*! CAPD3 Bit */
   151         enum CAPD3_t {
   152             CAPD3_OFF = 0x0000,        /*! Disable CAPD3 bit */
   153             CAPD3 = 0x0010             /*! Enable  CAPD3 bit */
   154         };
   155
   156         /*! CAPD2 Bit */
   157         enum CAPD2_t {
   158             CAPD2_OFF = 0x0000,        /*! Disable CAPD2 bit */
   159             CAPD2 = 0x0020             /*! Enable  CAPD2 bit */
   160         };
   161
   162         /*! CAPD1 Bit */
   163         enum CAPD1_t {
   164             CAPD1_OFF = 0x0000,        /*! Disable CAPD1 bit */
   165             CAPD1 = 0x0040             /*! Enable  CAPD1 bit */
   166         };
   167
   168         /*! CAPD0 Bit */
   169         enum CAPD0_t {
   170             CAPD0_OFF = 0x0000,        /*! Disable CAPD0 bit */
   171             CAPD0 = 0x0080             /*! Enable  CAPD0 bit */
   172         };
   173
   174
   175        /*!
   176        *  ======== ForceSetDefaultRegister_t ========
   177        *  Force Set Default Register
   178        *
   179        *  Type to store if each register needs to be forced initialized
   180        *  even if the register is in default state.
   181        *
   182        *  @see #ForceSetDefaultRegister_t
   183        */
   184        struct ForceSetDefaultRegister_t {
   185            String     register;
   186            Bool       regForceSet;
   187        }
   188
   189        /*!
   190        *  ======== regIntVect_t ========
   191        *  Interrupt vector description
   192        *
   193        *  Type to describe a single interrupt vector pin and all its possible
   194        *  configurations.
   195        *
   196        *  @see #regIntVect_t
   197        */
   198        struct regIntVect_t {
   199            String                    registerName;
   200            String                    registerDescription;
   201            String                    isrToggleString;
   202            String                    priorityName;
   203            Bool                      interruptEnable;
   204            Bool                      interruptHandler;
   205            Int                       priority;
   206        }
   207    instance:
   208
   209    }


package ti.catalog.msp430.peripherals.comparator

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.memory ========
    35     *  MSP430 Flash memory peripheral
    36     */
    37    package ti.catalog.msp430.peripherals.comparator [1, 0, 0] {
    38        interface IComparator;
    39        module Comparator_Aplus;
    40        module Comparator_D;
    41        module Comparator_E;
    42    }


module ti.catalog.msp430.peripherals.dac.DAC12

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== DAC12 ========
    35     *  MSP430 12-bit Digital to Analog Converter
    36     */
    37    metaonly module DAC12 inherits IDAC {
    38
    39        struct DAC12_xCTL_t {
    40            DAC12OPS_t DAC12OPS;       /*! DAC12 output select
    41                                        * 0 DAC12_0 output on P6.6, DAC12_1 output on P6.7
    42                                        * 1 DAC12_0 output on VeREF+, DAC12_1 output on P6.5 */
    43            DAC12SREF_t DAC12SREF;     /*! DAC12 select reference voltage
    44                                        * 00 VREF+
    45                                        * 01 VREF+
    46                                        * 10 VeREF+
    47                                        * 11 VeREF+ */
    48            DAC12RES_t DAC12RES;       /*! DAC12 resolution select
    49                                        * 0 12-bit resolution
    50                                        * 1 8-bit resolution */
    51            DAC12LSEL_t DAC12LSEL;     /*! DAC12 load select. Selects the load trigger for the DAC12 latch. DAC12ENC
    52                                        * must be set for the DAC to update, except when DAC12LSELx = 0.
    53                                        * 00 DAC12 latch loads when DAC12_xDATwritten (DAC12ENCis ignored)
    54                                        * 01 DAC12 latch loads when DAC12_xDAT written, or, when grouped,
    55                                        * when all DAC12_xDAT registers in the group have been written.
    56                                        * 10 Rising edge of Timer_A.OUT1 (TA1)
    57                                        * 11 Rising edge of Timer_B.OUT2 (TB2) */
    58            DAC12CALON_t DAC12CALON;   /*! DAC12 calibration on. This bit initiates the DAC12 offset calibration sequence
    59                                        * and is automatically reset when the calibration completes.
    60                                        * 0 Calibration is not active
    61                                        * 1 Initiate calibration/calibration in progress */
    62            DAC12IR_t DAC12IR;         /*! DAC12 input range. This bit sets the reference input and voltage output range.
    63                                        * 0 DAC12 full-scale output = 3x reference voltage
    64                                        * 1 DAC12 full-scale output = 1x reference voltage */
    65            DAC12AMP_t DAC12AMP;       /*! DAC12 amplifier setting. These bits select settling time vs current
    66                                        * consumption for the DAC12 input and output amplifiers.
    67                                        * DAC12AMPx        Input Buffer        Output Buffer
    68                                        *    000       Off                    DAC12 off, output high Z
    69                                        *    001       Off                    DAC12 off, output 0 V
    70                                        *    010       Low speed/current      Low speed/current
    71                                        *    011       Low speed/current      Medium speed/current
    72                                        *    100       Low speed/current      High speed/current
    73                                        *    101       Medium speed/current   Medium speed/current
    74                                        *    110       Medium speed/current   High speed/current
    75                                        *    111       High speed/current     High speed/current */
    76            DAC12DF_t DAC12DF;         /*! DAC12 data format
    77                                        * 0 Straight binary
    78                                        * 1 2s complement */
    79            DAC12IE_t DAC12IE;         /*! DAC12 interrupt enable
    80                                        * 0 Disabled
    81                                        * 1 Enabled */
    82            DAC12IFG_t DAC12IFG;       /*! DAC12 Interrupt flag
    83                                        * 0 No interrupt pending
    84                                        * 1 Interrupt pending */
    85            DAC12ENC_t DAC12ENC;       /*! DAC12 enable conversion. This bit enables the DAC12 module when
    86                                        * DAC12LSELx > 0. when DAC12LSELx = 0, DAC12ENC is ignored.
    87                                        * 0 DAC12 disabled
    88                                        * 1 DAC12 enabled */
    89            DAC12GRP_t DAC12GRP;       /*! DAC12 group. Groups DAC12_x with the next higher DAC12_x.
    90                                        * 0 Not grouped
    91                                        * 1 Grouped */
    92        };
    93
    94        /*!
    95         *  ======== create ========
    96         *  Create an instance of this peripheral.
    97         */
    98        create();
    99
   100      instance:
   101
   102        /*! DAC12_0CTL Register */
   103        config DAC12_xCTL_t DAC12_0CTL = {
   104            DAC12OPS    : DAC12OPS_OFF,
   105            DAC12SREF   : DAC12SREF_0,
   106            DAC12RES    : DAC12RES_OFF,
   107            DAC12LSEL   : DAC12LSEL_0,
   108            DAC12CALON  : DAC12CALON_OFF,
   109            DAC12IR     : DAC12IR_OFF,
   110            DAC12AMP    : DAC12AMP_0,
   111            DAC12DF     : DAC12DF_OFF,
   112            DAC12IE     : DAC12IE_OFF,
   113            DAC12IFG    : DAC12IFG_OFF,
   114            DAC12ENC    : DAC12ENC_OFF,
   115            DAC12GRP    : DAC12GRP_OFF
   116        };
   117
   118        /*! DAC12_1CTL Register */
   119        config DAC12_xCTL_t DAC12_1CTL = {
   120            DAC12OPS    : DAC12OPS_OFF,
   121            DAC12SREF   : DAC12SREF_0,
   122            DAC12RES    : DAC12RES_OFF,
   123            DAC12LSEL   : DAC12LSEL_0,
   124            DAC12CALON  : DAC12CALON_OFF,
   125            DAC12IR     : DAC12IR_OFF,
   126            DAC12AMP    : DAC12AMP_0,
   127            DAC12DF     : DAC12DF_OFF,
   128            DAC12IE     : DAC12IE_OFF,
   129            DAC12IFG    : DAC12IFG_OFF,
   130            DAC12ENC    : DAC12ENC_OFF,
   131            DAC12GRP    : DAC12GRP_OFF
   132        };
   133
   134        /*! DAC12_0DAT Register */
   135        config Bits16 DAC12_0DAT = 0;
   136
   137        /*! DAC12_1DAT Register */
   138        config Bits16 DAC12_1DAT = 0;
   139
   140        /*! DAC12 has 2 interrupt enables */
   141        config regIntVect_t interruptSource[2];
   142
   143        /*! Determine if each Register needs to be forced set or not */
   144        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   145        [
   146            { register : "DAC12_0CTL" , regForceSet : false },
   147            { register : "DAC12_1CTL" , regForceSet : false },
   148            { register : "DAC12_0DAT" , regForceSet : false },
   149            { register : "DAC12_1DAT" , regForceSet : false }
   150        ];
   151    }


interface ti.catalog.msp430.peripherals.dac.IDAC

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== IDAC ========
    36     *  MSP430 Digital to Analog Converter Interface
    37     */
    38    metaonly interface IDAC inherits xdc.platform.IPeripheral {
    39
    40
    41        /*! DAC12OPS Bit */
    42        enum DAC12OPS_t {
    43            DAC12OPS_OFF = 0x0000,
    44            DAC12OPS = 0x8000
    45        };
    46
    47        /*! DAC12SREFx Bits */
    48        enum DAC12SREF_t {
    49            DAC12SREF_0 = (0*0x2000u),
    50            DAC12SREF_1 = (1*0x2000u),
    51            DAC12SREF_2 = (2*0x2000u),
    52            DAC12SREF_3 = (3*0x2000u)
    53        };
    54
    55        /*! DAC12RES Bit */
    56        enum DAC12RES_t {
    57            DAC12RES_OFF = 0x0000,
    58            DAC12RES = 0x1000
    59        };
    60
    61        /*! DAC12LSELx Bits */
    62        enum DAC12LSEL_t {
    63            DAC12LSEL_0 = (0*0x0400u),
    64            DAC12LSEL_1 = (1*0x0400u),
    65            DAC12LSEL_2 = (2*0x0400u),
    66            DAC12LSEL_3 = (3*0x0400u)
    67        };
    68
    69        /*! DAC12CALON Bit */
    70        enum DAC12CALON_t {
    71            DAC12CALON_OFF = 0x0000,
    72            DAC12CALON = 0x0200
    73        };
    74
    75        /*! DAC12IR Bit */
    76        enum DAC12IR_t {
    77            DAC12IR_OFF = 0x0000,
    78            DAC12IR = 0x0100
    79        };
    80
    81         /*! DAC12AMPx Bits */
    82        enum DAC12AMP_t {
    83            DAC12AMP_0 = (0*0x0020u),
    84            DAC12AMP_1 = (1*0x0020u),
    85            DAC12AMP_2 = (2*0x0020u),
    86            DAC12AMP_3 = (3*0x0020u),
    87            DAC12AMP_4 = (4*0x0020u),
    88            DAC12AMP_5 = (5*0x0020u),
    89            DAC12AMP_6 = (6*0x0020u),
    90            DAC12AMP_7 = (7*0x0020u)
    91        };
    92
    93        /*! DAC12DF Bit */
    94        enum DAC12DF_t {
    95            DAC12DF_OFF = 0x0000,
    96            DAC12DF = 0x0010
    97        };
    98
    99        /*! DAC12IE Bit */
   100        enum DAC12IE_t {
   101            DAC12IE_OFF = 0x0000,
   102            DAC12IE = 0x0008
   103        };
   104
   105        /*! DAC12IFG Bit */
   106        enum DAC12IFG_t {
   107            DAC12IFG_OFF = 0x0000,
   108            DAC12IFG = 0x0004
   109        };
   110
   111        /*! DAC12ENC Bit */
   112        enum DAC12ENC_t {
   113            DAC12ENC_OFF = 0x0000,
   114            DAC12ENC = 0x0002
   115        };
   116
   117        /*! DAC12GRP Bit */
   118        enum DAC12GRP_t {
   119            DAC12GRP_OFF = 0x0000,
   120            DAC12GRP = 0x0001
   121        };
   122
   123       /*!
   124        *  ======== ForceSetDefaultRegister_t ========
   125        *  Force Set Default Register
   126        *
   127        *  Type to store if each register needs to be forced initialized
   128        *  even if the register is in default state.
   129        *
   130        *  @see #ForceSetDefaultRegister_t
   131        */
   132        struct ForceSetDefaultRegister_t {
   133            String     register;
   134            Bool       regForceSet;
   135        }
   136
   137        /*!
   138        *  ======== regIntVect_t ========
   139        *  Interrupt vector description
   140        *
   141        *  Type to describe a single interrupt vector pin and all its possible
   142        *  configurations.
   143        *
   144        *  @see #regIntVect_t
   145        */
   146        struct regIntVect_t {
   147            String                    registerName;
   148            String                    registerDescription;
   149            String                    isrToggleString;
   150            String                    priorityName;
   151            Bool                      interruptEnable;
   152            Bool                      interruptHandler;
   153            Int                       priority;
   154        }
   155    instance:
   156
   157    }


package ti.catalog.msp430.peripherals.dac

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.dac ========
    35     *  MSP430 DAC peripheral
    36     */
    37    package ti.catalog.msp430.peripherals.dac [1, 0, 0] {
    38        interface IDAC;
    39        module DAC12;
    40    }


module ti.catalog.msp430.peripherals.dma.DMA

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== DMA ========
    36     *  MSP430 DMA controller
    37     */
    38    metaonly module DMA inherits IDMA {
    39
    40    instance:
    41        /*!
    42         *  ======== baseAddr ========
    43         *  Address of the peripheral's control register.
    44         *
    45         *  A peripheral's registers are commonly accessed through a structure
    46         *  that defines the offsets of a particular register from the lowest
    47         *  address mapped to a peripheral. That lowest address is specified by
    48         *  this parameter.
    49         */
    50        config UInt baseAddr;
    51
    52        /*! DMA interrupt enables */
    53        config regIntVect_t interruptSource[8];
    54
    55        config regTriggerVect_t triggerSource[8][32];
    56
    57        config UInt numberOfChannels;
    58
    59        /*! Determine if each Register needs to be forced set or not */
    60        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    61        [
    62        ];
    63
    64    }


interface ti.catalog.msp430.peripherals.dma.IDMA

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== IDMA ========
    36     *  MSP430 DMA controller
    37     */
    38    metaonly interface IDMA inherits xdc.platform.IPeripheral {
    39
    40        /*!
    41        *  ======== regIntVect_t ========
    42        *  Interrupt vector description
    43        *
    44        *  Type to describe a single interrupt vector pin and all its possible
    45        *  configurations.
    46        *
    47        *  @see #regIntVect_t
    48        */
    49        struct regIntVect_t {
    50            String                    registerName;
    51            String                    registerDescription;
    52            String                    isrToggleString;
    53            String                    priorityName;
    54            Bool                      interruptEnable;
    55            Bool                      interruptHandler;
    56            Int                       priority;
    57        }
    58
    59        /*!
    60        *  ======== regTriggerVect_t ========
    61        *  Trigger vector description
    62        *
    63        */
    64        struct regTriggerVect_t {
    65            Int    channel;
    66            String triggerName;
    67            Int    value;
    68        }
    69
    70        /*!
    71        *  ======== ForceSetDefaultRegister_t ========
    72        *  Force Set Default Register
    73        *
    74        *  Type to store if each register needs to be forced initialized
    75        *  even if the register is in default state.
    76        *
    77        *  @see #ForceSetDefaultRegister_t
    78        */
    79        struct ForceSetDefaultRegister_t {
    80            String     register;
    81            Bool       regForceSet;
    82        }
    83
    84
    85    instance:
    86    }


package ti.catalog.msp430.peripherals.dma

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /* requires ti.catalog.msp430.peripherals.special_function; ?? */
    35
    36    /*!
    37     *  ======== ti.catalog.msp430.peripherals.dma ========
    38     *  MSP430 DMA controller peripheral
    39     */
    40    package ti.catalog.msp430.peripherals.dma [1, 0, 0] {
    41        interface IDMA;
    42        module DMA;
    43    }


module ti.catalog.msp430.peripherals.frctl.FRCTL

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== FRCTL ========
    36     *  MSP430 FRAM controller (FRCTL)
    37     */
    38    metaonly module FRCTL inherits IFRCTL {
    39
    40    instance:
    41        /*!
    42         *  ======== baseAddr ========
    43         *  Address of the peripheral's control register.
    44         *
    45         *  A peripheral's registers are commonly accessed through a structure
    46         *  that defines the offsets of a particular register from the lowest
    47         *  address mapped to a peripheral. That lowest address is specified by
    48         *  this parameter.
    49         */
    50        config UInt baseAddr;
    51
    52        /*! Determine if each Register needs to be forced set or not */
    53        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    54        [
    55        ];
    56
    57    }


interface ti.catalog.msp430.peripherals.frctl.IFRCTL

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     *  ======== IFRCTL ========
    37     *  MSP430 FRAM controller (FRCTL)
    38     */
    39    metaonly interface IFRCTL inherits xdc.platform.IPeripheral {
    40
    41        /*!
    42        *  ======== ForceSetDefaultRegister_t ========
    43        *  Force Set Default Register
    44        *
    45        *  Type to store if each register needs to be forced initialized
    46        *  even if the register is in default state.
    47        *
    48        *  @see #ForceSetDefaultRegister_t
    49        */
    50        struct ForceSetDefaultRegister_t {
    51            String     register;
    52            Bool       regForceSet;
    53        }
    54
    55        create(IClock.Instance clock);
    56
    57    instance:
    58
    59        /*! @_nodoc */
    60        config IClock.Instance clock;
    61    }


package ti.catalog.msp430.peripherals.frctl

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /* requires ti.catalog.msp430.peripherals.special_function; ?? */
    35
    36    /*!
    37     *  ======== ti.catalog.msp430.peripherals.frctl ========
    38     *  MSP430 FRAM controller (FRCTL) peripheral
    39     */
    40    package ti.catalog.msp430.peripherals.frctl [1, 0, 0] {
    41        interface IFRCTL;
    42        module FRCTL;
    43    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x1

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    34
    35    /*!
    36     *  ======== GPIO for MSP430F20x1 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430F20x1 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral.
    43         */
    44        create(Comparator.Instance comparator);
    45
    46    instance:
    47        /*! @_nodoc */
    48        config Comparator.Instance comparator;
    49
    50       /*! Define an array to describe all device pins. The 1st dimension
    51        *  denotes the port, the second the pin on that port. On an
    52        *  MSP430F20x1 device, there are 8 + 2 = 10 pins total.
    53        */
    54
    55        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    56         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    57        readonly config DevicePin_t devicePins[2][8];
    58
    59        /*! Implementation of Device Pin Functional Configuration */
    60        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    61
    62        /*! Determine if each Register needs to be forced set or not */
    63        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    64        [
    65            { register : "P1OUT" , regForceSet : true  },
    66            { register : "P1SEL" , regForceSet : false },
    67            { register : "P1DIR" , regForceSet : true  },
    68            { register : "P1REN" , regForceSet : false },
    69            { register : "P1IES" , regForceSet : true },
    70            { register : "P1IFG" , regForceSet : true },
    71            { register : "P1IE"  , regForceSet : false },
    72            { register : "P2OUT" , regForceSet : true  },
    73            { register : "P2SEL" , regForceSet : false },
    74            { register : "P2DIR" , regForceSet : true  },
    75            { register : "P2REN" , regForceSet : false },
    76            { register : "P2IES" , regForceSet : true },
    77            { register : "P2IFG" , regForceSet : true },
    78            { register : "P2IE"  , regForceSet : false }
    79        ];
    80
    81        /*
    82         *  GPIO Digital I/O Registers
    83         *
    84         *  One GIPO instance defines the configuration of an entire,
    85         *  8-bit wide digital I/O port.
    86         */
    87
    88        /*! Port 1 Output Register */
    89        config GpioBits8PxOut_t P1OUT = {
    90            Bit0        : BIT0_OFF,
    91            Bit1        : BIT1_OFF,
    92            Bit2        : BIT2_OFF,
    93            Bit3        : BIT3_OFF,
    94            Bit4        : BIT4_OFF,
    95            Bit5        : BIT5_OFF,
    96            Bit6        : BIT6_OFF,
    97            Bit7        : BIT7_OFF
    98        };
    99
   100        /*! Port 1 Port Select Register */
   101        config GpioBits8PxSel_t P1SEL = {
   102            Bit0        : BIT0_OFF,
   103            Bit1        : BIT1_OFF,
   104            Bit2        : BIT2_OFF,
   105            Bit3        : BIT3_OFF,
   106            Bit4        : BIT4_OFF,
   107            Bit5        : BIT5_OFF,
   108            Bit6        : BIT6_OFF,
   109            Bit7        : BIT7_OFF
   110        };
   111
   112        /*! Port 1 Direction Register */
   113        config GpioBits8PxDir_t P1DIR = {
   114            Bit0        : BIT0_OFF,
   115            Bit1        : BIT1_OFF,
   116            Bit2        : BIT2_OFF,
   117            Bit3        : BIT3_OFF,
   118            Bit4        : BIT4_OFF,
   119            Bit5        : BIT5_OFF,
   120            Bit6        : BIT6_OFF,
   121            Bit7        : BIT7_OFF
   122        };
   123
   124        /*! Port 1 Resistor Enable Register */
   125        config GpioBits8PxRen_t P1REN = {
   126            Bit0        : BIT0_OFF,
   127            Bit1        : BIT1_OFF,
   128            Bit2        : BIT2_OFF,
   129            Bit3        : BIT3_OFF,
   130            Bit4        : BIT4_OFF,
   131            Bit5        : BIT5_OFF,
   132            Bit6        : BIT6_OFF,
   133            Bit7        : BIT7_OFF
   134        };
   135
   136        /*! Port 2 Output Register */
   137        config GpioBits8PxOut_t P2OUT = {
   138            Bit0        : BIT0_OFF,
   139            Bit1        : BIT1_OFF,
   140            Bit2        : BIT2_OFF,
   141            Bit3        : BIT3_OFF,
   142            Bit4        : BIT4_OFF,
   143            Bit5        : BIT5_OFF,
   144            Bit6        : BIT6_OFF,
   145            Bit7        : BIT7_OFF
   146        };
   147
   148        /*! Port 2 Port Select Register */
   149        config GpioBits8PxSel_t P2SEL = {
   150            Bit0        : BIT0_OFF,
   151            Bit1        : BIT1_OFF,
   152            Bit2        : BIT2_OFF,
   153            Bit3        : BIT3_OFF,
   154            Bit4        : BIT4_OFF,
   155            Bit5        : BIT5_OFF,
   156            Bit6        : BIT6,         /* POR default for all 2xx devices */
   157            Bit7        : BIT7          /* POR default for all 2xx devices */
   158        };
   159
   160        /*! Port 2 Direction Register */
   161        config GpioBits8PxDir_t P2DIR = {
   162            Bit0        : BIT0_OFF,
   163            Bit1        : BIT1_OFF,
   164            Bit2        : BIT2_OFF,
   165            Bit3        : BIT3_OFF,
   166            Bit4        : BIT4_OFF,
   167            Bit5        : BIT5_OFF,
   168            Bit6        : BIT6_OFF,
   169            Bit7        : BIT7_OFF
   170        };
   171
   172        /*! Port 2 Resistor Enable Register */
   173        config GpioBits8PxRen_t P2REN = {
   174            Bit0        : BIT0_OFF,
   175            Bit1        : BIT1_OFF,
   176            Bit2        : BIT2_OFF,
   177            Bit3        : BIT3_OFF,
   178            Bit4        : BIT4_OFF,
   179            Bit5        : BIT5_OFF,
   180            Bit6        : BIT6_OFF,
   181            Bit7        : BIT7_OFF
   182        };
   183
   184    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    35
    36    /*!
    37     *  ======== GPIO for MSP430F20x2 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430F20x2 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral.
    44         */
    45        create(USI.Instance usi, ADC10.Instance adc10);
    46
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50
    51        /*! @_nodoc */
    52        config ADC10.Instance adc10;
    53
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430F20x2 device, there are 8 + 2 = 10 pins total.
    57        */
    58
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        readonly config DevicePin_t devicePins[2][8];
    62
    63        /*! Implementation of Device Pin Functional Configuration */
    64        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    65
    66        /*! Determine if each Register needs to be forced set or not */
    67        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    68        [
    69            { register : "P1OUT" , regForceSet : true  },
    70            { register : "P1SEL" , regForceSet : false },
    71            { register : "P1DIR" , regForceSet : true  },
    72            { register : "P1REN" , regForceSet : false },
    73            { register : "P1IES" , regForceSet : true },
    74            { register : "P1IFG" , regForceSet : true },
    75            { register : "P1IE"  , regForceSet : false },
    76            { register : "P2OUT" , regForceSet : true  },
    77            { register : "P2SEL" , regForceSet : false },
    78            { register : "P2DIR" , regForceSet : true  },
    79            { register : "P2REN" , regForceSet : false },
    80            { register : "P2IES" , regForceSet : true },
    81            { register : "P2IFG" , regForceSet : true },
    82            { register : "P2IE"  , regForceSet : false }
    83        ];
    84
    85        /*
    86         *  GPIO Digital I/O Registers
    87         *
    88         *  One GIPO instance defines the configuration of an entire,
    89         *  8-bit wide digital I/O port.
    90         */
    91
    92        /*! Port 1 Output Register */
    93        config GpioBits8PxOut_t P1OUT = {
    94            Bit0        : BIT0_OFF,
    95            Bit1        : BIT1_OFF,
    96            Bit2        : BIT2_OFF,
    97            Bit3        : BIT3_OFF,
    98            Bit4        : BIT4_OFF,
    99            Bit5        : BIT5_OFF,
   100            Bit6        : BIT6_OFF,
   101            Bit7        : BIT7_OFF
   102        };
   103
   104        /*! Port 1 Port Select Register */
   105        config GpioBits8PxSel_t P1SEL = {
   106            Bit0        : BIT0_OFF,
   107            Bit1        : BIT1_OFF,
   108            Bit2        : BIT2_OFF,
   109            Bit3        : BIT3_OFF,
   110            Bit4        : BIT4_OFF,
   111            Bit5        : BIT5_OFF,
   112            Bit6        : BIT6_OFF,
   113            Bit7        : BIT7_OFF
   114        };
   115
   116        /*! Port 1 Direction Register */
   117        config GpioBits8PxDir_t P1DIR = {
   118            Bit0        : BIT0_OFF,
   119            Bit1        : BIT1_OFF,
   120            Bit2        : BIT2_OFF,
   121            Bit3        : BIT3_OFF,
   122            Bit4        : BIT4_OFF,
   123            Bit5        : BIT5_OFF,
   124            Bit6        : BIT6_OFF,
   125            Bit7        : BIT7_OFF
   126        };
   127
   128        /*! Port 1 Resistor Enable Register */
   129        config GpioBits8PxRen_t P1REN = {
   130            Bit0        : BIT0_OFF,
   131            Bit1        : BIT1_OFF,
   132            Bit2        : BIT2_OFF,
   133            Bit3        : BIT3_OFF,
   134            Bit4        : BIT4_OFF,
   135            Bit5        : BIT5_OFF,
   136            Bit6        : BIT6_OFF,
   137            Bit7        : BIT7_OFF
   138        };
   139
   140        /*! Port 2 Output Register */
   141        config GpioBits8PxOut_t P2OUT = {
   142            Bit0        : BIT0_OFF,
   143            Bit1        : BIT1_OFF,
   144            Bit2        : BIT2_OFF,
   145            Bit3        : BIT3_OFF,
   146            Bit4        : BIT4_OFF,
   147            Bit5        : BIT5_OFF,
   148            Bit6        : BIT6_OFF,
   149            Bit7        : BIT7_OFF
   150        };
   151
   152        /*! Port 2 Port Select Register */
   153        config GpioBits8PxSel_t P2SEL = {
   154            Bit0        : BIT0_OFF,
   155            Bit1        : BIT1_OFF,
   156            Bit2        : BIT2_OFF,
   157            Bit3        : BIT3_OFF,
   158            Bit4        : BIT4_OFF,
   159            Bit5        : BIT5_OFF,
   160            Bit6        : BIT6,         /* POR default for all 2xx devices */
   161            Bit7        : BIT7          /* POR default for all 2xx devices */
   162        };
   163
   164        /*! Port 2 Direction Register */
   165        config GpioBits8PxDir_t P2DIR = {
   166            Bit0        : BIT0_OFF,
   167            Bit1        : BIT1_OFF,
   168            Bit2        : BIT2_OFF,
   169            Bit3        : BIT3_OFF,
   170            Bit4        : BIT4_OFF,
   171            Bit5        : BIT5_OFF,
   172            Bit6        : BIT6_OFF,
   173            Bit7        : BIT7_OFF
   174        };
   175
   176        /*! Port 2 Resistor Enable Register */
   177        config GpioBits8PxRen_t P2REN = {
   178            Bit0        : BIT0_OFF,
   179            Bit1        : BIT1_OFF,
   180            Bit2        : BIT2_OFF,
   181            Bit3        : BIT3_OFF,
   182            Bit4        : BIT4_OFF,
   183            Bit5        : BIT5_OFF,
   184            Bit6        : BIT6_OFF,
   185            Bit7        : BIT7_OFF
   186        };
   187    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F20x3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.adc.SD16_A as SD16_A;
    35
    36    /*!
    37     *  ======== GPIO for MSP430F20x3 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430F20x3 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral.
    44         */
    45        create(USI.Instance usi, SD16_A.Instance sd16_A);
    46
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50
    51        /*! @_nodoc */
    52        config SD16_A.Instance sd16_A;
    53
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430F20x3 device, there are 8 + 2 = 10 pins total.
    57        */
    58
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        readonly config DevicePin_t devicePins[2][8];
    62
    63        /*! Implementation of Device Pin Functional Configuration */
    64        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    65
    66        /*! Determine if each Register needs to be forced set or not */
    67        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    68        [
    69            { register : "P1OUT" , regForceSet : true  },
    70            { register : "P1SEL" , regForceSet : false },
    71            { register : "P1DIR" , regForceSet : true  },
    72            { register : "P1REN" , regForceSet : false },
    73            { register : "P1IES" , regForceSet : true },
    74            { register : "P1IFG" , regForceSet : true },
    75            { register : "P1IE"  , regForceSet : false },
    76            { register : "P2OUT" , regForceSet : true  },
    77            { register : "P2SEL" , regForceSet : false },
    78            { register : "P2DIR" , regForceSet : true  },
    79            { register : "P2REN" , regForceSet : false },
    80            { register : "P2IES" , regForceSet : true },
    81            { register : "P2IFG" , regForceSet : true },
    82            { register : "P2IE"  , regForceSet : false }
    83        ];
    84
    85        /*
    86         *  GPIO Digital I/O Registers
    87         *
    88         *  One GIPO instance defines the configuration of an entire,
    89         *  8-bit wide digital I/O port.
    90         */
    91
    92        /*! Port 1 Output Register */
    93        config GpioBits8PxOut_t P1OUT = {
    94            Bit0        : BIT0_OFF,
    95            Bit1        : BIT1_OFF,
    96            Bit2        : BIT2_OFF,
    97            Bit3        : BIT3_OFF,
    98            Bit4        : BIT4_OFF,
    99            Bit5        : BIT5_OFF,
   100            Bit6        : BIT6_OFF,
   101            Bit7        : BIT7_OFF
   102        };
   103
   104        /*! Port 1 Port Select Register */
   105        config GpioBits8PxSel_t P1SEL = {
   106            Bit0        : BIT0_OFF,
   107            Bit1        : BIT1_OFF,
   108            Bit2        : BIT2_OFF,
   109            Bit3        : BIT3_OFF,
   110            Bit4        : BIT4_OFF,
   111            Bit5        : BIT5_OFF,
   112            Bit6        : BIT6_OFF,
   113            Bit7        : BIT7_OFF
   114        };
   115
   116        /*! Port 1 Direction Register */
   117        config GpioBits8PxDir_t P1DIR = {
   118            Bit0        : BIT0_OFF,
   119            Bit1        : BIT1_OFF,
   120            Bit2        : BIT2_OFF,
   121            Bit3        : BIT3_OFF,
   122            Bit4        : BIT4_OFF,
   123            Bit5        : BIT5_OFF,
   124            Bit6        : BIT6_OFF,
   125            Bit7        : BIT7_OFF
   126        };
   127
   128        /*! Port 1 Resistor Enable Register */
   129        config GpioBits8PxRen_t P1REN = {
   130            Bit0        : BIT0_OFF,
   131            Bit1        : BIT1_OFF,
   132            Bit2        : BIT2_OFF,
   133            Bit3        : BIT3_OFF,
   134            Bit4        : BIT4_OFF,
   135            Bit5        : BIT5_OFF,
   136            Bit6        : BIT6_OFF,
   137            Bit7        : BIT7_OFF
   138        };
   139
   140        /*! Port 2 Output Register */
   141        config GpioBits8PxOut_t P2OUT = {
   142            Bit0        : BIT0_OFF,
   143            Bit1        : BIT1_OFF,
   144            Bit2        : BIT2_OFF,
   145            Bit3        : BIT3_OFF,
   146            Bit4        : BIT4_OFF,
   147            Bit5        : BIT5_OFF,
   148            Bit6        : BIT6_OFF,
   149            Bit7        : BIT7_OFF
   150        };
   151
   152        /*! Port 2 Port Select Register */
   153        config GpioBits8PxSel_t P2SEL = {
   154            Bit0        : BIT0_OFF,
   155            Bit1        : BIT1_OFF,
   156            Bit2        : BIT2_OFF,
   157            Bit3        : BIT3_OFF,
   158            Bit4        : BIT4_OFF,
   159            Bit5        : BIT5_OFF,
   160            Bit6        : BIT6,         /* POR default for all 2xx devices */
   161            Bit7        : BIT7          /* POR default for all 2xx devices */
   162        };
   163
   164        /*! Port 2 Direction Register */
   165        config GpioBits8PxDir_t P2DIR = {
   166            Bit0        : BIT0_OFF,
   167            Bit1        : BIT1_OFF,
   168            Bit2        : BIT2_OFF,
   169            Bit3        : BIT3_OFF,
   170            Bit4        : BIT4_OFF,
   171            Bit5        : BIT5_OFF,
   172            Bit6        : BIT6_OFF,
   173            Bit7        : BIT7_OFF
   174        };
   175
   176        /*! Port 2 Resistor Enable Register */
   177        config GpioBits8PxRen_t P2REN = {
   178            Bit0        : BIT0_OFF,
   179            Bit1        : BIT1_OFF,
   180            Bit2        : BIT2_OFF,
   181            Bit3        : BIT3_OFF,
   182            Bit4        : BIT4_OFF,
   183            Bit5        : BIT5_OFF,
   184            Bit6        : BIT6_OFF,
   185            Bit7        : BIT7_OFF
   186        };
   187    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x1

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    34
    35    /*!
    36     *  ======== GPIO for MSP430F21x1 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430F21x1 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the ADC10
    44         *  instance.
    45         */
    46        create(Comparator.Instance comparator);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config Comparator.Instance comparator;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430F21x1 device, there are 2 x 8 = 16 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        /* TODO: For this device the config variable definition has been moved into the
    60         * corresponding XS file due to its size. This needs a more consistent solution. */
    61        config DevicePin_t devicePins[2][8];
    62
    63        /*! Implementation of Device Pin Functional Configuration */
    64        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    65
    66        /*! Determine if each Register needs to be forced set or not */
    67        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    68        [
    69            { register : "P1OUT" , regForceSet : true  },
    70            { register : "P1SEL" , regForceSet : false },
    71            { register : "P1DIR" , regForceSet : true  },
    72            { register : "P1REN" , regForceSet : false },
    73            { register : "P1IES" , regForceSet : true },
    74            { register : "P1IFG" , regForceSet : true },
    75            { register : "P1IE"  , regForceSet : false },
    76            { register : "P2OUT" , regForceSet : true  },
    77            { register : "P2SEL" , regForceSet : false },
    78            { register : "P2DIR" , regForceSet : true  },
    79            { register : "P2REN" , regForceSet : false },
    80            { register : "P2IES" , regForceSet : true },
    81            { register : "P2IFG" , regForceSet : true },
    82            { register : "P2IE"  , regForceSet : false },
    83        ];
    84
    85        /*
    86         *  GPIO Digital I/O Registers
    87         *
    88         *  One GIPO instance defines the configuration of an entire,
    89         *  8-bit wide digital I/O port.
    90         */
    91
    92        /*! Port 1 Output Register */
    93        config GpioBits8PxOut_t P1OUT = {
    94            Bit0        : BIT0_OFF,
    95            Bit1        : BIT1_OFF,
    96            Bit2        : BIT2_OFF,
    97            Bit3        : BIT3_OFF,
    98            Bit4        : BIT4_OFF,
    99            Bit5        : BIT5_OFF,
   100            Bit6        : BIT6_OFF,
   101            Bit7        : BIT7_OFF
   102        };
   103
   104        /*! Port 1 Port Select Register */
   105        config GpioBits8PxSel_t P1SEL = {
   106            Bit0        : BIT0_OFF,
   107            Bit1        : BIT1_OFF,
   108            Bit2        : BIT2_OFF,
   109            Bit3        : BIT3_OFF,
   110            Bit4        : BIT4_OFF,
   111            Bit5        : BIT5_OFF,
   112            Bit6        : BIT6_OFF,
   113            Bit7        : BIT7_OFF
   114        };
   115
   116        /*! Port 1 Direction Register */
   117        config GpioBits8PxDir_t P1DIR = {
   118            Bit0        : BIT0_OFF,
   119            Bit1        : BIT1_OFF,
   120            Bit2        : BIT2_OFF,
   121            Bit3        : BIT3_OFF,
   122            Bit4        : BIT4_OFF,
   123            Bit5        : BIT5_OFF,
   124            Bit6        : BIT6_OFF,
   125            Bit7        : BIT7_OFF
   126        };
   127
   128        /*! Port 1 Resistor Enable Register */
   129        config GpioBits8PxRen_t P1REN = {
   130            Bit0        : BIT0_OFF,
   131            Bit1        : BIT1_OFF,
   132            Bit2        : BIT2_OFF,
   133            Bit3        : BIT3_OFF,
   134            Bit4        : BIT4_OFF,
   135            Bit5        : BIT5_OFF,
   136            Bit6        : BIT6_OFF,
   137            Bit7        : BIT7_OFF
   138        };
   139
   140        /*! Port 2 Output Register */
   141        config GpioBits8PxOut_t P2OUT = {
   142            Bit0        : BIT0_OFF,
   143            Bit1        : BIT1_OFF,
   144            Bit2        : BIT2_OFF,
   145            Bit3        : BIT3_OFF,
   146            Bit4        : BIT4_OFF,
   147            Bit5        : BIT5_OFF,
   148            Bit6        : BIT6_OFF,
   149            Bit7        : BIT7_OFF
   150        };
   151
   152        /*! Port 2 Port Select Register */
   153        config GpioBits8PxSel_t P2SEL = {
   154            Bit0        : BIT0_OFF,
   155            Bit1        : BIT1_OFF,
   156            Bit2        : BIT2_OFF,
   157            Bit3        : BIT3_OFF,
   158            Bit4        : BIT4_OFF,
   159            Bit5        : BIT5_OFF,
   160            Bit6        : BIT6,         /* POR default for all 2xx devices */
   161            Bit7        : BIT7          /* POR default for all 2xx devices */
   162        };
   163
   164        /*! Port 2 Direction Register */
   165        config GpioBits8PxDir_t P2DIR = {
   166            Bit0        : BIT0_OFF,
   167            Bit1        : BIT1_OFF,
   168            Bit2        : BIT2_OFF,
   169            Bit3        : BIT3_OFF,
   170            Bit4        : BIT4_OFF,
   171            Bit5        : BIT5_OFF,
   172            Bit6        : BIT6_OFF,
   173            Bit7        : BIT7_OFF
   174        };
   175
   176        /*! Port 2 Resistor Enable Register */
   177        config GpioBits8PxRen_t P2REN = {
   178            Bit0        : BIT0_OFF,
   179            Bit1        : BIT1_OFF,
   180            Bit2        : BIT2_OFF,
   181            Bit3        : BIT3_OFF,
   182            Bit4        : BIT4_OFF,
   183            Bit5        : BIT5_OFF,
   184            Bit6        : BIT6_OFF,
   185            Bit7        : BIT7_OFF
   186        };
   187    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F21x2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    36
    37    /*!
    38     *  ======== GPIO for MSP430F21x2 ========
    39     *  MSP430 General Purpose Input Output Ports
    40     */
    41    metaonly module GPIO_MSP430F21x2 inherits IGPIO {
    42        /*!
    43         *  ======== create ========
    44         *  Create an instance of this peripheral. Use a customized
    45         *  init function so that we can get access to the ADC10,
    46         *  Comparator_A, and BCS+ instances.
    47         */
    48        create(ADC10.Instance adc10, Comparator.Instance comparator,
    49            BCSplus.Instance clock);
    50
    51    instance:
    52        /*! @_nodoc */
    53        config ADC10.Instance adc10;
    54
    55        /*! @_nodoc */
    56        config Comparator.Instance comparator;
    57
    58        /*! @_nodoc */
    59        config BCSplus.Instance clock;
    60
    61        /*! Define an array to describe all device pins. The 1st dimension
    62         *  denotes the port, the second the pin on that port. On an
    63         *  MSP430F21x2 device, there are 3 x 8 = 24 pins total.
    64         */
    65
    66        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    67         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    68        /* TODO: For this device the config variable definition has been moved into the
    69         * corresponding XS file due to its size. This needs a more consistent solution. */
    70        config DevicePin_t devicePins[3][8];
    71
    72        /*! Implementation of Device Pin Functional Configuration */
    73        override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    74
    75        /*! Determine if each Register needs to be forced set or not */
    76        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    77        [
    78            { register : "P1OUT" , regForceSet : true  },
    79            { register : "P1SEL" , regForceSet : false },
    80            { register : "P1SEL2", regForceSet : false },
    81            { register : "P1DIR" , regForceSet : true  },
    82            { register : "P1REN" , regForceSet : false },
    83            { register : "P1IES" , regForceSet : true },
    84            { register : "P1IFG" , regForceSet : true },
    85            { register : "P1IE"  , regForceSet : false },
    86            { register : "P2OUT" , regForceSet : true  },
    87            { register : "P2SEL" , regForceSet : false },
    88            { register : "P2SEL2", regForceSet : false },
    89            { register : "P2DIR" , regForceSet : true  },
    90            { register : "P2REN" , regForceSet : false },
    91            { register : "P2IES" , regForceSet : true },
    92            { register : "P2IFG" , regForceSet : true },
    93            { register : "P2IE"  , regForceSet : false },
    94            { register : "P3OUT" , regForceSet : true  },
    95            { register : "P3SEL" , regForceSet : false },
    96            { register : "P3DIR" , regForceSet : true  },
    97            { register : "P3REN" , regForceSet : false },
    98        ];
    99
   100        /*
   101         *  GPIO Digital I/O Registers
   102         *
   103         *  One GIPO instance defines the configuration of an entire,
   104         *  8-bit wide digital I/O port.
   105         */
   106
   107        /*! Port 1 Output Register */
   108        config GpioBits8PxOut_t P1OUT = {
   109            Bit0        : BIT0_OFF,
   110            Bit1        : BIT1_OFF,
   111            Bit2        : BIT2_OFF,
   112            Bit3        : BIT3_OFF,
   113            Bit4        : BIT4_OFF,
   114            Bit5        : BIT5_OFF,
   115            Bit6        : BIT6_OFF,
   116            Bit7        : BIT7_OFF
   117        };
   118
   119        /*! Port 1 Port Select Register */
   120        config GpioBits8PxSel_t P1SEL = {
   121            Bit0        : BIT0_OFF,
   122            Bit1        : BIT1_OFF,
   123            Bit2        : BIT2_OFF,
   124            Bit3        : BIT3_OFF,
   125            Bit4        : BIT4_OFF,
   126            Bit5        : BIT5_OFF,
   127            Bit6        : BIT6_OFF,
   128            Bit7        : BIT7_OFF
   129        };
   130
   131        /*! Port 1 Port Select 2 Register */
   132        config GpioBits8PxSel_t P1SEL2 = {
   133            Bit0        : BIT0_OFF,
   134            Bit1        : BIT1_OFF,
   135            Bit2        : BIT2_OFF,
   136            Bit3        : BIT3_OFF,
   137            Bit4        : BIT4_OFF,
   138            Bit5        : BIT5_OFF,
   139            Bit6        : BIT6_OFF,
   140            Bit7        : BIT7_OFF
   141        };
   142
   143        /*! Port 1 Direction Register */
   144        config GpioBits8PxDir_t P1DIR = {
   145            Bit0        : BIT0_OFF,
   146            Bit1        : BIT1_OFF,
   147            Bit2        : BIT2_OFF,
   148            Bit3        : BIT3_OFF,
   149            Bit4        : BIT4_OFF,
   150            Bit5        : BIT5_OFF,
   151            Bit6        : BIT6_OFF,
   152            Bit7        : BIT7_OFF
   153        };
   154
   155        /*! Port 1 Resistor Enable Register */
   156        config GpioBits8PxRen_t P1REN = {
   157            Bit0        : BIT0_OFF,
   158            Bit1        : BIT1_OFF,
   159            Bit2        : BIT2_OFF,
   160            Bit3        : BIT3_OFF,
   161            Bit4        : BIT4_OFF,
   162            Bit5        : BIT5_OFF,
   163            Bit6        : BIT6_OFF,
   164            Bit7        : BIT7_OFF
   165        };
   166
   167        /*! Port 2 Output Register */
   168        config GpioBits8PxOut_t P2OUT = {
   169            Bit0        : BIT0_OFF,
   170            Bit1        : BIT1_OFF,
   171            Bit2        : BIT2_OFF,
   172            Bit3        : BIT3_OFF,
   173            Bit4        : BIT4_OFF,
   174            Bit5        : BIT5_OFF,
   175            Bit6        : BIT6_OFF,
   176            Bit7        : BIT7_OFF
   177        };
   178
   179        /*! Port 2 Port Select Register */
   180        config GpioBits8PxSel_t P2SEL = {
   181            Bit0        : BIT0_OFF,
   182            Bit1        : BIT1_OFF,
   183            Bit2        : BIT2_OFF,
   184            Bit3        : BIT3_OFF,
   185            Bit4        : BIT4_OFF,
   186            Bit5        : BIT5_OFF,
   187            Bit6        : BIT6,         /* POR default for all 2xx devices */
   188            Bit7        : BIT7          /* POR default for all 2xx devices */
   189        };
   190
   191        /*! Port 2 Port Select 2 Register */
   192        config GpioBits8PxSel2_t P2SEL2 = {
   193            Bit0        : BIT0_OFF,
   194            Bit1        : BIT1_OFF,
   195            Bit2        : BIT2_OFF,
   196            Bit3        : BIT3_OFF,
   197            Bit4        : BIT4_OFF,
   198            Bit5        : BIT5_OFF,
   199            Bit6        : BIT6_OFF,
   200            Bit7        : BIT7_OFF
   201        };
   202
   203        /*! Port 2 Direction Register */
   204        config GpioBits8PxDir_t P2DIR = {
   205            Bit0        : BIT0_OFF,
   206            Bit1        : BIT1_OFF,
   207            Bit2        : BIT2_OFF,
   208            Bit3        : BIT3_OFF,
   209            Bit4        : BIT4_OFF,
   210            Bit5        : BIT5_OFF,
   211            Bit6        : BIT6_OFF,
   212            Bit7        : BIT7_OFF
   213        };
   214
   215        /*! Port 2 Resistor Enable Register */
   216        config GpioBits8PxRen_t P2REN = {
   217            Bit0        : BIT0_OFF,
   218            Bit1        : BIT1_OFF,
   219            Bit2        : BIT2_OFF,
   220            Bit3        : BIT3_OFF,
   221            Bit4        : BIT4_OFF,
   222            Bit5        : BIT5_OFF,
   223            Bit6        : BIT6_OFF,
   224            Bit7        : BIT7_OFF
   225        };
   226
   227        /*! Port 3 Output Register */
   228        config GpioBits8PxOut_t P3OUT = {
   229            Bit0        : BIT0_OFF,
   230            Bit1        : BIT1_OFF,
   231            Bit2        : BIT2_OFF,
   232            Bit3        : BIT3_OFF,
   233            Bit4        : BIT4_OFF,
   234            Bit5        : BIT5_OFF,
   235            Bit6        : BIT6_OFF,
   236            Bit7        : BIT7_OFF
   237        };
   238
   239        /*! Port 3 Port Select Register */
   240        config GpioBits8PxSel_t P3SEL = {
   241            Bit0        : BIT0_OFF,
   242            Bit1        : BIT1_OFF,
   243            Bit2        : BIT2_OFF,
   244            Bit3        : BIT3_OFF,
   245            Bit4        : BIT4_OFF,
   246            Bit5        : BIT5_OFF,
   247            Bit6        : BIT6_OFF,
   248            Bit7        : BIT7_OFF
   249        };
   250
   251        /*! Port 3 Direction Register */
   252        config GpioBits8PxDir_t P3DIR = {
   253            Bit0        : BIT0_OFF,
   254            Bit1        : BIT1_OFF,
   255            Bit2        : BIT2_OFF,
   256            Bit3        : BIT3_OFF,
   257            Bit4        : BIT4_OFF,
   258            Bit5        : BIT5_OFF,
   259            Bit6        : BIT6_OFF,
   260            Bit7        : BIT7_OFF
   261        };
   262
   263        /*! Port 3 Resistor Enable Register */
   264        config GpioBits8PxRen_t P3REN = {
   265            Bit0        : BIT0_OFF,
   266            Bit1        : BIT1_OFF,
   267            Bit2        : BIT2_OFF,
   268            Bit3        : BIT3_OFF,
   269            Bit4        : BIT4_OFF,
   270            Bit5        : BIT5_OFF,
   271            Bit6        : BIT6_OFF,
   272            Bit7        : BIT7_OFF
   273        };
   274    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    34    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    35
    36    /*!
    37     *  ======== GPIO for MSP430F22x2 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430F22x2 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral. Use a customized
    44         *  init function so that we can get access to the ADC10
    45         *  and BCS+ instances.
    46         */
    47        create(ADC10.Instance adc10, BCSplus.Instance clock);
    48
    49    instance:
    50        /*! @_nodoc */
    51        config ADC10.Instance adc10;
    52
    53        /*! @_nodoc */
    54        config BCSplus.Instance clock;
    55
    56        /*! Define an array to describe all device pins. The 1st dimension
    57         *  denotes the port, the second the pin on that port. On an
    58         *  MSP430F22xx device, there are 4 x 8 = 32 pins total.
    59         */
    60
    61        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    62         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    63        readonly config DevicePin_t devicePins[4][8];
    64
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[4][8];
    67
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1DIR" , regForceSet : true  },
    74            { register : "P1REN" , regForceSet : false },
    75            { register : "P1IES" , regForceSet : true },
    76            { register : "P1IFG" , regForceSet : true },
    77            { register : "P1IE"  , regForceSet : false },
    78            { register : "P2OUT" , regForceSet : true  },
    79            { register : "P2SEL" , regForceSet : false },
    80            { register : "P2DIR" , regForceSet : true  },
    81            { register : "P2REN" , regForceSet : false },
    82            { register : "P2IES" , regForceSet : true },
    83            { register : "P2IFG" , regForceSet : true },
    84            { register : "P2IE"  , regForceSet : false },
    85            { register : "P3OUT" , regForceSet : true  },
    86            { register : "P3SEL" , regForceSet : false },
    87            { register : "P3DIR" , regForceSet : true  },
    88            { register : "P3REN" , regForceSet : false },
    89            { register : "P4OUT" , regForceSet : true  },
    90            { register : "P4SEL" , regForceSet : false },
    91            { register : "P4DIR" , regForceSet : true  },
    92            { register : "P4REN" , regForceSet : false }
    93        ];
    94
    95        /*
    96         *  GPIO Digital I/O Registers
    97         *
    98         *  One GIPO instance defines the configuration of an entire,
    99         *  8-bit wide digital I/O port.
   100         */
   101
   102        /*! Port 1 Output Register */
   103        config GpioBits8PxOut_t P1OUT = {
   104            Bit0        : BIT0_OFF,
   105            Bit1        : BIT1_OFF,
   106            Bit2        : BIT2_OFF,
   107            Bit3        : BIT3_OFF,
   108            Bit4        : BIT4_OFF,
   109            Bit5        : BIT5_OFF,
   110            Bit6        : BIT6_OFF,
   111            Bit7        : BIT7_OFF
   112        };
   113
   114        /*! Port 1 Port Select Register */
   115        config GpioBits8PxSel_t P1SEL = {
   116            Bit0        : BIT0_OFF,
   117            Bit1        : BIT1_OFF,
   118            Bit2        : BIT2_OFF,
   119            Bit3        : BIT3_OFF,
   120            Bit4        : BIT4_OFF,
   121            Bit5        : BIT5_OFF,
   122            Bit6        : BIT6_OFF,
   123            Bit7        : BIT7_OFF
   124        };
   125
   126        /*! Port 1 Direction Register */
   127        config GpioBits8PxDir_t P1DIR = {
   128            Bit0        : BIT0_OFF,
   129            Bit1        : BIT1_OFF,
   130            Bit2        : BIT2_OFF,
   131            Bit3        : BIT3_OFF,
   132            Bit4        : BIT4_OFF,
   133            Bit5        : BIT5_OFF,
   134            Bit6        : BIT6_OFF,
   135            Bit7        : BIT7_OFF
   136        };
   137
   138        /*! Port 1 Resistor Enable Register */
   139        config GpioBits8PxRen_t P1REN = {
   140            Bit0        : BIT0_OFF,
   141            Bit1        : BIT1_OFF,
   142            Bit2        : BIT2_OFF,
   143            Bit3        : BIT3_OFF,
   144            Bit4        : BIT4_OFF,
   145            Bit5        : BIT5_OFF,
   146            Bit6        : BIT6_OFF,
   147            Bit7        : BIT7_OFF
   148        };
   149
   150        /*! Port 2 Output Register */
   151        config GpioBits8PxOut_t P2OUT = {
   152            Bit0        : BIT0_OFF,
   153            Bit1        : BIT1_OFF,
   154            Bit2        : BIT2_OFF,
   155            Bit3        : BIT3_OFF,
   156            Bit4        : BIT4_OFF,
   157            Bit5        : BIT5_OFF,
   158            Bit6        : BIT6_OFF,
   159            Bit7        : BIT7_OFF
   160        };
   161
   162        /*! Port 2 Port Select Register */
   163        config GpioBits8PxSel_t P2SEL = {
   164            Bit0        : BIT0_OFF,
   165            Bit1        : BIT1_OFF,
   166            Bit2        : BIT2_OFF,
   167            Bit3        : BIT3_OFF,
   168            Bit4        : BIT4_OFF,
   169            Bit5        : BIT5_OFF,
   170            Bit6        : BIT6,         /* POR default for all 2xx devices */
   171            Bit7        : BIT7          /* POR default for all 2xx devices */
   172        };
   173
   174        /*! Port 2 Direction Register */
   175        config GpioBits8PxDir_t P2DIR = {
   176            Bit0        : BIT0_OFF,
   177            Bit1        : BIT1_OFF,
   178            Bit2        : BIT2_OFF,
   179            Bit3        : BIT3_OFF,
   180            Bit4        : BIT4_OFF,
   181            Bit5        : BIT5_OFF,
   182            Bit6        : BIT6_OFF,
   183            Bit7        : BIT7_OFF
   184        };
   185
   186        /*! Port 2 Resistor Enable Register */
   187        config GpioBits8PxRen_t P2REN = {
   188            Bit0        : BIT0_OFF,
   189            Bit1        : BIT1_OFF,
   190            Bit2        : BIT2_OFF,
   191            Bit3        : BIT3_OFF,
   192            Bit4        : BIT4_OFF,
   193            Bit5        : BIT5_OFF,
   194            Bit6        : BIT6_OFF,
   195            Bit7        : BIT7_OFF
   196        };
   197
   198        /*! Port 3 Output Register */
   199        config GpioBits8PxOut_t P3OUT = {
   200            Bit0        : BIT0_OFF,
   201            Bit1        : BIT1_OFF,
   202            Bit2        : BIT2_OFF,
   203            Bit3        : BIT3_OFF,
   204            Bit4        : BIT4_OFF,
   205            Bit5        : BIT5_OFF,
   206            Bit6        : BIT6_OFF,
   207            Bit7        : BIT7_OFF
   208        };
   209
   210        /*! Port 3 Port Select Register */
   211        config GpioBits8PxSel_t P3SEL = {
   212            Bit0        : BIT0_OFF,
   213            Bit1        : BIT1_OFF,
   214            Bit2        : BIT2_OFF,
   215            Bit3        : BIT3_OFF,
   216            Bit4        : BIT4_OFF,
   217            Bit5        : BIT5_OFF,
   218            Bit6        : BIT6_OFF,
   219            Bit7        : BIT7_OFF
   220        };
   221
   222        /*! Port 3 Direction Register */
   223        config GpioBits8PxDir_t P3DIR = {
   224            Bit0        : BIT0_OFF,
   225            Bit1        : BIT1_OFF,
   226            Bit2        : BIT2_OFF,
   227            Bit3        : BIT3_OFF,
   228            Bit4        : BIT4_OFF,
   229            Bit5        : BIT5_OFF,
   230            Bit6        : BIT6_OFF,
   231            Bit7        : BIT7_OFF
   232        };
   233
   234        /*! Port 3 Resistor Enable Register */
   235        config GpioBits8PxRen_t P3REN = {
   236            Bit0        : BIT0_OFF,
   237            Bit1        : BIT1_OFF,
   238            Bit2        : BIT2_OFF,
   239            Bit3        : BIT3_OFF,
   240            Bit4        : BIT4_OFF,
   241            Bit5        : BIT5_OFF,
   242            Bit6        : BIT6_OFF,
   243            Bit7        : BIT7_OFF
   244        };
   245
   246        /*! Port 4 Output Register */
   247        config GpioBits8PxOut_t P4OUT = {
   248            Bit0        : BIT0_OFF,
   249            Bit1        : BIT1_OFF,
   250            Bit2        : BIT2_OFF,
   251            Bit3        : BIT3_OFF,
   252            Bit4        : BIT4_OFF,
   253            Bit5        : BIT5_OFF,
   254            Bit6        : BIT6_OFF,
   255            Bit7        : BIT7_OFF
   256        };
   257
   258        /*! Port 4 Port Select Register */
   259        config GpioBits8PxSel_t P4SEL = {
   260            Bit0        : BIT0_OFF,
   261            Bit1        : BIT1_OFF,
   262            Bit2        : BIT2_OFF,
   263            Bit3        : BIT3_OFF,
   264            Bit4        : BIT4_OFF,
   265            Bit5        : BIT5_OFF,
   266            Bit6        : BIT6_OFF,
   267            Bit7        : BIT7_OFF
   268        };
   269
   270        /*! Port 4 Direction Register */
   271        config GpioBits8PxDir_t P4DIR = {
   272            Bit0        : BIT0_OFF,
   273            Bit1        : BIT1_OFF,
   274            Bit2        : BIT2_OFF,
   275            Bit3        : BIT3_OFF,
   276            Bit4        : BIT4_OFF,
   277            Bit5        : BIT5_OFF,
   278            Bit6        : BIT6_OFF,
   279            Bit7        : BIT7_OFF
   280        };
   281
   282        /*! Port 4 Resistor Enable Register */
   283        config GpioBits8PxRen_t P4REN = {
   284            Bit0        : BIT0_OFF,
   285            Bit1        : BIT1_OFF,
   286            Bit2        : BIT2_OFF,
   287            Bit3        : BIT3_OFF,
   288            Bit4        : BIT4_OFF,
   289            Bit5        : BIT5_OFF,
   290            Bit6        : BIT6_OFF,
   291            Bit7        : BIT7_OFF
   292        };
   293    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F22x4

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    34    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    35
    36    /*!
    37     *  ======== GPIO for MSP430F22x4 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430F22x4 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral. Use a customized
    44         *  init function so that we can get access to the ADC10
    45         *  and BCS+ instances.
    46         */
    47        create(ADC10.Instance adc10, BCSplus.Instance clock);
    48
    49    instance:
    50        /*! @_nodoc */
    51        config ADC10.Instance adc10;
    52
    53        /*! @_nodoc */
    54        config BCSplus.Instance clock;
    55
    56        /*! Define an array to describe all device pins. The 1st dimension
    57         *  denotes the port, the second the pin on that port. On an
    58         *  MSP430F22xx device, there are 4 x 8 = 32 pins total.
    59         */
    60
    61        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    62         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    63        readonly config DevicePin_t devicePins[4][8];
    64
    65
    66        /*! Implementation of Device Pin Functional Configuration */
    67        override config DevicePinFunctionSetting_t devicePinSetting[4][8];
    68
    69        /*! Determine if each Register needs to be forced set or not */
    70        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    71        [
    72            { register : "P1OUT" , regForceSet : true  },
    73            { register : "P1SEL" , regForceSet : false },
    74            { register : "P1DIR" , regForceSet : true  },
    75            { register : "P1REN" , regForceSet : false },
    76            { register : "P1IES" , regForceSet : true },
    77            { register : "P1IFG" , regForceSet : true },
    78            { register : "P1IE"  , regForceSet : false },
    79            { register : "P2OUT" , regForceSet : true  },
    80            { register : "P2SEL" , regForceSet : false },
    81            { register : "P2DIR" , regForceSet : true  },
    82            { register : "P2REN" , regForceSet : false },
    83            { register : "P2IES" , regForceSet : true },
    84            { register : "P2IFG" , regForceSet : true },
    85            { register : "P2IE"  , regForceSet : false },
    86            { register : "P3OUT" , regForceSet : true  },
    87            { register : "P3SEL" , regForceSet : false },
    88            { register : "P3DIR" , regForceSet : true  },
    89            { register : "P3REN" , regForceSet : false },
    90            { register : "P4OUT" , regForceSet : true  },
    91            { register : "P4SEL" , regForceSet : false },
    92            { register : "P4DIR" , regForceSet : true  },
    93            { register : "P4REN" , regForceSet : false }
    94        ];
    95
    96        /*
    97         *  GPIO Digital I/O Registers
    98         *
    99         *  One GIPO instance defines the configuration of an entire,
   100         *  8-bit wide digital I/O port.
   101         */
   102
   103        /*! Port 1 Output Register */
   104        config GpioBits8PxOut_t P1OUT = {
   105            Bit0        : BIT0_OFF,
   106            Bit1        : BIT1_OFF,
   107            Bit2        : BIT2_OFF,
   108            Bit3        : BIT3_OFF,
   109            Bit4        : BIT4_OFF,
   110            Bit5        : BIT5_OFF,
   111            Bit6        : BIT6_OFF,
   112            Bit7        : BIT7_OFF
   113        };
   114
   115        /*! Port 1 Port Select Register */
   116        config GpioBits8PxSel_t P1SEL = {
   117            Bit0        : BIT0_OFF,
   118            Bit1        : BIT1_OFF,
   119            Bit2        : BIT2_OFF,
   120            Bit3        : BIT3_OFF,
   121            Bit4        : BIT4_OFF,
   122            Bit5        : BIT5_OFF,
   123            Bit6        : BIT6_OFF,
   124            Bit7        : BIT7_OFF
   125        };
   126
   127        /*! Port 1 Direction Register */
   128        config GpioBits8PxDir_t P1DIR = {
   129            Bit0        : BIT0_OFF,
   130            Bit1        : BIT1_OFF,
   131            Bit2        : BIT2_OFF,
   132            Bit3        : BIT3_OFF,
   133            Bit4        : BIT4_OFF,
   134            Bit5        : BIT5_OFF,
   135            Bit6        : BIT6_OFF,
   136            Bit7        : BIT7_OFF
   137        };
   138
   139        /*! Port 1 Resistor Enable Register */
   140        config GpioBits8PxRen_t P1REN = {
   141            Bit0        : BIT0_OFF,
   142            Bit1        : BIT1_OFF,
   143            Bit2        : BIT2_OFF,
   144            Bit3        : BIT3_OFF,
   145            Bit4        : BIT4_OFF,
   146            Bit5        : BIT5_OFF,
   147            Bit6        : BIT6_OFF,
   148            Bit7        : BIT7_OFF
   149        };
   150
   151        /*! Port 2 Output Register */
   152        config GpioBits8PxOut_t P2OUT = {
   153            Bit0        : BIT0_OFF,
   154            Bit1        : BIT1_OFF,
   155            Bit2        : BIT2_OFF,
   156            Bit3        : BIT3_OFF,
   157            Bit4        : BIT4_OFF,
   158            Bit5        : BIT5_OFF,
   159            Bit6        : BIT6_OFF,
   160            Bit7        : BIT7_OFF
   161        };
   162
   163        /*! Port 2 Port Select Register */
   164        config GpioBits8PxSel_t P2SEL = {
   165            Bit0        : BIT0_OFF,
   166            Bit1        : BIT1_OFF,
   167            Bit2        : BIT2_OFF,
   168            Bit3        : BIT3_OFF,
   169            Bit4        : BIT4_OFF,
   170            Bit5        : BIT5_OFF,
   171            Bit6        : BIT6,         /* POR default for all 2xx devices */
   172            Bit7        : BIT7          /* POR default for all 2xx devices */
   173        };
   174
   175        /*! Port 2 Direction Register */
   176        config GpioBits8PxDir_t P2DIR = {
   177            Bit0        : BIT0_OFF,
   178            Bit1        : BIT1_OFF,
   179            Bit2        : BIT2_OFF,
   180            Bit3        : BIT3_OFF,
   181            Bit4        : BIT4_OFF,
   182            Bit5        : BIT5_OFF,
   183            Bit6        : BIT6_OFF,
   184            Bit7        : BIT7_OFF
   185        };
   186
   187        /*! Port 2 Resistor Enable Register */
   188        config GpioBits8PxRen_t P2REN = {
   189            Bit0        : BIT0_OFF,
   190            Bit1        : BIT1_OFF,
   191            Bit2        : BIT2_OFF,
   192            Bit3        : BIT3_OFF,
   193            Bit4        : BIT4_OFF,
   194            Bit5        : BIT5_OFF,
   195            Bit6        : BIT6_OFF,
   196            Bit7        : BIT7_OFF
   197        };
   198
   199        /*! Port 3 Output Register */
   200        config GpioBits8PxOut_t P3OUT = {
   201            Bit0        : BIT0_OFF,
   202            Bit1        : BIT1_OFF,
   203            Bit2        : BIT2_OFF,
   204            Bit3        : BIT3_OFF,
   205            Bit4        : BIT4_OFF,
   206            Bit5        : BIT5_OFF,
   207            Bit6        : BIT6_OFF,
   208            Bit7        : BIT7_OFF
   209        };
   210
   211        /*! Port 3 Port Select Register */
   212        config GpioBits8PxSel_t P3SEL = {
   213            Bit0        : BIT0_OFF,
   214            Bit1        : BIT1_OFF,
   215            Bit2        : BIT2_OFF,
   216            Bit3        : BIT3_OFF,
   217            Bit4        : BIT4_OFF,
   218            Bit5        : BIT5_OFF,
   219            Bit6        : BIT6_OFF,
   220            Bit7        : BIT7_OFF
   221        };
   222
   223        /*! Port 3 Direction Register */
   224        config GpioBits8PxDir_t P3DIR = {
   225            Bit0        : BIT0_OFF,
   226            Bit1        : BIT1_OFF,
   227            Bit2        : BIT2_OFF,
   228            Bit3        : BIT3_OFF,
   229            Bit4        : BIT4_OFF,
   230            Bit5        : BIT5_OFF,
   231            Bit6        : BIT6_OFF,
   232            Bit7        : BIT7_OFF
   233        };
   234
   235        /*! Port 3 Resistor Enable Register */
   236        config GpioBits8PxRen_t P3REN = {
   237            Bit0        : BIT0_OFF,
   238            Bit1        : BIT1_OFF,
   239            Bit2        : BIT2_OFF,
   240            Bit3        : BIT3_OFF,
   241            Bit4        : BIT4_OFF,
   242            Bit5        : BIT5_OFF,
   243            Bit6        : BIT6_OFF,
   244            Bit7        : BIT7_OFF
   245        };
   246
   247        /*! Port 4 Output Register */
   248        config GpioBits8PxOut_t P4OUT = {
   249            Bit0        : BIT0_OFF,
   250            Bit1        : BIT1_OFF,
   251            Bit2        : BIT2_OFF,
   252            Bit3        : BIT3_OFF,
   253            Bit4        : BIT4_OFF,
   254            Bit5        : BIT5_OFF,
   255            Bit6        : BIT6_OFF,
   256            Bit7        : BIT7_OFF
   257        };
   258
   259        /*! Port 4 Port Select Register */
   260        config GpioBits8PxSel_t P4SEL = {
   261            Bit0        : BIT0_OFF,
   262            Bit1        : BIT1_OFF,
   263            Bit2        : BIT2_OFF,
   264            Bit3        : BIT3_OFF,
   265            Bit4        : BIT4_OFF,
   266            Bit5        : BIT5_OFF,
   267            Bit6        : BIT6_OFF,
   268            Bit7        : BIT7_OFF
   269        };
   270
   271        /*! Port 4 Direction Register */
   272        config GpioBits8PxDir_t P4DIR = {
   273            Bit0        : BIT0_OFF,
   274            Bit1        : BIT1_OFF,
   275            Bit2        : BIT2_OFF,
   276            Bit3        : BIT3_OFF,
   277            Bit4        : BIT4_OFF,
   278            Bit5        : BIT5_OFF,
   279            Bit6        : BIT6_OFF,
   280            Bit7        : BIT7_OFF
   281        };
   282
   283        /*! Port 4 Resistor Enable Register */
   284        config GpioBits8PxRen_t P4REN = {
   285            Bit0        : BIT0_OFF,
   286            Bit1        : BIT1_OFF,
   287            Bit2        : BIT2_OFF,
   288            Bit3        : BIT3_OFF,
   289            Bit4        : BIT4_OFF,
   290            Bit5        : BIT5_OFF,
   291            Bit6        : BIT6_OFF,
   292            Bit7        : BIT7_OFF
   293        };
   294    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x0

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    34    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    35
    36    /*!
    37     *  ======== GPIO for MSP430F23x0 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430F23x0 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral. Use a customized
    44         *  init function so that we can get access to the Comparator_A
    45         *  and BCS+ instances.
    46         */
    47        create(Comparator.Instance comparator, BCSplus.Instance clock);
    48
    49    instance:
    50        /*! @_nodoc */
    51        config Comparator.Instance comparator;
    52
    53        /*! @_nodoc */
    54        config BCSplus.Instance clock;
    55
    56        /*! Define an array to describe all device pins. The 1st dimension
    57         *  denotes the port, the second the pin on that port. On an
    58         *  MSP430F23x0 device, there are 4 x 8 = 32 pins total.
    59         */
    60
    61        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    62         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    63        /* TODO: For this device the config variable definition has been moved into the
    64         * corresponding XS file due to its size. This needs a more consistent solution. */
    65        config DevicePin_t devicePins[4][8];
    66
    67        /*! Implementation of Device Pin Functional Configuration */
    68        override config DevicePinFunctionSetting_t devicePinSetting[4][8];
    69
    70        /*! Determine if each Register needs to be forced set or not */
    71        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    72        [
    73            { register : "P1OUT" , regForceSet : true  },
    74            { register : "P1SEL" , regForceSet : false },
    75            { register : "P1DIR" , regForceSet : true  },
    76            { register : "P1REN" , regForceSet : false },
    77            { register : "P1IES" , regForceSet : true },
    78            { register : "P1IFG" , regForceSet : true },
    79            { register : "P1IE"  , regForceSet : false },
    80            { register : "P2OUT" , regForceSet : true  },
    81            { register : "P2SEL" , regForceSet : false },
    82            { register : "P2DIR" , regForceSet : true  },
    83            { register : "P2REN" , regForceSet : false },
    84            { register : "P2IES" , regForceSet : true },
    85            { register : "P2IFG" , regForceSet : true },
    86            { register : "P2IE"  , regForceSet : false },
    87            { register : "P3OUT" , regForceSet : true  },
    88            { register : "P3SEL" , regForceSet : false },
    89            { register : "P3DIR" , regForceSet : true  },
    90            { register : "P3REN" , regForceSet : false },
    91            { register : "P4OUT" , regForceSet : true  },
    92            { register : "P4SEL" , regForceSet : false },
    93            { register : "P4DIR" , regForceSet : true  },
    94            { register : "P4REN" , regForceSet : false },
    95        ];
    96
    97        /*
    98         *  GPIO Digital I/O Registers
    99         *
   100         *  One GIPO instance defines the configuration of an entire,
   101         *  8-bit wide digital I/O port.
   102         */
   103
   104        /*! Port 1 Output Register */
   105        config GpioBits8PxOut_t P1OUT = {
   106            Bit0        : BIT0_OFF,
   107            Bit1        : BIT1_OFF,
   108            Bit2        : BIT2_OFF,
   109            Bit3        : BIT3_OFF,
   110            Bit4        : BIT4_OFF,
   111            Bit5        : BIT5_OFF,
   112            Bit6        : BIT6_OFF,
   113            Bit7        : BIT7_OFF
   114        };
   115
   116        /*! Port 1 Port Select Register */
   117        config GpioBits8PxSel_t P1SEL = {
   118            Bit0        : BIT0_OFF,
   119            Bit1        : BIT1_OFF,
   120            Bit2        : BIT2_OFF,
   121            Bit3        : BIT3_OFF,
   122            Bit4        : BIT4_OFF,
   123            Bit5        : BIT5_OFF,
   124            Bit6        : BIT6_OFF,
   125            Bit7        : BIT7_OFF
   126        };
   127
   128        /*! Port 1 Direction Register */
   129        config GpioBits8PxDir_t P1DIR = {
   130            Bit0        : BIT0_OFF,
   131            Bit1        : BIT1_OFF,
   132            Bit2        : BIT2_OFF,
   133            Bit3        : BIT3_OFF,
   134            Bit4        : BIT4_OFF,
   135            Bit5        : BIT5_OFF,
   136            Bit6        : BIT6_OFF,
   137            Bit7        : BIT7_OFF
   138        };
   139
   140        /*! Port 1 Resistor Enable Register */
   141        config GpioBits8PxRen_t P1REN = {
   142            Bit0        : BIT0_OFF,
   143            Bit1        : BIT1_OFF,
   144            Bit2        : BIT2_OFF,
   145            Bit3        : BIT3_OFF,
   146            Bit4        : BIT4_OFF,
   147            Bit5        : BIT5_OFF,
   148            Bit6        : BIT6_OFF,
   149            Bit7        : BIT7_OFF
   150        };
   151
   152        /*! Port 2 Output Register */
   153        config GpioBits8PxOut_t P2OUT = {
   154            Bit0        : BIT0_OFF,
   155            Bit1        : BIT1_OFF,
   156            Bit2        : BIT2_OFF,
   157            Bit3        : BIT3_OFF,
   158            Bit4        : BIT4_OFF,
   159            Bit5        : BIT5_OFF,
   160            Bit6        : BIT6_OFF,
   161            Bit7        : BIT7_OFF
   162        };
   163
   164        /*! Port 2 Port Select Register */
   165        config GpioBits8PxSel_t P2SEL = {
   166            Bit0        : BIT0_OFF,
   167            Bit1        : BIT1_OFF,
   168            Bit2        : BIT2_OFF,
   169            Bit3        : BIT3_OFF,
   170            Bit4        : BIT4_OFF,
   171            Bit5        : BIT5_OFF,
   172            Bit6        : BIT6,         /* POR default for all 2xx devices */
   173            Bit7        : BIT7          /* POR default for all 2xx devices */
   174        };
   175
   176        /*! Port 2 Direction Register */
   177        config GpioBits8PxDir_t P2DIR = {
   178            Bit0        : BIT0_OFF,
   179            Bit1        : BIT1_OFF,
   180            Bit2        : BIT2_OFF,
   181            Bit3        : BIT3_OFF,
   182            Bit4        : BIT4_OFF,
   183            Bit5        : BIT5_OFF,
   184            Bit6        : BIT6_OFF,
   185            Bit7        : BIT7_OFF
   186        };
   187
   188        /*! Port 2 Resistor Enable Register */
   189        config GpioBits8PxRen_t P2REN = {
   190            Bit0        : BIT0_OFF,
   191            Bit1        : BIT1_OFF,
   192            Bit2        : BIT2_OFF,
   193            Bit3        : BIT3_OFF,
   194            Bit4        : BIT4_OFF,
   195            Bit5        : BIT5_OFF,
   196            Bit6        : BIT6_OFF,
   197            Bit7        : BIT7_OFF
   198        };
   199
   200        /*! Port 3 Output Register */
   201        config GpioBits8PxOut_t P3OUT = {
   202            Bit0        : BIT0_OFF,
   203            Bit1        : BIT1_OFF,
   204            Bit2        : BIT2_OFF,
   205            Bit3        : BIT3_OFF,
   206            Bit4        : BIT4_OFF,
   207            Bit5        : BIT5_OFF,
   208            Bit6        : BIT6_OFF,
   209            Bit7        : BIT7_OFF
   210        };
   211
   212        /*! Port 3 Port Select Register */
   213        config GpioBits8PxSel_t P3SEL = {
   214            Bit0        : BIT0_OFF,
   215            Bit1        : BIT1_OFF,
   216            Bit2        : BIT2_OFF,
   217            Bit3        : BIT3_OFF,
   218            Bit4        : BIT4_OFF,
   219            Bit5        : BIT5_OFF,
   220            Bit6        : BIT6_OFF,
   221            Bit7        : BIT7_OFF
   222        };
   223
   224        /*! Port 3 Direction Register */
   225        config GpioBits8PxDir_t P3DIR = {
   226            Bit0        : BIT0_OFF,
   227            Bit1        : BIT1_OFF,
   228            Bit2        : BIT2_OFF,
   229            Bit3        : BIT3_OFF,
   230            Bit4        : BIT4_OFF,
   231            Bit5        : BIT5_OFF,
   232            Bit6        : BIT6_OFF,
   233            Bit7        : BIT7_OFF
   234        };
   235
   236        /*! Port 3 Resistor Enable Register */
   237        config GpioBits8PxRen_t P3REN = {
   238            Bit0        : BIT0_OFF,
   239            Bit1        : BIT1_OFF,
   240            Bit2        : BIT2_OFF,
   241            Bit3        : BIT3_OFF,
   242            Bit4        : BIT4_OFF,
   243            Bit5        : BIT5_OFF,
   244            Bit6        : BIT6_OFF,
   245            Bit7        : BIT7_OFF
   246        };
   247
   248        /*! Port 4 Output Register */
   249        config GpioBits8PxOut_t P4OUT = {
   250            Bit0        : BIT0_OFF,
   251            Bit1        : BIT1_OFF,
   252            Bit2        : BIT2_OFF,
   253            Bit3        : BIT3_OFF,
   254            Bit4        : BIT4_OFF,
   255            Bit5        : BIT5_OFF,
   256            Bit6        : BIT6_OFF,
   257            Bit7        : BIT7_OFF
   258        };
   259
   260        /*! Port 4 Port Select Register */
   261        config GpioBits8PxSel_t P4SEL = {
   262            Bit0        : BIT0_OFF,
   263            Bit1        : BIT1_OFF,
   264            Bit2        : BIT2_OFF,
   265            Bit3        : BIT3_OFF,
   266            Bit4        : BIT4_OFF,
   267            Bit5        : BIT5_OFF,
   268            Bit6        : BIT6_OFF,
   269            Bit7        : BIT7_OFF
   270        };
   271
   272        /*! Port 4 Direction Register */
   273        config GpioBits8PxDir_t P4DIR = {
   274            Bit0        : BIT0_OFF,
   275            Bit1        : BIT1_OFF,
   276            Bit2        : BIT2_OFF,
   277            Bit3        : BIT3_OFF,
   278            Bit4        : BIT4_OFF,
   279            Bit5        : BIT5_OFF,
   280            Bit6        : BIT6_OFF,
   281            Bit7        : BIT7_OFF
   282        };
   283
   284        /*! Port 4 Resistor Enable Register */
   285        config GpioBits8PxRen_t P4REN = {
   286            Bit0        : BIT0_OFF,
   287            Bit1        : BIT1_OFF,
   288            Bit2        : BIT2_OFF,
   289            Bit3        : BIT3_OFF,
   290            Bit4        : BIT4_OFF,
   291            Bit5        : BIT5_OFF,
   292            Bit6        : BIT6_OFF,
   293            Bit7        : BIT7_OFF
   294        };
   295    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F23x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC12 as ADC12;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35    import ti.catalog.msp430.peripherals.svs.ISVS as SVS;
    36    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    37
    38    /*!
    39     *  ======== GPIO for MSP430F23x ========
    40     *  MSP430 General Purpose Input Output Ports
    41     */
    42    metaonly module GPIO_MSP430F23x inherits IGPIO {
    43        /*!
    44         *  ======== create ========
    45         *  Create an instance of this peripheral. Use a customized
    46         *  init function so that we can get access to the ADC12,
    47         *  Comparator_A, and SVS instances.
    48         */
    49        create(ADC12.Instance adc12, Comparator.Instance comparator, SVS.Instance svs,
    50            BCSplus.Instance clock);
    51
    52    instance:
    53        /*! @_nodoc */
    54        config ADC12.Instance adc12;
    55
    56        /*! @_nodoc */
    57        config Comparator.Instance comparator;
    58
    59        /*! @_nodoc */
    60        config SVS.Instance svs;
    61
    62        /*! @_nodoc */
    63        config BCSplus.Instance clock;
    64
    65        /*! Define an array to describe all device pins. The 1st dimension
    66         *  denotes the port, the second the pin on that port. On an
    67         *  MSP430F23x device, there are 6 x 8 = 48 pins total.
    68         */
    69
    70        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    71         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    72        /* TODO: For this device the config variable definition has been moved into the
    73         * corresponding XS file due to its size. This needs a more consistent solution. */
    74        config DevicePin_t devicePins[6][8];
    75
    76        /*! Implementation of Device Pin Functional Configuration */
    77        override config DevicePinFunctionSetting_t devicePinSetting[6][8];
    78
    79        /*! Determine if each Register needs to be forced set or not */
    80        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    81        [
    82            { register : "P1OUT" , regForceSet : true  },
    83            { register : "P1SEL" , regForceSet : false },
    84            { register : "P1DIR" , regForceSet : true  },
    85            { register : "P1REN" , regForceSet : false },
    86            { register : "P1IES" , regForceSet : true },
    87            { register : "P1IFG" , regForceSet : true },
    88            { register : "P1IE"  , regForceSet : false },
    89            { register : "P2OUT" , regForceSet : true  },
    90            { register : "P2SEL" , regForceSet : false },
    91            { register : "P2DIR" , regForceSet : true  },
    92            { register : "P2REN" , regForceSet : false },
    93            { register : "P2IES" , regForceSet : true },
    94            { register : "P2IFG" , regForceSet : true },
    95            { register : "P2IE"  , regForceSet : false },
    96            { register : "P3OUT" , regForceSet : true  },
    97            { register : "P3SEL" , regForceSet : false },
    98            { register : "P3DIR" , regForceSet : true  },
    99            { register : "P3REN" , regForceSet : false },
   100            { register : "P4OUT" , regForceSet : true  },
   101            { register : "P4SEL" , regForceSet : false },
   102            { register : "P4DIR" , regForceSet : true  },
   103            { register : "P4REN" , regForceSet : false },
   104            { register : "P5OUT" , regForceSet : true  },
   105            { register : "P5SEL" , regForceSet : false },
   106            { register : "P5DIR" , regForceSet : true  },
   107            { register : "P5REN" , regForceSet : false },
   108            { register : "P6OUT" , regForceSet : true  },
   109            { register : "P6SEL" , regForceSet : false },
   110            { register : "P6DIR" , regForceSet : true  },
   111            { register : "P6REN" , regForceSet : false }
   112        ];
   113
   114        /*
   115         *  GPIO Digital I/O Registers
   116         *
   117         *  One GIPO instance defines the configuration of an entire,
   118         *  8-bit wide digital I/O port.
   119         */
   120
   121        /*! Port 1 Output Register */
   122        config GpioBits8PxOut_t P1OUT = {
   123            Bit0        : BIT0_OFF,
   124            Bit1        : BIT1_OFF,
   125            Bit2        : BIT2_OFF,
   126            Bit3        : BIT3_OFF,
   127            Bit4        : BIT4_OFF,
   128            Bit5        : BIT5_OFF,
   129            Bit6        : BIT6_OFF,
   130            Bit7        : BIT7_OFF
   131        };
   132
   133        /*! Port 1 Port Select Register */
   134        config GpioBits8PxSel_t P1SEL = {
   135            Bit0        : BIT0_OFF,
   136            Bit1        : BIT1_OFF,
   137            Bit2        : BIT2_OFF,
   138            Bit3        : BIT3_OFF,
   139            Bit4        : BIT4_OFF,
   140            Bit5        : BIT5_OFF,
   141            Bit6        : BIT6_OFF,
   142            Bit7        : BIT7_OFF
   143        };
   144
   145        /*! Port 1 Direction Register */
   146        config GpioBits8PxDir_t P1DIR = {
   147            Bit0        : BIT0_OFF,
   148            Bit1        : BIT1_OFF,
   149            Bit2        : BIT2_OFF,
   150            Bit3        : BIT3_OFF,
   151            Bit4        : BIT4_OFF,
   152            Bit5        : BIT5_OFF,
   153            Bit6        : BIT6_OFF,
   154            Bit7        : BIT7_OFF
   155        };
   156
   157        /*! Port 1 Resistor Enable Register */
   158        config GpioBits8PxRen_t P1REN = {
   159            Bit0        : BIT0_OFF,
   160            Bit1        : BIT1_OFF,
   161            Bit2        : BIT2_OFF,
   162            Bit3        : BIT3_OFF,
   163            Bit4        : BIT4_OFF,
   164            Bit5        : BIT5_OFF,
   165            Bit6        : BIT6_OFF,
   166            Bit7        : BIT7_OFF
   167        };
   168
   169        /*! Port 2 Output Register */
   170        config GpioBits8PxOut_t P2OUT = {
   171            Bit0        : BIT0_OFF,
   172            Bit1        : BIT1_OFF,
   173            Bit2        : BIT2_OFF,
   174            Bit3        : BIT3_OFF,
   175            Bit4        : BIT4_OFF,
   176            Bit5        : BIT5_OFF,
   177            Bit6        : BIT6_OFF,
   178            Bit7        : BIT7_OFF
   179        };
   180
   181        /*! Port 2 Port Select Register */
   182        config GpioBits8PxSel_t P2SEL = {
   183            Bit0        : BIT0_OFF,
   184            Bit1        : BIT1_OFF,
   185            Bit2        : BIT2_OFF,
   186            Bit3        : BIT3_OFF,
   187            Bit4        : BIT4_OFF,
   188            Bit5        : BIT5_OFF,
   189            Bit6        : BIT6_OFF,
   190            Bit7        : BIT7_OFF
   191        };
   192
   193        /*! Port 2 Direction Register */
   194        config GpioBits8PxDir_t P2DIR = {
   195            Bit0        : BIT0_OFF,
   196            Bit1        : BIT1_OFF,
   197            Bit2        : BIT2_OFF,
   198            Bit3        : BIT3_OFF,
   199            Bit4        : BIT4_OFF,
   200            Bit5        : BIT5_OFF,
   201            Bit6        : BIT6_OFF,
   202            Bit7        : BIT7_OFF
   203        };
   204
   205        /*! Port 2 Resistor Enable Register */
   206        config GpioBits8PxRen_t P2REN = {
   207            Bit0        : BIT0_OFF,
   208            Bit1        : BIT1_OFF,
   209            Bit2        : BIT2_OFF,
   210            Bit3        : BIT3_OFF,
   211            Bit4        : BIT4_OFF,
   212            Bit5        : BIT5_OFF,
   213            Bit6        : BIT6_OFF,
   214            Bit7        : BIT7_OFF
   215        };
   216
   217        /*! Port 3 Output Register */
   218        config GpioBits8PxOut_t P3OUT = {
   219            Bit0        : BIT0_OFF,
   220            Bit1        : BIT1_OFF,
   221            Bit2        : BIT2_OFF,
   222            Bit3        : BIT3_OFF,
   223            Bit4        : BIT4_OFF,
   224            Bit5        : BIT5_OFF,
   225            Bit6        : BIT6_OFF,
   226            Bit7        : BIT7_OFF
   227        };
   228
   229        /*! Port 3 Port Select Register */
   230        config GpioBits8PxSel_t P3SEL = {
   231            Bit0        : BIT0_OFF,
   232            Bit1        : BIT1_OFF,
   233            Bit2        : BIT2_OFF,
   234            Bit3        : BIT3_OFF,
   235            Bit4        : BIT4_OFF,
   236            Bit5        : BIT5_OFF,
   237            Bit6        : BIT6_OFF,
   238            Bit7        : BIT7_OFF
   239        };
   240
   241        /*! Port 3 Direction Register */
   242        config GpioBits8PxDir_t P3DIR = {
   243            Bit0        : BIT0_OFF,
   244            Bit1        : BIT1_OFF,
   245            Bit2        : BIT2_OFF,
   246            Bit3        : BIT3_OFF,
   247            Bit4        : BIT4_OFF,
   248            Bit5        : BIT5_OFF,
   249            Bit6        : BIT6_OFF,
   250            Bit7        : BIT7_OFF
   251        };
   252
   253        /*! Port 3 Resistor Enable Register */
   254        config GpioBits8PxRen_t P3REN = {
   255            Bit0        : BIT0_OFF,
   256            Bit1        : BIT1_OFF,
   257            Bit2        : BIT2_OFF,
   258            Bit3        : BIT3_OFF,
   259            Bit4        : BIT4_OFF,
   260            Bit5        : BIT5_OFF,
   261            Bit6        : BIT6_OFF,
   262            Bit7        : BIT7_OFF
   263        };
   264
   265        /*! Port 4 Output Register */
   266        config GpioBits8PxOut_t P4OUT = {
   267            Bit0        : BIT0_OFF,
   268            Bit1        : BIT1_OFF,
   269            Bit2        : BIT2_OFF,
   270            Bit3        : BIT3_OFF,
   271            Bit4        : BIT4_OFF,
   272            Bit5        : BIT5_OFF,
   273            Bit6        : BIT6_OFF,
   274            Bit7        : BIT7_OFF
   275        };
   276
   277        /*! Port 4 Port Select Register */
   278        config GpioBits8PxSel_t P4SEL = {
   279            Bit0        : BIT0_OFF,
   280            Bit1        : BIT1_OFF,
   281            Bit2        : BIT2_OFF,
   282            Bit3        : BIT3_OFF,
   283            Bit4        : BIT4_OFF,
   284            Bit5        : BIT5_OFF,
   285            Bit6        : BIT6_OFF,
   286            Bit7        : BIT7_OFF
   287        };
   288
   289        /*! Port 4 Direction Register */
   290        config GpioBits8PxDir_t P4DIR = {
   291            Bit0        : BIT0_OFF,
   292            Bit1        : BIT1_OFF,
   293            Bit2        : BIT2_OFF,
   294            Bit3        : BIT3_OFF,
   295            Bit4        : BIT4_OFF,
   296            Bit5        : BIT5_OFF,
   297            Bit6        : BIT6_OFF,
   298            Bit7        : BIT7_OFF
   299        };
   300
   301        /*! Port 4 Resistor Enable Register */
   302        config GpioBits8PxRen_t P4REN = {
   303            Bit0        : BIT0_OFF,
   304            Bit1        : BIT1_OFF,
   305            Bit2        : BIT2_OFF,
   306            Bit3        : BIT3_OFF,
   307            Bit4        : BIT4_OFF,
   308            Bit5        : BIT5_OFF,
   309            Bit6        : BIT6_OFF,
   310            Bit7        : BIT7_OFF
   311        };
   312
   313            /*! Port 5 Output Register */
   314        config GpioBits8PxOut_t P5OUT = {
   315            Bit0        : BIT0_OFF,
   316            Bit1        : BIT1_OFF,
   317            Bit2        : BIT2_OFF,
   318            Bit3        : BIT3_OFF,
   319            Bit4        : BIT4_OFF,
   320            Bit5        : BIT5_OFF,
   321            Bit6        : BIT6_OFF,
   322            Bit7        : BIT7_OFF
   323        };
   324
   325        /*! Port 5 Port Select Register */
   326        config GpioBits8PxSel_t P5SEL = {
   327            Bit0        : BIT0_OFF,
   328            Bit1        : BIT1_OFF,
   329            Bit2        : BIT2_OFF,
   330            Bit3        : BIT3_OFF,
   331            Bit4        : BIT4_OFF,
   332            Bit5        : BIT5_OFF,
   333            Bit6        : BIT6_OFF,
   334            Bit7        : BIT7_OFF
   335        };
   336
   337        /*! Port 5 Direction Register */
   338        config GpioBits8PxDir_t P5DIR = {
   339            Bit0        : BIT0_OFF,
   340            Bit1        : BIT1_OFF,
   341            Bit2        : BIT2_OFF,
   342            Bit3        : BIT3_OFF,
   343            Bit4        : BIT4_OFF,
   344            Bit5        : BIT5_OFF,
   345            Bit6        : BIT6_OFF,
   346            Bit7        : BIT7_OFF
   347        };
   348
   349        /*! Port 5 Resistor Enable Register */
   350        config GpioBits8PxRen_t P5REN = {
   351            Bit0        : BIT0_OFF,
   352            Bit1        : BIT1_OFF,
   353            Bit2        : BIT2_OFF,
   354            Bit3        : BIT3_OFF,
   355            Bit4        : BIT4_OFF,
   356            Bit5        : BIT5_OFF,
   357            Bit6        : BIT6_OFF,
   358            Bit7        : BIT7_OFF
   359        };
   360
   361        /*! Port 6 Output Register */
   362        config GpioBits8PxOut_t P6OUT = {
   363            Bit0        : BIT0_OFF,
   364            Bit1        : BIT1_OFF,
   365            Bit2        : BIT2_OFF,
   366            Bit3        : BIT3_OFF,
   367            Bit4        : BIT4_OFF,
   368            Bit5        : BIT5_OFF,
   369            Bit6        : BIT6_OFF,
   370            Bit7        : BIT7_OFF
   371        };
   372
   373        /*! Port 6 Port Select Register */
   374        config GpioBits8PxSel_t P6SEL = {
   375            Bit0        : BIT0_OFF,
   376            Bit1        : BIT1_OFF,
   377            Bit2        : BIT2_OFF,
   378            Bit3        : BIT3_OFF,
   379            Bit4        : BIT4_OFF,
   380            Bit5        : BIT5_OFF,
   381            Bit6        : BIT6_OFF,
   382            Bit7        : BIT7_OFF
   383        };
   384
   385        /*! Port 6 Direction Register */
   386        config GpioBits8PxDir_t P6DIR = {
   387            Bit0        : BIT0_OFF,
   388            Bit1        : BIT1_OFF,
   389            Bit2        : BIT2_OFF,
   390            Bit3        : BIT3_OFF,
   391            Bit4        : BIT4_OFF,
   392            Bit5        : BIT5_OFF,
   393            Bit6        : BIT6_OFF,
   394            Bit7        : BIT7_OFF
   395        };
   396
   397        /*! Port 6 Resistor Enable Register */
   398        config GpioBits8PxRen_t P6REN = {
   399            Bit0        : BIT0_OFF,
   400            Bit1        : BIT1_OFF,
   401            Bit2        : BIT2_OFF,
   402            Bit3        : BIT3_OFF,
   403            Bit4        : BIT4_OFF,
   404            Bit5        : BIT5_OFF,
   405            Bit6        : BIT6_OFF,
   406            Bit7        : BIT7_OFF
   407        };
   408    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x1

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    34    import ti.catalog.msp430.peripherals.svs.ISVS as SVS;
    35    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    36
    37    /*!
    38     *  ======== GPIO for MSP430F24x1 ========
    39     *  MSP430 General Purpose Input Output Ports
    40     */
    41    metaonly module GPIO_MSP430F24x1 inherits IGPIO {
    42        /*!
    43         *  ======== create ========
    44         *  Create an instance of this peripheral. Use a customized
    45         *  init function so that we can get access to the
    46         *  Comparator_A, SVS, and BCS+ instances.
    47         */
    48        create(Comparator.Instance comparator, SVS.Instance svs, BCSplus.Instance clock);
    49
    50    instance:
    51        /*! @_nodoc */
    52        config Comparator.Instance comparator;
    53
    54        /*! @_nodoc */
    55        config SVS.Instance svs;
    56
    57        /*! @_nodoc */
    58        config BCSplus.Instance clock;
    59
    60        /*! Define an array to describe all device pins. The 1st dimension
    61         *  denotes the port, the second the pin on that port. On an
    62         *  MSP430F24x1 device, there are 6 x 8 = 48 pins total.
    63         */
    64
    65        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    66         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    67        /* TODO: For this device the config variable definition has been moved into the
    68         * corresponding XS file due to its size. This needs a more consistent solution. */
    69        config DevicePin_t devicePins[6][8];
    70
    71        /*! Implementation of Device Pin Functional Configuration */
    72        override config DevicePinFunctionSetting_t devicePinSetting[6][8];
    73
    74        /*! Determine if each Register needs to be forced set or not */
    75        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    76        [
    77            { register : "P1OUT" , regForceSet : true  },
    78            { register : "P1SEL" , regForceSet : false },
    79            { register : "P1DIR" , regForceSet : true  },
    80            { register : "P1REN" , regForceSet : false },
    81            { register : "P1IES" , regForceSet : true },
    82            { register : "P1IFG" , regForceSet : true },
    83            { register : "P1IE"  , regForceSet : false },
    84            { register : "P2OUT" , regForceSet : true  },
    85            { register : "P2SEL" , regForceSet : false },
    86            { register : "P2DIR" , regForceSet : true  },
    87            { register : "P2REN" , regForceSet : false },
    88            { register : "P2IES" , regForceSet : true },
    89            { register : "P2IFG" , regForceSet : true },
    90            { register : "P2IE"  , regForceSet : false },
    91            { register : "P3OUT" , regForceSet : true  },
    92            { register : "P3SEL" , regForceSet : false },
    93            { register : "P3DIR" , regForceSet : true  },
    94            { register : "P3REN" , regForceSet : false },
    95            { register : "P4OUT" , regForceSet : true  },
    96            { register : "P4SEL" , regForceSet : false },
    97            { register : "P4DIR" , regForceSet : true  },
    98            { register : "P4REN" , regForceSet : false },
    99            { register : "P5OUT" , regForceSet : true  },
   100            { register : "P5SEL" , regForceSet : false },
   101            { register : "P5DIR" , regForceSet : true  },
   102            { register : "P5REN" , regForceSet : false },
   103            { register : "P6OUT" , regForceSet : true  },
   104            { register : "P6SEL" , regForceSet : false },
   105            { register : "P6DIR" , regForceSet : true  },
   106            { register : "P6REN" , regForceSet : false }
   107        ];
   108
   109        /*
   110         *  GPIO Digital I/O Registers
   111         *
   112         *  One GIPO instance defines the configuration of an entire,
   113         *  8-bit wide digital I/O port.
   114         */
   115
   116        /*! Port 1 Output Register */
   117        config GpioBits8PxOut_t P1OUT = {
   118            Bit0        : BIT0_OFF,
   119            Bit1        : BIT1_OFF,
   120            Bit2        : BIT2_OFF,
   121            Bit3        : BIT3_OFF,
   122            Bit4        : BIT4_OFF,
   123            Bit5        : BIT5_OFF,
   124            Bit6        : BIT6_OFF,
   125            Bit7        : BIT7_OFF
   126        };
   127
   128        /*! Port 1 Port Select Register */
   129        config GpioBits8PxSel_t P1SEL = {
   130            Bit0        : BIT0_OFF,
   131            Bit1        : BIT1_OFF,
   132            Bit2        : BIT2_OFF,
   133            Bit3        : BIT3_OFF,
   134            Bit4        : BIT4_OFF,
   135            Bit5        : BIT5_OFF,
   136            Bit6        : BIT6_OFF,
   137            Bit7        : BIT7_OFF
   138        };
   139
   140        /*! Port 1 Direction Register */
   141        config GpioBits8PxDir_t P1DIR = {
   142            Bit0        : BIT0_OFF,
   143            Bit1        : BIT1_OFF,
   144            Bit2        : BIT2_OFF,
   145            Bit3        : BIT3_OFF,
   146            Bit4        : BIT4_OFF,
   147            Bit5        : BIT5_OFF,
   148            Bit6        : BIT6_OFF,
   149            Bit7        : BIT7_OFF
   150        };
   151
   152        /*! Port 1 Resistor Enable Register */
   153        config GpioBits8PxRen_t P1REN = {
   154            Bit0        : BIT0_OFF,
   155            Bit1        : BIT1_OFF,
   156            Bit2        : BIT2_OFF,
   157            Bit3        : BIT3_OFF,
   158            Bit4        : BIT4_OFF,
   159            Bit5        : BIT5_OFF,
   160            Bit6        : BIT6_OFF,
   161            Bit7        : BIT7_OFF
   162        };
   163
   164        /*! Port 2 Output Register */
   165        config GpioBits8PxOut_t P2OUT = {
   166            Bit0        : BIT0_OFF,
   167            Bit1        : BIT1_OFF,
   168            Bit2        : BIT2_OFF,
   169            Bit3        : BIT3_OFF,
   170            Bit4        : BIT4_OFF,
   171            Bit5        : BIT5_OFF,
   172            Bit6        : BIT6_OFF,
   173            Bit7        : BIT7_OFF
   174        };
   175
   176        /*! Port 2 Port Select Register */
   177        config GpioBits8PxSel_t P2SEL = {
   178            Bit0        : BIT0_OFF,
   179            Bit1        : BIT1_OFF,
   180            Bit2        : BIT2_OFF,
   181            Bit3        : BIT3_OFF,
   182            Bit4        : BIT4_OFF,
   183            Bit5        : BIT5_OFF,
   184            Bit6        : BIT6_OFF,
   185            Bit7        : BIT7_OFF
   186        };
   187
   188        /*! Port 2 Direction Register */
   189        config GpioBits8PxDir_t P2DIR = {
   190            Bit0        : BIT0_OFF,
   191            Bit1        : BIT1_OFF,
   192            Bit2        : BIT2_OFF,
   193            Bit3        : BIT3_OFF,
   194            Bit4        : BIT4_OFF,
   195            Bit5        : BIT5_OFF,
   196            Bit6        : BIT6_OFF,
   197            Bit7        : BIT7_OFF
   198        };
   199
   200        /*! Port 2 Resistor Enable Register */
   201        config GpioBits8PxRen_t P2REN = {
   202            Bit0        : BIT0_OFF,
   203            Bit1        : BIT1_OFF,
   204            Bit2        : BIT2_OFF,
   205            Bit3        : BIT3_OFF,
   206            Bit4        : BIT4_OFF,
   207            Bit5        : BIT5_OFF,
   208            Bit6        : BIT6_OFF,
   209            Bit7        : BIT7_OFF
   210        };
   211
   212        /*! Port 3 Output Register */
   213        config GpioBits8PxOut_t P3OUT = {
   214            Bit0        : BIT0_OFF,
   215            Bit1        : BIT1_OFF,
   216            Bit2        : BIT2_OFF,
   217            Bit3        : BIT3_OFF,
   218            Bit4        : BIT4_OFF,
   219            Bit5        : BIT5_OFF,
   220            Bit6        : BIT6_OFF,
   221            Bit7        : BIT7_OFF
   222        };
   223
   224        /*! Port 3 Port Select Register */
   225        config GpioBits8PxSel_t P3SEL = {
   226            Bit0        : BIT0_OFF,
   227            Bit1        : BIT1_OFF,
   228            Bit2        : BIT2_OFF,
   229            Bit3        : BIT3_OFF,
   230            Bit4        : BIT4_OFF,
   231            Bit5        : BIT5_OFF,
   232            Bit6        : BIT6_OFF,
   233            Bit7        : BIT7_OFF
   234        };
   235
   236        /*! Port 3 Direction Register */
   237        config GpioBits8PxDir_t P3DIR = {
   238            Bit0        : BIT0_OFF,
   239            Bit1        : BIT1_OFF,
   240            Bit2        : BIT2_OFF,
   241            Bit3        : BIT3_OFF,
   242            Bit4        : BIT4_OFF,
   243            Bit5        : BIT5_OFF,
   244            Bit6        : BIT6_OFF,
   245            Bit7        : BIT7_OFF
   246        };
   247
   248        /*! Port 3 Resistor Enable Register */
   249        config GpioBits8PxRen_t P3REN = {
   250            Bit0        : BIT0_OFF,
   251            Bit1        : BIT1_OFF,
   252            Bit2        : BIT2_OFF,
   253            Bit3        : BIT3_OFF,
   254            Bit4        : BIT4_OFF,
   255            Bit5        : BIT5_OFF,
   256            Bit6        : BIT6_OFF,
   257            Bit7        : BIT7_OFF
   258        };
   259
   260        /*! Port 4 Output Register */
   261        config GpioBits8PxOut_t P4OUT = {
   262            Bit0        : BIT0_OFF,
   263            Bit1        : BIT1_OFF,
   264            Bit2        : BIT2_OFF,
   265            Bit3        : BIT3_OFF,
   266            Bit4        : BIT4_OFF,
   267            Bit5        : BIT5_OFF,
   268            Bit6        : BIT6_OFF,
   269            Bit7        : BIT7_OFF
   270        };
   271
   272        /*! Port 4 Port Select Register */
   273        config GpioBits8PxSel_t P4SEL = {
   274            Bit0        : BIT0_OFF,
   275            Bit1        : BIT1_OFF,
   276            Bit2        : BIT2_OFF,
   277            Bit3        : BIT3_OFF,
   278            Bit4        : BIT4_OFF,
   279            Bit5        : BIT5_OFF,
   280            Bit6        : BIT6_OFF,
   281            Bit7        : BIT7_OFF
   282        };
   283
   284        /*! Port 4 Direction Register */
   285        config GpioBits8PxDir_t P4DIR = {
   286            Bit0        : BIT0_OFF,
   287            Bit1        : BIT1_OFF,
   288            Bit2        : BIT2_OFF,
   289            Bit3        : BIT3_OFF,
   290            Bit4        : BIT4_OFF,
   291            Bit5        : BIT5_OFF,
   292            Bit6        : BIT6_OFF,
   293            Bit7        : BIT7_OFF
   294        };
   295
   296        /*! Port 4 Resistor Enable Register */
   297        config GpioBits8PxRen_t P4REN = {
   298            Bit0        : BIT0_OFF,
   299            Bit1        : BIT1_OFF,
   300            Bit2        : BIT2_OFF,
   301            Bit3        : BIT3_OFF,
   302            Bit4        : BIT4_OFF,
   303            Bit5        : BIT5_OFF,
   304            Bit6        : BIT6_OFF,
   305            Bit7        : BIT7_OFF
   306        };
   307
   308            /*! Port 5 Output Register */
   309        config GpioBits8PxOut_t P5OUT = {
   310            Bit0        : BIT0_OFF,
   311            Bit1        : BIT1_OFF,
   312            Bit2        : BIT2_OFF,
   313            Bit3        : BIT3_OFF,
   314            Bit4        : BIT4_OFF,
   315            Bit5        : BIT5_OFF,
   316            Bit6        : BIT6_OFF,
   317            Bit7        : BIT7_OFF
   318        };
   319
   320        /*! Port 5 Port Select Register */
   321        config GpioBits8PxSel_t P5SEL = {
   322            Bit0        : BIT0_OFF,
   323            Bit1        : BIT1_OFF,
   324            Bit2        : BIT2_OFF,
   325            Bit3        : BIT3_OFF,
   326            Bit4        : BIT4_OFF,
   327            Bit5        : BIT5_OFF,
   328            Bit6        : BIT6_OFF,
   329            Bit7        : BIT7_OFF
   330        };
   331
   332        /*! Port 5 Direction Register */
   333        config GpioBits8PxDir_t P5DIR = {
   334            Bit0        : BIT0_OFF,
   335            Bit1        : BIT1_OFF,
   336            Bit2        : BIT2_OFF,
   337            Bit3        : BIT3_OFF,
   338            Bit4        : BIT4_OFF,
   339            Bit5        : BIT5_OFF,
   340            Bit6        : BIT6_OFF,
   341            Bit7        : BIT7_OFF
   342        };
   343
   344        /*! Port 5 Resistor Enable Register */
   345        config GpioBits8PxRen_t P5REN = {
   346            Bit0        : BIT0_OFF,
   347            Bit1        : BIT1_OFF,
   348            Bit2        : BIT2_OFF,
   349            Bit3        : BIT3_OFF,
   350            Bit4        : BIT4_OFF,
   351            Bit5        : BIT5_OFF,
   352            Bit6        : BIT6_OFF,
   353            Bit7        : BIT7_OFF
   354        };
   355
   356        /*! Port 6 Output Register */
   357        config GpioBits8PxOut_t P6OUT = {
   358            Bit0        : BIT0_OFF,
   359            Bit1        : BIT1_OFF,
   360            Bit2        : BIT2_OFF,
   361            Bit3        : BIT3_OFF,
   362            Bit4        : BIT4_OFF,
   363            Bit5        : BIT5_OFF,
   364            Bit6        : BIT6_OFF,
   365            Bit7        : BIT7_OFF
   366        };
   367
   368        /*! Port 6 Port Select Register */
   369        config GpioBits8PxSel_t P6SEL = {
   370            Bit0        : BIT0_OFF,
   371            Bit1        : BIT1_OFF,
   372            Bit2        : BIT2_OFF,
   373            Bit3        : BIT3_OFF,
   374            Bit4        : BIT4_OFF,
   375            Bit5        : BIT5_OFF,
   376            Bit6        : BIT6_OFF,
   377            Bit7        : BIT7_OFF
   378        };
   379
   380        /*! Port 6 Direction Register */
   381        config GpioBits8PxDir_t P6DIR = {
   382            Bit0        : BIT0_OFF,
   383            Bit1        : BIT1_OFF,
   384            Bit2        : BIT2_OFF,
   385            Bit3        : BIT3_OFF,
   386            Bit4        : BIT4_OFF,
   387            Bit5        : BIT5_OFF,
   388            Bit6        : BIT6_OFF,
   389            Bit7        : BIT7_OFF
   390        };
   391
   392        /*! Port 6 Resistor Enable Register */
   393        config GpioBits8PxRen_t P6REN = {
   394            Bit0        : BIT0_OFF,
   395            Bit1        : BIT1_OFF,
   396            Bit2        : BIT2_OFF,
   397            Bit3        : BIT3_OFF,
   398            Bit4        : BIT4_OFF,
   399            Bit5        : BIT5_OFF,
   400            Bit6        : BIT6_OFF,
   401            Bit7        : BIT7_OFF
   402        };
   403    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F24x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC12 as ADC12;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35    import ti.catalog.msp430.peripherals.svs.ISVS as SVS;
    36    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    37
    38    /*!
    39     *  ======== GPIO for MSP430F24x ========
    40     *  MSP430 General Purpose Input Output Ports
    41     */
    42    metaonly module GPIO_MSP430F24x inherits IGPIO {
    43        /*!
    44         *  ======== create ========
    45         *  Create an instance of this peripheral. Use a customized
    46         *  init function so that we can get access to the ADC12,
    47         *  Comparator_A, and SVS, and BCS+ instances.
    48         */
    49        create(ADC12.Instance adc12, Comparator.Instance comparator, SVS.Instance svs,
    50            BCSplus.Instance clock);
    51
    52    instance:
    53        /*! @_nodoc */
    54        config ADC12.Instance adc12;
    55
    56        /*! @_nodoc */
    57        config Comparator.Instance comparator;
    58
    59        /*! @_nodoc */
    60        config SVS.Instance svs;
    61
    62        /*! @_nodoc */
    63        config BCSplus.Instance clock;
    64
    65        /*! Define an array to describe all device pins. The 1st dimension
    66         *  denotes the port, the second the pin on that port. On an
    67         *  MSP430F24x device, there are 6 x 8 = 48 pins total.
    68         */
    69
    70        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    71         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    72        /* TODO: For this device the config variable definition has been moved into the
    73         * corresponding XS file due to its size. This needs a more consistent solution. */
    74        config DevicePin_t devicePins[6][8];
    75
    76        /*! Implementation of Device Pin Functional Configuration */
    77        override config DevicePinFunctionSetting_t devicePinSetting[6][8];
    78
    79        /*! Determine if each Register needs to be forced set or not */
    80        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    81        [
    82            { register : "P1OUT" , regForceSet : true  },
    83            { register : "P1SEL" , regForceSet : false },
    84            { register : "P1DIR" , regForceSet : true  },
    85            { register : "P1REN" , regForceSet : false },
    86            { register : "P1IES" , regForceSet : true },
    87            { register : "P1IFG" , regForceSet : true },
    88            { register : "P1IE"  , regForceSet : false },
    89            { register : "P2OUT" , regForceSet : true  },
    90            { register : "P2SEL" , regForceSet : false },
    91            { register : "P2DIR" , regForceSet : true  },
    92            { register : "P2REN" , regForceSet : false },
    93            { register : "P2IES" , regForceSet : true },
    94            { register : "P2IFG" , regForceSet : true },
    95            { register : "P2IE"  , regForceSet : false },
    96            { register : "P3OUT" , regForceSet : true  },
    97            { register : "P3SEL" , regForceSet : false },
    98            { register : "P3DIR" , regForceSet : true  },
    99            { register : "P3REN" , regForceSet : false },
   100            { register : "P4OUT" , regForceSet : true  },
   101            { register : "P4SEL" , regForceSet : false },
   102            { register : "P4DIR" , regForceSet : true  },
   103            { register : "P4REN" , regForceSet : false },
   104            { register : "P5OUT" , regForceSet : true  },
   105            { register : "P5SEL" , regForceSet : false },
   106            { register : "P5DIR" , regForceSet : true  },
   107            { register : "P5REN" , regForceSet : false },
   108            { register : "P6OUT" , regForceSet : true  },
   109            { register : "P6SEL" , regForceSet : false },
   110            { register : "P6DIR" , regForceSet : true  },
   111            { register : "P6REN" , regForceSet : false }
   112        ];
   113
   114        /*
   115         *  GPIO Digital I/O Registers
   116         *
   117         *  One GIPO instance defines the configuration of an entire,
   118         *  8-bit wide digital I/O port.
   119         */
   120
   121        /*! Port 1 Output Register */
   122        config GpioBits8PxOut_t P1OUT = {
   123            Bit0        : BIT0_OFF,
   124            Bit1        : BIT1_OFF,
   125            Bit2        : BIT2_OFF,
   126            Bit3        : BIT3_OFF,
   127            Bit4        : BIT4_OFF,
   128            Bit5        : BIT5_OFF,
   129            Bit6        : BIT6_OFF,
   130            Bit7        : BIT7_OFF
   131        };
   132
   133        /*! Port 1 Port Select Register */
   134        config GpioBits8PxSel_t P1SEL = {
   135            Bit0        : BIT0_OFF,
   136            Bit1        : BIT1_OFF,
   137            Bit2        : BIT2_OFF,
   138            Bit3        : BIT3_OFF,
   139            Bit4        : BIT4_OFF,
   140            Bit5        : BIT5_OFF,
   141            Bit6        : BIT6_OFF,
   142            Bit7        : BIT7_OFF
   143        };
   144
   145        /*! Port 1 Direction Register */
   146        config GpioBits8PxDir_t P1DIR = {
   147            Bit0        : BIT0_OFF,
   148            Bit1        : BIT1_OFF,
   149            Bit2        : BIT2_OFF,
   150            Bit3        : BIT3_OFF,
   151            Bit4        : BIT4_OFF,
   152            Bit5        : BIT5_OFF,
   153            Bit6        : BIT6_OFF,
   154            Bit7        : BIT7_OFF
   155        };
   156
   157        /*! Port 1 Resistor Enable Register */
   158        config GpioBits8PxRen_t P1REN = {
   159            Bit0        : BIT0_OFF,
   160            Bit1        : BIT1_OFF,
   161            Bit2        : BIT2_OFF,
   162            Bit3        : BIT3_OFF,
   163            Bit4        : BIT4_OFF,
   164            Bit5        : BIT5_OFF,
   165            Bit6        : BIT6_OFF,
   166            Bit7        : BIT7_OFF
   167        };
   168
   169        /*! Port 2 Output Register */
   170        config GpioBits8PxOut_t P2OUT = {
   171            Bit0        : BIT0_OFF,
   172            Bit1        : BIT1_OFF,
   173            Bit2        : BIT2_OFF,
   174            Bit3        : BIT3_OFF,
   175            Bit4        : BIT4_OFF,
   176            Bit5        : BIT5_OFF,
   177            Bit6        : BIT6_OFF,
   178            Bit7        : BIT7_OFF
   179        };
   180
   181        /*! Port 2 Port Select Register */
   182        config GpioBits8PxSel_t P2SEL = {
   183            Bit0        : BIT0_OFF,
   184            Bit1        : BIT1_OFF,
   185            Bit2        : BIT2_OFF,
   186            Bit3        : BIT3_OFF,
   187            Bit4        : BIT4_OFF,
   188            Bit5        : BIT5_OFF,
   189            Bit6        : BIT6_OFF,
   190            Bit7        : BIT7_OFF
   191        };
   192
   193        /*! Port 2 Direction Register */
   194        config GpioBits8PxDir_t P2DIR = {
   195            Bit0        : BIT0_OFF,
   196            Bit1        : BIT1_OFF,
   197            Bit2        : BIT2_OFF,
   198            Bit3        : BIT3_OFF,
   199            Bit4        : BIT4_OFF,
   200            Bit5        : BIT5_OFF,
   201            Bit6        : BIT6_OFF,
   202            Bit7        : BIT7_OFF
   203        };
   204
   205        /*! Port 2 Resistor Enable Register */
   206        config GpioBits8PxRen_t P2REN = {
   207            Bit0        : BIT0_OFF,
   208            Bit1        : BIT1_OFF,
   209            Bit2        : BIT2_OFF,
   210            Bit3        : BIT3_OFF,
   211            Bit4        : BIT4_OFF,
   212            Bit5        : BIT5_OFF,
   213            Bit6        : BIT6_OFF,
   214            Bit7        : BIT7_OFF
   215        };
   216
   217        /*! Port 3 Output Register */
   218        config GpioBits8PxOut_t P3OUT = {
   219            Bit0        : BIT0_OFF,
   220            Bit1        : BIT1_OFF,
   221            Bit2        : BIT2_OFF,
   222            Bit3        : BIT3_OFF,
   223            Bit4        : BIT4_OFF,
   224            Bit5        : BIT5_OFF,
   225            Bit6        : BIT6_OFF,
   226            Bit7        : BIT7_OFF
   227        };
   228
   229        /*! Port 3 Port Select Register */
   230        config GpioBits8PxSel_t P3SEL = {
   231            Bit0        : BIT0_OFF,
   232            Bit1        : BIT1_OFF,
   233            Bit2        : BIT2_OFF,
   234            Bit3        : BIT3_OFF,
   235            Bit4        : BIT4_OFF,
   236            Bit5        : BIT5_OFF,
   237            Bit6        : BIT6_OFF,
   238            Bit7        : BIT7_OFF
   239        };
   240
   241        /*! Port 3 Direction Register */
   242        config GpioBits8PxDir_t P3DIR = {
   243            Bit0        : BIT0_OFF,
   244            Bit1        : BIT1_OFF,
   245            Bit2        : BIT2_OFF,
   246            Bit3        : BIT3_OFF,
   247            Bit4        : BIT4_OFF,
   248            Bit5        : BIT5_OFF,
   249            Bit6        : BIT6_OFF,
   250            Bit7        : BIT7_OFF
   251        };
   252
   253        /*! Port 3 Resistor Enable Register */
   254        config GpioBits8PxRen_t P3REN = {
   255            Bit0        : BIT0_OFF,
   256            Bit1        : BIT1_OFF,
   257            Bit2        : BIT2_OFF,
   258            Bit3        : BIT3_OFF,
   259            Bit4        : BIT4_OFF,
   260            Bit5        : BIT5_OFF,
   261            Bit6        : BIT6_OFF,
   262            Bit7        : BIT7_OFF
   263        };
   264
   265        /*! Port 4 Output Register */
   266        config GpioBits8PxOut_t P4OUT = {
   267            Bit0        : BIT0_OFF,
   268            Bit1        : BIT1_OFF,
   269            Bit2        : BIT2_OFF,
   270            Bit3        : BIT3_OFF,
   271            Bit4        : BIT4_OFF,
   272            Bit5        : BIT5_OFF,
   273            Bit6        : BIT6_OFF,
   274            Bit7        : BIT7_OFF
   275        };
   276
   277        /*! Port 4 Port Select Register */
   278        config GpioBits8PxSel_t P4SEL = {
   279            Bit0        : BIT0_OFF,
   280            Bit1        : BIT1_OFF,
   281            Bit2        : BIT2_OFF,
   282            Bit3        : BIT3_OFF,
   283            Bit4        : BIT4_OFF,
   284            Bit5        : BIT5_OFF,
   285            Bit6        : BIT6_OFF,
   286            Bit7        : BIT7_OFF
   287        };
   288
   289        /*! Port 4 Direction Register */
   290        config GpioBits8PxDir_t P4DIR = {
   291            Bit0        : BIT0_OFF,
   292            Bit1        : BIT1_OFF,
   293            Bit2        : BIT2_OFF,
   294            Bit3        : BIT3_OFF,
   295            Bit4        : BIT4_OFF,
   296            Bit5        : BIT5_OFF,
   297            Bit6        : BIT6_OFF,
   298            Bit7        : BIT7_OFF
   299        };
   300
   301        /*! Port 4 Resistor Enable Register */
   302        config GpioBits8PxRen_t P4REN = {
   303            Bit0        : BIT0_OFF,
   304            Bit1        : BIT1_OFF,
   305            Bit2        : BIT2_OFF,
   306            Bit3        : BIT3_OFF,
   307            Bit4        : BIT4_OFF,
   308            Bit5        : BIT5_OFF,
   309            Bit6        : BIT6_OFF,
   310            Bit7        : BIT7_OFF
   311        };
   312
   313            /*! Port 5 Output Register */
   314        config GpioBits8PxOut_t P5OUT = {
   315            Bit0        : BIT0_OFF,
   316            Bit1        : BIT1_OFF,
   317            Bit2        : BIT2_OFF,
   318            Bit3        : BIT3_OFF,
   319            Bit4        : BIT4_OFF,
   320            Bit5        : BIT5_OFF,
   321            Bit6        : BIT6_OFF,
   322            Bit7        : BIT7_OFF
   323        };
   324
   325        /*! Port 5 Port Select Register */
   326        config GpioBits8PxSel_t P5SEL = {
   327            Bit0        : BIT0_OFF,
   328            Bit1        : BIT1_OFF,
   329            Bit2        : BIT2_OFF,
   330            Bit3        : BIT3_OFF,
   331            Bit4        : BIT4_OFF,
   332            Bit5        : BIT5_OFF,
   333            Bit6        : BIT6_OFF,
   334            Bit7        : BIT7_OFF
   335        };
   336
   337        /*! Port 5 Direction Register */
   338        config GpioBits8PxDir_t P5DIR = {
   339            Bit0        : BIT0_OFF,
   340            Bit1        : BIT1_OFF,
   341            Bit2        : BIT2_OFF,
   342            Bit3        : BIT3_OFF,
   343            Bit4        : BIT4_OFF,
   344            Bit5        : BIT5_OFF,
   345            Bit6        : BIT6_OFF,
   346            Bit7        : BIT7_OFF
   347        };
   348
   349        /*! Port 5 Resistor Enable Register */
   350        config GpioBits8PxRen_t P5REN = {
   351            Bit0        : BIT0_OFF,
   352            Bit1        : BIT1_OFF,
   353            Bit2        : BIT2_OFF,
   354            Bit3        : BIT3_OFF,
   355            Bit4        : BIT4_OFF,
   356            Bit5        : BIT5_OFF,
   357            Bit6        : BIT6_OFF,
   358            Bit7        : BIT7_OFF
   359        };
   360
   361        /*! Port 6 Output Register */
   362        config GpioBits8PxOut_t P6OUT = {
   363            Bit0        : BIT0_OFF,
   364            Bit1        : BIT1_OFF,
   365            Bit2        : BIT2_OFF,
   366            Bit3        : BIT3_OFF,
   367            Bit4        : BIT4_OFF,
   368            Bit5        : BIT5_OFF,
   369            Bit6        : BIT6_OFF,
   370            Bit7        : BIT7_OFF
   371        };
   372
   373        /*! Port 6 Port Select Register */
   374        config GpioBits8PxSel_t P6SEL = {
   375            Bit0        : BIT0_OFF,
   376            Bit1        : BIT1_OFF,
   377            Bit2        : BIT2_OFF,
   378            Bit3        : BIT3_OFF,
   379            Bit4        : BIT4_OFF,
   380            Bit5        : BIT5_OFF,
   381            Bit6        : BIT6_OFF,
   382            Bit7        : BIT7_OFF
   383        };
   384
   385        /*! Port 6 Direction Register */
   386        config GpioBits8PxDir_t P6DIR = {
   387            Bit0        : BIT0_OFF,
   388            Bit1        : BIT1_OFF,
   389            Bit2        : BIT2_OFF,
   390            Bit3        : BIT3_OFF,
   391            Bit4        : BIT4_OFF,
   392            Bit5        : BIT5_OFF,
   393            Bit6        : BIT6_OFF,
   394            Bit7        : BIT7_OFF
   395        };
   396
   397        /*! Port 6 Resistor Enable Register */
   398        config GpioBits8PxRen_t P6REN = {
   399            Bit0        : BIT0_OFF,
   400            Bit1        : BIT1_OFF,
   401            Bit2        : BIT2_OFF,
   402            Bit3        : BIT3_OFF,
   403            Bit4        : BIT4_OFF,
   404            Bit5        : BIT5_OFF,
   405            Bit6        : BIT6_OFF,
   406            Bit7        : BIT7_OFF
   407        };
   408    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F241x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC12 as ADC12;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35    import ti.catalog.msp430.peripherals.svs.ISVS as SVS;
    36    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    37
    38    /*!
    39     *  ======== GPIO for MSP430F241x ========
    40     *  MSP430 General Purpose Input Output Ports
    41     */
    42    metaonly module GPIO_MSP430F241x inherits IGPIO {
    43        /*!
    44         *  ======== create ========
    45         *  Create an instance of this peripheral. Use a customized
    46         *  init function so that we can get access to the ADC12,
    47         *  Comparator_A, SVS, and BCS+ instances.
    48         */
    49        create(ADC12.Instance adc12, Comparator.Instance comparator, SVS.Instance svs,
    50            BCSplus.Instance clock);
    51
    52    instance:
    53        /*! @_nodoc */
    54        config ADC12.Instance adc12;
    55
    56        /*! @_nodoc */
    57        config Comparator.Instance comparator;
    58
    59        /*! @_nodoc */
    60        config SVS.Instance svs;
    61
    62        /*! @_nodoc */
    63        config BCSplus.Instance clock;
    64
    65        /*! Define an array to describe all device pins. The 1st dimension
    66         *  denotes the port, the second the pin on that port. On an
    67         *  MSP430F241x device, there are 8 x 8 = 64 pins total.
    68         */
    69
    70        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    71         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    72        /* TODO: For this device the config variable definition has been moved into the
    73         * corresponding XS file due to its size. This needs a more consistent solution. */
    74        config DevicePin_t devicePins[8][8];
    75
    76        /*! Implementation of Device Pin Functional Configuration */
    77        override config DevicePinFunctionSetting_t devicePinSetting[8][8];
    78
    79        /*! Determine if each Register needs to be forced set or not */
    80        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    81        [
    82            { register : "P1OUT" , regForceSet : true  },
    83            { register : "P1SEL" , regForceSet : false },
    84            { register : "P1DIR" , regForceSet : true  },
    85            { register : "P1REN" , regForceSet : false },
    86            { register : "P1IES" , regForceSet : true },
    87            { register : "P1IFG" , regForceSet : true },
    88            { register : "P1IE"  , regForceSet : false },
    89            { register : "P2OUT" , regForceSet : true  },
    90            { register : "P2SEL" , regForceSet : false },
    91            { register : "P2DIR" , regForceSet : true  },
    92            { register : "P2REN" , regForceSet : false },
    93            { register : "P2IES" , regForceSet : true },
    94            { register : "P2IFG" , regForceSet : true },
    95            { register : "P2IE"  , regForceSet : false },
    96            { register : "P3OUT" , regForceSet : true  },
    97            { register : "P3SEL" , regForceSet : false },
    98            { register : "P3DIR" , regForceSet : true  },
    99            { register : "P3REN" , regForceSet : false },
   100            { register : "P4OUT" , regForceSet : true  },
   101            { register : "P4SEL" , regForceSet : false },
   102            { register : "P4DIR" , regForceSet : true  },
   103            { register : "P4REN" , regForceSet : false },
   104            { register : "P5OUT" , regForceSet : true  },
   105            { register : "P5SEL" , regForceSet : false },
   106            { register : "P5DIR" , regForceSet : true  },
   107            { register : "P5REN" , regForceSet : false },
   108            { register : "P6OUT" , regForceSet : true  },
   109            { register : "P6SEL" , regForceSet : false },
   110            { register : "P6DIR" , regForceSet : true  },
   111            { register : "P6REN" , regForceSet : false },
   112            { register : "P7OUT" , regForceSet : true  },
   113            { register : "P7SEL" , regForceSet : false },
   114            { register : "P7DIR" , regForceSet : true  },
   115            { register : "P7REN" , regForceSet : false },
   116            { register : "P8OUT" , regForceSet : true  },
   117            { register : "P8SEL" , regForceSet : false },
   118            { register : "P8DIR" , regForceSet : true  },
   119            { register : "P8REN" , regForceSet : false }
   120        ];
   121
   122        /*
   123         *  GPIO Digital I/O Registers
   124         *
   125         *  One GIPO instance defines the configuration of an entire,
   126         *  8-bit wide digital I/O port.
   127         */
   128
   129        /*! Port 1 Output Register */
   130        config GpioBits8PxOut_t P1OUT = {
   131            Bit0        : BIT0_OFF,
   132            Bit1        : BIT1_OFF,
   133            Bit2        : BIT2_OFF,
   134            Bit3        : BIT3_OFF,
   135            Bit4        : BIT4_OFF,
   136            Bit5        : BIT5_OFF,
   137            Bit6        : BIT6_OFF,
   138            Bit7        : BIT7_OFF
   139        };
   140
   141        /*! Port 1 Port Select Register */
   142        config GpioBits8PxSel_t P1SEL = {
   143            Bit0        : BIT0_OFF,
   144            Bit1        : BIT1_OFF,
   145            Bit2        : BIT2_OFF,
   146            Bit3        : BIT3_OFF,
   147            Bit4        : BIT4_OFF,
   148            Bit5        : BIT5_OFF,
   149            Bit6        : BIT6_OFF,
   150            Bit7        : BIT7_OFF
   151        };
   152
   153        /*! Port 1 Direction Register */
   154        config GpioBits8PxDir_t P1DIR = {
   155            Bit0        : BIT0_OFF,
   156            Bit1        : BIT1_OFF,
   157            Bit2        : BIT2_OFF,
   158            Bit3        : BIT3_OFF,
   159            Bit4        : BIT4_OFF,
   160            Bit5        : BIT5_OFF,
   161            Bit6        : BIT6_OFF,
   162            Bit7        : BIT7_OFF
   163        };
   164
   165        /*! Port 1 Resistor Enable Register */
   166        config GpioBits8PxRen_t P1REN = {
   167            Bit0        : BIT0_OFF,
   168            Bit1        : BIT1_OFF,
   169            Bit2        : BIT2_OFF,
   170            Bit3        : BIT3_OFF,
   171            Bit4        : BIT4_OFF,
   172            Bit5        : BIT5_OFF,
   173            Bit6        : BIT6_OFF,
   174            Bit7        : BIT7_OFF
   175        };
   176
   177        /*! Port 2 Output Register */
   178        config GpioBits8PxOut_t P2OUT = {
   179            Bit0        : BIT0_OFF,
   180            Bit1        : BIT1_OFF,
   181            Bit2        : BIT2_OFF,
   182            Bit3        : BIT3_OFF,
   183            Bit4        : BIT4_OFF,
   184            Bit5        : BIT5_OFF,
   185            Bit6        : BIT6_OFF,
   186            Bit7        : BIT7_OFF
   187        };
   188
   189        /*! Port 2 Port Select Register */
   190        config GpioBits8PxSel_t P2SEL = {
   191            Bit0        : BIT0_OFF,
   192            Bit1        : BIT1_OFF,
   193            Bit2        : BIT2_OFF,
   194            Bit3        : BIT3_OFF,
   195            Bit4        : BIT4_OFF,
   196            Bit5        : BIT5_OFF,
   197            Bit6        : BIT6_OFF,
   198            Bit7        : BIT7_OFF
   199        };
   200
   201        /*! Port 2 Direction Register */
   202        config GpioBits8PxDir_t P2DIR = {
   203            Bit0        : BIT0_OFF,
   204            Bit1        : BIT1_OFF,
   205            Bit2        : BIT2_OFF,
   206            Bit3        : BIT3_OFF,
   207            Bit4        : BIT4_OFF,
   208            Bit5        : BIT5_OFF,
   209            Bit6        : BIT6_OFF,
   210            Bit7        : BIT7_OFF
   211        };
   212
   213        /*! Port 2 Resistor Enable Register */
   214        config GpioBits8PxRen_t P2REN = {
   215            Bit0        : BIT0_OFF,
   216            Bit1        : BIT1_OFF,
   217            Bit2        : BIT2_OFF,
   218            Bit3        : BIT3_OFF,
   219            Bit4        : BIT4_OFF,
   220            Bit5        : BIT5_OFF,
   221            Bit6        : BIT6_OFF,
   222            Bit7        : BIT7_OFF
   223        };
   224
   225        /*! Port 3 Output Register */
   226        config GpioBits8PxOut_t P3OUT = {
   227            Bit0        : BIT0_OFF,
   228            Bit1        : BIT1_OFF,
   229            Bit2        : BIT2_OFF,
   230            Bit3        : BIT3_OFF,
   231            Bit4        : BIT4_OFF,
   232            Bit5        : BIT5_OFF,
   233            Bit6        : BIT6_OFF,
   234            Bit7        : BIT7_OFF
   235        };
   236
   237        /*! Port 3 Port Select Register */
   238        config GpioBits8PxSel_t P3SEL = {
   239            Bit0        : BIT0_OFF,
   240            Bit1        : BIT1_OFF,
   241            Bit2        : BIT2_OFF,
   242            Bit3        : BIT3_OFF,
   243            Bit4        : BIT4_OFF,
   244            Bit5        : BIT5_OFF,
   245            Bit6        : BIT6_OFF,
   246            Bit7        : BIT7_OFF
   247        };
   248
   249        /*! Port 3 Direction Register */
   250        config GpioBits8PxDir_t P3DIR = {
   251            Bit0        : BIT0_OFF,
   252            Bit1        : BIT1_OFF,
   253            Bit2        : BIT2_OFF,
   254            Bit3        : BIT3_OFF,
   255            Bit4        : BIT4_OFF,
   256            Bit5        : BIT5_OFF,
   257            Bit6        : BIT6_OFF,
   258            Bit7        : BIT7_OFF
   259        };
   260
   261        /*! Port 3 Resistor Enable Register */
   262        config GpioBits8PxRen_t P3REN = {
   263            Bit0        : BIT0_OFF,
   264            Bit1        : BIT1_OFF,
   265            Bit2        : BIT2_OFF,
   266            Bit3        : BIT3_OFF,
   267            Bit4        : BIT4_OFF,
   268            Bit5        : BIT5_OFF,
   269            Bit6        : BIT6_OFF,
   270            Bit7        : BIT7_OFF
   271        };
   272
   273        /*! Port 4 Output Register */
   274        config GpioBits8PxOut_t P4OUT = {
   275            Bit0        : BIT0_OFF,
   276            Bit1        : BIT1_OFF,
   277            Bit2        : BIT2_OFF,
   278            Bit3        : BIT3_OFF,
   279            Bit4        : BIT4_OFF,
   280            Bit5        : BIT5_OFF,
   281            Bit6        : BIT6_OFF,
   282            Bit7        : BIT7_OFF
   283        };
   284
   285        /*! Port 4 Port Select Register */
   286        config GpioBits8PxSel_t P4SEL = {
   287            Bit0        : BIT0_OFF,
   288            Bit1        : BIT1_OFF,
   289            Bit2        : BIT2_OFF,
   290            Bit3        : BIT3_OFF,
   291            Bit4        : BIT4_OFF,
   292            Bit5        : BIT5_OFF,
   293            Bit6        : BIT6_OFF,
   294            Bit7        : BIT7_OFF
   295        };
   296
   297        /*! Port 4 Direction Register */
   298        config GpioBits8PxDir_t P4DIR = {
   299            Bit0        : BIT0_OFF,
   300            Bit1        : BIT1_OFF,
   301            Bit2        : BIT2_OFF,
   302            Bit3        : BIT3_OFF,
   303            Bit4        : BIT4_OFF,
   304            Bit5        : BIT5_OFF,
   305            Bit6        : BIT6_OFF,
   306            Bit7        : BIT7_OFF
   307        };
   308
   309        /*! Port 4 Resistor Enable Register */
   310        config GpioBits8PxRen_t P4REN = {
   311            Bit0        : BIT0_OFF,
   312            Bit1        : BIT1_OFF,
   313            Bit2        : BIT2_OFF,
   314            Bit3        : BIT3_OFF,
   315            Bit4        : BIT4_OFF,
   316            Bit5        : BIT5_OFF,
   317            Bit6        : BIT6_OFF,
   318            Bit7        : BIT7_OFF
   319        };
   320
   321            /*! Port 5 Output Register */
   322        config GpioBits8PxOut_t P5OUT = {
   323            Bit0        : BIT0_OFF,
   324            Bit1        : BIT1_OFF,
   325            Bit2        : BIT2_OFF,
   326            Bit3        : BIT3_OFF,
   327            Bit4        : BIT4_OFF,
   328            Bit5        : BIT5_OFF,
   329            Bit6        : BIT6_OFF,
   330            Bit7        : BIT7_OFF
   331        };
   332
   333        /*! Port 5 Port Select Register */
   334        config GpioBits8PxSel_t P5SEL = {
   335            Bit0        : BIT0_OFF,
   336            Bit1        : BIT1_OFF,
   337            Bit2        : BIT2_OFF,
   338            Bit3        : BIT3_OFF,
   339            Bit4        : BIT4_OFF,
   340            Bit5        : BIT5_OFF,
   341            Bit6        : BIT6_OFF,
   342            Bit7        : BIT7_OFF
   343        };
   344
   345        /*! Port 5 Direction Register */
   346        config GpioBits8PxDir_t P5DIR = {
   347            Bit0        : BIT0_OFF,
   348            Bit1        : BIT1_OFF,
   349            Bit2        : BIT2_OFF,
   350            Bit3        : BIT3_OFF,
   351            Bit4        : BIT4_OFF,
   352            Bit5        : BIT5_OFF,
   353            Bit6        : BIT6_OFF,
   354            Bit7        : BIT7_OFF
   355        };
   356
   357        /*! Port 5 Resistor Enable Register */
   358        config GpioBits8PxRen_t P5REN = {
   359            Bit0        : BIT0_OFF,
   360            Bit1        : BIT1_OFF,
   361            Bit2        : BIT2_OFF,
   362            Bit3        : BIT3_OFF,
   363            Bit4        : BIT4_OFF,
   364            Bit5        : BIT5_OFF,
   365            Bit6        : BIT6_OFF,
   366            Bit7        : BIT7_OFF
   367        };
   368
   369        /*! Port 6 Output Register */
   370        config GpioBits8PxOut_t P6OUT = {
   371            Bit0        : BIT0_OFF,
   372            Bit1        : BIT1_OFF,
   373            Bit2        : BIT2_OFF,
   374            Bit3        : BIT3_OFF,
   375            Bit4        : BIT4_OFF,
   376            Bit5        : BIT5_OFF,
   377            Bit6        : BIT6_OFF,
   378            Bit7        : BIT7_OFF
   379        };
   380
   381        /*! Port 6 Port Select Register */
   382        config GpioBits8PxSel_t P6SEL = {
   383            Bit0        : BIT0_OFF,
   384            Bit1        : BIT1_OFF,
   385            Bit2        : BIT2_OFF,
   386            Bit3        : BIT3_OFF,
   387            Bit4        : BIT4_OFF,
   388            Bit5        : BIT5_OFF,
   389            Bit6        : BIT6_OFF,
   390            Bit7        : BIT7_OFF
   391        };
   392
   393        /*! Port 6 Direction Register */
   394        config GpioBits8PxDir_t P6DIR = {
   395            Bit0        : BIT0_OFF,
   396            Bit1        : BIT1_OFF,
   397            Bit2        : BIT2_OFF,
   398            Bit3        : BIT3_OFF,
   399            Bit4        : BIT4_OFF,
   400            Bit5        : BIT5_OFF,
   401            Bit6        : BIT6_OFF,
   402            Bit7        : BIT7_OFF
   403        };
   404
   405        /*! Port 6 Resistor Enable Register */
   406        config GpioBits8PxRen_t P6REN = {
   407            Bit0        : BIT0_OFF,
   408            Bit1        : BIT1_OFF,
   409            Bit2        : BIT2_OFF,
   410            Bit3        : BIT3_OFF,
   411            Bit4        : BIT4_OFF,
   412            Bit5        : BIT5_OFF,
   413            Bit6        : BIT6_OFF,
   414            Bit7        : BIT7_OFF
   415        };
   416
   417        /*! Port 7 Output Register */
   418        config GpioBits8PxOut_t P7OUT = {
   419            Bit0        : BIT0_OFF,
   420            Bit1        : BIT1_OFF,
   421            Bit2        : BIT2_OFF,
   422            Bit3        : BIT3_OFF,
   423            Bit4        : BIT4_OFF,
   424            Bit5        : BIT5_OFF,
   425            Bit6        : BIT6_OFF,
   426            Bit7        : BIT7_OFF
   427        };
   428
   429        /*! Port 7 Port Select Register */
   430        config GpioBits8PxSel_t P7SEL = {
   431            Bit0        : BIT0_OFF,
   432            Bit1        : BIT1_OFF,
   433            Bit2        : BIT2_OFF,
   434            Bit3        : BIT3_OFF,
   435            Bit4        : BIT4_OFF,
   436            Bit5        : BIT5_OFF,
   437            Bit6        : BIT6_OFF,
   438            Bit7        : BIT7_OFF
   439        };
   440
   441        /*! Port 7 Direction Register */
   442        config GpioBits8PxDir_t P7DIR = {
   443            Bit0        : BIT0_OFF,
   444            Bit1        : BIT1_OFF,
   445            Bit2        : BIT2_OFF,
   446            Bit3        : BIT3_OFF,
   447            Bit4        : BIT4_OFF,
   448            Bit5        : BIT5_OFF,
   449            Bit6        : BIT6_OFF,
   450            Bit7        : BIT7_OFF
   451        };
   452
   453        /*! Port 7 Resistor Enable Register */
   454        config GpioBits8PxRen_t P7REN = {
   455            Bit0        : BIT0_OFF,
   456            Bit1        : BIT1_OFF,
   457            Bit2        : BIT2_OFF,
   458            Bit3        : BIT3_OFF,
   459            Bit4        : BIT4_OFF,
   460            Bit5        : BIT5_OFF,
   461            Bit6        : BIT6_OFF,
   462            Bit7        : BIT7_OFF
   463        };
   464
   465        /*! Port 8 Output Register */
   466        config GpioBits8PxOut_t P8OUT = {
   467            Bit0        : BIT0_OFF,
   468            Bit1        : BIT1_OFF,
   469            Bit2        : BIT2_OFF,
   470            Bit3        : BIT3_OFF,
   471            Bit4        : BIT4_OFF,
   472            Bit5        : BIT5_OFF,
   473            Bit6        : BIT6_OFF,
   474            Bit7        : BIT7_OFF
   475        };
   476
   477        /*! Port 8 Port Select Register */
   478        config GpioBits8PxSel_t P8SEL = {
   479            Bit0        : BIT0_OFF,
   480            Bit1        : BIT1_OFF,
   481            Bit2        : BIT2_OFF,
   482            Bit3        : BIT3_OFF,
   483            Bit4        : BIT4_OFF,
   484            Bit5        : BIT5_OFF,
   485            Bit6        : BIT6_OFF,
   486            Bit7        : BIT7_OFF
   487        };
   488
   489        /*! Port 8 Direction Register */
   490        config GpioBits8PxDir_t P8DIR = {
   491            Bit0        : BIT0_OFF,
   492            Bit1        : BIT1_OFF,
   493            Bit2        : BIT2_OFF,
   494            Bit3        : BIT3_OFF,
   495            Bit4        : BIT4_OFF,
   496            Bit5        : BIT5_OFF,
   497            Bit6        : BIT6_OFF,
   498            Bit7        : BIT7_OFF
   499        };
   500
   501        /*! Port 8 Resistor Enable Register */
   502        config GpioBits8PxRen_t P8REN = {
   503            Bit0        : BIT0_OFF,
   504            Bit1        : BIT1_OFF,
   505            Bit2        : BIT2_OFF,
   506            Bit3        : BIT3_OFF,
   507            Bit4        : BIT4_OFF,
   508            Bit5        : BIT5_OFF,
   509            Bit6        : BIT6_OFF,
   510            Bit7        : BIT7_OFF
   511        };
   512    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F261x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC12 as ADC12;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35    import ti.catalog.msp430.peripherals.svs.ISVS as SVS;
    36    import ti.catalog.msp430.peripherals.dac.DAC12 as DAC12;
    37    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    38
    39    /*!
    40     *  ======== GPIO for MSP430F261x ========
    41     *  MSP430 General Purpose Input Output Ports
    42     */
    43    metaonly module GPIO_MSP430F261x inherits IGPIO {
    44        /*!
    45         *  ======== create ========
    46         *  Create an instance of this peripheral. Use a customized
    47         *  init function so that we can get access to the ADC12,
    48         *  Comparator_A, SVS, DAC12 and BCS+ instances.
    49         */
    50        create(ADC12.Instance adc12, Comparator.Instance comparator, SVS.Instance svs, DAC12.Instance dac12,
    51            BCSplus.Instance clock);
    52
    53    instance:
    54        /*! @_nodoc */
    55        config ADC12.Instance adc12;
    56
    57        /*! @_nodoc */
    58        config Comparator.Instance comparator;
    59
    60        /*! @_nodoc */
    61        config SVS.Instance svs;
    62
    63        /*! @_nodoc */
    64        config DAC12.Instance dac12;
    65
    66        /*! @_nodoc */
    67        config BCSplus.Instance clock;
    68
    69       /*! Define an array to describe all device pins. The 1st dimension
    70        *  denotes the port, the second the pin on that port. On an
    71        *  MSP430F261x device, there are 8 x 8 = 64 pins total.
    72        */
    73
    74        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    75         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    76        /* TODO: For this device the config variable definition has been moved into the
    77         * corresponding XS file due to its size. This needs a more consistent solution. */
    78        config DevicePin_t devicePins[8][8];
    79
    80        /*! Implementation of Device Pin Functional Configuration */
    81        override config DevicePinFunctionSetting_t devicePinSetting[8][8];
    82
    83        /*! Determine if each Register needs to be forced set or not */
    84        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    85        [
    86            { register : "P1OUT" , regForceSet : true  },
    87            { register : "P1SEL" , regForceSet : false },
    88            { register : "P1DIR" , regForceSet : true  },
    89            { register : "P1REN" , regForceSet : false },
    90            { register : "P1IES" , regForceSet : true },
    91            { register : "P1IFG" , regForceSet : true },
    92            { register : "P1IE"  , regForceSet : false },
    93            { register : "P2OUT" , regForceSet : true  },
    94            { register : "P2SEL" , regForceSet : false },
    95            { register : "P2DIR" , regForceSet : true  },
    96            { register : "P2REN" , regForceSet : false },
    97            { register : "P2IES" , regForceSet : true },
    98            { register : "P2IFG" , regForceSet : true },
    99            { register : "P2IE"  , regForceSet : false },
   100            { register : "P3OUT" , regForceSet : true  },
   101            { register : "P3SEL" , regForceSet : false },
   102            { register : "P3DIR" , regForceSet : true  },
   103            { register : "P3REN" , regForceSet : false },
   104            { register : "P4OUT" , regForceSet : true  },
   105            { register : "P4SEL" , regForceSet : false },
   106            { register : "P4DIR" , regForceSet : true  },
   107            { register : "P4REN" , regForceSet : false },
   108            { register : "P5OUT" , regForceSet : true  },
   109            { register : "P5SEL" , regForceSet : false },
   110            { register : "P5DIR" , regForceSet : true  },
   111            { register : "P5REN" , regForceSet : false },
   112            { register : "P6OUT" , regForceSet : true  },
   113            { register : "P6SEL" , regForceSet : false },
   114            { register : "P6DIR" , regForceSet : true  },
   115            { register : "P6REN" , regForceSet : false },
   116            { register : "P7OUT" , regForceSet : true  },
   117            { register : "P7SEL" , regForceSet : false },
   118            { register : "P7DIR" , regForceSet : true  },
   119            { register : "P7REN" , regForceSet : false },
   120            { register : "P8OUT" , regForceSet : true  },
   121            { register : "P8SEL" , regForceSet : false },
   122            { register : "P8DIR" , regForceSet : true  },
   123            { register : "P8REN" , regForceSet : false }
   124        ];
   125
   126        /*
   127         *  GPIO Digital I/O Registers
   128         *
   129         *  One GIPO instance defines the configuration of an entire,
   130         *  8-bit wide digital I/O port.
   131         */
   132
   133        /*! Port 1 Output Register */
   134        config GpioBits8PxOut_t P1OUT = {
   135            Bit0        : BIT0_OFF,
   136            Bit1        : BIT1_OFF,
   137            Bit2        : BIT2_OFF,
   138            Bit3        : BIT3_OFF,
   139            Bit4        : BIT4_OFF,
   140            Bit5        : BIT5_OFF,
   141            Bit6        : BIT6_OFF,
   142            Bit7        : BIT7_OFF
   143        };
   144
   145        /*! Port 1 Port Select Register */
   146        config GpioBits8PxSel_t P1SEL = {
   147            Bit0        : BIT0_OFF,
   148            Bit1        : BIT1_OFF,
   149            Bit2        : BIT2_OFF,
   150            Bit3        : BIT3_OFF,
   151            Bit4        : BIT4_OFF,
   152            Bit5        : BIT5_OFF,
   153            Bit6        : BIT6_OFF,
   154            Bit7        : BIT7_OFF
   155        };
   156
   157        /*! Port 1 Direction Register */
   158        config GpioBits8PxDir_t P1DIR = {
   159            Bit0        : BIT0_OFF,
   160            Bit1        : BIT1_OFF,
   161            Bit2        : BIT2_OFF,
   162            Bit3        : BIT3_OFF,
   163            Bit4        : BIT4_OFF,
   164            Bit5        : BIT5_OFF,
   165            Bit6        : BIT6_OFF,
   166            Bit7        : BIT7_OFF
   167        };
   168
   169        /*! Port 1 Resistor Enable Register */
   170        config GpioBits8PxRen_t P1REN = {
   171            Bit0        : BIT0_OFF,
   172            Bit1        : BIT1_OFF,
   173            Bit2        : BIT2_OFF,
   174            Bit3        : BIT3_OFF,
   175            Bit4        : BIT4_OFF,
   176            Bit5        : BIT5_OFF,
   177            Bit6        : BIT6_OFF,
   178            Bit7        : BIT7_OFF
   179        };
   180
   181        /*! Port 2 Output Register */
   182        config GpioBits8PxOut_t P2OUT = {
   183            Bit0        : BIT0_OFF,
   184            Bit1        : BIT1_OFF,
   185            Bit2        : BIT2_OFF,
   186            Bit3        : BIT3_OFF,
   187            Bit4        : BIT4_OFF,
   188            Bit5        : BIT5_OFF,
   189            Bit6        : BIT6_OFF,
   190            Bit7        : BIT7_OFF
   191        };
   192
   193        /*! Port 2 Port Select Register */
   194        config GpioBits8PxSel_t P2SEL = {
   195            Bit0        : BIT0_OFF,
   196            Bit1        : BIT1_OFF,
   197            Bit2        : BIT2_OFF,
   198            Bit3        : BIT3_OFF,
   199            Bit4        : BIT4_OFF,
   200            Bit5        : BIT5_OFF,
   201            Bit6        : BIT6_OFF,
   202            Bit7        : BIT7_OFF
   203        };
   204
   205        /*! Port 2 Direction Register */
   206        config GpioBits8PxDir_t P2DIR = {
   207            Bit0        : BIT0_OFF,
   208            Bit1        : BIT1_OFF,
   209            Bit2        : BIT2_OFF,
   210            Bit3        : BIT3_OFF,
   211            Bit4        : BIT4_OFF,
   212            Bit5        : BIT5_OFF,
   213            Bit6        : BIT6_OFF,
   214            Bit7        : BIT7_OFF
   215        };
   216
   217        /*! Port 2 Resistor Enable Register */
   218        config GpioBits8PxRen_t P2REN = {
   219            Bit0        : BIT0_OFF,
   220            Bit1        : BIT1_OFF,
   221            Bit2        : BIT2_OFF,
   222            Bit3        : BIT3_OFF,
   223            Bit4        : BIT4_OFF,
   224            Bit5        : BIT5_OFF,
   225            Bit6        : BIT6_OFF,
   226            Bit7        : BIT7_OFF
   227        };
   228
   229        /*! Port 3 Output Register */
   230        config GpioBits8PxOut_t P3OUT = {
   231            Bit0        : BIT0_OFF,
   232            Bit1        : BIT1_OFF,
   233            Bit2        : BIT2_OFF,
   234            Bit3        : BIT3_OFF,
   235            Bit4        : BIT4_OFF,
   236            Bit5        : BIT5_OFF,
   237            Bit6        : BIT6_OFF,
   238            Bit7        : BIT7_OFF
   239        };
   240
   241        /*! Port 3 Port Select Register */
   242        config GpioBits8PxSel_t P3SEL = {
   243            Bit0        : BIT0_OFF,
   244            Bit1        : BIT1_OFF,
   245            Bit2        : BIT2_OFF,
   246            Bit3        : BIT3_OFF,
   247            Bit4        : BIT4_OFF,
   248            Bit5        : BIT5_OFF,
   249            Bit6        : BIT6_OFF,
   250            Bit7        : BIT7_OFF
   251        };
   252
   253        /*! Port 3 Direction Register */
   254        config GpioBits8PxDir_t P3DIR = {
   255            Bit0        : BIT0_OFF,
   256            Bit1        : BIT1_OFF,
   257            Bit2        : BIT2_OFF,
   258            Bit3        : BIT3_OFF,
   259            Bit4        : BIT4_OFF,
   260            Bit5        : BIT5_OFF,
   261            Bit6        : BIT6_OFF,
   262            Bit7        : BIT7_OFF
   263        };
   264
   265        /*! Port 3 Resistor Enable Register */
   266        config GpioBits8PxRen_t P3REN = {
   267            Bit0        : BIT0_OFF,
   268            Bit1        : BIT1_OFF,
   269            Bit2        : BIT2_OFF,
   270            Bit3        : BIT3_OFF,
   271            Bit4        : BIT4_OFF,
   272            Bit5        : BIT5_OFF,
   273            Bit6        : BIT6_OFF,
   274            Bit7        : BIT7_OFF
   275        };
   276
   277        /*! Port 4 Output Register */
   278        config GpioBits8PxOut_t P4OUT = {
   279            Bit0        : BIT0_OFF,
   280            Bit1        : BIT1_OFF,
   281            Bit2        : BIT2_OFF,
   282            Bit3        : BIT3_OFF,
   283            Bit4        : BIT4_OFF,
   284            Bit5        : BIT5_OFF,
   285            Bit6        : BIT6_OFF,
   286            Bit7        : BIT7_OFF
   287        };
   288
   289        /*! Port 4 Port Select Register */
   290        config GpioBits8PxSel_t P4SEL = {
   291            Bit0        : BIT0_OFF,
   292            Bit1        : BIT1_OFF,
   293            Bit2        : BIT2_OFF,
   294            Bit3        : BIT3_OFF,
   295            Bit4        : BIT4_OFF,
   296            Bit5        : BIT5_OFF,
   297            Bit6        : BIT6_OFF,
   298            Bit7        : BIT7_OFF
   299        };
   300
   301        /*! Port 4 Direction Register */
   302        config GpioBits8PxDir_t P4DIR = {
   303            Bit0        : BIT0_OFF,
   304            Bit1        : BIT1_OFF,
   305            Bit2        : BIT2_OFF,
   306            Bit3        : BIT3_OFF,
   307            Bit4        : BIT4_OFF,
   308            Bit5        : BIT5_OFF,
   309            Bit6        : BIT6_OFF,
   310            Bit7        : BIT7_OFF
   311        };
   312
   313        /*! Port 4 Resistor Enable Register */
   314        config GpioBits8PxRen_t P4REN = {
   315            Bit0        : BIT0_OFF,
   316            Bit1        : BIT1_OFF,
   317            Bit2        : BIT2_OFF,
   318            Bit3        : BIT3_OFF,
   319            Bit4        : BIT4_OFF,
   320            Bit5        : BIT5_OFF,
   321            Bit6        : BIT6_OFF,
   322            Bit7        : BIT7_OFF
   323        };
   324
   325            /*! Port 5 Output Register */
   326        config GpioBits8PxOut_t P5OUT = {
   327            Bit0        : BIT0_OFF,
   328            Bit1        : BIT1_OFF,
   329            Bit2        : BIT2_OFF,
   330            Bit3        : BIT3_OFF,
   331            Bit4        : BIT4_OFF,
   332            Bit5        : BIT5_OFF,
   333            Bit6        : BIT6_OFF,
   334            Bit7        : BIT7_OFF
   335        };
   336
   337        /*! Port 5 Port Select Register */
   338        config GpioBits8PxSel_t P5SEL = {
   339            Bit0        : BIT0_OFF,
   340            Bit1        : BIT1_OFF,
   341            Bit2        : BIT2_OFF,
   342            Bit3        : BIT3_OFF,
   343            Bit4        : BIT4_OFF,
   344            Bit5        : BIT5_OFF,
   345            Bit6        : BIT6_OFF,
   346            Bit7        : BIT7_OFF
   347        };
   348
   349        /*! Port 5 Direction Register */
   350        config GpioBits8PxDir_t P5DIR = {
   351            Bit0        : BIT0_OFF,
   352            Bit1        : BIT1_OFF,
   353            Bit2        : BIT2_OFF,
   354            Bit3        : BIT3_OFF,
   355            Bit4        : BIT4_OFF,
   356            Bit5        : BIT5_OFF,
   357            Bit6        : BIT6_OFF,
   358            Bit7        : BIT7_OFF
   359        };
   360
   361        /*! Port 5 Resistor Enable Register */
   362        config GpioBits8PxRen_t P5REN = {
   363            Bit0        : BIT0_OFF,
   364            Bit1        : BIT1_OFF,
   365            Bit2        : BIT2_OFF,
   366            Bit3        : BIT3_OFF,
   367            Bit4        : BIT4_OFF,
   368            Bit5        : BIT5_OFF,
   369            Bit6        : BIT6_OFF,
   370            Bit7        : BIT7_OFF
   371        };
   372
   373        /*! Port 6 Output Register */
   374        config GpioBits8PxOut_t P6OUT = {
   375            Bit0        : BIT0_OFF,
   376            Bit1        : BIT1_OFF,
   377            Bit2        : BIT2_OFF,
   378            Bit3        : BIT3_OFF,
   379            Bit4        : BIT4_OFF,
   380            Bit5        : BIT5_OFF,
   381            Bit6        : BIT6_OFF,
   382            Bit7        : BIT7_OFF
   383        };
   384
   385        /*! Port 6 Port Select Register */
   386        config GpioBits8PxSel_t P6SEL = {
   387            Bit0        : BIT0_OFF,
   388            Bit1        : BIT1_OFF,
   389            Bit2        : BIT2_OFF,
   390            Bit3        : BIT3_OFF,
   391            Bit4        : BIT4_OFF,
   392            Bit5        : BIT5_OFF,
   393            Bit6        : BIT6_OFF,
   394            Bit7        : BIT7_OFF
   395        };
   396
   397        /*! Port 6 Direction Register */
   398        config GpioBits8PxDir_t P6DIR = {
   399            Bit0        : BIT0_OFF,
   400            Bit1        : BIT1_OFF,
   401            Bit2        : BIT2_OFF,
   402            Bit3        : BIT3_OFF,
   403            Bit4        : BIT4_OFF,
   404            Bit5        : BIT5_OFF,
   405            Bit6        : BIT6_OFF,
   406            Bit7        : BIT7_OFF
   407        };
   408
   409        /*! Port 6 Resistor Enable Register */
   410        config GpioBits8PxRen_t P6REN = {
   411            Bit0        : BIT0_OFF,
   412            Bit1        : BIT1_OFF,
   413            Bit2        : BIT2_OFF,
   414            Bit3        : BIT3_OFF,
   415            Bit4        : BIT4_OFF,
   416            Bit5        : BIT5_OFF,
   417            Bit6        : BIT6_OFF,
   418            Bit7        : BIT7_OFF
   419        };
   420
   421        /*! Port 7 Output Register */
   422        config GpioBits8PxOut_t P7OUT = {
   423            Bit0        : BIT0_OFF,
   424            Bit1        : BIT1_OFF,
   425            Bit2        : BIT2_OFF,
   426            Bit3        : BIT3_OFF,
   427            Bit4        : BIT4_OFF,
   428            Bit5        : BIT5_OFF,
   429            Bit6        : BIT6_OFF,
   430            Bit7        : BIT7_OFF
   431        };
   432
   433        /*! Port 7 Port Select Register */
   434        config GpioBits8PxSel_t P7SEL = {
   435            Bit0        : BIT0_OFF,
   436            Bit1        : BIT1_OFF,
   437            Bit2        : BIT2_OFF,
   438            Bit3        : BIT3_OFF,
   439            Bit4        : BIT4_OFF,
   440            Bit5        : BIT5_OFF,
   441            Bit6        : BIT6_OFF,
   442            Bit7        : BIT7_OFF
   443        };
   444
   445        /*! Port 7 Direction Register */
   446        config GpioBits8PxDir_t P7DIR = {
   447            Bit0        : BIT0_OFF,
   448            Bit1        : BIT1_OFF,
   449            Bit2        : BIT2_OFF,
   450            Bit3        : BIT3_OFF,
   451            Bit4        : BIT4_OFF,
   452            Bit5        : BIT5_OFF,
   453            Bit6        : BIT6_OFF,
   454            Bit7        : BIT7_OFF
   455        };
   456
   457        /*! Port 7 Resistor Enable Register */
   458        config GpioBits8PxRen_t P7REN = {
   459            Bit0        : BIT0_OFF,
   460            Bit1        : BIT1_OFF,
   461            Bit2        : BIT2_OFF,
   462            Bit3        : BIT3_OFF,
   463            Bit4        : BIT4_OFF,
   464            Bit5        : BIT5_OFF,
   465            Bit6        : BIT6_OFF,
   466            Bit7        : BIT7_OFF
   467        };
   468
   469        /*! Port 8 Output Register */
   470        config GpioBits8PxOut_t P8OUT = {
   471            Bit0        : BIT0_OFF,
   472            Bit1        : BIT1_OFF,
   473            Bit2        : BIT2_OFF,
   474            Bit3        : BIT3_OFF,
   475            Bit4        : BIT4_OFF,
   476            Bit5        : BIT5_OFF,
   477            Bit6        : BIT6_OFF,
   478            Bit7        : BIT7_OFF
   479        };
   480
   481        /*! Port 8 Port Select Register */
   482        config GpioBits8PxSel_t P8SEL = {
   483            Bit0        : BIT0_OFF,
   484            Bit1        : BIT1_OFF,
   485            Bit2        : BIT2_OFF,
   486            Bit3        : BIT3_OFF,
   487            Bit4        : BIT4_OFF,
   488            Bit5        : BIT5_OFF,
   489            Bit6        : BIT6_OFF,
   490            Bit7        : BIT7_OFF
   491        };
   492
   493        /*! Port 8 Direction Register */
   494        config GpioBits8PxDir_t P8DIR = {
   495            Bit0        : BIT0_OFF,
   496            Bit1        : BIT1_OFF,
   497            Bit2        : BIT2_OFF,
   498            Bit3        : BIT3_OFF,
   499            Bit4        : BIT4_OFF,
   500            Bit5        : BIT5_OFF,
   501            Bit6        : BIT6_OFF,
   502            Bit7        : BIT7_OFF
   503        };
   504
   505        /*! Port 8 Resistor Enable Register */
   506        config GpioBits8PxRen_t P8REN = {
   507            Bit0        : BIT0_OFF,
   508            Bit1        : BIT1_OFF,
   509            Bit2        : BIT2_OFF,
   510            Bit3        : BIT3_OFF,
   511            Bit4        : BIT4_OFF,
   512            Bit5        : BIT5_OFF,
   513            Bit6        : BIT6_OFF,
   514            Bit7        : BIT7_OFF
   515        };
   516    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430F543xA

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.UCS as UCS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430F543xA ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430F543xA inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the UCS
    44         *  instances.
    45         */
    46        create(UCS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config UCS.Instance clock;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430F543x(A) device, there are 8 + 2 = 10 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        config DevicePin_t devicePins[12][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[12][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT" , regForceSet : true  },
    68            { register : "P1SEL" , regForceSet : false },
    69            { register : "P1DIR" , regForceSet : true  },
    70            { register : "P1REN" , regForceSet : false },
    71            { register : "P1IES" , regForceSet : true },
    72            { register : "P1IFG" , regForceSet : true },
    73            { register : "P1IE"  , regForceSet : false },
    74            { register : "P2OUT" , regForceSet : true  },
    75            { register : "P2SEL" , regForceSet : false },
    76            { register : "P2DIR" , regForceSet : true  },
    77            { register : "P2REN" , regForceSet : false },
    78            { register : "P2IES" , regForceSet : true },
    79            { register : "P2IFG" , regForceSet : true },
    80            { register : "P2IE"  , regForceSet : false },
    81            { register : "P3OUT" , regForceSet : true  },
    82            { register : "P3SEL" , regForceSet : false },
    83            { register : "P3DIR" , regForceSet : true  },
    84            { register : "P3REN" , regForceSet : false },
    85            { register : "P4OUT" , regForceSet : true  },
    86            { register : "P4SEL" , regForceSet : false },
    87            { register : "P4DIR" , regForceSet : true  },
    88            { register : "P4REN" , regForceSet : false },
    89            { register : "P5OUT" , regForceSet : true  },
    90            { register : "P5SEL" , regForceSet : false },
    91            { register : "P5DIR" , regForceSet : true  },
    92            { register : "P5REN" , regForceSet : false },
    93            { register : "P6OUT" , regForceSet : true  },
    94            { register : "P6SEL" , regForceSet : false },
    95            { register : "P6DIR" , regForceSet : true  },
    96            { register : "P6REN" , regForceSet : false },
    97            { register : "P7OUT" , regForceSet : true  },
    98            { register : "P7SEL" , regForceSet : false },
    99            { register : "P7DIR" , regForceSet : true  },
   100            { register : "P7REN" , regForceSet : false },
   101            { register : "P8OUT" , regForceSet : true  },
   102            { register : "P8SEL" , regForceSet : false },
   103            { register : "P8DIR" , regForceSet : true  },
   104            { register : "P8REN" , regForceSet : false },
   105            { register : "P9OUT" , regForceSet : true  },
   106            { register : "P9SEL" , regForceSet : false },
   107            { register : "P9DIR" , regForceSet : true  },
   108            { register : "P9REN" , regForceSet : false },
   109            { register : "P10OUT" , regForceSet : true  },
   110            { register : "P10SEL" , regForceSet : false },
   111            { register : "P10DIR" , regForceSet : true  },
   112            { register : "P10REN" , regForceSet : false },
   113            { register : "P11OUT" , regForceSet : true  },
   114            { register : "P11SEL" , regForceSet : false },
   115            { register : "P11DIR" , regForceSet : true  },
   116            { register : "P11REN" , regForceSet : false },
   117            { register : "PJOUT" , regForceSet : true  },
   118            { register : "PJSEL" , regForceSet : false },
   119            { register : "PJDIR" , regForceSet : true  },
   120            { register : "PJREN" , regForceSet : false }
   121        ];
   122
   123        /*
   124         *  GPIO Digital I/O Registers
   125         *
   126         *  One GIPO instance defines the configuration of an entire,
   127         *  8-bit wide digital I/O port.
   128         */
   129
   130        /*! Port 1 Output Register */
   131        config GpioBits8PxOut_t P1OUT = {
   132            Bit0        : BIT0_OFF,
   133            Bit1        : BIT1_OFF,
   134            Bit2        : BIT2_OFF,
   135            Bit3        : BIT3_OFF,
   136            Bit4        : BIT4_OFF,
   137            Bit5        : BIT5_OFF,
   138            Bit6        : BIT6_OFF,
   139            Bit7        : BIT7_OFF
   140        };
   141
   142        /*! Port 1 Port Select Register */
   143        config GpioBits8PxSel_t P1SEL = {
   144            Bit0        : BIT0_OFF,
   145            Bit1        : BIT1_OFF,
   146            Bit2        : BIT2_OFF,
   147            Bit3        : BIT3_OFF,
   148            Bit4        : BIT4_OFF,
   149            Bit5        : BIT5_OFF,
   150            Bit6        : BIT6_OFF,
   151            Bit7        : BIT7_OFF
   152        };
   153
   154        /*! Port 1 Direction Register */
   155        config GpioBits8PxDir_t P1DIR = {
   156            Bit0        : BIT0_OFF,
   157            Bit1        : BIT1_OFF,
   158            Bit2        : BIT2_OFF,
   159            Bit3        : BIT3_OFF,
   160            Bit4        : BIT4_OFF,
   161            Bit5        : BIT5_OFF,
   162            Bit6        : BIT6_OFF,
   163            Bit7        : BIT7_OFF
   164        };
   165
   166        /*! Port 1 Resistor Enable Register */
   167        config GpioBits8PxRen_t P1REN = {
   168            Bit0        : BIT0_OFF,
   169            Bit1        : BIT1_OFF,
   170            Bit2        : BIT2_OFF,
   171            Bit3        : BIT3_OFF,
   172            Bit4        : BIT4_OFF,
   173            Bit5        : BIT5_OFF,
   174            Bit6        : BIT6_OFF,
   175            Bit7        : BIT7_OFF
   176        };
   177
   178        /*! Port 2 Output Register */
   179        config GpioBits8PxOut_t P2OUT = {
   180            Bit0        : BIT0_OFF,
   181            Bit1        : BIT1_OFF,
   182            Bit2        : BIT2_OFF,
   183            Bit3        : BIT3_OFF,
   184            Bit4        : BIT4_OFF,
   185            Bit5        : BIT5_OFF,
   186            Bit6        : BIT6_OFF,
   187            Bit7        : BIT7_OFF
   188        };
   189
   190        /*! Port 2 Port Select Register */
   191        config GpioBits8PxSel_t P2SEL = {
   192            Bit0        : BIT0_OFF,
   193            Bit1        : BIT1_OFF,
   194            Bit2        : BIT2_OFF,
   195            Bit3        : BIT3_OFF,
   196            Bit4        : BIT4_OFF,
   197            Bit5        : BIT5_OFF,
   198            Bit6        : BIT6_OFF,
   199            Bit7        : BIT7_OFF
   200        };
   201
   202        /*! Port 2 Direction Register */
   203        config GpioBits8PxDir_t P2DIR = {
   204            Bit0        : BIT0_OFF,
   205            Bit1        : BIT1_OFF,
   206            Bit2        : BIT2_OFF,
   207            Bit3        : BIT3_OFF,
   208            Bit4        : BIT4_OFF,
   209            Bit5        : BIT5_OFF,
   210            Bit6        : BIT6_OFF,
   211            Bit7        : BIT7_OFF
   212        };
   213
   214        /*! Port 2 Resistor Enable Register */
   215        config GpioBits8PxRen_t P2REN = {
   216            Bit0        : BIT0_OFF,
   217            Bit1        : BIT1_OFF,
   218            Bit2        : BIT2_OFF,
   219            Bit3        : BIT3_OFF,
   220            Bit4        : BIT4_OFF,
   221            Bit5        : BIT5_OFF,
   222            Bit6        : BIT6_OFF,
   223            Bit7        : BIT7_OFF
   224        };
   225
   226        /*! Port 3 Output Register */
   227        config GpioBits8PxOut_t P3OUT = {
   228            Bit0        : BIT0_OFF,
   229            Bit1        : BIT1_OFF,
   230            Bit2        : BIT2_OFF,
   231            Bit3        : BIT3_OFF,
   232            Bit4        : BIT4_OFF,
   233            Bit5        : BIT5_OFF,
   234            Bit6        : BIT6_OFF,
   235            Bit7        : BIT7_OFF
   236        };
   237
   238        /*! Port 3 Port Select Register */
   239        config GpioBits8PxSel_t P3SEL = {
   240            Bit0        : BIT0_OFF,
   241            Bit1        : BIT1_OFF,
   242            Bit2        : BIT2_OFF,
   243            Bit3        : BIT3_OFF,
   244            Bit4        : BIT4_OFF,
   245            Bit5        : BIT5_OFF,
   246            Bit6        : BIT6_OFF,
   247            Bit7        : BIT7_OFF
   248        };
   249
   250        /*! Port 3 Direction Register */
   251        config GpioBits8PxDir_t P3DIR = {
   252            Bit0        : BIT0_OFF,
   253            Bit1        : BIT1_OFF,
   254            Bit2        : BIT2_OFF,
   255            Bit3        : BIT3_OFF,
   256            Bit4        : BIT4_OFF,
   257            Bit5        : BIT5_OFF,
   258            Bit6        : BIT6_OFF,
   259            Bit7        : BIT7_OFF
   260        };
   261
   262        /*! Port 3 Resistor Enable Register */
   263        config GpioBits8PxRen_t P3REN = {
   264            Bit0        : BIT0_OFF,
   265            Bit1        : BIT1_OFF,
   266            Bit2        : BIT2_OFF,
   267            Bit3        : BIT3_OFF,
   268            Bit4        : BIT4_OFF,
   269            Bit5        : BIT5_OFF,
   270            Bit6        : BIT6_OFF,
   271            Bit7        : BIT7_OFF
   272        };
   273
   274        /*! Port 4 Output Register */
   275        config GpioBits8PxOut_t P4OUT = {
   276            Bit0        : BIT0_OFF,
   277            Bit1        : BIT1_OFF,
   278            Bit2        : BIT2_OFF,
   279            Bit3        : BIT3_OFF,
   280            Bit4        : BIT4_OFF,
   281            Bit5        : BIT5_OFF,
   282            Bit6        : BIT6_OFF,
   283            Bit7        : BIT7_OFF
   284        };
   285
   286        /*! Port 4 Port Select Register */
   287        config GpioBits8PxSel_t P4SEL = {
   288            Bit0        : BIT0_OFF,
   289            Bit1        : BIT1_OFF,
   290            Bit2        : BIT2_OFF,
   291            Bit3        : BIT3_OFF,
   292            Bit4        : BIT4_OFF,
   293            Bit5        : BIT5_OFF,
   294            Bit6        : BIT6_OFF,
   295            Bit7        : BIT7_OFF
   296        };
   297
   298        /*! Port 4 Direction Register */
   299        config GpioBits8PxDir_t P4DIR = {
   300            Bit0        : BIT0_OFF,
   301            Bit1        : BIT1_OFF,
   302            Bit2        : BIT2_OFF,
   303            Bit3        : BIT3_OFF,
   304            Bit4        : BIT4_OFF,
   305            Bit5        : BIT5_OFF,
   306            Bit6        : BIT6_OFF,
   307            Bit7        : BIT7_OFF
   308        };
   309
   310        /*! Port 4 Resistor Enable Register */
   311        config GpioBits8PxRen_t P4REN = {
   312            Bit0        : BIT0_OFF,
   313            Bit1        : BIT1_OFF,
   314            Bit2        : BIT2_OFF,
   315            Bit3        : BIT3_OFF,
   316            Bit4        : BIT4_OFF,
   317            Bit5        : BIT5_OFF,
   318            Bit6        : BIT6_OFF,
   319            Bit7        : BIT7_OFF
   320        };
   321
   322            /*! Port 5 Output Register */
   323        config GpioBits8PxOut_t P5OUT = {
   324            Bit0        : BIT0_OFF,
   325            Bit1        : BIT1_OFF,
   326            Bit2        : BIT2_OFF,
   327            Bit3        : BIT3_OFF,
   328            Bit4        : BIT4_OFF,
   329            Bit5        : BIT5_OFF,
   330            Bit6        : BIT6_OFF,
   331            Bit7        : BIT7_OFF
   332        };
   333
   334        /*! Port 5 Port Select Register */
   335        config GpioBits8PxSel_t P5SEL = {
   336            Bit0        : BIT0_OFF,
   337            Bit1        : BIT1_OFF,
   338            Bit2        : BIT2_OFF,
   339            Bit3        : BIT3_OFF,
   340            Bit4        : BIT4_OFF,
   341            Bit5        : BIT5_OFF,
   342            Bit6        : BIT6_OFF,
   343            Bit7        : BIT7_OFF
   344        };
   345
   346        /*! Port 5 Direction Register */
   347        config GpioBits8PxDir_t P5DIR = {
   348            Bit0        : BIT0_OFF,
   349            Bit1        : BIT1_OFF,
   350            Bit2        : BIT2_OFF,
   351            Bit3        : BIT3_OFF,
   352            Bit4        : BIT4_OFF,
   353            Bit5        : BIT5_OFF,
   354            Bit6        : BIT6_OFF,
   355            Bit7        : BIT7_OFF
   356        };
   357
   358        /*! Port 5 Resistor Enable Register */
   359        config GpioBits8PxRen_t P5REN = {
   360            Bit0        : BIT0_OFF,
   361            Bit1        : BIT1_OFF,
   362            Bit2        : BIT2_OFF,
   363            Bit3        : BIT3_OFF,
   364            Bit4        : BIT4_OFF,
   365            Bit5        : BIT5_OFF,
   366            Bit6        : BIT6_OFF,
   367            Bit7        : BIT7_OFF
   368        };
   369
   370        /*! Port 6 Output Register */
   371        config GpioBits8PxOut_t P6OUT = {
   372            Bit0        : BIT0_OFF,
   373            Bit1        : BIT1_OFF,
   374            Bit2        : BIT2_OFF,
   375            Bit3        : BIT3_OFF,
   376            Bit4        : BIT4_OFF,
   377            Bit5        : BIT5_OFF,
   378            Bit6        : BIT6_OFF,
   379            Bit7        : BIT7_OFF
   380        };
   381
   382        /*! Port 6 Port Select Register */
   383        config GpioBits8PxSel_t P6SEL = {
   384            Bit0        : BIT0_OFF,
   385            Bit1        : BIT1_OFF,
   386            Bit2        : BIT2_OFF,
   387            Bit3        : BIT3_OFF,
   388            Bit4        : BIT4_OFF,
   389            Bit5        : BIT5_OFF,
   390            Bit6        : BIT6_OFF,
   391            Bit7        : BIT7_OFF
   392        };
   393
   394        /*! Port 6 Direction Register */
   395        config GpioBits8PxDir_t P6DIR = {
   396            Bit0        : BIT0_OFF,
   397            Bit1        : BIT1_OFF,
   398            Bit2        : BIT2_OFF,
   399            Bit3        : BIT3_OFF,
   400            Bit4        : BIT4_OFF,
   401            Bit5        : BIT5_OFF,
   402            Bit6        : BIT6_OFF,
   403            Bit7        : BIT7_OFF
   404        };
   405
   406        /*! Port 6 Resistor Enable Register */
   407        config GpioBits8PxRen_t P6REN = {
   408            Bit0        : BIT0_OFF,
   409            Bit1        : BIT1_OFF,
   410            Bit2        : BIT2_OFF,
   411            Bit3        : BIT3_OFF,
   412            Bit4        : BIT4_OFF,
   413            Bit5        : BIT5_OFF,
   414            Bit6        : BIT6_OFF,
   415            Bit7        : BIT7_OFF
   416        };
   417
   418        /*! Port 7 Output Register */
   419        config GpioBits8PxOut_t P7OUT = {
   420            Bit0        : BIT0_OFF,
   421            Bit1        : BIT1_OFF,
   422            Bit2        : BIT2_OFF,
   423            Bit3        : BIT3_OFF,
   424            Bit4        : BIT4_OFF,
   425            Bit5        : BIT5_OFF,
   426            Bit6        : BIT6_OFF,
   427            Bit7        : BIT7_OFF
   428        };
   429
   430        /*! Port 7 Port Select Register */
   431        config GpioBits8PxSel_t P7SEL = {
   432            Bit0        : BIT0_OFF,
   433            Bit1        : BIT1_OFF,
   434            Bit2        : BIT2_OFF,
   435            Bit3        : BIT3_OFF,
   436            Bit4        : BIT4_OFF,
   437            Bit5        : BIT5_OFF,
   438            Bit6        : BIT6_OFF,
   439            Bit7        : BIT7_OFF
   440        };
   441
   442        /*! Port 7 Direction Register */
   443        config GpioBits8PxDir_t P7DIR = {
   444            Bit0        : BIT0_OFF,
   445            Bit1        : BIT1_OFF,
   446            Bit2        : BIT2_OFF,
   447            Bit3        : BIT3_OFF,
   448            Bit4        : BIT4_OFF,
   449            Bit5        : BIT5_OFF,
   450            Bit6        : BIT6_OFF,
   451            Bit7        : BIT7_OFF
   452        };
   453
   454        /*! Port 7 Resistor Enable Register */
   455        config GpioBits8PxRen_t P7REN = {
   456            Bit0        : BIT0_OFF,
   457            Bit1        : BIT1_OFF,
   458            Bit2        : BIT2_OFF,
   459            Bit3        : BIT3_OFF,
   460            Bit4        : BIT4_OFF,
   461            Bit5        : BIT5_OFF,
   462            Bit6        : BIT6_OFF,
   463            Bit7        : BIT7_OFF
   464        };
   465
   466        /*! Port 8 Output Register */
   467        config GpioBits8PxOut_t P8OUT = {
   468            Bit0        : BIT0_OFF,
   469            Bit1        : BIT1_OFF,
   470            Bit2        : BIT2_OFF,
   471            Bit3        : BIT3_OFF,
   472            Bit4        : BIT4_OFF,
   473            Bit5        : BIT5_OFF,
   474            Bit6        : BIT6_OFF,
   475            Bit7        : BIT7_OFF
   476        };
   477
   478        /*! Port 8 Port Select Register */
   479        config GpioBits8PxSel_t P8SEL = {
   480            Bit0        : BIT0_OFF,
   481            Bit1        : BIT1_OFF,
   482            Bit2        : BIT2_OFF,
   483            Bit3        : BIT3_OFF,
   484            Bit4        : BIT4_OFF,
   485            Bit5        : BIT5_OFF,
   486            Bit6        : BIT6_OFF,
   487            Bit7        : BIT7_OFF
   488        };
   489
   490        /*! Port 8 Direction Register */
   491        config GpioBits8PxDir_t P8DIR = {
   492            Bit0        : BIT0_OFF,
   493            Bit1        : BIT1_OFF,
   494            Bit2        : BIT2_OFF,
   495            Bit3        : BIT3_OFF,
   496            Bit4        : BIT4_OFF,
   497            Bit5        : BIT5_OFF,
   498            Bit6        : BIT6_OFF,
   499            Bit7        : BIT7_OFF
   500        };
   501
   502        /*! Port 8 Resistor Enable Register */
   503        config GpioBits8PxRen_t P8REN = {
   504            Bit0        : BIT0_OFF,
   505            Bit1        : BIT1_OFF,
   506            Bit2        : BIT2_OFF,
   507            Bit3        : BIT3_OFF,
   508            Bit4        : BIT4_OFF,
   509            Bit5        : BIT5_OFF,
   510            Bit6        : BIT6_OFF,
   511            Bit7        : BIT7_OFF
   512        };
   513
   514        /*! Port 9 Output Register */
   515        config GpioBits8PxOut_t P9OUT = {
   516            Bit0        : BIT0_OFF,
   517            Bit1        : BIT1_OFF,
   518            Bit2        : BIT2_OFF,
   519            Bit3        : BIT3_OFF,
   520            Bit4        : BIT4_OFF,
   521            Bit5        : BIT5_OFF,
   522            Bit6        : BIT6_OFF,
   523            Bit7        : BIT7_OFF
   524        };
   525
   526        /*! Port 9 Port Select Register */
   527        config GpioBits8PxSel_t P9SEL = {
   528            Bit0        : BIT0_OFF,
   529            Bit1        : BIT1_OFF,
   530            Bit2        : BIT2_OFF,
   531            Bit3        : BIT3_OFF,
   532            Bit4        : BIT4_OFF,
   533            Bit5        : BIT5_OFF,
   534            Bit6        : BIT6_OFF,
   535            Bit7        : BIT7_OFF
   536        };
   537
   538        /*! Port 9 Direction Register */
   539        config GpioBits8PxDir_t P9DIR = {
   540            Bit0        : BIT0_OFF,
   541            Bit1        : BIT1_OFF,
   542            Bit2        : BIT2_OFF,
   543            Bit3        : BIT3_OFF,
   544            Bit4        : BIT4_OFF,
   545            Bit5        : BIT5_OFF,
   546            Bit6        : BIT6_OFF,
   547            Bit7        : BIT7_OFF
   548        };
   549
   550        /*! Port 9 Resistor Enable Register */
   551        config GpioBits8PxRen_t P9REN = {
   552            Bit0        : BIT0_OFF,
   553            Bit1        : BIT1_OFF,
   554            Bit2        : BIT2_OFF,
   555            Bit3        : BIT3_OFF,
   556            Bit4        : BIT4_OFF,
   557            Bit5        : BIT5_OFF,
   558            Bit6        : BIT6_OFF,
   559            Bit7        : BIT7_OFF
   560        };
   561
   562        /*! Port 10 Output Register */
   563        config GpioBits8PxOut_t P10OUT = {
   564            Bit0        : BIT0_OFF,
   565            Bit1        : BIT1_OFF,
   566            Bit2        : BIT2_OFF,
   567            Bit3        : BIT3_OFF,
   568            Bit4        : BIT4_OFF,
   569            Bit5        : BIT5_OFF,
   570            Bit6        : BIT6_OFF,
   571            Bit7        : BIT7_OFF
   572        };
   573
   574        /*! Port 10 Port Select Register */
   575        config GpioBits8PxSel_t P10SEL = {
   576            Bit0        : BIT0_OFF,
   577            Bit1        : BIT1_OFF,
   578            Bit2        : BIT2_OFF,
   579            Bit3        : BIT3_OFF,
   580            Bit4        : BIT4_OFF,
   581            Bit5        : BIT5_OFF,
   582            Bit6        : BIT6_OFF,
   583            Bit7        : BIT7_OFF
   584        };
   585
   586        /*! Port 10 Direction Register */
   587        config GpioBits8PxDir_t P10DIR = {
   588            Bit0        : BIT0_OFF,
   589            Bit1        : BIT1_OFF,
   590            Bit2        : BIT2_OFF,
   591            Bit3        : BIT3_OFF,
   592            Bit4        : BIT4_OFF,
   593            Bit5        : BIT5_OFF,
   594            Bit6        : BIT6_OFF,
   595            Bit7        : BIT7_OFF
   596        };
   597
   598        /*! Port 10 Resistor Enable Register */
   599        config GpioBits8PxRen_t P10REN = {
   600            Bit0        : BIT0_OFF,
   601            Bit1        : BIT1_OFF,
   602            Bit2        : BIT2_OFF,
   603            Bit3        : BIT3_OFF,
   604            Bit4        : BIT4_OFF,
   605            Bit5        : BIT5_OFF,
   606            Bit6        : BIT6_OFF,
   607            Bit7        : BIT7_OFF
   608        };
   609
   610        /*! Port 11 Output Register */
   611        config GpioBits8PxOut_t P11OUT = {
   612            Bit0        : BIT0_OFF,
   613            Bit1        : BIT1_OFF,
   614            Bit2        : BIT2_OFF,
   615            Bit3        : BIT3_OFF,
   616            Bit4        : BIT4_OFF,
   617            Bit5        : BIT5_OFF,
   618            Bit6        : BIT6_OFF,
   619            Bit7        : BIT7_OFF
   620        };
   621
   622        /*! Port 11 Port Select Register */
   623        config GpioBits8PxSel_t P11SEL = {
   624            Bit0        : BIT0_OFF,
   625            Bit1        : BIT1_OFF,
   626            Bit2        : BIT2_OFF,
   627            Bit3        : BIT3_OFF,
   628            Bit4        : BIT4_OFF,
   629            Bit5        : BIT5_OFF,
   630            Bit6        : BIT6_OFF,
   631            Bit7        : BIT7_OFF
   632        };
   633
   634        /*! Port 11 Direction Register */
   635        config GpioBits8PxDir_t P11DIR = {
   636            Bit0        : BIT0_OFF,
   637            Bit1        : BIT1_OFF,
   638            Bit2        : BIT2_OFF,
   639            Bit3        : BIT3_OFF,
   640            Bit4        : BIT4_OFF,
   641            Bit5        : BIT5_OFF,
   642            Bit6        : BIT6_OFF,
   643            Bit7        : BIT7_OFF
   644        };
   645
   646        /*! Port 11 Resistor Enable Register */
   647        config GpioBits8PxRen_t P11REN = {
   648            Bit0        : BIT0_OFF,
   649            Bit1        : BIT1_OFF,
   650            Bit2        : BIT2_OFF,
   651            Bit3        : BIT3_OFF,
   652            Bit4        : BIT4_OFF,
   653            Bit5        : BIT5_OFF,
   654            Bit6        : BIT6_OFF,
   655            Bit7        : BIT7_OFF
   656        };
   657    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR59xx_FR58xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS_A as CS_A;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR59xx_FR58xx ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR59xx_FR58xx inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS_A
    44         *  instances.
    45         */
    46        create(CS_A.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS_A.Instance clock;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430FR57xx device, there are 5 + 2 = 10 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        config DevicePin_t devicePins[5][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[5][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT"  , regForceSet : true  },
    68            { register : "P1SEL0" , regForceSet : false },
    69            { register : "P1SEL1" , regForceSet : false },
    70            { register : "P1DIR"  , regForceSet : true  },
    71            { register : "P1REN"  , regForceSet : false },
    72            { register : "P1IES"  , regForceSet : true  },
    73            { register : "P1IFG"  , regForceSet : true  },
    74            { register : "P1IE"   , regForceSet : false },
    75            { register : "P2OUT"  , regForceSet : true  },
    76            { register : "P2SEL0" , regForceSet : false },
    77            { register : "P2SEL1" , regForceSet : false },
    78            { register : "P2DIR"  , regForceSet : true  },
    79            { register : "P2REN"  , regForceSet : false },
    80            { register : "P2IES"  , regForceSet : true  },
    81            { register : "P2IFG"  , regForceSet : true  },
    82            { register : "P2IE"   , regForceSet : false },
    83            { register : "P3OUT"  , regForceSet : true  },
    84            { register : "P3SEL0" , regForceSet : false },
    85            { register : "P3SEL1" , regForceSet : false },
    86            { register : "P3DIR"  , regForceSet : true  },
    87            { register : "P3REN"  , regForceSet : false },
    88            { register : "P3IES"  , regForceSet : true  },
    89            { register : "P3IFG"  , regForceSet : true  },
    90            { register : "P3IE"   , regForceSet : false },
    91            { register : "P4OUT"  , regForceSet : true  },
    92            { register : "P4SEL0" , regForceSet : false },
    93            { register : "P4SEL1" , regForceSet : false },
    94            { register : "P4DIR"  , regForceSet : true  },
    95            { register : "P4REN"  , regForceSet : false },
    96            { register : "P4IES"  , regForceSet : true  },
    97            { register : "P4IFG"  , regForceSet : true  },
    98            { register : "P4IE"   , regForceSet : false },
    99            { register : "PJOUT"  , regForceSet : true  },
   100            { register : "PJSEL0" , regForceSet : false },
   101            { register : "PJSEL1" , regForceSet : false },
   102            { register : "PJDIR"  , regForceSet : true  },
   103            { register : "PJREN"  , regForceSet : false }
   104        ];
   105
   106        /*
   107         *  GPIO Digital I/O Registers
   108         *
   109         *  One GIPO instance defines the configuration of an entire,
   110         *  8-bit wide digital I/O port.
   111         */
   112
   113        /*! Port 1 Output Register */
   114        config GpioBits8PxOut_t P1OUT = {
   115            Bit0        : BIT0_OFF,
   116            Bit1        : BIT1_OFF,
   117            Bit2        : BIT2_OFF,
   118            Bit3        : BIT3_OFF,
   119            Bit4        : BIT4_OFF,
   120            Bit5        : BIT5_OFF,
   121            Bit6        : BIT6_OFF,
   122            Bit7        : BIT7_OFF
   123        };
   124
   125        /*! Port 1 Port Select Register 0 */
   126        config GpioBits8PxSel_t P1SEL0 = {
   127            Bit0        : BIT0_OFF,
   128            Bit1        : BIT1_OFF,
   129            Bit2        : BIT2_OFF,
   130            Bit3        : BIT3_OFF,
   131            Bit4        : BIT4_OFF,
   132            Bit5        : BIT5_OFF,
   133            Bit6        : BIT6_OFF,
   134            Bit7        : BIT7_OFF
   135        };
   136
   137        /*! Port 1 Port Select Register 1 */
   138        config GpioBits8PxSel_t P1SEL1 = {
   139            Bit0        : BIT0_OFF,
   140            Bit1        : BIT1_OFF,
   141            Bit2        : BIT2_OFF,
   142            Bit3        : BIT3_OFF,
   143            Bit4        : BIT4_OFF,
   144            Bit5        : BIT5_OFF,
   145            Bit6        : BIT6_OFF,
   146            Bit7        : BIT7_OFF
   147        };
   148
   149        /*! Port 1 Direction Register */
   150        config GpioBits8PxDir_t P1DIR = {
   151            Bit0        : BIT0_OFF,
   152            Bit1        : BIT1_OFF,
   153            Bit2        : BIT2_OFF,
   154            Bit3        : BIT3_OFF,
   155            Bit4        : BIT4_OFF,
   156            Bit5        : BIT5_OFF,
   157            Bit6        : BIT6_OFF,
   158            Bit7        : BIT7_OFF
   159        };
   160
   161        /*! Port 1 Resistor Enable Register */
   162        config GpioBits8PxRen_t P1REN = {
   163            Bit0        : BIT0_OFF,
   164            Bit1        : BIT1_OFF,
   165            Bit2        : BIT2_OFF,
   166            Bit3        : BIT3_OFF,
   167            Bit4        : BIT4_OFF,
   168            Bit5        : BIT5_OFF,
   169            Bit6        : BIT6_OFF,
   170            Bit7        : BIT7_OFF
   171        };
   172
   173        /*! Port 2 Output Register */
   174        config GpioBits8PxOut_t P2OUT = {
   175            Bit0        : BIT0_OFF,
   176            Bit1        : BIT1_OFF,
   177            Bit2        : BIT2_OFF,
   178            Bit3        : BIT3_OFF,
   179            Bit4        : BIT4_OFF,
   180            Bit5        : BIT5_OFF,
   181            Bit6        : BIT6_OFF,
   182            Bit7        : BIT7_OFF
   183        };
   184
   185        /*! Port 2 Port Select Register 0 */
   186        config GpioBits8PxSel_t P2SEL0 = {
   187            Bit0        : BIT0_OFF,
   188            Bit1        : BIT1_OFF,
   189            Bit2        : BIT2_OFF,
   190            Bit3        : BIT3_OFF,
   191            Bit4        : BIT4_OFF,
   192            Bit5        : BIT5_OFF,
   193            Bit6        : BIT6_OFF,
   194            Bit7        : BIT7_OFF
   195        };
   196
   197        /*! Port 2 Port Select Register 1 */
   198        config GpioBits8PxSel_t P2SEL1 = {
   199            Bit0        : BIT0_OFF,
   200            Bit1        : BIT1_OFF,
   201            Bit2        : BIT2_OFF,
   202            Bit3        : BIT3_OFF,
   203            Bit4        : BIT4_OFF,
   204            Bit5        : BIT5_OFF,
   205            Bit6        : BIT6_OFF,
   206            Bit7        : BIT7_OFF
   207        };
   208
   209        /*! Port 2 Direction Register */
   210        config GpioBits8PxDir_t P2DIR = {
   211            Bit0        : BIT0_OFF,
   212            Bit1        : BIT1_OFF,
   213            Bit2        : BIT2_OFF,
   214            Bit3        : BIT3_OFF,
   215            Bit4        : BIT4_OFF,
   216            Bit5        : BIT5_OFF,
   217            Bit6        : BIT6_OFF,
   218            Bit7        : BIT7_OFF
   219        };
   220
   221        /*! Port 2 Resistor Enable Register */
   222        config GpioBits8PxRen_t P2REN = {
   223            Bit0        : BIT0_OFF,
   224            Bit1        : BIT1_OFF,
   225            Bit2        : BIT2_OFF,
   226            Bit3        : BIT3_OFF,
   227            Bit4        : BIT4_OFF,
   228            Bit5        : BIT5_OFF,
   229            Bit6        : BIT6_OFF,
   230            Bit7        : BIT7_OFF
   231        };
   232
   233        /*! Port 3 Output Register */
   234        config GpioBits8PxOut_t P3OUT = {
   235            Bit0        : BIT0_OFF,
   236            Bit1        : BIT1_OFF,
   237            Bit2        : BIT2_OFF,
   238            Bit3        : BIT3_OFF,
   239            Bit4        : BIT4_OFF,
   240            Bit5        : BIT5_OFF,
   241            Bit6        : BIT6_OFF,
   242            Bit7        : BIT7_OFF
   243        };
   244
   245        /*! Port 3 Port Select Register 0 */
   246        config GpioBits8PxSel_t P3SEL0 = {
   247            Bit0        : BIT0_OFF,
   248            Bit1        : BIT1_OFF,
   249            Bit2        : BIT2_OFF,
   250            Bit3        : BIT3_OFF,
   251            Bit4        : BIT4_OFF,
   252            Bit5        : BIT5_OFF,
   253            Bit6        : BIT6_OFF,
   254            Bit7        : BIT7_OFF
   255        };
   256
   257        /*! Port 3 Port Select Register 1 */
   258        config GpioBits8PxSel_t P3SEL1 = {
   259            Bit0        : BIT0_OFF,
   260            Bit1        : BIT1_OFF,
   261            Bit2        : BIT2_OFF,
   262            Bit3        : BIT3_OFF,
   263            Bit4        : BIT4_OFF,
   264            Bit5        : BIT5_OFF,
   265            Bit6        : BIT6_OFF,
   266            Bit7        : BIT7_OFF
   267        };
   268
   269        /*! Port 3 Direction Register */
   270        config GpioBits8PxDir_t P3DIR = {
   271            Bit0        : BIT0_OFF,
   272            Bit1        : BIT1_OFF,
   273            Bit2        : BIT2_OFF,
   274            Bit3        : BIT3_OFF,
   275            Bit4        : BIT4_OFF,
   276            Bit5        : BIT5_OFF,
   277            Bit6        : BIT6_OFF,
   278            Bit7        : BIT7_OFF
   279        };
   280
   281        /*! Port 3 Resistor Enable Register */
   282        config GpioBits8PxRen_t P3REN = {
   283            Bit0        : BIT0_OFF,
   284            Bit1        : BIT1_OFF,
   285            Bit2        : BIT2_OFF,
   286            Bit3        : BIT3_OFF,
   287            Bit4        : BIT4_OFF,
   288            Bit5        : BIT5_OFF,
   289            Bit6        : BIT6_OFF,
   290            Bit7        : BIT7_OFF
   291        };
   292
   293        /*! Port 4 Output Register */
   294        config GpioBits8PxOut_t P4OUT = {
   295            Bit0        : BIT0_OFF,
   296            Bit1        : BIT1_OFF,
   297            Bit2        : BIT2_OFF,
   298            Bit3        : BIT3_OFF,
   299            Bit4        : BIT4_OFF,
   300            Bit5        : BIT5_OFF,
   301            Bit6        : BIT6_OFF,
   302            Bit7        : BIT7_OFF
   303        };
   304
   305        /*! Port 4 Port Select Register 0 */
   306        config GpioBits8PxSel_t P4SEL0 = {
   307            Bit0        : BIT0_OFF,
   308            Bit1        : BIT1_OFF,
   309            Bit2        : BIT2_OFF,
   310            Bit3        : BIT3_OFF,
   311            Bit4        : BIT4_OFF,
   312            Bit5        : BIT5_OFF,
   313            Bit6        : BIT6_OFF,
   314            Bit7        : BIT7_OFF
   315        };
   316
   317        /*! Port 4 Port Select Register 1 */
   318        config GpioBits8PxSel_t P4SEL1 = {
   319            Bit0        : BIT0_OFF,
   320            Bit1        : BIT1_OFF,
   321            Bit2        : BIT2_OFF,
   322            Bit3        : BIT3_OFF,
   323            Bit4        : BIT4_OFF,
   324            Bit5        : BIT5_OFF,
   325            Bit6        : BIT6_OFF,
   326            Bit7        : BIT7_OFF
   327        };
   328
   329        /*! Port 4 Direction Register */
   330        config GpioBits8PxDir_t P4DIR = {
   331            Bit0        : BIT0_OFF,
   332            Bit1        : BIT1_OFF,
   333            Bit2        : BIT2_OFF,
   334            Bit3        : BIT3_OFF,
   335            Bit4        : BIT4_OFF,
   336            Bit5        : BIT5_OFF,
   337            Bit6        : BIT6_OFF,
   338            Bit7        : BIT7_OFF
   339        };
   340
   341        /*! Port 4 Resistor Enable Register */
   342        config GpioBits8PxRen_t P4REN = {
   343            Bit0        : BIT0_OFF,
   344            Bit1        : BIT1_OFF,
   345            Bit2        : BIT2_OFF,
   346            Bit3        : BIT3_OFF,
   347            Bit4        : BIT4_OFF,
   348            Bit5        : BIT5_OFF,
   349            Bit6        : BIT6_OFF,
   350            Bit7        : BIT7_OFF
   351        };
   352
   353        /*! Port J Output Register */
   354        config GpioBits8PxOut_t PJOUT = {
   355            Bit0        : BIT0_OFF,
   356            Bit1        : BIT1_OFF,
   357            Bit2        : BIT2_OFF,
   358            Bit3        : BIT3_OFF,
   359            Bit4        : BIT4_OFF,
   360            Bit5        : BIT5_OFF,
   361            Bit6        : BIT6_OFF,
   362            Bit7        : BIT7_OFF
   363        };
   364
   365        /*! Port J Port Select Register 0 */
   366        config GpioBits8PxSel_t PJSEL0 = {
   367            Bit0        : BIT0_OFF,
   368            Bit1        : BIT1_OFF,
   369            Bit2        : BIT2_OFF,
   370            Bit3        : BIT3_OFF,
   371            Bit4        : BIT4_OFF,
   372            Bit5        : BIT5_OFF,
   373            Bit6        : BIT6_OFF,
   374            Bit7        : BIT7_OFF
   375        };
   376
   377        /*! Port J Port Select Register 1 */
   378        config GpioBits8PxSel_t PJSEL1 = {
   379            Bit0        : BIT0_OFF,
   380            Bit1        : BIT1_OFF,
   381            Bit2        : BIT2_OFF,
   382            Bit3        : BIT3_OFF,
   383            Bit4        : BIT4_OFF,
   384            Bit5        : BIT5_OFF,
   385            Bit6        : BIT6_OFF,
   386            Bit7        : BIT7_OFF
   387        };
   388
   389        /*! Port J Direction Register */
   390        config GpioBits8PxDir_t PJDIR = {
   391            Bit0        : BIT0_OFF,
   392            Bit1        : BIT1_OFF,
   393            Bit2        : BIT2_OFF,
   394            Bit3        : BIT3_OFF,
   395            Bit4        : BIT4_OFF,
   396            Bit5        : BIT5_OFF,
   397            Bit6        : BIT6_OFF,
   398            Bit7        : BIT7_OFF
   399        };
   400
   401        /*! Port J Resistor Enable Register */
   402        config GpioBits8PxRen_t PJREN = {
   403            Bit0        : BIT0_OFF,
   404            Bit1        : BIT1_OFF,
   405            Bit2        : BIT2_OFF,
   406            Bit3        : BIT3_OFF,
   407            Bit4        : BIT4_OFF,
   408            Bit5        : BIT5_OFF,
   409            Bit6        : BIT6_OFF,
   410            Bit7        : BIT7_OFF
   411        };
   412    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5736_32_26_22

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for P430FR5736_32_26_22 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5736_32_26_22 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430FR57xx device, there are 3 + 2 = 10 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        config DevicePin_t devicePins[3][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT"  , regForceSet : true  },
    68            { register : "P1SEL0" , regForceSet : false },
    69            { register : "P1SEL1" , regForceSet : false },
    70            { register : "P1DIR"  , regForceSet : true  },
    71            { register : "P1REN"  , regForceSet : false },
    72            { register : "P1IES"  , regForceSet : true  },
    73            { register : "P1IFG"  , regForceSet : true  },
    74            { register : "P1IE"   , regForceSet : false },
    75            { register : "P2OUT"  , regForceSet : true  },
    76            { register : "P2SEL0" , regForceSet : false },
    77            { register : "P2SEL1" , regForceSet : false },
    78            { register : "P2DIR"  , regForceSet : true  },
    79            { register : "P2REN"  , regForceSet : false },
    80            { register : "P2IES"  , regForceSet : true  },
    81            { register : "P2IFG"  , regForceSet : true  },
    82            { register : "P2IE"   , regForceSet : false },
    83            { register : "PJOUT"  , regForceSet : true  },
    84            { register : "PJSEL0" , regForceSet : false },
    85            { register : "PJSEL1" , regForceSet : false },
    86            { register : "PJDIR"  , regForceSet : true  },
    87            { register : "PJREN"  , regForceSet : false }
    88        ];
    89
    90        /*
    91         *  GPIO Digital I/O Registers
    92         *
    93         *  One GIPO instance defines the configuration of an entire,
    94         *  8-bit wide digital I/O port.
    95         */
    96
    97        /*! Port 1 Output Register */
    98        config GpioBits8PxOut_t P1OUT = {
    99            Bit0        : BIT0_OFF,
   100            Bit1        : BIT1_OFF,
   101            Bit2        : BIT2_OFF,
   102            Bit3        : BIT3_OFF,
   103            Bit4        : BIT4_OFF,
   104            Bit5        : BIT5_OFF,
   105            Bit6        : BIT6_OFF,
   106            Bit7        : BIT7_OFF
   107        };
   108
   109        /*! Port 1 Port Select Register 0 */
   110        config GpioBits8PxSel_t P1SEL0 = {
   111            Bit0        : BIT0_OFF,
   112            Bit1        : BIT1_OFF,
   113            Bit2        : BIT2_OFF,
   114            Bit3        : BIT3_OFF,
   115            Bit4        : BIT4_OFF,
   116            Bit5        : BIT5_OFF,
   117            Bit6        : BIT6_OFF,
   118            Bit7        : BIT7_OFF
   119        };
   120
   121        /*! Port 1 Port Select Register 1 */
   122        config GpioBits8PxSel_t P1SEL1 = {
   123            Bit0        : BIT0_OFF,
   124            Bit1        : BIT1_OFF,
   125            Bit2        : BIT2_OFF,
   126            Bit3        : BIT3_OFF,
   127            Bit4        : BIT4_OFF,
   128            Bit5        : BIT5_OFF,
   129            Bit6        : BIT6_OFF,
   130            Bit7        : BIT7_OFF
   131        };
   132
   133        /*! Port 1 Direction Register */
   134        config GpioBits8PxDir_t P1DIR = {
   135            Bit0        : BIT0_OFF,
   136            Bit1        : BIT1_OFF,
   137            Bit2        : BIT2_OFF,
   138            Bit3        : BIT3_OFF,
   139            Bit4        : BIT4_OFF,
   140            Bit5        : BIT5_OFF,
   141            Bit6        : BIT6_OFF,
   142            Bit7        : BIT7_OFF
   143        };
   144
   145        /*! Port 1 Resistor Enable Register */
   146        config GpioBits8PxRen_t P1REN = {
   147            Bit0        : BIT0_OFF,
   148            Bit1        : BIT1_OFF,
   149            Bit2        : BIT2_OFF,
   150            Bit3        : BIT3_OFF,
   151            Bit4        : BIT4_OFF,
   152            Bit5        : BIT5_OFF,
   153            Bit6        : BIT6_OFF,
   154            Bit7        : BIT7_OFF
   155        };
   156
   157        /*! Port 2 Output Register */
   158        config GpioBits8PxOut_t P2OUT = {
   159            Bit0        : BIT0_OFF,
   160            Bit1        : BIT1_OFF,
   161            Bit2        : BIT2_OFF,
   162            Bit3        : BIT3_OFF,
   163            Bit4        : BIT4_OFF,
   164            Bit5        : BIT5_OFF,
   165            Bit6        : BIT6_OFF,
   166            Bit7        : BIT7_OFF
   167        };
   168
   169        /*! Port 2 Port Select Register 0 */
   170        config GpioBits8PxSel_t P2SEL0 = {
   171            Bit0        : BIT0_OFF,
   172            Bit1        : BIT1_OFF,
   173            Bit2        : BIT2_OFF,
   174            Bit3        : BIT3_OFF,
   175            Bit4        : BIT4_OFF,
   176            Bit5        : BIT5_OFF,
   177            Bit6        : BIT6_OFF,
   178            Bit7        : BIT7_OFF
   179        };
   180
   181        /*! Port 2 Port Select Register 1 */
   182        config GpioBits8PxSel_t P2SEL1 = {
   183            Bit0        : BIT0_OFF,
   184            Bit1        : BIT1_OFF,
   185            Bit2        : BIT2_OFF,
   186            Bit3        : BIT3_OFF,
   187            Bit4        : BIT4_OFF,
   188            Bit5        : BIT5_OFF,
   189            Bit6        : BIT6_OFF,
   190            Bit7        : BIT7_OFF
   191        };
   192
   193        /*! Port 2 Direction Register */
   194        config GpioBits8PxDir_t P2DIR = {
   195            Bit0        : BIT0_OFF,
   196            Bit1        : BIT1_OFF,
   197            Bit2        : BIT2_OFF,
   198            Bit3        : BIT3_OFF,
   199            Bit4        : BIT4_OFF,
   200            Bit5        : BIT5_OFF,
   201            Bit6        : BIT6_OFF,
   202            Bit7        : BIT7_OFF
   203        };
   204
   205        /*! Port 2 Resistor Enable Register */
   206        config GpioBits8PxRen_t P2REN = {
   207            Bit0        : BIT0_OFF,
   208            Bit1        : BIT1_OFF,
   209            Bit2        : BIT2_OFF,
   210            Bit3        : BIT3_OFF,
   211            Bit4        : BIT4_OFF,
   212            Bit5        : BIT5_OFF,
   213            Bit6        : BIT6_OFF,
   214            Bit7        : BIT7_OFF
   215        };
   216
   217        /*! Port J Output Register */
   218        config GpioBits8PxOut_t PJOUT = {
   219            Bit0        : BIT0_OFF,
   220            Bit1        : BIT1_OFF,
   221            Bit2        : BIT2_OFF,
   222            Bit3        : BIT3_OFF,
   223            Bit4        : BIT4_OFF,
   224            Bit5        : BIT5_OFF,
   225            Bit6        : BIT6_OFF,
   226            Bit7        : BIT7_OFF
   227        };
   228
   229        /*! Port J Port Select Register 0 */
   230        config GpioBits8PxSel_t PJSEL0 = {
   231            Bit0        : BIT0_OFF,
   232            Bit1        : BIT1_OFF,
   233            Bit2        : BIT2_OFF,
   234            Bit3        : BIT3_OFF,
   235            Bit4        : BIT4_OFF,
   236            Bit5        : BIT5_OFF,
   237            Bit6        : BIT6_OFF,
   238            Bit7        : BIT7_OFF
   239        };
   240
   241        /*! Port J Port Select Register 1 */
   242        config GpioBits8PxSel_t PJSEL1 = {
   243            Bit0        : BIT0_OFF,
   244            Bit1        : BIT1_OFF,
   245            Bit2        : BIT2_OFF,
   246            Bit3        : BIT3_OFF,
   247            Bit4        : BIT4_OFF,
   248            Bit5        : BIT5_OFF,
   249            Bit6        : BIT6_OFF,
   250            Bit7        : BIT7_OFF
   251        };
   252
   253        /*! Port J Direction Register */
   254        config GpioBits8PxDir_t PJDIR = {
   255            Bit0        : BIT0_OFF,
   256            Bit1        : BIT1_OFF,
   257            Bit2        : BIT2_OFF,
   258            Bit3        : BIT3_OFF,
   259            Bit4        : BIT4_OFF,
   260            Bit5        : BIT5_OFF,
   261            Bit6        : BIT6_OFF,
   262            Bit7        : BIT7_OFF
   263        };
   264
   265        /*! Port J Resistor Enable Register */
   266        config GpioBits8PxRen_t PJREN = {
   267            Bit0        : BIT0_OFF,
   268            Bit1        : BIT1_OFF,
   269            Bit2        : BIT2_OFF,
   270            Bit3        : BIT3_OFF,
   271            Bit4        : BIT4_OFF,
   272            Bit5        : BIT5_OFF,
   273            Bit6        : BIT6_OFF,
   274            Bit7        : BIT7_OFF
   275        };
   276    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5737_33_27_23

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR5737_33_27_23 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5737_33_27_23 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430FR57xx device, there are 5 + 2 = 10 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        config DevicePin_t devicePins[5][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[5][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT"  , regForceSet : true  },
    68            { register : "P1SEL0" , regForceSet : false },
    69            { register : "P1SEL1" , regForceSet : false },
    70            { register : "P1DIR"  , regForceSet : true  },
    71            { register : "P1REN"  , regForceSet : false },
    72            { register : "P1IES"  , regForceSet : true  },
    73            { register : "P1IFG"  , regForceSet : true  },
    74            { register : "P1IE"   , regForceSet : false },
    75            { register : "P2OUT"  , regForceSet : true  },
    76            { register : "P2SEL0" , regForceSet : false },
    77            { register : "P2SEL1" , regForceSet : false },
    78            { register : "P2DIR"  , regForceSet : true  },
    79            { register : "P2REN"  , regForceSet : false },
    80            { register : "P2IES"  , regForceSet : true  },
    81            { register : "P2IFG"  , regForceSet : true  },
    82            { register : "P2IE"   , regForceSet : false },
    83            { register : "P3OUT"  , regForceSet : true  },
    84            { register : "P3SEL0" , regForceSet : false },
    85            { register : "P3SEL1" , regForceSet : false },
    86            { register : "P3DIR"  , regForceSet : true  },
    87            { register : "P3REN"  , regForceSet : false },
    88            { register : "P3IES"  , regForceSet : true  },
    89            { register : "P3IFG"  , regForceSet : true  },
    90            { register : "P3IE"   , regForceSet : false },
    91            { register : "P4OUT"  , regForceSet : true  },
    92            { register : "P4SEL0" , regForceSet : false },
    93            { register : "P4SEL1" , regForceSet : false },
    94            { register : "P4DIR"  , regForceSet : true  },
    95            { register : "P4REN"  , regForceSet : false },
    96            { register : "P4IES"  , regForceSet : true  },
    97            { register : "P4IFG"  , regForceSet : true  },
    98            { register : "P4IE"   , regForceSet : false },
    99            { register : "PJOUT"  , regForceSet : true  },
   100            { register : "PJSEL0" , regForceSet : false },
   101            { register : "PJSEL1" , regForceSet : false },
   102            { register : "PJDIR"  , regForceSet : true  },
   103            { register : "PJREN"  , regForceSet : false }
   104        ];
   105
   106        /*
   107         *  GPIO Digital I/O Registers
   108         *
   109         *  One GIPO instance defines the configuration of an entire,
   110         *  8-bit wide digital I/O port.
   111         */
   112
   113        /*! Port 1 Output Register */
   114        config GpioBits8PxOut_t P1OUT = {
   115            Bit0        : BIT0_OFF,
   116            Bit1        : BIT1_OFF,
   117            Bit2        : BIT2_OFF,
   118            Bit3        : BIT3_OFF,
   119            Bit4        : BIT4_OFF,
   120            Bit5        : BIT5_OFF,
   121            Bit6        : BIT6_OFF,
   122            Bit7        : BIT7_OFF
   123        };
   124
   125        /*! Port 1 Port Select Register 0 */
   126        config GpioBits8PxSel_t P1SEL0 = {
   127            Bit0        : BIT0_OFF,
   128            Bit1        : BIT1_OFF,
   129            Bit2        : BIT2_OFF,
   130            Bit3        : BIT3_OFF,
   131            Bit4        : BIT4_OFF,
   132            Bit5        : BIT5_OFF,
   133            Bit6        : BIT6_OFF,
   134            Bit7        : BIT7_OFF
   135        };
   136
   137        /*! Port 1 Port Select Register 1 */
   138        config GpioBits8PxSel_t P1SEL1 = {
   139            Bit0        : BIT0_OFF,
   140            Bit1        : BIT1_OFF,
   141            Bit2        : BIT2_OFF,
   142            Bit3        : BIT3_OFF,
   143            Bit4        : BIT4_OFF,
   144            Bit5        : BIT5_OFF,
   145            Bit6        : BIT6_OFF,
   146            Bit7        : BIT7_OFF
   147        };
   148
   149        /*! Port 1 Direction Register */
   150        config GpioBits8PxDir_t P1DIR = {
   151            Bit0        : BIT0_OFF,
   152            Bit1        : BIT1_OFF,
   153            Bit2        : BIT2_OFF,
   154            Bit3        : BIT3_OFF,
   155            Bit4        : BIT4_OFF,
   156            Bit5        : BIT5_OFF,
   157            Bit6        : BIT6_OFF,
   158            Bit7        : BIT7_OFF
   159        };
   160
   161        /*! Port 1 Resistor Enable Register */
   162        config GpioBits8PxRen_t P1REN = {
   163            Bit0        : BIT0_OFF,
   164            Bit1        : BIT1_OFF,
   165            Bit2        : BIT2_OFF,
   166            Bit3        : BIT3_OFF,
   167            Bit4        : BIT4_OFF,
   168            Bit5        : BIT5_OFF,
   169            Bit6        : BIT6_OFF,
   170            Bit7        : BIT7_OFF
   171        };
   172
   173        /*! Port 2 Output Register */
   174        config GpioBits8PxOut_t P2OUT = {
   175            Bit0        : BIT0_OFF,
   176            Bit1        : BIT1_OFF,
   177            Bit2        : BIT2_OFF,
   178            Bit3        : BIT3_OFF,
   179            Bit4        : BIT4_OFF,
   180            Bit5        : BIT5_OFF,
   181            Bit6        : BIT6_OFF,
   182            Bit7        : BIT7_OFF
   183        };
   184
   185        /*! Port 2 Port Select Register 0 */
   186        config GpioBits8PxSel_t P2SEL0 = {
   187            Bit0        : BIT0_OFF,
   188            Bit1        : BIT1_OFF,
   189            Bit2        : BIT2_OFF,
   190            Bit3        : BIT3_OFF,
   191            Bit4        : BIT4_OFF,
   192            Bit5        : BIT5_OFF,
   193            Bit6        : BIT6_OFF,
   194            Bit7        : BIT7_OFF
   195        };
   196
   197        /*! Port 2 Port Select Register 1 */
   198        config GpioBits8PxSel_t P2SEL1 = {
   199            Bit0        : BIT0_OFF,
   200            Bit1        : BIT1_OFF,
   201            Bit2        : BIT2_OFF,
   202            Bit3        : BIT3_OFF,
   203            Bit4        : BIT4_OFF,
   204            Bit5        : BIT5_OFF,
   205            Bit6        : BIT6_OFF,
   206            Bit7        : BIT7_OFF
   207        };
   208
   209        /*! Port 2 Direction Register */
   210        config GpioBits8PxDir_t P2DIR = {
   211            Bit0        : BIT0_OFF,
   212            Bit1        : BIT1_OFF,
   213            Bit2        : BIT2_OFF,
   214            Bit3        : BIT3_OFF,
   215            Bit4        : BIT4_OFF,
   216            Bit5        : BIT5_OFF,
   217            Bit6        : BIT6_OFF,
   218            Bit7        : BIT7_OFF
   219        };
   220
   221        /*! Port 2 Resistor Enable Register */
   222        config GpioBits8PxRen_t P2REN = {
   223            Bit0        : BIT0_OFF,
   224            Bit1        : BIT1_OFF,
   225            Bit2        : BIT2_OFF,
   226            Bit3        : BIT3_OFF,
   227            Bit4        : BIT4_OFF,
   228            Bit5        : BIT5_OFF,
   229            Bit6        : BIT6_OFF,
   230            Bit7        : BIT7_OFF
   231        };
   232
   233        /*! Port 3 Output Register */
   234        config GpioBits8PxOut_t P3OUT = {
   235            Bit0        : BIT0_OFF,
   236            Bit1        : BIT1_OFF,
   237            Bit2        : BIT2_OFF,
   238            Bit3        : BIT3_OFF,
   239            Bit4        : BIT4_OFF,
   240            Bit5        : BIT5_OFF,
   241            Bit6        : BIT6_OFF,
   242            Bit7        : BIT7_OFF
   243        };
   244
   245        /*! Port 3 Port Select Register 0 */
   246        config GpioBits8PxSel_t P3SEL0 = {
   247            Bit0        : BIT0_OFF,
   248            Bit1        : BIT1_OFF,
   249            Bit2        : BIT2_OFF,
   250            Bit3        : BIT3_OFF,
   251            Bit4        : BIT4_OFF,
   252            Bit5        : BIT5_OFF,
   253            Bit6        : BIT6_OFF,
   254            Bit7        : BIT7_OFF
   255        };
   256
   257        /*! Port 3 Port Select Register 1 */
   258        config GpioBits8PxSel_t P3SEL1 = {
   259            Bit0        : BIT0_OFF,
   260            Bit1        : BIT1_OFF,
   261            Bit2        : BIT2_OFF,
   262            Bit3        : BIT3_OFF,
   263            Bit4        : BIT4_OFF,
   264            Bit5        : BIT5_OFF,
   265            Bit6        : BIT6_OFF,
   266            Bit7        : BIT7_OFF
   267        };
   268
   269        /*! Port 3 Direction Register */
   270        config GpioBits8PxDir_t P3DIR = {
   271            Bit0        : BIT0_OFF,
   272            Bit1        : BIT1_OFF,
   273            Bit2        : BIT2_OFF,
   274            Bit3        : BIT3_OFF,
   275            Bit4        : BIT4_OFF,
   276            Bit5        : BIT5_OFF,
   277            Bit6        : BIT6_OFF,
   278            Bit7        : BIT7_OFF
   279        };
   280
   281        /*! Port 3 Resistor Enable Register */
   282        config GpioBits8PxRen_t P3REN = {
   283            Bit0        : BIT0_OFF,
   284            Bit1        : BIT1_OFF,
   285            Bit2        : BIT2_OFF,
   286            Bit3        : BIT3_OFF,
   287            Bit4        : BIT4_OFF,
   288            Bit5        : BIT5_OFF,
   289            Bit6        : BIT6_OFF,
   290            Bit7        : BIT7_OFF
   291        };
   292
   293        /*! Port 4 Output Register */
   294        config GpioBits8PxOut_t P4OUT = {
   295            Bit0        : BIT0_OFF,
   296            Bit1        : BIT1_OFF,
   297            Bit2        : BIT2_OFF,
   298            Bit3        : BIT3_OFF,
   299            Bit4        : BIT4_OFF,
   300            Bit5        : BIT5_OFF,
   301            Bit6        : BIT6_OFF,
   302            Bit7        : BIT7_OFF
   303        };
   304
   305        /*! Port 4 Port Select Register 0 */
   306        config GpioBits8PxSel_t P4SEL0 = {
   307            Bit0        : BIT0_OFF,
   308            Bit1        : BIT1_OFF,
   309            Bit2        : BIT2_OFF,
   310            Bit3        : BIT3_OFF,
   311            Bit4        : BIT4_OFF,
   312            Bit5        : BIT5_OFF,
   313            Bit6        : BIT6_OFF,
   314            Bit7        : BIT7_OFF
   315        };
   316
   317        /*! Port 4 Port Select Register 1 */
   318        config GpioBits8PxSel_t P4SEL1 = {
   319            Bit0        : BIT0_OFF,
   320            Bit1        : BIT1_OFF,
   321            Bit2        : BIT2_OFF,
   322            Bit3        : BIT3_OFF,
   323            Bit4        : BIT4_OFF,
   324            Bit5        : BIT5_OFF,
   325            Bit6        : BIT6_OFF,
   326            Bit7        : BIT7_OFF
   327        };
   328
   329        /*! Port 4 Direction Register */
   330        config GpioBits8PxDir_t P4DIR = {
   331            Bit0        : BIT0_OFF,
   332            Bit1        : BIT1_OFF,
   333            Bit2        : BIT2_OFF,
   334            Bit3        : BIT3_OFF,
   335            Bit4        : BIT4_OFF,
   336            Bit5        : BIT5_OFF,
   337            Bit6        : BIT6_OFF,
   338            Bit7        : BIT7_OFF
   339        };
   340
   341        /*! Port 4 Resistor Enable Register */
   342        config GpioBits8PxRen_t P4REN = {
   343            Bit0        : BIT0_OFF,
   344            Bit1        : BIT1_OFF,
   345            Bit2        : BIT2_OFF,
   346            Bit3        : BIT3_OFF,
   347            Bit4        : BIT4_OFF,
   348            Bit5        : BIT5_OFF,
   349            Bit6        : BIT6_OFF,
   350            Bit7        : BIT7_OFF
   351        };
   352
   353        /*! Port J Output Register */
   354        config GpioBits8PxOut_t PJOUT = {
   355            Bit0        : BIT0_OFF,
   356            Bit1        : BIT1_OFF,
   357            Bit2        : BIT2_OFF,
   358            Bit3        : BIT3_OFF,
   359            Bit4        : BIT4_OFF,
   360            Bit5        : BIT5_OFF,
   361            Bit6        : BIT6_OFF,
   362            Bit7        : BIT7_OFF
   363        };
   364
   365        /*! Port J Port Select Register 0 */
   366        config GpioBits8PxSel_t PJSEL0 = {
   367            Bit0        : BIT0_OFF,
   368            Bit1        : BIT1_OFF,
   369            Bit2        : BIT2_OFF,
   370            Bit3        : BIT3_OFF,
   371            Bit4        : BIT4_OFF,
   372            Bit5        : BIT5_OFF,
   373            Bit6        : BIT6_OFF,
   374            Bit7        : BIT7_OFF
   375        };
   376
   377        /*! Port J Port Select Register 1 */
   378        config GpioBits8PxSel_t PJSEL1 = {
   379            Bit0        : BIT0_OFF,
   380            Bit1        : BIT1_OFF,
   381            Bit2        : BIT2_OFF,
   382            Bit3        : BIT3_OFF,
   383            Bit4        : BIT4_OFF,
   384            Bit5        : BIT5_OFF,
   385            Bit6        : BIT6_OFF,
   386            Bit7        : BIT7_OFF
   387        };
   388
   389        /*! Port J Direction Register */
   390        config GpioBits8PxDir_t PJDIR = {
   391            Bit0        : BIT0_OFF,
   392            Bit1        : BIT1_OFF,
   393            Bit2        : BIT2_OFF,
   394            Bit3        : BIT3_OFF,
   395            Bit4        : BIT4_OFF,
   396            Bit5        : BIT5_OFF,
   397            Bit6        : BIT6_OFF,
   398            Bit7        : BIT7_OFF
   399        };
   400
   401        /*! Port J Resistor Enable Register */
   402        config GpioBits8PxRen_t PJREN = {
   403            Bit0        : BIT0_OFF,
   404            Bit1        : BIT1_OFF,
   405            Bit2        : BIT2_OFF,
   406            Bit3        : BIT3_OFF,
   407            Bit4        : BIT4_OFF,
   408            Bit5        : BIT5_OFF,
   409            Bit6        : BIT6_OFF,
   410            Bit7        : BIT7_OFF
   411        };
   412    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5738_34_30_28_24_20

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR5738_34_30_28_24_20 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5738_34_30_28_24_20 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430FR57xx device, there are 3 + 2 = 10 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        config DevicePin_t devicePins[3][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT"  , regForceSet : true  },
    68            { register : "P1SEL0" , regForceSet : false },
    69            { register : "P1SEL1" , regForceSet : false },
    70            { register : "P1DIR"  , regForceSet : true  },
    71            { register : "P1REN"  , regForceSet : false },
    72            { register : "P1IES"  , regForceSet : true  },
    73            { register : "P1IFG"  , regForceSet : true  },
    74            { register : "P1IE"   , regForceSet : false },
    75            { register : "P2OUT"  , regForceSet : true  },
    76            { register : "P2SEL0" , regForceSet : false },
    77            { register : "P2SEL1" , regForceSet : false },
    78            { register : "P2DIR"  , regForceSet : true  },
    79            { register : "P2REN"  , regForceSet : false },
    80            { register : "P2IES"  , regForceSet : true  },
    81            { register : "P2IFG"  , regForceSet : true  },
    82            { register : "P2IE"   , regForceSet : false },
    83            { register : "PJOUT"  , regForceSet : true  },
    84            { register : "PJSEL0" , regForceSet : false },
    85            { register : "PJSEL1" , regForceSet : false },
    86            { register : "PJDIR"  , regForceSet : true  },
    87            { register : "PJREN"  , regForceSet : false }
    88        ];
    89
    90        /*
    91         *  GPIO Digital I/O Registers
    92         *
    93         *  One GIPO instance defines the configuration of an entire,
    94         *  8-bit wide digital I/O port.
    95         */
    96
    97        /*! Port 1 Output Register */
    98        config GpioBits8PxOut_t P1OUT = {
    99            Bit0        : BIT0_OFF,
   100            Bit1        : BIT1_OFF,
   101            Bit2        : BIT2_OFF,
   102            Bit3        : BIT3_OFF,
   103            Bit4        : BIT4_OFF,
   104            Bit5        : BIT5_OFF,
   105            Bit6        : BIT6_OFF,
   106            Bit7        : BIT7_OFF
   107        };
   108
   109        /*! Port 1 Port Select Register 0 */
   110        config GpioBits8PxSel_t P1SEL0 = {
   111            Bit0        : BIT0_OFF,
   112            Bit1        : BIT1_OFF,
   113            Bit2        : BIT2_OFF,
   114            Bit3        : BIT3_OFF,
   115            Bit4        : BIT4_OFF,
   116            Bit5        : BIT5_OFF,
   117            Bit6        : BIT6_OFF,
   118            Bit7        : BIT7_OFF
   119        };
   120
   121        /*! Port 1 Port Select Register 1 */
   122        config GpioBits8PxSel_t P1SEL1 = {
   123            Bit0        : BIT0_OFF,
   124            Bit1        : BIT1_OFF,
   125            Bit2        : BIT2_OFF,
   126            Bit3        : BIT3_OFF,
   127            Bit4        : BIT4_OFF,
   128            Bit5        : BIT5_OFF,
   129            Bit6        : BIT6_OFF,
   130            Bit7        : BIT7_OFF
   131        };
   132
   133        /*! Port 1 Direction Register */
   134        config GpioBits8PxDir_t P1DIR = {
   135            Bit0        : BIT0_OFF,
   136            Bit1        : BIT1_OFF,
   137            Bit2        : BIT2_OFF,
   138            Bit3        : BIT3_OFF,
   139            Bit4        : BIT4_OFF,
   140            Bit5        : BIT5_OFF,
   141            Bit6        : BIT6_OFF,
   142            Bit7        : BIT7_OFF
   143        };
   144
   145        /*! Port 1 Resistor Enable Register */
   146        config GpioBits8PxRen_t P1REN = {
   147            Bit0        : BIT0_OFF,
   148            Bit1        : BIT1_OFF,
   149            Bit2        : BIT2_OFF,
   150            Bit3        : BIT3_OFF,
   151            Bit4        : BIT4_OFF,
   152            Bit5        : BIT5_OFF,
   153            Bit6        : BIT6_OFF,
   154            Bit7        : BIT7_OFF
   155        };
   156
   157        /*! Port 2 Output Register */
   158        config GpioBits8PxOut_t P2OUT = {
   159            Bit0        : BIT0_OFF,
   160            Bit1        : BIT1_OFF,
   161            Bit2        : BIT2_OFF,
   162            Bit3        : BIT3_OFF,
   163            Bit4        : BIT4_OFF,
   164            Bit5        : BIT5_OFF,
   165            Bit6        : BIT6_OFF,
   166            Bit7        : BIT7_OFF
   167        };
   168
   169        /*! Port 2 Port Select Register 0 */
   170        config GpioBits8PxSel_t P2SEL0 = {
   171            Bit0        : BIT0_OFF,
   172            Bit1        : BIT1_OFF,
   173            Bit2        : BIT2_OFF,
   174            Bit3        : BIT3_OFF,
   175            Bit4        : BIT4_OFF,
   176            Bit5        : BIT5_OFF,
   177            Bit6        : BIT6_OFF,
   178            Bit7        : BIT7_OFF
   179        };
   180
   181        /*! Port 2 Port Select Register 1 */
   182        config GpioBits8PxSel_t P2SEL1 = {
   183            Bit0        : BIT0_OFF,
   184            Bit1        : BIT1_OFF,
   185            Bit2        : BIT2_OFF,
   186            Bit3        : BIT3_OFF,
   187            Bit4        : BIT4_OFF,
   188            Bit5        : BIT5_OFF,
   189            Bit6        : BIT6_OFF,
   190            Bit7        : BIT7_OFF
   191        };
   192
   193        /*! Port 2 Direction Register */
   194        config GpioBits8PxDir_t P2DIR = {
   195            Bit0        : BIT0_OFF,
   196            Bit1        : BIT1_OFF,
   197            Bit2        : BIT2_OFF,
   198            Bit3        : BIT3_OFF,
   199            Bit4        : BIT4_OFF,
   200            Bit5        : BIT5_OFF,
   201            Bit6        : BIT6_OFF,
   202            Bit7        : BIT7_OFF
   203        };
   204
   205        /*! Port 2 Resistor Enable Register */
   206        config GpioBits8PxRen_t P2REN = {
   207            Bit0        : BIT0_OFF,
   208            Bit1        : BIT1_OFF,
   209            Bit2        : BIT2_OFF,
   210            Bit3        : BIT3_OFF,
   211            Bit4        : BIT4_OFF,
   212            Bit5        : BIT5_OFF,
   213            Bit6        : BIT6_OFF,
   214            Bit7        : BIT7_OFF
   215        };
   216
   217        /*! Port J Output Register */
   218        config GpioBits8PxOut_t PJOUT = {
   219            Bit0        : BIT0_OFF,
   220            Bit1        : BIT1_OFF,
   221            Bit2        : BIT2_OFF,
   222            Bit3        : BIT3_OFF,
   223            Bit4        : BIT4_OFF,
   224            Bit5        : BIT5_OFF,
   225            Bit6        : BIT6_OFF,
   226            Bit7        : BIT7_OFF
   227        };
   228
   229        /*! Port J Port Select Register 0 */
   230        config GpioBits8PxSel_t PJSEL0 = {
   231            Bit0        : BIT0_OFF,
   232            Bit1        : BIT1_OFF,
   233            Bit2        : BIT2_OFF,
   234            Bit3        : BIT3_OFF,
   235            Bit4        : BIT4_OFF,
   236            Bit5        : BIT5_OFF,
   237            Bit6        : BIT6_OFF,
   238            Bit7        : BIT7_OFF
   239        };
   240
   241        /*! Port J Port Select Register 1 */
   242        config GpioBits8PxSel_t PJSEL1 = {
   243            Bit0        : BIT0_OFF,
   244            Bit1        : BIT1_OFF,
   245            Bit2        : BIT2_OFF,
   246            Bit3        : BIT3_OFF,
   247            Bit4        : BIT4_OFF,
   248            Bit5        : BIT5_OFF,
   249            Bit6        : BIT6_OFF,
   250            Bit7        : BIT7_OFF
   251        };
   252
   253        /*! Port J Direction Register */
   254        config GpioBits8PxDir_t PJDIR = {
   255            Bit0        : BIT0_OFF,
   256            Bit1        : BIT1_OFF,
   257            Bit2        : BIT2_OFF,
   258            Bit3        : BIT3_OFF,
   259            Bit4        : BIT4_OFF,
   260            Bit5        : BIT5_OFF,
   261            Bit6        : BIT6_OFF,
   262            Bit7        : BIT7_OFF
   263        };
   264
   265        /*! Port J Resistor Enable Register */
   266        config GpioBits8PxRen_t PJREN = {
   267            Bit0        : BIT0_OFF,
   268            Bit1        : BIT1_OFF,
   269            Bit2        : BIT2_OFF,
   270            Bit3        : BIT3_OFF,
   271            Bit4        : BIT4_OFF,
   272            Bit5        : BIT5_OFF,
   273            Bit6        : BIT6_OFF,
   274            Bit7        : BIT7_OFF
   275        };
   276    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430FR5739_35_31_29_25_21

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR5739_35_31_29_25_21 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5739_35_31_29_25_21 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430FR57xx device, there are 5 + 2 = 10 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        config DevicePin_t devicePins[5][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[5][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT"  , regForceSet : true  },
    68            { register : "P1SEL0" , regForceSet : false },
    69            { register : "P1SEL1" , regForceSet : false },
    70            { register : "P1DIR"  , regForceSet : true  },
    71            { register : "P1REN"  , regForceSet : false },
    72            { register : "P1IES"  , regForceSet : true  },
    73            { register : "P1IFG"  , regForceSet : true  },
    74            { register : "P1IE"   , regForceSet : false },
    75            { register : "P2OUT"  , regForceSet : true  },
    76            { register : "P2SEL0" , regForceSet : false },
    77            { register : "P2SEL1" , regForceSet : false },
    78            { register : "P2DIR"  , regForceSet : true  },
    79            { register : "P2REN"  , regForceSet : false },
    80            { register : "P2IES"  , regForceSet : true  },
    81            { register : "P2IFG"  , regForceSet : true  },
    82            { register : "P2IE"   , regForceSet : false },
    83            { register : "P3OUT"  , regForceSet : true  },
    84            { register : "P3SEL0" , regForceSet : false },
    85            { register : "P3SEL1" , regForceSet : false },
    86            { register : "P3DIR"  , regForceSet : true  },
    87            { register : "P3REN"  , regForceSet : false },
    88            { register : "P3IES"  , regForceSet : true  },
    89            { register : "P3IFG"  , regForceSet : true  },
    90            { register : "P3IE"   , regForceSet : false },
    91            { register : "P4OUT"  , regForceSet : true  },
    92            { register : "P4SEL0" , regForceSet : false },
    93            { register : "P4SEL1" , regForceSet : false },
    94            { register : "P4DIR"  , regForceSet : true  },
    95            { register : "P4REN"  , regForceSet : false },
    96            { register : "P4IES"  , regForceSet : true  },
    97            { register : "P4IFG"  , regForceSet : true  },
    98            { register : "P4IE"   , regForceSet : false },
    99            { register : "PJOUT"  , regForceSet : true  },
   100            { register : "PJSEL0" , regForceSet : false },
   101            { register : "PJSEL1" , regForceSet : false },
   102            { register : "PJDIR"  , regForceSet : true  },
   103            { register : "PJREN"  , regForceSet : false }
   104        ];
   105
   106        /*
   107         *  GPIO Digital I/O Registers
   108         *
   109         *  One GIPO instance defines the configuration of an entire,
   110         *  8-bit wide digital I/O port.
   111         */
   112
   113        /*! Port 1 Output Register */
   114        config GpioBits8PxOut_t P1OUT = {
   115            Bit0        : BIT0_OFF,
   116            Bit1        : BIT1_OFF,
   117            Bit2        : BIT2_OFF,
   118            Bit3        : BIT3_OFF,
   119            Bit4        : BIT4_OFF,
   120            Bit5        : BIT5_OFF,
   121            Bit6        : BIT6_OFF,
   122            Bit7        : BIT7_OFF
   123        };
   124
   125        /*! Port 1 Port Select Register 0 */
   126        config GpioBits8PxSel_t P1SEL0 = {
   127            Bit0        : BIT0_OFF,
   128            Bit1        : BIT1_OFF,
   129            Bit2        : BIT2_OFF,
   130            Bit3        : BIT3_OFF,
   131            Bit4        : BIT4_OFF,
   132            Bit5        : BIT5_OFF,
   133            Bit6        : BIT6_OFF,
   134            Bit7        : BIT7_OFF
   135        };
   136
   137        /*! Port 1 Port Select Register 1 */
   138        config GpioBits8PxSel_t P1SEL1 = {
   139            Bit0        : BIT0_OFF,
   140            Bit1        : BIT1_OFF,
   141            Bit2        : BIT2_OFF,
   142            Bit3        : BIT3_OFF,
   143            Bit4        : BIT4_OFF,
   144            Bit5        : BIT5_OFF,
   145            Bit6        : BIT6_OFF,
   146            Bit7        : BIT7_OFF
   147        };
   148
   149        /*! Port 1 Direction Register */
   150        config GpioBits8PxDir_t P1DIR = {
   151            Bit0        : BIT0_OFF,
   152            Bit1        : BIT1_OFF,
   153            Bit2        : BIT2_OFF,
   154            Bit3        : BIT3_OFF,
   155            Bit4        : BIT4_OFF,
   156            Bit5        : BIT5_OFF,
   157            Bit6        : BIT6_OFF,
   158            Bit7        : BIT7_OFF
   159        };
   160
   161        /*! Port 1 Resistor Enable Register */
   162        config GpioBits8PxRen_t P1REN = {
   163            Bit0        : BIT0_OFF,
   164            Bit1        : BIT1_OFF,
   165            Bit2        : BIT2_OFF,
   166            Bit3        : BIT3_OFF,
   167            Bit4        : BIT4_OFF,
   168            Bit5        : BIT5_OFF,
   169            Bit6        : BIT6_OFF,
   170            Bit7        : BIT7_OFF
   171        };
   172
   173        /*! Port 2 Output Register */
   174        config GpioBits8PxOut_t P2OUT = {
   175            Bit0        : BIT0_OFF,
   176            Bit1        : BIT1_OFF,
   177            Bit2        : BIT2_OFF,
   178            Bit3        : BIT3_OFF,
   179            Bit4        : BIT4_OFF,
   180            Bit5        : BIT5_OFF,
   181            Bit6        : BIT6_OFF,
   182            Bit7        : BIT7_OFF
   183        };
   184
   185        /*! Port 2 Port Select Register 0 */
   186        config GpioBits8PxSel_t P2SEL0 = {
   187            Bit0        : BIT0_OFF,
   188            Bit1        : BIT1_OFF,
   189            Bit2        : BIT2_OFF,
   190            Bit3        : BIT3_OFF,
   191            Bit4        : BIT4_OFF,
   192            Bit5        : BIT5_OFF,
   193            Bit6        : BIT6_OFF,
   194            Bit7        : BIT7_OFF
   195        };
   196
   197        /*! Port 2 Port Select Register 1 */
   198        config GpioBits8PxSel_t P2SEL1 = {
   199            Bit0        : BIT0_OFF,
   200            Bit1        : BIT1_OFF,
   201            Bit2        : BIT2_OFF,
   202            Bit3        : BIT3_OFF,
   203            Bit4        : BIT4_OFF,
   204            Bit5        : BIT5_OFF,
   205            Bit6        : BIT6_OFF,
   206            Bit7        : BIT7_OFF
   207        };
   208
   209        /*! Port 2 Direction Register */
   210        config GpioBits8PxDir_t P2DIR = {
   211            Bit0        : BIT0_OFF,
   212            Bit1        : BIT1_OFF,
   213            Bit2        : BIT2_OFF,
   214            Bit3        : BIT3_OFF,
   215            Bit4        : BIT4_OFF,
   216            Bit5        : BIT5_OFF,
   217            Bit6        : BIT6_OFF,
   218            Bit7        : BIT7_OFF
   219        };
   220
   221        /*! Port 2 Resistor Enable Register */
   222        config GpioBits8PxRen_t P2REN = {
   223            Bit0        : BIT0_OFF,
   224            Bit1        : BIT1_OFF,
   225            Bit2        : BIT2_OFF,
   226            Bit3        : BIT3_OFF,
   227            Bit4        : BIT4_OFF,
   228            Bit5        : BIT5_OFF,
   229            Bit6        : BIT6_OFF,
   230            Bit7        : BIT7_OFF
   231        };
   232
   233        /*! Port 3 Output Register */
   234        config GpioBits8PxOut_t P3OUT = {
   235            Bit0        : BIT0_OFF,
   236            Bit1        : BIT1_OFF,
   237            Bit2        : BIT2_OFF,
   238            Bit3        : BIT3_OFF,
   239            Bit4        : BIT4_OFF,
   240            Bit5        : BIT5_OFF,
   241            Bit6        : BIT6_OFF,
   242            Bit7        : BIT7_OFF
   243        };
   244
   245        /*! Port 3 Port Select Register 0 */
   246        config GpioBits8PxSel_t P3SEL0 = {
   247            Bit0        : BIT0_OFF,
   248            Bit1        : BIT1_OFF,
   249            Bit2        : BIT2_OFF,
   250            Bit3        : BIT3_OFF,
   251            Bit4        : BIT4_OFF,
   252            Bit5        : BIT5_OFF,
   253            Bit6        : BIT6_OFF,
   254            Bit7        : BIT7_OFF
   255        };
   256
   257        /*! Port 3 Port Select Register 1 */
   258        config GpioBits8PxSel_t P3SEL1 = {
   259            Bit0        : BIT0_OFF,
   260            Bit1        : BIT1_OFF,
   261            Bit2        : BIT2_OFF,
   262            Bit3        : BIT3_OFF,
   263            Bit4        : BIT4_OFF,
   264            Bit5        : BIT5_OFF,
   265            Bit6        : BIT6_OFF,
   266            Bit7        : BIT7_OFF
   267        };
   268
   269        /*! Port 3 Direction Register */
   270        config GpioBits8PxDir_t P3DIR = {
   271            Bit0        : BIT0_OFF,
   272            Bit1        : BIT1_OFF,
   273            Bit2        : BIT2_OFF,
   274            Bit3        : BIT3_OFF,
   275            Bit4        : BIT4_OFF,
   276            Bit5        : BIT5_OFF,
   277            Bit6        : BIT6_OFF,
   278            Bit7        : BIT7_OFF
   279        };
   280
   281        /*! Port 3 Resistor Enable Register */
   282        config GpioBits8PxRen_t P3REN = {
   283            Bit0        : BIT0_OFF,
   284            Bit1        : BIT1_OFF,
   285            Bit2        : BIT2_OFF,
   286            Bit3        : BIT3_OFF,
   287            Bit4        : BIT4_OFF,
   288            Bit5        : BIT5_OFF,
   289            Bit6        : BIT6_OFF,
   290            Bit7        : BIT7_OFF
   291        };
   292
   293        /*! Port 4 Output Register */
   294        config GpioBits8PxOut_t P4OUT = {
   295            Bit0        : BIT0_OFF,
   296            Bit1        : BIT1_OFF,
   297            Bit2        : BIT2_OFF,
   298            Bit3        : BIT3_OFF,
   299            Bit4        : BIT4_OFF,
   300            Bit5        : BIT5_OFF,
   301            Bit6        : BIT6_OFF,
   302            Bit7        : BIT7_OFF
   303        };
   304
   305        /*! Port 4 Port Select Register 0 */
   306        config GpioBits8PxSel_t P4SEL0 = {
   307            Bit0        : BIT0_OFF,
   308            Bit1        : BIT1_OFF,
   309            Bit2        : BIT2_OFF,
   310            Bit3        : BIT3_OFF,
   311            Bit4        : BIT4_OFF,
   312            Bit5        : BIT5_OFF,
   313            Bit6        : BIT6_OFF,
   314            Bit7        : BIT7_OFF
   315        };
   316
   317        /*! Port 4 Port Select Register 1 */
   318        config GpioBits8PxSel_t P4SEL1 = {
   319            Bit0        : BIT0_OFF,
   320            Bit1        : BIT1_OFF,
   321            Bit2        : BIT2_OFF,
   322            Bit3        : BIT3_OFF,
   323            Bit4        : BIT4_OFF,
   324            Bit5        : BIT5_OFF,
   325            Bit6        : BIT6_OFF,
   326            Bit7        : BIT7_OFF
   327        };
   328
   329        /*! Port 4 Direction Register */
   330        config GpioBits8PxDir_t P4DIR = {
   331            Bit0        : BIT0_OFF,
   332            Bit1        : BIT1_OFF,
   333            Bit2        : BIT2_OFF,
   334            Bit3        : BIT3_OFF,
   335            Bit4        : BIT4_OFF,
   336            Bit5        : BIT5_OFF,
   337            Bit6        : BIT6_OFF,
   338            Bit7        : BIT7_OFF
   339        };
   340
   341        /*! Port 4 Resistor Enable Register */
   342        config GpioBits8PxRen_t P4REN = {
   343            Bit0        : BIT0_OFF,
   344            Bit1        : BIT1_OFF,
   345            Bit2        : BIT2_OFF,
   346            Bit3        : BIT3_OFF,
   347            Bit4        : BIT4_OFF,
   348            Bit5        : BIT5_OFF,
   349            Bit6        : BIT6_OFF,
   350            Bit7        : BIT7_OFF
   351        };
   352
   353        /*! Port J Output Register */
   354        config GpioBits8PxOut_t PJOUT = {
   355            Bit0        : BIT0_OFF,
   356            Bit1        : BIT1_OFF,
   357            Bit2        : BIT2_OFF,
   358            Bit3        : BIT3_OFF,
   359            Bit4        : BIT4_OFF,
   360            Bit5        : BIT5_OFF,
   361            Bit6        : BIT6_OFF,
   362            Bit7        : BIT7_OFF
   363        };
   364
   365        /*! Port J Port Select Register 0 */
   366        config GpioBits8PxSel_t PJSEL0 = {
   367            Bit0        : BIT0_OFF,
   368            Bit1        : BIT1_OFF,
   369            Bit2        : BIT2_OFF,
   370            Bit3        : BIT3_OFF,
   371            Bit4        : BIT4_OFF,
   372            Bit5        : BIT5_OFF,
   373            Bit6        : BIT6_OFF,
   374            Bit7        : BIT7_OFF
   375        };
   376
   377        /*! Port J Port Select Register 1 */
   378        config GpioBits8PxSel_t PJSEL1 = {
   379            Bit0        : BIT0_OFF,
   380            Bit1        : BIT1_OFF,
   381            Bit2        : BIT2_OFF,
   382            Bit3        : BIT3_OFF,
   383            Bit4        : BIT4_OFF,
   384            Bit5        : BIT5_OFF,
   385            Bit6        : BIT6_OFF,
   386            Bit7        : BIT7_OFF
   387        };
   388
   389        /*! Port J Direction Register */
   390        config GpioBits8PxDir_t PJDIR = {
   391            Bit0        : BIT0_OFF,
   392            Bit1        : BIT1_OFF,
   393            Bit2        : BIT2_OFF,
   394            Bit3        : BIT3_OFF,
   395            Bit4        : BIT4_OFF,
   396            Bit5        : BIT5_OFF,
   397            Bit6        : BIT6_OFF,
   398            Bit7        : BIT7_OFF
   399        };
   400
   401        /*! Port J Resistor Enable Register */
   402        config GpioBits8PxRen_t PJREN = {
   403            Bit0        : BIT0_OFF,
   404            Bit1        : BIT1_OFF,
   405            Bit2        : BIT2_OFF,
   406            Bit3        : BIT3_OFF,
   407            Bit4        : BIT4_OFF,
   408            Bit5        : BIT5_OFF,
   409            Bit6        : BIT6_OFF,
   410            Bit7        : BIT7_OFF
   411        };
   412    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x01

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== GPIO for MSP430G2x01 ========
    35     *  MSP430 General Purpose Input Output Ports
    36     */
    37    metaonly module GPIO_MSP430G2x01 inherits IGPIO {
    38        /*!
    39         *  ======== create ========
    40         *  Create an instance of this peripheral.
    41         */
    42        create();
    43
    44    instance:
    45       /*! Define an array to describe all device pins. The 1st dimension
    46        *  denotes the port, the second the pin on that port. On an
    47        *  MSP430G2x01 device, there are 8 + 2 = 10 pins total.
    48        */
    49
    50        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    51         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    52        /* TODO: For this device the config variable definition has been moved into the
    53         * corresponding XS file due to its size. This needs a more consistent solution. */
    54        config DevicePin_t devicePins[2][8];
    55
    56        /*! Implementation of Device Pin Functional Configuration */
    57        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    58
    59        /*! Determine if each Register needs to be forced set or not */
    60        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    61        [
    62            { register : "P1OUT" , regForceSet : true  },
    63            { register : "P1SEL" , regForceSet : false },
    64            { register : "P1DIR" , regForceSet : true  },
    65            { register : "P1REN" , regForceSet : false },
    66            { register : "P1IES" , regForceSet : true },
    67            { register : "P1IFG" , regForceSet : true },
    68            { register : "P1IE"  , regForceSet : false },
    69            { register : "P2OUT" , regForceSet : true  },
    70            { register : "P2SEL" , regForceSet : false },
    71            { register : "P2DIR" , regForceSet : true  },
    72            { register : "P2REN" , regForceSet : false },
    73            { register : "P2IES" , regForceSet : true },
    74            { register : "P2IFG" , regForceSet : true },
    75            { register : "P2IE"  , regForceSet : false }
    76        ];
    77
    78        /*
    79         *  GPIO Digital I/O Registers
    80         *
    81         *  One GIPO instance defines the configuration of an entire,
    82         *  8-bit wide digital I/O port.
    83         */
    84
    85        /*! Port 1 Output Register */
    86        config GpioBits8PxOut_t P1OUT = {
    87            Bit0        : BIT0_OFF,
    88            Bit1        : BIT1_OFF,
    89            Bit2        : BIT2_OFF,
    90            Bit3        : BIT3_OFF,
    91            Bit4        : BIT4_OFF,
    92            Bit5        : BIT5_OFF,
    93            Bit6        : BIT6_OFF,
    94            Bit7        : BIT7_OFF
    95        };
    96
    97        /*! Port 1 Port Select Register */
    98        config GpioBits8PxSel_t P1SEL = {
    99            Bit0        : BIT0_OFF,
   100            Bit1        : BIT1_OFF,
   101            Bit2        : BIT2_OFF,
   102            Bit3        : BIT3_OFF,
   103            Bit4        : BIT4_OFF,
   104            Bit5        : BIT5_OFF,
   105            Bit6        : BIT6_OFF,
   106            Bit7        : BIT7_OFF
   107        };
   108
   109        /*! Port 1 Direction Register */
   110        config GpioBits8PxDir_t P1DIR = {
   111            Bit0        : BIT0_OFF,
   112            Bit1        : BIT1_OFF,
   113            Bit2        : BIT2_OFF,
   114            Bit3        : BIT3_OFF,
   115            Bit4        : BIT4_OFF,
   116            Bit5        : BIT5_OFF,
   117            Bit6        : BIT6_OFF,
   118            Bit7        : BIT7_OFF
   119        };
   120
   121        /*! Port 1 Resistor Enable Register */
   122        config GpioBits8PxRen_t P1REN = {
   123            Bit0        : BIT0_OFF,
   124            Bit1        : BIT1_OFF,
   125            Bit2        : BIT2_OFF,
   126            Bit3        : BIT3_OFF,
   127            Bit4        : BIT4_OFF,
   128            Bit5        : BIT5_OFF,
   129            Bit6        : BIT6_OFF,
   130            Bit7        : BIT7_OFF
   131        };
   132
   133        /*! Port 2 Output Register */
   134        config GpioBits8PxOut_t P2OUT = {
   135            Bit0        : BIT0_OFF,
   136            Bit1        : BIT1_OFF,
   137            Bit2        : BIT2_OFF,
   138            Bit3        : BIT3_OFF,
   139            Bit4        : BIT4_OFF,
   140            Bit5        : BIT5_OFF,
   141            Bit6        : BIT6_OFF,
   142            Bit7        : BIT7_OFF
   143        };
   144
   145        /*! Port 2 Port Select Register */
   146        config GpioBits8PxSel_t P2SEL = {
   147            Bit0        : BIT0_OFF,
   148            Bit1        : BIT1_OFF,
   149            Bit2        : BIT2_OFF,
   150            Bit3        : BIT3_OFF,
   151            Bit4        : BIT4_OFF,
   152            Bit5        : BIT5_OFF,
   153            Bit6        : BIT6,         /* POR default for all 2xx devices */
   154            Bit7        : BIT7          /* POR default for all 2xx devices */
   155        };
   156
   157        /*! Port 2 Direction Register */
   158        config GpioBits8PxDir_t P2DIR = {
   159            Bit0        : BIT0_OFF,
   160            Bit1        : BIT1_OFF,
   161            Bit2        : BIT2_OFF,
   162            Bit3        : BIT3_OFF,
   163            Bit4        : BIT4_OFF,
   164            Bit5        : BIT5_OFF,
   165            Bit6        : BIT6_OFF,
   166            Bit7        : BIT7_OFF
   167        };
   168
   169        /*! Port 2 Resistor Enable Register */
   170        config GpioBits8PxRen_t P2REN = {
   171            Bit0        : BIT0_OFF,
   172            Bit1        : BIT1_OFF,
   173            Bit2        : BIT2_OFF,
   174            Bit3        : BIT3_OFF,
   175            Bit4        : BIT4_OFF,
   176            Bit5        : BIT5_OFF,
   177            Bit6        : BIT6_OFF,
   178            Bit7        : BIT7_OFF
   179        };
   180    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x02

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34
    35    /*!
    36     *  ======== GPIO for MSP430G2x02 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430G2x02 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral.
    43         */
    44        create(USI.Instance usi);
    45
    46    instance:
    47        /*! @_nodoc */
    48        config USI.Instance usi;
    49
    50       /*! Define an array to describe all device pins. The 1st dimension
    51        *  denotes the port, the second the pin on that port. On an
    52        *  MSP430G2x02 device, there are 8 + 8 = 16 pins total.
    53        */
    54
    55        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    56         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    57        /* TODO: For this device the config variable definition has been moved into the
    58         * corresponding XS file due to its size. This needs a more consistent solution. */
    59        config DevicePin_t devicePins[2][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT" , regForceSet : true  },
    68            { register : "P1SEL" , regForceSet : false },
    69            { register : "P1SEL2", regForceSet : false },
    70            { register : "P1DIR" , regForceSet : true  },
    71            { register : "P1REN" , regForceSet : false },
    72            { register : "P1IES" , regForceSet : true },
    73            { register : "P1IFG" , regForceSet : true },
    74            { register : "P1IE"  , regForceSet : false },
    75            { register : "P2OUT" , regForceSet : true  },
    76            { register : "P2SEL" , regForceSet : false },
    77            { register : "P2SEL2", regForceSet : false },
    78            { register : "P2DIR" , regForceSet : true  },
    79            { register : "P2REN" , regForceSet : false },
    80            { register : "P2IES" , regForceSet : true },
    81            { register : "P2IFG" , regForceSet : true },
    82            { register : "P2IE"  , regForceSet : false }
    83        ];
    84
    85        /*
    86         *  GPIO Digital I/O Registers
    87         *
    88         *  One GIPO instance defines the configuration of an entire,
    89         *  8-bit wide digital I/O port.
    90         */
    91
    92        /*! Port 1 Output Register */
    93        config GpioBits8PxOut_t P1OUT = {
    94            Bit0        : BIT0_OFF,
    95            Bit1        : BIT1_OFF,
    96            Bit2        : BIT2_OFF,
    97            Bit3        : BIT3_OFF,
    98            Bit4        : BIT4_OFF,
    99            Bit5        : BIT5_OFF,
   100            Bit6        : BIT6_OFF,
   101            Bit7        : BIT7_OFF
   102        };
   103
   104        /*! Port 1 Port Select Register */
   105        config GpioBits8PxSel_t P1SEL = {
   106            Bit0        : BIT0_OFF,
   107            Bit1        : BIT1_OFF,
   108            Bit2        : BIT2_OFF,
   109            Bit3        : BIT3_OFF,
   110            Bit4        : BIT4_OFF,
   111            Bit5        : BIT5_OFF,
   112            Bit6        : BIT6_OFF,
   113            Bit7        : BIT7_OFF
   114        };
   115
   116        /*! Port 1 Port Select 2 Register */
   117        config GpioBits8PxSel2_t P1SEL2 = {
   118            Bit0        : BIT0_OFF,
   119            Bit1        : BIT1_OFF,
   120            Bit2        : BIT2_OFF,
   121            Bit3        : BIT3_OFF,
   122            Bit4        : BIT4_OFF,
   123            Bit5        : BIT5_OFF,
   124            Bit6        : BIT6_OFF,
   125            Bit7        : BIT7_OFF
   126        };
   127
   128        /*! Port 1 Direction Register */
   129        config GpioBits8PxDir_t P1DIR = {
   130            Bit0        : BIT0_OFF,
   131            Bit1        : BIT1_OFF,
   132            Bit2        : BIT2_OFF,
   133            Bit3        : BIT3_OFF,
   134            Bit4        : BIT4_OFF,
   135            Bit5        : BIT5_OFF,
   136            Bit6        : BIT6_OFF,
   137            Bit7        : BIT7_OFF
   138        };
   139
   140        /*! Port 1 Resistor Enable Register */
   141        config GpioBits8PxRen_t P1REN = {
   142            Bit0        : BIT0_OFF,
   143            Bit1        : BIT1_OFF,
   144            Bit2        : BIT2_OFF,
   145            Bit3        : BIT3_OFF,
   146            Bit4        : BIT4_OFF,
   147            Bit5        : BIT5_OFF,
   148            Bit6        : BIT6_OFF,
   149            Bit7        : BIT7_OFF
   150        };
   151
   152        /*! Port 2 Output Register */
   153        config GpioBits8PxOut_t P2OUT = {
   154            Bit0        : BIT0_OFF,
   155            Bit1        : BIT1_OFF,
   156            Bit2        : BIT2_OFF,
   157            Bit3        : BIT3_OFF,
   158            Bit4        : BIT4_OFF,
   159            Bit5        : BIT5_OFF,
   160            Bit6        : BIT6_OFF,
   161            Bit7        : BIT7_OFF
   162        };
   163
   164        /*! Port 2 Port Select Register */
   165        config GpioBits8PxSel_t P2SEL = {
   166            Bit0        : BIT0_OFF,
   167            Bit1        : BIT1_OFF,
   168            Bit2        : BIT2_OFF,
   169            Bit3        : BIT3_OFF,
   170            Bit4        : BIT4_OFF,
   171            Bit5        : BIT5_OFF,
   172            Bit6        : BIT6,         /* POR default for all 2xx devices */
   173            Bit7        : BIT7          /* POR default for all 2xx devices */
   174        };
   175
   176        /*! Port 2 Port Select 2 Register */
   177        config GpioBits8PxSel2_t P2SEL2 = {
   178            Bit0        : BIT0_OFF,
   179            Bit1        : BIT1_OFF,
   180            Bit2        : BIT2_OFF,
   181            Bit3        : BIT3_OFF,
   182            Bit4        : BIT4_OFF,
   183            Bit5        : BIT5_OFF,
   184            Bit6        : BIT6_OFF,
   185            Bit7        : BIT7_OFF
   186        };
   187
   188        /*! Port 2 Direction Register */
   189        config GpioBits8PxDir_t P2DIR = {
   190            Bit0        : BIT0_OFF,
   191            Bit1        : BIT1_OFF,
   192            Bit2        : BIT2_OFF,
   193            Bit3        : BIT3_OFF,
   194            Bit4        : BIT4_OFF,
   195            Bit5        : BIT5_OFF,
   196            Bit6        : BIT6_OFF,
   197            Bit7        : BIT7_OFF
   198        };
   199
   200        /*! Port 2 Resistor Enable Register */
   201        config GpioBits8PxRen_t P2REN = {
   202            Bit0        : BIT0_OFF,
   203            Bit1        : BIT1_OFF,
   204            Bit2        : BIT2_OFF,
   205            Bit3        : BIT3_OFF,
   206            Bit4        : BIT4_OFF,
   207            Bit5        : BIT5_OFF,
   208            Bit6        : BIT6_OFF,
   209            Bit7        : BIT7_OFF
   210        };
   211    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x03

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== GPIO for MSP430G2x03 ========
    36     *  MSP430 General Purpose Input Output Ports
    37     */
    38    metaonly module GPIO_MSP430G2x03 inherits IGPIO {
    39        /*!
    40         *  ======== create ========
    41         *  Create an instance of this peripheral. Use a customized
    42         *  init function so that we can get access to the
    43         *  instance.
    44         */
    45        create();
    46
    47    instance:
    48
    49       /*! Define an array to describe all device pins. The 1st dimension
    50        *  denotes the port, the second the pin on that port. On an
    51        *  MSP430G2x03 device, there are 3 x 8 = 24 pins total.
    52        */
    53
    54        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    55         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    56        /* TODO: For this device the config variable definition has been moved into the
    57         * corresponding XS file due to its size. This needs a more consistent solution. */
    58        config DevicePin_t devicePins[3][8];
    59
    60        /*! Implementation of Device Pin Functional Configuration */
    61        override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    62
    63        /*! Determine if each Register needs to be forced set or not */
    64        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    65        [
    66            { register : "P1OUT" , regForceSet : true  },
    67            { register : "P1SEL" , regForceSet : false },
    68            { register : "P1SEL2" , regForceSet: false },
    69            { register : "P1DIR" , regForceSet : true  },
    70            { register : "P1REN" , regForceSet : false },
    71            { register : "P1IES" , regForceSet : true  },
    72            { register : "P1IFG" , regForceSet : true  },
    73            { register : "P1IE"  , regForceSet : false },
    74            { register : "P2OUT" , regForceSet : true  },
    75            { register : "P2SEL" , regForceSet : false },
    76            { register : "P2SEL2", regForceSet : false },
    77            { register : "P2DIR" , regForceSet : true  },
    78            { register : "P2REN" , regForceSet : false },
    79            { register : "P2IES" , regForceSet : true  },
    80            { register : "P2IFG" , regForceSet : true  },
    81            { register : "P2IE"  , regForceSet : false },
    82            { register : "P3OUT" , regForceSet : true  },
    83            { register : "P3SEL" , regForceSet : false },
    84            { register : "P3SEL2" , regForceSet: false },
    85            { register : "P3DIR" , regForceSet : true  },
    86            { register : "P3REN" , regForceSet : false },
    87        ];
    88
    89        /*
    90         *  GPIO Digital I/O Registers
    91         *
    92         *  One GIPO instance defines the configuration of an entire,
    93         *  8-bit wide digital I/O port.
    94         */
    95
    96        /*! Port 1 Output Register */
    97        config GpioBits8PxOut_t P1OUT = {
    98            Bit0        : BIT0_OFF,
    99            Bit1        : BIT1_OFF,
   100            Bit2        : BIT2_OFF,
   101            Bit3        : BIT3_OFF,
   102            Bit4        : BIT4_OFF,
   103            Bit5        : BIT5_OFF,
   104            Bit6        : BIT6_OFF,
   105            Bit7        : BIT7_OFF
   106        };
   107
   108        /*! Port 1 Port Select Register */
   109        config GpioBits8PxSel_t P1SEL = {
   110            Bit0        : BIT0_OFF,
   111            Bit1        : BIT1_OFF,
   112            Bit2        : BIT2_OFF,
   113            Bit3        : BIT3_OFF,
   114            Bit4        : BIT4_OFF,
   115            Bit5        : BIT5_OFF,
   116            Bit6        : BIT6_OFF,
   117            Bit7        : BIT7_OFF
   118        };
   119
   120        /*! Port 1 Port Select 2 Register */
   121        config GpioBits8PxSel_t P1SEL2 = {
   122            Bit0        : BIT0_OFF,
   123            Bit1        : BIT1_OFF,
   124            Bit2        : BIT2_OFF,
   125            Bit3        : BIT3_OFF,
   126            Bit4        : BIT4_OFF,
   127            Bit5        : BIT5_OFF,
   128            Bit6        : BIT6_OFF,
   129            Bit7        : BIT7_OFF
   130        };
   131
   132        /*! Port 1 Direction Register */
   133        config GpioBits8PxDir_t P1DIR = {
   134            Bit0        : BIT0_OFF,
   135            Bit1        : BIT1_OFF,
   136            Bit2        : BIT2_OFF,
   137            Bit3        : BIT3_OFF,
   138            Bit4        : BIT4_OFF,
   139            Bit5        : BIT5_OFF,
   140            Bit6        : BIT6_OFF,
   141            Bit7        : BIT7_OFF
   142        };
   143
   144        /*! Port 1 Resistor Enable Register */
   145        config GpioBits8PxRen_t P1REN = {
   146            Bit0        : BIT0_OFF,
   147            Bit1        : BIT1_OFF,
   148            Bit2        : BIT2_OFF,
   149            Bit3        : BIT3_OFF,
   150            Bit4        : BIT4_OFF,
   151            Bit5        : BIT5_OFF,
   152            Bit6        : BIT6_OFF,
   153            Bit7        : BIT7_OFF
   154        };
   155
   156        /*! Port 2 Output Register */
   157        config GpioBits8PxOut_t P2OUT = {
   158            Bit0        : BIT0_OFF,
   159            Bit1        : BIT1_OFF,
   160            Bit2        : BIT2_OFF,
   161            Bit3        : BIT3_OFF,
   162            Bit4        : BIT4_OFF,
   163            Bit5        : BIT5_OFF,
   164            Bit6        : BIT6_OFF,
   165            Bit7        : BIT7_OFF
   166        };
   167
   168        /*! Port 2 Port Select Register */
   169        config GpioBits8PxSel_t P2SEL = {
   170            Bit0        : BIT0_OFF,
   171            Bit1        : BIT1_OFF,
   172            Bit2        : BIT2_OFF,
   173            Bit3        : BIT3_OFF,
   174            Bit4        : BIT4_OFF,
   175            Bit5        : BIT5_OFF,
   176            Bit6        : BIT6,         /* POR default for all 2xx devices */
   177            Bit7        : BIT7          /* POR default for all 2xx devices */
   178        };
   179
   180        /*! Port 2 Port Select 2 Register */
   181        config GpioBits8PxSel2_t P2SEL2 = {
   182            Bit0        : BIT0_OFF,
   183            Bit1        : BIT1_OFF,
   184            Bit2        : BIT2_OFF,
   185            Bit3        : BIT3_OFF,
   186            Bit4        : BIT4_OFF,
   187            Bit5        : BIT5_OFF,
   188            Bit6        : BIT6_OFF,
   189            Bit7        : BIT7_OFF
   190        };
   191
   192        /*! Port 2 Direction Register */
   193        config GpioBits8PxDir_t P2DIR = {
   194            Bit0        : BIT0_OFF,
   195            Bit1        : BIT1_OFF,
   196            Bit2        : BIT2_OFF,
   197            Bit3        : BIT3_OFF,
   198            Bit4        : BIT4_OFF,
   199            Bit5        : BIT5_OFF,
   200            Bit6        : BIT6_OFF,
   201            Bit7        : BIT7_OFF
   202        };
   203
   204        /*! Port 2 Resistor Enable Register */
   205        config GpioBits8PxRen_t P2REN = {
   206            Bit0        : BIT0_OFF,
   207            Bit1        : BIT1_OFF,
   208            Bit2        : BIT2_OFF,
   209            Bit3        : BIT3_OFF,
   210            Bit4        : BIT4_OFF,
   211            Bit5        : BIT5_OFF,
   212            Bit6        : BIT6_OFF,
   213            Bit7        : BIT7_OFF
   214        };
   215
   216        /*! Port 3 Output Register */
   217        config GpioBits8PxOut_t P3OUT = {
   218            Bit0        : BIT0_OFF,
   219            Bit1        : BIT1_OFF,
   220            Bit2        : BIT2_OFF,
   221            Bit3        : BIT3_OFF,
   222            Bit4        : BIT4_OFF,
   223            Bit5        : BIT5_OFF,
   224            Bit6        : BIT6_OFF,
   225            Bit7        : BIT7_OFF
   226        };
   227
   228        /*! Port 3 Port Select Register */
   229        config GpioBits8PxSel_t P3SEL = {
   230            Bit0        : BIT0_OFF,
   231            Bit1        : BIT1_OFF,
   232            Bit2        : BIT2_OFF,
   233            Bit3        : BIT3_OFF,
   234            Bit4        : BIT4_OFF,
   235            Bit5        : BIT5_OFF,
   236            Bit6        : BIT6_OFF,
   237            Bit7        : BIT7_OFF
   238        };
   239
   240        /*! Port 3 Port Select 2 Register */
   241        config GpioBits8PxSel2_t P3SEL2 = {
   242            Bit0        : BIT0_OFF,
   243            Bit1        : BIT1_OFF,
   244            Bit2        : BIT2_OFF,
   245            Bit3        : BIT3_OFF,
   246            Bit4        : BIT4_OFF,
   247            Bit5        : BIT5_OFF,
   248            Bit6        : BIT6_OFF,
   249            Bit7        : BIT7_OFF
   250        };
   251
   252        /*! Port 3 Direction Register */
   253        config GpioBits8PxDir_t P3DIR = {
   254            Bit0        : BIT0_OFF,
   255            Bit1        : BIT1_OFF,
   256            Bit2        : BIT2_OFF,
   257            Bit3        : BIT3_OFF,
   258            Bit4        : BIT4_OFF,
   259            Bit5        : BIT5_OFF,
   260            Bit6        : BIT6_OFF,
   261            Bit7        : BIT7_OFF
   262        };
   263
   264        /*! Port 3 Resistor Enable Register */
   265        config GpioBits8PxRen_t P3REN = {
   266            Bit0        : BIT0_OFF,
   267            Bit1        : BIT1_OFF,
   268            Bit2        : BIT2_OFF,
   269            Bit3        : BIT3_OFF,
   270            Bit4        : BIT4_OFF,
   271            Bit5        : BIT5_OFF,
   272            Bit6        : BIT6_OFF,
   273            Bit7        : BIT7_OFF
   274        };
   275    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x11

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    34
    35    /*!
    36     *  ======== GPIO for MSP430G2x11 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430G2x11 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral.
    43         */
    44        create(Comparator.Instance comparator);
    45
    46    instance:
    47        /*! @_nodoc */
    48        config Comparator.Instance comparator;
    49
    50       /*! Define an array to describe all device pins. The 1st dimension
    51        *  denotes the port, the second the pin on that port. On an
    52        *  MSP430G2x11 device, there are 8 + 2 = 10 pins total.
    53        */
    54
    55        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    56         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    57        /* TODO: For this device the config variable definition has been moved into the
    58         * corresponding XS file due to its size. This needs a more consistent solution. */
    59        config DevicePin_t devicePins[2][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT" , regForceSet : true  },
    68            { register : "P1SEL" , regForceSet : false },
    69            { register : "P1DIR" , regForceSet : true  },
    70            { register : "P1REN" , regForceSet : false },
    71            { register : "P1IES" , regForceSet : true },
    72            { register : "P1IFG" , regForceSet : true },
    73            { register : "P1IE"  , regForceSet : false },
    74            { register : "P2OUT" , regForceSet : true  },
    75            { register : "P2SEL" , regForceSet : false },
    76            { register : "P2DIR" , regForceSet : true  },
    77            { register : "P2REN" , regForceSet : false },
    78            { register : "P2IES" , regForceSet : true },
    79            { register : "P2IFG" , regForceSet : true },
    80            { register : "P2IE"  , regForceSet : false }
    81        ];
    82
    83        /*
    84         *  GPIO Digital I/O Registers
    85         *
    86         *  One GIPO instance defines the configuration of an entire,
    87         *  8-bit wide digital I/O port.
    88         */
    89
    90        /*! Port 1 Output Register */
    91        config GpioBits8PxOut_t P1OUT = {
    92            Bit0        : BIT0_OFF,
    93            Bit1        : BIT1_OFF,
    94            Bit2        : BIT2_OFF,
    95            Bit3        : BIT3_OFF,
    96            Bit4        : BIT4_OFF,
    97            Bit5        : BIT5_OFF,
    98            Bit6        : BIT6_OFF,
    99            Bit7        : BIT7_OFF
   100        };
   101
   102        /*! Port 1 Port Select Register */
   103        config GpioBits8PxSel_t P1SEL = {
   104            Bit0        : BIT0_OFF,
   105            Bit1        : BIT1_OFF,
   106            Bit2        : BIT2_OFF,
   107            Bit3        : BIT3_OFF,
   108            Bit4        : BIT4_OFF,
   109            Bit5        : BIT5_OFF,
   110            Bit6        : BIT6_OFF,
   111            Bit7        : BIT7_OFF
   112        };
   113
   114        /*! Port 1 Direction Register */
   115        config GpioBits8PxDir_t P1DIR = {
   116            Bit0        : BIT0_OFF,
   117            Bit1        : BIT1_OFF,
   118            Bit2        : BIT2_OFF,
   119            Bit3        : BIT3_OFF,
   120            Bit4        : BIT4_OFF,
   121            Bit5        : BIT5_OFF,
   122            Bit6        : BIT6_OFF,
   123            Bit7        : BIT7_OFF
   124        };
   125
   126        /*! Port 1 Resistor Enable Register */
   127        config GpioBits8PxRen_t P1REN = {
   128            Bit0        : BIT0_OFF,
   129            Bit1        : BIT1_OFF,
   130            Bit2        : BIT2_OFF,
   131            Bit3        : BIT3_OFF,
   132            Bit4        : BIT4_OFF,
   133            Bit5        : BIT5_OFF,
   134            Bit6        : BIT6_OFF,
   135            Bit7        : BIT7_OFF
   136        };
   137
   138        /*! Port 2 Output Register */
   139        config GpioBits8PxOut_t P2OUT = {
   140            Bit0        : BIT0_OFF,
   141            Bit1        : BIT1_OFF,
   142            Bit2        : BIT2_OFF,
   143            Bit3        : BIT3_OFF,
   144            Bit4        : BIT4_OFF,
   145            Bit5        : BIT5_OFF,
   146            Bit6        : BIT6_OFF,
   147            Bit7        : BIT7_OFF
   148        };
   149
   150        /*! Port 2 Port Select Register */
   151        config GpioBits8PxSel_t P2SEL = {
   152            Bit0        : BIT0_OFF,
   153            Bit1        : BIT1_OFF,
   154            Bit2        : BIT2_OFF,
   155            Bit3        : BIT3_OFF,
   156            Bit4        : BIT4_OFF,
   157            Bit5        : BIT5_OFF,
   158            Bit6        : BIT6,         /* POR default for all 2xx devices */
   159            Bit7        : BIT7          /* POR default for all 2xx devices */
   160        };
   161
   162        /*! Port 2 Direction Register */
   163        config GpioBits8PxDir_t P2DIR = {
   164            Bit0        : BIT0_OFF,
   165            Bit1        : BIT1_OFF,
   166            Bit2        : BIT2_OFF,
   167            Bit3        : BIT3_OFF,
   168            Bit4        : BIT4_OFF,
   169            Bit5        : BIT5_OFF,
   170            Bit6        : BIT6_OFF,
   171            Bit7        : BIT7_OFF
   172        };
   173
   174        /*! Port 2 Resistor Enable Register */
   175        config GpioBits8PxRen_t P2REN = {
   176            Bit0        : BIT0_OFF,
   177            Bit1        : BIT1_OFF,
   178            Bit2        : BIT2_OFF,
   179            Bit3        : BIT3_OFF,
   180            Bit4        : BIT4_OFF,
   181            Bit5        : BIT5_OFF,
   182            Bit6        : BIT6_OFF,
   183            Bit7        : BIT7_OFF
   184        };
   185    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x12

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35
    36    /*!
    37     *  ======== GPIO for MSP430G2x12 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2x12 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of these peripherals.
    44         */
    45        create(USI.Instance usi, Comparator.Instance comparator);
    46
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50
    51        /*! @_nodoc */
    52        config Comparator.Instance comparator;
    53
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430G2x12 device, there are 8 + 8 = 16 pins total.
    57        */
    58
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        /* TODO: For this device the config variable definition has been moved into the
    62         * corresponding XS file due to its size. This needs a more consistent solution. */
    63        config DevicePin_t devicePins[2][8];
    64
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    67
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1SEL2", regForceSet : false },
    74            { register : "P1DIR" , regForceSet : true  },
    75            { register : "P1REN" , regForceSet : false },
    76            { register : "P1IES" , regForceSet : true },
    77            { register : "P1IFG" , regForceSet : true },
    78            { register : "P1IE"  , regForceSet : false },
    79            { register : "P2OUT" , regForceSet : true  },
    80            { register : "P2SEL" , regForceSet : false },
    81            { register : "P2SEL2", regForceSet : false },
    82            { register : "P2DIR" , regForceSet : true  },
    83            { register : "P2REN" , regForceSet : false },
    84            { register : "P2IES" , regForceSet : true },
    85            { register : "P2IFG" , regForceSet : true },
    86            { register : "P2IE"  , regForceSet : false }
    87        ];
    88
    89        /*
    90         *  GPIO Digital I/O Registers
    91         *
    92         *  One GIPO instance defines the configuration of an entire,
    93         *  8-bit wide digital I/O port.
    94         */
    95
    96        /*! Port 1 Output Register */
    97        config GpioBits8PxOut_t P1OUT = {
    98            Bit0        : BIT0_OFF,
    99            Bit1        : BIT1_OFF,
   100            Bit2        : BIT2_OFF,
   101            Bit3        : BIT3_OFF,
   102            Bit4        : BIT4_OFF,
   103            Bit5        : BIT5_OFF,
   104            Bit6        : BIT6_OFF,
   105            Bit7        : BIT7_OFF
   106        };
   107
   108        /*! Port 1 Port Select Register */
   109        config GpioBits8PxSel_t P1SEL = {
   110            Bit0        : BIT0_OFF,
   111            Bit1        : BIT1_OFF,
   112            Bit2        : BIT2_OFF,
   113            Bit3        : BIT3_OFF,
   114            Bit4        : BIT4_OFF,
   115            Bit5        : BIT5_OFF,
   116            Bit6        : BIT6_OFF,
   117            Bit7        : BIT7_OFF
   118        };
   119
   120        /*! Port 1 Port Select 2 Register */
   121        config GpioBits8PxSel2_t P1SEL2 = {
   122            Bit0        : BIT0_OFF,
   123            Bit1        : BIT1_OFF,
   124            Bit2        : BIT2_OFF,
   125            Bit3        : BIT3_OFF,
   126            Bit4        : BIT4_OFF,
   127            Bit5        : BIT5_OFF,
   128            Bit6        : BIT6_OFF,
   129            Bit7        : BIT7_OFF
   130        };
   131
   132        /*! Port 1 Direction Register */
   133        config GpioBits8PxDir_t P1DIR = {
   134            Bit0        : BIT0_OFF,
   135            Bit1        : BIT1_OFF,
   136            Bit2        : BIT2_OFF,
   137            Bit3        : BIT3_OFF,
   138            Bit4        : BIT4_OFF,
   139            Bit5        : BIT5_OFF,
   140            Bit6        : BIT6_OFF,
   141            Bit7        : BIT7_OFF
   142        };
   143
   144        /*! Port 1 Resistor Enable Register */
   145        config GpioBits8PxRen_t P1REN = {
   146            Bit0        : BIT0_OFF,
   147            Bit1        : BIT1_OFF,
   148            Bit2        : BIT2_OFF,
   149            Bit3        : BIT3_OFF,
   150            Bit4        : BIT4_OFF,
   151            Bit5        : BIT5_OFF,
   152            Bit6        : BIT6_OFF,
   153            Bit7        : BIT7_OFF
   154        };
   155
   156        /*! Port 2 Output Register */
   157        config GpioBits8PxOut_t P2OUT = {
   158            Bit0        : BIT0_OFF,
   159            Bit1        : BIT1_OFF,
   160            Bit2        : BIT2_OFF,
   161            Bit3        : BIT3_OFF,
   162            Bit4        : BIT4_OFF,
   163            Bit5        : BIT5_OFF,
   164            Bit6        : BIT6_OFF,
   165            Bit7        : BIT7_OFF
   166        };
   167
   168        /*! Port 2 Port Select Register */
   169        config GpioBits8PxSel_t P2SEL = {
   170            Bit0        : BIT0_OFF,
   171            Bit1        : BIT1_OFF,
   172            Bit2        : BIT2_OFF,
   173            Bit3        : BIT3_OFF,
   174            Bit4        : BIT4_OFF,
   175            Bit5        : BIT5_OFF,
   176            Bit6        : BIT6,         /* POR default for all 2xx devices */
   177            Bit7        : BIT7          /* POR default for all 2xx devices */
   178        };
   179
   180        /*! Port 2 Port Select 2 Register */
   181        config GpioBits8PxSel2_t P2SEL2 = {
   182            Bit0        : BIT0_OFF,
   183            Bit1        : BIT1_OFF,
   184            Bit2        : BIT2_OFF,
   185            Bit3        : BIT3_OFF,
   186            Bit4        : BIT4_OFF,
   187            Bit5        : BIT5_OFF,
   188            Bit6        : BIT6_OFF,
   189            Bit7        : BIT7_OFF
   190        };
   191
   192        /*! Port 2 Direction Register */
   193        config GpioBits8PxDir_t P2DIR = {
   194            Bit0        : BIT0_OFF,
   195            Bit1        : BIT1_OFF,
   196            Bit2        : BIT2_OFF,
   197            Bit3        : BIT3_OFF,
   198            Bit4        : BIT4_OFF,
   199            Bit5        : BIT5_OFF,
   200            Bit6        : BIT6_OFF,
   201            Bit7        : BIT7_OFF
   202        };
   203
   204        /*! Port 2 Resistor Enable Register */
   205        config GpioBits8PxRen_t P2REN = {
   206            Bit0        : BIT0_OFF,
   207            Bit1        : BIT1_OFF,
   208            Bit2        : BIT2_OFF,
   209            Bit3        : BIT3_OFF,
   210            Bit4        : BIT4_OFF,
   211            Bit5        : BIT5_OFF,
   212            Bit6        : BIT6_OFF,
   213            Bit7        : BIT7_OFF
   214        };
   215    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x13

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    34
    35    /*!
    36     *  ======== GPIO for MSP430G2x13 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430G2x13 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the Comparator
    44         *  instance.
    45         */
    46        create(Comparator.Instance comparator);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config Comparator.Instance comparator;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430G2x13 device, there are 3 x 8 = 24 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        /* TODO: For this device the config variable definition has been moved into the
    60         * corresponding XS file due to its size. This needs a more consistent solution. */
    61        config DevicePin_t devicePins[3][8];
    62
    63        /*! Implementation of Device Pin Functional Configuration */
    64        override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    65
    66        /*! Determine if each Register needs to be forced set or not */
    67        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    68        [
    69            { register : "P1OUT" , regForceSet : true  },
    70            { register : "P1SEL" , regForceSet : false },
    71            { register : "P1SEL2", regForceSet : false },
    72            { register : "P1DIR" , regForceSet : true  },
    73            { register : "P1REN" , regForceSet : false },
    74            { register : "P1IES" , regForceSet : true  },
    75            { register : "P1IFG" , regForceSet : true  },
    76            { register : "P1IE"  , regForceSet : false },
    77            { register : "P2OUT" , regForceSet : true  },
    78            { register : "P2SEL" , regForceSet : false },
    79            { register : "P2SEL2", regForceSet : false },
    80            { register : "P2DIR" , regForceSet : true  },
    81            { register : "P2REN" , regForceSet : false },
    82            { register : "P2IES" , regForceSet : true  },
    83            { register : "P2IFG" , regForceSet : true  },
    84            { register : "P2IE"  , regForceSet : false },
    85            { register : "P3OUT" , regForceSet : true  },
    86            { register : "P3SEL" , regForceSet : false },
    87            { register : "P3SEL2", regForceSet : false },
    88            { register : "P3DIR" , regForceSet : true  },
    89            { register : "P3REN" , regForceSet : false },
    90        ];
    91
    92        /*
    93         *  GPIO Digital I/O Registers
    94         *
    95         *  One GIPO instance defines the configuration of an entire,
    96         *  8-bit wide digital I/O port.
    97         */
    98
    99        /*! Port 1 Output Register */
   100        config GpioBits8PxOut_t P1OUT = {
   101            Bit0        : BIT0_OFF,
   102            Bit1        : BIT1_OFF,
   103            Bit2        : BIT2_OFF,
   104            Bit3        : BIT3_OFF,
   105            Bit4        : BIT4_OFF,
   106            Bit5        : BIT5_OFF,
   107            Bit6        : BIT6_OFF,
   108            Bit7        : BIT7_OFF
   109        };
   110
   111        /*! Port 1 Port Select Register */
   112        config GpioBits8PxSel_t P1SEL = {
   113            Bit0        : BIT0_OFF,
   114            Bit1        : BIT1_OFF,
   115            Bit2        : BIT2_OFF,
   116            Bit3        : BIT3_OFF,
   117            Bit4        : BIT4_OFF,
   118            Bit5        : BIT5_OFF,
   119            Bit6        : BIT6_OFF,
   120            Bit7        : BIT7_OFF
   121        };
   122
   123        /*! Port 1 Port Select 2 Register */
   124        config GpioBits8PxSel_t P1SEL2 = {
   125            Bit0        : BIT0_OFF,
   126            Bit1        : BIT1_OFF,
   127            Bit2        : BIT2_OFF,
   128            Bit3        : BIT3_OFF,
   129            Bit4        : BIT4_OFF,
   130            Bit5        : BIT5_OFF,
   131            Bit6        : BIT6_OFF,
   132            Bit7        : BIT7_OFF
   133        };
   134
   135        /*! Port 1 Direction Register */
   136        config GpioBits8PxDir_t P1DIR = {
   137            Bit0        : BIT0_OFF,
   138            Bit1        : BIT1_OFF,
   139            Bit2        : BIT2_OFF,
   140            Bit3        : BIT3_OFF,
   141            Bit4        : BIT4_OFF,
   142            Bit5        : BIT5_OFF,
   143            Bit6        : BIT6_OFF,
   144            Bit7        : BIT7_OFF
   145        };
   146
   147        /*! Port 1 Resistor Enable Register */
   148        config GpioBits8PxRen_t P1REN = {
   149            Bit0        : BIT0_OFF,
   150            Bit1        : BIT1_OFF,
   151            Bit2        : BIT2_OFF,
   152            Bit3        : BIT3_OFF,
   153            Bit4        : BIT4_OFF,
   154            Bit5        : BIT5_OFF,
   155            Bit6        : BIT6_OFF,
   156            Bit7        : BIT7_OFF
   157        };
   158
   159        /*! Port 2 Output Register */
   160        config GpioBits8PxOut_t P2OUT = {
   161            Bit0        : BIT0_OFF,
   162            Bit1        : BIT1_OFF,
   163            Bit2        : BIT2_OFF,
   164            Bit3        : BIT3_OFF,
   165            Bit4        : BIT4_OFF,
   166            Bit5        : BIT5_OFF,
   167            Bit6        : BIT6_OFF,
   168            Bit7        : BIT7_OFF
   169        };
   170
   171        /*! Port 2 Port Select Register */
   172        config GpioBits8PxSel_t P2SEL = {
   173            Bit0        : BIT0_OFF,
   174            Bit1        : BIT1_OFF,
   175            Bit2        : BIT2_OFF,
   176            Bit3        : BIT3_OFF,
   177            Bit4        : BIT4_OFF,
   178            Bit5        : BIT5_OFF,
   179            Bit6        : BIT6,         /* POR default for all 2xx devices */
   180            Bit7        : BIT7          /* POR default for all 2xx devices */
   181        };
   182
   183        /*! Port 2 Port Select 2 Register */
   184        config GpioBits8PxSel2_t P2SEL2 = {
   185            Bit0        : BIT0_OFF,
   186            Bit1        : BIT1_OFF,
   187            Bit2        : BIT2_OFF,
   188            Bit3        : BIT3_OFF,
   189            Bit4        : BIT4_OFF,
   190            Bit5        : BIT5_OFF,
   191            Bit6        : BIT6_OFF,
   192            Bit7        : BIT7_OFF
   193        };
   194
   195        /*! Port 2 Direction Register */
   196        config GpioBits8PxDir_t P2DIR = {
   197            Bit0        : BIT0_OFF,
   198            Bit1        : BIT1_OFF,
   199            Bit2        : BIT2_OFF,
   200            Bit3        : BIT3_OFF,
   201            Bit4        : BIT4_OFF,
   202            Bit5        : BIT5_OFF,
   203            Bit6        : BIT6_OFF,
   204            Bit7        : BIT7_OFF
   205        };
   206
   207        /*! Port 2 Resistor Enable Register */
   208        config GpioBits8PxRen_t P2REN = {
   209            Bit0        : BIT0_OFF,
   210            Bit1        : BIT1_OFF,
   211            Bit2        : BIT2_OFF,
   212            Bit3        : BIT3_OFF,
   213            Bit4        : BIT4_OFF,
   214            Bit5        : BIT5_OFF,
   215            Bit6        : BIT6_OFF,
   216            Bit7        : BIT7_OFF
   217        };
   218
   219        /*! Port 3 Output Register */
   220        config GpioBits8PxOut_t P3OUT = {
   221            Bit0        : BIT0_OFF,
   222            Bit1        : BIT1_OFF,
   223            Bit2        : BIT2_OFF,
   224            Bit3        : BIT3_OFF,
   225            Bit4        : BIT4_OFF,
   226            Bit5        : BIT5_OFF,
   227            Bit6        : BIT6_OFF,
   228            Bit7        : BIT7_OFF
   229        };
   230
   231        /*! Port 3 Port Select Register */
   232        config GpioBits8PxSel_t P3SEL = {
   233            Bit0        : BIT0_OFF,
   234            Bit1        : BIT1_OFF,
   235            Bit2        : BIT2_OFF,
   236            Bit3        : BIT3_OFF,
   237            Bit4        : BIT4_OFF,
   238            Bit5        : BIT5_OFF,
   239            Bit6        : BIT6_OFF,
   240            Bit7        : BIT7_OFF
   241        };
   242
   243        /*! Port 3 Port Select 2 Register */
   244        config GpioBits8PxSel2_t P3SEL2 = {
   245            Bit0        : BIT0_OFF,
   246            Bit1        : BIT1_OFF,
   247            Bit2        : BIT2_OFF,
   248            Bit3        : BIT3_OFF,
   249            Bit4        : BIT4_OFF,
   250            Bit5        : BIT5_OFF,
   251            Bit6        : BIT6_OFF,
   252            Bit7        : BIT7_OFF
   253        };
   254
   255        /*! Port 3 Direction Register */
   256        config GpioBits8PxDir_t P3DIR = {
   257            Bit0        : BIT0_OFF,
   258            Bit1        : BIT1_OFF,
   259            Bit2        : BIT2_OFF,
   260            Bit3        : BIT3_OFF,
   261            Bit4        : BIT4_OFF,
   262            Bit5        : BIT5_OFF,
   263            Bit6        : BIT6_OFF,
   264            Bit7        : BIT7_OFF
   265        };
   266
   267        /*! Port 3 Resistor Enable Register */
   268        config GpioBits8PxRen_t P3REN = {
   269            Bit0        : BIT0_OFF,
   270            Bit1        : BIT1_OFF,
   271            Bit2        : BIT2_OFF,
   272            Bit3        : BIT3_OFF,
   273            Bit4        : BIT4_OFF,
   274            Bit5        : BIT5_OFF,
   275            Bit6        : BIT6_OFF,
   276            Bit7        : BIT7_OFF
   277        };
   278    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x21

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34
    35    /*!
    36     *  ======== GPIO for MSP430G2x21 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430G2x21 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral.
    43         */
    44        create(USI.Instance usi);
    45
    46    instance:
    47        /*! @_nodoc */
    48        config USI.Instance usi;
    49
    50       /*! Define an array to describe all device pins. The 1st dimension
    51        *  denotes the port, the second the pin on that port. On an
    52        *  MSP430G2x21 device, there are 8 + 2 = 10 pins total.
    53        */
    54
    55        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    56         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    57        /* TODO: For this device the config variable definition has been moved into the
    58         * corresponding XS file due to its size. This needs a more consistent solution. */
    59        config DevicePin_t devicePins[2][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT" , regForceSet : true  },
    68            { register : "P1SEL" , regForceSet : false },
    69            { register : "P1DIR" , regForceSet : true  },
    70            { register : "P1REN" , regForceSet : false },
    71            { register : "P1IES" , regForceSet : true },
    72            { register : "P1IFG" , regForceSet : true },
    73            { register : "P1IE"  , regForceSet : false },
    74            { register : "P2OUT" , regForceSet : true  },
    75            { register : "P2SEL" , regForceSet : false },
    76            { register : "P2DIR" , regForceSet : true  },
    77            { register : "P2REN" , regForceSet : false },
    78            { register : "P2IES" , regForceSet : true },
    79            { register : "P2IFG" , regForceSet : true },
    80            { register : "P2IE"  , regForceSet : false }
    81        ];
    82
    83        /*
    84         *  GPIO Digital I/O Registers
    85         *
    86         *  One GIPO instance defines the configuration of an entire,
    87         *  8-bit wide digital I/O port.
    88         */
    89
    90        /*! Port 1 Output Register */
    91        config GpioBits8PxOut_t P1OUT = {
    92            Bit0        : BIT0_OFF,
    93            Bit1        : BIT1_OFF,
    94            Bit2        : BIT2_OFF,
    95            Bit3        : BIT3_OFF,
    96            Bit4        : BIT4_OFF,
    97            Bit5        : BIT5_OFF,
    98            Bit6        : BIT6_OFF,
    99            Bit7        : BIT7_OFF
   100        };
   101
   102        /*! Port 1 Port Select Register */
   103        config GpioBits8PxSel_t P1SEL = {
   104            Bit0        : BIT0_OFF,
   105            Bit1        : BIT1_OFF,
   106            Bit2        : BIT2_OFF,
   107            Bit3        : BIT3_OFF,
   108            Bit4        : BIT4_OFF,
   109            Bit5        : BIT5_OFF,
   110            Bit6        : BIT6_OFF,
   111            Bit7        : BIT7_OFF
   112        };
   113
   114        /*! Port 1 Direction Register */
   115        config GpioBits8PxDir_t P1DIR = {
   116            Bit0        : BIT0_OFF,
   117            Bit1        : BIT1_OFF,
   118            Bit2        : BIT2_OFF,
   119            Bit3        : BIT3_OFF,
   120            Bit4        : BIT4_OFF,
   121            Bit5        : BIT5_OFF,
   122            Bit6        : BIT6_OFF,
   123            Bit7        : BIT7_OFF
   124        };
   125
   126        /*! Port 1 Resistor Enable Register */
   127        config GpioBits8PxRen_t P1REN = {
   128            Bit0        : BIT0_OFF,
   129            Bit1        : BIT1_OFF,
   130            Bit2        : BIT2_OFF,
   131            Bit3        : BIT3_OFF,
   132            Bit4        : BIT4_OFF,
   133            Bit5        : BIT5_OFF,
   134            Bit6        : BIT6_OFF,
   135            Bit7        : BIT7_OFF
   136        };
   137
   138        /*! Port 2 Output Register */
   139        config GpioBits8PxOut_t P2OUT = {
   140            Bit0        : BIT0_OFF,
   141            Bit1        : BIT1_OFF,
   142            Bit2        : BIT2_OFF,
   143            Bit3        : BIT3_OFF,
   144            Bit4        : BIT4_OFF,
   145            Bit5        : BIT5_OFF,
   146            Bit6        : BIT6_OFF,
   147            Bit7        : BIT7_OFF
   148        };
   149
   150        /*! Port 2 Port Select Register */
   151        config GpioBits8PxSel_t P2SEL = {
   152            Bit0        : BIT0_OFF,
   153            Bit1        : BIT1_OFF,
   154            Bit2        : BIT2_OFF,
   155            Bit3        : BIT3_OFF,
   156            Bit4        : BIT4_OFF,
   157            Bit5        : BIT5_OFF,
   158            Bit6        : BIT6,         /* POR default for all 2xx devices */
   159            Bit7        : BIT7          /* POR default for all 2xx devices */
   160        };
   161
   162        /*! Port 2 Direction Register */
   163        config GpioBits8PxDir_t P2DIR = {
   164            Bit0        : BIT0_OFF,
   165            Bit1        : BIT1_OFF,
   166            Bit2        : BIT2_OFF,
   167            Bit3        : BIT3_OFF,
   168            Bit4        : BIT4_OFF,
   169            Bit5        : BIT5_OFF,
   170            Bit6        : BIT6_OFF,
   171            Bit7        : BIT7_OFF
   172        };
   173
   174        /*! Port 2 Resistor Enable Register */
   175        config GpioBits8PxRen_t P2REN = {
   176            Bit0        : BIT0_OFF,
   177            Bit1        : BIT1_OFF,
   178            Bit2        : BIT2_OFF,
   179            Bit3        : BIT3_OFF,
   180            Bit4        : BIT4_OFF,
   181            Bit5        : BIT5_OFF,
   182            Bit6        : BIT6_OFF,
   183            Bit7        : BIT7_OFF
   184        };
   185    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x31

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    35
    36    /*!
    37     *  ======== GPIO for MSP430G2x31 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2x31 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral.
    44         */
    45        create(USI.Instance usi, ADC10.Instance adc10);
    46
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50
    51        /*! @_nodoc */
    52        config ADC10.Instance adc10;
    53
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430G2x31 device, there are 8 + 2 = 10 pins total.
    57        */
    58
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        /* TODO: For this device the config variable definition has been moved into the
    62         * corresponding XS file due to its size. This needs a more consistent solution. */
    63        config DevicePin_t devicePins[2][8];
    64
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    67
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1DIR" , regForceSet : true  },
    74            { register : "P1REN" , regForceSet : false },
    75            { register : "P1IES" , regForceSet : true },
    76            { register : "P1IFG" , regForceSet : true },
    77            { register : "P1IE"  , regForceSet : false },
    78            { register : "P2OUT" , regForceSet : true  },
    79            { register : "P2SEL" , regForceSet : false },
    80            { register : "P2DIR" , regForceSet : true  },
    81            { register : "P2REN" , regForceSet : false },
    82            { register : "P2IES" , regForceSet : true },
    83            { register : "P2IFG" , regForceSet : true },
    84            { register : "P2IE"  , regForceSet : false }
    85        ];
    86
    87        /*
    88         *  GPIO Digital I/O Registers
    89         *
    90         *  One GIPO instance defines the configuration of an entire,
    91         *  8-bit wide digital I/O port.
    92         */
    93
    94        /*! Port 1 Output Register */
    95        config GpioBits8PxOut_t P1OUT = {
    96            Bit0        : BIT0_OFF,
    97            Bit1        : BIT1_OFF,
    98            Bit2        : BIT2_OFF,
    99            Bit3        : BIT3_OFF,
   100            Bit4        : BIT4_OFF,
   101            Bit5        : BIT5_OFF,
   102            Bit6        : BIT6_OFF,
   103            Bit7        : BIT7_OFF
   104        };
   105
   106        /*! Port 1 Port Select Register */
   107        config GpioBits8PxSel_t P1SEL = {
   108            Bit0        : BIT0_OFF,
   109            Bit1        : BIT1_OFF,
   110            Bit2        : BIT2_OFF,
   111            Bit3        : BIT3_OFF,
   112            Bit4        : BIT4_OFF,
   113            Bit5        : BIT5_OFF,
   114            Bit6        : BIT6_OFF,
   115            Bit7        : BIT7_OFF
   116        };
   117
   118        /*! Port 1 Direction Register */
   119        config GpioBits8PxDir_t P1DIR = {
   120            Bit0        : BIT0_OFF,
   121            Bit1        : BIT1_OFF,
   122            Bit2        : BIT2_OFF,
   123            Bit3        : BIT3_OFF,
   124            Bit4        : BIT4_OFF,
   125            Bit5        : BIT5_OFF,
   126            Bit6        : BIT6_OFF,
   127            Bit7        : BIT7_OFF
   128        };
   129
   130        /*! Port 1 Resistor Enable Register */
   131        config GpioBits8PxRen_t P1REN = {
   132            Bit0        : BIT0_OFF,
   133            Bit1        : BIT1_OFF,
   134            Bit2        : BIT2_OFF,
   135            Bit3        : BIT3_OFF,
   136            Bit4        : BIT4_OFF,
   137            Bit5        : BIT5_OFF,
   138            Bit6        : BIT6_OFF,
   139            Bit7        : BIT7_OFF
   140        };
   141
   142        /*! Port 2 Output Register */
   143        config GpioBits8PxOut_t P2OUT = {
   144            Bit0        : BIT0_OFF,
   145            Bit1        : BIT1_OFF,
   146            Bit2        : BIT2_OFF,
   147            Bit3        : BIT3_OFF,
   148            Bit4        : BIT4_OFF,
   149            Bit5        : BIT5_OFF,
   150            Bit6        : BIT6_OFF,
   151            Bit7        : BIT7_OFF
   152        };
   153
   154        /*! Port 2 Port Select Register */
   155        config GpioBits8PxSel_t P2SEL = {
   156            Bit0        : BIT0_OFF,
   157            Bit1        : BIT1_OFF,
   158            Bit2        : BIT2_OFF,
   159            Bit3        : BIT3_OFF,
   160            Bit4        : BIT4_OFF,
   161            Bit5        : BIT5_OFF,
   162            Bit6        : BIT6,         /* POR default for all 2xx devices */
   163            Bit7        : BIT7          /* POR default for all 2xx devices */
   164        };
   165
   166        /*! Port 2 Direction Register */
   167        config GpioBits8PxDir_t P2DIR = {
   168            Bit0        : BIT0_OFF,
   169            Bit1        : BIT1_OFF,
   170            Bit2        : BIT2_OFF,
   171            Bit3        : BIT3_OFF,
   172            Bit4        : BIT4_OFF,
   173            Bit5        : BIT5_OFF,
   174            Bit6        : BIT6_OFF,
   175            Bit7        : BIT7_OFF
   176        };
   177
   178        /*! Port 2 Resistor Enable Register */
   179        config GpioBits8PxRen_t P2REN = {
   180            Bit0        : BIT0_OFF,
   181            Bit1        : BIT1_OFF,
   182            Bit2        : BIT2_OFF,
   183            Bit3        : BIT3_OFF,
   184            Bit4        : BIT4_OFF,
   185            Bit5        : BIT5_OFF,
   186            Bit6        : BIT6_OFF,
   187            Bit7        : BIT7_OFF
   188        };
   189    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x32

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    35
    36    /*!
    37     *  ======== GPIO for MSP430G2x32 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2x32 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral.
    44         */
    45        create(USI.Instance usi, ADC10.Instance adc10);
    46
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50
    51        /*! @_nodoc */
    52        config ADC10.Instance adc10;
    53
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430G2x32 device, there are 8 + 8 = 16 pins total.
    57        */
    58
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        /* TODO: For this device the config variable definition has been moved into the
    62         * corresponding XS file due to its size. This needs a more consistent solution. */
    63        config DevicePin_t devicePins[2][8];
    64
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    67
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1SEL2", regForceSet : false },
    74            { register : "P1DIR" , regForceSet : true  },
    75            { register : "P1REN" , regForceSet : false },
    76            { register : "P1IES" , regForceSet : true },
    77            { register : "P1IFG" , regForceSet : true },
    78            { register : "P1IE"  , regForceSet : false },
    79            { register : "P2OUT" , regForceSet : true  },
    80            { register : "P2SEL" , regForceSet : false },
    81            { register : "P2SEL2", regForceSet : false },
    82            { register : "P2DIR" , regForceSet : true  },
    83            { register : "P2REN" , regForceSet : false },
    84            { register : "P2IES" , regForceSet : true },
    85            { register : "P2IFG" , regForceSet : true },
    86            { register : "P2IE"  , regForceSet : false }
    87        ];
    88
    89        /*
    90         *  GPIO Digital I/O Registers
    91         *
    92         *  One GIPO instance defines the configuration of an entire,
    93         *  8-bit wide digital I/O port.
    94         */
    95
    96        /*! Port 1 Output Register */
    97        config GpioBits8PxOut_t P1OUT = {
    98            Bit0        : BIT0_OFF,
    99            Bit1        : BIT1_OFF,
   100            Bit2        : BIT2_OFF,
   101            Bit3        : BIT3_OFF,
   102            Bit4        : BIT4_OFF,
   103            Bit5        : BIT5_OFF,
   104            Bit6        : BIT6_OFF,
   105            Bit7        : BIT7_OFF
   106        };
   107
   108        /*! Port 1 Port Select Register */
   109        config GpioBits8PxSel_t P1SEL = {
   110            Bit0        : BIT0_OFF,
   111            Bit1        : BIT1_OFF,
   112            Bit2        : BIT2_OFF,
   113            Bit3        : BIT3_OFF,
   114            Bit4        : BIT4_OFF,
   115            Bit5        : BIT5_OFF,
   116            Bit6        : BIT6_OFF,
   117            Bit7        : BIT7_OFF
   118        };
   119
   120        /*! Port 1 Port Select 2 Register */
   121        config GpioBits8PxSel2_t P1SEL2 = {
   122            Bit0        : BIT0_OFF,
   123            Bit1        : BIT1_OFF,
   124            Bit2        : BIT2_OFF,
   125            Bit3        : BIT3_OFF,
   126            Bit4        : BIT4_OFF,
   127            Bit5        : BIT5_OFF,
   128            Bit6        : BIT6_OFF,
   129            Bit7        : BIT7_OFF
   130        };
   131
   132        /*! Port 1 Direction Register */
   133        config GpioBits8PxDir_t P1DIR = {
   134            Bit0        : BIT0_OFF,
   135            Bit1        : BIT1_OFF,
   136            Bit2        : BIT2_OFF,
   137            Bit3        : BIT3_OFF,
   138            Bit4        : BIT4_OFF,
   139            Bit5        : BIT5_OFF,
   140            Bit6        : BIT6_OFF,
   141            Bit7        : BIT7_OFF
   142        };
   143
   144        /*! Port 1 Resistor Enable Register */
   145        config GpioBits8PxRen_t P1REN = {
   146            Bit0        : BIT0_OFF,
   147            Bit1        : BIT1_OFF,
   148            Bit2        : BIT2_OFF,
   149            Bit3        : BIT3_OFF,
   150            Bit4        : BIT4_OFF,
   151            Bit5        : BIT5_OFF,
   152            Bit6        : BIT6_OFF,
   153            Bit7        : BIT7_OFF
   154        };
   155
   156        /*! Port 2 Output Register */
   157        config GpioBits8PxOut_t P2OUT = {
   158            Bit0        : BIT0_OFF,
   159            Bit1        : BIT1_OFF,
   160            Bit2        : BIT2_OFF,
   161            Bit3        : BIT3_OFF,
   162            Bit4        : BIT4_OFF,
   163            Bit5        : BIT5_OFF,
   164            Bit6        : BIT6_OFF,
   165            Bit7        : BIT7_OFF
   166        };
   167
   168        /*! Port 2 Port Select Register */
   169        config GpioBits8PxSel_t P2SEL = {
   170            Bit0        : BIT0_OFF,
   171            Bit1        : BIT1_OFF,
   172            Bit2        : BIT2_OFF,
   173            Bit3        : BIT3_OFF,
   174            Bit4        : BIT4_OFF,
   175            Bit5        : BIT5_OFF,
   176            Bit6        : BIT6,         /* POR default for all 2xx devices */
   177            Bit7        : BIT7          /* POR default for all 2xx devices */
   178        };
   179
   180        /*! Port 2 Port Select 2 Register */
   181        config GpioBits8PxSel2_t P2SEL2 = {
   182            Bit0        : BIT0_OFF,
   183            Bit1        : BIT1_OFF,
   184            Bit2        : BIT2_OFF,
   185            Bit3        : BIT3_OFF,
   186            Bit4        : BIT4_OFF,
   187            Bit5        : BIT5_OFF,
   188            Bit6        : BIT6_OFF,
   189            Bit7        : BIT7_OFF
   190        };
   191
   192        /*! Port 2 Direction Register */
   193        config GpioBits8PxDir_t P2DIR = {
   194            Bit0        : BIT0_OFF,
   195            Bit1        : BIT1_OFF,
   196            Bit2        : BIT2_OFF,
   197            Bit3        : BIT3_OFF,
   198            Bit4        : BIT4_OFF,
   199            Bit5        : BIT5_OFF,
   200            Bit6        : BIT6_OFF,
   201            Bit7        : BIT7_OFF
   202        };
   203
   204        /*! Port 2 Resistor Enable Register */
   205        config GpioBits8PxRen_t P2REN = {
   206            Bit0        : BIT0_OFF,
   207            Bit1        : BIT1_OFF,
   208            Bit2        : BIT2_OFF,
   209            Bit3        : BIT3_OFF,
   210            Bit4        : BIT4_OFF,
   211            Bit5        : BIT5_OFF,
   212            Bit6        : BIT6_OFF,
   213            Bit7        : BIT7_OFF
   214        };
   215    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x33

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    34
    35    /*!
    36     *  ======== GPIO for MSP430G2x33 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430G2x33 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the ADC10
    44         *  instance.
    45         */
    46        create(ADC10.Instance adc10);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config ADC10.Instance adc10;
    51
    52       /*! Define an array to describe all device pins. The 1st dimension
    53        *  denotes the port, the second the pin on that port. On an
    54        *  MSP430G2x33 device, there are 3 x 8 = 24 pins total.
    55        */
    56
    57        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    58         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    59        /* TODO: For this device the config variable definition has been moved into the
    60         * corresponding XS file due to its size. This needs a more consistent solution. */
    61        config DevicePin_t devicePins[3][8];
    62
    63        /*! Implementation of Device Pin Functional Configuration */
    64        override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    65
    66        /*! Determine if each Register needs to be forced set or not */
    67        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    68        [
    69            { register : "P1OUT" , regForceSet : true  },
    70            { register : "P1SEL" , regForceSet : false },
    71            { register : "P1SEL2", regForceSet : false },
    72            { register : "P1DIR" , regForceSet : true  },
    73            { register : "P1REN" , regForceSet : false },
    74            { register : "P1IES" , regForceSet : true  },
    75            { register : "P1IFG" , regForceSet : true  },
    76            { register : "P1IE"  , regForceSet : false },
    77            { register : "P2OUT" , regForceSet : true  },
    78            { register : "P2SEL" , regForceSet : false },
    79            { register : "P2SEL2", regForceSet : false },
    80            { register : "P2DIR" , regForceSet : true  },
    81            { register : "P2REN" , regForceSet : false },
    82            { register : "P2IES" , regForceSet : true  },
    83            { register : "P2IFG" , regForceSet : true  },
    84            { register : "P2IE"  , regForceSet : false },
    85            { register : "P3OUT" , regForceSet : true  },
    86            { register : "P3SEL" , regForceSet : false },
    87            { register : "P3SEL2", regForceSet : false },
    88            { register : "P3DIR" , regForceSet : true  },
    89            { register : "P3REN" , regForceSet : false },
    90        ];
    91
    92        /*
    93         *  GPIO Digital I/O Registers
    94         *
    95         *  One GIPO instance defines the configuration of an entire,
    96         *  8-bit wide digital I/O port.
    97         */
    98
    99        /*! Port 1 Output Register */
   100        config GpioBits8PxOut_t P1OUT = {
   101            Bit0        : BIT0_OFF,
   102            Bit1        : BIT1_OFF,
   103            Bit2        : BIT2_OFF,
   104            Bit3        : BIT3_OFF,
   105            Bit4        : BIT4_OFF,
   106            Bit5        : BIT5_OFF,
   107            Bit6        : BIT6_OFF,
   108            Bit7        : BIT7_OFF
   109        };
   110
   111        /*! Port 1 Port Select Register */
   112        config GpioBits8PxSel_t P1SEL = {
   113            Bit0        : BIT0_OFF,
   114            Bit1        : BIT1_OFF,
   115            Bit2        : BIT2_OFF,
   116            Bit3        : BIT3_OFF,
   117            Bit4        : BIT4_OFF,
   118            Bit5        : BIT5_OFF,
   119            Bit6        : BIT6_OFF,
   120            Bit7        : BIT7_OFF
   121        };
   122
   123        /*! Port 1 Port Select 2 Register */
   124        config GpioBits8PxSel_t P1SEL2 = {
   125            Bit0        : BIT0_OFF,
   126            Bit1        : BIT1_OFF,
   127            Bit2        : BIT2_OFF,
   128            Bit3        : BIT3_OFF,
   129            Bit4        : BIT4_OFF,
   130            Bit5        : BIT5_OFF,
   131            Bit6        : BIT6_OFF,
   132            Bit7        : BIT7_OFF
   133        };
   134
   135        /*! Port 1 Direction Register */
   136        config GpioBits8PxDir_t P1DIR = {
   137            Bit0        : BIT0_OFF,
   138            Bit1        : BIT1_OFF,
   139            Bit2        : BIT2_OFF,
   140            Bit3        : BIT3_OFF,
   141            Bit4        : BIT4_OFF,
   142            Bit5        : BIT5_OFF,
   143            Bit6        : BIT6_OFF,
   144            Bit7        : BIT7_OFF
   145        };
   146
   147        /*! Port 1 Resistor Enable Register */
   148        config GpioBits8PxRen_t P1REN = {
   149            Bit0        : BIT0_OFF,
   150            Bit1        : BIT1_OFF,
   151            Bit2        : BIT2_OFF,
   152            Bit3        : BIT3_OFF,
   153            Bit4        : BIT4_OFF,
   154            Bit5        : BIT5_OFF,
   155            Bit6        : BIT6_OFF,
   156            Bit7        : BIT7_OFF
   157        };
   158
   159        /*! Port 2 Output Register */
   160        config GpioBits8PxOut_t P2OUT = {
   161            Bit0        : BIT0_OFF,
   162            Bit1        : BIT1_OFF,
   163            Bit2        : BIT2_OFF,
   164            Bit3        : BIT3_OFF,
   165            Bit4        : BIT4_OFF,
   166            Bit5        : BIT5_OFF,
   167            Bit6        : BIT6_OFF,
   168            Bit7        : BIT7_OFF
   169        };
   170
   171        /*! Port 2 Port Select Register */
   172        config GpioBits8PxSel_t P2SEL = {
   173            Bit0        : BIT0_OFF,
   174            Bit1        : BIT1_OFF,
   175            Bit2        : BIT2_OFF,
   176            Bit3        : BIT3_OFF,
   177            Bit4        : BIT4_OFF,
   178            Bit5        : BIT5_OFF,
   179            Bit6        : BIT6,         /* POR default for all 2xx devices */
   180            Bit7        : BIT7          /* POR default for all 2xx devices */
   181        };
   182
   183        /*! Port 2 Port Select 2 Register */
   184        config GpioBits8PxSel2_t P2SEL2 = {
   185            Bit0        : BIT0_OFF,
   186            Bit1        : BIT1_OFF,
   187            Bit2        : BIT2_OFF,
   188            Bit3        : BIT3_OFF,
   189            Bit4        : BIT4_OFF,
   190            Bit5        : BIT5_OFF,
   191            Bit6        : BIT6_OFF,
   192            Bit7        : BIT7_OFF
   193        };
   194
   195        /*! Port 2 Direction Register */
   196        config GpioBits8PxDir_t P2DIR = {
   197            Bit0        : BIT0_OFF,
   198            Bit1        : BIT1_OFF,
   199            Bit2        : BIT2_OFF,
   200            Bit3        : BIT3_OFF,
   201            Bit4        : BIT4_OFF,
   202            Bit5        : BIT5_OFF,
   203            Bit6        : BIT6_OFF,
   204            Bit7        : BIT7_OFF
   205        };
   206
   207        /*! Port 2 Resistor Enable Register */
   208        config GpioBits8PxRen_t P2REN = {
   209            Bit0        : BIT0_OFF,
   210            Bit1        : BIT1_OFF,
   211            Bit2        : BIT2_OFF,
   212            Bit3        : BIT3_OFF,
   213            Bit4        : BIT4_OFF,
   214            Bit5        : BIT5_OFF,
   215            Bit6        : BIT6_OFF,
   216            Bit7        : BIT7_OFF
   217        };
   218
   219        /*! Port 3 Output Register */
   220        config GpioBits8PxOut_t P3OUT = {
   221            Bit0        : BIT0_OFF,
   222            Bit1        : BIT1_OFF,
   223            Bit2        : BIT2_OFF,
   224            Bit3        : BIT3_OFF,
   225            Bit4        : BIT4_OFF,
   226            Bit5        : BIT5_OFF,
   227            Bit6        : BIT6_OFF,
   228            Bit7        : BIT7_OFF
   229        };
   230
   231        /*! Port 3 Port Select Register */
   232        config GpioBits8PxSel_t P3SEL = {
   233            Bit0        : BIT0_OFF,
   234            Bit1        : BIT1_OFF,
   235            Bit2        : BIT2_OFF,
   236            Bit3        : BIT3_OFF,
   237            Bit4        : BIT4_OFF,
   238            Bit5        : BIT5_OFF,
   239            Bit6        : BIT6_OFF,
   240            Bit7        : BIT7_OFF
   241        };
   242
   243        /*! Port 3 Port Select 2 Register */
   244        config GpioBits8PxSel2_t P3SEL2 = {
   245            Bit0        : BIT0_OFF,
   246            Bit1        : BIT1_OFF,
   247            Bit2        : BIT2_OFF,
   248            Bit3        : BIT3_OFF,
   249            Bit4        : BIT4_OFF,
   250            Bit5        : BIT5_OFF,
   251            Bit6        : BIT6_OFF,
   252            Bit7        : BIT7_OFF
   253        };
   254
   255        /*! Port 3 Direction Register */
   256        config GpioBits8PxDir_t P3DIR = {
   257            Bit0        : BIT0_OFF,
   258            Bit1        : BIT1_OFF,
   259            Bit2        : BIT2_OFF,
   260            Bit3        : BIT3_OFF,
   261            Bit4        : BIT4_OFF,
   262            Bit5        : BIT5_OFF,
   263            Bit6        : BIT6_OFF,
   264            Bit7        : BIT7_OFF
   265        };
   266
   267        /*! Port 3 Resistor Enable Register */
   268        config GpioBits8PxRen_t P3REN = {
   269            Bit0        : BIT0_OFF,
   270            Bit1        : BIT1_OFF,
   271            Bit2        : BIT2_OFF,
   272            Bit3        : BIT3_OFF,
   273            Bit4        : BIT4_OFF,
   274            Bit5        : BIT5_OFF,
   275            Bit6        : BIT6_OFF,
   276            Bit7        : BIT7_OFF
   277        };
   278    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x44

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    34    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    35
    36    /*!
    37     *  ======== GPIO for MSP430G2x44 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2x44 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral. Use a customized
    44         *  init function so that we can get access to the ADC10
    45         *  and BCS+ instances.
    46         */
    47        create(ADC10.Instance adc10, BCSplus.Instance clock);
    48
    49    instance:
    50        /*! @_nodoc */
    51        config ADC10.Instance adc10;
    52
    53        /*! @_nodoc */
    54        config BCSplus.Instance clock;
    55
    56        /*! Define an array to describe all device pins. The 1st dimension
    57         *  denotes the port, the second the pin on that port. On an
    58         *  MSP430G2x44 device, there are 4 x 8 = 32 pins total.
    59         */
    60
    61        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    62         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    63        readonly config DevicePin_t devicePins[4][8];
    64
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[4][8];
    67
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1DIR" , regForceSet : true  },
    74            { register : "P1REN" , regForceSet : false },
    75            { register : "P1IES" , regForceSet : true },
    76            { register : "P1IFG" , regForceSet : true },
    77            { register : "P1IE"  , regForceSet : false },
    78            { register : "P2OUT" , regForceSet : true  },
    79            { register : "P2SEL" , regForceSet : false },
    80            { register : "P2DIR" , regForceSet : true  },
    81            { register : "P2REN" , regForceSet : false },
    82            { register : "P2IES" , regForceSet : true },
    83            { register : "P2IFG" , regForceSet : true },
    84            { register : "P2IE"  , regForceSet : false },
    85            { register : "P3OUT" , regForceSet : true  },
    86            { register : "P3SEL" , regForceSet : false },
    87            { register : "P3DIR" , regForceSet : true  },
    88            { register : "P3REN" , regForceSet : false },
    89            { register : "P4OUT" , regForceSet : true  },
    90            { register : "P4SEL" , regForceSet : false },
    91            { register : "P4DIR" , regForceSet : true  },
    92            { register : "P4REN" , regForceSet : false }
    93        ];
    94
    95        /*
    96         *  GPIO Digital I/O Registers
    97         *
    98         *  One GIPO instance defines the configuration of an entire,
    99         *  8-bit wide digital I/O port.
   100         */
   101
   102        /*! Port 1 Output Register */
   103        config GpioBits8PxOut_t P1OUT = {
   104            Bit0        : BIT0_OFF,
   105            Bit1        : BIT1_OFF,
   106            Bit2        : BIT2_OFF,
   107            Bit3        : BIT3_OFF,
   108            Bit4        : BIT4_OFF,
   109            Bit5        : BIT5_OFF,
   110            Bit6        : BIT6_OFF,
   111            Bit7        : BIT7_OFF
   112        };
   113
   114        /*! Port 1 Port Select Register */
   115        config GpioBits8PxSel_t P1SEL = {
   116            Bit0        : BIT0_OFF,
   117            Bit1        : BIT1_OFF,
   118            Bit2        : BIT2_OFF,
   119            Bit3        : BIT3_OFF,
   120            Bit4        : BIT4_OFF,
   121            Bit5        : BIT5_OFF,
   122            Bit6        : BIT6_OFF,
   123            Bit7        : BIT7_OFF
   124        };
   125
   126        /*! Port 1 Direction Register */
   127        config GpioBits8PxDir_t P1DIR = {
   128            Bit0        : BIT0_OFF,
   129            Bit1        : BIT1_OFF,
   130            Bit2        : BIT2_OFF,
   131            Bit3        : BIT3_OFF,
   132            Bit4        : BIT4_OFF,
   133            Bit5        : BIT5_OFF,
   134            Bit6        : BIT6_OFF,
   135            Bit7        : BIT7_OFF
   136        };
   137
   138        /*! Port 1 Resistor Enable Register */
   139        config GpioBits8PxRen_t P1REN = {
   140            Bit0        : BIT0_OFF,
   141            Bit1        : BIT1_OFF,
   142            Bit2        : BIT2_OFF,
   143            Bit3        : BIT3_OFF,
   144            Bit4        : BIT4_OFF,
   145            Bit5        : BIT5_OFF,
   146            Bit6        : BIT6_OFF,
   147            Bit7        : BIT7_OFF
   148        };
   149
   150        /*! Port 2 Output Register */
   151        config GpioBits8PxOut_t P2OUT = {
   152            Bit0        : BIT0_OFF,
   153            Bit1        : BIT1_OFF,
   154            Bit2        : BIT2_OFF,
   155            Bit3        : BIT3_OFF,
   156            Bit4        : BIT4_OFF,
   157            Bit5        : BIT5_OFF,
   158            Bit6        : BIT6_OFF,
   159            Bit7        : BIT7_OFF
   160        };
   161
   162        /*! Port 2 Port Select Register */
   163        config GpioBits8PxSel_t P2SEL = {
   164            Bit0        : BIT0_OFF,
   165            Bit1        : BIT1_OFF,
   166            Bit2        : BIT2_OFF,
   167            Bit3        : BIT3_OFF,
   168            Bit4        : BIT4_OFF,
   169            Bit5        : BIT5_OFF,
   170            Bit6        : BIT6,         /* POR default for all 2xx devices */
   171            Bit7        : BIT7          /* POR default for all 2xx devices */
   172        };
   173
   174        /*! Port 2 Direction Register */
   175        config GpioBits8PxDir_t P2DIR = {
   176            Bit0        : BIT0_OFF,
   177            Bit1        : BIT1_OFF,
   178            Bit2        : BIT2_OFF,
   179            Bit3        : BIT3_OFF,
   180            Bit4        : BIT4_OFF,
   181            Bit5        : BIT5_OFF,
   182            Bit6        : BIT6_OFF,
   183            Bit7        : BIT7_OFF
   184        };
   185
   186        /*! Port 2 Resistor Enable Register */
   187        config GpioBits8PxRen_t P2REN = {
   188            Bit0        : BIT0_OFF,
   189            Bit1        : BIT1_OFF,
   190            Bit2        : BIT2_OFF,
   191            Bit3        : BIT3_OFF,
   192            Bit4        : BIT4_OFF,
   193            Bit5        : BIT5_OFF,
   194            Bit6        : BIT6_OFF,
   195            Bit7        : BIT7_OFF
   196        };
   197
   198        /*! Port 3 Output Register */
   199        config GpioBits8PxOut_t P3OUT = {
   200            Bit0        : BIT0_OFF,
   201            Bit1        : BIT1_OFF,
   202            Bit2        : BIT2_OFF,
   203            Bit3        : BIT3_OFF,
   204            Bit4        : BIT4_OFF,
   205            Bit5        : BIT5_OFF,
   206            Bit6        : BIT6_OFF,
   207            Bit7        : BIT7_OFF
   208        };
   209
   210        /*! Port 3 Port Select Register */
   211        config GpioBits8PxSel_t P3SEL = {
   212            Bit0        : BIT0_OFF,
   213            Bit1        : BIT1_OFF,
   214            Bit2        : BIT2_OFF,
   215            Bit3        : BIT3_OFF,
   216            Bit4        : BIT4_OFF,
   217            Bit5        : BIT5_OFF,
   218            Bit6        : BIT6_OFF,
   219            Bit7        : BIT7_OFF
   220        };
   221
   222        /*! Port 3 Direction Register */
   223        config GpioBits8PxDir_t P3DIR = {
   224            Bit0        : BIT0_OFF,
   225            Bit1        : BIT1_OFF,
   226            Bit2        : BIT2_OFF,
   227            Bit3        : BIT3_OFF,
   228            Bit4        : BIT4_OFF,
   229            Bit5        : BIT5_OFF,
   230            Bit6        : BIT6_OFF,
   231            Bit7        : BIT7_OFF
   232        };
   233
   234        /*! Port 3 Resistor Enable Register */
   235        config GpioBits8PxRen_t P3REN = {
   236            Bit0        : BIT0_OFF,
   237            Bit1        : BIT1_OFF,
   238            Bit2        : BIT2_OFF,
   239            Bit3        : BIT3_OFF,
   240            Bit4        : BIT4_OFF,
   241            Bit5        : BIT5_OFF,
   242            Bit6        : BIT6_OFF,
   243            Bit7        : BIT7_OFF
   244        };
   245
   246        /*! Port 4 Output Register */
   247        config GpioBits8PxOut_t P4OUT = {
   248            Bit0        : BIT0_OFF,
   249            Bit1        : BIT1_OFF,
   250            Bit2        : BIT2_OFF,
   251            Bit3        : BIT3_OFF,
   252            Bit4        : BIT4_OFF,
   253            Bit5        : BIT5_OFF,
   254            Bit6        : BIT6_OFF,
   255            Bit7        : BIT7_OFF
   256        };
   257
   258        /*! Port 4 Port Select Register */
   259        config GpioBits8PxSel_t P4SEL = {
   260            Bit0        : BIT0_OFF,
   261            Bit1        : BIT1_OFF,
   262            Bit2        : BIT2_OFF,
   263            Bit3        : BIT3_OFF,
   264            Bit4        : BIT4_OFF,
   265            Bit5        : BIT5_OFF,
   266            Bit6        : BIT6_OFF,
   267            Bit7        : BIT7_OFF
   268        };
   269
   270        /*! Port 4 Direction Register */
   271        config GpioBits8PxDir_t P4DIR = {
   272            Bit0        : BIT0_OFF,
   273            Bit1        : BIT1_OFF,
   274            Bit2        : BIT2_OFF,
   275            Bit3        : BIT3_OFF,
   276            Bit4        : BIT4_OFF,
   277            Bit5        : BIT5_OFF,
   278            Bit6        : BIT6_OFF,
   279            Bit7        : BIT7_OFF
   280        };
   281
   282        /*! Port 4 Resistor Enable Register */
   283        config GpioBits8PxRen_t P4REN = {
   284            Bit0        : BIT0_OFF,
   285            Bit1        : BIT1_OFF,
   286            Bit2        : BIT2_OFF,
   287            Bit3        : BIT3_OFF,
   288            Bit4        : BIT4_OFF,
   289            Bit5        : BIT5_OFF,
   290            Bit6        : BIT6_OFF,
   291            Bit7        : BIT7_OFF
   292        };
   293    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x52

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    36
    37    /*!
    38     *  ======== GPIO for MSP430G2x52 ========
    39     *  MSP430 General Purpose Input Output Ports
    40     */
    41    metaonly module GPIO_MSP430G2x52 inherits IGPIO {
    42        /*!
    43         *  ======== create ========
    44         *  Create an instance of these peripherals.
    45         */
    46        create(USI.Instance usi, Comparator.Instance comparator, ADC10.Instance adc10);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config USI.Instance usi;
    51
    52        /*! @_nodoc */
    53        config Comparator.Instance comparator;
    54
    55        /*! @_nodoc */
    56        config ADC10.Instance adc10;
    57
    58       /*! Define an array to describe all device pins. The 1st dimension
    59        *  denotes the port, the second the pin on that port. On an
    60        *  MSP430G2x52 device, there are 8 + 8 = 16 pins total.
    61        */
    62
    63        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    64         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    65        /* TODO: For this device the config variable definition has been moved into the
    66         * corresponding XS file due to its size. This needs a more consistent solution. */
    67        config DevicePin_t devicePins[2][8];
    68
    69        /*! Implementation of Device Pin Functional Configuration */
    70        override config DevicePinFunctionSetting_t devicePinSetting[2][8];
    71
    72        /*! Determine if each Register needs to be forced set or not */
    73        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    74        [
    75            { register : "P1OUT" , regForceSet : true  },
    76            { register : "P1SEL" , regForceSet : false },
    77            { register : "P1SEL2", regForceSet : false },
    78            { register : "P1DIR" , regForceSet : true  },
    79            { register : "P1REN" , regForceSet : false },
    80            { register : "P1IES" , regForceSet : true  },
    81            { register : "P1IFG" , regForceSet : true  },
    82            { register : "P1IE"  , regForceSet : false },
    83            { register : "P2OUT" , regForceSet : true  },
    84            { register : "P2SEL" , regForceSet : false },
    85            { register : "P2SEL2", regForceSet : false },
    86            { register : "P2DIR" , regForceSet : true  },
    87            { register : "P2REN" , regForceSet : false },
    88            { register : "P2IES" , regForceSet : true  },
    89            { register : "P2IFG" , regForceSet : true  },
    90            { register : "P2IE"  , regForceSet : false }
    91        ];
    92
    93        /*
    94         *  GPIO Digital I/O Registers
    95         *
    96         *  One GIPO instance defines the configuration of an entire,
    97         *  8-bit wide digital I/O port.
    98         */
    99
   100        /*! Port 1 Output Register */
   101        config GpioBits8PxOut_t P1OUT = {
   102            Bit0        : BIT0_OFF,
   103            Bit1        : BIT1_OFF,
   104            Bit2        : BIT2_OFF,
   105            Bit3        : BIT3_OFF,
   106            Bit4        : BIT4_OFF,
   107            Bit5        : BIT5_OFF,
   108            Bit6        : BIT6_OFF,
   109            Bit7        : BIT7_OFF
   110        };
   111
   112        /*! Port 1 Port Select Register */
   113        config GpioBits8PxSel_t P1SEL = {
   114            Bit0        : BIT0_OFF,
   115            Bit1        : BIT1_OFF,
   116            Bit2        : BIT2_OFF,
   117            Bit3        : BIT3_OFF,
   118            Bit4        : BIT4_OFF,
   119            Bit5        : BIT5_OFF,
   120            Bit6        : BIT6_OFF,
   121            Bit7        : BIT7_OFF
   122        };
   123
   124        /*! Port 1 Port Select 2 Register */
   125        config GpioBits8PxSel2_t P1SEL2 = {
   126            Bit0        : BIT0_OFF,
   127            Bit1        : BIT1_OFF,
   128            Bit2        : BIT2_OFF,
   129            Bit3        : BIT3_OFF,
   130            Bit4        : BIT4_OFF,
   131            Bit5        : BIT5_OFF,
   132            Bit6        : BIT6_OFF,
   133            Bit7        : BIT7_OFF
   134        };
   135
   136        /*! Port 1 Direction Register */
   137        config GpioBits8PxDir_t P1DIR = {
   138            Bit0        : BIT0_OFF,
   139            Bit1        : BIT1_OFF,
   140            Bit2        : BIT2_OFF,
   141            Bit3        : BIT3_OFF,
   142            Bit4        : BIT4_OFF,
   143            Bit5        : BIT5_OFF,
   144            Bit6        : BIT6_OFF,
   145            Bit7        : BIT7_OFF
   146        };
   147
   148        /*! Port 1 Resistor Enable Register */
   149        config GpioBits8PxRen_t P1REN = {
   150            Bit0        : BIT0_OFF,
   151            Bit1        : BIT1_OFF,
   152            Bit2        : BIT2_OFF,
   153            Bit3        : BIT3_OFF,
   154            Bit4        : BIT4_OFF,
   155            Bit5        : BIT5_OFF,
   156            Bit6        : BIT6_OFF,
   157            Bit7        : BIT7_OFF
   158        };
   159
   160        /*! Port 2 Output Register */
   161        config GpioBits8PxOut_t P2OUT = {
   162            Bit0        : BIT0_OFF,
   163            Bit1        : BIT1_OFF,
   164            Bit2        : BIT2_OFF,
   165            Bit3        : BIT3_OFF,
   166            Bit4        : BIT4_OFF,
   167            Bit5        : BIT5_OFF,
   168            Bit6        : BIT6_OFF,
   169            Bit7        : BIT7_OFF
   170        };
   171
   172        /*! Port 2 Port Select Register */
   173        config GpioBits8PxSel_t P2SEL = {
   174            Bit0        : BIT0_OFF,
   175            Bit1        : BIT1_OFF,
   176            Bit2        : BIT2_OFF,
   177            Bit3        : BIT3_OFF,
   178            Bit4        : BIT4_OFF,
   179            Bit5        : BIT5_OFF,
   180            Bit6        : BIT6,         /* POR default for all 2xx devices */
   181            Bit7        : BIT7          /* POR default for all 2xx devices */
   182        };
   183
   184        /*! Port 2 Port Select 2 Register */
   185        config GpioBits8PxSel2_t P2SEL2 = {
   186            Bit0        : BIT0_OFF,
   187            Bit1        : BIT1_OFF,
   188            Bit2        : BIT2_OFF,
   189            Bit3        : BIT3_OFF,
   190            Bit4        : BIT4_OFF,
   191            Bit5        : BIT5_OFF,
   192            Bit6        : BIT6_OFF,
   193            Bit7        : BIT7_OFF
   194        };
   195
   196        /*! Port 2 Direction Register */
   197        config GpioBits8PxDir_t P2DIR = {
   198            Bit0        : BIT0_OFF,
   199            Bit1        : BIT1_OFF,
   200            Bit2        : BIT2_OFF,
   201            Bit3        : BIT3_OFF,
   202            Bit4        : BIT4_OFF,
   203            Bit5        : BIT5_OFF,
   204            Bit6        : BIT6_OFF,
   205            Bit7        : BIT7_OFF
   206        };
   207
   208        /*! Port 2 Resistor Enable Register */
   209        config GpioBits8PxRen_t P2REN = {
   210            Bit0        : BIT0_OFF,
   211            Bit1        : BIT1_OFF,
   212            Bit2        : BIT2_OFF,
   213            Bit3        : BIT3_OFF,
   214            Bit4        : BIT4_OFF,
   215            Bit5        : BIT5_OFF,
   216            Bit6        : BIT6_OFF,
   217            Bit7        : BIT7_OFF
   218        };
   219    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x53

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    34    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    35
    36    /*!
    37     *  ======== GPIO for MSP430G2x53 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2x53 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral. Use a customized
    44         *  init function so that we can get access to the ADC10 and comparator
    45         *  instances.
    46         */
    47        create(ADC10.Instance adc10, Comparator.Instance comparator);
    48
    49    instance:
    50        /*! @_nodoc */
    51        config ADC10.Instance adc10;
    52
    53        /*! @_nodoc */
    54        config Comparator.Instance comparator;
    55
    56       /*! Define an array to describe all device pins. The 1st dimension
    57        *  denotes the port, the second the pin on that port. On an
    58        *  MSP430G2x53 device, there are 3 x 8 = 24 pins total.
    59        */
    60
    61        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    62         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    63        /* TODO: For this device the config variable definition has been moved into the
    64         * corresponding XS file due to its size. This needs a more consistent solution. */
    65        config DevicePin_t devicePins[3][8];
    66
    67        /*! Implementation of Device Pin Functional Configuration */
    68        override config DevicePinFunctionSetting_t devicePinSetting[3][8];
    69
    70        /*! Determine if each Register needs to be forced set or not */
    71        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    72        [
    73            { register : "P1OUT" , regForceSet : true  },
    74            { register : "P1SEL" , regForceSet : false },
    75            { register : "P1SEL2", regForceSet : false },
    76            { register : "P1DIR" , regForceSet : true  },
    77            { register : "P1REN" , regForceSet : false },
    78            { register : "P1IES" , regForceSet : true  },
    79            { register : "P1IFG" , regForceSet : true  },
    80            { register : "P1IE"  , regForceSet : false },
    81            { register : "P2OUT" , regForceSet : true  },
    82            { register : "P2SEL" , regForceSet : false },
    83            { register : "P2SEL2", regForceSet : false },
    84            { register : "P2DIR" , regForceSet : true  },
    85            { register : "P2REN" , regForceSet : false },
    86            { register : "P2IES" , regForceSet : true  },
    87            { register : "P2IFG" , regForceSet : true  },
    88            { register : "P2IE"  , regForceSet : false },
    89            { register : "P3OUT" , regForceSet : true  },
    90            { register : "P3SEL" , regForceSet : false },
    91            { register : "P3SEL2", regForceSet : false },
    92            { register : "P3DIR" , regForceSet : true  },
    93            { register : "P3REN" , regForceSet : false },
    94        ];
    95
    96        /*
    97         *  GPIO Digital I/O Registers
    98         *
    99         *  One GIPO instance defines the configuration of an entire,
   100         *  8-bit wide digital I/O port.
   101         */
   102
   103        /*! Port 1 Output Register */
   104        config GpioBits8PxOut_t P1OUT = {
   105            Bit0        : BIT0_OFF,
   106            Bit1        : BIT1_OFF,
   107            Bit2        : BIT2_OFF,
   108            Bit3        : BIT3_OFF,
   109            Bit4        : BIT4_OFF,
   110            Bit5        : BIT5_OFF,
   111            Bit6        : BIT6_OFF,
   112            Bit7        : BIT7_OFF
   113        };
   114
   115        /*! Port 1 Port Select Register */
   116        config GpioBits8PxSel_t P1SEL = {
   117            Bit0        : BIT0_OFF,
   118            Bit1        : BIT1_OFF,
   119            Bit2        : BIT2_OFF,
   120            Bit3        : BIT3_OFF,
   121            Bit4        : BIT4_OFF,
   122            Bit5        : BIT5_OFF,
   123            Bit6        : BIT6_OFF,
   124            Bit7        : BIT7_OFF
   125        };
   126
   127        /*! Port 1 Port Select 2 Register */
   128        config GpioBits8PxSel_t P1SEL2 = {
   129            Bit0        : BIT0_OFF,
   130            Bit1        : BIT1_OFF,
   131            Bit2        : BIT2_OFF,
   132            Bit3        : BIT3_OFF,
   133            Bit4        : BIT4_OFF,
   134            Bit5        : BIT5_OFF,
   135            Bit6        : BIT6_OFF,
   136            Bit7        : BIT7_OFF
   137        };
   138
   139        /*! Port 1 Direction Register */
   140        config GpioBits8PxDir_t P1DIR = {
   141            Bit0        : BIT0_OFF,
   142            Bit1        : BIT1_OFF,
   143            Bit2        : BIT2_OFF,
   144            Bit3        : BIT3_OFF,
   145            Bit4        : BIT4_OFF,
   146            Bit5        : BIT5_OFF,
   147            Bit6        : BIT6_OFF,
   148            Bit7        : BIT7_OFF
   149        };
   150
   151        /*! Port 1 Resistor Enable Register */
   152        config GpioBits8PxRen_t P1REN = {
   153            Bit0        : BIT0_OFF,
   154            Bit1        : BIT1_OFF,
   155            Bit2        : BIT2_OFF,
   156            Bit3        : BIT3_OFF,
   157            Bit4        : BIT4_OFF,
   158            Bit5        : BIT5_OFF,
   159            Bit6        : BIT6_OFF,
   160            Bit7        : BIT7_OFF
   161        };
   162
   163        /*! Port 2 Output Register */
   164        config GpioBits8PxOut_t P2OUT = {
   165            Bit0        : BIT0_OFF,
   166            Bit1        : BIT1_OFF,
   167            Bit2        : BIT2_OFF,
   168            Bit3        : BIT3_OFF,
   169            Bit4        : BIT4_OFF,
   170            Bit5        : BIT5_OFF,
   171            Bit6        : BIT6_OFF,
   172            Bit7        : BIT7_OFF
   173        };
   174
   175        /*! Port 2 Port Select Register */
   176        config GpioBits8PxSel_t P2SEL = {
   177            Bit0        : BIT0_OFF,
   178            Bit1        : BIT1_OFF,
   179            Bit2        : BIT2_OFF,
   180            Bit3        : BIT3_OFF,
   181            Bit4        : BIT4_OFF,
   182            Bit5        : BIT5_OFF,
   183            Bit6        : BIT6,         /* POR default for all 2xx devices */
   184            Bit7        : BIT7          /* POR default for all 2xx devices */
   185        };
   186
   187        /*! Port 2 Port Select 2 Register */
   188        config GpioBits8PxSel2_t P2SEL2 = {
   189            Bit0        : BIT0_OFF,
   190            Bit1        : BIT1_OFF,
   191            Bit2        : BIT2_OFF,
   192            Bit3        : BIT3_OFF,
   193            Bit4        : BIT4_OFF,
   194            Bit5        : BIT5_OFF,
   195            Bit6        : BIT6_OFF,
   196            Bit7        : BIT7_OFF
   197        };
   198
   199        /*! Port 2 Direction Register */
   200        config GpioBits8PxDir_t P2DIR = {
   201            Bit0        : BIT0_OFF,
   202            Bit1        : BIT1_OFF,
   203            Bit2        : BIT2_OFF,
   204            Bit3        : BIT3_OFF,
   205            Bit4        : BIT4_OFF,
   206            Bit5        : BIT5_OFF,
   207            Bit6        : BIT6_OFF,
   208            Bit7        : BIT7_OFF
   209        };
   210
   211        /*! Port 2 Resistor Enable Register */
   212        config GpioBits8PxRen_t P2REN = {
   213            Bit0        : BIT0_OFF,
   214            Bit1        : BIT1_OFF,
   215            Bit2        : BIT2_OFF,
   216            Bit3        : BIT3_OFF,
   217            Bit4        : BIT4_OFF,
   218            Bit5        : BIT5_OFF,
   219            Bit6        : BIT6_OFF,
   220            Bit7        : BIT7_OFF
   221        };
   222
   223        /*! Port 3 Output Register */
   224        config GpioBits8PxOut_t P3OUT = {
   225            Bit0        : BIT0_OFF,
   226            Bit1        : BIT1_OFF,
   227            Bit2        : BIT2_OFF,
   228            Bit3        : BIT3_OFF,
   229            Bit4        : BIT4_OFF,
   230            Bit5        : BIT5_OFF,
   231            Bit6        : BIT6_OFF,
   232            Bit7        : BIT7_OFF
   233        };
   234
   235        /*! Port 3 Port Select Register */
   236        config GpioBits8PxSel_t P3SEL = {
   237            Bit0        : BIT0_OFF,
   238            Bit1        : BIT1_OFF,
   239            Bit2        : BIT2_OFF,
   240            Bit3        : BIT3_OFF,
   241            Bit4        : BIT4_OFF,
   242            Bit5        : BIT5_OFF,
   243            Bit6        : BIT6_OFF,
   244            Bit7        : BIT7_OFF
   245        };
   246
   247        /*! Port 3 Port Select 2 Register */
   248        config GpioBits8PxSel2_t P3SEL2 = {
   249            Bit0        : BIT0_OFF,
   250            Bit1        : BIT1_OFF,
   251            Bit2        : BIT2_OFF,
   252            Bit3        : BIT3_OFF,
   253            Bit4        : BIT4_OFF,
   254            Bit5        : BIT5_OFF,
   255            Bit6        : BIT6_OFF,
   256            Bit7        : BIT7_OFF
   257        };
   258
   259        /*! Port 3 Direction Register */
   260        config GpioBits8PxDir_t P3DIR = {
   261            Bit0        : BIT0_OFF,
   262            Bit1        : BIT1_OFF,
   263            Bit2        : BIT2_OFF,
   264            Bit3        : BIT3_OFF,
   265            Bit4        : BIT4_OFF,
   266            Bit5        : BIT5_OFF,
   267            Bit6        : BIT6_OFF,
   268            Bit7        : BIT7_OFF
   269        };
   270
   271        /*! Port 3 Resistor Enable Register */
   272        config GpioBits8PxRen_t P3REN = {
   273            Bit0        : BIT0_OFF,
   274            Bit1        : BIT1_OFF,
   275            Bit2        : BIT2_OFF,
   276            Bit3        : BIT3_OFF,
   277            Bit4        : BIT4_OFF,
   278            Bit5        : BIT5_OFF,
   279            Bit6        : BIT6_OFF,
   280            Bit7        : BIT7_OFF
   281        };
   282    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2x55

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    34    import ti.catalog.msp430.peripherals.clock.BCSplus as BCSplus;
    35
    36    /*!
    37     *  ======== GPIO for MSP430G2x55 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2x55 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral. Use a customized
    44         *  init function so that we can get access to the ADC10
    45         *  and BCS+ instances.
    46         */
    47        create(ADC10.Instance adc10, BCSplus.Instance clock);
    48
    49    instance:
    50        /*! @_nodoc */
    51        config ADC10.Instance adc10;
    52
    53        /*! @_nodoc */
    54        config BCSplus.Instance clock;
    55
    56       /*! Define an array to describe all device pins. The 1st dimension
    57        *  denotes the port, the second the pin on that port. On an
    58        *  MSP430G2x55 device, there are 4 x 8 = 64 pins total.
    59        */
    60
    61        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    62         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    63        /* TODO: For this device the config variable definition has been moved into the
    64         * corresponding XS file due to its size. This needs a more consistent solution. */
    65        config DevicePin_t devicePins[4][8];
    66
    67        /*! Implementation of Device Pin Functional Configuration */
    68        override config DevicePinFunctionSetting_t devicePinSetting[4][8];
    69
    70        /*! Determine if each Register needs to be forced set or not */
    71        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    72        [
    73            { register : "P1OUT" , regForceSet : true  },
    74            { register : "P1SEL" , regForceSet : false },
    75            { register : "P1SEL2" , regForceSet : false },
    76            { register : "P1DIR" , regForceSet : true  },
    77            { register : "P1REN" , regForceSet : false },
    78            { register : "P1IES" , regForceSet : true },
    79            { register : "P1IFG" , regForceSet : true },
    80            { register : "P1IE"  , regForceSet : false },
    81            { register : "P2OUT" , regForceSet : true  },
    82            { register : "P2SEL" , regForceSet : false },
    83            { register : "P2SEL2" , regForceSet : false },
    84            { register : "P2DIR" , regForceSet : true  },
    85            { register : "P2REN" , regForceSet : false },
    86            { register : "P2IES" , regForceSet : true },
    87            { register : "P2IFG" , regForceSet : true },
    88            { register : "P2IE"  , regForceSet : false },
    89            { register : "P3OUT" , regForceSet : true  },
    90            { register : "P3SEL" , regForceSet : false },
    91            { register : "P3SEL2" , regForceSet : false },
    92            { register : "P3DIR" , regForceSet : true  },
    93            { register : "P3REN" , regForceSet : false },
    94            { register : "P4OUT" , regForceSet : true  },
    95            { register : "P4SEL" , regForceSet : false },
    96            { register : "P4SEL2" , regForceSet : false },
    97            { register : "P4DIR" , regForceSet : true  },
    98            { register : "P4REN" , regForceSet : false },
    99        ];
   100
   101        /*
   102         *  GPIO Digital I/O Registers
   103         *
   104         *  One GIPO instance defines the configuration of an entire,
   105         *  8-bit wide digital I/O port.
   106         */
   107
   108        /*! Port 1 Output Register */
   109        config GpioBits8PxOut_t P1OUT = {
   110            Bit0        : BIT0_OFF,
   111            Bit1        : BIT1_OFF,
   112            Bit2        : BIT2_OFF,
   113            Bit3        : BIT3_OFF,
   114            Bit4        : BIT4_OFF,
   115            Bit5        : BIT5_OFF,
   116            Bit6        : BIT6_OFF,
   117            Bit7        : BIT7_OFF
   118        };
   119
   120        /*! Port 1 Port Select Register */
   121        config GpioBits8PxSel_t P1SEL = {
   122            Bit0        : BIT0_OFF,
   123            Bit1        : BIT1_OFF,
   124            Bit2        : BIT2_OFF,
   125            Bit3        : BIT3_OFF,
   126            Bit4        : BIT4_OFF,
   127            Bit5        : BIT5_OFF,
   128            Bit6        : BIT6_OFF,
   129            Bit7        : BIT7_OFF
   130        };
   131
   132        /*! Port 1 Direction Register */
   133        config GpioBits8PxDir_t P1DIR = {
   134            Bit0        : BIT0_OFF,
   135            Bit1        : BIT1_OFF,
   136            Bit2        : BIT2_OFF,
   137            Bit3        : BIT3_OFF,
   138            Bit4        : BIT4_OFF,
   139            Bit5        : BIT5_OFF,
   140            Bit6        : BIT6_OFF,
   141            Bit7        : BIT7_OFF
   142        };
   143
   144        /*! Port 1 Resistor Enable Register */
   145        config GpioBits8PxRen_t P1REN = {
   146            Bit0        : BIT0_OFF,
   147            Bit1        : BIT1_OFF,
   148            Bit2        : BIT2_OFF,
   149            Bit3        : BIT3_OFF,
   150            Bit4        : BIT4_OFF,
   151            Bit5        : BIT5_OFF,
   152            Bit6        : BIT6_OFF,
   153            Bit7        : BIT7_OFF
   154        };
   155
   156        /*! Port 2 Output Register */
   157        config GpioBits8PxOut_t P2OUT = {
   158            Bit0        : BIT0_OFF,
   159            Bit1        : BIT1_OFF,
   160            Bit2        : BIT2_OFF,
   161            Bit3        : BIT3_OFF,
   162            Bit4        : BIT4_OFF,
   163            Bit5        : BIT5_OFF,
   164            Bit6        : BIT6_OFF,
   165            Bit7        : BIT7_OFF
   166        };
   167
   168        /*! Port 2 Port Select Register */
   169        config GpioBits8PxSel_t P2SEL = {
   170            Bit0        : BIT0_OFF,
   171            Bit1        : BIT1_OFF,
   172            Bit2        : BIT2_OFF,
   173            Bit3        : BIT3_OFF,
   174            Bit4        : BIT4_OFF,
   175            Bit5        : BIT5_OFF,
   176            Bit6        : BIT6,         /* POR default for all 2xx devices */
   177            Bit7        : BIT7          /* POR default for all 2xx devices */
   178        };
   179
   180        /*! Port 2 Direction Register */
   181        config GpioBits8PxDir_t P2DIR = {
   182            Bit0        : BIT0_OFF,
   183            Bit1        : BIT1_OFF,
   184            Bit2        : BIT2_OFF,
   185            Bit3        : BIT3_OFF,
   186            Bit4        : BIT4_OFF,
   187            Bit5        : BIT5_OFF,
   188            Bit6        : BIT6_OFF,
   189            Bit7        : BIT7_OFF
   190        };
   191
   192        /*! Port 2 Resistor Enable Register */
   193        config GpioBits8PxRen_t P2REN = {
   194            Bit0        : BIT0_OFF,
   195            Bit1        : BIT1_OFF,
   196            Bit2        : BIT2_OFF,
   197            Bit3        : BIT3_OFF,
   198            Bit4        : BIT4_OFF,
   199            Bit5        : BIT5_OFF,
   200            Bit6        : BIT6_OFF,
   201            Bit7        : BIT7_OFF
   202        };
   203
   204        /*! Port 3 Output Register */
   205        config GpioBits8PxOut_t P3OUT = {
   206            Bit0        : BIT0_OFF,
   207            Bit1        : BIT1_OFF,
   208            Bit2        : BIT2_OFF,
   209            Bit3        : BIT3_OFF,
   210            Bit4        : BIT4_OFF,
   211            Bit5        : BIT5_OFF,
   212            Bit6        : BIT6_OFF,
   213            Bit7        : BIT7_OFF
   214        };
   215
   216        /*! Port 3 Port Select Register */
   217        config GpioBits8PxSel_t P3SEL = {
   218            Bit0        : BIT0_OFF,
   219            Bit1        : BIT1_OFF,
   220            Bit2        : BIT2_OFF,
   221            Bit3        : BIT3_OFF,
   222            Bit4        : BIT4_OFF,
   223            Bit5        : BIT5_OFF,
   224            Bit6        : BIT6_OFF,
   225            Bit7        : BIT7_OFF
   226        };
   227
   228        /*! Port 3 Direction Register */
   229        config GpioBits8PxDir_t P3DIR = {
   230            Bit0        : BIT0_OFF,
   231            Bit1        : BIT1_OFF,
   232            Bit2        : BIT2_OFF,
   233            Bit3        : BIT3_OFF,
   234            Bit4        : BIT4_OFF,
   235            Bit5        : BIT5_OFF,
   236            Bit6        : BIT6_OFF,
   237            Bit7        : BIT7_OFF
   238        };
   239
   240        /*! Port 3 Resistor Enable Register */
   241        config GpioBits8PxRen_t P3REN = {
   242            Bit0        : BIT0_OFF,
   243            Bit1        : BIT1_OFF,
   244            Bit2        : BIT2_OFF,
   245            Bit3        : BIT3_OFF,
   246            Bit4        : BIT4_OFF,
   247            Bit5        : BIT5_OFF,
   248            Bit6        : BIT6_OFF,
   249            Bit7        : BIT7_OFF
   250        };
   251
   252        /*! Port 4 Output Register */
   253        config GpioBits8PxOut_t P4OUT = {
   254            Bit0        : BIT0_OFF,
   255            Bit1        : BIT1_OFF,
   256            Bit2        : BIT2_OFF,
   257            Bit3        : BIT3_OFF,
   258            Bit4        : BIT4_OFF,
   259            Bit5        : BIT5_OFF,
   260            Bit6        : BIT6_OFF,
   261            Bit7        : BIT7_OFF
   262        };
   263
   264        /*! Port 4 Port Select Register */
   265        config GpioBits8PxSel_t P4SEL = {
   266            Bit0        : BIT0_OFF,
   267            Bit1        : BIT1_OFF,
   268            Bit2        : BIT2_OFF,
   269            Bit3        : BIT3_OFF,
   270            Bit4        : BIT4_OFF,
   271            Bit5        : BIT5_OFF,
   272            Bit6        : BIT6_OFF,
   273            Bit7        : BIT7_OFF
   274        };
   275
   276        /*! Port 4 Direction Register */
   277        config GpioBits8PxDir_t P4DIR = {
   278            Bit0        : BIT0_OFF,
   279            Bit1        : BIT1_OFF,
   280            Bit2        : BIT2_OFF,
   281            Bit3        : BIT3_OFF,
   282            Bit4        : BIT4_OFF,
   283            Bit5        : BIT5_OFF,
   284            Bit6        : BIT6_OFF,
   285            Bit7        : BIT7_OFF
   286        };
   287
   288        /*! Port 4 Resistor Enable Register */
   289        config GpioBits8PxRen_t P4REN = {
   290            Bit0        : BIT0_OFF,
   291            Bit1        : BIT1_OFF,
   292            Bit2        : BIT2_OFF,
   293            Bit3        : BIT3_OFF,
   294            Bit4        : BIT4_OFF,
   295            Bit5        : BIT5_OFF,
   296            Bit6        : BIT6_OFF,
   297            Bit7        : BIT7_OFF
   298        };
   299    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2210

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.comparator.IComparator as Comparator;
    34
    35    /*!
    36     *  ======== GPIO for MSP430G2210 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430G2210 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral.
    43         */
    44        create(Comparator.Instance comparator);
    45
    46    instance:
    47        /*! @_nodoc */
    48        config Comparator.Instance comparator;
    49
    50       /*! Define an array to describe all device pins. The 1st dimension
    51        *  denotes the port, the second the pin on that port. On an
    52        *  MSP430G2210 device, there are 8 + 1 = 8 pins total.
    53        */
    54
    55        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    56         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    57        /* TODO: For this device the config variable definition has been moved into the
    58         * corresponding XS file due to its size. This needs a more consistent solution. */
    59        config DevicePin_t devicePins[1][8];
    60
    61        /*! Implementation of Device Pin Functional Configuration */
    62        override config DevicePinFunctionSetting_t devicePinSetting[1][8];
    63
    64        /*! Determine if each Register needs to be forced set or not */
    65        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    66        [
    67            { register : "P1OUT" , regForceSet : true  },
    68            { register : "P1SEL" , regForceSet : false },
    69            { register : "P1DIR" , regForceSet : true  },
    70            { register : "P1REN" , regForceSet : false },
    71            { register : "P1IES" , regForceSet : true },
    72            { register : "P1IFG" , regForceSet : true },
    73            { register : "P1IE"  , regForceSet : false }
    74        ];
    75
    76        /*
    77         *  GPIO Digital I/O Registers
    78         *
    79         *  One GIPO instance defines the configuration of an entire,
    80         *  8-bit wide digital I/O port.
    81         */
    82
    83        /*! Port 1 Output Register */
    84        config GpioBits8PxOut_t P1OUT = {
    85            Bit0        : BIT0_OFF,
    86            Bit1        : BIT1_OFF,
    87            Bit2        : BIT2_OFF,
    88            Bit3        : BIT3_OFF,
    89            Bit4        : BIT4_OFF,
    90            Bit5        : BIT5_OFF,
    91            Bit6        : BIT6_OFF,
    92            Bit7        : BIT7_OFF
    93        };
    94
    95        /*! Port 1 Port Select Register */
    96        config GpioBits8PxSel_t P1SEL = {
    97            Bit0        : BIT0_OFF,
    98            Bit1        : BIT1_OFF,
    99            Bit2        : BIT2_OFF,
   100            Bit3        : BIT3_OFF,
   101            Bit4        : BIT4_OFF,
   102            Bit5        : BIT5_OFF,
   103            Bit6        : BIT6_OFF,
   104            Bit7        : BIT7_OFF
   105        };
   106
   107        /*! Port 1 Direction Register */
   108        config GpioBits8PxDir_t P1DIR = {
   109            Bit0        : BIT0_OFF,
   110            Bit1        : BIT1_OFF,
   111            Bit2        : BIT2_OFF,
   112            Bit3        : BIT3_OFF,
   113            Bit4        : BIT4_OFF,
   114            Bit5        : BIT5_OFF,
   115            Bit6        : BIT6_OFF,
   116            Bit7        : BIT7_OFF
   117        };
   118
   119        /*! Port 1 Resistor Enable Register */
   120        config GpioBits8PxRen_t P1REN = {
   121            Bit0        : BIT0_OFF,
   122            Bit1        : BIT1_OFF,
   123            Bit2        : BIT2_OFF,
   124            Bit3        : BIT3_OFF,
   125            Bit4        : BIT4_OFF,
   126            Bit5        : BIT5_OFF,
   127            Bit6        : BIT6_OFF,
   128            Bit7        : BIT7_OFF
   129        };
   130    }


module ti.catalog.msp430.peripherals.gpio.GPIO_MSP430G2230

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.communication.USI as USI;
    34    import ti.catalog.msp430.peripherals.adc.ADC10 as ADC10;
    35
    36    /*!
    37     *  ======== GPIO for MSP430G2230 ========
    38     *  MSP430 General Purpose Input Output Ports
    39     */
    40    metaonly module GPIO_MSP430G2230 inherits IGPIO {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral.
    44         */
    45        create(USI.Instance usi, ADC10.Instance adc10);
    46
    47    instance:
    48        /*! @_nodoc */
    49        config USI.Instance usi;
    50
    51        /*! @_nodoc */
    52        config ADC10.Instance adc10;
    53
    54       /*! Define an array to describe all device pins. The 1st dimension
    55        *  denotes the port, the second the pin on that port. On an
    56        *  MSP430G2230 device, there are 8 + 1 = 8 pins total.
    57        */
    58
    59        /* TODO: This here should really be a module-wide feature, rather than an instance feature,
    60         * however due to limitations in XDCtools 3.21.0.0 the data is located here */
    61        /* TODO: For this device the config variable definition has been moved into the
    62         * corresponding XS file due to its size. This needs a more consistent solution. */
    63        config DevicePin_t devicePins[1][8];
    64
    65        /*! Implementation of Device Pin Functional Configuration */
    66        override config DevicePinFunctionSetting_t devicePinSetting[1][8];
    67
    68        /*! Determine if each Register needs to be forced set or not */
    69        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    70        [
    71            { register : "P1OUT" , regForceSet : true  },
    72            { register : "P1SEL" , regForceSet : false },
    73            { register : "P1DIR" , regForceSet : true  },
    74            { register : "P1REN" , regForceSet : false },
    75            { register : "P1IES" , regForceSet : true },
    76            { register : "P1IFG" , regForceSet : true },
    77            { register : "P1IE"  , regForceSet : false }
    78        ];
    79
    80        /*
    81         *  GPIO Digital I/O Registers
    82         *
    83         *  One GIPO instance defines the configuration of an entire,
    84         *  8-bit wide digital I/O port.
    85         */
    86
    87        /*! Port 1 Output Register */
    88        config GpioBits8PxOut_t P1OUT = {
    89            Bit0        : BIT0_OFF,
    90            Bit1        : BIT1_OFF,
    91            Bit2        : BIT2_OFF,
    92            Bit3        : BIT3_OFF,
    93            Bit4        : BIT4_OFF,
    94            Bit5        : BIT5_OFF,
    95            Bit6        : BIT6_OFF,
    96            Bit7        : BIT7_OFF
    97        };
    98
    99        /*! Port 1 Port Select Register */
   100        config GpioBits8PxSel_t P1SEL = {
   101            Bit0        : BIT0_OFF,
   102            Bit1        : BIT1_OFF,
   103            Bit2        : BIT2_OFF,
   104            Bit3        : BIT3_OFF,
   105            Bit4        : BIT4_OFF,
   106            Bit5        : BIT5_OFF,
   107            Bit6        : BIT6_OFF,
   108            Bit7        : BIT7_OFF
   109        };
   110
   111        /*! Port 1 Direction Register */
   112        config GpioBits8PxDir_t P1DIR = {
   113            Bit0        : BIT0_OFF,
   114            Bit1        : BIT1_OFF,
   115            Bit2        : BIT2_OFF,
   116            Bit3        : BIT3_OFF,
   117            Bit4        : BIT4_OFF,
   118            Bit5        : BIT5_OFF,
   119            Bit6        : BIT6_OFF,
   120            Bit7        : BIT7_OFF
   121        };
   122
   123        /*! Port 1 Resistor Enable Register */
   124        config GpioBits8PxRen_t P1REN = {
   125            Bit0        : BIT0_OFF,
   126            Bit1        : BIT1_OFF,
   127            Bit2        : BIT2_OFF,
   128            Bit3        : BIT3_OFF,
   129            Bit4        : BIT4_OFF,
   130            Bit5        : BIT5_OFF,
   131            Bit6        : BIT6_OFF,
   132            Bit7        : BIT7_OFF
   133        };
   134    }


interface ti.catalog.msp430.peripherals.gpio.IGPIO

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IGPIO ========
    35     *  MSP430 General Purpose Input Output Ports
    36     */
    37    metaonly interface IGPIO inherits xdc.platform.IPeripheral {
    38
    39        /*! Pull-up/down resistor enables drop down list */
    40        enum ResEnable_t {
    41            PUDRE_OFF  = 0x00u,                  /*! Disabled */
    42            PUDRE_UP   = 0x01u,                  /*! Pull-Up Resistor */
    43            PUDRE_DOWN = 0x02u                   /*! Pull-Down Resistor */
    44        }
    45
    46        /*! Interrupt enables drop down list */
    47        enum InterruptEnable_t {
    48            IE_OFF     = 0x00u,                 /*! Disabled */
    49            IE_FALLING = 0x01u,                 /*! Interrupt Enabled Falling Edge */
    50            IE_RISING  = 0x02u                  /*! Interrupt Enabled Rising Edge  */
    51        }
    52
    53        /*! Output high or low drop down list */
    54        enum OutputState_t {
    55            OUTSTATE_LOW   = 0x00u,             /*! Output Set Low (Default) */
    56            OUTSTATE_HIGH  = 0x01u              /*! Output Set High */
    57        }
    58
    59        /*! GPIO Bit 0 Definitions */
    60        enum Bit0_t {
    61            BIT0_OFF = 0x00u,
    62            BIT0 = 0x01u
    63        };
    64
    65        enum Bit1_t {
    66            BIT1_OFF = 0x00u,
    67            BIT1 = 0x02u
    68        };
    69
    70        enum Bit2_t {
    71            BIT2_OFF = 0x00u,
    72            BIT2 = 0x04u
    73        };
    74
    75        enum Bit3_t {
    76            BIT3_OFF = 0x00u,
    77            BIT3 = 0x08u
    78        };
    79
    80        enum Bit4_t {
    81            BIT4_OFF = 0x00u,
    82            BIT4 = 0x10u
    83        };
    84
    85        enum Bit5_t {
    86            BIT5_OFF = 0x00u,
    87            BIT5 = 0x20u
    88        };
    89
    90        enum Bit6_t {
    91            BIT6_OFF = 0x00u,
    92            BIT6 = 0x20u
    93        };
    94
    95        enum Bit7_t {
    96            BIT7_OFF = 0x00u,
    97            BIT7 = 0x80u
    98        };
    99
   100        /*!
   101        *  ======== GpioBits8_t ========
   102        *  Generic GPIO 8-bit Register
   103        *
   104        *  @see #GpioBits8_t
   105        */
   106        struct GpioBits8PxIn_t {
   107            Bit0_t    Bit0;     /*! GPIO Input Signal Bit 0 */
   108            Bit1_t    Bit1;     /*! GPIO Input Signal Bit 1 */
   109            Bit2_t    Bit2;     /*! GPIO Input Signal Bit 2 */
   110            Bit3_t    Bit3;     /*! GPIO Input Signal Bit 3 */
   111            Bit4_t    Bit4;     /*! GPIO Input Signal Bit 4 */
   112            Bit5_t    Bit5;     /*! GPIO Input Signal Bit 5 */
   113            Bit6_t    Bit6;     /*! GPIO Input Signal Bit 6 */
   114            Bit7_t    Bit7;     /*! GPIO Input Signal Bit 7 */
   115        }
   116
   117        /*!
   118        *  ======== GpioBits8PxOut_t ========
   119        *  Generic GPIO 8-bit PxOUT Register
   120        *
   121        *  @see #GpioBits8PxOut_t
   122        */
   123        struct GpioBits8PxOut_t {
   124            Bit0_t    Bit0;     /*! GPIO Output Signal Bit 0 */
   125            Bit1_t    Bit1;     /*! GPIO Output Signal Bit 1 */
   126            Bit2_t    Bit2;     /*! GPIO Output Signal Bit 2 */
   127            Bit3_t    Bit3;     /*! GPIO Output Signal Bit 3 */
   128            Bit4_t    Bit4;     /*! GPIO Output Signal Bit 4 */
   129            Bit5_t    Bit5;     /*! GPIO Output Signal Bit 5 */
   130            Bit6_t    Bit6;     /*! GPIO Output Signal Bit 6 */
   131            Bit7_t    Bit7;     /*! GPIO Output Signal Bit 7 */
   132        }
   133
   134        /*!
   135        *  ======== GpioBits8PxDir_t ========
   136        *  Generic GPIO 8-bit PxDIR Register
   137        *
   138        *  @see #GpioBits8PxDir_t
   139        */
   140        struct GpioBits8PxDir_t {
   141            Bit0_t    Bit0;     /*! GPIO Select Direction Bit 0
   142                                   *  Bit = 0: The port pin is switched to input direction
   143                                   *  Bit = 1: The port pin is switched to output direction */
   144            Bit1_t    Bit1;     /*! GPIO Select Direction Bit 1
   145                                   *  Bit = 0: The port pin is switched to input direction
   146                                   *  Bit = 1: The port pin is switched to output direction */
   147            Bit2_t    Bit2;     /*! GPIO Select Direction Bit 2
   148                                   *  Bit = 0: The port pin is switched to input direction
   149                                   *  Bit = 1: The port pin is switched to output direction */
   150            Bit3_t    Bit3;     /*! GPIO Select Direction Bit 3
   151                                   *  Bit = 0: The port pin is switched to input direction
   152                                   *  Bit = 1: The port pin is switched to output direction */
   153            Bit4_t    Bit4;     /*! GPIO Select Direction Bit 4
   154                                   *  Bit = 0: The port pin is switched to input direction
   155                                   *  Bit = 1: The port pin is switched to output direction */
   156            Bit5_t    Bit5;     /*! GPIO Select Direction Bit 5
   157                                   *  Bit = 0: The port pin is switched to input direction
   158                                   *  Bit = 1: The port pin is switched to output direction */
   159            Bit6_t    Bit6;     /*! GPIO Select Direction Bit 6
   160                                   *  Bit = 0: The port pin is switched to input direction
   161                                   *  Bit = 1: The port pin is switched to output direction */
   162            Bit7_t    Bit7;     /*! GPIO Select Direction Bit 7
   163                                   *  Bit = 0: The port pin is switched to input direction
   164                                   *  Bit = 1: The port pin is switched to output direction */
   165        }
   166
   167        /*!
   168        *  ======== GpioBits8PxRen_t ========
   169        *  Generic GPIO 8-bit PxREN Register
   170        *
   171        *  @see #GpioBits8PxRen_t
   172        */
   173        struct GpioBits8PxRen_t {
   174            Bit0_t    Bit0;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 0
   175                                   *  Bit = 0: Pullup/pulldown resistor disabled
   176                                   *  Bit = 1: Pullup/pulldown resistor enabled
   177                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   178            Bit1_t    Bit1;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 1
   179                                   *  Bit = 0: Pullup/pulldown resistor disabled
   180                                   *  Bit = 1: Pullup/pulldown resistor enabled
   181                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   182            Bit2_t    Bit2;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 2
   183                                   *  Bit = 0: Pullup/pulldown resistor disabled
   184                                   *  Bit = 1: Pullup/pulldown resistor enabled
   185                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   186            Bit3_t    Bit3;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 3
   187                                   *  Bit = 0: Pullup/pulldown resistor disabled
   188                                   *  Bit = 1: Pullup/pulldown resistor enabled
   189                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   190            Bit4_t    Bit4;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 4
   191                                   *  Bit = 0: Pullup/pulldown resistor disabled
   192                                   *  Bit = 1: Pullup/pulldown resistor enabled
   193                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   194            Bit5_t    Bit5;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 5
   195                                   *  Bit = 0: Pullup/pulldown resistor disabled
   196                                   *  Bit = 1: Pullup/pulldown resistor enabled
   197                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   198            Bit6_t    Bit6;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 6
   199                                   *  Bit = 0: Pullup/pulldown resistor disabled
   200                                   *  Bit = 1: Pullup/pulldown resistor enabled
   201                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   202            Bit7_t    Bit7;     /*! GPIO Enables or Disables Pullup/Pulldown Bit 7
   203                                   *  Bit = 0: Pullup/pulldown resistor disabled
   204                                   *  Bit = 1: Pullup/pulldown resistor enabled
   205                                   *           Set Pullup/down via PxOUT 0 = Down; 1 = Up */
   206        }
   207
   208        /*!
   209        *  ======== GpioBits8PxSel_t ========
   210        *  Generic GPIO 8-bit PxSEL Register
   211        *
   212        *  @see #GpioBits8PxSel_t
   213        */
   214        struct GpioBits8PxSel_t {
   215            Bit0_t    Bit0;     /*! GPIO Select Pin Function Bit 0
   216                                   *See the device-specific data sheet to determine pin functions. */
   217            Bit1_t    Bit1;     /*! GPIO Select Pin Function Bit 1
   218                                   *See the device-specific data sheet to determine pin functions. */
   219            Bit2_t    Bit2;     /*! GPIO Select Pin Function Bit 2
   220                                   *See the device-specific data sheet to determine pin functions. */
   221            Bit3_t    Bit3;     /*! GPIO Select Pin Function Bit 3
   222                                   *See the device-specific data sheet to determine pin functions. */
   223            Bit4_t    Bit4;     /*! GPIO Select Pin Function Bit 4
   224                                   *See the device-specific data sheet to determine pin functions. */
   225            Bit5_t    Bit5;     /*! GPIO Select Pin Function Bit 5
   226                                   *See the device-specific data sheet to determine pin functions. */
   227            Bit6_t    Bit6;     /*! GPIO Select Pin Function Bit 6
   228                                   *See the device-specific data sheet to determine pin functions. */
   229            Bit7_t    Bit7;     /*! GPIO Select Pin Function Bit 7
   230                                   *See the device-specific data sheet to determine pin functions. */
   231        }
   232
   233        /*!
   234        *  ======== GpioBits8PxSel2_t ========
   235        *  Generic GPIO 8-bit PxSEL2 Register
   236        *
   237        *  @see #GpioBits8PxSel2_t
   238        */
   239        struct GpioBits8PxSel2_t {
   240            Bit0_t    Bit0;     /*! GPIO Select Pin Function Bit 0
   241                                   *See the device-specific data sheet to determine pin functions. */
   242            Bit1_t    Bit1;     /*! GPIO Select Pin Function Bit 1
   243                                   *See the device-specific data sheet to determine pin functions. */
   244            Bit2_t    Bit2;     /*! GPIO Select Pin Function Bit 2
   245                                   *See the device-specific data sheet to determine pin functions. */
   246            Bit3_t    Bit3;     /*! GPIO Select Pin Function Bit 3
   247                                   *See the device-specific data sheet to determine pin functions. */
   248            Bit4_t    Bit4;     /*! GPIO Select Pin Function Bit 4
   249                                   *See the device-specific data sheet to determine pin functions. */
   250            Bit5_t    Bit5;     /*! GPIO Select Pin Function Bit 5
   251                                   *See the device-specific data sheet to determine pin functions. */
   252            Bit6_t    Bit6;     /*! GPIO Select Pin Function Bit 6
   253                                   *See the device-specific data sheet to determine pin functions. */
   254            Bit7_t    Bit7;     /*! GPIO Select Pin Function Bit 7
   255                                   *See the device-specific data sheet to determine pin functions. */
   256        }
   257
   258        /*!
   259        *  ======== GpioBits8PxIe_t ========
   260        *  Generic GPIO 8-bit PxIE Register
   261        *
   262        *  @see #GpioBits8PxIe_t
   263        */
   264        struct GpioBits8PxIe_t {
   265            Bit0_t    Bit0;     /*! GPIO Interrupt Enable Bit 0
   266                                   *  Bit = 0: The interrupt is disabled.
   267                                   *  Bit = 1: The interrupt is enabled. */
   268            Bit1_t    Bit1;     /*! GPIO Interrupt Enable Bit 1
   269                                   *  Bit = 0: The interrupt is disabled.
   270                                   *  Bit = 1: The interrupt is enabled. */
   271            Bit2_t    Bit2;     /*! GPIO Interrupt Enable Bit 2
   272                                   *  Bit = 0: The interrupt is disabled.
   273                                   *  Bit = 1: The interrupt is enabled. */
   274            Bit3_t    Bit3;     /*! GPIO Interrupt Enable Bit 3
   275                                   *  Bit = 0: The interrupt is disabled.
   276                                   *  Bit = 1: The interrupt is enabled. */
   277            Bit4_t    Bit4;     /*! GPIO Interrupt Enable Bit 4
   278                                   *  Bit = 0: The interrupt is disabled.
   279                                   *  Bit = 1: The interrupt is enabled. */
   280            Bit5_t    Bit5;     /*! GPIO Interrupt Enable Bit 5
   281                                   *  Bit = 0: The interrupt is disabled.
   282                                   *  Bit = 1: The interrupt is enabled. */
   283            Bit6_t    Bit6;     /*! GPIO Interrupt Enable Bit 6
   284                                   *  Bit = 0: The interrupt is disabled.
   285                                   *  Bit = 1: The interrupt is enabled. */
   286            Bit7_t    Bit7;     /*! GPIO Interrupt Enable Bit 7
   287                                   *  Bit = 0: The interrupt is disabled.
   288                                   *  Bit = 1: The interrupt is enabled. */
   289        }
   290
   291        /*!
   292        *  ======== GpioBits8PxIes_t ========
   293        *  Generic GPIO 8-bit PxIES Register
   294        *
   295        *  @see #GpioBits8PxIes_t
   296        */
   297        struct GpioBits8PxIes_t {
   298            Bit0_t    Bit0;     /*! GPIO Select Interrupt Edge Bit 0
   299                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   300                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   301            Bit1_t    Bit1;     /*! GPIO Select Interrupt Edge Bit 1
   302                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   303                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   304            Bit2_t    Bit2;     /*! GPIO Select Interrupt Edge Bit 2
   305                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   306                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   307            Bit3_t    Bit3;     /*! GPIO Select Interrupt Edge Bit 3
   308                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   309                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   310            Bit4_t    Bit4;     /*! GPIO Select Interrupt Edge Bit 4
   311                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   312                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   313            Bit5_t    Bit5;     /*! GPIO Select Interrupt Edge Bit 5
   314                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   315                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   316            Bit6_t    Bit6;     /*! GPIO Select Interrupt Edge Bit 6
   317                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   318                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   319            Bit7_t    Bit7;     /*! GPIO Select Interrupt Edge Bit 7
   320                                   *  Bit = 0: The PxIFGx flag is set with a low-to-high transition
   321                                   *  Bit = 1: The PxIFGx flag is set with a high-to-low transition */
   322        }
   323
   324        /*!
   325        *  ======== GpioBits8PxIfg_t ========
   326        *  Generic GPIO 8-bit PxIFG Register
   327        *
   328        *  @see #GpioBits8PxIfg_t
   329        */
   330        struct GpioBits8PxIfg_t {
   331            Bit0_t    Bit0;     /*! GPIO Interrupt Flag Bit 0
   332                                   *  Bit = 0: No interrupt is pending
   333                                   *  Bit = 1: An interrupt is pending */
   334            Bit1_t    Bit1;     /*! GPIO Interrupt Flag Bit 1
   335                                   *  Bit = 0: No interrupt is pending
   336                                   *  Bit = 1: An interrupt is pending */
   337            Bit2_t    Bit2;     /*! GPIO Interrupt Flag Bit 2
   338                                   *  Bit = 0: No interrupt is pending
   339                                   *  Bit = 1: An interrupt is pending */
   340            Bit3_t    Bit3;     /*! GPIO Interrupt Flag Bit 3
   341                                   *  Bit = 0: No interrupt is pending
   342                                   *  Bit = 1: An interrupt is pending */
   343            Bit4_t    Bit4;     /*! GPIO Interrupt Flag Bit 4
   344                                   *  Bit = 0: No interrupt is pending
   345                                   *  Bit = 1: An interrupt is pending */
   346            Bit5_t    Bit5;     /*! GPIO Interrupt Flag Bit 5
   347                                   *  Bit = 0: No interrupt is pending
   348                                   *  Bit = 1: An interrupt is pending */
   349            Bit6_t    Bit6;     /*! GPIO Interrupt Flag Bit 6
   350                                   *  Bit = 0: No interrupt is pending
   351                                   *  Bit = 1: An interrupt is pending */
   352            Bit7_t    Bit7;     /*! GPIO Interrupt Flag Bit 7
   353                                   *  Bit = 0: No interrupt is pending
   354                                   *  Bit = 1: An interrupt is pending */
   355        }
   356
   357        /*!
   358        *  ======== DeviceRegisterConfig_t ========
   359        *  Device Register Configuration Descriptor
   360        *
   361        *  Type to describe how a register is configured for a particular
   362        *  use. The type allows setting and clearing of an arbitrary bit
   363        *  pattern inside the specified register.
   364        *
   365        *  @see #DeviceRegisterConfig_t
   366        */
   367        struct DeviceRegisterConfig_t {
   368            String              register;
   369            UInt                bitSetMask;
   370            UInt                bitClearMask;
   371        }
   372
   373        /*!
   374        *  ======== DevicePinFunction_t ========
   375        *  Device Pin Functional Descriptor
   376        *
   377        *  Type to describe how a device pin is configured for all its
   378        *  different uses that are possible. The function names are consolidated
   379        *  in one String array rather than located together with the function-
   380        *  specific data to allow easier access by Grace widgets. The functionConfig
   381        *  member contains an arbitrary-length array describing all register
   382        *  settings that need to be performed to configure a certain function.
   383        *
   384        *  @see #DevicePinFunction_t
   385        */
   386        struct DevicePinFunction_t {
   387            String                    functionName[];
   388            DeviceRegisterConfig_t    functionConfig[][];
   389        }
   390
   391        /*!
   392        *  ======== DevicePin_t ========
   393        *  Device Pin Descriptor
   394        *
   395        *  Type to describe a single device pin and all its possible
   396        *  configurations.
   397        *
   398        *  @see #DevicePin_t
   399        */
   400        struct DevicePin_t {
   401            String                    pinName;
   402            DevicePinFunction_t       pinFunction;
   403        }
   404
   405        /*!
   406        *  ======== MatchedPortFunction_t ========
   407        *  Port Function Enumeration Type
   408        *
   409        *  This type is used to store a list of applicable pins based on the
   410        *  search criteria when using the function findPinsForFunction().
   411        *
   412        *  @see #MatchedPortFunction_t
   413        */
   414        struct MatchedPortFunction_t {
   415            UInt      port[];
   416            UInt      pin[];
   417            String    pinName[];
   418            UInt      functionIndex[];
   419            String    functionName[];
   420        }
   421
   422        /*!
   423        *  ======== DevicePinFunctionSetting_t ========
   424        *  Device Pin Functional Setting Descriptor
   425        *
   426        *  Type to store the selected pin configuration and a reference
   427        *  to the object that last modified the configuration.
   428        *
   429        *  @see #DevicePinFunctionSetting_t
   430        */
   431        struct DevicePinFunctionSetting_t {
   432            UInt               functionIndex;       /*! Device Pin Functional Selection */
   433            Any                owner;               /*! Current Device Pin Owner */
   434            ResEnable_t        resistorEnable;      /*! Pull-up/down Resistor Enable Selection */
   435            OutputState_t      outputDirState;      /*! Output Direction State Selection */
   436            InterruptEnable_t  interruptEnable;     /*! Interrupt Enable State Selection */
   437            Bool               outputDirStateEnabled;/*! Enable state for output direction state selection */
   438            Bool               inputDirStateEnabled;/*! Enable state for input direction state selection */
   439        }
   440
   441        /*!
   442        *  ======== ForceSetDefaultRegister_t ========
   443        *  Force Set Default Register
   444        *
   445        *  Type to store if each register needs to be forced initialized
   446        *  even if the register is in default state.
   447        *
   448        *  @see #ForceSetDefaultRegister_t
   449        */
   450        struct ForceSetDefaultRegister_t {
   451            String     register;
   452            Bool       regForceSet;
   453        }
   454
   455        /*!
   456        *  ======== regIntVect_t ========
   457        *  Interrupt vector description
   458        *
   459        *  Type to describe a single interrupt vector pin and all its possible
   460        *  configurations.
   461        *
   462        *  @see #regIntVect_t
   463        */
   464        struct regIntVect_t {
   465            String                    registerName;
   466            String                    registerDescription;
   467            String                    isrToggleString;
   468            String                    priorityName;
   469            Bool                      interruptEnable;
   470            Bool                      interruptHandler;
   471            Int                       priority;
   472        }
   473
   474    instance:
   475        /*! Port 1 Interrupt Edge Select Register */
   476        config GpioBits8PxIes_t P1IES = {
   477            Bit0        : BIT0_OFF,
   478            Bit1        : BIT1_OFF,
   479            Bit2        : BIT2_OFF,
   480            Bit3        : BIT3_OFF,
   481            Bit4        : BIT4_OFF,
   482            Bit5        : BIT5_OFF,
   483            Bit6        : BIT6_OFF,
   484            Bit7        : BIT7_OFF
   485        };
   486
   487        /*! Port 1 Interrupt Flag Register */
   488        config GpioBits8PxIfg_t P1IFG = {
   489            Bit0        : BIT0_OFF,
   490            Bit1        : BIT1_OFF,
   491            Bit2        : BIT2_OFF,
   492            Bit3        : BIT3_OFF,
   493            Bit4        : BIT4_OFF,
   494            Bit5        : BIT5_OFF,
   495            Bit6        : BIT6_OFF,
   496            Bit7        : BIT7_OFF
   497        };
   498
   499        /*! Port 1 Interrupt Enable Register */
   500        config GpioBits8PxIe_t P1IE = {
   501            Bit0        : BIT0_OFF,
   502            Bit1        : BIT1_OFF,
   503            Bit2        : BIT2_OFF,
   504            Bit3        : BIT3_OFF,
   505            Bit4        : BIT4_OFF,
   506            Bit5        : BIT5_OFF,
   507            Bit6        : BIT6_OFF,
   508            Bit7        : BIT7_OFF
   509        };
   510
   511        /*! Port 2 Interrupt Edge Select Register */
   512        config GpioBits8PxIes_t P2IES = {
   513            Bit0        : BIT0_OFF,
   514            Bit1        : BIT1_OFF,
   515            Bit2        : BIT2_OFF,
   516            Bit3        : BIT3_OFF,
   517            Bit4        : BIT4_OFF,
   518            Bit5        : BIT5_OFF,
   519            Bit6        : BIT6_OFF,
   520            Bit7        : BIT7_OFF
   521        };
   522
   523        /*! Port 2 Interrupt Flag Register */
   524        config GpioBits8PxIfg_t P2IFG = {
   525            Bit0        : BIT0_OFF,
   526            Bit1        : BIT1_OFF,
   527            Bit2        : BIT2_OFF,
   528            Bit3        : BIT3_OFF,
   529            Bit4        : BIT4_OFF,
   530            Bit5        : BIT5_OFF,
   531            Bit6        : BIT6_OFF,
   532            Bit7        : BIT7_OFF
   533        };
   534
   535        /*! Port 2 Interrupt Enable Register */
   536        config GpioBits8PxIe_t P2IE = {
   537            Bit0        : BIT0_OFF,
   538            Bit1        : BIT1_OFF,
   539            Bit2        : BIT2_OFF,
   540            Bit3        : BIT3_OFF,
   541            Bit4        : BIT4_OFF,
   542            Bit5        : BIT5_OFF,
   543            Bit6        : BIT6_OFF,
   544            Bit7        : BIT7_OFF
   545        };
   546
   547        /*! Port 3 Interrupt Edge Select Register */
   548        config GpioBits8PxIes_t P3IES = {
   549            Bit0        : BIT0_OFF,
   550            Bit1        : BIT1_OFF,
   551            Bit2        : BIT2_OFF,
   552            Bit3        : BIT3_OFF,
   553            Bit4        : BIT4_OFF,
   554            Bit5        : BIT5_OFF,
   555            Bit6        : BIT6_OFF,
   556            Bit7        : BIT7_OFF
   557        };
   558
   559        /*! Port 3 Interrupt Flag Register */
   560        config GpioBits8PxIfg_t P3IFG = {
   561            Bit0        : BIT0_OFF,
   562            Bit1        : BIT1_OFF,
   563            Bit2        : BIT2_OFF,
   564            Bit3        : BIT3_OFF,
   565            Bit4        : BIT4_OFF,
   566            Bit5        : BIT5_OFF,
   567            Bit6        : BIT6_OFF,
   568            Bit7        : BIT7_OFF
   569        };
   570
   571        /*! Port 3 Interrupt Enable Register */
   572        config GpioBits8PxIe_t P3IE = {
   573            Bit0        : BIT0_OFF,
   574            Bit1        : BIT1_OFF,
   575            Bit2        : BIT2_OFF,
   576            Bit3        : BIT3_OFF,
   577            Bit4        : BIT4_OFF,
   578            Bit5        : BIT5_OFF,
   579            Bit6        : BIT6_OFF,
   580            Bit7        : BIT7_OFF
   581        };
   582
   583        /*! Port 4 Interrupt Edge Select Register */
   584        config GpioBits8PxIes_t P4IES = {
   585            Bit0        : BIT0_OFF,
   586            Bit1        : BIT1_OFF,
   587            Bit2        : BIT2_OFF,
   588            Bit3        : BIT3_OFF,
   589            Bit4        : BIT4_OFF,
   590            Bit5        : BIT5_OFF,
   591            Bit6        : BIT6_OFF,
   592            Bit7        : BIT7_OFF
   593        };
   594
   595        /*! Port 4 Interrupt Flag Register */
   596        config GpioBits8PxIfg_t P4IFG = {
   597            Bit0        : BIT0_OFF,
   598            Bit1        : BIT1_OFF,
   599            Bit2        : BIT2_OFF,
   600            Bit3        : BIT3_OFF,
   601            Bit4        : BIT4_OFF,
   602            Bit5        : BIT5_OFF,
   603            Bit6        : BIT6_OFF,
   604            Bit7        : BIT7_OFF
   605        };
   606
   607        /*! Port 4 Interrupt Enable Register */
   608        config GpioBits8PxIe_t P4IE = {
   609            Bit0        : BIT0_OFF,
   610            Bit1        : BIT1_OFF,
   611            Bit2        : BIT2_OFF,
   612            Bit3        : BIT3_OFF,
   613            Bit4        : BIT4_OFF,
   614            Bit5        : BIT5_OFF,
   615            Bit6        : BIT6_OFF,
   616            Bit7        : BIT7_OFF
   617        };
   618
   619        /*! GPIO interrupt source */
   620        config regIntVect_t interruptSource[32];
   621
   622        /*! Forward Declaration of Device Pin Functional Configuration */
   623        config DevicePinFunctionSetting_t devicePinSetting[][];
   624
   625        /*!
   626         *  ======== findPinsForFunction ========
   627         *    Identify all device pins that can be used to serve a certain purpose
   628         *
   629         *  Function to scan through the pin configuration database to identify
   630         *    a list of device pins matching a regular expression.
   631         */
   632        MatchedPortFunction_t findPinsForFunction(String regExp);
   633
   634        /*!
   635         *  ======== pinFunctionIsActive ========
   636         *  Check if a pin is enabled for a certain function
   637         *
   638         *    This function is used to check if a certain functionality is enabled
   639         *    on a given device pins (returns 'true' in that case).
   640         */
   641        Bool pinFunctionIsActive(UInt port, UInt pin, String regExp);
   642
   643        /*!
   644         *  ======== getPinFunctionIndex ========
   645         *  Get a pin's current functional configuration
   646         *
   647         *  This function is used to obtain the current configuration of a given
   648         *    device pin. The returned value can be used as an index to obtain further
   649         *  information from the pin configuration database.
   650         */
   651        UInt getPinFunctionIndex(UInt port, UInt pin);
   652
   653        /*!
   654         *  ======== getPinOwner ========
   655         *    This function returns the current owner of the specified device pin.
   656         */
   657        Any getPinOwner(UInt port, UInt pin);
   658
   659        /*!
   660         *  ======== setPinFunctionUsingIndex ========
   661         *     Configure a device pin to a specific peripheral function
   662         *
   663         *  This function is used to configure a device pin to a specific peripheral
   664         *    function that is identified by an index. The index corresponds to an
   665         *    associated set of configuration parameters stored in the pin configuration
   666         *    database. The owner parameter can be used to protect a pin from being
   667         *    used by somebody else. A pin configuration can only be changed if the
   668         *    current owner is undefined, or of the current owner matches the
   669         *    owner specified as function parameter.
   670         */
   671        Void setPinFunctionUsingIndex(UInt port, UInt pin, UInt index, Any owner);
   672
   673        /*!
   674         *  ======== setDefaultPinFunction ========
   675         *     Configure a device pin to its default state
   676         *
   677         *  This function is used to configure a device pin to its default state
   678         *    and is typically used when a peripheral module relinquishes ownership
   679         *    of a pin so that it can be used by other peripheral modules.
   680         */
   681        Void setDefaultPinFunction(UInt port, UInt pin, Any owner);
   682    }


package ti.catalog.msp430.peripherals.gpio

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.gpio ========
    35     *  MSP430 GPIO peripheral
    36     */
    37    package ti.catalog.msp430.peripherals.gpio [1, 0, 0] {
    38        module      GPIO_MSP430G2210;
    39        module      GPIO_MSP430G2230;
    40        module      GPIO_MSP430G2x01;
    41        module      GPIO_MSP430G2x11;
    42        module      GPIO_MSP430G2x21;
    43        module      GPIO_MSP430G2x31;
    44        module      GPIO_MSP430G2x02;
    45        module      GPIO_MSP430G2x12;
    46        module      GPIO_MSP430G2x32;
    47        module      GPIO_MSP430G2x44;
    48        module      GPIO_MSP430G2x52;
    49        module      GPIO_MSP430G2x55;
    50        module      GPIO_MSP430G2x03;
    51        module      GPIO_MSP430G2x13;
    52        module      GPIO_MSP430G2x33;
    53        module      GPIO_MSP430G2x53;
    54        module      GPIO_MSP430F20x1;
    55        module      GPIO_MSP430F20x2;
    56        module      GPIO_MSP430F20x3;
    57        module      GPIO_MSP430F21x1;
    58        module      GPIO_MSP430F21x2;
    59        module      GPIO_MSP430F22x2;
    60        module      GPIO_MSP430F22x4;
    61        module      GPIO_MSP430F261x;
    62        module      GPIO_MSP430F241x;
    63        module      GPIO_MSP430F23x0;
    64        module      GPIO_MSP430F23x;
    65        module      GPIO_MSP430F24x1;
    66        module      GPIO_MSP430F24x;
    67        module      GPIO_MSP430F543xA;
    68        module      GPIO_MSP430FR5739_35_31_29_25_21;
    69        module      GPIO_MSP430FR5737_33_27_23;
    70        module      GPIO_MSP430FR5738_34_30_28_24_20;
    71        module      GPIO_MSP430FR5736_32_26_22;
    72        module      GPIO_MSP430FR59xx_FR58xx;
    73        interface   IGPIO;
    74    }


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR59xx_FR58xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS_A as CS_A;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR59xx_FR58xx ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR59xx_FR58xx inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS_A
    44         *  instances.
    45         */
    46        create(CS_A.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS_A.Instance clock;
    51
    52        config Int numPortInterrupts = 4;
    53    }


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5736_32_26_22

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR5736_32_26_22 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5736_32_26_22 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52        config Int numPortInterrupts = 4;
    53    }


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5737_33_27_23

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR5737_33_27_23 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5737_33_27_23 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52        config Int numPortInterrupts = 4;
    53    }


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5738_34_30_28_24_20

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR5738_34_30_28_24_20 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5738_34_30_28_24_20 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52        config Int numPortInterrupts = 4;
    53    }


module ti.catalog.msp430.peripherals.gpio_grace3.GPIO_MSP430FR5739_35_31_29_25_21

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.CS as CS;
    34
    35    /*!
    36     *  ======== GPIO for MSP430FR5739_35_31_29_25_21 ========
    37     *  MSP430 General Purpose Input Output Ports
    38     */
    39    metaonly module GPIO_MSP430FR5739_35_31_29_25_21 inherits IGPIO {
    40        /*!
    41         *  ======== create ========
    42         *  Create an instance of this peripheral. Use a customized
    43         *  init function so that we can get access to the CS
    44         *  instances.
    45         */
    46        create(CS.Instance clock);
    47
    48    instance:
    49        /*! @_nodoc */
    50        config CS.Instance clock;
    51
    52        config Int numPortInterrupts = 4;
    53    }


interface ti.catalog.msp430.peripherals.gpio_grace3.IGPIO

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IGPIO ========
    35     *  MSP430 General Purpose Input Output Ports
    36     */
    37    metaonly interface IGPIO inherits xdc.platform.IPeripheral {
    38
    39        /*!
    40        *  ======== regIntVect_t ========
    41        *  Interrupt vector description
    42        *
    43        *  Type to describe a single interrupt vector pin and all its possible
    44        *  configurations.
    45        *
    46        *  @see #regIntVect_t
    47        */
    48        struct regIntVect_t {
    49            String                    registerName;
    50            String                    registerDescription;
    51            String                    isrToggleString;
    52            String                    priorityName;
    53            Bool                      interruptEnable;
    54            Bool                      interruptHandler;
    55            Int                       priority;
    56        }
    57
    58    instance:
    59        /*! GPIO interrupt source */
    60        config regIntVect_t interruptSource[32];
    61
    62    }


package ti.catalog.msp430.peripherals.gpio_grace3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.gpio_grace3 ========
    35     *  MSP430 GPIO Grace3 peripheral
    36     */
    37    package ti.catalog.msp430.peripherals.gpio_grace3 [1, 0, 0] {
    38        module      GPIO_MSP430FR5739_35_31_29_25_21;
    39        module      GPIO_MSP430FR5738_34_30_28_24_20;
    40        module      GPIO_MSP430FR5737_33_27_23;
    41        module      GPIO_MSP430FR5736_32_26_22;
    42        module      GPIO_MSP430FR59xx_FR58xx;
    43        interface   IGPIO;
    44    }


module ti.catalog.msp430.peripherals.interrupt.Interrupt_Controller

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Interrupt_Controller ========
    35     *  MSP430 Interrupt_Controller
    36     */
    37    metaonly module Interrupt_Controller inherits xdc.platform.IPeripheral {
    38
    39    instance:
    40
    41        config UInt baseAddr;
    42        config UInt numInterrupts;
    43    }


package ti.catalog.msp430.peripherals.interrupt

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.interrupt ========
    35     *  MSP430 interrupt support
    36     */
    37    package ti.catalog.msp430.peripherals.interrupt [1, 0, 0] {
    38        module Interrupt_Controller;
    39    }


module ti.catalog.msp430.peripherals.memory.Flash_2xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     *  ======== Flash_2xx ========
    37     *  MSP430F2xx Family Flash Module
    38     */
    39    metaonly module Flash_2xx inherits IFlash
    40    {
    41        /* FCTL1 Register */
    42        struct FCTL1_t {
    43            FWKEY_t     FWKEY;                  /*! FCTLx password Always read as 096h. Must be written as 0A5h or a PUC
    44                                                 *  will be generated. */
    45            BLKWRT_t    BLKWRT;                 /*! Block write mode */
    46            WRT_t       WRT;                    /*! Write */
    47            EEIEX_t     EEIEX;                  /*! Enable Emergency Interrupt Exit */
    48            EEI_t       EEI;                    /*! Enable Erase Interrupts */
    49            MERAS_t     MERAS;                  /*! Mass erase */
    50            ERASE_t     ERASE;                  /*! Erase */
    51        }
    52
    53        /* FCTL2 Register */
    54        struct FCTL2_t {
    55            FWKEY_t     FWKEY;                  /*! FCTLx password Always read as 096h. Must be written as 0A5h or a PUC
    56                                                 *  will be generated. */
    57             FSSEL_t     FSSEL;                 /*! Flash controller clock source select
    58                                                 *   00  ACLK
    59                                                 *   01  MCLK
    60                                                 *   10  SMCLK
    61                                                 *   11  SMCLK */
    62            FN5_t    FN5;                       /*! Flash Controller Clock Divider Bit 5 */
    63            FN4_t    FN4;                       /*! Flash Controller Clock Divider Bit 4 */
    64            FN3_t    FN3;                       /*! Flash Controller Clock Divider Bit 3 */
    65            FN2_t    FN2;                       /*! Flash Controller Clock Divider Bit 2 */
    66            FN1_t    FN1;                       /*! Flash Controller Clock Divider Bit 1 */
    67            FN0_t    FN0;                       /*! Flash Controller Clock Divider Bit 0 */
    68        }
    69
    70        /* FCTL3 Register */
    71        struct FCTL3_t {
    72            FWKEY_t     FWKEY;                  /*! FCTLx password. Always read as 096h. Must be written as 0A5h or a PUC
    73                                                 *  will be generated. */
    74            FAIL_t      FAIL;                   /*!  FAIL Bit 7 Operation failure. This bit is set if the fFTG clock source fails, or a flash
    75                                                 *  operation is aborted from an interrupt when EEIEX = 1. FAIL must be reset
    76                                                 *  with software.
    77                                                 *  0  No failure
    78                                                 *  1  Failure */
    79            LOCKA_t     LOCKA;                  /*! SegmentA and Info lock. Write a 1 to this bit to change its state. Writing 0 has
    80                                                 *  no effect.
    81                                                 *  0  Segment A unlocked and all information memory is erased during a
    82                                                 *     mass erase.
    83                                                 *  1  Segment A locked and all information memory is protected from erasure
    84                                                 *     during a mass erase. */
    85            EMEX_t      EMEX;                   /*! Emergency exit
    86                                                 *  0  No emergency exit
    87                                                 *  1  Emergency exit */
    88            LOCK_t      LOCK;                   /*! Lock. This bit unlocks the flash memory for writing or erasing. The LOCK bit
    89                                                 *  can be set anytime during a byte/word write or erase operation and the
    90                                                 *  operation will complete normally. In the block write mode if the LOCK bit is set
    91                                                 *  while BLKWRT=WAIT=1, then BLKWRT and WAIT are reset and the mode
    92                                                 *  ends normally.
    93                                                 *  0  Unlocked
    94                                                 *  1  Locked */
    95            WAIT_t      WAIT;                   /*! Wait. Indicates the flash memory is being written to.
    96                                                 *  0  The flash memory is not ready for the next byte/word write
    97                                                 *  1  The flash memory is ready for the next byte/word write */
    98            ACCVIFG_t   ACCVIFG;                /*! Access violation interrupt flag
    99                                                 *  0 No interrupt pending
   100                                                 *  1 Interrupt pending */
   101            KEYV_t      KEYV;                   /*! Flash security key violation. This bit indicates an incorrect FCTLx password
   102                                                 *  was written to any flash control register and generates a PUC when set. KEYV
   103                                                 *  must be reset with software.
   104                                                 *  0  FCTLx password was written correctly
   105                                                 *  1  FCTLx password was written incorrectly */
   106            BUSY_t      BUSY;                   /*! Busy. This bit indicates the status of the flash timing generator.
   107                                                 *  0  Not Busy
   108                                                 *  1  Busy */
   109        }
   110
   111        /*
   112         *  ======== create ========
   113         */
   114        create(IClock.Instance clock);
   115
   116    instance:
   117        /*! Flash Memory Control Register 1 */
   118        config FCTL1_t FCTL1 = {
   119            FWKEY   : FWKEY,
   120            BLKWRT  : BLKWRT_OFF,
   121            WRT     : WRT_OFF,
   122            EEIEX   : EEIEX_OFF,
   123            EEI     : EEI_OFF,
   124            MERAS   : MERAS_OFF,
   125            ERASE   : ERASE_OFF
   126        };
   127
   128        /*! Flash Memory Control Register 2 */
   129        config FCTL2_t FCTL2 = {
   130            FWKEY       : FWKEY,
   131            FSSEL       : FSSEL_1,
   132            FN5         : FN5_OFF,
   133            FN4         : FN4_OFF,
   134            FN3         : FN3_OFF,
   135            FN2         : FN2_OFF,
   136            FN1         : FN1,
   137            FN0         : FN0_OFF
   138        };
   139
   140        /*! Flash Memory Control Register 3 */
   141        config FCTL3_t FCTL3 = {
   142            FAIL        : FAIL_OFF,
   143            LOCKA       : LOCKA_OFF,
   144            EMEX        : EMEX_OFF,
   145            LOCK        : LOCK,
   146            WAIT        : WAIT,
   147            ACCVIFG     : ACCVIFG_OFF,
   148            KEYV        : KEYV_OFF,
   149            BUSY        : BUSY_OFF
   150        };
   151
   152        /*! Determine if each Register needs to be forced set or not */
   153        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] = [
   154            { register : "FCTL1" , regForceSet : false },
   155            { register : "FCTL2" , regForceSet : false },
   156            { register : "FCTL3" , regForceSet : false }
   157        ];
   158
   159        config IClock.Instance clock;
   160    }


interface ti.catalog.msp430.peripherals.memory.IFlash

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IFlash ========
    35     *  MSP430 IFlash interface
    36     */
    37    metaonly interface IFlash inherits xdc.platform.IPeripheral {
    38
    39        enum FWKEY_t {
    40            FWKEY_OFF = 0x00,
    41            FWKEY = 0xA500
    42        };
    43
    44        /*! Block write mode */
    45        enum BLKWRT_t {
    46            BLKWRT_OFF = (0x0000),              /*! Block-write mode is off */
    47            BLKWRT = 0x0080                     /*! Block-write mode is on */
    48        };
    49
    50        /*! Write */
    51        enum WRT_t {
    52            WRT_OFF = (0x0000),                 /*! Write mode is off */
    53            WRT = 0x0040                        /*! Write mode is on */
    54        };
    55
    56        /*! Enable Emergency Interrupt Exit */
    57        enum EEIEX_t {
    58            EEIEX_OFF = (0x0000),               /*! Exit interrupt disabled */
    59            EEIEX = 0x0010                      /*! Exit interrupt enabled */
    60        };
    61
    62        /*! Enable Erase Interrupts */
    63        enum EEI_t {
    64            EEI_OFF = (0x0000),                 /*! Interrupts during segment erase disabled */
    65            EEI = 0x0008                        /*! Interrupts during segment erase enabled */
    66        };
    67
    68        /*! Mass erase */
    69        enum MERAS_t {
    70            MERAS_OFF = (0x0000),               /*! Mass erase disabled */
    71            MERAS = 0x0004                      /*! Mass erase enabled */
    72        };
    73
    74        /*! Erase */
    75        enum ERASE_t {
    76            ERASE_OFF = (0x0000),               /*! Erase disabled */
    77            ERASE = 0x0002                      /*! Erase enabled */
    78        };
    79
    80        enum FSSEL_t {
    81            FSSEL_0 = 0x0000,                   /*! ACLK */
    82            FSSEL_1 = 0x0040,                   /*! MCLK  */
    83            FSSEL_2 = 0x0080                    /*! SMCLK */
    84         };
    85
    86         /*! Flash controller clock divider bit 0 */
    87        enum FN0_t {
    88            FN0_OFF = (0x0000),                 /*! Flash controller clock divider bit 0 */
    89            FN0 = 0x0001                        /*! Flash controller clock divider bit 0 */
    90        };
    91
    92        /*! Flash controller clock divider bit 1 */
    93        enum FN1_t {
    94            FN1_OFF = (0x0000),                 /*! Flash controller clock divider bit 1 */
    95            FN1 = 0x0002                        /*! Flash controller clock divider bit 1 */
    96        };
    97
    98        /*! Flash controller clock divider bit 2 */
    99        enum FN2_t {
   100            FN2_OFF = (0x0000),                 /*! Flash controller clock divider bit 2 */
   101            FN2 = 0x0004                        /*! Flash controller clock divider bit 2 */
   102        };
   103
   104        /*! Flash controller clock divider bit 3 */
   105        enum FN3_t {
   106            FN3_OFF = (0x0000),                 /*! Flash controller clock divider bit 3 */
   107            FN3 = 0x0008                        /*! Flash controller clock divider bit 3 */
   108        };
   109
   110        /*! Flash controller clock divider bit 4 */
   111        enum FN4_t {
   112            FN4_OFF = (0x0000),                 /*! Flash controller clock divider bit 4 */
   113            FN4 = 0x0010                        /*! Flash controller clock divider bit 4 */
   114        };
   115
   116        /*! Flash controller clock divider bit 5 */
   117        enum FN5_t {
   118            FN5_OFF = (0x0000),                 /*! Flash controller clock divider bit 5 */
   119            FN5 = 0x0020                        /*! Flash controller clock divider bit 5 */
   120        };
   121
   122        /*! Operation failure */
   123        enum FAIL_t {
   124            FAIL_OFF = (0x0000),                /*! No failure */
   125            FAIL = 0x0080                       /*! Failure */
   126        };
   127
   128        /*! SegmentA and Info lock */
   129        enum LOCKA_t {
   130            LOCKA_OFF = (0x0000),               /*! Segment A unlocked and all information memory is erased during a mass erase */
   131            LOCKA = 0x0040                      /*! Segment A locked and all information memory is protected from erasure during a mass erase */
   132        };
   133
   134        /*! Emergency exit */
   135        enum EMEX_t {
   136            EMEX_OFF = (0x0000),                /*! No emergency exit */
   137            EMEX = 0x0020                       /*! Emergency exit */
   138        };
   139
   140        /*! Lock */
   141        enum LOCK_t {
   142            LOCK_OFF = (0x0000),                /*! Unlocked */
   143            LOCK = 0x0010                       /*! Locked */
   144        };
   145
   146        /*! Wait */
   147        enum WAIT_t {
   148            WAIT_OFF = (0x0000),                /*! The flash memory is not ready for the next byte/word write */
   149            WAIT = 0x0008                       /*! The flash memory is ready for the next byte/word write */
   150        };
   151
   152        /*! Access violation interrupt flag */
   153        enum ACCVIFG_t {
   154            ACCVIFG_OFF = (0x0000),             /*! No interrupt pending */
   155            ACCVIFG = 0x0004                    /*! Interrupt pending */
   156        };
   157
   158        /*! Flash security key violation */
   159        enum KEYV_t {
   160            KEYV_OFF = (0x0000),                /*! FCTLx password was written correctly */
   161            KEYV = 0x0002                       /*! FCTLx password was written incorrectly */
   162        };
   163
   164        /*! Busy */
   165        enum BUSY_t {
   166            BUSY_OFF = (0x0000),                /*! Not Busy */
   167            BUSY = 0x0001                       /*! Busy */
   168        };
   169
   170        /*!
   171        *  ======== ForceSetDefaultRegister_t ========
   172        *  Force Set Default Register
   173        *
   174        *  Type to store if each register needs to be forced initialized
   175        *  even if the register is in default state.
   176        *
   177        *  @see #ForceSetDefaultRegister_t
   178        */
   179        struct ForceSetDefaultRegister_t {
   180            String     register;
   181            Bool       regForceSet;
   182        }
   183
   184
   185    instance:
   186        /*! Max Flash Timing Generator Value from Datasheet */
   187        config UInt8 uMaxFtg;
   188
   189        /*! Min Flash Timing Generator Value from Datasheet */
   190        config UInt8 uMinFtg;
   191
   192    }


package ti.catalog.msp430.peripherals.memory

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.clock;
    34    requires ti.catalog.msp430.peripherals.special_function;
    35    /*!
    36     *  ======== ti.catalog.msp430.peripherals.memory ========
    37     *  MSP430 Flash memory peripheral
    38     */
    39    package ti.catalog.msp430.peripherals.memory [1, 0, 0] {
    40        interface IFlash;
    41        module Flash_2xx;
    42    }


interface ti.catalog.msp430.peripherals.oa.IOA

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IOA ========
    35     *  MSP430 General Purpose Operational Amplifier
    36     */
    37    metaonly interface IOA inherits xdc.platform.IPeripheral {
    38
    39        /*! Inverting input selection */
    40        enum OAN_t {
    41          OAN_0 = (0*0x400u),       /*! OAxI0 */
    42          OAN_1 = (1*0x400u),       /*! OAxI1 */
    43          OAN_2 = (2*0x400u),       /*! OAxI2 */
    44          OAN_3 = 3*0x400u          /*! OAxI3 */
    45        };
    46
    47        /*! Non-inverting input selection */
    48        enum OAP_t {
    49          OAP_0 = (0*0x400u),       /*! OAxI0 */
    50          OAP_1 = (1*0x400u),       /*! OAxI1 */
    51          OAP_2 = (2*0x400u),       /*! OAxI2 */
    52          OAP_3 = 3*0x400u          /*! OAxI3 */
    53        };
    54
    55        /*! Slew rate select */
    56        enum OAPM_t {
    57          OAPM_0 = (0*0x400u),      /*! Off, output high Z */
    58          OAPM_1 = (1*0x400u),      /*! Slow */
    59          OAPM_2 = (2*0x400u),      /*! Medium */
    60          OAPM_3 = 3*0x400u         /*! Fast */
    61        };
    62
    63        enum OAADC0_t {
    64          OAADC0_OFF = (0x00),      /*! OAx output to ADC12 input channel select 0 */
    65          OAADC0 = 0x01             /*! OAx output to ADC12 input channel select 0 */
    66        };
    67
    68        enum OAADC1_t {
    69          OAADC1_OFF = (0x00),      /*! OAx output to ADC12 input channel select 1 */
    70          OAADC1 = 0x02             /*! OAx output to ADC12 input channel select 1 */
    71        };
    72
    73        /*! OAx feedback resistor select */
    74        enum OAFBR_t {
    75          OAFBR_0 = (0*0x100u),     /*! OAx Feedback resistor: Tap 0 */
    76          OAFBR_1 = (1*0x100u),     /*! OAx Feedback resistor: Tap 1 */
    77          OAFBR_2 = (2*0x100u),     /*! OAx Feedback resistor: Tap 2 */
    78          OAFBR_3 = (3*0x100u),     /*! OAx Feedback resistor: Tap 3 */
    79          OAFBR_4 = (4*0x100u),     /*! OAx Feedback resistor: Tap 4 */
    80          OAFBR_5 = (5*0x100u),     /*! OAx Feedback resistor: Tap 5 */
    81          OAFBR_6 = (6*0x100u),     /*! OAx Feedback resistor: Tap 6 */
    82          OAFBR_7 = 7*0x100u        /*! OAx Feedback resistor: Tap 7 */
    83        };
    84
    85        /*! OAx function control */
    86        enum OAFC_t {
    87          OAFC_0 = (0*0x100u),      /*! General Purpose */
    88          OAFC_1 = (1*0x100u),      /*! Unity gain buffer for three-opamp differential amplifier */
    89          OAFC_2 = (2*0x100u),      /*! Unity gain buffer */
    90          OAFC_3 = (3*0x100u),      /*! Comparator */
    91          OAFC_4 = (4*0x100u),      /*! Non-inverting PGA */
    92          OAFC_5 = (5*0x100u),      /*! Cascaded non-inverting PGA */
    93          OAFC_6 = (6*0x100u),      /*! Inverting PGA */
    94          OAFC_7 = 7*0x100u         /*! Differential amplifier */
    95        };
    96
    97        enum OARRIP_t {
    98          OARRIP_OFF = 0x00,        /*! Rtop = AVss, Rbottom = AVcc */
    99          OARRIP     = 0x01         /*! Rtop = AVcc, Rbottom = AVss */
   100        };
   101
   102        enum OANEXT_t {
   103          OANEXT_OFF = 0x00,        /*! OAx inverting input not externally available */
   104          OANEXT     = 0x02         /*! OAx inverting input externally available */
   105        };
   106
   107       /*!
   108        *  ======== OAxCTL0_t ========
   109        *  Opamp Control Register 0 Definition
   110        *
   111        *  @see #OAxCTL0_t
   112        */
   113        struct OAxCTL0_t {
   114          OAN_t     OAN;            /*! Inverting input select. These bits select the input signal for the OA inverting
   115                                      * input.
   116                                      *  00  OAxI0
   117                                      *  01  OAxI1
   118                                      *  10  OAxIA (see the device-specific data sheet for connected signal)
   119                                      *  11  OAxIB (see the device-specific data sheet for connected signal) */
   120          OAP_t     OAP;            /*! Non-inverting input select. These bits select the input signal for the OA
   121                                      * non-inverting input.
   122                                      *  00  OAxI0
   123                                      *  01  OA0I1
   124                                      *  10  OAxIA (see the device-specific data sheet for connected signal)
   125                                      *  11  OAxIB (see the device-specific data sheet for connected signal) */
   126          OAPM_t    OAPM;           /*! Slew rate select. These bits select the slew rate vs. current consumption
   127                                      * for the OA.
   128                                      *  00  Off, output high Z
   129                                      *  01  Slow
   130                                      *  10  Medium
   131                                      *  11  Fast */
   132          OAADC0_t  OAADC0;         /*! OA output select. These bits, together with the OAFCx bits, control the
   133                                      * routing of the OAx output when OAPMx > 0.
   134                                      * When OAFCx = 0:
   135                                      *  00  OAxOUT connected to external pins and ADC input A1, A3, or A5
   136                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   137                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   138                                      *  11  OAxOUT connected to external pins and ADC input A12, A13, or A14
   139                                      * When OAFCx > 0:
   140                                      *  00  OAxOUT used for internal routing only
   141                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   142                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   143                                      *  11  OAxOUT connected internally to ADC input A12, A13 , or A14.
   144                                      * External A12, A13, or A14 pin connections are disconnected from the
   145                                      * ADC. */
   146          OAADC1_t  OAADC1;         /*! OA output select. These bits, together with the OAFCx bits, control the
   147                                      * routing of the OAx output when OAPMx > 0.
   148                                      * When OAFCx = 0:
   149                                      *  00  OAxOUT connected to external pins and ADC input A1, A3, or A5
   150                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   151                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   152                                      *  11  OAxOUT connected to external pins and ADC input A12, A13, or A14
   153                                      * When OAFCx > 0:
   154                                      *  00  OAxOUT used for internal routing only
   155                                      *  01  OAxOUT connected to external pins and ADC input A12, A13, or A14
   156                                      *  10  OAxOUT connected to external pins and ADC input A1, A3, or A5
   157                                      *  11  OAxOUT connected internally to ADC input A12, A13 , or A14.
   158                                      * External A12, A13, or A14 pin connections are disconnected from the
   159                                      * ADC. */
   160        }
   161
   162        /*!
   163        *  ======== OAxCTL1_t ========
   164        *  Opamp Control Register 1 Definition
   165        *
   166        *  @see #OAxCTL1_t
   167        */
   168        struct OAxCTL1_t {
   169          OAFBR_t   OAFBR;          /*! OAx feedback resistor select
   170                                      *  000  Tap 0 - 0R/16R
   171                                      *  001  Tap 1 - 4R/12R
   172                                      *  010  Tap 2 - 8R/8R
   173                                      *  011  Tap 3 - 10R/6R
   174                                      *  100  Tap 4 - 12R/4R
   175                                      *  101  Tap 5 - 13R/3R
   176                                      *  110  Tap 6 - 14R/2R
   177                                      *  111  Tap 7 - 15R/1R */
   178          OAFC_t    OAFC;           /*! OAx function control. This bit selects the function of OAx
   179                                      *  000  General purpose opamp
   180                                      *  001  Unity gain buffer for three-opamp differential amplifier
   181                                      *  010  Unity gain buffer
   182                                      *  011  Comparator
   183                                      *  100  Non-inverting PGA amplifier
   184                                      *  101  Cascaded non-inverting PGA amplifier
   185                                      *  110  Inverting PGA amplifier
   186                                      *  111  Differential amplifier */
   187          OANEXT_t  OANEXT;         /*! OAx inverting input externally available. This bit, when set, connects the
   188                                      * inverting OAx input to the external pin when the integrated resistor network
   189                                      * is used.
   190                                      *  0  OAx inverting input not externally available
   191                                      *  1  OAx inverting input externally available */
   192          OARRIP_t  OARRIP;         /*! OAx reverse resistor connection in comparator mode
   193                                      *  0  RTOP is connected to AVSS and RBOTTOM is connected to AVCC when
   194                                      *     OAFCx = 3
   195                                      *  1  RTOP is connected to AVCC and RBOTTOM is connected to AVSS when
   196                                      *     OAFCx = 3. */
   197        }
   198
   199        /*!
   200        *  ======== ForceSetDefaultRegister_t ========
   201        *  Force Set Default Register
   202        *
   203        *  Type to store if each register needs to be forced initialized
   204        *  even if the register is in default state.
   205        *
   206        *  @see #ForceSetDefaultRegister_t
   207        */
   208        struct ForceSetDefaultRegister_t {
   209            String     register;
   210            Bool       regForceSet;
   211        }
   212
   213    instance:
   214
   215        /*! Returns the number of available OA */
   216        UChar getNumberOfOA();
   217    }


module ti.catalog.msp430.peripherals.oa.OA_2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== OA_2 ========
    35     *  MSP430 General Purpose Operational Amplifier
    36     *
    37     *  The module is named OA_2 because it only supports two OAs. A device
    38     *  containing three op-amps would require a separate module.
    39     */
    40    metaonly module OA_2 inherits IOA {
    41        /*!
    42         *  ======== create ========
    43         *  Create an instance of this peripheral
    44         */
    45        create();
    46
    47    instance:
    48        /*! OA0 control register 0 */
    49        config OAxCTL0_t OA0CTL0 = {
    50          OAN : OAN_0,
    51          OAP : OAP_0,
    52          OAPM : OAPM_0,
    53          OAADC0 : OAADC0_OFF,
    54          OAADC1 : OAADC1_OFF
    55        };
    56
    57        /*! OA0 control register 1 */
    58        config OAxCTL1_t OA0CTL1 = {
    59          OAFBR : OAFBR_0,
    60          OAFC : OAFC_0,
    61          OANEXT : OANEXT_OFF,
    62          OARRIP : OARRIP_OFF,
    63        };
    64
    65        /*! OA1 control register 0 */
    66        config OAxCTL0_t OA1CTL0 = {
    67          OAN : OAN_0,
    68          OAP : OAP_0,
    69          OAPM : OAPM_0,
    70          OAADC0 : OAADC0_OFF,
    71          OAADC1 : OAADC1_OFF
    72        };
    73
    74        /*! OA1 control register 1 */
    75        config OAxCTL1_t OA1CTL1 = {
    76          OAFBR : OAFBR_0,
    77          OAFC : OAFC_0,
    78          OANEXT : OANEXT_OFF,
    79          OARRIP : OARRIP_OFF,
    80        };
    81
    82        /*! Determine if each Register needs to be forced set or not */
    83        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    84        [
    85            { register : "OA0CTL0" , regForceSet : false },
    86            { register : "OA0CTL1" , regForceSet : false },
    87            { register : "OA1CTL0" , regForceSet : false },
    88            { register : "OA1CTL1" , regForceSet : false }
    89        ];
    90    }


package ti.catalog.msp430.peripherals.oa

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.oa ========
    35     *  MSP430 Op Amp peripheral
    36     */
    37    package ti.catalog.msp430.peripherals.oa [1, 0, 0] {
    38        interface IOA;
    39        module    OA_2;
    40    }


interface ti.catalog.msp430.peripherals.pinmux.IPinMux

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IPinMux ========
    35     */
    36    metaonly interface IPinMux inherits xdc.platform.IPeripheral {
    37
    38        struct ForceSetDefaultRegister_t {
    39            String     register;
    40            Bool       regForceSet;
    41        }
    42
    43    instance:
    44        /*! Port 1 Output Register */
    45        config Bits8 p1out = 0;
    46
    47        /*! Port 1 Port Select Register 0 */
    48        config Bits8 p1sel0 = 0;
    49
    50        /*! Port 1 Port Select Register 1 */
    51        config Bits8 p1sel1 = 0;
    52
    53        /*! Port 1 Direction Register */
    54        config Bits8 p1dir = 0;
    55
    56        /*! Port 1 Resistor Enable Register */
    57        config Bits8 p1ren = 0;
    58
    59        /*! Port 2 Output Register */
    60        config Bits8 p2out = 0;
    61
    62        /*! Port 2 Port Select Register 0 */
    63        config Bits8 p2sel0 = 0;
    64
    65        /*! Port 2 Port Select Register 1 */
    66        config Bits8 p2sel1 = 0;
    67
    68        /*! Port 2 Direction Register */
    69        config Bits8 p2dir = 0;
    70
    71        /*! Port 2 Resistor Enable Register */
    72        config Bits8 p2ren = 0;
    73
    74        /*! Port 3 Output Register */
    75        config Bits8 p3out = 0;
    76
    77        /*! Port 3 Port Select Register 0 */
    78        config Bits8 p3sel0 = 0;
    79
    80        /*! Port 3 Port Select Register 1 */
    81        config Bits8 p3sel1 = 0;
    82
    83        /*! Port 3 Direction Register */
    84        config Bits8 p3dir = 0;
    85
    86        /*! Port 3 Resistor Enable Register */
    87        config Bits8 p3ren = 0;
    88
    89        /*! Port 4 Output Register */
    90        config Bits8 p4out = 0;
    91
    92        /*! Port 4 Port Select Register 0 */
    93        config Bits8 p4sel0 = 0;
    94
    95        /*! Port 4 Port Select Register 1 */
    96        config Bits8 p4sel1 = 0;
    97
    98        /*! Port 4 Direction Register */
    99        config Bits8 p4dir = 0;
   100
   101        /*! Port 4 Resistor Enable Register */
   102        config Bits8 p4ren = 0;
   103
   104        /*! Port J Output Register */
   105        config Bits8 pjout = 0;
   106
   107        /*! Port J Port Select Register 0 */
   108        config Bits8 pjsel0 = 0;
   109
   110        /*! Port J Port Select Register 1 */
   111        config Bits8 pjsel1 = 0;
   112
   113        /*! Port J Direction Register */
   114        config Bits8 pjdir = 0;
   115
   116        /*! Port J Resistor Enable Register */
   117        config Bits8 pjren = 0;
   118
   119        /*! Port 1 Interrupt Enable */
   120        config Bits8 p1ie = 0;
   121
   122        /*! Port 1 Interrupt Edge Select */
   123        config Bits8 p1ies = 0;
   124
   125        /*! Port 2 Interrupt Enable */
   126        config Bits8 p2ie = 0;
   127
   128        /*! Port 2 Interrupt Edge Select */
   129        config Bits8 p2ies = 0;
   130
   131        /*! Port 3 Interrupt Enable */
   132        config Bits8 p3ie = 0;
   133
   134        /*! Port 3 Interrupt Edge Select */
   135        config Bits8 p3ies = 0;
   136
   137        /*! Port 4 Interrupt Enable */
   138        config Bits8 p4ie = 0;
   139
   140        /*! Port 4 Interrupt Edge Select */
   141        config Bits8 p4ies = 0;
   142
   143        /*! Port 1 Interrupt Flag Register */
   144        config Bits8 p1ifg = 0;
   145
   146        /*! Port 2 Interrupt Flag Register */
   147        config Bits8 p2ifg = 0;
   148
   149        /*! Port 3 Interrupt Flag Register */
   150        config Bits8 p3ifg = 0;
   151
   152        /*! Port 4 Interrupt Flag Register */
   153        config Bits8 p4ifg = 0;
   154
   155        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[length];
   156    }


package ti.catalog.msp430.peripherals.pinmux

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.clock;
    34    requires ti.catalog.msp430.peripherals.special_function;
    35
    36    /*!
    37     *  ======== ti.catalog.msp430.peripherals.pinmux ========
    38     */
    39    package ti.catalog.msp430.peripherals.pinmux [1, 0, 0] {
    40        interface IPinMux;
    41        module  PinMux;
    42    }


module ti.catalog.msp430.peripherals.pinmux.PinMux

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== PinMux ========
    36      */
    37    metaonly module PinMux inherits IPinMux
    38    {
    39    instance:
    40        /*!
    41         *  ======== baseAddr ========
    42         *  Address of the peripheral's control register.
    43         *
    44         *  A peripheral's registers are commonly accessed through a structure
    45         *  that defines the offsets of a particular register from the lowest
    46         *  address mapped to a peripheral. That lowest address is specified by
    47         *  this parameter.
    48         */
    49        config UInt baseAddr;
    50    }


interface ti.catalog.msp430.peripherals.pmm.IPMM

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IPMM ========
    35     *  MSP430 Power Management Interface
    36     */
    37    metaonly interface IPMM inherits xdc.platform.IPeripheral {
    38
    39        /*!
    40        *  ======== ForceSetDefaultRegister_t ========
    41        *  Force Set Default Register
    42        *
    43        *  Type to store if each register needs to be forced initialized
    44        *  even if the register is in default state.
    45        *
    46        *  @see #ForceSetDefaultRegister_t
    47        */
    48        struct ForceSetDefaultRegister_t {
    49            String     register;
    50            Bool       regForceSet;
    51        }
    52    }


package ti.catalog.msp430.peripherals.pmm

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.clock;
    34    requires ti.catalog.msp430.peripherals.special_function;
    35
    36    /*!
    37     *  ======== ti.catalog.msp430.peripherals.pmm ========
    38     *  MSP430 PMM (Power Management Module) peripheral
    39     */
    40    package ti.catalog.msp430.peripherals.pmm [1, 0, 0] {
    41        interface IPMM;
    42        module  PMM;
    43    }


module ti.catalog.msp430.peripherals.pmm.PMM

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== PMM ========
    36     *  MSP430 Power Management Module
    37     */
    38    metaonly module PMM inherits IPMM
    39    {
    40    instance:
    41        /*!
    42         *  ======== baseAddr ========
    43         *  Address of the peripheral's control register.
    44         *
    45         *  A peripheral's registers are commonly accessed through a structure
    46         *  that defines the offsets of a particular register from the lowest
    47         *  address mapped to a peripheral. That lowest address is specified by
    48         *  this parameter.
    49         */
    50        config UInt baseAddr;
    51    }


interface ti.catalog.msp430.peripherals.ref.IREF

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IREF ========
    35     *  MSP430 REF Interface
    36     */
    37    metaonly interface IREF inherits xdc.platform.IPeripheral {
    38
    39        /*!
    40        *  ======== ForceSetDefaultRegister_t ========
    41        *  Force Set Default Register
    42        *
    43        *  Type to store if each register needs to be forced initialized
    44        *  even if the register is in default state.
    45        *
    46        *  @see #ForceSetDefaultRegister_t
    47        */
    48        struct ForceSetDefaultRegister_t {
    49            String     register;
    50            Bool       regForceSet;
    51        }
    52    }


package ti.catalog.msp430.peripherals.ref

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.clock;
    34    requires ti.catalog.msp430.peripherals.special_function;
    35
    36    /*!
    37     *  ======== ti.catalog.msp430.peripherals.ref ========
    38     *  MSP430 REF (Reference Module) peripheral
    39     */
    40    package ti.catalog.msp430.peripherals.ref [1, 0, 0] {
    41        interface IREF;
    42        module  REF;
    43        module  REF_A;
    44    }


module ti.catalog.msp430.peripherals.ref.REF

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== REF ========
    36     *  MSP430 REF Module
    37     */
    38    metaonly module REF inherits IREF
    39    {
    40    instance:
    41        /*!
    42         *  ======== baseAddr ========
    43         *  Address of the peripheral's control register.
    44         *
    45         *  A peripheral's registers are commonly accessed through a structure
    46         *  that defines the offsets of a particular register from the lowest
    47         *  address mapped to a peripheral. That lowest address is specified by
    48         *  this parameter.
    49         */
    50        config UInt baseAddr;
    51    }


module ti.catalog.msp430.peripherals.ref.REF_A

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== REF_A ========
    36     *  MSP430 REF_A Module
    37     */
    38    metaonly module REF_A inherits IREF
    39    {
    40    instance:
    41        /*!
    42         *  ======== baseAddr ========
    43         *  Address of the peripheral's control register.
    44         *
    45         *  A peripheral's registers are commonly accessed through a structure
    46         *  that defines the offsets of a particular register from the lowest
    47         *  address mapped to a peripheral. That lowest address is specified by
    48         *  this parameter.
    49         */
    50        config UInt baseAddr;
    51    }


interface ti.catalog.msp430.peripherals.rtc.IRTC

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== IRTC ========
    36     *  MSP430 Real-Time Clock interface
    37     */
    38    metaonly interface IRTC inherits xdc.platform.IPeripheral {
    39
    40        /*!
    41        *  ======== ForceSetDefaultRegister_t ========
    42        *  Force Set Default Register
    43        *
    44        *  Type to store if each register needs to be forced initialized
    45        *  even if the register is in default state.
    46        *
    47        *  @see #ForceSetDefaultRegister_t
    48        */
    49        struct ForceSetDefaultRegister_t {
    50            String     register;
    51            Bool       regForceSet;
    52        }
    53
    54        /*!
    55        *  ======== regIntVect_t ========
    56        *  Interrupt vector description
    57        *
    58        *  Type to describe a single interrupt vector pin and all its possible
    59        *  configurations.
    60        *
    61        *  @see #regIntVect_t
    62        */
    63        struct regIntVect_t {
    64            String                    registerName;
    65            String                    registerDescription;
    66            String                    isrToggleString;
    67            String                    priorityName;
    68            Bool                      interruptEnable;
    69            Bool                      interruptHandler;
    70            Int                       priority;
    71        }
    72
    73
    74    instance:
    75
    76    }


package ti.catalog.msp430.peripherals.rtc

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /* requires ti.catalog.msp430.peripherals.special_function; ?? */
    35
    36    /*!
    37     *  ======== ti.catalog.msp430.peripherals.rtc ========
    38     *  MSP430 RTC (real time clock) peripheral
    39     */
    40    package ti.catalog.msp430.peripherals.rtc [1, 0, 0] {
    41        interface IRTC;
    42        module RTC_B;
    43    }


module ti.catalog.msp430.peripherals.rtc.RTC_B

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== RTC_B ========
    36     *  MSP430 Real-Time Clock B
    37     */
    38    metaonly module RTC_B inherits IRTC {
    39
    40    instance:
    41        /*!
    42         *  ======== baseAddr ========
    43         *  Address of the peripheral's control register.
    44         *
    45         *  A peripheral's registers are commonly accessed through a structure
    46         *  that defines the offsets of a particular register from the lowest
    47         *  address mapped to a peripheral. That lowest address is specified by
    48         *  this parameter.
    49         */
    50        config UInt baseAddr;
    51
    52        /*! RTC interrupt enables */
    53        config regIntVect_t interruptSource[4];
    54
    55        /*! Determine if each Register needs to be forced set or not */
    56        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    57        [
    58        ];
    59
    60    }


module ti.catalog.msp430.peripherals.special_function.IE1

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IE1 ========
    35     *  MSP430 Interrupt Enable Register 1
    36     */
    37    metaonly module IE1 inherits xdc.platform.IPeripheral {
    38
    39        enum NMIIE_t {
    40            NMIIE_OFF  = 0x00,           /*! Interrupt not enabled */
    41            NMIIE      = 0x10            /*! Interrupt enabled */
    42        };
    43
    44        enum WDTIE_t {
    45            WDTIE_OFF  = 0x00,           /*! Interrupt not enabled */
    46            WDTIE      = 0x01            /*! Interrupt enabled */
    47        };
    48
    49        enum OFIE_t {
    50            OFIE_OFF   = 0x00,           /*! Interrupt not enabled */
    51            OFIE       = 0x02            /*! Interrupt enabled */
    52        };
    53
    54        enum ACCVIE_t {
    55            ACCVIE_OFF = 0x00,           /*! Interrupt not enabled */
    56            ACCVIE     = 0x20            /*! Interrupt enabled */
    57        };
    58
    59        enum NMIIFG_t {
    60            NMIIFG_OFF = 0x00,           /*! No interrupt pending */
    61            NMIIFG     = 0x10            /*! Interrupt pending */
    62        };
    63
    64        enum WDTIFG_t {
    65            WDTIFG_OFF = 0x00,           /*! No interrupt pending */
    66            WDTIFG     = 0x01            /*! Interrupt pending */
    67        };
    68
    69        enum OFIFG_t {
    70            OFIFG_OFF  = 0x00,           /*! No interrupt pending */
    71            OFIFG      = 0x02            /*! Interrupt pending */
    72        };
    73
    74        enum ACCVIFG_t {
    75            ACCVIFG_OFF = 0x00,          /*! No interrupt pending */
    76            ACCVIFG     = 0x20           /*! Interrupt pending */
    77        };
    78
    79        /* IE1 */
    80        struct IE1_t {
    81            ACCVIE_t    ACCVIE;          /*! Flash memory access violation interrupt
    82                                          * enable. This bit enables the ACCVIFG interrupt.
    83                                          *  0  Interrupt disabled
    84                                          *  1  Interrupt enabled */
    85            NMIIE_t      NMIIE;          /*! NMI interrupt enable. This bit enables
    86                                          *the NMI interrupt.
    87                                          *  0  Interrupt disabled
    88                                          *  1  Interrupt enabled */
    89            OFIE_t      OFIE;            /*! Oscillator fault flag interrupt enable
    90                                          *This bit enables the OFIFG interrupt.
    91                                          *  0  Interrupt disabled
    92                                          *  1  Interrupt enabled */
    93            WDTIE_t     WDTIE;           /*! Watchdog timer+ interrupt enable. This
    94                                          *bit enables the WDTIFG interrupt for
    95                                          *interval timer mode. It is not necessary
    96                                          *to set this bit for watchdog mode.
    97                                          *  0  Interrupt disabled
    98                                          *  1  Interrupt enabled */
    99        }
   100
   101        /* IFG1 */
   102        struct IFG1_t {
   103            ACCVIFG_t    ACCVIFG;        /*! Flash memory access violation interrupt
   104                                          * flag.
   105                                          *  0  No interrupt pending
   106                                          *  1  Interrupt pending */
   107            NMIIFG_t     NMIIFG;         /*! NMI interrupt flag.
   108                                          *  0  No interrupt pending
   109                                          *  1  Interrupt pending */
   110            OFIFG_t      OFIFG;          /*! Oscillator fault interrupt flag
   111                                          *  0  No interrupt pending
   112                                          *  1  Interrupt pending */
   113            WDTIFG_t     WDTIFG;         /*! Watchdog timer+ interrupt flag.
   114                                          *  0  No interrupt pending
   115                                          *  1  Interrupt pending */
   116        }
   117
   118       /*!
   119        *  ======== regIntVect_t ========
   120        *  Interrupt vector description
   121        *
   122        *  Type to describe a single interrupt vector pin and all its possible
   123        *  configurations.
   124        *
   125        *  @see #regIntVect_t
   126        */
   127        struct regIntVect_t {
   128            String                    registerName;
   129            String                    registerDescription;
   130            String                    isrToggleString;
   131            String                    priorityName;
   132            Bool                      interruptEnable;
   133            Bool                      interruptHandler;
   134            Int                       priority;
   135        }
   136
   137        /*!
   138        *  ======== ForceSetDefaultRegister_t ========
   139        *  Force Set Default Register
   140        *
   141        *  Type to store if each register needs to be forced initialized
   142        *  even if the register is in default state.
   143        *
   144        *  @see #ForceSetDefaultRegister_t
   145        */
   146        struct ForceSetDefaultRegister_t {
   147            String     register;
   148            Bool       regForceSet;
   149        }
   150
   151    instance:
   152        /*! IE1 interrupt enables
   153         */
   154        config regIntVect_t interruptSource[8];
   155
   156        /*! IE1, Interrupt Enable Register 1 */
   157        config IE1_t IE1 = {
   158            ACCVIE      : ACCVIE_OFF,
   159            NMIIE       : NMIIE_OFF,
   160            OFIE        : OFIE_OFF,
   161            WDTIE       : WDTIE_OFF
   162        };
   163
   164        /*! IFG1, Interrupt Flag Register 1 */
   165        config IFG1_t IFG1 = {
   166            ACCVIFG     : ACCVIFG_OFF,
   167            NMIIFG      : NMIIFG_OFF,
   168            OFIFG       : OFIFG_OFF,
   169            WDTIFG      : WDTIFG_OFF
   170        };
   171
   172       /*!
   173        *  ======== getWDTIE ========
   174        *  Gets WDTIE bit
   175        *
   176        *  @see #getWDTIE
   177        */
   178        Bool    getWDTIE();
   179
   180       /*!
   181        *  ======== setWDTIE ========
   182        *  Sets WDTIE bit
   183        *
   184        *  @see #setWDTIE
   185        */
   186        Bool    setWDTIE(Bool set);
   187
   188       /*!
   189        *  ======== getWDTIFG ========
   190        *  Gets WDTIFG bit
   191        *
   192        *  @see #getWDTIFG
   193        */
   194        Bool    getWDTIFG();
   195
   196       /*!
   197        *  ======== setWDTIFG ========
   198        *  Sets WDTIFG bit
   199        *
   200        *  @see #setWDTIFG
   201        */
   202        Bool    setWDTIFG(Bool set);
   203
   204       /*!
   205        *  ======== getOFIE ========
   206        *  Gets OFIE bit
   207        *
   208        *  @see #getOFIE
   209        */
   210        Bool    getOFIE();
   211
   212       /*!
   213        *  ======== setOFIE ========
   214        *  Sets OFIE bit
   215        *
   216        *  @see #setOFIE
   217        */
   218        Bool    setOFIE(Bool set);
   219
   220       /*!
   221        *  ======== getOFIFG ========
   222        *  Gets OFIFG bit
   223        *
   224        *  @see #getOFIFG
   225        */
   226        Bool    getOFIFG();
   227
   228       /*!
   229        *  ======== setOFIFG ========
   230        *  Sets OFIFG bit
   231        *
   232        *  @see #setOFIFG
   233        */
   234        Bool    setOFIFG(Bool set);
   235
   236       /*!
   237        *  ======== getNMIIE ========
   238        *  Gets NMIIE bit
   239        *
   240        *  @see #getNMIIE
   241        */
   242        Bool    getNMIIE();
   243
   244       /*!
   245        *  ======== setNMIIE ========
   246        *  Sets NMIIE bit
   247        *
   248        *  @see #setNMIIE
   249        */
   250        Bool    setNMIIE(Bool set);
   251
   252       /*!
   253        *  ======== getNMIIFG ========
   254        *  Gets NMIIFG bit
   255        *
   256        *  @see #getNMIIFG
   257        */
   258        Bool    getNMIIFG();
   259
   260       /*!
   261        *  ======== setNMIIFG ========
   262        *  Sets NMIIFG bit
   263        *
   264        *  @see #setNMIIFG
   265        */
   266        Bool    setNMIIFG(Bool set);
   267
   268        /*!
   269        *  ======== getACCVIE ========
   270        *  Gets ACCVIE bit
   271        *
   272        *  @see #getACCVIE
   273        */
   274        Bool    getACCVIE();
   275
   276       /*!
   277        *  ======== setACCVIE ========
   278        *  Sets ACCVIE bit
   279        *
   280        *  @see #setACCVIE
   281        */
   282        Bool    setACCVIE(Bool set);
   283
   284        /*!
   285        *  ======== getACCVIFG ========
   286        *  Gets ACCVIFG bit
   287        *
   288        *  @see #getACCVIFG
   289        */
   290        Bool    getACCVIFG();
   291
   292       /*!
   293        *  ======== setACCVIFG ========
   294        *  Sets ACCVIFG bit
   295        *
   296        *  @see #setACCVIFG
   297        */
   298        Bool    setACCVIFG(Bool set);
   299
   300        /*! Determine if each Register needs to be forced set or not */
   301        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   302        [
   303            { register : "IE1" , regForceSet : false },
   304            { register : "IFG1" , regForceSet : false },
   305        ];
   306    }


module ti.catalog.msp430.peripherals.special_function.IE2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IE2 ========
    35     *  MSP430 Interrupt Enable Register 2
    36     */
    37    metaonly module IE2 inherits xdc.platform.IPeripheral {
    38
    39        /* USCI_B0 transmit interrupt enable */
    40        enum UCB0TXIE_t {
    41            UCB0TXIE_OFF = 0x00,            /*! Interrupt disabled */
    42            UCB0TXIE     = 0x08             /*! Interrupt enabled */
    43        };
    44
    45        /* USCI_B0 receive interrupt enable */
    46        enum UCB0RXIE_t {
    47            UCB0RXIE_OFF = 0x00,            /*! Interrupt disabled */
    48            UCB0RXIE     = 0x04             /*! Interrupt enabled */
    49        };
    50
    51        /* USCI_A0 transmit interrupt enable */
    52        enum UCA0TXIE_t {
    53            UCA0TXIE_OFF = 0x00,            /*! Interrupt disabled */
    54            UCA0TXIE     = 0x02             /*! Interrupt enabled */
    55        };
    56
    57        /* USCI_A0 receive interrupt enable */
    58        enum UCA0RXIE_t {
    59            UCA0RXIE_OFF = 0x00,            /*! Interrupt disabled */
    60            UCA0RXIE     = 0x01             /*! Interrupt enabled */
    61        };
    62
    63        /* USCI_B0 transmit interrupt flag */
    64        enum UCB0TXIFG_t {
    65            UCB0TXIFG_OFF = 0x00,           /*! No interrupt pending */
    66            UCB0TXIFG     = 0x08            /*! Interrupt pending */
    67        };
    68
    69        /* USCI_B0 receive interrupt flag */
    70        enum UCB0RXIFG_t {
    71            UCB0RXIFG_OFF = 0x00,           /*! No interrupt pending */
    72            UCB0RXIFG     = 0x04            /*! Interrupt pending */
    73        };
    74
    75        /* USCI_A0 transmit interrupt flag */
    76        enum UCA0TXIFG_t {
    77            UCA0TXIFG_OFF = 0x00,           /*! No interrupt pending */
    78            UCA0TXIFG     = 0x02            /*! Interrupt pending */
    79        };
    80
    81        /* USCI_A0 receive interrupt flag */
    82        enum UCA0RXIFG_t {
    83            UCA0RXIFG_OFF = 0x00,           /*! No interrupt pending */
    84            UCA0RXIFG     = 0x01            /*! Interrupt pending */
    85        };
    86
    87        /*! IE2, Interrupt Enable Register 2 */
    88        struct IE2_t {
    89            UCB0TXIE_t  UCB0TXIE;           /*! USCI_B0 transmit interrupt enable
    90                                             *  0 Interrupt disabled
    91                                             *  1 Interrupt enabled */
    92            UCB0RXIE_t  UCB0RXIE;           /*! USCI_B0 receive interrupt enable
    93                                             *  0 Interrupt disabled
    94                                             *  1 Interrupt enabled */
    95            UCA0TXIE_t  UCA0TXIE;           /*! USCI_A0 transmit interrupt enable
    96                                             *  0 Interrupt disabled
    97                                             *  1 Interrupt enabled */
    98            UCA0RXIE_t  UCA0RXIE;           /*! USCI_A0 receive interrupt enable
    99                                             *  0 Interrupt disabled
   100                                             *  1 Interrupt enabled */
   101        }
   102
   103        /*! IFG2, Interrupt Flag Register 2 */
   104        struct IFG2_t {
   105            UCB0TXIFG_t  UCB0TXIFG;         /*! USCI_B0 transmit interrupt flag
   106                                             *  0 No interrupt pending
   107                                             *  1 Interrupt pending */
   108            UCB0RXIFG_t  UCB0RXIFG;         /*! USCI_B0 receive interrupt flag
   109                                             *  0 No interrupt pending
   110                                             *  1 Interrupt pending */
   111            UCA0TXIFG_t  UCA0TXIFG;         /*! USCI_A0 transmit interrupt flag
   112                                             *  0 No interrupt pending
   113                                             *  1 Interrupt pending */
   114            UCA0RXIFG_t  UCA0RXIFG;         /*! USCI_A0 receive interrupt flag
   115                                             *  0 No interrupt pending
   116                                             *  1 Interrupt pending */
   117        }
   118
   119       /*!
   120        *  ======== regIntVect_t ========
   121        *  Interrupt vector description
   122        *
   123        *  Type to describe a single interrupt vector pin and all its possible
   124        *  configurations.
   125        *
   126        *  @see #regIntVect_t
   127        */
   128        struct regIntVect_t {
   129            String                    registerName;
   130            String                    registerDescription;
   131            String                    isrToggleString;
   132            String                    priorityName;
   133            Bool                      interruptEnable;
   134            Bool                      interruptHandler;
   135            Int                       priority;
   136        }
   137
   138        /*!
   139        *  ======== ForceSetDefaultRegister_t ========
   140        *  Force Set Default Register
   141        *
   142        *  Type to store if each register needs to be forced initialized
   143        *  even if the register is in default state.
   144        *
   145        *  @see #ForceSetDefaultRegister_t
   146        */
   147        struct ForceSetDefaultRegister_t {
   148            String     register;
   149            Bool       regForceSet;
   150        }
   151
   152    instance:
   153        /*! IE2, Interrupt Enable Register 2 */
   154        config IE2_t IE2 = {
   155            UCB0TXIE    : UCB0TXIE_OFF,
   156            UCB0RXIE    : UCB0RXIE_OFF,
   157            UCA0TXIE    : UCA0TXIE_OFF,
   158            UCA0RXIE    : UCA0RXIE_OFF,
   159        };
   160
   161        /*! IFG2, Interrupt Flag Register 2 */
   162        config IFG2_t IFG2 = {
   163            UCB0TXIFG   : UCB0TXIFG_OFF,
   164            UCB0RXIFG   : UCB0RXIFG_OFF,
   165            UCA0TXIFG   : UCA0TXIFG_OFF,
   166            UCA0RXIFG   : UCA0RXIFG_OFF,
   167        };
   168
   169       /*!
   170        *  ======== getUCB0TXIE ========
   171        *  Gets UCB0TXIE bit
   172        *
   173        *  @see #getUCB0TXIE
   174        */
   175        Bool    getUCB0TXIE();
   176
   177       /*!
   178        *  ======== setUCB0TXIE ========
   179        *  Sets UCB0TXIE bit
   180        *
   181        *  @see #setUCB0TXIE
   182        */
   183        Bool    setUCB0TXIE(Bool set);
   184
   185       /*!
   186        *  ======== getUCB0RXIE ========
   187        *  Gets UCB0RXIE bit
   188        *
   189        *  @see #getUCB0RXIE
   190        */
   191        Bool    getUCB0RXIE();
   192
   193       /*!
   194        *  ======== setUCB0RXIE ========
   195        *  Sets UCB0RXIE bit
   196        *
   197        *  @see #setUCB0RXIE
   198        */
   199        Bool    setUCB0RXIE(Bool set);
   200
   201       /*!
   202        *  ======== getUCA0TXIE ========
   203        *  Gets UCA0TXIE bit
   204        *
   205        *  @see #getUCA0TXIE
   206        */
   207        Bool    getUCA0TXIE();
   208
   209       /*!
   210        *  ======== setUCA0TXIE ========
   211        *  Sets UCA0TXIE bit
   212        *
   213        *  @see #setUCA0TXIE
   214        */
   215        Bool    setUCA0TXIE(Bool set);
   216
   217       /*!
   218        *  ======== getUCA0RXIE ========
   219        *  Gets UCA0RXIE bit
   220        *
   221        *  @see #getUCA0RXIE
   222        */
   223        Bool    getUCA0RXIE();
   224
   225       /*!
   226        *  ======== setUCA0RXIE ========
   227        *  Sets UCA0RXIE bit
   228        *
   229        *  @see #setUCA0RXIE
   230        */
   231        Bool    setUCA0RXIE(Bool set);
   232
   233        /*! IE2 interrupt enables
   234         */
   235        config regIntVect_t interruptSource[8];
   236
   237        /*!
   238         *  ======== forceSetDefaultRegister ========
   239         *  Determine if each Register needs to be forced set or not
   240         */
   241        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   242        [
   243            { register : "IE2" , regForceSet : false },
   244            { register : "IFG2" , regForceSet : false },
   245        ];
   246    }


package ti.catalog.msp430.peripherals.special_function

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.special_function ========
    35     *  MSP430 interrupt enable support
    36     */
    37    package ti.catalog.msp430.peripherals.special_function [1, 0, 0] {
    38        module IE1;
    39        module IE2;
    40        module SFRIE1;
    41        module SR;
    42    }


module ti.catalog.msp430.peripherals.special_function.SFRIE1

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== SFRIE1 ========
    35     *  MSP430 Interrupt Enable Register 1
    36     */
    37    metaonly module SFRIE1 inherits xdc.platform.IPeripheral {
    38
    39        enum JMBOUTIE_t {
    40            JMBOUTIE_OFF  = 0x00,        /*! Interrupt not enabled */
    41            JMBOUTIE      = 0x80         /*! Interrupt enabled */
    42        };
    43
    44        enum JMBINIE_t {
    45            JMBINIE_OFF = 0x00,          /*! Interrupt not enabled */
    46            JMBINIE     = 0x40           /*! Interrupt enabled */
    47        };
    48
    49        enum ACCVIE_t {
    50            ACCVIE_OFF = 0x00,           /*! Interrupt not enabled */
    51            ACCVIE     = 0x20            /*! Interrupt enabled */
    52        };
    53
    54        enum NMIIE_t {
    55            NMIIE_OFF  = 0x00,           /*! Interrupt not enabled */
    56            NMIIE      = 0x10            /*! Interrupt enabled */
    57        };
    58
    59        enum OFIE_t {
    60            OFIE_OFF   = 0x00,           /*! Interrupt not enabled */
    61            OFIE       = 0x02            /*! Interrupt enabled */
    62        };
    63
    64        enum WDTIE_t {
    65            WDTIE_OFF  = 0x00,           /*! Interrupt not enabled */
    66            WDTIE      = 0x01            /*! Interrupt enabled */
    67        };
    68
    69        enum NMIIFG_t {
    70            NMIIFG_OFF = 0x00,           /*! No interrupt pending */
    71            NMIIFG     = 0x10            /*! Interrupt pending */
    72        };
    73
    74        enum WDTIFG_t {
    75            WDTIFG_OFF = 0x00,           /*! No interrupt pending */
    76            WDTIFG     = 0x01            /*! Interrupt pending */
    77        };
    78
    79        enum OFIFG_t {
    80            OFIFG_OFF  = 0x00,           /*! No interrupt pending */
    81            OFIFG      = 0x02            /*! Interrupt pending */
    82        };
    83
    84        enum ACCVIFG_t {
    85            ACCVIFG_OFF = 0x00,          /*! No interrupt pending */
    86            ACCVIFG     = 0x20           /*! Interrupt pending */
    87        };
    88
    89        /* IE1 */
    90        struct IE1_t {
    91            ACCVIE_t    ACCVIE;          /*! Flash memory access violation interrupt
    92                                          * enable. This bit enables the ACCVIFG interrupt.
    93                                          *  0  Interrupt disabled
    94                                          *  1  Interrupt enabled */
    95            NMIIE_t      NMIIE;          /*! NMI interrupt enable. This bit enables
    96                                          *the NMI interrupt.
    97                                          *  0  Interrupt disabled
    98                                          *  1  Interrupt enabled */
    99            OFIE_t      OFIE;            /*! Oscillator fault flag interrupt enable
   100                                          *This bit enables the OFIFG interrupt.
   101                                          *  0  Interrupt disabled
   102                                          *  1  Interrupt enabled */
   103            WDTIE_t     WDTIE;           /*! Watchdog timer+ interrupt enable. This
   104                                          *bit enables the WDTIFG interrupt for
   105                                          *interval timer mode. It is not necessary
   106                                          *to set this bit for watchdog mode.
   107                                          *  0  Interrupt disabled
   108                                          *  1  Interrupt enabled */
   109        }
   110
   111        /* IFG1 */
   112        struct IFG1_t {
   113            ACCVIFG_t    ACCVIFG;        /*! Flash memory access violation interrupt
   114                                          * flag.
   115                                          *  0  No interrupt pending
   116                                          *  1  Interrupt pending */
   117            NMIIFG_t     NMIIFG;         /*! NMI interrupt flag.
   118                                          *  0  No interrupt pending
   119                                          *  1  Interrupt pending */
   120            OFIFG_t      OFIFG;          /*! Oscillator fault interrupt flag
   121                                          *  0  No interrupt pending
   122                                          *  1  Interrupt pending */
   123            WDTIFG_t     WDTIFG;         /*! Watchdog timer+ interrupt flag.
   124                                          *  0  No interrupt pending
   125                                          *  1  Interrupt pending */
   126        }
   127
   128        /*!
   129        *  ======== ForceSetDefaultRegister_t ========
   130        *  Force Set Default Register
   131        *
   132        *  Type to store if each register needs to be forced initialized
   133        *  even if the register is in default state.
   134        *
   135        *  @see #ForceSetDefaultRegister_t
   136        */
   137        struct ForceSetDefaultRegister_t {
   138            String     register;
   139            Bool       regForceSet;
   140        }
   141
   142       /*!
   143        *  ======== regIntVect_t ========
   144        *  Interrupt vector description
   145        *
   146        *  Type to describe a single interrupt vector pin and all its possible
   147        *  configurations.
   148        *
   149        *  @see #regIntVect_t
   150        */
   151        struct regIntVect_t {
   152            String                    registerName;
   153            String                    registerDescription;
   154            String                    isrToggleString;
   155            String                    priorityName;
   156            Bool                      interruptEnable;
   157            Bool                      interruptHandler;
   158            Int                       priority;
   159        }
   160
   161    instance:
   162
   163        /*! SFRIE1 interrupt enables
   164         */
   165        config regIntVect_t interruptSource[16];
   166
   167        /*! IE1, Interrupt Enable Register 1 */
   168        config IE1_t SFRIE1 = {
   169            ACCVIE      : ACCVIE_OFF,
   170            NMIIE       : NMIIE_OFF,
   171            OFIE        : OFIE_OFF,
   172            WDTIE       : WDTIE_OFF
   173        };
   174
   175        /*! IFG1, Interrupt Flag Register 1 */
   176        config IFG1_t SFRIFG1 = {
   177            ACCVIFG     : ACCVIFG_OFF,
   178            NMIIFG      : NMIIFG_OFF,
   179            OFIFG       : OFIFG_OFF,
   180            WDTIFG      : WDTIFG_OFF
   181        };
   182
   183       /*!
   184        *  ======== getSFRIE1 ========
   185        *  Gets a bit from the register in SFRIE1
   186        *
   187        *  @see #getSFRIE1
   188        */
   189        Bool    getSFRIE1(String register);
   190
   191       /*!
   192        *  ======== setSFRIE1 ========
   193        *  Sets a bit in the register SFRIE1
   194        *
   195        *  @see #setSFRIE1
   196        */
   197        Bool    setSFRIE1(String register, Bool set);
   198
   199        /*! Determine if each Register needs to be forced set or not */
   200        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   201        [
   202            { register : "SFRIE1" , regForceSet : false },
   203            { register : "SFRIFG1" , regForceSet : false },
   204        ];
   205    }


module ti.catalog.msp430.peripherals.special_function.SR

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== SR ========
    35     *  MSP430 Status Register
    36     */
    37    metaonly module SR inherits xdc.platform.IPeripheral {
    38
    39        /* System clock generator 1. This bit, when set, turns off the SMCLK. */
    40        enum SCG1_t {
    41            SCG1_OFF   = 0x0000,              /*! Disable System clock generator 1 */
    42            SCG1       = 0x0080               /*! Enable System clock generator 1 */
    43        };
    44
    45        enum SCG0_t {
    46            SCG0_OFF   = 0x0000,              /*! Disable System clock generator 0 */
    47            SCG0       = 0x0040               /*! Enable System clock generator 0 */
    48        };
    49
    50        enum OSCOFF_t {
    51            OSCOFF_OFF = 0x0000,              /*! Oscillator On */
    52            OSCOFF     = 0x0020               /*! Oscillator Off */
    53        };
    54
    55        /* CPU off. This bit, when set, turns off the CPU. */
    56        enum CPUOFF_t {
    57            CPUOFF_OFF = 0x0000,              /*! CPU On */
    58            CPUOFF     = 0x0010               /*! CPU Off */
    59        };
    60
    61        enum GIE_t {
    62            GIE_OFF    = 0x0000,              /*! General interrupt disable */
    63            GIE        = 0x0008               /*! General interrupt enable */
    64        };
    65
    66        /* SR */
    67        struct SR_t {
    68            SCG1_t      SCG1;                 /*! System clock generator 1
    69                                               *This bit, when set, turns off the SMCLK.
    70                                               */
    71            SCG0_t      SCG0;                 /*! System clock generator 0
    72                                               *This bit, when set, turns off the DCO dc
    73                                               *generator, if DCOCLK is not used for MCLK
    74                                               *or SMCLK.
    75                                               */
    76            OSCOFF_t    OSCOFF;               /*!Oscillator Off
    77                                               *This bit, when set, turns off the LFXT1
    78                                               *crystal oscillator, when LFXT1CLK is not
    79                                               *use for MCLK or SMCLK
    80                                               */
    81            CPUOFF_t    CPUOFF;               /*! CPU off
    82                                               *This bit, when set, turns off the CPU.
    83                                               */
    84            GIE_t       GIE;                  /*! General interrupt enable
    85                                               *This bit, when set, enables maskable
    86                                               *interrupts. When reset, all maskable
    87                                               *interrupts are disabled
    88                                               */
    89        }
    90
    91       /*!
    92        *  ======== ForceSetDefaultRegister_t ========
    93        *  Force Set Default Register
    94        *
    95        *  Type to store if each register needs to be forced initialized
    96        *  even if the register is in default state.
    97        *
    98        *  @see #ForceSetDefaultRegister_t
    99        */
   100        struct ForceSetDefaultRegister_t {
   101            String     register;
   102            Bool       regForceSet;
   103        }
   104
   105    instance:
   106        /*! SR, Status Register */
   107        config SR_t SR = {
   108            SCG1        : SCG1_OFF,
   109            SCG0        : SCG0_OFF,
   110            OSCOFF      : OSCOFF_OFF,
   111            CPUOFF      : CPUOFF_OFF,
   112            GIE         : GIE_OFF
   113        };
   114
   115       /*!
   116        *  ======== getSCG1 ========
   117        *  Gets SCG1 bit
   118        *
   119        *  @see #getSCG1
   120        */
   121        Bool    getSCG1();
   122
   123       /*!
   124        *  ======== setSCG1 ========
   125        *  Sets SCG1 bit
   126        *
   127        *  @see #setSCG1
   128        */
   129        Bool    setSCG1(Bool set);
   130
   131       /*!
   132        *  ======== getSCG0 ========
   133        *  Gets SCG0 bit
   134        *
   135        *  @see #getSCG0
   136        */
   137        Bool    getSCG0();
   138
   139       /*!
   140        *  ======== setSCG0 ========
   141        *  Sets SCG0 bit
   142        *
   143        *  @see #setSCG0
   144        */
   145        Bool    setSCG0(Bool set);
   146
   147       /*!
   148        *  ======== getOSCOFF ========
   149        *  Gets OSCOFF bit
   150        *
   151        *  @see #getOSCOFF
   152        */
   153        Bool    getOSCOFF();
   154
   155       /*!
   156        *  ======== setOSCOFF ========
   157        *  Sets OSCOFF bit
   158        *
   159        *  @see #setOSCOFF
   160        */
   161        Bool    setOSCOFF(Bool set);
   162
   163        /*!
   164        *  ======== getCPUOFF ========
   165        *  Gets CPUOFF bit
   166        *
   167        *  @see #getCPUOFF
   168        */
   169        Bool    getCPUOFF();
   170
   171       /*!
   172        *  ======== setCPUOFF ========
   173        *  Sets CPUOFF bit
   174        *
   175        *  @see #setCPUOFF
   176        */
   177        Bool    setCPUOFF(Bool set);
   178
   179        /*!
   180        *  ======== getGIE ========
   181        *  Gets GIE bit
   182        *
   183        *  @see #getGIE
   184        */
   185        Bool    getGIE();
   186
   187       /*!
   188        *  ======== setGIE ========
   189        *  Sets GIE bit
   190        *
   191        *  @see #setGIE
   192        */
   193        Bool    setGIE(Bool set);
   194
   195        /*! Determine if each Register needs to be forced set or not */
   196        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   197        [
   198            { register : "SR" , regForceSet : false },
   199        ];
   200    }


interface ti.catalog.msp430.peripherals.svs.ISVS

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33
    34    /*!
    35     *  ======== ISVS ========
    36     *  MSP430 ISVS interface
    37     */
    38    metaonly interface ISVS inherits xdc.platform.IPeripheral {
    39
    40         /*! VLD3 Bit */
    41         enum VLD3_t {
    42            VLD3_OFF = 0x00,
    43            VLD3 = 0x80
    44         };
    45         /*! VLD2 Bit */
    46         enum VLD2_t {
    47            VLD2_OFF = 0x00,
    48            VLD2 = 0x40
    49         };
    50         /*! VLD1 Bit */
    51         enum VLD1_t {
    52             VLD1_OFF = 0x00,
    53             VLD1 = 0x20
    54         };
    55         /*! VLD0 Bit */
    56         enum VLD0_t {
    57            VLD0_OFF = 0x00,
    58            VLD0 = 0x10
    59         };
    60         /*! PORON Bit */
    61         enum PORON_t {
    62             PORON_OFF = 0x00,   /*! SVSFG does not cause a POR */
    63             PORON = 0x08        /*! SVSFG causes a POR */
    64          };
    65         /*! SVSON Bit */
    66         enum SVSON_t {
    67            SVSON_OFF = 0x00,
    68            SVSON = 0x04
    69         };
    70         /*! SVSOP Bit */
    71         enum SVSOP_t {
    72            SVSOP_OFF = 0x00,
    73            SVSOP = 0x02
    74         };
    75         /*! SVSFG Bit */
    76         enum SVSFG_t {
    77            SVSFG_OFF = 0x00,
    78            SVSFG = 0x01
    79         };
    80
    81        /*!
    82        *  ======== ForceSetDefaultRegister_t ========
    83        *  Force Set Default Register
    84        *
    85        *  Type to store if each register needs to be forced initialized
    86        *  even if the register is in default state.
    87        *
    88        *  @see #ForceSetDefaultRegister_t
    89        */
    90        struct ForceSetDefaultRegister_t {
    91            String     register;
    92            Bool       regForceSet;
    93        }
    94
    95    instance:
    96
    97    }


package ti.catalog.msp430.peripherals.svs

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.msp430.peripherals.svs ========
    35     *  MSP430 SVS peripheral
    36     */
    37    package ti.catalog.msp430.peripherals.svs [1, 0, 0] {
    38        interface ISVS;
    39        module SVS;
    40    }


module ti.catalog.msp430.peripherals.svs.SVS

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Svs ========
    35     *  MSP430F2xx Family SVS Module
    36     */
    37    metaonly module SVS inherits ISVS {
    38
    39        /*! SVSCTL Register */
    40        struct SVSCTL_t {
    41            VLD3_t VLD3;   /*! Voltage level detect. These bits turn on the SVS and select
    42                            * the nominal SVS threshold voltage level. See the device specific
    43                            * data sheet for parameters.
    44                            * 0000 SVS is off
    45                            * 0001 1.9 V
    46                            * 0010 2.1 V
    47                            * 0011 2.2 V
    48                            * 0100 2.3 V
    49                            * 0101 2.4 V
    50                            * 0110 2.5 V
    51                            * 0111 2.65 V
    52                            * 1000 2.8 V
    53                            * 1001 2.9 V
    54                            * 1010 3.05
    55                            * 1011 3.2 V
    56                            * 1100 3.35 V
    57                            * 1101 3.5 V
    58                            * 1110 3.7 V
    59                            * 1111 Compares external input voltage SVSIN to 1.25 V. */
    60            VLD2_t VLD2;   /*! Voltage level detect. These bits turn on the SVS and select
    61                            * the nominal SVS threshold voltage level. See the device specific
    62                            * data sheet for parameters.
    63                            * 0000 SVS is off
    64                            * 0001 1.9 V
    65                            * 0010 2.1 V
    66                            * 0011 2.2 V
    67                            * 0100 2.3 V
    68                            * 0101 2.4 V
    69                            * 0110 2.5 V
    70                            * 0111 2.65 V
    71                            * 1000 2.8 V
    72                            * 1001 2.9 V
    73                            * 1010 3.05
    74                            * 1011 3.2 V
    75                            * 1100 3.35 V
    76                            * 1101 3.5 V
    77                            * 1110 3.7 V
    78                            * 1111 Compares external input voltage SVSIN to 1.25 V. */
    79            VLD1_t VLD1;   /*! Voltage level detect. These bits turn on the SVS and select
    80                            * the nominal SVS threshold voltage level. See the device specific
    81                            * data sheet for parameters.
    82                            * 0000 SVS is off
    83                            * 0001 1.9 V
    84                            * 0010 2.1 V
    85                            * 0011 2.2 V
    86                            * 0100 2.3 V
    87                            * 0101 2.4 V
    88                            * 0110 2.5 V
    89                            * 0111 2.65 V
    90                            * 1000 2.8 V
    91                            * 1001 2.9 V
    92                            * 1010 3.05
    93                            * 1011 3.2 V
    94                            * 1100 3.35 V
    95                            * 1101 3.5 V
    96                            * 1110 3.7 V
    97                            * 1111 Compares external input voltage SVSIN to 1.25 V. */
    98            VLD0_t VLD0;   /*! Voltage level detect. These bits turn on the SVS and select
    99                            * the nominal SVS threshold voltage level. See the device specific
   100                            * data sheet for parameters.
   101                            * 0000 SVS is off
   102                            * 0001 1.9 V
   103                            * 0010 2.1 V
   104                            * 0011 2.2 V
   105                            * 0100 2.3 V
   106                            * 0101 2.4 V
   107                            * 0110 2.5 V
   108                            * 0111 2.65 V
   109                            * 1000 2.8 V
   110                            * 1001 2.9 V
   111                            * 1010 3.05
   112                            * 1011 3.2 V
   113                            * 1100 3.35 V
   114                            * 1101 3.5 V
   115                            * 1110 3.7 V
   116                            * 1111 Compares external input voltage SVSIN to 1.25 V. */
   117            PORON_t PORON; /*! POR on. This bit enables the SVSFG flag to
   118                            * cause a POR device reset.
   119                            * 0 SVSFG does not cause a POR
   120                            * 1 SVSFG causes a POR */
   121            SVSON_t SVSON; /*! SVS on. This bit reflects the status of SVS operation. This bit DOES NOT turn
   122                            * on the SVS. The SVS is turned on by setting VLDx > 0.
   123                            * 0 SVS is Off
   124                            * 1 SVS is On */
   125            SVSOP_t SVSOP; /*! SVS output. This bit reflects the output value of the SVS comparator.
   126                            * 0 SVS comparator output is low
   127                            * 1 SVS comparator output is high */
   128            SVSFG_t SVSFG; /*! SVS flag. This bit indicates a low voltage condition. SVSFG remains set after
   129                            * a low voltage condition until reset by software.
   130                            * 0 No low voltage condition occurred
   131                            * 1 A low condition is present or has occurred */
   132      }
   133        /*!
   134         *  ======== create ========
   135         *  Create an instance of this peripheral.
   136         */
   137        create();
   138
   139    instance:
   140       /*! SVSCTL Register */
   141        config SVSCTL_t SVSCTL = {
   142            VLD3    :    VLD3_OFF,
   143            VLD2    :    VLD2_OFF,
   144            VLD1    :    VLD1_OFF,
   145            VLD0    :    VLD0_OFF,
   146            PORON   :    PORON_OFF,
   147            SVSON   :    SVSON_OFF,
   148            SVSOP   :    SVSOP_OFF,
   149            SVSFG   :    SVSFG_OFF
   150         };
   151         /*! Determine if each Register needs to be forced set or not */
   152        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   153        [
   154            { register : "SVSCTL" , regForceSet : false }
   155        ];
   156
   157    }


interface ti.catalog.msp430.peripherals.timer.ITimer

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     *  ======== ITimer ========
    37     *  MSP430 ITimer interface
    38     */
    39    metaonly interface ITimer inherits xdc.platform.IPeripheral {
    40
    41       /*!
    42        *  ======== regIntVect_t ========
    43        *  Interrupt vector description
    44        *
    45        *  Type to describe a single interrupt vector pin and all its possible
    46        *  configurations.
    47        *
    48        *  @see #regIntVect_t
    49        */
    50        struct regIntVect_t {
    51            String                    registerName;
    52            String                    registerDescription;
    53            String                    isrToggleString;
    54            String                    priorityName;
    55            Bool                      interruptEnable;
    56            Bool                      interruptHandler;
    57            Int                       priority;
    58        }
    59
    60        /*!
    61        *  ======== ForceSetDefaultRegister_t ========
    62        *  Force Set Default Register
    63        *
    64        *  Type to store if each register needs to be forced initialized
    65        *  even if the register is in default state.
    66        *
    67        *  @see #ForceSetDefaultRegister_t
    68        */
    69        struct ForceSetDefaultRegister_t {
    70            String     register;
    71            Bool       regForceSet;
    72        }
    73
    74        create(IClock.Instance clock);
    75
    76    instance:
    77        /*!
    78         *  ======== baseAddr ========
    79         *  Address of the peripheral's control register.
    80         *
    81         *  A peripheral's registers are commonly accessed through a structure
    82         *  that defines the offsets of a particular register from the lowest
    83         *  address mapped to a peripheral. That lowest address is specified by
    84         *  this parameter.
    85         */
    86        config UInt baseAddr;
    87
    88        /*!
    89         *  ======== intNum ========
    90         *  Interrupt source number
    91         *
    92         */
    93        config UInt intNum;
    94
    95        /*!
    96         *  ======== numberOfTimers ========
    97         *  Stores the number of available timer capture compare blocks
    98         *
    99         */
   100        config UChar numberOfTimers;
   101
   102        /*!
   103        *  ======== setTxxCCRx ========
   104        *  Sets TxxCCRx register value based on which CCR register
   105        *
   106        *  @see #setTxxCCRx
   107        */
   108        void setTxxCCRx(UChar ccrNumber , Bits16 value);
   109
   110       /*!
   111        *  ======== getTxxCCRx ========
   112        *  Returns TxxCCRx register value based on which CCR register
   113        *
   114        *  @see #getTxxCCRx
   115        */
   116        Bits16 getTxxCCRx(UChar ccrNumber);
   117
   118       /*!
   119        *  ======== isInternal ========
   120        *  Boolean that is true if a Timer is internal, meaning
   121        *  it has no external inputs or outputs
   122        *
   123        */
   124        config Bool isInternal = false;
   125
   126        /*! @_nodoc */
   127        config IClock.Instance clock;
   128    }


interface ti.catalog.msp430.peripherals.timer.ITimer_A

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ITimer_A ========
    35     *  MSP430 ITimer_A interface
    36     */
    37    metaonly interface ITimer_A inherits ITimer {
    38
    39        enum TASSEL_t {
    40            TASSEL_0 = (0*0x100u),              /*! TACLK */
    41            TASSEL_1 = (1*0x100u),              /*! ACLK  */
    42            TASSEL_2 = (2*0x100u),              /*! SMCLK */
    43            TASSEL_3 = 3*0x100u                 /*! INCLK */
    44        };
    45
    46        enum TACLR_t {
    47            TACLR_OFF = (0x0000),               /* Timer A counter clear */
    48            TACLR = 0x0004                      /* Timer A counter clear */
    49        };
    50
    51        enum TAIE_t {
    52            TAIE_OFF = (0x0000),                /* Timer A counter interrupt enable */
    53            TAIE     = 0x0002                   /* Timer A counter interrupt enable */
    54        };
    55
    56        enum TAIFG_t {
    57            TAIFG_OFF = (0x000),                /* Timer A counter interrupt flag */
    58            TAIFG     = (0x0001)                /* Timer A counter interrupt flag */
    59        };
    60
    61        enum MC_t {
    62            MC_0 = (0*0x10u),                   /*! Stop Mode */
    63            MC_1 = (1*0x10u),                   /*! Up Mode */
    64            MC_2 = (2*0x10u),                   /*! Continuous Mode */
    65            MC_3 = 3*0x10u                      /*! Up/Down Mode */
    66        };
    67
    68        enum ID_t {
    69            ID_0 = (0*0x40u),                   /*! Divider - /1 */
    70            ID_1 = (1*0x40u),                   /*! Divider - /2 */
    71            ID_2 = (2*0x40u),                   /*! Divider - /4 */
    72            ID_3 = 3*0x40u                      /*! Divider - /8 */
    73        };
    74
    75        enum CM_t {
    76            CM_0 = (0*0x4000u),                 /*! No Capture */
    77            CM_1 = (1*0x4000u),                 /*! Rising Edge */
    78            CM_2 = (2*0x4000u),                 /*! Falling Edge */
    79            CM_3 = 3*0x4000u                    /*! Both Edges */
    80        };
    81
    82        enum CCIS_t {
    83            CCIS_0 = (0*0x1000u),               /*! CCIxA */
    84            CCIS_1 = (1*0x1000u),               /*! CCIxB */
    85            CCIS_2 = (2*0x1000u),               /*! GND */
    86            CCIS_3 = 3*0x1000u                  /*! Vcc */
    87        };
    88
    89        enum SCS_t {
    90            SCS_OFF = (0x0000),                 /*! Asynchronous Capture */
    91            SCS = 0x0800                        /*! Sychronous Capture  */
    92        };
    93
    94        enum SCCI_t {
    95            SCCI_OFF = (0x0000),                /*! Latched capture signal (read) */
    96            SCCI = 0x0400                       /*! Latched capture signal (read) */
    97        };
    98
    99        enum CAP_t {
   100            CAP_OFF = (0x0000),                 /*! Compare mode */
   101            CAP = 0x0100                        /*! Capture mode */
   102        };
   103
   104        enum CCIE_t {
   105            CCIE_OFF = (0x0000),                /* Capture/compare interrupt disable */
   106            CCIE = (0x0010)                     /* Capture/compare interrupt enable */
   107        };
   108
   109        enum CCI_t {
   110            CCI_OFF = (0x0008),                 /* Capture input signal (read) */
   111            CCI = (0x0008)                      /* Capture input signal (read) */
   112        };
   113
   114        enum OUT_t {
   115            OUT_OFF = (0x0000),                 /* PWM Output signal if output mode 0 */
   116            OUT = (0x0004)                      /* PWM Output signal if output mode 0 */
   117        };
   118
   119        enum COV_t {
   120            COV_OFF = (0x0000),                 /* Capture/compare overflow flag */
   121            COV = (0x0002)                      /* Capture/compare overflow flag */
   122        };
   123
   124        enum CCIFG_t {
   125            CCIFG_OFF = (0x0000),               /* Capture/compare interrupt flag */
   126            CCIFG = (0x0001)                    /* Capture/compare interrupt flag */
   127        };
   128
   129        enum OUTMOD_t {
   130            OUTMOD_0 = (0*0x20u),               /*! PWM output mode: 0 - OUT bit value */
   131            OUTMOD_1 = (1*0x20u),               /*! PWM output mode: 1 - Set */
   132            OUTMOD_2 = (2*0x20u),               /*! PWM output mode: 2 - PWM toggle/reset */
   133            OUTMOD_3 = (3*0x20u),               /*! PWM output mode: 3 - PWM set/reset */
   134            OUTMOD_4 = (4*0x20u),               /*! PWM output mode: 4 - Toggle */
   135            OUTMOD_5 = (5*0x20u),               /*! PWM output mode: 5 - Reset */
   136            OUTMOD_6 = (6*0x20u),               /*! PWM output mode: 6 - PWM toggle/set */
   137            OUTMOD_7 = 7*0x20u                  /*! PWM output mode: 7 - PWM reset/set */
   138        };
   139
   140        /*! TA3IV Definitions */
   141        enum IVValues {
   142            TAIV_NONE = 0x0000,                 /*! No Interrupt pending */
   143            TAIV_TACCR1 = 0x0002,               /*! TACCR1_CCIFG */
   144            TAIV_TACCR2 = 0x0004,               /*! TACCR2_CCIFG */
   145            TAIV_6 = 0x0006,                    /*! Reserved */
   146            TAIV_8 = 0x0008,                    /*! Reserved */
   147            TAIV_TAIFG = 0x000A                 /*! TAIFG */
   148        };
   149
   150       /*!
   151        *  ======== TACTL_t ========
   152        *  Timer_A Control Register
   153        *
   154        *  @see #TACTL_t
   155        */
   156        struct TACTL_t {
   157            TASSEL_t    TASSEL;     /*! Timer_A clock source select
   158                                      *  00  TACLK
   159                                      *  01  ACLK
   160                                      *  10  SMCLK
   161                                      *  11  INCLK */
   162            ID_t        ID;         /*! Input divider. These bits select the divider for the input clock.
   163                                      *  00 /1
   164                                      *  01 /2
   165                                      *  10 /4
   166                                      *  11 /8 */
   167            MC_t        MC;         /*! Mode control. Setting MCx = 00h when Timer_A is not in use conserves
   168                                      * power.
   169                                      *  00  Stop mode: the timer is halted.
   170                                      *  01  Up mode: the timer counts up to TACCR0.
   171                                      *  10  Continuous mode: the timer counts up to 0FFFFh.
   172                                      *  11  Up/down mode: the timer counts up to TACCR0 then down to 0000h. */
   173            TACLR_t     TACLR;      /*! Timer_A clear. Setting this bit resets TAR, the clock divider, and the count
   174                                      * direction. The TACLR bit is automatically reset and is always read as zero. */
   175            TAIE_t      TAIE;       /*! Timer_A interrupt enable. This bit enables the TAIFG interrupt request.
   176                                      *  0  Interrupt disabled
   177                                      *  1  Interrupt enabled */
   178            TAIFG_t     TAIFG;      /*! Timer_A interrupt flag
   179                                      *  0  No interrupt pending
   180                                      *  1  Interrupt pending */
   181        }
   182
   183       /*!
   184        *  ======== TACCTLx_t ========
   185        *  Capture/Compare Control Register
   186        *
   187        *  @see #TACCTLx_t
   188        */
   189        struct TACCTLx_t {
   190            CM_t       CM;          /*! Capture mode
   191                                      *  00 No capture
   192                                      *  01 Capture on rising edge
   193                                      *  10 Capture on falling edge
   194                                      *  11 Capture on both rising and falling edges */
   195            CCIS_t     CCIS;        /*! Capture/compare input select. These bits select the TACCRx input signal.
   196                                      * See the device-specific data sheet for specific signal connections.
   197                                      *  00  CCIxA
   198                                      *  01  CCIxB
   199                                      *  10  GND
   200                                      *  11  VCC */
   201            SCS_t      SCS;         /*! Synchronize capture source. This bit is used to synchronize the capture input
   202                                      * signal with the timer clock.
   203                                      *  0  Asynchronous capture
   204                                      *  1  Synchronous capture */
   205            SCCI_t     SCCI;        /*! Synchronized capture/compare input. The selected CCI input signal is
   206                                      * latched with the EQUx signal and can be read via this bit */
   207            CAP_t      CAP;         /*! Capture mode
   208                                      *  0  Compare mode
   209                                      *  1  Capture mode */
   210            OUTMOD_t   OUTMOD;      /*! Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because
   211                                      * EQUx = EQU0.
   212                                      *  000  OUT bit value
   213                                      *  001  Set
   214                                      *  010  Toggle/reset
   215                                      *  011  Set/reset
   216                                      *  100  Toggle
   217                                      *  101  Reset
   218                                      *  110  Toggle/set
   219                                      *  111  Reset/set */
   220            CCIE_t     CCIE;        /*! Capture/compare interrupt enable. This bit enables the interrupt request of
   221                                      * the corresponding CCIFG flag.
   222                                      *  0  Interrupt disabled
   223                                      *  1  Interrupt enabled */
   224            CCI_t      CCI;         /*! Capture/compare input. The selected input signal can be read by this bit. */
   225            OUT_t      OUT;         /*! Output. For output mode 0, this bit directly controls the state of the output.
   226                                      *  0   Output low
   227                                      *  1   Output high */
   228            COV_t      COV;         /*! Capture overflow. This bit indicates a capture overflow occurred. COV must
   229                                      *  be reset with software.
   230                                      *  0  No capture overflow occurred
   231                                      *  1  Capture overflow occurred */
   232            CCIFG_t    CCIFG;       /*! Capture/compare interrupt flag
   233                                      *  0  No interrupt pending
   234                                      *  1  Interrupt pending */
   235        }
   236
   237    instance:
   238        /*! Timer_A TACLK */
   239        config float TACLK = 0;
   240
   241        /*! Timer_A INCLK */
   242        config float INCLK = 0;
   243    }


interface ti.catalog.msp430.peripherals.timer.ITimer_B

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ITimer_B ========
    35     *  MSP430 ITimer_B interface
    36     */
    37    metaonly interface ITimer_B inherits ITimer {
    38
    39        enum TBCLGRP_t {
    40            TBCLGRP_0 = (0*0x100u),             /* */
    41            TBCLGRP_1 = (1*0x100u),             /* */
    42            TBCLGRP_2 = (2*0x100u),             /* */
    43            TBCLGRP_3 = 3*0x100u                /* */
    44        };
    45
    46        enum CNTL_t {
    47            CNTL_0 = (0*0x100u),                /*! 16-bit, TBR(max) = 0FFFFh */
    48            CNTL_1 = (1*0x100u),                /*! 12-bit, TBR(max) = 0FFFh  */
    49            CNTL_2 = (2*0x100u),                /*! 10-bit, TBR(max) = 03FFh */
    50            CNTL_3 = 3*0x100u                   /*!  8-bit, TBR(max) = 0FFh */
    51        };
    52
    53        enum TBSSEL_t {
    54            TBSSEL_0 = (0*0x100u),              /*! TBCLK */
    55            TBSSEL_1 = (1*0x100u),              /*! ACLK  */
    56            TBSSEL_2 = (2*0x100u),              /*! SMCLK */
    57            TBSSEL_3 = 3*0x100u                 /*! INCLK */
    58        };
    59
    60        enum TBCLR_t {
    61            TBCLR_OFF = (0x0000),               /* Timer A counter clear */
    62            TBCLR = 0x0004                      /* Timer A counter clear */
    63        };
    64
    65        enum TBIE_t {
    66            TBIE_OFF = (0x0000),                /* Timer A counter interrupt enable */
    67            TBIE     = 0x0002                   /* Timer A counter interrupt enable */
    68        };
    69
    70        enum TBIFG_t {
    71            TBIFG_OFF = (0x000),                /* Timer A counter interrupt flag */
    72            TBIFG     = (0x0001)                /* Timer A counter interrupt flag */
    73        };
    74
    75        enum MC_t {
    76            MC_0 = (0*0x10u),                   /*! Stop Mode */
    77            MC_1 = (1*0x10u),                   /*! Up Mode */
    78            MC_2 = (2*0x10u),                   /*! Continuous Mode */
    79            MC_3 = 3*0x10u                      /*! Up/Down Mode */
    80        };
    81
    82        enum ID_t {
    83            ID_0 = (0*0x40u),                   /*! Divider - /1 */
    84            ID_1 = (1*0x40u),                   /*! Divider - /2 */
    85            ID_2 = (2*0x40u),                   /*! Divider - /4 */
    86            ID_3 = 3*0x40u                      /*! Divider - /8 */
    87        };
    88
    89        enum CM_t {
    90            CM_0 = (0*0x4000u),                 /*! No Capture */
    91            CM_1 = (1*0x4000u),                 /*! Rising Edge */
    92            CM_2 = (2*0x4000u),                 /*! Falling Edge */
    93            CM_3 = 3*0x4000u                    /*! Both Edges */
    94        };
    95
    96        enum CCIS_t {
    97            CCIS_0 = (0*0x1000u),               /*! CCIxA */
    98            CCIS_1 = (1*0x1000u),               /*! CCIxB */
    99            CCIS_2 = (2*0x1000u),               /*! GND */
   100            CCIS_3 = 3*0x1000u                  /*! Vcc */
   101        };
   102
   103        enum SCS_t {
   104            SCS_OFF = (0x0000),                 /* Asynchronous Capture */
   105            SCS = 0x0800                        /* Sychronous Capture  */
   106        };
   107
   108        enum CLLD_t {
   109            CLLD_0 = (0*0x1000u),               /* TBCLx loads on write to TBCCRx */
   110            CLLD_1 = (1*0x1000u),               /* TBCLx loads when TBR counts to 0 */
   111            CLLD_2 = (2*0x1000u),               /* TBCLx loads when TBR counts to 0 (up or continuous mode) */
   112            CLLD_3 = 3*0x1000u                  /* TBCLx loads when TBR counts to TBCLx */
   113        };
   114
   115        enum SCCI_t {
   116            SCCI_OFF = (0x0000),                /* Latched capture signal (read) */
   117            SCCI = 0x0400                       /* Latched capture signal (read) */
   118        };
   119
   120        enum CAP_t {
   121            CAP_OFF = (0x0000),                 /* Compare mode */
   122            CAP = 0x0100                        /* Capture mode */
   123        };
   124
   125        enum CCIE_t {
   126            CCIE_OFF = (0x0000),                /* Capture/compare interrupt disable */
   127            CCIE = (0x0010)                     /* Capture/compare interrupt enable */
   128        };
   129
   130        enum CCI_t {
   131            CCI_OFF = (0x0008),                 /* Capture input signal (read) */
   132            CCI = (0x0008)                      /* Capture input signal (read) */
   133        };
   134
   135        enum OUT_t {
   136            OUT_OFF = (0x0000),                 /* PWM Output signal if output mode 0 */
   137            OUT = (0x0004)                      /* PWM Output signal if output mode 0 */
   138        };
   139
   140        enum COV_t {
   141            COV_OFF = (0x0000),                 /* Capture/compare overflow flag */
   142            COV = (0x0002)                      /* Capture/compare overflow flag */
   143        };
   144
   145        enum CCIFG_t {
   146            CCIFG_OFF = (0x0000),               /* Capture/compare interrupt flag */
   147            CCIFG = (0x0001)                    /* Capture/compare interrupt flag */
   148        };
   149
   150        enum OUTMOD_t {
   151            OUTMOD_0 = (0*0x20u),               /*! PWM output mode: 0 - OUT bit value */
   152            OUTMOD_1 = (1*0x20u),               /*! PWM output mode: 1 - Set */
   153            OUTMOD_2 = (2*0x20u),               /*! PWM output mode: 2 - PWM toggle/reset */
   154            OUTMOD_3 = (3*0x20u),               /*! PWM output mode: 3 - PWM set/reset */
   155            OUTMOD_4 = (4*0x20u),               /*! PWM output mode: 4 - Toggle */
   156            OUTMOD_5 = (5*0x20u),               /*! PWM output mode: 5 - Reset */
   157            OUTMOD_6 = (6*0x20u),               /*! PWM output mode: 6 - PWM toggle/set */
   158            OUTMOD_7 = 7*0x20u                  /*! PWM output mode: 7 - PWM reset/set */
   159        };
   160
   161       /*!
   162        *  ======== TBCTL_t ========
   163        *  Timer_B Control Register
   164        *
   165        *  @see #TBCTL_t
   166        */
   167        struct TBCTL_t {
   168            TBCLGRP_t   TBCLGRP;    /*! TBCLx group
   169                                      *  00  Each TBCLx latch loads independently
   170                                      *  01  TBCL1+TBCL2 (TBCCR1 CLLDx bits control the update)
   171                                      *      TBCL3+TBCL4 (TBCCR3 CLLDx bits control the update)
   172                                      *      TBCL5+TBCL6 (TBCCR5 CLLDx bits control the update)
   173                                      *      TBCL0 independent
   174                                      *  10  TBCL1+TBCL2+TBCL3 (TBCCR1 CLLDx bits control the update)
   175                                      *      TBCL4+TBCL5+TBCL6 (TBCCR4 CLLDx bits control the update)
   176                                      *      TBCL0 independent
   177                                      *  11  TBCL0+TBCL1+TBCL2+TBCL3+TBCL4+TBCL5+TBCL6
   178                                      *      (TBCCR1 CLLDx bits control the update) */
   179            CNTL_t      CNTL;       /*! Counter Length
   180                                      *  00  16-bit, TBR(max) = 0FFFFh
   181                                      *  01  12-bit, TBR(max) = 0FFFh
   182                                      *  10  10-bit, TBR(max) = 03FFh
   183                                      *  11  8-bit, TBR(max) = 0FFh */
   184            TBSSEL_t    TBSSEL;     /*! Timer_B clock source select.
   185                                      *  00  TBCLK
   186                                      *  01  ACLK
   187                                      *  10  SMCLK
   188                                      *  11  Inverted TBCLK */
   189            ID_t        ID;         /*! Input divider. These bits select the divider for the input clock.
   190                                      *  00  /1
   191                                      *  01  /2
   192                                      *  10  /4
   193                                      *  11  /8 */
   194            MC_t        MC;         /*! Mode control. Setting MCx = 00h when Timer_B is not in use conserves
   195                                      * power.
   196                                      *  00  Stop mode: the timer is halted
   197                                      *  01  Up mode: the timer counts up to TBCL0
   198                                      *  10  Continuous mode: the timer counts up to the value set by CNTLx
   199                                      *  11  Up/down mode: the timer counts up to TBCL0 and down to 0000h */
   200            TBCLR_t     TBCLR;      /*! Timer_B clear. Setting this bit resets TBR, the clock divider, and the count
   201                                      * direction. The TBCLR bit is automatically reset and is always read as zero. */
   202            TBIE_t      TBIE;       /*! Timer_B interrupt enable. This bit enables the TBIFG interrupt request.
   203                                      *  0 Interrupt disabled
   204                                      *  1 Interrupt enabled */
   205            TBIFG_t     TBIFG;      /*! Timer_B interrupt flag.
   206                                      *  0 No interrupt pending
   207                                      *  1 Interrupt pending */
   208        }
   209
   210        /* TBCCTLx */
   211        struct TBCCTLx_t {
   212            CM_t       CM;          /*! Capture mode
   213                                      *  00  No capture
   214                                      *  01  Capture on rising edge
   215                                      *  10  Capture on falling edge
   216                                      *  11  Capture on both rising and falling edges */
   217            CCIS_t     CCIS;        /*! Capture/compare input select. These bits select the TBCCRx input signal.
   218                                      * See the device-specific data sheet for specific signal connections.
   219                                      *  00  CCIxA
   220                                      *  01  CCIxB
   221                                      *  10  GND
   222                                      *  11  VCC */
   223            SCS_t      SCS;         /*! Synchronize capture source. This bit is used to synchronize the capture input
   224                                      * signal with the timer clock.
   225                                      *  0  Asynchronous capture
   226                                      *  1  Synchronous capture */
   227            CLLD_t     CLLD;        /*! Compare latch load. These bits select the compare latch load event.
   228                                      *  00  TBCLx loads on write to TBCCRx
   229                                      *  01  TBCLx loads when TBR counts to 0
   230                                      *  10  TBCLx loads when TBR counts to 0 (up or continuous mode)
   231                                      *      TBCLx loads when TBR counts to TBCL0 or to 0 (up/down mode)
   232                                      *  11  TBCLx loads when TBR counts to TBCLx */
   233            CAP_t      CAP;         /*! Capture mode
   234                                      *  0  Compare mode
   235                                      *  1  Capture mode */
   236            OUTMOD_t   OUTMOD;      /*! Output mode. Modes 2, 3, 6, and 7 are not useful for TBCL0 because EQUx
   237                                      * = EQU0.
   238                                      *  000  OUT bit value
   239                                      *  001  Set
   240                                      *  010  Toggle/reset
   241                                      *  011  Set/reset
   242                                      *  100  Toggle
   243                                      *  101  Reset
   244                                      *  110  Toggle/set
   245                                      *  111  Reset/set */
   246            CCIE_t     CCIE;        /*! Capture/compare interrupt enable. This bit enables the interrupt request of
   247                                      * the corresponding CCIFG flag.
   248                                      *  0  Interrupt disabled
   249                                      *  1  Interrupt enabled */
   250            CCI_t      CCI;         /*! Capture/compare input. The selected input signal can be read by this bit. */
   251            OUT_t      OUT;         /*! Output. For output mode 0, this bit directly controls the state of the output.
   252                                      *  0  Output low
   253                                      *  1  Output high */
   254            COV_t      COV;         /*! Capture overflow. This bit indicates a capture overflow occurred. COV must
   255                                      * be reset with software.
   256                                      *  0  No capture overflow occurred
   257                                      *  1  Capture overflow occurred */
   258            CCIFG_t    CCIFG;       /*! Capture/compare interrupt flag
   259                                      *  0  No interrupt pending
   260                                      *  1  Interrupt pending */
   261        }
   262
   263    instance:
   264
   265        /*! Timer_B TBCLK */
   266        config float TBCLK = 0;
   267
   268        /*! Timer_B INCLK */
   269        config float INCLK = 0;
   270    }


package ti.catalog.msp430.peripherals.timer

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.clock;
    34
    35    /*!
    36     *  ======== ti.catalog.msp430.peripherals.timer ========
    37     *  MSP430 Timer_A and Timer_B peripherals
    38     */
    39    package ti.catalog.msp430.peripherals.timer [1, 0, 0] {
    40        module Timer_A2, Timer1_A2;
    41        module Timer_A5, Timer0_A5;
    42        module Timer_A3, Timer0_A3, Timer1_A3, Timer2_A3;
    43        module Timer_B3;
    44        module Timer_B7, Timer0_B7;
    45        module Timer0_B3, Timer1_B3, Timer2_B3;
    46        module Timer2_A2, Timer3_A2, Timer3_A5;
    47        interface ITimer, ITimer_A, ITimer_B;
    48    }


module ti.catalog.msp430.peripherals.timer.Timer0_A3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer0_A3 ========
    35     *  MSP430 Timer0_A3 timer
    36     */
    37    metaonly module Timer0_A3 inherits ITimer_A {
    38
    39    instance:
    40        /*! TA0CTL, Timer_A3 Control Register */
    41        config TACTL_t TA0CTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TA0CCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TA0CCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TA0CCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TA0CCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TA0CCTL2, Capture/Compare Control Register 2 */
    81        config TACCTLx_t TA0CCTL2 = {
    82            CM : CM_0,
    83            CCIS : CCIS_0,
    84            SCS : SCS_OFF,
    85            SCCI : SCCI_OFF,
    86            CAP : CAP_OFF,
    87            OUTMOD : OUTMOD_0,
    88            CCIE : CCIE_OFF,
    89            CCI : CCI_OFF,
    90            OUT : OUT_OFF,
    91            COV : COV_OFF,
    92            CCIFG : CCIFG_OFF
    93        };
    94
    95        /*! TA0CCR0, Timer_A Capture/Compare Register 0 */
    96        config Bits16 TA0CCR0 = 0;
    97        /*! TA0CCR1, Timer_A Capture/Compare Register 1 */
    98        config Bits16 TA0CCR1 = 0;
    99        /*! TA0CCR2, Timer_A Capture/Compare Register 2 */
   100        config Bits16 TA0CCR2 = 0;
   101
   102        /*! Timer interrupt enables */
   103        config regIntVect_t interruptSource[4];
   104
   105        /*! Determine if each Register needs to be forced set or not */
   106        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   107        [
   108            { register : "TA0CTL"   , regForceSet : false },
   109            { register : "TA0CCTL0" , regForceSet : false },
   110            { register : "TA0CCTL1" , regForceSet : false },
   111            { register : "TA0CCTL2" , regForceSet : false },
   112            { register : "TA0CCR0"  , regForceSet : false },
   113            { register : "TA0CCR1"  , regForceSet : false },
   114            { register : "TA0CCR2"  , regForceSet : false }
   115        ];
   116    }


module ti.catalog.msp430.peripherals.timer.Timer0_A5

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer0_A5 ========
    35     *  MSP430 Timer0_A5 timer
    36     */
    37    metaonly module Timer0_A5 inherits ITimer_A {
    38
    39    instance:
    40
    41        override config string name = "TimerA5";
    42
    43        /*! Timer A5 Control Register */
    44        config TACTL_t TA0CTL = {
    45            TASSEL : TASSEL_0,
    46            ID : ID_0,
    47            MC : MC_0,
    48            TACLR : TACLR_OFF,
    49            TAIE : TAIE_OFF,
    50            TAIFG : TAIFG_OFF
    51        };
    52
    53        /*! Capture/Compare Control 0 */
    54        config TACCTLx_t TA0CCTL0 = {
    55            CM : CM_0,
    56            CCIS : CCIS_0,
    57            SCS : SCS_OFF,
    58            SCCI : SCCI_OFF,
    59            CAP : CAP_OFF,
    60            OUTMOD : OUTMOD_0,
    61            CCIE : CCIE_OFF,
    62            CCI : CCI_OFF,
    63            OUT : OUT_OFF,
    64            COV : COV_OFF,
    65            CCIFG : CCIFG_OFF
    66        };
    67
    68        /*! Capture/Compare Control 1 */
    69        config TACCTLx_t TA0CCTL1 = {
    70            CM : CM_0,
    71            CCIS : CCIS_0,
    72            SCS : SCS_OFF,
    73            SCCI : SCCI_OFF,
    74            CAP : CAP_OFF,
    75            OUTMOD : OUTMOD_0,
    76            CCIE : CCIE_OFF,
    77            CCI : CCI_OFF,
    78            OUT : OUT_OFF,
    79            COV : COV_OFF,
    80            CCIFG : CCIFG_OFF
    81        };
    82
    83        /*! Capture/Compare Control 2 */
    84        config TACCTLx_t TA0CCTL2 = {
    85            CM : CM_0,
    86            CCIS : CCIS_0,
    87            SCS : SCS_OFF,
    88            SCCI : SCCI_OFF,
    89            CAP : CAP_OFF,
    90            OUTMOD : OUTMOD_0,
    91            CCIE : CCIE_OFF,
    92            CCI : CCI_OFF,
    93            OUT : OUT_OFF,
    94            COV : COV_OFF,
    95            CCIFG : CCIFG_OFF
    96        };
    97
    98        /*! Capture/Compare Control 3 */
    99        config TACCTLx_t TA0CCTL3 = {
   100            CM : CM_0,
   101            CCIS : CCIS_0,
   102            SCS : SCS_OFF,
   103            SCCI : SCCI_OFF,
   104            CAP : CAP_OFF,
   105            OUTMOD : OUTMOD_0,
   106            CCIE : CCIE_OFF,
   107            CCI : CCI_OFF,
   108            OUT : OUT_OFF,
   109            COV : COV_OFF,
   110            CCIFG : CCIFG_OFF
   111        };
   112
   113        /*! Capture/Compare Control 4 */
   114        config TACCTLx_t TA0CCTL4 = {
   115            CM : CM_0,
   116            CCIS : CCIS_0,
   117            SCS : SCS_OFF,
   118            SCCI : SCCI_OFF,
   119            CAP : CAP_OFF,
   120            OUTMOD : OUTMOD_0,
   121            CCIE : CCIE_OFF,
   122            CCI : CCI_OFF,
   123            OUT : OUT_OFF,
   124            COV : COV_OFF,
   125            CCIFG : CCIFG_OFF
   126        };
   127
   128        config Bits16 TA0CCR0 = 0;                         /*! Capture/Compare 0 */
   129        config Bits16 TA0CCR1 = 0;                         /*! Capture/Compare 1 */
   130        config Bits16 TA0CCR2 = 0;                         /*! Capture/Compare 2 */
   131        config Bits16 TA0CCR3 = 0;                         /*! Capture/Compare 3 */
   132        config Bits16 TA0CCR4 = 0;                         /*! Capture/Compare 4 */
   133
   134        /*! Timer interrupt enables */
   135        config regIntVect_t interruptSource[6];
   136
   137        /*! Determine if each Register needs to be forced set or not */
   138        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   139        [
   140            { register : "TA0CTL"   , regForceSet : false },
   141            { register : "TA0CCTL0" , regForceSet : false },
   142            { register : "TA0CCTL1" , regForceSet : false },
   143            { register : "TA0CCTL2" , regForceSet : false },
   144            { register : "TA0CCTL3" , regForceSet : false },
   145            { register : "TA0CCTL4" , regForceSet : false },
   146            { register : "TA0CCR0"  , regForceSet : false },
   147            { register : "TA0CCR1"  , regForceSet : false },
   148            { register : "TA0CCR2"  , regForceSet : false },
   149            { register : "TA0CCR3"  , regForceSet : false },
   150            { register : "TA0CCR4"  , regForceSet : false }
   151        ];
   152    }


module ti.catalog.msp430.peripherals.timer.Timer0_B3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer0_B3 ========
    35     *  MSP430 Timer0_B3 timer
    36     */
    37    metaonly module Timer0_B3 inherits ITimer_B {
    38
    39    instance:
    40        /*! TB0CTL, Timer_B3 Control Register */
    41        config TBCTL_t TB0CTL = {
    42            TBCLGRP : TBCLGRP_0,
    43            CNTL : CNTL_0,
    44            TBSSEL : TBSSEL_0,
    45            ID : ID_0,
    46            MC : MC_0,
    47            TBCLR : TBCLR_OFF,
    48            TBIE : TBIE_OFF,
    49            TBIFG : TBIFG_OFF
    50        };
    51
    52
    53        /*! TB0CCTL0, Capture/Compare Control Register 0 */
    54        config TBCCTLx_t TB0CCTL0 = {
    55            CM : CM_0,
    56            CCIS : CCIS_0,
    57            SCS : SCS_OFF,
    58            CLLD : CLLD_0,
    59            CAP : CAP_OFF,
    60            OUTMOD : OUTMOD_0,
    61            CCIE : CCIE_OFF,
    62            CCI : CCI_OFF,
    63            OUT : OUT_OFF,
    64            COV : COV_OFF,
    65            CCIFG : CCIFG_OFF
    66        };
    67
    68        /*! TB0CCTL1, Capture/Compare Control Register 1 */
    69        config TBCCTLx_t TB0CCTL1 = {
    70            CM : CM_0,
    71            CCIS : CCIS_0,
    72            SCS : SCS_OFF,
    73            CLLD : CLLD_0,
    74            CAP : CAP_OFF,
    75            OUTMOD : OUTMOD_0,
    76            CCIE : CCIE_OFF,
    77            CCI : CCI_OFF,
    78            OUT : OUT_OFF,
    79            COV : COV_OFF,
    80            CCIFG : CCIFG_OFF
    81        };
    82
    83        /*! TB0CCTL2, Capture/Compare Control Register 2 */
    84        config TBCCTLx_t TB0CCTL2 = {
    85            CM : CM_0,
    86            CCIS : CCIS_0,
    87            SCS : SCS_OFF,
    88            CLLD : CLLD_0,
    89            CAP : CAP_OFF,
    90            OUTMOD : OUTMOD_0,
    91            CCIE : CCIE_OFF,
    92            CCI : CCI_OFF,
    93            OUT : OUT_OFF,
    94            COV : COV_OFF,
    95            CCIFG : CCIFG_OFF
    96        };
    97
    98        /*! TB0CCR0, Timer_B Capture/Compare Register 0 */
    99        config Bits16 TB0CCR0 = 0;
   100        /*! TB0CCR1, Timer_B Capture/Compare Register 1 */
   101        config Bits16 TB0CCR1 = 0;
   102        /*! TB0CCR2, Timer_B Capture/Compare Register 2 */
   103        config Bits16 TB0CCR2 = 0;
   104
   105        /*! Timer interrupt enables */
   106        config regIntVect_t interruptSource[4];
   107
   108        /*! Determine if each Register needs to be forced set or not */
   109        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   110        [
   111            { register : "TB0CTL"   , regForceSet : false },
   112            { register : "TB0CCTL0" , regForceSet : false },
   113            { register : "TB0CCTL1" , regForceSet : false },
   114            { register : "TB0CCTL2" , regForceSet : false },
   115            { register : "TB0CCR0"  , regForceSet : false },
   116            { register : "TB0CCR1"  , regForceSet : false },
   117            { register : "TB0CCR2"  , regForceSet : false }
   118        ];
   119    }


module ti.catalog.msp430.peripherals.timer.Timer0_B7

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer0_B7 ========
    35     *  MSP430 Timer0_B7 timer
    36     */
    37    metaonly module Timer0_B7 inherits ITimer_B {
    38
    39        /*! TB07IV Definitions */
    40        enum IVValues {
    41            TB0IV_NONE = 0x0000,                 /*! No Interrupt pending */
    42            TB0IV_TBCCR1 = 0x0002,               /*! TBCCR1_CCIFG */
    43            TB0IV_TBCCR2 = 0x0004,               /*! TBCCR2_CCIFG */
    44            TB0IV_TBCCR3 = 0x0006,               /*! TBCCR3_CCIFG */
    45            TB0IV_TBCCR4 = 0x0008,               /*! TBCCR4_CCIFG */
    46            TB0IV_TBCCR5 = 0x000A,               /*! TBCCR5_CCIFG */
    47            TB0IV_TBCCR6 = 0x000C,               /*! TBCCR6_CCIFG */
    48            TB0IV_TBIFG = 0x000E                 /*! TBIFG */
    49        };
    50
    51    instance:
    52        /*! TB0CTL, Timer_B7 Control Register */
    53        config TBCTL_t TB0CTL = {
    54            TBCLGRP : TBCLGRP_0,
    55            CNTL : CNTL_0,
    56            TBSSEL : TBSSEL_0,
    57            ID : ID_0,
    58            MC : MC_0,
    59            TBCLR : TBCLR_OFF,
    60            TBIE : TBIE_OFF,
    61            TBIFG : TBIFG_OFF
    62        };
    63
    64        /*! TB0CCTL0, Capture/Compare Control Register 0 */
    65        config TBCCTLx_t TB0CCTL0 = {
    66            CM : CM_0,
    67            CCIS : CCIS_0,
    68            SCS : SCS_OFF,
    69            CLLD : CLLD_0,
    70            CAP : CAP_OFF,
    71            OUTMOD : OUTMOD_0,
    72            CCIE : CCIE_OFF,
    73            CCI : CCI_OFF,
    74            OUT : OUT_OFF,
    75            COV : COV_OFF,
    76            CCIFG : CCIFG_OFF
    77        };
    78
    79        /*! TB0CCTL1, Capture/Compare Control Register 1 */
    80        config TBCCTLx_t TB0CCTL1 = {
    81            CM : CM_0,
    82            CCIS : CCIS_0,
    83            SCS : SCS_OFF,
    84            CLLD : CLLD_0,
    85            CAP : CAP_OFF,
    86            OUTMOD : OUTMOD_0,
    87            CCIE : CCIE_OFF,
    88            CCI : CCI_OFF,
    89            OUT : OUT_OFF,
    90            COV : COV_OFF,
    91            CCIFG : CCIFG_OFF
    92        };
    93
    94        /*! TB0CCTL2, Capture/Compare Control Register 2 */
    95        config TBCCTLx_t TB0CCTL2 = {
    96            CM : CM_0,
    97            CCIS : CCIS_0,
    98            SCS : SCS_OFF,
    99            CLLD : CLLD_0,
   100            CAP : CAP_OFF,
   101            OUTMOD : OUTMOD_0,
   102            CCIE : CCIE_OFF,
   103            CCI : CCI_OFF,
   104            OUT : OUT_OFF,
   105            COV : COV_OFF,
   106            CCIFG : CCIFG_OFF
   107        };
   108
   109        /*! TB0CCTL3, Capture/Compare Control Register 3 */
   110        config TBCCTLx_t TB0CCTL3 = {
   111            CM : CM_0,
   112            CCIS : CCIS_0,
   113            SCS : SCS_OFF,
   114            CLLD : CLLD_0,
   115            CAP : CAP_OFF,
   116            OUTMOD : OUTMOD_0,
   117            CCIE : CCIE_OFF,
   118            CCI : CCI_OFF,
   119            OUT : OUT_OFF,
   120            COV : COV_OFF,
   121            CCIFG : CCIFG_OFF
   122        };
   123
   124        /*! TB0CCTL4, Capture/Compare Control Register 4 */
   125        config TBCCTLx_t TB0CCTL4 = {
   126            CM : CM_0,
   127            CCIS : CCIS_0,
   128            SCS : SCS_OFF,
   129            CLLD : CLLD_0,
   130            CAP : CAP_OFF,
   131            OUTMOD : OUTMOD_0,
   132            CCIE : CCIE_OFF,
   133            CCI : CCI_OFF,
   134            OUT : OUT_OFF,
   135            COV : COV_OFF,
   136            CCIFG : CCIFG_OFF
   137        };
   138
   139        /*! TB0CCTL5, Capture/Compare Control Register 5 */
   140        config TBCCTLx_t TB0CCTL5 = {
   141            CM : CM_0,
   142            CCIS : CCIS_0,
   143            SCS : SCS_OFF,
   144            CLLD : CLLD_0,
   145            CAP : CAP_OFF,
   146            OUTMOD : OUTMOD_0,
   147            CCIE : CCIE_OFF,
   148            CCI : CCI_OFF,
   149            OUT : OUT_OFF,
   150            COV : COV_OFF,
   151            CCIFG : CCIFG_OFF
   152        };
   153
   154        /*! TB0CCTL6, Capture/Compare Control Register 6 */
   155        config TBCCTLx_t TB0CCTL6 = {
   156            CM : CM_0,
   157            CCIS : CCIS_0,
   158            SCS : SCS_OFF,
   159            CLLD : CLLD_0,
   160            CAP : CAP_OFF,
   161            OUTMOD : OUTMOD_0,
   162            CCIE : CCIE_OFF,
   163            CCI : CCI_OFF,
   164            OUT : OUT_OFF,
   165            COV : COV_OFF,
   166            CCIFG : CCIFG_OFF
   167        };
   168
   169        /*! TB0CCR0, Timer_B Capture/Compare Register 0 */
   170        config Bits16 TB0CCR0 = 0;
   171        /*! TB0CCR1, Timer_B Capture/Compare Register 1 */
   172        config Bits16 TB0CCR1 = 0;
   173        /*! TB0CCR2, Timer_B Capture/Compare Register 2 */
   174        config Bits16 TB0CCR2 = 0;
   175        /*! TB0CCR3, Timer_B Capture/Compare Register 3 */
   176        config Bits16 TB0CCR3 = 0;
   177        /*! TB0CCR4, Timer_B Capture/Compare Register 4 */
   178        config Bits16 TB0CCR4 = 0;
   179        /*! TB0CCR5, Timer_B Capture/Compare Register 5 */
   180        config Bits16 TB0CCR5 = 0;
   181        /*! TB0CCR6, Timer_B Capture/Compare Register 6 */
   182        config Bits16 TB0CCR6 = 0;
   183
   184        /*! Timer interrupt enables */
   185        config regIntVect_t interruptSource[8];
   186
   187        /*! Determine if each Register needs to be forced set or not */
   188        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   189        [
   190            { register : "TB0CTL"   , regForceSet : false },
   191            { register : "TB0CCTL0" , regForceSet : false },
   192            { register : "TB0CCTL1" , regForceSet : false },
   193            { register : "TB0CCTL2" , regForceSet : false },
   194            { register : "TB0CCTL3" , regForceSet : false },
   195            { register : "TB0CCTL4" , regForceSet : false },
   196            { register : "TB0CCTL5" , regForceSet : false },
   197            { register : "TB0CCTL6" , regForceSet : false },
   198            { register : "TB0CCR0"  , regForceSet : false },
   199            { register : "TB0CCR1"  , regForceSet : false },
   200            { register : "TB0CCR2"  , regForceSet : false },
   201            { register : "TB0CCR3"  , regForceSet : false },
   202            { register : "TB0CCR4"  , regForceSet : false },
   203            { register : "TB0CCR5"  , regForceSet : false },
   204            { register : "TB0CCR6"  , regForceSet : false }
   205        ];
   206    }


module ti.catalog.msp430.peripherals.timer.Timer1_A2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer1_A2 ========
    35     *  MSP430 Timer1_A2 timer
    36     */
    37    metaonly module Timer1_A2 inherits ITimer_A {
    38
    39    instance:
    40        /*! TA1CTL, Timer1_A2 Control Register */
    41        config TACTL_t TA1CTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TA1CCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TA1CCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TA1CCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TA1CCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TA1CCR0, Timer_A Capture/Compare Register 0 */
    81        config Bits16 TA1CCR0 = 0;
    82        /*! TA1CCR1, Timer_A Capture/Compare Register 1 */
    83        config Bits16 TA1CCR1 = 0;
    84
    85        /*! Timer interrupt enables */
    86        config regIntVect_t interruptSource[3];
    87
    88        /*! Determine if each Register needs to be forced set or not */
    89        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    90        [
    91            { register : "TA1CTL"   , regForceSet : false },
    92            { register : "TA1CCTL0" , regForceSet : false },
    93            { register : "TA1CCTL1" , regForceSet : false },
    94            { register : "TA1CCR0"  , regForceSet : false },
    95            { register : "TA1CCR1"  , regForceSet : false }
    96        ];
    97    }


module ti.catalog.msp430.peripherals.timer.Timer1_A3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer1_A3 ========
    35     *  MSP430 Timer1_A3 timer
    36     */
    37    metaonly module Timer1_A3 inherits ITimer_A {
    38
    39    instance:
    40        /*! TA1CTL, Timer_A3 Control Register */
    41        config TACTL_t TA1CTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TA1CCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TA1CCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TA1CCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TA1CCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TA1CCTL2, Capture/Compare Control Register 2 */
    81        config TACCTLx_t TA1CCTL2 = {
    82            CM : CM_0,
    83            CCIS : CCIS_0,
    84            SCS : SCS_OFF,
    85            SCCI : SCCI_OFF,
    86            CAP : CAP_OFF,
    87            OUTMOD : OUTMOD_0,
    88            CCIE : CCIE_OFF,
    89            CCI : CCI_OFF,
    90            OUT : OUT_OFF,
    91            COV : COV_OFF,
    92            CCIFG : CCIFG_OFF
    93        };
    94
    95        /*! TA1CCR0, Timer_A Capture/Compare Register 0 */
    96        config Bits16 TA1CCR0 = 0;
    97        /*! TA1CCR1, Timer_A Capture/Compare Register 1 */
    98        config Bits16 TA1CCR1 = 0;
    99        /*! TA1CCR2, Timer_A Capture/Compare Register 2 */
   100        config Bits16 TA1CCR2 = 0;
   101
   102        /*! Timer interrupt enables */
   103        config regIntVect_t interruptSource[4];
   104
   105        /*! Determine if each Register needs to be forced set or not */
   106        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   107        [
   108            { register : "TA1CTL"   , regForceSet : false },
   109            { register : "TA1CCTL0" , regForceSet : false },
   110            { register : "TA1CCTL1" , regForceSet : false },
   111            { register : "TA1CCTL2" , regForceSet : false },
   112            { register : "TA1CCR0"  , regForceSet : false },
   113            { register : "TA1CCR1"  , regForceSet : false },
   114            { register : "TA1CCR2"  , regForceSet : false }
   115        ];
   116    }


module ti.catalog.msp430.peripherals.timer.Timer1_B3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer1_B3 ========
    35     *  MSP430 Timer1_B3 timer
    36     */
    37    metaonly module Timer1_B3 inherits ITimer_B {
    38
    39
    40    instance:
    41
    42        /*! Timer interrupt enables */
    43        config regIntVect_t interruptSource[8];
    44
    45    }


module ti.catalog.msp430.peripherals.timer.Timer2_A2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer2_A2 ========
    35     *  MSP430 Timer2_A2 timer
    36     */
    37    metaonly module Timer2_A2 inherits ITimer_A {
    38
    39    instance:
    40        /*! TA2CTL, Timer2_A2 Control Register */
    41        config TACTL_t TA2CTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TA2CCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TA2CCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TA2CCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TA2CCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TA2CCR0, Timer_A Capture/Compare Register 0 */
    81        config Bits16 TA2CCR0 = 0;
    82        /*! TA2CCR1, Timer_A Capture/Compare Register 1 */
    83        config Bits16 TA2CCR1 = 0;
    84
    85        /*! Timer interrupt enables */
    86        config regIntVect_t interruptSource[3];
    87
    88        /*! Determine if each Register needs to be forced set or not */
    89        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    90        [
    91            { register : "TA2CTL"   , regForceSet : false },
    92            { register : "TA2CCTL0" , regForceSet : false },
    93            { register : "TA2CCTL1" , regForceSet : false },
    94            { register : "TA2CCR0"  , regForceSet : false },
    95            { register : "TA2CCR1"  , regForceSet : false }
    96        ];
    97    }


module ti.catalog.msp430.peripherals.timer.Timer2_A3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer2_A3 ========
    35     *  MSP430 Timer2_A3 timer
    36     */
    37    metaonly module Timer2_A3 inherits ITimer_A {
    38
    39    instance:
    40        /*! TA2CTL, Timer_A3 Control Register */
    41        config TACTL_t TA2CTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TA2CCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TA2CCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TA2CCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TA2CCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TA2CCTL2, Capture/Compare Control Register 2 */
    81        config TACCTLx_t TA2CCTL2 = {
    82            CM : CM_0,
    83            CCIS : CCIS_0,
    84            SCS : SCS_OFF,
    85            SCCI : SCCI_OFF,
    86            CAP : CAP_OFF,
    87            OUTMOD : OUTMOD_0,
    88            CCIE : CCIE_OFF,
    89            CCI : CCI_OFF,
    90            OUT : OUT_OFF,
    91            COV : COV_OFF,
    92            CCIFG : CCIFG_OFF
    93        };
    94
    95        /*! TA2CCR0, Timer_A Capture/Compare Register 0 */
    96        config Bits16 TA2CCR0 = 0;
    97        /*! TA2CCR1, Timer_A Capture/Compare Register 1 */
    98        config Bits16 TA2CCR1 = 0;
    99        /*! TA2CCR2, Timer_A Capture/Compare Register 2 */
   100        config Bits16 TA2CCR2 = 0;
   101
   102        /*! Timer interrupt enables */
   103        config regIntVect_t interruptSource[4];
   104
   105        /*! Determine if each Register needs to be forced set or not */
   106        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   107        [
   108            { register : "TA2CTL"   , regForceSet : false },
   109            { register : "TA2CCTL0" , regForceSet : false },
   110            { register : "TA2CCTL1" , regForceSet : false },
   111            { register : "TA2CCTL2" , regForceSet : false },
   112            { register : "TA2CCR0"  , regForceSet : false },
   113            { register : "TA2CCR1"  , regForceSet : false },
   114            { register : "TA2CCR2"  , regForceSet : false }
   115        ];
   116    }


module ti.catalog.msp430.peripherals.timer.Timer2_B3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer2_B3 ========
    35     *  MSP430 Timer2_B3 timer
    36     */
    37    metaonly module Timer2_B3 inherits ITimer_B {
    38
    39
    40    instance:
    41
    42        /*! Timer interrupt enables */
    43        config regIntVect_t interruptSource[8];
    44
    45    }


module ti.catalog.msp430.peripherals.timer.Timer3_A2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer3_A2 ========
    35     *  MSP430 Timer3_A2 timer
    36     */
    37    metaonly module Timer3_A2 inherits ITimer_A {
    38
    39    instance:
    40        /*! TA3CTL, Timer3_A2 Control Register */
    41        config TACTL_t TA3CTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TA3CCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TA3CCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TA3CCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TA3CCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TA3CCR0, Timer_A Capture/Compare Register 0 */
    81        config Bits16 TA3CCR0 = 0;
    82        /*! TA3CCR1, Timer_A Capture/Compare Register 1 */
    83        config Bits16 TA3CCR1 = 0;
    84
    85        /*! Timer interrupt enables */
    86        config regIntVect_t interruptSource[3];
    87
    88        /*! Determine if each Register needs to be forced set or not */
    89        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    90        [
    91            { register : "TA3CTL"   , regForceSet : false },
    92            { register : "TA3CCTL0" , regForceSet : false },
    93            { register : "TA3CCTL1" , regForceSet : false },
    94            { register : "TA3CCR0"  , regForceSet : false },
    95            { register : "TA3CCR1"  , regForceSet : false }
    96        ];
    97    }


module ti.catalog.msp430.peripherals.timer.Timer3_A5

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer3_A5 ========
    35     *  MSP430 Timer3_A5 timer
    36     */
    37    metaonly module Timer3_A5 inherits ITimer_A {
    38
    39    instance:
    40        /*! TA3CTL, Timer3_A5 Control Register */
    41        config TACTL_t TA3CTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TA3CCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TA3CCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TA3CCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TA3CCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TA3CCTL2, Capture/Compare Control Register 2 */
    81        config TACCTLx_t TA3CCTL2 = {
    82            CM : CM_0,
    83            CCIS : CCIS_0,
    84            SCS : SCS_OFF,
    85            SCCI : SCCI_OFF,
    86            CAP : CAP_OFF,
    87            OUTMOD : OUTMOD_0,
    88            CCIE : CCIE_OFF,
    89            CCI : CCI_OFF,
    90            OUT : OUT_OFF,
    91            COV : COV_OFF,
    92            CCIFG : CCIFG_OFF
    93        };
    94
    95        /*! TA3CCTL3, Capture/Compare Control Register 3 */
    96        config TACCTLx_t TA3CCTL3 = {
    97            CM : CM_0,
    98            CCIS : CCIS_0,
    99            SCS : SCS_OFF,
   100            SCCI : SCCI_OFF,
   101            CAP : CAP_OFF,
   102            OUTMOD : OUTMOD_0,
   103            CCIE : CCIE_OFF,
   104            CCI : CCI_OFF,
   105            OUT : OUT_OFF,
   106            COV : COV_OFF,
   107            CCIFG : CCIFG_OFF
   108        };
   109
   110        /*! TA3CCTL4, Capture/Compare Control Register 4 */
   111        config TACCTLx_t TA3CCTL4 = {
   112            CM : CM_0,
   113            CCIS : CCIS_0,
   114            SCS : SCS_OFF,
   115            SCCI : SCCI_OFF,
   116            CAP : CAP_OFF,
   117            OUTMOD : OUTMOD_0,
   118            CCIE : CCIE_OFF,
   119            CCI : CCI_OFF,
   120            OUT : OUT_OFF,
   121            COV : COV_OFF,
   122            CCIFG : CCIFG_OFF
   123        };
   124
   125        /*! TA3CCR0, Timer_A Capture/Compare Register 0 */
   126        config Bits16 TA3CCR0 = 0;
   127        /*! TA3CCR1, Timer_A Capture/Compare Register 1 */
   128        config Bits16 TA3CCR1 = 0;
   129        /*! TA3CCR2, Timer_A Capture/Compare Register 2 */
   130        config Bits16 TA3CCR2 = 0;
   131        /*! TA3CCR3, Timer_A Capture/Compare Register 3 */
   132        config Bits16 TA3CCR3 = 0;
   133        /*! TA3CCR4, Timer_A Capture/Compare Register 4 */
   134        config Bits16 TA3CCR4 = 0;
   135
   136        /*! Timer interrupt enables */
   137        config regIntVect_t interruptSource[6];
   138
   139        /*! Determine if each Register needs to be forced set or not */
   140        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   141        [
   142            { register : "TA3CTL"   , regForceSet : false },
   143            { register : "TA3CCTL0" , regForceSet : false },
   144            { register : "TA3CCTL1" , regForceSet : false },
   145            { register : "TA3CCR0"  , regForceSet : false },
   146            { register : "TA3CCR1"  , regForceSet : false },
   147            { register : "TA3CCR2"  , regForceSet : false },
   148            { register : "TA3CCR3"  , regForceSet : false },
   149            { register : "TA3CCR4"  , regForceSet : false }
   150        ];
   151    }


module ti.catalog.msp430.peripherals.timer.Timer_A2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer_A2 ========
    35     *  MSP430 Timer_A2 timer
    36     */
    37    metaonly module Timer_A2 inherits ITimer_A {
    38
    39    instance:
    40        /*! TACTL, Timer_A2 Control Register */
    41        config TACTL_t TACTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TACCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TACCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TACCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TACCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TACCR0, Timer_A Capture/Compare Register 0 */
    81        config Bits16 TACCR0 = 0;
    82        /*! TACCR1, Timer_A Capture/Compare Register 1 */
    83        config Bits16 TACCR1 = 0;
    84
    85        /*! Timer interrupt enables */
    86        config regIntVect_t interruptSource[3];
    87
    88        /*! Determine if each Register needs to be forced set or not */
    89        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    90        [
    91            { register : "TACTL"   , regForceSet : false },
    92            { register : "TACCTL0" , regForceSet : false },
    93            { register : "TACCTL1" , regForceSet : false },
    94            { register : "TACCR0"  , regForceSet : false },
    95            { register : "TACCR1"  , regForceSet : false }
    96        ];
    97    }


module ti.catalog.msp430.peripherals.timer.Timer_A3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer_A3 ========
    35     *  MSP430 Timer_A3 timer
    36     */
    37    metaonly module Timer_A3 inherits ITimer_A {
    38
    39    instance:
    40        /*! TACTL, Timer_A3 Control Register */
    41        config TACTL_t TACTL = {
    42            TASSEL : TASSEL_0,
    43            ID : ID_0,
    44            MC : MC_0,
    45            TACLR : TACLR_OFF,
    46            TAIE : TAIE_OFF,
    47            TAIFG : TAIFG_OFF
    48        };
    49
    50        /*! TACCTL0, Capture/Compare Control Register 0 */
    51        config TACCTLx_t TACCTL0 = {
    52            CM : CM_0,
    53            CCIS : CCIS_0,
    54            SCS : SCS_OFF,
    55            SCCI : SCCI_OFF,
    56            CAP : CAP_OFF,
    57            OUTMOD : OUTMOD_0,
    58            CCIE : CCIE_OFF,
    59            CCI : CCI_OFF,
    60            OUT : OUT_OFF,
    61            COV : COV_OFF,
    62            CCIFG : CCIFG_OFF
    63        };
    64
    65        /*! TACCTL1, Capture/Compare Control Register 1 */
    66        config TACCTLx_t TACCTL1 = {
    67            CM : CM_0,
    68            CCIS : CCIS_0,
    69            SCS : SCS_OFF,
    70            SCCI : SCCI_OFF,
    71            CAP : CAP_OFF,
    72            OUTMOD : OUTMOD_0,
    73            CCIE : CCIE_OFF,
    74            CCI : CCI_OFF,
    75            OUT : OUT_OFF,
    76            COV : COV_OFF,
    77            CCIFG : CCIFG_OFF
    78        };
    79
    80        /*! TACCTL2, Capture/Compare Control Register 2 */
    81        config TACCTLx_t TACCTL2 = {
    82            CM : CM_0,
    83            CCIS : CCIS_0,
    84            SCS : SCS_OFF,
    85            SCCI : SCCI_OFF,
    86            CAP : CAP_OFF,
    87            OUTMOD : OUTMOD_0,
    88            CCIE : CCIE_OFF,
    89            CCI : CCI_OFF,
    90            OUT : OUT_OFF,
    91            COV : COV_OFF,
    92            CCIFG : CCIFG_OFF
    93        };
    94
    95        /*! TACCR0, Timer_A Capture/Compare Register 0 */
    96        config Bits16 TACCR0 = 0;
    97        /*! TACCR1, Timer_A Capture/Compare Register 1 */
    98        config Bits16 TACCR1 = 0;
    99        /*! TACCR2, Timer_A Capture/Compare Register 2 */
   100        config Bits16 TACCR2 = 0;
   101
   102        /*! Timer interrupt enables */
   103        config regIntVect_t interruptSource[4];
   104
   105        /*! Determine if each Register needs to be forced set or not */
   106        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   107        [
   108            { register : "TACTL"   , regForceSet : false },
   109            { register : "TACCTL0" , regForceSet : false },
   110            { register : "TACCTL1" , regForceSet : false },
   111            { register : "TACCTL2" , regForceSet : false },
   112            { register : "TACCR0"  , regForceSet : false },
   113            { register : "TACCR1"  , regForceSet : false },
   114            { register : "TACCR2"  , regForceSet : false }
   115        ];
   116    }


module ti.catalog.msp430.peripherals.timer.Timer_A5

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer_A5 ========
    35     *  MSP430 Timer_A5 timer
    36     */
    37    metaonly module Timer_A5 inherits ITimer_A {
    38
    39    instance:
    40
    41        override config string name = "TimerA5";
    42
    43        /*! Timer A5 Control Register */
    44        config TACTL_t TAxCTL = {
    45            TASSEL : TASSEL_0,
    46            ID : ID_0,
    47            MC : MC_0,
    48            TACLR : TACLR_OFF,
    49            TAIE : TAIE_OFF,
    50            TAIFG : TAIFG_OFF
    51        };
    52
    53        /*! Capture/Compare Control 0 */
    54        config TACCTLx_t TACCTL0 = {
    55            CM : CM_0,
    56            CCIS : CCIS_0,
    57            SCS : SCS_OFF,
    58            SCCI : SCCI_OFF,
    59            CAP : CAP_OFF,
    60            OUTMOD : OUTMOD_0,
    61            CCIE : CCIE_OFF,
    62            CCI : CCI_OFF,
    63            OUT : OUT_OFF,
    64            COV : COV_OFF,
    65            CCIFG : CCIFG_OFF
    66        };
    67
    68        /*! Capture/Compare Control 1 */
    69        config TACCTLx_t TACCTL1 = {
    70            CM : CM_0,
    71            CCIS : CCIS_0,
    72            SCS : SCS_OFF,
    73            SCCI : SCCI_OFF,
    74            CAP : CAP_OFF,
    75            OUTMOD : OUTMOD_0,
    76            CCIE : CCIE_OFF,
    77            CCI : CCI_OFF,
    78            OUT : OUT_OFF,
    79            COV : COV_OFF,
    80            CCIFG : CCIFG_OFF
    81        };
    82
    83        /*! Capture/Compare Control 2 */
    84        config TACCTLx_t TACCTL2 = {
    85            CM : CM_0,
    86            CCIS : CCIS_0,
    87            SCS : SCS_OFF,
    88            SCCI : SCCI_OFF,
    89            CAP : CAP_OFF,
    90            OUTMOD : OUTMOD_0,
    91            CCIE : CCIE_OFF,
    92            CCI : CCI_OFF,
    93            OUT : OUT_OFF,
    94            COV : COV_OFF,
    95            CCIFG : CCIFG_OFF
    96        };
    97
    98        /*! Capture/Compare Control 3 */
    99        config TACCTLx_t TACCTL3 = {
   100            CM : CM_0,
   101            CCIS : CCIS_0,
   102            SCS : SCS_OFF,
   103            SCCI : SCCI_OFF,
   104            CAP : CAP_OFF,
   105            OUTMOD : OUTMOD_0,
   106            CCIE : CCIE_OFF,
   107            CCI : CCI_OFF,
   108            OUT : OUT_OFF,
   109            COV : COV_OFF,
   110            CCIFG : CCIFG_OFF
   111        };
   112
   113        /*! Capture/Compare Control 4 */
   114        config TACCTLx_t TACCTL4 = {
   115            CM : CM_0,
   116            CCIS : CCIS_0,
   117            SCS : SCS_OFF,
   118            SCCI : SCCI_OFF,
   119            CAP : CAP_OFF,
   120            OUTMOD : OUTMOD_0,
   121            CCIE : CCIE_OFF,
   122            CCI : CCI_OFF,
   123            OUT : OUT_OFF,
   124            COV : COV_OFF,
   125            CCIFG : CCIFG_OFF
   126        };
   127
   128        config Bits16 TACCR0 = 0;                         /*! Capture/Compare 0 */
   129        config Bits16 TACCR1 = 0;                         /*! Capture/Compare 1 */
   130        config Bits16 TACCR2 = 0;                         /*! Capture/Compare 2 */
   131        config Bits16 TACCR3 = 0;                         /*! Capture/Compare 3 */
   132        config Bits16 TACCR4 = 0;                         /*! Capture/Compare 4 */
   133
   134        /*! Timer interrupt enables */
   135        config regIntVect_t interruptSource[6];
   136
   137        /*! Determine if each Register needs to be forced set or not */
   138        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   139        [
   140            { register : "TACTL"   , regForceSet : false },
   141            { register : "TACCTL0" , regForceSet : false },
   142            { register : "TACCTL1" , regForceSet : false },
   143            { register : "TACCTL2" , regForceSet : false },
   144            { register : "TACCTL3" , regForceSet : false },
   145            { register : "TACCTL4" , regForceSet : false },
   146            { register : "TACCR0"  , regForceSet : false },
   147            { register : "TACCR1"  , regForceSet : false },
   148            { register : "TACCR2"  , regForceSet : false },
   149            { register : "TACCR3"  , regForceSet : false },
   150            { register : "TACCR4"  , regForceSet : false }
   151        ];
   152    }


module ti.catalog.msp430.peripherals.timer.Timer_B3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer_B3 ========
    35     *  MSP430 Timer_B timer
    36     */
    37    metaonly module Timer_B3 inherits ITimer_B {
    38
    39        /*! TB3IV Definitions */
    40        enum IVValues {
    41            TBIV_NONE = 0x0000,                 /*! No Interrupt pending */
    42            TBIV_TBCCR1 = 0x0002,               /*! TBCCR1_CCIFG */
    43            TBIV_TBCCR2 = 0x0004,               /*! TBCCR2_CCIFG */
    44            TBIV_6 = 0x0006,                    /*! Reserved */
    45            TBIV_8 = 0x0008,                    /*! Reserved */
    46            TBIV_TBIFG = 0x000A                 /*! TBIFG */
    47        };
    48
    49    instance:
    50        /*! TBCTL, Timer_B3 Control Register */
    51        config TBCTL_t TBCTL = {
    52            TBCLGRP : TBCLGRP_0,
    53            CNTL : CNTL_0,
    54            TBSSEL : TBSSEL_0,
    55            ID : ID_0,
    56            MC : MC_0,
    57            TBCLR : TBCLR_OFF,
    58            TBIE : TBIE_OFF,
    59            TBIFG : TBIFG_OFF
    60        };
    61
    62        /*! TBCCTL0, Capture/Compare Control Register 0 */
    63        config TBCCTLx_t TBCCTL0 = {
    64            CM : CM_0,
    65            CCIS : CCIS_0,
    66            SCS : SCS_OFF,
    67            CLLD : CLLD_0,
    68            CAP : CAP_OFF,
    69            OUTMOD : OUTMOD_0,
    70            CCIE : CCIE_OFF,
    71            CCI : CCI_OFF,
    72            OUT : OUT_OFF,
    73            COV : COV_OFF,
    74            CCIFG : CCIFG_OFF
    75        };
    76
    77        /*! TBCCTL1, Capture/Compare Control Register 1 */
    78        config TBCCTLx_t TBCCTL1 = {
    79            CM : CM_0,
    80            CCIS : CCIS_0,
    81            SCS : SCS_OFF,
    82            CLLD : CLLD_0,
    83            CAP : CAP_OFF,
    84            OUTMOD : OUTMOD_0,
    85            CCIE : CCIE_OFF,
    86            CCI : CCI_OFF,
    87            OUT : OUT_OFF,
    88            COV : COV_OFF,
    89            CCIFG : CCIFG_OFF
    90        };
    91
    92        /*! TBCCTL2, Capture/Compare Control Register 2 */
    93        config TBCCTLx_t TBCCTL2 = {
    94            CM : CM_0,
    95            CCIS : CCIS_0,
    96            SCS : SCS_OFF,
    97            CLLD : CLLD_0,
    98            CAP : CAP_OFF,
    99            OUTMOD : OUTMOD_0,
   100            CCIE : CCIE_OFF,
   101            CCI : CCI_OFF,
   102            OUT : OUT_OFF,
   103            COV : COV_OFF,
   104            CCIFG : CCIFG_OFF
   105        };
   106
   107        /*! TBCCR0, Timer_B Capture/Compare Register 0 */
   108        config Bits16 TBCCR0 = 0;
   109        /*! TBCCR1, Timer_B Capture/Compare Register 1 */
   110        config Bits16 TBCCR1 = 0;
   111        /*! TBCCR2, Timer_B Capture/Compare Register 2 */
   112        config Bits16 TBCCR2 = 0;
   113
   114        /*! Timer interrupt enables */
   115        config regIntVect_t interruptSource[4];
   116
   117        /*! Determine if each Register needs to be forced set or not */
   118        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   119        [
   120            { register : "TBCTL"   , regForceSet : false },
   121            { register : "TBCCTL0" , regForceSet : false },
   122            { register : "TBCCTL1" , regForceSet : false },
   123            { register : "TBCCTL2" , regForceSet : false },
   124            { register : "TBCCR0"  , regForceSet : false },
   125            { register : "TBCCR1"  , regForceSet : false },
   126            { register : "TBCCR2"  , regForceSet : false }
   127        ];
   128    }


module ti.catalog.msp430.peripherals.timer.Timer_B7

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== Timer_B7 ========
    35     *  MSP430 Timer_B7 timer
    36     */
    37    metaonly module Timer_B7 inherits ITimer_B {
    38
    39        /*! TBIV Definitions */
    40        enum IVValues {
    41            TBIV_NONE = 0x0000,                 /*! No Interrupt pending */
    42            TBIV_TBCCR1 = 0x0002,               /*! TBCCR1_CCIFG */
    43            TBIV_TBCCR2 = 0x0004,               /*! TBCCR2_CCIFG */
    44            TBIV_TBCCR3 = 0x0006,               /*! TBCCR3_CCIFG */
    45            TBIV_TBCCR4 = 0x0008,               /*! TBCCR4_CCIFG */
    46            TBIV_TBCCR5 = 0x000A,               /*! TBCCR5_CCIFG */
    47            TBIV_TBCCR6 = 0x000C,               /*! TBCCR6_CCIFG */
    48            TBIV_TBIFG = 0x000E                 /*! TBIFG */
    49        };
    50
    51    instance:
    52        /*! TBCTL, Timer_B7 Control Register */
    53        config TBCTL_t TBCTL = {
    54            TBCLGRP : TBCLGRP_0,
    55            CNTL : CNTL_0,
    56            TBSSEL : TBSSEL_0,
    57            ID : ID_0,
    58            MC : MC_0,
    59            TBCLR : TBCLR_OFF,
    60            TBIE : TBIE_OFF,
    61            TBIFG : TBIFG_OFF
    62        };
    63
    64        /*! TBCCTL0, Capture/Compare Control Register 0 */
    65        config TBCCTLx_t TBCCTL0 = {
    66            CM : CM_0,
    67            CCIS : CCIS_0,
    68            SCS : SCS_OFF,
    69            CLLD : CLLD_0,
    70            CAP : CAP_OFF,
    71            OUTMOD : OUTMOD_0,
    72            CCIE : CCIE_OFF,
    73            CCI : CCI_OFF,
    74            OUT : OUT_OFF,
    75            COV : COV_OFF,
    76            CCIFG : CCIFG_OFF
    77        };
    78
    79        /*! TBCCTL1, Capture/Compare Control Register 1 */
    80        config TBCCTLx_t TBCCTL1 = {
    81            CM : CM_0,
    82            CCIS : CCIS_0,
    83            SCS : SCS_OFF,
    84            CLLD : CLLD_0,
    85            CAP : CAP_OFF,
    86            OUTMOD : OUTMOD_0,
    87            CCIE : CCIE_OFF,
    88            CCI : CCI_OFF,
    89            OUT : OUT_OFF,
    90            COV : COV_OFF,
    91            CCIFG : CCIFG_OFF
    92        };
    93
    94        /*! TBCCTL2, Capture/Compare Control Register 2 */
    95        config TBCCTLx_t TBCCTL2 = {
    96            CM : CM_0,
    97            CCIS : CCIS_0,
    98            SCS : SCS_OFF,
    99            CLLD : CLLD_0,
   100            CAP : CAP_OFF,
   101            OUTMOD : OUTMOD_0,
   102            CCIE : CCIE_OFF,
   103            CCI : CCI_OFF,
   104            OUT : OUT_OFF,
   105            COV : COV_OFF,
   106            CCIFG : CCIFG_OFF
   107        };
   108
   109        /*! TBCCTL3, Capture/Compare Control Register 3 */
   110        config TBCCTLx_t TBCCTL3 = {
   111            CM : CM_0,
   112            CCIS : CCIS_0,
   113            SCS : SCS_OFF,
   114            CLLD : CLLD_0,
   115            CAP : CAP_OFF,
   116            OUTMOD : OUTMOD_0,
   117            CCIE : CCIE_OFF,
   118            CCI : CCI_OFF,
   119            OUT : OUT_OFF,
   120            COV : COV_OFF,
   121            CCIFG : CCIFG_OFF
   122        };
   123
   124        /*! TBCCTL4, Capture/Compare Control Register 4 */
   125        config TBCCTLx_t TBCCTL4 = {
   126            CM : CM_0,
   127            CCIS : CCIS_0,
   128            SCS : SCS_OFF,
   129            CLLD : CLLD_0,
   130            CAP : CAP_OFF,
   131            OUTMOD : OUTMOD_0,
   132            CCIE : CCIE_OFF,
   133            CCI : CCI_OFF,
   134            OUT : OUT_OFF,
   135            COV : COV_OFF,
   136            CCIFG : CCIFG_OFF
   137        };
   138
   139        /*! TBCCTL5, Capture/Compare Control Register 5 */
   140        config TBCCTLx_t TBCCTL5 = {
   141            CM : CM_0,
   142            CCIS : CCIS_0,
   143            SCS : SCS_OFF,
   144            CLLD : CLLD_0,
   145            CAP : CAP_OFF,
   146            OUTMOD : OUTMOD_0,
   147            CCIE : CCIE_OFF,
   148            CCI : CCI_OFF,
   149            OUT : OUT_OFF,
   150            COV : COV_OFF,
   151            CCIFG : CCIFG_OFF
   152        };
   153
   154        /*! TBCCTL6, Capture/Compare Control Register 6 */
   155        config TBCCTLx_t TBCCTL6 = {
   156            CM : CM_0,
   157            CCIS : CCIS_0,
   158            SCS : SCS_OFF,
   159            CLLD : CLLD_0,
   160            CAP : CAP_OFF,
   161            OUTMOD : OUTMOD_0,
   162            CCIE : CCIE_OFF,
   163            CCI : CCI_OFF,
   164            OUT : OUT_OFF,
   165            COV : COV_OFF,
   166            CCIFG : CCIFG_OFF
   167        };
   168
   169        /*! TBCCR0, Timer_B Capture/Compare Register 0 */
   170        config Bits16 TBCCR0 = 0;
   171        /*! TBCCR1, Timer_B Capture/Compare Register 1 */
   172        config Bits16 TBCCR1 = 0;
   173        /*! TBCCR2, Timer_B Capture/Compare Register 2 */
   174        config Bits16 TBCCR2 = 0;
   175        /*! TBCCR3, Timer_B Capture/Compare Register 3 */
   176        config Bits16 TBCCR3 = 0;
   177        /*! TBCCR4, Timer_B Capture/Compare Register 4 */
   178        config Bits16 TBCCR4 = 0;
   179        /*! TBCCR5, Timer_B Capture/Compare Register 5 */
   180        config Bits16 TBCCR5 = 0;
   181        /*! TBCCR6, Timer_B Capture/Compare Register 6 */
   182        config Bits16 TBCCR6 = 0;
   183
   184        /*! Timer interrupt enables */
   185        config regIntVect_t interruptSource[8];
   186
   187        /*! Determine if each Register needs to be forced set or not */
   188        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   189        [
   190            { register : "TBCTL"   , regForceSet : false },
   191            { register : "TBCCTL0" , regForceSet : false },
   192            { register : "TBCCTL1" , regForceSet : false },
   193            { register : "TBCCTL2" , regForceSet : false },
   194            { register : "TBCCTL3" , regForceSet : false },
   195            { register : "TBCCTL4" , regForceSet : false },
   196            { register : "TBCCTL5" , regForceSet : false },
   197            { register : "TBCCTL6" , regForceSet : false },
   198            { register : "TBCCR0"  , regForceSet : false },
   199            { register : "TBCCR1"  , regForceSet : false },
   200            { register : "TBCCR2"  , regForceSet : false },
   201            { register : "TBCCR3"  , regForceSet : false },
   202            { register : "TBCCR4"  , regForceSet : false },
   203            { register : "TBCCR5"  , regForceSet : false },
   204            { register : "TBCCR6"  , regForceSet : false }
   205        ];
   206    }


interface ti.catalog.msp430.peripherals.watchdog.IWDT

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== IWDT ========
    35     *  MSP430 Watchdog Timer Interface
    36     */
    37    metaonly interface IWDT inherits xdc.platform.IPeripheral {
    38
    39        /*!
    40        *  ======== ForceSetDefaultRegister_t ========
    41        *  Force Set Default Register
    42        *
    43        *  Type to store if each register needs to be forced initialized
    44        *  even if the register is in default state.
    45        *
    46        *  @see #ForceSetDefaultRegister_t
    47        */
    48        struct ForceSetDefaultRegister_t {
    49            String     register;
    50            Bool       regForceSet;
    51        }
    52
    53    instance:
    54
    55    }


package ti.catalog.msp430.peripherals.watchdog

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.msp430.peripherals.clock;
    34    requires ti.catalog.msp430.peripherals.special_function;
    35
    36    /*!
    37     *  ======== ti.catalog.msp430.peripherals.watchdog ========
    38     *  MSP430 WDT+ (watchdog timer) peripheral
    39     */
    40    package ti.catalog.msp430.peripherals.watchdog [1, 0, 0] {
    41        module WDTplus;
    42        module WDT_A;
    43        interface IWDT;
    44    }


module ti.catalog.msp430.peripherals.watchdog.WDT_A

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     *  ======== WDT_A ========
    37     *  MSP430 Watchdog Timer A
    38     */
    39    metaonly module WDT_A inherits IWDT
    40    {
    41        create(IClock.Instance clock);
    42
    43    instance:
    44
    45        /*!
    46         *  ======== baseAddr ========
    47         *  Address of the peripheral's control register.
    48         *
    49         *  A peripheral's registers are commonly accessed through a structure
    50         *  that defines the offsets of a particular register from the lowest
    51         *  address mapped to a peripheral. That lowest address is specified by
    52         *  this parameter.
    53         */
    54        config UInt baseAddr;
    55
    56        /*! @_nodoc */
    57        config IClock.Instance clock;
    58    }


module ti.catalog.msp430.peripherals.watchdog.WDTplus

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    import ti.catalog.msp430.peripherals.clock.IClock;
    34
    35    /*!
    36     *  ======== WDT+ ========
    37     *  MSP430 Watchdog Timer+
    38     */
    39    metaonly module WDTplus inherits IWDT
    40    {
    41        enum WDTPW_t {
    42            WDTPW_OFF = 0x0000,         /*! no Watchdog password value */
    43            WDTPW     = 0x5A00          /*! Watchdog password */
    44        };
    45
    46        enum WDTHOLD_t {
    47            WDTHOLD_OFF = 0x0000,       /*! Watchdog timer+ is not stopped */
    48            WDTHOLD     = 0x0080        /*! Watchdog timer+ is stopped */
    49        };
    50
    51        enum WDTNMIES_t {
    52            WDTNMIES_OFF = 0x0000,      /*! NMI on rising edge */
    53            WDTNMIES     = 0x0040       /*! NMI on falling edge */
    54        };
    55
    56        enum WDTNMI_t {
    57            WDTNMI_OFF = 0x0000,        /*! Reset function */
    58            WDTNMI     = 0x0020         /*! NMI function */
    59        };
    60
    61        enum WDTTMSEL_t {
    62            WDTTMSEL_OFF = 0x0000,      /*! Watchdog mode */
    63            WDTTMSEL     = 0x0010       /*! Interval timer mode */
    64        };
    65
    66        enum WDTCNTCL_t {
    67            WDTCNTCL_OFF = 0x0000,      /*! No action */
    68            WDTCNTCL     = 0x0008       /*! WDTCNT = 0000h */
    69        };
    70
    71        enum WDTSSEL_t {
    72            WDTSSEL_OFF = 0x0000,       /*! SMCLK */
    73            WDTSSEL     = 0x0004        /*! ACLK */
    74        };
    75
    76        enum WDTIS1_t {
    77            WDTIS1_OFF = 0x0000,        /*! Watchdog clock source bit1 disabled */
    78            WDTIS1     = 0x0002         /*! Watchdog clock source bit1 enabled */
    79        };
    80
    81        enum WDTIS0_t {
    82            WDTIS0_OFF = 0x0000,        /*! Watchdog clock source bit0 disabled */
    83            WDTIS0     = 0x0001         /*! Watchdog clock source bit0 enabled */
    84        };
    85
    86        /* WDTCTL Register */
    87        struct WDTCTL_t {
    88            WDTPW_t     WDTPW;          /*! WDT+ password */
    89            WDTHOLD_t   WDTHOLD;        /*! Watchdog timer+ hold. This bit stops the watchdog timer+. Setting
    90                                         *WDTHOLD = 1 when the WDT+ is not in use conserves power.
    91                                         *  0    Watchdog timer+ is not stopped
    92                                         *  1    Watchdog timer+ is stopped
    93                                         */
    94            WDTNMIES_t  WDTNMIES;       /*! Watchdog timer+ NMI edge select. This bit selects the interrupt edge for the
    95                                         *NMI interrupt when WDTNMI = 1. Modifying this bit can trigger an NMI. Modify
    96                                         *this bit when WDTIE = 0 to avoid triggering an accidental NMI.
    97                                         *  0    NMI on rising edge
    98                                         *  1    NMI on falling edge
    99                                         */
   100            WDTNMI_t    WDTNMI;         /*! Watchdog timer+ NMI select. This bit selects the function for the RST/NMI pin.
   101                                         *  0    Reset function
   102                                         *  1    NMI function
   103                                         */
   104            WDTTMSEL_t  WDTTMSEL;       /*! Watchdog timer+ mode select
   105                                         *  0    Watchdog mode
   106                                         *  1    Interval timer mode
   107                                         */
   108            WDTCNTCL_t  WDTCNTCL;       /*! Watchdog timer+ counter clear. Setting WDTCNTCL = 1 clears the count
   109                                         *value to 0000h. WDTCNTCL is automatically reset.
   110                                         *  0    No action
   111                                         *  1    WDTCNT = 0000h
   112                                         */
   113            WDTSSEL_t   WDTSSEL;        /*! Watchdog timer+ clock source select
   114                                         *  0    SMCLK
   115                                         *  1    ACLK
   116                                         */
   117            WDTIS0_t    WDTIS0;         /*! Watchdog timer+ interval select. These bits select the watchdog timer+
   118                                         *interval to set the WDTIFG flag and/or generate a PUC.
   119                                         *  00   Watchdog clock source /32768
   120                                         *  01   Watchdog clock source /8192
   121                                         *  10   Watchdog clock source /512
   122                                         *  11   Watchdog clock source /64
   123                                         */
   124            WDTIS1_t    WDTIS1;          /*! Watchdog timer+ interval select. These bits select the watchdog timer+
   125                                          *interval to set the WDTIFG flag and/or generate a PUC.
   126                                          *  00   Watchdog clock source /32768
   127                                          *  01   Watchdog clock source /8192
   128                                          *  10   Watchdog clock source /512
   129                                          *  11   Watchdog clock source /64
   130                                          */
   131        }
   132
   133        create(IClock.Instance clock);
   134
   135    instance:
   136        /*! WDTCTL, Watchdog Timer+ Register */
   137        config WDTCTL_t WDTCTL = {
   138            WDTPW       : WDTPW,
   139            WDTHOLD     : WDTHOLD_OFF,
   140            WDTNMIES    : WDTNMIES_OFF,
   141            WDTNMI      : WDTNMI_OFF,
   142            WDTTMSEL    : WDTTMSEL_OFF,
   143            WDTCNTCL    : WDTCNTCL_OFF,
   144            WDTSSEL     : WDTSSEL_OFF,
   145            WDTIS0      : WDTIS0_OFF,
   146            WDTIS1      : WDTIS1_OFF,
   147        };
   148
   149        /*! Determine if each Register needs to be forced set or not */
   150        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
   151        [
   152            { register : "WDTCTL" , regForceSet : true }
   153        ];
   154
   155        /*!
   156         *  ======== baseAddr ========
   157         *  Address of the peripheral's control register.
   158         *
   159         *  A peripheral's registers are commonly accessed through a structure
   160         *  that defines the offsets of a particular register from the lowest
   161         *  address mapped to a peripheral. That lowest address is specified by
   162         *  this parameter.
   163         */
   164        config UInt baseAddr;
   165
   166        /*! @_nodoc */
   167        config IClock.Instance clock;
   168    }


module ti.catalog.peripherals.hdvicp2.HDVICP2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== HDVICP2 ========
    35     *  HD Video Coprocessor
    36     */
    37    metaonly module HDVICP2 inherits xdc.platform.IPeripheral {
    38
    39    instance:
    40        /*!
    41         *  ======== baseAddr ========
    42         *  Address of the peripheral's control register.
    43         *
    44         *  A peripheral's registers are commonly accessed through a structure
    45         *  that defines the offsets of a particular register from the lowest
    46         *  address mapped to a peripheral. That lowest address is specified by
    47         *  this parameter.
    48         */
    49        config UInt baseAddr;
    50
    51        /*!
    52         *  ======== intNum ========
    53         *  Transfer completion Interrupt source number
    54         *
    55         */
    56        config UInt intNum;
    57    }


package ti.catalog.peripherals.hdvicp2

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*!
    34     *  ======== ti.catalog.peripherals.hdvicp2 ========
    35     *  HD Video Coprocessor support
    36     */
    37    package ti.catalog.peripherals.hdvicp2 {
    38        module HDVICP2;
    39    }


package ti.mcu.msp430.include

     1    /*!
     2     *  ======== ti.mcu.msp430.include ========
     3     *  MSP430 headers and default linker command files
     4     */
     5    package ti.mcu.msp430.include {
     6    }


package ti.platforms.arm

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.arm;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.arm ========
    38     *  Generic platform for arm
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables
    42     */
    43    package ti.platforms.arm [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.arm.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.arm;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Generic platform support for the arm
    42     *
    43     *  This platform requires a memory map file called `board.xs` to be available
    44     *  in the same directory as the application config file. It should define
    45     *  values for the config parameters which are declared in this platform.
    46     *
    47     *  @a(Examples)
    48     *  A sample `board.xs` file.
    49     *
    50     *  @p(code)
    51     *  var boardARM = {
    52     *      CPU: {
    53     *          clockRate:      300.0,
    54     *          catalogName:    "ti.catalog.arm.cortexm3",
    55     *          deviceName:     "TMS320DM8168",
    56     *      },
    57     *      externalMemoryMap: [
    58     *          ["EXTRAM",  {
    59     *              name: "DDR",  base: 0xC0000000, len: 0x08000000,
    60     *          }]
    61     *      ],
    62     *      codeMemory:  "DDR",
    63     *      dataMemory:  "DDR",
    64     *      stackMemory: "DDR",
    65     *      l1PMode:     "32k",
    66     *      l1DMode:     "32k",
    67     *      l2Mode:      "0k",
    68     *  };
    69     *  @p
    70     */
    71    metaonly module Platform inherits xdc.platform.IPlatform
    72    {
    73        config xdc.platform.IPlatform.Board BOARD;
    74
    75    instance:
    76
    77        /*!
    78         *  ======== CPU ========
    79         *  CPU Attributes necessary to create an execution context
    80         *
    81         *  The platform requires these attributes to get the device internal
    82         *  memory map.
    83         *
    84         *  @see xdc.platform.IExeContext#Cpu
    85         */
    86        config xdc.platform.IExeContext.Cpu CPU = {
    87            id:             "0",
    88            clockRate:      1.0,
    89            catalogName:    "ti.catalog.arm",
    90            deviceName:     "",
    91            revision:       "",
    92        };
    93
    94        override config String codeMemory = null;
    95
    96        override config String dataMemory = null;
    97
    98        override config String stackMemory = null;
    99
   100        /*!
   101         *  ======== sectionMap ========
   102         *  A section name to SectionSpec mapping
   103         *
   104         *  @see xdc.cfg.Program#sectMap
   105         */
   106        config Any sectionMap[string];
   107
   108        /*!
   109         *  ======== sectionsExclude ========
   110         *  Section to exclude from linker command file generation
   111         *
   112         *  @see xdc.cfg.Program#sectionsExclude
   113         */
   114        config String sectionsExclude = null;
   115
   116        /*!
   117         *  ======== memoryExclude ========
   118         *  Section to exclude from linker command file generation
   119         *
   120         *  @see xdc.cfg.Program#memoryExclude
   121         */
   122        config Bool memoryExclude = false;
   123
   124        /*!
   125         *  ======== sectionsTemplate ========
   126         *  Replace the sections portion of the generated linker command file.
   127         *
   128         *  @see xdc.cfg.Program#sectionsTemplate
   129         */
   130        config String sectionsTemplate = null;
   131
   132        /*!
   133         *  ======== l1PMode ========
   134         *  Define the amount of L1P RAM used for L1 Program Cache.
   135         */
   136        config String l1PMode = null;
   137
   138        /*!
   139         *  ======== l1DMode ========
   140         *  Define the amount of L1D RAM used for L1 Data Cache.
   141         */
   142        config String l1DMode = null;
   143
   144        /*!
   145         *  ======== l2Mode ========
   146         *  Define the amount of L2 RAM used for L2 Cache.
   147         */
   148        config String l2Mode = null;
   149
   150        /*!
   151         *  ======== sectMap ========
   152         *  @_nodoc
   153         */
   154        override config String sectMap[string];
   155
   156        /*!
   157         *  ======== getCpuDataSheet ========
   158         *  @_nodoc
   159         */
   160        override function getCpuDataSheet(cpuId);
   161
   162        /*!
   163         *  ======== getExeContext ========
   164         *  @_nodoc
   165         */
   166        override function getExeContext(prog);
   167
   168        /*!
   169         *  ======== getExecCmd ========
   170         *  @_nodoc
   171         */
   172        override function getExecCmd(prog, platPath);
   173
   174        /*!
   175         *  ======== getLinkTemplate ========
   176         *  @_nodoc
   177         */
   178        override function getLinkTemplate(prog);
   179    };


package ti.platforms.arp32

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.arp32;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.arp32 ========
    38     *  Generic platform for arp32
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables
    42     */
    43    package ti.platforms.arp32 [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.arp32.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.arp32;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Generic platform support for the arp32
    42     *
    43     *  This platform requires a memory map file called `board.xs` to be available
    44     *  in the same directory as the application config file. It should define
    45     *  values for the config parameters which are declared in this platform.
    46     *
    47     *  @a(Examples)
    48     *  A sample `board.xs` file.
    49     *
    50     *  @p(code)
    51     *  var boardARP32 = {
    52     *      CPU: {
    53     *          clockRate:      200.0,
    54     *          catalogName:    "ti.catalog.arp32",
    55     *          deviceName:     "Arctic",
    56     *      },
    57     *      externalMemoryMap: [
    58     *          ["ARP32VECS", {
    59     *              comment: "External memory for ARP32 interrupt vectors",
    60     *              name:  "ARP32VECS",
    61     *              base:  0x80000000,
    62     *              len:   0x00000100,
    63     *              page:  0,
    64     *              space: "code/data"
    65     *          }],
    66     *
    67     *          ["ARP32", {
    68     *              comment: "External memory for ARP32 use",
    69     *              name:  "ARP32",
    70     *              base:  0x80000100,
    71     *              len:   0x0fffff00,
    72     *              page:  1,
    73     *              space: "code/data"
    74     *          }]
    75     *      ],
    76     *      codeMemory:  "ARP32",
    77     *      dataMemory:  "DMEM",
    78     *      stackMemory: "DMEM",
    79     *  };
    80     *  @p
    81     */
    82    metaonly module Platform inherits xdc.platform.IPlatform
    83    {
    84        config xdc.platform.IPlatform.Board BOARD;
    85
    86    instance:
    87
    88        /*!
    89         *  ======== CPU ========
    90         *  CPU Attributes necessary to create an execution context
    91         *
    92         *  The platform requires these attributes to get the device internal
    93         *  memory map.
    94         *
    95         *  @see xdc.platform.IExeContext#Cpu
    96         */
    97        config xdc.platform.IExeContext.Cpu CPU = {
    98            id:             "0",
    99            clockRate:      1.0,
   100            catalogName:    "ti.catalog.arp32",
   101            deviceName:     "",
   102            revision:       "",
   103        };
   104
   105        override config String codeMemory = null;
   106
   107        override config String dataMemory = null;
   108
   109        override config String stackMemory = null;
   110
   111        /*!
   112         *  ======== sectionMap ========
   113         *  A section name to SectionSpec mapping
   114         *
   115         *  @see xdc.cfg.Program#sectMap
   116         */
   117        config Any sectionMap[string];
   118
   119        /*!
   120         *  ======== sectionsExclude ========
   121         *  Section to exclude from linker command file generation
   122         *
   123         *  @see xdc.cfg.Program#sectionsExclude
   124         */
   125        config String sectionsExclude = null;
   126
   127        /*!
   128         *  ======== memoryExclude ========
   129         *  Section to exclude from linker command file generation
   130         *
   131         *  @see xdc.cfg.Program#memoryExclude
   132         */
   133        config Bool memoryExclude = false;
   134
   135        /*!
   136         *  ======== sectionsTemplate ========
   137         *  Replace the sections portion of the generated linker command file.
   138         *
   139         *  @see xdc.cfg.Program#sectionsTemplate
   140         */
   141        config String sectionsTemplate = null;
   142
   143        /*!
   144         *  ======== sectMap ========
   145         *  @_nodoc
   146         */
   147        override config String sectMap[string];
   148
   149        /*!
   150         *  ======== getCpuDataSheet ========
   151         *  @_nodoc
   152         */
   153        override function getCpuDataSheet(cpuId);
   154
   155        /*!
   156         *  ======== getExeContext ========
   157         *  @_nodoc
   158         */
   159        override function getExeContext(prog);
   160
   161        /*!
   162         *  ======== getExecCmd ========
   163         *  @_nodoc
   164         */
   165        override function getExecCmd(prog, platPath);
   166
   167        /*!
   168         *  ======== getLinkTemplate ========
   169         *  @_nodoc
   170         */
   171        override function getLinkTemplate(prog);
   172    };


package ti.platforms.beaglebone

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.arm.cortexa8;
    38    requires xdc.platform [1,0,1];
    39
    40    /*!
    41     *  ======== ti.platforms.beaglebone ========
    42     *  Platform package for the beaglebone platform.
    43     *
    44     *  This package implements the interfaces (xdc.platform.IPlatform)
    45     *  necessary to build and run executables on the beaglebone platform.
    46     *
    47     *  @a(Throws)
    48     *  `XDCException` exceptions are thrown for fatal errors. The following error
    49     *  codes are reported in the exception message:
    50     *  @p(dlist)
    51     *      -  `ti.platfoms.beaglebone.LINK_TEMPLATE_ERROR`
    52     *           This error is raised when this platform cannot found the default
    53     *           linker command template `linkcmd.xdt` in the build target's
    54     *           package. When a target does not contain this file, the config
    55     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    56     *  @p
    57     */
    58    package ti.platforms.beaglebone [1,0,0] {
    59        module Platform;
    60    }


module ti.platforms.beaglebone.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for beaglebone
    36     *
    37     */
    38
    39    package ti.platforms.beaglebone;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the beaglebone
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "beaglebone",
    59            boardFamily:    "beaglebone",
    60            boardRevision:  null
    61        };
    62
    63        /* GPP */
    64        readonly config xdc.platform.IExeContext.Cpu GPP = {
    65            id:             "2",
    66            clockRate:      500.0,  /* USB powered clock */
    67            catalogName:    "ti.catalog.arm.cortexa8",
    68            deviceName:     "AM3359",
    69            revision:       "1.0"
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {
    77                    comment: "DDR2 Memory",
    78                    name: "DDR2",
    79                    base: 0x80000000,
    80                    len:  0x10000000    /* 256 MB */
    81                }],
    82            ];
    83    };


package ti.platforms.c6000

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.c6000 ========
    38     *  Generic platform for c6000
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables
    42     */
    43    package ti.platforms.c6000 [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.c6000.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.c6000;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Generic platform support for the c6000
    42     *
    43     *  This platform requires a memory map file called `board.xs` to be available
    44     *  in the same directory as the application config file. It should define
    45     *  values for the config parameters which are declared in this platform.
    46     *
    47     *  @a(Examples)
    48     *  A sample `board.xs` file.
    49     *
    50     *  @p(code)
    51     *  var board6748 = {
    52     *      BOARD: {
    53     *          boardName:      "board6748",
    54     *          boardFamily:    "board6xxx",
    55     *      },
    56     *      CPU: {
    57     *          clockRate:      300.0,
    58     *          catalogName:    "ti.catalog.c6000",
    59     *          deviceName:     "TMS320C6748",
    60     *      },
    61     *      externalMemoryMap: [
    62     *          ["EXTRAM",  {
    63     *              name: "DDR",  base: 0xC0000000, len: 0x08000000,
    64     *          }]
    65     *      ],
    66     *      codeMemory:  "DDR",
    67     *      dataMemory:  "DDR",
    68     *      stackMemory: "DDR",
    69     *      l1PMode:     "32k",
    70     *      l1DMode:     "32k",
    71     *      l2Mode:      "0k",
    72     *  };
    73     *  @p
    74     */
    75    metaonly module Platform inherits xdc.platform.IPlatform
    76    {
    77        config xdc.platform.IPlatform.Board BOARD;
    78
    79    instance:
    80
    81        /*!
    82         *  ======== CPU ========
    83         *  CPU Attributes necessary to create an execution context
    84         *
    85         *  The platform requires these attributes to get the device internal
    86         *  memory map.
    87         *
    88         *  @see xdc.platform.IExeContext#Cpu
    89         */
    90        config xdc.platform.IExeContext.Cpu CPU = {
    91            id:             "0",
    92            clockRate:      1.0,
    93            catalogName:    "ti.catalog.c6000",
    94            deviceName:     "",
    95            revision:       "",
    96        };
    97
    98        override config String codeMemory = null;
    99
   100        override config String dataMemory = null;
   101
   102        override config String stackMemory = null;
   103
   104        /*!
   105         *  ======== sectionMap ========
   106         *  A section name to SectionSpec mapping
   107         *
   108         *  @see xdc.cfg.Program#sectMap
   109         */
   110        config Any sectionMap[string];
   111
   112        /*!
   113         *  ======== sectionsExclude ========
   114         *  Section to exclude from linker command file generation
   115         *
   116         *  @see xdc.cfg.Program#sectionsExclude
   117         */
   118        config String sectionsExclude = null;
   119
   120        /*!
   121         *  ======== memoryExclude ========
   122         *  Section to exclude from linker command file generation
   123         *
   124         *  @see xdc.cfg.Program#memoryExclude
   125         */
   126        config Bool memoryExclude = false;
   127
   128        /*!
   129         *  ======== sectionsTemplate ========
   130         *  Replace the sections portion of the generated linker command file.
   131         *
   132         *  @see xdc.cfg.Program#sectionsTemplate
   133         */
   134        config String sectionsTemplate = null;
   135
   136        /*!
   137         *  ======== l1PMode ========
   138         *  Define the amount of L1P RAM used for L1 Program Cache.
   139         */
   140        config String l1PMode = null;
   141
   142        /*!
   143         *  ======== l1DMode ========
   144         *  Define the amount of L1D RAM used for L1 Data Cache.
   145         */
   146        config String l1DMode = null;
   147
   148        /*!
   149         *  ======== l2Mode ========
   150         *  Define the amount of L2 RAM used for L2 Cache.
   151         */
   152        config String l2Mode = null;
   153
   154        /*!
   155         *  ======== sectMap ========
   156         *  @_nodoc
   157         */
   158        override config String sectMap[string];
   159
   160        /*!
   161         *  ======== getCpuDataSheet ========
   162         *  @_nodoc
   163         */
   164        override function getCpuDataSheet(cpuId);
   165
   166        /*!
   167         *  ======== getExeContext ========
   168         *  @_nodoc
   169         */
   170        override function getExeContext(prog);
   171
   172        /*!
   173         *  ======== getExecCmd ========
   174         *  @_nodoc
   175         */
   176        override function getExecCmd(prog, platPath);
   177
   178        /*!
   179         *  ======== getLinkTemplate ========
   180         *  @_nodoc
   181         */
   182        override function getLinkTemplate(prog);
   183    };


package ti.platforms.c6x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.c6000;
    35
    36    /*!
    37     *  ======== ti.platforms.c6x ========
    38     *  Generic platform support for any C6x device
    39     */
    40    package ti.platforms.c6x [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.c6x.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.c6x;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any C6x device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.c6x:TMS320C6678"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.c6x:TMS320C6678");
    52     *  @p
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "c6x",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    68         *  and `clockRate` can be encoded in the instance name supplied on
    69         *  `xdc.tools.configuro` command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.c6x:TMS320C6678:1:20
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.c6x:TMS320C6678
    76         *  @p
    77         */
    78         readonly config string nameFormat
    79             = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    80
    81    instance:
    82
    83        /*
    84         *  This platform supports C6x cores.
    85         *  The corresponding "actual" catalogName is overwritten
    86         *  in Platform.instance$meta$init() based on the device name
    87         */
    88        config xdc.platform.IExeContext.Cpu CPU = {
    89            id:             "0",
    90            clockRate:      1.0,
    91            catalogName:    "ti.catalog.c6000",
    92            deviceName:     "C66",
    93            revision:       "",
    94        };
    95
    96        /*!
    97         *  ======== deviceName ========
    98         *  The name of an `ICpuDataSheet` module for the device
    99         *
   100         *  This parameter is required, but it does not have to be set explicitly;
   101         *  it can be encoded in the instance's name.
   102         */
   103        config string deviceName;
   104
   105        /*!
   106         *  ======== clockRate ========
   107         *  The clock rate for this device.
   108         */
   109        config Double clockRate;
   110
   111        override config string codeMemory = null;
   112
   113        override config string dataMemory = null;
   114
   115        override config string stackMemory = null;
   116
   117        /*!
   118         *  ======== includeLinkCmdFile ========
   119         *  The flag that specifies if the platform should include a linker command
   120         *  file.
   121         *
   122         *  By default, a user is responsible for adding a linker command file to
   123         *  the project, or to the linker command line. However, if this flag is
   124         *  set, this platform will include a default linker command file for the
   125         *  selected device.
   126         */
   127        config Bool includeLinkCmdFile = false;
   128    };


package ti.platforms.concertoC28

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.c2800;
    35
    36    /*!
    37     *  ======== ti.platforms.concertoC28 ========
    38     *  Platform support for any concerto C28 device
    39     */
    40    package ti.platforms.concertoC28 [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.concertoC28.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.concertoC28;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any Stellaris device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.concertoC28:F28M35H52C1"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.concertoC28:F28M35H52C1");
    52     *  @p
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "concertoC28",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    68         *  and `clockRate` can be encoded in the instance name supplied on
    69         *  `xdc.tools.configuro` command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.concertoC28:F28M35H52C1:1:150
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.concertoC28:F28M35H52C1
    76         *  @p
    77         */
    78        readonly config string nameFormat =
    79            "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    80
    81    instance:
    82
    83        config xdc.platform.IExeContext.Cpu CPU = {
    84            id:             "0",
    85            clockRate:      1.0,
    86            catalogName:    "ti.catalog.c2800",
    87            deviceName:     "F28M35x",
    88            revision:       "",
    89        };
    90
    91        /*!
    92         *  ======== deviceName ========
    93         *  The name of an `ICpuDataSheet` module for the device
    94         *
    95         *  This parameter is required, but it does not have to be set explicitly;
    96         *  it can be encoded in the instance's name.
    97         */
    98        config string deviceName;
    99
   100        /*!
   101         *  ======== clockRate ========
   102         *  The clock rate for this device.
   103         */
   104        config Double clockRate = 60.0;
   105
   106        override config string codeMemory = null;
   107
   108        override config string dataMemory = null;
   109
   110        override config string stackMemory = null;
   111
   112        /*!
   113         *  ======== includeLinkCmdFile ========
   114         *  The flag that specifies if the platform should include a linker command
   115         *  file.
   116         *
   117         *  By default, a user is responsible for adding a linker command file to
   118         *  the project, or to the linker command line. However, if this flag is
   119         *  set, this platform will include a default linker command file for the
   120         *  selected device.
   121         */
   122        config Bool includeLinkCmdFile = false;
   123    };


package ti.platforms.concertoM3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.arm.cortexm3;
    35
    36    /*!
    37     *  ======== ti.platforms.concertoM3 ========
    38     *  Platform support for any concerto M3 device
    39     */
    40    package ti.platforms.concertoM3 [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.concertoM3.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.concertoM3;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any Stellaris device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.concertoM3:LM3S8971"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.concertoM3:LM3S8971");
    52     *  @p
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "concertoM3",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName` and `includeLinkCmdFile`
    68         *  can be encoded in the instance name supplied on `xdc.tools.configuro`
    69         *  command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.concertoM3:LM3S8971:1
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.concertoM3:LM3S8971
    76         *  @p
    77         */
    78         readonly config string nameFormat = "$(deviceName):$(includeLinkCmdFile)";
    79
    80    instance:
    81
    82        config xdc.platform.IExeContext.Cpu CPU = {
    83            id:             "0",
    84            clockRate:      1.0,
    85            catalogName:    "ti.catalog.arm.cortexm3",
    86            deviceName:     "F28M35x",
    87            revision:       "",
    88        };
    89
    90        /*!
    91         *  ======== deviceName ========
    92         *  The name of an `ICpuDataSheet` module for the device
    93         *
    94         *  This parameter is required, but it does not have to be set explicitly;
    95         *  it can be encoded in the instance's name.
    96         */
    97        config string deviceName;
    98
    99        /*!
   100         *  ======== clockRate ========
   101         *  The clock rate for this device.
   102         */
   103        config Double clockRate;
   104
   105        override config string codeMemory = null;
   106
   107        override config string dataMemory = null;
   108
   109        override config string stackMemory = null;
   110
   111        /*!
   112         *  ======== includeLinkCmdFile ========
   113         *  The flag that specifies if the platform should include a linker command
   114         *  file.
   115         *
   116         *  By default, a user is responsible for adding a linker command file to
   117         *  the project, or to the linker command line. However, if this flag is
   118         *  set, this platform will include a default linker command file for the
   119         *  selected device.
   120         */
   121        config Bool includeLinkCmdFile = false;
   122    };


package ti.platforms.control28027

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.control28027 ========
    38     *  Platform package for the 28027 control card.
    39     *
    40     *  This package implements the interface (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the 28027 controlCARD platform.
    42     */
    43    package ti.platforms.control28027 [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.control28027.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  This module implements xdc.IPlatform and defines configuration
    36     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    37     *
    38     *  The configuration parameters are initialized in this package's
    39     *  configuration script (package.cfg) and "bound" to the TCOM object
    40     *  model.  Once they are part of the model, these parameters are
    41     *  queried by a program's configuration script.
    42     *
    43     *  This particular platform has a single Cpu, and therefore, only
    44     *  declares a single CPU configuration object.  Multi-CPU platforms
    45     *  would declare multiple Cpu configuration parameters (one per
    46     *  platform CPU).
    47     *
    48     */
    49
    50    package ti.platforms.control28027;
    51
    52    metaonly module Platform inherits xdc.platform.IPlatform
    53    {
    54        readonly config xdc.platform.IPlatform.Board BOARD = {
    55            id:             "0",
    56            boardName:      "control28027",
    57            boardFamily:    "control28027",
    58            boardRevision:  null
    59        };
    60
    61        readonly config xdc.platform.IExeContext.Cpu CPU = {
    62            id:             "0",
    63            clockRate:      60.0,
    64            catalogName:    "ti.catalog.c2800",
    65            deviceName:     "TMS320C28027",
    66            revision:       null
    67        };
    68
    69    instance:
    70
    71        override config string codeMemory = "FLASH";
    72
    73        override config string dataMemory = "LSARAM";
    74
    75        override config string stackMemory = "MSARAM";
    76    };


package ti.platforms.control28035

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.control28035 ========
    38     *  Platform package for the 28035 control card.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the 28035 controlCARD platform.
    42     */
    43    package ti.platforms.control28035 [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.control28035.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  This module implements xdc.IPlatform and defines configuration
    36     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    37     *
    38     *  The configuration parameters are initialized in this package's
    39     *  configuration script (package.cfg) and "bound" to the TCOM object
    40     *  model.  Once they are part of the model, these parameters are
    41     *  queried by a program's configuration script.
    42     *
    43     *  This particular platform has a single Cpu, and therefore, only
    44     *  declares a single CPU configuration object.  Multi-CPU platforms
    45     *  would declare multiple Cpu configuration parameters (one per
    46     *  platform CPU).
    47     *
    48     */
    49
    50    package ti.platforms.control28035;
    51
    52    metaonly module Platform inherits xdc.platform.IPlatform
    53    {
    54        readonly config xdc.platform.IPlatform.Board BOARD = {
    55            id:             "0",
    56            boardName:      "control28035",
    57            boardFamily:    "control28035",
    58            boardRevision:  null
    59        };
    60
    61        readonly config xdc.platform.IExeContext.Cpu CPU = {
    62            id:             "0",
    63            clockRate:      60.0,
    64            catalogName:    "ti.catalog.c2800",
    65            deviceName:     "TMS320C28035",
    66            revision:       null
    67        };
    68
    69    instance:
    70
    71        override config string codeMemory = "FLASH";
    72
    73        override config string dataMemory = "LSARAM";
    74
    75        override config string stackMemory = "MSARAM";
    76    };


package ti.platforms.control28069

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.control28069 ========
    38     *  Platform package for the 28069 control card and control stick.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the 28069 controlCARD and
    42     *  controlSTICK platform.
    43     */
    44    package ti.platforms.control28069 [1,0,0] {
    45        module Platform;
    46    }


module ti.platforms.control28069.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  This module implements xdc.IPlatform and defines configuration
    36     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    37     *
    38     *  The configuration parameters are initialized in this package's
    39     *  configuration script (package.cfg) and "bound" to the TCOM object
    40     *  model.  Once they are part of the model, these parameters are
    41     *  queried by a program's configuration script.
    42     *
    43     *  This particular platform has a single Cpu, and therefore, only
    44     *  declares a single CPU configuration object.  Multi-CPU platforms
    45     *  would declare multiple Cpu configuration parameters (one per
    46     *  platform CPU).
    47     *
    48     */
    49
    50    package ti.platforms.control28069;
    51
    52    metaonly module Platform inherits xdc.platform.IPlatform
    53    {
    54        readonly config xdc.platform.IPlatform.Board BOARD = {
    55            id:             "0",
    56            boardName:      "control28069",
    57            boardFamily:    "control28069",
    58            boardRevision:  null
    59        };
    60
    61        readonly config xdc.platform.IExeContext.Cpu CPU = {
    62            id:             "0",
    63            clockRate:      80.0,
    64            catalogName:    "ti.catalog.c2800",
    65            deviceName:     "TMS320F28069",
    66            revision:       null
    67        };
    68
    69    instance:
    70
    71        override config string codeMemory = "FLASH";
    72
    73        override config string dataMemory = "L4SARAM";
    74
    75        override config string stackMemory = "L03DPSARAM";
    76    };


package ti.platforms.control28335

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c2800;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.control28335 ========
    43     *  Platform package for the 28335 control card.
    44     *
    45     *  This package implements the interface (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the 28335 controlCARD platform.
    47     */
    48    package ti.platforms.control28335 [1,0,0] {
    49        module Platform;
    50    }


module ti.platforms.control28335.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  This module implements xdc.IPlatform and defines configuration
    36     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    37     *
    38     *  The configuration parameters are initialized in this package's
    39     *  configuration script (package.cfg) and "bound" to the TCOM object
    40     *  model.  Once they are part of the model, these parameters are
    41     *  queried by a program's configuration script.
    42     *
    43     *  This particular platform has a single Cpu, and therefore, only
    44     *  declares a single CPU configuration object.  Multi-CPU platforms
    45     *  would declare multiple Cpu configuration parameters (one per
    46     *  platform CPU).
    47     *
    48     */
    49
    50    package ti.platforms.control28335;
    51
    52    metaonly module Platform inherits xdc.platform.IPlatform
    53    {
    54        readonly config xdc.platform.IPlatform.Board BOARD = {
    55            id:             "0",
    56            boardName:      "control28335",
    57            boardFamily:    "control28335",
    58            boardRevision:  null
    59        };
    60
    61        readonly config xdc.platform.IExeContext.Cpu CPU = {
    62            id:             "0",
    63            clockRate:      150.0,
    64            catalogName:    "ti.catalog.c2800",
    65            deviceName:     "TMS320C28335",
    66            revision:       null
    67        };
    68
    69    instance:
    70
    71        override config string codeMemory = "L47SARAM";
    72
    73        override config string dataMemory = "L03SARAM";
    74
    75        override config string stackMemory = "L03SARAM";
    76    };


package ti.platforms.control28346

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.control28346 ========
    38     *  Platform package for the 28346 control card.
    39     *
    40     *  This package implements the interface (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the 28346 controlCARD platform.
    42     */
    43    package ti.platforms.control28346 [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.control28346.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  This module implements xdc.IPlatform and defines configuration
    36     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    37     *
    38     *  The configuration parameters are initialized in this package's
    39     *  configuration script (package.cfg) and "bound" to the TCOM object
    40     *  model.  Once they are part of the model, these parameters are
    41     *  queried by a program's configuration script.
    42     *
    43     *  This particular platform has a single Cpu, and therefore, only
    44     *  declares a single CPU configuration object.  Multi-CPU platforms
    45     *  would declare multiple Cpu configuration parameters (one per
    46     *  platform CPU).
    47     *
    48     */
    49
    50    package ti.platforms.control28346;
    51
    52    metaonly module Platform inherits xdc.platform.IPlatform
    53    {
    54        readonly config xdc.platform.IPlatform.Board BOARD = {
    55            id:             "0",
    56            boardName:      "control28346",
    57            boardFamily:    "control28346",
    58            boardRevision:  null
    59        };
    60
    61        readonly config xdc.platform.IExeContext.Cpu CPU = {
    62            id:             "0",
    63            clockRate:      300.0,
    64            catalogName:    "ti.catalog.c2800",
    65            deviceName:     "TMS320C28346",
    66            revision:       null
    67        };
    68
    69    instance:
    70
    71        override readonly config xdc.platform.IPlatform.MemoryMap
    72            externalMemoryMap = [
    73                ["SRAM",
    74                    {
    75                        name: "SRAM",
    76                        base: 0x200000,
    77                        len:  0x020000,
    78                        page: 0,
    79                        space: "code/data",
    80                    }
    81                ],
    82            ];
    83
    84        override config string codeMemory = "L47SARAM";
    85
    86        override config string dataMemory = "L03SARAM";
    87
    88        override config string stackMemory = "L03SARAM";
    89    };


package ti.platforms.cortexA

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.arm.cortexa53;
    35
    36    /*!
    37     *  ======== ti.platforms.cortexA ========
    38     *  Generic platform support for any ARMv8 Cortex-A device
    39     */
    40    package ti.platforms.cortexA [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.cortexA.Platform

     1    /*
     2     * Copyright (c) 2016-2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    /*
    33     *  ======== Platform.xdc ========
    34     */
    35    package ti.platforms.cortexA;
    36
    37    /*!
    38     *  ======== Platform ========
    39     *  A generic platform that supports any ARMv8 Cortex-A device
    40     *
    41     *  The device to be used by this platform is passed as the platform instance
    42     *  name. On the `xdc.tools.configuro` command line, it is done in the
    43     *  following way:
    44     *  @p(code)
    45     *  xs xdc.tools.configuro ... -p "ti.platforms.cortexA:SIMFLEMING"
    46     *  @p
    47     *
    48     *  In package.bld, the platform instance is selected as in:
    49     *  @p(code)
    50     *  Pkg.addExecutable("test", target, "ti.platforms.cortexA:SIMFLEMING");
    51     *  @p
    52     */
    53    @Template ("./Platform.xdt")
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "cortexA",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    68         *  and `clockRate` can be encoded in the instance name supplied on
    69         *  `xdc.tools.configuro` command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.cortexA:SIMFLEMING:1:20
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.cortexA:SIMFLEMING
    76         *  @p
    77         */
    78         readonly config string nameFormat
    79             = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    80
    81    instance:
    82
    83        /*
    84         *  This platform supports ARMv8 Cortex-A cores.
    85         *  The corresponding "actual" catalogName is overwritten
    86         *  in Platform.instance$meta$init() based on the device name
    87         */
    88        config xdc.platform.IExeContext.Cpu CPU = {
    89            id:             "0",
    90            clockRate:      1.0,
    91            catalogName:    "ti.catalog.arm.cortexa53",
    92            deviceName:     "CortexA",
    93            revision:       "",
    94        };
    95
    96        /*!
    97         *  ======== deviceName ========
    98         *  The name of an `ICpuDataSheet` module for the device
    99         *
   100         *  This parameter is required, but it does not have to be set explicitly;
   101         *  it can be encoded in the instance's name.
   102         */
   103        config string deviceName;
   104
   105        /*!
   106         *  ======== clockRate ========
   107         *  The clock rate for this device.
   108         */
   109        config Double clockRate;
   110
   111        override config string codeMemory = null;
   112
   113        override config string dataMemory = null;
   114
   115        override config string stackMemory = null;
   116
   117        /*!
   118         *  ======== includeLinkCmdFile ========
   119         *  The flag that specifies if the platform should include a linker command
   120         *  file.
   121         *
   122         *  By default, a user is responsible for adding a linker command file to
   123         *  the project, or to the linker command line. However, if this flag is
   124         *  set, this platform will include a default linker command file for the
   125         *  selected device.
   126         */
   127        config Bool includeLinkCmdFile = false;
   128    };


package ti.platforms.cortexM

     1    /*
     2     * Copyright (c) 2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.arm.cortexm33;
    35
    36    /*!
    37     *  ======== ti.platforms.cortexM ========
    38     *  Generic platform support for any ARM Cortex-M device
    39     */
    40    package ti.platforms.cortexM [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.cortexM.Platform

     1    /*
     2     * Copyright (c) 2017, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32    /*
    33     *  ======== Platform.xdc ========
    34     */
    35    package ti.platforms.cortexM;
    36
    37    /*!
    38     *  ======== Platform ========
    39     *  A generic platform that supports any ARM Cortex-M device
    40     *
    41     *  The device to be used by this platform is passed as the platform instance
    42     *  name. On the `xdc.tools.configuro` command line, it is done in the
    43     *  following way:
    44     *  @p(code)
    45     *  xs xdc.tools.configuro ... -p "ti.platforms.cortexM:MTL1"
    46     *  @p
    47     *
    48     *  In package.bld, the platform instance is selected as in:
    49     *  @p(code)
    50     *  Pkg.addExecutable("test", target, "ti.platforms.cortexM:MTL1");
    51     *  @p
    52     */
    53    @Template ("./Platform.xdt")
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "cortexM",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    68         *  and `clockRate` can be encoded in the instance name supplied on
    69         *  `xdc.tools.configuro` command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.cortexM:MTL1:1:20
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.cortexM:MTL1
    76         *  @p
    77         */
    78         readonly config string nameFormat
    79             = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    80
    81    instance:
    82
    83        /*
    84         *  This platform supports ARM Cortex-M cores.
    85         *  The corresponding "actual" catalogName is overwritten
    86         *  in Platform.instance$meta$init() based on the device name
    87         */
    88        config xdc.platform.IExeContext.Cpu CPU = {
    89            id:             "0",
    90            clockRate:      1.0,
    91            catalogName:    "ti.catalog.arm.cortexm33",
    92            deviceName:     "CortexM",
    93            revision:       "",
    94        };
    95
    96        /*!
    97         *  ======== deviceName ========
    98         *  The name of an `ICpuDataSheet` module for the device
    99         *
   100         *  This parameter is required, but it does not have to be set explicitly;
   101         *  it can be encoded in the instance's name.
   102         */
   103        config string deviceName;
   104
   105        /*!
   106         *  ======== clockRate ========
   107         *  The clock rate for this device.
   108         */
   109        config Double clockRate;
   110
   111        override config string codeMemory = null;
   112
   113        override config string dataMemory = null;
   114
   115        override config string stackMemory = null;
   116
   117        /*!
   118         *  ======== includeLinkCmdFile ========
   119         *  The flag that specifies if the platform should include a linker command
   120         *  file.
   121         *
   122         *  By default, a user is responsible for adding a linker command file to
   123         *  the project, or to the linker command line. However, if this flag is
   124         *  set, this platform will include a default linker command file for the
   125         *  selected device.
   126         */
   127        config Bool includeLinkCmdFile = false;
   128    };


package ti.platforms.cortexR

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.arm.cortexr5;
    35
    36    /*!
    37     *  ======== ti.platforms.cortexR ========
    38     *  Generic platform support for any Cortex-R device
    39     */
    40    package ti.platforms.cortexR [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.cortexR.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.cortexR;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any Cortex-R device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.cortexR:RM57D843ZWTT"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.cortexR:RM57D843ZWTT");
    52     *  @p
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "cortexR",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    68         *  and `clockRate` can be encoded in the instance name supplied on
    69         *  `xdc.tools.configuro` command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.cortexR:RM57D843ZWTT:1:20
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.cortexR:RM57D843ZWTT
    76         *  @p
    77         */
    78         readonly config string nameFormat
    79             = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    80
    81    instance:
    82
    83        /*
    84         *  This platform supports Cortex R5F cores.
    85         *  The corresponding "actual" catalogName is overwritten
    86         *  in Platform.instance$meta$init() based on the device name
    87         */
    88        config xdc.platform.IExeContext.Cpu CPU = {
    89            id:             "0",
    90            clockRate:      1.0,
    91            catalogName:    "ti.catalog.arm.cortexr5",
    92            deviceName:     "CortexR",
    93            revision:       "",
    94        };
    95
    96        /*!
    97         *  ======== deviceName ========
    98         *  The name of an `ICpuDataSheet` module for the device
    99         *
   100         *  This parameter is required, but it does not have to be set explicitly;
   101         *  it can be encoded in the instance's name.
   102         */
   103        config string deviceName;
   104
   105        /*!
   106         *  ======== clockRate ========
   107         *  The clock rate for this device.
   108         */
   109        config Double clockRate;
   110
   111        override config string codeMemory = null;
   112
   113        override config string dataMemory = null;
   114
   115        override config string stackMemory = null;
   116
   117        /*!
   118         *  ======== includeLinkCmdFile ========
   119         *  The flag that specifies if the platform should include a linker command
   120         *  file.
   121         *
   122         *  By default, a user is responsible for adding a linker command file to
   123         *  the project, or to the linker command line. However, if this flag is
   124         *  set, this platform will include a default linker command file for the
   125         *  selected device.
   126         */
   127        config Bool includeLinkCmdFile = false;
   128    };


package ti.platforms.dsk6455

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.dsk6455 ========
    43     *  Platform package for the dsk6455 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the dsk6455 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.dsk6455.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.dsk6455 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.dsk6455.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the dsk6455
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "dsk6455",
    60            boardFamily:    "dsk6455",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      1000,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320C6455",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        /*
    75         *  ======== memTab ========
    76         *  Define the dsk6455 memory map
    77         */
    78        override readonly config xdc.platform.IPlatform.Memory
    79            externalMemoryMap[string] = [
    80                ["DDR2", {name: "DDR2", base: 0xE0000000, len: 0x10000000}],
    81            ];
    82
    83        override config string codeMemory = "IRAM";
    84
    85        override config string dataMemory = "DDR2";
    86
    87        override config string stackMemory = "DDR2";
    88
    89        /*
    90         *  ======== l1PMode ========
    91         *  Define the amount of L1P RAM used for L1 Program Cache.
    92         *
    93         *  Check the device documentation for valid values.
    94         */
    95        config String l1PMode = "32k";
    96
    97        /*
    98         *  ======== l1DMode ========
    99         *  Define the amount of L1D RAM used for L1 Data Cache.
   100         *
   101         *  Check the device documentation for valid values.
   102         */
   103        config String l1DMode = "32k";
   104
   105        /*
   106         *  ======== l2Mode ========
   107         *  Define the amount of L2 RAM used for L2 Cache.
   108         *
   109         *  Check the device documentation for valid values.
   110         */
   111        config String l2Mode = "0k";
   112    };


package ti.platforms.dskTCI6482

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.dskTCI6482 ========
    43     *  Platform package for the dskTCI6482 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the dskTCI6482 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.dskTCI6482.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.dskTCI6482 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.dskTCI6482.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the dskTCI6482
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "dskTCI6482",
    60            boardFamily:    "dskTCI6482",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      1000,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320CTCI6482",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        /*
    75         *  ======== externalMemoryMap ========
    76         *  Define the dskTCI6482 external memory map
    77         */
    78        override readonly config xdc.platform.IPlatform.Memory
    79            externalMemoryMap[string] = [
    80                ["DDR", {name: "DDR", base: 0xE0000000, len: 0x10000000}],
    81            ];
    82
    83        override config string codeMemory = "DDR";
    84
    85        override config string dataMemory = "DDR";
    86
    87        override config string stackMemory = "DDR";
    88
    89        /*
    90         *  ======== l1PMode ========
    91         *  Define the amount of L1P RAM used for L1 Program Cache.
    92         *
    93         *  Check the device documentation for valid values.
    94         */
    95        config String l1PMode = "32k";
    96
    97        /*
    98         *  ======== l1DMode ========
    99         *  Define the amount of L1D RAM used for L1 Data Cache.
   100         *
   101         *  Check the device documentation for valid values.
   102         */
   103        config String l1DMode = "32k";
   104
   105        /*
   106         *  ======== l2Mode ========
   107         *  Define the amount of L2 RAM used for L2 Cache.
   108         *
   109         *  Check the device documentation for valid values.
   110         */
   111        config String l2Mode = "0k";
   112    };


package ti.platforms.evm3530

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires ti.catalog.arm;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evm3530 ========
    44     *  Platform package for the evm3530 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evm3530 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evm3530.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evm3530 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evm3530.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm3530
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evm3530",
    60            boardFamily:    "evm3530",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu DSP = {
    65            id:             "0",
    66            clockRate:      330,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "OMAP3530",
    69            revision:       "",
    70        };
    71
    72        readonly config xdc.platform.IExeContext.Cpu GPP = {
    73            id:             "1",
    74            clockRate:      330,
    75            catalogName:    "ti.catalog.arm.cortexa8",
    76            deviceName:     "OMAP3530",
    77            revision:       "",
    78        };
    79
    80    instance:
    81
    82        override readonly config xdc.platform.IPlatform.Memory
    83            externalMemoryMap[string] = [
    84                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x8000000}],
    85            ];
    86
    87        override config string dataMemory = "DDR2";
    88
    89        override config string stackMemory = "DDR2";
    90
    91        /*
    92         *  ======== l1PMode ========
    93         *  Define the amount of L1P RAM used for L1 Program Cache.
    94         *
    95         *  Check the device documentation for valid values.
    96         */
    97        config String l1PMode = "32k";
    98
    99        /*
   100         *  ======== l1DMode ========
   101         *  Define the amount of L1D RAM used for L1 Data Cache.
   102         *
   103         *  Check the device documentation for valid values.
   104         */
   105        config String l1DMode = "32k";
   106
   107        /*
   108         *  ======== l2Mode ========
   109         *  Define the amount of L2 RAM used for L2 Cache.
   110         *
   111         *  Check the device documentation for valid values.
   112         */
   113        config String l2Mode = "0k";
   114    };


package ti.platforms.evm6424

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6424 ========
    43     *  Platform package for the evm6424 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evm6424 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evm6424.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evm6424 [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evm6424.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6424
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evm6424",
    60            boardFamily:    "evm6424",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      594,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320C6424",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        /*
    75         *  ======== memTab ========
    76         *  Define the evm6424 memory map
    77         */
    78        override readonly config xdc.platform.IPlatform.Memory
    79            externalMemoryMap[string] = [
    80                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x08000000}],
    81                ["SRAM", {name: "SRAM", base: 0x42000000, len: 0x00200000}],
    82            ];
    83
    84        override config string codeMemory = "DDR2";
    85
    86        override config string dataMemory = "DDR2";
    87
    88        override config string stackMemory = "DDR2";
    89
    90        /*
    91         *  ======== l1PMode ========
    92         *  Define the amount of L1P RAM used for L1 Program Cache.
    93         *
    94         *  Check the device documentation for valid values.
    95         */
    96        config String l1PMode = "32k";
    97
    98        /*
    99         *  ======== l1DMode ========
   100         *  Define the amount of L1D RAM used for L1 Data Cache.
   101         *
   102         *  Check the device documentation for valid values.
   103         */
   104        config String l1DMode = "32k";
   105
   106        /*
   107         *  ======== l2Mode ========
   108         *  Define the amount of L2 RAM used for L2 Cache.
   109         *
   110         *  Check the device documentation for valid values.
   111         */
   112        config String l2Mode = "0k";
   113    };


package ti.platforms.evm6452

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6452 ========
    43     *  Platform package for the evm6452 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evm6452 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evm6452.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evm6452 [1,0,1] {
    60        module Platform;
    61    }


module ti.platforms.evm6452.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6452
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evm6452",
    60            boardFamily:    "evm6452",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      891,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320C6452",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0xE0000000, len: 0x10000000}],
    77            ];
    78
    79        override config string codeMemory = "DDR2";
    80
    81        override config string dataMemory = "DDR2";
    82
    83        override config string stackMemory = "DDR2";
    84
    85        /*
    86         *  ======== l1PMode ========
    87         *  Define the amount of L1P RAM used for L1 Program Cache.
    88         *
    89         *  Check the device documentation for valid values.
    90         */
    91        config String l1PMode = "32k";
    92
    93        /*
    94         *  ======== l1DMode ========
    95         *  Define the amount of L1D RAM used for L1 Data Cache.
    96         *
    97         *  Check the device documentation for valid values.
    98         */
    99        config String l1DMode = "32k";
   100
   101        /*
   102         *  ======== l2Mode ========
   103         *  Define the amount of L2 RAM used for L2 Cache.
   104         *
   105         *  Check the device documentation for valid values.
   106         */
   107        config String l2Mode = "0k";
   108
   109    };


package ti.platforms.evm6457

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6457 ========
    43     *  Platform package for the evm6457 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evm6457 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evm6457.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evm6457 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evm6457.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6457
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evm6457",
    60            boardFamily:    "evm6457",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      1000.0,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320C6457",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0xe0000000, len: 0x10000000}],
    77            ];
    78        override config string codeMemory = "DDR2";
    79
    80        override config string dataMemory = "DDR2";
    81
    82        override config string stackMemory = "DDR2";
    83
    84        /*
    85         *  ======== l1PMode ========
    86         *  Define the amount of L1P RAM used for L1 Program Cache.
    87         *
    88         *  Check the device documentation for valid values.
    89         */
    90        config String l1PMode = "32k";
    91
    92        /*
    93         *  ======== l1DMode ========
    94         *  Define the amount of L1D RAM used for L1 Data Cache.
    95         *
    96         *  Check the device documentation for valid values.
    97         */
    98        config String l1DMode = "32k";
    99
   100        /*
   101         *  ======== l2Mode ========
   102         *  Define the amount of L2 RAM used for L2 Cache.
   103         *
   104         *  Check the device documentation for valid values.
   105         */
   106        config String l2Mode = "0k";
   107    };


package ti.platforms.evm6472

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6472 ========
    43     *  Platform package for the evm6472 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evm6472 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evm6472.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evm6472 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evm6472.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6472
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evm6472",
    60            boardFamily:    "evm6472",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      700,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320C6472",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0xe0000000, len: 0x10000000}],
    77            ];
    78
    79        override config string codeMemory = "LL2RAM";
    80
    81        override config string dataMemory = "LL2RAM";
    82
    83        override config string stackMemory = "LL2RAM";
    84
    85        /*
    86         *  ======== l1PMode ========
    87         *  Define the amount of L1P RAM used for L1 Program Cache.
    88         *
    89         *  Check the device documentation for valid values.
    90         */
    91        config String l1PMode = "32k";
    92
    93        /*
    94         *  ======== l1DMode ========
    95         *  Define the amount of L1D RAM used for L1 Data Cache.
    96         *
    97         *  Check the device documentation for valid values.
    98         */
    99        config String l1DMode = "32k";
   100
   101        /*
   102         *  ======== l2Mode ========
   103         *  Define the amount of L2 RAM used for L2 Cache.
   104         *
   105         *  Check the device documentation for valid values.
   106         */
   107        config String l2Mode = "0k";
   108    };


package ti.platforms.evm6474

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6474 ========
    43     *  Platform package for the evm6474 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evm6474 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evm6474.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evm6474 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evm6474.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6474
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evm6474",
    60            boardFamily:    "evm6474",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      1044,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320C6474",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x08000000}],
    77            ];
    78
    79        override config string codeMemory = "DDR2";
    80
    81        override config string dataMemory = "DDR2";
    82
    83        override config string stackMemory = "DDR2";
    84
    85        /*
    86         *  ======== l1PMode ========
    87         *  Define the amount of L1P RAM used for L1 Program Cache.
    88         *
    89         *  Check the device documentation for valid values.
    90         */
    91        config String l1PMode = "32k";
    92
    93        /*
    94         *  ======== l1DMode ========
    95         *  Define the amount of L1D RAM used for L1 Data Cache.
    96         *
    97         *  Check the device documentation for valid values.
    98         */
    99        config String l1DMode = "32k";
   100
   101        /*
   102         *  ======== l2Mode ========
   103         *  Define the amount of L2 RAM used for L2 Cache.
   104         *
   105         *  Check the device documentation for valid values.
   106         */
   107        config String l2Mode = "0k";
   108    };


package ti.platforms.evm6614

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6614 ========
    43     *  Platform package for the 6614 EVM.
    44     */
    45    package ti.platforms.evm6614 [1,0,0,0] {
    46        module Platform;
    47    }


module ti.platforms.evm6614.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6614 Appleton
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "evm6614",
    47            boardFamily:    "evm6614",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1000,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320TCI6614",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        override readonly config xdc.platform.IPlatform.Memory
    62            externalMemoryMap[string] = [
    63                ["DDR3", {name: "DDR3", base: 0xA0000000, len: 0x20000000}],
    64        ];
    65
    66        override config string codeMemory  = "L2SRAM";
    67        override config string dataMemory  = "L2SRAM";
    68        override config string stackMemory = "L2SRAM";
    69
    70        /*
    71         *  ======== l1PMode ========
    72         *  Define the amount of L1P RAM used for L1 Program Cache.
    73         *
    74         *  Check the device documentation for valid values.
    75         */
    76        config String l1PMode = "32k";
    77
    78        /*
    79         *  ======== l1DMode ========
    80         *  Define the amount of L1D RAM used for L1 Data Cache.
    81         *
    82         *  Check the device documentation for valid values.
    83         */
    84        config String l1DMode = "32k";
    85
    86        /*
    87         *  ======== l2Mode ========
    88         *  Define the amount of L2 RAM used for L2 Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l2Mode = "0k";
    93    };


package ti.platforms.evm6657

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6657 ========
    43     *  Platform package for the 6657 EVM.
    44     *
    45     *  @a(Throws)
    46     *  `XDCException` exceptions are thrown for fatal errors. The following error
    47     *  codes are reported in the exception message:
    48     *  @p(dlist)
    49     *      -  `ti.platfoms.evm6657.LINK_TEMPLATE_ERROR`
    50     *           This error is raised when this platform cannot found the default
    51     *           linker command template `linkcmd.xdt` in the build target's
    52     *           package. When a target does not contain this file, the config
    53     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    54     *  @p
    55     */
    56    package ti.platforms.evm6657 [1,0,0,0] {
    57        module Platform;
    58    }


module ti.platforms.evm6657.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6657
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "evm6657",
    47            boardFamily:    "evm6657",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1000,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320C6657",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        override readonly config xdc.platform.IPlatform.Memory
    62            externalMemoryMap[string] = [
    63                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x20000000}],
    64        ];
    65
    66        override config string codeMemory  = "L2SRAM";
    67        override config string dataMemory  = "L2SRAM";
    68        override config string stackMemory = "L2SRAM";
    69
    70        /*
    71         *  ======== l1PMode ========
    72         *  Define the amount of L1P RAM used for L1 Program Cache.
    73         *
    74         *  Check the device documentation for valid values.
    75         */
    76        config String l1PMode = "32k";
    77
    78        /*
    79         *  ======== l1DMode ========
    80         *  Define the amount of L1D RAM used for L1 Data Cache.
    81         *
    82         *  Check the device documentation for valid values.
    83         */
    84        config String l1DMode = "32k";
    85
    86        /*
    87         *  ======== l2Mode ========
    88         *  Define the amount of L2 RAM used for L2 Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l2Mode = "0k";
    93    };


package ti.platforms.evm6670

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6670 ========
    43     *  Platform package for the 6670 EVM.
    44     *
    45     *  @a(Throws)
    46     *  `XDCException` exceptions are thrown for fatal errors. The following error
    47     *  codes are reported in the exception message:
    48     *  @p(dlist)
    49     *      -  `ti.platfoms.evm6670.LINK_TEMPLATE_ERROR`
    50     *           This error is raised when this platform cannot found the default
    51     *           linker command template `linkcmd.xdt` in the build target's
    52     *           package. When a target does not contain this file, the config
    53     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    54     *  @p
    55     */
    56    package ti.platforms.evm6670 [1,0,0,0] {
    57        module Platform;
    58    }


module ti.platforms.evm6670.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6670
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "evm6670",
    47            boardFamily:    "evm6670",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1000,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320C6670",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        override readonly config xdc.platform.IPlatform.Memory
    62            externalMemoryMap[string] = [
    63                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x20000000}],
    64        ];
    65
    66        override config string codeMemory  = "L2SRAM";
    67        override config string dataMemory  = "L2SRAM";
    68        override config string stackMemory = "L2SRAM";
    69
    70        /*
    71         *  ======== l1PMode ========
    72         *  Define the amount of L1P RAM used for L1 Program Cache.
    73         *
    74         *  Check the device documentation for valid values.
    75         */
    76        config String l1PMode = "32k";
    77
    78        /*
    79         *  ======== l1DMode ========
    80         *  Define the amount of L1D RAM used for L1 Data Cache.
    81         *
    82         *  Check the device documentation for valid values.
    83         */
    84        config String l1DMode = "32k";
    85
    86        /*
    87         *  ======== l2Mode ========
    88         *  Define the amount of L2 RAM used for L2 Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l2Mode = "0k";
    93    };


package ti.platforms.evm6678

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evm6678 ========
    43     *  Platform package for the 6678 EVM.
    44     *
    45     *  @a(Throws)
    46     *  `XDCException` exceptions are thrown for fatal errors. The following error
    47     *  codes are reported in the exception message:
    48     *  @p(dlist)
    49     *      -  `ti.platfoms.evm6678.LINK_TEMPLATE_ERROR`
    50     *           This error is raised when this platform cannot found the default
    51     *           linker command template `linkcmd.xdt` in the build target's
    52     *           package. When a target does not contain this file, the config
    53     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    54     *  @p
    55     */
    56    package ti.platforms.evm6678 [1,0,0,0] {
    57        module Platform;
    58    }


module ti.platforms.evm6678.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evm6678
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "evm6678",
    47            boardFamily:    "evm6678",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1000,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320C6678",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        override readonly config xdc.platform.IPlatform.Memory
    62            externalMemoryMap[string] = [
    63                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x20000000}],
    64        ];
    65
    66        override config string codeMemory  = "L2SRAM";
    67        override config string dataMemory  = "L2SRAM";
    68        override config string stackMemory = "L2SRAM";
    69
    70        /*
    71         *  ======== l1PMode ========
    72         *  Define the amount of L1P RAM used for L1 Program Cache.
    73         *
    74         *  Check the device documentation for valid values.
    75         */
    76        config String l1PMode = "32k";
    77
    78        /*
    79         *  ======== l1DMode ========
    80         *  Define the amount of L1D RAM used for L1 Data Cache.
    81         *
    82         *  Check the device documentation for valid values.
    83         */
    84        config String l1DMode = "32k";
    85
    86        /*
    87         *  ======== l2Mode ========
    88         *  Define the amount of L2 RAM used for L2 Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l2Mode = "0k";
    93    };


package ti.platforms.evm6747

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.evm6747 ========
    38     *  Platform package for the evm6747 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the evm6747 platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.evm6747.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.evm6747 [1,0,0] {
    55        module Platform;
    56    }


module ti.platforms.evm6747.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.evm6747;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for the evm6747
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evm6747",
    61            boardFamily:    "evm6747",
    62            boardRevision:  null,
    63        };
    64
    65        readonly config xdc.platform.IExeContext.Cpu CPU = {
    66            id:             "0",
    67            clockRate:      300.0,
    68            catalogName:    "ti.catalog.c6000",
    69            deviceName:     "TMS320C6747",
    70            revision:       "",
    71        };
    72
    73    instance:
    74
    75        override readonly config xdc.platform.IPlatform.Memory
    76            externalMemoryMap[string] = [
    77                ["SDRAM",  {name: "SDRAM",  base: 0xC0000000, len: 0x04000000}],
    78            ];
    79
    80        /*
    81         *  ======== sectMap ========
    82         *  Define a placement of compiler generated output sections into
    83         *  memory regions defined in the memTab above.
    84         */
    85        override config string codeMemory = "SDRAM";
    86
    87        override config string dataMemory = "SDRAM";
    88
    89        override config string stackMemory = "SDRAM";
    90
    91        /*
    92         *  ======== l1PMode ========
    93         *  Define the amount of L1P RAM used for L1 Program Cache.
    94         *
    95         *  Check the device documentation for valid values.
    96         */
    97        config String l1PMode = "32k";
    98
    99        /*
   100         *  ======== l1DMode ========
   101         *  Define the amount of L1D RAM used for L1 Data Cache.
   102         *
   103         *  Check the device documentation for valid values.
   104         */
   105        config String l1DMode = "32k";
   106
   107        /*
   108         *  ======== l2Mode ========
   109         *  Define the amount of L2 RAM used for L2 Cache.
   110         *
   111         *  Check the device documentation for valid values.
   112         */
   113        config String l2Mode = "0k";
   114    };


package ti.platforms.evm6748

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.evm6748 ========
    38     *  Platform package for the evm6748 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the evm6748 platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.evm6748.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.evm6748 [1,0,0] {
    55        module Platform;
    56    }


module ti.platforms.evm6748.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.evm6748;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for the evm6748
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evm6748",
    61            boardFamily:    "evm6748",
    62            boardRevision:  null,
    63        };
    64
    65        readonly config xdc.platform.IExeContext.Cpu CPU = {
    66            id:             "0",
    67            clockRate:      300.0,
    68            catalogName:    "ti.catalog.c6000",
    69            deviceName:     "TMS320C6748",
    70            revision:       "",
    71        };
    72
    73    instance:
    74
    75        override readonly config xdc.platform.IPlatform.Memory
    76            externalMemoryMap[string] = [
    77                ["DDR",  {name: "DDR",  base: 0xC0000000, len: 0x08000000}],
    78            ];
    79
    80        /*
    81         *  ======== sectMap ========
    82         *  Define a placement of compiler generated output sections into
    83         *  memory regions defined in the memTab above.
    84         */
    85        override config string codeMemory = "DDR";
    86
    87        override config string dataMemory = "DDR";
    88
    89        override config string stackMemory = "DDR";
    90
    91        /*
    92         *  ======== l1PMode ========
    93         *  Define the amount of L1P RAM used for L1 Program Cache.
    94         *
    95         *  Check the device documentation for valid values.
    96         */
    97        config String l1PMode = "32k";
    98
    99        /*
   100         *  ======== l1DMode ========
   101         *  Define the amount of L1D RAM used for L1 Data Cache.
   102         *
   103         *  Check the device documentation for valid values.
   104         */
   105        config String l1DMode = "32k";
   106
   107        /*
   108         *  ======== l2Mode ========
   109         *  Define the amount of L2 RAM used for L2 Cache.
   110         *
   111         *  Check the device documentation for valid values.
   112         */
   113        config String l2Mode = "0k";
   114
   115    };


package ti.platforms.evmAM3359

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmAM3359 ========
    44     *  Platform package for the evmAM3359 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmAM3359 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmAM3359.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmAM3359 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmAM3359.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmAM3359
    36     */
    37
    38    package ti.platforms.evmAM3359;
    39
    40    /*!
    41     *  ======== Platform ========
    42     *  Platform support for the evmAM3359
    43     *
    44     *  This module implements xdc.platform.IPlatform and defines configuration
    45     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    46     *
    47     *  The configuration parameters are initialized in this package's
    48     *  configuration script (package.cfg) and "bound" to the TCOM object
    49     *  model.  Once they are part of the model, these parameters are
    50     *  queried by a program's configuration script.
    51     *
    52     */
    53    metaonly module Platform inherits xdc.platform.IPlatform
    54    {
    55        readonly config xdc.platform.IPlatform.Board BOARD = {
    56            id:             "0",
    57            boardName:      "evmAM3359",
    58            boardFamily:    "evmAM3359",
    59            boardRevision:  null
    60        };
    61
    62        /* GPP */
    63        readonly config xdc.platform.IExeContext.Cpu GPP = {
    64            id:             "2",
    65            clockRate:      550.0,  /* Typically set by the HLOS */
    66            catalogName:    "ti.catalog.arm.cortexa8",
    67            deviceName:     "AM3359",
    68            revision:       "1.0"
    69        };
    70
    71    instance:
    72
    73        override readonly config xdc.platform.IPlatform.Memory
    74            externalMemoryMap[string] = [
    75                ["DDR3", {
    76                    comment: "DDR3 Memory",
    77                    name: "DDR3",
    78                    base: 0x80000000,
    79                    len:  0x20000000    /* 512 MB */
    80                }],
    81            ];
    82    };


package ti.platforms.evmAM3505

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmAM3505 ========
    44     *  Platform package for the evmAM3505 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmAM3505 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmAM3505.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmAM3505 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmAM3505.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmAM3505
    36     *
    37     */
    38
    39    package ti.platforms.evmAM3505;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmAM3505
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "evmAM3505",
    59            boardFamily:    "evmAM3505",
    60            boardRevision:  null
    61        };
    62
    63        /* GPP */
    64        readonly config xdc.platform.IExeContext.Cpu GPP = {
    65            id:             "2",
    66            clockRate:      600.0,  /* Typically set by the HLOS */
    67            catalogName:    "ti.catalog.arm.cortexa8",
    68            deviceName:     "AM3505",
    69            revision:       "1.0"
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR3", {
    77                    comment: "DDR3 Memory",
    78                    name: "DDR3",
    79                    base: 0x80000000,
    80                    len:  0x04000000    /* 64 MB */
    81                }],
    82            ];
    83    };


package ti.platforms.evmAM3517

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmAM3517 ========
    44     *  Platform package for the evmAM3517 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmAM3517 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmAM3517.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmAM3517 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmAM3517.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmAM3517
    36     *
    37     */
    38
    39    package ti.platforms.evmAM3517;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmAM3517
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "evmAM3517",
    59            boardFamily:    "evmAM3517",
    60            boardRevision:  null
    61        };
    62
    63        /* GPP */
    64        readonly config xdc.platform.IExeContext.Cpu GPP = {
    65            id:             "2",
    66            clockRate:      600.0,  /* Typically set by the HLOS */
    67            catalogName:    "ti.catalog.arm.cortexa8",
    68            deviceName:     "AM3517",
    69            revision:       "1.0"
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR3", {
    77                    comment: "DDR3 Memory",
    78                    name: "DDR3",
    79                    base: 0x80000000,
    80                    len:  0x04000000    /* 64 MB */
    81                }],
    82            ];
    83    };


package ti.platforms.evmAM437X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.arm.cortexa9;
    38    requires xdc.platform [1,0,1];
    39
    40    /*!
    41     *  ======== ti.platforms.evmAM437X ========
    42     *  Platform package for the evmAM437X platform.
    43     *
    44     *  This package implements the interfaces (xdc.platform.IPlatform)
    45     *  necessary to build and run executables on the evmAM437X platform.
    46     *
    47     *  @a(Throws)
    48     *  `XDCException` exceptions are thrown for fatal errors. The following error
    49     *  codes are reported in the exception message:
    50     *  @p(dlist)
    51     *      -  `ti.platfoms.evmAM437X.LINK_TEMPLATE_ERROR`
    52     *           This error is raised when this platform cannot found the default
    53     *           linker command template `linkcmd.xdt` in the build target's
    54     *           package. When a target does not contain this file, the config
    55     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    56     *  @p
    57     */
    58    package ti.platforms.evmAM437X [1,0,0] {
    59        module Platform;
    60    }


module ti.platforms.evmAM437X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmAM437X
    36     *
    37     */
    38
    39    package ti.platforms.evmAM437X;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmAM437X
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "evmAM437X",
    59            boardFamily:    "evmAM437X",
    60            boardRevision:  null
    61        };
    62
    63        /* GPP */
    64        readonly config xdc.platform.IExeContext.Cpu GPP = {
    65            id:             "1",
    66            clockRate:      600.0,  /* Typically set by the HLOS */
    67            catalogName:    "ti.catalog.arm.cortexa9",
    68            deviceName:     "AM437X",
    69            revision:       "1.0"
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["EXT_RAM", {
    77                    comment: "External RAM",
    78                    name: "EXT_RAM",
    79                    base: 0x80000000,
    80                    len:  0x08000000    /* 128 MB */
    81                }],
    82            ];
    83
    84        override config string codeMemory  = "EXT_RAM";
    85        override config string dataMemory  = "EXT_RAM";
    86        override config string stackMemory = "EXT_RAM";
    87    };


package ti.platforms.evmAM571X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm4;
    39    requires ti.catalog.arm.cortexa15;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmAM571X ========
    44     *  Platform package for the AM571X SDP.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the AM571X SDP platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platforms.evmAM571X.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmAM571X [1,0,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmAM571X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for AM571X
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for AM571X
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has 1 Cortex-A15, 2 Benelli/IPU
    51     *  Sub-system (Dual M4's) and 1 C66x DSP's.
    52     */
    53    metaonly module Platform inherits xdc.platform.IPlatform
    54    {
    55        readonly config xdc.platform.IPlatform.Board BOARD = {
    56            id:             "0",
    57            boardName:      "evmAM571X",
    58            boardFamily:    "evmAM571X",
    59            boardRevision:  null,
    60        };
    61
    62        readonly config xdc.platform.IExeContext.Cpu DSP = {
    63            id:             "0",
    64            clockRate:      700,
    65            catalogName:    "ti.catalog.c6000",
    66            deviceName:     "DRA7XX",
    67            revision:       "1.0",
    68        };
    69
    70        /* Benelli M4 Subsystem */
    71        readonly config xdc.platform.IExeContext.Cpu M4 = {
    72            id:             "1",
    73            clockRate:      212.8,
    74            catalogName:    "ti.catalog.arm.cortexm4",
    75            deviceName:     "DRA7XX",
    76            revision:       "1.0",
    77        };
    78
    79        /* GPP */
    80        readonly config xdc.platform.IExeContext.Cpu GPP = {
    81            id:             "3",
    82            clockRate:      1500.0,  /* Typically set by the HLOS */
    83            catalogName:    "ti.catalog.arm.cortexa15",
    84            deviceName:     "DRA7XX",
    85            revision:       "1.0"
    86        };
    87
    88    /*  Memory Map for ti.platforms.evmAM571X
    89     *
    90     *  Virtual     Physical        Size            Comment
    91     *  ------------------------------------------------------------------------
    92     *              8000_0000  1000_0000  ( 256 MB) External Memory
    93     *
    94     *  0000_0000 0 8000_0000        100  ( 256  B) --------
    95     *              8000_0100       FF00  ( ~64 KB) --------
    96     *  0000_0000   8001_0000        100  ( 256  B) --------
    97     *              8001_0100       FF00  ( ~64 KB) --------
    98     *  0000_0000   8002_0000        100  ( 256  B) --------
    99     *              8002_0100       FF00  ( ~64 KB) --------
   100     *  0000_0000   8003_0000        100  ( 256  B) --------
   101     *              8003_0100    FE_FF00  ( ~16 MB) --------
   102     *            1 8100_0000    40_0000  (   4 MB) --------
   103     *              8140_0000    C0_0000  (  12 MB) --------
   104     *            2 8200_0000    40_0000  (   4 MB) --------
   105     *              8240_0000    C0_0000  (  12 MB) --------
   106     *            3 8300_0000    40_0000  (   4 MB) --------
   107     *              8340_0000    C0_0000  (  12 MB) --------
   108     *            4 8400_0000    40_0000  (   4 MB) --------
   109     *              8440_0000    C0_0000  (  12 MB) --------
   110     *            5 8500_0000   100_0000  (  16 MB) --------
   111     *            6 8600_0000   100_0000  (  16 MB) --------
   112     *            7 8700_0000   100_0000  (  16 MB) --------
   113     *            8 8800_0000   100_0000  (  16 MB) --------
   114     *            9 8900_0000   100_0000  (  16 MB) --------
   115     *            A 8A00_0000    80_0000  (   8 MB) IPU1 (code, data), benelli
   116     *              8A80_0000    80_0000  (   8 MB) IPU2 (code, data), benelli
   117     *            B 8B00_0000   100_0000  (  16 MB) HOST (code, data)
   118     *            C 8C00_0000   100_0000  (  16 MB) DSP1 (code, data)
   119     *            D 8D00_0000   100_0000  (  16 MB) --------
   120     *            E 8E00_0000   100_0000  (  16 MB) SR_0 (ipc)
   121     *            F 8F00_0000   100_0000  (  16 MB) --------
   122     */
   123
   124        readonly config Any SR_0 = {
   125            name: "SR_0", space: "data", access: "RWX",
   126            base: 0x8E000000, len: 0x1000000,
   127            comment: "SR#0 Memory (16 MB)"
   128        };
   129
   130        readonly config Any DSP1 = {
   131            externalMemoryMap: [
   132                [ "DSP1_PROG", {
   133                    name: "DSP1_PROG", space: "code/data", access: "RWX",
   134                    base: 0x8C000000, len: 0x1000000,
   135                    comment: "DSP1 Program Memory (16 MB)"
   136                }],
   137                [ "SR_0", SR_0 ]
   138            ],
   139            codeMemory:  "DSP1_PROG",
   140            dataMemory:  "DSP1_PROG",
   141            stackMemory: "DSP1_PROG",
   142            l1DMode: "32k",
   143            l1PMode: "32k",
   144            l2Mode: "128k"
   145        };
   146
   147        readonly config Any IPU1 = {
   148            externalMemoryMap: [
   149                [ "IPU1_PROG", {
   150                    name: "IPU1_PROG", space: "code/data", access: "RWX",
   151                    base: 0x8A000000, len: 0x800000,
   152                    comment: "IPU1 Program Memory (8 MB)"
   153                }],
   154                [ "SR_0", SR_0 ]
   155            ],
   156            codeMemory:  "IPU1_PROG",
   157            dataMemory:  "IPU1_PROG",
   158            stackMemory: "IPU1_PROG"
   159        };
   160
   161        readonly config Any IPU2 = {
   162            externalMemoryMap: [
   163                [ "IPU2_PROG", {
   164                    name: "IPU2_PROG", space: "code/data", access: "RWX",
   165                    base: 0x8A800000, len: 0x800000,
   166                    comment: "IPU2 Program Memory (8 MB)"
   167                }],
   168                [ "SR_0", SR_0 ]
   169            ],
   170            codeMemory:  "IPU2_PROG",
   171            dataMemory:  "IPU2_PROG",
   172            stackMemory: "IPU2_PROG"
   173        };
   174
   175        readonly config Any HOST = {
   176            externalMemoryMap: [
   177                [ "HOST_PROG", {
   178                    name: "HOST_PROG", space: "code/data", access: "RWX",
   179                    base: 0x8B000000, len: 0x1000000,
   180                    comment: "HOST Program Memory (16 MB)"
   181                }],
   182                [ "SR_0", SR_0 ]
   183            ],
   184            codeMemory:  "HOST_PROG",
   185            dataMemory:  "HOST_PROG",
   186            stackMemory: "HOST_PROG"
   187        };
   188
   189    instance:
   190
   191        /*!
   192         *  ======== externalMemoryMap ========
   193         *  Memory regions as defined in the AM571X Specification
   194         */
   195        override readonly config xdc.platform.IPlatform.Memory
   196            externalMemoryMap[string] = [
   197                ["EXT_RAM", {
   198                    comment: "2 GB External RAM Memory",
   199                    name: "EXT_RAM",
   200                    base: 0x80000000,
   201                    len:  0x80000000
   202                }]
   203            ];
   204
   205        /*
   206         *  ======== l1PMode ========
   207         *  Define the amount of L1P RAM used for L1 Program Cache.
   208         *
   209         *  Check the device documentation for valid values.
   210         */
   211        config String l1PMode = "32k";
   212
   213        /*
   214         *  ======== l1DMode ========
   215         *  Define the amount of L1D RAM used for L1 Data Cache.
   216         *
   217         *  Check the device documentation for valid values.
   218         */
   219        config String l1DMode = "32k";
   220
   221        /*
   222         *  ======== l2Mode ========
   223         *  Define the amount of L2 RAM used for L2 Cache.
   224         *
   225         *  Check the device documentation for valid values.
   226         */
   227        config String l2Mode = "0k";
   228    };


package ti.platforms.evmAM572X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm4;
    39    requires ti.catalog.arm.cortexa15;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmAM572X ========
    44     *  Platform package for the AM572X SDP.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the AM572X SDP platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platforms.evmAM572X.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmAM572X [1,0,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmAM572X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for AM572X
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for AM572X
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has 1 Cortex-A15, 2 Benelli/IPU
    51     *  Sub-system (Dual M4's) and 2 C66x DSP's.
    52     */
    53    metaonly module Platform inherits xdc.platform.IPlatform
    54    {
    55        readonly config xdc.platform.IPlatform.Board BOARD = {
    56            id:             "0",
    57            boardName:      "evmAM572X",
    58            boardFamily:    "evmAM572X",
    59            boardRevision:  null,
    60        };
    61
    62        readonly config xdc.platform.IExeContext.Cpu DSP = {
    63            id:             "0",
    64            clockRate:      700,
    65            catalogName:    "ti.catalog.c6000",
    66            deviceName:     "DRA7XX",
    67            revision:       "1.0",
    68        };
    69
    70        /* Benelli M4 Subsystem */
    71        readonly config xdc.platform.IExeContext.Cpu M4 = {
    72            id:             "1",
    73            clockRate:      212.8,
    74            catalogName:    "ti.catalog.arm.cortexm4",
    75            deviceName:     "DRA7XX",
    76            revision:       "1.0",
    77        };
    78
    79        /* GPP */
    80        readonly config xdc.platform.IExeContext.Cpu GPP = {
    81            id:             "3",
    82            clockRate:      1500.0,  /* Typically set by the HLOS */
    83            catalogName:    "ti.catalog.arm.cortexa15",
    84            deviceName:     "DRA7XX",
    85            revision:       "1.0"
    86        };
    87
    88    /*  Memory Map for ti.platforms.evmAM572X
    89     *
    90     *  Virtual     Physical        Size            Comment
    91     *  ------------------------------------------------------------------------
    92     *              8000_0000  1000_0000  ( 256 MB) External Memory
    93     *
    94     *  0000_0000 0 8000_0000        100  ( 256  B) --------
    95     *              8000_0100       FF00  ( ~64 KB) --------
    96     *  0000_0000   8001_0000        100  ( 256  B) --------
    97     *              8001_0100       FF00  ( ~64 KB) --------
    98     *  0000_0000   8002_0000        100  ( 256  B) --------
    99     *              8002_0100       FF00  ( ~64 KB) --------
   100     *  0000_0000   8003_0000        100  ( 256  B) --------
   101     *              8003_0100    FE_FF00  ( ~16 MB) --------
   102     *            1 8100_0000    40_0000  (   4 MB) --------
   103     *              8140_0000    C0_0000  (  12 MB) --------
   104     *            2 8200_0000    40_0000  (   4 MB) --------
   105     *              8240_0000    C0_0000  (  12 MB) --------
   106     *            3 8300_0000    40_0000  (   4 MB) --------
   107     *              8340_0000    C0_0000  (  12 MB) --------
   108     *            4 8400_0000    40_0000  (   4 MB) --------
   109     *              8440_0000    C0_0000  (  12 MB) --------
   110     *            5 8500_0000   100_0000  (  16 MB) --------
   111     *            6 8600_0000   100_0000  (  16 MB) --------
   112     *            7 8700_0000   100_0000  (  16 MB) --------
   113     *            8 8800_0000   100_0000  (  16 MB) --------
   114     *            9 8900_0000   100_0000  (  16 MB) --------
   115     *            A 8A00_0000    80_0000  (   8 MB) IPU1 (code, data), benelli
   116     *              8A80_0000    80_0000  (   8 MB) IPU2 (code, data), benelli
   117     *            B 8B00_0000   100_0000  (  16 MB) HOST (code, data)
   118     *            C 8C00_0000   100_0000  (  16 MB) DSP1 (code, data)
   119     *            D 8D00_0000   100_0000  (  16 MB) DSP2 (code, data)
   120     *            E 8E00_0000   100_0000  (  16 MB) SR_0 (ipc)
   121     *            F 8F00_0000   100_0000  (  16 MB) --------
   122     */
   123
   124        readonly config Any SR_0 = {
   125            name: "SR_0", space: "data", access: "RWX",
   126            base: 0x8E000000, len: 0x1000000,
   127            comment: "SR#0 Memory (16 MB)"
   128        };
   129
   130        readonly config Any DSP1 = {
   131            externalMemoryMap: [
   132                [ "DSP1_PROG", {
   133                    name: "DSP1_PROG", space: "code/data", access: "RWX",
   134                    base: 0x8C000000, len: 0x1000000,
   135                    comment: "DSP1 Program Memory (16 MB)"
   136                }],
   137                [ "SR_0", SR_0 ]
   138            ],
   139            codeMemory:  "DSP1_PROG",
   140            dataMemory:  "DSP1_PROG",
   141            stackMemory: "DSP1_PROG",
   142            l1DMode: "32k",
   143            l1PMode: "32k",
   144            l2Mode: "128k"
   145        };
   146
   147        readonly config Any DSP2 = {
   148            externalMemoryMap: [
   149                [ "DSP2_PROG", {
   150                    name: "DSP2_PROG", space: "code/data", access: "RWX",
   151                    base: 0x8D000000, len: 0x1000000,
   152                    comment: "DSP2 Program Memory (16 MB)"
   153                }],
   154                [ "SR_0", SR_0 ]
   155            ],
   156            codeMemory:  "DSP2_PROG",
   157            dataMemory:  "DSP2_PROG",
   158            stackMemory: "DSP2_PROG",
   159            l1DMode: "32k",
   160            l1PMode: "32k",
   161            l2Mode: "128k"
   162        };
   163
   164        readonly config Any IPU1 = {
   165            externalMemoryMap: [
   166                [ "IPU1_PROG", {
   167                    name: "IPU1_PROG", space: "code/data", access: "RWX",
   168                    base: 0x8A000000, len: 0x800000,
   169                    comment: "IPU1 Program Memory (8 MB)"
   170                }],
   171                [ "SR_0", SR_0 ]
   172            ],
   173            codeMemory:  "IPU1_PROG",
   174            dataMemory:  "IPU1_PROG",
   175            stackMemory: "IPU1_PROG"
   176        };
   177
   178        readonly config Any IPU2 = {
   179            externalMemoryMap: [
   180                [ "IPU2_PROG", {
   181                    name: "IPU2_PROG", space: "code/data", access: "RWX",
   182                    base: 0x8A800000, len: 0x800000,
   183                    comment: "IPU2 Program Memory (8 MB)"
   184                }],
   185                [ "SR_0", SR_0 ]
   186            ],
   187            codeMemory:  "IPU2_PROG",
   188            dataMemory:  "IPU2_PROG",
   189            stackMemory: "IPU2_PROG"
   190        };
   191
   192        readonly config Any HOST = {
   193            externalMemoryMap: [
   194                [ "HOST_PROG", {
   195                    name: "HOST_PROG", space: "code/data", access: "RWX",
   196                    base: 0x8B000000, len: 0x1000000,
   197                    comment: "HOST Program Memory (16 MB)"
   198                }],
   199                [ "SR_0", SR_0 ]
   200            ],
   201            codeMemory:  "HOST_PROG",
   202            dataMemory:  "HOST_PROG",
   203            stackMemory: "HOST_PROG"
   204        };
   205
   206    instance:
   207
   208        /*!
   209         *  ======== externalMemoryMap ========
   210         *  Memory regions as defined in the AM572X Specification
   211         */
   212        override readonly config xdc.platform.IPlatform.Memory
   213            externalMemoryMap[string] = [
   214                ["EXT_RAM", {
   215                    comment: "2 GB External RAM Memory",
   216                    name: "EXT_RAM",
   217                    base: 0x80000000,
   218                    len:  0x80000000
   219                }]
   220            ];
   221
   222        /*
   223         *  ======== l1PMode ========
   224         *  Define the amount of L1P RAM used for L1 Program Cache.
   225         *
   226         *  Check the device documentation for valid values.
   227         */
   228        config String l1PMode = "32k";
   229
   230        /*
   231         *  ======== l1DMode ========
   232         *  Define the amount of L1D RAM used for L1 Data Cache.
   233         *
   234         *  Check the device documentation for valid values.
   235         */
   236        config String l1DMode = "32k";
   237
   238        /*
   239         *  ======== l2Mode ========
   240         *  Define the amount of L2 RAM used for L2 Cache.
   241         *
   242         *  Check the device documentation for valid values.
   243         */
   244        config String l2Mode = "0k";
   245    };


package ti.platforms.evmC66AK2E

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmC66AK2E ========
    43     *  Platform package for the 66AK2E evm.
    44     *
    45     *  @a(Throws)
    46     *  `XDCException` exceptions are thrown for fatal errors. The following error
    47     *  codes are reported in the exception message:
    48     *  @p(dlist)
    49     *      -  `ti.platfoms.evmC66AK2E.LINK_TEMPLATE_ERROR`
    50     *           This error is raised when this platform cannot found the default
    51     *           linker command template `linkcmd.xdt` in the build target's
    52     *           package. When a target does not contain this file, the config
    53     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    54     *  @p
    55     */
    56    package ti.platforms.evmC66AK2E [1,0,0,0] {
    57        module Platform;
    58    }


module ti.platforms.evmC66AK2E.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmTCI6630K2L
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "evmC66AK2E",
    47            boardFamily:    "evmC66AK2E",
    48            boardRevision:  null,
    49        };
    50
    51        /* DSP */
    52        readonly config xdc.platform.IExeContext.Cpu CPU = {
    53            id:             "0",
    54            clockRate:      1400,
    55            catalogName:    "ti.catalog.c6000",
    56            deviceName:     "TMS320C66AK2E05",
    57            revision:       "1.0",
    58        };
    59
    60        /* GPP */
    61        readonly config xdc.platform.IExeContext.Cpu GPP = {
    62            id:             "1",
    63            clockRate:      125.0,  /* Typically set by the HLOS */
    64            catalogName:    "ti.catalog.arm.cortexa15",
    65            deviceName:     "C66AK2E05",
    66            revision:       "1.0"
    67        };
    68
    69    instance:
    70
    71        override readonly config xdc.platform.IPlatform.Memory
    72            externalMemoryMap[string] = [
    73                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x80000000}],
    74        ];
    75
    76        /*
    77         *  ======== l1PMode ========
    78         *  Define the amount of L1P RAM used for L1 Program Cache.
    79         *
    80         *  Check the device documentation for valid values.
    81         */
    82        config String l1PMode = "32k";
    83
    84        /*
    85         *  ======== l1DMode ========
    86         *  Define the amount of L1D RAM used for L1 Data Cache.
    87         *
    88         *  Check the device documentation for valid values.
    89         */
    90        config String l1DMode = "32k";
    91
    92        /*
    93         *  ======== l2Mode ========
    94         *  Define the amount of L2 RAM used for L2 Cache.
    95         *
    96         *  Check the device documentation for valid values.
    97         */
    98        config String l2Mode = "0k";
    99
   100    };


package ti.platforms.evmC6A8149

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires ti.catalog.arp32;
    41    requires xdc.platform [1,0,1];
    42
    43    /*!
    44     *  ======== ti.platforms.evmC6A8149 ========
    45     *  Platform package for the evmC6A8149 platform.
    46     *
    47     *  This package implements the interfaces (xdc.platform.IPlatform)
    48     *  necessary to build and run executables on the evmC6A8149 platform.
    49     *
    50     *  @a(Throws)
    51     *  `XDCException` exceptions are thrown for fatal errors. The following error
    52     *  codes are reported in the exception message:
    53     *  @p(dlist)
    54     *      -  `ti.platfoms.evmC6A8149.LINK_TEMPLATE_ERROR`
    55     *           This error is raised when this platform cannot found the default
    56     *           linker command template `linkcmd.xdt` in the build target's
    57     *           package. When a target does not contain this file, the config
    58     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    59     *  @p
    60     */
    61    package ti.platforms.evmC6A8149 [1,0,0] {
    62        module Platform;
    63    }


module ti.platforms.evmC6A8149.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmC6A8149
    36     *
    37     */
    38
    39    package ti.platforms.evmC6A8149;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmC6A8149
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    54     *  C674 DSP.
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmC6A8149",
    61            boardFamily:    "evmC6A8149",
    62            boardRevision:  null
    63        };
    64
    65        /* C674 GEM */
    66        readonly config xdc.platform.IExeContext.Cpu GEM = {
    67            id:             "0",
    68            clockRate:      500.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320C6A8149",
    71            revision:       ""
    72        };
    73
    74
    75        /* EVE - ARP32 */
    76        readonly config xdc.platform.IExeContext.Cpu EVE = {
    77            id:             "1",
    78            clockRate:      225.0,
    79            catalogName:    "ti.catalog.arp32",
    80            deviceName:     "TMS320C6A8149",
    81            revision:       ""
    82        };
    83
    84        /* M3 Subsystem */
    85        readonly config xdc.platform.IExeContext.Cpu DSS = {
    86            id:             "2",
    87            clockRate:      200.0,
    88            catalogName:    "ti.catalog.arm.cortexm3",
    89            deviceName:     "TMS320C6A8149",
    90            revision:       "1.0"
    91        };
    92
    93        /* GPP */
    94        readonly config xdc.platform.IExeContext.Cpu GPP = {
    95            id:             "3",
    96            clockRate:      600.0,  /* Typically set by the HLOS */
    97            catalogName:    "ti.catalog.arm.cortexa8",
    98            deviceName:     "TMS320C6A8149",
    99            revision:       "1.0"
   100        };
   101
   102    instance:
   103
   104        override readonly config xdc.platform.IPlatform.Memory
   105            externalMemoryMap[string] = [
   106                ["DDR3_HOST", {
   107                    comment: "DDR3 Memory reserved for use by the A8",
   108                    name: "DDR3_HOST",
   109                    base: 0x80000000,
   110                    len:  0x0B000000    /* 176 MB */
   111                }],
   112                ["DDR3_DSP", {
   113                    comment: "DDR3 Memory reserved for use by the C674",
   114                    name: "DDR3_DSP",
   115                    base: 0x8B000000,
   116                    len:  0x02000000    /* 32 MB */
   117                }],
   118                ["DDR3_SR1", {
   119                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
   120                    name: "DDR3_SR1",
   121                    base: 0x8D000000,
   122                    len:  0x00C00000    /* 12 MB */
   123                }],
   124                ["DDR3_HDVPSS", {
   125                    comment: "DDR3 Memory reserved for use by HDVPSS",
   126                    name: "DDR3_HDVPSS",
   127                    base: 0x8DC00000,
   128                    len:  0x00200000    /* 2 MB */
   129                }],
   130                ["DDR3_V4L2", {
   131                    comment: "DDR3 Memory reserved for use by V4L2",
   132                    name: "DDR3_V4L2",
   133                    base: 0x8DE00000,
   134                    len:  0x00200000    /* 2 MB */
   135                }],
   136                ["DDR3_SR0", {
   137                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
   138                    name: "DDR3_SR0",
   139                    base: 0x8E000000,
   140                    len:  0x01000000    /* 16 MB */
   141                }],
   142                ["DDR3_M3", {
   143                    comment: "DDR3 Memory reserved for use by the M3 core",
   144                    name: "DDR3_M3",
   145                    base: 0x8F000000,
   146                    len:  0x01000000    /* 16 MB */
   147                }],
   148                ["DDR3_EVEVECS", {
   149                    comment: "DDR3 Memory reserved for use by the EVE int vectors",
   150                    name: "DDR3_EVEVECS",
   151                    base: 0x90000000,
   152                    len:  0x00000100    /* 256 Bytes */
   153                }],
   154                ["DDR3_EVE", {
   155                    comment: "DDR3 Memory reserved for use by the EVE",
   156                    name: "DDR3_EVE",
   157                    base: 0x90000100,
   158                    len:  0x00FFFF00    /* 16MB - 256 Bytes */
   159                }],
   160            ];
   161
   162        /*
   163         *  ======== l1PMode ========
   164         *  Define the amount of L1P RAM used for L1 Program Cache.
   165         *
   166         *  Check the device documentation for valid values.
   167         */
   168        config String l1PMode = "32k";
   169
   170        /*
   171         *  ======== l1DMode ========
   172         *  Define the amount of L1D RAM used for L1 Data Cache.
   173         *
   174         *  Check the device documentation for valid values.
   175         */
   176        config String l1DMode = "32k";
   177
   178        /*
   179         *  ======== l2Mode ========
   180         *  Define the amount of L2 RAM used for L2 Cache.
   181         *
   182         *  Check the device documentation for valid values.
   183         */
   184        config String l2Mode = "0k";
   185    };


package ti.platforms.evmDA830

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.evmDA830 ========
    38     *  Platform package for the evmDA830 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the evmDA830 platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.evmDA830.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.evmDA830 [1,0,0] {
    55        module Platform;
    56    }


module ti.platforms.evmDA830.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.evmDA830;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for the evmDA830
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmDA830",
    61            boardFamily:    "evmDA830",
    62            boardRevision:  null,
    63        };
    64
    65        readonly config xdc.platform.IExeContext.Cpu DSP = {
    66            id:             "0",
    67            clockRate:      300.0,
    68            catalogName:    "ti.catalog.c6000",
    69            deviceName:     "TMS320DA830",
    70            revision:       "",
    71        };
    72
    73        readonly config xdc.platform.IExeContext.Cpu GPP = {
    74            id:             "1",
    75            clockRate:      300.0,
    76            catalogName:    "ti.catalog.arm",
    77            deviceName:     "TMS320DA830",
    78            revision:       "1.0",
    79        };
    80
    81    instance:
    82
    83        /*
    84         *  SDRAM is 64MByte but we need to share it with Arm.
    85         *  Reserve 32MB for Arm/Linux (base: 0xC000000)
    86         *  16MB for shared Arm/DSP (base: 0xC2000000)
    87         *  16MB for DSP (base: 0xC3000000)
    88         */
    89        override readonly config xdc.platform.IPlatform.Memory
    90            externalMemoryMap[string] = [
    91                ["SDRAM",  {name: "SDRAM",  base: 0xC3000000, len: 0x01000000}],
    92            ];
    93
    94        /*
    95         *  ======== sectMap ========
    96         *  Define a placement of compiler generated output sections into
    97         *  memory regions defined in the memTab above.
    98         */
    99        override config string codeMemory = "SDRAM";
   100
   101        override config string dataMemory = "SDRAM";
   102
   103        override config string stackMemory = "SDRAM";
   104
   105        /*
   106         *  ======== l1PMode ========
   107         *  Define the amount of L1P RAM used for L1 Program Cache.
   108         *
   109         *  Check the device documentation for valid values.
   110         */
   111        config String l1PMode = "32k";
   112
   113        /*
   114         *  ======== l1DMode ========
   115         *  Define the amount of L1D RAM used for L1 Data Cache.
   116         *
   117         *  Check the device documentation for valid values.
   118         */
   119        config String l1DMode = "32k";
   120
   121        /*
   122         *  ======== l2Mode ========
   123         *  Define the amount of L2 RAM used for L2 Cache.
   124         *
   125         *  Check the device documentation for valid values.
   126         */
   127        config String l2Mode = "0k";
   128    };


package ti.platforms.evmDA850

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.evmDA850 ========
    38     *  Platform package for the evmDA850 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the evmDA850 platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.evmDA850.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.evmDA850 [1,0,0] {
    55        module Platform;
    56    }


module ti.platforms.evmDA850.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.evmDA850;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for the evmDA850
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmDA850",
    61            boardFamily:    "evmDA850",
    62            boardRevision:  null,
    63        };
    64
    65        readonly config xdc.platform.IExeContext.Cpu DSP = {
    66            id:             "0",
    67            clockRate:      400.0,
    68            catalogName:    "ti.catalog.c6000",
    69            deviceName:     "TMS320DA850",
    70            revision:       "",
    71        };
    72
    73        readonly config xdc.platform.IExeContext.Cpu GPP = {
    74            id:             "1",
    75            clockRate:      400.0,
    76            catalogName:    "ti.catalog.arm",
    77            deviceName:     "TMS320DA850",
    78            revision:       "1.0",
    79        };
    80
    81    instance:
    82
    83        /*
    84         *  SDRAM is 64MByte but we need to share it with Arm.
    85         *  Reserve 32MB for Arm/Linux (base: 0xC000000)
    86         *  16MB for shared Arm/DSP (base: 0xC2000000)
    87         *  16MB for DSP (base: 0xC3000000)
    88         */
    89        override readonly config xdc.platform.IPlatform.Memory
    90            externalMemoryMap[string] = [
    91                ["SDRAM",  {name: "SDRAM",  base: 0xC3000000, len: 0x01000000}],
    92            ];
    93
    94        /*
    95         *  ======== sectMap ========
    96         *  Define a placement of compiler generated output sections into
    97         *  memory regions defined in the memTab above.
    98         */
    99        override config string codeMemory = "SDRAM";
   100
   101        override config string dataMemory = "SDRAM";
   102
   103        override config string stackMemory = "SDRAM";
   104
   105        /*
   106         *  ======== l1PMode ========
   107         *  Define the amount of L1P RAM used for L1 Program Cache.
   108         *
   109         *  Check the device documentation for valid values.
   110         */
   111        config String l1PMode = "32k";
   112
   113        /*
   114         *  ======== l1DMode ========
   115         *  Define the amount of L1D RAM used for L1 Data Cache.
   116         *
   117         *  Check the device documentation for valid values.
   118         */
   119        config String l1DMode = "32k";
   120
   121        /*
   122         *  ======== l2Mode ========
   123         *  Define the amount of L2 RAM used for L2 Cache.
   124         *
   125         *  Check the device documentation for valid values.
   126         */
   127        config String l2Mode = "0k";
   128
   129    };


package ti.platforms.evmDM355

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.arm;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.evmDM355 ========
    38     *  Platform package for the evmDM355 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform) necessary
    41     *  to build and run executables on the evmDM355 platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.evmDM355.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.evmDM355 [1,0,0] {
    55        module Platform;
    56    }


module ti.platforms.evmDM355.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    /*!
    38     *  ======== Platform ========
    39     *  Platform support for the evmDM355
    40     *
    41     *  This module implements xdc.platform.IPlatform and defines configuration
    42     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    43     *
    44     *  The configuration parameters are initialized in this package's
    45     *  configuration script (package.cfg) and "bound" to the TCOM object
    46     *  model.  Once they are part of the model, these parameters are
    47     *  queried by a program's configuration script.
    48     *
    49     *  This particular platform has a single Cpu, and therefore, only
    50     *  declares a single CPU configuration object.  Multi-CPU platforms
    51     *  would declare multiple Cpu configuration parameters (one per
    52     *  platform CPU).
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        /*!
    57         *  ======== BOARD ========
    58         *  This platform's board attributes
    59         */
    60        readonly config xdc.platform.IPlatform.Board BOARD = {
    61            id:             "0",
    62            boardName:      "evmDM355",
    63            boardFamily:    "evmDM355",
    64            boardRevision:  null
    65        };
    66
    67        readonly config xdc.platform.IExeContext.Cpu CPU = {
    68            id:             "0",
    69            clockRate:      216.0,
    70            catalogName:    "ti.catalog.arm",
    71            deviceName:     "TMS320DM355",
    72            revision:       "",
    73        };
    74
    75    instance:
    76
    77        /*
    78         *  ======== memTab ========
    79         *  Define the evmDM355 memory map
    80         */
    81        override readonly config xdc.platform.IPlatform.MemoryMap
    82            externalMemoryMap = [
    83                ["DDR2",  {name: "DDR2",  base: 0x80000000, len: 0x8000000}],
    84            ];
    85
    86        /*
    87         *  ======== sectMap ========
    88         *  Define a placement of compiler generated output sections into
    89         *  memory regions defined in the memTab above.
    90         */
    91        override config string codeMemory = "DDR2";
    92        override config string dataMemory = "DDR2";
    93        override config string stackMemory = "DDR2";
    94    };


package ti.platforms.evmDM365

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.arm;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.evmDM365 ========
    38     *  Platform package for the evmDM365 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform) necessary
    41     *  to build and run executables on the evmDM365 platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.evmDM365.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.evmDM365 [1,0,0] {
    55        module Platform;
    56    }


module ti.platforms.evmDM365.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    /*!
    38     *  ======== Platform ========
    39     *  Platform support for the evmDM365
    40     *
    41     *  This module implements xdc.platform.IPlatform and defines configuration
    42     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    43     *
    44     *  The configuration parameters are initialized in this package's
    45     *  configuration script (package.cfg) and "bound" to the XDC object
    46     *  model.  Once they are part of the model, these parameters are
    47     *  queried by a program's configuration script.
    48     *
    49     *  This particular platform has a single Cpu, and therefore, only
    50     *  declares a single CPU configuration object.  Multi-CPU platforms
    51     *  would declare multiple Cpu configuration parameters (one per
    52     *  platform CPU).
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        /*!
    57         *  ======== BOARD ========
    58         *  This platform's board attributes
    59         */
    60        readonly config xdc.platform.IPlatform.Board BOARD = {
    61            id:             "0",
    62            boardName:      "evmDM365",
    63            boardFamily:    "evmDM365",
    64            boardRevision:  null
    65        };
    66
    67        readonly config xdc.platform.IExeContext.Cpu CPU = {
    68            id:             "0",
    69            clockRate:      216.0,
    70            catalogName:    "ti.catalog.arm",
    71            deviceName:     "TMS320DM365",
    72            revision:       "",
    73        };
    74
    75    instance:
    76
    77        override readonly config xdc.platform.IPlatform.MemoryMap
    78            externalMemoryMap = [
    79                ["DDR",  {name: "DDR",  base: 0x80000000, len: 0x1000000}],
    80            ];
    81
    82        /*
    83         *  ======== sectMap ========
    84         *  Define a placement of compiler generated output sections into
    85         *  memory regions defined in the memTab above.
    86         */
    87        override config string codeMemory = "DDR";
    88        override config string dataMemory = "DDR";
    89        override config string stackMemory = "DDR";
    90    };


package ti.platforms.evmDM37XX

     1    requires ti.catalog.arm;
     2    requires ti.catalog.c6000;
     3    requires xdc.platform [1,0,1];
     4
     5    /*!
     6     *  ======== ti.platforms.evmDM37XX ========
     7     *  Platform package for the evmDM37XX platform.
     8     *
     9     *  This package implements the interfaces (xdc.platform.IPlatform)
    10     *  necessary to build and run executables on the evmDM37XX platform.
    11     *
    12     *  @a(Throws)
    13     *  `XDCException` exceptions are thrown for fatal errors. The following error
    14     *  codes are reported in the exception message:
    15     *  @p(dlist)
    16     *      -  `ti.platfoms.evmDM37XX.LINK_TEMPLATE_ERROR`
    17     *           This error is raised when this platform cannot found the default
    18     *           linker command template `linkcmd.xdt` in the build target's
    19     *           package. When a target does not contain this file, the config
    20     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    21     *  @p
    22     */
    23    package ti.platforms.evmDM37XX [1,0,0] {
    24        module Platform;
    25    }


module ti.platforms.evmDM37XX.Platform

     1    /*
     2     *  ======== Platform.xdc ========
     3     */
     4
     5    package ti.platforms.evmDM37XX;
     6
     7    /*!
     8     *  ======== Platform ========
     9     *  Platform support for the evmDM37XX
    10     *
    11     *  This module implements xdc.platform.IPlatform and defines configuration
    12     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    13     *
    14     *  The configuration parameters are initialized in this package's
    15     *  configuration script (package.cfg) and "bound" to the TCOM object
    16     *  model.  Once they are part of the model, these parameters are
    17     *  queried by a program's configuration script.
    18     *
    19     *  This particular platform has multiple CPUs, and therefore, declares
    20     *  multiple CPU configuration objects.
    21     */
    22    metaonly module Platform inherits xdc.platform.IPlatform
    23    {
    24        readonly config xdc.platform.IPlatform.Board BOARD = {
    25            id:             "0",
    26            boardName:      "evmDM37XX",
    27            boardFamily:    "evmDM37XX",
    28            boardRevision:  null,
    29        };
    30
    31        readonly config xdc.platform.IExeContext.Cpu DSP = {
    32            id:             "0",
    33            clockRate:      332.0,
    34            catalogName:    "ti.catalog.c6000",
    35            deviceName:     "DM37XX",
    36            revision:       "",
    37        };
    38
    39        readonly config xdc.platform.IExeContext.Cpu GPP = {
    40            id:             "1",
    41            clockRate:      332.0,
    42            catalogName:    "ti.catalog.arm.cortexa8",
    43            deviceName:     "DM37XX",
    44            revision:       "1.0",
    45        };
    46    instance:
    47
    48        override readonly config xdc.platform.IPlatform.Memory
    49            externalMemoryMap[string] = [
    50                [
    51                    "DDR",
    52                    {
    53                        name: "DDR",
    54                        base: 0x80000000,
    55                        len: 0x04000000
    56                    }
    57                ]
    58            ];
    59
    60        /*
    61         *  ======== sectMap ========
    62         *  Define a placement of compiler generated output sections into
    63         *  memory regions defined in the memTab above.
    64         */
    65        override config string codeMemory = "DDR";
    66
    67        override config string dataMemory = "DDR";
    68
    69        override config string stackMemory = "DDR";
    70
    71        /*
    72         *  ======== l1PMode ========
    73         *  Define the amount of L1P RAM used for L1 Program Cache.
    74         *
    75         *  Check the device documentation for valid values.
    76         */
    77        config String l1PMode = "32k";
    78
    79        /*
    80         *  ======== l1DMode ========
    81         *  Define the amount of L1D RAM used for L1 Data Cache.
    82         *
    83         *  Check the device documentation for valid values.
    84         */
    85        config String l1DMode = "32k";
    86
    87        /*
    88         *  ======== l2Mode ========
    89         *  Define the amount of L2 RAM used for L2 Cache.
    90         *
    91         *  Check the device documentation for valid values.
    92         */
    93        config String l2Mode = "0k";
    94
    95    };


package ti.platforms.evmDM6437

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmDM6437 ========
    43     *  Platform package for the evmDM6437 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evmDM6437 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evmDM6437.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evmDM6437 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evmDM6437.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmDM6437
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evmDM6437",
    60            boardFamily:    "evmDM6437",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      594,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320CDM6437",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x8000000}],
    77                ["SRAM", {name: "SRAM", base: 0x42000000, len: 0x0200000}],
    78            ];
    79
    80        override config string codeMemory = "DDR2";
    81
    82        override config string dataMemory = "DDR2";
    83
    84        override config string stackMemory = "DDR2";
    85
    86        /*
    87         *  ======== l1PMode ========
    88         *  Define the amount of L1P RAM used for L1 Program Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l1PMode = "32k";
    93
    94        /*
    95         *  ======== l1DMode ========
    96         *  Define the amount of L1D RAM used for L1 Data Cache.
    97         *
    98         *  Check the device documentation for valid values.
    99         */
   100        config String l1DMode = "32k";
   101
   102        /*
   103         *  ======== l2Mode ========
   104         *  Define the amount of L2 RAM used for L2 Cache.
   105         *
   106         *  Check the device documentation for valid values.
   107         */
   108        config String l2Mode = "0k";
   109    };


package ti.platforms.evmDM648

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmDM648 ========
    43     *  Platform package for the evmDM648 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evmDM648 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evmDM648.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evmDM648 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evmDM648.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmDM648
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evmDM648",
    60            boardFamily:    "evmDM648",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      891,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320CDM648",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        /*
    75         *  ======== memTab ========
    76         *  Define the evmDM648 memory map
    77         */
    78        override readonly config xdc.platform.IPlatform.Memory
    79            externalMemoryMap[string] = [
    80                ["DDR2", {name: "DDR2", base: 0xE0000000, len: 0x10000000}],
    81            ];
    82
    83        override config string codeMemory = "DDR2";
    84
    85        override config string dataMemory = "DDR2";
    86
    87        override config string stackMemory = "DDR2";
    88
    89        /*
    90         *  ======== l1PMode ========
    91         *  Define the amount of L1P RAM used for L1 Program Cache.
    92         *
    93         *  Check the device documentation for valid values.
    94         */
    95        config String l1PMode = "32k";
    96
    97        /*
    98         *  ======== l1DMode ========
    99         *  Define the amount of L1D RAM used for L1 Data Cache.
   100         *
   101         *  Check the device documentation for valid values.
   102         */
   103        config String l1DMode = "32k";
   104
   105        /*
   106         *  ======== l2Mode ========
   107         *  Define the amount of L2 RAM used for L2 Cache.
   108         *
   109         *  Check the device documentation for valid values.
   110         */
   111        config String l2Mode = "0k";
   112    };


package ti.platforms.evmDM8148

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmDM8148 ========
    44     *  Platform package for the evmDM8148 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmDM8148 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmDM8148.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmDM8148 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmDM8148.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmDM8148
    36     *
    37     */
    38
    39    package ti.platforms.evmDM8148;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmDM8148
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    54     *  C674 DSP.
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmDM8148",
    61            boardFamily:    "evmDM8148",
    62            boardRevision:  null
    63        };
    64
    65        /* C674 GEM */
    66        readonly config xdc.platform.IExeContext.Cpu GEM = {
    67            id:             "0",
    68            clockRate:      500.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320DM8148",
    71            revision:       ""
    72        };
    73
    74        /* M3 Subsystem */
    75        readonly config xdc.platform.IExeContext.Cpu DSS = {
    76            id:             "1",
    77            clockRate:      200.0,
    78            catalogName:    "ti.catalog.arm.cortexm3",
    79            deviceName:     "TMS320DM8148",
    80            revision:       "1.0"
    81        };
    82
    83        /* GPP */
    84        readonly config xdc.platform.IExeContext.Cpu GPP = {
    85            id:             "2",
    86            clockRate:      600.0,  /* Typically set by the HLOS */
    87            catalogName:    "ti.catalog.arm.cortexa8",
    88            deviceName:     "TMS320DM8148",
    89            revision:       "1.0"
    90        };
    91
    92    instance:
    93
    94        override readonly config xdc.platform.IPlatform.Memory
    95            externalMemoryMap[string] = [
    96
    97                ["DDR3_RAM", {
    98                    comment: "External RAM",
    99                    name: "DDR3_RAM",
   100                    base: 0x80000000,
   101                    len:  0x10000000
   102                }]
   103
   104            ];
   105
   106        override config string codeMemory = "DDR3_RAM";
   107        override config string dataMemory = "DDR3_RAM";
   108        override config string stackMemory = "DDR3_RAM";
   109
   110        /*
   111         *  ======== l1PMode ========
   112         *  Define the amount of L1P RAM used for L1 Program Cache.
   113         *
   114         *  Check the device documentation for valid values.
   115         */
   116        config String l1PMode = "32k";
   117
   118        /*
   119         *  ======== l1DMode ========
   120         *  Define the amount of L1D RAM used for L1 Data Cache.
   121         *
   122         *  Check the device documentation for valid values.
   123         */
   124        config String l1DMode = "32k";
   125
   126        /*
   127         *  ======== l2Mode ========
   128         *  Define the amount of L2 RAM used for L2 Cache.
   129         *
   130         *  Check the device documentation for valid values.
   131         */
   132        config String l2Mode = "0k";
   133
   134    };


package ti.platforms.evmDM8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmDM8168 ========
    44     *  Platform package for the evmDM8168 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmDM8168 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmDM8168.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmDM8168 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmDM8168.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmDM8168
    36     *
    37     */
    38
    39    package ti.platforms.evmDM8168;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmDM8168
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    54     *  C674 DSP.
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmDM8168",
    61            boardFamily:    "evmDM8168",
    62            boardRevision:  null
    63        };
    64
    65        /* C674 GEM */
    66        readonly config xdc.platform.IExeContext.Cpu GEM = {
    67            id:             "0",
    68            clockRate:      800.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320DM8168",
    71            revision:       ""
    72        };
    73
    74        /* M3 Subsystem */
    75        readonly config xdc.platform.IExeContext.Cpu DSS = {
    76            id:             "1",
    77            clockRate:      250.0,
    78            catalogName:    "ti.catalog.arm.cortexm3",
    79            deviceName:     "TMS320DM8168",
    80            revision:       "1.0"
    81        };
    82
    83        /* GPP */
    84        readonly config xdc.platform.IExeContext.Cpu GPP = {
    85            id:             "2",
    86            clockRate:      1000.0,  /* Typically set by the HLOS */
    87            catalogName:    "ti.catalog.arm.cortexa8",
    88            deviceName:     "TMS320DM8168",
    89            revision:       "1.0"
    90        };
    91
    92    instance:
    93
    94        override readonly config xdc.platform.IPlatform.Memory
    95            externalMemoryMap[string] = [
    96
    97                ["DDR3_RAM", {
    98                    comment: "External RAM",
    99                    name: "DDR3_RAM",
   100                    base: 0x80000000,
   101                    len:  0x10000000
   102                }]
   103
   104            ];
   105
   106        override config string codeMemory = "DDR3_RAM";
   107        override config string dataMemory = "DDR3_RAM";
   108        override config string stackMemory = "DDR3_RAM";
   109
   110        /*
   111         *  ======== l1PMode ========
   112         *  Define the amount of L1P RAM used for L1 Program Cache.
   113         *
   114         *  Check the device documentation for valid values.
   115         */
   116        config String l1PMode = "32k";
   117
   118        /*
   119         *  ======== l1DMode ========
   120         *  Define the amount of L1D RAM used for L1 Data Cache.
   121         *
   122         *  Check the device documentation for valid values.
   123         */
   124        config String l1DMode = "32k";
   125
   126        /*
   127         *  ======== l2Mode ========
   128         *  Define the amount of L2 RAM used for L2 Cache.
   129         *
   130         *  Check the device documentation for valid values.
   131         */
   132        config String l2Mode = "0k";
   133
   134    };


package ti.platforms.evmDRA7XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.arp32;
    38    requires ti.catalog.c6000;
    39    requires ti.catalog.arm.cortexm4;
    40    requires ti.catalog.arm.cortexa15;
    41    requires xdc.platform [1,0,1];
    42
    43    /*!
    44     *  ======== ti.platforms.evmDRA7XX ========
    45     *  Platform package for the DRA7XX SDP.
    46     *
    47     *  This package implements the interfaces (xdc.platform.IPlatform)
    48     *  necessary to build and run executables on the DRA74XX SDP platform.
    49     *
    50     *  @a(Throws)
    51     *  `XDCException` exceptions are thrown for fatal errors. The following error
    52     *  codes are reported in the exception message:
    53     *  @p(dlist)
    54     *      -  `ti.platforms.evmDRA74XX.LINK_TEMPLATE_ERROR`
    55     *           This error is raised when this platform cannot found the default
    56     *           linker command template `linkcmd.xdt` in the build target's
    57     *           package. When a target does not contain this file, the config
    58     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    59     *  @p
    60     */
    61    package ti.platforms.evmDRA7XX [1,0,0,0] {
    62        module Platform;
    63    }


module ti.platforms.evmDRA7XX.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for DRA7XX
    36     *
    37     */
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for DRA7XX
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has 1 Cortex-A15, 4 EVE's, 2 Benelli/IPU
    52     *  Sub-system (Dual M4's) and 2 C66x DSP's.
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "evmDRA7XX",
    59            boardFamily:    "evmDRA7XX",
    60            boardRevision:  null,
    61        };
    62
    63        readonly config xdc.platform.IExeContext.Cpu DSP = {
    64            id:             "0",
    65            clockRate:      600,
    66            catalogName:    "ti.catalog.c6000",
    67            deviceName:     "DRA7XX",
    68            revision:       "1.0",
    69        };
    70
    71        /* Benelli M4 Subsystem */
    72        readonly config xdc.platform.IExeContext.Cpu M4 = {
    73            id:             "1",
    74            clockRate:      212.8,
    75            catalogName:    "ti.catalog.arm.cortexm4",
    76            deviceName:     "DRA7XX",
    77            revision:       "1.0",
    78        };
    79
    80        /* EVE */
    81        readonly config xdc.platform.IExeContext.Cpu EVE = {
    82            id:             "2",
    83            clockRate:      535.0,
    84            catalogName:    "ti.catalog.arp32",
    85            deviceName:     "DRA7XX",
    86            revision:       "1.0"
    87        };
    88
    89        /* GPP */
    90        readonly config xdc.platform.IExeContext.Cpu GPP = {
    91            id:             "3",
    92            clockRate:      1000.0,  /* Typically set by the HLOS */
    93            catalogName:    "ti.catalog.arm.cortexa15",
    94            deviceName:     "DRA7XX",
    95            revision:       "1.0"
    96        };
    97
    98    /*  Memory Map for ti.platforms.evmDRA7XX
    99     *
   100     *  Virtual     Physical        Size            Comment
   101     *  ------------------------------------------------------------------------
   102     *              8000_0000  1000_0000  ( 256 MB) External Memory
   103     *
   104     *  0000_0000 0 8000_0000        100  ( 256  B) EVE1_VECS (vector table)
   105     *              8000_0100       FF00  ( ~64 KB) --------
   106     *  0000_0000   8001_0000        100  ( 256  B) EVE2_VECS (vector table)
   107     *              8001_0100       FF00  ( ~64 KB) --------
   108     *  0000_0000   8002_0000        100  ( 256  B) EVE3_VECS (vector table)
   109     *              8002_0100       FF00  ( ~64 KB) --------
   110     *  0000_0000   8003_0000        100  ( 256  B) EVE4_VECS (vector table)
   111     *              8003_0100    FE_FF00  ( ~16 MB) --------
   112     *            1 8100_0000    40_0000  (   4 MB) EVE1_PROG (code, data)
   113     *              8140_0000    C0_0000  (  12 MB) --------
   114     *            2 8200_0000    40_0000  (   4 MB) EVE2_PROG (code, data)
   115     *              8240_0000    C0_0000  (  12 MB) --------
   116     *            3 8300_0000    40_0000  (   4 MB) EVE3_PROG (code, data)
   117     *              8340_0000    C0_0000  (  12 MB) --------
   118     *            4 8400_0000    40_0000  (   4 MB) EVE4_PROG (code, data)
   119     *              8440_0000    C0_0000  (  12 MB) --------
   120     *            5 8500_0000   100_0000  (  16 MB) --------
   121     *            6 8600_0000   100_0000  (  16 MB) --------
   122     *            7 8700_0000   100_0000  (  16 MB) --------
   123     *            8 8800_0000   100_0000  (  16 MB) --------
   124     *            9 8900_0000   100_0000  (  16 MB) --------
   125     *            A 8A00_0000    80_0000  (   8 MB) IPU1 (code, data), benelli
   126     *              8A80_0000    80_0000  (   8 MB) IPU2 (code, data), benelli
   127     *            B 8B00_0000   100_0000  (  16 MB) HOST (code, data)
   128     *            C 8C00_0000   100_0000  (  16 MB) DSP1 (code, data)
   129     *            D 8D00_0000   100_0000  (  16 MB) DSP2 (code, data)
   130     *            E 8E00_0000   100_0000  (  16 MB) SR_0 (ipc)
   131     *            F 8F00_0000   100_0000  (  16 MB) --------
   132     */
   133
   134        readonly config Any SR_0 = {
   135            name: "SR_0", space: "data", access: "RWX",
   136            base: 0x8E000000, len: 0x1000000,
   137            comment: "SR#0 Memory (16 MB)"
   138        };
   139
   140        readonly config Any DSP1 = {
   141            externalMemoryMap: [
   142                [ "DSP1_PROG", {
   143                    name: "DSP1_PROG", space: "code/data", access: "RWX",
   144                    base: 0x8C000000, len: 0x1000000,
   145                    comment: "DSP1 Program Memory (16 MB)"
   146                }],
   147                [ "SR_0", SR_0 ]
   148            ],
   149            codeMemory:  "DSP1_PROG",
   150            dataMemory:  "DSP1_PROG",
   151            stackMemory: "DSP1_PROG",
   152            l1DMode: "32k",
   153            l1PMode: "32k",
   154            l2Mode: "128k"
   155        };
   156
   157        readonly config Any DSP2 = {
   158            externalMemoryMap: [
   159                [ "DSP2_PROG", {
   160                    name: "DSP2_PROG", space: "code/data", access: "RWX",
   161                    base: 0x8D000000, len: 0x1000000,
   162                    comment: "DSP2 Program Memory (16 MB)"
   163                }],
   164                [ "SR_0", SR_0 ]
   165            ],
   166            codeMemory:  "DSP2_PROG",
   167            dataMemory:  "DSP2_PROG",
   168            stackMemory: "DSP2_PROG",
   169            l1DMode: "32k",
   170            l1PMode: "32k",
   171            l2Mode: "128k"
   172        };
   173
   174        readonly config Any EVE1 = {
   175            externalMemoryMap: [
   176                [ "EVEVECS", { /* name used by SYS/BIOS */
   177                    name: "EVEVECS", space: "code/data", access: "RWX",
   178                    base: 0x80000000, len: 0x100, page: 0,
   179                    comment: "EVE1 Vector Table (256 B)"
   180                }],
   181                [ "EVE1_PROG", {
   182                    name: "EVE1_PROG", space: "code/data", access: "RWX",
   183                    base: 0x81000000, len: 0x400000, page: 1,
   184                    comment: "EVE1 Program Memory (4 MB)"
   185                }],
   186                [ "SR_0", SR_0 ]
   187            ],
   188            codeMemory:  "EVE1_PROG",
   189            dataMemory:  "EVE1_PROG",
   190            stackMemory: "EVE1_PROG"
   191        };
   192
   193        readonly config Any EVE2 = {
   194            externalMemoryMap: [
   195                [ "EVEVECS", { /* name used by SYS/BIOS */
   196                    name: "EVEVECS", space: "code/data", access: "RWX",
   197                    base: 0x80010000, len: 0x100, page: 0,
   198                    comment: "EVE2 Vector Table (256 B)"
   199                }],
   200                [ "EVE2_PROG", {
   201                    name: "EVE2_PROG", space: "code/data", access: "RWX",
   202                    base: 0x82000000, len: 0x400000, page: 1,
   203                    comment: "EVE2 Program Memory (4 MB)"
   204                }],
   205                [ "SR_0", SR_0 ]
   206            ],
   207            codeMemory:  "EVE2_PROG",
   208            dataMemory:  "EVE2_PROG",
   209            stackMemory: "EVE2_PROG"
   210        };
   211
   212        readonly config Any EVE3 = {
   213            externalMemoryMap: [
   214                [ "EVEVECS", { /* name used by SYS/BIOS */
   215                    name: "EVEVECS", space: "code/data", access: "RWX",
   216                    base: 0x80020000, len: 0x100, page: 0,
   217                    comment: "EVE3 Vector Table (256 B)"
   218                }],
   219                [ "EVE3_PROG", {
   220                    name: "EVE3_PROG", space: "code/data", access: "RWX",
   221                    base: 0x83000000, len: 0x400000, page: 1,
   222                    comment: "EVE3 Program Memory (4 MB)"
   223                }],
   224                [ "SR_0", SR_0 ]
   225            ],
   226            codeMemory:  "EVE3_PROG",
   227            dataMemory:  "EVE3_PROG",
   228            stackMemory: "EVE3_PROG"
   229        };
   230
   231        readonly config Any EVE4 = {
   232            externalMemoryMap: [
   233                [ "EVEVECS", { /* name used by SYS/BIOS */
   234                    name: "EVEVECS", space: "code/data", access: "RWX",
   235                    base: 0x80030000, len: 0x100, page: 0,
   236                    comment: "EVE4 Vector Table (256 B)"
   237                }],
   238                [ "EVE4_PROG", {
   239                    name: "EVE4_PROG", space: "code/data", access: "RWX",
   240                    base: 0x84000000, len: 0x400000, page: 1,
   241                    comment: "EVE4 Program Memory (4 MB)"
   242                }],
   243                [ "SR_0", SR_0 ]
   244            ],
   245            codeMemory:  "EVE4_PROG",
   246            dataMemory:  "EVE4_PROG",
   247            stackMemory: "EVE4_PROG"
   248        };
   249
   250        readonly config Any IPU1 = {
   251            externalMemoryMap: [
   252                [ "IPU1_PROG", {
   253                    name: "IPU1_PROG", space: "code/data", access: "RWX",
   254                    base: 0x8A000000, len: 0x800000,
   255                    comment: "IPU1 Program Memory (8 MB)"
   256                }],
   257                [ "SR_0", SR_0 ]
   258            ],
   259            codeMemory:  "IPU1_PROG",
   260            dataMemory:  "IPU1_PROG",
   261            stackMemory: "IPU1_PROG"
   262        };
   263
   264        readonly config Any IPU2 = {
   265            externalMemoryMap: [
   266                [ "IPU2_PROG", {
   267                    name: "IPU2_PROG", space: "code/data", access: "RWX",
   268                    base: 0x8A800000, len: 0x800000,
   269                    comment: "IPU2 Program Memory (8 MB)"
   270                }],
   271                [ "SR_0", SR_0 ]
   272            ],
   273            codeMemory:  "IPU2_PROG",
   274            dataMemory:  "IPU2_PROG",
   275            stackMemory: "IPU2_PROG"
   276        };
   277
   278        readonly config Any HOST = {
   279            externalMemoryMap: [
   280                [ "HOST_PROG", {
   281                    name: "HOST_PROG", space: "code/data", access: "RWX",
   282                    base: 0x8B000000, len: 0x1000000,
   283                    comment: "HOST Program Memory (16 MB)"
   284                }],
   285                [ "SR_0", SR_0 ]
   286            ],
   287            codeMemory:  "HOST_PROG",
   288            dataMemory:  "HOST_PROG",
   289            stackMemory: "HOST_PROG"
   290        };
   291
   292    instance:
   293
   294        /*!
   295         *  ======== externalMemoryMap ========
   296         *  Memory regions as defined in the DRA7XX Specification
   297         */
   298        override readonly config xdc.platform.IPlatform.Memory
   299            externalMemoryMap[string] = [
   300                ["EXT_RAM", {
   301                    comment: "2 GB External RAM Memory",
   302                    name: "EXT_RAM",
   303                    base: 0x80000000,
   304                    len:  0x80000000
   305                }]
   306            ];
   307
   308        /*
   309         *  ======== l1PMode ========
   310         *  Define the amount of L1P RAM used for L1 Program Cache.
   311         *
   312         *  Check the device documentation for valid values.
   313         */
   314        config String l1PMode = "32k";
   315
   316        /*
   317         *  ======== l1DMode ========
   318         *  Define the amount of L1D RAM used for L1 Data Cache.
   319         *
   320         *  Check the device documentation for valid values.
   321         */
   322        config String l1DMode = "32k";
   323
   324        /*
   325         *  ======== l2Mode ========
   326         *  Define the amount of L2 RAM used for L2 Cache.
   327         *
   328         *  Check the device documentation for valid values.
   329         */
   330        config String l2Mode = "0k";
   331    };


package ti.platforms.evmOMAPL137

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires ti.catalog.arm;
    35    requires xdc.platform [1,0,1];
    36
    37    /*!
    38     *  ======== ti.platforms.evmOMAPL137 ========
    39     *  Platform package for the evmOMAPL137 platform.
    40     *
    41     *  This package implements the interfaces (xdc.platform.IPlatform)
    42     *  necessary to build and run executables on the evmOMAPL137 platform.
    43     *
    44     *  @a(Throws)
    45     *  `XDCException` exceptions are thrown for fatal errors. The following error
    46     *  codes are reported in the exception message:
    47     *  @p(dlist)
    48     *      -  `ti.platfoms.evmOMAPL137.LINK_TEMPLATE_ERROR`
    49     *           This error is raised when this platform cannot found the default
    50     *           linker command template `linkcmd.xdt` in the build target's
    51     *           package. When a target does not contain this file, the config
    52     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    53     *  @p
    54     */
    55    package ti.platforms.evmOMAPL137 [1,0,0] {
    56        module Platform;
    57    }


module ti.platforms.evmOMAPL137.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.evmOMAPL137;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for the evmOMAPL137
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmOMAPL137",
    61            boardFamily:    "evmOMAPL137",
    62            boardRevision:  null,
    63        };
    64
    65        readonly config xdc.platform.IExeContext.Cpu DSP = {
    66            id:             "0",
    67            clockRate:      300.0,
    68            catalogName:    "ti.catalog.c6000",
    69            deviceName:     "OMAPL137",
    70            revision:       "",
    71        };
    72
    73        readonly config xdc.platform.IExeContext.Cpu GPP = {
    74            id:             "1",
    75            clockRate:      300.0,
    76            catalogName:    "ti.catalog.arm",
    77            deviceName:     "OMAPL137",
    78            revision:       "1.0",
    79        };
    80    instance:
    81
    82        /*
    83         *  SDRAM is 64MByte but we need to share it with Arm.
    84         *  Reserve 32MB for Arm/Linux (base: 0xC000000)
    85         *  16MB for shared Arm/DSP (base: 0xC2000000)
    86         *  16MB for DSP (base: 0xC3000000)
    87         */
    88        override readonly config xdc.platform.IPlatform.Memory
    89            externalMemoryMap[string] = [
    90                ["SDRAM",  {name: "SDRAM",  base: 0xC3000000, len: 0x01000000}],
    91            ];
    92
    93        /*
    94         *  ======== sectMap ========
    95         *  Define a placement of compiler generated output sections into
    96         *  memory regions defined in the memTab above.
    97         */
    98        override config string codeMemory = "SDRAM";
    99
   100        override config string dataMemory = "SDRAM";
   101
   102        override config string stackMemory = "SDRAM";
   103
   104        /*
   105         *  ======== l1PMode ========
   106         *  Define the amount of L1P RAM used for L1 Program Cache.
   107         *
   108         *  Check the device documentation for valid values.
   109         */
   110        config String l1PMode = "32k";
   111
   112        /*
   113         *  ======== l1DMode ========
   114         *  Define the amount of L1D RAM used for L1 Data Cache.
   115         *
   116         *  Check the device documentation for valid values.
   117         */
   118        config String l1DMode = "32k";
   119
   120        /*
   121         *  ======== l2Mode ========
   122         *  Define the amount of L2 RAM used for L2 Cache.
   123         *
   124         *  Check the device documentation for valid values.
   125         */
   126        config String l2Mode = "0k";
   127
   128    };


package ti.platforms.evmOMAPL138

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires ti.catalog.arm;
    35    requires xdc.platform [1,0,1];
    36
    37    /*!
    38     *  ======== ti.platforms.evmOMAPL138 ========
    39     *  Platform package for the evmOMAPL138 platform.
    40     *
    41     *  This package implements the interfaces (xdc.platform.IPlatform)
    42     *  necessary to build and run executables on the evmOMAPL138 platform.
    43     *
    44     *  @a(Throws)
    45     *  `XDCException` exceptions are thrown for fatal errors. The following error
    46     *  codes are reported in the exception message:
    47     *  @p(dlist)
    48     *      -  `ti.platfoms.evmOMAPL138.LINK_TEMPLATE_ERROR`
    49     *           This error is raised when this platform cannot found the default
    50     *           linker command template `linkcmd.xdt` in the build target's
    51     *           package. When a target does not contain this file, the config
    52     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    53     *  @p
    54     */
    55    package ti.platforms.evmOMAPL138 [1,0,0] {
    56        module Platform;
    57    }


module ti.platforms.evmOMAPL138.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.evmOMAPL138;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for the evmOMAPL138
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmOMAPL138",
    61            boardFamily:    "evmOMAPL138",
    62            boardRevision:  null,
    63        };
    64
    65        readonly config xdc.platform.IExeContext.Cpu DSP = {
    66            id:             "0",
    67            clockRate:      300.0,
    68            catalogName:    "ti.catalog.c6000",
    69            deviceName:     "OMAPL138",
    70            revision:       "",
    71        };
    72
    73        readonly config xdc.platform.IExeContext.Cpu GPP = {
    74            id:             "1",
    75            clockRate:      300.0,
    76            catalogName:    "ti.catalog.arm",
    77            deviceName:     "OMAPL138",
    78            revision:       "1.0",
    79        };
    80    instance:
    81
    82        /*
    83         *  DDR is 128MByte but we need to share it with Arm.
    84         *  Reserve 32MB for Arm/Linux (base: 0xC000000)
    85         *  16MB for shared Arm/DSP (base: 0xC2000000)
    86         *  16MB for DSP (base: 0xC3000000)
    87         *  64MB for ARM (base: 0xC4000000)
    88         */
    89        override readonly config xdc.platform.IPlatform.Memory
    90            externalMemoryMap[string] = [
    91                ["DDR",  {name: "DDR",  base: 0xC3000000, len: 0x01000000}],
    92            ];
    93
    94        /*
    95         *  ======== sectMap ========
    96         *  Define a placement of compiler generated output sections into
    97         *  memory regions defined in the memTab above.
    98         */
    99        override config string codeMemory = "DDR";
   100
   101        override config string dataMemory = "DDR";
   102
   103        override config string stackMemory = "DDR";
   104
   105        /*
   106         *  ======== l1PMode ========
   107         *  Define the amount of L1P RAM used for L1 Program Cache.
   108         *
   109         *  Check the device documentation for valid values.
   110         */
   111        config String l1PMode = "32k";
   112
   113        /*
   114         *  ======== l1DMode ========
   115         *  Define the amount of L1D RAM used for L1 Data Cache.
   116         *
   117         *  Check the device documentation for valid values.
   118         */
   119        config String l1DMode = "32k";
   120
   121        /*
   122         *  ======== l2Mode ========
   123         *  Define the amount of L2 RAM used for L2 Cache.
   124         *
   125         *  Check the device documentation for valid values.
   126         */
   127        config String l2Mode = "0k";
   128
   129    };


package ti.platforms.evmTCI6484

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmTCI6484 ========
    43     *  Platform package for the evmTCI6484 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evmTCI6484 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evmTCI6484.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evmTCI6484 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evmTCI6484.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmTCI6484
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evmTCI6484",
    60            boardFamily:    "evmTCI6484",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      1000.0,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320CTCI6484",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0xe0000000, len: 0x10000000}],
    77            ];
    78        override config string codeMemory = "DDR2";
    79
    80        override config string dataMemory = "DDR2";
    81
    82        override config string stackMemory = "DDR2";
    83
    84        /*
    85         *  ======== l1PMode ========
    86         *  Define the amount of L1P RAM used for L1 Program Cache.
    87         *
    88         *  Check the device documentation for valid values.
    89         */
    90        config String l1PMode = "32k";
    91
    92        /*
    93         *  ======== l1DMode ========
    94         *  Define the amount of L1D RAM used for L1 Data Cache.
    95         *
    96         *  Check the device documentation for valid values.
    97         */
    98        config String l1DMode = "32k";
    99
   100        /*
   101         *  ======== l2Mode ========
   102         *  Define the amount of L2 RAM used for L2 Cache.
   103         *
   104         *  Check the device documentation for valid values.
   105         */
   106        config String l2Mode = "0k";
   107
   108    };


package ti.platforms.evmTCI6486

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmTCI6486 ========
    43     *  Platform package for the evmTCI6486 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evmTCI6486 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evmTCI6486.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evmTCI6486 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evmTCI6486.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmTCI6486
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evmTCI6486",
    60            boardFamily:    "evmTCI6486",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      500.0,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320CTCI6486",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0xe0000000, len: 0x10000000}],
    77            ];
    78
    79        override config string codeMemory = "DDR2";
    80
    81        override config string dataMemory = "DDR2";
    82
    83        override config string stackMemory = "DDR2";
    84
    85        /*
    86         *  ======== l1PMode ========
    87         *  Define the amount of L1P RAM used for L1 Program Cache.
    88         *
    89         *  Check the device documentation for valid values.
    90         */
    91        config String l1PMode = "32k";
    92
    93        /*
    94         *  ======== l1DMode ========
    95         *  Define the amount of L1D RAM used for L1 Data Cache.
    96         *
    97         *  Check the device documentation for valid values.
    98         */
    99        config String l1DMode = "32k";
   100
   101        /*
   102         *  ======== l2Mode ========
   103         *  Define the amount of L2 RAM used for L2 Cache.
   104         *
   105         *  Check the device documentation for valid values.
   106         */
   107        config String l2Mode = "0k";
   108    };


package ti.platforms.evmTCI6488

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmTCI6488 ========
    43     *  Platform package for the evmTCI6488 platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evmTCI6488 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evmTCI6488.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evmTCI6488 [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evmTCI6488.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmTCI6488
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evmTCI6488",
    60            boardFamily:    "evmTCI6488",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      1044,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320CTCI6488",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x08000000}],
    77            ];
    78
    79        override config string codeMemory = "DDR2";
    80
    81        override config string dataMemory = "DDR2";
    82
    83        override config string stackMemory = "DDR2";
    84
    85        /*
    86         *  ======== l1PMode ========
    87         *  Define the amount of L1P RAM used for L1 Program Cache.
    88         *
    89         *  Check the device documentation for valid values.
    90         */
    91        config String l1PMode = "32k";
    92
    93        /*
    94         *  ======== l1DMode ========
    95         *  Define the amount of L1D RAM used for L1 Data Cache.
    96         *
    97         *  Check the device documentation for valid values.
    98         */
    99        config String l1DMode = "32k";
   100
   101        /*
   102         *  ======== l2Mode ========
   103         *  Define the amount of L2 RAM used for L2 Cache.
   104         *
   105         *  Check the device documentation for valid values.
   106         */
   107        config String l2Mode = "0k";
   108    };


package ti.platforms.evmTCI6630K2L

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmTCI6630K2L ========
    43     *  Platform package for the TCI6630 evm.
    44     *
    45     *  @a(Throws)
    46     *  `XDCException` exceptions are thrown for fatal errors. The following error
    47     *  codes are reported in the exception message:
    48     *  @p(dlist)
    49     *      -  `ti.platfoms.evmTCIK2L.LINK_TEMPLATE_ERROR`
    50     *           This error is raised when this platform cannot found the default
    51     *           linker command template `linkcmd.xdt` in the build target's
    52     *           package. When a target does not contain this file, the config
    53     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    54     *  @p
    55     */
    56    package ti.platforms.evmTCI6630K2L [1,0,0,0] {
    57        module Platform;
    58    }


module ti.platforms.evmTCI6630K2L.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    /*!
    38     *  ======== Platform ========
    39     *  Platform support for the evmTCI6630K2L
    40     */
    41    metaonly module Platform inherits xdc.platform.IPlatform
    42    {
    43        readonly config xdc.platform.IPlatform.Board BOARD = {
    44            id:             "0",
    45            boardName:      "evmTCI6630K2L",
    46            boardFamily:    "evmTCI6630K2L",
    47            boardRevision:  null,
    48        };
    49
    50        /* DSP */
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1220,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320TCI6630K2L",
    56            revision:       "1.2",
    57        };
    58
    59        /* GPP */
    60        readonly config xdc.platform.IExeContext.Cpu GPP = {
    61            id:             "1",
    62            clockRate:      125.0,  /* Typically set by the HLOS */
    63            catalogName:    "ti.catalog.arm.cortexa15",
    64            deviceName:     "TCI6630K2L",
    65            revision:       "1.0"
    66        };
    67
    68    instance:
    69
    70        override readonly config xdc.platform.IPlatform.Memory
    71            externalMemoryMap[string] = [
    72                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x80000000}],
    73        ];
    74
    75        /*
    76         *  ======== l1PMode ========
    77         *  Define the amount of L1P RAM used for L1 Program Cache.
    78         *
    79         *  Check the device documentation for valid values.
    80         */
    81        config String l1PMode = "32k";
    82
    83        /*
    84         *  ======== l1DMode ========
    85         *  Define the amount of L1D RAM used for L1 Data Cache.
    86         *
    87         *  Check the device documentation for valid values.
    88         */
    89        config String l1DMode = "32k";
    90
    91        /*
    92         *  ======== l2Mode ========
    93         *  Define the amount of L2 RAM used for L2 Cache.
    94         *
    95         *  Check the device documentation for valid values.
    96         */
    97        config String l2Mode = "0k";
    98
    99    };


package ti.platforms.evmTCI6636K2H

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires ti.catalog.arm.cortexa15;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmTCI6636K2H ========
    44     *  Platform package for the TCI6636 evm.
    45     *
    46     *  @a(Throws)
    47     *  `XDCException` exceptions are thrown for fatal errors. The following error
    48     *  codes are reported in the exception message:
    49     *  @p(dlist)
    50     *      -  `ti.platfoms.evmTCIK2X.LINK_TEMPLATE_ERROR`
    51     *           This error is raised when this platform cannot found the default
    52     *           linker command template `linkcmd.xdt` in the build target's
    53     *           package. When a target does not contain this file, the config
    54     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    55     *  @p
    56     */
    57    package ti.platforms.evmTCI6636K2H [1,0,0,0] {
    58        module Platform;
    59    }


module ti.platforms.evmTCI6636K2H.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmTCI6636K2H
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "evmTCI6636K2H",
    47            boardFamily:    "evmTCI6636K2H",
    48            boardRevision:  null,
    49        };
    50
    51        /* DSP */
    52        readonly config xdc.platform.IExeContext.Cpu DSP = {
    53            id:             "0",
    54            clockRate:      1220,
    55            catalogName:    "ti.catalog.c6000",
    56            deviceName:     "TMS320TCI6636",
    57            revision:       "1.0",
    58        };
    59
    60        /* GPP */
    61        readonly config xdc.platform.IExeContext.Cpu GPP = {
    62            id:             "1",
    63            clockRate:      125.0,  /* Typically set by the HLOS */
    64            catalogName:    "ti.catalog.arm.cortexa15",
    65            deviceName:     "TCI6636K2H",
    66            revision:       "1.0"
    67        };
    68
    69    instance:
    70
    71        override readonly config xdc.platform.IPlatform.Memory
    72            externalMemoryMap[string] = [
    73                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x80000000}],
    74        ];
    75
    76        /*
    77         *  ======== l1PMode ========
    78         *  Define the amount of L1P RAM used for L1 Program Cache.
    79         *
    80         *  Check the device documentation for valid values.
    81         */
    82        config String l1PMode = "32k";
    83
    84        /*
    85         *  ======== l1DMode ========
    86         *  Define the amount of L1D RAM used for L1 Data Cache.
    87         *
    88         *  Check the device documentation for valid values.
    89         */
    90        config String l1DMode = "32k";
    91
    92        /*
    93         *  ======== l2Mode ========
    94         *  Define the amount of L2 RAM used for L2 Cache.
    95         *
    96         *  Check the device documentation for valid values.
    97         */
    98        config String l2Mode = "0k";
    99
   100    };


package ti.platforms.evmTCI6638K2K

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmTCI6638K2K ========
    43     *  Platform package for the TCI6638 evm.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the Kepler simulator platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evmTCIK2X.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evmTCI6638K2K [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evmTCI6638K2K.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    /*!
    38     *  ======== Platform ========
    39     *  Platform support for the evmTCI6638K2K
    40     */
    41    metaonly module Platform inherits xdc.platform.IPlatform
    42    {
    43        readonly config xdc.platform.IPlatform.Board BOARD = {
    44            id:             "0",
    45            boardName:      "evmTCIK2X",
    46            boardFamily:    "evmTCIK2X",
    47            boardRevision:  null,
    48        };
    49
    50        /* DSP */
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1220,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320TCI6638",
    56            revision:       "1.0",
    57        };
    58
    59        /* GPP */
    60        readonly config xdc.platform.IExeContext.Cpu GPP = {
    61            id:             "1",
    62            clockRate:      125.0,  /* Typically set by the HLOS */
    63            catalogName:    "ti.catalog.arm.cortexa15",
    64            deviceName:     "TCI6638K2K",
    65            revision:       "1.0"
    66        };
    67
    68    instance:
    69
    70        override readonly config xdc.platform.IPlatform.Memory
    71            externalMemoryMap[string] = [
    72                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x80000000}],
    73        ];
    74
    75        /*
    76         *  ======== l1PMode ========
    77         *  Define the amount of L1P RAM used for L1 Program Cache.
    78         *
    79         *  Check the device documentation for valid values.
    80         */
    81        config String l1PMode = "32k";
    82
    83        /*
    84         *  ======== l1DMode ========
    85         *  Define the amount of L1D RAM used for L1 Data Cache.
    86         *
    87         *  Check the device documentation for valid values.
    88         */
    89        config String l1DMode = "32k";
    90
    91        /*
    92         *  ======== l2Mode ========
    93         *  Define the amount of L2 RAM used for L2 Cache.
    94         *
    95         *  Check the device documentation for valid values.
    96         */
    97        config String l2Mode = "0k";
    98
    99    };


package ti.platforms.evmTCI66AK2G02

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     */
    36
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexa15;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmTCI66AK2G02 ========
    43     *  Platform package for the TCI66AK2G02 evm.
    44     *
    45     *  @a(Throws)
    46     *  `XDCException` exceptions are thrown for fatal errors. The following error
    47     *  codes are reported in the exception message:
    48     *  @p(dlist)
    49     *      -  `ti.platfoms.evmTCI66AK2G02.LINK_TEMPLATE_ERROR`
    50     *           This error is raised when this platform cannot found the default
    51     *           linker command template `linkcmd.xdt` in the build target's
    52     *           package. When a target does not contain this file, the config
    53     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    54     *  @p
    55     */
    56    package ti.platforms.evmTCI66AK2G02 [1,0,0,0] {
    57        module Platform;
    58    }


module ti.platforms.evmTCI66AK2G02.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for TCI66AK2G02
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "evmTCI66AK2G02",
    47            boardFamily:    "evmTCI66AK2G02",
    48            boardRevision:  null,
    49        };
    50
    51        /* DSP */
    52        readonly config xdc.platform.IExeContext.Cpu DSP = {
    53            id:             "0",
    54            clockRate:      1220,
    55            catalogName:    "ti.catalog.c6000",
    56            deviceName:     "TCI66AK2G02",
    57            revision:       "1.0",
    58        };
    59
    60        /* GPP */
    61        readonly config xdc.platform.IExeContext.Cpu GPP = {
    62            id:             "1",
    63            clockRate:      1000.0,  /* Typically set by the HLOS */
    64            catalogName:    "ti.catalog.arm.cortexa15",
    65            deviceName:     "TCI66AK2G02",
    66            revision:       "1.0"
    67        };
    68
    69    instance:
    70
    71        override readonly config xdc.platform.IPlatform.Memory
    72            externalMemoryMap[string] = [
    73                ["DDR3", {name: "DDR3", base: 0x80000000, len: 0x80000000}],
    74        ];
    75
    76        /*
    77         *  ======== l1PMode ========
    78         *  Define the amount of L1P RAM used for L1 Program Cache.
    79         *
    80         *  Check the device documentation for valid values.
    81         */
    82        config String l1PMode = "32k";
    83
    84        /*
    85         *  ======== l1DMode ========
    86         *  Define the amount of L1D RAM used for L1 Data Cache.
    87         *
    88         *  Check the device documentation for valid values.
    89         */
    90        config String l1DMode = "32k";
    91
    92        /*
    93         *  ======== l2Mode ========
    94         *  Define the amount of L2 RAM used for L2 Cache.
    95         *
    96         *  Check the device documentation for valid values.
    97         */
    98        config String l2Mode = "0k";
    99
   100    };


package ti.platforms.evmTDA3XX

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.arp32;
    38    requires ti.catalog.c6000;
    39    requires ti.catalog.arm.cortexm4;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmTDA3XX ========
    44     *  Platform package for the TDA3XX SDP.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the TDA3XX SDP platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platforms.evmTDA3XX.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmTDA3XX [1,0,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmTDA3XX.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for TDA3XX
    36     *
    37     */
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for TDA3XX
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has 1 EVE, 1 Benelli/IPU sub-system (Dual M4's)
    52     *  and 2 C66x DSP's.
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "evmTDA3XX",
    59            boardFamily:    "evmTDA3XX",
    60            boardRevision:  null,
    61        };
    62
    63        readonly config xdc.platform.IExeContext.Cpu DSP = {
    64            id:             "0",
    65            clockRate:      600.0,
    66            catalogName:    "ti.catalog.c6000",
    67            deviceName:     "TDA3XX",
    68            revision:       "1.0",
    69        };
    70
    71        /* Benelli M4 Subsystem */
    72        readonly config xdc.platform.IExeContext.Cpu M4 = {
    73            id:             "1",
    74            clockRate:      212.8,
    75            catalogName:    "ti.catalog.arm.cortexm4",
    76            deviceName:     "TDA3XX",
    77            revision:       "1.0",
    78        };
    79
    80        /* EVE */
    81        readonly config xdc.platform.IExeContext.Cpu EVE = {
    82            id:             "2",
    83            clockRate:      535.0,
    84            catalogName:    "ti.catalog.arp32",
    85            deviceName:     "TDA3XX",
    86            revision:       "1.0"
    87        };
    88
    89    instance:
    90
    91        /*!
    92         *  ======== externalMemoryMap ========
    93         *  Memory regions as defined in the TDA3XX Specification
    94         */
    95        override readonly config xdc.platform.IPlatform.Memory
    96            externalMemoryMap[string] = [
    97                ["EXT_RAM", {
    98                    comment: "1 GB External RAM Memory",
    99                    name: "EXT_RAM",
   100                    base: 0x80000000,
   101                    len:  0x40000000
   102                }]
   103            ];
   104
   105        /*
   106         *  ======== l1PMode ========
   107         *  Define the amount of L1P RAM used for L1 Program Cache.
   108         *
   109         *  Check the device documentation for valid values.
   110         */
   111        config String l1PMode = "32k";
   112
   113        /*
   114         *  ======== l1DMode ========
   115         *  Define the amount of L1D RAM used for L1 Data Cache.
   116         *
   117         *  Check the device documentation for valid values.
   118         */
   119        config String l1DMode = "32k";
   120
   121        /*
   122         *  ======== l2Mode ========
   123         *  Define the amount of L2 RAM used for L2 Cache.
   124         *
   125         *  Check the device documentation for valid values.
   126         */
   127        config String l2Mode = "0k";
   128    };


package ti.platforms.evmTI811X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmTI811X ========
    44     *  Platform package for the evmTI811X platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmTI811X platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmTI811X.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmTI811X [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmTI811X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmTI811X
    36     *
    37     */
    38
    39    package ti.platforms.evmTI811X;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmTI811X
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    54     *  C674 DSP.
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmTI811X",
    61            boardFamily:    "evmTI811X",
    62            boardRevision:  null
    63        };
    64
    65        /* C674 GEM */
    66        readonly config xdc.platform.IExeContext.Cpu GEM = {
    67            id:             "0",
    68            clockRate:      500.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320TI811X",
    71            revision:       ""
    72        };
    73
    74        /* M3 Subsystem */
    75        readonly config xdc.platform.IExeContext.Cpu DSS = {
    76            id:             "1",
    77            clockRate:      200.0,
    78            catalogName:    "ti.catalog.arm.cortexm3",
    79            deviceName:     "TMS320TI811X",
    80            revision:       "1.0"
    81        };
    82
    83        /* GPP */
    84        readonly config xdc.platform.IExeContext.Cpu GPP = {
    85            id:             "2",
    86            clockRate:      600.0,  /* Typically set by the HLOS */
    87            catalogName:    "ti.catalog.arm.cortexa8",
    88            deviceName:     "TMS320TI811X",
    89            revision:       "1.0"
    90        };
    91
    92    instance:
    93
    94        override readonly config xdc.platform.IPlatform.Memory
    95            externalMemoryMap[string] = [
    96                ["DDR3_HOST", {
    97                    comment: "DDR3 Memory reserved for use by the A8",
    98                    name: "DDR3_HOST",
    99                    base: 0x80000000,
   100                    len:  0x0B000000    /* 176 MB */
   101                }],
   102                ["DDR3_DSP", {
   103                    comment: "DDR3 Memory reserved for use by the C674",
   104                    name: "DDR3_DSP",
   105                    base: 0x8B000000,
   106                    len:  0x02000000    /* 32 MB */
   107                }],
   108                ["DDR3_SR1", {
   109                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
   110                    name: "DDR3_SR1",
   111                    base: 0x8D000000,
   112                    len:  0x00C00000    /* 12 MB */
   113                }],
   114                ["DDR3_HDVPSS", {
   115                    comment: "DDR3 Memory reserved for use by HDVPSS",
   116                    name: "DDR3_HDVPSS",
   117                    base: 0x8DC00000,
   118                    len:  0x00200000    /* 2 MB */
   119                }],
   120                ["DDR3_V4L2", {
   121                    comment: "DDR3 Memory reserved for use by V4L2",
   122                    name: "DDR3_V4L2",
   123                    base: 0x8DE00000,
   124                    len:  0x00200000    /* 2 MB */
   125                }],
   126                ["DDR3_SR0", {
   127                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
   128                    name: "DDR3_SR0",
   129                    base: 0x8E000000,
   130                    len:  0x01000000    /* 16 MB */
   131                }],
   132                ["DDR3_M3", {
   133                    comment: "DDR3 Memory reserved for use by the M3 core",
   134                    name: "DDR3_M3",
   135                    base: 0x8F000000,
   136                    len:  0x01000000    /* 16 MB */
   137                }],
   138            ];
   139
   140        /*
   141         *  ======== l1PMode ========
   142         *  Define the amount of L1P RAM used for L1 Program Cache.
   143         *
   144         *  Check the device documentation for valid values.
   145         */
   146        config String l1PMode = "32k";
   147
   148        /*
   149         *  ======== l1DMode ========
   150         *  Define the amount of L1D RAM used for L1 Data Cache.
   151         *
   152         *  Check the device documentation for valid values.
   153         */
   154        config String l1DMode = "32k";
   155
   156        /*
   157         *  ======== l2Mode ========
   158         *  Define the amount of L2 RAM used for L2 Cache.
   159         *
   160         *  Check the device documentation for valid values.
   161         */
   162        config String l2Mode = "0k";
   163    };


package ti.platforms.evmTI813X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.arm.cortexm3;
    38    requires ti.catalog.arm.cortexa8;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.evmTI813X ========
    43     *  Platform package for the evmTI813X platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the evmTI8139 platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.evmTI813X.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.evmTI813X [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.evmTI813X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmTI813X
    36     *
    37     */
    38
    39    package ti.platforms.evmTI813X;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmTI813X
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 3 CPU's, a host GPP, and 2 M3's.
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        /*!
    58         *  ======== BOARD ========
    59         *  This platform's board attributes
    60         */
    61        readonly config xdc.platform.IPlatform.Board BOARD = {
    62            id:             "0",
    63            boardName:      "evmTI813X",
    64            boardFamily:    "evmTI813X",
    65            boardRevision:  null
    66        };
    67
    68        /* M3 Subsystem */
    69        readonly config xdc.platform.IExeContext.Cpu DSS = {
    70            id:             "0",
    71            clockRate:      200.0,
    72            catalogName:    "ti.catalog.arm.cortexm3",
    73            deviceName:     "TMS320TI813X",
    74            revision:       "1.0"
    75        };
    76
    77        /* GPP */
    78        readonly config xdc.platform.IExeContext.Cpu GPP = {
    79            id:             "1",
    80            clockRate:      600.0,  /* Typically set by the HLOS */
    81            catalogName:    "ti.catalog.arm.cortexa8",
    82            deviceName:     "TMS320TI813X",
    83            revision:       "1.0"
    84        };
    85
    86    instance:
    87
    88        override readonly config xdc.platform.IPlatform.Memory
    89            externalMemoryMap[string] = [
    90                ["DDR3_HOST", {
    91                    comment: "DDR3 Memory reserved for use by the A8",
    92                    name: "DDR3_HOST",
    93                    base: 0x80000000,
    94                    len:  0x0D000000    /* 196 MB */
    95                }],
    96                ["DDR3_SR1", {
    97                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
    98                    name: "DDR3_SR1",
    99                    base: 0x8D000000,
   100                    len:  0x00C00000    /* 12 MB */
   101                }],
   102                ["DDR3_HDVPSS", {
   103                    comment: "DDR3 Memory reserved for use by HDVPSS",
   104                    name: "DDR3_HDVPSS",
   105                    base: 0x8DC00000,
   106                    len:  0x00200000    /* 2 MB */
   107                }],
   108                ["DDR3_V4L2", {
   109                    comment: "DDR3 Memory reserved for use by V4L2",
   110                    name: "DDR3_V4L2",
   111                    base: 0x8DE00000,
   112                    len:  0x00200000    /* 2 MB */
   113                }],
   114                ["DDR3_SR0", {
   115                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
   116                    name: "DDR3_SR0",
   117                    base: 0x8E000000,
   118                    len:  0x01000000    /* 16 MB */
   119                }],
   120                ["DDR3_M3", {
   121                    comment: "DDR3 Memory reserved for use by the M3 core",
   122                    name: "DDR3_M3",
   123                    base: 0x8F000000,
   124                    len:  0x01000000    /* 16 MB */
   125                }],
   126            ];
   127
   128    };


package ti.platforms.evmTI814X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmTI814X ========
    44     *  Platform package for the evmTI814X platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmTI814X platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmTI814X.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmTI814X [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmTI814X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmTI814X
    36     *
    37     */
    38
    39    package ti.platforms.evmTI814X;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmTI814X
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    54     *  C674 DSP.
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmTI814X",
    61            boardFamily:    "evmTI814X",
    62            boardRevision:  null
    63        };
    64
    65        /* C674 GEM */
    66        readonly config xdc.platform.IExeContext.Cpu GEM = {
    67            id:             "0",
    68            clockRate:      500.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320TI814X",
    71            revision:       ""
    72        };
    73
    74        /* M3 Subsystem */
    75        readonly config xdc.platform.IExeContext.Cpu DSS = {
    76            id:             "1",
    77            clockRate:      200.0,
    78            catalogName:    "ti.catalog.arm.cortexm3",
    79            deviceName:     "TMS320TI814X",
    80            revision:       "1.0"
    81        };
    82
    83        /* GPP */
    84        readonly config xdc.platform.IExeContext.Cpu GPP = {
    85            id:             "2",
    86            clockRate:      600.0,  /* Typically set by the HLOS */
    87            catalogName:    "ti.catalog.arm.cortexa8",
    88            deviceName:     "TMS320TI814X",
    89            revision:       "1.0"
    90        };
    91
    92    instance:
    93
    94        override readonly config xdc.platform.IPlatform.Memory
    95            externalMemoryMap[string] = [
    96                ["DDR3_HOST", {
    97                    comment: "DDR3 Memory reserved for use by the A8",
    98                    name: "DDR3_HOST",
    99                    base: 0x80000000,
   100                    len:  0x0B000000    /* 176 MB */
   101                }],
   102                ["DDR3_DSP", {
   103                    comment: "DDR3 Memory reserved for use by the C674",
   104                    name: "DDR3_DSP",
   105                    base: 0x8B000000,
   106                    len:  0x02000000    /* 32 MB */
   107                }],
   108                ["DDR3_SR1", {
   109                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
   110                    name: "DDR3_SR1",
   111                    base: 0x8D000000,
   112                    len:  0x00C00000    /* 12 MB */
   113                }],
   114                ["DDR3_HDVPSS", {
   115                    comment: "DDR3 Memory reserved for use by HDVPSS",
   116                    name: "DDR3_HDVPSS",
   117                    base: 0x8DC00000,
   118                    len:  0x00200000    /* 2 MB */
   119                }],
   120                ["DDR3_V4L2", {
   121                    comment: "DDR3 Memory reserved for use by V4L2",
   122                    name: "DDR3_V4L2",
   123                    base: 0x8DE00000,
   124                    len:  0x00200000    /* 2 MB */
   125                }],
   126                ["DDR3_SR0", {
   127                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
   128                    name: "DDR3_SR0",
   129                    base: 0x8E000000,
   130                    len:  0x01000000    /* 16 MB */
   131                }],
   132                ["DDR3_M3", {
   133                    comment: "DDR3 Memory reserved for use by the M3 core",
   134                    name: "DDR3_M3",
   135                    base: 0x8F000000,
   136                    len:  0x01000000    /* 16 MB */
   137                }],
   138            ];
   139
   140        /*
   141         *  ======== l1PMode ========
   142         *  Define the amount of L1P RAM used for L1 Program Cache.
   143         *
   144         *  Check the device documentation for valid values.
   145         */
   146        config String l1PMode = "32k";
   147
   148        /*
   149         *  ======== l1DMode ========
   150         *  Define the amount of L1D RAM used for L1 Data Cache.
   151         *
   152         *  Check the device documentation for valid values.
   153         */
   154        config String l1DMode = "32k";
   155
   156        /*
   157         *  ======== l2Mode ========
   158         *  Define the amount of L2 RAM used for L2 Cache.
   159         *
   160         *  Check the device documentation for valid values.
   161         */
   162        config String l2Mode = "0k";
   163    };


package ti.platforms.evmTI816X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.evmTI816X ========
    44     *  Platform package for the evmTI816X platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the evmTI816X platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.evmTI816X.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.evmTI816X [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.evmTI816X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for evmTI816X
    36     *
    37     */
    38
    39    package ti.platforms.evmTI816X;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the evmTI816X
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    54     *  C674 DSP.
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "evmTI816X",
    61            boardFamily:    "evmTI816X",
    62            boardRevision:  null
    63        };
    64
    65        /* C674 GEM */
    66        readonly config xdc.platform.IExeContext.Cpu GEM = {
    67            id:             "0",
    68            clockRate:      800.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320TI816X",
    71            revision:       ""
    72        };
    73
    74        /* M3 Subsystem */
    75        readonly config xdc.platform.IExeContext.Cpu DSS = {
    76            id:             "1",
    77            clockRate:      250.0,
    78            catalogName:    "ti.catalog.arm.cortexm3",
    79            deviceName:     "TMS320TI816X",
    80            revision:       "1.0"
    81        };
    82
    83        /* GPP */
    84        readonly config xdc.platform.IExeContext.Cpu GPP = {
    85            id:             "2",
    86            clockRate:      1000.0,  /* Typically set by the HLOS */
    87            catalogName:    "ti.catalog.arm.cortexa8",
    88            deviceName:     "TMS320TI816X",
    89            revision:       "1.0"
    90        };
    91
    92    instance:
    93
    94        override readonly config xdc.platform.IPlatform.Memory
    95            externalMemoryMap[string] = [
    96                ["DDR3_HOST", {
    97                    comment: "DDR3 Memory reserved for use by the A8",
    98                    name: "DDR3_HOST",
    99                    base: 0x80000000,
   100                    len:  0x0B000000    /* 176 MB */
   101                }],
   102                ["DDR3_DSP", {
   103                    comment: "DDR3 Memory reserved for use by the C674",
   104                    name: "DDR3_DSP",
   105                    base: 0x8B000000,
   106                    len:  0x02000000    /* 32 MB */
   107                }],
   108                ["DDR3_SR1", {
   109                    comment: "DDR3 Memory reserved for use by SharedRegion 1",
   110                    name: "DDR3_SR1",
   111                    base: 0x8D000000,
   112                    len:  0x00C00000    /* 12 MB */
   113                }],
   114                ["DDR3_HDVPSS", {
   115                    comment: "DDR3 Memory reserved for use by HDVPSS",
   116                    name: "DDR3_HDVPSS",
   117                    base: 0x8DC00000,
   118                    len:  0x00200000    /* 2 MB */
   119                }],
   120                ["DDR3_V4L2", {
   121                    comment: "DDR3 Memory reserved for use by V4L2",
   122                    name: "DDR3_V4L2",
   123                    base: 0x8DE00000,
   124                    len:  0x00200000    /* 2 MB */
   125                }],
   126                ["DDR3_SR0", {
   127                    comment: "DDR3 Memory reserved for use by SharedRegion 0",
   128                    name: "DDR3_SR0",
   129                    base: 0x8E000000,
   130                    len:  0x01000000    /* 16 MB */
   131                }],
   132                ["DDR3_M3", {
   133                    comment: "DDR3 Memory reserved for use by the M3 core",
   134                    name: "DDR3_M3",
   135                    base: 0x8F000000,
   136                    len:  0x01000000    /* 16 MB */
   137                }],
   138            ];
   139
   140        /*
   141         *  ======== l1PMode ========
   142         *  Define the amount of L1P RAM used for L1 Program Cache.
   143         *
   144         *  Check the device documentation for valid values.
   145         */
   146        config String l1PMode = "32k";
   147
   148        /*
   149         *  ======== l1DMode ========
   150         *  Define the amount of L1D RAM used for L1 Data Cache.
   151         *
   152         *  Check the device documentation for valid values.
   153         */
   154        config String l1DMode = "32k";
   155
   156        /*
   157         *  ======== l2Mode ========
   158         *  Define the amount of L2 RAM used for L2 Cache.
   159         *
   160         *  Check the device documentation for valid values.
   161         */
   162        config String l2Mode = "0k";
   163    };


package ti.platforms.evmTNETV107X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     */
    36
    37    requires ti.catalog.c6000;
    38    requires xdc.platform [1,0,1];
    39
    40    /*!
    41     *  ======== ti.platforms.evmTNETV107X ========
    42     *  Platform package for the DaVinci evmTNETV107X platform.
    43     *
    44     *  This package implements the interfaces (xdc.platform.IPlatform)
    45     *  necessary to build and run executables on the evmTNETV107X platform.
    46     *
    47     *  @a(Throws)
    48     *  `XDCException` exceptions are thrown for fatal errors. The following error
    49     *  codes are reported in the exception message:
    50     *  @p(dlist)
    51     *      -  `ti.platfoms.evmTNETV107X.LINK_TEMPLATE_ERROR`
    52     *           This error is raised when this platform cannot found the default
    53     *           linker command template `linkcmd.xdt` in the build target's
    54     *           package. When a target does not contain this file, the config
    55     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    56     *  @p
    57     */
    58    package ti.platforms.evmTNETV107X [1,0,0,1] {
    59        module Platform;
    60    }


module ti.platforms.evmTNETV107X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmTNETV107X
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     */
    50
    51    metaonly module Platform inherits xdc.platform.IPlatform
    52    {
    53        enum RuntimeEnv {
    54            STDIO,
    55            POSIX,
    56            BIOS
    57        };
    58
    59        readonly config xdc.platform.IPlatform.Board BOARD = {
    60            id:             "0",
    61            boardName:      "evmTNETV107X",
    62            boardFamily:    "evmTNETV107X",
    63            boardRevision:  null,
    64        };
    65
    66        readonly config xdc.platform.IExeContext.Cpu DSP = {
    67            id:             "0",
    68            clockRate:      400.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TNETV107X",
    71            revision:       "1.0",
    72        };
    73
    74        readonly config xdc.platform.IExeContext.Cpu GPP = {
    75            id:             "1",
    76            clockRate:      400.0,
    77            catalogName:    "ti.catalog.arm",
    78            deviceName:     "TNETV107X",
    79            revision:       "1.0",
    80        };
    81
    82    instance:
    83
    84        override readonly config xdc.platform.IPlatform.Memory
    85            externalMemoryMap[string] = [
    86                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x10000000}],
    87            ];
    88
    89        /* default segment for code sections */
    90        override config string codeMemory = "DDR2";
    91
    92        /* default segment for data sections */
    93        override config string dataMemory = "DDR2";
    94
    95        /* default segment for stack sections */
    96        override config string stackMemory = "DDR2";
    97
    98        /*!
    99         *  ======== runTime ========
   100         *  The runtime environment available to executables
   101         */
   102        config RuntimeEnv runTime = STDIO;
   103
   104        /*!
   105         *  ======== singleCore ========
   106         *  no longer used!
   107         * @_nodoc
   108         */
   109        config Bool singleCore = true;
   110
   111        /*
   112         *  ======== l1PMode ========
   113         *  Define the amount of L1P RAM used for L1 Program Cache.
   114         *
   115         *  Check the device documentation for valid values.
   116         */
   117        config String l1PMode = "32k";
   118
   119        /*
   120         *  ======== l1DMode ========
   121         *  Define the amount of L1D RAM used for L1 Data Cache.
   122         *
   123         *  Check the device documentation for valid values.
   124         */
   125        config String l1DMode = "32k";
   126
   127        /*
   128         *  ======== l2Mode ========
   129         *  Define the amount of L2 RAM used for L2 Cache.
   130         *
   131         *  Check the device documentation for valid values.
   132         */
   133        config String l2Mode = "0k";
   134    }


package ti.platforms.evmTNETV2685

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39
    40    /*!
    41     *  ======== ti.platforms.evmTNETV2685 ========
    42     *  Platform package for the evmTNETV2685 platform.
    43     *
    44     *  This package implements the interfaces (xdc.platform.IPlatform)
    45     *  necessary to build and run executables on the evmTNETV2685 platform.
    46     *
    47     *  @a(Throws)
    48     *  `XDCException` exceptions are thrown for fatal errors. The following error
    49     *  codes are reported in the exception message:
    50     *  @p(dlist)
    51     *      -  `ti.platfoms.evmTNETV2685.LINK_TEMPLATE_ERROR`
    52     *           This error is raised when this platform cannot found the default
    53     *           linker command template `linkcmd.xdt` in the build target's
    54     *           package. When a target does not contain this file, the config
    55     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    56     *  @p
    57     */
    58    package ti.platforms.evmTNETV2685 [1,0,1] {
    59        module Platform;
    60    }


module ti.platforms.evmTNETV2685.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the evmTNETV2685
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "evmTNETV2685",
    60            boardFamily:    "evmTNETV2685",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu CPU = {
    65            id:             "0",
    66            clockRate:      500,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320CTNETV2685",
    69            revision:       "",
    70        };
    71
    72    instance:
    73
    74        override readonly config xdc.platform.IPlatform.Memory
    75            externalMemoryMap[string] = [
    76                ["DDR2", {name: "DDR2", base: 0xE0000000, len: 0x10000000}],
    77            ];
    78
    79        override config string codeMemory = "DDR2";
    80
    81        override config string dataMemory = "DDR2";
    82
    83        override config string stackMemory = "DDR2";
    84
    85        /*
    86         *  ======== l1PMode ========
    87         *  Define the amount of L1P RAM used for L1 Program Cache.
    88         *
    89         *  Check the device documentation for valid values.
    90         */
    91        config String l1PMode = "32k";
    92
    93        /*
    94         *  ======== l1DMode ========
    95         *  Define the amount of L1D RAM used for L1 Data Cache.
    96         *
    97         *  Check the device documentation for valid values.
    98         */
    99        config String l1DMode = "32k";
   100
   101        /*
   102         *  ======== l2Mode ========
   103         *  Define the amount of L2 RAM used for L2 Cache.
   104         *
   105         *  Check the device documentation for valid values.
   106         */
   107        config String l2Mode = "0k";
   108    };


package ti.platforms.ezdsp28235

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.ezdsp28235 ========
    38     *  Platform package for the eZdsp28235 platform.
    39     *
    40     *  This package implements the interface (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the eZdsp28235 platform.
    42     */
    43    package ti.platforms.ezdsp28235 [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.ezdsp28235.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  This module implements xdc.IPlatform and defines configuration
    36     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    37     *
    38     *  The configuration parameters are initialized in this package's
    39     *  configuration script (package.cfg) and "bound" to the TCOM object
    40     *  model.  Once they are part of the model, these parameters are
    41     *  queried by a program's configuration script.
    42     *
    43     *  This particular platform has a single Cpu, and therefore, only
    44     *  declares a single CPU configuration object.  Multi-CPU platforms
    45     *  would declare multiple Cpu configuration parameters (one per
    46     *  platform CPU).
    47     *
    48     */
    49
    50    package ti.platforms.ezdsp28235;
    51
    52    metaonly module Platform inherits xdc.platform.IPlatform
    53    {
    54        readonly config xdc.platform.IPlatform.Board BOARD = {
    55            id:             "0",
    56            boardName:      "ezdsp28235",
    57            boardFamily:    "ezdsp28235",
    58            boardRevision:  null
    59        };
    60
    61        readonly config xdc.platform.IExeContext.Cpu   CPU = {
    62            id:             "0",
    63            clockRate:      150.0,
    64            catalogName:    "ti.catalog.c2800",
    65            deviceName:     "TMS320C28235",
    66            revision:       null
    67        };
    68
    69    instance:
    70
    71        override readonly config xdc.platform.IPlatform.MemoryMap
    72            externalMemoryMap = [
    73                ["SRAM",
    74                    {
    75                        name: "SRAM",
    76                        base: 0x200000,
    77                        len:  0x020000,
    78                        page: 0,
    79                        space: "code/data",
    80                    }
    81                ],
    82            ];
    83
    84        override config string codeMemory = "SRAM";
    85
    86        override config string dataMemory = "SRAM";
    87
    88        override config string stackMemory = "L03SARAM";
    89
    90    };


package ti.platforms.ezdsp28335

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.ezdsp28335 ========
    38     *  Platform package for the eZdsp28335 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the eZdsp28335 platform.
    42     */
    43    package ti.platforms.ezdsp28335 [1,0,0] {
    44        module Platform;
    45    }


module ti.platforms.ezdsp28335.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  This module implements xdc.IPlatform and defines configuration
    36     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    37     *
    38     *  The configuration parameters are initialized in this package's
    39     *  configuration script (package.cfg) and "bound" to the TCOM object
    40     *  model.  Once they are part of the model, these parameters are
    41     *  queried by a program's configuration script.
    42     *
    43     *  This particular platform has a single Cpu, and therefore, only
    44     *  declares a single CPU configuration object.  Multi-CPU platforms
    45     *  would declare multiple Cpu configuration parameters (one per
    46     *  platform CPU).
    47     *
    48     */
    49
    50    package ti.platforms.ezdsp28335;
    51
    52    metaonly module Platform inherits xdc.platform.IPlatform
    53    {
    54        readonly config xdc.platform.IPlatform.Board BOARD = {
    55            id:             "0",
    56            boardName:      "ezdsp28335",
    57            boardFamily:    "ezdsp28335",
    58            boardRevision:  null
    59        };
    60
    61        readonly config xdc.platform.IExeContext.Cpu CPU = {
    62            id:             "0",
    63            clockRate:      150.0,
    64            catalogName:    "ti.catalog.c2800",
    65            deviceName:     "TMS320C28335",
    66            revision:       null
    67        };
    68
    69    instance:
    70
    71        override readonly config xdc.platform.IPlatform.MemoryMap
    72            externalMemoryMap = [
    73                ["SRAM",
    74                    {
    75                        name: "SRAM",
    76                        base: 0x200000,
    77                        len:  0x020000,
    78                        page: 0,
    79                        space: "code/data",
    80                    }
    81                ],
    82            ];
    83
    84        override config string codeMemory = "SRAM";
    85
    86        override config string dataMemory = "SRAM";
    87
    88        override config string stackMemory = "L03SARAM";
    89
    90    };


package ti.platforms.generic

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34
    35    /*!
    36     *  ======== ti.platforms.generic ========
    37     *  Platform package for the generic platform.
    38     *
    39     *  This package implements the interfaces (xdc.platform.IPlatform)
    40     *  necessary to build and run executables on a "generic" platform; a
    41     *  platform specified by:
    42     *  @p(blist)
    43     *      - device name; e.g., "TMS320C2812"
    44     *      - catalog name; the name of a package containing the device named above
    45     *      - clock rate; the clock rate in MHz of the CPU
    46     *      - external memory map; an array of memory blocks external to the device
    47     *  @p
    48     *  For a complate list of parameters that can be specified when creating a
    49     *  platform instance see the instance configuration parameters specified
    50     *  by `{@link ti.platforms.generic.Platform}`.  This list, of course,
    51     *  includes all the instance config parameters specified by the
    52     *  `{@link xdc.platform.IPlatform}` interface.
    53     *
    54     *
    55     *  @a(Throws)
    56     *  `XDCException` exceptions are thrown for fatal errors. The following error
    57     *  codes are reported in the exception message:
    58     *  @p(dlist)
    59     *      -  `ti.platfoms.generic.LINK_TEMPLATE_ERROR`
    60     *           This error is raised when this platform cannot found the default
    61     *           linker command template `linkcmd.xdt` in the build target's
    62     *           package. When a target does not contain this file, the config
    63     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    64     *  @p
    65     *
    66     *  @a(EXAMPLES)
    67     *  Example 1: Suppose you need to create an application for a HW platform
    68     *  that uses the TMS320C2812 running at 150 MHz.  You can use this package
    69     *  (in lieu of one specifically created for the HW platform) by defining a
    70     *  named instance of this package's Platform module.  Add the following
    71     *  statements to your `config.bld` file to add the platform instance named
    72     *  "ti.platforms.generic:C28".
    73     *  @p(code)
    74     *      Build.platformTable["ti.platforms.generic:C28"] = {
    75     *          clockRate:   150,
    76     *          catalogName: "ti.catalog.c2800",
    77     *          deviceName:  "TMS320C2812"
    78     *      };
    79     *  @p
    80     *  With this name defined, it is now possible to configure an application
    81     *  using the platform instance name "ti.platforms.generic:C28".  For example,
    82     *  if you are using `{@link xdc.tools.configuro}` to configure your
    83     *  application, the string "ti.platforms.generic:C28" can now be used to
    84     *  identify your platform:
    85     *  @p(code)
    86     *      xs xdc.tools.configuro -b config.bld -p ti.platforms.generic:C28 ...
    87     *  @p
    88     *
    89     *  @p(html)
    90     *  <hr/>
    91     *  @p
    92     *
    93     *  Example 2: The following example illustrates how to specify a platform
    94     *  instance with memory regions external to the specified device.  In this
    95     *  case, we define a platform using a TMS320C6416 running at 600 MHz on a
    96     *  board with two external SDRAM memory blocks.
    97     *  @p(code)
    98     *      Build.platformTable["ti.platforms.generic:C64"] = {
    99     *          clockRate:          600,
   100     *          catalogName:        "ti.catalog.c6000",
   101     *          deviceName:         "TMS320C6416",
   102     *          externalMemoryMap : [
   103     *              ["SDRAM1", {
   104     *                  name: "SDRAM1",
   105     *                  base: 0x80000000, len: 0x1000000, space: "code/data"
   106     *              }],
   107     *              ["SDRAM2", {
   108     *                  name: "SDRAM2",
   109     *                  base: 0x90000000, len: 0x1000000, space: "code/data"
   110     *              }],
   111     *          ]
   112     *      }
   113     *  @p
   114     *
   115     *  The `externalMemoryMap` attribute is a map of string names to
   116     *  `{@link xdc.platform.IPlatform#Memory}` structures.
   117     *
   118     *  @see ti.platforms.generic.Platform
   119     *  @see xdc.bld.BuildEnvironment#platformTable
   120     *  @see xdc.platform.IPlatform
   121     */
   122    package ti.platforms.generic [1,0,0,1] {
   123        module Platform;
   124    }


module ti.platforms.generic.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.generic;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  A generic platform that supports any HW platform
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "generic",
    61            boardFamily:    null,
    62            boardRevision:  null
    63        };
    64
    65    instance:
    66
    67        config xdc.platform.IExeContext.Cpu CPU = {
    68            id:             "0",
    69            clockRate:      0,
    70            catalogName:    null,
    71            deviceName:     null,
    72            revision:       "",
    73        };
    74
    75        /*!
    76         *  ======== deviceName ========
    77         *  The CPU simulated by this simulator platform.
    78         *
    79         *  This parameter is required.
    80         */
    81        config string deviceName;
    82
    83        /*!
    84         *  ======== catalogName ========
    85         *  The name of the package that contains the module 'deviceName'.
    86         *
    87         *  This parameter is required.
    88         */
    89        config string catalogName;
    90
    91        /*!
    92         *  ======== clockRate ========
    93         *  The clock rate in MHz for the simulated device.
    94         *
    95         *  This parameter is required. There are no checks if the simulated device
    96         *  supports the given clock rate.
    97         */
    98        config Double clockRate;
    99
   100        override config string codeMemory = null;
   101
   102        override config string dataMemory = null;
   103
   104        override config string stackMemory = null;
   105
   106        /*
   107         *  ======== l1PMode ========
   108         *  Define the amount of L1P RAM used for L1 Program Cache on C6000 devices.
   109         *
   110         *  Check the device documentation for valid values.
   111         */
   112        config String l1PMode = "32k";
   113
   114        /*
   115         *  ======== l1DMode ========
   116         *  Define the amount of L1D RAM used for L1 Data Cache on C6000 devices.
   117         *
   118         *  Check the device documentation for valid values.
   119         */
   120        config String l1DMode = "32k";
   121
   122        /*
   123         *  ======== l2Mode ========
   124         *  Define the amount of L2 RAM used for L2 Cache on C6000 devices.
   125         *
   126         *  Check the device documentation for valid values.
   127         */
   128        config String l2Mode = "0k";
   129    };


package ti.platforms.idkAM571X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     */
    36    requires ti.catalog.c6000;
    37    requires ti.catalog.arm.cortexm4;
    38    requires ti.catalog.arm.cortexa15;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.idkAM571X ========
    43     *  Platform package for the AM571X SDP.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the AM571X SDP platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platforms.idkAM571X.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.idkAM571X [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.idkAM571X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for idkAM571X
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for idkAM571X
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has 1 Cortex-A15, 2 Benelli/IPU
    51     *  Sub-system (Dual M4's) and 1 C66x DSP's.
    52     */
    53    metaonly module Platform inherits xdc.platform.IPlatform
    54    {
    55        readonly config xdc.platform.IPlatform.Board BOARD = {
    56            id:             "0",
    57            boardName:      "idkAM571X",
    58            boardFamily:    "idkAM571X",
    59            boardRevision:  null,
    60        };
    61
    62        readonly config xdc.platform.IExeContext.Cpu DSP = {
    63            id:             "0",
    64            clockRate:      700,
    65            catalogName:    "ti.catalog.c6000",
    66            deviceName:     "DRA7XX",
    67            revision:       "1.0",
    68        };
    69
    70        /* Benelli M4 Subsystem */
    71        readonly config xdc.platform.IExeContext.Cpu M4 = {
    72            id:             "1",
    73            clockRate:      212.8,
    74            catalogName:    "ti.catalog.arm.cortexm4",
    75            deviceName:     "DRA7XX",
    76            revision:       "1.0",
    77        };
    78
    79        /* GPP */
    80        readonly config xdc.platform.IExeContext.Cpu GPP = {
    81            id:             "3",
    82            clockRate:      1500.0,  /* Typically set by the HLOS */
    83            catalogName:    "ti.catalog.arm.cortexa15",
    84            deviceName:     "DRA7XX",
    85            revision:       "1.0"
    86        };
    87
    88    /*  Memory Map for ti.platforms.idkAM571X
    89     *
    90     *  Virtual     Physical        Size            Comment
    91     *  ------------------------------------------------------------------------
    92     *              8000_0000  1000_0000  ( 256 MB) External Memory
    93     *
    94     *  0000_0000 0 8000_0000        100  ( 256  B) --------
    95     *              8000_0100       FF00  ( ~64 KB) --------
    96     *  0000_0000   8001_0000        100  ( 256  B) --------
    97     *              8001_0100       FF00  ( ~64 KB) --------
    98     *  0000_0000   8002_0000        100  ( 256  B) --------
    99     *              8002_0100       FF00  ( ~64 KB) --------
   100     *  0000_0000   8003_0000        100  ( 256  B) --------
   101     *              8003_0100    FE_FF00  ( ~16 MB) --------
   102     *            1 8100_0000    40_0000  (   4 MB) --------
   103     *              8140_0000    C0_0000  (  12 MB) --------
   104     *            2 8200_0000    40_0000  (   4 MB) --------
   105     *              8240_0000    C0_0000  (  12 MB) --------
   106     *            3 8300_0000    40_0000  (   4 MB) --------
   107     *              8340_0000    C0_0000  (  12 MB) --------
   108     *            4 8400_0000    40_0000  (   4 MB) --------
   109     *              8440_0000    C0_0000  (  12 MB) --------
   110     *            5 8500_0000   100_0000  (  16 MB) --------
   111     *            6 8600_0000   100_0000  (  16 MB) --------
   112     *            7 8700_0000   100_0000  (  16 MB) --------
   113     *            8 8800_0000   100_0000  (  16 MB) --------
   114     *            9 8900_0000   100_0000  (  16 MB) --------
   115     *            A 8A00_0000    80_0000  (   8 MB) IPU1 (code, data), benelli
   116     *              8A80_0000    80_0000  (   8 MB) IPU2 (code, data), benelli
   117     *            B 8B00_0000   100_0000  (  16 MB) HOST (code, data)
   118     *            C 8C00_0000   100_0000  (  16 MB) DSP1 (code, data)
   119     *            D 8D00_0000   100_0000  (  16 MB) --------
   120     *            E 8E00_0000   100_0000  (  16 MB) SR_0 (ipc)
   121     *            F 8F00_0000   100_0000  (  16 MB) --------
   122     */
   123
   124        readonly config Any SR_0 = {
   125            name: "SR_0", space: "data", access: "RWX",
   126            base: 0x8E000000, len: 0x1000000,
   127            comment: "SR#0 Memory (16 MB)"
   128        };
   129
   130        readonly config Any DSP1 = {
   131            externalMemoryMap: [
   132                [ "DSP1_PROG", {
   133                    name: "DSP1_PROG", space: "code/data", access: "RWX",
   134                    base: 0x8C000000, len: 0x1000000,
   135                    comment: "DSP1 Program Memory (16 MB)"
   136                }],
   137                [ "SR_0", SR_0 ]
   138            ],
   139            codeMemory:  "DSP1_PROG",
   140            dataMemory:  "DSP1_PROG",
   141            stackMemory: "DSP1_PROG",
   142            l1DMode: "32k",
   143            l1PMode: "32k",
   144            l2Mode: "128k"
   145        };
   146
   147        readonly config Any IPU1 = {
   148            externalMemoryMap: [
   149                [ "IPU1_PROG", {
   150                    name: "IPU1_PROG", space: "code/data", access: "RWX",
   151                    base: 0x8A000000, len: 0x800000,
   152                    comment: "IPU1 Program Memory (8 MB)"
   153                }],
   154                [ "SR_0", SR_0 ]
   155            ],
   156            codeMemory:  "IPU1_PROG",
   157            dataMemory:  "IPU1_PROG",
   158            stackMemory: "IPU1_PROG"
   159        };
   160
   161        readonly config Any IPU2 = {
   162            externalMemoryMap: [
   163                [ "IPU2_PROG", {
   164                    name: "IPU2_PROG", space: "code/data", access: "RWX",
   165                    base: 0x8A800000, len: 0x800000,
   166                    comment: "IPU2 Program Memory (8 MB)"
   167                }],
   168                [ "SR_0", SR_0 ]
   169            ],
   170            codeMemory:  "IPU2_PROG",
   171            dataMemory:  "IPU2_PROG",
   172            stackMemory: "IPU2_PROG"
   173        };
   174
   175        readonly config Any HOST = {
   176            externalMemoryMap: [
   177                [ "HOST_PROG", {
   178                    name: "HOST_PROG", space: "code/data", access: "RWX",
   179                    base: 0x8B000000, len: 0x1000000,
   180                    comment: "HOST Program Memory (16 MB)"
   181                }],
   182                [ "SR_0", SR_0 ]
   183            ],
   184            codeMemory:  "HOST_PROG",
   185            dataMemory:  "HOST_PROG",
   186            stackMemory: "HOST_PROG"
   187        };
   188
   189    instance:
   190
   191        /*!
   192         *  ======== externalMemoryMap ========
   193         *  Memory regions as defined in the idkAM571X Specification
   194         */
   195        override readonly config xdc.platform.IPlatform.Memory
   196            externalMemoryMap[string] = [
   197                ["EXT_RAM", {
   198                    comment: "2 GB External RAM Memory",
   199                    name: "EXT_RAM",
   200                    base: 0x80000000,
   201                    len:  0x80000000
   202                }]
   203            ];
   204
   205        /*
   206         *  ======== l1PMode ========
   207         *  Define the amount of L1P RAM used for L1 Program Cache.
   208         *
   209         *  Check the device documentation for valid values.
   210         */
   211        config String l1PMode = "32k";
   212
   213        /*
   214         *  ======== l1DMode ========
   215         *  Define the amount of L1D RAM used for L1 Data Cache.
   216         *
   217         *  Check the device documentation for valid values.
   218         */
   219        config String l1DMode = "32k";
   220
   221        /*
   222         *  ======== l2Mode ========
   223         *  Define the amount of L2 RAM used for L2 Cache.
   224         *
   225         *  Check the device documentation for valid values.
   226         */
   227        config String l2Mode = "0k";
   228    };


package ti.platforms.idkAM572X

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     */
    36    requires ti.catalog.c6000;
    37    requires ti.catalog.arm.cortexm4;
    38    requires ti.catalog.arm.cortexa15;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.idkAM572X ========
    43     *  Platform package for the AM572X SDP.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the AM572X SDP platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platforms.idkAM572X.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.idkAM572X [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.idkAM572X.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for idkAM572X
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for idkAM572X
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has 1 Cortex-A15, 2 Benelli/IPU
    51     *  Sub-system (Dual M4's) and 2 C66x DSP's.
    52     */
    53    metaonly module Platform inherits xdc.platform.IPlatform
    54    {
    55        readonly config xdc.platform.IPlatform.Board BOARD = {
    56            id:             "0",
    57            boardName:      "idkAM572X",
    58            boardFamily:    "idkAM572X",
    59            boardRevision:  null,
    60        };
    61
    62        readonly config xdc.platform.IExeContext.Cpu DSP = {
    63            id:             "0",
    64            clockRate:      700,
    65            catalogName:    "ti.catalog.c6000",
    66            deviceName:     "DRA7XX",
    67            revision:       "1.0",
    68        };
    69
    70        /* Benelli M4 Subsystem */
    71        readonly config xdc.platform.IExeContext.Cpu M4 = {
    72            id:             "1",
    73            clockRate:      212.8,
    74            catalogName:    "ti.catalog.arm.cortexm4",
    75            deviceName:     "DRA7XX",
    76            revision:       "1.0",
    77        };
    78
    79        /* GPP */
    80        readonly config xdc.platform.IExeContext.Cpu GPP = {
    81            id:             "3",
    82            clockRate:      1500.0,  /* Typically set by the HLOS */
    83            catalogName:    "ti.catalog.arm.cortexa15",
    84            deviceName:     "DRA7XX",
    85            revision:       "1.0"
    86        };
    87
    88    /*  Memory Map for ti.platforms.idkAM572X
    89     *
    90     *  Virtual     Physical        Size            Comment
    91     *  ------------------------------------------------------------------------
    92     *              8000_0000  1000_0000  ( 256 MB) External Memory
    93     *
    94     *  0000_0000 0 8000_0000        100  ( 256  B) --------
    95     *              8000_0100       FF00  ( ~64 KB) --------
    96     *  0000_0000   8001_0000        100  ( 256  B) --------
    97     *              8001_0100       FF00  ( ~64 KB) --------
    98     *  0000_0000   8002_0000        100  ( 256  B) --------
    99     *              8002_0100       FF00  ( ~64 KB) --------
   100     *  0000_0000   8003_0000        100  ( 256  B) --------
   101     *              8003_0100    FE_FF00  ( ~16 MB) --------
   102     *            1 8100_0000    40_0000  (   4 MB) --------
   103     *              8140_0000    C0_0000  (  12 MB) --------
   104     *            2 8200_0000    40_0000  (   4 MB) --------
   105     *              8240_0000    C0_0000  (  12 MB) --------
   106     *            3 8300_0000    40_0000  (   4 MB) --------
   107     *              8340_0000    C0_0000  (  12 MB) --------
   108     *            4 8400_0000    40_0000  (   4 MB) --------
   109     *              8440_0000    C0_0000  (  12 MB) --------
   110     *            5 8500_0000   100_0000  (  16 MB) --------
   111     *            6 8600_0000   100_0000  (  16 MB) --------
   112     *            7 8700_0000   100_0000  (  16 MB) --------
   113     *            8 8800_0000   100_0000  (  16 MB) --------
   114     *            9 8900_0000   100_0000  (  16 MB) --------
   115     *            A 8A00_0000    80_0000  (   8 MB) IPU1 (code, data), benelli
   116     *              8A80_0000    80_0000  (   8 MB) IPU2 (code, data), benelli
   117     *            B 8B00_0000   100_0000  (  16 MB) HOST (code, data)
   118     *            C 8C00_0000   100_0000  (  16 MB) DSP1 (code, data)
   119     *            D 8D00_0000   100_0000  (  16 MB) DSP2 (code, data)
   120     *            E 8E00_0000   100_0000  (  16 MB) SR_0 (ipc)
   121     *            F 8F00_0000   100_0000  (  16 MB) --------
   122     */
   123
   124        readonly config Any SR_0 = {
   125            name: "SR_0", space: "data", access: "RWX",
   126            base: 0x8E000000, len: 0x1000000,
   127            comment: "SR#0 Memory (16 MB)"
   128        };
   129
   130        readonly config Any DSP1 = {
   131            externalMemoryMap: [
   132                [ "DSP1_PROG", {
   133                    name: "DSP1_PROG", space: "code/data", access: "RWX",
   134                    base: 0x8C000000, len: 0x1000000,
   135                    comment: "DSP1 Program Memory (16 MB)"
   136                }],
   137                [ "SR_0", SR_0 ]
   138            ],
   139            codeMemory:  "DSP1_PROG",
   140            dataMemory:  "DSP1_PROG",
   141            stackMemory: "DSP1_PROG",
   142            l1DMode: "32k",
   143            l1PMode: "32k",
   144            l2Mode: "128k"
   145        };
   146
   147        readonly config Any DSP2 = {
   148            externalMemoryMap: [
   149                [ "DSP2_PROG", {
   150                    name: "DSP2_PROG", space: "code/data", access: "RWX",
   151                    base: 0x8D000000, len: 0x1000000,
   152                    comment: "DSP2 Program Memory (16 MB)"
   153                }],
   154                [ "SR_0", SR_0 ]
   155            ],
   156            codeMemory:  "DSP2_PROG",
   157            dataMemory:  "DSP2_PROG",
   158            stackMemory: "DSP2_PROG",
   159            l1DMode: "32k",
   160            l1PMode: "32k",
   161            l2Mode: "128k"
   162        };
   163
   164        readonly config Any IPU1 = {
   165            externalMemoryMap: [
   166                [ "IPU1_PROG", {
   167                    name: "IPU1_PROG", space: "code/data", access: "RWX",
   168                    base: 0x8A000000, len: 0x800000,
   169                    comment: "IPU1 Program Memory (8 MB)"
   170                }],
   171                [ "SR_0", SR_0 ]
   172            ],
   173            codeMemory:  "IPU1_PROG",
   174            dataMemory:  "IPU1_PROG",
   175            stackMemory: "IPU1_PROG"
   176        };
   177
   178        readonly config Any IPU2 = {
   179            externalMemoryMap: [
   180                [ "IPU2_PROG", {
   181                    name: "IPU2_PROG", space: "code/data", access: "RWX",
   182                    base: 0x8A800000, len: 0x800000,
   183                    comment: "IPU2 Program Memory (8 MB)"
   184                }],
   185                [ "SR_0", SR_0 ]
   186            ],
   187            codeMemory:  "IPU2_PROG",
   188            dataMemory:  "IPU2_PROG",
   189            stackMemory: "IPU2_PROG"
   190        };
   191
   192        readonly config Any HOST = {
   193            externalMemoryMap: [
   194                [ "HOST_PROG", {
   195                    name: "HOST_PROG", space: "code/data", access: "RWX",
   196                    base: 0x8B000000, len: 0x1000000,
   197                    comment: "HOST Program Memory (16 MB)"
   198                }],
   199                [ "SR_0", SR_0 ]
   200            ],
   201            codeMemory:  "HOST_PROG",
   202            dataMemory:  "HOST_PROG",
   203            stackMemory: "HOST_PROG"
   204        };
   205
   206    instance:
   207
   208        /*!
   209         *  ======== externalMemoryMap ========
   210         *  Memory regions as defined in the idkAM572X Specification
   211         */
   212        override readonly config xdc.platform.IPlatform.Memory
   213            externalMemoryMap[string] = [
   214                ["EXT_RAM", {
   215                    comment: "2 GB External RAM Memory",
   216                    name: "EXT_RAM",
   217                    base: 0x80000000,
   218                    len:  0x80000000
   219                }]
   220            ];
   221
   222        /*
   223         *  ======== l1PMode ========
   224         *  Define the amount of L1P RAM used for L1 Program Cache.
   225         *
   226         *  Check the device documentation for valid values.
   227         */
   228        config String l1PMode = "32k";
   229
   230        /*
   231         *  ======== l1DMode ========
   232         *  Define the amount of L1D RAM used for L1 Data Cache.
   233         *
   234         *  Check the device documentation for valid values.
   235         */
   236        config String l1DMode = "32k";
   237
   238        /*
   239         *  ======== l2Mode ========
   240         *  Define the amount of L2 RAM used for L2 Cache.
   241         *
   242         *  Check the device documentation for valid values.
   243         */
   244        config String l2Mode = "0k";
   245    };


package ti.platforms.load6x

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.load6x ========
    38     *  Platform package for the load6x platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the sim6xxx platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.load6x.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.load6x [1,0,1,1] {
    55        module Platform;
    56    }


module ti.platforms.load6x.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.load6x;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Simulation-based Platform support for 6xxx platforms
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        /*!
    59         *  ======== BOARD ========
    60         *  This platform's board attributes
    61         */
    62        readonly config xdc.platform.IPlatform.Board BOARD = {
    63            id:             "0",
    64            boardName:      "sim6xxx",
    65            boardFamily:    "sim6xxx",
    66            boardRevision:  null
    67        };
    68
    69        /*!
    70         *  ======== CPU ========
    71         *  The CPU simulated by this platform.
    72         *
    73         *  The device simulated is determined by the platform instance name
    74         *  or if this does not name a ti.catalog.c6000 module, we simulate
    75         *  a TMS320C6416.
    76         */
    77        readonly config xdc.platform.IExeContext.Cpu CPU = {
    78            id:             "0",
    79            clockRate:      600.0,
    80            catalogName:    "ti.catalog.c6000",
    81            deviceName:     "TMS320C6416",
    82            revision:       "",
    83        };
    84
    85    instance:
    86
    87        /*!
    88         *  ======== deviceName ========
    89         *  The CPU simulated by this simulator platform.
    90         *
    91         *  This parameter is optional. If it's not set, then the Platform module
    92         *  parameter CPU.deviceName is used.
    93         */
    94        config string deviceName;
    95
    96        override readonly config xdc.platform.IPlatform.Memory
    97            externalMemoryMap[string] = [
    98                //["IRAM", {name: "IRAM", base: 0x00000200, len: 0x0000FE00}],
    99                ["EXT0", {name: "EXT0", base: 0x00400000, len: 0x00400000}],
   100                ["EXT1", {name: "EXT1", base: 0x01000000, len: 0x00800000}],
   101                ["EXT2", {name: "EXT2", base: 0x02000000, len: 0x01000000}],
   102                ["EXT3", {name: "EXT3", base: 0x03000000, len: 0x01000000}],
   103                ["BMEM", {name: "BMEM", base: 0x80000000, len: 0x00010000}],
   104            ];
   105
   106        override config string codeMemory = "IRAM";
   107
   108        override config string dataMemory = "EXT3";
   109
   110        override config string stackMemory = "BMEM";
   111
   112        /*
   113         *  ======== l1PMode ========
   114         *  Define the amount of L1P RAM used for L1 Program Cache.
   115         *
   116         *  Check the device documentation for valid values.
   117         */
   118        config String l1PMode = "32k";
   119
   120        /*
   121         *  ======== l1DMode ========
   122         *  Define the amount of L1D RAM used for L1 Data Cache.
   123         *
   124         *  Check the device documentation for valid values.
   125         */
   126        config String l1DMode = "32k";
   127
   128        /*
   129         *  ======== l2Mode ========
   130         *  Define the amount of L2 RAM used for L2 Cache.
   131         *
   132         *  Check the device documentation for valid values.
   133         */
   134        config String l2Mode = "0k";
   135    };


package ti.platforms.msp430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.msp430;
    35
    36    /*!
    37     *  ======== ti.platforms.msp430 ========
    38     *  Platform support for any MSP430 device
    39     */
    40    package ti.platforms.msp430 [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.msp430.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.msp430;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any MSP430 device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.msp430:MSP430F2274"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.msp430:MSP430F5438");
    52     *  @
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "msp430",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName` and `includeLinkCmdFile`
    68         *  can be encoded in the instance name supplied on `xdc.tools.configuro`
    69         *  command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.MSP430:MSP430F5438:1
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.MSP430:MSP430F5438
    76         *  @p
    77         */
    78         readonly config String nameFormat = "$(deviceName):$(includeLinkCmdFile)";
    79
    80    instance:
    81
    82        config xdc.platform.IExeContext.Cpu CPU = {
    83            id:             "0",
    84            clockRate:      1.0,
    85            catalogName:    "ti.catalog.msp430",
    86            deviceName:     "MSP430",
    87            revision:       "",
    88        };
    89
    90        /*!
    91         *  ======== deviceName ========
    92         *  The name of an `ICpuDataSheet` module for the device
    93         *
    94         *  This parameter is optional; the device name name also be specified
    95         *  in the name of the the instance.
    96         */
    97        config String deviceName;
    98
    99        /*!
   100         *  ======== clockRate ========
   101         *  The clock rate for this device.
   102         */
   103        config Double clockRate = 1.0;
   104
   105        override config String codeMemory = null;
   106
   107        override config String dataMemory = null;
   108
   109        override config String stackMemory = null;
   110
   111        /*!
   112         *  ======== includeLinkCmdFile ========
   113         *  Include the default linker command file for the specified device
   114         *
   115         *  By default, the user is responsible for adding a linker command file
   116         *  that defines the device memory map to the linker command line.
   117         *  However, if this flag is set, this platform will include a default
   118         *  linker command file for the selected device.
   119         *
   120         *  The default linker command files are found along the package path.
   121         */
   122        config Bool includeLinkCmdFile = false;
   123    };


package ti.platforms.rf432s0xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.arm.cortexm0;
    35
    36    /*!
    37     *  ======== ti.platforms.rf432s0xx ========
    38     *  Platform support for any RF432Sxx device
    39     */
    40    package ti.platforms.rf432s0xx [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.rf432s0xx.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.rf432s0xx;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any rf432s0xx device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.rf432s0xx:RF432S0xx"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.rf432s0xx:RF432S0xx");
    52     *  @p
    53     */
    54    @Template ("./Platform.xdt")
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "rf432s0xx",
    60            boardFamily:    null,
    61            boardRevision:  null
    62        };
    63
    64        /*!
    65         *  ======== nameFormat ========
    66         *  Encoding of instance creation parameters in the instance's name
    67         *
    68         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    69         *  and `clockRate` can be encoded in the instance name supplied on
    70         *  `xdc.tools.configuro` command line, for example:
    71         *  @p(code)
    72         *      xs xdc.tools.configuro ... -p ti.platforms.rf432s0xx:RF432S0xx:1:20
    73         *  @p
    74         *  Optional parameters can be omitted:
    75         *  @p(code)
    76         *      xs xdc.tools.configuro ... -p ti.platforms.rf432s0xx:RF432S0xx
    77         *  @p
    78         */
    79         readonly config string nameFormat
    80             = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    81
    82        /*!
    83         *  ======== useGnuRomLinkCmd ========
    84         *  Use ROM compatible linker script when building using GNU tools
    85         *
    86         *  If this config param is set to true and "includeLinkCmdFile" is true,
    87         *  the ROM compatible linker script will be used. The ROM compatible
    88         *  linker script is required when building a ROM based application.
    89         */
    90         config Bool useGnuRomLinkCmd = false;
    91
    92    instance:
    93
    94        config xdc.platform.IExeContext.Cpu CPU = {
    95            id:             "0",
    96            clockRate:      8.0,
    97            catalogName:    "ti.catalog.arm.cortexm0",
    98            deviceName:     "RF432S0xx",
    99            revision:       "",
   100        };
   101
   102        /*!
   103         *  ======== deviceName ========
   104         *  The name of an `ICpuDataSheet` module for the device
   105         *
   106         *  This parameter is required, but it does not have to be set explicitly;
   107         *  it can be encoded in the instance's name.
   108         */
   109        config string deviceName;
   110
   111        /*!
   112         *  ======== clockRate ========
   113         *  The clock rate for this device.
   114         */
   115        config Double clockRate;
   116
   117        override config string codeMemory = null;
   118
   119        override config string dataMemory = null;
   120
   121        override config string stackMemory = null;
   122
   123        /*!
   124         *  ======== includeLinkCmdFile ========
   125         *  The flag that specifies if the platform should include a linker command
   126         *  file.
   127         *
   128         *  By default, a user is responsible for adding a linker command file to
   129         *  the project, or to the linker command line. However, if this flag is
   130         *  set, this platform will include a default linker command file for the
   131         *  selected device.
   132         */
   133        config Bool includeLinkCmdFile = false;
   134    };


package ti.platforms.sdp3430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.sdp3430 ========
    44     *  Platform package for the sdp3430 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the sdp3430 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.sdp3430.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.sdp3430 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.sdp3430.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the sdp3430
    41     *
    42     *  This module implements xdc.platform.IPlatform and defines configuration
    43     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    44     *
    45     *  The configuration parameters are initialized in this package's
    46     *  configuration script (package.cfg) and "bound" to the TCOM object
    47     *  model.  Once they are part of the model, these parameters are
    48     *  queried by a program's configuration script.
    49     *
    50     *  This particular platform has a single Cpu, and therefore, only
    51     *  declares a single CPU configuration object.  Multi-CPU platforms
    52     *  would declare multiple Cpu configuration parameters (one per
    53     *  platform CPU).
    54     */
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        readonly config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "sdp3430",
    60            boardFamily:    "sdp3430",
    61            boardRevision:  null,
    62        };
    63
    64        readonly config xdc.platform.IExeContext.Cpu DSP = {
    65            id:             "0",
    66            clockRate:      312.4,
    67            catalogName:    "ti.catalog.c6000",
    68            deviceName:     "TMS320C3430",
    69            revision:       "",
    70        };
    71
    72        readonly config xdc.platform.IExeContext.Cpu GPP = {
    73            id:             "1",
    74            clockRate:      476.25,
    75            catalogName:    "ti.catalog.arm.cortexa8",
    76            deviceName:     "TMS320C3430",
    77            revision:       "1.0",
    78        };
    79
    80    instance:
    81
    82        override readonly config xdc.platform.IPlatform.Memory
    83            externalMemoryMap[string] = [
    84                ["SDRAM", {name: "SDRAM", base: 0x80000000, len: 0x8000000}],
    85            ];
    86
    87        override config string codeMemory = "SDRAM";
    88
    89        override config string dataMemory = "SDRAM";
    90
    91        override config string stackMemory = "SDRAM";
    92
    93        /*
    94         *  ======== l1PMode ========
    95         *  Define the amount of L1P RAM used for L1 Program Cache.
    96         *
    97         *  Check the device documentation for valid values.
    98         */
    99        config String l1PMode = "32k";
   100
   101        /*
   102         *  ======== l1DMode ========
   103         *  Define the amount of L1D RAM used for L1 Data Cache.
   104         *
   105         *  Check the device documentation for valid values.
   106         */
   107        config String l1DMode = "32k";
   108
   109        /*
   110         *  ======== l2Mode ========
   111         *  Define the amount of L2 RAM used for L2 Cache.
   112         *
   113         *  Check the device documentation for valid values.
   114         */
   115        config String l2Mode = "0k";
   116    };


package ti.platforms.sdp4430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa9;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.sdp4430 ========
    44     *  Platform package for the OMAP4430 SDP.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the OMAP4430 SDP platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platforms.sdp4430.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.sdp4430 [1,0,0,0] {
    61        module Platform;
    62    }


module ti.platforms.sdp4430.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for sdp4430
    36     *
    37     */
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for OMAP4430
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    52     *  C64T DSP.
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "sdp4430",
    59            boardFamily:    "sdp4430",
    60            boardRevision:  null,
    61        };
    62
    63        readonly config xdc.platform.IExeContext.Cpu GEM = {
    64            id:             "0",
    65            clockRate:      466,
    66            catalogName:    "ti.catalog.c6000",
    67            deviceName:     "OMAP4430",
    68            revision:       "1.0",
    69        };
    70
    71        /* M3 Subsystem */
    72        readonly config xdc.platform.IExeContext.Cpu DSS = {
    73            id:             "1",
    74            clockRate:      200.0,
    75            catalogName:    "ti.catalog.arm.cortexm3",
    76            deviceName:     "OMAP4430",
    77            revision:       "1.0",
    78        };
    79
    80        /* GPP */
    81        readonly config xdc.platform.IExeContext.Cpu GPP = {
    82            id:             "2",
    83            clockRate:      720.0,  /* Typically set by the HLOS */
    84            catalogName:    "ti.catalog.arm.cortexa9",
    85            deviceName:     "OMAP4430",
    86            revision:       "1.0"
    87        };
    88
    89    instance:
    90
    91        /*!
    92         *  ======== externalMemoryMap ========
    93         *  Memory regions as defined in the OMAP4 Functional Specification
    94         */
    95
    96        override readonly config xdc.platform.IPlatform.Memory
    97            externalMemoryMap[string] = [
    98
    99                ["EXT_RAM", {
   100                    comment: "External RAM",
   101                    name: "EXT_RAM",
   102                    base: 0x80000000,
   103                    len:  0x20000000
   104                }],
   105
   106            ];
   107
   108        override config string codeMemory  = "EXT_RAM";
   109        override config string dataMemory  = "EXT_RAM";
   110        override config string stackMemory = "EXT_RAM";
   111
   112        /*
   113         *  ======== l1PMode ========
   114         *  Define the amount of L1P RAM used for L1 Program Cache.
   115         *
   116         *  Check the device documentation for valid values.
   117         */
   118        config String l1PMode = "32k";
   119
   120        /*
   121         *  ======== l1DMode ========
   122         *  Define the amount of L1D RAM used for L1 Data Cache.
   123         *
   124         *  Check the device documentation for valid values.
   125         */
   126        config String l1DMode = "32k";
   127
   128        /*
   129         *  ======== l2Mode ========
   130         *  Define the amount of L2 RAM used for L2 Cache.
   131         *
   132         *  Check the device documentation for valid values.
   133         */
   134        config String l2Mode = "0k";
   135    };


package ti.platforms.sdp5430

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa9;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.sdp5430 ========
    44     *  Platform package for the OMAP5430 SDP.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the OMAP5430 SDP platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platforms.sdp5430.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.sdp5430 [1,0,0,0] {
    61        module Platform;
    62    }


module ti.platforms.sdp5430.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for sdp5430
    36     *
    37     */
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for OMAP5430
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    52     *  C64T DSP.
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "sdp5430",
    59            boardFamily:    "sdp5430",
    60            boardRevision:  null,
    61        };
    62
    63        readonly config xdc.platform.IExeContext.Cpu GEM = {
    64            id:             "0",
    65            clockRate:      466,
    66            catalogName:    "ti.catalog.c6000",
    67            deviceName:     "OMAP5430",
    68            revision:       "1.0",
    69        };
    70
    71        /* Benelli M4 Subsystem */
    72        readonly config xdc.platform.IExeContext.Cpu DSS = {
    73            id:             "1",
    74            clockRate:      212.8,
    75            catalogName:    "ti.catalog.arm.cortexm4",
    76            deviceName:     "OMAP5430",
    77            revision:       "1.0",
    78        };
    79
    80        /* GPP */
    81        readonly config xdc.platform.IExeContext.Cpu GPP = {
    82            id:             "2",
    83            clockRate:      800.0,  /* Typically set by the HLOS */
    84            catalogName:    "ti.catalog.arm.cortexa15",
    85            deviceName:     "OMAP5430",
    86            revision:       "1.0"
    87        };
    88
    89    instance:
    90
    91        /*!
    92         *  ======== externalMemoryMap ========
    93         *  Memory regions as defined in the OMAP4 Functional Specification
    94         */
    95
    96        override readonly config xdc.platform.IPlatform.Memory
    97            externalMemoryMap[string] = [
    98
    99                ["EXT_RAM", {
   100                    comment: "External RAM",
   101                    name: "EXT_RAM",
   102                    base: 0x80000000,
   103                    len:  0x20000000
   104                }],
   105
   106            ];
   107
   108        override config string codeMemory  = "EXT_RAM";
   109        override config string dataMemory  = "EXT_RAM";
   110        override config string stackMemory = "EXT_RAM";
   111
   112        /*
   113         *  ======== l1PMode ========
   114         *  Define the amount of L1P RAM used for L1 Program Cache.
   115         *
   116         *  Check the device documentation for valid values.
   117         */
   118        config String l1PMode = "32k";
   119
   120        /*
   121         *  ======== l1DMode ========
   122         *  Define the amount of L1D RAM used for L1 Data Cache.
   123         *
   124         *  Check the device documentation for valid values.
   125         */
   126        config String l1DMode = "32k";
   127
   128        /*
   129         *  ======== l2Mode ========
   130         *  Define the amount of L2 RAM used for L2 Cache.
   131         *
   132         *  Check the device documentation for valid values.
   133         */
   134        config String l2Mode = "0k";
   135    };


package ti.platforms.sim28xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.sim28xx ========
    38     *  Platform package for the sim28xx platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the sim28xx platform.
    42     */
    43    package ti.platforms.sim28xx [1,0,1,1] {
    44        module Platform;
    45    }


module ti.platforms.sim28xx.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.sim28xx;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Simulation-based Platform support for 28xx platforms
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        /*!
    59         *  ======== BOARD ========
    60         *  This platform's board attributes
    61         */
    62        readonly config xdc.platform.IPlatform.Board BOARD = {
    63            id:             "0",
    64            boardName:      "sim28xx",
    65            boardFamily:    "sim28xx",
    66            boardRevision:  null
    67        };
    68
    69        /*!
    70         *  ======== CPU ========
    71         *  The CPU simulated by this platform.
    72         *
    73         *  The device simulated is determined by the platform instance name
    74         *  or if this does not name a ti.catalog.c2800 module, then we
    75         *  simulate a TMS320C2812.
    76         */
    77        readonly config xdc.platform.IExeContext.Cpu   CPU = {
    78            id:             "0",
    79            clockRate:      150.0,
    80            catalogName:    "ti.catalog.c2800",
    81            deviceName:     "TMS320C2812",
    82            revision:       null,
    83        };
    84
    85    instance:
    86
    87        /*!
    88         *  ======== deviceName ========
    89         *  The CPU simulated by this simulator platform.
    90         *
    91         *  This parameter is optional. If it's not set, then the Platform module
    92         *  parameter CPU.deviceName is used.
    93         */
    94        config string deviceName;
    95
    96        override readonly config xdc.platform.IPlatform.Memory externalMemoryMap[string] = [
    97        /* The base address and length of SRAM on ezdsp2812.
    98         */
    99            ["SRAM",
   100                {
   101                    name: "SRAM",
   102                    base: 0x100000,
   103                    len:  0x10000,
   104                    page: 0,
   105                    space: "code/data"
   106                }
   107            ],
   108        ];
   109
   110        /*!
   111         *  ======== ftpath ========
   112         *  Installation directory of the Foundational Tools Suite
   113         *
   114         *  The underlying simulation engine used to run executables produced
   115         *  using this platform is part of the Target Server / Foundational Tools
   116         *  product (http://www.hou.asp.ti.com/asp/sds/eft/projects/Foundation_Tools/Releases/index.html).
   117         */
   118        readonly config String ftpath;
   119
   120        override config string codeMemory = "SRAM";
   121
   122        override config string dataMemory = "SRAM";
   123
   124        override config string stackMemory = "LSARAM";
   125    };


package ti.platforms.sim470xx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.arm;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.sim470xx ========
    38     *  Platform package for the sim470xx platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the sim470xx platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.sim470xx.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.sim470xx [1,0,1,1] {
    55        module Platform;
    56    }


module ti.platforms.sim470xx.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.sim470xx;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Simulation-based Platform support for TI Arm (470x) platforms
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        /*!
    59         *  ======== BOARD ========
    60         *  This platform's board attributes
    61         */
    62        readonly config xdc.platform.IPlatform.Board BOARD = {
    63            id:             "0",
    64            boardName:      "sim470xx",
    65            boardFamily:    "sim470xx",
    66            boardRevision:  null
    67        };
    68
    69        /*!
    70         *  ======== CPU ========
    71         *  The CPU simulated by this platform.
    72         *
    73         *  The device simulated is determined by the platform instance name
    74         *  or if this does not name a ti.catalog.arm module, then we
    75         *  we simulate a TMS470.
    76         */
    77        readonly config xdc.platform.IExeContext.Cpu CPU = {
    78            id:             "0",
    79            clockRate:      600.0,
    80            catalogName:    "ti.catalog.arm",
    81            deviceName:     "TMS470R10",
    82            revision:       "",
    83        };
    84
    85    instance:
    86
    87        /*!
    88         *  ======== deviceName ========
    89         *  The CPU simulated by this simulator platform.
    90         *
    91         *  This parameter is optional. If it's not set, then the Platform module
    92         *  parameter CPU.deviceName is used.
    93         */
    94        config string deviceName;
    95
    96        override config string codeMemory = "P_MEM";
    97
    98        override config string dataMemory = "D_MEM";
    99
   100        override config string stackMemory = "D_MEM";
   101    };


package ti.platforms.sim64Pxx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.sim64Pxx ========
    43     *  Platform package for the sim64Pxx platform.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the sim64Pxx platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.sim64Pxx.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.sim64Pxx [1,0,0] {
    60        module Platform;
    61    }


module ti.platforms.sim64Pxx.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    package ti.platforms.sim64Pxx;
    39
    40    /*!
    41     *  ======== Platform ========
    42     *  Platform support for the sim64Pxx
    43     *
    44     *  This module implements xdc.platform.IPlatform and defines configuration
    45     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    46     *
    47     *  The configuration parameters are initialized in this package's
    48     *  configuration script (package.cfg) and "bound" to the TCOM object
    49     *  model.  Once they are part of the model, these parameters are
    50     *  queried by a program's configuration script.
    51     *
    52     *  This particular platform has a single Cpu, and therefore, only
    53     *  declares a single CPU configuration object.  Multi-CPU platforms
    54     *  would declare multiple Cpu configuration parameters (one per
    55     *  platform CPU).
    56     */
    57    metaonly module Platform inherits xdc.platform.IPlatform
    58    {
    59        readonly config xdc.platform.IPlatform.Board BOARD = {
    60            id:             "0",
    61            boardName:      "sim64Pxx",
    62            boardFamily:    "sim64Pxx",
    63            boardRevision:  null,
    64        };
    65
    66        readonly config xdc.platform.IExeContext.Cpu CPU = {
    67            id:             "0",
    68            clockRate:      1000,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320CTCI6482",
    71            revision:       "",
    72        };
    73
    74    instance:
    75
    76        override readonly config xdc.platform.IPlatform.Memory
    77            externalMemoryMap[string] = [
    78                ["DDR", {name: "DDR", base: 0x80000000, len: 0x10000000}],
    79            ];
    80
    81        /*!
    82         *  ======== deviceName ========
    83         *  The CPU simulated by this simulator platform.
    84         *
    85         *  This parameter is optional. If it's not set, then the Platform module
    86         *  parameter CPU.deviceName is used.
    87         */
    88        config string deviceName;
    89
    90        /*!
    91         *  ======== ftpath ========
    92         *  Installation directory of the Foundational Tools Suite
    93         *
    94         *  The underlying simulation engine used to run executables produced
    95         *  using this platform is part of the Target Server / Foundational Tools
    96         *  product (http://www.hou.asp.ti.com/asp/sds/eft/projects/Foundation_Tools/Releases/index.html).
    97         */
    98        readonly config String ftpath;
    99
   100        override config string codeMemory = "DDR";
   101
   102        override config string dataMemory = "DDR";
   103
   104        override config string stackMemory = "DDR";
   105
   106        /*
   107         *  ======== l1PMode ========
   108         *  Define the amount of L1P RAM used for L1 Program Cache.
   109         *
   110         *  Check the device documentation for valid values.
   111         */
   112        config String l1PMode = "32k";
   113
   114        /*
   115         *  ======== l1DMode ========
   116         *  Define the amount of L1D RAM used for L1 Data Cache.
   117         *
   118         *  Check the device documentation for valid values.
   119         */
   120        config String l1DMode = "32k";
   121
   122        /*
   123         *  ======== l2Mode ========
   124         *  Define the amount of L2 RAM used for L2 Cache.
   125         *
   126         *  Check the device documentation for valid values.
   127         */
   128        config String l2Mode = "0k";
   129    };


package ti.platforms.sim6xxx

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.sim6xxx ========
    38     *  Platform package for the sim6xxx platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the sim6xxx platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.sim6xxx.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.sim6xxx [1,0,1,1] {
    55        module Platform;
    56    }


module ti.platforms.sim6xxx.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.sim6xxx;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Simulation-based Platform support for 6xxx platforms
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        /*!
    59         *  ======== BOARD ========
    60         *  This platform's board attributes
    61         */
    62        readonly config xdc.platform.IPlatform.Board BOARD = {
    63            id:             "0",
    64            boardName:      "sim6xxx",
    65            boardFamily:    "sim6xxx",
    66            boardRevision:  null
    67        };
    68
    69        /*!
    70         *  ======== CPU ========
    71         *  The CPU simulated by this platform.
    72         *
    73         *  The device simulated is determined by the platform instance name
    74         *  or if this does not name a ti.catalog.c6000 module, we simulate
    75         *  a TMS320C6416.
    76         */
    77        readonly config xdc.platform.IExeContext.Cpu CPU = {
    78            id:             "0",
    79            clockRate:      600.0,
    80            catalogName:    "ti.catalog.c6000",
    81            deviceName:     "TMS320C6416",
    82            revision:       "",
    83        };
    84
    85    instance:
    86
    87        /*!
    88         *  ======== externalMemoryMap ========
    89         *  A mapping of memory names to memory objects for external memory.
    90         *
    91         *  This parameter defines the external portion of the platform's memory
    92         *  map.
    93         */
    94        override readonly config xdc.platform.IPlatform.Memory externalMemoryMap[string] = [
    95            ["SDRAM",
    96                {
    97                    name: "SDRAM",
    98                    base: 0x80000000,
    99                    len: 0x01000000,
   100                    space: "code/data",
   101                }
   102            ],
   103        ];
   104
   105        /*!
   106         *  ======== deviceName ========
   107         *  The CPU simulated by this simulator platform.
   108         *
   109         *  This parameter is optional. If it's not set, then the Platform module
   110         *  parameter CPU.deviceName is used.
   111         */
   112        config string deviceName;
   113
   114        /*!
   115         *  ======== ftpath ========
   116         *  Installation directory of the Foundational Tools Suite
   117         *
   118         *  The underlying simulation engine used to run executables produced
   119         *  using this platform is part of the Target Server / Foundational Tools
   120         *  product (http://www.hou.asp.ti.com/asp/sds/eft/projects/Foundation_Tools/Releases/index.html).
   121         */
   122        config String ftpath;
   123
   124        override config string codeMemory = "IRAM";
   125
   126        override config string dataMemory = "SDRAM";
   127
   128        override config string stackMemory = "SDRAM";
   129
   130        /*
   131         *  ======== l1PMode ========
   132         *  Define the amount of L1P RAM used for L1 Program Cache.
   133         *
   134         *  Check the device documentation for valid values.
   135         */
   136        config String l1PMode = "32k";
   137
   138        /*
   139         *  ======== l1DMode ========
   140         *  Define the amount of L1D RAM used for L1 Data Cache.
   141         *
   142         *  Check the device documentation for valid values.
   143         */
   144        config String l1DMode = "32k";
   145
   146        /*
   147         *  ======== l2Mode ========
   148         *  Define the amount of L2 RAM used for L2 Cache.
   149         *
   150         *  Check the device documentation for valid values.
   151         */
   152        config String l2Mode = "0k";
   153    };


package ti.platforms.simArctic

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c6000;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.simArctic ========
    38     *  Platform package for the simArctic platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the simArctic platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.simArctic.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.simArctic [1,0,0] {
    55        module Platform;
    56    }


module ti.platforms.simArctic.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.simArctic;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for the simArctic
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "simArctic",
    61            boardFamily:    "simArctic",
    62            boardRevision:  null,
    63        };
    64
    65        readonly config xdc.platform.IExeContext.Cpu ARP32 = {
    66            id:             "0",
    67            clockRate:      200.0,
    68            catalogName:    "ti.catalog.arp32",
    69            deviceName:     "Arctic",
    70            revision:       "",
    71        };
    72
    73        readonly config xdc.platform.IExeContext.Cpu DSP = {
    74            id:             "1",
    75            clockRate:      300.0,
    76            catalogName:    "ti.catalog.c6000",
    77            deviceName:     "Arctic",
    78            revision:       "",
    79        };
    80
    81
    82    instance:
    83
    84        /*
    85         *  DDR is 2GByte but we need to share it with the ARP32.
    86         */
    87        override readonly config xdc.platform.IPlatform.Memory
    88            externalMemoryMap[string] = [
    89                ["ARP32VECS", {
    90                    comment: "External memory for ARP32 interrupt vectors",
    91                    name:  "ARP32VECS",
    92                    base:  0x80000000,
    93                    len:   0x00000100,
    94                    space: "code/data"
    95                }],
    96
    97                ["ARP32", {
    98                    comment: "External memory for ARP32 use",
    99                    name:  "ARP32",
   100                    base:  0x80000100,
   101                    len:   0x01ffff00,
   102                    space: "code/data"
   103                }],
   104
   105                ["DSP", {
   106                    comment: "External memory for DSP use",
   107                    name:  "DSP",
   108                    base:  0x82000000,
   109                    len:   0x02000000,
   110                    space: "code/data"
   111                }],
   112
   113                ["SHARED", {
   114                    comment: "Shared external memory",
   115                    name:  "SHARED",
   116                    base:  0x84000000,
   117                    len:   0x0C000000,
   118                    space: "code/data"
   119                }]
   120            ];
   121
   122        /*
   123         *  ======== l1PMode ========
   124         *  Define the amount of L1P RAM used for L1 Program Cache.
   125         *
   126         *  Check the device documentation for valid values.
   127         */
   128        config String l1PMode = "32k";
   129
   130        /*
   131         *  ======== l1DMode ========
   132         *  Define the amount of L1D RAM used for L1 Data Cache.
   133         *
   134         *  Check the device documentation for valid values.
   135         */
   136        config String l1DMode = "32k";
   137
   138        /*
   139         *  ======== l2Mode ========
   140         *  Define the amount of L2 RAM used for L2 Cache.
   141         *
   142         *  Check the device documentation for valid values.
   143         */
   144        config String l2Mode = "0k";
   145    };


package ti.platforms.simARP32

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.arp32;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.simARP32 ========
    38     *  Platform package for the simARP32 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the simARP32 platform.
    42     *
    43     *  @a(Throws)
    44     *  `XDCException` exceptions are thrown for fatal errors. The following error
    45     *  codes are reported in the exception message:
    46     *  @p(dlist)
    47     *      -  `ti.platfoms.simARP32.LINK_TEMPLATE_ERROR`
    48     *           This error is raised when this platform cannot found the default
    49     *           linker command template `linkcmd.xdt` in the build target's
    50     *           package. When a target does not contain this file, the config
    51     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    52     *  @p
    53     */
    54    package ti.platforms.simARP32 [1,0,1,0] {
    55        module Platform;
    56    }


module ti.platforms.simARP32.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.simARP32;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Simulation-based Platform support for TI Torrent platforms
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        /*!
    59         *  ======== BOARD ========
    60         *  This platform's board attributes
    61         */
    62        readonly config xdc.platform.IPlatform.Board BOARD = {
    63            id:             "0",
    64            boardName:      "simARP32",
    65            boardFamily:    "simARP32",
    66            boardRevision:  null
    67        };
    68
    69        /*!
    70         *  ======== CPU ========
    71         *  The CPU simulated by this platform.
    72         *
    73         *  The device simulated is determined by the platform instance name
    74         *  or if this does not name a ti.catalog.arm module, then we
    75         *  we simulate a TMS470.
    76         */
    77        readonly config xdc.platform.IExeContext.Cpu CPU = {
    78            id:             "0",
    79            clockRate:      200.0,
    80            catalogName:    "ti.catalog.arp32",
    81            deviceName:     "Arctic",
    82            revision:       "1.0",
    83        };
    84
    85    instance:
    86
    87        /*!
    88         *  ======== externalMemoryMap ========
    89         *  Memory regions as defined in the Ducati Functional Specification
    90         */
    91
    92        override readonly config xdc.platform.IPlatform.Memory
    93            externalMemoryMap[string] = [
    94                ["ARP32VECS", {
    95                    comment: "External memory for ARP32 interrupt vectors",
    96                    name:  "ARP32VECS",
    97                    base:  0x80000000,
    98                    len:   0x00000100,
    99                    page:  0,
   100                    space: "code/data"
   101                }],
   102
   103                ["ARP32", {
   104                    comment: "External memory for ARP32 use",
   105                    name:  "ARP32",
   106                    base:  0x80000100,
   107                    len:   0x0fffff00,
   108                    page:  1,
   109                    space: "code/data"
   110                }]
   111            ];
   112
   113        override config string codeMemory = "ARP32";
   114        override config string dataMemory = "DMEM";
   115        override config string stackMemory = "DMEM";
   116    };


package ti.platforms.simCM3

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.arm.cortexm3;
    34    requires xdc.platform [1,0,1];
    35
    36    /*!
    37     *  ======== ti.platforms.simCM3 ========
    38     *  Platform package for the simCM3 platform.
    39     *
    40     *  This package implements the interfaces (xdc.platform.IPlatform)
    41     *  necessary to build and run executables on the simCM3 platform.
    42     */
    43    package ti.platforms.simCM3 [1,0,1,0] {
    44        module Platform;
    45    }


module ti.platforms.simCM3.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36
    37    package ti.platforms.simCM3;
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Simulation-based Platform support for TI Cortex M3 platforms
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has a single Cpu, and therefore, only
    52     *  declares a single CPU configuration object.  Multi-CPU platforms
    53     *  would declare multiple Cpu configuration parameters (one per
    54     *  platform CPU).
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        /*!
    59         *  ======== BOARD ========
    60         *  This platform's board attributes
    61         */
    62        readonly config xdc.platform.IPlatform.Board BOARD = {
    63            id:             "0",
    64            boardName:      "simCM3",
    65            boardFamily:    "simCM3",
    66            boardRevision:  null
    67        };
    68
    69        /*!
    70         *  ======== CPU ========
    71         *  The CPU simulated by this platform.
    72         *
    73         *  The device simulated is determined by the platform instance name
    74         *  or if this does not name a ti.catalog.arm module, then we
    75         *  we simulate a TMS470.
    76         */
    77        readonly config xdc.platform.IExeContext.Cpu CPU = {
    78            id:             "0",
    79            clockRate:      200.0,
    80            catalogName:    "ti.catalog.arm.cortexm3",
    81            deviceName:     "CortexM3",
    82            revision:       "1.0",
    83        };
    84
    85    instance:
    86
    87        override readonly config xdc.platform.IPlatform.Memory
    88            externalMemoryMap[string] = [
    89
    90                ["Code", {
    91                    comment: "Code Memory",
    92                    name:   "Code",
    93                    base:   0x00000000,
    94                    len:    0x20000000,
    95                    space:  "code",
    96                    access: "RWX"
    97                }],
    98
    99                ["SRAM", {
   100                    comment: "Shared RAM",
   101                    name:   "SRAM",
   102                    base:   0x20000000,
   103                    len:    0x20000000,
   104                    space:  "data",
   105                    access: "RW"
   106                }],
   107            ];
   108
   109        override config string codeMemory = "Code";
   110        override config string dataMemory = "SRAM";
   111        override config string stackMemory = "SRAM";
   112    };


package ti.platforms.simDM8168

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.c6000;
    38    requires ti.catalog.arm.cortexm3;
    39    requires ti.catalog.arm.cortexa8;
    40    requires xdc.platform [1,0,1];
    41
    42    /*!
    43     *  ======== ti.platforms.simDM8168 ========
    44     *  Platform package for the simDM8168 platform.
    45     *
    46     *  This package implements the interfaces (xdc.platform.IPlatform)
    47     *  necessary to build and run executables on the simDM8168 platform.
    48     *
    49     *  @a(Throws)
    50     *  `XDCException` exceptions are thrown for fatal errors. The following error
    51     *  codes are reported in the exception message:
    52     *  @p(dlist)
    53     *      -  `ti.platfoms.simDM8168.LINK_TEMPLATE_ERROR`
    54     *           This error is raised when this platform cannot found the default
    55     *           linker command template `linkcmd.xdt` in the build target's
    56     *           package. When a target does not contain this file, the config
    57     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    58     *  @p
    59     */
    60    package ti.platforms.simDM8168 [1,0,0] {
    61        module Platform;
    62    }


module ti.platforms.simDM8168.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for simDM8168
    36     *
    37     */
    38
    39    package ti.platforms.simDM8168;
    40
    41    /*!
    42     *  ======== Platform ========
    43     *  Platform support for the simDM8168
    44     *
    45     *  This module implements xdc.platform.IPlatform and defines configuration
    46     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    47     *
    48     *  The configuration parameters are initialized in this package's
    49     *  configuration script (package.cfg) and "bound" to the TCOM object
    50     *  model.  Once they are part of the model, these parameters are
    51     *  queried by a program's configuration script.
    52     *
    53     *  This particular platform has 4 CPU's, a host GPP, 2 M3's, and a
    54     *  C674 DSP.
    55     */
    56    metaonly module Platform inherits xdc.platform.IPlatform
    57    {
    58        readonly config xdc.platform.IPlatform.Board BOARD = {
    59            id:             "0",
    60            boardName:      "simDM8168",
    61            boardFamily:    "simDM8168",
    62            boardRevision:  null
    63        };
    64
    65        /* C674 GEM */
    66        readonly config xdc.platform.IExeContext.Cpu GEM = {
    67            id:             "0",
    68            clockRate:      800.0,
    69            catalogName:    "ti.catalog.c6000",
    70            deviceName:     "TMS320DM8168",
    71            revision:       ""
    72        };
    73
    74        /* M3 Subsystem */
    75        readonly config xdc.platform.IExeContext.Cpu DSS = {
    76            id:             "1",
    77            clockRate:      250.0,
    78            catalogName:    "ti.catalog.arm.cortexm3",
    79            deviceName:     "TMS320DM8168",
    80            revision:       "1.0"
    81        };
    82
    83        /* GPP */
    84        readonly config xdc.platform.IExeContext.Cpu GPP = {
    85            id:             "2",
    86            clockRate:      1000.0,  /* Typically set by the HLOS */
    87            catalogName:    "ti.catalog.arm.cortexa8",
    88            deviceName:     "TMS320DM8168",
    89            revision:       "1.0"
    90        };
    91
    92    instance:
    93
    94        override readonly config xdc.platform.IPlatform.Memory
    95            externalMemoryMap[string] = [
    96
    97                ["DDR3_RAM", {
    98                    comment: "External RAM",
    99                    name: "DDR3_RAM",
   100                    base: 0x80000000,
   101                    len:  0x10000000
   102                }]
   103
   104            ];
   105
   106        override config string codeMemory = "DDR3_RAM";
   107        override config string dataMemory = "DDR3_RAM";
   108        override config string stackMemory = "DDR3_RAM";
   109
   110        /*
   111         *  ======== l1PMode ========
   112         *  Define the amount of L1P RAM used for L1 Program Cache.
   113         *
   114         *  Check the device documentation for valid values.
   115         */
   116        config String l1PMode = "32k";
   117
   118        /*
   119         *  ======== l1DMode ========
   120         *  Define the amount of L1D RAM used for L1 Data Cache.
   121         *
   122         *  Check the device documentation for valid values.
   123         */
   124        config String l1DMode = "32k";
   125
   126        /*
   127         *  ======== l2Mode ========
   128         *  Define the amount of L2 RAM used for L2 Cache.
   129         *
   130         *  Check the device documentation for valid values.
   131         */
   132        config String l2Mode = "0k";
   133    };


package ti.platforms.simKepler

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.simKepler ========
    43     *  Platform package for the Kepler simulator.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the Kepler simulator platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.simKepler.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.simKepler [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.simKepler.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the simKepler
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "simKepler",
    47            boardFamily:    "simKepler",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1000,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "Kepler",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        override readonly config xdc.platform.IPlatform.Memory
    62            externalMemoryMap[string] = [
    63                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x10000000}],
    64        ];
    65
    66        override config string codeMemory  = "L2SRAM";
    67        override config string dataMemory  = "L2SRAM";
    68        override config string stackMemory = "L2SRAM";
    69
    70        /*
    71         *  ======== l1PMode ========
    72         *  Define the amount of L1P RAM used for L1 Program Cache.
    73         *
    74         *  Check the device documentation for valid values.
    75         */
    76        config String l1PMode = "32k";
    77
    78        /*
    79         *  ======== l1DMode ========
    80         *  Define the amount of L1D RAM used for L1 Data Cache.
    81         *
    82         *  Check the device documentation for valid values.
    83         */
    84        config String l1DMode = "32k";
    85
    86        /*
    87         *  ======== l2Mode ========
    88         *  Define the amount of L2 RAM used for L2 Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l2Mode = "0k";
    93
    94    };


package ti.platforms.simplelink

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.arm.cortexm4;
    35
    36    /*!
    37     *  ======== ti.platforms.simplelink ========
    38     *  Platform support for the SimpleLink devices
    39     */
    40    package ti.platforms.simplelink [1,0,0] {
    41        module Platform;
    42    }


module ti.platforms.simplelink.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.simplelink;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any CC13xx, CC26xx, or CC32xx device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.simplelink:CC3200"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.simplelink:CC3200");
    52     *  @p
    53     *
    54     *  @a(Note)
    55     *  The 'simplelink' platform provides support for allowing the user to
    56     *  specify the application's C stack size within their linker command
    57     *  file. If the user sets 'Program.stack = 0' in their configuration
    58     *  file, then it is up to the user to add the necessary content to their
    59     *  linker command file to define the size and placment of the C stack.
    60     *  Additionally, if GNU tools are being used, then the user must define
    61     *  'STACKSIZE' in their linker command file and have its value be the
    62     *  size of the C stack in bytes. The 'STACKSIZE' symbol is used
    63     *  internally to initialize other symbols that must be provided to SYS/BIOS.
    64     */
    65    @Template ("./Platform.xdt")
    66    metaonly module Platform inherits xdc.platform.IPlatform
    67    {
    68        config xdc.platform.IPlatform.Board BOARD = {
    69            id:             "0",
    70            boardName:      "simplelink",
    71            boardFamily:    null,
    72            boardRevision:  null
    73        };
    74
    75        /*!
    76         *  ======== nameFormat ========
    77         *  Encoding of instance creation parameters in the instance's name
    78         *
    79         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    80         *  and `clockRate` can be encoded in the instance name supplied on
    81         *  `xdc.tools.configuro` command line, for example:
    82         *  @p(code)
    83         *      xs xdc.tools.configuro ... -p ti.platforms.simplelink:CC3200:1:20
    84         *  @p
    85         *  Optional parameters can be omitted:
    86         *  @p(code)
    87         *      xs xdc.tools.configuro ... -p ti.platforms.simplelink:CC3200
    88         *  @p
    89         */
    90         readonly config string nameFormat
    91             = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    92
    93        /*!
    94         *  ======== useGnuRomLinkCmd ========
    95         *  Use ROM compatible linker script when building using GNU tools
    96         *
    97         *  If this config param is set to true and "includeLinkCmdFile" is true,
    98         *  the ROM compatible linker script will be used. The ROM compatible
    99         *  linker script is required when building a ROM based application.
   100         */
   101         config Bool useGnuRomLinkCmd = false;
   102
   103    instance:
   104
   105        /*
   106         *  This platform supports either Cortex M3 or M4 cores.
   107         *  The corresponding "actual" catalogName is overwritten
   108         *  in Platform.instance$meta$init() based on the device name
   109         */
   110
   111        config xdc.platform.IExeContext.Cpu CPU = {
   112            id:             "0",
   113            clockRate:      80.0,
   114            catalogName:    "ti.catalog.arm.cortexm4",
   115            deviceName:     "CC32xx",
   116            revision:       "",
   117        };
   118
   119        /*!
   120         *  ======== deviceName ========
   121         *  The name of an `ICpuDataSheet` module for the device
   122         *
   123         *  This parameter is required, but it does not have to be set explicitly;
   124         *  it can be encoded in the instance's name.
   125         */
   126        config string deviceName;
   127
   128        /*!
   129         *  ======== clockRate ========
   130         *  The clock rate for this device.
   131         */
   132        config Double clockRate;
   133
   134        override config string codeMemory = null;
   135
   136        override config string dataMemory = null;
   137
   138        override config string stackMemory = null;
   139
   140        /*!
   141         *  ======== includeLinkCmdFile ========
   142         *  The flag that specifies if the platform should include a linker command
   143         *  file.
   144         *
   145         *  By default, a user is responsible for adding a linker command file to
   146         *  the project, or to the linker command line. However, if this flag is
   147         *  set, this platform will include a default linker command file for the
   148         *  selected device.
   149         */
   150        config Bool includeLinkCmdFile = false;
   151    };


package ti.platforms.simTCI6608

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.simTCI6608 ========
    43     *  Platform package for the TCI6608 simulator.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the Tesla simulator platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.simTCI6608.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.simTCI6608 [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.simTCI6608.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the simTCI6608
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "simTCI6608",
    47            boardFamily:    "simTCI6608",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1000,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320TCI6608",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        override readonly config xdc.platform.IPlatform.Memory
    62            externalMemoryMap[string] = [
    63                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x10000000}],
    64        ];
    65
    66        override config string codeMemory  = "L2SRAM";
    67        override config string dataMemory  = "L2SRAM";
    68        override config string stackMemory = "L2SRAM";
    69
    70        /*
    71         *  ======== l1PMode ========
    72         *  Define the amount of L1P RAM used for L1 Program Cache.
    73         *
    74         *  Check the device documentation for valid values.
    75         */
    76        config String l1PMode = "32k";
    77
    78        /*
    79         *  ======== l1DMode ========
    80         *  Define the amount of L1D RAM used for L1 Data Cache.
    81         *
    82         *  Check the device documentation for valid values.
    83         */
    84        config String l1DMode = "32k";
    85
    86        /*
    87         *  ======== l2Mode ========
    88         *  Define the amount of L2 RAM used for L2 Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l2Mode = "0k";
    93    };


package ti.platforms.simTCI6616

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.simTCI6616 ========
    43     *  Platform package for the TCI6616 simulator.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the Tesla simulator platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.simTCI6616.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.simTCI6616 [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.simTCI6616.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the simTCI6616
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "simTCI6616",
    47            boardFamily:    "simTCI6616",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      1000,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "TMS320TCI6616",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        override readonly config xdc.platform.IPlatform.Memory
    62            externalMemoryMap[string] = [
    63                ["DDR2", {name: "DDR2", base: 0x80000000, len: 0x10000000}],
    64        ];
    65
    66        override config string codeMemory  = "L2SRAM";
    67        override config string dataMemory  = "L2SRAM";
    68        override config string stackMemory = "L2SRAM";
    69
    70        /*
    71         *  ======== l1PMode ========
    72         *  Define the amount of L1P RAM used for L1 Program Cache.
    73         *
    74         *  Check the device documentation for valid values.
    75         */
    76        config String l1PMode = "32k";
    77
    78        /*
    79         *  ======== l1DMode ========
    80         *  Define the amount of L1D RAM used for L1 Data Cache.
    81         *
    82         *  Check the device documentation for valid values.
    83         */
    84        config String l1DMode = "32k";
    85
    86        /*
    87         *  ======== l2Mode ========
    88         *  Define the amount of L2 RAM used for L2 Cache.
    89         *
    90         *  Check the device documentation for valid values.
    91         */
    92        config String l2Mode = "0k";
    93
    94        /*
    95         *  ======== ccsSim ========
    96         *  @_nodoc
    97         *  Location of simulator files.
    98         */
    99        config String ccsSim;
   100
   101    };


package ti.platforms.simTesla

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37
    38    requires ti.catalog.c6000;
    39    requires xdc.platform [1,0,1];
    40
    41    /*!
    42     *  ======== ti.platforms.simTesla ========
    43     *  Platform package for the Tesla functional simulator.
    44     *
    45     *  This package implements the interfaces (xdc.platform.IPlatform)
    46     *  necessary to build and run executables on the Tesla simulator platform.
    47     *
    48     *  @a(Throws)
    49     *  `XDCException` exceptions are thrown for fatal errors. The following error
    50     *  codes are reported in the exception message:
    51     *  @p(dlist)
    52     *      -  `ti.platfoms.simTesla.LINK_TEMPLATE_ERROR`
    53     *           This error is raised when this platform cannot found the default
    54     *           linker command template `linkcmd.xdt` in the build target's
    55     *           package. When a target does not contain this file, the config
    56     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    57     *  @p
    58     */
    59    package ti.platforms.simTesla [1,0,0,0] {
    60        module Platform;
    61    }


module ti.platforms.simTesla.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *
    36     */
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  Platform support for the simTesla
    41     */
    42    metaonly module Platform inherits xdc.platform.IPlatform
    43    {
    44        readonly config xdc.platform.IPlatform.Board BOARD = {
    45            id:             "0",
    46            boardName:      "simTesla",
    47            boardFamily:    "simTesla",
    48            boardRevision:  null,
    49        };
    50
    51        readonly config xdc.platform.IExeContext.Cpu CPU = {
    52            id:             "0",
    53            clockRate:      466,
    54            catalogName:    "ti.catalog.c6000",
    55            deviceName:     "OMAP4430",
    56            revision:       "1.0",
    57        };
    58
    59    instance:
    60
    61        /*!
    62         *  ======== externalMemoryMap ========
    63         *  Memory regions as defined in the Tesla Functional Specification
    64         */
    65
    66        override readonly config xdc.platform.IPlatform.Memory
    67            externalMemoryMap[string] = [
    68
    69                ["EXT_RAM", {
    70                    comment: "External RAM",
    71                    name: "EXT_RAM",
    72                    base: 0x20000000,
    73                    len:  0x01000000
    74                }],
    75
    76            ];
    77
    78
    79        override config string codeMemory  = "EXT_RAM";
    80        override config string dataMemory  = "EXT_RAM";
    81        override config string stackMemory = "EXT_RAM";
    82
    83        /*
    84         *  ======== l1PMode ========
    85         *  Define the amount of L1P RAM used for L1 Program Cache.
    86         *
    87         *  Check the device documentation for valid values.
    88         */
    89        config String l1PMode = "32k";
    90
    91        /*
    92         *  ======== l1DMode ========
    93         *  Define the amount of L1D RAM used for L1 Data Cache.
    94         *
    95         *  Check the device documentation for valid values.
    96         */
    97        config String l1DMode = "32k";
    98
    99        /*
   100         *  ======== l2Mode ========
   101         *  Define the amount of L2 RAM used for L2 Cache.
   102         *
   103         *  Check the device documentation for valid values.
   104         */
   105        config String l2Mode = "0k";
   106    };


package ti.platforms.simVayu

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== package.xdc ========
    35     *
    36     */
    37    requires ti.catalog.arp32;
    38    requires ti.catalog.c6000;
    39    requires ti.catalog.arm.cortexm4;
    40    requires ti.catalog.arm.cortexa15;
    41    requires xdc.platform [1,0,1];
    42
    43    /*!
    44     *  ======== ti.platforms.simVayu ========
    45     *  Platform package for the Vayu SDP.
    46     *
    47     *  This package implements the interfaces (xdc.platform.IPlatform)
    48     *  necessary to build and run executables on the Vayu SDP platform.
    49     *
    50     *  @a(Throws)
    51     *  `XDCException` exceptions are thrown for fatal errors. The following error
    52     *  codes are reported in the exception message:
    53     *  @p(dlist)
    54     *      -  `ti.platforms.simVayu.LINK_TEMPLATE_ERROR`
    55     *           This error is raised when this platform cannot found the default
    56     *           linker command template `linkcmd.xdt` in the build target's
    57     *           package. When a target does not contain this file, the config
    58     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    59     *  @p
    60     */
    61    package ti.platforms.simVayu [1,0,0,0] {
    62        module Platform;
    63    }


module ti.platforms.simVayu.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     *  Platform support for simVayu
    36     *
    37     */
    38
    39    /*!
    40     *  ======== Platform ========
    41     *  Platform support for simVayu
    42     *
    43     *  This module implements xdc.platform.IPlatform and defines configuration
    44     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    45     *
    46     *  The configuration parameters are initialized in this package's
    47     *  configuration script (package.cfg) and "bound" to the TCOM object
    48     *  model.  Once they are part of the model, these parameters are
    49     *  queried by a program's configuration script.
    50     *
    51     *  This particular platform has 1 Cortex-A15, 4 EVE's, 2 Benelli/IPU
    52     *  Sub-system (Dual M4's) and 2 C66x DSP's.
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        readonly config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "simVayu",
    59            boardFamily:    "simVayu",
    60            boardRevision:  null,
    61        };
    62
    63        readonly config xdc.platform.IExeContext.Cpu DSP = {
    64            id:             "0",
    65            clockRate:      1000,
    66            catalogName:    "ti.catalog.c6000",
    67            deviceName:     "Vayu",
    68            revision:       "1.0",
    69        };
    70
    71        /* Benelli M4 Subsystem */
    72        readonly config xdc.platform.IExeContext.Cpu M4 = {
    73            id:             "1",
    74            clockRate:      266.0,
    75            catalogName:    "ti.catalog.arm.cortexm4",
    76            deviceName:     "Vayu",
    77            revision:       "1.0",
    78        };
    79
    80        /* EVE */
    81        readonly config xdc.platform.IExeContext.Cpu EVE = {
    82            id:             "2",
    83            clockRate:      200.0,
    84            catalogName:    "ti.catalog.arp32",
    85            deviceName:     "Vayu",
    86            revision:       "1.0"
    87        };
    88
    89        /* GPP */
    90        readonly config xdc.platform.IExeContext.Cpu GPP = {
    91            id:             "3",
    92            clockRate:      800.0,  /* Typically set by the HLOS */
    93            catalogName:    "ti.catalog.arm.cortexa15",
    94            deviceName:     "Vayu",
    95            revision:       "1.0"
    96        };
    97
    98    /*  Memory Map for ti.platforms.simVayu
    99     *
   100     *  Virtual     Physical        Size            Comment
   101     *  ------------------------------------------------------------------------
   102     *              8000_0000  1000_0000  ( 256 MB) External Memory
   103     *
   104     *  0000_0000 0 8000_0000        100  ( 256  B) EVE1_VECS (vector table)
   105     *              8000_0100       FF00  ( ~64 KB) --------
   106     *  0000_0000   8001_0000        100  ( 256  B) EVE2_VECS (vector table)
   107     *              8001_0100       FF00  ( ~64 KB) --------
   108     *  0000_0000   8002_0000        100  ( 256  B) EVE3_VECS (vector table)
   109     *              8002_0100       FF00  ( ~64 KB) --------
   110     *  0000_0000   8003_0000        100  ( 256  B) EVE4_VECS (vector table)
   111     *              8003_0100    FE_FF00  ( ~16 MB) --------
   112     *            1 8100_0000    40_0000  (   4 MB) EVE1_PROG (code, data)
   113     *              8140_0000    C0_0000  (  12 MB) --------
   114     *            2 8200_0000    40_0000  (   4 MB) EVE2_PROG (code, data)
   115     *              8240_0000    C0_0000  (  12 MB) --------
   116     *            3 8300_0000    40_0000  (   4 MB) EVE3_PROG (code, data)
   117     *              8340_0000    C0_0000  (  12 MB) --------
   118     *            4 8400_0000    40_0000  (   4 MB) EVE4_PROG (code, data)
   119     *              8440_0000    C0_0000  (  12 MB) --------
   120     *            5 8500_0000   100_0000  (  16 MB) --------
   121     *            6 8600_0000   100_0000  (  16 MB) --------
   122     *            7 8700_0000   100_0000  (  16 MB) --------
   123     *            8 8800_0000   100_0000  (  16 MB) --------
   124     *            9 8900_0000   100_0000  (  16 MB) --------
   125     *            A 8A00_0000    80_0000  (   8 MB) IPU1 (code, data), benelli
   126     *              8A80_0000    80_0000  (   8 MB) IPU2 (code, data), benelli
   127     *            B 8B00_0000   100_0000  (  16 MB) HOST (code, data)
   128     *            C 8C00_0000   100_0000  (  16 MB) DSP1 (code, data)
   129     *            D 8D00_0000   100_0000  (  16 MB) DSP2 (code, data)
   130     *            E 8E00_0000   100_0000  (  16 MB) SR_0 (ipc)
   131     *            F 8F00_0000   100_0000  (  16 MB) --------
   132     */
   133
   134        readonly config Any SR_0 = {
   135            name: "SR_0", space: "data", access: "RWX",
   136            base: 0x8E000000, len: 0x1000000,
   137            comment: "SR#0 Memory (16 MB)"
   138        };
   139
   140        readonly config Any DSP1 = {
   141            externalMemoryMap: [
   142                [ "DSP1_PROG", {
   143                    name: "DSP1_PROG", space: "code/data", access: "RWX",
   144                    base: 0x8C000000, len: 0x1000000,
   145                    comment: "DSP1 Program Memory (16 MB)"
   146                }],
   147                [ "SR_0", SR_0 ]
   148            ],
   149            codeMemory:  "DSP1_PROG",
   150            dataMemory:  "DSP1_PROG",
   151            stackMemory: "DSP1_PROG",
   152            l1DMode: "32k",
   153            l1PMode: "32k",
   154            l2Mode: "128k"
   155        };
   156
   157        readonly config Any DSP2 = {
   158            externalMemoryMap: [
   159                [ "DSP2_PROG", {
   160                    name: "DSP2_PROG", space: "code/data", access: "RWX",
   161                    base: 0x8D000000, len: 0x1000000,
   162                    comment: "DSP2 Program Memory (16 MB)"
   163                }],
   164                [ "SR_0", SR_0 ]
   165            ],
   166            codeMemory:  "DSP2_PROG",
   167            dataMemory:  "DSP2_PROG",
   168            stackMemory: "DSP2_PROG",
   169            l1DMode: "32k",
   170            l1PMode: "32k",
   171            l2Mode: "128k"
   172        };
   173
   174        readonly config Any EVE1 = {
   175            externalMemoryMap: [
   176                [ "EVEVECS", { /* name used by SYS/BIOS */
   177                    name: "EVEVECS", space: "code/data", access: "RWX",
   178                    base: 0x80000000, len: 0x100, page: 0,
   179                    comment: "EVE1 Vector Table (256 B)"
   180                }],
   181                [ "EVE1_PROG", {
   182                    name: "EVE1_PROG", space: "code/data", access: "RWX",
   183                    base: 0x81000000, len: 0x400000, page: 1,
   184                    comment: "EVE1 Program Memory (4 MB)"
   185                }],
   186                [ "SR_0", SR_0 ]
   187            ],
   188            codeMemory:  "EVE1_PROG",
   189            dataMemory:  "EVE1_PROG",
   190            stackMemory: "EVE1_PROG"
   191        };
   192
   193        readonly config Any EVE2 = {
   194            externalMemoryMap: [
   195                [ "EVEVECS", { /* name used by SYS/BIOS */
   196                    name: "EVEVECS", space: "code/data", access: "RWX",
   197                    base: 0x80010000, len: 0x100, page: 0,
   198                    comment: "EVE2 Vector Table (256 B)"
   199                }],
   200                [ "EVE2_PROG", {
   201                    name: "EVE2_PROG", space: "code/data", access: "RWX",
   202                    base: 0x82000000, len: 0x400000, page: 1,
   203                    comment: "EVE2 Program Memory (4 MB)"
   204                }],
   205                [ "SR_0", SR_0 ]
   206            ],
   207            codeMemory:  "EVE2_PROG",
   208            dataMemory:  "EVE2_PROG",
   209            stackMemory: "EVE2_PROG"
   210        };
   211
   212        readonly config Any EVE3 = {
   213            externalMemoryMap: [
   214                [ "EVEVECS", { /* name used by SYS/BIOS */
   215                    name: "EVEVECS", space: "code/data", access: "RWX",
   216                    base: 0x80020000, len: 0x100, page: 0,
   217                    comment: "EVE3 Vector Table (256 B)"
   218                }],
   219                [ "EVE3_PROG", {
   220                    name: "EVE3_PROG", space: "code/data", access: "RWX",
   221                    base: 0x83000000, len: 0x400000, page: 1,
   222                    comment: "EVE3 Program Memory (4 MB)"
   223                }],
   224                [ "SR_0", SR_0 ]
   225            ],
   226            codeMemory:  "EVE3_PROG",
   227            dataMemory:  "EVE3_PROG",
   228            stackMemory: "EVE3_PROG"
   229        };
   230
   231        readonly config Any EVE4 = {
   232            externalMemoryMap: [
   233                [ "EVEVECS", { /* name used by SYS/BIOS */
   234                    name: "EVEVECS", space: "code/data", access: "RWX",
   235                    base: 0x80030000, len: 0x100, page: 0,
   236                    comment: "EVE4 Vector Table (256 B)"
   237                }],
   238                [ "EVE4_PROG", {
   239                    name: "EVE4_PROG", space: "code/data", access: "RWX",
   240                    base: 0x84000000, len: 0x400000, page: 1,
   241                    comment: "EVE4 Program Memory (4 MB)"
   242                }],
   243                [ "SR_0", SR_0 ]
   244            ],
   245            codeMemory:  "EVE4_PROG",
   246            dataMemory:  "EVE4_PROG",
   247            stackMemory: "EVE4_PROG"
   248        };
   249
   250        readonly config Any IPU1 = {
   251            externalMemoryMap: [
   252                [ "IPU1_PROG", {
   253                    name: "IPU1_PROG", space: "code/data", access: "RWX",
   254                    base: 0x8A000000, len: 0x800000,
   255                    comment: "IPU1 Program Memory (8 MB)"
   256                }],
   257                [ "SR_0", SR_0 ]
   258            ],
   259            codeMemory:  "IPU1_PROG",
   260            dataMemory:  "IPU1_PROG",
   261            stackMemory: "IPU1_PROG"
   262        };
   263
   264        readonly config Any IPU2 = {
   265            externalMemoryMap: [
   266                [ "IPU2_PROG", {
   267                    name: "IPU2_PROG", space: "code/data", access: "RWX",
   268                    base: 0x8A800000, len: 0x800000,
   269                    comment: "IPU2 Program Memory (8 MB)"
   270                }],
   271                [ "SR_0", SR_0 ]
   272            ],
   273            codeMemory:  "IPU2_PROG",
   274            dataMemory:  "IPU2_PROG",
   275            stackMemory: "IPU2_PROG"
   276        };
   277
   278        readonly config Any HOST = {
   279            externalMemoryMap: [
   280                [ "HOST_PROG", {
   281                    name: "HOST_PROG", space: "code/data", access: "RWX",
   282                    base: 0x8B000000, len: 0x1000000,
   283                    comment: "HOST Program Memory (16 MB)"
   284                }],
   285                [ "SR_0", SR_0 ]
   286            ],
   287            codeMemory:  "HOST_PROG",
   288            dataMemory:  "HOST_PROG",
   289            stackMemory: "HOST_PROG"
   290        };
   291
   292    instance:
   293
   294        /*!
   295         *  ======== externalMemoryMap ========
   296         *  Memory regions as defined in the Vayu Simulator Specification
   297         */
   298        override readonly config xdc.platform.IPlatform.Memory
   299            externalMemoryMap[string] = [
   300                ["EXT_RAM", {
   301                    comment: "1 GB External RAM Memory",
   302                    name: "EXT_RAM",
   303                    base: 0x80000000,
   304                    len:  0x40000000
   305                }]
   306            ];
   307
   308        /*
   309         *  ======== l1PMode ========
   310         *  Define the amount of L1P RAM used for L1 Program Cache.
   311         *
   312         *  Check the device documentation for valid values.
   313         */
   314        config String l1PMode = "32k";
   315
   316        /*
   317         *  ======== l1DMode ========
   318         *  Define the amount of L1D RAM used for L1 Data Cache.
   319         *
   320         *  Check the device documentation for valid values.
   321         */
   322        config String l1DMode = "32k";
   323
   324        /*
   325         *  ======== l2Mode ========
   326         *  Define the amount of L2 RAM used for L2 Cache.
   327         *
   328         *  Check the device documentation for valid values.
   329         */
   330        config String l2Mode = "0k";
   331    };


package ti.platforms.stellaris

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34
    35    /*!
    36     *  ======== ti.platforms.stellaris ========
    37     *  Platform support for any Stellaris device
    38     */
    39    package ti.platforms.stellaris [1,0,0] {
    40        module Platform;
    41    }


package ti.platforms.tiva

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires xdc.platform [1,0,1];
    34    requires ti.catalog.arm.cortexm3;
    35    requires ti.catalog.arm.cortexm4;
    36
    37    /*!
    38     *  ======== ti.platforms.tiva ========
    39     *  Platform support for any Tiva device
    40     */
    41    package ti.platforms.tiva [1,0,0] {
    42        module Platform;
    43    }


module ti.platforms.tiva.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.tiva;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any Tiva device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.tiva:TM4C1290NCZAD"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.tiva:TM4C1290NCZAD");
    52     *  @p
    53     */
    54    @Template ("./Platform.xdt")
    55    metaonly module Platform inherits xdc.platform.IPlatform
    56    {
    57        config xdc.platform.IPlatform.Board BOARD = {
    58            id:             "0",
    59            boardName:      "tiva",
    60            boardFamily:    null,
    61            boardRevision:  null
    62        };
    63
    64        /*!
    65         *  ======== nameFormat ========
    66         *  Encoding of instance creation parameters in the instance's name
    67         *
    68         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    69         *  and `clockRate` can be encoded in the instance name supplied on
    70         *  `xdc.tools.configuro` command line, for example:
    71         *  @p(code)
    72         *      xs xdc.tools.configuro ... -p ti.platforms.tiva:TM4C1290NCZAD:1:20
    73         *  @p
    74         *  Optional parameters can be omitted:
    75         *  @p(code)
    76         *      xs xdc.tools.configuro ... -p ti.platforms.tiva:TM4C1290NCZAD
    77         *  @p
    78         */
    79         readonly config string nameFormat
    80             = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    81
    82    instance:
    83
    84        /*
    85         *  This platform supports either Cortex M3 or M4 cores.
    86         *  The corresponding "actual" catalogName is overwritten
    87         *  in Platform.instance$meta$init() based on the device name
    88         */
    89        config xdc.platform.IExeContext.Cpu CPU = {
    90            id:             "0",
    91            clockRate:      1.0,
    92            catalogName:    "ti.catalog.arm.cortexm4",
    93            deviceName:     "Tiva",
    94            revision:       "",
    95        };
    96
    97        /*!
    98         *  ======== deviceName ========
    99         *  The name of an `ICpuDataSheet` module for the device
   100         *
   101         *  This parameter is required, but it does not have to be set explicitly;
   102         *  it can be encoded in the instance's name.
   103         */
   104        config string deviceName;
   105
   106        /*!
   107         *  ======== clockRate ========
   108         *  The clock rate for this device.
   109         */
   110        config Double clockRate;
   111
   112        override config string codeMemory = null;
   113
   114        override config string dataMemory = null;
   115
   116        override config string stackMemory = null;
   117
   118        /*!
   119         *  ======== includeLinkCmdFile ========
   120         *  The flag that specifies if the platform should include a linker command
   121         *  file.
   122         *
   123         *  By default, a user is responsible for adding a linker command file to
   124         *  the project, or to the linker command line. However, if this flag is
   125         *  set, this platform will include a default linker command file for the
   126         *  selected device.
   127         */
   128        config Bool includeLinkCmdFile = false;
   129    };


package ti.platforms.tms320x28

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    requires ti.catalog.c2800;
    34
    35    /*!
    36     *  ======== ti.platforms.tms320x28 ========
    37     *  Generic 28xx platform support
    38     */
    39    package ti.platforms.tms320x28 [1,0,0] {
    40        module Platform;
    41    }


module ti.platforms.tms320x28.Platform

     1    /*
     2     * Copyright (c) 2016, Texas Instruments Incorporated
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions
     7     * are met:
     8     *
     9     * *  Redistributions of source code must retain the above copyright
    10     *    notice, this list of conditions and the following disclaimer.
    11     *
    12     * *  Redistributions in binary form must reproduce the above copyright
    13     *    notice, this list of conditions and the following disclaimer in the
    14     *    documentation and/or other materials provided with the distribution.
    15     *
    16     * *  Neither the name of Texas Instruments Incorporated nor the names of
    17     *    its contributors may be used to endorse or promote products derived
    18     *    from this software without specific prior written permission.
    19     *
    20     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    21     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    22     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    23     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    24     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    25     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    26     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    27     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    28     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    29     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    30     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    31     */
    32
    33    /*
    34     *  ======== Platform.xdc ========
    35     */
    36    package ti.platforms.tms320x28;
    37
    38    /*!
    39     *  ======== Platform ========
    40     *  A generic platform that supports any TMS320x28 device
    41     *
    42     *  The device to be used by this platform is passed as the platform instance
    43     *  name. On the `xdc.tools.configuro` command line, it is done in the
    44     *  following way:
    45     *  @p(code)
    46     *  xs xdc.tools.configuro ... -p "ti.platforms.tms320x28:TMS320C2812"
    47     *  @p
    48     *
    49     *  In package.bld, the platform instance is selected as in:
    50     *  @p(code)
    51     *  Pkg.addExecutable("test", target, "ti.platforms.tms320x28:TMS320C2812");
    52     *  @p
    53     */
    54    metaonly module Platform inherits xdc.platform.IPlatform
    55    {
    56        config xdc.platform.IPlatform.Board BOARD = {
    57            id:             "0",
    58            boardName:      "tms320x28",
    59            boardFamily:    null,
    60            boardRevision:  null
    61        };
    62
    63        /*!
    64         *  ======== nameFormat ========
    65         *  Encoding of instance creation parameters in the instance's name
    66         *
    67         *  For this platform, the parameters `deviceName`, `includeLinkCmdFile`
    68         *  and `clockRate` can be encoded in the instance name supplied on
    69         *  `xdc.tools.configuro` command line, for example:
    70         *  @p(code)
    71         *      xs xdc.tools.configuro ... -p ti.platforms.tms320x28:TMS320F28035:1:60
    72         *  @p
    73         *  Optional parameters can be omitted:
    74         *  @p(code)
    75         *      xs xdc.tools.configuro ... -p ti.platforms.tms320x28:TMS320F28035
    76         *  @p
    77         */
    78        readonly config string nameFormat
    79            = "$(deviceName):$(includeLinkCmdFile):$(clockRate)";
    80
    81        /*!
    82         *  ======== genAliases ========
    83         *  Generate symbol mapping for TI Tools 6.0 or newer
    84         */
    85        config Bool genAliases = true;
    86
    87    instance:
    88
    89        config xdc.platform.IExeContext.Cpu CPU = {
    90            id:             "0",
    91            clockRate:      0,
    92            catalogName:    "ti.catalog.c2800",
    93            deviceName:     "TMS320F28069",
    94            revision:       null,
    95        };
    96
    97        /*!
    98         *  ======== deviceName ========
    99         *  The name of an `ICpuDataSheet` module for the device
   100         *
   101         *  This parameter is required, but it does not have to be set explicitly;
   102         *  it can be encoded in the instance's name.
   103         */
   104        config string deviceName;
   105
   106        /*!
   107         *  ======== clockRate ========
   108         *  The clock rate for this device.
   109         */
   110        config Double clockRate = 0;
   111
   112        override config string codeMemory = null;
   113
   114        override config string dataMemory = null;
   115
   116        override config string stackMemory = null;
   117
   118        /*!
   119         *  ======== includeLinkCmdFile ========
   120         *  The flag that specifies if the platform should include a linker command
   121         *  file.
   122         *
   123         *  By default, a user is responsible for adding a linker command file to
   124         *  the project, or to the linker command line. However, if this flag is
   125         *  set, this platform will include a default linker command file for the
   126         *  selected device.
   127         */
   128        config Bool includeLinkCmdFile = false;
   129    };


interface ti.sdoarch.standards.pkg.IVersion

     1    /*!
     2     *  ======== IVersion ========
     3     *  Standard package version number interface
     4     *
     5     *  This interface is part of the SDO Package Standard.  Each conformant
     6     *  package that supplies a version number contains a module named
     7     *  `Version` that implements this interface.  In other words,
     8     *  @p(blist)
     9     *      - the package's `package.xdc` file declares `Version` as one of it's
    10     *        modules
    11     *      - the package contains a spec for the `Version` module (named
    12     *        `Version.xdc`) and a header generated from this spec (named
    13     *        `Version.h`)
    14     *      - the `Version.xdc` file may optionally be generated from the
    15     *        `ti/sdoarch/standards/pkg/Version.xdt` template when the package's
    16     *        build script runs.
    17     *  @p
    18     *
    19     *  This interface defines a set of values that are used to
    20     *  @p(nlist)
    21     *      - informally communicate the "degree" of change between successive
    22     *        releases of a package,
    23     *      - provide a "key" that enables the producer to unambigeously identify
    24     *        the sources (and tools) used to produce the package, and
    25     *      - enable consumers to easily communicate to producers the version(s)
    26     *        of the package(s) they are using.
    27     *  @p
    28     */
    29    interface IVersion {
    30        /*!
    31         *  ======== MAJOR ========
    32         *  Major version number
    33         *
    34         *  This number should be changed when major changes in the package
    35         *  occur. Examples include adding new modules, adding substantial new
    36         *  features to the algorithm(s).
    37         */
    38        const UInt16 MAJOR;
    39
    40        /*!
    41         *  ======== MINOR ========
    42         *  Minor version number
    43         *
    44         *  This number should be changed when minor changes in the package
    45         *  occur. Examples include minor changes to the existing APIs,
    46         *  adding minor features to the algorithms(s) including expanding the
    47         *  configuration options.
    48         */
    49        const UInt16 MINOR;
    50
    51        /*!
    52         *  ======== PATCH ========
    53         *  Patch level
    54         *
    55         *  This number should be changed when bug fixes or performance
    56         *  improvements are introduced. There should be no changes in the APIs
    57         *  in this case.
    58         */
    59        const UInt16 PATCH;
    60
    61        /*!
    62         *  ======== WIDTH ========
    63         *  Minimum width of print fields
    64         *
    65         *  When denoting version numbers using '.' to separate fields
    66         *  there is a danger of confusing version "6.1" and version "6.10";
    67         *  because, in decimal notation 6.1 == 6.10.  To avoid
    68         *  this confusion, it is common practice to adopt a fixed minimum field
    69         *  width that's when printing version dimensions (other than MAJOR);
    70         *  e.g., rather than printing "6.1", if WIDTH == 2 then the version would
    71         *  be displayed as "6.01".
    72         */
    73        const UInt16 WIDTH;
    74
    75        /*!
    76         *  ======== getString ========
    77         *  Returns a string representation of the version
    78         *
    79         *  This method return a string of the form:
    80         *  @p(code)
    81         *      MAJOR<sep>MINOR<sep>PATCH
    82         *  @p
    83         *  where `MAJOR`, `MINOR`, and `PATCH` are
    84         *  the values sepcified in this interface and `<sep>` is the (optional)
    85         *  argument to this method.  If `separator` is not supplied (or is
    86         *  `null`), `<sep>` defaults to `'.'`.
    87         */
    88        function getString(separator);
    89    }
    90
    91    /* @(#) ti.sdoarch.standards.pkg; 1, 0, 0; Thu, 16 Jul 2009 21:28:29 GMT; /db/ztree/library/trees/ps-b05x/src  */


package ti.sdoarch.standards.pkg

     1    /*!
     2     *  ======== ti.sdoarch.standards.pkg ========
     3     *  SDO Architecture Team Package Standard
     4     *
     5     *  This package contains the SDO Architecture Team's Package Standard: a
     6     *  set of rules and guidelines used to deploy production quality real-time
     7     *  target content.
     8     *
     9     *  The files in this package are not licensed; i.e., they are in the public
    10     *  domain.
    11     */
    12    package ti.sdoarch.standards.pkg [1, 0, 0]
    13    {
    14        interface IVersion; /* standardized version information */
    15    }
    16
    17    /* @(#) ti.sdoarch.standards.pkg; 1, 0, 0; Thu, 16 Jul 2009 21:28:29 GMT; /db/ztree/library/trees/ps-b05x/src  */


module ti.targets.C28

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== C28.xdc ========
    15     *
    16     */
    17
    18    /*!
    19     *  ======== C28 ========
    20     *  TI C28 default runtime model (little endian)
    21     */
    22    metaonly module C28 inherits ti.targets.ITarget {
    23        override readonly config string name                = "C28";
    24        override readonly config string suffix              = "28";
    25        override readonly config string isa                 = "28";
    26        override readonly config xdc.bld.ITarget.Model model= {endian: "little"};
    27        override readonly config string rts                 = "ti.targets.rts2800";
    28        final override readonly config Bool alignDirectiveSupported = false;
    29
    30        /*!
    31         *  ======== ar ========
    32         *  Define archiver executable
    33         *
    34         *  Options:
    35         *  @p(dlist)
    36         *      -`-r`
    37         *          replace file
    38         *      -`-q`
    39         *          quiet mode
    40         */
    41        override readonly config xdc.bld.ITarget2.Command ar = {
    42            cmd: "ar2000",
    43            opts: "rq"
    44        };
    45
    46        /*!
    47         *  ======== cc ========
    48         *  Define compiler executable
    49         *
    50         *  Options:
    51         *  @p(dlist)
    52         *      -`-c`
    53         *          no linking
    54         *      -`-v28`
    55         *          compile for c28x.
    56         */
    57        override readonly config xdc.bld.ITarget2.Command cc = {
    58            cmd: "cl2000 -c",
    59            opts: "-v28"
    60        };
    61
    62        /*!
    63         *  ======== vers ========
    64         *  Define the vers command
    65         */
    66        override readonly config xdc.bld.ITarget2.Command vers = {
    67            cmd: "cl2000",
    68            opts: "--compiler_revision"
    69        };
    70
    71        /*!
    72         *  ======== asm ========
    73         *  Define assembler executable
    74         *
    75         *  Options:
    76         *  @p(dlist)
    77         *      -`-c`
    78         *          no linking
    79         *      -`-v28`
    80         *          compile for c28x.
    81         *
    82         */
    83        override readonly config xdc.bld.ITarget2.Command asm = {
    84            cmd: "cl2000 -c",
    85            opts: "-v28"
    86        };
    87
    88        /*!
    89         *  Define linker executable
    90         */
    91        override readonly config xdc.bld.ITarget2.Command lnk = {
    92            cmd: "cl2000",
    93            opts: "-z"
    94        };
    95
    96        /*!
    97         *  ======== asmOpts ========
    98         *  User configurable assembler options.
    99         *
   100         *  Defaults:
   101         *  @p(dlist)
   102         *      -`-qq`
   103         *          super quiet mode
   104         */
   105        override config xdc.bld.ITarget2.Options asmOpts = {
   106            prefix: "-qq",
   107            suffix: ""
   108        };
   109
   110        /*!
   111         *  ======== ccOpts ========
   112         *  Compiler options
   113         *  @p(dlist)
   114         *      -`-qq`
   115         *          super quiet mode
   116         *      -`-pdsw225`
   117         *          generate a warning for implicitly declared functions; i.e.,
   118         *          functions without prototypes
   119         */
   120        override config xdc.bld.ITarget2.Options ccOpts = {
   121            prefix: "-qq -pdsw225",
   122            suffix: ""
   123        };
   124
   125        /*!
   126         *  ======== profiles ========
   127         *  Standard options profiles for the TI tool-chain.
   128         */
   129        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   130            ["debug", {
   131                compileOpts: {
   132                    copts: "-g",
   133                    defs:  "-D_DEBUG_=1",
   134                }
   135            }],
   136            ["release", {
   137                compileOpts: {
   138                    copts: "-O2",
   139                },
   140            }],
   141            ["profile", {
   142                compileOpts: {
   143                    copts: "-gp",
   144                },
   145            }],
   146            ["coverage", {
   147                compileOpts: {
   148                    copts: "-gp",
   149                },
   150            }],
   151        ];
   152
   153        /*  Include search path  */
   154        override config string includeOpts = "-I$(rootDir)/include";
   155
   156        final override readonly config string sectMap[string] = [
   157            [".text", "code"],
   158            [".switch", "code"],
   159            [".data", "data"],
   160            [".cinit", "code"],
   161            [".bss", "data"],
   162            [".ebss", "data"],
   163            [".econst", "code"],
   164            [".const", "code"],
   165            [".stack", "stack"],
   166            [".sysmem", "data"],
   167            [".esysmem", "data"],
   168            [".pinit", "code"],
   169            [".args", "data"],
   170            [".cio", "data"],
   171        ];
   172
   173        final override readonly config Bool splitMap[string] = [
   174            [".text", true],
   175            [".const", true],
   176            [".econst", true],
   177            [".ebss", true],
   178            [".data", true],
   179            [".switch", true],
   180            [".far", true],
   181            [".args", true],
   182            [".cio", true]
   183        ];
   184
   185        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   186            t_IArg          : { size: 2, align: 2 },
   187            t_Char          : { size: 1, align: 1 },
   188            t_Double        : { size: 2, align: 2 },
   189            t_Float         : { size: 2, align: 2 },
   190            t_Fxn           : { size: 2, align: 1 }, /* near */
   191            t_Int           : { size: 1, align: 1 },
   192            t_Int8          : { size: 1, align: 1 },
   193            t_Int16         : { size: 1, align: 1 },
   194            t_Int32         : { size: 2, align: 2 },
   195            t_Int64         : { size: 4, align: 2 },
   196            t_Long          : { size: 2, align: 2 },
   197            t_LDouble       : { size: 2, align: 2 },
   198            t_LLong         : { size: 4, align: 2 },
   199            t_Ptr           : { size: 1, align: 1 },
   200            t_Short         : { size: 1, align: 1 },
   201            t_Size          : { size: 2, align: 2 },
   202        };
   203
   204        override readonly config Int bitsPerChar = 16;
   205    }
   206    /*
   207     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:57; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   208
   209     */
   210


module ti.targets.C28_float

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== C28_float.xdc ========
    15     *
    16     */
    17
    18    /*!
    19     *  ======== C28_float ========
    20     *  TI C28 large model little endian with floating point support (fpu32)
    21     */
    22    metaonly module C28_float inherits ti.targets.ITarget {
    23        override readonly config string name                = "C28_float";
    24        override readonly config string suffix              = "28FP";
    25        override readonly config string isa                 = "28FP";
    26        override readonly config xdc.bld.ITarget.Model model = {
    27            dataModel: "large",
    28            endian: "little"
    29        };
    30
    31        override readonly config string rts                 = "ti.targets.rts2800";
    32
    33        /*
    34         *  ======== compatibleSuffixes ========
    35         */
    36        override config String compatibleSuffixes[] = ["28L"];
    37
    38        final override readonly config Bool alignDirectiveSupported = false;
    39
    40        /*!
    41         *  ======== ar ========
    42         *  Define archiver executable
    43         *
    44         *  Options:
    45         *  @p(dlist)
    46         *      -`-r`
    47         *          replace file
    48         *      -`-q`
    49         *          quiet mode
    50         */
    51        override readonly config xdc.bld.ITarget2.Command ar = {
    52            cmd: "ar2000",
    53            opts: "rq"
    54        };
    55
    56
    57        /*!
    58         *  ======== cc ========
    59         *  Define compiler executable
    60         *
    61         *  Options:
    62         *  @p(dlist)
    63         *      -`-c`
    64         *          no linking
    65         *      -`-v28`
    66         *          compile for c28x.
    67         *      -`-ml`
    68         *          use large memory model
    69         *      -`-DLARGE_MODEL=1`
    70         *          required to use va_arg in large model
    71         *      -`--float_support=fpu32`
    72         *          Enable FPU
    73         */
    74        override readonly config xdc.bld.ITarget2.Command cc = {
    75            cmd: "cl2000 -c",
    76            opts: "-v28 -DLARGE_MODEL=1 -ml --float_support=fpu32"
    77        };
    78
    79        /*!
    80         *  ======== vers ========
    81         *  Define the vers command
    82         */
    83        override readonly config xdc.bld.ITarget2.Command vers = {
    84            cmd: "cl2000",
    85            opts: "--compiler_revision"
    86        };
    87
    88        /*!
    89         *  ======== asm ========
    90         *  Define assembler executable
    91         *
    92         *  Options:
    93         *  @p(dlist)
    94         *      -`-c`
    95         *          no linking
    96         *      -`-v28`
    97         *          compile for c28x.
    98         *      -`-ml`
    99         *          use large memory model
   100         *      -`-DLARGE_MODEL=1`
   101         *          because compiler and BIOS are broken; asembler
   102         *          defines __LARGE_MODEL but BIOS uses LARGE_MODEL
   103         *      -`--float_support=fpu32`
   104         *          Enable FPU
   105         */
   106        override readonly config xdc.bld.ITarget2.Command asm = {
   107            cmd: "cl2000 -c",
   108            opts: "-v28 -ml -DLARGE_MODEL=1 --float_support=fpu32"
   109        };
   110
   111
   112        /*!
   113         *  ======== lnk ========
   114         *  Define linker executable
   115         */
   116        override readonly config xdc.bld.ITarget2.Command lnk = {
   117            cmd: "cl2000",
   118            opts: "-z"
   119        };
   120
   121        /*!
   122         *  ======== asmOpts ========
   123         *  User configurable assembler options.
   124         *
   125         *  Defaults:
   126         *  @p(dlist)
   127         *      -`-qq`
   128         *          super quiet mode
   129         */
   130        override config xdc.bld.ITarget2.Options asmOpts = {
   131            prefix: "-qq",
   132            suffix: ""
   133        };
   134
   135        /*!
   136         *  ======== ccOpts ========
   137         *  Compiler options
   138         *  @p(dlist)
   139         *      -`-qq`
   140         *          super quiet mode
   141         *      -`-pdsw225`
   142         *          generate a warning for implicitly declared functions; i.e.,
   143         *          functions without prototypes
   144         *      -`-Dfar= `
   145         *          ignore keyword far; this allows one to write code that can
   146         *          be compiled in large model and small model without #ifdef's
   147         */
   148        override config xdc.bld.ITarget2.Options ccOpts = {
   149            prefix: "-qq -pdsw225 -Dfar= ",
   150            suffix: ""
   151        };
   152
   153        /*!
   154         *  ======== profiles ========
   155         *  Standard options profiles for the TI tool-chain.
   156         */
   157        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   158            ["debug", {
   159                compileOpts: {
   160                    copts: "-g",
   161                    defs:  "-D_DEBUG_=1",
   162                }
   163            }],
   164            ["release", {
   165                compileOpts: {
   166                    copts: "-O2",
   167                },
   168            }],
   169            ["profile", {
   170                compileOpts: {
   171                    copts: "-gp",
   172                },
   173            }],
   174            ["coverage", {
   175                compileOpts: {
   176                    copts: "-gp",
   177                },
   178            }],
   179        ];
   180
   181        /*!
   182         *  ======== includeOpts ========
   183         *  Default include search path
   184         */
   185        override config string includeOpts = "-I$(rootDir)/include";
   186
   187        final override readonly config string sectMap[string] =
   188            ti.targets.C28.sectMap;
   189
   190        final override readonly config Bool splitMap[string] =
   191            ti.targets.C28.splitMap;
   192
   193        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   194            t_IArg          : { size: 2, align: 2 },
   195            t_Char          : { size: 1, align: 1 },
   196            t_Double        : { size: 2, align: 2 },
   197            t_Float         : { size: 2, align: 2 },
   198            t_Fxn           : { size: 2, align: 2 }, /* far */
   199            t_Int           : { size: 1, align: 1 },
   200            t_Int8          : { size: 1, align: 1 },
   201            t_Int16         : { size: 1, align: 1 },
   202            t_Int32         : { size: 2, align: 2 },
   203            t_Int64         : { size: 4, align: 2 },
   204            t_Long          : { size: 2, align: 2 },
   205            t_LDouble       : { size: 2, align: 2 },
   206            t_LLong         : { size: 4, align: 2 },
   207            t_Ptr           : { size: 2, align: 2 },
   208            t_Short         : { size: 1, align: 1 },
   209            t_Size          : { size: 2, align: 2 },
   210        };
   211
   212        override readonly config Int bitsPerChar = 16;
   213    }
   214    /*
   215     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:57; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   216
   217     */
   218


module ti.targets.C28_large

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== C28_large.xdc ========
    15     *
    16     */
    17
    18
    19    /*!
    20     *  ======== C28_large ========
    21     *  TI C28 large model little endian
    22     */
    23    metaonly module C28_large inherits ti.targets.ITarget {
    24        override readonly config string name                = "C28_large";
    25        override readonly config string suffix              = "28L";
    26        override readonly config string isa                 = "28";
    27        override readonly config xdc.bld.ITarget.Model model    = {dataModel: "large", endian: "little"};
    28        override readonly config string rts                 = "ti.targets.rts2800";
    29        final override readonly config Bool alignDirectiveSupported = false;
    30
    31        /*!
    32         *  ======== ar ========
    33         *  Define archiver executable
    34         *
    35         *  Options:
    36         *  @p(dlist)
    37         *      -`-r`
    38         *          replace file
    39         *      -`-q`
    40         *          quiet mode
    41         */
    42        override readonly config xdc.bld.ITarget2.Command ar = {
    43            cmd: "ar2000",
    44            opts: "rq"
    45        };
    46
    47        /*!
    48         *  ======== cc ========
    49         *  Define compiler executable
    50         *
    51         *  Options:
    52         *  @p(dlist)
    53         *      -`-c`
    54         *          no linking
    55         *      -`-v28`
    56         *          compile for c28x.
    57         *      -`-ml`
    58         *          use large memory model
    59         *      -`-DLARGE_MODEL=1`
    60         *          required to use va_arg in large model
    61         */
    62        override readonly config xdc.bld.ITarget2.Command cc = {
    63            cmd: "cl2000 -c",
    64            opts: "-v28 -DLARGE_MODEL=1 -ml"
    65        };
    66
    67        /*!
    68         *  ======== vers ========
    69         *  Define the vers command
    70         */
    71        override readonly config xdc.bld.ITarget2.Command vers = {
    72            cmd: "cl2000",
    73            opts: "--compiler_revision"
    74        };
    75
    76        /*!
    77         *  ======== asm ========
    78         *  Define assembler executable
    79         *
    80         *  Options:
    81         *  @p(dlist)
    82         *      -`-c`
    83         *          no linking
    84         *      -`-v28`
    85         *          compile for c28x.
    86         *      -`-ml`
    87         *          use large memory model
    88         *      -`-DLARGE_MODEL=1`
    89         *          because compiler and BIOS are broken; asembler
    90         *          defines __LARGE_MODEL but BIOS uses LARGE_MODEL
    91         *
    92         */
    93        override readonly config xdc.bld.ITarget2.Command asm = {
    94            cmd: "cl2000 -c",
    95            opts: "-v28 -ml -DLARGE_MODEL=1"
    96        };
    97
    98        /*!
    99         *  ======== lnk ========
   100         *  Define linker executable
   101         */
   102        override readonly config xdc.bld.ITarget2.Command lnk = {
   103            cmd: "cl2000",
   104            opts: "-z"
   105        };
   106
   107        /*!
   108         *  ======== asmOpts ========
   109         *  User configurable assembler options.
   110         *
   111         *  Defaults:
   112         *  @p(dlist)
   113         *      -`-qq`
   114         *          super quiet mode
   115         */
   116        override config xdc.bld.ITarget2.Options asmOpts = {
   117            prefix: "-qq",
   118            suffix: ""
   119        };
   120
   121        /*!
   122         *  ======== ccOpts ========
   123         *  Compiler options
   124         *  @p(dlist)
   125         *      -`-qq`
   126         *          super quiet mode
   127         *      -`-pdsw225`
   128         *          generate a warning for implicitly declared functions; i.e.,
   129         *          functions without prototypes
   130         *      -`-Dfar= `
   131         *          ignore keyword far; this allows one to write code that can
   132         *          be compiled in large model and small model without #ifdef's
   133         */
   134        override config xdc.bld.ITarget2.Options ccOpts = {
   135            prefix: "-qq -pdsw225 -Dfar= ",
   136            suffix: ""
   137        };
   138
   139        /*!
   140         *  ======== profiles ========
   141         *  Standard options profiles for the TI tool-chain.
   142         */
   143        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   144            ["debug", {
   145                compileOpts: {
   146                    copts: "-g",
   147                    defs:  "-D_DEBUG_=1",
   148                }
   149            }],
   150            ["release", {
   151                compileOpts: {
   152                    copts: "-O2",
   153                },
   154            }],
   155            ["profile", {
   156                compileOpts: {
   157                    copts: "-gp",
   158                },
   159            }],
   160            ["coverage", {
   161                compileOpts: {
   162                    copts: "-gp",
   163                },
   164            }],
   165        ];
   166
   167        /*!
   168         *  ======== includeOpts ========
   169         *  Default include search path
   170         */
   171        override config string includeOpts = "-I$(rootDir)/include";
   172
   173        final override readonly config string sectMap[string] =
   174            ti.targets.C28.sectMap;
   175
   176        final override readonly config Bool splitMap[string] =
   177            ti.targets.C28.splitMap;
   178
   179        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   180            t_IArg          : { size: 2, align: 2 },
   181            t_Char          : { size: 1, align: 1 },
   182            t_Double        : { size: 2, align: 2 },
   183            t_Float         : { size: 2, align: 2 },
   184            t_Fxn           : { size: 2, align: 2 }, /* far */
   185            t_Int           : { size: 1, align: 1 },
   186            t_Int8          : { size: 1, align: 1 },
   187            t_Int16         : { size: 1, align: 1 },
   188            t_Int32         : { size: 2, align: 2 },
   189            t_Int64         : { size: 4, align: 2 },
   190            t_Long          : { size: 2, align: 2 },
   191            t_LDouble       : { size: 2, align: 2 },
   192            t_LLong         : { size: 4, align: 2 },
   193            t_Ptr           : { size: 2, align: 2 },
   194            t_Short         : { size: 1, align: 1 },
   195            t_Size          : { size: 2, align: 2 },
   196        };
   197
   198        override readonly config Int bitsPerChar = 16;
   199    }
   200    /*
   201     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   202
   203     */
   204


module ti.targets.C66

     1    /*
     2     *  Copyright (c) 2010-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== C66.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== C66 ========
    19     *  TI C66 little endian (COFF)
    20     */
    21    metaonly module C66 inherits ITarget {
    22        override readonly config string name                 = "C66";
    23        override readonly config string suffix               = "66";
    24        override readonly config string isa                  = "66";
    25        override readonly config xdc.bld.ITarget.Model model = {
    26            endian: "little",
    27        };
    28        override readonly config xdc.bld.ITarget.Module base = ti.targets.C64P;
    29
    30        /*
    31         *  ======== compatibleSuffixes ========
    32         */
    33        override config String compatibleSuffixes[] = ["674", "64P"];
    34
    35        override readonly config string rts = "ti.targets.rts6000";
    36        override config string platform     = "ti.platforms.simTCI6616";
    37
    38        override readonly config xdc.bld.ITarget2.Command ar = {
    39            cmd: "ar6x",
    40            opts: "rq"
    41        };
    42
    43        override readonly config xdc.bld.ITarget2.Command cc = {
    44            cmd: "cl6x -c",
    45            opts: "-mv6600 --abi=coffabi"
    46        };
    47
    48        override readonly config xdc.bld.ITarget2.Command vers = {
    49            cmd: "cl6x",
    50            opts: "--compiler_revision"
    51        };
    52
    53        override readonly config xdc.bld.ITarget2.Command asm = {
    54            cmd: "cl6x -c",
    55            opts: "-mv6600 --abi=coffabi"
    56        };
    57
    58        override readonly config xdc.bld.ITarget2.Command lnk = {
    59            cmd: "cl6x",
    60            opts: "--abi=coffabi -z"
    61        };
    62
    63        /*!
    64         *  ======== asmOpts ========
    65         *  User configurable assembler options.
    66         *
    67         *  Defaults:
    68         *  @p(dlist)
    69         *      -`-qq`
    70         *          super quiet mode
    71         */
    72        override config xdc.bld.ITarget2.Options asmOpts = {
    73            prefix: "-qq",
    74            suffix: ""
    75        };
    76
    77        /*!
    78         *  ======== ccOpts ========
    79         *  User configurable compiler options.
    80         *
    81         *  Defaults:
    82         *  @p(dlist)
    83         *      -`-qq`
    84         *          super quiet mode
    85         *      -`-pdsw225`
    86         *          generate a warning for implicitly declared functions; i.e.,
    87         *          functions without prototypes
    88         */
    89        override config xdc.bld.ITarget2.Options ccOpts = {
    90            prefix: "-qq -pdsw225",
    91            suffix: ""
    92        };
    93
    94        /*!
    95         *  ======== ccConfigOpts ========
    96         *  User configurable compiler options for the generated config C file.
    97         *
    98         *  -mo places all functions into subsections
    99         *  --no_compress helps with compile time with no real difference in
   100         *  code size since the generated config.c is mostly data and small
   101         *  function stubs.
   102         */
   103        override config xdc.bld.ITarget2.Options ccConfigOpts = {
   104            prefix: "$(ccOpts.prefix) -mo --no_compress",
   105            suffix: "$(ccOpts.suffix)"
   106        };
   107
   108        override config string includeOpts = "-I$(rootDir)/include";
   109
   110        final override readonly config string sectMap[string] =
   111            ti.targets.C64P.sectMap;
   112
   113        final override readonly config Bool splitMap[string] =
   114            ti.targets.C64P.splitMap;
   115
   116        override readonly config xdc.bld.ITarget.StdTypes stdTypes =
   117            ti.targets.C64P.stdTypes;
   118
   119        override readonly config Int bitsPerChar =
   120            ti.targets.C64P.bitsPerChar;
   121    }
   122    /*
   123     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   124
   125     */
   126


module ti.targets.C66_big_endian

     1    /*
     2     *  Copyright (c) 2010-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== C66.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== C66_big_endian ========
    19     *  TI C66 big endian (COFF)
    20     */
    21    metaonly module C66_big_endian inherits ITarget {
    22        override readonly config string name                 = "C66_big_endian";
    23        override readonly config string suffix               = "66e";
    24        override readonly config string isa                  = "66";
    25        override readonly config xdc.bld.ITarget.Model model = {
    26            endian: "big",
    27        };
    28        override readonly config xdc.bld.ITarget.Module base = ti.targets.C64P;
    29
    30        /*
    31         *  ======== compatibleSuffixes ========
    32         */
    33        override config String compatibleSuffixes[] = ["674e", "64Pe"];
    34
    35        override readonly config string rts = "ti.targets.rts6000";
    36        override config string platform     = "ti.platforms.simTCI6616";
    37
    38        override readonly config xdc.bld.ITarget2.Command ar = {
    39            cmd: "ar6x",
    40            opts: "rq"
    41        };
    42
    43        override readonly config xdc.bld.ITarget2.Command cc = {
    44            cmd: "cl6x -c",
    45            opts: "-mv6600 -me --abi=coffabi"
    46        };
    47
    48        override readonly config xdc.bld.ITarget2.Command vers = {
    49            cmd: "cl6x",
    50            opts: "--compiler_revision"
    51        };
    52
    53        override readonly config xdc.bld.ITarget2.Command asm = {
    54            cmd: "cl6x -c",
    55            opts: "-mv6600 -me --abi=coffabi"
    56        };
    57
    58        override readonly config xdc.bld.ITarget2.Command lnk = {
    59            cmd: "cl6x",
    60            opts: "--abi=coffabi -z"
    61        };
    62
    63        /*!
    64         *  ======== asmOpts ========
    65         *  User configurable assembler options.
    66         *
    67         *  Defaults:
    68         *  @p(dlist)
    69         *      -`-qq`
    70         *          super quiet mode
    71         */
    72        override config xdc.bld.ITarget2.Options asmOpts = {
    73            prefix: "-qq",
    74            suffix: ""
    75        };
    76
    77        /*!
    78         *  ======== ccOpts ========
    79         *  User configurable compiler options.
    80         *
    81         *  Defaults:
    82         *  @p(dlist)
    83         *      -`-qq`
    84         *          super quiet mode
    85         *      -`-pdsw225`
    86         *          generate a warning for implicitly declared functions; i.e.,
    87         *          functions without prototypes
    88         */
    89        override config xdc.bld.ITarget2.Options ccOpts = {
    90            prefix: "-qq -pdsw225",
    91            suffix: ""
    92        };
    93
    94        /*!
    95         *  ======== ccConfigOpts ========
    96         *  User configurable compiler options for the generated config C file.
    97         *
    98         *  -mo places all functions into subsections
    99         *  --no_compress helps with compile time with no real difference in
   100         *  code size since the generated config.c is mostly data and small
   101         *  function stubs.
   102         */
   103        override config xdc.bld.ITarget2.Options ccConfigOpts = {
   104            prefix: "$(ccOpts.prefix) -mo --no_compress",
   105            suffix: "$(ccOpts.suffix)"
   106        };
   107
   108        override config string includeOpts = "-I$(rootDir)/include";
   109
   110        final override readonly config string sectMap[string] =
   111            ti.targets.C64P.sectMap;
   112
   113        final override readonly config Bool splitMap[string] =
   114            ti.targets.C64P.splitMap;
   115
   116        override readonly config xdc.bld.ITarget.StdTypes stdTypes =
   117            ti.targets.C64P.stdTypes;
   118
   119        override readonly config Int bitsPerChar =
   120            ti.targets.C64P.bitsPerChar;
   121    }
   122
   123    /*
   124     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   125
   126     */
   127


module ti.targets.C674

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== C674.xdc ========
    15     *
    16     */
    17
    18    /*!
    19     *  ======== C674 ========
    20     *  TI C674 default runtime model (little endian)
    21     */
    22    metaonly module C674 inherits ti.targets.ITarget {
    23        override readonly config string name                 = "C674";
    24        override readonly config string suffix               = "674";
    25        override readonly config string isa                  = "674";
    26        override readonly config xdc.bld.ITarget.Model model = {
    27            endian: "little"
    28        };
    29        override readonly config xdc.bld.ITarget.Module base = ti.targets.C64P;
    30
    31        /*
    32         *  ======== compatibleSuffixes ========
    33         */
    34        override config String compatibleSuffixes[] = ["64P", "64", "62"];
    35
    36        override readonly config string rts = "ti.targets.rts6000";
    37        override config string platform     = "ti.platforms.evmDA830";
    38
    39        override readonly config xdc.bld.ITarget2.Command ar = {
    40            cmd: "ar6x",
    41            opts: "rq"
    42        };
    43
    44        override readonly config xdc.bld.ITarget2.Command cc = {
    45            cmd: "cl6x -c",
    46            opts: "-mv6740"
    47        };
    48
    49        override readonly config xdc.bld.ITarget2.Command vers = {
    50            cmd: "cl6x",
    51            opts: "--compiler_revision"
    52        };
    53
    54        override readonly config xdc.bld.ITarget2.Command asm = {
    55            cmd: "cl6x -c",
    56            opts: "-mv6740"
    57        };
    58
    59        override readonly config xdc.bld.ITarget2.Command lnk = {
    60            cmd: "cl6x",
    61            opts: "-z"
    62        };
    63
    64        /*!
    65         *  ======== asmOpts ========
    66         *  User configurable assembler options.
    67         *
    68         *  Defaults:
    69         *  @p(dlist)
    70         *      -`-qq`
    71         *          super quiet mode
    72         */
    73        override config xdc.bld.ITarget2.Options asmOpts = {
    74            prefix: "-qq",
    75            suffix: ""
    76        };
    77
    78        /*!
    79         *  ======== ccOpts ========
    80         *  User configurable compiler options.
    81         *
    82         *  Defaults:
    83         *  @p(dlist)
    84         *      -`-qq`
    85         *          super quiet mode
    86         *      -`-pdsw225`
    87         *          generate a warning for implicitly declared functions; i.e.,
    88         *          functions without prototypes
    89         */
    90        override config xdc.bld.ITarget2.Options ccOpts = {
    91            prefix: "-qq -pdsw225",
    92            suffix: ""
    93        };
    94
    95        /*!
    96         *  ======== ccConfigOpts ========
    97         *  User configurable compiler options for the generated config C file.
    98         *
    99         *  -mo places all functions into subsections
   100         *  --no_compress helps with compile time with no real difference in
   101         *  code size since the generated config.c is mostly data and small
   102         *  function stubs.
   103         */
   104        override config xdc.bld.ITarget2.Options ccConfigOpts = {
   105            prefix: "$(ccOpts.prefix) -mo --no_compress",
   106            suffix: "$(ccOpts.suffix)"
   107        };
   108
   109        override config string includeOpts = "-I$(rootDir)/include";
   110
   111        final override readonly config string sectMap[string] =
   112            ti.targets.C64P.sectMap;
   113
   114        final override readonly config Bool splitMap[string] =
   115            ti.targets.C64P.splitMap;
   116
   117        override readonly config xdc.bld.ITarget.StdTypes stdTypes =
   118            ti.targets.C64P.stdTypes;
   119
   120        override readonly config Int bitsPerChar =
   121            ti.targets.C64P.bitsPerChar;
   122    }
   123    /*
   124     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   125
   126     */
   127


module ti.targets.C674_big_endian

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== C674_big_endian.xdc ========
    15     *
    16     */
    17
    18    /*!
    19     *  ======== C674_big_endian ========
    20     *  TI C674 big endian
    21     */
    22    metaonly module C674_big_endian inherits ti.targets.ITarget {
    23        override readonly config string name                 = "C674_big_endian";
    24        override readonly config string suffix               = "674e";
    25        override readonly config string isa                  = "674";
    26        override readonly config xdc.bld.ITarget.Model model = {
    27            endian: "big"
    28        };
    29        override readonly config xdc.bld.ITarget.Module base = ti.targets.C64P;
    30
    31        /*
    32         *  ======== compatibleSuffixes ========
    33         */
    34        override config String compatibleSuffixes[] = ["64Pe", "64e", "62e"];
    35
    36        override readonly config string rts = "ti.targets.rts6000";
    37        override config string platform     = "ti.platforms.evmDA830";
    38
    39        override readonly config xdc.bld.ITarget2.Command ar = {
    40            cmd: "ar6x",
    41            opts: "rq"
    42        };
    43
    44        override readonly config xdc.bld.ITarget2.Command cc = {
    45            cmd: "cl6x -c",
    46            opts: "-me -mv6740"
    47        };
    48
    49        override readonly config xdc.bld.ITarget2.Command vers = {
    50            cmd: "cl6x",
    51            opts: "--compiler_revision"
    52        };
    53
    54        override readonly config xdc.bld.ITarget2.Command asm = {
    55            cmd: "cl6x -c",
    56            opts: "-me -mv6740"
    57        };
    58
    59        override readonly config xdc.bld.ITarget2.Command lnk = {
    60            cmd: "cl6x",
    61            opts: "-z"
    62        };
    63
    64        /*!
    65         *  ======== asmOpts ========
    66         *  User configurable assembler options.
    67         *
    68         *  Defaults:
    69         *  @p(dlist)
    70         *      -`-qq`
    71         *          super quiet mode
    72         */
    73        override config xdc.bld.ITarget2.Options asmOpts = {
    74            prefix: "-qq",
    75            suffix: ""
    76        };
    77
    78        /*!
    79         *  ======== ccOpts ========
    80         *  User configurable compiler options.
    81         *
    82         *  Defaults:
    83         *  @p(dlist)
    84         *      -`-qq`
    85         *          super quiet mode
    86         *      -`-pdsw225`
    87         *          generate a warning for implicitly declared functions; i.e.,
    88         *          functions without prototypes
    89         */
    90        override config xdc.bld.ITarget2.Options ccOpts = {
    91            prefix: "-qq -pdsw225",
    92            suffix: ""
    93        };
    94
    95        /*!
    96         *  ======== ccConfigOpts ========
    97         *  User configurable compiler options for the generated config C file.
    98         *
    99         *  -mo places all functions into subsections
   100         *  --no_compress helps with compile time with no real difference in
   101         *  code size since the generated config.c is mostly data and small
   102         *  function stubs.
   103         */
   104        override config xdc.bld.ITarget2.Options ccConfigOpts = {
   105            prefix: "$(ccOpts.prefix) -mo --no_compress",
   106            suffix: "$(ccOpts.suffix)"
   107        };
   108
   109        override config string includeOpts = "-I$(rootDir)/include";
   110
   111        final override readonly config string sectMap[string] =
   112            ti.targets.C64P.sectMap;
   113
   114        final override readonly config Bool splitMap[string] =
   115            ti.targets.C64P.splitMap;
   116
   117        override readonly config xdc.bld.ITarget.StdTypes stdTypes =
   118            ti.targets.C64P.stdTypes;
   119
   120        override readonly config Int bitsPerChar =
   121            ti.targets.C64P.bitsPerChar;
   122    }
   123    /*
   124     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   125
   126     */
   127


interface ti.targets.ITarget

     1    /*
     2     *  Copyright (c) 2009-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ITarget.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== ITarget ========
    19     *  A TI specific extension to the base `xdc.bld.ITarget3` interface.
    20     */
    21    @TargetHeader("xdc/bld/stddefs.xdt")
    22    metaonly interface ITarget inherits xdc.bld.ITarget3 {
    23
    24        override readonly config string stdInclude = "ti/targets/std.h";
    25
    26        /*!
    27         *  ======== binDir ========
    28         *  This parameter controls the location of the target's commands.
    29         *
    30         *  All build commands returned within a command set
    31         *  (`xdc.bld.ITarget.CommandSet.cmds`) are formed by prefixing `binDir`
    32         *  to this target's Command.cmd specification.  For example, the
    33         *  compile command returned is formed as follows:
    34         *  @p(code)
    35         *      $(binDir)$(cc.cmd)
    36         *  @p
    37         *  where, `$(binDir)` is this target's `binDir` value and `$(cc.cmd)` is
    38         *  the value of this target's `cc.cmd` string.
    39         *
    40         *  If `binDir` is non-empty then it must end with '/'.  If it is empty,
    41         *  the target's commands (compiler, linker, archiver, etc.) will be
    42         *  located along a path constructed from this target's `pathPrefix`.
    43         */
    44        config string binDir = "$(rootDir)/bin/";
    45
    46        /*!
    47         *  ======== pathPrefix ========
    48         *  A prefix to the PATH environment variable
    49         *
    50         *  Each target command is executed with C_DIR set to "" and PATH
    51         *  set as follows:
    52         *  @p(code)
    53         *      $(pathPrefix);$(binDir);$(PATH)
    54         *  @p
    55         *  where, `$(pathPrefix)` and `$(binDir)` are the values of the
    56         *  configuration parameters and `$(PATH)` is the value of the `PATH`
    57         *  environment variable set by the `xdc` command (type 'xdc -n' to
    58         *  see this).
    59         *
    60         *  Embedded ';' characters within `pathPrefix` separate directory
    61         *  names.  On UNIX hosts these ';' characters are convered to an
    62         *  appropriate separator; i.e., ':'.
    63         */
    64        config string pathPrefix = "";
    65
    66        override config String binaryParser = "ti.targets.omf.cof.Coff";
    67
    68        /*!
    69         *  ======== debugGen ========
    70         *  TI Debugger/IDE file generation support.
    71         *
    72         *  @_nodoc
    73         *  These templates below are long outdated and are no longer used.
    74         *  They remain as an example in the event that we want to generate
    75         *  project suport in the future.
    76         *
    77         *  To avoid unnecessary build time overhead, these files are not always
    78         *  generated; by default, they are only generated for "debug" profiles.
    79         *  The generation of these files is controlled by the
    80         *  `{@link xdc.cfg.Program#gen}` configuration parameter.  To force these
    81         *  files to be generated for a particular executable, add the following
    82         *  line to the executable's program configuration script:
    83         *  @p(code)
    84         *      Program.gen.debuggerFiles = true;
    85         *  @p
    86         *  It is also possible to control the generation via build options; see
    87         *  `{@link xdc.bld.ITarget#DebugGen}`.
    88         *
    89         *  @a(See Also) `xdc.bld.ITarget` contains addition information about
    90         *  how to create and use these templates.
    91         */
    92        //    override config xdc.bld.ITarget.DebugGen debugGen = {
    93        //  execTemplate   : "ti/targets/ccs_exec.xdt",
    94        //  execPattern    : "$(cfgDir)$(cfgName).pjt",
    95        //  packageTemplate: "ti/targets/ccs_package.xdt",
    96        //  packagePattern : "package/$(pkgName).pjt"
    97        //    };
    98        override config xdc.bld.ITarget.DebugGen debugGen = {
    99            execTemplate   : null,
   100            execPattern    : null,
   101            packageTemplate: null,
   102            packagePattern : null
   103        };
   104
   105        /*!
   106         *  ======== extensions ========
   107         *  File extensions recognized by TI targets
   108         *
   109         *  @a(TI Specifics)
   110         *  For TI targets, the `typ` string field of an
   111         *  `xdc.bld.ITarget.Extension` structure may be of the form
   112         *  `"<cmd>:<langOpt>"` where `<cmd>` is one of `"asm"`, `"c"`, `"cpp"`,
   113         *  and `<langOpt>` is the language option used to identify the source
   114         *  language of a source file.  This allows one to explicitly control the
   115         *  language flag passed to the compiler based on a source file's
   116         *  extension; in particular, one can define separate source extensions
   117         *  for "linear" and "scheduled" assembly files, or simply cause `".s62"`
   118         *  files to be treated as "linear" assembly rather than "scheduled"
   119         *  assembly.
   120         *
   121         *  For example,
   122         *  @p(code)
   123         *  tiTargets.C62.extensions[".s62"] = {suf: ".s62", typ: "asm:-fl"};
   124         *  @p
   125         *  causes all `".s62"` files to be treated as linear assembly.
   126         *
   127         *  If no ':' appears in the `typ` string, a default will be used:
   128         *  `"-fa"` for `"asm"` files `"-fc"` for `"c"` files, and `"-fp"` for
   129         *  `"cpp"` files.
   130         */
   131        override config xdc.bld.ITarget.Extension extensions[string] =
   132            xdc.bld.ITarget.extensions;
   133
   134        readonly config Bool splitMap[string];
   135
   136        /*!
   137         *  ======== profiles ========
   138         *  Standard options profiles for the TI tool-chain.
   139         */
   140        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   141            ["debug", {
   142                compileOpts: {
   143                    copts: "-g",
   144                    defs:  "-D_DEBUG_=1",
   145                }
   146            }],
   147            ["release", {
   148                compileOpts: {
   149                    copts: "-O2",
   150                },
   151            }],
   152        ];
   153
   154        /*!
   155         *  ======== versionMap ========
   156         *  Map of TI compiler version numbers to compatibility keys.
   157         *
   158         *  This map translates version string information from the compiler
   159         *  into a compatibility key.  The compatibility key is used to validate
   160         *  consistency among a collection of packages used in a configuration.
   161         *
   162         *  TI compiler strings are formed by parsing the output of the
   163         *  compiler's --compiler_revision option and creating a string of the
   164         *  form:
   165         *  @p(code)
   166         *      <comp>_<ver>
   167         *  @p
   168         *  where `<comp>` is the first word of the output and `<ver>` is the
   169         *  version number that appears on this same line.
   170         *
   171         *  There are two forms of version numbers output by the TI code gen
   172         *  tools; an "old" style that is of the form "<major>.<minor>" and a
   173         *  new style of the form "<major>.<minor>.<update>[.<branch>][<qual>],
   174         *  where <major>, <minor>, <update>, and <branch> are non-negative
   175         *  integers and <qual> is of  the form "[IBAP]<yyddd>", and <yyddd>
   176         *  is the last two digits of the year concatenated with the number of
   177         *  the day.
   178         *
   179         *  If a compiler version is not found in this map the default is
   180         *  "1,0,<major>.<minor>" for old style version numbers, and
   181         *  "1,0,<major>.<minor>,<update>[.<branch>][,<yyddd>]" for new style
   182         *  version numbers.
   183         *
   184         *  The user only needs to extend this table when a significant
   185         *  incompatibility occurs (and this package doesn't know about it) or
   186         *  when two versions of the compiler should be treated as 100%
   187         *  compatible.
   188         *
   189         *  @a(Examples)
   190         *  @p(code)
   191         *      var C62 = xdc.useModule('ti.targets.C62');
   192         *
   193         *      // assert that 4.0 is forward compatible with 4.32
   194         *      C62.versionMap["TMS320C6x_4.32"] =  "1,0,4.0,0";
   195         *
   196         *      // assert that 4.28 is incompatible with all other compilers
   197         *      C62.versionMap["TMS320C6x_4.28"] =  "1,1,4.28,0";
   198         */
   199        override config string versionMap[string] = [
   200            ["TMS320C6x_4.32", "1,0,4.32,0"],
   201            ["TMS320C2000_3.07", "1,0,3.07,0"],
   202        ];
   203
   204        /*!
   205         *  ======== alignDirectiveSupported ========
   206         *  The compiler supports an align directive.
   207         */
   208        override readonly config Bool alignDirectiveSupported = true;
   209
   210        /*!
   211         *  ======== ccConfigOpts ========
   212         *  User configurable compiler options for the generated config C file.
   213         */
   214        override config xdc.bld.ITarget2.Options ccConfigOpts = {
   215            prefix: "$(ccOpts.prefix) -mo",
   216            suffix: "$(ccOpts.suffix)"
   217        };
   218
   219        /*!
   220         *  ======== lnkOpts ========
   221         *  Linker options
   222         *
   223         *  Options:
   224         *  @p(dlist)
   225         *      -`-q`
   226         *          Quite run
   227         *      -`-u`
   228         *          Place unresolved external symbol into symbol table
   229         *      -`-c`
   230         *          ROM autoinitialization model
   231         *      -`-m`
   232         *          create a map file
   233         *      -`-l`
   234         *          archive library file as linker input
   235         */
   236        override config xdc.bld.ITarget2.Options lnkOpts = {
   237            prefix: "-q -u _c_int00",
   238            suffix: "-w -c -m $(XDCCFGDIR)/$@.map -l $(rootDir)/lib/libc.a"
   239        };
   240
   241        /*!
   242         *  ======== asmName ========
   243         *  The function that converts a C name into an assembly name
   244         */
   245        String asmName(String CName);
   246
   247        /*!
   248         *  ======== vers ========
   249         *  The command used to get the tool-chain to return a version number.
   250         */
   251        readonly config xdc.bld.ITarget2.Command vers;
   252
   253        /*!
   254         *  ======== version ========
   255         *  The Compatibility Key associated with this target.
   256         *
   257         *  The first two components of this target Compatibility Key are '1,0'.
   258         *  The rest of the Key represents the compiler version. The third
   259         *  component combines the major and the minor version number in the format
   260         *  Major.Minor. The fourth component is the patch number, and the optional
   261         *  fifth component is the version of an Alpha or Beta release.
   262         *
   263         *  @a(Example)
   264         *  If this target's `rootDir` points to the compiler version 6.0.11, the
   265         *  Compatibility Key is [1,0,6.0,11]. If this target's `rootDir` points to
   266         *  the compiler version 7.0.0B1, the Compatibility Key is [1,0,7.0,0,1].
   267         *
   268         */
   269        override metaonly config String version;
   270
   271        /*
   272         *  ======== rawVersion ========
   273         *  The raw version string from the compiler
   274         *
   275         */
   276        override metaonly config String rawVersion;
   277
   278    }
   279    /*
   280     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   281
   282     */
   283


package ti.targets

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     *
    12     */
    13    /*
    14     *  ======== package.xdc ========
    15     *
    16     */
    17
    18    requires xdc.bld;
    19
    20    /*!
    21     *  ======== ti.targets ========
    22     *  Package of targets for TI code generation tools
    23     *
    24     *  The modules in this package implement the xdc.bld.ITarget interface; this
    25     *  interface "wraps" the compiler tool-chain with an abstract interface
    26     *  that enables these tools to to be used by the XDC Build Engine.
    27     */
    28    package ti.targets [1,0,3] {
    29        module C64P, C64P_big_endian, C674, C674_big_endian;
    30        module C66, C66_big_endian;
    31        module C28, C28_large, C28_float;
    32
    33        interface ITarget;
    34    }
    35
    36    /*
    37     *  @(#) ti.targets; 1, 0, 3,0; 9-28-2018 17:07:58; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    38
    39     */
    40


module ti.targets.arm.clang.M3

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2018, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37
    38    /*!
    39     *  ======== M3.xdc ========
    40     *  Cortex M3 with no floating point unit, little endian thumb2 (ELF)
    41     */
    42    metaonly module M3 inherits ti.targets.arm.elf.IArm {
    43        override readonly config string name        = "M3";
    44        override readonly config string suffix      = "m3";
    45        override readonly config string isa         = "v7M";
    46        override readonly config string rts         = "ti.targets.arm.rtsarm";
    47        override config string platform   = "ti.platforms.tiva:TM4C1294NCPDT:1";
    48        override config String stdInclude = "ti/targets/arm/clang/std.h";
    49
    50        override readonly config xdc.bld.ITarget.Model model = {
    51            endian: "little",
    52            codeModel: "thumb2",
    53            shortEnums: true
    54        };
    55
    56        override readonly config xdc.bld.ITarget2.Command cc = {
    57            cmd:  "tiarmclang -c",
    58            opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
    59        };
    60
    61        override readonly config xdc.bld.ITarget2.Command asm = {
    62            cmd:  "tiarmclang -c -x assembler-with-cpp",
    63            opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
    64        };
    65
    66        override readonly config xdc.bld.ITarget2.Command lnk = {
    67            cmd:  "tiarmclang",
    68            opts: "-mcpu=cortex-m3 -mfloat-abi=soft -mfpu=none"
    69        };
    70
    71        override readonly config xdc.bld.ITarget2.Command ar = {
    72            cmd:  "tiarmar",
    73            opts: "q"
    74        };
    75
    76        /*!
    77         *  ======== ccOpts ========
    78         *  User configurable compiler options.
    79         */
    80        override config xdc.bld.ITarget2.Options ccOpts = {
    81            prefix: "",
    82            suffix: ""
    83        };
    84
    85        /*!
    86         *  ======== ccConfigOpts ========
    87         *  User configurable compiler options for the generated config C file.
    88         */
    89        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    90            prefix: "$(ccOpts.prefix)",
    91            suffix: "$(ccOpts.suffix)"
    92        };
    93
    94        /*!
    95         *  ======== asmOpts ========
    96         *  User configurable assembler options.
    97         */
    98        override config xdc.bld.ITarget2.Options asmOpts = {
    99            prefix: "",
   100            suffix: ""
   101        };
   102
   103        /*!
   104         *  ======== lnkOpts ========
   105         *  Linker options
   106         */
   107        override config xdc.bld.ITarget2.Options lnkOpts = {
   108            prefix: "-Wl,-q -Wl,-u,_c_int00",
   109            suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
   110        };
   111
   112        override readonly config xdc.bld.ITarget2.Command vers = {
   113            cmd:  "tiarmclang",
   114            opts: "--version"
   115        };
   116
   117        override config string includeOpts = "";
   118
   119        /*
   120         *  ======== profiles ========
   121         */
   122        /*
   123         * The compiler option -gdwarf-3 needs to be passed to workaround a
   124         * known bug in TI LLVM compiler generation of debug information.
   125         * See JIRA CODEGEN-4536 for more info.
   126         */
   127        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   128            ["debug", {
   129                compileOpts: {
   130                    copts: "-gdwarf-3",
   131                    defs:  "-D_DEBUG_=1",
   132                },
   133                linkOpts: "-gdwarf-3",
   134            }],
   135
   136            ["release", {
   137                compileOpts: {
   138                    copts: " -O2 ",
   139                },
   140                linkOpts: " ",
   141            }],
   142        ];
   143    }
   144    /*
   145     *  @(#) ti.targets.arm.clang; 1, 0, 0,0; 9-28-2018 17:08:38; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   146
   147     */
   148


module ti.targets.arm.clang.M4

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2018, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37
    38    /*!
    39     *  ======== M4.xdc ========
    40     *  Cortex M4 with no floating point unit, little endian thumb2 (ELF)
    41     */
    42    metaonly module M4 inherits ti.targets.arm.elf.IArm {
    43        override readonly config string name        = "M4";
    44        override readonly config string suffix      = "m4";
    45        override readonly config string isa         = "v7M";
    46        override readonly config string rts         = "ti.targets.arm.rtsarm";
    47        override config string platform   = "ti.platforms.tiva:TM4C1294NCPDT:1";
    48        override config String stdInclude = "ti/targets/arm/clang/std.h";
    49
    50        override readonly config xdc.bld.ITarget.Model model = {
    51            endian: "little",
    52            codeModel: "thumb2",
    53            shortEnums: true
    54        };
    55
    56        override readonly config xdc.bld.ITarget2.Command cc = {
    57            cmd:  "tiarmclang -c",
    58            opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
    59        };
    60
    61        override readonly config xdc.bld.ITarget2.Command asm = {
    62            cmd:  "tiarmclang -c -x assembler-with-cpp",
    63            opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
    64        };
    65
    66        override readonly config xdc.bld.ITarget2.Command lnk = {
    67            cmd:  "tiarmclang",
    68            opts: "-mcpu=cortex-m4 -mfloat-abi=soft -mfpu=none"
    69        };
    70
    71        override readonly config xdc.bld.ITarget2.Command ar = {
    72            cmd:  "tiarmar",
    73            opts: "q"
    74        };
    75
    76        /*!
    77         *  ======== ccOpts ========
    78         *  User configurable compiler options.
    79         */
    80        override config xdc.bld.ITarget2.Options ccOpts = {
    81            prefix: "",
    82            suffix: ""
    83        };
    84
    85        /*!
    86         *  ======== ccConfigOpts ========
    87         *  User configurable compiler options for the generated config C file.
    88         */
    89        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    90            prefix: "$(ccOpts.prefix)",
    91            suffix: "$(ccOpts.suffix)"
    92        };
    93
    94        /*!
    95         *  ======== asmOpts ========
    96         *  User configurable assembler options.
    97         */
    98        override config xdc.bld.ITarget2.Options asmOpts = {
    99            prefix: "",
   100            suffix: ""
   101        };
   102
   103        /*!
   104         *  ======== lnkOpts ========
   105         *  Linker options
   106         */
   107        override config xdc.bld.ITarget2.Options lnkOpts = {
   108            prefix: "-Wl,-q -Wl,-u,_c_int00",
   109            suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
   110        };
   111
   112        override readonly config xdc.bld.ITarget2.Command vers = {
   113            cmd:  "tiarmclang",
   114            opts: "--version"
   115        };
   116
   117        override config string includeOpts = "";
   118
   119        /*
   120         *  ======== profiles ========
   121         */
   122        /*
   123         * The compiler option -gdwarf-3 needs to be passed to workaround a
   124         * known bug in TI LLVM compiler generation of debug information.
   125         * See JIRA CODEGEN-4536 for more info.
   126         */
   127        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   128            ["debug", {
   129                compileOpts: {
   130                    copts: "-gdwarf-3",
   131                    defs:  "-D_DEBUG_=1",
   132                },
   133                linkOpts: "-gdwarf-3",
   134            }],
   135
   136            ["release", {
   137                compileOpts: {
   138                    copts: " -O2 ",
   139                },
   140                linkOpts: " ",
   141            }],
   142        ];
   143    }
   144    /*
   145     *  @(#) ti.targets.arm.clang; 1, 0, 0,0; 9-28-2018 17:08:39; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   146
   147     */
   148


module ti.targets.arm.clang.M4F

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2018, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37
    38    /*!
    39     *  ======== M4F.xdc ========
    40     *  Cortex M4 with floating point unit, little endian thumb2 (ELF)
    41     */
    42    metaonly module M4F inherits ti.targets.arm.elf.IArm {
    43        override readonly config string name        = "M4F";
    44        override readonly config string suffix      = "m4f";
    45        override readonly config string isa         = "v7M";
    46        override readonly config string rts         = "ti.targets.arm.rtsarm";
    47        override config string platform   = "ti.platforms.cortexM:MTL1_VSOC:1";
    48        override config String stdInclude = "ti/targets/arm/clang/std.h";
    49
    50        override readonly config xdc.bld.ITarget.Model model = {
    51            endian: "little",
    52            codeModel: "thumb2",
    53            shortEnums: true
    54        };
    55
    56        override readonly config xdc.bld.ITarget2.Command cc = {
    57            cmd:  "tiarmclang -c",
    58            opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
    59        };
    60
    61        override readonly config xdc.bld.ITarget2.Command asm = {
    62            cmd:  "tiarmclang -c -x assembler-with-cpp",
    63            opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
    64        };
    65
    66        override readonly config xdc.bld.ITarget2.Command lnk = {
    67            cmd:  "tiarmclang",
    68            opts: "-mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16"
    69        };
    70
    71        override readonly config xdc.bld.ITarget2.Command ar = {
    72            cmd:  "tiarmar",
    73            opts: "q"
    74        };
    75
    76        /*!
    77         *  ======== ccOpts ========
    78         *  User configurable compiler options.
    79         */
    80        override config xdc.bld.ITarget2.Options ccOpts = {
    81            prefix: "",
    82            suffix: ""
    83        };
    84
    85        /*!
    86         *  ======== ccConfigOpts ========
    87         *  User configurable compiler options for the generated config C file.
    88         */
    89        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    90            prefix: "$(ccOpts.prefix)",
    91            suffix: "$(ccOpts.suffix)"
    92        };
    93
    94        /*!
    95         *  ======== asmOpts ========
    96         *  User configurable assembler options.
    97         */
    98        override config xdc.bld.ITarget2.Options asmOpts = {
    99            prefix: "",
   100            suffix: ""
   101        };
   102
   103        /*!
   104         *  ======== lnkOpts ========
   105         *  Linker options
   106         */
   107        override config xdc.bld.ITarget2.Options lnkOpts = {
   108            prefix: "-Wl,-q -Wl,-u,_c_int00",
   109            suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
   110        };
   111
   112        override readonly config xdc.bld.ITarget2.Command vers = {
   113            cmd:  "tiarmclang",
   114            opts: "--version"
   115        };
   116
   117        override config string includeOpts = "";
   118
   119        /*
   120         *  ======== profiles ========
   121         */
   122        /*
   123         * The compiler option -gdwarf-3 needs to be passed to workaround a
   124         * known bug in TI LLVM compiler generation of debug information.
   125         * See JIRA CODEGEN-4536 for more info.
   126         */
   127        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   128            ["debug", {
   129                compileOpts: {
   130                    copts: "-gdwarf-3",
   131                    defs:  "-D_DEBUG_=1",
   132                },
   133                linkOpts: "-gdwarf-3",
   134            }],
   135
   136            ["release", {
   137                compileOpts: {
   138                    copts: " -O2 ",
   139                },
   140                linkOpts: " ",
   141            }],
   142        ];
   143    }
   144    /*
   145     *  @(#) ti.targets.arm.clang; 1, 0, 0,0; 9-28-2018 17:08:39; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   146
   147     */
   148


module ti.targets.arm.clang.M33F

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2018, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37
    38    /*!
    39     *  ======== M33F.xdc ========
    40     *  Cortex M33 with floating point unit, little endian thumb2 (ELF)
    41     */
    42    metaonly module M33F inherits ti.targets.arm.elf.IArm {
    43        override readonly config string name        = "M33F";
    44        override readonly config string suffix      = "m33f";
    45        override readonly config string isa         = "v8M";
    46        override readonly config string rts         = "ti.targets.arm.rtsarm";
    47        override config string platform   = "ti.platforms.cortexM:MTL1_VSOC:1";
    48        override config String stdInclude = "ti/targets/arm/clang/std.h";
    49
    50        override readonly config xdc.bld.ITarget.Model model = {
    51            endian: "little",
    52            codeModel: "thumb2",
    53            shortEnums: true
    54        };
    55
    56        override readonly config xdc.bld.ITarget2.Command cc = {
    57            cmd:  "tiarmclang -c",
    58            opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
    59        };
    60
    61        override readonly config xdc.bld.ITarget2.Command asm = {
    62            cmd:  "tiarmclang -c -x assembler-with-cpp",
    63            opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
    64        };
    65
    66        override readonly config xdc.bld.ITarget2.Command lnk = {
    67            cmd:  "tiarmclang",
    68            opts: "-mcpu=cortex-m33 -mfloat-abi=hard -mfpu=fpv5-sp-d16"
    69        };
    70
    71        override readonly config xdc.bld.ITarget2.Command ar = {
    72            cmd:  "tiarmar",
    73            opts: "q"
    74        };
    75
    76        /*!
    77         *  ======== ccOpts ========
    78         *  User configurable compiler options.
    79         */
    80        override config xdc.bld.ITarget2.Options ccOpts = {
    81            prefix: "",
    82            suffix: ""
    83        };
    84
    85        /*!
    86         *  ======== ccConfigOpts ========
    87         *  User configurable compiler options for the generated config C file.
    88         */
    89        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    90            prefix: "$(ccOpts.prefix)",
    91            suffix: "$(ccOpts.suffix)"
    92        };
    93
    94        /*!
    95         *  ======== asmOpts ========
    96         *  User configurable assembler options.
    97         */
    98        override config xdc.bld.ITarget2.Options asmOpts = {
    99            prefix: "",
   100            suffix: ""
   101        };
   102
   103        /*!
   104         *  ======== lnkOpts ========
   105         *  Linker options
   106         */
   107        override config xdc.bld.ITarget2.Options lnkOpts = {
   108            prefix: "-Wl,-q -Wl,-u,_c_int00",
   109            suffix: "-Wl,-w -Wl,-c -Wl,-m,$(XDCCFGDIR)/$@.map -l $(rootDir)/lib/generic/libc.a"
   110        };
   111
   112        override readonly config xdc.bld.ITarget2.Command vers = {
   113            cmd:  "tiarmclang",
   114            opts: "--version"
   115        };
   116
   117        override config string includeOpts = "";
   118
   119        /*
   120         *  ======== profiles ========
   121         */
   122        /*
   123         * The compiler option -gdwarf-3 needs to be passed to workaround a
   124         * known bug in TI LLVM compiler generation of debug information.
   125         * See JIRA CODEGEN-4536 for more info.
   126         */
   127        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   128            ["debug", {
   129                compileOpts: {
   130                    copts: "-gdwarf-3",
   131                    defs:  "-D_DEBUG_=1",
   132                },
   133                linkOpts: "-gdwarf-3",
   134            }],
   135
   136            ["release", {
   137                compileOpts: {
   138                    copts: " -O2 ",
   139                },
   140                linkOpts: " ",
   141            }],
   142        ];
   143    }
   144    /*
   145     *  @(#) ti.targets.arm.clang; 1, 0, 0,0; 9-28-2018 17:08:38; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   146
   147     */
   148


package ti.targets.arm.clang

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     * Copyright (c) 2018, Texas Instruments Incorporated
     8     * All rights reserved.
     9     *
    10     * Redistribution and use in source and binary forms, with or without
    11     * modification, are permitted provided that the following conditions
    12     * are met:
    13     *
    14     * *  Redistributions of source code must retain the above copyright
    15     *    notice, this list of conditions and the following disclaimer.
    16     *
    17     * *  Redistributions in binary form must reproduce the above copyright
    18     *    notice, this list of conditions and the following disclaimer in the
    19     *    documentation and/or other materials provided with the distribution.
    20     *
    21     * *  Neither the name of Texas Instruments Incorporated nor the names of
    22     *    its contributors may be used to endorse or promote products derived
    23     *    from this software without specific prior written permission.
    24     *
    25     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    26     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    27     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    28     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    29     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    30     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    31     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    32     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    33     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    34     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    35     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    36     */
    37
    38    /*
    39     *  ======== package.xdc ========
    40     */
    41
    42    requires xdc.bld;
    43    requires ti.targets;
    44    requires ti.targets.arm.elf;
    45
    46    /*!
    47     *  ======== ti.targets.arm.clang ========
    48     *  Package of Arm targets for TI LLVM based code generation tools for ELF
    49     *
    50     */
    51    package ti.targets.arm.clang [1,0,0] {
    52        module M33F;
    53        module M4F;
    54        module M4;
    55        module M3;
    56    }
    57    /*
    58     *  @(#) ti.targets.arm.clang; 1, 0, 0,0; 9-28-2018 17:08:39; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    59
    60     */
    61


module ti.targets.arm.elf.A8Fnv

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== A8Fnv.xdc ========
    14     *  Cortex A8 little endian with neon & vector floating point support
    15     *  (VFPV3) (NEON) (ELF)
    16     */
    17    metaonly module A8Fnv inherits ti.targets.arm.elf.IA8 {
    18        override readonly config string name        = "A8Fnv";
    19        override readonly config string suffix      = "ea8fnv";
    20        override readonly config string rts         = "ti.targets.arm.rtsarm";
    21
    22        override readonly config xdc.bld.ITarget.Model model = {
    23            endian: "little",
    24            shortEnums: true
    25        };
    26
    27        override readonly config xdc.bld.ITarget2.Command cc = {
    28            cmd:  "armcl -c",
    29            opts: "--endian=little -mv7A8 --abi=eabi --neon --float_support=vfpv3"
    30        };
    31
    32        override readonly config xdc.bld.ITarget2.Command asm = {
    33            cmd:  "armcl -c",
    34            opts: "--endian=little -mv7A8 --abi=eabi --neon --float_support=vfpv3"
    35        };
    36    }
    37    /*
    38     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:03; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    39
    40     */
    41


module ti.targets.arm.elf.Arm9

     1    /*
     2     *  Copyright (c) 2008-2016 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== Arm9.xdc ========
    15     *  TI Arm9 little endian (ELF)
    16     */
    17    metaonly module Arm9 inherits ti.targets.arm.elf.IArm {
    18        override readonly config string name        = "Arm9";
    19        override readonly config string suffix      = "e9";
    20        override readonly config string isa         = "v5T";
    21        override readonly config string rts         = "ti.targets.arm.rtsarm";
    22
    23        override readonly config xdc.bld.ITarget.Model model = {
    24            endian: "little",
    25            shortEnums: true
    26        };
    27
    28        /*
    29         *  ======== compatibleSuffixes ========
    30         */
    31        override config String compatibleSuffixes[] = ["7", "470", "9t"];
    32
    33        override readonly config xdc.bld.ITarget2.Command ar = {
    34            cmd:  "armar",
    35            opts: "rq"
    36        };
    37
    38        override readonly config xdc.bld.ITarget2.Command cc = {
    39            cmd:  "armcl -c",
    40            opts: "-me -mv5e --abi=eabi"
    41        };
    42
    43        override readonly config xdc.bld.ITarget2.Command vers = {
    44            cmd:  "armcl",
    45            opts: "--compiler_revision"
    46        };
    47
    48        override readonly config xdc.bld.ITarget2.Command asm = {
    49            cmd:  "armcl -c",
    50            opts: "-me -mv5e --abi=eabi"
    51        };
    52
    53        override readonly config xdc.bld.ITarget2.Command lnk = {
    54            cmd:  "armcl",
    55            opts: "--silicon_version=5e -z --strict_compatibility=on"
    56        };
    57
    58        /*!
    59         *  ======== asmOpts ========
    60         *  User configurable assembler options.
    61         *
    62         *  Defaults:
    63         *  @p(dlist)
    64         *      -`-qq`
    65         *          super quiet mode
    66         */
    67        override config xdc.bld.ITarget2.Options asmOpts = {
    68            prefix: "-qq",
    69            suffix: ""
    70        };
    71
    72        /*!
    73         *  ======== ccOpts ========
    74         *  User configurable compiler options.
    75         *
    76         *  Defaults:
    77         *  @p(dlist)
    78         *      -`-qq`
    79         *          super quiet mode
    80         *      -`-pdsw225`
    81         *          generate a warning for implicitly declared functions; i.e.,
    82         *          functions without prototypes
    83         */
    84        override config xdc.bld.ITarget2.Options ccOpts = {
    85            prefix: "-qq -pdsw225",
    86            suffix: ""
    87        };
    88
    89        /*!
    90         *  ======== ccConfigOpts ========
    91         *  User configurable compiler options for the generated config C file.
    92         */
    93        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    94            prefix: "$(ccOpts.prefix) -ms",
    95            suffix: "$(ccOpts.suffix)"
    96        };
    97
    98        override config string includeOpts = "-I$(rootDir)/include ";
    99
   100        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   101            t_IArg          : { size: 4, align: 4 },
   102            t_Char          : { size: 1, align: 1 },
   103            t_Double        : { size: 8, align: 4 },
   104            t_Float         : { size: 4, align: 4 },
   105            t_Fxn           : { size: 4, align: 4 },
   106            t_Int           : { size: 4, align: 4 },
   107            t_Int8          : { size: 1, align: 1 },
   108            t_Int16         : { size: 2, align: 2 },
   109            t_Int32         : { size: 4, align: 4 },
   110            t_Int64         : { size: 8, align: 4 },
   111            t_Long          : { size: 4, align: 4 },
   112            t_LDouble       : { size: 8, align: 4 },
   113            t_LLong         : { size: 8, align: 4 },
   114            t_Ptr           : { size: 4, align: 4 },
   115            t_Short         : { size: 2, align: 2 },
   116            t_Size          : { size: 4, align: 4 },
   117        };
   118    }
   119    /*
   120     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:03; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   121
   122     */
   123


interface ti.targets.arm.elf.IA8

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IA8.xdc ========
    15     *  Cortex A8 little endian target
    16     */
    17    metaonly interface IA8 inherits ti.targets.arm.elf.IArm {
    18        override readonly config string isa         = "v7A";
    19
    20        /*
    21         *  ======== compatibleSuffixes ========
    22         */
    23        override config String compatibleSuffixes[] = ["e9", "e7", "e9t"];
    24
    25        override config string platform   = "ti.platforms.evmDM8168";
    26
    27        override readonly config xdc.bld.ITarget2.Command lnk = {
    28            cmd:  "armcl",
    29            opts: "--silicon_version=7A8 -z --strict_compatibility=on"
    30        };
    31    }
    32    /*
    33     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:03; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    34
    35     */
    36


interface ti.targets.arm.elf.IArm

     1    /*
     2     *  Copyright (c) 2008-2016 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IArm.xdc ========
    15     *  Common settings for all Arm targets
    16     */
    17    metaonly interface IArm inherits ti.targets.ITarget {
    18
    19        override config String stdInclude = "ti/targets/arm/elf/std.h";
    20
    21        override config string platform   = "ti.platforms.sim470xx";
    22
    23        override config string includeOpts =
    24            "-I$(rootDir)/include ";
    25
    26        override readonly config xdc.bld.ITarget.Model model = {
    27            shortEnums: true,
    28        };
    29
    30        override readonly config xdc.bld.ITarget2.Command ar = {
    31            cmd:  "armar",
    32            opts: "rq"
    33        };
    34
    35        override readonly config xdc.bld.ITarget2.Command vers = {
    36            cmd:  "armcl",
    37            opts: "--compiler_revision"
    38        };
    39
    40        override readonly config xdc.bld.ITarget2.Command lnk = {
    41            cmd:  "armcl",
    42            opts: "-z"
    43        };
    44
    45        /*!
    46         *  ======== ccOpts ========
    47         *  User configurable compiler options.
    48         *
    49         *  Defaults:
    50         *  @p(dlist)
    51         *      -`-qq`
    52         *          super quiet mode
    53         *      -`-pdsw225`
    54         *          generate a warning for implicitly declared functions; i.e.,
    55         *          functions without prototypes
    56         */
    57        override config xdc.bld.ITarget2.Options ccOpts = {
    58            prefix: "-qq -pdsw225",
    59            suffix: ""
    60        };
    61
    62        /*!
    63         *  ======== ccConfigOpts ========
    64         *  User configurable compiler options for the generated config C file.
    65         *      -`--fp_mode=strict`
    66         *          disable conversion of double-precision computations to
    67         *          single-precision computations when the result is assigned to
    68         *          a single-precision variable.
    69         */
    70        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    71            prefix: "$(ccOpts.prefix) -ms --fp_mode=strict",
    72            suffix: "$(ccOpts.suffix)"
    73        };
    74
    75        /*!
    76         *  ======== asmOpts ========
    77         *  User configurable assembler options.
    78         *
    79         *  Defaults:
    80         *  @p(dlist)
    81         *      -`-qq`
    82         *          super quiet mode
    83         */
    84        override config xdc.bld.ITarget2.Options asmOpts = {
    85            prefix: "-qq",
    86            suffix: ""
    87        };
    88
    89        /*!
    90         *  ======== profiles ========
    91         *  Standard options profiles for the TI tool-chain.
    92         */
    93        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    94            ["debug", {
    95                compileOpts: {
    96                    copts: "--symdebug:dwarf",
    97                    defs:  "-D_DEBUG_=1",
    98                }
    99            }],
   100            ["release", {
   101                compileOpts: {
   102                    copts: "-O2",
   103                },
   104            }],
   105            ["profile", {
   106                compileOpts: {
   107                    copts: "--symdebug:dwarf",
   108                },
   109            }],
   110            ["coverage", {
   111                compileOpts: {
   112                    copts: "--symdebug:dwarf",
   113                },
   114            }],
   115        ];
   116
   117        final override readonly config string sectMap[string] = [
   118            [".text", "code"],
   119            [".stack", "stack"],
   120            [".bss", "data"],
   121            [".binit", "code"],
   122            [".cinit", "code"],
   123            [".init_array", "code"],
   124            [".const", "code"],
   125            [".data", "data"],
   126            [".rodata", "data"],
   127            [".neardata", "data"],
   128            [".fardata", "data"],
   129            [".switch", "data"],
   130            [".sysmem", "data"],
   131            [".far", "data"],
   132            [".args", "data"],
   133            [".cio", "data"],
   134            [".ARM.exidx", "data"],
   135            [".ARM.extab", "data"]
   136        ];
   137
   138        override readonly config Bool splitMap[string] = [
   139            [".text", true],
   140            [".const", true],
   141            [".data", true],
   142            [".fardata", true],
   143            [".switch", true],
   144            [".far", true],
   145            [".args", true],
   146            [".cio", true],
   147            [".ARM.extab", true]
   148        ];
   149
   150        override readonly config Int bitsPerChar = 8;
   151
   152        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   153            t_IArg          : { size: 4, align: 4 },
   154            t_Char          : { size: 1, align: 1 },
   155            t_Double        : { size: 8, align: 8 },
   156            t_Float         : { size: 4, align: 4 },
   157            t_Fxn           : { size: 4, align: 4 },
   158            t_Int           : { size: 4, align: 4 },
   159            t_Int8          : { size: 1, align: 1 },
   160            t_Int16         : { size: 2, align: 2 },
   161            t_Int32         : { size: 4, align: 4 },
   162            t_Int64         : { size: 8, align: 8 },
   163            t_Long          : { size: 4, align: 4 },
   164            t_LDouble       : { size: 8, align: 8 },
   165            t_LLong         : { size: 8, align: 8 },
   166            t_Ptr           : { size: 4, align: 4 },
   167            t_Short         : { size: 2, align: 2 },
   168            t_Size          : { size: 4, align: 4 },
   169        };
   170
   171        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   172    }
   173    /*
   174     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   175
   176     */
   177


interface ti.targets.arm.elf.IM0

     1    /*
     2     *  Copyright (c) 2014-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IM0.xdc ========
    15     *  Cortex M0 little endian thumb2 target
    16     */
    17    metaonly interface IM0 inherits ti.targets.arm.elf.IArm {
    18        override readonly config string isa         = "v6M";
    19
    20        override config string platform   = "ti.platforms.simCM3";
    21
    22        override readonly config xdc.bld.ITarget.Model model = {
    23            endian: "little",
    24            codeModel: "thumb2",
    25            shortEnums: true
    26        };
    27
    28        override readonly config xdc.bld.ITarget2.Command lnk = {
    29            cmd:  "armcl",
    30            opts: "--silicon_version=6M0 -z --strict_compatibility=on"
    31        };
    32    }
    33    /*
    34     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    35
    36     */
    37


interface ti.targets.arm.elf.IM3

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IM3.xdc ========
    15     *  Cortex M3 little endian thumb2 target
    16     */
    17    metaonly interface IM3 inherits ti.targets.arm.elf.IArm {
    18        override readonly config string isa         = "v7M";
    19
    20        override config string platform   = "ti.platforms.simCM3";
    21
    22        override readonly config xdc.bld.ITarget.Model model = {
    23            endian: "little",
    24            codeModel: "thumb2",
    25            shortEnums: true
    26        };
    27
    28        override readonly config xdc.bld.ITarget2.Command lnk = {
    29            cmd:  "armcl",
    30            opts: "--silicon_version=7M3 -z --strict_compatibility=on"
    31        };
    32    }
    33    /*
    34     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    35
    36     */
    37


interface ti.targets.arm.elf.IM4

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IM4.xdc ========
    15     *  Cortex M4 little endian thumb2 target
    16     */
    17    metaonly interface IM4 inherits ti.targets.arm.elf.IArm {
    18        override readonly config string isa         = "v7M4";
    19
    20        override config string platform   = "ti.platforms.tiva:TM4C1294NCPDT:1";
    21
    22        override readonly config xdc.bld.ITarget.Model model = {
    23            endian: "little",
    24            codeModel: "thumb2",
    25            shortEnums: true
    26        };
    27
    28        override readonly config xdc.bld.ITarget2.Command lnk = {
    29            cmd:  "armcl",
    30            opts: "--silicon_version=7M4 -z --strict_compatibility=on"
    31        };
    32    }
    33    /*
    34     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    35
    36     */
    37


interface ti.targets.arm.elf.IR4

     1    /*
     2     *  Copyright (c) 2015-2017 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IR4.xdc ========
    15     *  Cortex R4 little endian target
    16     */
    17    metaonly interface IR4 inherits ti.targets.arm.elf.IArm {
    18        override readonly config string isa         = "v7R";
    19
    20        override config string platform   = "ti.platforms.cortexR:AWR14XX:1";
    21
    22        override readonly config xdc.bld.ITarget2.Command lnk = {
    23            cmd:  "armlnk",
    24            opts: "--silicon_version=7R4 --strict_compatibility=on"
    25        };
    26    }
    27    /*
    28     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    29
    30     */
    31


interface ti.targets.arm.elf.IR5

     1    /*
     2     *  Copyright (c) 2015-2017 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IR5.xdc ========
    15     *  Cortex R5 little endian target
    16     */
    17    metaonly interface IR5 inherits ti.targets.arm.elf.IArm {
    18        override readonly config string isa         = "v7R";
    19
    20        override config string platform   = "ti.platforms.cortexR:RM57L8XX:1";
    21
    22        override readonly config xdc.bld.ITarget2.Command lnk = {
    23            cmd:  "armcl",
    24            opts: "--abi=eabi -mv7R5 -z --strict_compatibility=on"
    25        };
    26    }
    27    /*
    28     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    29
    30     */
    31


module ti.targets.arm.elf.M0

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== M0.xdc ========
    15     *  Cortex M0 little endian thumb2 (ELF)
    16     */
    17    metaonly module M0 inherits ti.targets.arm.elf.IM0 {
    18        override readonly config string name        = "M0";
    19        override readonly config string suffix      = "em0";
    20        override readonly config string rts         = "ti.targets.arm.rtsarm";
    21
    22        override readonly config xdc.bld.ITarget2.Command cc = {
    23            cmd:  "armcl -c",
    24            opts: "--endian=little -mv6M0 --abi=eabi"
    25        };
    26
    27        override readonly config xdc.bld.ITarget2.Command asm = {
    28            cmd:  "armcl -c",
    29            opts: "--endian=little -mv6M0 --abi=eabi"
    30        };
    31    }
    32    /*
    33     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    34
    35     */
    36


module ti.targets.arm.elf.M3

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== M3.xdc ========
    15     *  Cortex M3 little endian thumb2 (ELF)
    16     */
    17    metaonly module M3 inherits ti.targets.arm.elf.IM3 {
    18        override readonly config string name        = "M3";
    19        override readonly config string suffix      = "em3";
    20        override readonly config string rts         = "ti.targets.arm.rtsarm";
    21
    22        override readonly config xdc.bld.ITarget2.Command cc = {
    23            cmd:  "armcl -c",
    24            opts: "--endian=little -mv7M3 --abi=eabi"
    25        };
    26
    27        override readonly config xdc.bld.ITarget2.Command asm = {
    28            cmd:  "armcl -c",
    29            opts: "--endian=little -mv7M3 --abi=eabi"
    30        };
    31    }
    32    /*
    33     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    34
    35     */
    36


module ti.targets.arm.elf.M4

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== M4.xdc ========
    15     *  Cortex M4, no floating point unit, little endian thumb2 (ELF)
    16     */
    17    metaonly module M4 inherits ti.targets.arm.elf.IM4 {
    18        override readonly config string name        = "M4";
    19        override readonly config string suffix      = "em4";
    20        override readonly config string rts         = "ti.targets.arm.rtsarm";
    21
    22        /*
    23         *  ======== compatibleSuffixes ========
    24         */
    25        override config String compatibleSuffixes[] = ["em3"];
    26
    27        override readonly config xdc.bld.ITarget2.Command cc = {
    28            cmd:  "armcl -c",
    29            opts: "--endian=little -mv7M4 --float_support=vfplib --abi=eabi"
    30        };
    31
    32        override readonly config xdc.bld.ITarget2.Command asm = {
    33            cmd:  "armcl -c",
    34            opts: "--endian=little -mv7M4 --float_support=vfplib --abi=eabi"
    35        };
    36    }
    37    /*
    38     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    39
    40     */
    41


module ti.targets.arm.elf.M4F

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== M4F.xdc ========
    15     *  Cortex M4 with floating point unit, little endian thumb2 (ELF)
    16     */
    17    metaonly module M4F inherits ti.targets.arm.elf.IM4 {
    18        override readonly config string name        = "M4F";
    19        override readonly config string suffix      = "em4f";
    20        override readonly config string rts         = "ti.targets.arm.rtsarm";
    21
    22        override readonly config xdc.bld.ITarget2.Command cc = {
    23            cmd:  "armcl -c",
    24            opts: "--endian=little -mv7M4 --abi=eabi --float_support=fpv4spd16"
    25        };
    26
    27        override readonly config xdc.bld.ITarget2.Command asm = {
    28            cmd:  "armcl -c",
    29            opts: "--endian=little -mv7M4 --abi=eabi --float_support=fpv4spd16"
    30        };
    31    }
    32    /*
    33     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    34
    35     */
    36


package ti.targets.arm.elf

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== package.xdc ========
    15     */
    16
    17    requires xdc.bld;
    18    requires ti.targets;
    19
    20    /*!
    21     *  ======== ti.targets.arm.elf ========
    22     *  Package of Arm targets for TI code generation tools for ELF
    23     *
    24     */
    25    package ti.targets.arm.elf [1,0,0] {
    26        interface IArm;
    27        interface IR4, IR5;
    28        interface IA8, IM3, IM4, IM0;
    29        module Arm9;
    30        module M0;
    31        module M3;
    32        module M4, M4F;
    33        module A8F, A8Ft;
    34        module A8Fv, A8Fnv;
    35        module R4F, R4Ft, R5F;
    36    }
    37    /*
    38     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    39
    40     */
    41


module ti.targets.arm.elf.R5F

     1    /*
     2     *  Copyright (c) 2015 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== R5F.xdc ========
    14     *  Cortex R5 little endian with floating point support (vfpv3d16) (ELF)
    15     */
    16    metaonly module R5F inherits ti.targets.arm.elf.IR5 {
    17        override readonly config string name        = "R5F";
    18        override readonly config string suffix      = "er5f";
    19        override readonly config string rts         = "ti.targets.arm.rtsarm";
    20
    21        override readonly config xdc.bld.ITarget.Model model = {
    22            endian: "little",
    23            shortEnums: true
    24        };
    25
    26        override readonly config xdc.bld.ITarget2.Command cc = {
    27            cmd:  "armcl -c",
    28            opts: "--float_support=vfpv3d16 --endian=little -mv7R5 --abi=eabi"
    29        };
    30
    31        override readonly config xdc.bld.ITarget2.Command asm = {
    32            cmd:  "armcl -c",
    33            opts: "--float_support=vfpv3d16 --endian=little -mv7R5 --abi=eabi"
    34        };
    35    }
    36    /*
    37     *  @(#) ti.targets.arm.elf; 1, 0, 0,0; 9-28-2018 17:08:04; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    38
    39     */
    40


package ti.targets.arm.rtsarm

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== ti.targets.arm.rtsarm ========
    16     *  Runtime support package for all Arm targets
    17     *
    18     *  This package builds a library of standard XDC system support functions.
    19     *  In particular, it builds several implementations of the
    20     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    21     *  that are part of the xdc.runtime package (to avoid having multiple copies
    22     *  of the same source in different runtime support packages for different
    23     *  ISAs.
    24     */
    25    package ti.targets.arm.rtsarm [1,0,0] {
    26        module Settings;
    27    }
    28
    29    /*
    30     *  @(#) ti.targets.arm.rtsarm; 1, 0, 0,0; 9-28-2018 17:36:22; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    31
    32     */
    33


module ti.targets.arm.rtsarm.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package ti.targets.arm.rtsarm;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39
    40
    41    /*
    42     *  @(#) ti.targets.arm.rtsarm; 1, 0, 0,0; 9-28-2018 17:36:22; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    43
    44     */
    45


module ti.targets.arp32.elf.ARP32

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ARP32.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== ARP32 ========
    19     *  TI ARP32 default runtime model (little endian)
    20     */
    21    metaonly module ARP32 inherits IARP32 {
    22        override readonly config string name            = "ARP32";
    23        override readonly config string suffix          = "earp32";
    24
    25        override readonly config xdc.bld.ITarget.Model model = {
    26            endian: "little",
    27            dataModel: "far_aggregates",
    28            shortEnums: true
    29        };
    30
    31        override readonly config xdc.bld.ITarget2.Command cc = {
    32            cmd: "cl-arp32 -c --gen_func_subsections",
    33            opts: "--mem_model:data=far_aggregates --silicon_version=v210"
    34        };
    35
    36        override readonly config xdc.bld.ITarget2.Command asm = {
    37            cmd: "cl-arp32 -c --gen_func_subsections",
    38            opts: "--mem_model:data=far_aggregates --silicon_version=v210"
    39        };
    40
    41    }
    42
    43    /*
    44     *  @(#) ti.targets.arp32.elf; 1, 0, 0,0; 9-28-2018 17:08:09; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    45
    46     */
    47


module ti.targets.arp32.elf.ARP32_far

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ARP32_far.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== ARP32_far ========
    19     *  TI ARP32 far runtime model (little endian)
    20     */
    21    metaonly module ARP32_far inherits IARP32 {
    22        override readonly config string name            = "ARP32_far";
    23        override readonly config string suffix          = "earp32F";
    24
    25        override readonly config xdc.bld.ITarget.Model model = {
    26            endian: "little",
    27            dataModel: "far",
    28            shortEnums: true
    29        };
    30
    31        override readonly config xdc.bld.ITarget2.Command cc = {
    32            cmd: "cl-arp32 -c --gen_func_subsections",
    33            opts: "--mem_model:data=far --silicon_version=v210"
    34        };
    35
    36        override readonly config xdc.bld.ITarget2.Command asm = {
    37            cmd: "cl-arp32 -c --gen_func_subsections",
    38            opts: "--mem_model:data=far --silicon_version=v210"
    39        };
    40    }
    41    /*
    42     *  @(#) ti.targets.arp32.elf; 1, 0, 0,0; 9-28-2018 17:08:09; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    43
    44     */
    45


interface ti.targets.arp32.elf.IARP32

     1    /*
     2     *  Copyright (c) 2012-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== IARP32.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== IARP32 ========
    19     *  TI IARP32 interface (little endian)
    20     */
    21    metaonly interface IARP32 inherits ti.targets.ITarget {
    22        override readonly config string isa             = "arp32";
    23
    24        override readonly config string rts = "ti.targets.arp32.rts";
    25        override config string platform     = "ti.platforms.simARP32";
    26
    27        override readonly config xdc.bld.ITarget2.Command ar = {
    28            cmd: "ar-arp32",
    29            opts: "rq"
    30        };
    31
    32        override readonly config xdc.bld.ITarget2.Command lnk = {
    33            cmd: "cl-arp32",
    34            opts: "-z"
    35        };
    36
    37        override readonly config xdc.bld.ITarget2.Command vers = {
    38            cmd: "cl-arp32",
    39            opts: "--compiler_revision"
    40        };
    41
    42        /*!
    43         *  ======== asmOpts ========
    44         *  User configurable assembler options.
    45         *
    46         *  Defaults:
    47         *  @p(dlist)
    48         *      -`-qq`
    49         *          super quiet mode
    50         */
    51        override config xdc.bld.ITarget2.Options asmOpts = {
    52            prefix: "-qq",
    53            suffix: ""
    54        };
    55
    56        /*!
    57         *  ======== ccOpts ========
    58         *  User configurable compiler options.
    59         *
    60         *  Defaults:
    61         *  @p(dlist)
    62         *      -`-qq`
    63         *          super quiet mode
    64         *      -`-pdsw225`
    65         *          generate a warning for implicitly declared functions; i.e.,
    66         *          functions without prototypes
    67         */
    68        override config xdc.bld.ITarget2.Options ccOpts = {
    69            prefix: "-qq -pdsw225",
    70            suffix: ""
    71        };
    72
    73        /*!
    74         *  ======== ccConfigOpts ========
    75         *  User configurable compiler options for the generated config C file.
    76         */
    77        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    78            prefix: "$(ccOpts.prefix)",
    79            suffix: "$(ccOpts.suffix)"
    80        };
    81
    82        override config string includeOpts = "-I$(rootDir)/include";
    83
    84        final override readonly config string sectMap[string] = [
    85            [".text", "code"],
    86            [".stack", "stack"],
    87            [".bss", "data"],
    88            [".cinit", "data"],
    89            [".init_array", "data"],
    90            [".const", "data"],
    91            [".data", "data"],
    92            [".switch", "data"],
    93            [".sysmem", "data"],
    94            [".far", "data"],
    95            [".args", "data"],
    96            [".cio", "data"],
    97            [".fardata", "data"],
    98            [".rodata", "data"],
    99        ];
   100
   101        final override readonly config Bool splitMap[string] = [
   102            [".text", true],
   103            [".switch", true],
   104            [".cio", true],
   105        ];
   106
   107        override readonly config Int bitsPerChar = 8;
   108
   109        /*!
   110         *  ======== profiles ========
   111         *  Standard options profiles for the TI tool-chain.
   112         */
   113        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   114            ["debug", {
   115                compileOpts: {
   116                    copts: "--symdebug:dwarf",
   117                    defs:  "-D_DEBUG_=1",
   118                }
   119            }],
   120            ["release", {
   121                compileOpts: {
   122                    copts: "-O2",
   123                },
   124            }],
   125            ["profile", {
   126                compileOpts: {
   127                    copts: "--symdebug:dwarf",
   128                },
   129            }],
   130            ["coverage", {
   131                compileOpts: {
   132                    copts: "--symdebug:dwarf",
   133                },
   134            }]
   135        ];
   136
   137        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   138            t_IArg          : { size: 4, align: 4 },
   139            t_Char          : { size: 1, align: 1 },
   140            t_Double        : { size: 8, align: 4 },
   141            t_Float         : { size: 4, align: 4 },
   142            t_Fxn           : { size: 4, align: 4 },
   143            t_Int           : { size: 4, align: 4 },
   144            t_Int8          : { size: 1, align: 1 },
   145            t_Int16         : { size: 2, align: 2 },
   146            t_Int32         : { size: 4, align: 4 },
   147            t_Int64         : { size: 8, align: 4 },
   148            t_Long          : { size: 4, align: 4 },
   149            t_LDouble       : { size: 8, align: 4 },
   150            t_LLong         : { size: 8, align: 4 },
   151            t_Ptr           : { size: 4, align: 4 },
   152            t_Short         : { size: 2, align: 2 },
   153            t_Size          : { size: 4, align: 4 },
   154        };
   155
   156        override config String stdInclude = "ti/targets/arp32/elf/std.h";
   157
   158        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   159    }
   160    /*
   161     *  @(#) ti.targets.arp32.elf; 1, 0, 0,0; 9-28-2018 17:08:09; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   162
   163     */
   164


package ti.targets.arp32.elf

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     *
    12     */
    13    /*
    14     *  ======== package.xdc ========
    15     *
    16     */
    17
    18    requires xdc.bld;
    19
    20    /*!
    21     *  ======== ti.targets.arp32.elf ========
    22     *  Package of targets for TI code generation tools for ARP32
    23     *
    24     */
    25    package ti.targets.arp32.elf [1,0,0] {
    26        interface IARP32;
    27        module ARP32, ARP32_far;
    28    }
    29
    30    /*
    31     *  @(#) ti.targets.arp32.elf; 1, 0, 0,0; 9-28-2018 17:08:09; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    32
    33     */
    34


package ti.targets.arp32.rts

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== ti.targets.arp32.rts ========
    16     *  Runtime support package for the arp32 targets.
    17     *
    18     *  This package builds a library of standard XDC system support functions.
    19     *  In particular, it builds several implementations of the
    20     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    21     *  that are part of the xdc.runtime package (to avoid having multiple copies
    22     *  of the same source in different runtime support packages for different
    23     *  ISAs.
    24     */
    25    package ti.targets.arp32.rts [1,0,0] {
    26        module Settings;
    27    }
    28
    29    /*
    30     *  @(#) ti.targets.arp32.rts; 1, 0, 0,0; 9-28-2018 17:36:33; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    31
    32     */
    33


module ti.targets.arp32.rts.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package ti.targets.arp32.rts;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39
    40    /*
    41     *  @(#) ti.targets.arp32.rts; 1, 0, 0,0; 9-28-2018 17:36:33; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    42
    43     */
    44


module ti.targets.elf.C66

     1    /*
     2     *  Copyright (c) 2010 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== C66.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== C66 ========
    19     *  TI C66 little endian (ELF)
    20     */
    21    metaonly module C66 inherits ITarget {
    22        override readonly config string name                 = "C66";
    23        override readonly config string suffix               = "e66";
    24        override readonly config string isa                  = "66";
    25        override readonly config xdc.bld.ITarget.Model model = {
    26            endian: "little",
    27            shortEnums: false
    28        };
    29        override readonly config xdc.bld.ITarget.Module base = ti.targets.elf.C64P;
    30
    31        /*
    32         *  ======== compatibleSuffixes ========
    33         */
    34        override config String compatibleSuffixes[] = ["e674", "e64P"];
    35
    36        override config string platform     = "ti.platforms.simTCI6616";
    37
    38        override readonly config xdc.bld.ITarget2.Command cc = {
    39            cmd: "cl6x -c",
    40            opts: "-mv6600 --abi=eabi"
    41        };
    42
    43        override readonly config xdc.bld.ITarget2.Command asm = {
    44            cmd: "cl6x -c",
    45            opts: "-mv6600 --abi=eabi"
    46        };
    47
    48        override readonly config Int bitsPerChar =
    49            ti.targets.elf.C64P.bitsPerChar;
    50    }
    51    /*
    52     *  @(#) ti.targets.elf; 1, 0, 0,0; 9-28-2018 17:08:14; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    53
    54     */
    55


module ti.targets.elf.C66_big_endian

     1    /*
     2     *  Copyright (c) 2010 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== C66_big_endian.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== C66_big_endian ========
    19     *  TI C66 big endian (ELF)
    20     */
    21    metaonly module C66_big_endian inherits ITarget {
    22        override readonly config string name                 = "C66_big_endian";
    23        override readonly config string suffix               = "e66e";
    24        override readonly config string isa                  = "66";
    25        override readonly config xdc.bld.ITarget.Model model = {
    26            endian: "big",
    27            shortEnums: false
    28        };
    29        override readonly config xdc.bld.ITarget.Module base = ti.targets.elf.C64P;
    30
    31        /*
    32         *  ======== compatibleSuffixes ========
    33         */
    34        override config String compatibleSuffixes[] = ["e674e", "e64Pe"];
    35
    36        override config string platform     = "ti.platforms.simTCI6616";
    37
    38        override readonly config xdc.bld.ITarget2.Command cc = {
    39            cmd: "cl6x -c",
    40            opts: "-me -mv6600 --abi=eabi"
    41        };
    42
    43        override readonly config xdc.bld.ITarget2.Command asm = {
    44            cmd: "cl6x -c",
    45            opts: "-me -mv6600 --abi=eabi"
    46        };
    47
    48        override readonly config Int bitsPerChar =
    49            ti.targets.elf.C64P.bitsPerChar;
    50    }
    51    /*
    52     *  @(#) ti.targets.elf; 1, 0, 0,0; 9-28-2018 17:08:15; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    53
    54     */
    55


module ti.targets.elf.C674

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== C674.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== C674 ========
    19     *  TI C674 little endian (ELF)
    20     */
    21    metaonly module C674 inherits ITarget {
    22        override readonly config string name                 = "C674";
    23        override readonly config string suffix               = "e674";
    24        override readonly config string isa                  = "674";
    25        override readonly config xdc.bld.ITarget.Model model = {
    26            endian: "little",
    27            shortEnums: false
    28        };
    29        override readonly config xdc.bld.ITarget.Module base = ti.targets.elf.C64P;
    30
    31        /*
    32         *  ======== compatibleSuffixes ========
    33         */
    34        override config String compatibleSuffixes[] = ["e64P"];
    35
    36        override config string platform     = "ti.platforms.evmDA830";
    37
    38        override readonly config xdc.bld.ITarget2.Command cc = {
    39            cmd: "cl6x -c",
    40            opts: "-mv6740 --abi=eabi"
    41        };
    42
    43        override readonly config xdc.bld.ITarget2.Command asm = {
    44            cmd: "cl6x -c",
    45            opts: "-mv6740 --abi=eabi"
    46        };
    47
    48        override readonly config Int bitsPerChar =
    49            ti.targets.elf.C64P.bitsPerChar;
    50    }
    51    /*
    52     *  @(#) ti.targets.elf; 1, 0, 0,0; 9-28-2018 17:08:15; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    53
    54     */
    55


module ti.targets.elf.C674_big_endian

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== C674_big_endian.xdc ========
    15     *
    16     */
    17
    18    /*!
    19     *  ======== C674_big_endian ========
    20     *  TI C674 big endian (ELF)
    21     */
    22    metaonly module C674_big_endian inherits ITarget {
    23        override readonly config string name                 = "C674_big_endian";
    24        override readonly config string suffix               = "e674e";
    25        override readonly config string isa                  = "674";
    26        override readonly config xdc.bld.ITarget.Model model = {
    27            endian: "big",
    28            shortEnums: false
    29        };
    30        override readonly config xdc.bld.ITarget.Module base = ti.targets.elf.C64P;
    31
    32        /*
    33         *  ======== compatibleSuffixes ========
    34         */
    35        override config String compatibleSuffixes[] = ["e64Pe"];
    36
    37        override config string platform     = "ti.platforms.evmDA830";
    38
    39        override readonly config xdc.bld.ITarget2.Command cc = {
    40            cmd: "cl6x -c",
    41            opts: "-me -mv6740 --abi=eabi"
    42        };
    43
    44        override readonly config xdc.bld.ITarget2.Command asm = {
    45            cmd: "cl6x -c",
    46            opts: "-me -mv6740 --abi=eabi"
    47        };
    48
    49        override readonly config Int bitsPerChar = ti.targets.elf.C64P.bitsPerChar;
    50    }
    51    /*
    52     *  @(#) ti.targets.elf; 1, 0, 0,0; 9-28-2018 17:08:15; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    53
    54     */
    55


interface ti.targets.elf.ITarget

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ITarget.xdc ========
    14     *
    15     */
    16
    17    /*!
    18     *  ======== ITarget ========
    19     *  An ELF extension to the `ti.targets.ITarget` interface.
    20     */
    21    metaonly interface ITarget inherits ti.targets.ITarget {
    22
    23        override readonly config string rts = "ti.targets.rts6000";
    24
    25        override readonly config xdc.bld.ITarget2.Command ar = {
    26            cmd: "ar6x",
    27            opts: "rq"
    28        };
    29
    30        override readonly config xdc.bld.ITarget2.Command lnk = {
    31            cmd: "cl6x",
    32            opts: "--abi=eabi -z"
    33        };
    34
    35        override readonly config xdc.bld.ITarget2.Command vers = {
    36            cmd: "cl6x",
    37            opts: "--compiler_revision"
    38        };
    39
    40        /*!
    41         *  ======== asmOpts ========
    42         *  User configurable assembler options.
    43         *
    44         *  Defaults:
    45         *  @p(dlist)
    46         *      -`-qq`
    47         *          super quiet mode
    48         */
    49        override config xdc.bld.ITarget2.Options asmOpts = {
    50            prefix: "-qq",
    51            suffix: ""
    52        };
    53
    54        /*!
    55         *  ======== ccOpts ========
    56         *  User configurable compiler options.
    57         *
    58         *  Defaults:
    59         *  @p(dlist)
    60         *      -`-qq`
    61         *          super quiet mode
    62         *      -`-pdsw225`
    63         *          generate a warning for implicitly declared functions; i.e.,
    64         *          functions without prototypes
    65         */
    66        override config xdc.bld.ITarget2.Options ccOpts = {
    67            prefix: "-qq -pdsw225",
    68            suffix: ""
    69        };
    70
    71        /*!
    72         *  ======== ccConfigOpts ========
    73         *  User configurable compiler options for the generated config C file.
    74         *
    75         *  -mo places all functions into subsections
    76         *  --no_compress helps with compile time with no real difference in
    77         *  code size since the generated config.c is mostly data and small
    78         *  function stubs.
    79         */
    80        override config xdc.bld.ITarget2.Options ccConfigOpts = {
    81            prefix: "$(ccOpts.prefix) -mo",
    82            suffix: "$(ccOpts.suffix)"
    83        };
    84
    85        override config xdc.bld.ITarget.OptionSet profiles[string] = [
    86            ["debug", {
    87                compileOpts: {
    88                    copts: "--symdebug:dwarf",
    89                    defs:  "-D_DEBUG_=1",
    90                }
    91            }],
    92            ["release", {
    93                compileOpts: {
    94                    copts: "-O2",
    95                },
    96            }],
    97        ];
    98
    99        final override readonly config string sectMap[string] = [
   100            [".text", "code"],
   101            [".ti.decompress", "code"],
   102            [".stack", "stack"],
   103            [".bss", "data"],
   104            [".cinit", "data"],
   105            [".pinit", "data"],
   106            [".init_array", "data"],
   107            [".const", "data"],
   108            [".data", "data"],
   109            [".rodata", "data"],
   110            [".neardata", "data"],
   111            [".fardata", "data"],
   112            [".switch", "data"],
   113            [".sysmem", "data"],
   114            [".far", "data"],
   115            [".args", "data"],
   116            [".cio", "data"],
   117            [".ti.handler_table", "data"],
   118            [".c6xabi.exidx", "data"],
   119            [".c6xabi.extab", "data"],
   120        ];
   121
   122        override readonly config Bool splitMap[string] = [
   123            [".text", true],
   124            [".pinit", true],
   125            [".const", true],
   126            [".data", true],
   127            [".fardata", true],
   128            [".switch", true],
   129            [".far", true],
   130            [".args", true],
   131            [".cio", true],
   132            [".c6xabi.extab", true]
   133        ];
   134
   135        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   136            t_IArg          : { size: 4, align: 4 },
   137            t_Char          : { size: 1, align: 1 },
   138            t_Double        : { size: 8, align: 8 },
   139            t_Float         : { size: 4, align: 4 },
   140            t_Fxn           : { size: 4, align: 4 },
   141            t_Int           : { size: 4, align: 4 },
   142            t_Int8          : { size: 1, align: 1 },
   143            t_Int16         : { size: 2, align: 2 },
   144            t_Int32         : { size: 4, align: 4 },
   145            t_Int64         : { size: 8, align: 8 },
   146            t_Long          : { size: 4, align: 4 },
   147            t_LDouble       : { size: 8, align: 8 },
   148            t_LLong         : { size: 8, align: 8 },
   149            t_Ptr           : { size: 4, align: 4 },
   150            t_Short         : { size: 2, align: 2 },
   151            t_Size          : { size: 4, align: 4 },
   152        };
   153
   154        override config String includeOpts = "-I$(rootDir)/include";
   155
   156        override config String stdInclude = "ti/targets/elf/std.h";
   157
   158        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   159    }
   160    /*
   161     *  @(#) ti.targets.elf; 1, 0, 0,0; 9-28-2018 17:08:15; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   162
   163     */
   164


package ti.targets.elf

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments and others. - http://www.ti.com
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     *
    12     */
    13    /*
    14     *  ======== package.xdc ========
    15     */
    16
    17    requires xdc.bld;
    18
    19    /*!
    20     *  ======== ti.targets.elf ========
    21     *  Package of targets for TI code generation tools for ELF
    22     *
    23     */
    24    package ti.targets.elf [1,0,0] {
    25        interface ITarget;
    26        module C64P, C674;
    27        module C64P_big_endian, C674_big_endian;
    28        module C66, C66_big_endian;
    29        module C28_float;
    30    }
    31    /*
    32     *  @(#) ti.targets.elf; 1, 0, 0,0; 9-28-2018 17:08:15; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    33
    34     */
    35


module ti.targets.msp430.MSP430

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== MSP430.xdc ========
    15     *  MSP430 small code, small data model, little endian
    16     *
    17     *  This target corresponds to the TI default runtime model for MSP430 devices.
    18     */
    19    metaonly module MSP430 inherits ti.targets.ITarget {
    20        override readonly config string name    = "MSP430";
    21        override readonly config string suffix  = "430";
    22        override readonly config string isa     = "430";
    23        override readonly config string rts     = "ti.targets.msp430.rts430";
    24        override readonly config xdc.bld.ITarget.Model model = {
    25            endian: "little",
    26            codeModel: "small",
    27            dataModel: "small"
    28        };
    29
    30        override readonly config string stdInclude = "ti/targets/msp430/std.h";
    31
    32        override readonly config ti.targets.ITarget.Command ar = {
    33            cmd:  "ar430",
    34            opts: "rq"
    35        };
    36
    37        override readonly config ti.targets.ITarget.Command cc = {
    38            cmd:  "cl430 -c",
    39            opts: " -vmsp"
    40        };
    41
    42        override readonly config ti.targets.ITarget.Command vers = {
    43            cmd:  "cl430",
    44            opts: "--compiler_revision"
    45        };
    46
    47        override readonly config ti.targets.ITarget.Command asm = {
    48            cmd:  "cl430 -c",
    49            opts: " -vmsp"
    50        };
    51
    52        override readonly config ti.targets.ITarget.Command lnk = {
    53            cmd:  "cl430",
    54            opts: "-z"
    55        };
    56
    57        /*!
    58         *  ======== asmOpts ========
    59         *  User configurable assembler options.
    60         *
    61         *  Defaults:
    62         *  @p(dlist)
    63         *      -`-qq`
    64         *          super quiet mode
    65         */
    66        override config ti.targets.ITarget.Options asmOpts = {
    67            prefix: "-qq",
    68            suffix: ""
    69        };
    70
    71        /*!
    72         *  ======== ccOpts ========
    73         *  User configurable compiler options.
    74         *
    75         *  Defaults:
    76         *  @p(dlist)
    77         *      -`-qq`
    78         *          super quiet mode
    79         *      -`-pdsw225`
    80         *          generate a warning for implicitly declared functions; i.e.,
    81         *          functions without prototypes
    82         */
    83        override config ti.targets.ITarget.Options ccOpts = {
    84            prefix: "-qq -pdsw225",
    85            suffix: ""
    86        };
    87
    88        /*!
    89         *  ======== ccConfigOpts ========
    90         *  User configurable compiler options for the generated config C file.
    91         */
    92        override config ti.targets.ITarget.Options ccConfigOpts = {
    93            prefix: "$(ccOpts.prefix)",
    94            suffix: "$(ccOpts.suffix)"
    95        };
    96
    97        /*!
    98         *  ======== profiles ========
    99         *  Standard options profiles for the TI tool-chain.
   100         */
   101        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   102            ["debug", {
   103                compileOpts: {
   104                    copts: "-g",
   105                    defs:  "-D_DEBUG_=1",
   106                }
   107            }],
   108            ["release", {
   109                compileOpts: {
   110                    copts: "-O2 -g --optimize_with_debug",
   111                },
   112            }],
   113            ["profile", {
   114                compileOpts: {
   115                    copts: "-gp",
   116                },
   117            }],
   118            ["coverage", {
   119                compileOpts: {
   120                    copts: "-gp",
   121                },
   122            }],
   123        ];
   124
   125        override config string includeOpts = "-I$(rootDir)/include ";
   126
   127        final override readonly config string sectMap[string] = [
   128            [".text", "code"],
   129            [".cinit", "code"],
   130            [".const", "code"],
   131            [".pinit", "code"],
   132
   133            [".bss", "data"],
   134            [".sysmem", "data"],
   135            [".stack", "stack"],
   136            [".args", "data"],
   137            [".cio", "data"],
   138            [".reset", "data"],
   139        ];
   140
   141        final override readonly config Bool splitMap[string] = [
   142            [".text", true],
   143            [".const", true],
   144            [".args", true],
   145            [".cio", true]
   146        ];
   147
   148        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   149            t_IArg          : { size: 2, align: 2 },
   150            t_Char          : { size: 1, align: 1 },
   151            t_Double        : { size: 4, align: 2 },
   152            t_Float         : { size: 4, align: 2 },
   153            t_Fxn           : { size: 2, align: 2 },
   154            t_Int           : { size: 2, align: 2 },
   155            t_Int8          : { size: 1, align: 1 },
   156            t_Int16         : { size: 2, align: 2 },
   157            t_Int32         : { size: 4, align: 2 },
   158            t_Long          : { size: 4, align: 2 },
   159            t_LDouble       : { size: 4, align: 2 },
   160            t_LLong         : { size: 8, align: 2 },
   161            t_Ptr           : { size: 2, align: 2 },
   162            t_Short         : { size: 2, align: 2 },
   163            t_Size          : { size: 2, align: 2 },
   164        };
   165    };
   166    /*
   167     *  @(#) ti.targets.msp430; 1, 0, 0,0; 9-28-2018 17:08:25; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   168
   169     */
   170


module ti.targets.msp430.MSP430X

     1    /*
     2     *  Copyright (c) 2010-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    import ti.targets.ITarget;
    14
    15    /*!
    16     *  ======== MSP430X.xdc ========
    17     *  MSP430X large code, restricted data model, little endian
    18     */
    19    metaonly module MSP430X inherits ITarget {
    20        override readonly config string name    = "MSP430X";
    21        override readonly config string suffix  = "430X";
    22        override readonly config string isa     = "430X";
    23        override readonly config string rts     = "ti.targets.msp430.rts430";
    24        override readonly config xdc.bld.ITarget.Model model = {
    25            endian: "little",
    26            codeModel: "large",
    27            dataModel: "restricted"
    28        };
    29
    30        override readonly config string stdInclude = "ti/targets/msp430/std.h";
    31
    32        override readonly config ITarget.Command ar = {
    33            cmd:  "ar430",
    34            opts: "rq"
    35        };
    36
    37        override readonly config ITarget.Command cc = {
    38            cmd:  "cl430 -c",
    39            opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    40        };
    41
    42        override readonly config ITarget.Command vers = {
    43            cmd:  "cl430",
    44            opts: "--compiler_revision"
    45        };
    46
    47        override readonly config ITarget.Command asm = {
    48            cmd:  "cl430 -c",
    49            opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    50        };
    51
    52        override readonly config ITarget.Command lnk = {
    53            cmd:  "cl430",
    54            opts: "-z"
    55        };
    56
    57        /*!
    58         *  ======== asmOpts ========
    59         *  User configurable assembler options.
    60         *
    61         *  Defaults:
    62         *  @p(dlist)
    63         *      -`-qq`
    64         *          super quiet mode
    65         */
    66        override config ITarget.Options asmOpts = {
    67            prefix: "-qq",
    68            suffix: ""
    69        };
    70
    71        /*!
    72         *  ======== ccOpts ========
    73         *  User configurable compiler options.
    74         *
    75         *  Defaults:
    76         *  @p(dlist)
    77         *      -`-qq`
    78         *          super quiet mode
    79         *      -`-pdsw225`
    80         *          generate a warning for implicitly declared functions; i.e.,
    81         *          functions without prototypes
    82         */
    83        override config ITarget.Options ccOpts = {
    84            prefix: "-qq -pdsw225",
    85            suffix: ""
    86        };
    87
    88        /*!
    89         *  ======== ccConfigOpts ========
    90         *  User configurable compiler options for the generated config C file.
    91         */
    92        override config ITarget.Options ccConfigOpts = {
    93            prefix: "$(ccOpts.prefix)",
    94            suffix: "$(ccOpts.suffix)"
    95        };
    96
    97        /*!
    98         *  ======== profiles ========
    99         *  Standard options profiles for the TI tool-chain.
   100         */
   101        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   102            ["debug", {
   103                compileOpts: {
   104                    copts: "-g",
   105                    defs:  "-D_DEBUG_=1",
   106                }
   107            }],
   108            ["release", {
   109                compileOpts: {
   110                    copts: "-O2 -g --optimize_with_debug",
   111                },
   112            }],
   113            ["profile", {
   114                compileOpts: {
   115                    copts: "-gp",
   116                },
   117            }],
   118            ["coverage", {
   119                compileOpts: {
   120                    copts: "-gp",
   121                },
   122            }],
   123        ];
   124
   125        override config string includeOpts = "-I$(rootDir)/include ";
   126
   127        final override readonly config string sectMap[string] = [
   128            [".text", "code"],
   129            [".cinit", "code"],
   130            [".const", "code"],
   131            [".pinit", "code"],
   132
   133            [".bss", "data"],
   134            [".sysmem", "data"],
   135            [".stack", "stack"],
   136            [".args", "data"],
   137            [".cio", "data"],
   138            [".reset", "data"],
   139        ];
   140
   141        final override readonly config Bool splitMap[string] =
   142            MSP430.splitMap;
   143
   144        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   145            t_IArg          : { size: 4, align: 2 },
   146            t_Char          : { size: 1, align: 1 },
   147            t_Double        : { size: 4, align: 2 },
   148            t_Float         : { size: 4, align: 2 },
   149            t_Fxn           : { size: 4, align: 2 },
   150            t_Int           : { size: 2, align: 2 },
   151            t_Int8          : { size: 1, align: 1 },
   152            t_Int16         : { size: 2, align: 2 },
   153            t_Int32         : { size: 4, align: 2 },
   154            t_Long          : { size: 4, align: 2 },
   155            t_LDouble       : { size: 4, align: 2 },
   156            t_LLong         : { size: 8, align: 2 },
   157            t_Ptr           : { size: 4, align: 2 },
   158            t_Short         : { size: 2, align: 2 },
   159            t_Size          : { size: 2, align: 2 },
   160        };
   161    };
   162    /*
   163     *  @(#) ti.targets.msp430; 1, 0, 0,0; 9-28-2018 17:08:25; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   164
   165     */
   166


package ti.targets.msp430

     1    /*
     2     *  Copyright (c) 2010 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    requires xdc.bld [1,0,2];
    14
    15    /*!
    16     *  ======== ti.targets.msp430 ========
    17     *  Package of targets for MSP430 code generation tools
    18     */
    19    package ti.targets.msp430 [1,0,0] {
    20        module MSP430, MSP430X, MSP430X_small;
    21        module Generic;
    22    }
    23    /*
    24     *  @(#) ti.targets.msp430; 1, 0, 0,0; 9-28-2018 17:08:25; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    25
    26     */
    27


module ti.targets.msp430.elf.MSP430

     1    /*
     2     *  Copyright (c) 2008-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== MSP430.xdc ========
    15     *  ELF MSP430 small code, small data model, little endian
    16     *
    17     *  This target corresponds to the TI default runtime model for MSP430 devices.
    18     */
    19    metaonly module MSP430 inherits ti.targets.ITarget {
    20        override readonly config string name    = "MSP430";
    21        override readonly config string suffix  = "e430";
    22        override readonly config string isa     = "430";
    23        override readonly config string rts     = "ti.targets.msp430.rts430";
    24        override readonly config xdc.bld.ITarget.Model model = {
    25            endian: "little",
    26            codeModel: "small",
    27            dataModel: "small"
    28        };
    29
    30        override readonly config string stdInclude = "ti/targets/msp430/elf/std.h";
    31
    32        override readonly config ti.targets.ITarget.Command ar = {
    33            cmd:  "ar430",
    34            opts: "rq"
    35        };
    36
    37        override readonly config ti.targets.ITarget.Command cc = {
    38            cmd:  "cl430 --abi=eabi -c",
    39            opts: " -vmsp"
    40        };
    41
    42        override readonly config ti.targets.ITarget.Command vers = {
    43            cmd:  "cl430",
    44            opts: "--compiler_revision"
    45        };
    46
    47        override readonly config ti.targets.ITarget.Command asm = {
    48            cmd:  "cl430 --abi=eabi -c",
    49            opts: " -vmsp"
    50        };
    51
    52        override readonly config ti.targets.ITarget.Command lnk = {
    53            cmd:  "cl430",
    54            opts: "-z"
    55        };
    56
    57        /*!
    58         *  ======== asmOpts ========
    59         *  User configurable assembler options.
    60         *
    61         *  Defaults:
    62         *  @p(dlist)
    63         *      -`-qq`
    64         *          super quiet mode
    65         */
    66        override config ti.targets.ITarget.Options asmOpts = {
    67            prefix: "-qq",
    68            suffix: ""
    69        };
    70
    71        /*!
    72         *  ======== ccOpts ========
    73         *  User configurable compiler options.
    74         *
    75         *  Defaults:
    76         *  @p(dlist)
    77         *      -`-qq`
    78         *          super quiet mode
    79         *      -`-pdsw225`
    80         *          generate a warning for implicitly declared functions; i.e.,
    81         *          functions without prototypes
    82         */
    83        override config ti.targets.ITarget.Options ccOpts = {
    84            prefix: "-qq -pdsw225",
    85            suffix: ""
    86        };
    87
    88        /*!
    89         *  ======== ccConfigOpts ========
    90         *  User configurable compiler options for the generated config C file.
    91         */
    92        override config ti.targets.ITarget.Options ccConfigOpts = {
    93            prefix: "$(ccOpts.prefix)",
    94            suffix: "$(ccOpts.suffix)"
    95        };
    96
    97        /*!
    98         *  ======== profiles ========
    99         *  Standard options profiles for the TI tool-chain.
   100         */
   101        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   102            ["debug", {
   103                compileOpts: {
   104                    copts: "-g",
   105                    defs:  "-D_DEBUG_=1",
   106                }
   107            }],
   108            ["release", {
   109                compileOpts: {
   110                    copts: "-O2 -g --optimize_with_debug",
   111                },
   112            }],
   113            ["profile", {
   114                compileOpts: {
   115                    copts: "-g",
   116                },
   117            }],
   118            ["coverage", {
   119                compileOpts: {
   120                    copts: "-g",
   121                },
   122            }],
   123        ];
   124
   125        override config string includeOpts = "-I$(rootDir)/include ";
   126
   127        final override readonly config string sectMap[string] = [
   128            [".text", "code"],
   129            [".cinit", "code"],
   130            [".const", "code"],
   131
   132            [".init_array", "data"],
   133            [".bss", "data"],
   134            [".data", "data"],
   135            [".sysmem", "data"],
   136            [".stack", "stack"],
   137            [".args", "data"],
   138            [".cio", "data"],
   139            [".reset", "data"],
   140            [".mspabi.extab", "code"],
   141            [".mspabi.exidx", "code"]
   142        ];
   143
   144        final override readonly config Bool splitMap[string] = [
   145            [".text", true],
   146            [".const", true],
   147            [".data", true],
   148            [".mspabi.extab", true],
   149            [".args", true],
   150            [".cio", true]
   151        ];
   152
   153        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   154            t_IArg          : { size: 2, align: 2 },
   155            t_Char          : { size: 1, align: 1 },
   156            t_Double        : { size: 8, align: 2 },
   157            t_Float         : { size: 4, align: 2 },
   158            t_Fxn           : { size: 2, align: 2 },
   159            t_Int           : { size: 2, align: 2 },
   160            t_Int8          : { size: 1, align: 1 },
   161            t_Int16         : { size: 2, align: 2 },
   162            t_Int32         : { size: 4, align: 2 },
   163            t_Long          : { size: 4, align: 2 },
   164            t_LDouble       : { size: 8, align: 2 },
   165            t_LLong         : { size: 8, align: 2 },
   166            t_Ptr           : { size: 2, align: 2 },
   167            t_Short         : { size: 2, align: 2 },
   168            t_Size          : { size: 2, align: 2 },
   169        };
   170
   171        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   172    };
   173    /*
   174     *  @(#) ti.targets.msp430.elf; 1, 0, 0,0; 9-28-2018 17:08:30; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   175
   176     */
   177


module ti.targets.msp430.elf.MSP430X

     1    /*
     2     *  Copyright (c) 2010-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    import ti.targets.ITarget;
    14
    15    /*!
    16     *  ======== MSP430X.xdc ========
    17     *  ELF MSP430X large code, restricted data model, little endian
    18     */
    19    metaonly module MSP430X inherits ITarget {
    20        override readonly config string name    = "MSP430X";
    21        override readonly config string suffix  = "e430X";
    22        override readonly config string isa     = "430X";
    23        override readonly config string rts     = "ti.targets.msp430.rts430";
    24        override readonly config xdc.bld.ITarget.Model model = {
    25            endian: "little",
    26            codeModel: "large",
    27            dataModel: "restricted"
    28        };
    29
    30        override readonly config string stdInclude = "ti/targets/msp430/elf/std.h";
    31
    32        override readonly config ITarget.Command ar = {
    33            cmd:  "ar430",
    34            opts: "rq"
    35        };
    36
    37        override readonly config ITarget.Command cc = {
    38            cmd:  "cl430 --abi=eabi -c",
    39            opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    40        };
    41
    42        override readonly config ITarget.Command vers = {
    43            cmd:  "cl430",
    44            opts: "--compiler_revision"
    45        };
    46
    47        override readonly config ITarget.Command asm = {
    48            cmd:  "cl430 --abi=eabi -c",
    49            opts: " -vmspx --near_data=none --code_model=large --data_model=restricted"
    50        };
    51
    52        override readonly config ITarget.Command lnk = {
    53            cmd:  "cl430",
    54            opts: "-z"
    55        };
    56
    57        /*!
    58         *  ======== asmOpts ========
    59         *  User configurable assembler options.
    60         *
    61         *  Defaults:
    62         *  @p(dlist)
    63         *      -`-qq`
    64         *          super quiet mode
    65         */
    66        override config ITarget.Options asmOpts = {
    67            prefix: "-qq",
    68            suffix: ""
    69        };
    70
    71        /*!
    72         *  ======== ccOpts ========
    73         *  User configurable compiler options.
    74         *
    75         *  Defaults:
    76         *  @p(dlist)
    77         *      -`-qq`
    78         *          super quiet mode
    79         *      -`-pdsw225`
    80         *          generate a warning for implicitly declared functions; i.e.,
    81         *          functions without prototypes
    82         */
    83        override config ITarget.Options ccOpts = {
    84            prefix: "-qq -pdsw225",
    85            suffix: ""
    86        };
    87
    88        /*!
    89         *  ======== ccConfigOpts ========
    90         *  User configurable compiler options for the generated config C file.
    91         */
    92        override config ITarget.Options ccConfigOpts = {
    93            prefix: "$(ccOpts.prefix)",
    94            suffix: "$(ccOpts.suffix)"
    95        };
    96
    97        /*!
    98         *  ======== profiles ========
    99         *  Standard options profiles for the TI tool-chain.
   100         */
   101        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   102            ["debug", {
   103                compileOpts: {
   104                    copts: "-g",
   105                    defs:  "-D_DEBUG_=1",
   106                }
   107            }],
   108            ["release", {
   109                compileOpts: {
   110                    copts: "-O2 -g --optimize_with_debug",
   111                },
   112            }],
   113            ["profile", {
   114                compileOpts: {
   115                    copts: "-g",
   116                },
   117            }],
   118            ["coverage", {
   119                compileOpts: {
   120                    copts: "-g",
   121                },
   122            }],
   123        ];
   124
   125        override config string includeOpts = "-I$(rootDir)/include ";
   126
   127        final override readonly config string sectMap[string] = [
   128            [".text", "code"],
   129            [".cinit", "code"],
   130            [".const", "code"],
   131
   132            [".init_array", "data"],
   133            [".bss", "data"],
   134            [".data", "data"],
   135            [".sysmem", "data"],
   136            [".stack", "stack"],
   137            [".args", "data"],
   138            [".cio", "data"],
   139            [".reset", "data"],
   140            [".mspabi.extab", "code"],
   141            [".mspabi.exidx", "code"]
   142        ];
   143
   144        final override readonly config Bool splitMap[string] =
   145            MSP430.splitMap;
   146
   147        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   148            t_IArg          : { size: 4, align: 2 },
   149            t_Char          : { size: 1, align: 1 },
   150            t_Double        : { size: 8, align: 2 },
   151            t_Float         : { size: 4, align: 2 },
   152            t_Fxn           : { size: 4, align: 2 },
   153            t_Int           : { size: 2, align: 2 },
   154            t_Int8          : { size: 1, align: 1 },
   155            t_Int16         : { size: 2, align: 2 },
   156            t_Int32         : { size: 4, align: 2 },
   157            t_Long          : { size: 4, align: 2 },
   158            t_LDouble       : { size: 8, align: 2 },
   159            t_LLong         : { size: 8, align: 2 },
   160            t_Ptr           : { size: 4, align: 2 },
   161            t_Short         : { size: 2, align: 2 },
   162            t_Size          : { size: 2, align: 2 },
   163        };
   164
   165        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   166    };
   167    /*
   168     *  @(#) ti.targets.msp430.elf; 1, 0, 0,0; 9-28-2018 17:08:30; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   169
   170     */
   171


module ti.targets.msp430.elf.MSP430X_small

     1    /*
     2     *  Copyright (c) 2010-2015 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    import ti.targets.ITarget;
    14
    15    /*!
    16     *  ======== MSP430X_small.xdc ========
    17     *  ELF MSP430X small code, small data model, little endian
    18     */
    19    metaonly module MSP430X_small inherits ITarget {
    20        override readonly config string name    = "MSP430X_small";
    21        override readonly config string suffix  = "e430XS";
    22        override readonly config string isa     = "430X";
    23        override readonly config string rts     = "ti.targets.msp430.rts430";
    24        override readonly config xdc.bld.ITarget.Model model = {
    25            endian: "little",
    26            dataModel: "small",
    27            codeModel: "small"
    28        };
    29
    30        override readonly config string stdInclude = "ti/targets/msp430/elf/std.h";
    31
    32        override readonly config ITarget.Command ar = {
    33            cmd:  "ar430",
    34            opts: "rq"
    35        };
    36
    37        override readonly config ITarget.Command cc = {
    38            cmd:  "cl430 --abi=eabi -c",
    39            opts: " -vmspx --code_model=small --data_model=small"
    40        };
    41
    42        override readonly config ITarget.Command vers = {
    43            cmd:  "cl430",
    44            opts: "--compiler_revision"
    45        };
    46
    47        override readonly config ITarget.Command asm = {
    48            cmd:  "cl430 --abi=eabi -c",
    49            opts: " -vmspx --code_model=small --data_model=small"
    50        };
    51
    52        override readonly config ITarget.Command lnk = {
    53            cmd:  "cl430",
    54            opts: "-z"
    55        };
    56
    57        /*!
    58         *  ======== asmOpts ========
    59         *  User configurable assembler options.
    60         *
    61         *  Defaults:
    62         *  @p(dlist)
    63         *      -`-qq`
    64         *          super quiet mode
    65         */
    66        override config ITarget.Options asmOpts = {
    67            prefix: "-qq",
    68            suffix: ""
    69        };
    70
    71        /*!
    72         *  ======== ccOpts ========
    73         *  User configurable compiler options.
    74         *
    75         *  Defaults:
    76         *  @p(dlist)
    77         *      -`-qq`
    78         *          super quiet mode
    79         *      -`-pdsw225`
    80         *          generate a warning for implicitly declared functions; i.e.,
    81         *          functions without prototypes
    82         */
    83        override config ITarget.Options ccOpts = {
    84            prefix: "-qq -pdsw225",
    85            suffix: ""
    86        };
    87
    88        /*!
    89         *  ======== ccConfigOpts ========
    90         *  User configurable compiler options for the generated config C file.
    91         */
    92        override config ITarget.Options ccConfigOpts = {
    93            prefix: "$(ccOpts.prefix)",
    94            suffix: "$(ccOpts.suffix)"
    95        };
    96
    97        /*!
    98         *  ======== profiles ========
    99         *  Standard options profiles for the TI tool-chain.
   100         */
   101        override config xdc.bld.ITarget.OptionSet profiles[string] = [
   102            ["debug", {
   103                compileOpts: {
   104                    copts: "-g",
   105                    defs:  "-D_DEBUG_=1",
   106                }
   107            }],
   108            ["release", {
   109                compileOpts: {
   110                    copts: "-O2 -g --optimize_with_debug",
   111                },
   112            }],
   113            ["profile", {
   114                compileOpts: {
   115                    copts: "-g",
   116                },
   117            }],
   118            ["coverage", {
   119                compileOpts: {
   120                    copts: "-g",
   121                },
   122            }],
   123        ];
   124
   125        override config string includeOpts = "-I$(rootDir)/include ";
   126
   127        final override readonly config string sectMap[string] = [
   128            [".text", "code"],
   129            [".cinit", "code"],
   130            [".const", "code"],
   131
   132            [".init_array", "data"],
   133            [".bss", "data"],
   134            [".data", "data"],
   135            [".sysmem", "data"],
   136            [".stack", "stack"],
   137            [".args", "data"],
   138            [".cio", "data"],
   139            [".reset", "data"],
   140            [".mspabi.extab", "code"],
   141            [".mspabi.exidx", "code"]
   142        ];
   143
   144        final override readonly config Bool splitMap[string] =
   145            MSP430.splitMap;
   146
   147        override readonly config xdc.bld.ITarget.StdTypes stdTypes = {
   148            t_IArg          : { size: 2, align: 2 },
   149            t_Char          : { size: 1, align: 1 },
   150            t_Double        : { size: 8, align: 2 },
   151            t_Float         : { size: 4, align: 2 },
   152            t_Fxn           : { size: 2, align: 2 },
   153            t_Int           : { size: 2, align: 2 },
   154            t_Int8          : { size: 1, align: 1 },
   155            t_Int16         : { size: 2, align: 2 },
   156            t_Int32         : { size: 4, align: 2 },
   157            t_Long          : { size: 4, align: 2 },
   158            t_LDouble       : { size: 8, align: 2 },
   159            t_LLong         : { size: 8, align: 2 },
   160            t_Ptr           : { size: 2, align: 2 },
   161            t_Short         : { size: 2, align: 2 },
   162            t_Size          : { size: 2, align: 2 },
   163        };
   164
   165        override config String binaryParser = "ti.targets.omf.elf.Elf32";
   166    };
   167    /*
   168     *  @(#) ti.targets.msp430.elf; 1, 0, 0,0; 9-28-2018 17:08:30; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
   169
   170     */
   171


package ti.targets.msp430.elf

     1    /*
     2     *  Copyright (c) 2010 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    requires xdc.bld [1,0,2];
    14
    15    /*!
    16     *  ======== ti.targets.msp430.elf ========
    17     *  Package of targets for MSP430 code generation tools
    18     */
    19    package ti.targets.msp430.elf [1,0,0] {
    20        module MSP430, MSP430X, MSP430X_small;
    21    }
    22
    23
    24    /*
    25     *  @(#) ti.targets.msp430.elf; 1, 0, 0,0; 9-28-2018 17:08:30; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    26
    27     */
    28


package ti.targets.msp430.rts430

     1    /*
     2     *  Copyright (c) 2010 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== ti.targets.msp430.rts430 ========
    16     *  Runtime support package for the MSP430 targets.
    17     *
    18     *  This package builds a library of all modules in the xdc.runtime package.
    19     *  By building the xdc.runtime package here we avoid having multiple copies
    20     *  of the same source in different runtime support packages for different
    21     *  ISAs.  This also allows xdc.runtime to be a pure source package
    22     *  independent of any particular tool chain.
    23     */
    24    package ti.targets.msp430.rts430 [1,0,0] {
    25        module Settings;
    26    }
    27    /*
    28     *  @(#) ti.targets.msp430.rts430; 1, 0, 0,0; 9-28-2018 17:36:48; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    29
    30     */
    31


module ti.targets.msp430.rts430.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package ti.targets.msp430.rts430;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     */
    24    module Settings {
    25
    26        /*!
    27         *  ======== bootOnly ========
    28         *  Allow supplying only the boot code library
    29         *
    30         *  This package can supply the boot code and the library with the
    31         *  implementation of xdc.runtime modules. If this parameter is set to
    32         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    33         *  and the xdc.runtime implementation are supplied.
    34         */
    35        metaonly config Bool bootOnly = false;
    36    }
    37    /*
    38     *  @(#) ti.targets.msp430.rts430; 1, 0, 0,0; 9-28-2018 17:36:48; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    39
    40     */
    41


package ti.targets.omf.cof

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*!
     7     *  ======== package.xdc ========
     8     *  Simple TI COFF parser support
     9     */
    10    package ti.targets.omf.cof {
    11        module Settings;
    12    };
    13    /*
    14     *  @(#) ti.targets.omf.cof; 1,0,0,0; 9-28-2018 17:37:03; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    15
    16     */
    17


module ti.targets.omf.cof.Settings

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  ======== Settings.xdc ========
     8     *
     9     */
    10
    11
    12    /*!
    13     *  ======== Settings ========
    14     *  Allows selection between TI and MOTOROLA cof libraries.
    15     */
    16    metaonly module Settings {
    17
    18        /*!
    19         * Mode: {TI, MOTOROLA}.
    20         *
    21         * TI. The function getLibs() returns cof_ti.lib libraries.
    22         *
    23         * MOTOROLA. The function getLibs() returns cof_mot.lib libraries.
    24         */
    25        enum Mode {TI, MOTOROLA};
    26
    27        /*!
    28         * Determines the libraries contributed by this package.
    29         *
    30         * Default is TI
    31         */
    32        config Mode mode = TI;
    33
    34    }
    35    /*
    36     *  @(#) ti.targets.omf.cof; 1,0,0,0; 9-28-2018 17:37:02; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    37
    38     */
    39


package ti.targets.omf.elf

     1    /*
     2     *  Copyright 2018 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*!
     7     *  ======== ti.targets.omf.elf ========
     8     *  Simple ELF parser support
     9     */
    10    package ti.targets.omf.elf {
    11    }
    12    /*
    13     *  @(#) ti.targets.omf.elf; 1,0,0,0; 9-28-2018 17:37:14; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    14
    15     */
    16


package ti.targets.rts2800

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== ti.targets.rts2800 ========
    16     *  Runtime support package for the c2800 targets.
    17     *
    18     *  This package builds a library of standard XDC system support functions.
    19     *  In particular, it builds several implementations of the
    20     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    21     *  that are part of the xdc.runtime package (to avoid having multiple copies
    22     *  of the same source in different runtime support packages for different
    23     *  ISAs.
    24     */
    25    package ti.targets.rts2800 [1,0,0] {
    26        module Settings;
    27    }
    28    /*
    29     *  @(#) ti.targets.rts2800; 1, 0, 0,0; 9-28-2018 17:37:27; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    30
    31     */
    32


module ti.targets.rts2800.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package ti.targets.rts2800;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39
    40    /*
    41     *  @(#) ti.targets.rts2800; 1, 0, 0,0; 9-28-2018 17:37:27; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    42
    43     */
    44


package ti.targets.rts6000

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.runtime;
    13
    14    /*!
    15     *  ======== ti.targets.rts6000 ========
    16     *  Runtime support package for the c6000 targets.
    17     *
    18     *  This package builds a library of standard XDC system support functions.
    19     *  In particular, it builds several implementations of the
    20     *  xdc.runtime.ISystemProvider interface.  Moreover, this package uses sources
    21     *  that are part of the xdc.runtime package (to avoid having multiple copies
    22     *  of the same source in different runtime support packages for different
    23     *  ISAs.
    24     */
    25    package ti.targets.rts6000 [1,0,0] {
    26        module Settings;
    27    }
    28
    29    /*
    30     *  @(#) ti.targets.rts6000; 1, 0, 0,0; 9-28-2018 17:37:36; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    31
    32     */
    33


module ti.targets.rts6000.Settings

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== Settings.xdc ========
    16     */
    17
    18    package ti.targets.rts6000;
    19
    20    /*!
    21     *  ======== Settings ========
    22     *  Collection of parameters relevant for this package as a whole
    23     *
    24     */
    25
    26    module Settings {
    27
    28        /*!
    29         *  ======== bootOnly ========
    30         *  Allow supplying only the boot code library
    31         *
    32         *  This package can supply the boot code and the library with the
    33         *  implementation of xdc.runtime modules. If this parameter is set to
    34         *  `true`, only the boot code is supplied. Otherwise, both the boot code
    35         *  and the xdc.runtime implementation are supplied.
    36         */
    37        metaonly config Bool bootOnly = false;
    38    }
    39
    40
    41    /*
    42     *  @(#) ti.targets.rts6000; 1, 0, 0,0; 9-28-2018 17:37:36; /db/ztree/library/trees/xdctargets/xdctargets-r12/src/ xlibrary
    43
    44     */
    45


interface xdc.IPackage

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== IPackage.xdc ========
    14     */
    15    package xdc;
    16
    17    /*!
    18     *  ======== IPackage ========
    19     *  Base interface implemented by all packages.
    20     *
    21     *  If a package does not specify a function declared in
    22     *  `IPackage`, the default defined in this package is used.
    23     *
    24     *  Packages must implement `IPackage` functions in the package's `package.xs`
    25     *  file.  This file simply defines a function with the same name as that
    26     *  declared in the the this specification.  For example, to implement the
    27     *  `{@link #getLibs()}` function the following must appear in the package's
    28     *  `package.xs` file:
    29     *  @p(code)
    30     *      function getLibs(prog)
    31     *      {
    32     *           ...
    33     *      }
    34     *  @p
    35     *
    36     *  @a(Note)
    37     *  Since most `IPackage` functions can be called in any model, any access to
    38     *  global variables specific to a particular object model should happen only
    39     *  if the function is called in the context of that model. For example, the
    40     *  variable `Program` is a global variable in the Configuration Model
    41     *  (`{@link xdc.cfg.Program}`). Any access to it should happen after a check
    42     *  that the current model is the Configuration Model:
    43     *  @p(code)
    44     *      if (xdc.om.$name == "cfg") {
    45     *          print(Program.build.target.name);
    46     *      }
    47     *  @p
    48     *  For additional information about `xdc.om`, see
    49     *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_-_xdc.om xdc.om} in the
    50     *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_Language_Reference XDCscript Language Reference}.
    51     */
    52    metaonly interface IPackage {
    53        /*!
    54         *  ======== LibDesc ========
    55         *  Library properties from the Build Object Model (BOM)
    56         *
    57         *  This structure defines library properties that are
    58         *  carried forward from the Build Model into the Configuration Model.
    59         *
    60         *  @field(target)    target for which the library was built.
    61         *  @field(suffix)    the suffix associated with the named target.
    62         *
    63         */
    64        struct LibDesc {
    65            String target;  /*! target name */
    66            String suffix;  /*! suffix property of the named target */
    67        }
    68
    69        /*!
    70         *  ======== BuildAttrs ========
    71         *  Package-level attributes from the Build Object Model (BOM)
    72         *
    73         *  This structure defines a set of package-level attributes that are
    74         *  carried forward from the Build Model into the Configuration Model.
    75         *
    76         *  @field(getLibs)   the JavaScript function that should be used when
    77         *                    the package participates in a program configuration
    78         *                    script.  This field contains the function specified
    79         *                    by a package's build script
    80         *  @field(libraries) an array of archive names created by this package.
    81         *                    Each name is a package-relative file name of an
    82         *                    archive within the package.
    83         *  @field(libDesc)   a map of library descriptors.  This map is indexed
    84         *                    by names that appear in the `libraries` array.
    85         */
    86        struct BuildAttrs {
    87            String  libraries[]; /*! array of archive names produced by this pkg */
    88            LibDesc libDesc[string]; /*! desriptors for elements in `libraries` */
    89            any     getLibs;     /*! `getLibs` function defined by build script */
    90        };
    91
    92        /*!
    93         *  ======== packageBase ========
    94         *  The absolute path to the package's "base" directory
    95         *
    96         *  This parameter contains an absolute path to the directory
    97         *  containing the package's build script (`package.bld`). For example,
    98         *  if the package `ti.bios` is located in `c:/packages/ti/bios`, then
    99         *  `packageBase` equals `c:/packages/ti/bios/`.
   100         *
   101         *  To be robust, clients should not assume that this string ends with a
   102         *  directory separator.
   103         *
   104         *  @a(readonly)  This parameter is set when the package is first loaded
   105         *  and should not be modified by any other script.
   106         */
   107        config string packageBase;
   108
   109        /*!
   110         *  ======== packageRepository ========
   111         *  The absolute path to the repository containing the package
   112         *
   113         *  This parameter contains an absolute path to the directory
   114         *  containing the full directory namespace of the package.  For
   115         *  example, if the package `ti.bios` is located in `c:/packages/ti/bios`,
   116         *  then `packageRepository` equals `c:/packages/`.
   117         *
   118         *  To be robust, clients should not assume that this string ends with a
   119         *  directory separator.
   120         *
   121         *  @a(readonly)  This parameter is set when the package is first loaded
   122         *  and should not be modified by any other script.
   123         */
   124        config string packageRepository;
   125
   126        /*!
   127         *  ======== build ========
   128         *  The package information from the Build Object Model (BOM)
   129         *
   130         *  @a(readonly)  This parameter is set when the package is first loaded
   131         *  and should not be modified by any other script.
   132         */
   133        config BuildAttrs build;
   134
   135        /*!
   136         *  ======== profile ========
   137         *  The profile requested by a configuration script.
   138         *
   139         *  This parameter is set by configuration scripts to convey additional
   140         *  information to the package about the libraries being requested from
   141         *  this package; in particular, it names a specific profile supported by
   142         *  this package (see {@link xdc.bld.ITarget#profiles}).
   143         *
   144         *  Package `{@link #getLibs()}` functions should refer to this parameter
   145         *  in lieu of the program's `build.profile`.  This allows configuration
   146         *  scripts to selectively request debug or release libraries on a per
   147         *  package basis, for example.
   148         *
   149         *  @p(code)
   150         *  function getLibs(prog)
   151         *  {
   152         *      if (this.profile == "debug") {
   153         *          ...
   154         *      }
   155         *  }
   156         *  @p
   157         *
   158         *  If this parameter is not set by the configuration script, it is
   159         *  initialized to `{@link xdc.cfg.Program#build.profile}` prior to
   160         *  generating and configuration files; i.e., the package's
   161         *  `{@link #getLibs()}` function can assume that this field is always
   162         *  set and defaults to the profile used to build the executable.
   163         */
   164        config string profile;
   165
   166        /*!
   167         *  ======== init ========
   168         *  Initialize this package when first imported
   169         *
   170         *  This function is called to initialize the package within any
   171         *  model.  It is called just once (when the package is first imported)
   172         *  so there is no need to explicitly check for prior invocation.
   173         *
   174         *  The default implementation of this function is a nop.
   175         *
   176         *  @a(context)
   177         *  @p(dlist)
   178         *    - `this`
   179         *          The current package's `xdc.IPackage.Module` object
   180         *          before any model-specific user script runs (e.g. a program's
   181         *          configuration script),
   182         *          after the package's `package.xs` script is run and all
   183         *          the package's modules are created, and before the
   184         *          package is added to `xdc.om.$packages` (the Object Model's
   185         *          package array)
   186         *
   187         *  @a(returns) Returns nothing.
   188         *
   189         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   190         *
   191         *  @a(Note)
   192         *  This function can be called in any model, so any access to
   193         *  global variables specific to a particular object model should happen
   194         *  only if the function is called in the context of that model. For
   195         *  example, the variable `Program` is a global variable in the
   196         *  Configuration Model (`{@link xdc.cfg.Program}`). Any access to it
   197         *  should happen after a check that the current model is the
   198         *  Configuration Model:
   199         *  @p(code)
   200         *      if (xdc.om.$name == "cfg") {
   201         *          print(Program.build.target.name);
   202         *      }
   203         *  @p
   204         *  For additional information about `xdc.om`, see
   205         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_-_xdc.om xdc.om}
   206         *  in the
   207         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_Language_Reference XDCscript Language Reference}.
   208         */
   209        function init();
   210
   211        /*!
   212         *  ======== close ========
   213         *  Close this package after user scripts complete.
   214         *
   215         *  This function is called to allow the package to modify its state
   216         *  based on the results of the user's script.  It can optionally
   217         *  redefine configuration parameters or even throw exceptions to
   218         *  prevent the configuration step from completing, for example.
   219         *
   220         *  Other packages and modules, including the modules in the package, can
   221         *  change the configuration parameters of any module in the package, after
   222         *  this function was called. Therefore, this function cannot be used to
   223         *  validate state of the package and of the whole configuration.
   224         *  Validation should be done in `{@link #validate()}`.
   225         *
   226         *  For all packages A and B, if A requires B, then package A is
   227         *  closed before package B.
   228         *
   229         *  The default implementation of this function is a nop.
   230         *
   231         *  @a(context)
   232         *  @p(dlist)
   233         *    - `this`
   234         *          The current package's `xdc.IPackage.Module` object
   235         *          immediately after the program's configuration script
   236         *          has completed and before validation is started.
   237         *
   238         *  @a(returns) Returns nothing.
   239         *
   240         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   241         *
   242         *  @a(Note)
   243         *  This function can be called in any model, so any access to
   244         *  global variables specific to a particular object model should happen
   245         *  only if the function is called in the context of that model. For
   246         *  example, the variable `Program` is a global variable in the
   247         *  Configuration Model (`{@link xdc.cfg.Program}`). Any access to it
   248         *  should happen after a check that the current model is the
   249         *  Configuration Model:
   250         *  @p(code)
   251         *      if (xdc.om.$name == "cfg") {
   252         *          print(Program.build.target.name);
   253         *      }
   254         *  @p
   255         *  For additional information about `xdc.om`, see
   256         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_-_xdc.om xdc.om}
   257         *  in the
   258         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_Language_Reference XDCscript Language Reference}.
   259         */
   260        function close();
   261
   262        /*!
   263         *  ======== validate ========
   264         *  Validate this package after the model's state is "sealed".
   265         *
   266         *  This function is called to validate the package's state in the
   267         *  curent model.  It can verify semantic constraints and optionally
   268         *  throw exceptions to prevent the configuration step from completing.
   269         *
   270         *  For example, a package that needs to assert incompatibility with
   271         *  certain versions of prerequisite packages can check the versions in
   272         *  this function and throw an exception if they are known to be
   273         *  incompatible with the current package.
   274         *
   275         *  This method must not modify the model.
   276         *
   277         *  The default implementation of this function is a nop.
   278         *
   279         *  @a(context)
   280         *  @p(dlist)
   281         *    - `this`
   282         *          The current package's `xdc.IPackage.Module` object
   283         *          immediately after the program's configuration script
   284         *          has completed and before generation started.
   285         *
   286         *  @a(returns) Returns nothing.
   287         *
   288         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   289         *
   290         *  @a(Note)
   291         *  This function can be called in any model, so any access to
   292         *  global variables specific to a particular object model should happen
   293         *  only if the function is called in the context of that model. For
   294         *  example, the variable `Program` is a global variable in the
   295         *  Configuration Model (`{@link xdc.cfg.Program}`). Any access to it
   296         *  should happen after a check that the current model is the
   297         *  Configuration Model:
   298         *  @p(code)
   299         *      if (xdc.om.$name == "cfg") {
   300         *          print(Program.build.target.name);
   301         *      }
   302         *  @p
   303         *  For additional information about `xdc.om`, see
   304         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_-_xdc.om xdc.om}
   305         *  in the
   306         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_Language_Reference XDCscript Language Reference}.
   307         */
   308        function validate();
   309
   310        /*!
   311         *  ======== exit ========
   312         *  Exit this package after the model has been successfully validated.
   313         *
   314         *  The default implementation of this function is a nop.
   315         *
   316         *  @a(context)
   317         *  @p(dlist)
   318         *    - `this`
   319         *          The current package's `xdc.IPackage.Module` object
   320         *          immediately after the program's configuration script
   321         *          has completed and after generation has completed.
   322         *
   323         *  @a(returns) Returns nothing.
   324         *
   325         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   326         *
   327         *  @a(Note)
   328         *  This function can be called in any model, so any access to
   329         *  global variables specific to a particular object model should happen
   330         *  only if the function is called in the context of that model. For
   331         *  example, the variable `Program` is a global variable in the
   332         *  Configuration Model (`{@link xdc.cfg.Program}`). Any access to it
   333         *  should happen after a check that the current model is the
   334         *  Configuration Model:
   335         *  @p(code)
   336         *      if (xdc.om.$name == "cfg") {
   337         *          print(Program.build.target.name);
   338         *      }
   339         *  @p
   340         *  For additional information about `xdc.om`, see
   341         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_-_xdc.om xdc.om}
   342         *  in the
   343         *  {@link http://rtsc.eclipse.org/docs-tip/XDCscript_Language_Reference XDCscript Language Reference}.
   344         */
   345        function exit();
   346
   347        /*!
   348         *  ======== getLibs ========
   349         *  Get the libraries necessary to use this package
   350         *
   351         *  This function is called during the configuration model's generation
   352         *  phase (after a program's configuration script completes and all
   353         *  imported packages are closed) and is responsible for returning a list
   354         *  of libraries (or object files) that are needed to link the program
   355         *  being configured.
   356         *
   357         *  If the package produces one (or no) library for the target for which
   358         *  the executable is being built, the default implementation of this
   359         *  function simply returns the name of this library (or `null`).
   360         *
   361         *  If the package produces more than one library for the given target, the
   362         *  default implementation of this function returns the following library
   363         *  name:
   364         *  @p(code)
   365         *          lib/<package_name>.a<target_suffix>
   366         *  @p
   367         *  where `<package_name>` is the name of the package (e.g., "ti.bios")
   368         *  and `<target_suffix>` is the  {@link xdc.bld.ITarget#suffix} property
   369         *  of the target used to build the executable.
   370         *
   371         *  @param(prog) the configuration model program object
   372         *              (`{@link xdc.cfg.Program}`) after the program's
   373         *              configuration script has completed.
   374         *
   375         *  @a(context)
   376         *  @p(dlist)
   377         *    - `this`
   378         *          The current package's `xdc.IPackage.Module` object
   379         *          after the program's configuration script has completed.
   380         *    - `Program`
   381         *          The Configuration model program object
   382         *          (`{@link xdc.cfg.Program}`) after the program's configuration
   383         *          script has completed.
   384         *
   385         *  @a(returns) Returns a string of ';' delimited object (or library) file
   386         *              names that are added to the list of things to link to
   387         *              create the program.  The file names are absolute or
   388         *              relative to the package's base.  All white space is
   389         *              treated as part of the file name.
   390         *
   391         *              If the files named do not exist, a fatal error occurs and
   392         *              configuration terminates.  However, if the file name
   393         *              begins with a '!' character, this character is removed,
   394         *              the remaining name will be assumed to be correct, and the
   395         *              configuration will not fail just because the file does not
   396         *              (yet) exist.  This allows `getLibs()` to return the name
   397         *              of a file that will be created anytime after the
   398         *              configuration step completes.
   399         *
   400         *              If `null` or empty ("") is returned, no libraries or
   401         *              objects are required for this package.
   402         *
   403         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   404         */
   405        function getLibs(prog);
   406
   407        /*!
   408         *  ======== getSects ========
   409         *  Get package-specific linker section data.
   410         *
   411         *  This function is called during the configuration model's  generation
   412         *  phase (after a program's configuration script completes) and is
   413         *  responsible for returning a template file name that is used to
   414         *  generate package-specific linker command file statements.
   415         *
   416         *  This function is called by the linker command file template. By default,
   417         *  the template file is specified by a RTSC target's package and all such
   418         *  template files invoke `getSects()`. However, the configuration parameter
   419         *  `{@link xdc.cfg.Program#linkTemplate}` allows users to replace the
   420         *  default template with a custom template file, which may or may not
   421         *  invoke `getSects`. It is not recommended to create template files that
   422         *  don't invoke `getSects()`, but no checking is done. Therefore, it is
   423         *  possible that `getSects()` may not be called in such cases.
   424         *
   425         *  @a(context)
   426         *  @p(dlist)
   427         *    - `this`
   428         *          The current package's `xdc.IPackage.Module` object
   429         *          after the program's configuration script has completed.
   430         *
   431         *    - `Program`
   432         *          The Configuration model program object
   433         *          (`{@link xdc.cfg.Program}`) after program's configuration
   434         *          script has completed and all packages have validated the
   435         *          correctness of the configuration.
   436         *
   437         *  @a(returns) Returns the path name of template file.  The path name
   438         *              must be relative to the package path or be an absolute path.
   439         *
   440         *              If `null` is returned, no data is generated.
   441         *
   442         *              The template is evaluated in a context where the `this`
   443         *              pointer is the package object.
   444         *
   445         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   446         */
   447        function getSects();
   448    }
   449    /*
   450     *  @(#) xdc; 1, 1, 1,1; 11-21-2018 13:29:18; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   451     */
   452


package xdc

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== xdc ========
    14     *  Core interfaces and modules necessary for the XDC runtime.
    15     *
    16     *  In addition to the interfaces specified below, this package also supplies
    17     *  a C/C++ header, `std.h` that facilitates the creation of portable sources.
    18     *  This header defines a set of "base" types that enable the creation
    19     *  of C-code that is portable between any two targets.  C source code that
    20     *  relies exclusively on these types is portable to all targets and
    21     *  platforms.  Where appropriate, the types defined below are related to the
    22     *  types defined in the library headers prescribed by the C99 standard
    23     *  (ISO/IEC 9899:1999).
    24     *
    25     *  Why not simply use the C99 types?  Having a
    26     *  unique set of names provides a layer of insulation between a portable code
    27     *  base and a particular compiler; e.g., even if a compiler does not support
    28     *  the C99 types or defines them inappropriately for a particular device, it
    29     *  is possible to use the compiler without changing the code base.  Thus, the
    30     *  developer is not forced to choose the lesser of two evils: waiting for a
    31     *  change to the compiler or forking the code base for a particular compiler
    32     *  device combination.
    33     *
    34     *  There are several situations where a small separate set of portable types
    35     *  can help the maintainability of a code base.
    36     *  @p(blist)
    37     *      - not all of the types described in the C99 standard are required to
    38     *        be defined by conformant implementations nor is it possible for all
    39     *        devices to implement some of the types specified (e.g., `int8_t` is
    40     *        not implemented on C54 devices); so it is difficult to identify
    41     *        non-portable source code.
    42     *      - not all compilers provide C99 type support; if XDC supplies the type
    43     *        definition and the compiler is updated to include C99 types, a
    44     *        compilation error will occur if the source includes the C99
    45     *        headers.
    46     *      - not all compiler and device combinations are conformant; even high
    47     *        quality compilers may not properly define the types for each device
    48     *        supported by compiler.
    49     *
    50     *  @a(Usage)
    51     *  @p(code)
    52     *      #include <xdc/std.h>
    53     *  @p
    54     *
    55     *  To compile sources that include `xdc/std.h`, two symbols must be defined
    56     *  before including this header:
    57     *  @p(dlist)
    58     *      - `xdc_target_types__`
    59     *          the package qualified path of the target's standard types header;
    60     *          e.g., `ti/targets/std.h`.  This value is specified in the target's
    61     *          `stdInclude` config parameter; see
    62     *          `{@link xdc.bld.ITarget#stdInclude}`
    63     *
    64     *      - `xdc_target_name__`
    65     *          the target's module name without the package prefix; e.g., `C64`
    66     *          rather than `ti.targets.C64`.
    67     *  @p
    68     *  For example, to compile sources for the `ti.targets.C64` target using TI's
    69     *  `cl6x` compiler, the following command line is sufficient:
    70     *  @p(code)
    71     *      cl6x -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
    72     *  @p
    73     *
    74     *  Each of the type names below has an equivalent "long name"; i.e., a name
    75     *  that has an "`xdc_`" prefix.  For example, the type `Bool` can also be
    76     *  written as "`xdc_Bool`".  Long names exist to avoid conflicts with
    77     *  names defined or used by existing code bases.
    78     *
    79     *  In the event that one of the short type names below conflicts with another
    80     *  type name (that can not be changed), it is possble to disable the short
    81     *  names by defining the symbol `xdc__nolocalnames` before including
    82     *  `xdc/std.h`.
    83     *  @p(code)
    84     *      #define xdc__nolocalnames
    85     *      #include <xdc/std.h>
    86     *  @p
    87     *
    88     *  There are two other symbols that affect the definitions provided by
    89     *  `std.h`: `xdc__strict` and `xdc__deprecated_types`.  These symbols, like
    90     *  `xdc__nolocalnames`, enable you to easily control the definitions provided
    91     *  `std.h`.  In this case, however, these symbols are used to manage the
    92     *  deprecation of symbols provided in earlier releases.  For more information
    93     *  about when to use these symbols, see {@link http://rtsc.eclipse.org/docs-tip/Integrating_RTSC_Modules#Disabling_and_Enabling_Deprecated_Definitions Disabling and Enabling Deprecated Definitions}`.
    94     *
    95     *  @a(Standard Types)
    96     *  This header may be included multiple times and defines the following
    97     *  target-dependent types:
    98     *  @p(dlist)
    99     *      - `Bool`
   100     *          this type is large enough to hold the values `0` or `1`.  The
   101     *          constants TRUE and FALSE are of this type; see below.
   102     *      - `String`
   103     *          this type is defined to be a `char *` and exists to allow code
   104     *          to distinguish between pointers to buffers of raw data and
   105     *          '\0' terminated strings.
   106     *      - `CString`
   107     *          this type is defined to be a `const char *` and exists to allow
   108     *          code to distinguish between pointers to a modifiable '\0'
   109     *          terminated sequence of characters (i.e., a `String`) and one that
   110     *          is not modifiable (e.g., a literal string such as
   111     *          `"hello world\n"`).
   112     *      - `Int`n, where n = 8, 16, or 32
   113     *          signed integer type that is large enough to hold n bits; the
   114     *          actual target type may by be larger than n.  This type is
   115     *          equivalent to one of the C99 types `int_least`n`_t` or
   116     *          `int_fast`n`_t`; see  Section 7.18.
   117     *      - `UInt`n, where n = 8, 16, or 32
   118     *          unsigned integer type that is large enough to hold n bits; the
   119     *          actual target type may by be larger than n.  This type is
   120     *          equivalent to one of the C99 types `uint_least`n`_t` or
   121     *          `uint_fast`n`_t`; see ISO/IEC 9899:1999 Section 7.18.
   122     *      - `Bits`n, where n = 8, 16, or 32
   123     *          unsigned integer type that is precisely n bits. Not all targets
   124     *          support all values of n; if the target does not support an exact
   125     *          size the corresponding type is not defined.  This type is
   126     *          equivalent to the corresponding C99 type `uint`n`_t`; see ISO/IEC
   127     *          9899:1999 Section 7.18.
   128     *      - `Fxn`
   129     *          this type is a pointer to code; it can hold a pointer to any
   130     *          function.
   131     *      - `Ptr`
   132     *          this type is a pointer to data; it can hold a pointer to any
   133     *          data structure.
   134     *      - `IArg`
   135     *          this integer type is large enough to hold a `Fxn`, `Ptr`, or
   136     *          `Int`.
   137     *      - `UArg`
   138     *          this unsigned integer type is large enough to hold a `Fxn`,
   139     *          `Ptr`, or `Int`.
   140     *      - `LLong`
   141     *          this long integer type is large enough to hold a `Long` and is
   142     *          defined as a 'long long' type on targets that support this type;
   143     *          otherwise, it is simply a `Long`.
   144     *
   145     *          Note that C99 requires the `long long` type to be at least 64-bits
   146     *          wide (See ISO/IEC 9899:1999 Section 5.2.4.2.1).  But some
   147     *          compilers do not support 64-bit integral types and some don't
   148     *          support the `long long` even though they do support 64-bit
   149     *          integral types.  Since these variations limit the portability of
   150     *          valid C sources, the LLong type is always defined, is always at
   151     *          least as wide as the `Long` type, and is at least 64-bits wide for
   152     *          targets that support 64-bit integral types.
   153     *
   154     *      - `ULLong`
   155     *          this unsigned long integer type is large enough to hold a `ULong`
   156     *          and is defined as a 'unsigned long long' type on targets that
   157     *          support this type; otherwise, it is simply a `ULong`.
   158     *  @p
   159     *
   160     *  The `xdc/std.h` header also defines the following aliases for the base C
   161     *  types.  These aliases exist so that C sources can consistently follow
   162     *  a naming convention in which all type names are written in camel-case.
   163     *  @p(dlist)
   164     *      - `Char` and `UChar`
   165     *          aliases for `char` and `unsigned char`, respectively
   166     *      - `Short` and `UShort`
   167     *          aliases for `short` and `unsigned short`, respectively
   168     *      - `Int` and `UInt`
   169     *          aliases for `int` and `unsigned int`, respectively
   170     *      - `Long` and `ULong`
   171     *          aliases for `long` and `unsigned long`, respectively
   172     *      - `Double` and `LDouble`
   173     *          aliases for `double` and `long double`, respectively
   174     *      - `SizeT`
   175     *          alias for `size_t`
   176     *      - `VaList`
   177     *          alias for `va_list`
   178     *  @p
   179     *  The types above are defined for all targets.  Some targets can support
   180     *  the following additional types.  Since these types are not always
   181     *  supported by a target, these types should only be used when no other
   182     *  type sufficies.
   183     *  @p(dlist)
   184     *      - `Bits`n, where n = 8, 16, or 32
   185     *          this unsigned integer type is precisely n-bits wide.  This type is
   186     *          equivalent to the optional C99 type `uint`n`_t`; see ISO/IEC
   187     *          9899:1999 Section 7.18.1.1.  This type is defined if and
   188     *          only if the preprocessor macro `xdc__BITS`n`__` is defined.
   189     *  @p
   190     *
   191     *  @a(64 Bit Types)
   192     *  Although the C99 standard requires support for 64-bit types, not all
   193     *  compiler/device combinations can usefully support them.  As a result,
   194     *  the 64-bit types described here may not be defined for all targets.  For
   195     *  each type there is a corresponding pre-processor macro which is
   196     *  defined if and only if the type is supported.
   197     *  @p(dlist)
   198     *      - `Int64`
   199     *          signed integer type that is large enough to hold 64 bits; the
   200     *          actual target type may by be wider than 64 bits.  This type is
   201     *          equivalent to one of the C99 types `int_least64_t` or
   202     *          `int_fast64_t`; see  Section 7.18.  This type is defined if and
   203     *          only if the preprocessor macro `xdc__INT64__` is defined.
   204     *      - `UInt64`
   205     *          unsigned integer type that is large enough to hold n bits; the
   206     *          actual target type may by be wider than 64 bits.  This type is
   207     *          equivalent to one of the C99 types `uint_least64_t` or
   208     *          `uint_fast64_t`; see ISO/IEC 9899:1999 Section 7.18.  This type
   209     *          is defined if and only if the preprocessor macro
   210     *          `xdc__INT64__` is defined.
   211     *      - `Bits64`
   212     *          unsigned integer type that is precisely 64 bits wide. If the target
   213     *          does not support an exact 64-bit size, this type is not defined.
   214     *          This type is equivalent to the corresponding C99 type
   215     *          `uint64_t`; see ISO/IEC 9899:1999 Section 7.18.  This type is
   216     *          defined if and only if the preprocessor macro `xdc__BITS64__` is
   217     *          defined.
   218     *  @p
   219     *
   220     *  @a(Predefined Macros)
   221     *  In addition to the type definitions above, `xdc/std.h` also defines the
   222     *  following commonly used constants
   223     *  @p(dlist)
   224     *      - `NULL`
   225     *          defined as `0`
   226     *      - `TRUE`
   227     *          defined as `((Bool)1)`
   228     *      - `FALSE`
   229     *          defined as `((Bool)0)`
   230     *  @p
   231     *
   232     *  Finally, `xdc/std.h` defines the following target-independent symbols
   233     *  that have target-dependent values; these predefined macros enable
   234     *  conditional compilation of source files based on target-specific
   235     *  attributes.
   236     *  @p(dlist)
   237     *      - {c_target_name}
   238     *          this symbol (the target's fully qualified name with all '.'s
   239     *          replaced with '_') is always defined and allows one to easily
   240     *          include target-specific headers or define symbols with
   241     *          target-specific values.
   242     *
   243     *      - `xdc_target__isaCompatible_`{isa_name}
   244     *          for every ISA named in the array returned by this target's
   245     *          `{@link xdc.bld.ITarget#getISAChain()}` method, a symbol of this
   246     *          name is defined.  In addition to enabling one to create code
   247     *          specific to a particular ISA, this allows one to create code that
   248     *          depends on TI's C6x architecture without being dependent
   249     *          on a particular member of the C6x family, for example.
   250     *
   251     *      - `xdc_target__isa_`{isa}
   252     *          this symbol is always defined  and {isa} is the
   253     *          target's `isa` (see `{@link xdc.bld.ITarget#isa}`).
   254     *
   255     *      - `xdc_target__`{little,big}`Endian`
   256     *          if this target's `{@link xdc.bld.ITarget#model}.endian` property is
   257     *          specified, this symbol is defined and {little,big} is replaced
   258     *          by `model.endian`.
   259     *
   260     *      - `xdc_target__`{code_model_name}`Code`
   261     *          if this target's `{@link xdc.bld.ITarget#model}.codeModel` is
   262     *          specified, this symbol is defined and {code_model_name} is
   263     *          replaced by `model.codeModel`.
   264     *
   265     *      - `xdc_target__`{data_model_name}`Data`
   266     *          if this target's `{@link xdc.bld.ITarget#model}.dataModel` is
   267     *          specified, this symbol is defined and {data_model_name} is
   268     *          replaced by `model.dataModel`.
   269     *
   270     *      - `xdc_target__os_`{os_name}
   271     *          this symbol is always defined  and {os_name} is the
   272     *          target's os name (see `{@link xdc.bld.ITarget#os}`).
   273     *
   274     *      - `xdc_target__sizeof_`{type_name}
   275     *          this symbol is defined for each type name supported in the target's
   276     *          `{@link xdc.bld.ITarget#stdTypes}` structure, {type_name} is the
   277     *          name of one of the standard types supported above, and the
   278     *          value is `sizeof(type_name)`.
   279     *
   280     *      - `xdc_target__alignof_`{type_name}
   281     *          this symbol is defined for each type name supported in the target's
   282     *          `{@link xdc.bld.ITarget#stdTypes}` structure, {type_name} is the
   283     *          name of one of the standard types supported above, and the
   284     *          value is the alignment required by the compiler for {type_name}.
   285     *
   286     *      - `xdc_target__bitsPerChar`
   287     *          this symbol is always defined and specifies the number of bits
   288     *          in the target's `char`.  This value combined with the
   289     *          `xdc_target__sizeof_` values allows C code to determine the
   290     *          precise number of bits in any of the standard types.
   291     *  @p
   292     *
   293     *  @a(See)
   294     *  {@link http://www.open-std.org/jtc1/sc22/wg14/www/standards ISO-IEC JTC1-SC22-WG14 - C Approved standards}
   295     *
   296     *  @a(Throws)
   297     *  `XDCException` exceptions are thrown for fatal errors. The following
   298     *  error codes are reported in the exception message:
   299     *  @p(dlist)
   300     *      - `xdc.PACKAGE_NOT_FOUND`
   301     *           This error is reported whenever a specified package is not found
   302     *           This may happen for the following reasons:
   303     *      @p(blist)
   304     *            -  Ensure that the package in question is contained in one of
   305     *               the repositories named in the package path.
   306     *            -  The package has not been built by the `xdc` tool even though
   307     *               the physical package directory may be present along the
   308     *               package path
   309     *   @p(dlist)
   310     *     - `xdc.FILE_NOT_FOUND`
   311     *            This error is reported when a specified file is not found.
   312     *            Ensure that any directory name prefix in the name is a package
   313     *            directory contained in one of the repositories named in the
   314     *            package path.  For example, if "ti/targets/linkcmd.xdt" can't
   315     *            be found, make sure the directory `ti/targets/` is contained in
   316     *            at least one repository named in the package path.
   317     *      - `xdc.MODULE_NOT_FOUND`
   318     *            This error is reported when a specified module can't be
   319     *            found. Ensure that the package containing the module in
   320     *            question is contained in at least one repository named in
   321     *            the package path.
   322     *            Also ensure that the module name is qualified with the
   323     *            package name. For example, to refer to the module `Engine`
   324     *            in the package `ti.sdo.ce`, the module name should be
   325     *            specified as `ti.sdo.ce.Engine`.
   326     *      - `xdc.TOOL_USAGE_ERROR`
   327     *            This error may happen when the `xs` tool is not passed the
   328     *            expected command line arguments.
   329     *      - `xdc.MODULE_UNDEFINED_MAIN_FUNCTION`
   330     *            This error is reported when the `xs` tool is passed a module
   331     *            that does not define a `main` function. Ensure that the
   332     *            meta-domain implementation of the module has a `main` function.
   333     *      - `xdc.SPEC_FILE_ERROR`
   334     *            This error is reported when there is a parsing error in a
   335     *            specification file. Check the spec. file for syntax errors.
   336     *      - `xdc.DEPRECATED_FUNCTION`
   337     *            This error is reported whenever a deprecated function is called.
   338     *      - `xdc.STATIC_INSTANCE`
   339     *            This error is reported when a function create() is called at the
   340     *            configuration time for a module that does not implement the
   341     *            function instance$static$init and therefore does not support
   342     *            static instances.
   343     */
   344    package xdc [1, 1, 1] {
   345        /* base interface for all XDC packages */
   346        interface IPackage;
   347        module Warnings;
   348    }
   349    /*
   350     *  @(#) xdc; 1, 1, 1,1; 11-21-2018 13:29:18; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   351     */
   352


module xdc.Warnings

     1    /*!
     2     *  ======== Warnings ========
     3     *  Conditional warnings manager
     4     *  @nodoc
     5     *  This module declares all warnings generated by the packages in the xdc.*
     6     *  name space. Each warning is identified with an ID, a positive integer
     7     *  number. A warning message allows conversion specifiers that can be replaced
     8     *  with actual strings at the time a warning message is generated.
     9     *  The purpose of IDs is to let users find warning documentation in this module
    10     *  and also to allow warnings to be disabled based on their IDs.
    11     */
    12    metaonly module Warnings {
    13        typedef String StringArray[];
    14
    15        /*!
    16         *  ======== Warning ========
    17         *  Warning descriptor
    18         *
    19         *  Warnings are defined as instances of this structure, and also that's
    20         *  how the warnings are kept internally.
    21         */
    22        struct Warning {
    23            Int id;
    24            String msg;
    25        }
    26
    27        /*!
    28         *  ======== WarningParams ========
    29         *  Structure passed to $logWarning
    30         *
    31         *  Currently, the only parameter assigned to a warning is an array of
    32         *  strings to replace conversion specifiers in `Warning`s. In the future,
    33         *  a caller can identify a module where the warning is defined, which will
    34         *  allow any package to introduce new warnings.
    35         */
    36        struct WarningParams {
    37            Warning warning;
    38            StringArray args;
    39        }
    40
    41        /*!
    42         *  ======== LOGID ========
    43         *  Multiple Log events with the same ID
    44         *
    45         *  If two Log events share a message, they are automatically assigned
    46         *  the same ID because IDs also serve as pointers to an array that holds
    47         *  a compact representation of message strings. To avoid duplication of
    48         *  strings, if a string already exists in the array, the ID of the
    49         *  existing copy is used.
    50         *
    51         *  This warning can be useful for package producers who unintentionally
    52         *  declare two events with the same message, which could be combined
    53         *  into one common Log event.
    54         */
    55        const Warning LOGID = {
    56            id: 4,
    57            msg: "Two events with the same id: %s and %s share the msg: '%s'. You must reconfigure the message of one of these events to ensure its id will be unique."
    58        };
    59
    60        /*!
    61         *  ======== disable ========
    62         *  Internal function that disables warnings
    63         *
    64         *  @param(ids)    array of IDs
    65         */
    66        Void disable(StringArray ids);
    67
    68        /*!
    69         *  ======== getMessage ========
    70         *  Internal function that creates an actual output message
    71         *
    72         *  @param(prms)    WarningParams structure passed by the warning
    73         *                  generation code
    74         */
    75        String getMessage(WarningParams prms);
    76    }
    77    /*
    78     *  @(#) xdc; 1, 1, 1,1; 11-21-2018 13:29:18; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    79     */
    80


module xdc.bld.BuildEnvironment

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== BuildEnvironment.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== BuildEnvironment ========
    19     *  Global build environment
    20     *
    21     *  This module defines a global object (aliased as '`Build`' in build scripts)
    22     *  which is configured by a build "startup" script and read by package build
    23     *  scripts.
    24     *
    25     *  This module's configuration parameters are initialized by
    26     *  a "startup" script that is run prior to running a package's build
    27     *  script (`package.bld`).  This script (often named "`config.bld`") is
    28     *  responsible for specifying the the `{@link xdc.bld.ITarget#rootDir}`
    29     *  configuration parameter of all targets that appear in the
    30     *  `{@link #targets}` array; the `rootDir` configuration parameter specifies
    31     *  the absolute path to the installation directory of the compiler used to
    32     *  build for the specified target.  Typically one startup script is used to
    33     *  establish an environment for multiple packages.
    34     *
    35     *  Note: it does not matter if you do not have tools for all the targets
    36     *  mentioned in the startup script; if you do not build for a target,
    37     *  its setting in the startup script is irrelevant.
    38     *
    39     *  The startup script may configure this module as a function of the
    40     *  following global variables that exist before this script runs:
    41     *  @p(dlist)
    42     *    - `environment`
    43     *          a hash table of environment strings
    44     *    - `arguments`
    45     *          an array of string arguments to the `config.bld` script
    46     *          initialized as follows:
    47     *              `arguments[0]` - the file name of the `config.bld` script;
    48     *              `arguments[1]` - the first argument specified in `XDCARGS`;
    49     *                  ...;
    50     *              `arguments[n]` - the nth argument in `XDCARGS`.
    51     *    - `Build`
    52     *          an alias for this module (`xdc.bld.BuildEnvironment`)
    53     *          The following parameters of this object are initialized
    54     *          before the startup script runs:
    55     *              `hostOS`     - `{@link #HostOS}` enumeration identifier;
    56     *              `hostOSName` - "Windows", "Linux", "MacOS" or "Solaris"
    57     *    - `Pkg`
    58     *          an alias for this module (`xdc.bld.PackageContents`)
    59     *          The following parameters of this object are initialized
    60     *          before the startup script runs:
    61     *              `{@link PackageContents#name}` - the name of the current
    62     *              package;
    63     *              `{@link PackageContents#modules}` - array of module names
    64     *              supplied by this package; and
    65     *              `{@link PackageContents#interfaces}` - array of interface
    66     *              names supplied by this package
    67     *  @p
    68     *  When you build a package, the `xdc` command looks for the startup file
    69     *  using the following algorithm:
    70     *  @p(nlist)
    71     *      -   if `XDCBUILDCFG` is defined on the `xdc` command line, its value is
    72     *          used;
    73     *      -   if `config.bld` exists in the current directory, this file is used;
    74     *      -   if `XDCBUILDCFG` is defined as an environment variable, its value
    75     *          is used;
    76     *      -   if `config.bld` exists along the package path (i.e. in `$XDCPATH`
    77     *          followed by the current package's repository), the first such
    78     *          file is used;
    79     *      -   if `$XDCROOT/config.bld` exists this file is used;
    80     *      -   if `$XDCROOT/etc/config.bld` exists, this file is used; and
    81     *          finally
    82     *      -   if no "startup file" can be found above, a fatal error is
    83     *          reported and the `xdc` command terminates with a non-zero exit
    84     *          status.
    85     */
    86    metaonly module BuildEnvironment {
    87
    88        /*!
    89         *  ======== HostOS ========
    90         *  An enumeration of all supported development hosts
    91         *
    92         *  @see #hostOS
    93         */
    94        enum HostOS {
    95            WINDOWS,    /*! Win32 Intel development host */
    96            SOLARIS,    /*! SUN OS 5.x development host */
    97            LINUX,      /*! Linux development host */
    98            MACOS       /*! MacOS development host */
    99        };
   100
   101        /*!
   102         *  ======== hostOS ========
   103         *  Enumerated constant that identifies the host OS that is executing
   104         *  the build script
   105         *
   106         *  Note that host OS at the time the makefiles are created may be
   107         *  different from the host OS at the time sources are compiled!
   108         */
   109        readonly config HostOS hostOS;
   110
   111        /*!
   112         *  ======== hostOSName ========
   113         *  The name of the development host
   114         *
   115         *  One of the strings: "Windows", "Solaris", "Linux", "MacOS". This name is
   116         *  name of the host OS that is executing the package's build script.
   117         */
   118        readonly config String hostOSName;
   119
   120        /*!
   121         *  ======== useTargets ========
   122         *  The set of targets to use if the `{@link #targets}` array
   123         *  is empty
   124         *
   125         *  `useTargets` is a string of white space separated target names
   126         *  (i.e., names of modules that implement `{@link xdc.bld.ITarget}`) or
   127         *  regular expression patterns matching target names.
   128         *
   129         *  If the `Build.{@link #targets}` array is empty at the end of the
   130         *  build model's configuration script, targets specified by this string
   131         *  are added to the build model's `{@link #targets}` array.
   132         *
   133         *  In addition to module names, the distinguished string
   134         *  `"native"` is interpreted as an alias for the target
   135         *  specified by the `{@link #nativeTarget}` configuration
   136         *  parameter.
   137         *
   138         *  Special values:
   139         *  @p(dlist)
   140         *     -`undefined`
   141         *          use the environment variable `XDCTARGETS`;
   142         *     -`null`
   143         *          initialize the `{@link #targets}` array to be empty; and
   144         *     -`""`
   145         *          use all TI targets (i.e., "`ti.targets\..*`").
   146         *
   147         *  @see #excludeTargets
   148         *  @see #nativeTarget
   149         */
   150        config String useTargets;
   151
   152        /*!
   153         *  ======== excludeTargets ========
   154         *  A set of targets to exclude from the set specified by
   155         *  `{@link #useTargets}`
   156         *
   157         *  This string parameter is a single regular expression used to exclude
   158         *  targets from the set specified by `useTargets` (or `XDCTARGETS`).
   159         *
   160         *  If `{@link #targets}` is initialized by the build model's
   161         *  configuration script (i.e., has length > 0) this parameter is
   162         *  ignored.
   163         *
   164         *  If this string is `null` or `undefined`, nothing is excluded from
   165         *  list specified by `{@link #useTargets}` or the environment variable
   166         *  `XDCTARGETS`.
   167         *
   168         *  @see #useTargets
   169         *  @see #nativeTarget
   170         */
   171        config String excludeTargets;
   172
   173        /*!
   174         *  ======== targets ========
   175         *  Array of all targets that are supported for the current build
   176         *
   177         *  This array may be explicitly initialized by the build model's
   178         *  initial configuration script (by default, "`config.bld`").  For
   179         *  example, the following fragment specifies that just the
   180         *  `ti.targets.C64` target should be used:
   181         *  @p(code)
   182         *      // get the ti.targets.C64 module
   183         *      var C64 = xdc.module('ti.targets.C64');
   184         *
   185         *      // add the ti.target.C64 module to BuildEnvironment.targets array
   186         *      Build.targets[Build.targets.length++] = C64;
   187         *  @p
   188         *  Alternatively, this array can be implicitly initialized via the
   189         *  `XDCTARGETS` environment variable or the `{@link #useTargets}`
   190         *  and `{@link #excludeTargets}` strings.  The `{@link #targets}` array
   191         *  is implicitly initialized if and only if the length of this array is
   192         *  0 after the build model's configuration script completes.
   193         *
   194         *  All targets that are in this array *must* have their
   195         *  `{@link xdc.bld.ITarget#rootDir}` property set.
   196         *
   197         *  @see #excludeTargets
   198         *  @see #useTargets
   199         */
   200        config ITarget.Module targets[];
   201
   202        /*!
   203         *  ======== nativeTarget ========
   204         *  A target that defines the "native" target
   205         *
   206         *  This parameter allows build scripts to refer to the "native"
   207         *  target without explicitly naming the target.
   208         *
   209         *  For example, a `package.bld` script may add a library via:
   210         *  @p(code)
   211         *      Pkg.addLibrary("lib", Build.nativeTarget);
   212         *  @p
   213         *  In addition, it is possible to use `"native"` in `XDCTARGETS` or
   214         *  `{@link #useTargets}` to specify that
   215         *  `{@link #nativeTarget}` be added to the `{@link #targets}` array.
   216         *  Thus, it is possible to use the following command on *any* host to
   217         *  build for that host:
   218         *  @p(code)
   219         *      xdc XDCTARGETS=native
   220         *  @p
   221         *
   222         *  If this parameter is not set by the build model's configuration
   223         *  script, it is initialized to an appropriate default native target:
   224         *  @p(blist)
   225         *      - `{@link microsoft.targets.Win32}` for Windows hosts;
   226         *      - `{@link gnu.targets.Sparc}` for Solaris hosts; and
   227         *      - `{@link gnu.targets.Linux86}` for Linux hosts.
   228         *  @p
   229         */
   230        config ITarget.Module nativeTarget = null;
   231
   232        /*!
   233         *  ======== platformTable ========
   234         *  A map of platform instance names to the parameters used to
   235         *  create them
   236         *
   237         *  This map allows one to define platform instances that require
   238         *  non-default parameter settings.  It also provides a way to
   239         *  publish a set of platforms to be shared among multiple build
   240         *  scripts.
   241         *
   242         *  @a(EXAMPLES)
   243         *  The following fragment defines a platform instance named
   244         *  `"ti.platforms.sim6xxx:big"` that corresponds to a platform instance
   245         *  created by the `ti.platforms.sim6xxx.Platform` module with the
   246         *  parameters `{endian: "big"}`:
   247         *  @p(code)
   248         *    Build.platformTable["ti.platforms.sim6xxx:big"] = {endian: "big"};
   249         *  @p
   250         *
   251         *  The following fragment redefines the default platform instance for
   252         *  the platform package `ti.platforms.sim6xxx` by specifying alternative
   253         *  instance creation parameters.
   254         *  @p(code)
   255         *    Build.platformTable["ti.platforms.sim6xxx"] = {
   256         *        endian: "little", verbose: false, ftpath: "c:/ftsuite_1_5",
   257         *    };
   258         *  @p
   259         *  Some platforms are "software abastractions" that can emulate a large
   260         *  number different physical platforms.  In the example below, the
   261         *  `ti.platforms.sim6xxx` platform package is capable of simulating
   262         *  any TMS320C6xxx device.  This particular platform package uses the
   263         *  name of the instance to determine the specific device that it should
   264         *  emulate.  So, the fragment below specifies a platform instance named
   265         *  `"ti.platforms.sim6xxx:TMS320C6416"` that emulates the `TMS320C6416`
   266         *  device, in little endian mode.
   267         *  @p(code)
   268         *    Build.platformTable["ti.platforms.sim6xxx:TMS320C6416"] = {
   269         *        endian: "little"
   270         *    };
   271         *  @p
   272         *  Software platform packages, such as the `ti.platforms.generic`, can
   273         *  even go as far as emulating any device from any "catalog" of
   274         *  devices.  In this example, we use the `ti.platforms.generic`
   275         *  platform package to define an instance named
   276         *  `ti.platforms.generic:c6416` that corresponds to a platform
   277         *  containing the TMS320C6416 device specified in the `ti.catalog.c6000`
   278         *  package of devices.
   279         *  @p(code)
   280         *    Build.platformTable["ti.platforms.generic:c6416"] = {
   281         *        deviceName: "TMS320C6416",
   282         *        catalogName: "ti.catalog.c6000",
   283         *    };
   284         *  @p
   285         *  @see ti.catalog.c6000
   286         *  @see ti.platforms.generic
   287         *  @see ti.platforms.sim6xxx
   288         */
   289        config any platformTable[string] = [];
   290
   291        /*!
   292         *  ======== platforms ========
   293         *  Cache of all platform objects added via `{@link #usePlatform}`
   294         *  @_nodoc
   295         */
   296        config any platforms[string];
   297
   298        /*!
   299         *  ======== usePlatform ========
   300         *  @_nodoc
   301         *
   302         *  Instantiate the specified platform
   303         *
   304         *  The parameter `name` must contain the qualified name of a platform
   305         *  package, and may also contain a platform instance name separated from
   306         *  the package name by a ':'. Therefore, accepted names include both
   307         *  "joes.platform.foo" and "joes.platform.foo:bar", where the first name
   308         *  creates an unnamed instance of the platform `joes.platform.foo`, while
   309         *  the second name creates an instance named `bar` of the same platform.
   310         *
   311         *  @param(name)  name of platform to create
   312         *
   313         *  @a(returns)
   314         *  `usePlatform()` returns the platform instance object
   315         *  (`xdc.platform.IPlatform.Instance`) specified by `name`.
   316         *
   317         *  @a(throws)
   318         *  `XDCException` exceptions are thrown for fatal errors. The following
   319         *  error codes are reported in the exception message:
   320         *  @p(dlist)
   321         *      -  `xdc.bld.PARAMETER_MISMATCH`
   322         *      This error is reported whenever parameters with the wrong type
   323         *      are passed to the method. Ensure that the parameters passed have
   324         *      the right type.
   325         */
   326        function usePlatform(name);
   327
   328        /*!
   329         *  ======== isInTargetsArray ========
   330         *  Test whether a target is in of the `targets` array
   331         *
   332         *  @_nodoc
   333         *
   334         *  @param(target)  `xdc.bld.ITarget` target object to test
   335         */
   336        Bool isInTargetsArray(ITarget.Module target);
   337
   338        /*!
   339         *  ======== printBuildTargets ========
   340         *  @_nodoc
   341         */
   342        String printBuildTargets();
   343
   344        /*!
   345         *  ======== onInit ========
   346         *  @_nodoc this function is called from the `xdc.bld` package's
   347         *          initialization function to initialize this module.
   348         */
   349        function onInit();
   350
   351        /*!
   352         *  ======== getReleaseDescs ========
   353         *  Return a description of all releases for the specified package
   354         *
   355         *  This function allows a "package of packages" to select appropriate
   356         *  releases from another package based on information provided by that
   357         *  package.
   358         *
   359         *  @param(pname)   name of the package to get the release
   360         *                  information from
   361         *
   362         *  @a(returns)     array of `{@link xdc.bld.Release#Desc}`
   363         *                  structures that describe the releases specified
   364         *                  by `pname`'s build script
   365         *
   366         *  @a(throws)      `XDCException` exceptions are thrown for fatal
   367         *                   errors. The following error codes are
   368         *                   reported in the exception message:
   369         *                   @p(dlist)
   370         *                   - `xdc.bld.PACKAGE_NOT_BUILT`
   371         *                      This error is reported when a consumer tries to
   372         *                      use a package that has not been built. Ensure that
   373         *                      the required package has been built by `XDCtools`.
   374         *                   -  `xdc.bld.INVALID_PACKAGE`
   375         *                      This error is reported when a consumer tries to
   376         *                      use a corrupted package. Try rebuilding the
   377         *                      package causing the problem.
   378         *
   379         *  @see xdc.bld.Release#Desc
   380         */
   381        Release.DescArray getReleaseDescs(String pname);
   382
   383        /*!
   384         *  ======== initializeModel ========
   385         *  @_nodoc
   386         *  Initialize the build model
   387         *
   388         *  @param(args)    - an array of arguments whose first element is
   389         *                    the path to a config.bld script and subsequent
   390         *                    arguments are the argument (usually) specified
   391         *                    by `XDCARGS`.
   392         */
   393        function initializeModel(args);
   394    }
   395    /*
   396     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   397     */
   398


module xdc.bld.Executable

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== Executable.xdc ========
    15     */
    16    package xdc.bld;
    17
    18    /*!
    19     *  ======== Executable ========
    20     *  Model of a file that can be loaded and executed on a platform.
    21     *
    22     *  Executable instances represent executable files.  Instances must be
    23     *  created via the `{@link xdc.bld.PackageContents#addExecutable()}`
    24     *  function; this ensures that each executable created appears in the
    25     *  package's manifest and that it properly "inherits" appropriate default
    26     *  attributes from the containing package.
    27     */
    28    metaonly module Executable {
    29
    30        /*!
    31         *  ======== Attrs ========
    32         *  Optional attributes for an Executable instance.
    33         *
    34         *  Unspecified attributes are "inherited" from
    35         *  `{@link xdc.bld.PackageContents#attrs}`;
    36         *  i.e., if one of fields in this structure is unspecified *and* this
    37         *  field's name matches a field name in
    38         *  `{@link xdc.bld.PackageContents#attrs}`, then this field's value
    39         *  defaults to the value in specified by
    40         *  `{@link xdc.bld.PackageContents#attrs}`.  This mechanism makes it
    41         *  possible to establish package-wide default values for any of the
    42         *  "inherited" attributes.
    43         *
    44         *  Suppose, for example, that you want all executable files in this
    45         *  package to be built with the 'release' profile, but one particular file
    46         *  must be built with 'debug' (because it is a source example).  The
    47         *  following build script fragment shows how this can be accomplished:
    48         *  @p(code)
    49         *      Pkg.attrs.profile = 'release';
    50         *      var exe = Pkg.addExecutable('example', ..., {profile: 'debug'});
    51         *  @p
    52         *  @field(cfgArgs) This string may contain any expression that can be
    53         *          assigned to a JavaScript property.  It is evaluated in
    54         *          the configuration domain after the platform package is
    55         *          imported and just prior to running the executable's
    56         *          configuration script.  Its value (after evaluation) is
    57         *          assigned to `Program.build.cfgArgs`; so, program
    58         *          configuration scripts can use this property to adjust their
    59         *          behavior based on values specified in a build script.
    60         *
    61         *          For example, a package's build script might build an
    62         *          executable for each possible level of a "trace" value:
    63         *          @p(code)
    64         *              for (t = 0; t < NUM_TRACE_LEVELS; t++) {
    65         *                      :
    66         *                  Pkg.addExecutable("myExe" + t, targ, plat, {
    67         *                      cfgArgs:   "{traceLevel: " + t + "}",
    68         *                      cfgScript: "myExe.cfg"
    69         *                  });
    70         *              }
    71         *          @p
    72         *
    73         *          In this case, the configuration script `myExe.cfg` can
    74         *          reference the "trace level" set in the build script by
    75         *          referencing the `Program.build.cfgArgs` object directly:
    76         *          @p(code)
    77         *              if (Program.build.cfgArgs.traceLevel == 1) {
    78         *                  :
    79         *              }
    80         *          @p
    81         *
    82         *  @field(cfgArgsEncoded) This boolean flag indicates whether the
    83         *  string `cfgArgs` should be treated as an encoded string (via ECMA-262
    84         *  `escape()`) or not.  If this field is `true`, the string is treated
    85         *  as an encoded string and is decoded via `unescape()` prior to
    86         *  interpretation.
    87         *
    88         *  @field(incs)  This string contains include path options used by
    89         *          the compiler (or assembler) to locate include files; e.g.,
    90         *          "-I ../../include -I ../c55xx".  Note that the syntax of
    91         *          this string may be target dependent.
    92         *
    93         *  @field(defs)  This string contains options used by the
    94         *          compiler (or assembler) to define macros; e.g.,
    95         *          "-D_C6xxx -DDEBUG=1".  Note that the syntax of
    96         *          this string may be target dependent.
    97         *
    98         *  @field(aopts)  This string contains options used by the assembler
    99         *          to produce object files; e.g., "-mP1".  Note that the syntax
   100         *          of this string may be target dependent.
   101         *
   102         *  @field(copts)  This string contains options used by the C/C++
   103         *          compiler to produce object files; e.g., "-o3 -mi1".  Note
   104         *          that the syntax of this string may be target dependent.
   105         *
   106         *  @field(cfgcopts)  This string contains options used by the C/C++
   107         *          compiler to compile the generated C config file. If `cfgcopts`
   108         *          is not specified, either explicitly or through
   109         *          `Pkg.attrs.cfgcopts`, the options specified in `copts` are
   110         *          used instead.
   111         *
   112         *  @field(lopts)  This string contains options used by the linker
   113         *          produce object files; e.g., "-l mylib.lib".  Note
   114         *          that the syntax of this string may be target dependent.
   115         *
   116         *  @field(xsopts)  This string contains options passed to the
   117         *          `{@link http://rtsc.eclipse.org/docs-tip/Command_-_xs xs}`
   118         *          command that's used to run configuration scripts.  This option
   119         *          can be used, for example, to define name-value pairs accessible
   120         *          to configuration scripts via the XDCscript global
   121         *          `environment` hash-table.  For example, setting `xsopts` to
   122         *          `"-DFOO=bar"` enables the configuration script to get the
   123         *          value of `FOO` via the expression `environment["FOO"]`.  For
   124         *          more information about XDCscript and `environment` see
   125         *          {@link http://rtsc.eclipse.org/docs-tip/The_XDCscript_Language The XDCscript Language}.
   126         *
   127         *  @field(cfgHome)  This string names the package that is bound to
   128         *          the Configuration Model's `$homepkg`.  This home package
   129         *          is automatically loaded as part of configuration and, as
   130         *          a result, may contribute libraries to the configuration.
   131         *
   132         *          If this parameter is not specified, the package containing
   133         *          the configuration script is used as the home package.  This
   134         *          ensures that the results of a configuration script are
   135         *          independent of the package building the configuration.  In
   136         *          most cases, the build package is the package containing the
   137         *          configuration script and this distinction is not important.
   138         *          But there are times when it is important to control the home
   139         *          package; e.g., when an external tool generates a
   140         *          configuration script from information supplied by another
   141         *          package or when a configuration script in not in any package.
   142         *
   143         *  @field(cfgScript)  This string names the program configuration
   144         *          script used to create the files necessary to create the
   145         *          executable.  If `cfgScript` is not specified, the configuration
   146         *          script is assumed to be `<name>.cfg`, where `<name>` is the
   147         *          base name of the executable.  If `cfgScript` is set to `null`,
   148         *          the executable is assumed to be a "legacy" application that
   149         *          defines `main()` directly and does not require any
   150         *          `{@link xdc.runtime}` support.
   151         *
   152         *          If this string is set to a non-`null` value, and does not have
   153         *          an extension, then the extension `".cfg"` is automatically
   154         *          added.
   155         *
   156         *          If the specified configuration file does not exist in the
   157         *          package where the executable is being built and
   158         *          the name does not begin with `"./"`, it is searched
   159         *          for along the package path.  Thus, it is possible to use
   160         *          configuration scripts in other packages to build executables;
   161         *          e.g., to use the configuration script "myExe.cfg" from a
   162         *          `ti.bios.examples.hello` package, `cfgScript` should be set
   163         *          to `"ti/bios/examples/hello/myExe.cfg"`.
   164         *
   165         *          The package containing the specified configuration script is
   166         *          imported prior to running the configuration script and this
   167         *          package is used to set `xdc.$homepkg`; thus, configuration
   168         *          scripts that use `xdc.$homepkg` will configure the same
   169         *          executable independent of the package building the executable.
   170         *
   171         *  @field(profile)  This string names a profile defined by the
   172         *          executable's target.  The profile specifies a set of compiler,
   173         *          linker, and archiver options that are to be used when
   174         *          producing the executable.  Note that these tool options are
   175         *          in addition to any options specified via `aopts`, `copts`,
   176         *          etc.
   177         *
   178         *          If this field is not set or set to `null`, the value of
   179         *          `{@link xdc.bld.PackageContents#attrs.profile}` is used.  If
   180         *          `{@link xdc.bld.PackageContents#attrs.profile}` is not
   181         *          specified or equal to `null`, the `"release"` profile is used.
   182         *
   183         *  @field(cpuId)  This string is used to uniquely identify the
   184         *          particular CPU on a platform that will run the executable; on
   185         *          platforms that contain a single CPU, this string is ignored.
   186         *
   187         *  @field(rtsName)  This string names a package that contributes a
   188         *          compiled form of the `{@link xdc.runtime}` runtime support
   189         *          modules.
   190         *
   191         *          This package is implicitly loaded prior to running the
   192         *          executable's configuration script.  If this field is set to
   193         *          `null`, no package will be pre-loaded.  If this field is not
   194         *          set (or set to `undefined`), the package specified by this
   195         *          executable's target will be used (see
   196         *          {@link xdc.bld.ITarget#rts}) .
   197         *
   198         *  @field(cpuArgs)  This field is a hash-table of name-value pairs
   199         *          interpreted by the CPU as register settings that exist at the
   200         *          time that the executable is loaded; e.g., it is possible to
   201         *          specify a non-reset value for the `PMST` register on a C54xx
   202         *          CPU by setting this parameter to `{PMST: 0xffff}`.
   203         *
   204         *  @field(exportCfg)  If this field is set to true, the configuration
   205         *          script will be part of the releases named in the releases
   206         *          array.  If it is unspecified (or set to `null`) and the
   207         *          release specifies that configurations are to be exported,
   208         *          the configuration script will be part of the release.  In
   209         *          all other cases, the configuration is not part of the
   210         *          release.
   211         *
   212         *  @field(exportSrc)  If this field is set to true, the sources
   213         *          specified via `{@link xdc.bld.Executable#addObjects()}`
   214         *          will be part of the releases named in the releases
   215         *          array.  If it is unspecified (or set to `null`) and the
   216         *          release specifies that sources are to be exported,
   217         *          the sources will be part of the release.  In
   218         *          all other cases, the sources are not added to the
   219         *          release.
   220         *
   221         *  @field(exportExe)  If this field is set to true, the executable
   222         *          will be part of the releases named in the releases
   223         *          array.  If it is unspecified (or set to `null`) and the
   224         *          release specifies that configurations are to be exported,
   225         *          the executable will be part of the release.  In
   226         *          all other cases, the executable is not part of the
   227         *          release.
   228         *
   229         *  @field(releases)  This array contains releases that will contain the
   230         *          executable.  Thus, a single executable can be part of any set
   231         *          of releases.  Each executable is always added to the
   232         *          package's "default release" in addition to any releases
   233         *          specified in the releases array.
   234         *
   235         *  @field(test) If this field is set, it defines default attributes for
   236         *          tests added to this executable, including the implicitly
   237         *          added test (see {@link xdc.bld.PackageContents#addExecutable}).
   238         *
   239         *  @field(linkTemplate) If this field is set, it defines the linker
   240         *          command file template to be used to link this executable.
   241         *          This specification may, however, be overridden by the
   242         *          configuration script (see
   243         *          {@link xdc.cfg.Program#linkTemplate}).
   244         *
   245         *          As with configuration scripts, if the specified file does not
   246         *          exist in the package where the executable is being built and
   247         *          the name does not begin with `"./"`, it is searched for along
   248         *          the package path.  Thus, it is possible to use templates in
   249         *          other packages to build executables; e.g., to use the linker
   250         *          command file "`myExe.cmd`" from the `ti.bios.examples.hello`
   251         *          package, `linkTemplate` should be set to
   252         *          `"ti/bios/examples/hello/myExe.cmd"`.
   253         *
   254         *  @see #attrs
   255         *  @see xdc.bld.PackageContents#Attrs
   256         */
   257        struct Attrs {
   258            String  profile;        /*! target options profile */
   259            String  aopts;          /*! asm options for objs added to this exe */
   260            String  copts;          /*! C/C++ options for objs added to this exe */
   261            String  cfgcopts;       /*! C/C++ options for the C config file */
   262            String  defs;           /*! definitions for objs added to this exe */
   263            String  incs;           /*! include opts for objs added to this exe */
   264            String  lopts;          /*! linker options for this exe */
   265            String  xsopts;         /*! `xs` options for this exe */
   266            String  cpuId;          /*! optional id of CPU on platform */
   267            String  rtsName;        /*! optional run time support package name */
   268            any     cpuArgs;        /*! optional register settings */
   269            String  sharedCfg;
   270            String  cfgScript;      /*! optional name of config script */
   271            String  cfgHome;        /*! optional home package of config model */
   272            String  cfgArgs;        /*! optional arguments passed to cfgScript */
   273            Bool    cfgArgsEncoded; /*! if true, cfgArgs is encoded via escape() */
   274            Bool    exportExe;      /*! export executable's exe file? */
   275            Bool    exportCfg;      /*! export executable's config script? */
   276            Bool    exportSrc;      /*! if true, export exe sources to releases */
   277            Release.Instance releases[]; /*! releases that this exe is a part of */
   278            Test.Attrs  test;       /*! test attrs for tests added to this exe */
   279            String  linkTemplate;   /*! linker command file template for this exe*/
   280        };
   281
   282    instance:
   283        /*!
   284         *  ======== create ========
   285         *  @_nodoc
   286         *  Instances should only be created via PackageContents.addExecutable()
   287         */
   288        create();
   289
   290        /*!
   291         *  ======== name ========
   292         *  Base name of the executable.
   293         *
   294         *  This name is used to construct the final executable file name as
   295         *  follows:
   296         *  @p(code)
   297         *      <name>.x<target_suffix>
   298         *  @p
   299         *  where `<name>` is name and `<target_suffix>` is the suffix defined
   300         *  by each target that the file is built for. See NOTE in
   301         * `{@link xdc.bld}` for filename rules.
   302         *
   303         *  Note: if the same executable is to be built for different platforms
   304         *  (having the same target), then name must "encode" the platform's
   305         *  name.
   306         */
   307        config String name;
   308
   309        /*!
   310         *  ======== platform ========
   311         *  The name of the platform that will run this executable.
   312         *
   313         *  Platforms are modeled as packages that have a module called
   314         *  "Platform"; thus the platform name is really a package name.
   315         */
   316        config String platform;
   317
   318        /*!
   319         *  ======== target ========
   320         *  The target (on a platform) that executable should be built for.
   321         *
   322         *  This parameter is used to determine the target to use for any
   323         *  objects added to the executable.
   324         *
   325         *  During configuration, the executable's platform package can
   326         *  validate that the target is compatible with the configuration of
   327         *  the platform; the target object is accessible via the expression
   328         *  `Program.build.target`.
   329         */
   330        config ITarget.Module target;
   331
   332        /*!
   333         *  ======== attrs ========
   334         *  This executable's optional attributes.
   335         *
   336         *  These attributes are "inherited" by all objects added to this
   337         *  executable; i.e., any object attribute that is undefined but is
   338         *  defined here will be assigned the value from these attributes.
   339         *
   340         *  Similarly, any unspecified attributes that also appear in
   341         *  `{@link xdc.bld.PackageContents#Attrs}` are inherited from
   342         *  `{@link xdc.bld.PackageContents#attrs}`.
   343         *
   344         *  @see xdc.bld.PackageContents#Attrs
   345         */
   346        config Executable.Attrs attrs;
   347
   348        /*!
   349         *  ======== addObjects ========
   350         *  Add specified object to be built and linked into this executable.
   351         *
   352         *  All objects added to the executable are built with the symbol
   353         *  `xdc_cfg__header__` defined to be the name of the executable-specific
   354         *  C header generated by the program configuration tool.  This symbol
   355         *  is used by the `xdc/cfg/global.h` header to include the generated
   356         *  header file; see `{@link xdc.cfg.Program#global}`.  Thus, it is
   357         *  possible to portably include configuration specific definitions in a
   358         *  source file that is used in many different configurations.
   359         *
   360         *  For example, a portable `main.c` might be structured as follows:
   361         *  @p(code)
   362         *      #include <xdc/std.h>
   363         *      #include <ti/bios/include/log.h>
   364         *
   365         *      #include <xdc/cfg/global.h>    // include declaration of trace
   366         *
   367         *      int main(int argc, char *argv[])
   368         *      {
   369         *          LOG_printf(trace, "hello world");
   370         *              :
   371         *      }
   372         *  @p
   373         *
   374         *  @a(Examples)
   375         *
   376         *      1. Locate a source file whose name starts with "hello" with
   377         *      an extension supported by the executable's target, compile it
   378         *      and link it into the executable `myExe`:
   379         *      @p(code)
   380         *          myExe.addObjects(["hello"]);
   381         *      @p
   382         *      If hello.c exists, compile and add to `myExe`, if hello.asm exists
   383         *      assemble and add to `myExe`, etc.  If no such file is located,
   384         *      a warning is emitted.
   385         *
   386         *      2. Compile hello.c and add to the executable `myExe`:
   387         *      @p(code)
   388         *          myExe.addObjects(["hello.c"]);
   389         *      @p
   390         *      3. Names may include sub-directory prefixes.  In this case, the
   391         *      source will be located in a sub-directory of the current
   392         *      package.  The following statement declares that the file
   393         *      "`foo/hello.c`" should be compiled and linked into the executable
   394         *      `myExe`:
   395         *      @p(code)
   396         *          myExe.addObjects(["foo/hello.c"]);
   397         *      @p
   398         *      As in the previous examples, the extension ".c" is optional.
   399         *      In case an extension is not supplied, each extension
   400         *      understood by the target will be tried until a source file
   401         *      is located.
   402         *
   403         *      4. It is also possible to supply file specific compilation
   404         *      options.
   405         *      @p(code)
   406         *          myExe.addObjects(["fir.c", "iir.c"], {defs: "-D_DEBUG"});
   407         *      @p
   408         *      In this case, both files fir.c and iir.c will be compiled
   409         *      with the "`-D_DEBUG`" flag.  Any setting of `attrs.defs` in the
   410         *      executable or package is overridden by this definition.
   411         *
   412         *  @param(names)       array of base names of the sources of object files
   413         *                      to be created and linked into the executable.
   414         *                      See NOTE in `{@link xdc.bld}` for filename rules.
   415         *  @param(objAttrs)    optional `{@link xdc.bld.Object#Attrs}` for the
   416         *                      array of objects added; all objects named by names
   417         *                      will be given the attributes `objAttrs`.
   418         *  @a(returns)         `void`
   419         *
   420         *  @a(throws)          `Error` exceptions are thrown for fatal errors
   421         *
   422         *  @see xdc.cfg.Program#global
   423         */
   424        Void addObjects(String names[], Object.Attrs objAttrs = {});
   425
   426        /*!
   427         *  ======== addTest ========
   428         *  Add specified test to executable.
   429         *
   430         *  A test encapsulates an executable and a set of arguments passed to
   431         *  the executable when it is run.
   432         *
   433         *  Tests are run by naming the goal "`<test_name>.test`" on the xdc
   434         *  command line; `<test_name>` is the test's name.
   435         *
   436         *  Multiple tests may have the same name; in this case, it is possible
   437         *  to run all tests using the single goal "`<test_name>.test`"
   438         *
   439         *  @param(testAttrs)   test attrs object (`{@link xdc.bld.Test#Attrs}`)
   440         *
   441         *  @a(returns)         the `{@link xdc.bld.Test}` instance object created
   442         *
   443         *  @a(throws)          `Error` exceptions are thrown for fatal errors
   444         */
   445        Test.Instance addTest(Test.Attrs testAttrs);
   446    }
   447    /*
   448     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   449     */
   450


interface xdc.bld.ITarget2

     1    /*
     2     *  Copyright (c) 2009 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ITarget2.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== ITarget2 ========
    19     *  Extension of the interface {@link xdc.bld.ITarget}.
    20     *
    21     *  This interface contains some common structures and config parameters
    22     *  shared by several packages that contain targets.
    23     */
    24    metaonly interface ITarget2 inherits ITarget {
    25
    26        /*!
    27         *  ======== Command ========
    28         *  Required command and options.
    29         *
    30         *  The compile, link, and archive functions in this interface are
    31         *  implemented by expanding the strings specified in this structure
    32         *  and inserting strings from the Options structure to form a single
    33         *  command.  The strings in this structure can not be changed by
    34         *  the user (they are fixed by the target), but the string in the
    35         *  Options structure may be changed by the user.
    36         *
    37         *  The final command is:
    38         *      Command.cmd Options.prefix Command.opts Options.suffix
    39         *
    40         *  @field(cmd)     name of a tool-chain executable without any path
    41         *                  information.  The location of this executable is
    42         *                  specified by the binDir (or pathPrefix)
    43         *                  configuration parameter.
    44         *
    45         *  @field(opts)    required options passed to the command; these options
    46         *                  can not be changed or eliminated by user's
    47         *                  configuration script.
    48         */
    49        struct Command {
    50            string cmd;     /*! the command to run */
    51            string opts;    /*! required options for the command */
    52        }
    53
    54        /*!
    55         *  ======== Options ========
    56         *  User configurable command options.
    57         *
    58         *  The option strings allow the user to pass additional parameters to the
    59         *  executable that is responsible for compiling, linker, or archiving.
    60         *  See `{@link #Command xdc.bld.ITarget2.Command}`.
    61         */
    62        struct Options {
    63            string prefix;  /*! options that appear before Command.opts */
    64            string suffix;  /*! options that appear after Command.opts */
    65        }
    66
    67        /*!
    68         *  ======== ar ========
    69         *  The command used to create an archive
    70         */
    71        readonly config Command ar;
    72
    73        /*!
    74         *  ======== arOpts ========
    75         *  User configurable archiver options.
    76         */
    77        config Options arOpts = {
    78            prefix: "",
    79            suffix: ""
    80        };
    81
    82        /*!
    83         *  ======== lnk ========
    84         *  The command used to link executables.
    85         */
    86        readonly config Command lnk;
    87
    88        /*!
    89         *  ======== lnkOpts ========
    90         *  User configurable linker options.
    91         */
    92        config Options lnkOpts = {
    93            prefix: "",
    94            suffix: ""
    95        };
    96
    97        /*!
    98         *  ======== cc ========
    99         *  The command used to compile C/C++ source files into object files
   100         */
   101        readonly config Command cc;
   102
   103        /*!
   104         *  ======== ccOpts ========
   105         *  User configurable compiler options.
   106         */
   107        config Options ccOpts = {
   108            prefix: "",
   109            suffix: ""
   110        };
   111
   112        /*!
   113         *  ======== ccConfigOpts ========
   114         *  User configurable compiler options for the generated config C file.
   115         *
   116         *  By default, this parameter inherits values specified in
   117         *  `{@link #ccOpts ccOpts}`.  The strings `"$(ccOpts.prefix)"` and
   118         *  `"$(ccOpts.suffix)"` are expanded into the values specified by
   119         *  `{@link #ccOpts ccOpts}` for this target.
   120         */
   121        config Options ccConfigOpts = {
   122            prefix: "$(ccOpts.prefix)",
   123            suffix: "$(ccOpts.suffix)"
   124        };
   125
   126        /*!
   127         *  ======== asm ========
   128         *  The command used to assembles assembly source files into object files
   129         */
   130        readonly config Command asm;
   131
   132        /*!
   133         *  ======== asmOpts ========
   134         *  User configurable assembler options.
   135         */
   136        config Options asmOpts = {
   137            prefix: "",
   138            suffix: ""
   139        };
   140
   141        /*!
   142         *  ======== includeOpts ========
   143         *  Additional user configurable target-specific include path options
   144         */
   145        config string includeOpts;
   146
   147        /*!
   148         *  ======== genConstCustom ========
   149         *  Return any custom generated code related to generated constants
   150         *
   151         *  This function is invoked for each constant in the generated config C
   152         *  file. This includes module-level config parameter, as well as the
   153         *  internal data structures that define modules, interfaces and instances.
   154         *  A target is given a chance to add any target-specific pragmas or
   155         *  attributes for the generated constants. The set of the data supplied to
   156         *  this function overlaps with the data supplied to
   157         *  `{@link genVisibleData genVisibleData}`, so their output must be
   158         *  coordinated to avoid duplicate or inconsistent definitions or
   159         *  directives.
   160         *
   161         *  @params(names)  array of constant names generated in the
   162         *                  config C file
   163         *
   164         *  @params(types)  array of types; each type corresponds to the element
   165         *                  of `names` with the same index
   166         *
   167         *  @a(returns)
   168         *  This function returns custom C code that will be embedded into the
   169         *  generated config C file. If there is nothing to be added, this function
   170         *  returns `null`. If a target never generates any such code, it can rely
   171         *  on the default implementation that always returns `null`.
   172         */
   173        String genConstCustom(StringArray names, StringArray types);
   174
   175        /*!
   176         *  ======== genVisibleData ========
   177         *  Return any custom generated code related to data generated in the
   178         *  config C file
   179         *
   180         *  This function is invoked for each module-level configuration parameter
   181         *  in the configuration. Such parameters are represented by constants in the
   182         *  generated config C file.
   183
   184         *  A target is given a chance to add any target-specific pragmas or
   185         *  attributes for the generated constants. The set of the data supplied to
   186         *  this function overlaps with the data supplied to
   187         *  `{@link genConstCustom genConstCustom}`, so their output must be
   188         *  coordinated to avoid duplicate or inconsistent definitions or
   189         *  directives.
   190         *
   191         *  @params(quals)          array of declaration qualifiers for the
   192         *                          generated data
   193         *
   194         *  @params(types)          array of types for the generated data
   195         *
   196         *  @params(names)          array of variable names; each name corresponds
   197         *                          to the elements of `quals` and `types` with the
   198         *                          same index
   199         *
   200         *  @a(returns)
   201         *  This function returns custom C code that will be embedded into the
   202         *  generated config C file. The purpose of the function is to allow
   203         *  targets to add pragmas or attributes to prevent elimination of data
   204         *  in case of partially linker objects.
   205         *  If there is nothing to be added, this function returns `null`. If a
   206         *  target never generates any such code, it can rely on the default
   207         *  implementation that always returns `null`.
   208         */
   209        String genVisibleData(StringArray quals, StringArray types,
   210                              StringArray names);
   211        /*!
   212         *  ======== genVisibleFxns ========
   213         *  Return any custom generated code related to functions generated in
   214         *  the config C file
   215         *
   216         *  @params(types)          array of types of functions' return values
   217         *
   218         *  @params(names)          array of functions' names; each name corresponds
   219         *                          to the elements of `types` and `args` with the
   220         *                          same index
   221         *
   222         *  @params(args)           array of functions' argument lists, including
   223         *                          qualifiers
   224
   225         *  @a(returns)
   226         *  This function returns custom C code that will be embedded into the
   227         *  generated config C file. The purpose of the function is to allow
   228         *  targets to add pragmas or attributes to prevent elimination of functions
   229         *  in case of partially linker objects.
   230         */
   231        String genVisibleFxns(StringArray types, StringArray names,
   232                              StringArray args);
   233
   234        /*!
   235         *  ======== genVisibleLibFxns ========
   236         *  Return any custom generated code related to functions that are included
   237         *  in the configuration, but are not generated in the config C file
   238         *
   239         *  @params(types)          array of types of functions' return values
   240         *
   241         *  @params(names)          array of functions' names; each name corresponds
   242         *                          to the elements of `types` and `args` with the
   243         *                          same index
   244         *
   245         *  @params(args)           array of functions' argument lists, including
   246         *                          qualifiers
   247
   248         *  @a(returns)
   249         *  This function returns custom C code that will be embedded into the
   250         *  generated config C file. The purpose of the function is to allow
   251         *  targets to add pragmas or attributes to prevent elimination of functions
   252         *  in case of partially linker objects. These functions are managed
   253         *  separately from the functions that are generated in the config C file
   254         *  because some pragmas and attributes can be used only for functions
   255         *  defined in the same compilation unit where the paragmas and attributes
   256         *  are generated. For functions that are not generated in the config C
   257         *  file, and the mentioned restrictions exist, targets may have to create
   258         *  references that will prevent elimination of functions defined outside
   259         *  of the config C file.
   260         */
   261        String genVisibleLibFxns(StringArray types, StringArray names,
   262                                 StringArray args);
   263    }
   264    /*
   265     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   266     */
   267


interface xdc.bld.ITarget3

     1    /*
     2     *  Copyright (c) 2009 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ITarget3.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== ITarget3 ========
    19     *  Extension of the interface {@link xdc.bld.ITarget3}.
    20     *
    21     *  This interface contains some common structures and config parameters
    22     *  shared by several packages that contain targets.
    23     */
    24    metaonly interface ITarget3 inherits ITarget2 {
    25        /*!
    26         *  ======== rawVersion ========
    27         *  The raw version string from the compiler
    28         *
    29         *  @a(Readonly) This value is automatically computed by the XDC Build
    30         *  Engine by executing the `{@link #getRawVersion()}` function after
    31         *  `package.bld` completes but prior to generating `package.mak`.
    32         */
    33        config String rawVersion;
    34
    35        /*!
    36         *  ======== getRawVersion ========
    37         *  Get a target-specific raw compiler version string
    38         *
    39         *  This function is called during makefile generation to obtain a
    40         *  target-specific raw compiler version string.
    41         *
    42         *  @a(returns)
    43         *  This function returns a string, typically provided by the compiler
    44         *  itself, that identifies the version of the compiler referenced by
    45         *  `{@link #rootDir}`.
    46         *
    47         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
    48         */
    49        String getRawVersion();
    50    }
    51
    52    /*
    53     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    54     */
    55


interface xdc.bld.ITarget

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ITarget.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== ITarget ========
    19     *  The interface between code generation tool-chains and the XDC Build
    20     *  Engine.
    21     *
    22     *  This interface defines an abstract interface that must be supported by
    23     *  a compiler tool-chain in order to be used in an XDC build environment.
    24     *  This interface allows the XDC Build engine to treat all compiler tool
    25     *  chains uniformly; thus, it is possible to add support for a new compiler
    26     *  without making *any* changes to the build engine.
    27     */
    28    metaonly interface ITarget {
    29
    30        /*!
    31         *  ======== Model ========
    32         *  Target runtime model.
    33         *
    34         *  @field(`endian`)    this string specifies the endianess of the
    35         *                      generated code.  Valid values include:
    36         *                      @p(dlist)
    37         *                          - `"big"`
    38         *                              big endian
    39         *                          - `"little"`
    40         *                              little endian
    41         *                          - `null`
    42         *                              unspecified
    43         *                      @p
    44         *
    45         *  @field(`codeModel`) this string specifies a target-specific code size
    46         *                      model.  Valid values include:
    47         *                      @p(dlist)
    48         *                          - `"near"`
    49         *                              C54 near mode
    50         *                          - `"far"`
    51         *                              C54 far mode
    52         *                          - `undefined`
    53         *                              unspecified
    54         *                      @p
    55         *
    56         *  @field(`dataModel`) this string specifies a target-specific data size
    57         *                      model.  Valid values include:
    58         *                      @p(dlist)
    59         *                          - `"large"`
    60         *                              C55, C28 large model
    61         *                          - `undefined`
    62         *                              unspecified
    63         *                      @p
    64         *
    65         *  @field(`shortEnums`) this flag specifies if a target fits the values
    66         *                      of an enumeration into the smallest integer type
    67         *                      that can accept all values. If that is the case,
    68         *                      this flag must be set to `true`. If all values are
    69         *                      the size of an Int, this flag can be either set
    70         *                      to `false` or left unspecified.
    71         * @see #model
    72         */
    73        struct Model {
    74            String endian;      /*! endian-ness of this target */
    75            String codeModel;   /*! target-specific code model */
    76            String dataModel;   /*! target-specific data model */
    77            Bool   shortEnums;  /*! if true, enums are packed into smallest integral type */
    78        }
    79
    80        /*!
    81         *  ======== name ========
    82         *  Nickname for this target.
    83         *
    84         *  This name is typically the name of the module without the package
    85         *  name prefix.  Thus, it is not necessarily globally unique.
    86         *
    87         *  Use the `$name` property of the module to get a globally unique name
    88         *  for the target.
    89         */
    90        readonly config String name;
    91
    92        /*!
    93         *  ======== suffix ========
    94         *  Suffix appended to all objs, libraries, and executable.
    95         *
    96         *  All files generated by this target (object files, archives,
    97         *  executables, etc.) have file names whose extensions end with
    98         *  suffix.  In particular, targets create files with the following
    99         *  extensions:
   100         *  @p(dlist)
   101         *      - `".a<suffix>"`
   102         *              archive files (i.e., libraries)
   103         *      - `".o<suffix>"`
   104         *              object files
   105         *      - `".s<suffix>"`
   106         *              assembly language source (see `{@link #scompile()}`)
   107         *      - `".x<suffix>"`
   108         *              executable files
   109         *  @p
   110         *  This suffix should be chosen to globally and uniquely identify the
   111         *  EABI (Embedded Application Binary Interface) of the objects produced
   112         *  by this target.  Targets with the same suffix should produce 100% EABI
   113         *  compatible objects and, targets with different suffixes should produce
   114         *  objects with incompatible EABIs.
   115         *
   116         *  @see #scompile()
   117         */
   118        readonly config String suffix;
   119
   120        /*!
   121         *  ======== compatibleSuffixes ========
   122         *  Array of suffixes used by targets compatible with this target
   123         *
   124         *  This array is used to identify a set of targets that produce
   125         *  code that can be linked with code produced by this target, where the
   126         *  order of suffixes defines the order of preferrence. This
   127         *  parameter is used by `findSuffixes()`.
   128         *
   129         *  For example, an Arm target which builds for v6 architecture might have
   130         *  the following values in its `compatibleSuffix`: ["v5T", "MV470"].
   131         *  This means that code produced by targets with suffixes "v5T' and
   132         *  "MV470" can be linked with code produced by that target, and that "v5T"
   133         *  code is more preferred than "MV470" code.
   134         */
   135        config String compatibleSuffixes[];
   136
   137        /*!
   138         *  ======== isa ========
   139         *  CPU Instruction Set Architecture (ISA)
   140         *
   141         *  This parameter is used to identify a set of targets that produce
   142         *  code for a common ISA.  This is used by build scripts that need to
   143         *  build for all targets that support a particular device.
   144         *
   145         *  For example, the build script for a package that is designed for
   146         *  the TMS32064xx (and no other CPU) can easily specify that it
   147         *  should be built for all targets that generate code for the
   148         *  TMS320C64xx without having to specify a specific target.  This
   149         *  allows the user to add new targets (big endian, little endian,
   150         *  different compilers, etc.) that build for the TMS320C64xx without
   151         *  having to modify the package's build script.
   152         *
   153         *  Note that this field should not be confused with platform ISA
   154         *  names; this field is defined by target tool-chains and may differ
   155         *  from the names given by a CPU device.
   156         *
   157         *  @see xdc.platform.ICpuDataSheet
   158         */
   159        readonly config String isa;
   160
   161        /*!
   162         *  ======== model ========
   163         *  Run-time model
   164         *
   165         *  This structure identifies a particular run-time model
   166         *  used by the compiler to generate instructions.
   167         */
   168        readonly config Model model;
   169
   170        /*!
   171         *  ======== os ========
   172         *  Name of OS required to run programs built for this target.
   173         *
   174         *  Native executables are run by the host OS.  This OS often
   175         *  defines runtime interfaces that all executables (implicitly or
   176         *  explicitly) use.
   177         *
   178         *  If os is undefined, then no OS is required.
   179         */
   180        readonly config String os;
   181
   182        /*!
   183         *  ======== rts ========
   184         *  Name of a run-time support package to include
   185         *
   186         *  Development environments often provide a set of common run-time
   187         *  support functions that all other code can easily utilize; e.g.,
   188         *  some means for performing a "printf", normal program termination
   189         *  with "exit status", etc.  If the `rts` parameter is non-`null`, it is
   190         *  the name of a package that is implicitly imported when building
   191         *  any executable that is built using this target.  If `rts` is
   192         *  undefined, no rts package is imported.
   193         *
   194         *  This parameter makes it possible for the target producer to name
   195         *  a package that provides a target-specific implementation of a runtime
   196         *  support interface.  Clients of a target do not need to explicitly
   197         *  name a target specific rts implementation; thus, it is not
   198         *  possible for the client to inadvertently name the wrong (or an
   199         *  incompatible) rts implementation.
   200         *
   201         *  Note: this package is *NOT* included if the executable's
   202         *  `{@link xdc.bld.Executable#attrs}.rtsName` attribute is set to `null`;
   203         *  see {@link xdc.bld.Executable#Attrs}.
   204         */
   205        readonly config String rts;
   206
   207        /*!
   208         *  ======== base ========
   209         *  A target that this target is based upon.
   210         *
   211         *  If non-`null`, this target shares the same tool-chain of the specified
   212         *  base target.  This parameter is used to determine various default
   213         *  values for target configuration parameters.  For example, the default
   214         *  setting of `{@link #rootDir}` is the value of the base's
   215         *  `{@link #rootDir}` setting.
   216         */
   217        readonly config ITarget.Module base;
   218
   219        /*!
   220         *  ======== dllExt ========
   221         *  @_nodoc dlls are not yet fully supported
   222         */
   223        config String dllExt;
   224
   225        /*!
   226         *  ======== execExt ========
   227         *  Extension for executables.
   228         *
   229         *  Operating systems and tools often have a strong preference for a
   230         *  specific extension for executables; e.g., Windows expects executables
   231         *  to have the extension "`.exe`".  If this parameter is set, executables
   232         *  will be given the specified extension instead of the default
   233         *  "`.x<suffix>`", where `<suffix>` is the target's suffix parameter.
   234         *
   235         *  The `execExt` is an expression that is expanded prior to use.
   236         *  Expressions of the form "`$(name)`" within the
   237         *  pattern string are expanded if "`name`" is one of the built-in
   238         *  variables listed below.
   239         *
   240         *  Built-in variables for `execExt`:
   241         *  @p(dlist)
   242         *      - `trgName`
   243         *              the target's `name` property
   244         *      - `trgSuffix`
   245         *              the target's `suffix` property
   246         *      - `platPName`
   247         *              the executable's platform package name
   248         *      - `platIName`
   249         *              the executable's platform instance name
   250         *  @p
   251         *
   252         *  @a(Example) If you want to build a portable executable for multiple
   253         *  targets side-by-side and you want (or need) to use a fixed extension
   254         *  such as ".out" for all executables, setting `execExt` to
   255         *  `"_$(trgSuffix).out"` for all targets ensures that all generated
   256         *  executables will have unique names and yet share a common extension
   257         *  of `".out"`.
   258         */
   259        config String execExt;
   260
   261        /*!
   262         *  ======== platform ========
   263         *  The default platform name for this target
   264         *
   265         *  Build scripts often build for just one platform per target.  This
   266         *  parameter allows one to establish a default platform for each
   267         *  target in a build.
   268         *
   269         *  If this parameter is `null` or `undefined` and `{@link #platforms}`
   270         *  array is non-empty, it is initialized to be the first element of the
   271         *  platforms array (i.e., `{@link #platforms[0]}`).
   272         */
   273        config String platform;
   274
   275        /*!
   276         *  ======== platforms ========
   277         *  A set of platforms that can support this target
   278         *
   279         *  Some build scripts build executables for "all" platforms; e.g.,
   280         *  regression test suites.  This  parameter allows one to establish
   281         *  a set of platforms that build scripts can legitimately use to
   282         *  create executables, for example.
   283         *
   284         *  If this array is empty (i.e., has length 0) and `{@link #platform}`
   285         *  is non-`null`, platforms is initialized to an array of one element
   286         *  equal to `{@link #platform}`.
   287         */
   288        config String platforms[] = [];
   289
   290        /*!
   291         *  ======== binaryParser ========
   292         *  The name of a object file parser
   293         *
   294         *  The value of this configuration parameter is the name of a
   295         *  module or Java class that implements the `xdc.rta.IOFReader` interface.
   296         *  This interface is used to extract information from the object files
   297         *  produced by this target.
   298         *
   299         *  @_nodoc object file readers are not yet fully supported
   300         */
   301        config String binaryParser;
   302
   303        /*!
   304         *  ======== version ========
   305         *  The Compatibility Key associated with this target.
   306         *
   307         *  @a(Readonly) This value is automatically computed by the XDC Build
   308         *  Engine by executing the `{@link #getVersion()}` function after
   309         *  `package.bld` completes but prior to generating `package.mak`.
   310         */
   311        config String version;
   312
   313        /*!
   314         *  ======== versionRaw ========
   315         *  The unmodified version string associated with this target.
   316         *
   317         *  @a(Readonly) This value is automatically computed by the XDC Build
   318         *  Engine by executing the `{@link #getVersion()}` function after
   319         *  `package.bld` completes but prior to generating `package.mak`.
   320         *
   321         *  @_nodoc
   322         */
   323        config String versionRaw;
   324
   325        /*!
   326         *  ======== DebugGen ========
   327         *  Debugger integration support.
   328         *
   329         *  This structure specifies additional files that are generated
   330         *  in order to support integration with a debugger.  For example, the
   331         *  default setting for TI targets specifies the generation of CCS
   332         *  project files that allow one to easily debug executables that have
   333         *  been constructed from multiple packages.
   334         *
   335         *  There are two "types" of debug support files that are generated;
   336         *  one for the package as a whole, and one for each executable.
   337         *  Since packages may contain portable sources that are built for more
   338         *  than one target, a "package-level" file is generated for each target
   339         *  used in the package.  A separate file is generated for each
   340         *  executable built within the package.
   341         *
   342         *  The `execTemplate` and `packageTemplate` fields name a template that
   343         *  is expanded in the context of the config model and the build
   344         *  model, respectively.  These fields should be set to a file name
   345         *  string which is relative to the package path; e.g., the string
   346         *  "`ti/targets/cc_exec.xdt`" refers to the file "`cc_exec.xdt`" in the
   347         *  `ti.targets` package located along the package path.
   348         *
   349         *  Preconditions for the `execTemplate`:
   350         *  @p(dlist)
   351         *      - `this`
   352         *              the configured program object (`xdc.cfg.Program`);
   353         *              i.e., the program object *after* the program's
   354         *              configuration script completes.
   355         *      - `$args`
   356         *              array of arguments passed to the template
   357         *
   358         *      - `$args[1]`
   359         *              the name of the executable being produced for this
   360         *              configuration.
   361         *
   362         *      - `environment`
   363         *              hash table of XDC global parameters; e.g., `"xdc.path"`,
   364         *              `"xdc.root"`, ...
   365         *  @p
   366         *  Preconditions for the `packageTemplate`:
   367         *  @p(dlist)
   368         *      - `this`
   369         *              the "package contents" object (i.e.,
   370         *              `xdc.bld.PackageContents`) *after* the package's
   371         *              build script (`package.bld`) completes.
   372         *      - `$args`
   373         *              array of arguments passed to the template
   374         *
   375         *      - `$args[0]`
   376         *              the target (a module implementing the
   377         *              `{@link xdc.bld.ITarget}` interface)
   378         *
   379         *      - `$args[1]`
   380         *              hash-table of all package sources
   381         *
   382         *      - `environment`
   383         *              hash table of XDC global parameters; e.g., `"xdc.path"`,
   384         *              `"xdc.root"`, ...
   385         *  @p
   386         *  The `execPattern` and `packagePattern` fields are expressions that
   387         *  are expanded prior to template expansion to determine the name of
   388         *  the output file.  Expressions of the form "`$(name)`" within the
   389         *  pattern string are expanded if "`name`" is one of the built-in
   390         *  variables listed below.
   391         *
   392         *  Built-in variables for `execPattern`:
   393         *  @p(dlist)
   394         *      - `cfgName`
   395         *              the name of the generated configuration file (without
   396         *              any directory prefix);
   397         *      - `cfgDir`
   398         *              the name of the directory containing the config file;
   399         *      - `exeName`
   400         *              the name of the executable file (without any
   401         *              directory prefix);
   402         *      - `exeDir`
   403         *              the directory containing the executable file.
   404         *  @p
   405         *  Both the `exeDir` and `cfgDir` are relative to the directory
   406         *  containing the `package.bld` script.
   407         *
   408         *  Built-in variables for `packagePattern`:
   409         *  @p(dlist)
   410         *      - `pkgName`
   411         *              the package's name (e.g., `"ti.targets"`);
   412         *      - `trgName`
   413         *              the target's `name` property;
   414         *      - `trgSuffix`
   415         *              the target's `suffix` property.
   416         *  @p
   417         *
   418         *  @see #debugGen
   419         */
   420        struct DebugGen {
   421            String execTemplate;    /*! debugger template for executable */
   422            String execPattern;     /*! exec file name pattern */
   423            String packageTemplate; /*! debugger template for package */
   424            String packagePattern;  /*! package file name pattern */
   425        }
   426
   427        /*!
   428         *  ======== debugGen ========
   429         *  Debugger/IDE file generation support.
   430         *
   431         *  This parameter allows one to automatically generate files that
   432         *  can be used by an IDE to more easily debug (and possibly rebuild)
   433         *  specified goals.
   434         *
   435         *  To avoid unnecessary build time overhead, these files are not always
   436         *  generated; by default, they are only generated for "debug" profiles.
   437         *  The generation of these files is controlled by the
   438         *  `{@link xdc.cfg.Program#gen}` configuration parameter.  To force these
   439         *  files to be generated for a particular executable, add the following
   440         *  line to the executable's program configuration script:
   441         *  @p(code)
   442         *      Program.gen.debuggerFiles = true;
   443         *  @p
   444         *
   445         *  It is also possible to disable the generation of selected files by
   446         *  setting the appropriate fields of `{@link #DebugGen}` to `null` in
   447         *  your `config.bld` script.
   448         */
   449        config DebugGen debugGen;
   450
   451        /*!
   452         *  ======== Extension ========
   453         *  File extension to file type association.
   454         *
   455         *  This structure is used by the Build Engine to determine whether a
   456         *  file should be treated as C++, C, or assembly language source.
   457         *
   458         *  @field(suf) the file extension including any '.' characters
   459         *
   460         *  @field(typ) the type of the file having this extension.
   461         *              Allowable file type identifiers include:
   462         *              @p(dlist)
   463         *                 - `"c"`
   464         *                      C language source file
   465         *                 - `"asm"`
   466         *                      assembly language source file
   467         *                 - `"cpp"`
   468         *                      C++ language source file
   469         *              @p
   470         *  @see #extensions
   471         */
   472        struct Extension {
   473            String suf;     /*! file extension (including any '.') */
   474            String typ;     /*! type of this file; e.g., `"c"`, `"asm"`, ... */
   475        };
   476
   477        /*!
   478         *  ======== extensions ========
   479         *  File extensions recognized by this target.
   480         *
   481         *  This is a user modifiable table used to customize file extensions
   482         *  recognized by each target.
   483         *
   484         *  For example, to add a new assembly language extension, say "`.s64`",
   485         *  to the target `ti.targets.C64P`, add the following lines to the
   486         *  build model startup script:
   487         *  @p(code)
   488         *      var C64P = xdc.module('ti.targets.C64P');
   489         *      C64P.extensions[".s64"] = {
   490         *          suf: ".s64", typ: "asm"
   491         *      };
   492         *  @p
   493         *  Note that individual targets may add additional language types.
   494         *
   495         *  It is also possible to remove default extensions.  For example, to
   496         *  remove the "`.asm`" extension from the target `ti.targets.C64P`, add
   497         *  the following lines to the build model startup script:
   498         *  @p(code)
   499         *      var C64P = xdc.module('ti.targets.C64P');
   500         *      delete C64P.extensions[".asm"];
   501         *  @p
   502         */
   503        config Extension extensions[string] = [
   504            [".asm", {suf: ".asm", typ: "asm"}],
   505            [".c",   {suf: ".c",   typ: "c"  }],
   506            [".cpp", {suf: ".cpp", typ: "cpp"}],
   507            [".cxx", {suf: ".cxx", typ: "cpp"}],
   508            [".C",   {suf: ".C",   typ: "cpp"}],
   509            [".cc",  {suf: ".cc",  typ: "cpp"}],
   510        ];
   511
   512        /*!
   513         *  ======== versionMap ========
   514         *  Map of compiler version numbers to compatibility keys.
   515         *
   516         *  `versionMap` is a user modifiable table used to map tool-chain
   517         *  version numbers to Compatibility Keys.
   518         *
   519         *  Each target defines the format of the tool-chain version obtained
   520         *  from the tool-chain.  The user can then map new tool-chain version
   521         *  strings to an appropriate compatibility key.
   522         *
   523         *  Each target must respect the mapping defined by this table; i.e.,
   524         *  if the user supplies a compatibility key in this map, it must be
   525         *  returned when `{@link #getVersion()}` is called.
   526         *
   527         *  Thus, it is possible for the user to assert that any two compiler
   528         *  tool chains should be treated as equivalent (or incompatible) by
   529         *  mapping their version numbers to identical (incompatible)
   530         *  compatibility keys.
   531         *
   532         *  @see ti.targets.ITarget#versionMap
   533         */
   534        config String versionMap[string] = [
   535        ];
   536
   537        /*!
   538         *  ======== alignDirectiveSupported ========
   539         *  The compiler supports an align directive.
   540         */
   541        readonly config Bool alignDirectiveSupported = false;
   542
   543        /*!
   544         *  ======== rootDir ========
   545         *  Installation directory for this target's code generation tools.
   546         *
   547         *  Since each target potentially "wraps" a different compiler tool-chain
   548         *  and each tool-chain will, in general, assume a different physical
   549         *  design for the installation of the compiler and its associated
   550         *  libraries and headers, one must consult each specific target to know
   551         *  how to set this parameter.
   552         *
   553         *  If the `{@link #base}` parameter is `null`, this parameter *must* be
   554         *  set by the user; otherwise, `rootDir` defaults to the value
   555         *  `base.rootDir`.
   556         */
   557        config String rootDir;
   558
   559        /*!
   560         *  ======== CompileOptions ========
   561         *  Options passed to the compiler/assembler.
   562         *
   563         *  @field(aopts)   a string of target-specific assembler options
   564         *  @field(copts)   a string of target-specific C/C++ compiler options
   565         *  @field(cfgcopts)   a string of C/C++ compiler options for C config file,
   566         *                  includes 'copts' in addition to the value passed
   567         *  @field(defs)    a string of macro definitions each of the form
   568         *                  "`-Dname=value`" separated by white space
   569         *  @field(incs)    a string of include directories each of the form
   570         *                  "`-Idir`" separated by white space
   571         *
   572         *  @a(Predefined Macros)
   573         *  The XDC Build Engine automatically adds several predefined macros via
   574         *  `-D` definitions that enable conditional compilation of source files
   575         *  based on build-specific attributes.
   576         *  @p(dlist)
   577         *      - `xdc_bld__profile_`{profile_name}
   578         *          this symbol is always defined and {profile_name} is the
   579         *          compile goal's (see `{@link #CompileGoal}`) profile name.
   580         *  @p
   581         *
   582         *  In addition, each target defines a set of macros that enable clients
   583         *  to portably support big/little endian targets, for example.  These
   584         *  macros are indirectly included by sources that include `xdc/std.h`;
   585         *  see `{@link xdc}`.
   586         *
   587         *  @see #OptionSet
   588         *  @see #CompileGoal
   589         *  @see xdc
   590         */
   591        struct CompileOptions {
   592            String aopts;       /*! goal specific ASM options */
   593            String copts;       /*! goal specific C compiler options */
   594            String cfgcopts;    /*! goal specific C config file options */
   595            String defs;        /*! goal specific C/ASM definition options */
   596            String incs;        /*! goal specific C/ASM include options */
   597        };
   598
   599        /*!
   600         *  ======== OptionSet ========
   601         *  Collection of tool-chain options.
   602         *
   603         *  This structure is used to define a collection of tool-chain
   604         *  options that are used as a group to achieve some effect supported
   605         *  by the tool-chain.  For example, some compilers require that
   606         *  specific options be passed to the compiler *and* linker in order
   607         *  to generate execution profile information or code coverage
   608         *  statistics.
   609         *
   610         *  @field(compilerOptions) a set of compiler/assembler options
   611         *  @field(linkOpts)        a string of target-specific linker options
   612         *  @field(archiveOpts)     a string of target-specific archiver options
   613         *  @field(filters)         an array of filters applied (in order) to
   614         *                          tool-chain commands
   615         *
   616         *  @see #profiles
   617         */
   618        struct OptionSet {
   619            CompileOptions  compileOpts;    /*! profile-specific compiler opts */
   620            String          linkOpts;       /*! profile-specific linker opts */
   621            String          archiveOpts;    /*! profile-specific archiver opts */
   622
   623            ITargetFilter.InstDesc  filters[]; /*! ITargetFilter instance descs */
   624        };
   625
   626        /*!
   627         *  ======== profiles ========
   628         *  Profiles supported by this target.
   629         *
   630         *  A profile is a collection of tool options used to create a
   631         *  library or executable that supports a certain "flavor" of library
   632         *  or executable; e.g., "debug" or "release".
   633         *
   634         *  Some profile names are supported by all targets even though the
   635         *  targets use different compilers (and therefore different options).
   636         *  These profile names makes it possible for a package to build
   637         *  libraries or executables in a "debug" (or "release") profile
   638         *  independent of the target, for example.
   639         *
   640         *  All targets are required to support "debug" and "release" profile
   641         *  names.
   642         *
   643         *  Profile options are added to beginning of any goal specific options
   644         *  specified by the user before being passed to the target.
   645         */
   646        config OptionSet profiles[string] = [
   647            ["release", {}],
   648            ["debug", {}],
   649        ];
   650
   651        /*!
   652         *  ======== CompileGoal ========
   653         *  The goal specification passed to the `{@link #compile}`
   654         *  function.
   655         *
   656         *  @see #compile
   657         *  @see #scompile
   658         */
   659        struct CompileGoal {
   660            String base;        /*! base name of the source and destination */
   661            String dstPrefix;   /*! directory prefix of destination file */
   662            String dstSuffix;   /*! suffix of destination file; e.g., ".o62" */
   663            String srcSuffix;   /*! optional suffix of source file; e.g., ".c" */
   664            String srcPrefix;   /*! optional directory prefix of source file */
   665            String profile;     /*! index into profiles map */
   666            CompileOptions opts;/*! goal specific compiler options */
   667            Bool configOpts;    /*! true if compiling the generated C config file */
   668        };
   669
   670        /*!
   671         *  ======== LinkGoal ========
   672         *  The goal specification passed to the `{@link #link}` function.
   673         *
   674         *  @see #link
   675         */
   676        struct LinkGoal {
   677            String base;        /*! base name of the source and destination */
   678            String dstPrefix;   /*! directory prefix of destination file */
   679            String dstSuffix;   /*! suffix of destination file; e.g., ".x62" */
   680            String files;       /*! string of files to link with */
   681            String profile;     /*! index into profiles map */
   682            String opts;        /*! goal specific linker options */
   683            Bool dllMode;       /*! true if we're linking an assembly */
   684            Bool isRom;         /*! reflects the `isRom` attribute */
   685        };
   686
   687        /*!
   688         *  ======== ArchiveGoal ========
   689         *  The goal specification passed to the `{@link #archive}`
   690         *  function.
   691         *
   692         *  @see #archive
   693         */
   694        struct ArchiveGoal {
   695            String base;        /*! base name of the source and destination */
   696            String dstPrefix;   /*! directory prefix of destination file */
   697            String dstSuffix;   /*! suffix of destination file; e.g., ".a62" */
   698            String files;       /*! String of files to archive */
   699            String profile;     /*! index into profiles map */
   700            String opts;        /*! goal specific archiver options */
   701        };
   702
   703        /*!
   704         *  ======== CommandSet ========
   705         *  The commands necessary to create a specified goal.
   706         *
   707         *  This structure is the return value of the `{@link #compile}`,
   708         *  `{@link #link}` and `{@link #archive}` functions.  This value is then
   709         *  used to generate a makefile or any other files necessary to generate
   710         *  a specified goal.
   711         *
   712         *  @field(msg)     a brief synopsis of the commands specified by `cmds`;
   713         *                  this string is output in lieu of `cmds` when building
   714         *                  in "non-verbose" mode.
   715         *
   716         *  @field(cmds)    a single string of commands that must be executed
   717         *                  to complete the specified operation.  Multiple
   718         *                  commands may be specified by separating each command
   719         *                  with the '\n' character.
   720         *
   721         *                  To facilitate the creation of "portable" makefiles and
   722         *                  to simplify the implementation of targets, certain
   723         *                  distinguished "macros" may be embedded in this string.
   724         *                  The build engine replaces these macros with the
   725         *                  values described below.
   726         *                  @p(dlist)
   727         *                      - `$(rootDir)`
   728         *                          the target's `{@link #rootDir}` configuration
   729         *                          parameter
   730         *                      - `$(packageBase)`
   731         *                          the target package's
   732         *                          `{@link xdc.IPackage#packageBase}` property
   733         *                      - `$(XDCINCS)`
   734         *                          a set of "-I" options that names each
   735         *                          repository in the package path
   736         *                  @p
   737         *
   738         *  @field(envs)    an array of "name=value" strings that represent
   739         *                  environment variables that are defined prior to the
   740         *                  execution of the commands specified by `cmds`
   741         *
   742         *  @field(path)    an array of directory names that are used to compose
   743         *                  the PATH environment variable that is in effect when
   744         *                  the commands specified by `cmds` are run.
   745         *
   746         *  @see #archive
   747         *  @see #compile
   748         *  @see #scompile
   749         *  @see #link
   750         */
   751        struct CommandSet {
   752            String msg;         /*! brief message describing subsequent commands */
   753            String cmds;        /*! commands necessary to generate goal */
   754            String path[];      /*! host-independent representation of PATH */
   755            String envs[];      /*! environment variable settings for the cmds */
   756        };
   757
   758        /*!
   759         *  ======== archive ========
   760         *  Create an archive.
   761         *
   762         *  This function is called during makefile generation to convert build
   763         *  goals into specific commands that generate the specified goal.
   764         *
   765         *  @param(goal) the `{@link #ArchiveGoal}` defining the archive to build.
   766         *
   767         *  @a(returns)
   768         *  This function returns a `{@link #CommandSet}`.  If non-`null`, this
   769         *  object defines the commands that must be executed to create the
   770         *  specified object file.  If `null`, then goal can not be achieved.
   771         *
   772         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   773         */
   774        CommandSet* archive(ArchiveGoal *goal);
   775
   776        /*!
   777         *  ======== compile ========
   778         *  Compile a source file into an object file.
   779         *
   780         *  This function is called during makefile generation to convert build
   781         *  goals into specific commands that generate the specified object
   782         *  file goal.
   783         *
   784         *  @param(goal) a `{@link #CompileGoal}` that specifies what file to
   785         *               compile, the output file name, and any goal-specific
   786         *               options to use
   787         *
   788         *  @a(returns)
   789         *  This function retuns a `{@link #CommandSet}`.  If non-`null`,
   790         *  this object defines the commands that must be executed to create the
   791         *  specified object file.  If `null`, then goal can not be achieved.
   792         *
   793         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   794         */
   795        CommandSet* compile(CompileGoal *goal);
   796
   797        /*!
   798         *  ======== scompile ========
   799         *  Compile a source file into an assembly language file.
   800         *
   801         *  This function is called during makefile generation to convert build
   802         *  goals into specific commands that generate the specified assembly
   803         *  language source goal.
   804         *
   805         *  @param(goal) a `{@link #CompileGoal}` that specifies what file to
   806         *               compile, the output file name, and any goal-specific
   807         *               options to use
   808         *
   809         *  @a(returns)
   810         * This function returns a `{@link #CommandSet}`.  If non-`null`, this
   811         * object defines the commands that must be executed to create the
   812         * specified assembly language file.  If `null`, then goal
   813         * can not be achieved or is unnecessary (e.g., because
   814         * the source file is already an asm file).
   815         *
   816         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   817         */
   818        CommandSet* scompile(CompileGoal *goal);
   819
   820        /*!
   821         *  ======== link ========
   822         *  Link object files to produce an executable.
   823         *
   824         *  This function is called during makefile generation to convert build
   825         *  goals into specific commands that generate the specified goal.
   826         *
   827         *  @param(goal) a `{@link #LinkGoal}` that specifies the output file
   828         *               name, a list of files to link with, and any goal-specific
   829         *               options to use
   830         *
   831         *  @a(returns)
   832         *  This function returns a `{@link #CommandSet}`.  If non-`null`, this
   833         *  object defines the commands that must be executed to create the
   834         *  specified object file.  If `null`, then goal can not be
   835         *  achieved.
   836         *
   837         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   838         */
   839        CommandSet* link(LinkGoal *goal);
   840
   841        /*!
   842         *  ======== getVersion ========
   843         *  Get a target-specific Compatibility Key string
   844         *
   845         *  This function is called during makefile generation to obtain a
   846         *  target-specific Compatibility Key string.  This string is of the
   847         *  form:
   848         *  @p(code)
   849         *      "<pkg>.<mod>{<d0>,<d1>,<d2>,<d3>"
   850         *  @p
   851         *  where, `<pkg>.<mod>` is the name of the target, and `<d0>`, `<d1>`,
   852         *  etc. forms a Compatibility Key.
   853         *
   854         *  @a(returns)
   855         *  This function returns a string that encodes the name of the target
   856         *  and its Compatibility Key.
   857         *
   858         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   859         */
   860        String getVersion();
   861
   862        typedef String StringArray[];
   863
   864        /*!
   865         *  ======== getISAChain ========
   866         *  Get this target's ISA "is compatible with" relation.
   867         *
   868         *  Returns an array of ISA names (including this target's ISA) that
   869         *  represents the "is a" relation between ISA's.  The array starts with
   870         *  the most general ISA and ends with this target's ISA or with the
   871         *  optionally specified argument.  This relation is used to:
   872         *  @p(nlist)
   873         *      - pre-define macro definitions that enable code to be
   874         *        conditionally compiled based on compatible versions of a
   875         *        target's ISA.
   876         *
   877         *      - locate appropriate source files during makefile generation;
   878         *        each ISA named in a chain causes the extensions ".s"isa to be
   879         *        added to the ITarget.extensions table (in the reverse order
   880         *        that they appear in the chain).  For example, if a target's
   881         *        ISA is "64P" and the returned chain is ["62", "64", "64P"],
   882         *        the following assembly language suffixes are added to
   883         *        the target's extensions table: ".s64P", ".s64", ".s62".
   884         *  @p
   885         *
   886         *  This relation may also be used in the future to help validate
   887         *  combinations of targets and platforms; a target's CPU ISA must
   888         *  appear on the chain specified by the platform's CPU ISA.
   889         *
   890         *  @param(isa) the ISA identifier string for the ISA to lookup; if null
   891         *              then the target's ISA is used (ITarget.isa).
   892         *
   893         *  @a(returns)
   894         *  This function returns an array of ISA strings where the last string
   895         *  is the optionally specified ISA string or this target's ISA,
   896         *  and the first string is the "base" ISA in the
   897         *  is source compatible" relationship.
   898         *  If the specified ISA string is not in this target's chain
   899         *  of compatible targets, `null` is returned.
   900         *
   901         *  @a(throws)  `Error` exceptions are thrown for fatal errors.
   902         *
   903         */
   904        function getISAChain(isa);
   905
   906        /*!
   907         *  ======== findSuffix ========
   908         *  Find the suffix that is compatible with this target.
   909         *
   910         *  This function determines the list of targets supported by the
   911         *  package given as the argument. From that list, this function
   912         *  returns the suffix of a target that is compatible with this target.
   913         *  Compatibility in this case means that object files created by a
   914         *  target having the suffix returned by this function can be linked
   915         *  into an executable produced using this target. In the case where more
   916         *  than one suffix is compatible, this function returns a suffix in the
   917         *  following order of preference:
   918         *  @p(nlist)
   919         *      - if this target's suffix is in the list, that suffix is returned.
   920         *
   921         *      - suffixes from `compatibleSuffixes` are matched against the list
   922         *        in the order they appear in `compatibleSuffixes`, and the first one
   923         *        found in the list is returned.
   924         *  @p
   925         *
   926         *  @param(pkg) a package object or an array of target suffix strings
   927         *              (see `{@link #suffix}`).
   928         *
   929         *  @a(returns)
   930         *  This function returns the suffix string of a target compatible with
   931         *  this target or `null` if `pkg` does not support any target compatible
   932         *  with this target.
   933         *
   934         */
   935        function findSuffix(pkg);
   936
   937        /*!
   938         *  ======== selectSuffix ========
   939         *  Select the suffix that is compatible with this target.
   940         *
   941         *  From a list of suffixes supplied as an argument, this function
   942         *  returns the suffix compatible with this target. Compatibility in
   943         *  this case means that object files created by a target having the
   944         *  suffix returned by this function can be linked into an executable
   945         *  produced using this target. In the case where more than one suffix
   946         *  is compatible, this function returns a suffix in the following order
   947         *  of preference:
   948         *  @p(nlist)
   949         *      - if this target's suffix is in the list, that suffix is returned.
   950         *
   951         *      - suffixes from `compatibleSuffixes` are matched against the list
   952         *        in the order they appear in `compatibleSuffixes`, and the first one
   953         *        found in the list is returned.
   954         *  @p
   955         *
   956         *  @param(suffixList)      an array of target suffix strings
   957         *                          (see `{@link #suffix}`).
   958         *
   959         *  @a(returns)
   960         *  This function returns the suffix string of a target compatible with
   961         *  this target or `null` if no such suffix is found in the list of
   962         *  suffixes specified by the first argument.
   963         *
   964         */
   965        String selectSuffix(StringArray suffixList);
   966
   967        /*!
   968         *  ======== sectMap ========
   969         *  Output section name to segment type mapping
   970         *
   971         *  This hash table is used to determine whether a particular object file
   972         *  output section (".text", ".stack", etc.) requires 'data', 'code' or
   973         *  'stack' memory segment.
   974         *
   975         *  This `sectMap` is referenced by linker command file templates during
   976         *  generation to create linker command files. The Platform defines the
   977         *  default memory segments for code and data, and based on this map and
   978         *  the default segments, the linker command file template places an
   979         *  output section into a physical memory segment.
   980         *
   981         *  Note that the `{@link xdc.cfg.Program}` object and the
   982         *  `{@link xdc.platform.IPlatform}` instance have a
   983         *  `sectMap` parameter. Both the `Program`'s and `IPlatform`'s `sectMap`
   984         *  can augment and/or override the placement for a section, but
   985         *  `{@link xdc.cfg.Program#sectMap}` takes precedence. Therefore, this
   986         *  `sectMap` and the default segments from the platform define an
   987         *  initial section map which is then augmented by the `Program`'s and
   988         *  `IPlatform`'s section map.
   989         */
   990        readonly config String sectMap[string];
   991
   992        /*!
   993         *  ======== TypeInfo ========
   994         *  @_nodoc
   995         *
   996         *  @see #StdTypes
   997         */
   998        struct TypeInfo {
   999            int size;
  1000            int align;
  1001        }
  1002
  1003        /*!
  1004         *  ======== StdTypes ========
  1005         *  Standard base types supported by all targets
  1006         *
  1007         *  @see #stdTypes
  1008         */
  1009        struct StdTypes {
  1010            TypeInfo t_IArg;
  1011            TypeInfo t_Char;
  1012            TypeInfo t_Double;
  1013            TypeInfo t_Float;
  1014            TypeInfo t_Fxn;
  1015            TypeInfo t_Int;
  1016            TypeInfo t_Int8;
  1017            TypeInfo t_Int16;
  1018            TypeInfo t_Int32;
  1019            TypeInfo t_Int40;
  1020            TypeInfo t_Int64;
  1021            TypeInfo t_Long;
  1022            TypeInfo t_LDouble;
  1023            TypeInfo t_LLong;
  1024            TypeInfo t_Ptr;
  1025            TypeInfo t_Short;
  1026            TypeInfo t_Size;
  1027        }
  1028
  1029        /*!
  1030         *  ======== stdInclude ========
  1031         *  Standard C/C++ types header
  1032         *
  1033         *  This string identifies a header containing the C/C++ definitions
  1034         *  required to enable use of `xdc/std.h` in C/C++ sources; see
  1035         *  `{@link xdc}`.
  1036         *
  1037         *  The value of this string is used by `xdc/std.h` to include
  1038         *  target-specific definitions of the types `Int8`, `Int16`, etc.  In
  1039         *  addition, this header supplies target-specific definitions of the
  1040         *  predefined `xdc_target__*` macros required by `{@link xdc xdc/std.h}`.
  1041         *
  1042         *  Since this header must supply target-specific values for
  1043         *  target-independent names the structure of this header is usually of
  1044         *  the form:
  1045         *  @p(code)
  1046         *      // if target macros are not already defined,
  1047         *      #if !defined(xdc_target_macros_include__)
  1048         *          // include target-specific definitions
  1049         *          #if defined(TARGET1)
  1050         *              #include "target1.h"
  1051         *          #elif defined(TARGET2)
  1052         *              #include "target2.h"
  1053         *          #elif ...
  1054         *              :
  1055         *          #else
  1056         *              #error unsupported target
  1057         *          #endif
  1058         *      #endif
  1059         *      // include common definitions
  1060         *          :
  1061         *  @p
  1062         *  The check of the symbol `xdc_target_macros_include__` exists to
  1063         *  allow others that define new targets to include this header to
  1064         *  get common definitions for a family of related targets.
  1065         *
  1066         *  To simplify the creation of the target-specific header files, the
  1067         *  template file `stddefs.xdt` in this package can be used to
  1068         *  automatically generate the required definitions from each target's
  1069         *  `.xdc` specification.
  1070         */
  1071        readonly config String stdInclude;
  1072
  1073        /*!
  1074         *  ======== stdTypes ========
  1075         *  Size and alignment for standard base types
  1076         *
  1077         *  The values of size are the values returned by the
  1078         *  target-specific `sizeof()` operator applied to the specified
  1079         *  type (as defined by the C language).  The align value is the number
  1080         *  of chars used in the alignment of the specified type.
  1081         */
  1082        readonly config StdTypes stdTypes = {
  1083            t_IArg          : { size: 0, align: 0 },
  1084            t_Char          : { size: 0, align: 0 },
  1085            t_Double        : { size: 0, align: 0 },
  1086            t_Float         : { size: 0, align: 0 },
  1087            t_Fxn           : { size: 0, align: 0 },
  1088            t_Int           : { size: 0, align: 0 },
  1089            t_Int8          : { size: 0, align: 0 },
  1090            t_Int16         : { size: 0, align: 0 },
  1091            t_Int32         : { size: 0, align: 0 },
  1092            t_Int40         : { size: 0, align: 0 },
  1093            t_Int64         : { size: 0, align: 0 },
  1094            t_Long          : { size: 0, align: 0 },
  1095            t_LDouble       : { size: 0, align: 0 },
  1096            t_LLong         : { size: 0, align: 0 },
  1097            t_Ptr           : { size: 0, align: 0 },
  1098            t_Short         : { size: 0, align: 0 },
  1099            t_Size          : { size: 0, align: 0 },
  1100        };
  1101
  1102        /*!
  1103         *  ======== bitsPerChar ========
  1104         *  The number of bits in a variable of type `char`
  1105         *
  1106         *  This constant allows one to determine the precise number of bits in
  1107         *  each of the types specified in the stdTypes map.  For example, the
  1108         *  number of bits in the target `T`'s `int` type is
  1109         *  @p(code)
  1110         *      T.stdTypes.t_Int.size * T.bitsPerChar
  1111         *  @p
  1112         */
  1113        readonly config Int bitsPerChar = 8;
  1114    }
  1115    /*
  1116     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
  1117     */
  1118


interface xdc.bld.ITargetFilter

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== ITargetFilter ========
    14     *  User-supplied filter of a target's command set
    15     *
    16     *  This interface defines a set of user-supplied methods that are invoked
    17     *  during the Build Model's makefile generation process.  These methods
    18     *  can augment or modify the commands that are placed in the generated
    19     *  makefiles.  For example, an `ITargetFilter` module can add pre or post
    20     *  build steps for virtually any generated file.
    21     *
    22     *  Filters can:
    23     *  @p(nlist)
    24     *      - modify or augment the commands returned by a target's compile,
    25     *        link and archive methods via `{@link #compile}`, `{@link #link}`,
    26     *        and `{@link #archive}`;
    27     *      - add new definitions to the generated makefiles usable by the
    28     *        command added above via `{@link #getDefs}`; and
    29     *      - specify new files to be generated during the configuration process
    30     *        that may be used during or after the link process via
    31     *        `{@link #getGenTab}`.
    32     *  @p
    33     *  Filters are created implicitly when a target's profile
    34     *  (`{@link xdc.bld.ITarget#profiles}`) that references the filter is used.
    35     *  To use a filter, one must configure a profile's option set
    36     *  (`{@link xdc.bld.ITarget#OptionSet}`) in the build configuration script
    37     *  `config.bld`.  It is possible to add filters to existing profiles (such
    38     *  as `"debug"` and `"release"`) or to create entirely new profiles that
    39     *  utilize the filters.
    40     *
    41     *  When modifying existing profiles, no changes to individual packages using
    42     *  these profiles is required; one simply has to clean and rebuild these
    43     *  packages for the filters to have an effect.
    44     *
    45     *  By adding new profiles, one can ensure that existing build artifacts are
    46     *  unchanged and only those packages that want to take advantage of a filter
    47     *  can do so easily by adding a new build artifact that uses the new
    48     *  profile; for example, see `{@link xdc.bld.Library#Attrs}`.
    49     */
    50    metaonly interface ITargetFilter
    51    {
    52        /*!
    53         *  ======== InstDesc ========
    54         *  `ITargetFilter` Instance descriptor
    55         *
    56         *  This structure provides the information necessary to create an
    57         *  instance of an `ITargetFilter`.
    58         *
    59         *  @see xdc.bld.ITarget#OptionSet
    60         */
    61        struct InstDesc {
    62            String  moduleName; /*! name of a module implementing `ITargetFilter`*/
    63            Any     params;     /*! params passed to ITargetFilter.create() */
    64        };
    65
    66        /*!
    67         *  ======== GenDesc ========
    68         *  Configuration file generation descriptor
    69         *
    70         *  This structure is used to specify a new file to be generated during
    71         *  the configuration process.
    72         *
    73         *  Templates are expanded in the context of the Configuration domain;
    74         *  as a result, the contents of the generated file can be a function
    75         *  of an executable's `{@link xdc.cfg.Program}` object.  Template names
    76         *  are interpreted using the `xdc.findFile()` method to
    77         *  locate the template file name.  Templates can, therefore, be
    78         *  contained in any package located along the package path.
    79         *
    80         *  Names of files to be generated are always interpreted relative to
    81         *  the base directory of the package for which makefiles are being
    82         *  generated.
    83         *
    84         *  @see #getGenTab
    85         */
    86        struct GenDesc {
    87            String template;    /*! name of the template to expand */
    88            String file;        /*! the name of the file to generate */
    89        };
    90
    91        /*!
    92         *  ======== MacroDesc ========
    93         *  Macro definition descriptor
    94         *
    95         *  This structure is used to specify macro name-value pairs that are
    96         *  added to the generated makefiles.  These names can be used
    97         *  by commands added via the filter's `{@link #archive()}`,
    98         *  `{@link #compile()}`, or `{@link #link()}` methods.
    99         *
   100         *  Using symbolic values in lieu of embeddeding explicit paths or values
   101         *  enables the end-user to re-define these values without requiring
   102         *  regeneration of makefiles.
   103         *
   104         *  @see #getDefs
   105         */
   106        struct MacroDesc {
   107            String name;    /*! name of the macro */
   108            String value;   /*! the name value of the macro name */
   109        };
   110
   111    instance:
   112
   113        /*!
   114         *  ======== archive ========
   115         *  Archive command filter
   116         *
   117         *  This method is called for every archive created by the package's
   118         *  build script (via `{@link xdc.bld.PackageContents#addLibrary()}`).
   119         *
   120         *  @param(container)   String
   121         *  @param(lib)         `{@link xdc.bld.Library}`
   122         *  @param(objList)     String
   123         *  @param(archArgs)    `{@link xdc.bld.ITarget#ArchiveGoal}`
   124         *  @param(result)      `{@link xdc.bld.ITarget#CommandSet}`
   125         */
   126        function archive(container, lib, objList, archArgs, result);
   127
   128        /*!
   129         *  ======== compile ========
   130         *  Compile command filter
   131         *
   132         *  This method is called for every object created by the package's
   133         *  build script (via `{@link xdc.bld.Executable#addObjects()}`,
   134         *  `{@link xdc.bld.Library#addObjects()}`, ...).
   135         *
   136         *  @param(container)   String
   137         *  @param(target)      `{@link xdc.bld.ITarget}.Module`
   138         *  @param(goal)        String goal file
   139         *  @param(compArgs)    `{@link xdc.bld.ITarget#CompileGoal}` the file to
   140         *                      compile
   141         *  @param(result)      `{@link xdc.bld.ITarget#CommandSet}`
   142         */
   143        function compile(container, target, goal, compArgs, result);
   144
   145        /*!
   146         *  ======== getGenTab ========
   147         *  Get table of files to be generated during configuration
   148         *
   149         *  This method is called during makefile generation to obtain
   150         *  a list of additional files to be generated during configuration.
   151         *
   152         *  @param(acfg)        `{@link xdc.bld.Configuration}` or Assembly
   153         *  @param(cfgDir)      String directory name where generated config files
   154         *                      are placed
   155         *  @param(configName)  String base name of the configuration
   156         *  @a(RETURNS)         array of `{@link #GenDesc}`
   157         */
   158        function getGenTab(acfg, cfgDir, configName);
   159
   160        /*!
   161         *  ======== getDefs ========
   162         *  Get table of macro definitions
   163         *
   164         *  This method is called during makefile generation to obtain
   165         *  a list of macro definitions that are to be added to the
   166         *  generated makefile.  These macros can then be referenced by
   167         *  commands added via a filter function (`{@link #archive()}`,
   168         *  `{@link #compile()}` or `{@link #link()}`).
   169         *
   170         *  @a(RETURNS)         array of `{@link #MacroDesc}`
   171         */
   172        function getDefs();
   173
   174        /*!
   175         *  ======== link ========
   176         *  Link command filter
   177         *
   178         *  This method is called for every executable created by the package's
   179         *  build script (via `{@link xdc.bld.PackageContents#addExecutable()}`,
   180         *  ...).
   181         *
   182         *  @param(container)   String
   183         *  @param(cfgbase)     String
   184         *  @param(prog)        Executable or Assembly
   185         *  @param(objList)     String
   186         *  @param(linkArgs)    `{@link xdc.bld.ITarget#LinkGoal}`
   187         *  @param(result)      `{@link xdc.bld.ITarget#CommandSet}`
   188         */
   189        function link(container, cfgBase, prog, objList, linkArgs, result);
   190    }
   191    /*
   192     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   193     */
   194


module xdc.bld.Library

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Library.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== Library ========
    19     *  Model of a searchable collection of object files
    20     *
    21     *  A library is a collection of one or more object files that is searched
    22     *  to resolve undefined references at link time.
    23     *
    24     *  Instances of this module represent a target independent collection of
    25     *  object files that implement a single set of APIs.  Thus, a library is
    26     *  really a container of target-specific archives which contain the object
    27     *  files necessary to implement a common API.  Although, a library may
    28     *  contain target dependent APIs, each library is expected to
    29     *  encapsulate the same basic functionality independent of the target.
    30     *
    31     *  Instances must be created via the
    32     *  `{@link xdc.bld.PackageContents#addLibrary()}` function; this
    33     *  ensures that each library created appears in the package's manifest and
    34     *  that it properly "inherits" appropriate default attributes from the
    35     *  containing package.
    36     *
    37     *  Library instances are initially create without *any* objects; this ensures
    38     *  that the developer complete control over what objects should be in each
    39     *  library. Thus, even modules declared in a package's specification,
    40     *  `package.xdc`, must be explicitly added to each library in the package
    41     *  (via `{@link #addObjects()}`).
    42     */
    43    metaonly module Library {
    44        /*!
    45         *  ======== Attrs ========
    46         *  Optional attributes for a Library instance.
    47         *
    48         *  Unspecified attributes are "inherited" from
    49         *  `{@link xdc.bld.PackageContents#Attrs}`; i.e., if one of fields in this
    50         *  structure is unspecified *and* this field's name matches a field name
    51         *  in `{@link xdc.bld.PackageContents#attrs}`, then this field's value
    52         *  defaults to the value in specified by
    53         *  `{@link xdc.bld.PackageContents#attrs}`.  This mechanism makes it
    54         *  possible to establish package-wide default values for any of the
    55         *  "inherited" attributes.
    56         *
    57         *  Suppose, for example, that you want all archives in this
    58         *  package to be build with the '`release`' profile, but one particular
    59         *  archive must be built with '`debug`' (because it is a source example).
    60         *  The following build script fragment shows how this can be
    61         *  accomplished:
    62         *  @p(code)
    63         *      Pkg.attrs.profile = 'release';
    64         *      var lib = Pkg.addLibrary('example', ..., {profile: 'debug'});
    65         *  @p
    66         *  @field(incs)  This string contains include path options used by
    67         *          the compiler (or assembler) to locate include files; e.g.,
    68         *          "`-I ../../include -I ../c55xx`".  Note that the syntax of
    69         *          this string may be target dependent.
    70         *
    71         *  @field(defs)  This string contains options used by the
    72         *          compiler (or assembler) to define macros; e.g.,
    73         *          "`-D_C6xxx -DDEBUG=1`".  Note that the syntax of
    74         *          this string may be target dependent.
    75         *
    76         *  @field(aopts)  This string contains options used by the assembler
    77         *          to produce object files; e.g., "`-mP1`".  Note that the syntax
    78         *          of this string may be target dependent.
    79         *
    80         *  @field(copts)  This string contains options used by the C/C++
    81         *          compiler to produce object files; e.g., "`-o3 -mi1`".  Note
    82         *          that the syntax of this string may be target dependent.
    83         *
    84         *  @field(aropts)  This string contains options used by the archiver
    85         *          produce archive files; e.g., "`-q`".  Note
    86         *          that the syntax of this string may be target dependent.
    87         *
    88         *  @field(exportSrc)  If this field is set to true, the sources
    89         *          specified via `{@link #addObjects}()`
    90         *          will be part of the releases named in the releases
    91         *          array.  If it is unspecified (or set to `null`) and the
    92         *          release specifies that sources are to be exported,
    93         *          the sources will be part of the release.  In
    94         *          all other cases, the sources are not part of the
    95         *          release.
    96         *
    97         *  @field(suffix)  If this string is set to a non-`null` value, it
    98         *          specifies the suffix (or extension) of the archive produced.
    99         *          This suffix is used in lieu of the default suffix
   100         *          ("`.a<targ_suffix>`", where `<targ_suffix>` is the suffix
   101         *          property of the target used to create the archive).  So,
   102         *          care must be taken when creating multiple libraries for
   103         *          different targets to ensure that the resulting archive names
   104         *          are unique.
   105         *
   106         *  @field(profile)  This string names a profile defined by the
   107         *          library's target.  The profile specifies a set of compiler,
   108         *          assembler, and archiver options that are to be used when
   109         *          producing the archive.  Note that these tool options are
   110         *          in addition to any options specified via `aopts`, `copts`,
   111         *          etc.
   112         *
   113         *  @field(releases)  This array contains releases that will contain the
   114         *          library.  Thus, a single library can be part of any set of
   115         *          releases.  Each library is always added to the package's
   116         *          "default release" in addition to any releases specified in
   117         *          the releases array.
   118         *
   119         *  @see #attrs
   120         *  @see xdc.bld.PackageContents#Attrs
   121         */
   122        struct Attrs {
   123            String  profile;    /*! target options profile */
   124            String  aopts;      /*! asm options for objects */
   125            String  copts;      /*! C/C++ options for objects */
   126            String  defs;       /*! definitions for added objects */
   127            String  incs;       /*! include options for objects */
   128            String  aropts;     /*! library-specific archiver options */
   129            String  suffix;     /*! optional suffix of library name; e.g.,".lib" */
   130            Bool    exportSrc;  /*! if true, export library sources to releases */
   131            Release.Instance releases[];  /*! releases this library is a part of */
   132        };
   133
   134    instance:
   135        /*!
   136         *  ======== create ========
   137         *  @_nodoc
   138         *  Instances should only be created via PackageContents.addLibrary()
   139         */
   140        create();
   141
   142        /*!
   143         *  ======== name ========
   144         *  The base name of the library.
   145         *
   146         *  This name names a sub-directory in the package directory that
   147         *  contains all the object files and archives created for each of the
   148         *  targets specified.
   149         *
   150         *  The name of each library is `<name>/<name>.a<target_suffix>`, where
   151         *  `<name>` is the base name and `<target_suffix>` is the suffix property
   152         *  of the target for which the library is built.  For example, one is
   153         *  building a `"hello"` library for big endian C62 the library's file
   154         *  name is "`hello/hello.a62e`"
   155         */
   156        config String name;
   157
   158        /*!
   159         *  ======== target ========
   160         *  The target used to build objects added to this library.
   161         */
   162        config ITarget.Module target;
   163
   164        /*!
   165         *  ======== attrs ========
   166         *  This library's optional attributes.
   167         *
   168         *  These attributes are "inherited" by all objects added to this
   169         *  library; i.e., any object attribute that is undefined but is
   170         *  defined here will be assigned the value from these attributes.
   171         *
   172         *  Similarly, any unspecified attributes that also appear in
   173         *  `{@link xdc.bld.PackageContents#Attrs}` are inherited from
   174         *  `{@link xdc.bld.PackageContents#attrs}`.
   175         *
   176         *  @see xdc.bld.PackageContents#Attrs
   177         */
   178        config Library.Attrs attrs;
   179
   180        /*!
   181         *  ======== addObjects ========
   182         *  Add specified object to be built and archived into this library.
   183         *
   184         *  Examples
   185         *
   186         *      1. Locate a source file whose name starts with "fir" with
   187         *      an extension supported by the library's target, compile it
   188         *      and add to the library lib:
   189         *      @p(code)
   190         *          lib.addObjects(["fir"]);
   191         *      @p
   192         *      If fir.c exists compile and add to lib, if fir.asm exists
   193         *      assemble and add to lib, etc.  If no such file is located,
   194         *      an warning is emitted.
   195         *
   196         *      2. Compile `fir.c` and `iir.c` and add to the library `lib`:
   197         *      @p(code)
   198         *          lib.addObjects(["fir.c", "iir.c"]);
   199         *      @p
   200         *      3. Names may include sub-directory prefixes.  In this case, the
   201         *      source will be located in a sub-directory of the current
   202         *      package.  The following statement declares that the file
   203         *      "`foo/fir.c`" should be compiled and added to the library
   204         *      `lib`:
   205         *      @p(code)
   206         *          lib.addObjects(["foo/fir.c"]);
   207         *      @p
   208         *      As in the previous examples, the extension ".c" is optional.
   209         *      In case an extension is not supplied, each extension
   210         *      understood by the target will be tried until a source file
   211         *      is located.
   212         *
   213         *      4. It is also possible to supply file specific compilation
   214         *      options.
   215         *      @p(code)
   216         *          lib.addObjects(["fir.c", "iir.c"], {defs: "-D_DEBUG"});
   217         *      @p
   218         *      In this case, both files `fir.c` and `iir.c` will be compiled
   219         *      with the "`-D_DEBUG`" flag.  Any setting of `attrs.defs` in the
   220         *      library or package is overridden by this definition.
   221         *
   222         *  @param(names)       array of base names of the sources of object files
   223         *                      to be created and archived into the library.
   224         *                      See NOTE in `{@link xdc.bld}` for filename rules.
   225         *
   226         *  @param(objAttrs)    optional `{@link Object#Attrs}` for the array of
   227         *                      objects added; all objects named by `names` will be
   228         *                      given the attributes `objAttrs`.
   229         *
   230         *  @a(returns)         `void`
   231         *
   232         *  @a(throws)          `Error` exceptions are thrown for fatal errors
   233         *
   234         */
   235        Void addObjects(String names[], Object.Attrs objAttrs = {});
   236    }
   237    /*
   238     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   239     */
   240


module xdc.bld.Manifest

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.bld;
    13
    14    /*!
    15     *  ======== Manifest ========
    16     *  The manifest object for the release file post-processing model
    17     *
    18     *  Each package release corresponds to an archive of a subset of the
    19     *  development package's contents.  The contents of each release are
    20     *  specified by an instance of the `{@link Release}` module.  Each instance
    21     *  of the `Release` module can optionally specify a "release script" that
    22     *  can modify each file prior to it being added to the archive.  This script
    23     *  runs in the context of the "release file post-processing" model.
    24     *
    25     *  This module is the root of the "release file post-processing" model.
    26     *  Each file in a release may be optionally post-processed by a filter
    27     *  specified in `{@link #filterMap}.`  Other fields of this module provide
    28     *  a release-specific "context" for the operation of the filters.  For
    29     *  example, a filter may use `{@link #packageName}`, `{@link #releaseName}`,
    30     *  and `{@link #buildCount}` to prefix all C sources with comments that
    31     *  identify where they originated.
    32     *
    33     *  All the fields of this module (except `{@link #filterMap}`) are initialized
    34     *  before a "release script" is run.  After the release script completes,
    35     *  the release archive is created according to the filters specifed in
    36     *  `{@link #filterMap}`.  Files that have no filter are copied without
    37     *  modification into the release.
    38     */
    39    metaonly module Manifest {
    40
    41        /*!
    42         *  ======== Filter ========
    43         *  A file filter descriptor
    44         *
    45         *  @field(operation)  a JavaScript function that filters the specified
    46         *      input file and puts the results in specified output file; it is
    47         *      the output file that is archived as part of the release (not the
    48         *      input file).
    49         *
    50         *      The operation is called as follows:
    51         *      @p(code)
    52         *          operation(filter, src, dst, base)
    53         *      @p
    54         *      where:
    55         *      @p(dlist)
    56         *        -`filter`
    57         *              the filter object associated with the file being
    58         *              processed (which specified `operation` as the function
    59         *              to call)
    60         *        -`src`
    61         *              input file name (relative to the current working
    62         *              directory)
    63         *        -`dst`
    64         *              output file name (relative to the current working
    65         *              directory)
    66         *        -`base`
    67         *              string name of the file as it appears in the array
    68         *              `Manifest.files`; unlike `dst`, it does not contain a
    69         *              temporary directory name prefix.
    70         *
    71         *  @field(args)  array of arbitrary arguments passed to `operation`
    72         *      (as a field of the filter object passed as the first argument to
    73         *      `operation`)
    74         *
    75         *  @field(newFileName) the new name of the output file relative to the
    76         *      top of the archive.  Normally this name should include the
    77         *      package's name but, in situations where a release must support a
    78         *      non-RTSC conformant physical design, `newFileName` can be anything.
    79         *
    80         *  @field(newFileMode) the access permissions of the output file.
    81         *      Normally the file will have the access permissions that exist at
    82         *      the time archive is created.  However, there may be times when
    83         *      the developer wants/needs to make a file readonly that is (for
    84         *      development purposes) writable.  Only two modes are supported "r"
    85         *      (readonly) and "rw" (readable and writable).
    86         *
    87         *  @see #filterMap
    88         */
    89        struct Filter {
    90            any         operation;      /*! the JavaScript function to run */
    91            any         args[];         /*! additional arguments for operation */
    92            String      newFileName;    /*! the new file name */
    93            String      newFileMode;    /*! either "r" or "rw" */
    94        }
    95
    96        /*!
    97         *  ======== compatibilityKey ========
    98         *  The released package's compatibility key
    99         *
   100         *  This string contains the value declared in the package's `package.xdc`
   101         *  specification file.
   102         *
   103         *  @a(readonly)  This value is initialized before the release script or
   104         *                any of its filters are run and should not be modified.
   105         */
   106        config String compatibilityKey;
   107
   108        /*!
   109         *  ======== buildCount ========
   110         *  A unique build count for the released package.
   111         *
   112         *  This string contains is a decimal number that increments at least
   113         *  once every time the package is released.  This string together with
   114         *  the compatibility key forms a unique version number for the package.
   115         *
   116         *  @a(readonly)  This value is initialized before the release script or
   117         *                any of its filters are run and should not be modified.
   118         */
   119        config String buildCount;
   120
   121        /*!
   122         *  ======== packageName ========
   123         *  The released package's name
   124         *
   125         *  This string contains the value declared in the package's `package.xdc`
   126         *  specification file.
   127         *
   128         *  @a(readonly)  This value is initialized before the release script or
   129         *                any of its filters are run and should not be modified.
   130         */
   131        config String packageName;
   132
   133        /*!
   134         *  ======== releaseName ========
   135         *  The release's name
   136         *
   137         *  This string contains the value declared in the package's `package.bld`
   138         *  build script; it is the name of the output archive without the
   139         *  "`.tar`" extension.
   140         *
   141         *  @a(readonly)  This value is initialized before the release script or
   142         *                any of its filters are run and should not be modified.
   143         */
   144        config String releaseName;
   145
   146        /*!
   147         *  ======== files ========
   148         *  An array of files in the release
   149         *
   150         *  The file names in this array include the package's name; i.e.,
   151         *  these names are relative to the package's repository rather than
   152         *  the package's build directory.
   153         *
   154         *  This value is initialized before the release script or any of its
   155         *  filters are run, and it contains the the names of the files specified
   156         *  directly or indirectly by the package's build script.
   157         *
   158         *  By default, this list does not contain all files in this package
   159         *  release, it excludes files that are commonly copied verbatim into
   160         *  the release (see below).  To get the complete list you must call
   161         *  `{@link #getAllFiles Manifest.getAllFiles}`.
   162         *
   163         *  The excluded files are those that are indirectly included either via
   164         *  @p(blist)
   165         *      - a directory named in `{@link PackageContents#otherFiles}` or
   166         *        `{@link Release#otherFiles}`,
   167         *      - a repository added via `{@link PackageContents#addRepository}`,
   168         *        or
   169         *      - the documentation directory named by
   170         *        `{@link PackageContents#docDir}`
   171         *  @p
   172         *
   173         *  It is possible to remove files from a release by removing it from
   174         *  this array; only files in this array or that are in the specified
   175         *  verbatim directories, the directories named above, will appear in
   176         *  the release.  To remove files that are in any of these directories
   177         *  use `{@link #getAllFiles Manifest.getAllFiles}` to re-initialize
   178         *  `files` so that it contains all of the release's files, then
   179         *  selectivly remove the files from this array.
   180         *
   181         *  It is also possible to add files to a release by adding files to
   182         *  this array.  In fact, files added to the release can be generated
   183         *  by the filter operation specified for the file in
   184         *  `{@link #filterMap}`.  However, since these files are only present
   185         *  in releases of a  package (they are not built as part of the normal
   186         *  build of `all` files and only appear in installed releases of a
   187         *  package), packages that must be built as part of building this
   188         *  release should not refer to these files.
   189         */
   190        config String files[];
   191
   192        /*!
   193         *  ======== filterMap ========
   194         *  A map of filters for each file in the release
   195         *
   196         *  This map is indexed by the name of the file (as it appears in the
   197         *  `{@link #files}` array) in the release and defines for each file a
   198         *  filter that is applied to the file before it is archived in a
   199         *  release.
   200         *
   201         *  @a(example)  The following script fragment illustrates how one can
   202         *  filter all *.c files in a release through a custom JavaScript
   203         *  function named `copyright`.
   204         *      @p(code)
   205         *      function copyright(args, ...) { ...}
   206         *
   207         *      for (var i = 0; i < Manifest.files.length; i++) {
   208         *          var fileName = Manifest.files[i];
   209         *          if (fileName.match(/\.c$/) != null) {
   210         *              Manifest.filterMap[fileName] = {operation: copyright};
   211         *          }
   212         *      }
   213         *      @p
   214         *
   215         *  @see #files
   216         */
   217        config Filter filterMap[string];
   218
   219        /*!
   220         *  ======== getAllFiles ========
   221         *  Read the entire release manifest into the Manifest.files array
   222         *
   223         *  This function re-reads the release's manifest into the
   224         *  `Manifest.files` array but only excludes the directories whose
   225         *  names appear in the `String` array `verbatimDirs`.
   226         *
   227         *  @param(verbatimDirs)    array of strings naming directories relative
   228         *                          to the package's base directory.  Each
   229         *                          directory named in this array (and all the
   230         *                          files and sub-directories it contains) is
   231         *                          excluded from the `Manifest.files` array and
   232         *                          is automatically added to the release without
   233         *                          change.
   234         *
   235         *                          If this array is `null` or empty, all files
   236         *                          in the release are read into the
   237         *                          `Manifest.files` array.
   238         */
   239        Void getAllFiles(String verbatimDirs[]);
   240    }
   241    /*
   242     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   243     */
   244


module xdc.bld.Object

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Object.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== Object ========
    19     *  Model of a compiled (or assembled) form of a source file.
    20     *
    21     *  Instances of this module represent object files.  Instances must be
    22     *  created via either the `{@link xdc.bld.Library#addObjects()}` or
    23     *  `{@link xdc.bld.Executable#addObjects()}` functions; this ensures that each
    24     *  object file created appears in the package's manifest and that it
    25     *  properly "inherits" appropriate default attributes from the containing
    26     *  library or executable.
    27     */
    28    metaonly module Object {
    29        /*!
    30         *  ======== Attrs ========
    31         *  Optional attributes for an Object instance
    32         *
    33         *  Unspecified attributes are "inherited" from
    34         *  `{@link xdc.bld.Executable#Attrs}`
    35         *  (`{@link xdc.bld.Library#Attrs}`) if this Object is added to an
    36         *  `{@link xdc.bld.Executable}` (`{@link xdc.bld.Library}`); i.e., if one
    37         *  of fields in this structure is unspecified *and* this field's name
    38         *  matches a field name in `{@link xdc.bld.Executable#attrs}`,
    39         *  then this field's value defaults to the value in specified by
    40         *  `{@link xdc.bld.Executable#attrs}`.  This mechanism makes it possible
    41         *  to establish executable-wide default value for any of the "inherited"
    42         *  attributes.
    43         *
    44         *  Suppose, for example, that you want all object files in this package
    45         *  to be build with the '`-o4`' optimization flag, but one particular file
    46         *  must be built with '`-o2`' (because the optimizer has a bug that it
    47         *  causes it to fail on this file).  The following build script fragment
    48         *  shows how this can be accomplished:
    49         *  @p(code)
    50         *      var exe = Pkg.addExecutable(..., {copts: '-o4'});
    51         *      exe.addObjects(['complex'], {copts: '-o2'});
    52         *      exe.addObjects(['foo', 'bar', ...]);
    53         *  @p
    54         *  Since many `Executable.attrs` are "inherited" from
    55         *  `{@link xdc.bld.PackageContents#attrs}`, it is also possible to
    56         *  establish package-wide default for these attributes.
    57         *
    58         *  @field(profile)  This string names a profile defined by the
    59         *          target used to produce the object file.  The profile
    60         *          specifies a set of compiler and assembler options that are
    61         *          to be used when producing the object.  Note that these tool
    62         *          options are in addition to any options specified via aopts,
    63         *          copts, etc.
    64         *
    65         *  @field(incs)  This string contains include path options used by
    66         *          the compiler (or assembler) to locate include files; e.g.,
    67         *          "`-I ../../include -I ../c55xx`".  Note that the syntax of
    68         *          this string may be target dependent.
    69         *
    70         *  @field(defs)  This string contains options used by the
    71         *          compiler (or assembler) to define macros; e.g.,
    72         *          "`-D_C6xxx -DDEBUG=1`".  Note that the syntax of
    73         *          this string may be target dependent.
    74         *
    75         *  @field(aopts)  This string contains options used by the assembler
    76         *          to produce object files; e.g., "`-mP1`".  Note that the syntax
    77         *          of this string may be target dependent.
    78         *
    79         *  @field(copts)  This string contains options used by the C/C++
    80         *          compiler to produce object files; e.g., "`-o3 -mi1`".  Note
    81         *          that the syntax of this string may be target dependent.
    82         *
    83         *  @field(preBuilt) If equal to `true`, this Boolean flag indicates
    84         *          that this object does not need to be built from sources; e.g.,
    85         *          it has been pre-built and delivered as a binary file without
    86         *          sources or some custom rule already built this object file.
    87         *          For pre-built objects, no rule will be created to remove the
    88         *          file as part of a package clean operation, the relative path
    89         *          to the file must be fully specified, and all other Object
    90         *          attributes are ignored.
    91         *
    92         *  @see #attrs
    93         *  @see xdc.bld.PackageContents#Attrs
    94         *  @see xdc.bld.Library#Attrs
    95         *  @see xdc.bld.Executable#Attrs
    96         */
    97        struct Attrs {
    98            String profile; /*! target options profile */
    99            String aopts;   /*! asm options for this object */
   100            String copts;   /*! C/C++ options for this object */
   101            String defs;    /*! definitions for this object */
   102            String incs;    /*! include options for this object */
   103            Bool   preBuilt;/*! don't create a rule to generate this file */
   104        };
   105
   106    instance:
   107        /*!
   108         *  ======== create ========
   109         *  @_nodoc
   110         *  Instances should only be created via Executable.addObjects()
   111         */
   112        create();
   113
   114        /*!
   115         *  ======== name ========
   116         *  The base name of the object file.
   117         *
   118         *  This name is passed as the name field of the
   119         *  `{@link xdc.bld.ITarget#CompileGoal}`.  The object file's name is
   120         *  composed as follows:
   121         *  @p(code)
   122         *      <name>.o<target_suffix>
   123         *  @p
   124         *  where `<name>` is name and `<target_suffix>` is the suffix defined
   125         *  by each target that the file is built for.
   126         */
   127        config String name;
   128
   129        /*!
   130         *  ======== attrs ========
   131         *  This instance's attributes.
   132         *
   133         *  These attributes (unless otherwise specified) are "inherited" from
   134         *  the container object that contains this instance.
   135         *
   136         *  @see xdc.bld.PackageContents#Attrs
   137         *  @see xdc.bld.Executable#Attrs
   138         *  @see xdc.bld.Library#Attrs
   139         */
   140        config Object.Attrs attrs;
   141    }
   142    /*
   143     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   144     */
   145


package xdc.bld

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.services.global;
    13    requires xdc.services.intern.cmd;
    14
    15    /*!
    16     *  ======== xdc.bld ========
    17     *  The XDC Build Model
    18     *
    19     *  This package contains the XDC Build Model and the interfaces necessary
    20     *  to extend the Build Model to handle new compiler tool chains.  The
    21     *  modules in this package (and the instances managed by these modules)
    22     *  form the Build Object Model (BOM).
    23     *
    24     *  This model enables build scripts to declare the contents of each release
    25     *  of a package.  Based on these manifests, the Build Engine generates
    26     *  makefiles that build the specified object files, libraries, and
    27     *  executables, and archive these files into specified release files.  In
    28     *  addition, the generated makefiles are also capable of running collections
    29     *  of executables with command line arguments (provided that the platforms
    30     *  support this); e.g., regression tests.
    31     *
    32     *  @a(NOTE) User supplied file names of source files, generated libraries and
    33     *           executables must be limited to portable POSIX file names. That
    34     *           means that only alphanumeric charaters, and '_', '.', and '-'
    35     *           are allowed.
    36     *
    37     *  @a(throws)
    38     *  `XDCException` exceptions are thrown for fatal errors. The following error
    39     *  codes are reported in the exception message:
    40     *
    41     *   @p(dlist)
    42     *      -  `xdc.bld.TARGET_CONFIG_ERROR`
    43     *           This error is reported whenever there is an  error in
    44     *           the target configuration file. Check the configuration script
    45     *           for errors.
    46     *      -  `xdc.bld.ROOTDIR_NOT_SET`
    47     *           This error is reported when the `rootDir` property for a target
    48     *           has not been set in the target configuration script. Ensure
    49     *           that this property is set correctly in the configuration
    50     *           script.
    51     *      -  `xdc.bld.PLATFORM_NOT_SET`
    52     *           This error is reported when either 1) the `platform` property for
    53     *           a target has not been set in the target specification or the
    54     *           target configuration script (config.bld) or 2) the build script
    55     *           (package.bld) is setting the platform for a program to an
    56     *           invalid value.
    57     *      -  `xdc.bld.DUPLICATE_TARGET_ERROR`
    58     *           This error is reported when a same target is listed twice in
    59     *           `Bld.targets`. Check `{@link xdc.bld.BuildEnvironment#targets}`
    60     *           to find out how `Bld.targets` is constructed.
    61     */
    62    package xdc.bld [1, 0, 2] {
    63
    64        /* interfaces to code gen tool chains (used by build engine) */
    65        interface ITarget, ITarget2, ITarget3;
    66
    67        /* interface to user-supplied extensions that filter target commands */
    68        interface ITargetFilter;
    69
    70        /* global build environment read by a build script */
    71        module    BuildEnvironment;
    72
    73        /* package contents container populated by a build script */
    74        module    PackageContents;
    75
    76        /* objects that can be added to the PackageContents container */
    77        module    Release;
    78        module    Library;
    79        module    Test;
    80        module    Object;
    81        module    Executable;
    82        module    Repository;
    83        module    Assembly, Configuration;
    84        module    Script;
    85
    86        /* each release has an optional script to post-process files
    87         * listed in a Manifest */
    88        module    Manifest;
    89
    90        /* misc utils to simplify target development (ITarget implementations) */
    91        module    Utils;
    92    }
    93    /*
    94     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    95     */
    96


module xdc.bld.PackageContents

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== PackageContents.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== PackageContents ========
    19     *  Package container populated by a build script.
    20     *
    21     *  This module defines the `PackageContents` object (aliased as `Pkg` in
    22     *  build scripts) which represents the contents of a package.  Build scripts
    23     *  add to this package using the add* methods defined below.
    24     *
    25     *  In addition to the items added by the build script, every package has at
    26     *  least one release, the default release.  If the {@link #defaultRelease}
    27     *  configuration parameter is not set, a default release will be
    28     *  implicitly created.
    29     *
    30     *  Every library, executable, and repository added to the package is
    31     *  automatically added to the default release.
    32     *
    33     */
    34    metaonly module PackageContents {
    35        /*!
    36         *  ======== Attrs ========
    37         *  Package-level attributes.
    38         *
    39         *  These attributes provide package-level defaults for attributes that
    40         *  provide control over the code generation tools, the configuration
    41         *  tool, and release options.
    42         *
    43         *  @field(profile)  This string names a profile defined by the
    44         *          executable's target.  A profile specifies a set of compiler,
    45         *          linker, and archiver options that are to be used when
    46         *          compiling and linking code.  Note that these tool options are
    47         *          in addition to any options specified via `aopts`, `copts`,
    48         *          etc.
    49         *
    50         *          If this field is not specified or set to `null`, the
    51         *          `"release"` profile will be used.
    52         *
    53         *  @field(incs)  This string contains include path options used by
    54         *          the compiler (or assembler) to locate include files; e.g.,
    55         *          "`-I ../../include -I ../c55xx`".  Note that the syntax of
    56         *          this string may be target dependent.
    57         *
    58         *  @field(defs)  This string contains options used by the
    59         *          compiler (or assembler) to define macros; e.g.,
    60         *          "`-D_C6xxx -DDEBUG=1`".  Note that the syntax of
    61         *          this string may be target dependent.
    62         *
    63         *  @field(aopts)  This string contains options used by the assembler
    64         *          to produce object files; e.g., "`-mP1`".  Note that the syntax
    65         *          of this string may be target dependent.
    66         *
    67         *  @field(copts)  This string contains options used by the C/C++
    68         *          compiler to produce object files; e.g., "`-o3 -mi1`".  Note
    69         *          that the syntax of this string may be target dependent.
    70         *
    71         *  @field(cfgcopts)  This string contains options used by the C/C++
    72         *          compiler to compile the generated C config file. If `cfgopts`
    73         *          is not specified, the options specified in `copts` are
    74         *          used instead.
    75         *
    76         *  @field(lopts)  This string contains options used by the linker
    77         *          produce object files; e.g., "`-l mylib.lib`".  Note
    78         *          that the syntax of this string may be target dependent.
    79         *
    80         *  @field(xsopts)  This string contains options passed to the
    81         *          `{@link http://rtsc.eclipse.org/docs-tip/Command_-_xs xs}`
    82         *          command that's used to run configuration scripts.  This option
    83         *          can be used, for example, to define name-value pairs accessible
    84         *          to configuration scripts via the XDCscript global
    85         *          `environment` hash-table.  For example, setting `xsopts` to
    86         *          `"-DFOO=bar"` enables the configuration script to get the
    87         *          value of `FOO` via the expression `environment["FOO"]`.  For
    88         *          more information about XDCscript and `environment` see
    89         *          {@link http://rtsc.eclipse.org/docs-tip/The_XDCscript_Language The XDCscript Language}.
    90         *
    91         *  @field(exportCfg)  If this field is set to `true`,  configuration
    92         *          scripts will, by default, be part of the releases created
    93         *          by this package.
    94         *
    95         *  @field(exportDoc)  If this field is set to `true`,  generated
    96         *          documentation will, by default, be part of the releases
    97         *          created by this package.
    98         *
    99         *  @field(exportSrc)  If this field is set to `true`, the sources
   100         *          used to build this package will, by default, be part of the
   101         *          releases created by this package.
   102         *
   103         *  @field(exportExe)  If this field is set to `true`, the executables
   104         *          created in this package will, by default, be part of the
   105         *          releases created by this package.
   106         *
   107         *  @field(exportAll)  If this field is set to true, all files
   108         *          in this package that are not known to be generated are in
   109         *          the release.  If it is unspecified (or set to `null`) these
   110         *          files will not be added to this release. See
   111         *          `{@link xdc.bld.Release#Attrs}` for more information about
   112         *          this option.
   113         *
   114         *  @field(relScript)  If this field is non-`null`, the string names a
   115         *          "release script" that is run to post-process the
   116         *          files that are part of a release.  Like configuration scripts,
   117         *          the string names a script file that is searched for first in
   118         *          the in package's base directory, and then along the package
   119         *          path.
   120         *
   121         *  @field(relScriptArgs)  If this field is non-`null`, the string is
   122         *          used to initialize the `arguments[]` array which is
   123         *          accessible to the release script named by `relScript`.  The
   124         *          elements of the `arguments[]` array are formed from the white
   125         *          space separated elements of `relScriptArgs`.  If this string
   126         *          is `null` or empty, the `arguments[]` array has length `0`.
   127         *
   128         *  @field(compress) If this field is set to `true`, the package release
   129         *          archive files will be, by default, compressed; otherwise, the
   130         *          archives will not be compressed
   131         *
   132         *  @field(archiver) This field names the archiver to use when creating a
   133         *          release.  Two archivers are currently supported:
   134         *          "tar" and "zip".  If the archiver is set to "zip"
   135         *          the `{@link #Attrs.compress}` field is implicitly set to
   136         *          `true`.
   137         *
   138         *  @see #attrs
   139         */
   140        struct Attrs {
   141            String  profile;    /*! select appropriate `ITarget.OptionSet` */
   142            String  aopts;      /*! assembly language options */
   143            String  copts;      /*! C/C++ compiler options */
   144            String  cfgcopts;   /*! C/C++ compiler options for the C config file */
   145            String  defs;       /*! -D options common to C/C++/asm */
   146            String  incs;       /*! -I options common to C/C++/asm */
   147            String  xsopts;     /*! xs options */
   148            String  lopts;      /*! linker options */
   149            Bool    exportDoc;  /*! if `true`, export generated docs */
   150            Bool    exportExe;  /*! if `true`, export executables */
   151            Bool    exportCfg;  /*! if `true`, export program cfg scripts */
   152            Bool    exportSrc;  /*! if `true`, export all package sources */
   153            Bool    exportAll;  /*! if `true`, export all non-gen'd files */
   154            String  relScript;  /*! release files post-processing script */
   155            String  relScriptArgs;  /*! optional arguments to relScript */
   156            Bool    compress;   /*! if `true`, compress package release archives */
   157            String  archiver;   /*! "tar" or "zip"; defaults to "tar" */
   158        };
   159
   160        /*!
   161         *  ======== attrs ========
   162         *  Package attributes.
   163         *
   164         *  These attributes are "inherited" by all executables and libraries
   165         *  added to this package set.
   166         *
   167         *  @see xdc.bld.Executable#attrs
   168         *  @see xdc.bld.Library#attrs
   169         */
   170        config PackageContents.Attrs attrs;
   171
   172        /*!
   173         *  ======== cfgDir ========
   174         *  The directory where all intermediate program files are placed.
   175         *
   176         *  During configuration, several files are generated (a C++ source file,
   177         *  a linker command file, etc.)  these generated files are placed in
   178         *  the directory specified by this parameter.
   179         */
   180        config String cfgDir = "package/cfg/";
   181
   182        /*!
   183         *  ======== docDir ========
   184         *  The directory where generated docs are placed.
   185         *
   186         *  If set to a non-`null` value, package documentation will be
   187         *  automatically generated and placed in this directory.  If
   188         *  it is not set or set to `null`, no docs will be generated for
   189         *  this package.
   190         *
   191         *  If you set `{@link #Attrs exportDoc}` or `{@link #Attrs exportAll}`
   192         *  to `true` the generated docs will be included in the appropriate
   193         *  releases of the package.
   194         */
   195        config String docDir;
   196
   197        /*!
   198         *  ======== imports ========
   199         *  An array of required packages (and their version) for this package
   200         *
   201         *  @a(readonly) This parameter is an array of all prerequisite packages
   202         *  required by this package.  Each string is of the form:
   203         *      @p(code)
   204         *          <packageName>{<packageCompatibilityKey>
   205         *      @p
   206         *  where `<packageName>` is the name of the required package and
   207         *  `<packageCompatibilityKey>` is the compatibility key specified in the
   208         *  `requires` statement of this package.  If no compatibility key is
   209         *  specified in `package.xdc`, `<packageCompatibilityKey>` is "".
   210         *
   211         *  If the package specifies that a requirement is "internal", the
   212         *  package name is prefixed with a '*' character.  In other words, the
   213         *  string is of the form:
   214         *      @p(code)
   215         *          *<packageName>{<packageCompatibilityKey>
   216         *      @p
   217         */
   218        config String imports[];
   219
   220        /*!
   221         *  ======== libDir ========
   222         *  The directory where all intermediate library directories are placed.
   223         *
   224         *  Each object file for a library is placed in a sub-directory of this
   225         *  directory that has a name that matches the name specified in the
   226         *  `{@link #addLibrary()}` function.
   227         */
   228        config String libDir = "package/lib/";
   229
   230        /*!
   231         *  ======== libTemplate ========
   232         *  Template of a common C-file archived into every library
   233         *
   234         *  This template can be used to embed package-specific meta-information
   235         *  into each library produced by the package.  For example, it can be
   236         *  used to add package version information to each library.
   237         *
   238         *  This template is expanded just once in the Build model during
   239         *  makefile generation.  Thus, the contents of the resulting C-file can
   240         *  not be library specific.
   241         *
   242         *  The template is found using `xdc.findFile()` and, as a result,
   243         *  `libTemplate` may refer to a template in either the current package
   244         *  or even in another package.
   245         *
   246         *  During expansion of the template, the `this` pointer is the
   247         *  `PackageContents` module object; i.e., the object that the global
   248         *  variable `Pkg` references.
   249         *
   250         *  The expanded template may refer to the following pre-defined macros:
   251         *  @p(dlist)
   252         *      - `__xdc_PKGVERS`
   253         *          the package compatibility key declared in package.xdc; e.g.
   254         *          "`1, 2, 3`"
   255         *      - `__xdc_PKGNAME`
   256         *          the package's name; e.g., `xdc.bld`
   257         *      - `__xdc_PKGPREFIX`
   258         *          the package's prefix; e.g., for the package `xdc.bld` the
   259         *          prefix would be `xdc_bld_`
   260         *  @p
   261         */
   262        config String libTemplate = null;
   263
   264        /*!
   265         *  ======== relDir ========
   266         *  The directory where all intermediate release files are placed.
   267         *
   268         *  Release specific files for a release are placed in a sub-directory of
   269         *  this directory that has a name that matches the name specified in the
   270         *  `{@link #addRelease()}` function.
   271         */
   272        config String relDir = "package/rel/";
   273
   274        /*!
   275         *  ======== producerId ========
   276         *  Producer ID string
   277         *
   278         *  The value of this string is embedded in every release of this
   279         *  package and can serve as a way to "map" this package to a unique ID
   280         *  that the producer uses to locate, within their SCM system, the
   281         *  original sources required to create and maintain this package.
   282         *
   283         *  This string is retained and may by displayed by various tools, but
   284         *  it is uninterpreted by the XDCtools.
   285         */
   286        config String producerId;
   287
   288        /*!
   289         *  ======== version ========
   290         *  The package version string.
   291         *
   292         *  @a(readonly) This parameter is a version string that comes from the
   293         *  `package.xdc` specification.
   294         */
   295        config String version;
   296
   297        /*!
   298         *  ======== interfaces ========
   299         *  An array of interface names provided by this package.
   300         *
   301         *  @a(readonly) This parameter is an array of all interface names
   302         *  defined by this package.
   303         */
   304        config String interfaces[];
   305
   306        /*!
   307         *  ======== makePrologue ========
   308         *  String to add to the beginning of the generated makefile.
   309         *
   310         *  This string is placed at the very beginning of the package's
   311         *  generated makefile.  This allows one to extend the build
   312         *  environment using any facility available to GNU make.
   313         */
   314        config String makePrologue = "";
   315
   316        /*!
   317         *  ======== makeEpilogue ========
   318         *  String to add to the end of the generated makefile.
   319         *
   320         *  Similar to makePrologue except that this string is placed at
   321         *  the very end of the generated makefile.
   322         */
   323        config String makeEpilogue = "";
   324
   325        /*!
   326         *  ======== defaultRelease ========
   327         *  The default release for this package.
   328         *
   329         *  If this configuration parameter is defined, it is taken to be the
   330         *  default release instance; otherwise a default instance is created
   331         *  with the appropriate defaults.
   332         *
   333         *  If this release's `label` attribute is `undefined` or `null`, it is
   334         *  set to `"default"` before the release is generated; otherwise the
   335         *  label attribute is unchanged from what the user specified for this
   336         *  instance.
   337         *
   338         *  The implicitly created default release is created as follows:
   339         *  @p(code)
   340         *      PackageContents.addRelease(name, {label: "default"})
   341         *  @p
   342         *  where `name` is the package's name with all '.'s replaced with '_'.
   343         */
   344        config Release.Instance defaultRelease;
   345
   346        /*!
   347         *  ======== releasePrefix ========
   348         *  A prefix appended to the name of each release archive.
   349         *
   350         *  This configuration parameter allows one to generate release archives
   351         *  somewhere other than inside the package being built.  `releasePrefix`
   352         *  is prepended to the name of the release name to form the name of the
   353         *  release archive.
   354         *
   355         *  For example, setting `releasePrefix` to `"../"` implies that a
   356         *  release named `"exports/foo"` generates an archive file named
   357         *  `foo.tar` in the directory `"../exports"`.
   358         *
   359         * `releasePrefix` must either begin with the '^' character or be a
   360         *  relative path that is relative to the package's "base" directory;
   361         *  i.e., the directory containing the package's specification file
   362         *  `package.xdc`.
   363         *
   364         *  If `releasePrefix` begins with the '^' character, the remainder of
   365         *  the string is treated as though it is relative to the package's
   366         *  repository.  In effect, the '^' character is replaced with an
   367         *  appropriate number of '../' sequences to sufficient to navigate to
   368         *  the package's repository.
   369         *
   370         *  For example, suppose your packages are in a repository named `"src"`.
   371         *  Setting `releasePrefix` to `"^/../exports"` implies that a release
   372         *  named `"foo"` generates an archive file named `foo.tar` in the
   373         *  directory named `"exports"` which is a sibling of `"src"` - the
   374         *  package's repository.
   375         *
   376         *  This prefix can be overridden on a per release basis; see
   377         *  `{@link xdc.bld.Release#Attrs}`.
   378         *
   379         *  @a(note) If this parameter starts with `".."` or `"^"`, the resulting
   380         *  archive file will not be removed as part of a package clean.
   381         */
   382        config String releasePrefix = "";
   383
   384        /*!
   385         *  ======== modules ========
   386         *  An array of module names provided by this package.
   387         *
   388         *  @a(readonly) This parameter is an array of all module names
   389         *  implemented in this package.
   390         */
   391        config String modules[];
   392
   393        /*!
   394         *  ======== name ========
   395         *  Name of this package
   396         *
   397         *  @a(readonly) This parameter is the name of this package as
   398         *  specified by the `package.xdc` package specification file
   399         */
   400        config String name;
   401
   402        /*!
   403         *  ======== otherFiles ========
   404         *  Array of files to include this package.
   405         *
   406         *  This is an array of arbitrary file names that are to be included
   407         *  in the package.
   408         *
   409         *  Only those files that are not already directly (or indirectly)
   410         *  named by adding executables or libraries to this package set need
   411         *  to appear in this array.
   412         *
   413         *  @see #excludeDirs
   414         */
   415        config String otherFiles[];
   416
   417        /*!
   418         *  ======== excludeDirs ========
   419         *  List of directory base names to exclude
   420         *
   421         *  This is an array of arbitrary directory "base names" that should
   422         *  be excluded in this release of the package.  This list only
   423         *  excludes directories that would otherwise be added due to the
   424         *  recursive include of a parent directory.
   425         *
   426         *  For example, if a directory is specified in `{@link #otherFiles}`
   427         *  all of its sub-directories will be added unless those sub-directories
   428         *  are named in the `excludeDirs` list.
   429         *
   430         *  This list is often used to exclude "hidden" directories added by
   431         *  change control systems and IDEs (`.svn`, `.git`, `.settings`, ...).
   432         *
   433         *  @see #otherFiles
   434         *  @see Release#excludeDirs
   435         */
   436        config String excludeDirs[];
   437
   438        /*!
   439         *  ======== generatedFiles ========
   440         *  Array of generated files
   441         *
   442         *  This is an array of arbitrary file names that are to be removed
   443         *  during a clean of this package.  File names that end with the `'/'`
   444         *  character are assumed to be directories; in this case, the directory
   445         *  and all of its contents are removed during the clean.
   446         *
   447         *  Only those files that are not already directly (or indirectly)
   448         *  named by adding executables or libraries to this package set need
   449         *  to appear in this array.
   450         */
   451        config String generatedFiles[];
   452
   453        /*!
   454         *  ======== otherSrcs ========
   455         *  Array of source files to include this package.
   456         *
   457         *  Like otherFiles except that the file names listed here are to be
   458         *  post-processed by the xdc document preparation tools.  This array
   459         *  only needs to specify files that are not implicitly specified via
   460         *  any of the addObjects function; e.g., script files, hand-crafted
   461         *  headers, etc.
   462         */
   463        config String otherSrcs[];
   464
   465        /*!
   466         *  ======== packagePath ========
   467         *  This configuration parameter allows one to set the package
   468         *  path from within the build script.  This setting overrides
   469         *  the setting of `XDCPATH` either in the environment or on the
   470         *  command line.
   471         *
   472         *  @b(deprecated)  `XDCPATH` should be set on the command line or in
   473         *  the environment.  This avoids the confusion that will result from
   474         *  different package paths being used to generate the makefiles from
   475         *  the package path used to build other package contents.
   476         *
   477         *  @_nodoc this parameter should not be used!!!!!!
   478         */
   479        config String packagePath = null;
   480
   481        /*!
   482         *  ======== uses ========
   483         *  Array of directory suffixes used to locate files.
   484         *
   485         *  This array of directory suffixes is used to locate package files
   486         *  that are referenced (e.g., via #include) without the package name.
   487         *
   488         *  This array names package directory suffixes (found along the
   489         *  package path) that:
   490         *  @p(nlist)
   491         *      -  contain headers included by this package's sources which
   492         *         are included *without* using the package name, or
   493         *      -  contain JavaScript "import" files which are included (via
   494         *         `utils.importFile()`) *without* using the package name.
   495         *  @p
   496         *  This mechanism is used to support legacy code that does not
   497         *  explicitly name the package in the #include statements, and *only*
   498         *  affects the compiler's -I options (not the package path) and the
   499         *  configuration tool's import path (`config.importPath`).
   500         *
   501         *  Strings in the Pkg.uses array must not be absolute paths.  Each string
   502         *  in the Pkg.uses array must point to an existing directory that can be
   503         *  located along the package path.  The generated makefiles create an
   504         *  absolute path by simply appending the string from `uses[]` to each
   505         *  directory name in the package path until an existing directory is
   506         *  found.  The resulting absolute path is then passed to the compiler in
   507         *  a -I option, for example.
   508         *
   509         *  The directories named in this array may include sub-directories of
   510         *  any package in the package path.
   511         *
   512         *  The strings in this array should use '/' to separate directories;
   513         *  even on Windows systems.  Since Windows supports '/' as a directory
   514         *  separator, the use of '/' ensures host platform independence.
   515         *
   516         *  @a(Example)
   517         *      The following example allows sources in the current package to
   518         *      "`#include <tsk.h>`" and have the compiler find `tsk.h` in the
   519         *      sub-directory ti/bios/include which is contained in some repository
   520         *      named in the package path (`XDCPATH`):
   521         *      @p(code)
   522         *          var Pkg = xdc.useModule('xdc.bld.PackageContents');
   523         *          Pkg.uses = ["ti/bios/include", "ti/xdais/legacy"];
   524         *      @p
   525         */
   526        config String uses[];
   527
   528        /*!
   529         *  ======== addLibrary ========
   530         *  Add specified library to this package
   531         *
   532         *  The name of the library archive file is `<name>.a<target_suffix>`,
   533         *  where `<name>` is the name parameter (which may contain a directory
   534         *  prefix) and `<target_suffix>` is the suffix specified by the target
   535         *  parameter (`{@link xdc.bld.ITarget#suffix}`).
   536         *
   537         *  The individual objects of each library are located in the directory
   538         *  `<libDir>/<name>`, where `<name>` is the name parameter and `<libDir>`
   539         *  is the configurable parameter `{@link xdc.bld.PackageContents#libDir}`.
   540         *  Thus, the name parameter names *both* an archive file and a
   541         *  sub-directory (in `PackageContents.libDir`) that contains the objects
   542         *  in the archive.
   543         *
   544         *  @param(name)     library base name; this name is used to create
   545         *                   *both* an archive and a sub-directory in the
   546         *                   package's "libDir" directory which
   547         *                   will contain the target-specific object files.
   548         *                   See NOTE in `{@link xdc.bld}` for filename rules.
   549         *
   550         *  @param(target)   target (a module implementing the
   551         *                   `{@link xdc.bld.ITarget}` interface) for each built
   552         *                   object in the library
   553         *
   554         *  @param(libAttrs) optional `library` attributes object
   555         *                   (`{@link xdc.bld.Library#Attrs}`)
   556         *
   557         *  @a(returns)      Returns the `{@link xdc.bld.Library}` instance
   558         *                   object created.
   559         *  @a(throws)       `XDCException` exceptions are thrown for fatal
   560         *                    errors. The following error codes are
   561         *                    reported in the exception message:
   562         *                    @p(dlist)
   563         *                    -  `xdc.bld.INVALID_TARGET`
   564         *                       This error is reported when a package is being
   565         *                       built for an unknown target. Ensure that the
   566         *                       correct targets are mentioned in the package's
   567         *                       build script.
   568         *                    -  `xdc.bld.LIBRARY_EXISTS`
   569         *                        This error is reported when a package's build
   570         *                        script specifies multiple libraries with the
   571         *                        same name. Ensure that the names of the
   572         *                        libraries to be built are unique.
   573         *                    -  `xdc.bld.PARAMETER_MISMATCH`
   574         *                        This error is reported whenever parameters with
   575         *                        the wrong type  are passed to the method. Ensure
   576         *                        that the parameters passed have the right type.
   577         *
   578         *  @see xdc.bld.PackageContents#libDir
   579         *  @see xdc.bld.ITarget#suffix
   580         */
   581        Library.Instance addLibrary(String name, ITarget.Module target,
   582                                    Library.Attrs libAttrs = {});
   583
   584        /*!
   585         *  ======== addExecutable ========
   586         *  Add specified executable to this package.
   587         *
   588         *  The name of the executable file is `<name>.x<target_suffix>`,
   589         *  where `<name>` is the name parameter (which may contain a directory
   590         *  prefix) and `<target_suffix>` is the suffix specified by the target
   591         *  parameter (`{@link xdc.bld.ITarget#suffix}`).
   592         *
   593         *  This name is also used to create a sub-directory in the package's
   594         *  "cfgDir" directory (`{@link xdc.bld.PackageContents#cfgDir}`) to
   595         *  contain files generated for the benefit of creating the executable.
   596         *  Thus, the name parameter names *both* an executable file and a
   597         *  sub-directory (in `PackageContents.cfgDir`) that contains the objects
   598         *  linked into the executable.
   599         *
   600         *  When the executable is added to the package, a `{@link xdc.bld.Test}`
   601         *  is implicitly added to the executable; thus, every executable has at
   602         *  least one `Test`.  Attributes for this test can be specified via
   603         *  `exeAttrs`.
   604         *
   605         *  @param(name)     executable base name; this name is used to create
   606         *                   the file name of the output executable and has the
   607         *                   form:
   608         *                   @p(code)
   609         *                       <name>.x<suffix>
   610         *                   @p
   611         *                   where `<suffix>` is the suffix specified by
   612         *                   the target argument below.
   613         *                   See NOTE in `{@link xdc.bld}` for filename rules.
   614         *
   615         *  @param(target)   target (`{@link xdc.bld.ITarget}`) for each built
   616         *                   object linked into the executable.
   617         *
   618         *  @param(platform) string name of the platform; this is the name of a
   619         *                   platform package
   620         *
   621         *  @param(exeAttrs) optional executable attrs object
   622         *                   (`{@link xdc.bld.Executable#Attrs}`)
   623         *
   624         *  @a(returns)      Returns the `{@link xdc.bld.Executable}` instance
   625         *                   object created.
   626         *
   627         *  @a(throws)       `XDCException` exceptions are thrown for fatal
   628         *                    errors. The following error codes are
   629         *                    reported in the exception message:
   630         *                    @p(dlist)
   631         *                    -  `xdc.bld.INVALID_TARGET`
   632         *                       This error is reported when a package is being
   633         *                       built for an unknown target. Ensure that the
   634         *                       correct targets are mentioned in the package's
   635         *                       build script.
   636         *                    -  `xdc.bld.EXECUTABLE_EXISTS`
   637         *                       This error is reported when a package's build
   638         *                       script specifies multiple executables with the
   639         *                       same name. Ensure that the names of the
   640         *                       executables to be built are unique.
   641         *                    -  `xdc.bld.PARAMETER_MISMATCH`
   642         *                       This error is reported whenever parameters with
   643         *                       the wrong type  are passed to the method. Ensure
   644         *                       that the parameters passed have the right type.
   645         *
   646         */
   647        Executable.Instance addExecutable(String name, ITarget.Module target,
   648                            String platform, Executable.Attrs exeAttrs = {});
   649
   650        /*!
   651         *  ======== addRepository ========
   652         *  Add a repository to this package
   653         *
   654         *  A repository is a directory that contains packages.  Repositories are
   655         *  typically named in the user's XDCPATH environment variable and contain
   656         *  a set of packages that are managed as a group.
   657         *
   658         *  This method allows one to bundle several packages together into a
   659         *  single release (of the package that contains this repository).
   660         *
   661         *  @param(repositoryName)  name of a directory (relative to this
   662         *                          package's base) that will contain the packages
   663         *                          added via
   664         *                          `{@link xdc.bld.Repository#addPackages()}`
   665         *                          See NOTE in `{@link xdc.bld}` for filename
   666         *                          rules.
   667         *
   668         *  @param(repAttrs)        optional `Repository` attributes associated
   669         *                          with this repository (see
   670         *                          `{@link xdc.bld.Repository#Attrs}`)
   671         *
   672         *  @a(returns)             Returns the `{@link xdc.bld.Repository}`
   673         *                          instance object created.
   674         *
   675         *  @a(throws)       `XDCException` exceptions are thrown for fatal
   676         *                    errors. The following error codes are
   677         *                    reported in the exception message:
   678         *                    @p(dlist)
   679         *                    - `xdc.bld.REPOSITORY_EXISTS`
   680         *                      This error is reported whenever a package's build
   681         *                      script specifies multiple repositories with the
   682         *                      same name.  Ensure that the names of the
   683         *                      repositories specified in the build script are
   684         *                      unique.
   685         */
   686        Repository.Instance addRepository(String repositoryName,
   687                                          Repository.Attrs repAttrs = {});
   688
   689        /*!
   690         *  ======== addRelease ========
   691         *  Add specified release to this package
   692         *
   693         *  @param(name)    release base name; this name is used to create
   694         *                  the file name of the output file and has the
   695         *                  form:
   696         *                      <name>.tar
   697         *                  See NOTE in `{@link xdc.bld}` for filename rules.
   698         *
   699         *  @param(relAttrs) optional release attributes object
   700         *                   (`{@link xdc.bld.Release#Attrs}`)
   701         *
   702         *  @a(returns)     Returns the `{@link xdc.bld.Release}` instance object
   703         *                  created.
   704         *
   705         *  @a(throws)       `XDCException` exceptions are thrown for fatal
   706         *                    errors. The following error codes are
   707         *                    reported in the exception message:
   708         *                    @p(dlist)
   709         *                    - `xdc.bld.RELEASE_EXISTS`
   710         *                      This error is reported whenever a package's build
   711         *                      script specifies multiple releases with the same
   712         *                      name.  Ensure that the names of the releases
   713         *                      specified in the build script are unique.
   714         *                    - `xdc.bld.INVALID_RELEASE_PREFIX`
   715         *                      This error is reported whenever a release prefix
   716         *                      is specified by its absolute path in the package's
   717         *                      build script.  The release prefix has to be
   718         *                      relative to the package's base directory.
   719         *                    - `xdc.bld.INVALID_RELEASE_NAME`
   720         *                      This error is reported whenever a release name is
   721         *                      specified by its absolute path in the package's
   722         *                      build script. The release name has to be relative
   723         *                      to the package's base directory.
   724         */
   725        Release.Instance addRelease(String name, Release.Attrs relAttrs = {});
   726
   727        /*!
   728         *  ======== addScript ========
   729         *  Add a script to this package
   730         *
   731         *  Both XDCscript and Korn shell scripts can be added to package.  This
   732         *  not only allows one to add script utilities to a package, it
   733         *  also makes it easy to create scripted regression tests.  As with
   734         *  `Executable`s, it is possible to add `{@link xdc.bld.Test}`s to a
   735         *  `{@link xdc.bld.Script Script}`; see `{@link xdc.bld.Script#addTest}`.
   736         *
   737         *  @param(name)    name of the script to add to this package.  Script
   738         *                  names are simply the script's filename relative to
   739         *                  the package's base directory.  Scripts can have any
   740         *                  extension, but if the extension is "`.sh`" or "`.ksh`"
   741         *                  a Korn shell compatible shell is used to run the
   742         *                  script's tests; otherwise it is assumed to be an
   743         *                  XDCscript file and any tests will be run by the
   744         *                  XDCscript interpreter `xs`.
   745         *
   746         *  @param(scriptAttrs) optional script attributes object
   747         *                   (`{@link xdc.bld.Script#Attrs}`)
   748         *
   749         *  @a(returns)      Returns the `{@link xdc.bld.Script}` instance
   750         *                   object created.
   751         *
   752         *  @a(throws)       `XDCException` exceptions are thrown for fatal
   753         *                    errors. The following error codes are
   754         *                    reported in the exception message:
   755         *                      @p(dlist)
   756         *                      - `xdc.bld.SCRIPT_EXISTS`
   757         *                        This error is reported whenever a package's build
   758         *                        script specifies multiple user scripts with the
   759         *                        same name. Ensure that the names of the user
   760         *                        scripts are unique.
   761         */
   762        Script.Instance addScript(String name, Script.Attrs scriptAttrs = {});
   763
   764        /*!
   765         *  ======== addAssembly ========
   766         *  @_nodoc assemblies are experimental not fully qualified/tested
   767         *          entities
   768         *  @a(returns)      Returns the `{@link xdc.bld.Assembly}` instance
   769         *                   object created.
   770         *
   771         *  @a(throws)       `XDCException` exceptions are thrown for fatal
   772         *                    errors. The following error codes are
   773         *                    reported in the exception message:
   774         *                    @p(dlist)
   775         *                    - `xdc.bld.INVALID_TARGET`
   776         *                      This error is reported when a package is being
   777         *                      built for an unknown target. Ensure that the
   778         *                      correct targets are mentioned in the package's
   779         *                      build script.
   780         */
   781        Assembly.Instance addAssembly(String name, ITarget.Module target,
   782            String platform, Executable.Attrs exeAttrs = {});
   783
   784        /*!
   785         *  ======== addConfiguration ========
   786         *  @_nodoc
   787         */
   788        Configuration.Instance addConfiguration(String name, ITarget.Module target,
   789            String platform, Configuration.Attrs cfgAttrs = {});
   790
   791        /*!
   792         *  ======== onInit ========
   793         *  @_nodoc this function is called from the bld package's
   794         *          initialization function to initialize this module.
   795         *
   796         *  @a(throws)       `XDCException` exceptions are thrown for fatal
   797         *                    errors. The following error codes are
   798         *                    reported in the exception message:
   799         *                    @p(dlist)
   800         *                    - `xdc.bld.INCORRECT_PACKAGE_NAME`
   801         *                      This error is reported whenever package name does
   802         *                      not match the directory name. Package names should
   803         *                      match the directory layout. For example the
   804         *                      package `ti.sdo.ce.osal` should be created in the
   805         *                      directory `ti\sdo\ce\osal`.
   806         *                    - `xdc.bld.CREATE_DIR_ERROR`
   807         *                      This error is reported whenever there is an error
   808         *                      in creating package directories. This maybe
   809         *                      related with issues with the host filesystem.
   810         *                      Check whether directories
   811         *                      can be created manually in the `package`
   812         *                      sub-directory.
   813         */
   814        function onInit();
   815    }
   816    /*
   817     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   818     */
   819


module xdc.bld.Release

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Release.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== Release ========
    19     *  Model of an archive of all files that are part of a release.
    20     *
    21     *  Release instances define a container object that represents all files that
    22     *  are part of a release of a package.  A release may, for example, include
    23     *  just the files necessary to support a particular ISA even though the
    24     *  package as a whole can support multiple ISAs.
    25     *
    26     *  Each Release instance is realized as a tar file containing the files
    27     *  that are part of a release of a package.
    28     */
    29    metaonly module Release {
    30
    31        /*!
    32         *  ======== Attrs ========
    33         *  Optional Release attributes
    34         *
    35         *  Unspecified attributes are "inherited" from
    36         *  `{@link xdc.bld.PackageContents#Attrs}`; i.e., if one of fields in
    37         *  this structure is unspecified *and* this field's name matches a field
    38         *  name in `{@link xdc.bld.PackageContents#Attrs}`, then
    39         *  this field's value defaults to the value in specified by
    40         *  `{@link xdc.bld.PackageContents#attrs}`.  This mechanism makes it
    41         *  possible to establish package-wide default values for any of the
    42         *  "inherited" attributes.
    43         *
    44         *  However, elements added to a release can "override" these attributes.
    45         *  For example, when an executable is added to a release and the
    46         *  executable's attributes specify `'exportSrc = false'`, the release
    47         *  will not contain the executable's sources (even if the release's
    48         *  `{@link #attrs}.exportSrc` attribute is set to `true`).
    49         *
    50         *  @field(exportCfg)  If this field is set to `true`, configuration
    51         *          scripts will be part of the release.  If it is unspecified
    52         *          (or set to `null`), program configuration scripts will not
    53         *          be added to this release.
    54         *
    55         *  @field(exportDoc)  If this field is set to `true`,  generated
    56         *          documentation will be part of the release.
    57         *
    58         *  @field(exportSrc)  If this field is set to `true`, sources
    59         *          used to produce object files will be part of the release.
    60         *          If it is unspecified (or set to `null`), no sources will
    61         *          be part of this release.
    62         *
    63         *  @field(exportExe)  If this field is set to `true`, executables
    64         *          will be part of the release.  If it is unspecified (or set
    65         *          to `null`), executables will not be part of this release.
    66         *
    67         *  @field(exportAll)  If this field is set to `true`, all files
    68         *          in this package that are not known to be generated are in
    69         *          the release.  If it is unspecified (or set to `null`), these
    70         *          files will not be added to this release.
    71         *
    72         *          Note that the set of files specified by `exportAll` is
    73         *          determined at the time the package's makefile is generated.
    74         *          If one of these files is subsequently removed before the
    75         *          release is built, the build of the release will fail; a file
    76         *          required by the release no longer exists.  If the file is
    77         *          not really required for the release, you must trigger a
    78         *          rebuild for the generated makefiles; either touch
    79         *          `package.bld` or remove the generated makefile and re-build
    80         *          the release.
    81         *
    82         *  @field(relScript)  If this field is non-`null`, the string names a
    83         *          "release script" that is run to post-process the
    84         *          files that are part of a release.  Like
    85         *          configuration scripts, the string names a script
    86         *          file that is searched for first in the in package's
    87         *          base directory, and then along the package path.  See
    88         *          `{@link Manifest}` for more information about release scripts
    89         *          and what they can do.
    90         *
    91         *  @field(relScriptArgs)  If this field is non-`null`, the string is
    92         *          used to initialize the `arguments[]` array which is
    93         *          accessible to the release script named by `relScript`.  The
    94         *          elements of the `arguments[]` array are formed from the white
    95         *          space separated elements of `relScriptArgs`.  If this string
    96         *          is `null` or empty, the `arguments[]` array has length `0`.
    97         *
    98         *  @field(label)  This string allows one to "tag" each release with a
    99         *          label that can be used by other tools to select appropriate
   100         *          releases.  For example, the label might contain customer names.
   101         *
   102         *          This label is not interpreted by the XDC tools.  It is simply
   103         *          recorded in the package's build model XML file
   104         *          (`package/package.bld.xml`) and retrieved via
   105         *          `{@link xdc.bld.BuildEnvironment#getReleaseDescs()}`
   106         *
   107         *  @field(prefix)  This string allows one to "export" each release to a
   108         *          location outside of the package.  `prefix` is prepended
   109         *          to the name of the release name to form the name of the
   110         *          release archive.
   111         *
   112         *          For example, setting `prefix` to `"../"` implies that a
   113         *          release named `"exports/foo"` generates an archive file named
   114         *          `foo.tar` in the directory `"../exports"`.
   115         *
   116         *          `prefix` must either begin with the '^' character or
   117         *          be a path that is relative to the package's "base"
   118         *          directory; i.e., the directory containing the package's
   119         *          specification file `package.xdc`.
   120         *
   121         *          If `prefix` begins with the '^' character, the
   122         *          remainder of the string is treated as though it is relative
   123         *          to the package's repository.  In effect, the '^' character is
   124         *          replaced with an appropriate number of '../' sequences to
   125         *          sufficient to navigate to the package's repository.
   126         *
   127         *          If it is not specified (or set to `null`) the current setting
   128         *          of `{@link xdc.bld.PackageContents#releasePrefix}` is used.
   129         *
   130         *  @field(compress) If this field is set to `true`, the release
   131         *          archive file will be compressed; otherwise, the
   132         *          archive will not be compressed.  Archives are compressed
   133         *          via `gzip`; compressed archives are `.tar.gz` files.
   134         *
   135         *  @field(archiver) This field names the archiver to use when creating a
   136         *          release.  Two archivers are currently supported:
   137         *          "tar" and "zip".  If the archiver is set to "zip"
   138         *          the `{@link #Attrs.compress}` field is implicitly set to
   139         *          `true`.
   140         *
   141         *  @see #attrs
   142         */
   143        struct Attrs {
   144            String  archiver;       /*! "tar" or "zip"; defaults to "tar" */
   145            Bool    compress;       /*! if `true`, compress package archive */
   146            Bool    exportDoc;      /*! if `true`, export generated docs */
   147            Bool    exportExe;      /*! if `true`, export program executables */
   148            Bool    exportCfg;      /*! if `true`, export program cfg scripts */
   149            Bool    exportSrc;      /*! if `true`, export all package sources */
   150            Bool    exportAll;      /*! if `true`, export all files in package */
   151            String  relScript;      /*! release files post-processing script */
   152            String  relScriptArgs;  /*! optional arguments to relScript */
   153            String  prefix;         /*! prefix for name of install of archive */
   154            String  label;          /*! uninterpreted label for this release */
   155        };
   156
   157        /*!
   158         *  ======== Desc ========
   159         *  A description of a release
   160         *
   161         *  This structure provides information about a release that can be
   162         *  used to select from multiple releases provided by a package.
   163         *
   164         *  @see xdc.bld.BuildEnvironment#getReleaseDescs()
   165         */
   166        struct Desc {
   167            String name;    /*! the name used to create the release */
   168            String aname;   /*! the file name of the archive */
   169            String label;   /*! the label given to the release */
   170        };
   171
   172        /*!
   173         *  ======== DescArray ========
   174         *  An array of release descriptors
   175         */
   176        typedef Desc DescArray[];
   177
   178    instance:
   179        /*!
   180         *  ======== create ========
   181         *  @_nodoc
   182         *  Instances should only be created via PackageContents.addRelease()
   183         */
   184        create();
   185
   186        /*!
   187         *  ======== name ========
   188         *  The name of the release.
   189         *
   190         *  This name is the base name of the generated tar file containing all
   191         *  files that make up the release.  For example, if the name of the
   192         *  release is "foo" then the file "foo.tar" (located in the same
   193         *  directory as package.bld) is a tar file containing the release files.
   194         *
   195         *  Note that each package has at least one release defined, the default
   196         *  release.  The default release's name is the name of the package with
   197         *  '.'s replaced with '_'s.  For example, the default release name for
   198         *  the package "foo.bar" is "foo_bar" and the generated tar file is
   199         *  named "foo_bar.tar".
   200         */
   201        config String name;
   202
   203        /*!
   204         *  ======== attrs ========
   205         *  This instance's attributes.
   206         *
   207         *  Unless explicitly specified, these attributes are "inherited" from
   208         *  the package's attributes (`{@link xdc.bld.PackageContents#attrs}`)
   209         *
   210         *  @see xdc.bld.PackageContents#attrs
   211         */
   212        config Release.Attrs attrs;
   213
   214        /*!
   215         *  ======== otherFiles ========
   216         *  Additional files to add to this release.
   217         *
   218         *  This is an array of arbitrary files that are to be included
   219         *  in this release of the package.
   220         *
   221         *  Only those files that are not already directly (or indirectly) named
   222         *  by adding programs or libraries to this release need to appear in
   223         *  this array.
   224         */
   225        config String otherFiles[];
   226
   227        /*!
   228         *  ======== excludeDirs ========
   229         *  List of directory base names to exclude
   230         *
   231         *  This is an array of arbitrary directory "base names" that should
   232         *  be excluded in this release of the package.  This list only
   233         *  excludes directories that would otherwise be added due to the
   234         *  recursive include of a parent directory.
   235         *
   236         *  For example, if a directory is specified in `{@link #otherFiles}`
   237         *  all of its sub-directories will be added unless those sub-directories
   238         *  are named in the `excludeDirs` list.
   239         *
   240         *  This list is often used to exclude "hidden" directories added by
   241         *  change control systems and IDEs (`.svn`, `.git`, `.settings`, ...).
   242         *
   243         *  @see #otherFiles
   244         *  @see PackageContents#excludeDirs
   245         */
   246        config String excludeDirs[];
   247    }
   248    /*
   249     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   250     */
   251


module xdc.bld.Repository

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Repository.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== Repository ========
    19     *  Model of a package repository
    20     */
    21    metaonly module Repository {
    22
    23        /*!
    24         *  ======== Attrs ========
    25         *  Optional attributes for a repository
    26         *
    27         *  @field(releases)  This array contains releases that will contain the
    28         *          repository.  Thus, a single repository can be part of any set
    29         *          of releases.  Each repository is always added to the
    30         *          package's "default release" in addition to any releases
    31         *          specified in the releases array.
    32         *
    33         *  @field(search) By default, the release archives of all packages added
    34         *          to a repository are required to exist in the package's release
    35         *          output directory at the time the repository is created.
    36         *
    37         *          However, if this flag is set to `true`, each package's release
    38         *          will be searched for at the time that the makefile for the
    39         *          package containing this repository is created.  This allows
    40         *          package releases that exist before this repository is being
    41         *          built to more easily be added to this repository.
    42         *
    43         *          For example, package release archives can be moved to arbitrary
    44         *          directories after they are created but before a package containing
    45         *          a repository that includes these releases is built.
    46         *
    47         *          Package releases are searched for by looking in the following
    48         *          locations (in order): the package's release archive output
    49         *          directory, along the specified `archivePath`, and finally along
    50         *          the current package path.
    51         *
    52         *          If a package release archive cannot be found in the package's
    53         *          release output directory or along the `archivePath`, the package
    54         *          path will be searched for the package itself (not its release
    55         *          archive).  So, if the package appears on the package path _and_
    56         *          it's a released package with the specified release name, the
    57         *          package will simply be copied into this repository.
    58         *
    59         *          Finally, if the package release can't be found, and error is
    60         *          thrown.
    61         *
    62         *  @field(archivePath) This ';' separated list of directories is used to
    63         *          find package release archives when the `search` flag is set to
    64         *          `true`.  If `archivePath` is `null`, no search path will be
    65         *          used and the package release itself (not the archive) may be found
    66         *          along the package path.
    67         *
    68         *  @see #attrs
    69         */
    70        struct Attrs {
    71            Release.Instance releases[];    /*! releases this repo is a part of */
    72            Bool             search;        /*! true => search path for packages */
    73            String           archivePath;   /*! search path for package archives */
    74        };
    75
    76    instance:
    77        /*!
    78         *  ======== create ========
    79         *  @_nodoc
    80         *  Instances should only be created via PackageContents.addRepository()
    81         */
    82        create();
    83
    84        /*!
    85         *  ======== name ========
    86         *  The repository's directory name
    87         */
    88        config String name;
    89
    90        /*!
    91         *  ======== attrs ========
    92         *  The repository's attributes
    93         */
    94        config Attrs attrs;
    95
    96        /*!
    97         *  ======== addPackages ========
    98         *  Add specified package releases to this repository
    99         *
   100         *  @param(names) An array of strings naming package releases to be added
   101         *          to the repository.  Package releases are named as follows:
   102         *          @p(code)
   103         *              <pkgName>:<releaseName>
   104         *          @p
   105         *          where `<pkgName>` is the name of the package to add to the
   106         *          repository and `<releaseName>` is the name of one of that
   107         *          package's releases.  A package release name may be either the
   108         *          archive file name (relative to the package's base directory)
   109         *          of the release archive or the name used create the release in
   110         *          package named `<pkgName>`.
   111         *
   112         *          For example, if the package `ti.bios` had a release named
   113         *          `exports/ti_bios,src`, the following statements would add
   114         *          this release to the repository named `packages`:
   115         *          @p(code)
   116         *              var r = Pkg.addRepository("packages");
   117         *              r.addPackages(["ti.bios:exports/ti_bios,src"]);
   118         *          @p
   119         *
   120         *          Alternatively, one can specify the archive file name:
   121         *          @p(code)
   122         *              var r = Pkg.addRepository("packages");
   123         *              r.addPackages(["ti.bios:exports/ti_bios,src.tar"]);
   124         *          @p
   125         *
   126         *          It is possible to get a list of release archive names from a
   127         *          package via the
   128         *          `{@link xdc.bld.BuildEnvironment#getReleaseDescs()}`
   129         *          method.  For example, to get the physical archive name of the
   130         *          default release of the `ti.bios` package, the following loop
   131         *          can be added to a build script:
   132         *          @p(code)
   133         *              var archiveName;
   134         *              var rels = Build.getReleaseDescs('ti.bios');
   135         *              for (var j = 0; j < rels.length; j++) {
   136         *                  if (rels[j].label == "default") {
   137         *                      archiveName = rels[j].aname;
   138         *                      break;
   139         *                  }
   140         *              }
   141         *              // archiveName is now set to the file name of the ti.bios
   142         *              // default release archive (or undefined)
   143         *          @p
   144         *
   145         *  @see xdc.bld.BuildEnvironment#getReleaseDescs()
   146         */
   147        Void addPackages(String names[]);
   148    }
   149    /*
   150     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   151     */
   152


module xdc.bld.Script

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Script.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== Script ========
    19     *  Model of a script
    20     */
    21    metaonly module Script {
    22        /*!
    23         *  ======== Attrs ========
    24         *  Optional attributes for a script instance.
    25         *
    26         *  @field(releases)  This array contains releases that will contain the
    27         *          script.  Thus, a single script can be part of any set of
    28         *          releases.  Each script is always added to the package's
    29         *          "default release" in addition to any releases specified in
    30         *          the releases array.
    31         *
    32         *  @field(hasMain)  This script defines a `main()` function.  This
    33         *          function is called after the capsule is loaded.  If the
    34         *          script does not define `main()`, it must contain statements
    35         *          that will run script as part of loading the script.
    36         *
    37         *  @field(exportSrc) Scripts are added to the default release
    38         *          unless this flag is set to `false`.
    39         *
    40         *  @see #attrs
    41         */
    42        struct Attrs {
    43            Bool hasMain;       /*! if true, this script defines main()  */
    44            Bool exportSrc;     /*! if false, don't add to default release */
    45            Release.Instance releases[];  /*! releases this script is a part of */
    46        };
    47
    48    instance:
    49        /*!
    50         *  ======== create ========
    51         *  @_nodoc
    52         *  Instances should only be created via PackageContents.addScript()
    53         */
    54        create();
    55
    56        config String name;
    57
    58        /*!
    59         *  ======== attrs ========
    60         *  Optional attributes for this test instance.
    61         *
    62         */
    63        config Script.Attrs attrs;
    64
    65        /*!
    66         *  ======== addTest ========
    67         *  Add specified test to script
    68         *
    69         *  A test encapsulates a script and a set of arguments passed to
    70         *  the script when it is run.
    71         *
    72         *  Tests are run by naming the goal "<test_name>.test" on the xdc
    73         *  command line; <test_name> is the test's name.
    74         *
    75         *  Multiple tests may have the same name; in this case, it is possible
    76         *  to run all tests using the single goal "<test_name>.test"
    77         *
    78         *  @param(testAttrs)   optional test attrs object
    79         *                      (`{@link xdc.bld.Test#Attrs}`)
    80         *
    81         *  @a(returns)         Returns the `{@link xdc.bld.Test}` instance object
    82         *                      created.
    83         *
    84         *  @a(throws)          `Error` exceptions are thrown for fatal errors.
    85         *
    86         *  @see xdc.bld.Test
    87         *  @see xdc.bld.Test#Attrs
    88         */
    89        Test.Instance addTest(Test.Attrs testAttrs = {});
    90    }
    91    /*
    92     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    93     */
    94


module xdc.bld.Test

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Test.xdc ========
    14     */
    15    package xdc.bld;
    16
    17    /*!
    18     *  ======== Test ========
    19     *  Model of a test
    20     *
    21     *  Each Test instance represents a pair consisting of an executable and
    22     *  command line arguments for that executable.  Each pair uniquely
    23     *  identifies an output sequence (the result of running the executable
    24     *  with the specified arguments) that can be compared to a known valid
    25     *  result.  Executables that have non-deterministic execution behavior
    26     *  (e.g., multi-threaded apps) must ensure that the output is independent
    27     *  of these variations.
    28     *
    29     *  Test instances are created via the `Executable.addTest()` function;
    30     *  this ensures that each test is associated with a containing executable.
    31     *
    32     *  Test instances do not have unique names. However, each test does have
    33     *  a "group" name which is optionally specified via `Test.Attrs`.  If the
    34     *  "group" name is not specified, it defaults to the name of the containing
    35     *  executable.  To run any group of tests (which may consist of one or more
    36     *  executable and command-line pairs) it is sufficient to run
    37     *  the following command:
    38     *  @p(code)
    39     *      xdc <test_group_name>.test
    40     *  @p
    41     *  where `<test_group_name>` is the name of the test group to run.
    42     *
    43     *  Each Executable instance (created via `PackageContents.addExecutable()`)
    44     *  implicitly adds a test whose "group" name is the name of the executable
    45     *  and whose arguments are empty (i.e., argc == 0).  Thus, it is possible
    46     *  to run any executable that can be built using the following command:
    47     *  @p(code)
    48     *      xdc <exe_name>.test
    49     *  @p
    50     *  where `<exe_name>` is the name of the executable.  Note that if you add a
    51     *  test to the executable (without specifying a unique `groupName`), the
    52     *  command above will run the executable more than once; it will run once
    53     *  for every test associated with the executable.
    54     */
    55    metaonly module Test {
    56        /*!
    57         *  ======== Attrs ========
    58         *  Optional attributes for a test instance.
    59         *
    60         *  Unspecified attributes are "inherited" from `{@link Executable#Attrs}`;
    61         *  i.e., if one of fields in this structure is unspecified *and* this
    62         *  field's name matches a field name in `Executable.Attrs`, then
    63         *  this field's value defaults to the value in specified by
    64         *  `Executable.Attrs`.  This mechanism makes it possible to establish
    65         *  executable-specific default values for any of the "inherited"
    66         *  attributes.
    67         *
    68         *  @field(args)        this is a string of arguments (which may contain
    69         *                      embedded strings) that are passed to the executable
    70         *                      being run.
    71         *  @field(execCmd)     this string names the "loader" which is responsible
    72         *                      for running the executable with the arguments
    73         *                      specified by the `args` field.  If this field is
    74         *                      `null` or `undefined`, the command used to run
    75         *                      the executable is determined by the executable's
    76         *                      configuration script; see
    77         *                      `{@link xdc.cfg.Program#execCmd}`.
    78         *  @field(execArgs)    this is a string of arguments passed to the
    79         *                      "loader" to control how this loader manages the
    80         *                      execution of the executable being run.
    81         *  @field(groupName)   the name of the group of tests of which this test
    82         *                      is a member.
    83         *  @field(refOutput)   the name of a "reference" text file that is used
    84         *                      to validate the output generated by running
    85         *                      the executable with the specified arguments.  If
    86         *                      the exit status of the executable is 0 and the
    87         *                      output of the executable differs from the
    88         *                      contents of `refOutput`, the test fails.  If this
    89         *                      comparison fails, the output of the executable is
    90         *                      saved to a temporary file to allow analysis of the
    91         *                      failure.  The temporary file's name is:
    92         *                      "`.tmp,{exeName},{id}`", where `{exeName}` is the
    93         *                      name of the executable and `{id}` is a test
    94         *                      id number.
    95         *
    96         *                      If `refOutput` is not defined (or set to `null`)
    97         *                      no comparison is made; only the exit status of the
    98         *                      executable is used to determine the success or
    99         *                      failure of the test.
   100         *  @field(refExitCode) the expected exit status of the executable.
   101         *
   102         *                      If `refExitCode` is not defined (or set to `null`)
   103         *                      an exit status of 0 is assumed.
   104         *
   105         *  @see #attrs
   106         */
   107        struct Attrs {
   108            String args;        /*! arguments passed to the exe for this test */
   109            String execCmd;     /*! exec command for this test */
   110            String execArgs;    /*! arguments to the exec command itself */
   111            String groupName;   /*! name of a group of related tests */
   112            String refOutput;   /*! name of a reference output file */
   113            String cmpCmd;      /*! command used to compare refOutput */
   114            int    refExitCode; /*! expected exit code (default = 0) */
   115        };
   116
   117    instance:
   118        /*!
   119         *  ======== create ========
   120         *  @_nodoc
   121         *  Instances should only be created via Executable.addTest()
   122         */
   123        create();
   124
   125        /*!
   126         *  ======== attrs ========
   127         *  Optional attributes for this test instance.
   128         *
   129         *  Default values for each of the fields in attrs:
   130         *  @p(dlist)
   131         *     - `groupName`
   132         *          name of the program "containing" this test
   133         *
   134         *     - `execCmd`
   135         *          the first non-`null` value in:
   136         *              `prog.attrs.test.exec,
   137         *              xdc.cfg.Program.execCmd`,
   138         *              `prog.platform.getExecCmd()`.
   139         *
   140         *     - execArgs
   141         *          the first non-`null` value in:
   142         *              `prog.attrs.test.execArgs`,
   143         *              "".
   144         *
   145         *     - args
   146         *          the first non-`null` value in:
   147         *              `prog.attrs.test.args`,
   148         *              "".
   149         */
   150        config Test.Attrs attrs;
   151    }
   152    /*
   153     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   154     */
   155


module xdc.bld.Utils

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Utils.xdc ========
    14     */
    15    package xdc.bld
    16
    17    /*!
    18     *  ======== Utils ========
    19     *  Utility functions to simplify creation of targets and platforms
    20     */
    21    metaonly module Utils
    22    {
    23        /*!
    24         *  ======== expandString ========
    25         *  Expand references within a string to specified values
    26         *
    27         *  All references of the form "`$(<name>)`" within the command string,
    28         *  `cmd` are replaced with the string value having key `<name>` in the
    29         *  hashtable `values`.
    30         *
    31         *  If `<name>` appears in values and its value is `null` or `undefined`,
    32         *  then `$(<name>)` is replaced with the empty string.  If `<name>` does
    33         *  not appear in `values`, then `$(<name>)` is not replaced.
    34         *
    35         *  @param(cmd)     a string with embeded references to values defined in
    36         *                  the values hashtable parameter
    37         *  @param(values)  an arbitrary hash of name-value pairs; these values
    38         *                  are used to substitute for references of the form
    39         *                  `$(name)` that appear within `cmd`.
    40         *
    41         *  @a(returns)     string with references replaced as specified by the
    42         *                  `values` hash.
    43         *
    44         *  @a(throws)      `Error` exceptions are thrown for fatal errors
    45         */
    46        String expandString(String cmd, Any values);
    47
    48        /*!
    49         *  ======== expandDbgName ========
    50         *  Generate name of a debug support output file
    51         *
    52         *  @param(cfgName) the name of the generated configuration script
    53         *                  without the ".cfg" extension
    54         *  @param(exeName) the name of the output executable
    55         *  @param(pattern) file name pattern
    56         *
    57         *  Both cfgName and exeName are relative to the directory containing
    58         *  package.bld.
    59         *
    60         *  @_nodoc this function is an internal method shared between xdc.bld
    61         *  and xdc.cfg and has little value outside this context.
    62         */
    63        function expandDbgName(cfgName, exeName, pattern);
    64
    65        /*!
    66         *  ======== parsePlatName ========
    67         *  Parse platform instance name into platform package name and short
    68         *  instance name
    69         *
    70         *  @param(platInstName)     the name of a platform instance
    71         *
    72         *  @a(returns)
    73         *  returns object with the following fields:
    74         *  @p(dlist)
    75         *      - `platPkgName`
    76         *              name of the platform package name
    77         *      - `instName`
    78         *              name of the platform instance
    79         *      - `instMod`
    80         *              module object specifying platform instances (if it exists)
    81         * @p
    82         *
    83         *  @a(throws)      `Error` exceptions are thrown for fatal errors
    84
    85         *  @_nodoc this function is an internal method shared between xdc.bld
    86         *  and xdc.cfg and has little value outside this context.
    87         */
    88        function parsePlatName(platInstName);
    89
    90        /*!
    91         *  ======== display ========
    92         *  Recursively print arbitrary object
    93         *
    94         *  @param(msg)  a string to print before printing the object
    95         *  @param(obj)  an arbitrary object to display
    96         */
    97        Void display(String msg, Any obj);
    98    }
    99    /*
   100     *  @(#) xdc.bld; 1, 0, 2,1; 11-21-2018 13:29:27; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   101     */
   102


package xdc.cfg

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.services.global;
    13
    14    /*!
    15     *  ======== xdc.cfg ========
    16     *  Configuration Object Model elements
    17     *
    18     *  This package contains the modules necessary to populate the XDC
    19     *  Configuration Object Model.  In addition, this package supplies a
    20     *  C/C++ header, `global.h`, that facilitates the creation of portable
    21     *  sources that need to reference global values defined as part of
    22     *  a configuration (`{@link xdc.cfg.Program#global}`).
    23     *
    24     *  @a(Compatibility Checks)
    25     *  During configuration certain compatibility checks are made.  These checks
    26     *  include:
    27     *  @p(nlist)
    28     *    -   target compatibility among all packages that are included in the
    29     *        configuration
    30     *    -   package compatibility among all packages included in the
    31     *        configuration
    32     *    -   package compatibility with respect to the set of packages used to
    33     *        build the packages that are part of the configuration set.
    34     *  @p
    35     *  By default, if any of the checks above fail, the configuration step fails.
    36     *  It is possible, however, to selectively exclude particular
    37     *  packages from these checks and/or treat check failures as non-fatal
    38     *  warnings.
    39     *
    40     *  There are two "environment" variables that control these checks:
    41     *  @p(dlist)
    42     *    - `xdc.cfg.check.exclude`
    43     *        a regular expression that is used to select packages that should
    44     *        be excluded from the set of packages checked during configuration.
    45     *
    46     *    - `xdc.cfg.check.fatal`
    47     *        if set to "`false`", force any incompatibilities detected to be
    48     *        treated as warnings only; otherwise incompatibilities are fatal
    49     *  @p
    50     *  Of course, it is also possible to use both options together to achieve
    51     *  a desired effect.
    52     *
    53     *  To define these environment variables one must pass the appropriate `-D`
    54     *  options to the XDCscript shell (`xs`) which is used to run the
    55     *  `{@link xdc.tools.configuro configuro}` command line configuration tool.
    56     *  If, on the other hand, you are using `xdc` to run the configuration step
    57     *  you can set these variables by setting the
    58     *  `{@link xdc.bld.Executable#Attrs xsopts}` attribute of an
    59     *  `{@link xdc.bld.Executable}` within a build script.
    60     *
    61     *  @a(Controlling Compatibility Checks)
    62     *  To treat compatibility check failures as warnings for the executable
    63     *  `app`:
    64     *  @p(code)
    65     *    Pkg.addExecutable("app", targ, targ.platform, {
    66     *         xsopts: "-Dxdc.cfg.check.fatal=false"
    67     *    });
    68     *  @p
    69     *
    70     *  To ignore any incompatibilities triggered by targets used by the
    71     *  `ti.targets.rts*` packages:
    72     *  @p(code)
    73     *    Pkg.addExecutable("app", targ, targ.platform, {
    74     *        xsopts: "-Dxdc.cfg.check.exclude='ti.targets.rts.*'"
    75     *    });
    76     *  @p
    77     *  In this case, the `xdc.cfg.check.exclude` option is regular expression used
    78     *  to exclude any package whose names matches the regular expression from the
    79     *  checks.
    80     *
    81     *  Finally, if you don't want to set `xsopts` on each executable, it is
    82     *  possible to set it for all executables within a package by setting the
    83     *  `xsopts` attribute of the `{@link xdc.bld.PackageContents}` (a.k.a. `Pkg`)
    84     *  object.  For example, to turn all compatibility checks into warnings for
    85     *  all executables in a package, add the following line to the package's
    86     *  build script:
    87     *  @p(code)
    88     *    Pkg.attrs.xsopts = "-Dxdc.cfg.check.fatal=false";
    89     *  @p
    90     *
    91     *  @a(Throws)
    92     *  `XDCException` exceptions are thrown for fatal errors. The following error
    93     *  codes are reported in the exception message:
    94     *  @p(dlist)
    95     *      -  `xdc.cfg.USE_MODULE_PARAMETER_ERROR`
    96     *           The first parameter of an `xdc.useModule()` call must be a string.
    97     *           This error is raised if the first parameter is of any other type.
    98     *      -  `xdc.cfg.CONFIG_ERROR`
    99     *           This is a general error reported when the program configuration
   100     *           fails. This error is caused by one or more configuration errors.
   101     *           The list of those specific errors precedes this error.
   102     *      -  `xdc.cfg.INCOMPATIBLE_TARGET_VERSION`
   103     *           This is an error or a warning usually reported when the version of
   104     *           the compiler used in the current build is not compatible with the
   105     *           version of the compiler used to build some of the loaded packages.
   106     *           The compiler version might be encoded in the compatibility keys
   107     *           displayed in the error message, but it is not required. Please
   108     *           check the documentation of the current target's package for the
   109     *           content of the compatibility keys.
   110     *  @p
   111     *
   112     *  @see xdc.cfg.Program#global
   113     *  @see xdc.tools.configuro.Main
   114     */
   115    package xdc.cfg [1, 0, 2] {
   116        module Program, Main;
   117        module SourceDir;
   118    }
   119    /*
   120     *  @(#) xdc.cfg; 1, 0, 2,1; 11-21-2018 13:29:43; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   121     */
   122


module xdc.cfg.Program

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Program.xdc ========
    14     */
    15    package xdc.cfg;
    16
    17    /*!
    18     *  ======== Program ========
    19     *  The Program object for the configuration object model.
    20     *
    21     *  This module defines the "root" of the configuration object model; all
    22     *  "top-level" configuration settings for the executable are provided by
    23     *  this object. Program configuration scripts reference this module via the
    24     *  global variable `Program`; i.e., `Program` is implicitly initialized as
    25     *  follows:
    26     *  @p(code)
    27     *      var Program = xdc.useModule('xdc.cfg.Program');
    28     *  @p
    29     *
    30     *  After a configuration script completes successfully, the following files
    31     *  are generated:
    32     *  @p(nlist)
    33     *      - package/cfg/<exe_name>.c
    34     *      - package/cfg/<exe_name>.xdl
    35     *  @p
    36     *  where `<exe_name>` is the name of the executable with the final '.'
    37     *  character replaced with an '_'.
    38     *
    39     *  The generated C file contains code and data from each module used by the
    40     *  program and must be compiled and linked with the other sources to
    41     *  produce the final executable.  The generated linker command file must also
    42     *  be added during this final link step.
    43     *
    44     *  The linker command file is produced by expanding a template
    45     *  provided by the platform specifed during configuration and contains
    46     *  hardware and compiler specific directives required by the target modules
    47     *  that are part of the program's configuration.  This template expands
    48     *  other templates specified by each imported package's
    49     *  `{@link xdc.IPackage#getSects getSects}` method, for example. This allows
    50     *  each package participating in the configuration executable to
    51     *  automatically contribute a portion of the executable's linker command
    52     *  file.
    53     *
    54     *  You can modify or augment the contents of this file via
    55     *  `{@link xdc.cfg.Program#sectionsExclude sectionsExclude}` and
    56     *  `{@link xdc.cfg.Program#sectionsTemplate sectionsTemplate}`. It is even
    57     *  possible to completely replace the template used to generate this file via
    58     *  `{@link xdc.cfg.Program#linkTemplate linkTemplate}`. If a custom template
    59     *  is used, it should still invoke `{@link xdc.IPackage#getSects getSects}`
    60     *  methods for all loaded packages.
    61     *  These configuration options provide the user complete control of the linker
    62     *  command file.
    63     */
    64
    65    @Template("./Program.xdt")
    66
    67    metaonly module Program {
    68
    69        /*!
    70         *  ======== GenerationOptions ========
    71         *  Options that control the files generated as part of program
    72         *  configuration.
    73         *
    74         *  @field(debuggerFiles) If set to `true` in a configuration script,
    75         *          debugger project files will be generated as part of the
    76         *          configuration step.  If set to `false`, these files will not
    77         *          be generated.
    78         *
    79         *          If it is not set (or set to undefined) and the environment
    80         *          variable `environment["xdc.cfg.gen.debuggerFiles"]` is
    81         *          non-`null`, then the default value of this parameter is taken
    82         *          to be the value of the following expression:
    83         *          @p(code)
    84         *              environment["xdc.cfg.gen.debuggerFiles"] == "true"
    85         *          @p
    86         *          This makes it is possible to enable the generation of
    87         *          debugger project files from build scripts by passing
    88         *          the option `-Dxdc.cfg.gen.debuggerFiles=true` to the
    89         *          configuration tool (see
    90         *          `{@link xdc.bld.Executable#Attrs.xsopts}` or
    91         *          `{@link xdc.bld.PackageContents#Attrs.xsopts}`).
    92         *
    93         *          Finally, if `debuggerFiles` is not set (or set to `undefined`)
    94         *          and the environment variable above is not defined,
    95         *          the generation of debugger project files occurs only if
    96         *          `{@link xdc.cfg.Program#build.profile}` contains
    97         *          the string `"debug"`.  So, unless otherwise specified, debug
    98         *          profiles result in debugger project files being generated.
    99         */
   100        struct GenerationOptions {
   101            Bool debuggerFiles; /*! if `true`, generate debugger "project" files */
   102        };
   103
   104        /*!
   105         *  ======== SectionSpec ========
   106         *  Map that instructs the linker where to place output sections.
   107         *
   108         *  This structure contains some fields that are specific to TI targets.
   109         *  On non-TI targets, such fields are ignored.
   110         *
   111         *  @field(runSegment) Defines the memory segment where the section is
   112         *          to be run.
   113         *
   114         *  @field(loadSegment) Defines the memory segment where the section is
   115         *          to be loaded. If 'runSegment' or 'loadSegment' is defined,
   116         *          but not both, the linker is instructed to use the defined
   117         *          field as the load and run allocation for the section.
   118         *
   119         *  @field(runAddress) Defines the memory address where the section is
   120         *          to be run. It is an error if both 'runSegment' and 'runAddress'
   121         *          are specified.
   122         *
   123         *  @field(loadAddress) Defines the memory address where the section is
   124         *          to be loaded. It is an error if both 'loadSegment' and
   125         *          'loadAddress' are specified. If 'runAddress' or 'loadAddress'
   126         *          is defined, but not both, the linker is instructed to use the
   127         *          defined field as the load and run address for the section.
   128         *
   129         *  @field(runAlign) If runSegment is specified, runAlign determines the
   130         *          alignment. It is an error if both 'runAlign' and 'runAddress'
   131         *          are specified.
   132         *
   133         *  @field(loadAlign) If runSegment is specified, runAlign determins the
   134         *          alignment. It is an error if both 'loadAlign' and 'loadAddress'
   135         *          are specified.
   136         *
   137         *  @field(type) Defines flags for special section types (COPY, DSECT,
   138         *          NOLOAD).
   139         *
   140         *  @field(fill) Defines the value to initialize an uninitialized
   141         *  section.
   142         */
   143        struct SectionSpec {
   144            String runSegment;  /*! segment where section contents are run */
   145            String loadSegment; /*! segment where section contents are loaded */
   146            UInt runAddress;    /*! start address of section when run */
   147            UInt loadAddress;   /*! start address of section when loaded */
   148            UInt runAlign;      /*! alignment of section within runSegment */
   149            UInt loadAlign;     /*! alignment of section within loadSegment */
   150            String type;        /*! target-specific flags */
   151            UInt fill;          /*! fill value */
   152        };
   153
   154        /*!
   155         *  ======== gen ========
   156         *  Generation options for this executable
   157         *
   158         *  This configuration parameter allows the program configuration script
   159         *  to control (to some extent) what files are generated as part of the
   160         *  configuration process.
   161         */
   162        config GenerationOptions gen;
   163
   164        /*!
   165         *  ======== globalSection ========
   166         *  UNDER CONSTRUCTION
   167         *  @_nodoc
   168         *
   169         *  Section where `{@link #globals}` are placed.
   170         *
   171         *  All globals specified in the application configuration file
   172         *  are placed into this section.
   173         *
   174         *  The default is `null`, which means the `{@link #dataSection}` is used.
   175         */
   176        config String globalSection = null;
   177
   178        /*!
   179         *  ======== sysStack ========
   180         *  The size of the executable's initial system stack
   181         *
   182         *  On architectures that maintain a separate "system stack" in addition
   183         *  to the normal `{@link #stack}`, this parameter sets its initial size
   184         *  (in units of chars).  This parameter is ignored for those
   185         *  architectures for which there is just a single stack; in other
   186         *  words, almost all known architectures.
   187         *
   188         *  This parameter is used on later generation TI/C55 16-bit DSPs where,
   189         *  in order to compatibly support 24-bit addresses, a separate
   190         *  system call/return stack that stores the upper address bits is
   191         *  employed.
   192         */
   193        config UInt sysStack = 0x1000;
   194
   195        /*!
   196         *  ======== stack ========
   197         *  The size of the executable's initial stack
   198         *
   199         *  On platforms that enable control of the initial stack size (the
   200         *  stack that exists immediately after reset), this parameter specifies
   201         *  its initial size (in units of chars).
   202         */
   203        config UInt stack = 0x1000;
   204
   205        /*!
   206         *  ======== heap ========
   207         *  The size of the executable's initial heap
   208         *
   209         *  On platforms that enable control of the size of the heap managed by
   210         *  the run-time support function malloc(), this parameter specifies
   211         *  its initial size (in units of chars).
   212         */
   213        config UInt heap = 0x1000;
   214
   215        /*!
   216         *  ======== argSize ========
   217         *  The size allocated for command line args to the executable
   218         *
   219         *  On platforms that require static allocation of space to hold
   220         *  command line arguments, this parameter specifies its maximum size
   221         *  (in units of chars).
   222         *
   223         *  Command line arguments are passed to C's `main` function when it's
   224         *  declared via the prototype: `int main(int argc, char *argv[])`.  the
   225         *  `argv` array points to an array of strings allocated from the
   226         *  memory block whose size is controlled by `argSize`.
   227         *
   228         *  Setting `argSize` to 0 means that no `argv` array will be allocated
   229         *  and the application `main()` function should be declared as
   230         *  `int main(void)`.
   231         */
   232        config UInt argSize = 0x200;
   233
   234        /*!
   235         *  ======== execCmd ========
   236         *  The command used to run this executable
   237         *
   238         *  This string is used to create a command that runs the executable
   239         *  from the command line.  If it is not set by the configuration script,
   240         *  it is set by the program's platform package (during program
   241         *  configuration).
   242         *
   243         *  This command is run as follows:
   244         *  @p(code)
   245         *      execCmd <prog> <args>
   246         *  @p
   247         *  where, `<prog>` is the name of the executable and `<args>` are
   248         *  the arguments specified in the test (if any).
   249         *
   250         *  @a(Note)
   251         *  This parameter is ignored if the exec command is specified as part
   252         *  of the test; see `{@link xdc.bld.Test#Attrs}`.
   253         */
   254        config String execCmd;
   255
   256        /*!
   257         *  ======== linkTemplate ========
   258         *  The template for the Program's linker command file
   259         *
   260         *  A template is used to create the linker command file for each
   261         *  program.  It can be optionally specified by setting this
   262         *  configuration parameter in the program's configuration script.  If
   263         *  `linkTemplate` it is not set or set to `null`, the template is
   264         *  obtained from the platform associated with this program (i.e., the
   265         *  platform named by the `{@link #platform}` config in this module).
   266         *  See `{@link xdc.platform.IPlatform#getLinkTemplate IPlatform.getLinkTemplate}`.
   267         *
   268         *  The `linkTemplate` string names a package path relative path; e.g.,
   269         *  if the linker template you want to specify is
   270         *  `"templates/big_n_hairy.xdt"` in the package `myCompany.myPackage`,
   271         *  `linkTemplate` should be set to:
   272         *  @p(code)
   273         *      "myCompany/myPackage/templates/big_n_hairy.xdt"
   274         *  @p
   275         *  If `linkTemplate` begins with the string `"./"`, the file is NOT
   276         *  searched for along the package path; instead the file name is taken
   277         *  to specify a file relative to the current working directory.
   278         *
   279         *  In any case, if `linkTemplate` is non-`null`, the file must exist;
   280         *  otherwise, the configuration step will fail.
   281         *
   282         *  @see #sectionsTemplate, #sectionsExclude, #memoryExclude
   283         */
   284        config String linkTemplate = null;
   285
   286        /*!
   287         *  ======== main ========
   288         *  The main entry point for the program
   289         *
   290         *  This parameter is optionally set by the user's program
   291         *  configuration script.  If it is not set, then a "legacy" `main()`
   292         *  function is assumed to be linked into the program; otherwise,
   293         *  the value of `main` is used as the "main" entry point to the
   294         *  program.
   295         */
   296        config Int (*main)(Int, Char*[]);
   297
   298        /*!
   299         *  ======== sectMap ========
   300         *  A section name to SectionSpec mapping
   301         *
   302         *  This is a program specific mapping of output section names to
   303         *  {@link #SectionSpec} objects. The map supports mapping of section
   304         *  names to memory names; see {@link xdc.platform.IPlatform#sectMap}.
   305         *
   306         *  This parameter enables program configurations to place named
   307         *  sections in platform specific memory regions.  During generation of
   308         *  the linker command file, sections are mapped to named memories by
   309         *  first consulting this table; if the table does not contain a mapping,
   310         *  the target classifies each section as either "code", "data" or
   311         *  "stack" {@link xdc.bld.ITarget#sectMap} and the platform defines a
   312         *  memory region for each of these section types
   313         *  ({@link xdc.platform.IPlatform#codeMemory}/
   314         *  {@link xdc.platform.IPlatform#dataMemory}).  If
   315         *  this does not produce a result, an error is generated.
   316         *  It is important to note that `sectMap` does not contain the complete
   317         *  section allocation for the program. It only contains the entries
   318         *  explicitly added to `sectMap`. To get the complete section
   319         *  allocation, a user should call {@link #getSectMap}.
   320         *
   321         *  Suppose for example that the platform defines a memory segment
   322         *  named "DDR2".  The following configuration statement places
   323         *  everything from the ".text" section into the "DDR2" segment.
   324         *
   325         *  @p(code)
   326         *      Program.sectMap[".text"] = new Program.SectionSpec();
   327         *      Program.sectMap[".text"].loadSegment = "DDR2";
   328         *  @p
   329         *
   330         *  @see #SectionSpec
   331         *  @see xdc.platform.IPlatform#sectMap
   332         *  @see xdc.bld.ITarget#sectMap
   333         */
   334        config Any sectMap[string]; /* section name => SectionSpec */
   335
   336        /*!
   337         *  ======== sectionsExclude ========
   338         *  Sections to exclude from linker command file generation
   339         *
   340         *  The `sectionsExclude` string is a JavaScript regular expression
   341         *  that is used to identify names of sections that should NOT be
   342         *  be handled by the normal linker command file generation process.
   343         *
   344         *  Sections whose name matches `sectionsExclude` must be handled
   345         *  using a custom linker command file or by specifying a custom template
   346         *  (see `{@link #sectionsTemplate}` or `{@link #linkTemplate}`).
   347         *  @a(Examples)
   348         *  To completely override the placement of all output sections you can
   349         *  define `sectionsExclude` to match any string.
   350         *  @p(code)
   351         *      // Note: the '.' below represents _any_ character, not just "."
   352         *      Program.sectionsExclude = ".*";
   353         *  @p
   354         *  To override output sections that begin with '.' you must specify
   355         *  the literal character '.' and use the '^' character to match the
   356         *  beginning of the string.
   357         *  @p(code)
   358         *      // the sequence '^\.' matches just "." at the start of the name
   359         *      Program.sectionsExclude = "^\.";
   360         *  @p
   361         *  To override a specific sections you should be careful to supply a
   362         *  regular expression that matches the entire section name.  You can
   363         *  use '$' to match the end of the name.
   364         *  @p(code)
   365         *      // match only ".const" or ".text"
   366         *      Program.sectionsExclude = "^\.const$|^\.text$";
   367         *  @p
   368         *
   369         *  @see #sectionsTemplate, #linkTemplate
   370         */
   371        config String sectionsExclude = null;
   372
   373        /*!
   374         *  ======== memoryExclude ========
   375         *  @_nodoc
   376         *  Exclude memory definitions from linker command file generation
   377         *
   378         *  This parameter accepts boolean values. If true, it disables default
   379         *  memory definitions from being added to the generated linker command
   380         *  file.
   381         *
   382         *  This allows the user to define a custom memory map in a separate file
   383         *  and add it to the linker's command line.
   384         *
   385         *  The parameter was meant to be used only in certain generic platforms,
   386         *  but for now these platforms are not used.
   387         *
   388         *  @see #sectionsTemplate, #sectionsExclude, #linkTemplate
   389         */
   390        config Bool memoryExclude = false;
   391
   392        /*!
   393         *  ======== sectionsTemplate ========
   394         *  Replace the sections portion of the generated linker command file
   395         *
   396         *  The `sectionsTemplate` string names a template that is used to replace
   397         *  the "`SECTIONS`" content to the generated linker command file.  This
   398         *  is useful especially when excluding specific sections via
   399         *  `{@link #sectionsExclude}` or when taking full control of the linker
   400         *  command file via `{@link #linkTemplate}` is unnecessary.  The original
   401         *  "`SECTIONS`" content is computed and passed as an argument to this
   402         *  template, which makes it relatively simple to perform small changes to
   403         *  the "`SECTIONS`" content without having to explicitly handle every
   404         *  section required by the compiler toolchain.
   405         *
   406         *  The `sectionsTemplate` string names a package path relative path; e.g.,
   407         *  if the linker template you want to specify is
   408         *  `"templates/mySections.xdt"` in the package `myCompany.myPackage`,
   409         *  `sectionsTemplate` should be set to:
   410         *  @p(code)
   411         *      "myCompany/myPackage/templates/mySections.xdt"
   412         *  @p
   413         *  If `sectionsTemplate` begins with the string `"./"`, the file is NOT
   414         *  searched for along the package path; instead the file name is taken
   415         *  to specify a file relative to the current working directory.
   416         *
   417         *  In any case, if `sectionsTemplate` is non-`null`, the file must exist;
   418         *  otherwise, the configuration step will fail.
   419         *
   420         *  During expansion of this template, there are three "parameters"
   421         *  that can be referenced to generate new content.
   422         *  @p(dlist)
   423         *      - `this`
   424         *          reference to the `{@link Program}` object
   425         *      - `$args[0]`
   426         *         is the complete section map derived from
   427         *         `{@link Program#sectMap}`; some special sections relevant to
   428         *         XDCtools are added to the map defined by `Program.sectMap`.
   429         *      - `$args[1]`
   430         *         is a string that contains the content that would have been
   431         *         placed in the `SECTIONS` portion of the generated linker
   432         *         command file.  This allows templates to easily modify this
   433         *         content or simply add statements before or after it.
   434         *  @p
   435         *  @a(Example)
   436         *  The following template, specific to TI compiler tools, adds start
   437         *  and size symbols for the `.stack` section and ensures that the stack
   438         *  is the first section to be allocated in its designated memory segment.
   439         *  @p(code)
   440         *    %// first output allocation for the .stack section
   441         *    %var sectMap = $args[0];
   442         *    %var stack = sectMap[".stack"];
   443         *       .stack: >`stack.loadSegment` START(_stack_start) SIZE(_stack_size)
   444         *    %
   445         *    %// now append the normally generated content
   446         *    `$args[1]`
   447         *  @p
   448         *  Note: this example requires that the `.stack` section be excluded
   449         *  from the normal generation via `{@link sectionsExclude}`; otherwise
   450         *  this section will be specified twice by the template shown above.
   451         *  @p(code)
   452         *      Program.sectionsExclude = "^\.stack$";
   453         *  @p
   454         *
   455         *  @see #sectionsExclude, #linkTemplate
   456         */
   457        config String sectionsTemplate = null;
   458
   459        /*!
   460         *  ======== system ========
   461         *  @_nodoc
   462         *  A facade for the {@link xdc.runtime.System#SupportProxy} parameter
   463         *
   464         *  The program configuration script may select an implementation of
   465         *  the `xdc.runtime.ISystemSupport` interface and "bind" it by setting
   466         *  this parameter. If the module assigned to this parameter does not
   467         *  inherit from `xdc.runtime.ISystemSupport`, the configuration will fail.
   468         *
   469         *  If this parameter is not set (or set to `undefined`), then a default
   470         *  implementation is used: `xdc.runtime.SysStd` or, if
   471         *  `Program.build.target.os` is `null`, `xdc.runtime.SysMin`.  Recall that
   472         *  `Program.build.target.os` is specified in the Build Object Model;
   473         *  `Program.build.target` is the target specified when the executable was
   474         *  added to the package.
   475         *
   476         *  If this parameter is set to `null`, then the `System` module is not
   477         *  linked into the application (unless 'Memory' is used); any references
   478         *  to `System`'s methods will result in a linker error.  By setting this
   479         *  parameter to `null`, one is asserting that `System`'s methods will not
   480         *  be used.
   481         */
   482        config Any system;
   483
   484        /*!
   485         *  ======== name ========
   486         *  The name of the executable file
   487         *
   488         *  This is the full file name (relative to the package's base) of the
   489         *  executable that results from this configuration.
   490         *
   491         *  @a(readonly)
   492         *  This parameter is set by the generated program configuration script
   493         *  and must not be modified.
   494         */
   495        config String name;
   496
   497        /*!
   498         *  ======== cfgBase ========
   499         *  UNDER CONSTRUCTION
   500         *  @_nodoc
   501         */
   502        config String cfgBase;
   503
   504        /*!
   505         *  ======== buildPackage ========
   506         *  The name of the executable's package
   507         *
   508         *  This is the full package name (relative to the package's repository)
   509         *  of the package that contains the executable being configured.
   510         *
   511         *  @a(readonly)
   512         *  This parameter is set by the generated program configuration script
   513         *  and must not be modified.
   514         */
   515        config String buildPackage;
   516
   517        /*!
   518         *  ======== endian ========
   519         *  The endianess of the executable
   520         *
   521         *  This parameter is an alias for `build.target.model.dataModel` and is
   522         *  set to one of the following values: `"big"`, `"little"`, or `null`.
   523         *
   524         *  @a(readonly)
   525         *  This parameter is set by the generated program configuration script
   526         *  and must not be modified.
   527         */
   528        config String endian = null;
   529
   530        /*!
   531         *  ======== codeModel ========
   532         *  The memory model for code
   533         *
   534         *  This parameter is an alias for `build.target.model.codeModel` and is
   535         *  set to one of the following target-specific values: `"near"`, `"far"`,
   536         *  `"large"`, or `null`.
   537         *
   538         *  @a(readonly)
   539         *  This parameter is set by the generated program configuration script
   540         *  and must not be modified.
   541         */
   542        config String codeModel = null;
   543
   544        /*!
   545         *  ======== dataModel ========
   546         *  The memory model for data
   547         *
   548         *  This parameter is an alias for `build.target.model.dataModel` and is
   549         *  set to one of the following target-specific values: `"near"`, `"far"`,
   550         *  `"large"`, or `null`.
   551         *
   552         *  @a(readonly)
   553         *  This parameter is set by the generated program configuration script
   554         *  and must not be modified.
   555         */
   556        config String dataModel = null;
   557
   558        /*!
   559         *  ======== build ========
   560         *  This program's build attributes
   561         *
   562         *  This parameter allows arbitrary build attributes to be carried
   563         *  forward from the Build Object Model (BOM) into the configuration
   564         *  model for program configuration scripts to read.
   565         *
   566         *  Conceptually, this config parameter should be declared as follows:
   567         *  @p(code)
   568         *      struct BuildAttrs inherits xdc.bld.Executable.Attrs {
   569         *          config xdc.bld.ITarget.Module target;
   570         *      };
   571         *  @p
   572         *  All parameters of the target associated with the executable being
   573         *  configured are available through '`Program.build.target`'. Any config
   574         *  parameter set in the BOM's `{@link xdc.bld.Executable#attrs}` is also
   575         *  available through `{@link #build}`.  For example, the name of the
   576         *  target is `Program.build.target.name` and the name of the
   577         *  executable's configuration script is `Program.build.cfgScript`.
   578         *
   579         *  @a(readonly)
   580         *  This parameter is set by the generated program configuration script
   581         *  and must not be modified.
   582         */
   583        config Any build;   /*  BuildAttrs */
   584
   585        /*!
   586         *  ======== cpu ========
   587         *  The execution context "seen" by the executable.
   588         *
   589         *  Since the execution context is largely determined by the CPU that
   590         *  runs the executable, this configuration parameter allows scripts with
   591         *  access to the program object to conditionally configure based on CPU
   592         *  characteristics (e.g., ISA or revision of a chip).
   593         *
   594         *  @a(readonly)
   595         *  This parameter is set by the platform's implementation of
   596         *  `xdc.IPackage` (i.e., `package.xs`).
   597         */
   598        config xdc.platform.IExeContext.Instance cpu;
   599
   600        /*!
   601         *  ======== platformName ========
   602         *  The name of the executable's platform
   603         *
   604         *  This field is the name of the platform instance used to create the
   605         *  executable; e.g., `"ti.platforms.sim55xx"`, or
   606         *  `"ti.platforms.sim6xxx:TMS320C6416"`.
   607         *
   608         *  Platform instance names have the form:
   609         *  @p(code)
   610         *      <platform_pkg>:<instance_id>
   611         *  @p
   612         *  where `<platform_pkg>` is the name of the platform package
   613         *  responsible for creating the platform instance and the optional
   614         *  "`:<instance_id>`" is a suffix that uniquely identifies the creation
   615         *  parameters for this instance.
   616         *
   617         *  The creation parameters are the values specified by the map
   618         *  `{@link xdc.bld.BuildEnvironment#platformTable}`;
   619         *  if this map does not contain the platform instance name, the
   620         *  instance is created with default values that are specific to the
   621         *  platform.
   622         *
   623         *  @a(readonly)
   624         *  This parameter is set by the generated program configuration script
   625         *  and must not be modified.
   626         */
   627        config String platformName;
   628
   629        /*!
   630         *  ======== platform ========
   631         *  The executable's platform instance object
   632         *
   633         *  The platform instance that provided an execution context for the
   634         *  executable being configured.
   635         *
   636         *  @a(readonly)
   637         *  This parameter is set by the generated program configuration script
   638         *  and must not be modified.
   639         */
   640        config xdc.platform.IPlatform.Instance platform;
   641
   642        /*!
   643         *  ======== global ========
   644         *  Global variable declarations
   645         *
   646         *  Assignments to this hash table become global symbols that can be
   647         *  used to directly reference objects.  These objects are declared
   648         *  in a generated header that is indirectly included by the header
   649         *  `xdc/cfg/global.h`.
   650         *
   651         *  Configuration scripts define symbols by adding new properties to
   652         *  `global`.
   653         *  @p(code)
   654         *      Program.global.myInstance = Mod.create();
   655         *      Program.global.myString = "hello world";
   656         *  @p
   657         *
   658         *  Programs can reference the symbols defined in `global` by including
   659         *  the C/C++ header `xdc/cfg/global.h` as follows:
   660         *  @p(code)
   661         *      #include <pkg/Mod.h>
   662         *      #include <xdc/cfg/global.h>
   663         *         :
   664         *      Mod_fxn(myInstance, ...);
   665         *      printf("greetings: %s\n", myString);
   666         *  @p
   667         *
   668         *  To compile sources that include `xdc/cfg/global.h`, one symbol must be
   669         *  defined before including this header:
   670         *  @p(dlist)
   671         *      - `xdc_cfg__header__`
   672         *          the package qualified name of the executable-specific C/C++
   673         *          header generated by the program configuration tool; e.g.,
   674         *          `local/examples/package/cfg/mycfg_x62.h`.
   675         *  @p
   676         *  For example, to compile sources that reference the values declared in
   677         *  `{@link #global}` for a TI C6x target with a generated
   678         *  configuration header named `package/cfg/mycfg_x62.h` in a package
   679         *  named `local.examples` the following command line is sufficient:
   680         *  @p(code)
   681         *      cl6x -Dxdc_cfg__header__=local/examples/package/cfg/mycfg_x62.h ...
   682         *  @p
   683         *
   684         *  The `xdc_cfg__header__` symbol is automatically defined when you use
   685         *  the the XDC Build Engine (`{@link xdc.bld}`) to create executables; see
   686         *  `{@link xdc.bld.Executable#addObjects}`
   687         *
   688         *  @see xdc.bld.Executable#addObjects
   689         */
   690        config Any global[string];
   691
   692        /*!
   693         *  ======== symbol ========
   694         *  Global symbol specifications
   695         *
   696         *  UNDER CONSTRUCTION
   697         *  @_nodoc
   698         *
   699         *  This map contains symbol definitions that are used to define aliases
   700         *  or constants.  Symbol names are the C symbol names; i.e., compiler name
   701         *  mangling, such as the addition of a leading "_", is performed
   702         *  automatically.
   703         *
   704         *  @a(Examples)
   705         *  To define a symbolic constant:
   706         *  @p(code)
   707         *      Program.symbol["ONE"] = 1;
   708         *  @p
   709         *  The line above causes the symbol "ONE" to be defined in the linker
   710         *  command file to be equal to 1.  Note this in contrast to defining a
   711         *  variable whose value is 1; symbols do not occupy space, they are just
   712         *  symbolic constants defined in the symbol table of the executable.
   713         *
   714         *  This is currently used by xdc.runtime.Startup to define symbols
   715         *  optionally referenced by boot files that support early startup
   716         *  "reset" functions.
   717         */
   718        config Any symbol[string];
   719
   720        /*!
   721         *  ======== exportModule ========
   722         *  Force all the symbols of a module to be part of a configuration
   723         *
   724         *  Although a call xdc.useModule() will force some of a module's methods
   725         *  to be part of a configuration, the linker is still free to omit any
   726         *  symbols that are not referenced.  Use of exportModule will force all
   727         *  methods of the specified module to be available.
   728         */
   729        Void exportModule(String modName);
   730
   731        /*!
   732         *  ======== getSectMap ========
   733         *  Return the complete mapping of section names to `{@link #SectionSpec}`
   734         *  entries
   735         *
   736         *  The returned map is assembled from `{@link xdc.bld.ITarget#sectMap}`,
   737         *  `{@link xdc.platform.IPlatform#sectMap}`,
   738         *  `{@link xdc.platform.IPlatform#codeMemory}`,
   739         *  `{@link xdc.platform.IPlatform#dataMemory}`,
   740         *  `{@link xdc.platform.IPlatform#stackMemory}` and `{@link #sectMap}`.
   741         *  The function can be called at any time during configuration, but if
   742         *  it is called before all packages had a chance to change `sectMap`,
   743         *  the returned map may not correspond to the actual section
   744         *  allocation as configured in the linker command file.
   745         *
   746         *  @a(returns)
   747         *  `getSectMap` returns a map with section names as keys and
   748         *  `{@link #SectionSpec}` entries as values.
   749         */
   750        function getSectMap();
   751
   752        /*!
   753         *  ======== importAssembly ========
   754         *  UNDER CONSTRUCTION
   755         *  @_nodoc
   756         */
   757        Void importAssembly(String asmName);
   758
   759        /*!
   760         *  ======== targetModules ========
   761         *  UNDER CONSTRUCTION
   762         *  @_nodoc
   763         *
   764         *  This function returns a list of target modules. The list is completed
   765         *  only after all packages are closed, and runtime.finalized() is closed,
   766         *  so the only time when this function can be safely called is from
   767         *  within module$static$init and instance$static$init functions, package
   768         *  validate() functions, and templates.
   769         *
   770         *  This function is currently used by xdc.runtime modules to retrieve a
   771         *  list of modules that use xdc.runtime services. The list therefore does
   772         *  not include modules that have the attribute `@NoRuntime`.
   773         */
   774        function targetModules();
   775    }
   776    /*
   777     *  @(#) xdc.cfg; 1, 0, 2,1; 11-21-2018 13:29:43; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   778     */
   779


module xdc.cfg.SourceDir

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== SourceDir ========
    14     *  Manage config generated source directories
    15     *
    16     *  Every "product" can generate a collection of source files that
    17     *  must be compiled into a single library and linked with the
    18     *  application.  Each collection of source files is placed in a
    19     *  subdirectory of a top-level directory and contains a GNU make file,
    20     *  named makefile, which builds the library.
    21     *
    22     *  This module generates a top-level makefile that builds all "product"
    23     *  libraries, the top-level directory that houses the "product"
    24     *  sub-directories, and any files necessary for integration with eclipse/CDT
    25     *  managed make.  The generated "product" files need only ensure their
    26     *  sources can be built via their generated makefile (from their
    27     *  sub-directory).
    28     */
    29    @Template("./SourceDir.xdt")
    30    metaonly module SourceDir
    31    {
    32        /*!
    33         *  ======== outputDir ========
    34         *  Top-level directory for config generated sources and makefiles
    35         *
    36         *  This directory path can be either an absolute path or a path
    37         *  relative to the build working directory at the time source files
    38         *  are generated (this is NOT necessarily the same as the build
    39         *  directory at the time the generated sources are built!)
    40         *
    41         *  This parameter must never be set to an existing directory with source
    42         *  files in it. The directory referenced by this parameter can be
    43         *  deleted when a package containing the configuration script is cleaned.
    44         *
    45         *  If `outputDir` is not set, files will be output to the `./src`
    46         *  sub-directory of the directory containing the configuration script.
    47         */
    48        config String outputDir;
    49
    50        /*!
    51         *  ======== toBuildDir ========
    52         *  Top-level build working directory
    53         *
    54         *  @_nodoc
    55         *  This config parameter is the build working directory for the
    56         *  sources generated into `{@link #outputDir}` and is used to determine
    57         *  a relative path from the build directory to the output directory.
    58         *
    59         *  The directory path can be either an absolute path, a path
    60         *  relative from the build working directory at the time source files
    61         *  are generated, or `undefined`.
    62         *
    63         *  If `toBuildDir` and `outputDir` are `undefined`
    64         *  `toBuildDir` is set to be the parent of the build working directory
    65         *  at the time source files are generated; i.e., `"../"`
    66         *
    67         *  If `toBuildDir` is `undefined` and `outputDir` is defined,
    68         *  `toBuildDir` is set to be the build working directory at the time
    69         *  source files are generated; i.e., `"./"`.
    70         */
    71        config String toBuildDir;
    72
    73        /*!
    74         *  ======== makefileName ========
    75         *  Top-level makfile name
    76         *
    77         *  This name is the base name of the makefile which is created in
    78         *  `outputDir`.
    79         */
    80        config String makefileName = "makefile.libs";
    81
    82        /*!
    83         *  ======== verbose ========
    84         *  Output progress messages during a build
    85         *
    86         *  Positive values cause additional progress messages to be displayed.
    87         *  The greater the value, the more information is displayed.
    88         *  @p(dlist)
    89         *      - 0
    90         *          no build progress output
    91         *      - 1
    92         *          output a message when the build is started and when it
    93         *          completes
    94         *      - 2
    95         *          output build progress output (both stdout and stderr) as well
    96         *          all level 1 output
    97         *      - 3
    98         *          output the build commands used as well as all level 2 output
    99         *  @p
   100         */
   101        config Int verbose = 0;
   102
   103        /*!
   104         *  ======== getRelativePath ========
   105         */
   106        metaonly String getRelativePath(String fm, String to);
   107
   108        /*!
   109         *  ======== build ========
   110         *  Run make using the generated makefiles
   111         */
   112        metaonly Int build();
   113
   114    instance:
   115        /*
   116         *  ======== create ========
   117         */
   118        create(String name);
   119
   120        /*!
   121         *  ======== getName ========
   122         */
   123        metaonly String getName();
   124
   125        /*!
   126         *  ======== getGenSourceDir ========
   127         *  Get name of the output directory for this set of source files
   128         *
   129         *  The name is either an absolute path or a path relative to the
   130         *  build directory at the time configuration is run.
   131         */
   132        metaonly String getGenSourceDir();
   133
   134        /*!
   135         *  ======== getGenLibraryName ========
   136         *  Get name of the output library for this set of source files
   137         *
   138         *  The name is either an absolute path or a path relative to the
   139         *  build directory at the time configuration is run.
   140         */
   141        metaonly String getGenLibraryName();
   142
   143        /*!
   144         *  ======== sourceDir ========
   145         *  Source directory for a specific "product's" generated sources
   146         *
   147         *  This path must be relative to `outputDir`.
   148         */
   149        config String sourceDir;
   150
   151        /*!
   152         *  ======== libraryName ========
   153         *  Name of library of compiled sources in `sourceDir`
   154         *
   155         *  This path must be relative to `outputDir`.
   156         */
   157        config String libraryName;
   158
   159        /*!
   160         *  ======== buildLibs ========
   161         *  Build generated library sources
   162         *
   163         *  If set to `false`, the configuration step will not attempt to
   164         *  build the generated library sources.
   165         */
   166        config Bool buildLibs = true;
   167    }
   168    /*
   169     *  @(#) xdc.cfg; 1, 0, 2,1; 11-21-2018 13:29:43; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   170     */
   171


module xdc.platform.ExeContext

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ExeContext.xdc ========
    14     */
    15    package xdc.platform;
    16
    17    /*!
    18     *  ======== ExeContext ========
    19     *  Stock implementation of xdc.platform.IExeContext.
    20     *
    21     *  This module is used by platforms to create execution contexts that
    22     *  must be returned by `{@link xdc.platform.IPlatform#getExeContext()}`.
    23     */
    24    metaonly module ExeContext inherits xdc.platform.IExeContext
    25    {
    26
    27    instance:
    28        /*!
    29         *  ======== create ========
    30         *  Create an execution context.
    31         *
    32         *  An execution context is the "view" that an executable has of the
    33         *  CPU it is running on; e.g., the accessible memory map including
    34         *  platform specific memory or memory mapped registers.
    35         *
    36         *  @param(cpu)     an `{@link xdc.platform.IExeContext#Cpu}` structure
    37         *                  that uniquely identifies a specific CPU
    38         *  @param(board)   an `{@link xdc.platform.IPlatform#Board}` structure
    39         *                  that uniquely identifies a specific board
    40         */
    41        create(xdc.platform.IExeContext.Cpu cpu,
    42            xdc.platform.IPlatform.Board board);
    43    }
    44
    45    /*
    46     *  @(#) xdc.platform; 1, 0, 1,1; 11-21-2018 13:29:53; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    47     */
    48


interface xdc.platform.ICpuDataSheet

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ICpuDataSheet.xdc ========
    14     */
    15    package xdc.platform;
    16
    17    /*!
    18     *  ======== ICpuDataSheet ========
    19     *  CPU information provided by the HW model.
    20     *
    21     *  The information in this interface is read-only, defined by the chip's
    22     *  data sheet, and is obtained by naming a module in a package that
    23     *  implements this interface.
    24     *
    25     *  Data sheets are created by platforms as part of creating an "execution
    26     *  context" (see `{@link xdc.platform.IPlatform#getExeContext}`).  This
    27     *  execution context includes the CPU's memory map as well as any external
    28     *  memory provided by the platform itself, for example.
    29     */
    30    metaonly interface ICpuDataSheet
    31    {
    32
    33    instance:
    34        /*!
    35         *  ======== create ========
    36         *  Create a "data-sheet" for the specified revision of a CPU.
    37         *
    38         *  A "data sheet" for a CPU allows one to get specific attributes
    39         *  for a CPU programatically; e.g., the memory map of the CPU.
    40         *
    41         *  Notice that we don't specify CPU registers when we create a
    42         *  a data-sheet; registers are provided as necessary to the other
    43         *  functions defined in this interface.  This allows one to more easily
    44         *  get memory maps for several different setting of the registers,
    45         *  for example.
    46         *
    47         * @param(revision) a string that identifies revision of the CPU to be
    48         *                  created.
    49         */
    50        create(string revision);
    51
    52        /*!
    53         *  ======== cpuCore ========
    54         *  A string identifying the CPU Core.
    55         *
    56         *  This uniquely identifies the instruction set that the CPU can
    57         *  decode and execute.
    58         */
    59        config string cpuCore;          /* 5400, 5500, etc... */
    60
    61        /*!
    62         *  ======== cpuCoreRevision ========
    63         *  A string that uniquely identifies a revision of the core.
    64         */
    65        config string cpuCoreRevision;    /* 1.2, 2.0, etc... */
    66
    67        /*!
    68         *  ======== minProgUnitSize ========
    69         *  The minimum addressable program unit size in 8-bit bytes
    70         */
    71        config int minProgUnitSize;
    72
    73        /*!
    74         *  ======== minDataUnitSize ========
    75         *  The minimum addressable data unit size in 8-bit bytes
    76         */
    77        config int minDataUnitSize;
    78
    79        /*!
    80         *  ======== dataWordSize ========
    81         *  The size of an int on the target in 8-bit bytes
    82         */
    83        config int dataWordSize;
    84
    85        /*!
    86         *  ======== peripherals ========
    87         *  A map of peripherals available on the device
    88         */
    89        config xdc.platform.IPeripheral.Instance peripherals[string];
    90
    91        /*!
    92         *  ======== deviceHeader ========
    93         *  The optional header file that define device specific constants and
    94         *  structures.
    95         */
    96        config string deviceHeader;
    97
    98        /*!
    99         *  ======== getMemoryMap ========
   100         *  Get the memory map that corresponds to the values of the specified
   101         *  registers.
   102         *
   103         *  If a register is not specified and this register can affect the
   104         *  memory map, the register is assumed to be set to its reset
   105         *  value (the value of the register immediately after a CPU reset).
   106         *
   107         *  @param(registers)   a hash of named registers to values at the time
   108         *                      an executable is to be loaded (for example)
   109         *
   110         *  @a(returns)         Returns an array of
   111         *                      `{@link xdc.platform.IPlatform#Memory}`
   112         *                      objects that represent the memory visible to an
   113         *                      executable running on the CPU.
   114         */
   115    //    xdc.platform.IPlatform.Memory [] getMemoryMap(int registers [string]);
   116        function getMemoryMap(registers);
   117
   118        /*!
   119         *  ======== getRegisterSet ========
   120         *  The set of valid register names for this CPU
   121         *
   122         *  This function returns the complete set of register names that may be
   123         *  passed to the `{@link #getMemoryMap()}` function.  This function is
   124         *  only used to enable one to write a "requires contract" for the
   125         *  `{@link #getMemoryMap()}` function.
   126         *
   127         *  @a(returns) Returns an array of valid register names (strings) for
   128         *              this device; only names from this array are valid keys
   129         *              for the registers argument to `{@link #getMemoryMap()}`.
   130         */
   131    //    string [] getRegisterSet();
   132        function getRegisterSet();
   133    };
   134    /*
   135     *  @(#) xdc.platform; 1, 0, 1,1; 11-21-2018 13:29:53; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   136     */
   137


interface xdc.platform.IExeContext

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== IExeContext.xdc ========
    14     */
    15    package xdc.platform;
    16
    17    /*!
    18     *  ======== IExeContext ========
    19     *  Execution environment interface between a platform and an executable
    20     *
    21     *  This interface describes the execution environment provided by a
    22     *  platform as seen by an executable on a particular CPU at the time
    23     *  it is loaded.
    24     *
    25     *  Execution contexts are created by platforms via
    26     *  `{@link xdc.platform.IPlatform#getExeContext()}`.  Execution contexts are
    27     *  created implicitly just prior to executing a program's configuration
    28     *  script.  This execution context is made available to the configuration
    29     *  script as the global read-only `Program.cpu` configuration parameter;
    30     *  see `{@link xdc.cfg.Program}`.
    31     */
    32    metaonly interface IExeContext
    33    {
    34        /*!
    35         *  ======== Cpu ========
    36         *  CPU attributes necessary to create an execution context.
    37         *
    38         *  Attributes that uniquely identify the CPU responsible for executing
    39         *  an executable image.
    40         */
    41        struct Cpu {
    42            string      id;             /*! unique id within the platform */
    43            string      catalogName;    /*! name of catalog package */
    44            string      deviceName;     /*! module name within catalog package */
    45            string      revision;       /*! revision of specified device */
    46            float       clockRate;      /*! clock rate in MHz of CPU on board */
    47        };
    48
    49    instance:
    50        /*!
    51         *  ======== id ========
    52         *  The CPU's unique id within the platform
    53         *
    54         *  This id is the string used to identify a specific CPU within
    55         *  the platform that provides this execution context.
    56         *
    57         *  @a(readonly) This parameter is set by the platform and is readonly
    58         *  for configuration scripts.
    59         */
    60        config string id;
    61
    62        /*!
    63         *  ======== catalogName ========
    64         *  The name of the package containing the module named by deviceName
    65         *
    66         *  This string names a package containing one or more modules that
    67         *  implements the `{@link xdc.platform.ICpuDataSheet}` interface.
    68         *
    69         *  @a(readonly) This parameter is set by the platform and is readonly for
    70         *  configuration scripts.
    71         */
    72        config string catalogName;
    73
    74        /*!
    75         *  ======== deviceName ========
    76         *  The name of a CPU device within the catalog package catalogName
    77         *
    78         *  This string names a module in the catalog package, specified by
    79         *  catalogName, that represents the CPU that runs the executable; i.e.,
    80         *  it implements the `{@link xdc.platform.ICpuDataSheet}` interface.
    81         */
    82        config string deviceName;
    83
    84        /*!
    85         *  ======== revision ========
    86         *  The revision of the CPU
    87         *
    88         *  @a(readonly) This parameter is set by the platform and is readonly for
    89         *  configuration scripts.
    90         */
    91        config string revision = "";
    92
    93        /*!
    94         *  ======== clockRate ========
    95         *  The clock rate in MHz of the CPU
    96         *
    97         *  @a(readonly) This parameter is set by the platform and is readonly for
    98         *  configuration scripts.
    99         */
   100        config float clockRate;
   101
   102        /*!
   103         *  ======== board ========
   104         *  The board-level attributes
   105         *
   106         *  This parameter defines the static attributes of the board
   107         *  containing the CPU that runs the executable.
   108         *
   109         *  @a(readonly) This parameter is set by the platform and is readonly for
   110         *  configuration scripts.
   111         */
   112        readonly config IPlatform.Board board;
   113
   114        /*!
   115         *  ======== attrs ========
   116         *  The CPU "data-sheet" attributes
   117         *
   118         *  This "data sheet" allows one to get information about the CPU that
   119         *  runs the run the executable associated with this execution context.
   120         *
   121         *  Multi-CPU platforms provide multiple execution contexts; each
   122         *  context is associated with a single CPU on the platform.
   123         *
   124         *  @a(readonly) This parameter is set by the platform and is readonly for
   125         *  configuration scripts.
   126         */
   127        config ICpuDataSheet.Instance attrs;
   128
   129        /*!
   130         *  ======== memoryMap ========
   131         *  The memory map seen by executables at the time they are loaded
   132         *
   133         *  @a(readonly) This parameter is set by the platform and is readonly for
   134         *  configuration scripts.
   135         */
   136        config IPlatform.Memory memoryMap[string];
   137    };
   138    /*
   139     *  @(#) xdc.platform; 1, 0, 1,1; 11-21-2018 13:29:53; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   140     */
   141


interface xdc.platform.IPeripheral

     1    /*
     2     *  Copyright (c) 2010 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== IPeripheral.xdc ========
    14     */
    15
    16    package xdc.platform;
    17
    18    /*!
    19     *  ======== IPeripheral ========
    20     *  Configuration-time representation of a peripheral.
    21     *
    22     */
    23    metaonly interface IPeripheral
    24    {
    25        typedef IPeripheral.Instance IPeripheralArray[];
    26
    27        typedef String StringArray[];
    28
    29        /*!
    30         *  ======== addPeripheralsMap ========
    31         *  @_nodoc deprecated
    32         *  Create a map of all peripherals available on a device.
    33         *
    34         *  The config parameter `peripherals` is by default undefined in an
    35         *  `{@link xdc.platform.ICpuDataSheet}` instance. This function gathers
    36         *  all instance configuration parameters that are of the type
    37         *  `{@link xdc.platform.IPeripheral}` into the map `peripherals`.
    38         *
    39         *  @param(cds)     an `{@link xdc.platform.ICpuDataSheet}` instance
    40         *
    41         */
    42        final Void addPeripheralsMap(ICpuDataSheet.Instance cds);
    43
    44        /*!
    45         *  ======== getAll ========
    46         *  Find all peripherals of a certain type.
    47         *
    48         *  The type of the peripherals returned is defined by the type of the
    49         *  caller.
    50         *
    51         *  @a(returns)     Returns an array of IPeripheral instances
    52         *
    53         */
    54        IPeripheralArray getAll();
    55
    56        /*!
    57         *  ======== getRegisters ========
    58         *  Find all registers defined by the peripheral.
    59         *
    60         *  @a(returns)     Returns an array of register names
    61         *
    62         */
    63        StringArray getRegisters();
    64
    65    instance:
    66
    67        /*!
    68         *  ======== name ========
    69         *  Specific peripheral name given by the device.
    70         *
    71         *  Devices can have more than one peripheral of the same type. In such
    72         *  cases, device data sheets give different names to the instances of a
    73         *  same peripheral. For example, the name for a timer module could be
    74         *  `TimerA3`, and a device that has two such timers can name them `TA0`
    75         *  and `TA1`.
    76         */
    77        config string name;
    78
    79        /*!
    80         *  ======== owner ========
    81         *  String specifying the entity that manages the peripheral
    82         *
    83         */
    84        config string owner;
    85    }
    86    /*
    87     *  @(#) xdc.platform; 1, 0, 1,1; 11-21-2018 13:29:53; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    88     */
    89


interface xdc.platform.IPlatform

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== IPlatform.xdc ========
    14     */
    15
    16    package xdc.platform;
    17
    18    /*!
    19     *  ======== IPlatform ========
    20     *  Configuration-time interface to all platforms.
    21     *
    22     *  This interface defines the elements that must be implemented by all
    23     *  "platform packages".  All programs are built to execute on a platform
    24     *  and each program includes exactly one platform package (which defines
    25     *  the platform).
    26     *
    27     *  Platform packages contain exactly one module named "Platform" which
    28     *  implements the `xdc.platform.IPlatform` interface defined here.
    29     *
    30     *  Program configuration scripts may read (but not modify) the attributes
    31     *  provided by this interface from the global `Program` object; see
    32     *  `{@link xdc.cfg.Program#platform}`.
    33     */
    34    metaonly interface IPlatform
    35    {
    36        /*!
    37         *  ======== Board ========
    38         *  Board-level description.
    39         */
    40        struct Board {
    41            string   id;            /*! unique id within the platform */
    42            string   boardName;     /*! name of the board */
    43            string   boardFamily;   /*! optional family name */
    44            string   boardRevision; /*! optional revision string */
    45        };
    46
    47        /*!
    48         *  ======== Memory ========
    49         *  A named contiguous range of addresses.
    50         *
    51         *  Memory structures are used in the description of the memory available
    52         *  from CPUs and platforms.
    53         */
    54        struct Memory {
    55            string      comment;    /*! description of this block */
    56            string      name;       /*! name of memory segment */
    57            string      space;      /*! "code", "data", "code/data", etc.... */
    58            unsigned    page;       /*! page of memory segment */
    59            unsigned    base;       /*! base address of memory segment */
    60            unsigned    len;        /*! length of memory segment */
    61            string      access;     /*! attributes of memory: "RWX" */
    62            Bool        cacheable;  /*! Is this block cacheable? */
    63            Any         cacheAttrs; /*! Device specific MMU attributes */
    64        };
    65
    66        /*! Type to be used for maps of Memory objects */
    67        typedef Memory MemoryMap[string];
    68
    69    instance:
    70        /*!
    71         *  ======== create ========
    72         *  Constructor for IPlatform instances.
    73         *
    74         *  @param(name)    the name of the platform instance being created
    75         *
    76         *                  This name is the suffix of the platform
    77         *                  specification supplied in the build script after
    78         *                  the platform name (and optional ':') prefix has
    79         *                  been removed.  So the platform instance name
    80         *                  "joes.platform.foo:bar" results in the name "bar"
    81         *                  and the name "joes.platform.foo" result in the name
    82         *                  "".
    83         */
    84        create(string name);
    85
    86        /*
    87         *  ======== memTab ========
    88         *  A mapping of memory names to external memory objects.
    89         *
    90         *  This hash table is used to map linker memory region names ("EPROG",
    91         *  "EDATA", etc.) to `{@link xdc.platform.IPlatform#Memory}` objects.
    92         *  During generation of linker command files, for example, this table
    93         *  may be used to genenerate physical memory map declarations.
    94         *
    95         *  Platforms with a fixed memory map can initialize this table
    96         *  "statically" in Platform.xdc using the following syntax:
    97         *  @p(code)
    98         *      override config xdc.platform.IPlatform.Memory memTab[string] = [
    99         *          ["PMEM", {name: "PMEM", base: 0x00000200, len: 0x0000FE00}],
   100         *              :
   101         *      ];
   102         *  @p
   103         *  Alternatively, platforms can initialize this table dynamically in
   104         *  the platform package's `init()` function (see `{@link xdc.IPackage}`)
   105         *  using the following syntax:
   106         *  @p(code)
   107         *    function init()
   108         *    {
   109         *              :
   110         *        this.memTab["PMEM"] = {name: "PMEM", base: 0x200, len: 0xFE00};
   111         *              :
   112         *    }
   113         *  @p
   114         *  @a(readonly)   this parameter is set by the platform and read by
   115         *              program configuration scripts.
   116         */
   117    //    config Memory memTab[string];     /* memory name => memory object */
   118
   119        /*!
   120         *  ======== externalMemoryMap ========
   121         *  A mapping of memory names to memory objects for external memory.
   122         *
   123         *  This parameter defines the external portion of the platform's memory
   124         *  map.
   125         */
   126        readonly config xdc.platform.IPlatform.Memory externalMemoryMap[string];
   127
   128        /*!
   129         *  ======== customMemoryMap ========
   130         *  A custom mapping of memory names to memory objects.
   131         *
   132         *  This parameter allows platform instances to completely overwrite a
   133         *  default memory map based on the internal memory map coming from CPU's
   134         *  memory map and externalMemoryMap.
   135         *
   136         *  Custom memory map must fit within the default memory map, unless the
   137         *  verification of the fit is disabled (see `{@link xdc.platform}`).
   138         */
   139        config xdc.platform.IPlatform.Memory customMemoryMap[string];
   140
   141        /*!
   142         *  ======== renameMap ========
   143         *  A map for renaming memory objects.
   144         *
   145         *  This map renames memory objects. If you do not want to change
   146         *  addresses in the default memory map, but you only want to rename the
   147         *  existing memory objects, you should use this parameter.
   148         *
   149         *  This map and `customMemoryMap` should not be used together because this
   150         *  map renames the default memory, but then `customMemoryMap` replaces the
   151         *  default memory objects. The parameters `codeMemory`, `dataMemory` and
   152         *  `stackMemory` are not automatically reassigned to new names. It is the
   153         *  user's responsibility to set those parameters accordingly to
   154         *  `renameMap`.
   155         */
   156        config string renameMap[string];
   157
   158        /*!
   159         *  ======== dataMemory ========
   160         *  The default segment for data sections.
   161         *
   162         *  Each target has a section map with keys equal to the names of all
   163         *  sections that compiler and assembler for that target generate. The
   164         *  value for each key is either "code" or "data" or "stack". A linker
   165         *  template reads that map and puts all "data" sections in the segment
   166         *  defined by this configuration parameter.
   167         *
   168         *  @see #codeMemory
   169         *  @see #stackMemory
   170         */
   171        config string dataMemory;
   172
   173        /*!
   174         *  ======== codeMemory ========
   175         *  The default segment for code sections.
   176         *
   177         *  Each target has a section map with keys equal to the names of all
   178         *  sections that compiler and assembler for that target generate. The
   179         *  value for each key is either "code" or "data" or "stack". A linker
   180         *  template reads that map and puts all "code" sections in the segment
   181         *  defined by this configuration parameter.
   182         *
   183         *  @see #dataMemory
   184         *  @see #stackMemory
   185         */
   186        config string codeMemory;
   187
   188        /*!
   189         *  ======== stackMemory ========
   190         *  The default segment for stack.
   191         *
   192         *  Each target has a section map with keys equal to the names of all
   193         *  sections that compiler and assembler for that target generate. The
   194         *  value for each key is either "code" or "data" or "stack". A linker
   195         *  template reads that map and puts all "stack" sections in the segment
   196         *  defined by this configuration parameter.
   197         *
   198         *  @see #dataMemory
   199         *  @see #codeMemory
   200         */
   201        config string stackMemory;
   202
   203        /*!
   204         *  ======== sectMap ========
   205         *  A mapping of linker output section names to memory segments.
   206         *
   207         *  During the generation of linker command files, the templates used to
   208         *  create these files examine several sources of information to determine
   209         *  the placement of named output sections into memory segments defined
   210         *  by the platform.  The default placement, described below,
   211         *  uses information from the target and this platform's
   212         *  `{@link #codeMemory}`, `{@link #dataMemory}`, and
   213         *  `{@link #stackMemory}` configuration parameters.
   214         *
   215         *  `sectMap` is used to override this default placement of
   216         *  output sections (".text", ".cinit", etc.) to a memory
   217         *  segment defined by the platform's memory map.  For example, even if
   218         *  a platform's `codeMemory` parameter is defined to be "SRAM" and
   219         *  ".cinit" output sections are "code" sections, if the platform also
   220         *  defines the following `sectMap`, the section ".cinit" will be placed
   221         *  into a memory segment named "DDR2".
   222         *  @p(code)
   223         *      sectMap[] = [
   224         *          [".cinit", "DDR2"],
   225         *      ];
   226         *  @p
   227         *
   228         *  @a(Note) If an output section has an entry in
   229         *  `{@link xdc.cfg.Program#sectMap Program.sectMap}`, that entry
   230         *  overrides the placement specified by this `sectMap`.  A program's
   231         *  `sectMap` configuration always overrides the platform's `sectMap`
   232         *  settings.
   233         *
   234         *  @a(Default Mapping)
   235         *  The default placement of a target's output sections into memory
   236         *  segments defined by the platform is determined by the following
   237         *  configuration parameters:
   238         *  @p(blist)
   239         *      - `{@link xdc.bld.ITarget#sectMap ITarget.sectMap}`
   240         *          used to map a named output section to either "code", "data",
   241         *          or "stack"
   242         *      - `{@link #codeMemory}`
   243         *          names a memory segment that will contain all "code"
   244         *          output sections
   245         *      - `{@link #dataMemory}`
   246         *          names a memory segment that will contain all "data"
   247         *          output sections
   248         *      - `{@link #stackMemory}`
   249         *          names a memory segment that will contain all "stack"
   250         *          output sections
   251         *  @p
   252         *
   253         *  @see xdc.cfg.Program#sectMap
   254         *  @see xdc.bld.ITarget#sectMap
   255         */
   256        config string sectMap[string]; /* section name => memory segment */
   257
   258        /*!
   259         *  ======== peripherals ========
   260         *  @_nodoc
   261         *
   262         *  A map of peripherals available on a platform instance
   263         *
   264         *  The map contains peripherals from an
   265         *  `{@link xdc.platform.ICpuDataSheet}` instance available as
   266         *  `{@link xdc.cfg.Program#cpu.attrs}`, and peripherals defined in this
   267         *  platform instance. The map is initialized by the platform instance,
   268         *  and in multicore platforms the instance must add only peripherals
   269         *  available to the CPU for which an executable is being built.
   270         */
   271        config IPeripheral.Instance peripherals[string];
   272
   273        /*!
   274         *  ======== getCpuDataSheet ========
   275         *  Get the Cpu data sheet object corresponding to specified cpu id.
   276         *
   277         *  This function executes in either the Configuration object model
   278         *  or the Build object model.
   279         *
   280         *  @param(cpuId)   a string that corresponds to the platform-specific id
   281         *                  of a CPU on this platform that runs executables.
   282         *
   283         *  @a(returns)     Returns an `{@link xdc.platform.ICpuDataSheet}`
   284         *                  instance object that corresponds to the specified
   285         *                  cpuId.
   286         *
   287         *  @a(throws)      `Error` exceptions are thrown for fatal errors.
   288         */
   289        function getCpuDataSheet(cpuId);
   290    //    xdc.platform.ICpuDataSheet.Instance getCpuDataSheet(string cpuId);
   291
   292        /*!
   293         *  ======== getCreateArgs ========
   294         *  DEPRECATED
   295         *  @_nodoc
   296         *
   297         *  Get the value of the args parameter used to create this instance
   298         *
   299         *  This function executes in either the Configuration object model
   300         *  or the Build object model.
   301         *
   302         *  @a(returns)     Returns the "args" object that passed to this
   303         *                  module's create method when the instance was created.
   304         *
   305         *  @a(throws)      `Error` exceptions are thrown for fatal errors.
   306         */
   307        function getCreateArgs();
   308    // any getCreateArgs();
   309
   310        /*!
   311         *  ======== getExeContext ========
   312         *  Get execution context object corresponding to the specified program.
   313         *
   314         *  This is called before the program's configuration script runs to
   315         *  get the Cpu object that is assigned to the program's cpu field.
   316         *
   317         *  Note: that the build script for the program is responsible for
   318         *  specifying the CPU; this is done by either implicitly naming the
   319         *  platform or explicitly naming a particular CPU on the platform
   320         *  (see `{@link xdc.bld.Executable#Attrs.cpuId}`).
   321         *
   322         *  This function executes in the Configuration object model.
   323         *
   324         *  @param(prog)    the `{@link xdc.cfg.Program}` object representing the
   325         *                  program being configured.
   326         *
   327         *                  This object contains the following properties that
   328         *                  allows the platform to determine the appropriate Cpu
   329         *                  object to return (if there is more than one):
   330         *                      `prog.build.cpuId`,
   331         *                      `prog.build.cpuArgs`,
   332         *                      `prog.build.target`,
   333         *
   334         *  @a(returns)     Returns an `{@link xdc.platform.IExeContext}` instance
   335         *                  object that corresponds to the CPU that will run the
   336         *                  specified program.
   337         *
   338         *  @a(throws)      `Error` exceptions are thrown for fatal errors.
   339         */
   340        function getExeContext(prog);
   341    //    xdc.platform.IExeContext.Instance getExeContext(xdc.cfg.Program.Module prog);
   342
   343        /*!
   344         *  ======== getExecCmd ========
   345         *  Get the exec command used to run the program on this platform.
   346         *
   347         *  This function is called after the program's configuration script runs
   348         *  and returns commands that are used to load and run the specified
   349         *  program.  These commands are placed in a makefile that is included
   350         *  by the client package's generated makefile.  Thus, the commands may
   351         *  refer to macros defined in this environment; e.g., `$(SHELL)` and
   352         *  `$(XDCROOT)`, etc.
   353         *
   354         *  The special macro `$(1)` expands to test-specific arguments
   355         *  (`{@link xdc.bld.Test#attrs.execArgs}`) that are passed from the test
   356         *  to the platform's exec command.  Thus, all platforms that support
   357         *  arguments to their exec command, should embed "`$(1)`" within the
   358         *  command string at the appropriate place to have these arguments
   359         *  interpreted by the exec command.
   360         *
   361         *  For example, a platform that uses a shell script to run executables
   362         *  and allows options to be passed to the shell script might return
   363         *  the following string:
   364         *  @p(code)
   365         *      "$(SHELL) <exec_path> $(1) <exe_name>"
   366         *  @p
   367         *  where, `<exec_path>` is the absolute path to the platform's exec
   368         *  shell script, and `<prog_name>` is the name of the executable relative
   369         *  to the package's base directory (i.e., `{@link xdc.cfg.Program#name}`).
   370         *
   371         *  This function executes in the Configuration object model.
   372         *
   373         *  @param(prog)    the `{@link xdc.cfg.Program}` object representing the
   374         *                  program being configured.
   375         *
   376         *                  This object contains the following properties that
   377         *                  allows the platform to determine the appropriate Cpu
   378         *                  object to return (if there is more than one):
   379         *                      `prog.build.cpuId`,
   380         *                      `prog.build.cpuArgs`,
   381         *                      `prog.build.target`
   382         *
   383         *  @param(platPath) full path to the platform package for the program
   384         *
   385         *  @a(returns)     Returns a string of commands used to execute this
   386         *                  program in the context of the XDC generated makefiles.
   387         *
   388         *  @a(throws)      `Error` exceptions are thrown for fatal errors.
   389         */
   390        function getExecCmd(prog, platPath);
   391    //    string  getExecCmd(xdc.cfg.Program.Module prog, string platPath);
   392
   393        /*!
   394         *  ======== getLinkTemplate ========
   395         *  Get Linker Command file template used to link an executable.
   396         *
   397         *  In the event that no template is provided by the program
   398         *  configuration script (see `{@link xdc.cfg.Program#linkTemplate}`),
   399         *  the template file identified by this method is used to generate the
   400         *  linker command file used to create the executable.
   401         *
   402         *  This function executes in the Configuration object model and
   403         *  is called after the program configuration script runs.  The template
   404         *  is expanded in the context of the Configuration Object Model.
   405         *
   406         *  @param(prog)    the `{@link xdc.cfg.Program}` object representing the
   407         *                  program being configured.
   408         *
   409         *                  This object contains the following properties that
   410         *                  allows the platform to determine the appropriate link
   411         *                  template to return:
   412         *                  @p(blist)
   413         *                      - `prog.build.cpuId`,
   414         *                      - `prog.build.cpuArgs`,
   415         *                      - `prog.build.target`
   416         *                  @p
   417         *  @a(returns)     Returns a path string to a template file or `null`.  If
   418         *                  `null`, no linker command file is generated; otherwise
   419         *                  this path is relative to the package path.
   420         *
   421         *  @a(throws)      `Error` exceptions are thrown for fatal errors.
   422         */
   423        function getLinkTemplate(prog);
   424    //    string getLinkTemplate(prog);
   425    }
   426    /*
   427     *  @(#) xdc.platform; 1, 0, 1,1; 11-21-2018 13:29:53; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   428     */
   429


package xdc.platform

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== xdc.platform ========
    14     *  Interfaces and modules necessary for the XDC Platform Model
    15     *
    16     *  @a(Custom Memory Check)
    17     *  If a custom memory map is specified for a platform, through the
    18     *  configuration parameter `{@link xdc.platform.IPlatform#customMemoryMap}`,
    19     *  the custom map is checked
    20     *  against the default memory map to verify if the custom map fits within
    21     *  the default map. The environment variable `xdc.platform.custom.check`
    22     *  controls this check.
    23     *
    24     *  By default, the check is enabled. It can be disabled by passing
    25     *  `-Dxdc.platform.custom.check="false"` to the XDCscript shell (`xs`),
    26     *  which is used to run the `{@link xdc.tools.configuro configuro}` command
    27     *  line configuration tool.
    28     *  If, on the other hand, you are using `xdc` to run the configuration step
    29     *  you can set this variable by setting the
    30     *  `{@link xdc.bld.Executable#Attrs xsopts}` attribute of an
    31     *  `{@link xdc.bld.Executable}` within a build script.
    32     */
    33    package xdc.platform [1, 0, 1] {
    34        /* platform model interfaces */
    35        interface IPlatform, ICpuDataSheet, IExeContext, IPeripheral;
    36
    37        /* utility modules that implement core behavior */
    38        module ExeContext, Utils;
    39    }
    40    /*
    41     *  @(#) xdc.platform; 1, 0, 1,1; 11-21-2018 13:29:53; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    42     */
    43


module xdc.platform.Utils

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== Utils.xdc ========
    14     */
    15
    16    package xdc.platform;
    17
    18    /*!
    19     *  ======== Utils ========
    20     *  Misc platform utilities
    21     */
    22    metaonly module Utils
    23    {
    24        /*!
    25         *  ======== addPeripheralsMap ========
    26         *  Create a map of all peripherals available on a device.
    27         *
    28         *  The config parameter `peripherals` is by default undefined in an
    29         *  `{@link xdc.platform.ICpuDataSheet}` instance. This function gathers
    30         *  all instance configuration parameters that are of the type
    31         *  `{@link xdc.platform.IPeripheral}` into the map `peripherals`.
    32         *
    33         *  @param(cds)     an `{@link xdc.platform.ICpuDataSheet}` instance
    34         *
    35         */
    36        Void addPeripheralsMap(ICpuDataSheet.Instance cds);
    37
    38        /*!
    39         *  ======== assembleMemoryMap ========
    40         *  Combine the device and the external memory map into a platform map
    41         *
    42         *  This function combines memory maps and also applies memory map name
    43         *  changes requested through renameMap.
    44         *
    45         *  @param(cpu)     an `xdc.platform.IExeContext` object
    46         *
    47         *  @param(plat)    a platform instance
    48         *
    49         *  @param(noCheck) if true, and a custom memory map is defined, the
    50         *                  function does not check if the custom memory map fits
    51         *                  into the available physical memory
    52         *
    53         *  @a(returns)     platform memory map
    54         */
    55        function assembleMemoryMap(cpu, plat, noCheck);
    56
    57        /*!
    58         *  ======== assemblePeripheralsMap ========
    59         *  Create a map of all peripherals available on a platform.
    60         *
    61         *  The config parameter `peripherals` is by default undefined in an
    62         *  `{@link xdc.platform.IPlatform}` instance. This function gathers
    63         *  all peripherals defined in an `{@link xdc.platform.ICpuDataSheet}`
    64         *  instance available as `{@link xdc.cfg.Program#cpu.attrs}`, and adds
    65         *  peripherals defined in this platform instance. By providing a list
    66         *  of config parameter names, the instance can add only listed
    67         *  peripherals instead of adding all available ones.
    68         *
    69         *  @param(inst)    an `xdc.platform.IPlatform` instance
    70         *  @param(cds)     an `xdc.platform.ICpuDataSheet` instance
    71         *  @param(names)   an optional list of names of `IPeripheral` parameters
    72         *
    73         */
    74        Void assemblePeripheralsMap(ICpuDataSheet.Instance cds,
    75                                      IPlatform.Instance inst, String names[] = []);
    76
    77        /*!
    78         *  ======== checkDefaults ========
    79         *  Check if dataMemory, codeMemory and stackMemory are set correctly
    80         *
    81         *  The `xdc.platform.IPlatform` instance parameters 'dataMemory',
    82         *  'codeMemory', and 'stackMemory' are strings. This function verifies
    83         *  that those strings correspond to names of the memory objects in the
    84         *  supplied memory map.
    85         *
    86         *  @param(inst)    an `xdc.platform.IPlatform` instance
    87         *
    88         *  @param(memMap)  a map of `xdc.platform.IPlatform.Memory` objects
    89         *
    90         *  @a(returns)     'true' if checked parameters are valid, 'false'
    91         *                  otherwise
    92         */
    93        function checkDefaults(inst, memMap);
    94
    95        /*!
    96         *  ======== checkFit ========
    97         *  Check if a memory map fits into available physical memory
    98         *
    99         *  A custom memory map segment can be spread over multiple physical
   100         *  memories or multiple custom memory map segments can be located in
   101         *  one physical memory. However, code/data restrictions must be followed.
   102         *  A custom memory segment with the parameter 'space' set to "code/data",
   103         *  which is the default value if the parameter was not specified, can fit
   104         *  only into "code/data" physical memories. Custom memory segments with
   105         *  'space' set to "code" can fit into "code" and "code/data" memories, and
   106         *  custom memory segments with 'space' set to "data" can fit into "data"
   107         *  and "code/data" physical memories.
   108         *
   109         *  @param(realMemMap)      a map of `xdc.platform.IPlatform.Memory`
   110         *                          objects containing physical memory map as
   111         *                          defined in datasheets for the device and the
   112         *                          platform
   113         *
   114         *  @param(customMemMap)    a map of `xdc.platform.IPlatform.Memory`
   115         *                          objects containing user defined memory map,
   116         *                          which must fit within boundaries of 'realMemMap'
   117         *
   118         *  @a(returns)             'true', if customMemMap fits within realMemMap,
   119         *                          and 'false' otherwise
   120         */
   121        function checkFit(realMemMap, customMemMap);
   122
   123        /*!
   124         *  ======== checkOverlap ========
   125         *  Check if there is an overlap among memory objects in a memory map
   126         *
   127         *  @param(memMap)  a map of `xdc.platform.IPlatform.Memory` objects
   128         *
   129         *  @a(returns)     a string with names of Memory objects that overlap
   130         */
   131        function checkOverlap(memMap);
   132
   133        /*!
   134         *  ======== getCpuDataSheet ========
   135         *  Get the specified cpu data sheet object
   136         *
   137         *  @param(cpuDesc) an `xdc.platform.IExeContext.Cpu` object identifying
   138         *                  the CPU device
   139         *
   140         *  @a(returns)     an `xdc.platform.ICpuDataSheet.Instance` object that
   141         *                  corresponds to the specified cpuDesc
   142         *
   143         *  @a(throws)      `Error` exceptions are thrown for fatal errors
   144         */
   145        function getCpuDataSheet(cpuDesc);
   146    }
   147
   148    /*
   149     *  @(#) xdc.platform; 1, 0, 1,1; 11-21-2018 13:29:53; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   150     */
   151


package xdc.platform.generic

     1    requires xdc.platform [1,0,1];
     2
     3    /*!
     4     *  ======== xdc.platform.generic ========
     5     *  Platform package for the generic platform.
     6     *
     7     *  This package implements the interfaces (xdc.platform.IPlatform)
     8     *  necessary to build and run executables on a "generic" platform; a
     9     *  platform specified by:
    10     *  @p(blist)
    11     *      - device name; e.g., "TMS320C2812"
    12     *      - catalog name; the name of a package containing the device named above
    13     *      - clock rate; the clock rate in MHz of the CPU
    14     *      - external memory map; an array of memory blocks external to the device
    15     *  @p
    16     *  For a complate list of parameters that can be specified when creating a
    17     *  platform instance see the instance configuration parameters specified
    18     *  by `{@link xdc.platform.generic.Platform}`.  This list, of course,
    19     *  includes all the instance config parameters specified by the
    20     *  `{@link xdc.platform.IPlatform}` interface.
    21     *
    22     *  @a(Throws)
    23     *  `XDCException` exceptions are thrown for fatal errors. The following error
    24     *  codes are reported in the exception message:
    25     *  @p(dlist)
    26     *      -  `xdc.platform.generic.LINK_TEMPLATE_ERROR`
    27     *           This error is raised when this platform cannot found the default
    28     *           linker command template `linkcmd.xdt` in the build target's
    29     *           package. When a target does not contain this file, the config
    30     *           parameter `{@link xdc.cfg.Program#linkTemplate}` must be set.
    31     *  @p
    32     *
    33     *  @a(EXAMPLES)
    34     *  Example 1: Suppose you need to create an application for a HW platform
    35     *  that uses the TMS320C2812 running at 150 MHz.  You can use this package
    36     *  (in lieu of one specifically created for the HW platform) by defining a
    37     *  named instance of this package's Platform module.  Add the following
    38     *  statements to your `config.bld` file to add the platform instance named
    39     *  "xdc.platform.generic:C28".
    40     *  @p(code)
    41     *      Build.platformTable["xdc.platform.generic:C28"] = {
    42     *          clockRate:   150,
    43     *          catalogName: "ti.catalog.c2800",
    44     *          deviceName:  "TMS320C2812"
    45     *      };
    46     *  @p
    47     *  With this name defined, it is now possible to configure an application
    48     *  using the platform instance name "xdc.platform.generic:C28".  For example,
    49     *  if you are using `{@link xdc.tools.configuro}` to configure your
    50     *  application, the string "xdc.platform.generic:C28" can now be used to
    51     *  identify your platform:
    52     *  @p(code)
    53     *      xs xdc.tools.configuro -b config.bld -p xdc.platform.generic:C28 ...
    54     *  @p
    55     *
    56     *  @p(html)
    57     *  <hr/>
    58     *  @p
    59     *
    60     *  Example 2: The following example illustrates how to specify a platform
    61     *  instance with memory regions external to the specified device.  In this
    62     *  case, we define a platform using a TMS320C6416 running at 600 MHz on a
    63     *  board with two external SDRAM memory blocks.
    64     *  @p(code)
    65     *      Build.platformTable["xdc.platform.generic:C64"] = {
    66     *          clockRate:          600,
    67     *          catalogName:        "ti.catalog.c6000",
    68     *          deviceName:         "TMS320C6416",
    69     *          externalMemoryMap : [
    70     *              ["SDRAM1", {
    71     *                  name: "SDRAM1",
    72     *                  base: 0x80000000, len: 0x1000000, space: "code/data"
    73     *              }],
    74     *              ["SDRAM2", {
    75     *                  name: "SDRAM2",
    76     *                  base: 0x90000000, len: 0x1000000, space: "code/data"
    77     *              }],
    78     *          ]
    79     *      }
    80     *  @p
    81     *
    82     *  The `externalMemoryMap` attribute is a map of string names to
    83     *  `{@link xdc.platform.IPlatform#Memory}` structures.
    84     *
    85     *  @see xdc.platform.generic.Platform
    86     *  @see xdc.bld.BuildEnvironment#platformTable
    87     *  @see xdc.platform.IPlatform
    88     */
    89    package xdc.platform.generic [1, 0, 0] {
    90        module Platform;
    91    }
    92    /*
    93     *  @(#) xdc.platform.generic; 1, 0, 0,1; 11-21-2018 13:29:58; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    94     */
    95


module xdc.platform.generic.Platform

     1    /*
     2     *  ======== Platform.xdc ========
     3     */
     4
     5    /*!
     6     *  ======== Platform ========
     7     *  A generic platform that supports any HW platform
     8     *
     9     *  This module implements xdc.platform.IPlatform and defines configuration
    10     *  parameters that correspond to this platform's Cpu's, Board's, etc.
    11     */
    12    metaonly module Platform inherits xdc.platform.IPlatform
    13    {
    14        config xdc.platform.IPlatform.Board BOARD = {
    15            id:             "0",
    16            boardName:      "generic",
    17            boardFamily:    null,
    18            boardRevision:  null
    19        };
    20
    21    instance:
    22
    23        config xdc.platform.IExeContext.Cpu CPU = {
    24            id:             "0",
    25            clockRate:      0,
    26            catalogName:    null,
    27            deviceName:     null,
    28            revision:       "",
    29        };
    30
    31        /*!
    32         *  ======== deviceName ========
    33         *  The CPU provided by this platform
    34         *
    35         *  This parameter is required and named a module within a "catalog"
    36         *  package that implements the `xdc.platform.ICpuDataSheet` interface.
    37         *
    38         *  @see xdc.platform.ICpuDataSheet
    39         *  @see #catalogName
    40         */
    41        config string deviceName;
    42
    43        /*!
    44         *  ======== catalogName ========
    45         *  The name of the package that contains the module 'deviceName'.
    46         *
    47         *  This parameter is required.
    48         *
    49         *  @see #deviceName
    50         */
    51        config string catalogName;
    52
    53        /*!
    54         *  ======== clockRate ========
    55         *  The clock rate for the simulated device.
    56         *
    57         *  This parameter is required. There are no checks to determine if the
    58         *  device can actually support the given clock rate.
    59         *
    60         *  This clock rate is used to compute CPU loads and may be used
    61         *  by configuration scripts to configure/check on-device timers.
    62         */
    63        config Double clockRate;
    64
    65        /*
    66         *  ======== codeMemory ========
    67         *  See xdc.platform.IPlatform
    68         */
    69        override config string codeMemory = null;
    70
    71        /*
    72         *  ======== dataMemory ========
    73         *  See xdc.platform.IPlatform
    74         */
    75        override config string dataMemory = null;
    76
    77        /*
    78         *  ======== stackMemory ========
    79         *  See xdc.platform.IPlatform
    80         */
    81        override config string stackMemory = null;
    82
    83        /*!
    84         *  ======== verbose ========
    85         *  The flag for printing debug info.
    86         */
    87        config Bool verbose;
    88    };
    89    /*
    90     *  @(#) xdc.platform.generic; 1, 0, 0,1; 11-21-2018 13:29:58; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    91     */
    92


module xdc.rov.CallStack

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== CallStack ========
    15     *  Provide call stack support to module ROV views
    16     *
    17     *  This module provides methods that enable module ROV views
    18     *  to specify current CPU registers and get the corresponding
    19     *  stack traceback for the current executable.
    20     *
    21     *  While the methods of this module are currently
    22     *  similar to the `ICallStack` interface, it is important to
    23     *  note that this module does not have instance methods; the
    24     *  `ICallStack` interface defines an interface for instance
    25     *  objects that enable the implementation of this module.
    26     *
    27     *  This module uses the `{@link xdc.rov.ICallStack}` instance
    28     *  provided by `{@link xdc.rov.Model}`.
    29     */
    30    metaonly module CallStack
    31    {
    32        /*!
    33         *  ======== clearRegisters ========
    34         *  Clear all register settings
    35         */
    36        Void clearRegisters();
    37
    38        /*!
    39         *  ======== fetchRegisters ========
    40         *  Set a device register necessary for stack trace back analysis
    41         */
    42        Void fetchRegisters(String names[]);
    43
    44        /*!
    45         *  ======== getRegister ========
    46         *  Set a device register necessary for stack trace back analysis
    47         */
    48        Long getRegister(String name);
    49
    50        /*!
    51         *  ======== setRegister ========
    52         *  Set a device register necessary for stack trace back analysis
    53         */
    54        Void setRegister(String name, Long value);
    55
    56        /*!
    57         *  ======== toText ========
    58         *  Create a string represenation of the call stack
    59         */
    60        String toText();
    61    }
    62    /*
    63     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    64     */
    65


interface xdc.rov.ICallBack

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.rov
    13
    14    /*!
    15     *  ======== ICallBack ========
    16     *  ROV tooling progress callback interface
    17     */
    18    metaonly interface ICallBack {
    19
    20    instance:
    21
    22        /*!
    23         *  ======== updateStartupProgress ========
    24         *  Progress update callback
    25         *
    26         *  The ROV model calls this API at particular points to update any
    27         *  startup progress provided by the client ROV tooling.
    28         */
    29        Void updateStartupProgress(Int percent, String message);
    30
    31        /*!
    32         *  ======== getAbortFlag ========
    33         */
    34        Bool getAbortFlag();
    35    }
    36
    37    /*
    38     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    39     */
    40


interface xdc.rov.ICallStack

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.rov
    13
    14    /*!
    15     *  ======== ICallStack ========
    16     *  A call stack interface (optionally) implementated by ROV servers
    17     *
    18     *  Instances of this interface maintain a "local" set of processor
    19     *  registers sufficient to enable call stack parsing - walking up the C
    20     *  callstack and determining all nested calls up to the current program
    21     *  counter (specified by the local registers).  This "local" set of
    22     *  registers is, of course, processor specific and must include both
    23     *  the program counter ("PC") and a frame pointer (processor-specific
    24     *  register name).
    25     */
    26    metaonly interface ICallStack {
    27
    28    instance:
    29        /*
    30         *  ======== clearRegisters ========
    31         *  Clear all local register values
    32         */
    33        Void clearRegisters();
    34
    35        /*
    36         *  ======== fetchRegisters ========
    37         *  Fetch the current values of the specified registers
    38         *
    39         *  This method reads the current value of the registers from the device
    40         *  (or core dump file or ...) and sets the local register set
    41         *  accordingly.  For example, if the frame pointer register is named
    42         *  "FP" the following sequence should produce a stack trace:
    43         *  @p(code)
    44         *      callstack.fetch(["PC", "FP"]);
    45         *      print(callstack.toText());
    46         *  @p
    47         */
    48        Void fetchRegisters(String names[]);
    49
    50        /*
    51         *  ======== getRegister ========
    52         *  Get the local value of the named register
    53         */
    54        Long getRegister(String name);
    55
    56        /*
    57         *  ======== setRegister ========
    58         *  Set the local value of the named register
    59         */
    60        Void setRegister(String name, Long value);
    61
    62        /*
    63         *  ======== toText ========
    64         *  Return entire call stack as a string
    65         *
    66         *  Create a string representation of the current call stack based
    67         *  on the currently set register values.
    68         */
    69        String toText();
    70    }
    71
    72    /*
    73     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    74     */
    75


module xdc.rov.Model

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Model ========
    14     *  The ROV Model is the core of ROV. The Model must be started in order to
    15     *  retrieve ROV views for any modules.
    16     *
    17     *  The Model has a compatibility key. Any changes or additions to the public
    18     *  interfaces of the ROV core will result in a bump of the model version
    19     *  number.
    20     */
    21    metaonly module Model {
    22
    23        /*!
    24         *  ======== vers ========
    25         *  ROV API version number
    26         *
    27         *  Model.start will throw an exception if the version parameter does not
    28         *  equal the Model's current version. The version number is changed based
    29         *  on modifications to the public APIs (in xdc.rov.Program) that would
    30         *  potentially break compatibility with clients.
    31         *
    32         *  This allows the Model to verify compatibility with its client.
    33         */
    34        config Int vers = 4;
    35
    36        /*!
    37         *  ======== start ========
    38         *  Start the ROV Model
    39         *
    40         *  The ROV Model requires instances of an ISymbolTable, an IMemoryImage,
    41         *  and an ICallBack. It also requires the ROV recap file, which can be
    42         *  located using the xdc.rov.Recap module.
    43         *
    44         *  @param(vers) Model.start will throw an exception if the version
    45         *                parameter does not equal the Model's current
    46         *                `{@link #vers version}`.
    47         *
    48         *  @param(recap) Capsule of the ROV recap file. Retrieve this with
    49         *                `xdc.loadCapsule(recapFilePath)`.
    50         *
    51         *  @param(executable) The path to the executable file
    52         *
    53         *  @param(sym)        an object that implements the xdc.rov.ISymbolTable
    54         *                     interface used to read symbols defined by the
    55         *                     executable
    56         *
    57         *  @param(mem)        an object that implements the xdc.rov.IMemoryImage
    58         *                     interface used to read target memory
    59         *
    60         *  @param(callBack)   an object that implements the xdc.rov.ICallback
    61         *                     interface used to report progress status
    62         */
    63        Void start(Int vers, String executable, Any recap,
    64                   ISymbolTable.Instance sym, Any mem,
    65                   ICallBack.Instance callBack);
    66
    67        /*
    68         *  ======== getICallStackInst ========
    69         *  Called by clients to get the optional call stack parser.
    70         *
    71         *  Returns `null` in the event that there is no call stack parser; i.e.,
    72         *  there is no implementation of this functionality in the current
    73         *  `{@link Model}` context.
    74         */
    75        ICallStack.Instance getICallStackInst();
    76
    77        /*!
    78         *  ======== setICallStackInst ========
    79         *  Called only during Model initialization
    80         *
    81         *  This method is called to "bind" an optional stack call stack parser
    82         *  and is called by the same client that calls
    83         * `{@link #start Model.start()}`.
    84         */
    85        void setICallStackInst(ICallStack.Instance cs);
    86
    87        /*!
    88         *  ======== getISymbolTableInst ========
    89         */
    90        ISymbolTable.Instance getISymbolTableInst();
    91
    92        /*!
    93         *  ======== getMemoryImageInst ========
    94         */
    95        function getMemoryImageInst();
    96
    97        /*!
    98         *  ======== getICallBackInst ========
    99         */
   100        ICallBack.Instance getICallBackInst();
   101
   102        /*!
   103         *  ======== getIOFReaderInst ========
   104         */
   105        function getIOFReaderInst();
   106
   107        /*!
   108         *  ======== getModuleList ========
   109         */
   110        Any getModuleList();
   111    }
   112    /*
   113     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   114     */
   115


package xdc.rov

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== xdc.rov ========
    14     *  Runtime object viewer
    15     */
    16    package xdc.rov [1, 0, 1] {
    17        interface ISymbolTable;
    18        interface ICallBack, ICallStack;
    19        module Model, Program, StructureDecoder, StateReader, ViewXml;
    20        module ViewInfo, CallStack;
    21    }
    22    /*
    23     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    24     */
    25


module xdc.rov.Program

     1    /*
     2     *  Copyright (c) 2008-2018 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== Program ========
    15     *  Root object for the ROV model
    16     *
    17     *  This module is the main access point for all ROV operations.
    18     *  The Program APIs are used to retrieve the views for the
    19     *  requested modules.
    20     */
    21    metaonly module Program {
    22
    23        /*!
    24         *  ======== FetchDesc ========
    25         *  Description of data to fetch
    26         *
    27         *  A FetchDesc object is required as the first argument of the
    28         *  `{@link #fetchStruct}` and `{@link #fetchArray}` methods.
    29         *  The FetchDesc tells ROV the type of the data to be
    30         *  fetched so it knows how much data to read and how to decode it.
    31         *
    32         *  Every reference-type field in a state structure has a FetchDesc
    33         *  generated for it, with the name `<field name>$fetchDesc`.
    34         *
    35         *  For example, the instance structure
    36         *  @p(code)
    37         *      struct Instance_State {
    38         *          Char stack[];
    39         *      ];
    40         *  @p
    41         *  will have defined `obj.stack$fetchDesc`, which can be used to fetch
    42         *  the array:
    43         *  @p(code)
    44         *      var data = Program.fetchArray(obj.stack$fetchDesc, obj.stack, len);
    45         *  @p
    46         *
    47         *  @field(type)     the fully qualified name of a specified type; i.e.,
    48         *                   a type declared in some .xdc file.  For example,
    49         *                   "xdc.runtime.Types.Timestamp64".
    50         *  @field(isScalar) if fetching an array, are the elements of the array
    51         *                   really just one of the "scalar structs" defined by
    52         *                   xdc.rov.support.ScalarStructs.
    53         *
    54         *  @see #fetchStruct
    55         *  @see #fetchArray
    56         */
    57        metaonly struct FetchDesc {
    58            String type;
    59            Bool   isScalar;
    60        }
    61
    62        /*!
    63         *  ======== InstDataView ========
    64         *  Instance view data returned from a scan
    65         *
    66         *  @see #scanInstanceDataView
    67         */
    68        metaonly struct InstDataView {
    69            String label;
    70            Any    elements[];
    71        }
    72
    73        /*!
    74         *  ======== InstDataViewArr ========
    75         *  Array of all instance view data objects
    76         *
    77         *  @see #scanInstanceDataView
    78         */
    79        typedef InstDataView InstDataViewArr[];
    80
    81        /*!
    82         *  ======== ModDataView ========
    83         *  Module view data returned from a scan
    84         *
    85         *  @see #scanModuleDataView
    86         */
    87        metaonly struct ModDataView {
    88            Any elements[];
    89        }
    90
    91        /*!
    92         *  ======== TreeNode ========
    93         *  Node for a generic "tree table" view
    94         *
    95         *  @see #scanTreeTableView
    96         *  @see ViewInfo#TREE_TABLE
    97         */
    98        metaonly struct TreeNode {
    99            String   label;
   100            TreeNode children[];
   101            Any      properties[];
   102        }
   103
   104        /*!
   105         *  ======== TreeNodeArr ========
   106         *  Array of tree table nodes
   107         *
   108         *  @see #scanTreeTableView
   109         *  @see ViewInfo#TREE_TABLE
   110         */
   111        typedef TreeNode TreeNodeArr[];
   112
   113        /*!
   114         *  ========= RawView ========
   115         *  Raw module view
   116         *
   117         *  This is the structure returned by the `{@link scanRawView}` method.
   118         *  It contains the module's state, the instance states, and the module
   119         *  configuration fields and values.
   120         */
   121        metaonly struct RawView {
   122            Any modState;
   123            Any instStates[];
   124            Any modCfg;
   125        }
   126
   127        /* -------- Scan Functions -------- */
   128
   129        /*!
   130         *  ======== scanInstanceView ========
   131         *  Retrieve the instance-type views for a module
   132         *
   133         *  Returns an array of Instance_View structures, each structure
   134         *  representing an instance of the module.
   135         *
   136         *  @param(modName)  Full module name to return the views for.
   137         *  @param(tabName)  Name of the tab to retrieve the views for.
   138         *
   139         *  @a(Returns)  Array of Instance_View structures, one for each isntance.
   140         *
   141         *  @a(Throws)  Throws an exception in the event that a memory read of
   142         *              the specified instance view fails, the specified `tabName`
   143         *              isn't recognized, the specified `modName` doesn't support
   144         *              instances, or the module `modName` is not configured into
   145         *              the current program.
   146         */
   147        Any scanInstanceView(String modName, String tabName);
   148
   149        /*!
   150         *  ======== scanModuleView ========
   151         *  Retrieve module-type view for a module.
   152         *
   153         *  @param(modName)  Full module name to return the view for.
   154         *  @param(tabName)  Name of the tab to retreive the view for.
   155         *
   156         *  @(Returns)  Module_View structure.
   157         *
   158         *  @a(Throws)  Throws an exception in the event that a memory read of
   159         *              the specified module view fails, the specified `tabName`
   160         *              isn't recognized, or the module `modName` is not
   161         *              configured into the current program.
   162         */
   163        Any scanModuleView(String modName, String tabName);
   164
   165        /*!
   166         *  ======== scanInstanceDataView ========
   167         *  Retrieve a module's specified INSTANCE_DATA type view
   168         *
   169         *  @a(Throws)  Throws an exception in the event that a memory read of
   170         *              the module's Raw view or any instance fails, the specified
   171         *              `tabName` isn't recognized, the specified `modName`
   172         *              doesn't support instances, or the module `modName` is not
   173         *              configured into the current program.
   174         */
   175        InstDataViewArr scanInstanceDataView(String modName, String tabName);
   176
   177        /*!
   178         *  ======== scanModuleDataView ========
   179         *  Retrieve a module's specified MODULE_DATA type view
   180         *
   181         *  @a(Throws)  Throws an exception in the event that a memory read of
   182         *              the specified module view fails, the specified `tabName`
   183         *              isn't recognized, or the module `modName` is not
   184         *              configured into the current program.
   185         */
   186        ModDataView scanModuleDataView(String modName, String tabName);
   187
   188        /*!
   189         *  ======== scanRawView ========
   190         *  Retrieve the raw view for a module.
   191         *
   192         *  @param(modName)  Full module name to return the raw view for.
   193         *
   194         *  @(Returns) A RawView structure which contains the raw data.
   195         *
   196         *  @a(Throws)  Throws an exception in the event that a memory read of
   197         *              the specified instance view fails, the specified `tabName`
   198         *              isn't recognized, the specified `modName` doesn't support
   199         *              instances, or the module `modName` is not configured into
   200         *              the current program.
   201         *
   202         *  @a(Throws)  Throws an exception in the event that a memory read of
   203         *              the module's Raw view fails, or the module `modName` is
   204         *              not configured into the current program.
   205         */
   206        RawView scanRawView(String modName);
   207
   208        /*!
   209         *  ======== scanTreeTableView ========
   210         */
   211        TreeNodeArr scanTreeTableView(String modName, String tabName);
   212
   213        /*!
   214         *  ======== scanTreeView ========
   215         */
   216        Any scanTreeView(String modName, String tabName);
   217
   218        /*!
   219         *  ======== scanHandle ========
   220         *  Scan single instance of a module
   221         *
   222         *  Used from a view$init function to scan a single instance of a
   223         *  different module given that instance's address.
   224         *
   225         *  @param(modName)  Full module name to return the raw view for.
   226         *  @param(instAddr) Address of instance to scan.
   227         *  @param(tabName)  Name of the tab to retrieve the view for.
   228         *
   229         *  @a(Returns) An Instance_View object for the requested view.
   230         *
   231         *  @a(Throws)  Throws an exception in the event that a memory read of
   232         *              the specified instance view fails, the specified `tabName`
   233         *              isn't recognized, the specified `modName` doesn't support
   234         *              instances, or the module `modName` is not configured into
   235         *              the current program.
   236         */
   237        Any scanHandleView(String modName, Ptr instAddr, String tabName);
   238
   239        /*!
   240         *  ======== scanObjectView ========
   241         *  Scan view for an embedded object
   242         *
   243         *  Called from a view$init function to retrieve the specified view for
   244         *  an embedded object.
   245         *
   246         *  Since XDC has no way of knowing what embedded objects are present in
   247         *  a system, embedded objects do not appear in the list of a module's
   248         *  instances until they have been scanned in this way.
   249         *
   250         *  Calling Program.scanObjectView will not read any additional data from
   251         *  the target, since the state structure was already read as part of
   252         *  reading it's parent structure.
   253         *
   254         *  @param(modName) Full module name to return the view for.
   255         *  @param(obj)     Actual object to retrieve the view for.
   256         *  @param(tabName) Name of the tab to retrieve the view for.
   257         *
   258         *  @a(Returns) An Instance_View object for the requested view.
   259         *
   260         *  @a(Throws)  Throws an exception in the event that the specified
   261         *              `tabName` isn't recognized, the specified `modName`
   262         *              doesn't support instances, or the module `modName` is not
   263         *              configured into the current program.
   264         */
   265        Any scanObjectView(String modName, Any obj, String tabName);
   266
   267
   268        /* -------- Fetch Functions -------- */
   269
   270        /*!
   271         *  ======== fetchStruct ========
   272         *  Retrieve the specified structure from the target
   273         *
   274         *  @param(desc) Fetch descriptor for the structure, indicating the type
   275         *               of the structure.
   276         *  @param(addr) Address of the structure to fetch.
   277         *  @param(addrCheck)  Optional, defaults to true. Indicates whether the
   278         *                     memory image should validate the read by comparing
   279         *                     the address to section information.
   280         *
   281         *  @a(Returns)  Returns the requested structure as a javascript object.
   282         *
   283         *  @a(Throws)  Throws an exception in the event that `addr` is not in
   284         *              the program's memory map or some error occurs that
   285         *              prevents memory from being read.
   286         */
   287        Any fetchStruct(FetchDesc desc, Ptr addr, Bool addrCheck = true);
   288
   289        /*!
   290         *  ======== fetchArray ========
   291         *  Retrieve the specified array from the target
   292         *
   293         *  @param(desc) Fetch descriptor for the array, indicating the type of
   294         *               data in the array.
   295         *  @param(addr) Address of the array to fetch.
   296         *  @param(len)  The number of arrray elements to fetch.
   297         *  @param(addrCheck)  Optional, defaults to true. Indicates whether the
   298         *                     memory image should validate the read by comparing
   299         *                     the address to section information.
   300         *
   301         *  @a(Returns)  Returns a JavaScript array with the data in it.
   302         *
   303         *  @a(Throws)   Throws an exception in the event that `addr` is not in
   304         *               the program's memory map, some error occurs that
   305         *               prevents memory from being read, or if `len` = 0.
   306         */
   307        Any fetchArray(FetchDesc desc, Ptr addr, Int len, Bool addrCheck = true);
   308
   309        /*!
   310         *  ======== fetchString ========
   311         *  Retrieve a string from the target
   312         *
   313         *  @param(addr) Address of the string.
   314         *  @param(addrCheck)  Optional, defaults to true. Indicates whether the
   315         *                     memory image should validate the read by comparing
   316         *                     the address to section information.
   317         *
   318         *  @a(Returns)  Requested string.
   319         *
   320         *  @a(Throws)   Throws an exception in the event that `addr` is not in
   321         *               the program's memory map or some error occurs that
   322         *               prevents memory from being read.
   323         */
   324        String fetchString(Ptr addr, Bool addrCheck = true);
   325
   326        /*!
   327         *  ======== fetchStaticString ========
   328         *  Retrieves a static string from the executable.
   329         *
   330         *  This API makes use of an object file reader to improve the string
   331         *  reading performance--it reads the string from the file rather than
   332         *  performing a target memory read. For this reason, it should only be
   333         *  used on static strings and not dynamic ones.
   334         *
   335         *  @param(addr)  Address of the string
   336         *
   337         *  @a(Returns)  Requested string or `null` if it can't be found.
   338         */
   339        String fetchStaticString(Ptr addr);
   340
   341        /*!
   342         *  ======== fetchFromAddr ========
   343         *  Returns a JavaScript object from the C object at the supplied address
   344         *
   345         *  The type of the object is also supplied by the user. There is no
   346         *  checking whether the object at that address is of the supplied type.
   347         *  By default, only one instance of the specified type will be fetched
   348         *  from the address.
   349         *
   350         *  @param(addr)     Address of the C object
   351         *  @param(typeName) Name of the C type read from the address
   352         *  @param(count)    Number of C objects read from the address
   353         *
   354         *  @a(Returns)      JavaScript representation of the object at the address
   355         */
   356        Any fetchFromAddr(Ptr addr, String typename, Int count = 1);
   357
   358        /*!
   359         *  ======== fetchVariable ========
   360         *  Returns a JavaScript object or a scalar that mirrors the content of the
   361         *  variable.
   362         *
   363         *  This function replicates primitive or aggregate objects from memory,
   364         *  and returns them as JavaScript objects. If the variable is an array or
   365         *  a structure, its corresponding JavaScript elements can be accessed as
   366         *  JavaScript arrays or structures.
   367         *  Pointers are not followed, but they are represented as hexadecimal
   368         *  values.
   369         *
   370         *  If the variable is not found in the object file, an exception is raised.
   371         *
   372         *  @param(varName) name of the variable
   373         *
   374         *  @a(Returns)     content of the variable
   375         */
   376        Any fetchVariable(String varName);
   377
   378        /*!
   379         *  ======== fetchVariableByPtr ========
   380         *  Returns a JavaScript representation of a C object or a scalar pointed to
   381         *  by the supplied pointer variable.
   382         *
   383         *  This API first checks if there is such a variable, and if it is of a
   384         *  pointer type. If any of these checks fails, 'null' is returned.
   385         *  Otherwise, the pointer variable is dereferenced, and the memory content
   386         *  is interpreted as a pointed-to type.
   387         */
   388        Any fetchVariableByPtr(String varName);
   389
   390        /*!
   391         *  ======== createObject ========
   392         *  Creates a JavaScript object that mirrors an object from memory.
   393         *
   394         *  @param(addr)    address of the object in memory
   395         *  @param(type)    type specification for the object from memory
   396         *  @param(ret)     already created object to which a new object is added
   397         *  @param(name)    name for the new object
   398         */
   399        Void createObject(Ptr addr, Any typespec, Any ret, String name);
   400
   401        /*!
   402         *  ======== readMemory ========
   403         *  Reads a primitive value from memory.
   404         *
   405         *  @param(addr)    memory address
   406         *  @param(size)    size in MAUs
   407         *  @param(enc)     encoding (signed or unsigned)
   408         */
   409        Any readMemory(Ptr addr, UInt size, Int enc);
   410
   411        /*!
   412         *  ======== getModuleConfig ========
   413         *  Get a module's configuration state
   414         *
   415         *  Returns an object with all of the module configuration values used
   416         *  in configuring the application.
   417         *
   418         *  This object includes the common$ config params.
   419         *
   420         *  @param(modName) Full module name to get the configs for.
   421         *
   422         *  @a(Returns)     Object containing all of the module configs and
   423         *                  their values.
   424         */
   425        Any getModuleConfig(String modName);
   426
   427        /*!
   428         *  ======== getPrivateData ========
   429         *  Retrieves module's private ROV data.
   430         *
   431         *  This API returns an object which can be used to store private data
   432         *  across different ROV API calls. The object is reset at every
   433         *  breakpoint.
   434         *
   435         *  This object is also passed as the context to all view init functions,
   436         *  so it can also be accessed using 'this'. However, the context changes
   437         *  when you call other APIs in your module; that is when you will need
   438         *  this API. It can also be used to support metaonly APIs which are called
   439         *  by other modules.
   440         */
   441        Any getPrivateData(String modName);
   442
   443        /*!
   444         *  ======== lookupDataSymbol ========
   445         *  Lookup symbolic names for an address
   446         *
   447         *  Uses the ISymbolTable to look up the symbols at the given address.
   448         *
   449         *  This API is separate from lookupFuncName to address paging concerns.
   450         *  Use lookupFuncName to get function names (or any symbols in PROGRAM
   451         *  memory) and use lookupDataSymbol to get data symbols (for symbols in
   452         *  DATA memory).
   453         *
   454         *  @param(addr) Address of symbols
   455         *
   456         *  @a(Returns)  Array of symbols at the requested address.
   457         */
   458        Any lookupDataSymbol(Int addr);
   459
   460        /*!
   461         *  ======== lookupFuncName ========
   462         *  Lookup function names for an address.
   463         *
   464         *  Uses the ISymbolTable to look up the symbols at the given address.
   465         *
   466         *  This API is separate from lookupDataSymbol to address paging concerns.
   467         *  Use lookupFuncName to get function names (or any symbols in PROGRAM
   468         *  memory) and use lookupDataSymbol to get data symbols (for symbols in
   469         *  DATA memory).
   470         *
   471         *  @param(addr) Address of symbols
   472         *
   473         *  @a(Returns)  Array of symbols at the requested address.
   474         */
   475        Any lookupFuncName(Int addr);
   476
   477        /*!
   478         *  ======== lookupType ========
   479         *  Creates a type specification from the Dwarf data.
   480         *
   481         *  @param(type)    type name
   482         */
   483        Any lookupType(String type);
   484
   485        /*!
   486         *  ======== lookupTypeByVariable ========
   487         *  Creates a type specification from the Dwarf data for a variable.
   488         *
   489         *  @param(varName)  variable name
   490         */
   491        Any lookupTypeByVariable(String varName);
   492
   493        /*!
   494         *  ======== lookupSymbolValue ========
   495         *  Returns the value for the given symbol.
   496         *
   497         *  Returns -1 if the symbol does not exist.
   498         *
   499         *  @param(symName) Name of symbol
   500         *
   501         *  @a(Returns) Address or value of symbol, or -1 if symbol does not exist
   502         */
   503        Int lookupSymbolValue(String symName);
   504
   505        /*!
   506         *  ======== getSymbolValue ========
   507         *  Returns the value for the given symbol.
   508         *
   509         *  Returns -1 if the symbol does not exist.
   510         *
   511         *  @param(symName) Name of symbol
   512         *
   513         *  @a(Returns) Address or value of symbol, or -1 if symbol does not exist
   514         */
   515        Int getSymbolValue(String symName);
   516
   517        /*!
   518         *  ======== displayError ========
   519         *
   520         */
   521        Void displayError(Any view, String fieldName, String errorMsg);
   522
   523        /*!
   524         *  ======== ptrToHex ========
   525         *  Convert pointer representation to hex string
   526         *
   527         *  Convenience function for converting the 'at' symbol representation
   528         *  of a pointer to the form 0x80005846.
   529         */
   530        String ptrToHex(Any ptr);
   531
   532        /*!
   533         *  ======== getShortName ========
   534         *  Convert canonical instance names to a short name
   535         *
   536         *  Parses the full canonical instance name for the shorter name given
   537         *  by the user. If there is no shorter name, then it returns an empty
   538         *  string "".
   539         *
   540         *  @param(name)  Full canonical instance name.
   541         *
   542         *  @a(Returns)  The short name, if the user specified one. Empty string
   543         *               otherwise.
   544         */
   545        String getShortName(String name);
   546
   547        /*!
   548         *  ======== debugPrint ========
   549         *  Print API which will only print the message if debug printing is
   550         *  enabled.
   551         */
   552        Void debugPrint(String msg);
   553
   554        /*!
   555         *  ======== timestamp ========
   556         *  API for printing timestamp messages for performance analysis.
   557         */
   558        Void timestamp(String msg);
   559
   560        /*!
   561         *  ======== setTimestampFunc ========
   562         *  Sets API to be used for printing timestamp.
   563         */
   564        Void setTimestampFunc(Any func);
   565
   566        /*!
   567         *  ======== newViewStruct ========
   568         *  Creates a new instance of the view structure for the specified view.
   569         *
   570         *  This API is called for views where the view structure is not already
   571         *  passed in as an argument to the view init function.
   572         *
   573         *  It is necessary to instantiate a view structure in this way so that ROV
   574         *  is given an opportunity to initialize the status-reporting mechanisms
   575         *  of the view structure (to support, e.g., Program.displayError).
   576         */
   577        Any newViewStruct(String modName, String tabName);
   578
   579        /*!
   580         *  ======== StatusEntry ========
   581         *  Single entry in the ROV status table.
   582         *
   583         *  ROV maintains a table of all errors, warnings, etc. encountered while
   584         *  processing views. This table is cleared on each call to clear cache
   585         *  (e.g., at each breakpoint).
   586         */
   587        metaonly struct StatusEntry {
   588            String mod;
   589            String tab;
   590            String inst;
   591            String field;
   592            String message;
   593        }
   594
   595        /*!
   596         *  ======== getStatusTable ========
   597         *  Returns the current table of all encountered status messages.
   598         *
   599         *  This table is reset with every call to 'resetMods'. (e.g., at every
   600         *  breakpoint).
   601         */
   602        Any getStatusTable();
   603
   604        /* -------- Used By ROV -------- */
   605
   606        /*!
   607         *  @_nodoc
   608         *  ======== moduleNames ========
   609         *  Array of all the module names in the application.
   610         */
   611        readonly config String moduleNames[length];
   612
   613        /*!
   614         *  @_nodoc
   615         *  ======== getModuleDesc ========
   616         *  Used to retrieve the module descriptor object for the requested module.
   617         */
   618        ROVModuleDesc *getModuleDesc(String modName);
   619
   620        /*!
   621         *  @_nodoc
   622         *  ======== getViewType ========
   623         *  This is a helper method which returns whether a given tabName is a
   624         *  module-level view, instance-level view, or raw view.
   625         */
   626        String getViewType(String modName, String tabName);
   627
   628        /*!
   629         *  @_nodoc
   630         *  ======== Tab ========
   631         *  The type is an enum, but we can't use an enum from another module,
   632         *  so just use the String value of the type.
   633         */
   634        metaonly struct Tab {
   635            String name;
   636            String type;
   637        }
   638
   639        /*!
   640         *  @_nodoc
   641         *  ======== Tabs ========
   642         */
   643        typedef Tab Tabs[];
   644
   645        /*!
   646         *  @_nodoc
   647         *  ======== getSupportedTabs ========
   648         *  Returns a string array of the tab names supported by the module.
   649         */
   650        Tabs getSupportedTabs(String modName);
   651
   652        Void addCMod(Any mod);
   653
   654        /*!
   655         *  @_nodoc
   656         *  ======== getAbortFlag ========
   657         *  In CCS, indicates whether the abort flag has been set.
   658         */
   659        Bool getAbortFlag();
   660
   661        /*!
   662         *  @_nodoc
   663         *  ======== resetMods ========
   664         *  Used to clear the cache of all scanned data and views. Should be called
   665         *  whenever the target data has changed.
   666         */
   667        Void resetMods();
   668
   669        /*!
   670         *  @_nodoc
   671         *  ======== setThrowViewErrors ========
   672         *  Used to enable/disable exceptions when views detect errors
   673         */
   674        Void setThrowViewErrors(Bool flag);
   675
   676        /*!
   677         *  @_nodoc
   678         *  ======== moduleIdToName ========
   679         *  Used by xdc.runtime.Log.decode
   680         */
   681        String moduleIdToName(Int mid);
   682
   683        /*!
   684         *  ======== exToString ========
   685         *  Helper function for formatting exceptions into strings with filename
   686         *  and line number.
   687         */
   688        String exToString(Any e);
   689
   690        /*!
   691         *  @_nodoc
   692         *  ========= ROVModuleDesc ========
   693         *  Structure containing all ROV-related data about an individual module.
   694         *
   695         *  An instance of this structure is created for each module in the system.
   696         *  As various Program.scan APIs are called, this structure is gradually
   697         *  filled in with data.
   698         *
   699         *  The structure's fields:
   700         *    name         The module's name
   701         *    addr         Address of the state object. Redundant with state.$addr,
   702         *                 but available so that address is present even if fetch
   703         *                 of state fails.
   704         *    loadFailed   Indicates that the 'useModule' call on this module threw
   705         *                 an exception.
   706         *    loadFailedMsg The exception message from the 'useModule' call
   707         *    cfg          Object containing all of the mod's configuration values
   708         *    state        Raw module state object
   709         *    instances    Array of ROVInstanceDesc objects representing the mod's
   710         *                 instances.
   711         *    objects      Array of ROVInstanceDesc objects representing instances
   712         *                 of the module which are embedded in other objects.
   713         *    viewMap      Contains the module-level views. The key to the map is
   714         *                 the string tab name for the view, and the value is the
   715         *                 an instance of Module_View.
   716         *    errorMap     For each view, contains any error that was encountered
   717         *                 in processing the view outside of what was reported by
   718         *                 the module. For example, an unhandled exception from the
   719         *                 view code would be stored here.
   720         */
   721        metaonly struct ROVModuleDesc {
   722            String name;
   723            Any addr;
   724            Bool loadFailed;
   725            String loadFailedMsg;
   726            Any cfg;
   727            Any useMod;
   728            Any viewInfo;
   729            Any state;
   730
   731            Any staticInstAddrs[];
   732            Any dynInstAddrs[];
   733            Bool readAllAddrs;
   734
   735            ROVInstanceDesc *instances[];
   736            Any viewMap[string];
   737            String errorMap[string];
   738
   739            String error; // Deprecated, replaced by errorMap
   740
   741            Any instMap;
   742
   743            Any userPrivate;
   744        };
   745
   746        /*!
   747         *  @_nodoc
   748         *  ========= ROVInstanceDesc ========
   749         *  Structure containing all ROV-related data about an individual instance.
   750         *
   751         *  The ROVInstanceDesc objects are stored in the 'instances' array of the
   752         *  respective module's ROVModuleDesc structure.
   753         *
   754         *  The structure's fields:
   755         *    state     Raw instance state object
   756         *    addr      Address of the state object. Redundant with state.$addr,
   757         *              but available so that address is present even if fetch of
   758         *              statefails.
   759         *    viewMap   Contains the instance-level views. The key to the map is
   760         *              the string tab name for the view, and the value is the
   761         *              an instance of Instance_View.
   762         *    errorMap  For each view, contains any error that was encountered
   763         *              in processing the view outside of what was reported by
   764         *              the module. For example, an unhandled exception from the
   765         *              view code would be stored here.
   766         */
   767        metaonly struct ROVInstanceDesc {
   768            Any    state;
   769            Any    addr;
   770            Any    viewMap[string];
   771            String errorMap[string];
   772
   773            String error; // Deprecated, replaced by errorMap
   774        };
   775
   776    }
   777    /*
   778     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   779     */
   780


module xdc.rov.StateReader

     1    /*
     2     *  ======== StateReader.xdc ========
     3     */
     4
     5    package xdc.rov;
     6
     7    import xdc.rov.Program;
     8
     9    /*!
    10     *  ======== StateReader ========
    11     *  These APIs are all designed so that they will not re-read data that has already been read in.
    12     *
    13     *  The StateReader has three similar APIs for reading instance state:
    14     *    fetchInstState
    15     *    fetchHandleState
    16     *    getInstDesc
    17     *
    18     *  fetchInstState takes an instance address and its index into the array of
    19     *  static instances (or -1 if dynamic). This is called by fetchAllInstStates,
    20     *  knows the index because it's iterating over the list.
    21     *
    22     *  fetchHandleState just takes an instance address. It looks through the list
    23     *  of instances to determine the index, then calls down to fetchInstState.
    24     *  This API is called by Program.scanHandle.
    25     *
    26     *  getInstDesc takes a decoded instance state structure and the index. Both
    27     *  fetch functions ultimately call down to this API. It is also called
    28     *  directly by Program.scanObject for scanning embedded objects.
    29     */
    30    metaonly module StateReader
    31    {
    32
    33    instance:
    34
    35        /*!
    36         *  ======== create ========
    37         */
    38        create(ISymbolTable.Instance symTable, StructureDecoder.Instance strDec);
    39
    40        /*!
    41         *  ======== fetchModuleState ========
    42         *  Scans the given module's module state structure. If the structure has
    43         *  already been scanned, this function returns immediately.
    44         */
    45        Void fetchModuleState(Program.ROVModuleDesc *mod);
    46
    47        /*!
    48         *  ======== fetchAllInstStates ========
    49         *  This function makes sure that all of the instance state structures for
    50         *  this module have been scanned in. It does not call any view$init
    51         *  functions.
    52         */
    53        Void fetchAllInstStates(Program.ROVModuleDesc *mod);
    54
    55        /*!
    56         *  ======== fetchInstState ========
    57         *  This function scans in a single instance's state, and associates
    58         *  various metadata (used by the view$init functions) with the instance
    59         *  object.
    60         *  Returns the inst object for Program.scanHandle.
    61         */
    62        Program.ROVInstanceDesc *fetchInstState(Program.ROVModuleDesc *mod,
    63            Long instAddr, Int staticIndex);
    64
    65        /*!
    66         *  ======== fetchHandleState ========
    67         *  The fetchInstState API needs to know whether the given instance
    68         *  is static or dynamic. If we just have a handle to an instance, we first
    69         *  need to determine whether it is static or dynamic.
    70         */
    71        Program.ROVInstanceDesc *fetchHandleState(Program.ROVModuleDesc *mod,
    72            Long instAddr);
    73
    74        /*!
    75         *  ======== getInstDesc ========
    76         *  Takes a decoded state structure and creates an Program.ROVInstanceDesc
    77         *  for it. Also retrieves the label for the instance.
    78         */
    79        Program.ROVInstanceDesc *getInstDesc(Program.ROVModuleDesc *mod, Any obj,
    80            Int staticIndex);
    81
    82    }
    83    /*
    84     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    85     */
    86


module xdc.rov.StructureDecoder

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     *
    12     */
    13    /*
    14     *  ======== StructureDecoder.xdc ========
    15     */
    16
    17    package xdc.rov;
    18
    19    /*!
    20     *  ======== StructureDecoder ========
    21     *  Module for retrieving and decoding target structures.
    22     *
    23     *  The StructureDecoder is responsible for decoding target data given the
    24     *  raw target bytes and the data's type as defined in XDC. It also contains
    25     *  APIs for retrieving data from the target given the data's address.
    26     *
    27     *  The StructureDecoder relies on the TargetDecoder to decode the raw target
    28     *  bytes, but is itself responsible for decoding the structure layout. The
    29     *  decodeStruct API takes as an argument the structure's type representation
    30     *  in the XDC object model, and refers to this object to determine the size
    31     *  and offsets of the structure's fields.
    32     *
    33     *  The object returned by decodeStruct is not the typed Java representation of
    34     *  the structure, but rather a typeless JavaScript object which simply
    35     *  contains all of the same fields. This allows ROV to control the type of the
    36     *  fields, and specifically to represent arrays as addresses rather than as
    37     *  objects.
    38     *
    39     *  All of the 'decode' methods are essentially private methods. The intended
    40     *  interface to the StructureDecoder is through the 'fetch' APIs.
    41     */
    42    metaonly module StructureDecoder
    43    {
    44        /*!
    45         *  ======== Buffer ========
    46         *  Target buffer
    47         *
    48         *  This structure encapsulates a buffer of target memory (`buffer`),
    49         *  the buffer's original target address (`addr`), and a running offset
    50         *  into that buffer (`off`).
    51         *
    52         *  Decoding a structure is a recursive process, since the structure may
    53         *  include fields which are also structures. As `StructureDecoder`
    54         *  decodes each field, it updates the `off` field to move to the next
    55         *  field.
    56         *
    57         *  The original address of the buffer is stored as well so that each
    58         *  structure field can be given a `$addr` property with its target
    59         *  address.
    60         */
    61        metaonly struct Buffer {
    62            Any    buffer;
    63            Int    addr;
    64            Int    off;
    65        }
    66
    67        /*!
    68         *  @_nodoc
    69         *  ======== FieldType ========
    70         *  Object representing the type of a field.
    71         *
    72         *  An object of this type is returned by the `{@link #parseTypeString}`
    73         *  method.
    74         *
    75         *  A field can either be a scalar, a structure, or an array.
    76         */
    77        metaonly struct FieldType {
    78            /* Scalar */
    79            Bool    isScalarType;
    80            Bool    signed;
    81            Bool    isEnum;
    82            Bool    isEncoded;
    83            Int     size;
    84            Int     align;
    85            Bool    isAddr;
    86            String  fldType;
    87
    88            /* Structure */
    89            Bool    isStrType;
    90            Any     strType;
    91
    92            /* Array */
    93            Bool    isArrType;
    94            Int     len;
    95            String  elemType;
    96        }
    97
    98    instance:
    99        /*!
   100         *  ======== create ========
   101         *  Create a StructureDecoder instance
   102         *
   103         *  The StructureDecoder requires a MemoryImage instance and the target
   104         *  configuration object from the ROV recap file; i.e.,
   105         *  recap.build.target.
   106         */
   107        create(Any mem, Any targConfig);
   108
   109        /*!
   110         *  ======== fetchStruct ========
   111         *  Retrieve and decode a structure from the target
   112         *
   113         *  This method retrieves and decodes a structure of the given type at
   114         *  the given address from the target.
   115         *  @p(dlist)
   116         *     - `structType`
   117         *            Structure type. Not just a string, it is the XDC object
   118         *            model representation of the type.
   119         *     - `addr`
   120         *            Target address of the structure to retrieve.
   121         *     - `addrCheck`
   122         *            Whether to check the memory read against the section map.
   123         *  @p
   124         */
   125        Any fetchStruct(Any structType, Int addr, Bool addrCheck);
   126
   127        /*!
   128         *  ======== fetchArray ========
   129         *  Retrieve and decode an array of structures from the target
   130         *
   131         *  @p(dlist)
   132         *     - `structType`
   133         *           Structure type. Not just a string, it is the XDC object
   134         *           model representation of the type.
   135         *     - `addr`
   136         *           Target address of the structure to retrieve.
   137         *     - `len`
   138         *           Number of entries in the array.
   139         *     - `isScalar`
   140         *           Whether it is an array of scalars.
   141         *     - `addrCheck`
   142         *           Whether to check the memory read against the section map.
   143         *  @p
   144         */
   145        Any fetchArray(Any structType, Int addr, Int len, Bool isScalar,
   146                       Bool addrCheck);
   147
   148        /*!
   149         *  ======== decodeStruct ========
   150         *  Decode an entire structure by decoding each of the structure's fields
   151         *
   152         *  @p(dlist)
   153         *     - `structType`
   154         *           Structure type. Not just a string, it is the XDC object
   155         *           model representation of the type.
   156         *     - `buffer`
   157         *           Buffer of target memory containing raw data.
   158         *     - `inStr`
   159         *           Optional structure to fill in. Otherwise decodeStruct will
   160         *           create a new one.
   161         *  @p
   162         */
   163        Any decodeStruct(Any structType, Buffer buffer, Any inStr = null);
   164
   165        /*!
   166         *  ======== decodeStructArray ========
   167         *  Decode an array of structures
   168         *
   169         *  This API exists to perform some optimizations when decoding an array
   170         *  of a single type of object.
   171         *
   172         *  @p(dlist)
   173         *     - `structType`
   174         *           Structure type of the elements in the array. Not just a
   175         *           string, it is the XDC object model representation of the
   176         *           type.
   177         *     - `buffer`
   178         *           Buffer of target memory containing raw data.
   179         *     - `len`
   180         *           Number of elements in the array.
   181         *  @p
   182         */
   183        Any decodeStructArray(Any structType, Buffer buffer, Int len);
   184
   185        /*!
   186         *  @_nodoc
   187         *  ======== _parseTypeString ========
   188         *  Convert a type string to a FieldType
   189         *
   190         *  This method interperets a type string from a $$sizes structure, and
   191         *  returns the interpretation in a FieldType object.
   192         */
   193        FieldType _parseTypeString(String fieldType);
   194
   195        /*!
   196         *  @_nodoc
   197         *  ======== _decodeField ========
   198         *  Decodes a single field within a structure and returns its value.
   199         *  This API is only called by decodeStruct. It does not take an XDC type
   200         *  object but just a string representing the type of a single field within
   201         *  a structure.
   202         *
   203         *  @p(dlist)
   204         *      - `fieldType`
   205         *            Type info for the field.
   206         *      - `buffer`
   207         *            Buffer of target memory containing raw data.
   208         *  @p
   209         *
   210         *  TODO - This should be spec'd, but currently it can't because it will
   211         *  not properly return an Enum object.
   212         */
   213        //Any _decodeField(String fieldType, Buffer buffer);
   214        function _decodeField(fieldType, buffer);
   215
   216        /*!
   217         *  @_nodoc
   218         *  ======== _decodeArray ========
   219         *  This API decodes an array of any type of elements given the elements'
   220         *  type string.
   221         *
   222         *  decodeStructArray takes an XDC OM type object, while decodeArray takes
   223         *  a type string. decodeArray calls down to decodeStructArray if the
   224         *  element type is a structure.
   225         *
   226         *  @p(dlist)
   227         *      - `elemType`
   228         *            Type info for the elements of the array.
   229         *      - `buffer`
   230         *            Buffer of target memory containing raw data.
   231         *      - `len`
   232         *            Number of elements in the array.
   233         *  @p
   234         */
   235        Any _decodeArray(String elemType, Buffer buffer, Int len);
   236
   237        /*!
   238         *  @_nodoc
   239         *  ======== _decodeScalar ========
   240         *  Decodes a scalar value of 'type' at the offset specified in
   241         *  'buffer.off'.
   242         *
   243         *  @p(dlist)
   244         *      - `type`
   245         *            Type info for the scalar
   246         *      - `buffer`
   247         *            Buffer of target memory containing raw data.
   248         *  @p
   249         *
   250         *  TODO - This should be spec'd, but currently it can't because it will
   251         *  not properly return an Enum object.
   252         */
   253        //Any _decodeScalar(FieldType type, Buffer buffer);
   254        function _decodeScalar(type, buffer);
   255
   256    }
   257    /*
   258     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   259     */
   260


module xdc.rov.ViewInfo

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*
    13     *  ======== ViewInfo ========
    14     */
    15    package xdc.rov
    16
    17    /*!
    18     *  ======== ViewInfo ========
    19     *  Describes the ROV views supported by a particular module.
    20     */
    21    @Facet metaonly module ViewInfo
    22    {
    23        /*
    24         *  ======== Arg ========
    25         *  Descriptor for a user-supplied argument passed to an ROV view
    26         */
    27        metaonly struct Arg {
    28            String name;         /*! the name displayed to the user */
    29            String type;         /*! the type of this argument:
    30                                  *      "string", "number", "boolean"
    31                                  */
    32            String defaultValue; /*! the default value of this argument */
    33        }
    34
    35        /*
    36         *  ======== Args ========
    37         *  Descriptor for a set of user-supplied arguments to an ROV view
    38         *
    39         *  This structure describes a set of user-supplied arguments for a
    40         *  module view.
    41         *
    42         *  These arguments are module-specific but multiple view descriptors
    43         *  within a module can reference a common `Args` strucure.  These
    44         *  arguments allow the user to affect the output of a specific view
    45         *  and enable the view implementor to keep the set of distinct views
    46         *  to a minimum.
    47         */
    48        metaonly struct Args {
    49            String description; /*! the description shown to the user */
    50            Arg args[length];   /*! the argument in positional order */
    51        }
    52
    53        /*!
    54         *  ======== ViewType ========
    55         *  ROV view type
    56         *
    57         *  @p(dlist)
    58         *      - INSTANCE
    59         *          basic instance information (one row per instance).  The view
    60         *          init function is passed three arguments: (1) an instance of
    61         *          the view structure, (2) the instance state structure of the
    62         *          instance to view, and (3) a string containing user-supplied
    63         *          arguments.
    64         *
    65         *      - INSTANCE_DATA
    66         *          instance-specific data tables (many rows per instance).  The
    67         *          view init function is passed three arguments: (1) an instance
    68         *          of the
    69         *          {@link xdc.rov.Program#InstDataView Program.InstDataView}
    70         *          structure, (2) an instance state structure for the
    71         *          instance to view, and (3) a string containing user-supplied
    72         *          arguments.
    73         *
    74         *      - MODULE
    75         *          basic module information (one row per module).  The view
    76         *          init function is passed three arguments: (1) an instance of
    77         *          the view structure, (2) the module state structure of the
    78         *          module to view, and (3) a string containing user-supplied
    79         *          arguments.
    80         *
    81         *      - MODULE_DATA
    82         *          module-specific data tables (many rows per module).  The
    83         *          view init function is passed two arguments: (1) a
    84         *          {@link xdc.rov.Program#ModDataView Program.ModDataView}
    85         *          structure, and (2) a string containing user-supplied
    86         *          arguments.
    87         *
    88         *      - RAW
    89         *         This is a reserved view type used by ROV to display raw data.
    90         *
    91         *      - TREE_TABLE
    92         *         The view init function is passed one argument: a string
    93         *         containing user-supplied arguments. It is expected
    94         *         to return a new initialized
    95         *         {@link xdc.rov.Program#TreeNode xdc.rov.Program.TreeNode}
    96         *         array or `null` in the event that there is nothing to
    97         *         display.
    98         *
    99         *         This view type is used to describe the `Diags` masks
   100         *         for all modules, for example; see
   101         *         {@link xdc.runtime.Diags#rovViewInfo Diags.rovViewInfo}'
   102         *
   103         *      - TREE
   104         *         The view init function is passed one argument: a string
   105         *         containing user-supplied arguments.  It is expected
   106         *         to return a new initialized JavaScript hash table of hash
   107         *         tables or `null` in the event that there is nothing to display.
   108         *
   109         *         This view type provides a simple two-level tree of name-value
   110         *         pairs.
   111         *  @p
   112         */
   113        metaonly enum ViewType {
   114            INSTANCE,
   115            MODULE,
   116            INSTANCE_DATA,
   117            MODULE_DATA,
   118            RAW,
   119            TREE_TABLE,
   120            TREE
   121        }
   122
   123        /*!
   124         *  ======== View ========
   125         *  ROV View descriptor
   126         *
   127         *  @field(type)          the view type which control the type of arguments
   128         *                        passed to the `viewInitFxn`
   129         *  @field(viewInitFxn)   the name of a function that converts raw target
   130         *                        data into a human readable "view structure".
   131         *                        This name is the name of a metaonly function
   132         *                        defined in the module's `.xs` file.
   133         *  @field(structName)    the name of the view structure populated by
   134         *                        the `viewInitFxn`.  This name is a name defined
   135         *                        the module's `.xdc` file.
   136         *  @field(argsName)      the name of an `Args` descriptor that defines the
   137         *                        user-supplied arguments for this view.
   138         *                        `argsName` is used to index into `argsMap`.
   139         */
   140        metaonly struct View {
   141            ViewType type;
   142            String   viewInitFxn;
   143            String   structName;
   144            String   argsName;
   145        }
   146
   147    instance:
   148
   149        /*!
   150         *  ======== viewMap ========
   151         *  Specifies all of the ROV views for the module
   152         *
   153         *  Maps module-specific view names to an appropriate View descriptor.
   154         */
   155        metaonly config View viewMap[string];
   156
   157        /*!
   158         *  ======== showRawTab ========
   159         *  Control whether or not the "raw view" is available
   160         */
   161        metaonly config Bool showRawTab = true;
   162
   163        /*!
   164         *  ======== argsMap ========
   165         *  Specifies argument structures for all of a module's views
   166         *
   167         *  Maps module-specific argument sets to an appropriate Args descriptor.
   168         */
   169        metaonly config Args argsMap[string];
   170    }
   171    /*
   172     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   173     */
   174


module xdc.rov.ViewXml

     1
     2    /*!
     3     *  ======== ViewXml ========
     4     *  This module sits on top of the ROV core to convert ROV views into
     5     *  XML. This is useful for test scripts and command-line based ROV tools.
     6     */
     7    metaonly module ViewXml {
     8
     9        /*!
    10         *  ======== processCommand ========
    11         *  This API allows the client to interact with the ROV core and retrieve
    12         *  ROV views.
    13         *
    14         *  It takes String commands of the following forms.
    15         *  1. "lm" - List Modules.
    16         *     This returns an XML list of all of the modules in the executable's
    17         *     configuration and the views they support.
    18         *  2. "m <module name> <tab name>" - Retrieve tab view for module.
    19         *  3. "cc" - Clear cache.
    20         *     This command clears the ROV core's cache of views. This command
    21         *     should be sent whenever the target state changes.
    22         */
    23        String processCommand(String cmd);
    24
    25        /*!
    26         *  ======== listModules ========
    27         *  Returns the list of modules in XML form.
    28         */
    29        String listModules();
    30
    31        /*!
    32         *  ======== retrieveView ========
    33         *  Retrieves the view in XML form for the given module and tab.
    34         */
    35        String retrieveView(String modName, String tabName);
    36    }
    37    /*
    38     *  @(#) xdc.rov; 1, 0, 1,1; 11-21-2018 13:30:17; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    39     */
    40


module xdc.rov.monserver.Main

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2016 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12
    13    /*!
    14     *  ======== Main.xdc ========
    15     *  The xdc.rov.monserver delivers ROV views to clients through the standard
    16     *  IO. The clients access monserver through an ROV module embedded in the
    17     *  TI Cloud Agent, or through a WebSocket server.
    18     *
    19     *  Commands:
    20     *
    21     *  Start the server -
    22     *      xs xdc.rov.monserver -p <port_number>
    23     *
    24     *  Load an executable
    25     *      exec:<full path>
    26     *
    27     *  Get a list of Modules and Tabs
    28     *      list
    29     *
    30     *  Get a Module's View
    31     *      view:Task,Basic
    32     *
    33     *  Unload the executable
    34     *      clear
    35     *
    36     */
    37    metaonly module Main inherits xdc.tools.ICmd {
    38
    39        override config String usage[] = [
    40            ' ',
    41            'Usage',
    42            '[-p]',
    43            '[--help]',
    44            ' ',
    45        ];
    46
    47    instance:
    48
    49        /*!
    50         *  ======== port ========
    51         *
    52         *  TCP port for the server
    53         *
    54         *  Only values from 1025 to 65535 are accepted.
    55         */
    56        @CommandOption('p')
    57        config UInt port = 8888;
    58
    59    }


package xdc.rov.monserver

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2015-2016 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    requires xdc.rov;
    13    requires xdc.rta;
    14
    15    /*
    16     *  ======== xdc.rov.monserver ========
    17     *
    18     *  Alternative serial port approaches:
    19     *      o https://github.com/nyholku/purejavacomm
    20     *      o https://github.com/NeuronRobotics/nrjavaserial
    21     *      o use RXTX 2.2pre to get it working on 64-bit Linux:
    22     *        http://rxtx.qbang.org/pub/rxtx/rxtx-2.2pre2-bins.zip
    23     */
    24    package xdc.rov.monserver {
    25        module Main;
    26        module CallStack, ProgressCallBack, Support, SymbolTable;
    27    }


module xdc.rov.monserver.ProgressCallBack

     1    /*
     2     *  ======== ProgressCallBack ========
     3     */
     4    metaonly module ProgressCallBack inherits xdc.rov.ICallBack {
     5
     6    instance:
     7
     8        create();
     9
    10        /*!
    11         *  ======== args ========
    12         *  Optional arguments to the callback
    13         */
    14        config Any args;
    15    }


module xdc.rov.monserver.Support

     1    metaonly module Support
     2    {
     3        function startModel();
     4
     5        Void close();
     6
     7        String stringify(Any obj, String indent);
     8
     9        Void processTreeTable(Any obj, Any newObj);
    10    }


module xdc.rov.runtime.Monitor

     1    import xdc.rov.ViewInfo;
     2
     3    /*!
     4     *  ======== Monitor ========
     5     *  ROV support for the pure C "module" Mod.c[h]
     6     *
     7     *  The file `Board_serialMon.txt` (contained in this package) illustrates
     8     *  how to use the runtime monitor `Mon.[ch]` with a TI-RTOS UART driver.
     9     */
    10    //@NoRuntime
    11    //@HeaderName("")
    12    module Monitor
    13    {
    14        /*!
    15         *  ======== rovViewInfo ========
    16         *  @_nodoc
    17         */
    18        @Facet
    19        metaonly config ViewInfo.Instance rovViewInfo =
    20            ViewInfo.create({
    21                argsMap: [
    22                    ['VariableNameOrAddr',
    23                        {
    24                            description: "Variable Name/Address",
    25                            args: [
    26                                {
    27                                    name: "name/addr",
    28                                    type: "number",
    29                                    defaultValue: "0"
    30                                },
    31                                {
    32                                    name: "check",
    33                                    type: "boolean",
    34                                    defaultValue: "true"
    35                                }
    36                            ]
    37                         }
    38                    ],
    39                    ['ReadMemory',
    40                        {
    41                            description: "Read Memory",
    42                            args: [
    43                                {
    44                                    name: "addr/name",
    45                                    type: "number",
    46                                    defaultValue: "0"
    47                                },
    48                                {
    49                                    name: "length",
    50                                    type: "number",
    51                                    defaultValue: "0"
    52                                },
    53                                {
    54                                    name: "check",
    55                                    type: "boolean",
    56                                    defaultValue: "true"
    57                                }
    58                            ]
    59                        }
    60                    ],
    61                    ['FindSymbols',
    62                        {
    63                            description: "Find Symbols",
    64                            args: [
    65                                {
    66                                    name: "addr/name",
    67                                    type: "number",
    68                                    defaultValue: "0"
    69                                },
    70                                {
    71                                    name: "radius",
    72                                    type: "number",
    73                                    defaultValue: "0"
    74                                },
    75                                {
    76                                    name: "check",
    77                                    type: "boolean",
    78                                    defaultValue: "true"
    79                                }
    80                            ]
    81                        }
    82                     ]
    83
    84                ],
    85                viewMap: [
    86                    ['Module',
    87                        {
    88                            type: ViewInfo.MODULE,
    89                            viewInitFxn: 'viewInitModule',
    90                            structName: 'ModuleView'
    91                        }
    92                    ],
    93                    ['Variable',
    94                        {
    95                            type: ViewInfo.MODULE,
    96                            viewInitFxn: 'viewInitVariable',
    97                            structName: 'VariableView',
    98                            argsName: 'VariableNameOrAddr'
    99                        }
   100                    ],
   101                    ['UChar',
   102                        {
   103                            type: xdc.rov.ViewInfo.MODULE_DATA,
   104                            viewInitFxn: 'viewInitUChar',
   105                            structName: 'UCharView',
   106                            argsName: 'ReadMemory'
   107                        }
   108                    ],
   109                    ['Bits16',
   110                        {
   111                            type: xdc.rov.ViewInfo.MODULE_DATA,
   112                            viewInitFxn: 'viewInitBits16',
   113                            structName: 'Bits16View',
   114                            argsName: 'ReadMemory'
   115                        }
   116                    ],
   117                    ['Bits32',
   118                        {
   119                            type: xdc.rov.ViewInfo.MODULE_DATA,
   120                            viewInitFxn: 'viewInitBits32',
   121                            structName: 'Bits32View',
   122                            argsName: 'ReadMemory'
   123                        }
   124                    ],
   125                    ['Sections',
   126                        {
   127                            type: xdc.rov.ViewInfo.MODULE_DATA,
   128                            viewInitFxn: 'viewInitSections',
   129                            structName: 'SectionView'
   130                        }
   131                    ],
   132                    ['Symbols',
   133                        {
   134                            type: xdc.rov.ViewInfo.MODULE_DATA,
   135                            viewInitFxn: 'viewInitSymbols',
   136                            structName: 'SymbolView',
   137                            argsName: 'FindSymbols'
   138                        }
   139                    ],
   140                ]
   141            });
   142
   143        /*!
   144         *  ======== ModuleView ========
   145         *  @_nodoc
   146         */
   147        metaonly struct ModuleView {
   148            String command;   /* current monitor command */
   149            String readFxn;   /* monitor's read function */
   150            String writeFxn;  /* monitor's write function */
   151        }
   152
   153        /*!
   154         *  ======== SectionView ========
   155         *  @_nodoc
   156         */
   157        metaonly struct SectionView {
   158            String name;
   159            Ptr    start;    /* first valid address of this section */
   160            Ptr    end;      /* last valid address of this section */
   161            UInt   len;      /* bytes on this section */
   162            UInt   gap;      /* gap between the previous section's end and start */
   163            String kind;     /* "code" or "data" */
   164            String startSym; /* symbol name (if any) whose address equals start */
   165        };
   166
   167        /*!
   168         *  ======== SymbolView ========
   169         *  @_nodoc
   170         */
   171        metaonly struct SymbolView {
   172            String name;
   173            Ptr    addr;
   174            String type;
   175        };
   176
   177        /*!
   178         *  ======== VariableView ========
   179         *  @_nodoc
   180         */
   181        metaonly struct VariableView {
   182            String name;      /* variable's symbolic name */
   183            String character; /* variable as a char */
   184            String int8_t;    /* variable as a int8_t */
   185            String int16_t;   /* variable as a int16_t */
   186            String int32_t;   /* variable as a int32_t */
   187            String uint8_t;   /* variable as a uint8_t */
   188            String uint16_t;  /* variable as a uint16_t */
   189            String uint32_t;  /* variable as a uint32_t */
   190        }
   191
   192        /*!
   193         *  ======== Bits16View ========
   194         *  One row of Bits16 values
   195         *  @_nodoc
   196         */
   197        metaonly struct Bits16View {
   198            Ptr    addr;
   199            Bits16 word0;
   200            Bits16 word1;
   201            Bits16 word2;
   202            Bits16 word3;
   203            Bits16 word4;
   204            Bits16 word5;
   205            Bits16 word6;
   206            Bits16 word7;
   207        };
   208
   209        /*!
   210         *  ======== Bits32View ========
   211         *  One row of Bits32 values
   212         *  @_nodoc
   213         */
   214        metaonly struct Bits32View {
   215            Ptr    addr;
   216            Bits32 word0;
   217            Bits32 word1;
   218            Bits32 word2;
   219            Bits32 word3;
   220        };
   221
   222        /*!
   223         *  ======== UCharView ========
   224         *  One row of UChar values
   225         *  @_nodoc
   226         */
   227        metaonly struct UCharView {
   228            Ptr   addr;
   229            UChar byte0;
   230            UChar byte1;
   231            UChar byte2;
   232            UChar byte3;
   233            UChar byte4;
   234            UChar byte5;
   235            UChar byte6;
   236            UChar byte7;
   237        };
   238
   239        /*! @_nodoc - target datatype used to fetch data for UCharView */
   240        struct UCharBuffer {
   241            UChar elem;
   242        };
   243
   244        /*! @_nodoc - target datatype used to fetch data for Bits16View */
   245        struct Bits16Buffer {
   246            Bits16 elem;
   247        };
   248
   249        /*! @_nodoc - target datatype used to fetch data for Bits32View */
   250        struct Bits32Buffer {
   251            Bits32 elem;
   252        };
   253
   254        /*! @_nodoc - matches Mon command size */
   255        config Int MAXCMDSIZE = 128;
   256
   257        /*! @_nodoc - Mon state structure address */
   258        config Ptr STATEADDR = "&monObject";
   259
   260        /*! @_nodoc - matches Mon state structure */
   261        struct MonState {
   262            Char *buffer; /* command buffer (of length MAXCMDSIZE) */
   263            Fxn  read;
   264            Fxn  write;
   265        };
   266    }


package xdc.rov.runtime

     1    /*!
     2     *  ======== xdc.rov.runtime ========
     3     *  ROV target runtime support
     4     *
     5     *  This package contains a runtime monitor that can be used with ROV in lieu
     6     *  of a JTAG connection.  The `xdc.rov.monserver` package contains a server
     7     *  that enables a standalone Browser-based ROV GUI application that can
     8     *  utilize the target monitor provided by this package.
     9     *
    10     *  The file `Board_serialMon.txt` (contained in this package) illustrates
    11     *  how to use the runtime monitor with a TI-RTOS UART driver.
    12     */
    13    package xdc.rov.runtime {
    14        module Monitor;
    15    }


module xdc.rov.testserver.DummyCallBack

     1    metaonly module DummyCallBack inherits xdc.rov.ICallBack {
     2
     3    instance:
     4
     5        create();
     6
     7    }


module xdc.rov.testserver.Main

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2016-2018 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12
    13    /*!
    14     *  ======== Main.xdc ========
    15     *  The xdc.rov.testserver displays ROV views to clients on the command line.
    16     *  The server expects that a CCS debugger is already started and an application
    17     *  is loaded.
    18     *
    19     *  The DSlite port must be known at the time the server is started. Therefore,
    20     *  when starting CCS, the environment variable TI_DS_WEBSOCKET_PORT must be set
    21     *  and that same port number must be supplied to xdc.rov.testserver.
    22     *
    23     *  Commands:
    24     *
    25     *  Start the server -
    26     *      xs xdc.rov.testserver --exec <full path> --port <port_number>
    27     *
    28     *  Get a list of Modules and Tabs
    29     *      l
    30     *
    31     *  Get a Module's View
    32     *      v Module View
    33     *
    34     *  Issue the command "Run" to the debugger
    35     *      r
    36     *
    37     *  Issue the command "Pause" to the debugger
    38     *      p
    39     *
    40     *  Exit xdc.rov.testserver
    41     *      e
    42     *
    43     */
    44    metaonly module Main inherits xdc.tools.ICmd {
    45
    46        override config String usage[] = [
    47            ' ',
    48            'Usage',
    49            '[--exec <executable>]',
    50            '[--port <DSLite Websocket port>]',
    51            '[-v <debug level>]',
    52            '[--help]',
    53            ' ',
    54        ];
    55
    56    instance:
    57
    58        /*!
    59         *  ======== exec ========
    60         *
    61         *  Executable to run ROV on
    62         *
    63         */
    64        @CommandOption('exec')
    65        config String executable = "";
    66
    67        /*!
    68         *  ======== port ========
    69         *
    70         *  DSLite port
    71         *
    72         *  Corresponds to the value in the environment variable
    73         *  TI_DS_WEBSOCKET_PORT. The variable must be set at the time CCS is
    74         *  started.
    75         */
    76        @CommandOption('port')
    77        config UInt port;
    78
    79        /*!
    80         *  ======== verbose ========
    81         *
    82         *  Defines the amount of debug info
    83         *
    84         */
    85        @CommandOption('v')
    86        config UInt verbose = 0;
    87    }


package xdc.rov.testserver

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2015-2018 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    requires xdc.rov;
    13    requires xdc.rta;
    14
    15    /*
    16     *  ======== xdc.rov.testserver ========
    17     *
    18     */
    19    package xdc.rov.testserver {
    20        module Main;
    21        module CallStack, DummyCallBack, Support, SymbolTable;
    22    }


module xdc.rov.testserver.Support

     1    metaonly module Support
     2    {
     3        function startModel();
     4
     5        Void advance();
     6
     7        Void pause();
     8
     9        Void close();
    10
    11        String stringify(Any obj, String indent);
    12    }


module xdc.rta.tools.file.Main

     1    /*!
     2     *  ======== Main ========
     3     *  Tool for reading and decoding RTA data from a file
     4     */
     5    metaonly module Main inherits xdc.tools.ICmd {
     6
     7        override config String usage[] = [
     8            ' ',
     9            'Usage',
    10            '[-p] [-h] [-m] [-e executable] [-x RTA XML file] [-d data input file] [-o output text file] [-c delimter character]',
    11            '[--help]',
    12            ' ',
    13        ];
    14
    15    instance:
    16
    17        /*!
    18         *  ======== printToScreen ========
    19         *  Whether to print the decoded records to the console.
    20         *
    21         *  You may use this tool to simply print the decoded records, or you
    22         *  may have them redirected to a file to be processed elsewhere.
    23         */
    24        @CommandOption('p')
    25        config Bool printToScreen = false;
    26
    27        /*!
    28         *  ======== suppressHeader ========
    29         *  Don't print the header when printing the decoded records.
    30         */
    31        @CommandOption('h')
    32        config Bool suppressHeader = false;
    33
    34        /*!
    35         *  ======== more ========
    36         *  Wait for the user to press enter before displaying the next packet.
    37         *
    38         *  Without this flag, the tool will simply print all of the records in the
    39         *  data file to the screen. If this flag is set, then the tool will wait
    40         *  the user to press enter in between displaying each packet.
    41         */
    42        @CommandOption('m')
    43        config Bool more = false;
    44
    45        /*!
    46         *  ======== executable ========
    47         *  Path to the executable which was used to generate the data file.
    48         */
    49        @CommandOption('e')
    50        config String executable = "";
    51
    52        /*!
    53         *  ======== rtaXml ========
    54         *  Optional path to the RTA XML file.
    55         */
    56        @CommandOption('x')
    57        config String rtaXml = "";
    58
    59        /*!
    60         *  ======== dataFile ========
    61         *  Path to the file containing the RTA log data.
    62         */
    63        @CommandOption('d')
    64        config String dataFile = "";
    65
    66        /*!
    67         *  ======== outputFile ========
    68         *  Optional path to an output file to write the decoded records to.
    69         *
    70         *  The tool will write the decoded records out as text to the specified
    71         *  out file. The record properties will be separated with a delimeter
    72         *  character so that they can be imported into a spreadsheet such as
    73         *  Excel.
    74         */
    75        @CommandOption('o')
    76        config String outputFile = "";
    77
    78        /*!
    79         *  ======== loadFile ========
    80         *  // TODO
    81         *  [-l output file for load data]
    82         */
    83
    84        /*!
    85         *  ======== delimiter ========
    86         *  Delimiter character to use when writing out the file.
    87         *
    88         *  The character specified here will be inserted between each of the
    89         *  record fields so that the file can be imported into a spreadsheet
    90         *  such as excel.
    91         */
    92        @CommandOption('c')
    93        config String delimiter = "|";
    94
    95    }


package xdc.rta.tools.file

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12
    13    /*
    14     *  ======== xdc.rta.tools.file ========
    15     *  Command line tool for reading and decoding RTA data from a file
    16     */
    17    package xdc.rta.tools.file {
    18        module Main;
    19    }


module xdc.runtime.Assert

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Assert.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== Assert ========
    19     *  Runtime assertion manager
    20     *
    21     *  The `Assert` module provides configurable diagnostics to the program.
    22     *  Similar to the standard C `assert()` macro, `Assert` methods are
    23     *  interspersed with other code to add diagnostics to a program. Unlike
    24     *  the standard C assert support, the `Assert` module provides greater
    25     *  flexibility in managing the messages displayed, the message string
    26     *  space overhead, and the runtime handling of failures. In addition,
    27     *  because the `Assert` methods build atop the Diags module, you can
    28     *  precisely control which asserts remain in the final application, if any.
    29     *
    30     *  The `Assert` module works in conjunction with the `{@link Diags}` module.
    31     *  `Assert` statements are added to the code using the
    32     *  `{@link #isTrue Assert_isTrue()}` function. Execution of assert
    33     *  statements is controlled by the `{@link Diags#ASSERT}` and
    34     *  `{@link Diags#INTERNAL}` bits in a module's diagnostics mask. By default,
    35     *  all module's `Diags_ASSERT` bit is enabled and the `Diags_INTERNAL` bit
    36     *  is disabled.  See `{@link Types#Common$ Types.Common$}` for the
    37     *  declaration of the bits in the diagnostics mask and
    38     *  `{@link Defaults#common$ Default.common$}` for the default module settings.
    39     *
    40     *  Two types of asserts are supported: public asserts and internal asserts.
    41     *
    42     *  @p(blist)
    43     *  - Public asserts have an assert ID and are, by default, controlled
    44     *  by the `{@link Diags#ASSERT}` bit.
    45     *  - Internal asserts don't have an assert ID (other than NULL) and
    46     *  are active only when both the `{@link Diags#ASSERT}` and
    47     *  `{@link Diags#INTERNAL}` bits of the module's diagnostics mask are set.
    48     *  @p
    49     *
    50     *  `Assert` IDs are small integer values that index into a table of
    51     *  assertion descriptors. These descriptors hold an error message
    52     *  and a diagnostics mask that is used to enable and disable the
    53     *  assertion at runtime.
    54     *
    55     *  You can remap individual public asserts to different bits in the
    56     *  diagnostics mask, or can disable the assert altogether. This is
    57     *  done by setting the mask property of the assert ID. Setting the
    58     *  mask to 0 disables the assert. In all other cases, the `Diags.ASSERT`
    59     *  bit is OR'd together with the mask to define the controlling bits.
    60     *  For example, the module's diagnostics mask must have the `Diags.ASSERT`
    61     *  bit set and any other bit specified in the mask property of the
    62     *  assert ID in order to activate the assert.
    63     *
    64     *  @a(Examples)
    65     *  @p(html)
    66     *  <hr />
    67     *  @p
    68     *  Example 1: The following C code adds an assert to application code
    69     *  which is not in a module. This assert does not have an assert
    70     *  identifier (the second argument is NULL); this makes it an internal
    71     *  assert.
    72     *
    73     *  @p(code)
    74     *  // file.c
    75     *  #include <xdc/runtime/Assert.h>
    76     *
    77     *  Assert_isTrue(count > 0, NULL);
    78     *  @p
    79     *
    80     *  The following XDC configuration statements set both the ASSERT and
    81     *  INTERNAL bits in the diagnostics mask to enable the internal assert
    82     *  created in the previous C code. Since the C code is not in a module,
    83     *  you must set the bits in the diagnostics mask of the
    84     *  `{@link xdc.runtime.Main xdc.runtime.Main}` module. The Main module
    85     *  is used to control all `{@link Log}` and `Assert` statements that are
    86     *  not part of the implementation of a module; for example, top-level
    87     *  application code or any existing sources that simply call the `Log` or
    88     *  `Assert` methods.
    89     *
    90     *  @p(code)
    91     *  // program.cfg
    92     *  var Assert = xdc.useModule('xdc.runtime.Assert');
    93     *  var Diags = xdc.useModule('xdc.runtime.Diags');
    94     *  var Main = xdc.useModule('xdc.runtime.Main');
    95     *
    96     *  Main.common$.diags_ASSERT = Diags.ALWAYS_ON;
    97     *  Main.common$.diags_INTERNAL = Diags.ALWAYS_ON;
    98     *  @p
    99     *
   100     *  @p(html)
   101     *  <hr />
   102     *  @p
   103     *  Example 2: The following example shows how to use and configure an
   104     *  assert ID that is declared by a module. It adds that assert to the
   105     *  application's C source code, and configures the application to
   106     *  execute the assert.
   107     *
   108     *  This is part of the XDC file for the module that declares an `Assert` Id:
   109     *
   110     *  @p(code)
   111     *  // Mod.xdc
   112     *  import xdc.runtime.Assert;
   113     *  import xdc.runtime.Diags;
   114     *
   115     *  config Assert.Id A_nonZero = {
   116     *      msg: "A_nonZero: value must be non-zero"
   117     *  };
   118     *  @p
   119     *
   120     *  This is part of the C code for the application:
   121     *
   122     *  @p(code)
   123     *  // Mod.c
   124     *  #include <xdc/runtime/Assert.h>
   125     *
   126     *  Assert_isTrue(x != 0, Mod_A_nonZero);
   127     *  @p
   128     *
   129     *  This is part of the XDC configuration file for the application:
   130     *
   131     *  @p(code)
   132     *  // program.cfg
   133     *  var Diags = xdc.useModule('xdc.runtime.Diags');
   134     *  var Mod = xdc.useModule('my.pkg.Mod');
   135     *  Mod.common$.diags_ASSERT = Diags.ALWAYS_ON;
   136     *  @p
   137     *
   138     *  The Assert calls can also be completely removed by defining the symbol
   139     *  xdc_runtime_Assert_DISABLE_ALL. This can be done on the compile line, e.g.
   140     *  -Dxdc_runtime_Assert_DISABLE_ALL. This will completely remove the Assert
   141     *  statements from any code compiled with this flag, regardless of the
   142     *  application's configuration or your compiler's optimization settings.
   143     *
   144     *  It is also possible to remove all conditions from Assert calls. As explained
   145     *  above, Assert calls are executed only if certain bits in the module's
   146     *  Diags mask are set. However, if the symbol
   147     *  xdc_runtime_Assert_DISABLE_CONDITIONAL_ASSERT is defined, the module's Diags
   148     *  mask is not queried at all, and all Assert calls are unconditionally
   149     *  executed.
   150     *  The symbol xdc_runtime_Assert_DISABLE_ALL has a precedence, and if it's
   151     *  set, no Assert calls are executed regardless of any definition of
   152     *  xdc_runtime_Assert_DISABLE_CONDITIONAL_ASSERT.
   153     */
   154    @DirectCall
   155    @CustomHeader
   156
   157    module Assert {
   158
   159        /*!
   160         *  ======== Assert_Desc ========
   161         *  Assert descriptor
   162         *
   163         *  Each public assert is defined with an assert descriptor. This
   164         *  structure defines which bits in the module's diagnostics mask
   165         *  control this assert, and the message raised when the assert fails.
   166         *  The mask property is optional, it defaults to the
   167         *  `{@link Diags#ASSERT}` bit.
   168         *
   169         *  @field(mask)    Specifies which bits enable the assert.
   170         *  @field(msg)     The message printed when the assert fails.
   171         */
   172        metaonly struct Desc {
   173            Diags.Mask mask;
   174            String msg;
   175        };
   176
   177        /*!
   178         *  ======== Assert_Id ========
   179         *  Assert identifier
   180         *
   181         *  Each metaonly assert descriptor is encoded into a target accessable
   182         *  assert Id type which can be passed to the `{@link #isTrue}` function.
   183         */
   184        @Encoded typedef Desc Id;
   185
   186        /*!
   187         *  ======== E_assertFailed ========
   188         *  The `{@link Error#Id}` raised when an assertion violation is detected
   189         *
   190         *  When an assertion violation is triggered, an error is raised via
   191         *  `Error_raise()`.  `E_assert_Failed` is the `{@link Error#Id}` passed
   192         *  to `Error_raise()`.
   193         *
   194         *  The first string argument (%s) will be either "", if the assertion Id
   195         *  is `NULL` (for internal asserts), or ": " (for public asserts).
   196         *  The second string argument (%s) is the
   197         *  `Assert.Desc.msg` string associated with the assertion Id; if the
   198         *  Id is `NULL`  (an internal assert) or if text is not loaded
   199         *  (`!{@link Text#isLoaded}()`), this string is "".
   200         *
   201         *  @see #isTrue
   202         *  @see Error#Id
   203         */
   204        readonly config Error.Id E_assertFailed = {msg: "assertion failure%s%s"};
   205
   206        /*!
   207         *  ======== Assert_isTrue ========
   208         *  Test an assertion
   209         *
   210         *  `Assert_isTrue()` statements may be conditionally enabled (disabled)
   211         *  on a per module basis by setting the calling module's
   212         *  `{@link IModule#$common $common.diags_ASSERT}` configuration
   213         *  parameter.  If
   214         *  the `Assert_isTrue()` statement is not in a module, the calling
   215         *  module is the `{@link Main}` module.  You must enable the
   216         *  `{@link Diags#ASSERT}` bit in the module's diagnostics mask for this
   217         *  call to be enabled.  If a `NULL` assert id is specified, then you
   218         *  must enable the `{@link Diags#INTERNAL}` in addition to the
   219         *  `ASSERT` bit.
   220         *
   221         *  If the `Assert_isTrue()` statement is enabled and `expr` evaluates to
   222         *  false, the assert specified by `id` is raised; i.e., the
   223         *  `{@link #E_assertFailed}` error is raised with a `NULL`
   224         *  error block.  In other words, the standard `{@link Error#raise}`
   225         *  handling hooks will be run, `{@link System#abort()}` will be called,
   226         *  and control does not return to the caller.  The `id` may be `null`, in
   227         *  which case you will get a generic assert message.
   228         *
   229         *  @param(expr)    the expression which should evaluate to true
   230         *  @param(id)      identifies the assert being raised
   231         *
   232         *  @a(Examples)
   233         *  C Code
   234         *  @p(code)
   235         *  #include <xdc/runtime/Assert.h>
   236         *
   237         *  Assert_isTrue(count > 0, NULL);
   238         *  @p
   239         */
   240        @Macro Void isTrue(Bool expr, Id id);
   241
   242    internal:
   243
   244        Void raise(Types.ModuleId mod, CString file, Int line, Id id);
   245
   246    }
   247    /*
   248     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   249     */
   250


module xdc.runtime.Defaults

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Defaults.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Defaults ========
    21     *  Default attributes inherited by all target modules
    22     *
    23     *  This module defines default values for `common$` structure. If other
    24     *  modules do not set `common$` properties explicitly, these values will be
    25     *  used.
    26     */
    27    module Defaults {
    28
    29        /*!
    30         *  ======== common$ ========
    31         *  Defaults inherited by all target modules
    32         *
    33         *  This structure defines the default values for the configuration
    34         *  parameters shared by all modules in a system.  Unless otherwise
    35         *  noted, setting one of the fields defined below will set the
    36         *  corresponding value for all modules in the system which have not
    37         *  been explicitly set; i.e., it will establish a default value for
    38         *  the parameter.
    39         *
    40         *  However, the modules from this package (`xdc.runtime`) are an
    41         *  exception. The values from `Default.common$` are not copied to
    42         *  `logger` and `diags_` properties of `common$` in `xdc.runtime`
    43         *  modules. The property `diags_ASSERT` is an exception to that exception.
    44         *  Its value from `Default.common$` is copied to all modules for which
    45         *  `diags_ASSERT` has not been explicitly set.
    46         *
    47         *  @a(diags_ASSERT)
    48         *  Enables asserts at runtime. Default is `ALWAYS_ON`
    49         *
    50         *  @a(diags_ENTRY)
    51         *  Enables entry trace for all functions. Default is `ALWAYS_OFF`
    52         *
    53         *  @a(diags_EXIT)
    54         *  Enables exit trace for all functions. Default is `ALWAYS_OFF`
    55         *
    56         *  @a(diags_INTERNAL)
    57         *  Enables internal asserts. Default is `ALWAYS_OFF`. When set to
    58         *  `ALWAYS_ON`, requires `diags_ASSERT` to be `ALWAYS_ON`.
    59         *
    60         *  @a(diags_LIFECYCLE)
    61         *  Enables logging of lifecycle events. These events are logged during
    62         *  creates and deletes. Default is `ALWAYS_OFF`.
    63         *
    64         *  @a(diags_STATUS)
    65         *  Enables logging of status events, such as error and warning events.
    66         *  Default is `ALWAYS_ON`. Note that this does not mean that logging will
    67         *  occur by default--a logger instance must also be configured for the
    68         *  module in order for events to be logged.
    69         *
    70         *  @a(diags_INFO)
    71         *  Enables logging of generic informational events. Default is
    72         *  `ALWAYS_OFF`.
    73         *
    74         *  @a(diags_ANALYSIS)
    75         *  Enables logging of analysis events, such as benchmarking events.
    76         *  Default is `ALWAYS_OFF`.
    77         *
    78         *  @a(diags_USER)
    79         *  Each `diags_USER` field controls a separate user-defined
    80         *  logging level. Default is `ALWAYS_OFF` for all `diags_USER` fileds.
    81         *
    82         *  @a(gate)
    83         *  Default gate used by all modules which are declared as being `@Gated`.
    84         *  By default, this parameter points to an instance of `{@link GateNull}`,
    85         *  which means there is no protection.
    86         *
    87         *  @a(gateParams)
    88         *  The default parameters used to create gates at runtime. See
    89         *  `{@link Types#Common$.gateParams}`.  Default is `null`.
    90         *
    91         *  @a(instanceHeap)
    92         *  Specify heap to be used for module instances. Default is `null`.
    93         *  If `instanceHeap` is `null`, instances will be allocated from
    94         *  the heap specified by `{@link Memory#defaultHeapInstance}`.
    95         *
    96         *  @a(instanceSection)
    97         *  Specify section to be used to place module instances. Default is
    98         *  `null`.
    99         *
   100         *  @a(logger)
   101         *  Default logger used by modules to write logs. By default there is
   102         *  no logger.
   103         *
   104         *  @a(memoryPolicy)
   105         *  Used to specify type of application. `Types.STATIC_POLICY` is used when
   106         *  all objects are created statically. `Types.CREATE_POLICY` is used when
   107         *  the application creates objects at runtime. `Types.DELETE_POLICY` is
   108         *  used when the application creates and deletes objects at runtime. This
   109         *  helps eliminate unwanted create and delete code.
   110         *
   111         *  @a(namedInstance)
   112         *  This parameter should be set to `true` if space needs to be allocated in
   113         *  instance objects for instance names. Allocating space for a name
   114         *  allows object view tools to display the names. The runtime functions
   115         *  `Mod_Handle_name()` and `Mod_Handle_label()` defined for each module
   116         *  `Mod` can be used to retrieve the name at runtime.
   117         *
   118         *  @a(namedModule)
   119         *  This field allows the name of the module to be retained on the target.
   120         *  Setting this to `false` will save space but will also prevent
   121         *  the target from being able to display the module names appearing
   122         *  in `Log` events and `Error`s.
   123         *
   124         *  Setting `namedModule` to `false` causes all modules, except for
   125         *  `{@link Memory}` and `{@link Main}` to be unnamed by default.  To
   126         *  eliminate the string names for these modules you must explicitly
   127         *  set their `common$.namedModule` parameters to `false`; without these
   128         *  two names, target-side display of error messages is somewhat cryptic.
   129         *
   130         *  @a(romPatchTable)
   131         *  Specify whether modules that are allocated to ROM are patchable.
   132         */
   133        override metaonly config Types.Common$ common$ = {
   134            diags_ASSERT:       Diags.ALWAYS_ON,
   135            diags_ENTRY:        Diags.ALWAYS_OFF,
   136            diags_EXIT:         Diags.ALWAYS_OFF,
   137            diags_INTERNAL:     Diags.ALWAYS_OFF,
   138            diags_LIFECYCLE:    Diags.ALWAYS_OFF,
   139            diags_STATUS:       Diags.ALWAYS_ON,
   140            diags_USER1:        Diags.ALWAYS_OFF,
   141            diags_USER2:        Diags.ALWAYS_OFF,
   142            diags_USER3:        Diags.ALWAYS_OFF,
   143            diags_USER4:        Diags.ALWAYS_OFF,
   144            diags_USER5:        Diags.ALWAYS_OFF,
   145            diags_USER6:        Diags.ALWAYS_OFF,
   146            diags_USER7:        Diags.ALWAYS_OFF,
   147            diags_INFO:         Diags.ALWAYS_OFF,
   148            diags_USER8:        Diags.ALWAYS_OFF,
   149            diags_ANALYSIS:     Diags.ALWAYS_OFF,
   150            fxntab:             true,
   151            gate:               null,
   152            gateParams:         null,
   153            instanceHeap:       null,
   154            instanceSection:    null,
   155            logger:             null,
   156            outPolicy:          Types.COMMON_FILE,
   157            memoryPolicy:       Types.DELETE_POLICY,
   158            namedInstance:      false,
   159            namedModule:        true,
   160            romPatchTable:      false,
   161        };
   162
   163        /*!
   164         *  ======== noRuntimeCommon$ ========
   165         *  Defaults inherited by the target modules that do not need the runtime
   166         *  support.
   167         *
   168         *  Modules for which the attribute `@NoRuntime` is set cannot use any
   169         *  functionality controlled by the parameters in their `common$`
   170         *  structures. For such modules, these parameters are set to the
   171         *  following values, and cannot be changed.  This ensures that
   172         *  `@NoRuntime` modules not used in situations where the normal
   173         *  module runtime features are required.
   174         */
   175        metaonly readonly config Types.Common$ noRuntimeCommon$ = {
   176            diags_ASSERT:       Diags.ALWAYS_OFF,
   177            diags_ENTRY:        Diags.ALWAYS_OFF,
   178            diags_EXIT:         Diags.ALWAYS_OFF,
   179            diags_INTERNAL:     Diags.ALWAYS_OFF,
   180            diags_LIFECYCLE:    Diags.ALWAYS_OFF,
   181            diags_STATUS:       Diags.ALWAYS_OFF,
   182            diags_USER1:        Diags.ALWAYS_OFF,
   183            diags_USER2:        Diags.ALWAYS_OFF,
   184            diags_USER3:        Diags.ALWAYS_OFF,
   185            diags_USER4:        Diags.ALWAYS_OFF,
   186            diags_USER5:        Diags.ALWAYS_OFF,
   187            diags_USER6:        Diags.ALWAYS_OFF,
   188            diags_USER7:        Diags.ALWAYS_OFF,
   189            diags_INFO:         Diags.ALWAYS_OFF,
   190            diags_USER8:        Diags.ALWAYS_OFF,
   191            diags_ANALYSIS:     Diags.ALWAYS_OFF,
   192            fxntab:             false,
   193            gate:               null,
   194            gateParams:         null,
   195            instanceHeap:       null,
   196            instanceSection:    null,
   197            logger:             null,
   198            outPolicy:          Types.COMMON_FILE,
   199            memoryPolicy:       Types.STATIC_POLICY,
   200            namedInstance:      false,
   201            namedModule:        false,
   202            romPatchTable:      false,
   203        };
   204
   205        /*!
   206         *  ======== getCommon ========
   207         *  Get a specified common parameter from a module
   208         *
   209         *  Get the value of a member of the structure `common$` based on
   210         *  defaults and the current value of the parameter. If the current value
   211         *  of `param` is `undefined`, the function returns the default value
   212         *  for that parameter from `Default.common$`.
   213         *
   214         *  @param(eb)  module whose parameter is queried
   215         *
   216         *  @param(param)   string naming the queried parameter
   217         *
   218         *  @a(returns)
   219         *  Returns the value of the parameter named `param` from the module
   220         *  `mod`.
   221         */
   222        metaonly Any getCommon(IModule.Module mod, String param);
   223    };
   224    /*
   225     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   226     */
   227


module xdc.runtime.Diags

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Diags.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== Diags ========
    19     *  Diagnostics manager
    20     *
    21     *  Every XDC module has a "diagnostics mask" that allows clients to
    22     *  enable or disable diagnostics on a per module basis both at
    23     *  configuration time and at runtime. The `Diags` module manages a
    24     *  module's diagnostics mask.
    25     *
    26     *  You use the `Diags` module to set and clear bits in a module's
    27     *  diagnostics mask for the purpose of controlling diagnostics
    28     *  within that module. Each bit corresponds to a "category" of diagnostic
    29     *  that can be individually enabled or disabled.
    30     *
    31     *  A module's diagnostics mask controls both `{@link Assert}` and
    32     *  `{@link Log}` statements within that module. A module's diagnostics
    33     *  mask may also be used to conditionally execute blocks of code using
    34     *  the `{@link #query Diags_query()}` runtime function.
    35     *
    36     *  A module's diagnostics mask can be set at configuration time and
    37     *  at runtime. The implementation of diagnostics is such that when they
    38     *  are permanently turned off at configuration time
    39     *  (`{@link #ALWAYS_OFF Mode.ALWAYS_OFF}`), an optimizer can
    40     *  completely eliminate the diagnostics code from the program. Similarly,
    41     *  if diagnostics are permanently turned on at configuration time
    42     *  (`{@link #ALWAYS_ON Mode.ALWAYS_ON}`), the optimizer can
    43     *  eliminate all runtime conditional checking and simply
    44     *  invoke the diagnostics code directly. Runtime checking of the
    45     *  diagnostics mask is performed only when the diagnostics are configured
    46     *  to be runtime modifiable (`{@link #RUNTIME_OFF Mode.RUNTIME_OFF}` or
    47     *  `{@link #RUNTIME_ON Mode.RUNTIME_ON}`).
    48     *
    49     *  Each bit of the diagnostics mask is controlled by one of the following
    50     *  constants.
    51     *
    52     *  @p(code)
    53     *  Constant    Meaning
    54     *  --------------------------
    55     *  ENTRY       Function entry
    56     *  EXIT        Function exit
    57     *  LIFECYCLE   Object life-cycle
    58     *  INTERNAL    Internal diagnostics
    59     *  ASSERT      Assert checking
    60     *  STATUS      Warning or Error events
    61     *  USER1       User defined diagnostics
    62     *  USER2       User defined diagnostics
    63     *  USER3       User defined diagnostics
    64     *  USER4       User defined diagnostics
    65     *  USER5       User defined diagnostics
    66     *  USER6       User defined diagnostics
    67     *  USER7       User defined diagnostics
    68     *  INFO        Informational event
    69     *  USER8       User defined diagnostics
    70     *  ANALYSIS    Analysis event
    71     *  @p
    72     *
    73     *  These constants can be used from either JavaScript configuration
    74     *  scripts or C code and, therefore, have two "names". For example,
    75     *  to reference the ENTRY constant from JavaScript you must use
    76     *  `Diags.ENTRY` whereas from C you would use `Diags_ENTRY`.
    77     *
    78     *  The `ENTRY` and `EXIT` categories are for log statements at the entry and
    79     *  exit points, respectively, to each function within a module. This
    80     *  is useful for tracking the execution flow of your program.
    81     *
    82     *  The `LIFECYCLE` category is for log events at the create/construct
    83     *  and delete/destruct points of each instance object for the module.
    84     *  This is useful for tracking the life-cycle of a module instance object.
    85     *
    86     *  `ASSERT` and `INTERNAL` are unique in that they are not related to logging,
    87     *  but instead control the Assert statements in a module. These categories
    88     *  control the two classes of asserts:
    89     *
    90     *  @p(blist)
    91     *  - Public asserts, which have an `{@link Assert#Id Assert_Id}` and
    92     *  are documented in the module's reference pages. These asserts are
    93     *  on by default and are meant to help developers validate code that
    94     *  invokes a module's functions.
    95     *  - Internal asserts, which have no `{@link Assert#Id Assert_Id}`.
    96     *  These asserts are off by default and are typically used only when
    97     *  developing code. That is, like the standard C assert() mechanism,
    98     *  these asserts are not part of a deployed application.
    99     *  @p
   100     *
   101     *  When a module has enabled the `ASSERT` category (which is enabled by
   102     *  default) in its diagnostics mask, the module executes all of its public
   103     *  assert statements. To enable internal asserts, you must enable both the
   104     *  `ASSERT` and `INTERNAL` categories.
   105     *
   106     *  The `ASSERT` and `INTERNAL` categories are not intended for use as log
   107     *  event categories. If an event is defined with either of these categories,
   108     *  you will receive a validation error during configuration.
   109     *
   110     *  The `STATUS` category is used for error and warning type events. The
   111     *  four event levels within the `STATUS` category have defined meanings,
   112     *  see {@link #EMERGENCY}
   113     *
   114     *  The `INFO` category is used for generic informational events. Any event
   115     *  which does not belong to a more specific category of events may simply
   116     *  be an `INFO` event.
   117     *
   118     *  The `ANALYSIS` category is used for events related to benchmarks and
   119     *  performance analysis.
   120     *
   121     *  The `USER1`-`6` categories are available to each module writer to use as
   122     *  he or she wishes.
   123     *
   124     *  The USER7 and USER8 categories are still defined, but their bits have been
   125     *  repurposed for the INFO and ANALYSIS categories, respectively, so the use
   126     *  of USER7 and USER8 has been deprecated.
   127     *
   128     *  @a(Examples)
   129     *  Configuration example: The following XDC configuration statements set
   130     *  a module's diagnostics mask in a configuration script. (In this case,
   131     *  the `Task` module of the `ti.sysbios.knl` package is used.) In this
   132     *  example, the `ENTRY` bit is turned on and the `EXIT` bit is turned off.
   133     *  Both bits are configured to be runtime modifiable.
   134     *
   135     *  @p(code)
   136     *  var Diags = xdc.useModule('xdc.runtime.Diags');
   137     *  var Task = xdc.useModule('ti.sysbios.knl.Task');
   138     *
   139     *  Task.common$.diags_ENTRY = Diags.RUNTIME_ON;
   140     *  Task.common$.diags_EXIT = Diags.RUNTIME_OFF;
   141     *  @p
   142     *
   143     *  @p(html)
   144     *  <hr />
   145     *  @p
   146     *
   147     *  Runtime example: The following C code shows how to disable and
   148     *  reenable `ENTER` diagnostics at runtime for the `ti.sysbios.knl.Task`
   149     *  module configured in the previous example. The first call to
   150     *  `{@link Diags#setMask Diag_setMask()}` enables entry diagnostics
   151     *  (`"+E"`) for just the `ti.sysbios.knl.Task` module; any call to any
   152     *  `Task` method in the application causes an "entry" `Log` event to be
   153     *  generated. The second call disables ("-E") the generation of these
   154     *  events. See `{@link #setMask Diags_setMask()}` for a complete
   155     *  description of the strings accepted by this function.
   156     *
   157     *  @p(code)
   158     *  #include <xdc/runtime/Diags.h>
   159     *  :
   160     *  Diags_setMask("ti.sysbios.knl.Task+E");
   161     *  :
   162     *  Diags_setMask("ti.sysbios.knl.Task-E");
   163     *  @p
   164     *
   165     *  @p(html)
   166     *  <hr />
   167     *  @p
   168     *
   169     *  Configuration example: The following XDC configuration statements
   170     *  turn on asserts in the entire program.
   171     *
   172     *  @p(code)
   173     *  var Diags = xdc.useModule('xdc.runtime.Diags');
   174     *  var Defaults = xdc.useModule('xdc.runtime.Defaults');
   175     *
   176     *  Defaults.diags_ASSERT = Diags.ALWAYS_ON;
   177     *  @p
   178     *
   179     *  @p(html)
   180     *  <hr />
   181     *  @p
   182     *
   183     *  Configuration example: Using the
   184     *  `{@link Diags#setMaskMeta Diags.setMaskMeta()}` function, the
   185     *  following XDC configuration statements turn on asserts in all
   186     *  of the modules whose name begins with "`ti.sysbios.`" In this case,
   187     *  no change to the application code is necessary to enable these
   188     *  events. It is important to note that, while the configuration
   189     *  step must be re-run and the application must be re-linked, no
   190     *  application sources need to be recompiled.
   191     *
   192     *  @p(code)
   193     *  var Diags = xdc.useModule('xdc.runtime.Diags');
   194     *  Diags.setMaskMeta("ti.sysbios.%", Diags.ASSERT, Diags.ALWAYS_ON);
   195     *  @p
   196     */
   197
   198    @CustomHeader
   199    @Template("./Diags.xdt")
   200    @DirectCall
   201
   202    module Diags {
   203
   204        /*!
   205         *  ======== Mode ========
   206         *  Diagnostics mask bit value used at configuration time.
   207         *
   208         *  At run-time a module's diagnostics mask is an ordinary data word
   209         *  with each bit value being 0 or 1 indicating whether or not the
   210         *  corresponding diagnostic is disabled or enabled.  At configuration
   211         *  time, however, each bit of the diagnostics mask can be
   212         *  placed in one of several `Mode`s; these modes determine its initial
   213         *  runtime value and whether or not the bit is modifiable at runtime.
   214         *
   215         *  When setting a module's diagnostics mask at configuration time,
   216         *  use one of the enumerated values of type `Mode`. These
   217         *  values will either set or clear a bit in the mask and also define
   218         *  if the bit can be changed at run-time. For example, using
   219         *  `ALWAYS_OFF` as the bit value means that bit cannot be set
   220         *  at run-time. This fact can be used by an optimizer to perform
   221         *  constant-folding and dead-code elimination.
   222         */
   223        metaonly enum Mode {
   224            ALWAYS_OFF,     //! permanently disabled
   225            ALWAYS_ON,      //! permanently enabled
   226            RUNTIME_OFF,    //! run-time settable, initially disabled
   227            RUNTIME_ON      //! run-time settable, initially enabled
   228        };
   229
   230        /*! Type used to specify bits in the diags mask. */
   231        typedef Types.DiagsMask Mask;
   232
   233        const Mask ENTRY        = 0x0001U;   //! Function entry
   234        const Mask EXIT         = 0x0002U;   //! Function exit
   235        const Mask LIFECYCLE    = 0x0004U;   //! Object life-cycle
   236        const Mask INTERNAL     = 0x0008U;   //! Internal diagnostics
   237
   238        const Mask ASSERT       = 0x0010U;   //! Assert checking
   239
   240        const Mask STATUS       = 0x0080U;   //! Warning or error event
   241
   242        /*! @_nodoc */
   243        const Mask LEVEL        = 0x0060U;   //! Mask to retrieve the level bits
   244
   245        const Mask USER1        = 0x0100U;   //! User defined diagnostics
   246        const Mask USER2        = 0x0200U;   //! User defined diagnostics
   247        const Mask USER3        = 0x0400U;   //! User defined diagnostics
   248        const Mask USER4        = 0x0800U;   //! User defined diagnostics
   249
   250        const Mask USER5        = 0x1000U;   //! User defined diagnostics
   251        const Mask USER6        = 0x2000U;   //! User defined diagnostics
   252        const Mask USER7        = 0x4000U;   //! Alias for informational event
   253        const Mask INFO         = USER7;     //! Informational event
   254        const Mask USER8        = 0x8000U;   //! Alias for analysis event
   255        const Mask ANALYSIS     = USER8;    //! Analysis (e.g., benchmark) event
   256
   257        /*!
   258         *  ======== ALL ========
   259         *  Mask of all diagnostics categories, including both logging and asserts
   260         */
   261        const Mask ALL          = 0xFF9FU;
   262
   263        /*!
   264         *  ======== ALL_LOGGING ========
   265         *  Mask of all logging diagnostic categories (does not include asserts)
   266         */
   267        const Mask ALL_LOGGING  = ALL & (~ASSERT) & (~INTERNAL);
   268
   269        /*!
   270         *  ======== EventLevel =========
   271         *  The level of an event.
   272         *
   273         *  The diagnostics bits each represent a different category of event,
   274         *  for example: an analysis event, a lifecycle event, or an informational
   275         *  event. Within each of these categories, events may have one of four
   276         *  levels to enable filtering based on the level of information desired.
   277         *
   278         *  The meaning of these levels and the distinction between them is left
   279         *  open to the user. Depending on the meaning given, different terminology
   280         *  may be used to describe them--they may be levels of detail, priority,
   281         *  severity, etc. The heirarchy of the events is set such that `LEVEL1` is
   282         *  the highest priority and `LEVEL4` is the lowest. That is, enabling
   283         *  `LEVEL4` events implies that events of all four levels will be logged.
   284         *  @p(dlist)
   285         *      - `LEVEL1`
   286         *        Least detail, highest priority, most severe, etc.
   287         *      - `LEVEL2`
   288         *      - `LEVEL3`
   289         *      - `LEVEL4`
   290         *        Most detail, lowest priority, least severe, etc.
   291         *  @p
   292         *  The `STATUS` bit is the only category where the levels are given
   293         *  explicit meaning to ensure consistency. Within the `STATUS` category,
   294         *  the meaning of the levels is defined by the constants `EMERGENCY`,
   295         *  `CRITICAL`, `ERROR`, and `WARNING`.
   296         *
   297         *  Events which don't define a level will receive `LEVEL1` by default.
   298         */
   299        enum EventLevel {
   300            LEVEL1 = 0x0,
   301            LEVEL2 = 0x20,
   302            LEVEL3 = 0x40,
   303            LEVEL4 = 0x60
   304        };
   305
   306        /*!
   307         *  ======== EMERGENCY ========
   308         *  A 'LEVEL1' 'STATUS' event is defined as 'EMERGENCY'
   309         *
   310         *  For STATUS events only, the meaning of the four EventLevels has been
   311         *  defined. These constants are simply aliases for the four event levels.
   312         *
   313         *  The highest three levels are different severities of an error event.
   314         *  For example, an EMERGENCY event may represent an unrecoverable system
   315         *  failure, a CRITICAL event may require notification of an operator,
   316         *  and an ERROR may be a recoverable error.
   317         *
   318         *  The lowest level is reserved for warnings, such as when a resource
   319         *  becomes dangerously low.
   320         */
   321        const EventLevel EMERGENCY = LEVEL1;
   322
   323        /*!
   324         *  ======== CRITICAL ========
   325         *  A 'LEVEL2' 'STATUS' event is defined as 'CRITICAL'
   326         *
   327         *  See '{@link #EMERGENCY}' for details.
   328         */
   329        const EventLevel CRITICAL = LEVEL2;
   330
   331        /*!
   332         *  ======== ERROR ========
   333         *  A 'LEVEL3' 'STATUS' event is defined as 'ERROR'
   334         *
   335         *  See '{@link #EMERGENCY}' for details.
   336         */
   337        const EventLevel ERROR = LEVEL3;
   338
   339        /*!
   340         *  ======== WARNING ========
   341         *  A 'LEVEL4' 'STATUS' event is defined as 'WARNING'
   342         *
   343         *  See '{@link #EMERGENCY}' for details.
   344         */
   345        const EventLevel WARNING = LEVEL4;
   346
   347        /*!
   348         *  ======== DiagsMaskView ========
   349         *  @_nodoc
   350         */
   351        metaonly struct DiagsMaskView {
   352            String Module;
   353            String logger;
   354            String USER1;
   355            String USER2;
   356            String USER3;
   357            String USER4;
   358            String USER5;
   359            String USER6;
   360            String INFO;
   361            String ANALYSIS;
   362            String STATUS;
   363            String ENTRY;
   364            String EXIT;
   365            String LIFECYCLE;
   366            String INTERNAL;
   367            String ASSERT;
   368        }
   369
   370        /*!
   371         *  ======== rovViewInfo ========
   372         *  @_nodoc
   373         */
   374        @Facet
   375        metaonly config xdc.rov.ViewInfo.Instance rovViewInfo =
   376            xdc.rov.ViewInfo.create({
   377                viewMap: [
   378                    ['DiagsMasks',
   379                        {
   380                            type: xdc.rov.ViewInfo.TREE_TABLE,
   381                            viewInitFxn: 'viewInitDiagsMasks',
   382                            structName: 'DiagsMaskView'
   383                        }
   384                    ]
   385                ]
   386            });
   387
   388        /*!
   389         *  ======== query ========
   390         *  Query the module's diagnostics mask against the given mask
   391         *
   392         *  Use this query function to test the state of a module's
   393         *  diagnostics mask at runtime. This function will perform a logical
   394         *  `AND` operation on the module's diagnostics mask and the given mask.
   395         *  If any bits survive the operation, the function returns `true`.
   396         *
   397         *  @p(code)
   398         *  result = moduleMask & givenMask ? true : false;
   399         *  @p
   400         *
   401         *  This query function has a compile-time binding to the module's
   402         *  diagnostics mask. If the query function is part of the C code
   403         *  implementation of a module, then it will use that module's
   404         *  diagnostics mask. Otherwise, it will use the diagnostics mask
   405         *  of the `{@link Main xdc.runtime.Main}` module.
   406         *
   407         *  The implementation of the diagnostics mask and the query function
   408         *  is such that an optimizer can take advantage of dead code elimination
   409         *  and/or constant folding to eliminate or reduce code size. For example,
   410         *  if the query function is used in a conditional test, and the given
   411         *  mask contains only bits which have been configured to be permanently
   412         *  off, then the code for the entire conditional statement can be removed
   413         *  at link time. If the bits in the given mask have been configured to be
   414         *  permanently on, then the conditional code can be removed leaving the
   415         *  body of the conditional as direct in-line code.
   416         *
   417         *  @param(mask) mask of diagnostics bits to test
   418         *
   419         *  This given mask is constructed by `OR`'ing together
   420         *  the desired bits of the diagnostics mask using the constants listed
   421         *  in the {@link #ALL Mask Summary} above. The module's diagnostics
   422         *  mask will be logically `AND`'ed with the given mask, and return `true`
   423         *  if the result is non-zero and `false` otherwise.
   424         *
   425         *  @p(code)
   426         *      if (Diags_query(Diags_USER1 | Diags_USER4)) {
   427         *          :
   428         *      }
   429         *  @p
   430         *
   431         *  @a(Examples)
   432         *  In the following example, the `{@link #USER1 USER1}` bit of the
   433         *  module's diagnostics mask has been configured to be permanently off,
   434         *  thus the entire conditional code block can be removed at link time.
   435         *  Note, the C code below is part of the module itself.
   436         *
   437         *  Configuration Script
   438         *  @p(code)
   439         *  var Diags = xdc.useModule('xdc.runtime.Diags');
   440         *  var ModA = xdc.useModule('my.package.ModuleA');
   441         *  ModA.common$.diags_USER1 = Diags.ALWAYS_OFF;
   442         *  @p
   443         *
   444         *  C Code, ModA.c
   445         *  @p(code)
   446         *  if (Diags_query(Diags_USER1)) {         // this code removed
   447         *      ...additional code here...          // this code removed
   448         *  }                                       // this code removed
   449         *  @p
   450         *
   451         *  @p(html)
   452         *  <hr />
   453         *  @p
   454         *
   455         *  In the following example, the `{@link #USER1 USER1}` bit of the
   456         *  module's diagnostics mask has been configured to be permanently on,
   457         *  thus the conditional code can be removed leaving the code contained
   458         *  within the conditional statement. Note, the C code below is part of
   459         *  the module itself.
   460         *
   461         *  Configuration Script
   462         *  @p(code)
   463         *  var Diags = xdc.useModule('xdc.runtime.Diags');
   464         *  var ModA = xdc.useModule('my.package.ModuleA');
   465         *  ModA.common$.diags_USER1 = Diags.ALWAYS_ON;
   466         *  @p
   467         *
   468         *  C Code, ModA.c
   469         *  @p(code)
   470         *  if (Diags_query(Diags_USER1) {          // this code removed
   471         *      ...additional code here...          // this code remains
   472         *  }                                       // this code removed
   473         *  @p
   474         *
   475         */
   476        @Macro Bool query(Mask mask);
   477
   478        /*!
   479         *  ======== getLevel ========
   480         *  Get the event level set in the given mask
   481         *
   482         *  See '{@link #EventLevel}' for a description of event levels.
   483         *
   484         *  @param(mask) mask of diagnostics bits to read filter level from.
   485         */
   486        @Macro EventLevel getLevel(Mask mask);
   487
   488        /*!
   489         *  ========= compareLevels ========
   490         *  Returns false if levelA is lower than levelB
   491         *
   492         *  This API is intended to be used to determine if a given event
   493         *  passes a filtering threshold and should be logged. Conceptually (though
   494         *  not necessarily in implementation), this API is equivalent to the
   495         *  expression (levelA < levelB). The values of the EventLevels have
   496         *  internal meaning, so a direct comparison of two levels should not done;
   497         *  this API must be used to correctly compare them.
   498         *
   499         *  LEVEL1 is the highest level and LEVEL4 is the lowest. So LEVEL4 is
   500         *  less than LEVEL3, which is less than LEVEL2, which is less than LEVEL1.
   501         */
   502        @Macro Bool compareLevels(EventLevel levelA, EventLevel levelB);
   503
   504        /*!
   505         *  ======== setMask ========
   506         *  Set a module's diagnostics mask at runtime
   507         *
   508         *  Use the given control string to set or clear bits in a module's
   509         *  diagnostics mask. The control string defines one or more actions
   510         *  where each action modifies the diagnostics mask in one or more
   511         *  modules. Each action can either set, clear, or assign a module's
   512         *  diagnostics mask. To both set and clear bits in the same diagnostics
   513         *  mask requires two actions, or you can assign the entire mask
   514         *  explicitly in one action. Each action can specify a given module or
   515         *  a set of modules using name prefix matching.
   516         *
   517         *  @a(Warning)
   518         *
   519         *  Each bit of a module's diagnostics mask that is to be modified at
   520         *  runtime, must be configured to be runtime modifiable in the
   521         *  program's configuration script. Use either `{@link #Mode RUNTIME_OFF}`
   522         *  or `{@link #Mode RUNTIME_ON}` as the configuration value for the
   523         *  desired bit in the diagnostics mask. Also, the following configuration
   524         *  parameters must have the values indicated (which are their default
   525         *  values):
   526         *
   527         *  @p(blist)
   528         *  - `{@link IModule#common$ <module>.common$.namedModule} = true;`
   529         *  - `{@link Text#isLoaded} = true;`
   530         *  @p
   531         *
   532         *  Note: any error that occurs during the parsing of the control string
   533         *  causes `Diags_setMask()` to return without processing the remainder
   534         *  of the control string.
   535         *
   536         *  @param(control) diagnostic mask control string
   537         *
   538         *  This control string defines one or more actions
   539         *  where each action consists of a module name, an operator character,
   540         *  and a list of bit specifiers. Use the `%` character as a wildcard
   541         *  to turn the module name into a prefix matching pattern for a set
   542         *  of modules. Multiple actions are separated with the `;` character.
   543         *
   544         *  @p
   545         *  The control string has the following format:
   546         *
   547         *  @p(code)
   548         *  <module[%]><op><bits>[;<module[%]><op><bits>]
   549         *  @p
   550         *
   551         *  Specify individual module names explicitly (e.g.
   552         *  `ti.sysbios.knl.Task`), or match multiple modules using a prefix
   553         *  matching pattern specified with the `%` character (e.g.
   554         *  `ti.sysbios.knl.%`).
   555         *
   556         *  @p
   557         *  The operator is specified with a single character from the following
   558         *  table.
   559         *
   560         *  @p(code)
   561         *  Operator    Description
   562         *  --------------------------------------------------
   563         *  +           Set only the specified bits (other bits preserved)
   564         *  -           Clear only the specified bits (other bits preserved)
   565         *  =           Assign the entire mask to the given value where the
   566         *              specified bits are set and all other bits are cleared
   567         *  @p
   568         *
   569         *  The bits are specified with a list of characters from the following
   570         *  table. Refer to the {@link #ALL Mask Summary} for a list of each
   571         *  bit of the diagnostics mask.
   572         *
   573         *  @p(code)
   574         *  Control     Diagnostics
   575         *  Character   Constant        Description
   576         *  --------------------------------------------------
   577         *  E           ENTRY           Function entry
   578         *  X           EXIT            Function exit
   579         *  L           LIFECYCLE       Object life-cycle
   580         *  I           INTERNAL        Internal diagnostics
   581         *  A           ASSERT          Assert checking
   582         *  Z           ANALYSIS        Analysis event
   583         *  F           INFO            Informational event
   584         *  S           STATUS          Status (error, warning) event
   585         *  1           USER1           User defined diagnostics
   586         *  2           USER2           User defined diagnostics
   587         *  3           USER3           User defined diagnostics
   588         *  4           USER4           User defined diagnostics
   589         *  5           USER5           User defined diagnostics
   590         *  6           USER6           User defined diagnostics
   591         *  7           USER7           User defined diagnostics
   592         *  8           USER8           User defined diagnostics
   593         *  @p
   594         *
   595         *  @a(Examples)
   596         *  The following example demonstrates how to set a module's diagnostics
   597         *  mask (the `Task` module in this case) at runtime. In this example, the
   598         *  `{@link #USER1 USER1}` bit is turned on. Note that the module's
   599         *  `{@link #USER1 USER1}` diagnostics bit must be configured to be runtime
   600         *  modifiable. In this instance, the bit is initialized to off.
   601         *
   602         *  Configuration Script
   603         *  @p(code)
   604         *  var Diags = xdc.useModule('xdc.runtime.Diags');
   605         *  var Task = xdc.useModule('ti.sysbios.knl.Task');
   606         *  Task.common$.diags_USER1 = Diags.RUNTIME_OFF;
   607         *  @p
   608         *
   609         *  C Code
   610         *  @p(code)
   611         *  Diags_setMask("ti.sysbios.knl.Task+1");
   612         *  @p
   613         *
   614         *  @p(html)
   615         *  <hr />
   616         *  @p
   617         *
   618         *  The following example demonstrates the use of the `%` wildcard
   619         *  character to set the `{@link #USER1 USER1}` bit at runtime for
   620         *  all modules in the `ti.sysbios.knl` package. The meta-only
   621         *  `{@link #setMaskMeta Diags.setMaskMeta}` function is used to configure
   622         *  the `{@link #USER1 USER1}` bit to be runtime modifiable. The `setMask`
   623         *  function is used to actually set the `{@link #USER1 USER1}` bit at
   624         *  runtime in all the `ti.sysbios.knl` modules.
   625         *  Note the use of the `%` character in both functions to match all the
   626         *  module names within the given package.
   627         *
   628         *  Configuration Script
   629         *  @p(code)
   630         *  var Diags = xdc.useModule('xdc.runtime.Diags');
   631         *  Diags.setMaskMeta("ti.sysbios.knl.%", Diags.USER1, Diags.RUNTIME_OFF);
   632         *  @p
   633         *
   634         *  C Code
   635         *  @p(code)
   636         *  Diags_setMask("ti.sysbios.knl.%+1");
   637         *  @p
   638         *
   639         *  @p(html)
   640         *  <hr />
   641         *  @p
   642         *
   643         *  In the following example, the `{@link #ENTRY ENTRY}`,
   644         *  `{@link #EXIT EXIT}` and `{@link #LIFECYCLE LIFECYCLE}` trace is
   645         *  enabled for all modules in the `ti.sysbios.knl` package but is
   646         *  initially off; i.e., no events will occur until explicitly turned
   647         *  on at runtime.
   648         *
   649         *  At runtime the call to `Diags_setMask` turns on
   650         *  `{@link #ENTRY ENTRY}` and `{@link #EXIT EXIT}` trace and turns off
   651         *  `{@link #LIFECYCLE LIFECYCLE}` trace for all modules in
   652         *  the application for which trace has been enabled during
   653         *  configuration.  In this case, the only modules that can generate
   654         *  events are those in the `ti.sysbios.knl` package.
   655         *
   656         *  Configuration Script
   657         *  @p(code)
   658         *  var Diags = xdc.useModule('xdc.runtime.Diags');
   659         *  Diags.setMaskMeta("ti.sysbios.knl.%",
   660         *      Diags.ENTRY | Diags.EXIT | Diags.LIFECYCLE, Diags.RUNTIME_OFF);
   661         *  @p
   662         *
   663         *  C Code
   664         *  @p(code)
   665         *  Diags_setMask("%+EX;%-L");
   666         *  @p
   667         */
   668        Void setMask(CString control);
   669
   670        /*!
   671         *  ======== setMaskMeta ========
   672         *  Set the module's diagnostics mask at config time
   673         *
   674         *  @param(pattern) module prefix or regular expression
   675         *
   676         *  The `pattern` is used to match a module's name. If `pattern` is
   677         *  specified as a string, then name prefix matching is used. The
   678         *  pattern may also be a regular expression.  Only the masks of the
   679         *  modules matching `pattern` are set.
   680         *
   681         *  @param(mask) diagnostic fields to modify
   682         *
   683         *  The `mask` is used to determine which fields in the diags mask are
   684         *  modified. Each field specified in the mask is set to the given
   685         *  `mode` value.
   686         *
   687         *  @param(mode) mode to assign to the specified `mask` fields
   688         */
   689        metaonly Void setMaskMeta(Any pattern, Mask mask, Mode mode);
   690
   691    internal:
   692
   693        /*!
   694         *  ======== setMaskEnabled ========
   695         *  Controls the ability to set the diags mask at run-time
   696         *
   697         *  This configuration parameter allows whole program optimizers to reduce
   698         *  the code size. The default is `false`, which means the diags mask will
   699         *  not be modified at run-time and thus the code is not needed.
   700         *
   701         *  For now, this should be internal because its value is determined
   702         *  automatically, rather than through user's input. See CQ19111 for more
   703         *  details.
   704         */
   705        config Bool setMaskEnabled = false;
   706
   707        /*
   708         *  ======== dictBase ========
   709         *  Array of module-id:diags-mask pairs in which each module is named
   710         *
   711         *  This array, generated by Diags.xdt, is terminated by an element
   712         *  with modId == 0.
   713         */
   714        config DictElem *dictBase = null;
   715
   716        struct DictElem {
   717            Types.ModuleId  modId;      /* statically computed module id */
   718            Mask           *maskAddr;   /* module's diags mask address */
   719        };
   720    }
   721    /*
   722     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   723     */
   724


module xdc.runtime.Error

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Error.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== Error ========
    19     *  Runtime error manager
    20     *
    21     *  The `Error` module provides mechanisms for raising, checking, and
    22     *  handling errors in a program. At the configuration time, you can use the
    23     *  parameters `{@link Error#policy Error.policy}`,
    24     *  `{@link Error#policyFxn Error.policyFxn}` and
    25     *  `{@link Error#raiseHook Error.raiseHook}` to specify what happens when an
    26     *  error takes place. You can control how much debugging information is
    27     *  available in that case, while also controlling the memory footprint that the
    28     *  `Error' module adds to the program.
    29     *
    30     *  Module producers use this module to define specific error types and
    31     *  reference these when raising an error. Each error type has a custom error
    32     *  message and can be parameterized with up to `{@link #NUMARGS}` arguments. A
    33     *  generic error type is provided for raising errors when not in a module.
    34     *
    35     *  Use the `{@link #check Error_check()}` function in your application or
    36     *  module to determine if an error has been raised in a function that takes an
    37     *  `{@link #Block Error_Block}` as an argument. It is important to understand
    38     *  that it is the caller's responsibility to check the error block after
    39     *  calling such a function. Otherwise, a raised error may go undetected, which
    40     *  could compromise the integrity of the system. For example:
    41     *
    42     *  @p(code)
    43     *  Task_create(..., &eb);
    44     *
    45     *  if (Error_check(&eb)) {
    46     *      ...an error has been raised...
    47     *  }
    48     *  @p
    49     *
    50     *  The function assigned to the parameter
    51     *  `{@link Error#policyFxn Error.policyFxn}` is the central part of the
    52     *  error handling mechanism in this module. Most of the users will either leave
    53     *  this parameter at its default value, or select one of the alternative
    54     *  implementations that are included with the `Error` module. However, this
    55     *  configuration parameter also allows users to completely take over the error
    56     *  handling by setting this parameter to their own implementation. In that
    57     *  case, we recommend that users first review the included implementations,
    58     *  and base their implementation on one of these function. The included
    59     *  implementations are `{@link #policyDefault}`, `{@link #policyMin}`, and
    60     *  `{@link #policySpin}`.
    61     *
    62     *  The `{@link #raiseHook Error.raiseHook}` configuration parameter allows
    63     *  a configured function to be invoked when an error is raised.
    64     *  This function is invoked from the default implementation of
    65     *  `{@link Error#policyFxn Error.policyFxn}`. Therefore, if a different
    66     *  implementation of `Error.policyFxn` is used, the function specified by
    67     *  `Error.raiseHook` may or may not be called.
    68     *  This function is passed a pointer to the error's error block and makes it
    69     *  easy to manage all errors from a common point. For example, you can
    70     *  trap any error (fatal or not) by simply setting a breakpoint in this
    71     *  function. You can use the following functions to extract information
    72     *  from an error block.
    73     *
    74     *  @p(blist)
    75     *  - `{@link #getData Error_getData()}`
    76     *  - `{@link #getCode Error_getCode()}`
    77     *  - `{@link #getId Error_getId()}`
    78     *  - `{@link #getMsg Error_getMsg()}`
    79     *  - `{@link #getSite Error_getSite()}`
    80     *  @p
    81     *
    82     *  The Error module provides facilities for handling errors, but the Log
    83     *  module also provides features for logging error events. These are separate
    84     *  concepts; however, to ensure that users do not have to both raise and log
    85     *  an error, the Error module will automatically log an error event when one
    86     *  is raised. The Error module logs the standard {@link Log#L_error} event,
    87     *  passing it the error message and arguments.
    88     *
    89     *  The error event is logged to the Error module's logger using the Error
    90     *  module's diags mask. Logging of errors is enabled by default in the diags
    91     *  mask, but the event will not be logged unless a logger is configured for
    92     *  the Error module as well.
    93     *
    94     *  To make the error event appear as though it is coming from the module which
    95     *  called Error_raise, the event is logged with the caller's module id and
    96     *  with the caller's call site information.
    97     *
    98     *  @a(Examples)
    99     *  Example 1: The following example shows how a module, named ModA,
   100     *  defines a custom error type and shows how this error is raised by
   101     *  the module. The module defines an `Id` of `E_notEven` in its module
   102     *  specification file (in this case, `ModA.xdc`). The error's message
   103     *  string takes only one argument. The module also defines a `mayFail()`
   104     *  function that takes an error block. In the module's C source file,
   105     *  the function checks for the error condition and raises the error if
   106     *  needed.
   107     *
   108     *  This is part of ModA's XDC specification file for the module:
   109     *
   110     *  @p(code)
   111     *  config xdc.runtime.Error.Id E_notEven = {
   112     *      msg: "expected an even number (%d)"
   113     *  };
   114     *
   115     *  Void mayFail(Int x, xdc.runtime.Error.Block *eb);
   116     *  @p
   117     *
   118     *  This is part of the C code for the module:
   119     *
   120     *  @p(code)
   121     *  Void ModA_mayFail(Int x, Error_Block *eb)
   122     *  {
   123     *      if ((x % 2) != 0) {
   124     *          Error_raise(eb, ModA_E_notEven, x, 0);
   125     *          ...add error handling code here...
   126     *          return;
   127     *      }
   128     *      ...
   129     *  }
   130     *  @p
   131     *
   132     *  @p(html)
   133     *  <hr />
   134     *  @p
   135     *
   136     *  Example 2: The following C code supplies an error block to a function
   137     *  that requires one and tests the error block to see if the function
   138     *  raised an error. Note that an error block must be initialized before
   139     *  it can be used and same error block may be passed to several functions.
   140     *
   141     *  @p(code)
   142     *  #include <xdc/runtime/Error.h>
   143     *  #include <ti/sysbios/knl/Task.h>
   144     *  Error_Block eb;
   145     *  Task_Handle tsk;
   146     *
   147     *  Error_init(&eb);
   148     *  tsk = Task_create(..., &eb);
   149     *
   150     *  if (Error_check(&eb)) {
   151     *      ...an error has been raised...
   152     *  }
   153     *  @p
   154     *
   155     *  @p(html)
   156     *  <hr />
   157     *  @p
   158     *
   159     *  Example 3: The following C code shows that you may pass a special constant
   160     *  `Error_ABORT` in place of an error block to a function requiring an error
   161     *  block. In this case, if the function raises an error, the program is aborted
   162     *  (via `{@link System#abort xdc_runtime_System_abort()}`), thus execution
   163     *  control will never return to the caller.
   164     *
   165     *  @p(code)
   166     *  #include <xdc/runtime/Error.h>
   167     *  #include <ti/sysbios/knl/Task.h>
   168     *
   169     *  tsk = Task_create(..., Error_ABORT);
   170     *  ...will never get here if an error was raised in Task_create...
   171     *  @p
   172     *
   173     *  @p(html)
   174     *  <hr />
   175     *  @p
   176     *
   177     *  Example 4: The following C code shows that you may pass a special constant
   178     *  `Error_IGNORE` in place of an error block to a function requiring an error
   179     *  block. The purpose of this constant is to avoid allocating an error block on
   180     *  stack in the use case where the caller is not checking the error block after
   181     *  the call returns.
   182     *  In this example, the caller only checks the returned value but not the error
   183     *  block. If the function raises an error, the program will return to the
   184     *  caller, assuming `Error_policy` is set to `{@link #Policy UNWIND}`.
   185     *
   186     *  @p(code)
   187     *  #include <xdc/runtime/Error.h>
   188     *  #include <ti/sysbios/knl/Task.h>
   189     *
   190     *  tsk = Task_create(..., Error_IGNORE);
   191     *  if (tsk != NULL) {
   192     *      ...
   193     *  }
   194     *  @p
   195     *
   196     *  @p(html)
   197     *  <hr />
   198     *  @p
   199     *
   200     *  Example 5: The following C code shows how to write a function that
   201     *  is not part of a module and that takes an error block and raises
   202     *  the generic error type provided by the Error module. Note, if the
   203     *  caller passes `Error_ABORT` for the error block or if the error policy is
   204     *  `{@link #Policy TERMINATE}`, then the call to
   205     *  `{@link #raise Error_raise()}` will call
   206     *  `{@link System#abort xdc_runtime_System_abort()}` and never return.
   207     *
   208     *  @p(code)
   209     *  #include <xdc/runtime/Error.h>
   210     *
   211     *  Void myFunc(..., Error_Block *eb)
   212     *  {
   213     *      ...
   214     *
   215     *      if (...error condition detected...) {
   216     *          String  myErrorMsg = "my custom error message";
   217     *          Error_raise(eb, Error_E_generic, myErrorMsg, 0);
   218     *          ...add error handling code here...
   219     *          return;
   220     *      }
   221     *  }
   222     *  @p
   223     */
   224    @DirectCall
   225    @Template("./Error.xdt")
   226
   227    module Error {
   228
   229        /*!
   230         *  ======== Policy ========
   231         *  Error handling policies
   232         *
   233         *  These constants are assigned to `{@link Error#policy Error.policy}` to
   234         *  control the flow of the program when an error is raised.
   235         *
   236         *  @field(TERMINATE) All raised errors are fatal. A call to
   237         *  `{@link #raise Error_raise}` will never return to the caller. The
   238         *  program calls `System_abort` instead.
   239         *
   240         *  @field(UNWIND) Errors are returned to the caller. A call to
   241         *  `{@link #raise Error_raise}` will return back to the caller.
   242         */
   243        enum Policy {
   244            TERMINATE,
   245            UNWIND
   246        };
   247
   248        /*!
   249         *  ======== Desc ========
   250         *  Error descriptor
   251         *
   252         *  Each type of error is defined with an error descriptor. This
   253         *  structure groups common information about the errors of this type.
   254         *
   255         *  @field(msg) The error message using a `printf` style format string,
   256         *              but limited to `{@link #NUMARGS}` arguments.
   257         *              This format string together with the two arguments passed
   258         *              to `Error_raise`` are used to create a human readable
   259         *              error message.
   260         *
   261         *  @field(code) A user assignable code, 0 by default. The user may
   262         *              optionally set this field during config to give the
   263         *              error a well-known numeric code.
   264         */
   265        metaonly struct Desc {
   266            String msg;
   267            UInt16 code;
   268        };
   269
   270        /*!
   271         *  ======== Id ========
   272         *  Error identifier
   273         *
   274         *  Each type of error raised is defined with a metaonly
   275         *  `{@link Error#Desc}`.  An `Error_Id` is a 32-bit target value that
   276         *  encodes the information in the `Desc`.  Target programs use
   277         *  `Error_Id` values to "raise" and check for specific errors.
   278         *
   279         *  @a(Warning) `{@link #Id}` values may vary among different
   280         *  configurations of an application.  For example, the addition of a
   281         *  new module to a program may result in a different absolute value for
   282         *  `{@link #E_generic}`.  If you need error numbers that remain
   283         *  invariant, use the user definable `{@link #Desc Desc.code}` field.
   284         */
   285        @Encoded typedef Desc Id;
   286
   287        /*!
   288         *  ======== HookFxn ========
   289         *  Function called whenever an error is raised
   290         *
   291         *  The first parameter and only parameter passed to this function is a
   292         *  pointer to an `Error_Block`.  Even if the client passes a `NULL` error
   293         *  block pointer to `{@link #raise Error_raise}`, this parameter passed
   294         *  to this "hook" function is always `non-NULL`.
   295         */
   296        typedef Void (*HookFxn)(Block *);
   297
   298        /*!
   299         *  ======== NUMARGS ========
   300         *  Maximum number of arguments supported by an error
   301         */
   302        const Int NUMARGS = 2;
   303
   304        /*!
   305         *  ======== Data ========
   306         *  Error args
   307         *
   308         *  The two arguments (arg1, arg2) passed to `{@link #raise}` are
   309         *  stored in one of these arrays within the associated Error_Block.
   310         *  To access these arguments use `{@link #getData}` to obtain a
   311         *  pointer to the Error_Block's Data array.
   312         *
   313         *  @see #getData
   314         */
   315        struct Data {
   316            IArg arg[NUMARGS];
   317        }
   318
   319        /*!
   320         *  ======== Block ========
   321         *  Error block
   322         *
   323         *  An opaque structure used to store information about errors once raised.
   324         *  This structure must be initialized via `{@link #init Error_init()}`
   325         *  before being used for the first time.
   326         */
   327        @Opaque struct Block {
   328            UInt16      unused;     /* for backward compatibility (was code) */
   329            Data        data;       /* arguments passed to raise() */
   330            Id          id;         /* id passed to raise() */
   331            CString     msg;        /* msg associated with id */
   332            Types.Site  site;       /* info about Error_raise call site */
   333        };
   334
   335        /*!
   336         *  ======== IGNORE ========
   337         *  A pointer to a special Error_Block used when the caller does not want to
   338         *  check Error_Block
   339         *
   340         *  This constant should be used when the caller does not plan to check
   341         *  `Error_Block` after the call returns, but wants the call to return even
   342         *  in the case when an error is raised. `{@link #policy Error_policy}` is
   343         *  still in effect and the application will still terminate when an error
   344         *  is raised if `Error_policy` is not set to
   345         *  `{@link #Policy Error_UNWIND}`.
   346         */
   347        const Block IGNORE;
   348
   349        /*!
   350         *  ======== ABORT ========
   351         *  A special Error_Block pointer that terminates the application in case of
   352         *  an error
   353         *
   354         *  This constant has the same effect as passing `NULL` in place of an
   355         *  `Error_Block`. If an error is raised when `Error_ABORT` is passed, the
   356         *  application terminates regardless of `{@link #policy Error_policy}`.
   357         */
   358        const Block ABORT;
   359
   360        /*!
   361         *  ======== PolicyFxn ========
   362         *  Error policy function signature
   363         *
   364         *  @a(Parameters)
   365         *  A policy function is passed the following parameters:
   366         *  @p(dlist)
   367         *      - `eb`
   368         *        A pointer to an `{@link #Block Error_Block}` structure to be
   369         *        initialized using the subsequent arguments.  This pointer may
   370         *        be `NULL`.
   371         *      - `modId`
   372         *        The module ID of the module calling
   373         *        `{@link #raise Error_raise()}`
   374         *      - `fileName`
   375         *        A string naming the source file which made the call to
   376         *        `{@link #raise Error_raise()}`
   377         *      - `lineNumber`
   378         *        An integer line number within the file named above where
   379         *        the call `{@link #raise Error_raise()}` occured
   380         *      - `errId`
   381         *        The `{@link #Id Error_Id}` of the error being raised
   382         *      - `arg1` and `arg2`
   383         *        Two `IArg` arguments associated with the error being raised
   384         *  @p
   385         */
   386        typedef Void (*PolicyFxn)(Block *, Types.ModuleId, CString, Int, Id,
   387                                  IArg, IArg);
   388
   389        /*!
   390         *  ======== policyFxn ========
   391         *  Error handler function
   392         *
   393         *  This function is called to handle all raised errors but, unlike
   394         *  `{@link raiseHook}`, this function is responsible for completely
   395         *  handling the error (including calling `{@link #raiseHook raiseHook}`
   396         *  with an appropriately initialized `{@link #Block Error_Block}`, if
   397         *  `raiseHook` functionality is required).
   398         *
   399         *  The default value is a function which, in addition to calling
   400         *  `raiseHook` with an initialized `Error_Block` structure, logs the
   401         *  error using this module's logger.
   402         *
   403         *  Alternately, `{@link #policySpin}`, which simply loops
   404         *  indefinitely, can be used to minimize target footprint.  Note, this
   405         *  function does NOT call `raiseHook`, and also ignores
   406         *  `{@link Error#policy Error.policy}`.
   407         *
   408         *  The third implementation, `{@link #policyMin}` finds a middle ground
   409         *  between the two implementations above in terms of memory footprint and
   410         *  the available error information. Only the `{@link #Id Error_Id}` of the
   411         *  error being raised is available in the resulting `Error_Block`,
   412         *  `raiseHook` is not invoked, but `{@link Error#policy Error.policy}` is
   413         *  observed.
   414         */
   415        config PolicyFxn policyFxn = Error.policyDefault;
   416
   417        /*!
   418         *  ======== E_generic ========
   419         *  Generic error
   420         *
   421         *  This error takes advantage of the $S specifier to allow for recursive
   422         *  formatting of the error message passed to error raise.
   423         *
   424         *  For example, the following is possible:
   425         *  @p(code)
   426         *  Error_raise(eb, Error_E_generic, "Error occurred, code: %d", code);
   427         *  @p
   428         *
   429         *  @see System#extendedFormats
   430         *  @see System#printf
   431         */
   432        config Id E_generic = {msg: "%$S"};
   433
   434        /*!
   435         *  ======== E_memory ========
   436         *  Out of memory error
   437         *
   438         *  The first parameter must be the heap instance handle. The second
   439         *  parameter is the size of the object for which the allocation failed.
   440         */
   441        config Id E_memory = {msg: "out of memory: heap=0x%x, size=%u"};
   442
   443        /*!
   444         *  ======== E_msgCode ========
   445         *  Generic error that displays a string and a numeric value
   446         */
   447        config Id E_msgCode = {msg: "%s 0x%x"};
   448
   449        /*!
   450         *  ======== policy ========
   451         *  System-wide error handling policy
   452         *
   453         *  You can use this parameter to decide at the configuration time what
   454         *  happens when an error is raised. The program can either call
   455         *  `System_abort()` or return back to the caller. The implementations of
   456         *  `{@link Error#policyFxn Error.policyFxn}` should consider this
   457         *  parameter, but some implementations may not do so to save the memory
   458         *  footprint (`Error_policySpin`, for example).
   459         *
   460         */
   461        config Policy policy = UNWIND;
   462
   463        /*!
   464         *  ======== raiseHook ========
   465         *  The function to call whenever an error is raised
   466         *
   467         *  If set to a non-`null` value, the referenced function is always
   468         *  called when an error is raised, even if the `Error` policy is
   469         *  `{@link #Policy TERMINATE}`.  In rare cases, it is possible that a
   470         *  raised error does not trigger a call to `raiseHook`; see
   471         *  `{@link #maxDepth}`.
   472         *
   473         *  Regardless of the current policy in use, raising an error by
   474         *  calling `{@link #raise Error_raise}` will always invoke the
   475         *  error raise hook function assigned to the
   476         *  `{@link #raiseHook Error.raiseHook}` configuration parameter, if the
   477         *  default `{@link Error#policyFxn Error.policyFxn}` implementation is
   478         *  used.
   479         *
   480         *
   481         *  By default, this function is set to `{@link #print Error_print}`
   482         *  which causes the error to be formatted and output via
   483         *  `{@link xdc.runtime.System#aprintf System_printf}`.  Setting this
   484         *  configuration parameter to `null` indicates that no function hook
   485         *  should be called.
   486         *
   487         *  @see #maxDepth
   488         *  @see #HookFxn
   489         *  @see #print
   490         */
   491        config HookFxn raiseHook = Error.print;
   492
   493        /*!
   494         *  ======== maxDepth ========
   495         *  Maximum number of concurrent calls to `{@link #raiseHook}`
   496         *
   497         *  To prevent errors that occur in the raiseHook function from
   498         *  causing an infinite recursion, the maximum number of concurrent
   499         *  calls to `{@link #raiseHook}` is limited by `Error_maxDepth`.  If
   500         *  the number of concurrent calls exceeds `Error_maxDepth`, the
   501         *  `raiseHook` function is not called.
   502         *
   503         *  In multi-threaded systems, errors raised by separate threads may
   504         *  be detected as recursive calls to `raiseHook`.  So, setting
   505         *  `Error.maxDepth` to a small value may - in rare instances - result in
   506         *  `errorHook` not being called for some raised errors.
   507         *
   508         *  If it is important that all raised errors trigger a call to the
   509         *  `raiseHook` function, set `Error.maxDepth` to an impossibly large
   510         *  number (0xffff) and either ensure that the raise hook never calls a
   511         *  function that can raise an error or add checks in `raiseHook` to
   512         *  protect against "double faults".
   513         */
   514        config UInt16 maxDepth = 16;
   515
   516        /*!
   517         *  ======== check ========
   518         *  Return TRUE if an error was raised
   519         *
   520         *  @param(eb) pointer to an `Error_Block`, `Error_ABORT` or `Error_IGNORE`
   521         *
   522         *  @a(returns)
   523         *  If `eb` is non-`NULL` and `{@link #policy Error.policy} == UNWIND` and
   524         *  an error was raised on `eb`, this function returns `TRUE`.  Otherwise,
   525         *  it returns `FALSE`.
   526         */
   527        Bool check(Block *eb);
   528
   529        /*!
   530         *  ======== getData ========
   531         *  Get an error's argument list
   532         *
   533         *  @param(eb)      non-`NULL` pointer to an `Error_Block`
   534         *
   535         *  @a(returns)
   536         *  `getData` returns an array of type `{@link #Data}` with
   537         *  `{@link #NUMARGS}` elements containing the arguments provided
   538         *  at the time the error was raised.
   539         *
   540         *  @see #raise
   541         */
   542        Data *getData(Block *eb);
   543
   544        /*!
   545         *  ======== getCode ========
   546         *  Get an error's code
   547         *
   548         *  @param(eb) non-`NULL` pointer to an `Error_Block`
   549         *
   550         *  @a(returns)
   551         *  `getCode` returns the error code associated with this error block.
   552         *
   553         *  @see #raise
   554         *  @see #Desc
   555         */
   556        UInt16 getCode(Block *eb);
   557
   558        /*!
   559         *  ======== getId ========
   560         *  Get an error's id
   561         *
   562         *  @param(eb) non-`NULL` pointer to an `Error_Block`
   563         *
   564         *  @a(Warning)
   565         *  `Error_Id` values may vary among different configurations
   566         *  of an application.  For example, the addition of a new module to a
   567         *  program may result in a different absolute value for
   568         *  `{@link #E_generic}`.  If you need error numbers that remain
   569         *  invariant, use the user definable `{@link #Desc Desc.code}` field.
   570         *
   571         *  @see #raise
   572         *  @see #Desc
   573         */
   574        Id getId(Block *eb);
   575
   576        /*!
   577         *  ======== getMsg ========
   578         *  Get an error's "printf" format string
   579         *
   580         *  @param(eb) non-`NULL` pointer to an `Error_Block`
   581         *
   582         *  @see #raise
   583         *  @see #Desc
   584         */
   585        CString getMsg(Block *eb);
   586
   587        /*!
   588         *  ======== getSite ========
   589         *  Get an error's call site info
   590         *
   591         *  @param(eb) non-`NULL` pointer to an `Error_Block`
   592         *
   593         *  @a(returns)
   594         *  `getSite` returns a pointer to an initialized
   595         *  `{@link Types#Site Types.Site}` structure.  However, in the
   596         *  event that the call site was compiled with `xdc_FILE` defined to
   597         *  be `NULL` (to minimize string space overhead) the `file`
   598         *  field may be set to `NULL`.
   599         *
   600         *  @see #raise
   601         *  @see #Desc
   602         */
   603        Types.Site *getSite(Block *eb);
   604
   605        /*!
   606         *  ======== idToCode ========
   607         *  Extract the user's error code associated with an `Error_Id`
   608         *
   609         *  @param(id) `Error_Id` from which to extract the user defined
   610         *             code
   611         *  @_nodoc
   612         */
   613        @Macro UInt16 idToCode(Id id);
   614
   615        /*!
   616         *  ======== idToUid ========
   617         *  Extract the unique error id associated with an `Error_Id`
   618         *
   619         *  @param(id) `Error_Id` from which to extract the system unique
   620         *             id associated with the specified `Error_Id`
   621         *  @_nodoc
   622         */
   623        @Macro UInt16 idToUid(Id id);
   624
   625        /*!
   626         *  ======== init ========
   627         *  Put an error block into its initial state
   628         *
   629         *  To ensure reliable error detection, clients must call `init` for
   630         *  an `Error_Block` prior to any use.
   631         *
   632         *  If the same Error Block is used multiple times, only the last error
   633         *  raised is retained.
   634         *
   635         *  @param(eb) pointer to an `Error_Block`, `Error_ABORT` or `Error_IGNORE`
   636         *
   637         *      If `eb` is `NULL` this function simply returns.
   638         */
   639        Void init(Block *eb);
   640
   641        /*!
   642         *  ======== print ========
   643         *  Print error using System.printf()
   644         *
   645         *  This function prints the error using `System_printf()`.  The output
   646         *  is on a single line terminated with a new line character and has the
   647         *  following form:
   648         *  @p(code)
   649         *      <site>: <file>, line <line_num>: <err_msg>
   650         *  @p
   651         *  where `<site>` is the module that raised the error, `<file>` and
   652         *  `<line_num>` are the file and line number of the containing the call
   653         *  site of the `Error_raise()`, and `<err_msg>` is the error message
   654         *  rendered with the arguments associated with the error.
   655         *
   656         *  @param(eb) pointer to an `Error_Block`, `Error_ABORT` or `Error_IGNORE`
   657         *
   658         *      If `eb` is `Error_ABORT` or `Error_IGNORE`, this function simply
   659         *      returns with no output.
   660         *
   661         *  @a(Warning)
   662         *  This function is not protected by a gate and, as a result,
   663         *  if two threads call this method concurrently, the output of the two
   664         *  calls will be intermingled.  To prevent intermingled error output,
   665         *  you can either wrap all calls to this method with an appropriate
   666         *  `Gate_enter`/`Gate_leave` pair or simply ensure that only one
   667         *  thread in the system ever calls this method.
   668         */
   669        Void print(Block *eb);
   670
   671        /*!
   672         *  ======== policyDefault ========
   673         *  Default implementation of the policyFxn
   674         *
   675         *  This function is the implementation which is plugged in by default to
   676         *  the `{@link #policyFxn}`. It processes the error and logs it before
   677         *  returning to the caller or aborting - depending on the error policy
   678         *  `{@link #policy}`.
   679         */
   680        Void policyDefault(Block *eb, Types.ModuleId mod, CString file, Int line,
   681            Id id, IArg arg1, IArg arg2);
   682
   683        /*!
   684         *  ======== policyMin ========
   685         *  Implementation of the policyFxn with a smaller footprint
   686         *
   687         *  This function is a compromise between a debug-friendly
   688         *  `{@link #policyDefault}`, which offers more details about any raised
   689         *  errors, but requires a larger footprint, and `{@link #policySpin}`,
   690         *  which is small but does not display any debug information.
   691         *
   692         *  This function returns to the caller, unless `{@link #policy}` is set to
   693         *  `TERMINATE`, or the `Error_Block` passed to it is `NULL`. If it returns,
   694         *  the only information available in the returned `Error_Block` is the
   695         *  error ID.
   696         */
   697        Void policyMin(Block *eb, Types.ModuleId mod, CString file, Int line,
   698            Id id, IArg arg1, IArg arg2);
   699
   700        /*!
   701         *  ======== policySpin ========
   702         *  Lightweight implementation of the policyFxn
   703         *
   704         *  This function is a lightweight alternative  which can be plugged in to
   705         *  the `{@link #policyFxn}`. It just loops infinitely.
   706         *
   707         *  @a(Warning)
   708         *  This function does not call `{@link #raiseHook}` and never returns to
   709         *  the caller.  As a result, ANY error raised by the application will cause
   710         *  it to indefinitly hang.
   711         */
   712        Void policySpin(Block *eb, Types.ModuleId mod, CString file, Int line,
   713            Id id, IArg arg1, IArg arg2);
   714
   715        /*!
   716         *  ======== raise ========
   717         *  Raise an error
   718         *
   719         *  This function is used to raise an `Error` by writing call site,
   720         *  error ID, and error argument information into the `Error_Block`
   721         *  pointed to by `eb`.
   722         *
   723         *  If `Error_raise` is called more than once on an `Error_Block` object,
   724         *  the previous error information is overwritten; only the last error
   725         *  is retained in the `Error_Block` object.
   726         *
   727         *  In all cases, any configured `{@link #raiseHook Error.raiseHook}`
   728         *  function is called with a non-`NULL` pointer to a fully
   729         *  initialized `Error_Block` object.
   730         *
   731         *  @param(eb) pointer to an `Error_Block`, `Error_ABORT` or `Error_IGNORE`
   732         *
   733         *      If `eb` is `Error_ABORT` or
   734         *      `{@link #policy Error.policy} == TERMINATE`,
   735         *      this function does not return to the caller; after calling any
   736         *      configured `{@link #raiseHook}`, `System_abort` is called with the
   737         *      string `"xdc.runtime.Error.raise: terminating execution\n"`.
   738         *
   739         *  @param(id) the error to raise
   740         *
   741         *      This pointer identifies the class of error being raised; the error
   742         *      class indicates how to interpret any subsequent arguments passed to
   743         *      `{@link #raise}`.
   744         *
   745         *  @param(arg1) error's first argument
   746         *
   747         *      The argument interpreted by the first control character
   748         *      in the error message format string. It is ignored if not needed.
   749         *
   750         *  @param(arg2) error's second argument
   751         *
   752         *      The argument interpreted by the second control character
   753         *      in the error message format string. It is ignored if not needed.
   754         */
   755        @Macro Void raise(Block *eb, Id id, IArg arg1, IArg arg2);
   756
   757        /*! @_nodoc */
   758        Void raiseX(Block *eb, Types.ModuleId mod, CString file, Int line,
   759            Id id, IArg arg1, IArg arg2);
   760
   761        /*! @_nodoc EXPERIMENTAL */
   762        Void setX(Block *eb, Types.ModuleId mod, CString file, Int line,
   763            Id id, IArg arg1, IArg arg2);
   764
   765    internal:
   766
   767        struct Module_State {
   768            UInt16      count;
   769        };
   770
   771    }
   772    /*
   773     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   774     */
   775


module xdc.runtime.Gate

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    package xdc.runtime;
    14
    15    /*!
    16     *  ======== Gate ========
    17     *  Critical section support
    18     *
    19     *  Gates are used by clients to protect concurrent access to critical
    20     *  data structures.  Critical data structures are those that must be
    21     *  updated by at most one thread at a time.  All code that needs access
    22     *  to a critical data structure "enters" a gate (that's associated with the
    23     *  data structure) prior to accessing the data, modifies the data structure,
    24     *  then "leaves" the gate.
    25     *
    26     *  A gate is responsible for ensuring that at most one thread at a time
    27     *  can enter and execute "inside" the gate.  There are several
    28     *  implementations of gates, with different system executation times and
    29     *  latency tradoffs.  In addition, some gates must not be entered by certain
    30     *  thread types; e.g., a gate that is implemented via a "blocking" semaphore
    31     *  must not be called by an interrupt service routine (ISR).
    32     *
    33     *  A module can be declared "gated" by adding the `@Gated` attribute to the
    34     *  module's XDC spec file.  A "gated" module is assigned a module-level gate
    35     *  at the configuration time, and that gate is then used to protect critical
    36     *  sections in the module's target code. A module-level gate is an instance of
    37     *  a module implementing `{@link IGateProvider}` interface. However, gated
    38     *  modules do not access their module-level gates directly. They use this
    39     *  module to access transparently their module-level gate.
    40     *
    41     *  Application code that is not a part of any module also has a
    42     *  module-level gate, configured through the module `{@link Main}`.
    43     *
    44     *  Each gated module can optionally create gates on an adhoc basis at
    45     *  runtime using the same gate module that was used to create the module
    46     *  level gate.
    47     *
    48     *  Gates that work by disabling all preemption while inside a gate can be
    49     *  used to protect data structures accessed by ISRs and other
    50     *  threads.  But, if the time required to update the data structure is not
    51     *  a small constant, this type of gate may violate a system's real-time
    52     *  requirements.
    53     *
    54     *  Gates have two orthogonal attributes: "blocking" and "preemptible".
    55     *  In general, gates that are "blocking" can not be use by code that is
    56     *  called by ISRs and gates that are not "preemptible" should only be used to
    57     *  to protect data manipulated by code that has small constant execution
    58     *  time.
    59     *
    60     */
    61    @CustomHeader
    62    @DirectCall
    63    module Gate {
    64
    65        /*!
    66         *  ======== Ref ========
    67         *  Opaque reference to an allocated gate instance
    68         */
    69        @Encoded typedef xdc.runtime.IGateProvider.Handle Ref;
    70
    71        /*!
    72         *  ======== allocInstance ========
    73         *  Allocate a gate instance from the current module's gate
    74         *
    75         *  This method is used by modules to create gates at runtime using
    76         *  the same `IGateProvider` that was used to create the module
    77         *  level gate.  The parameters passed to the `IGateProvider` are
    78         *  specified at configuration time via the
    79         * `{@link Types#Common$ Types.Common$.gateParams}`
    80         *  configuration parameter.
    81         *
    82         *  @param(eb)  `Error` block pointer
    83         *
    84         *      If `NULL`, any error in creating the instance will terminate
    85         *      the application.
    86         *
    87         *  @a(returns)
    88         *  Non-`NULL` instance handle is returned if no error occurs; otherwise
    89         *  an error is raised in `eb` and `NULL` is returned.
    90         *
    91         *  @see IGateProvider
    92         *  @see Error
    93         */
    94        @Macro Ref allocInstance(Error.Block *eb);
    95
    96        /*!
    97         *  ======== freeInstance ========
    98         *  Free a gate instance to the current module's gatekeeper
    99         *
   100         *  @param(gate) non-`NULL` return value from a prior call to
   101         *               `{@link #allocInstance}`.
   102         *
   103         *  @see #allocInstance
   104         */
   105        @Macro Void freeInstance(Ref gate);
   106
   107        /*!
   108         *  ======== enterInstance ========
   109         *  Enter a critical section protected by this gate instance
   110         *
   111         *  @param(gate) non-`NULL` return value from a prior call to
   112         *               `{@link #allocInstance}`.
   113         *
   114         *  @a(returns)
   115         *  Returns a "key" value that must be used to leave `gate`
   116         *  via `{@link #leaveInstance()}`.
   117         *
   118         */
   119        @Macro IArg enterInstance(Ref gate);
   120
   121        /*!
   122         *  ======== enterModule ========
   123         *  Enter a critical section protected by the current module's gate
   124         *
   125         *  @a(returns)
   126         *  Returns a "key" value that must be used to leave the current module
   127         *  gate via `{@link #leaveModule()}`.
   128         *
   129         *  @see #leaveModule
   130         */
   131        @Macro IArg enterModule();
   132
   133        /*!
   134         *  ======== enterSystem ========
   135         *  Enter a critical section protected by the global System gate
   136         *
   137         *  @a(returns)
   138         *  Returns a "key" value that must be used to leave the `{@link System}`
   139         *  gate via `{@link #leaveSystem()}`.
   140         *
   141         *  @see #leaveSystem
   142         */
   143        IArg enterSystem();
   144
   145        /*!
   146         *  ======== leaveInstance ========
   147         *  Leave a critical section protected by a gate
   148         *
   149         *  @param(gate) non-`NULL` return value from a prior call to
   150         *               `{@link #allocInstance}`.
   151         *  @param(key) the return value of a prior call to
   152         *              `{@link #enterInstance}`
   153         *
   154         *  @see #enterInstance
   155         *  @see #allocInstance
   156         */
   157        @Macro Void leaveInstance(Ref gate, IArg key);
   158
   159        /*!
   160         *  ======== leaveModule ========
   161         *  Leave a critical section protected by the current module's gate
   162         *
   163         *  @param(key) the return value of a prior call to `{@link #enterModule}`
   164         *
   165         *  @see #enterModule
   166         */
   167        @Macro Void leaveModule(IArg key);
   168
   169        /*!
   170         *  ======== leaveSystem ========
   171         *  Leave a critical section protected by the global System gate
   172         *
   173         *  @param(key) the return value of a prior call to `{@link #enterSystem}`
   174         *
   175         *  @see #enterSystem
   176         */
   177        Void leaveSystem(IArg key);
   178
   179        /*!
   180         *  ======== canBlock ========
   181         *  Check if the module level gate can block threads
   182         *
   183         *  This type of gate should never be called by clients that must never
   184         *  call a "blocking" RTOS operation; e.g., interrupt service
   185         *  routines
   186         *
   187         *  @a(returns) Returns `TRUE` if the underlying gatekeeper's gate can
   188         *              block
   189         */
   190        @Macro Bool canBlock();
   191
   192        /*!
   193         *  ======== canBePreempted ========
   194         *  Check if the module level gate allows thread preemption
   195         *
   196         *  This type of gate should always be used by clients that protect
   197         *  a data structure whose updates require more than a small
   198         *  constant amount of time; e.g., update of a memory allocator's free
   199         *  list.
   200         *
   201         *  @a(returns) Returns `TRUE` if the underlying gate does not disable
   202         *              thread preemption.
   203         */
   204        @Macro Bool canBePreempted();
   205
   206        /*!
   207         *  ======== staticAlloc ========
   208         *  Assign a statically-allocated gate instance to a state-object field
   209         *
   210         *  This method is used to create a gate for static instance objects
   211         *  that require a gate.
   212         *
   213         *  @param(stateObj)    the state object for the instance being created
   214         *  @param(fldName)     a name of a field within the state object
   215         *
   216         *      This parameter names a field that will point to the created gate
   217         *      instance to be created. It is a caller's responsibility
   218         *      to ensure that the type of `fldName` is a handle to an
   219         *      `IGateProvider` instance.
   220         */
   221        metaonly Void staticAlloc(Any stateObj, String fldName);
   222    }
   223    /*
   224     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   225     */
   226


module xdc.runtime.GateNull

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    package xdc.runtime;
    14
    15    /*!
    16     *  ======== GateNull ========
    17     *  Empty implementation of `{@link IGateProvider}`
    18     *
    19     *  An instance of this `IGateProvider` implementation is assigned to all
    20     *  gated modules as a default module-wide gate. Instances of this gate
    21     *  implementation provide no protection for critical sections and should only
    22     *  be used for modules in which the data structures protected by module-level
    23     *  gates are never accessed by concurrent threads.
    24     */
    25    module GateNull inherits IGateProvider {
    26
    27    instance:
    28        /*!
    29         *  ======== create ========
    30         *  Create a `GateNull` gate
    31         */
    32        create();
    33    }
    34    /*
    35     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    36     */
    37


module xdc.runtime.HeapMin

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== HeapMin.xdc ========
    15     */
    16
    17    import xdc.rov.ViewInfo;
    18
    19    /*!
    20     *  ======== HeapMin ========
    21     *  Growth-only based heap implementation.
    22     *
    23     *  `HeapMin` is a minimal footprint heap implementation. This module is
    24     *  is designed for applications that only create module instances and
    25     *  generally only allocate memory at runtime, but never delete created
    26     *  instances or free memory explicitly.
    27     *
    28     *  For configuration-time `HeapMin.create`, the heap is aligned to
    29     *  `{@link Memory#getMaxDefaultTypeAlignMeta()}` for those targets that support
    30     *  static alignment. For targets that do not support static alignment, the
    31     *  buffer alignment is undefined.
    32     *
    33     *  When calling `{@link #create()}` at runtime, the client
    34     *  is responsible for aligning the buffer.
    35     */
    36
    37    module HeapMin inherits xdc.runtime.IHeap {
    38
    39        /*! @_nodoc */
    40        @XmlDtd
    41        metaonly struct BasicView {
    42            String          label;
    43            Ptr             buffer;
    44            Memory.Size     remainSize;
    45            Memory.Size     startSize;
    46        }
    47
    48        /*! @_nodoc */
    49        @Facet
    50        metaonly config ViewInfo.Instance rovViewInfo =
    51            ViewInfo.create({
    52                viewMap: [
    53                [
    54                    'Basic',
    55                    {
    56                        type: ViewInfo.INSTANCE,
    57                        viewInitFxn: 'viewInitBasic',
    58                        structName: 'BasicView'
    59                    }
    60                ],
    61                ]
    62            });
    63
    64        /*!
    65         *  ======== A_zeroSize ========
    66         *  Assert that the `{@link #size}` is non-zero on the create
    67         */
    68        config Assert.Id A_zeroSize  =
    69            {msg: "HeapMin_create cannot have a zero size value"};
    70
    71        /*!
    72         *  ======== E_freeError ========
    73         *  Error raised if `{@link #free()}` is called.
    74         *
    75         *  This error is only raised if a `{@link #free()}`
    76         *  is called and `{@link #freeError}` is true.
    77         */
    78        config Error.Id E_freeError = {
    79            msg: "free() invalid in growth-only HeapMin"
    80        };
    81
    82        /*!
    83         *  ======== freeError ========
    84         *  Flag to control whether `{@link #E_freeError}` is enabled.
    85         *
    86         *  If true, a `{@link #E_freeError}` error occurs when trying
    87         *  to free a buffer.
    88         *
    89         *  If false, no error occurs and the `{@link #free()}` does nothing.
    90         */
    91        config Bool freeError = true;
    92
    93    instance:
    94
    95        /*!
    96         *  ======== align ========
    97         *  Alignment of the buffer being managed by this heap instance.
    98         *
    99         *  In the static HeapMin.create() call, the buffer allocated for the
   100         *  HeapMin instance will have the alignment specified by this parameter
   101         *  on targets that support static alignment.
   102         *
   103         *  In the dynamic case, the client must supply the buffer, so it is the
   104         *  client's responsibility to manage the buffer's alignment, and there is
   105         *  no 'align' parameter.
   106         *
   107         *  The specified `align` parameter must be a power of 2.
   108         *
   109         *  The default alignment of zero causes the buffer to get aligned using
   110         *  {@link Memory#getMaxDefaultTypeAlignMeta()}.
   111         */
   112        metaonly config SizeT align;
   113
   114        /*!
   115         *  ======== create ========
   116         *  Create a `HeapMin` heap
   117         *
   118         *  This heap is a growth-only heap that is intended to be used by
   119         *  systems that never delete objects or free memory.  Objects can be
   120         *  created at runtime based on values determined at runtime, but
   121         *  objects can not be deleted.
   122         *
   123         *  @see HeapMin#Params
   124         */
   125        create();
   126
   127        /*!
   128         *  ======== sectionName ========
   129         *  Section name of the heap
   130         *
   131         *  When creating heaps during configuration, this parameter specifies
   132         *  where the heap's buffer will be placed. This parameter is passed as
   133         *  the section name in the `{@link Memory#staticPlace}` function.
   134         *
   135         *  @see Memory#staticPlace
   136         */
   137        metaonly config String sectionName = null;
   138
   139        /*!
   140         *  ======== buf ========
   141         *  Buffer that will be managed by the heap instance.
   142         *
   143         *  When creating a heap at runtime, the user must supply the memory
   144         *  that the heap will manage.  It is up to the caller to align
   145         *  the buffer as needed.
   146         *
   147         *  This parameter is ignored when creating heaps during configuration.
   148         */
   149        config Ptr buf = 0;
   150
   151        /*!
   152         *  ======== size ========
   153         *  Size (in MADUs) of the heap.
   154         *
   155         *  This parameter specifies the size of the heap managed by a
   156         *  `HeapMin` instance.  In the static case, a buffer of length `size`
   157         *  will be created.  In the dynamic case, `size` specifies the size of
   158         *  the buffer (i.e. parameter `buf`) that the caller provides.
   159         *
   160         *  This is a required parameter. It must be set by the caller. Failure
   161         *  to do so, will result in a build error for the static create or an
   162         *  `{@link #A_zeroSize}` assert for the runtime create.
   163         */
   164        config Memory.Size size = 0;
   165
   166        /*!
   167         *  ======== alloc ========
   168         *  Allocate a block of memory from the heap.
   169         *
   170         *  @a(Constraints)
   171         *  The alignment must be a power of 2.
   172         *
   173         *  @see IHeap#alloc
   174         */
   175        override Ptr alloc(SizeT size, SizeT align, Error.Block *eb);
   176
   177        /*!
   178         *  ======== free ========
   179         *  Free a block of memory back to the heap.
   180         *
   181         *  This is a growth only heap. Calling the `HeapMin_free` function
   182         *  will result in a `{@link #E_freeError}` error unless
   183         *  `{@link #freeError}` is set to `false`.
   184         *
   185         *  @see IHeap#free
   186         */
   187        override Void free(Ptr block, SizeT size);
   188
   189        /*!
   190         *  ======== isBlocking ========
   191         *  Can this heap block the caller
   192         *
   193         *  @a(returns)
   194         *  `HeapMin` always returns `FALSE` since it never blocks on a
   195         *  resource.
   196         */
   197        override Bool isBlocking();
   198
   199    internal:
   200
   201        struct Instance_State {
   202            Char        buf[];             /* Address of buffer being managed  */
   203            Memory.Size remainSize;        /* Size of remaining heap           */
   204            Memory.Size startSize;         /* Size of heap at the start        */
   205        };
   206    }
   207    /*
   208     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   209     */
   210


module xdc.runtime.HeapStd

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== HeapStd.xdc ========
    15     *!  Open Issues:
    16     *!  - Do not really know the largestFreeSize value in HeapStd_getStats()
    17     */
    18
    19    /*!
    20     *  ======== HeapStd ========
    21     *  Malloc/free based heap implementation.
    22     *
    23     *  This heap is based on the ANSI C Standard Library functions
    24     *  `malloc()` and `free()` and assumes that these functions are thread-safe.
    25     *  Please refer to the target specific documentation of the ANSI C Standard
    26     *  Library for details.
    27     *
    28     *  The largest free block that can be returned form `malloc()` cannot be
    29     *  determined. Therefore, the property `largestFreeSize` in
    30     *  `{@link Memory#Stats}` returned from `{@link #getStats()}` always returns
    31     *  0.
    32     *
    33     *  @a(Constraints)
    34     *  The `{@link #alloc()}` function only supports alignment requests up to
    35     *  value returned from
    36     *  `{@link Memory#getMaxDefaultTypeAlign()}`.
    37     */
    38
    39    @InstanceInitError  /* instance init can fail, call finalize if so */
    40
    41    module HeapStd inherits xdc.runtime.IHeap {
    42
    43        /*! @_nodoc */
    44        @XmlDtd
    45        metaonly struct Instance_View {
    46            Ptr             address;
    47            String          label;
    48            Memory.Size     remainSize;
    49            Memory.Size     startSize;
    50        }
    51
    52        /*!
    53         *  ======== HEAP_MAX ========
    54         *  Maximum heap size of HeapStd
    55         *
    56         *  This parameter defines maximum heap size that can be allocated to a
    57         *  `HeapStd` instance. Using this parameter to create `HeapStd` instances
    58         *  will disable the internal size checks in `HeapStd` module.
    59         */
    60        const SizeT HEAP_MAX = ~0U;
    61
    62        /*!
    63         *  ======== E_noRTSMemory ========
    64         *  Error raised if all the RTS heap is used up
    65         *
    66         *  The total size of all `HeapStd` instance allocations added together
    67         *  cannot exceed the `malloc`/`free` heap size determined by
    68         *  `{@link xdc.cfg.Program#heap}`.
    69         */
    70        config Error.Id E_noRTSMemory = {
    71            msg: "The RTS heap is used up. Examine Program.heap."
    72        };
    73
    74        /*!
    75         *  ======== A_zeroSize ========
    76         *  Assert that the `{@link #size}` is non-zero on the create
    77         */
    78        config Assert.Id A_zeroSize = {
    79            msg: "HeapStd_create cannot have a zero size value"
    80        };
    81
    82        /*!
    83         *  ======== A_align ========
    84         *  Assert that the `{@link #size}` is a power of 2
    85         */
    86        config Assert.Id A_align = {
    87            msg: "HeapStd_alloc alignment must be a power of 2"
    88        };
    89
    90        /*!
    91         *  ======== A_invalidTotalFreeSize ========
    92         *  Assert that remaining size is less than or equal to starting size.
    93         *
    94         *  If this assertion is raised, it means that either incorrect sizes
    95         *  were passed to `{@link #free}` or multiple calls to `{@link #free}`
    96         *  were made with the same buffer.
    97         */
    98        config Assert.Id A_invalidTotalFreeSize = {
    99            msg: "HeapStd instance totalFreeSize is greater than starting size"
   100        };
   101
   102        /*!
   103         *  ======== A_invalidAlignment ========
   104         *  Assert that the alignment argument in alloc is valid
   105         *  @_nodoc
   106         *
   107         *  If this assertion is raised, it means that the requested alignment is
   108         *  greater than the maximum alignment allowed on the target.
   109         */
   110        config Assert.Id A_invalidAlignment = {
   111            msg: "HeapStd_alloc - requested alignment is greater than allowed"
   112        };
   113
   114    instance:
   115
   116        /*!
   117         *  ======== create ========
   118         *  Create a `HeapStd` heap
   119         *
   120         *  This heap uses the ANSI C Standard Library functions
   121         *  `malloc()` and `free()` to manage memory and assumes that these
   122         *  functions are thread-safe.
   123         *
   124         *  @see HeapStd#Params
   125         */
   126        create();
   127
   128        /*!
   129         *  ======== size ========
   130         *  Size (in MAUs) of the heap.
   131         *
   132         *  This parameter specifies the size of the heap managed by a
   133         *  `HeapStd` instance. `HeapStd` is built upon the ANSI C Standard
   134         *  Library functions `malloc()` and `free()`.
   135         *
   136         *  The total size of all `HeapStd` instance allocations added together
   137         *  cannot exceed the `malloc`/`free` heap size determined by
   138         *  `{@link xdc.cfg.Program#heap Program.heap}`.
   139         *
   140         *  This is a required parameter. It must be set by the caller. Failure
   141         *  to do so, will result in a build error for the static create or an
   142         *  assert for the runtime create.
   143         */
   144        config Memory.Size size = 0;
   145
   146        /*!
   147         *  ======== alloc ========
   148         *  Allocates a block of memory from the heap.
   149         *
   150         *  @a(Constraints)
   151         *  The only alignment currently supported is the default
   152         *  alignment returned by the underlying `malloc()` implementation.
   153         *  The align value must be less than or equal to the value returned from
   154         *  `{@link Memory#getMaxDefaultTypeAlign()}`.
   155         *
   156         *  @see IHeap#alloc
   157         */
   158        override Ptr alloc(SizeT size, SizeT align, Error.Block *eb);
   159
   160        /*!
   161         *  ======== isBlocking ========
   162         *  Returns whether the heap may block during an `HeapStd_alloc()` or
   163         *  `HeapStd_free()`.
   164         *
   165         *  @a(returns)
   166         *  Since the implementation of the underlaying ANSI C Standard Library
   167         *  is not known, this function always returns the more restrictive case
   168         *  which is `TRUE`.
   169         */
   170        override Bool isBlocking();
   171
   172    internal:
   173
   174        struct Module_State {
   175            Memory.Size remainRTSSize;      /* Remaining size of rts heap      */
   176        };
   177
   178        struct Instance_State {
   179            Memory.Size remainSize;         /* Size of the remaining heap.      */
   180            Memory.Size startSize;          /* Starting size of the heap.       */
   181        };
   182    }
   183    /*
   184     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   185     */
   186


interface xdc.runtime.IFilterLogger

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*!
    14     *  ======== IFilterLogger ========
    15     *  Interface for supporting filtering of Log events by detail level.
    16     *
    17     *  Filtering of events based on detail level is not inherently supported
    18     *  by the Log APIs as is filtering of events based on the diagnostics mask.
    19     *
    20     *  Support for this type of filtering must be done by an `ILogger`
    21     *  implementation. Not all users are interested in this filtering support,
    22     *  however, so it is not required of all `ILogger` implementations.
    23     *
    24     *  `ILoggers` that do intend to support filtering by detail level should
    25     *  implement this interface, which extends the `ILogger` interface.
    26     *
    27     *  The `{@link #setFilterLevel}` and `{@link #getFilterLevel}` functions
    28     *  support runtime specification of a different filtering level for each of
    29     *  the diagnostics categories.
    30     */
    31    interface IFilterLogger inherits ILogger {
    32
    33        /*!
    34         *  ======== filterByLevel ========
    35         *  Support filtering of events by event level
    36         *
    37         *  To improve logging performance, this feature can be disabled by setting
    38         *  `filterByLevel` to false.
    39         *
    40         *  See '{@link #setFilterLevel}' for an explanation of level filtering.
    41         */
    42        config Bool filterByLevel = false;
    43
    44    instance:
    45
    46        /*!
    47         *  ======== setFilterLevel ========
    48         *  Set the level of detail that instances will log
    49         *
    50         *  Events with the specified level or higher will be logged, events
    51         *  below the specified level will be dropped.
    52         *
    53         *  Events are filtered first by diags category, then by level. If an
    54         *  event's diags category is disabled in the module's diags mask, then it
    55         *  will be filtered out regardless of level. The event will not even be
    56         *  passed to the logger.
    57         *
    58         *  This API allows for setting the filtering level for more than one
    59         *  diags category at a time. The mask parameter can be a single category
    60         *  or multiple categories combined, and the level will be set for all of
    61         *  those categories.
    62         *
    63         *  @param(mask) The diags categories to set the level for
    64         *  @param(filterLevel) The new filtering level for the specified
    65         *                      categories
    66         */
    67        Void setFilterLevel(Diags.Mask mask, Diags.EventLevel filterLevel);
    68
    69        /*!
    70         *  ======== getFilterLevel ========
    71         *  Returns the mask of diags categories currently set to the specified
    72         *  level.
    73         *
    74         *  See '{@link #setFilterLevel}' for an explanation of level filtering.
    75         */
    76        Diags.Mask getFilterLevel(Diags.EventLevel level);
    77
    78    }
    79    /*
    80     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    81     */
    82


interface xdc.runtime.IGateProvider

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== IGateProvider.xdc ========
    15     */
    16    package xdc.runtime
    17
    18    /*!
    19     *  ======== IGateProvider ========
    20     *  Interface implemented by all gate providers
    21     *
    22     *  Gates are used within the `xdc.runtime` package to serialize access
    23     *  to data structures that are used by more than one thread.
    24     *
    25     *  Gates are responsible for ensuring that only one out of multiple threads
    26     *  can access a data structure at a time.  There are important scheduling
    27     *  latency and performance considerations that affect the "type" of gate used
    28     *  to protect each data structure.  For example, the best way to protect a
    29     *  shared counter is to simply disable all interrupts before the update and
    30     *  restore the interrupt state after the update; disabling all interrupts
    31     *  prevents all thread switching, so the update is guaranteed to be "atomic".
    32     *  Although highly efficient, this  method of creating atomic sections causes
    33     *  serious system latencies when the time required to update the data structure
    34     *  can't be bounded.
    35     *
    36     *  For example, a memory manager's list of free blocks can grow indefinitely
    37     *  long during periods of high fragmentation.  Searching such a list with
    38     *  interrupts disabled would cause system latencies to also become unbounded.
    39     *  In this case, the best solution is to provide a gate that suspends the
    40     *  execution of  threads that try to enter a gate that has already been
    41     *  entered; i.e., the gate "blocks" the thread until the thread already in the
    42     *  gate leaves.  The time required to enter and leave the gate is greater than
    43     *  simply enabling and restoring interrupts, but since the time spent within
    44     *  the gate is relatively large, the overhead caused by entering and leaving
    45     *  gates will not become a significant percentage of overall system time.  More
    46     *  importantly, threads that do not need to access the shared data structure
    47     *  are completely unaffected by threads that do access it.
    48     *
    49     *  @a(Notes)
    50     *  Modules inheriting this interface should treat all names beginning with
    51     *  `Q_` as reserved words, i.e. the names from that namespace should not
    52     *  be used.  This will allow future version of this interface to define new
    53     *  constants ("qualities" ) similar to `{@link #Q_BLOCKING}` and
    54     *  `{@link #Q_PREEMPTING}` without breaking any existing modules.
    55     */
    56    @DirectCall
    57    interface IGateProvider {
    58
    59        /*!
    60         *  ======== Q_BLOCKING ========
    61         *  Blocking quality
    62         *
    63         *  Gates with this "quality" may cause the calling thread to block;
    64         *  i.e., suspend execution until another thread leaves the gate.
    65         */
    66        const Int Q_BLOCKING = 1;
    67
    68        /*!
    69         *  ======== Q_PREEMPTING ========
    70         *  Preempting quality
    71         *
    72         *  Gates with this "quality" allow other threads to preempt the thread
    73         *  that has already entered the gate.
    74         */
    75        const Int Q_PREEMPTING = 2;
    76
    77        /*!
    78         *  ======== query ========
    79         *  Configuration time test for a particular gate quality
    80         *
    81         *  @param(qual)    constant describing a quality
    82         *  @a(returns)     Returns `TRUE` if the gate has the given quality,
    83         *  and `FALSE` otherwise, which includes the case when the gate does not
    84         *  recognize the constant describing the quality.
    85         */
    86        metaonly Bool queryMeta(Int qual);
    87
    88        /*!
    89         *  ======== query ========
    90         *  Runtime test for a particular gate quality
    91         *
    92         *  @param(qual)    constant describing a quality
    93         *  @a(returns)     Returns `TRUE` if the gate has the given quality,
    94         *  and `FALSE` otherwise, which includes the case when the gate does not
    95         *  recognize the constant describing the quality.
    96         */
    97        Bool query(Int qual);
    98
    99    instance:
   100
   101        /*!
   102         *  ======== create ========
   103         *  Create a gate instance
   104         */
   105        create();
   106
   107        /*!
   108         *  ======== enter ========
   109         *  Enter this gate
   110         *
   111         *  Each gate provider can implement mutual exclusion using different
   112         *  algorithms; e.g., disabling all scheduling, disabling the scheduling
   113         *  of all threads below a specified "priority level", suspending the
   114         *  caller when the gate has been entered by another thread and
   115         *  re-enabling it when the the other thread leaves the gate.  However,
   116         *  in all cases, after this method returns that caller has exclusive
   117         *  access to the data protected by this gate.
   118         *
   119         *  A thread may reenter a gate without blocking or failing.
   120         *
   121         *  @a(returns)
   122         *  Returns a "key" that is used to `{@link #leave}` this gate; this
   123         *  value is used to restore thread preemption to the state that
   124         *  existed just prior to entering this gate.
   125         */
   126        IArg enter();
   127
   128        /*!
   129         *  ======== leave ========
   130         *  Leave this gate
   131         *
   132         *  This method is only called by threads that have previously entered
   133         *  this gate via `{@link #enter}`.  After this method returns, the
   134         *  caller must not access the data structure protected by this gate
   135         *  (unless the caller has entered the gate more than once and other
   136         *  calls to `leave` remain to balance the number of previous
   137         *  calls to `enter`).
   138         *
   139         *  @param(key) the value returned by a matching call to
   140         *              `{@link #enter}`
   141         */
   142        Void leave(IArg key);
   143    }
   144    /*
   145     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   146     */
   147


interface xdc.runtime.IHeap

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== IHeap.xdc ========
    15     *! - if we ever change the name of this interface, we should change it to
    16     *!   IMemoryProvider
    17     */
    18
    19    /*!
    20     *  ======== IHeap ========
    21     *  Interface to heap functions.
    22     *
    23     *  All heap implementations inherit from this interface.
    24     *  The implementations can have additional configuration
    25     *  parmeters and functions.
    26     *
    27     */
    28    @DirectCall
    29
    30    interface IHeap {
    31
    32    instance:
    33
    34        /*!
    35         *  ======== alloc ========
    36         *  Allocates a block of memory from the heap.
    37         *
    38         *  This method returns a block of memory from the heap.
    39         *  It is called by the `{@link xdc.runtime.Memory#alloc()}` function.
    40         *
    41         *  @param(size)     size (in MADUs) of the block
    42         *  @param(align)    alignment (in MADUs)  of the block
    43         *  @param(eb)       pointer to error block
    44         *
    45         *  @a(returns)      Returns the address of the allocated memory.
    46         */
    47        Ptr alloc(SizeT size, SizeT align, Error.Block *eb);
    48
    49        /*!
    50         *  ======== create ========
    51         *  Create a heap.
    52         *
    53         *  See specific `IHeap` implementation for parameters used.
    54         */
    55        create();
    56
    57        /*!
    58         *  ======== free ========
    59         *  Free a block of memory back to the heap.
    60         *
    61         *  This method gives back a block of memory to a heap.
    62         *  It is called by the `{@link xdc.runtime.Memory#free()}` function.
    63         *
    64         *  @param(block)    non-`NULL` address of allocated block to free
    65         *  @param(size)     size (in MADUs) of the block of memory to free
    66         */
    67        Void free(Ptr block, SizeT size);
    68
    69        /*!
    70         *  ======== isBlocking ========
    71         *  Returns whether the heap may block during an `{@link #alloc()}` or
    72         *  `{@link #free()}`.
    73         *
    74         *  @a(returns)      If the heap might block, `TRUE` is returned.
    75         *                   If the heap does not block, `FALSE` is returned.
    76         */
    77        Bool isBlocking();
    78
    79        /*!
    80         *  ======== getStats ========
    81         *  Retrieve the statistics from the heap.
    82         *
    83         *  The caller passes in a pointer to a `{@link xdc.runtime.Memory#Stats}`
    84         *  structure and `getStats` fills in this structure.
    85         *
    86         *  This function is called by the `{@link xdc.runtime.Memory#getStats()}`
    87         *  function.
    88         *
    89         *  @param(stats)    non-`NULL` pointer to an output buffer
    90         */
    91        Void getStats(Memory.Stats *stats);
    92    }
    93    /*
    94     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    95     */
    96


interface xdc.runtime.IInstance

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*!
    14     *  ======== IInstance ========
    15     *  Common instance params
    16     *
    17     *  Every module's instance parameter structure contains a pointer to an
    18     *  `IInstance.Params` structure named `instance`.  So, every instance
    19     *  parameter defined in this interface may optionally be set when
    20     *  creating (or constructing) any module's instances.
    21     */
    22    @DirectCall
    23
    24    interface IInstance {
    25
    26    instance:
    27
    28        /*!
    29         *  ======== name ========
    30         *  Name of the instance
    31         *
    32         *  It is possible to "bind" a name to each instance of any module
    33         *  at the time the instance is created (or constructed).
    34         *  @p(code)
    35         *      ModA_Params params;
    36         *      ModA_Params_init(&params);
    37         *      params.instance->name = "myInstance";
    38         *      ModA_create(&params, NULL);
    39         *  @p
    40         *
    41         *  The name field must be assigned a pointer to a buffer that persists
    42         *  as long as the instance that it names exists.  Only a reference to
    43         *  the name is retained in the instance, the name is not copied to a
    44         *  secondary buffer.
    45         *
    46         *  The configuration parameters that controls if instance names are
    47         *  supported is `common$.namedInstance`. The parameter is a member of the
    48         *  structure `{@link xdc.runtime.Types#Common$ common$}`, available in
    49         *  each module. By default, this parameter is set to `false`, which
    50         *  disables support for instance names.
    51         *  Therefore, to enable instance names for a given module `Mod`, configure
    52         *  the module as follows in your configuration script:
    53         *  @p(code)
    54         *      var Mod = xdc.useModule('pkg.Mod');
    55         *      ModA.common$.namedInstance = true;
    56         *  @p
    57         *
    58         *  Here is how the static instances are given names at the configuration
    59         *  time:
    60         *  @p(code)
    61         *      var inst = Mod.create();
    62         *      inst.instance.name = "myInstance";
    63         *  @p
    64         *
    65         *  If instance names are enabled and used for statically created
    66         *  instances, the config parameter
    67         *  `{@link xdc.runtime.Text#isLoaded Text.isLoaded}` must be set to
    68         *  `true` to have these names available at runtime.
    69         *
    70         *  At runtime, assign your instance a name:
    71         *  @p(code)
    72         *      #include <package/name/Mod.h>
    73         *      Mod_Params params;
    74         *      Mod_Params_init(&params);
    75         *      params.instance->name = "myInstance";
    76         *      Mod_create(&params, NULL);
    77         *  @p
    78         *
    79         *  If instances have been configured to not support names, it is still
    80         *  possible to assign to the `instance.name` field of the parameter
    81         *  structure (as shown above).  However, the pointer is not retained
    82         *  and methods that normally return an instance's name will return
    83         *  `NULL` instead.
    84         */
    85        config CString name = null;
    86    }
    87    /*
    88     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    89     */
    90


interface xdc.runtime.ILogger

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*!
    14     *  ======== ILogger ========
    15     *  Interface to service Log events
    16     *
    17     *  A logger is responsible for recording, transmitting, or otherwise
    18     *  handling `{@link Log#EventDesc Log Events}` generated by clients of the
    19     *  `{@link Log}` module. The `Log` module uses modules that implement the
    20     *  `ILogger` interface to record the log events. Most application code will
    21     *  use the `Log` module instead of directly calling the specific `ILogger`
    22     *  module implementation.
    23     *
    24     *  All logger implementations must inherit from this interface. The
    25     *  derived implementations must implement the functions defined in this
    26     *  interface but may also add additional configuration parameters and
    27     *  functions.
    28     *
    29     *  Events may be defined with a detail level, but the Log interface does not
    30     *  inherently provide support for filtering of events based on detail level.
    31     *  Instead, this is left to the ILogger implementation. ILogger
    32     *  implementations which wish to support filtering based on detail level
    33     *  should implement the IFilterLogger interface, which extends the ILogger
    34     *  interface to include APIs for getting and setting the current filter level.
    35     */
    36    @DirectCall
    37    interface ILogger {
    38
    39        /*!
    40         *  ======== getMetaArgs ========
    41         *  Returns any meta data needed to support RTA.
    42         *
    43         *  This meta data should be returned in the form of a structure which
    44         *  can be converted into XML. This data is added to the RTA XML file
    45         *  during the application's configuration, and can be accessed later
    46         *  through the xdc.rta.MetaData module.
    47         *
    48         *  The MetaData is returned per instance of the ILogger module. The
    49         *  instance object is passed to the function as the first argument.
    50         *
    51         *  The second argument is the index of the instance in the list of
    52         *  the ILogger's static instances.
    53         */
    54        function getMetaArgs(inst, instNum);
    55
    56    instance:
    57
    58        /*!
    59         *  ======== enable ========
    60         *  Enable a log
    61         *
    62         *  @a(returns)
    63         *  The function returns the state of the log (`TRUE` if enabled,
    64         *  `FALSE` if disabled) before the call. This return value allows
    65         *  clients to restore the previous state.
    66         *  Note: not thread safe.
    67         */
    68        Bool enable();
    69
    70       /*!
    71         *  ======== disable ========
    72         *  Disable a log
    73         *
    74         *  Events written to a disabled log are silently discarded.
    75         *
    76         *  @a(returns)
    77         *  The function returns the state of the log (`TRUE` if enabled,
    78         *  `FALSE` if disabled) before the call. This return value allows
    79         *  clients to restore the previous state.
    80         *  Note: not thread safe.
    81         */
    82        Bool disable();
    83
    84        /*!
    85         *  ======== write0 ========
    86         *  Process a log event with 0 arguments.
    87         *
    88         *  Same as `write4` except with 0 arguments rather than 4.
    89         *
    90         *  @see ILogger#write4()
    91         */
    92        Void write0(Log.Event evt, Types.ModuleId mid);
    93
    94        /*!
    95         *  ======== write1 ========
    96         *  Process a log event with 1 arguments.
    97         *
    98         *  Same as `write4` except with 1 arguments rather than 4.
    99         *
   100         *  @see ILogger#write4()
   101         */
   102        Void write1(Log.Event evt, Types.ModuleId mid, IArg a1);
   103
   104        /*!
   105         *  ======== write2 ========
   106         *  Process a log event with 2 arguments.
   107         *
   108         *  Same as `write4` except with 2 arguments rather than 4.
   109         *
   110         *  @see ILogger#write4()
   111         */
   112        Void write2(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2);
   113
   114        /*!
   115         *  ======== write4 ========
   116         *  Process a log event with up to 4 arguments.
   117         *
   118         *  The `evt` argument is of type Log.Event, which encodes the
   119         *  `{@link Log#EventId}`, the `{@link Diags#Mask}`, and the
   120         *  `{@link Diags#EventLevel}` of the event. The event ID can be obtained
   121         *  via `{@link Types#getEventId}(evt)`, the Diags mask can be obtained via
   122         *  `{@link Diags#getMask}(evt)`, and the event level can be obtained via
   123         *  `{@link Diags#getLevel}(evt)`.
   124         *
   125         *  The `modId` argument is the module ID of the module that logged the
   126         *  event.
   127         *
   128         *  The event information can be used by the logger to handle different
   129         *  events specially. For example, the event ID can be used to compare
   130         *  against other known `Log.Event`s.
   131         *  @p(code)
   132         *      if (Log_getEventId(MY_EVENT) == Log_getEventId(evt)) {
   133         *          :
   134         *      }
   135         *  @p
   136         *  The Diags mask and event level can be used for filtering of events
   137         *  based on event level (see {@link IFilterLogger}), or even routing
   138         *  events to separate loggers based on diags category (see, for example,
   139         *  {@link LoggerBuf#statusLogger}).
   140         *
   141         *  The Diags mask and event level are useful for handling the event, but
   142         *  are generally not recorded by the logger because they are not needed in
   143         *  decoding and displaying the event. A more suitable value to record is a
   144         *  `{@link Types#Event}`, which encodes the event ID and module ID. For
   145         *  example, the `{@link Log#EventRec}` type stores a `{@link Types#Event}`
   146         *  in its record definition. A `{@link Types#Event}` can be created using
   147         *  the `{@link Types#makeEvent}` API given the event ID and module ID.
   148         *
   149         *  The event ID value of `0` is used to indicate an event triggered by a
   150         *  call to one of the `{@link Log#print0 Log_print[0-6]}` methods. These
   151         *  methods take a format string rather than a `Log_Event` argument and,
   152         *  as a result, the event ID encoded in `evt` is `0` and the parameter
   153         *  `a1` is the format string.
   154         *
   155         *  Non-zero event IDs can also be used to access the `msg` string
   156         *  associated with the `{@link Log#EventDesc}` that originally
   157         *  defined the `Log` event.
   158         *  @p(code)
   159         *      Log_EventId id = Log_getEventId(evt));
   160         *      if (id != 0) {
   161         *          String msg = Text_ropeText(id);
   162         *          System_aprintf(msg, a1, a2, a3, a4);
   163         *      }
   164         *  @p
   165         *  This works because an event's ID is simply an offset into a table
   166         *  of characters (maintained by the `{@link Text}` module)
   167         *  containing the event's msg string.
   168         *
   169         *  The arguments a1, a2, etc. are parameters that are to be interpreted
   170         *  according to the message format string associated with `evt`.
   171         *
   172         *  @param(evt) event to be logged
   173         *  @param(mid) module ID of the module which logged the event
   174         *  @param(a1)  arbitrary argument passed by caller
   175         *
   176         *  @see Log#Event
   177         *  @see Log#EventDesc
   178         *  @see Text#ropeText
   179         *  @see Log#getEventId
   180         */
   181        Void write4(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2,
   182                    IArg a3, IArg a4);
   183
   184        /*!
   185         *  ======== write8 ========
   186         *  Process a log event with up to 8 arguments.
   187         *
   188         *  Same as `write4` except with 8 arguments rather than 4.
   189         *
   190         *  @see ILogger#write4()
   191         */
   192        Void write8(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2,
   193                    IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
   194    }
   195    /*
   196     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   197     */
   198


interface xdc.runtime.IModule

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== IModule.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== IModule ========
    19     *  Base interface for all modules
    20     *
    21     *  All modules share a common set of configuration parameters and methods.
    22     *
    23     *  @a(internal)
    24     *  This section provides a terse summary of the methods provided by every
    25     *  module for use within the module's implementation.  Each method's
    26     *  prototype is shown along with a brief summary of its behavior.
    27     *  These methods are declared in the module's internal header which should
    28     *  always be included in any file referencing these functions.  For a
    29     *  module named `Mod` the following statement includes this header.
    30     *  @p(code)
    31     *      #include "package/internal/Mod.xdc.h"
    32     *  @p
    33     *
    34     *  In the prototypes below, `Mod` refers to the module being implemented,
    35     *  `embeddedObj` is the name of field in the module's state structure that
    36     *  is either an embedded object field or an array of such objects, and
    37     *  `fld` is the name of a field declared in the module's state structure.
    38     *
    39     *  @p(code)
    40     *  // enter the module's gate
    41     *  IArg Mod_Module_enter(Gate_Handle gate);
    42     *
    43     *  // leave the module's gate
    44     *  Mod_Module_leave(Gate_Handle, IArg);
    45     *
    46     *  // return a pointer to the embeddedObj field
    47     *  Ptr Mod_Module_State_embeddedObj();
    48     *
    49     *  // the value of the fld field of the module's state structure
    50     *  Mod_module->fld;    // fld is declared in module's .xdc file
    51     *  @p
    52     *
    53     *  @a(external)
    54     *  This section provides a terse summary of the methods provided by every
    55     *  module for use by an application or other modules.  Each method's
    56     *  prototype is shown along with a brief summary of its behavior.
    57     *  These methods are declared in the module's header which should always
    58     *  be included in any file referencing these functions.  For a module named
    59     *  `Mod` in the package named `a.b.c`, the following statement includes this
    60     *  header.
    61     *  @p(code)
    62     *      #include <a/b/c/Mod.h>
    63     *  @p
    64     *
    65     *  In the prototypes below, `IMod` referes to some interface, `Mod` refers to
    66     *  a module that (optionally) inherits from `IMod`, and `pkgName` is the
    67     *  name of the package containing the interface `IMod`.
    68     *  @p(code)
    69     *
    70     *  // methods to operate on modules
    71     *
    72     *      // return heap associated with this module
    73     *      IHeap_Handle Mod_Module_heap();
    74     *
    75     *      // get Mod's module ID
    76     *      Types_ModuleId Mod_Module_id();
    77     *
    78     *      // return TRUE if Mod's startup is complete
    79     *      Bool Mod_Module_startupDone();
    80     *
    81     *      // type-safe conversion from an interface to an inheriting module
    82     *      // Returns NULL if the conversion is not valid
    83     *      Mod_Handle Mod_Handle_downCast(IMod_Handle handle);
    84     *
    85     *      // type-safe conversion from a module to an interface it inherits from
    86     *      // Returns NULL if the conversion is not valid
    87     *      IMod_Handle Mod_Handle_upCast(Mod_Module_Handle handle);
    88     *
    89     *  // methods to access the instances managed by Mod
    90     *
    91     *      // return heap used to create instances
    92     *      IHeap_Handle Mod_Object_heap();
    93     *
    94     *      // return count of static instances
    95     *      Int Mod_Object_count();
    96     *
    97     *      // get the i'th instance object of an array of instance objects
    98     *      //
    99     *      // If the array reference is NULL, get the i'th statically created
   100     *      // instance object.
   101     *      Mod_Object *Mod_Object_get(Mod_Object *array, Int i);
   102     *
   103     *      // get the first "live" runtime instance
   104     *      Mod_Object *Mod_Object_first();
   105     *
   106     *      // get the next "live" runtime instance
   107     *      Mod_Object *Mod_Object_next(Mod_Object *obj);
   108     *
   109     *  // methods that operate on instance handles
   110     *
   111     *      // fill in buf structure with instance's label info, returns buf
   112     *      Types_Label *Mod_Handle_label(Mod_Handle inst, Types_Label *buf);
   113     *
   114     *      // returns name of the instance inst, if it has one (otherwise NULL)
   115     *      String Mod_Handle_name(Mod_Handle inst);
   116     *
   117     *      // type-safe conversion of module handle to interface handle
   118     *      // Returns NULL if the conversion is not valid
   119     *      IMod_Handle Mod_Handle_to_pkgName_IMod(Mod_Handle inst);
   120     *
   121     *      // type-safe conversion of interface handle to module handle
   122     *      // Returns NULL if the conversion is not valid
   123     *      Mod_Handle Mod_Handle_from_pkgName_IMod(IMod_Handle inst);
   124     *
   125     *      // get the module that created the handle
   126     *      Mod_Module Mod_Handle_to_Module(Mod_Handle inst);
   127     *  @p
   128     */
   129    interface IModule {
   130
   131        /*!
   132         *  ======== common$ ========
   133         *  Common module configuration parameters
   134         *
   135         *  All modules have this configuration parameter.  Its name
   136         *  contains the '$' character to ensure it does not conflict with
   137         *  configuration parameters declared by the module.  This allows
   138         *  new configuration parameters to be added in the future without
   139         *  any chance of breaking existing modules.
   140         */
   141        metaonly config Types.Common$ common$;
   142
   143        /*!
   144         *  ======== viewNameMap$ ========
   145         *  Specifies the ROV views for the module.
   146         *  @_nodoc
   147         *
   148         *  Maps the view name to the RovView descriptor.
   149         */
   150        metaonly config Types.ViewInfo viewNameMap$[string];
   151
   152        /*!
   153         *  ======== rovShowRawTab$ ========
   154         *  @_nodoc
   155         */
   156        metaonly config Bool rovShowRawTab$ = true;
   157
   158        /*!
   159         *  ======== configNameMap$ ========
   160         *  @_nodoc
   161         */
   162        metaonly readonly config Types.ViewInfo configNameMap$[string] = [
   163            ["xdc.runtime/Memory", {viewType: "module", fields: [
   164                "common$.instanceHeap", "common$.instanceSection",
   165                "common$.memoryPolicy",
   166                "common$.namedModule", "common$.namedInstance",
   167                "common$.fxntab", "common$.romPatchTable"
   168            ]}],
   169            ["xdc.runtime/Diagnostics", {viewType: "module", fields: [
   170                "common$.logger",
   171                "common$.diags_ASSERT", "common$.diags_ENTRY",
   172                "common$.diags_EXIT", "common$.diags_INTERNAL",
   173                "common$.diags_LIFECYCLE",
   174                "common$.diags_STATUS",
   175                "common$.diags_USER1",
   176                "common$.diags_USER2", "common$.diags_USER3",
   177                "common$.diags_USER4", "common$.diags_USER5",
   178                "common$.diags_USER6", "common$.diags_INFO",
   179                "common$.diags_ANALYSIS"
   180            ]}],
   181            ["xdc.runtime/Concurrency", {viewType: "module", fields: [
   182                "common$.gate", "common$.gateParams"
   183            ]}],
   184            ["xdc.runtime/Log Events", {viewType: "module", fields: [
   185                "Log.Event"]}],
   186            ["xdc.runtime/Log Events", {viewType: "instance", fields: [
   187                "Log.Event"]}],
   188            ["xdc.runtime/Asserts", {viewType: "module", fields: [
   189                "Assert.Id"]}],
   190            ["xdc.runtime/Asserts", {viewType: "instance", fields: [
   191                "Assert.Id"]}],
   192            ["xdc.runtime/Errors", {viewType: "module", fields: [
   193                "Error.Id"]}],
   194            ["xdc.runtime/Errors", {viewType: "instance", fields: [
   195                "Error.Id"]}],
   196        ];
   197
   198        /*! @_nodoc */
   199        @System config Bits32 Module__diagsEnabled = 0;
   200        /*! @_nodoc */
   201        @System config Bits32 Module__diagsIncluded = 0;
   202        /*! @_nodoc */
   203        @System config Bits16* Module__diagsMask = null;
   204
   205        /*! @_nodoc */
   206        @System config Ptr Module__gateObj = null;
   207        /*! @_nodoc */
   208        @System config Ptr Module__gatePrms = null;
   209
   210        /*! @_nodoc */
   211        @System config Types.ModuleId Module__id = 0;
   212
   213        /*! @_nodoc */
   214        @System config Bool Module__loggerDefined = false;
   215        /*! @_nodoc */
   216        @System config Ptr Module__loggerObj = null;
   217        /*! @_nodoc */
   218        @System config Types.LoggerFxn0 Module__loggerFxn0 = null;
   219        /*! @_nodoc */
   220        @System config Types.LoggerFxn1 Module__loggerFxn1 = null;
   221        /*! @_nodoc */
   222        @System config Types.LoggerFxn2 Module__loggerFxn2 = null;
   223        /*! @_nodoc */
   224        @System config Types.LoggerFxn4 Module__loggerFxn4 = null;
   225        /*! @_nodoc */
   226        @System config Types.LoggerFxn8 Module__loggerFxn8 = null;
   227
   228        /*! @_nodoc */
   229        @System config Int Object__count = 0;
   230        /*! @_nodoc */
   231        @System config IHeap.Handle Object__heap = null;
   232        /*! @_nodoc */
   233        @System config SizeT Object__sizeof = 0;
   234        /*! @_nodoc */
   235        @System config Ptr Object__table = null;
   236
   237        /*!
   238         *  ======== Handle__label ========
   239         *  Initialize a `Types.Label` from an instance handle
   240         *  @_nodoc
   241         *
   242         *  @param(obj) input instance handle
   243         *  @param(lab) pointer to `Label` struct to initialize from `obj`
   244         */
   245        @System Types.Label *Handle__label(Ptr obj, Types.Label *lab);
   246
   247        /*! @_nodoc */
   248        @System Bool Module__startupDone();
   249
   250        /*! @_nodoc
   251         *      aa  - address of "required" create args structure
   252         *      pa  - address of instance parameter structure
   253         *      psz - sizeof of parameter structure
   254         *      eb  - error block pointer
   255         *
   256         *  Currently, we keep Object__create and Object__delete because these are
   257         *  the functions used in virtual tables. All Object__create functions have
   258         *  the same signature so we can use SysFxns2 to define a type for virtual
   259         *  tables instead of using a different type for each module. we could
   260         *  delete these two functions.
   261         */
   262        //490928 @System Ptr Object__create(CPtr aa,
   263        @System Ptr Object__create(CPtr aa, const UChar *pa, SizeT psz,
   264                                   Error.Block *eb);
   265
   266        /*! @_nodoc */
   267        @System Void Object__delete(Ptr instp);
   268
   269        /*! @_nodoc */
   270        @System Ptr Object__get(Ptr oarr, Int i);
   271
   272        /*!
   273         *  ======== Object__first ========
   274         *  Return the first member of a list of dynamically created instances
   275         *  @_nodoc
   276         *
   277         *  @a(warning) The methods `first()` and `next()` are not thread-safe.
   278         *              The caller must ensure that no instances are removed or
   279         *              added while the list is being traversed.
   280         *
   281         *  @a(returns)
   282         *  Returns a handle to a first instance or `NULL` if there are no
   283         *  instances in the list.
   284         */
   285        @System Ptr Object__first();
   286
   287        /*!
   288         *  ======== Object__next ========
   289         *  Return the next instance from the list of dynamically created instances
   290         *  @_nodoc
   291         *
   292         *  @param(obj) handle to a dynamically created instance
   293         *
   294         *  @a(returns)
   295         *  Returns a handle to a first instance or `NULL` if there are no
   296         *  instances in the list
   297         */
   298        @System Ptr Object__next(Ptr obj);
   299
   300        /*! @_nodoc */
   301        @System Void Params__init(Ptr dst, const void *src, SizeT psz, SizeT isz);
   302
   303        /*! @_nodoc */
   304        @System Bool Proxy__abstract();
   305
   306        /*! @_nodoc */
   307        //490928 @System CPtr Proxy__delegate();
   308        @System CPtr Proxy__delegate();
   309    }
   310    /*
   311     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   312     */
   313


interface xdc.runtime.ISystemSupport

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== ISystemSupport.xdc ========
    15     */
    16    package xdc.runtime;
    17
    18    /*!
    19     *  ======== ISystemSupport ========
    20     *  Interface to core system functions.
    21     *
    22     *  Each embedded system requires implementations of these functions but
    23     *  the behavior of these functions varies depending on the context of the
    24     *  embedded system.  For example, some systems will implement `exit()` as
    25     *  an infinite loop because the executable is designed to *never* exit.
    26     */
    27    @DirectCall
    28    interface ISystemSupport {
    29
    30        /*!
    31         *  ======== abort ========
    32         *  Backend for `{@link System#abort()}`
    33         *
    34         *  This function is called by `{@link System#abort()}` prior to calling
    35         *  the ANSI C Standard library function `abort()`.  So, to ensure the
    36         *  abort processing of the system's ANSI C Standard library completes,
    37         *  this function should return to its caller.
    38         *
    39         *  @param(str)  message to output just prior to aborting
    40         *
    41         *      If non-`NULL`, this string should be output just prior to
    42         *      terminating.
    43         */
    44        Void abort(CString str);
    45
    46        /*!
    47         *  ======== exit ========
    48         *  Backend for `{@link System#exit()}`
    49         *
    50         *  This function is called as part the normal "atexit" processing
    51         *  performed by the ANSI C Standard Library's `exit()` function;
    52         *  `{@link System#exit()}` directly calls ANSI `exit()`.
    53         *
    54         *  This function is called after all "atexit" handlers bound via
    55         *  `{@link System#atexit()}` are run and it
    56         *  is always called while "inside" the the `System` gate.
    57         *
    58         *  To ensure that all exit processing of the system's ANSI C
    59         *  Standard Library completes, this function should return to its caller.
    60         *  Exit handlers bound using the ANSI C Standard Library `atexit()`
    61         *  function may run before or after this function.
    62         *
    63         *  @param(stat)    status value passed to all "atexit" handlers
    64         *
    65         *      This value is passed to all "atexit" handles bound via
    66         *      `{@link System#atexit()}`.
    67         *
    68         *  @see System#atexit
    69         */
    70        Void exit(Int stat);
    71
    72        /*!
    73         *  ======== flush ========
    74         *  Backend for `{@link System#flush()}`
    75         *
    76         *  This function is simply called by `{@link System#flush System_flush}`
    77         *  to output any characters buffered by the underlying `SystemSupport`
    78         *  module to an output device.
    79         */
    80        Void flush();
    81
    82        /*!
    83         *  ======== putch ========
    84         *  Backend for `{@link System#printf()}` and `{@link System#putch()}`
    85         *
    86         *  Output a single character.  This function is called by
    87         *  `{@link System#printf System_printf()}` to write each character
    88         *  of formated output specified by its arguments.
    89
    90         *
    91         *  @param(ch)  character to output
    92         */
    93        Void putch(Char ch);
    94
    95        /*!
    96         *  ======== ready ========
    97         *  Test if character output can proceed
    98         *
    99         *  This function is called by `{@link System}` prior to performing
   100         *  any character output.  If this function returns `FALSE`, the `System`
   101         *  functions that would normally call `putch()` simply return
   102         *  (with an appropriate error status) without ever calling
   103         *  `{@link #putch}`.
   104         */
   105        Bool ready();
   106    }
   107    /*
   108     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   109     */
   110


interface xdc.runtime.ITimestampClient

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== ITimestampClient.xdc ========
    15     */
    16    package xdc.runtime;
    17
    18    /*!
    19     *  ======== ITimestampClient ========
    20     *  Timestamp Client Interface
    21     *
    22     *  This interface defines the methods used by client applications to
    23     *  get timestamp values.  It is implemented by the
    24     *  `{@link xdc.runtime.Timestamp Timestamp}` module.
    25     */
    26    @DirectCall
    27    interface ITimestampClient {
    28
    29        /*!
    30         *  ======== get32 ========
    31         *  Return a 32-bit timestamp
    32         *
    33         *  @a(returns)
    34         *  Returns a 32-bit timestamp value.
    35         *  Use `{@link #getFreq}` to convert this value into units of real time.
    36         *
    37         *  @see #get64
    38         */
    39        Bits32 get32();
    40
    41        /*!
    42         *  ======== get64 ========
    43         *  Return a 64-bit timestamp
    44         *
    45         *  @param(result)  pointer to 64-bit result
    46         *
    47         *      This parameter is a pointer to a structure representing a 64-bit
    48         *      wide timestamp value where the current timestamp is written.
    49         *
    50         *      If the underlying hardware does not support 64-bit resolution, the
    51         *      `hi` field of `result` is always set to 0; see
    52         *      `{@link xdc.runtime.Types#Timestamp64}`.  So, it is possible for
    53         *      the `lo` field to wrap around without any change to the `hi` field.
    54         *      Use `{@link #getFreq}` to convert this value into units of real
    55         *      time.
    56         *
    57         *  @see #get32
    58         */
    59        Void get64(Types.Timestamp64 *result);
    60
    61        /*!
    62         *  ======== getFreq ========
    63         *  Get the timestamp timer's frequency (in Hz)
    64         *
    65         *  @param(freq)  pointer to a 64-bit result
    66         *
    67         *      This parameter is a pointer to a structure representing a 64-bit
    68         *      wide frequency value where the timer's frequency (in Hz)
    69         *      is written; see `{@link xdc.runtime.Types#FreqHz}`.
    70         *      This function provides a way of converting timestamp
    71         *      values into units of real time.
    72         *
    73         *  @see #get32
    74         *  @see #get64
    75         */
    76        Void getFreq(Types.FreqHz *freq);
    77    }
    78    /*
    79     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    80     */
    81


interface xdc.runtime.ITimestampProvider

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== ITimestampProvider.xdc ========
    15     */
    16    package xdc.runtime;
    17
    18    /*!
    19     *  ======== ITimestampProvider ========
    20     *  Timestamp provider interface
    21     *
    22     *  This interface is implemented by platform-specific modules that
    23     *  "provide" underlying timestamp services for the
    24     *  `{@link xdc.runtime.Timestamp}` module.
    25     *
    26     *  Only the `{@link xdc.runtime.Timestamp}` module and the
    27     *  `{@link xdc.runtime.ITimestampClient}` interface should be directly
    28     *  referenced by platform-independent applications.
    29     *
    30     *  This interface is part of a design pattern that includes the
    31     *  `ITimestampClient` interface and the `Timestamp` module.  This pattern
    32     *  allows client code to:
    33     *  @p(blist)
    34     *      - use the platform-independent interfaces provided by either
    35     *        `ITimestampClient` and `Timestamp` and remain 100% portable
    36     *      - optionally leverage platform-specific capabilities
    37     *        of any module that implements `ITimestampProvider` and still always
    38     *        have access to the platform-independent methods specified by
    39     *        `ITimestampClient` (because `ITimestampProvider` inherits from
    40     *        `ITimestampClient`)
    41     *  @p
    42     *  This pattern is in contrast to other "provider" interfaces that exist only
    43     *  to specify the methods necessary to enable "higher-level" modules; client
    44     *  code *never* accesses these provider interfaces directly, clients always
    45     *  only use the higher-level modules.
    46     */
    47    interface ITimestampProvider inherits ITimestampClient {
    48    }
    49    /*
    50     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    51     */
    52


module xdc.runtime.Log

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Log.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== Log ========
    19     *  Event logging manager
    20     *
    21     *  RTSC modules and the application code generate `{@link #Event Log_Event}`
    22     *  events by calling the `Log` module's functions. The `Log` module then
    23     *  passes those events to an `{@link ILogger}` instance assigned to the event
    24     *  originating module, specified by that module's configuration parameter
    25     *  `common$.logger`. `ILogger` instances handle events, usually converting
    26     *  events to `{@link #EventRec Log_EventRec}` records prior to recording,
    27     *  transmitting, or displaying them.
    28     *
    29     *  All events generated by a target module are stored and displayed by an
    30     *  `ILogger`, examples of which are instances of
    31     *  `{@link LoggerBuf xdc.runtime.LoggerBuf}` or
    32     *  `{@link LoggerSys xdc.runtime.LoggerSys}`. At runtime, modules
    33     *  generate events through this module, rather than invoking directly their
    34     *  `ILogger`s. By doing so,  modules can be configured to use different
    35     *  `ILogger` implementations without any changes to their source code.
    36     *
    37     *  A logger instance can accept `Log` events from any module, but a module
    38     *  can put `Log` events to only one logger instance. There can be one or
    39     *  more logger instances in a system. All `Log` calls that are not in a
    40     *  module are controlled by the module `{@link Main xdc.runtime.Main}`.
    41     *  For example, top-level application code or any existing sources that
    42     *  simply call the `Log` or `Assert` methods implicitly use the logger
    43     *  associated with the `Main` module.
    44     *
    45     *  The generation of a `Log` event is controlled by a module's diagnostics
    46     *  mask, which is described in details in `{@link Diags}`. Each `Log` event
    47     *  is associated with a mask. `Log` events are generated only when a
    48     *  particular bit is set in both the `Log` event mask and the module's
    49     *  diagnostics mask. For example, a `Log` event mask with the
    50     *  `{@link Diags#USER1 USER1}` bit set is generated only when the `USER1`
    51     *  bit is also set in the module's diagnostics mask.
    52     *
    53     *  There are two ways to generate `Log` events:
    54     *
    55     *  @p(blist)
    56     *  - `{@link #write8 Log_write()}`, which is tailored for module writers
    57     *  and takes full advantage of the XDC configuration model. For example,
    58     *  the message string associated with the `Log` event need not be a part of
    59     *  the final application, significantly reducing the "footprint overhead"
    60     *  of embedding diagnostics in deployed systems. The `Log_write[0-8]()`
    61     *  functions allow up to 8 values to be passed to the logger. They expect
    62     *  the logger to handle any formatting. A `Log` event type allows you to
    63     *  specify the type of event.
    64     *  - `{@link #print6 Log_print()}`, which is designed for arbitrary C code.
    65     *  The `Log_print[0-6]()` functions allow up to 6 values to be passed along
    66     *  with a printf-like format string to the logger. They handle printf-style
    67     *  formatting.
    68     *  @p
    69     *
    70     *  Both functions are controlled by the module's diagnostics mask. Their
    71     *  storage or output is defined by the logger that is assigned to the
    72     *  module that calls the `Log` methods or to the
    73     *  `{@link Main xdc.runtime.Main}` module if the caller is not part of a
    74     *  module.
    75     *
    76     *  The `Log` function call sites are implemented in such a way that an
    77     *  optimizer can completely eliminate `Log` code from the program if the
    78     *  `Log` functions have been permanently disabled at configuration time. If
    79     *  the `Log` functions are permanently turned on at configuration time,
    80     *  then the optimizer can eliminate all runtime conditional checking and
    81     *  simply invoke the `Log` functions directly. Runtime checking is performed
    82     *  only when the `Log` functions are configured to be runtime modifiable.
    83     *
    84     *  The Log calls can also be completely removed by defining the symbol
    85     *  `xdc_runtime_Log_DISABLE_ALL`. This can be done on the compile line, e.g.
    86     *  `-Dxdc_runtime_Log_DISABLE_ALL`. This will completely remove the `Log`
    87     *  statements from any code compiled with this flag, regardless of the
    88     *  application's logging configuration or your compiler's optimization
    89     *  settings.
    90     *
    91     *  It is also possible to remove all logging except for
    92     *  `{@link #error Log_error}`, `{@link #warning Log_warning}`, or
    93     *  `{@link #info Log_info}` statements. This is done by first defining
    94     *  `xdc_runtime_Log_DISABLE_ALL`, followed by defining one or more of the
    95     *  symbols below to leave that type of logging enabled:
    96     *  @p(blist)
    97     *  - `xdc_runtime_Log_ENABLE_ERROR`
    98     *  - `xdc_runtime_Log_ENABLE_WARNING`
    99     *  - `xdc_runtime_Log_ENABLE_INFO`
   100     *  @p
   101     *  For example, to disable all `Log` statements except for `Log_error`, add
   102     *  the following to the compile line:
   103     *  @p(code)
   104     *      -Dxdc_runtime_Log_DISABLE_ALL -Dxdc_runtime_Log_ENABLE_ERROR
   105     *  @p
   106     *
   107     *  @a(Examples)
   108     *  Example 1: The following example defines a `Log` event, uses that `Log`
   109     *  event in a module, and configures the program to generate the `Log`
   110     *  event. In this example, both `USER1` and `USER2` bits are set in the
   111     *  event mask. This means that if either bit is set in the module's
   112     *  diagnostics mask, then the `Log` event will be generated.
   113     *
   114     *  This is a part of the XDC specification file for the `Mod` module
   115     *  (Mod.xdc):
   116     *
   117     *  @p(code)
   118     *  import xdc.runtime.Diags;
   119     *  import xdc.runtime.Log;
   120     *
   121     *  config Log.Event L_someEvent = {
   122     *      mask: Diags.USER1 | Diags.USER2,
   123     *      level: Diags.LEVEL1,
   124     *      msg: "my log event message, arg1: 0x%x, arg2: 0x%x"
   125     *  };
   126     *  @p
   127     *
   128     *  This is a part of the C code implementation of the Mod module:
   129     *
   130     *  @p(code)
   131     *  #include <xdc/runtime/Log.h>
   132     *  UInt x, y;
   133     *
   134     *  Log_write2(Mod_L_someEvent, (IArg)x, (IArg)y);
   135     *  @p
   136     *
   137     *  The following configuration script demonstrates how the application might
   138     *  control the `Log` statements embedded in the `Mod` module at configuration
   139     *  time. In this case, the configuration script arranges for the `Log`
   140     *  statements within the `Mod` module (shown above) to always generate events.
   141     *  Without these configuration statements, no `Log` events would be generated
   142     *  by this module.
   143     *
   144     *  This is part of the XDC configuration file for the application:
   145     *
   146     *  @p(code)
   147     *  var Diags = xdc.useModule('xdc.runtime.Diags');
   148     *  var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
   149     *  var Mod = xdc.useModule('my.pkg.Mod');
   150     *  Mod.common$.diags_USER1 = Diags.ALWAYS_ON;
   151     *  Mod.common$.logger = LoggerSys.create();
   152     *  @p
   153     *
   154     *  @p(html)
   155     *  <hr />
   156     *  @p
   157     *
   158     *  Example 2: The following XDC configuration statements turn on enter
   159     *  and exit logging at configuration time for a module. Without any other
   160     *  changes in the runtime code, every time a module `Mod`'s function is
   161     *  being called or exits, an event will be logged.
   162     *
   163     *  @p(code)
   164     *  var Diags = xdc.useModule('xdc.runtime.Diags');
   165     *  var Mod = xdc.useModule('my.pkg.Mod');
   166     *
   167     *  Mod.common$.diags_ENTER = Diags.ALWAYS_ON;
   168     *  Mod.common$.diags_EXIT = Diags.ALWAYS_ON;
   169     *  @p
   170     *
   171     *  @p(html)
   172     *  <hr />
   173     *  @p
   174     *
   175     *  Example 3: The following example configures a module to support enter and
   176     *  exit logging, but defers the actual activation and deactivation of the
   177     *  logging until runtime. See the `{@link Diags#setMask Diags_setMask()}`
   178     *  function for details on specifying the control string.
   179     *
   180     *  This is a part of the XDC configuration file for the application:
   181     *
   182     *  @p(code)
   183     *  var Diags = xdc.useModule('xdc.runtime.Diags');
   184     *  var Mod = xdc.useModule('my.pkg.Mod');
   185     *
   186     *  Mod.common$.diags_ENTER = Diags.RUNTIME_OFF;
   187     *  Mod.common$.diags_EXIT = Diags.RUNTIME_OFF;
   188     *  @p
   189     *
   190     *  This is a part of the C code for the application:
   191     *
   192     *  @p(code)
   193     *  // turn on enter and exit logging in the module
   194     *  Diags_setMask("my.pkg.Mod+EX");
   195     *
   196     *  // turn off enter and exit logging in the module
   197     *  Diags_setMask("my.pkg.Mod-EX");
   198     *  @p
   199     */
   200
   201    @CustomHeader
   202    @DirectCall
   203
   204    module Log {
   205
   206        /*!
   207         *  ======== NUMARGS ========
   208         *  Maximum number of arguments supported in `Log` events.
   209         */
   210        const Int NUMARGS = 8;
   211
   212        /*!
   213         *  ======== PRINTFID ========
   214         *  The `EventId` for `Log_print()` events
   215         */
   216        const EventId PRINTFID = 0;
   217
   218        /*!
   219         *  ======== EventDesc ========
   220         *  `Log` event descriptor
   221         *
   222         *  Each `Log` event is defined by a `Log` event descriptor.
   223         *
   224         *  The `mask` defines which bits in the module's diagnostics mask
   225         *  enable this `Log` event.  Events "posted" via `Log_write` are only
   226         *  written to the underlying logger if one of the mask's bits matches
   227         *  the caller's module diagnostics settings (see
   228         *  `{@link xdc.runtime.Types#common$}`).
   229         *
   230         *  The 'level' defines the event level of the event. While the diags
   231         *  bits selected in the 'mask' signify the "category" of the event (e.g.
   232         *  Entry/Exit, Analysis, Info), the 'level' field allows you to assign
   233         *  a "priority" or "detail level" to the event relative to other events in
   234         *  that category. There are four event levels defined by
   235         *  '{@link xdc.runtime.Diags#EventLevel}'.
   236         *
   237         *  Filtering of events by level is handled by the ILogger implementation.
   238         *  ILogger implementations which also implement the {@link IFilterLogger}
   239         *  interface support filtering of events based on priority level.
   240         *
   241         *  Specifying an event level is optional. Events that don't specify a
   242         *  level will receive Diags.LEVEL1 by default, making them the highest
   243         *  priority and ensuring that they will not inadvertently be filtered out
   244         *  by level-based filtering.
   245         *
   246         *  The `msg` defines a printf style format string that defines how to
   247         *  render the arguments passed along the event in a `Log_write` call.
   248         *  For a description of the allowable format strings see
   249         *  `{@link #print6}`.
   250         *
   251         *  @see #write8
   252         *  @see #print6
   253         */
   254        metaonly struct EventDesc {
   255            Diags.Mask          mask;   /*! event enable mask */
   256            Diags.EventLevel    level;  /*! event level relative to other events */
   257            String              msg;    /*! event "printf" message format string */
   258        };
   259
   260        /*!
   261         *  ======== EventRec ========
   262         *  The target representation of a recorded event
   263         *
   264         *  This structure defines how events are recorded on the target.
   265         */
   266        struct EventRec {
   267            Types.Timestamp64 tstamp;   /*! time event was written */
   268            Bits32 serial;              /*! serial number of event */
   269            Types.Event evt;            /*! target encoding of an Event */
   270            IArg arg[NUMARGS];          /*! arguments passed via Log_write/print */
   271        }
   272
   273        /*!
   274         *  ======== Event ========
   275         *  `Log` event type
   276         *
   277         *  An `Event` is represented on the target as a 32-bit value that can
   278         *  be decoded offline to recover the `Event` information defined in
   279         *  a corresponding metaonly `EventDesc`.  In addition, `Event`s may be
   280         *  decoded at runtime via methods provided in this module; see
   281         *  `{@link #getMask}` and `{@link #getEventId}`.
   282         *
   283         *  When an event is "raised" a `{@link Types#Event Types_Event}` is
   284         *  created which has the same event ID as the `Log_Event` but also
   285         *  encodes the module ID of the caller.  This new event is passed to
   286         *  the underlying `{@link ILogger}` module along with any arguments
   287         *  associated with the event.
   288         *
   289         *  @see #getMask
   290         *  @see #getEventId
   291         */
   292        @Encoded typedef EventDesc Event;
   293
   294        /*!
   295         *  ======== EventId ========
   296         *  Unique ID embedded in each `{@link #Event}`
   297         *
   298         *  This ID must be used to compare two `Event`s for equality.  Event
   299         *  ids are not guaranteed to remain constant between different
   300         *  configurations of an application.  For example, adding a module
   301         *  may cause the event ids of another module to change.
   302         *
   303         *  However, event ids declared by a module are guaranteed to be
   304         *  consecutive values starting from the first declared
   305         *  `{@link #Event Log_Event}` and increasing to the last declared
   306         *  event.  As a result, clients of a module can efficiently test ranges
   307         *  of events and modules can add new events, such as internal trace
   308         *  events, without breaking clients; simply be careful to add new events
   309         *  after any existing events in you module's `.xdc` specification.
   310         *
   311         *  @see #getEventId
   312         *  @see #Event
   313         */
   314        typedef Types.RopeId EventId;
   315
   316        /*!
   317         *  ======== L_construct ========
   318         *  Lifecycle event posted when an instance is constructed
   319         */
   320        config Log.Event L_construct = {
   321            mask: Diags.LIFECYCLE,
   322            msg: "<-- construct: %p('%s')"
   323        };
   324
   325        /*!
   326         *  ======== L_create ========
   327         *  Lifecycle event posted when an instance is created
   328         */
   329        config Log.Event L_create = {
   330            mask: Diags.LIFECYCLE,
   331            msg: "<-- create: %p('%s')"
   332        };
   333
   334        /*!
   335         *  ======== L_destruct ========
   336         *  Lifecycle event posted when an instance is destructed
   337         */
   338        config Log.Event L_destruct = {
   339            mask: Diags.LIFECYCLE,
   340            msg: "--> destruct: (%p)"
   341        };
   342
   343        /*!
   344         *  ======== L_delete ========
   345         *  Lifecycle event posted when an instance is deleted
   346         */
   347        config Log.Event L_delete = {
   348            mask: Diags.LIFECYCLE,
   349            msg: "--> delete: (%p)"
   350        };
   351
   352        /*!
   353         *  ======== L_error ========
   354         *  Error event posted by Log_errorX API
   355         *
   356         *  This event is marked as a STATUS event and given the priority level
   357         *  of ERROR.
   358         *
   359         *  This event prints the Log call site (%$F) and a format string (%$S)
   360         *  which is recursively formatted with any additional arguments.
   361         */
   362        config Log.Event L_error = {
   363            mask: Diags.STATUS,
   364            level: Diags.ERROR,
   365            msg: "ERROR: %$F%$S"
   366        };
   367
   368        /*!
   369         *  ======== L_warning ========
   370         *  Warning event posted by Log_warningX API
   371         *
   372         *  This event is marked as a STATUS event and given the priority level of
   373         *  WARNING.
   374         *
   375         *  This event prints the Log call site (%$F) and a format string (%$S)
   376         *  which is recursively formatted with any addition arguments.
   377         */
   378        config xdc.runtime.Log.Event L_warning = {
   379            mask: Diags.STATUS,
   380            level: Diags.WARNING,
   381            msg: "WARNING: %$F%$S"
   382        };
   383
   384        /*!
   385         *  ======== L_info ========
   386         *  Info event posted by Log_infoX API
   387         *
   388         *  This event is marked as an INFO event. The event priority is not
   389         *  specified in the event definition. Rather, it is specified as an
   390         *  argument to the Log_infoX APIs.
   391         *
   392         *  This event prints the Log call site (%$F) and a format string (%$S)
   393         *  which is recursively formatted with any addition arguments.
   394         */
   395        config xdc.runtime.Log.Event L_info = {
   396            mask: Diags.INFO,
   397            msg: "%$F%$S"
   398        };
   399
   400        /*!
   401         *  ======== L_start ========
   402         *  Benchmark event used to log the start of an operation
   403         *  @_nodoc
   404         *
   405         *  @a(Example)
   406         *   The following C code shows how to log a simple
   407         *   benchmark 'start' event along with a user-specified
   408         *   format string describing the event.
   409         *
   410         *  @p(code)
   411         *  #include <xdc/runtime/Log.h>
   412         *  ...
   413         *  Log_write2(Log_L_start, (IArg)"My benchmark event", (IArg)myUniqueId);
   414         *  Log_write2(Log_L_stop, (IArg)"My benchmark event", (IArg)myUniqueId);
   415         *  @p
   416         *
   417         *  @param(fmt)     a constant string that provides format specifiers for
   418         *                  up to 6 additional parameters
   419         *  @param(id)      a unique ID used to match benchmark start and stop
   420         *                  events
   421         */
   422        config xdc.runtime.Log.Event L_start = {
   423            mask: Diags.ANALYSIS,
   424            msg: "Start: %$S"};
   425
   426        /*!
   427         *  ======== L_stop ========
   428         *  Benchmark event used to log the end of an operation
   429         *  @_nodoc
   430         *
   431         *  @a(Example)
   432         *   The following C code shows how to log a simple
   433         *   benchmark 'stop' event along with a user-specified
   434         *   format string describing the event.
   435         *
   436         *  @p(code)
   437         *  #include <xdc/runtime/Log.h>
   438         *  ...
   439         *  Log_write2(Log_L_start, (IArg)"My benchmark event", (IArg)myUniqueId);
   440         *  Log_write2(Log_L_stop, (IArg)"My benchmark event", (IArg)myUniqueId);
   441         *  @p
   442         *
   443         *  @param(fmt)     a constant string that provides format specifiers for
   444         *                  up to 6 additional parameters
   445         *  @param(id)      a unique ID used to match benchmark start and stop
   446         *                  events
   447         */
   448        config xdc.runtime.Log.Event L_stop = {
   449            mask: Diags.ANALYSIS,
   450            msg: "Stop: %$S"};
   451
   452        /*!
   453         *  ======== L_startInstance ========
   454         *  Benchmark event used to log the start of an operation instance
   455         *  @_nodoc
   456         *
   457         *  Event parameter provides instance data to differentiate
   458         *  between multiple instances that can run in parallel.
   459         *
   460         *  @a(Example)
   461         *   The following C code shows how to log a benchmark
   462         *   'startInstance' event along with a user-specified
   463         *   instance identifier and a format string describing the event.
   464         *
   465         *  @p(code)
   466         *  #include <xdc/runtime/Log.h>
   467         *  ...
   468         *  Log_write3(Log_L_startInstance, (IArg)"My benchmark event", (IArg)uniqueId, (IArg)instId);
   469         *  ...
   470         *  Log_write3(Log_L_stopInstance, (IArg)"My benchmark event", (IArg)uniqueId, (IArg)instId);
   471         *  @p
   472         *
   473         *  @param(fmt)     a constant string that provides format specifiers for
   474         *                  up to 6 additional parameters
   475         *  @param(id)      a unique ID used to match benchmark start and stop
   476         *                  events
   477         *  @param(instId)  a unique instance ID that can be used to match
   478         *                  instance events
   479         */
   480        config xdc.runtime.Log.Event L_startInstance = {
   481            mask: Diags.ANALYSIS,
   482            msg: "StartInstance: %$S"
   483        };
   484
   485        /*!
   486         *  ======== L_stopInstance ========
   487         *  Benchmark event used to log the end of an operation instance
   488         *  @_nodoc
   489         *
   490         *  Event parameter provides instance data to differentiate
   491         *  between multiple instances that can run in parallel.
   492         *
   493         * @a(Example)
   494         *   The following C code shows how to log a benchmark
   495         *   'stopInstance' event along with a user-specified
   496         *   instance identifier and a format string describing the event.
   497         *
   498         *  @p(code)
   499         *  #include <xdc/runtime/Log.h>
   500         *  ...
   501         *  Log_write3(Log_L_startInstance, (IArg)"My benchmark event", (IArg)uniqueId, (IArg)instId);
   502         *  ...
   503         *  Log_write3(Log_L_stopInstance, (IArg)"My benchmark event", (IArg)uniqueId, (IArg)instId);
   504         *  @p
   505         *
   506         *  @param(fmt)     a constant string that provides format specifiers for
   507         *                  up to 6 additional parameters
   508         *  @param(id)      a unique ID used to match benchmark start and stop
   509         *                  events
   510         *  @param(instId)  a unique instance ID that can be used to match
   511         *                  instance events
   512         */
   513        config xdc.runtime.Log.Event L_stopInstance = {
   514            mask: Diags.ANALYSIS,
   515            msg: "StopInstance: %$S"
   516        };
   517
   518        /*!
   519         *  ======== getMask ========
   520         *  Get the `Diags` mask for the specified (encoded) event
   521         *
   522         *  @param(evt) the `Log` event encoding a mask and event ID
   523         *
   524         *  @a(returns) `Diags` mask for the specified event
   525         */
   526        @Macro Diags.Mask getMask(Event evt);
   527
   528        /*!
   529         *  ======== getRope ========
   530         *  Get RopeId of the Event.msg for the specified (encoded) event
   531         *  @_nodoc
   532         */
   533        @Macro Text.RopeId getRope(Event evt);
   534
   535        /*!
   536         *  ======== getEventId ========
   537         *  Get event ID of the specified (encoded) event
   538         *
   539         *  This method is used to compare "known" `Log` events with
   540         *  "raised" `{@link Types#Event Types_Event}`.
   541         *
   542         *  @param(evt) the `Log` event encoding a mask and event ID
   543         *
   544         *  @a(returns) event ID of the specified event
   545         *
   546         *  @see Types#getEventId
   547         */
   548        @Macro EventId getEventId(Event evt);
   549
   550        /*!
   551         *  ======== print0 ========
   552         *  Generate a `Log` "print event" with 0 arguments
   553         *
   554         *  @see #print6
   555         */
   556        @Macro Void print0(Diags.Mask mask, CString fmt);
   557
   558        /*!
   559         *  ======== print1 ========
   560         *  Generate a `Log` "print event" with 1 argument
   561         *
   562         *  @see #print6
   563         */
   564        @Macro Void print1(Diags.Mask mask, CString fmt, IArg a1);
   565
   566        /*!
   567         *  ======== print2 ========
   568         *  Generate a `Log` "print event" with 2 arguments
   569         *
   570         *  @see #print6
   571         */
   572        @Macro Void print2(Diags.Mask mask, CString fmt, IArg a1, IArg a2);
   573
   574        /*!
   575         *  ======== print3 ========
   576         *  Generate a `Log` "print event" with 3 arguments
   577         *
   578         *  @see #print6
   579         */
   580        @Macro Void print3(Diags.Mask mask, CString fmt, IArg a1, IArg a2,
   581            IArg a3);
   582
   583        /*!
   584         *  ======== print4 ========
   585         *  Generate a `Log` "print event" with 4 arguments
   586         *
   587         *  @see #print6
   588         */
   589        @Macro Void print4(Diags.Mask mask, CString fmt, IArg a1, IArg a2,
   590            IArg a3, IArg a4);
   591
   592        /*!
   593         *  ======== print5 ========
   594         *  Generate a `Log` "print event" with 5 arguments
   595         *
   596         *  @see #print6
   597         */
   598        @Macro Void print5(Diags.Mask mask, CString fmt, IArg a1, IArg a2,
   599            IArg a3, IArg a4, IArg a5);
   600
   601        /*!
   602         *  ======== print6 ========
   603         *  Generate a `Log` "print event" with 6 arguments
   604         *
   605         *  As a convenience to C (as well as assembly language) programmers,
   606         *  the `Log` module provides a variation of the ever-popular `printf`
   607         *  function.
   608         *  The `print[0-6]` functions generate a `Log` "print event" and route
   609         *  it to the current module's logger.
   610         *
   611         *  The arguments passed to `print[0-6]` may be characters, integers,
   612         *  strings, or pointers.  However, because the declared type of the
   613         *  arguments is `{@link xdc IArg}`, all pointer arguments must be cast
   614         *  to an `IArg` type.  `IArg` is an integral type large enough to hold
   615         *  any pointer or an `int`.  So, casting a pointer to an `IArg` does
   616         *  not cause any loss of information and C's normal integer conversions
   617         *  make the cast unnecessary for integral arguments.
   618         *
   619         *  The format string can use the following conversion characters.
   620         *  However, it is important to recall that all arguments referenced by
   621         *  these conversion characters have been converted to an `IArg`
   622         *  prior to conversion; so, the use of "length modifiers" should be
   623         *  avoided.
   624         *
   625         *  @p(code)
   626         *  Conversion Character    Description
   627         *  ------------------------------------------------
   628         *  %c                      Character
   629         *  %d                      Signed integer
   630         *  %u                      Unsigned integer
   631         *  %x                      Unsigned hexadecimal integer
   632         *  %o                      Unsigned octal integer
   633         *  %s                      Character string
   634         *  %p                      Pointer
   635         *  %f                      Single precision floating point (float)
   636         *  @p
   637         *
   638         *  Format strings, while very convenient, are a well known source of
   639         *  portability problems: each format specification must precisely match
   640         *  the types of the arguments passed. Underlying "printf" functions use
   641         *  the format string to determine how far to advance through their
   642         *  argument list. For targets where pointer types and integers are the
   643         *  same size there are no problems.  However, suppose a target's pointer
   644         *  type is larger than its integer type. In this case, because integer
   645         *  arguments are widened to be of type `IArg`, a format specification of
   646         *  "%d" causes an underlying `printf()` implementation to read the
   647         *  extended part of the integer argument as part of the next argument(!).
   648         *
   649         *  To get around this problem and still allow the use of "natural"
   650         *  format specifications (e.g., `%d` and `%x` with optional width
   651         *  specifications), `{@link System#aprintf()}` is used which assumes
   652         *  that all arguments have been widened to be of type `IArg`.
   653         *
   654         *  See `{@link System#printf}` for complete details.
   655         *
   656         *  The `%f` format specifier is used to print a single precision float
   657         *  value. Note that `%f` assumes that sizeof(Float) <= sizeof(IArg).
   658         *  Most clients that interpret float values expect that they are
   659         *  represented in IEEE 754 floating point format. Therefore, it is
   660         *  recommended that the float values be converted into that format prior
   661         *  to supplying the values to `Log` functions in cases where targets do
   662         *  not generate the float values in IEEE 754 floating point format by
   663         *  default.
   664         *
   665         *  The first argument to a `Log_print` call is the diags category to be
   666         *  associated with the event.
   667         *
   668         *  It is also possible to associate an event level with the event to
   669         *  enable filtering of events based on event level. Conceptually, it is
   670         *  best to regard the event level as completely separate from the event's
   671         *  diags category; however, the priority value actually occupies a part
   672         *  of the diags mask. For this reason, it is possible to specify an event
   673         *  level by OR'ing the level with the diags mask. For example, to print
   674         *  an `Diags_INFO` event of `Diags_LEVEL2`, you'd simply write:
   675         *  (Diags_INFO | Diags_LEVEL2)
   676         *
   677         *  Specifying an event level is optional. `Log_print` calls which do not
   678         *  specify a level will receive the highest priority by default.
   679         *
   680         *  @param(mask)    enable bits and optional detail level for this event
   681         *  @param(fmt)     a `printf` style format string
   682         *  @param(a1)      value for first format conversion character
   683         *  @param(a2)      value for second format conversion character
   684         *  @param(a3)      value for third format conversion character
   685         *  @param(a4)      value for fourth format conversion character
   686         *  @param(a5)      value for fifth format conversion character
   687         *  @param(a6)      value for sixth format conversion character
   688         *
   689         *  @a(Examples)
   690         *  The following example demonstrates a typical usage.
   691         *  @p(code)
   692         *  String  list[];
   693         *  UInt    i;
   694         *
   695         *  Log_print2(Diags_USER2, "list[%u] = %s\n", i, (IArg)list[i]);
   696         *  @p
   697         *  Note that the `IArg` cast above is only necessary for pointer
   698         *  arguments; C's normal parameter conversions implicitly convert
   699         *  integral arguments.
   700         *
   701         *  To simplify the conversion from `float` arguments to `IArg`,
   702         *  the standard header `xdc/std.h` provides a macro, named floatToArg(),
   703         *  to do this conversion in a type safe manner.  So, the following
   704         *  statement will print "`float = 2.3456`":
   705         *  @p(code)
   706         *    Log_print1(Diags_USER1, "float = %f", floatToArg(2.34567));
   707         *  @p
   708         *
   709         *  Note that, if you are formatting events on the target, you must
   710         *  also add support for floating point to ASCII conversion to
   711         *  `{@link System#printf}`; for more information, see the
   712         *  `{@link System#extendedFormats}` reference documenation.  For example:
   713         *  @p(code)
   714         *      var System = xdc.useModule('xdc.runtime.System');
   715         *      System.extendedFormats = "%f";
   716         *  @p
   717         */
   718        @Macro Void print6(Diags.Mask mask, CString fmt, IArg a1, IArg a2,
   719            IArg a3, IArg a4, IArg a5, IArg a6);
   720
   721        /*!
   722         *  ======== error0 ========
   723         *  Generate a `Log` "error event" with 0 arguments
   724         *
   725         *  @see #error5
   726         */
   727        @Macro Void error0(CString fmt);
   728
   729        /*!
   730         *  ======== error1 ========
   731         *  Generate a `Log` "error event" with 1 argument
   732         *
   733         *  @see #error5
   734         */
   735        @Macro Void error1(CString fmt, IArg a1);
   736
   737        /*!
   738         *  ======== error2 ========
   739         *  Generate a `Log` "error event" with 2 arguments
   740         *
   741         *  @see #error5
   742         */
   743        @Macro Void error2(CString fmt, IArg a1, IArg a2);
   744
   745        /*!
   746         *  ======== error3 ========
   747         *  Generate a `Log` "error event" with 3 arguments
   748         *
   749         *  @see #error5
   750         */
   751        @Macro Void error3(CString fmt, IArg a1, IArg a2, IArg a3);
   752
   753        /*!
   754         *  ======== error4 ========
   755         *  Generate a `Log` "error event" with 4 arguments
   756         *
   757         *  @see #error5
   758         */
   759        @Macro Void error4(CString fmt, IArg a1, IArg a2, IArg a3,
   760            IArg a4);
   761
   762        /*!
   763         *  ======== error5 ========
   764         *  Generate a `Log` "error event" with 5 arguments
   765         *
   766         *  The Log_error APIs are intended to allow users to easily log error
   767         *  events in their code. Similar to the Log_print APIs, Log_error does not
   768         *  require that you define an event. You simply pass an informative error
   769         *  string which can optionally be formatted with additional arguments. The
   770         *  error is logged with the predefined event {@link #L_error}.
   771         *
   772         *  Log_error prepends a string to the message which identifies it as an
   773         *  ERROR and specifies the filename and line number of the Log_error call
   774         *  site. A simple example:
   775         *
   776         *  @p(code)
   777         *  Log_error0("Invalid argument");
   778         *  @p
   779         *  This event will be formatted as (assuming that the above call was line
   780         *  35 of "MyCode.c")
   781         *  @p(code)
   782         *  ERROR at "MyCode.c", line 35: Invalid argument
   783         *  @p
   784         *
   785         *  Users may provide additional information in the error event, such as
   786         *  a predefined error code or details of the error. These additional
   787         *  values will be used to format the string passed to Log_error.
   788         *  @see #print6 for information about format strings.
   789         *
   790         *  Log_error does not use a variable length argument list--you must call
   791         *  the appropriate Log_errorX API based on the number of arguments.
   792         *
   793         *  @param(fmt)      a reference to a constant error string / fmt string
   794         *  @param(a1)       value for an additional parameter (e.g. an error code)
   795         *  @param(a2)       value for an additional parameter
   796         *  @param(a3)       value for an additional parameter
   797         *  @param(a4)       value for an additional parameter
   798         *  @param(a5)       value for an additional parameter
   799         *
   800         *  @a(Examples)
   801         *  The following example demonstrates a typical usage.
   802         *  @p(code)
   803         *  Int myArg;
   804         *
   805         *  Log_error1("Invalid argument: %d", myArg);
   806         *  @p
   807         *  The above event is formatted as, for example:
   808         *  @p(code)
   809         *  ERROR: "MyCode.c", line 35: Invalid argument: -1
   810         *  @p
   811         */
   812        @Macro Void error5(CString fmt, IArg a1, IArg a2, IArg a3,
   813            IArg a4, IArg a5);
   814
   815        /*!
   816         *  ======== warning0 ========
   817         *  Generate a `Log` "warning event" with 0 arguments
   818         *
   819         *  @see #warning5
   820         */
   821        @Macro Void warning0(CString fmt);
   822
   823        /*!
   824         *  ======== warning1 ========
   825         *  Generate a `Log` "warning event" with 1 argument
   826         *
   827         *  @see #warning5
   828         */
   829        @Macro Void warning1(CString fmt, IArg a1);
   830
   831        /*!
   832         *  ======== warning2 ========
   833         *  Generate a `Log` "warning event" with 2 arguments
   834         *
   835         *  @see #warning5
   836         */
   837        @Macro Void warning2(CString fmt, IArg a1, IArg a2);
   838
   839        /*!
   840         *  ======== warning3 ========
   841         *  Generate a `Log` "warning event" with 3 arguments
   842         *
   843         *  @see #warning5
   844         */
   845        @Macro Void warning3(CString fmt, IArg a1, IArg a2, IArg a3);
   846
   847        /*!
   848         *  ======== warning4 ========
   849         *  Generate a `Log` "warning event" with 4 arguments
   850         *
   851         *  @see #warning5
   852         */
   853        @Macro Void warning4(CString fmt, IArg a1, IArg a2, IArg a3,
   854            IArg a4);
   855
   856        /*!
   857         *  ======== warning5 ========
   858         *  Generate a `Log` "warning event" with 5 arguments
   859         *
   860         *  The Log_warning APIs provide the same features as the Log_error APIs,
   861         *  but are used to specifically log "warning" events.
   862         *  @see #error5
   863         *
   864         *  The Log_warning APIs are equivalent to the Log_error APIs except that
   865         *  they use the predefined {@link #L_warning} event. Log_warning prepends
   866         *  a string to the message which identifies it as a WARNING and specifies
   867         *  the filename and line number of the Log_warning call site.
   868         *
   869         *  @param(fmt)     reference to a constant warning string / fmt string
   870         *  @param(a1)      value for an additional parameter (e.g. a warning code)
   871         *  @param(a2)      value for an additional parameter
   872         *  @param(a3)      value for an additional parameter
   873         *  @param(a4)      value for an additional parameter
   874         *  @param(a5)      value for an additional parameter
   875         *
   876         *  @a(Examples)
   877         *  The following example demonstrates a typical usage.
   878         *  @p(code)
   879         *  Int myArg;
   880         *
   881         *  Log_warning1("Value may be too high: %d", myArg);
   882         *  @p
   883         *  The above event is formatted as:
   884         *  @p(code)
   885         *  WARNING: "MyCode.c", line 50: Value may be too high: 4096
   886         *  @p
   887         */
   888        @Macro Void warning5(CString fmt, IArg a1, IArg a2, IArg a3,
   889            IArg a4, IArg a5);
   890
   891        /*!
   892         *  ======== info0 ========
   893         *  Generate a `Log` "info event" with 0 arguments
   894         *
   895         *  @see #info5
   896         */
   897        @Macro Void info0(CString fmt);
   898
   899        /*!
   900         *  ======== info1 ========
   901         *  Generate a `Log` "info event" with 1 argument
   902         *
   903         *  @see #info5
   904         */
   905        @Macro Void info1(CString fmt, IArg a1);
   906
   907        /*!
   908         *  ======== info2 ========
   909         *  Generate a `Log` "info event" with 2 arguments
   910         *
   911         *  @see #info5
   912         */
   913        @Macro Void info2(CString fmt, IArg a1, IArg a2);
   914
   915        /*!
   916         *  ======== info3 ========
   917         *  Generate a `Log` "info event" with 3 arguments
   918         *
   919         *  @see #info5
   920         */
   921        @Macro Void info3(CString fmt, IArg a1, IArg a2, IArg a3);
   922
   923        /*!
   924         *  ======== info4 ========
   925         *  Generate a `Log` "info event" with 4 arguments
   926         *
   927         *  @see #info5
   928         */
   929        @Macro Void info4(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4);
   930
   931        /*!
   932         *  ======== info5 ========
   933         *  Generate a `Log` "info event" with 5 arguments
   934         *
   935         *  The Log_info APIs are provided for easily logging generic
   936         *  "informational" events with call site information. They are similar to
   937         *  the Log_print APIs in that they do not require you to define an event--
   938         *  you simply pass an informative printf-style string which can optionally
   939         *  be formatted with additional arguments. The info record is logged with
   940         *  the predefined event '{@link #L_info}'.
   941         *
   942         *  The Log_info APIs log the {@link #L_info} event which uses the 'INFO'
   943         *  diags category. They do not allow you to specify an event priority.
   944         *
   945         *  Log_info prepends the filename and line number of the call site to the
   946         *  message.
   947         *
   948         *  @param(fmt)     reference to a constant event string / fmt string
   949         *  @param(a1)      value for an additional parameter (e.g. an event code)
   950         *  @param(a2)      value for an additional parameter
   951         *  @param(a3)      value for an additional parameter
   952         *  @param(a4)      value for an additional parameter
   953         *  @param(a5)      value for an additional parameter
   954         *
   955         *  @a(Examples)
   956         *  The following example demonstrates a typical usage.
   957         *  @p(code)
   958         *  Int load;
   959         *
   960         *  Log_info1("Current load: %d", load);
   961         *  @p
   962         *  The above event is formatted as, for example:
   963         *  @p(code)
   964         *  "MyCode.c", line 15: Current load: 25
   965         *  @p
   966         */
   967        @Macro Void info5(CString fmt, IArg a1, IArg a2, IArg a3, IArg a4,
   968            IArg a5);
   969
   970         /*!
   971         *  ======== put0 ========
   972         *  Unconditionally put the specified Log event with 0 arguments
   973         *
   974         *  @see #put8
   975         */
   976        @Macro Void put0(Log.Event evt, Types.ModuleId mid);
   977
   978        /*!
   979         *  ======== put1 ========
   980         *  Unconditionally put the specified Log event and 1 argument
   981         *
   982         *  @see #put8
   983         */
   984        @Macro Void put1(Log.Event evt, Types.ModuleId mid, IArg a1);
   985
   986        /*!
   987         *  ======== put2 ========
   988         *  Unconditionally put the specified Log event and 2 arguments
   989         *
   990         *  @see #put8
   991         */
   992         @Macro Void put2(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2);
   993
   994        /*!
   995         *  ======== put4 ========
   996         *  Unconditionally put the specified Log event and 4 arguments
   997         *
   998         *  @see #put8
   999         */
  1000        @Macro Void put4(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2,
  1001                         IArg a3, IArg a4);
  1002
  1003        /*!
  1004         *  ======== put8 ========
  1005         *  Unconditionally put the specified Log event and 8 arguments
  1006         *
  1007         *  This method unconditionally puts the specified `{@link Event}`
  1008         *  `evt` into the log. The `{@link Types#ModuleId}` `mid` should be the
  1009         *  module ID of the module which is putting the event.
  1010         *
  1011         *  @param(evt)     the Log event to put into the log
  1012         *  @param(mid)     module ID of the module putting the event
  1013         *  @param(a1)      value for first format conversion character
  1014         *  @param(a2)      value for second format conversion character
  1015         *  @param(a3)      value for third format conversion character
  1016         *  @param(a4)      value for fourth format conversion character
  1017         *  @param(a5)      value for fifth format conversion character
  1018         *  @param(a6)      value for sixth format conversion character
  1019         *  @param(a7)      value for seventh format conversion character
  1020         *  @param(a8)      value for eighth format conversion character
  1021         */
  1022        @Macro Void put8(Log.Event evt, Types.ModuleId mid, IArg a1, IArg a2,
  1023                         IArg a3, IArg a4, IArg a5, IArg a6, IArg a7, IArg a8);
  1024
  1025        /*!
  1026         *  ======== write0 ========
  1027         *  Generate a `Log` event with 0 arguments
  1028         *
  1029         *  @see #write8
  1030         */
  1031        @Macro Void write0(Event evt);
  1032
  1033        /*!
  1034         *  ======== write1 ========
  1035         *  Generate a `Log` event with 1 argument
  1036         *
  1037         *  @see #write8
  1038         */
  1039        @Macro Void write1(Event evt, IArg a1);
  1040
  1041        /*!
  1042         *  ======== write2 ========
  1043         *  Generate a `Log` event with 2 arguments
  1044         *
  1045         *  @see #write8
  1046         */
  1047        @Macro Void write2(Event evt, IArg a1, IArg a2);
  1048
  1049        /*!
  1050         *  ======== write3 ========
  1051         *  Generate a `Log` event with 3 arguments
  1052         *
  1053         *  @see #write8
  1054         */
  1055        @Macro Void write3(Event evt, IArg a1, IArg a2, IArg a3);
  1056
  1057        /*!
  1058         *  ======== write4 ========
  1059         *  Generate a `Log` event with 4 arguments
  1060         *
  1061         *  @see #write8
  1062         */
  1063        @Macro Void write4(Event evt, IArg a1, IArg a2, IArg a3, IArg a4);
  1064
  1065        /*!
  1066         *  ======== write5 ========
  1067         *  Generate a `Log` event with 5 arguments
  1068         *
  1069         *  @see #write8
  1070         */
  1071        @Macro Void write5(Event evt, IArg a1, IArg a2, IArg a3, IArg a4, IArg a5);
  1072
  1073        /*!
  1074         *  ======== write6 ========
  1075         *  Generate a `Log` event with 6 arguments
  1076         *
  1077         *  @see #write8
  1078         */
  1079        @Macro Void write6(Event evt, IArg a1, IArg a2, IArg a3, IArg a4,
  1080                            IArg a5, IArg a6);
  1081
  1082        /*!
  1083         *  ======== write7 ========
  1084         *  Generate a `Log` event with 7 arguments
  1085         *
  1086         *  @see #write8
  1087         */
  1088        @Macro Void write7(Event evt, IArg a1, IArg a2, IArg a3, IArg a4,
  1089                            IArg a5, IArg a6, IArg a7);
  1090
  1091        /*!
  1092         *  ======== write8 ========
  1093         *  Generate a `Log` event with 8 arguments
  1094         *
  1095         *  If the mask in the specified `Log` event has any bit set which is
  1096         *  also set in the current module's diagnostics mask, then this call to
  1097         *  write will "raise" the given `Log` event.
  1098         *
  1099         *  @param(evt)     the `Log` event to write
  1100         *  @param(a1)      value for first format conversion character
  1101         *  @param(a2)      value for second format conversion character
  1102         *  @param(a3)      value for third format conversion character
  1103         *  @param(a4)      value for fourth format conversion character
  1104         *  @param(a5)      value for fifth format conversion character
  1105         *  @param(a6)      value for sixth format conversion character
  1106         *  @param(a7)      value for seventh format conversion character
  1107         *  @param(a8)      value for eighth format conversion character
  1108         */
  1109        @Macro Void write8(Event evt, IArg a1, IArg a2, IArg a3, IArg a4,
  1110                            IArg a5, IArg a6, IArg a7, IArg a8);
  1111
  1112        /*!
  1113         *  ======== doPrint ========
  1114         *  Render an event as text via `{@link System#printf System_printf}`
  1115         *
  1116         *  This method is not gated and may make more than one call to
  1117         *  `System_printf`.  This utility method is typically used within the
  1118         *  implementation of a logger which initializes
  1119         *  `{@link #EventRec Log_EventRec}` structures based on `Log` events
  1120         *  produced by the application.
  1121         *
  1122         *  @param(evRec)   a non`NULL` pointer to an initialized `Log_EventRec`
  1123         *                  structure to be formated via
  1124         *                  `{@link System#printf System_printf}`.
  1125         */
  1126        Void doPrint(EventRec *evRec);
  1127
  1128        /*!
  1129         *  @_nodoc
  1130         *  ======== lookupEventMessage ========
  1131         *  Returns the format string for the event with the given id.
  1132         */
  1133        function lookupEventMessage(eventId);
  1134
  1135        /*!
  1136         *  @_nodoc
  1137         *  ======== getTargetArgSize ========
  1138         *  Returns the target size of a record argument in bytes (not MAUs).
  1139         */
  1140        function getTargetArgSize();
  1141
  1142        /*!
  1143         *  @_nodoc
  1144         *  ======== lookupEventName ========
  1145         */
  1146        function lookupEventName(eventId);
  1147
  1148        /*!
  1149         *  @_nodoc
  1150         *  ======== lookupModuleName ========
  1151         */
  1152        function lookupModuleName(modId);
  1153
  1154        /*!
  1155         *  @_nodoc
  1156         *  ======== getTargetEventRecSize ========
  1157         *  Returns the record size in bytes (not MAUs).
  1158         */
  1159        function getTargetEventRecSize();
  1160
  1161    internal:
  1162
  1163        /*
  1164         *  ======== idToInfo ========
  1165         *  Map event ID strings into a string of the form <eventName>::<eventMsg>
  1166         */
  1167        metaonly config String idToInfo[string] = [];
  1168    }
  1169    /*
  1170     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
  1171     */
  1172


module xdc.runtime.LoggerBuf

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== LoggerBuf.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== LoggerBuf ========
    19     *  A logger which stores `Log` events in a buffer.
    20     *
    21     *  This module provides a logger which captures `{@link Log}` events to a
    22     *  buffer in realtime. The `Log` events stored in the buffer are
    23     *  unformatted; `Log` event formatting is deferred until some client reads
    24     *  the raw event data from the buffer. You can use
    25     *  `{@link #flush LoggerBuf_flush()}` to process the `Log` events stored
    26     *  in the buffer and stream the formatted output to stdout
    27     *  (via `{@link System#printf}`).  Alternatively, you can read a raw event
    28     *  (via `{@link #getNextEntry}`) and send it to another client that
    29     *  has the resources to format the event for display.
    30     *
    31     *  The implementation of this logger is fast with minimal stack usage
    32     *  making it appropriate for a realtime application.
    33     *  This logger writes all `Log` events to a circular buffer.  As a
    34     *  result, the execution time of all `Log` methods bound to this type
    35     *  of logger are deterministic (and quite short) because there are no
    36     *  additional memory allocation calls after the circular buffer was
    37     *  allocated.
    38     *
    39     *  If this logger is used in a preemptive environment, then an appropriate
    40     *  gate must be assigned to the module. For example, if events are generated
    41     *  from an interrupt context, then a gate that disables interrupts
    42     *  must be used.
    43     *
    44     *  @p(code)
    45     *  var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
    46     *  LoggerBuf.common$.gate = ...some gate instance...
    47     *  @p
    48     *
    49     *  If the buffer type is circular, the log buffer of size
    50     *  `{@link #numEntries}` contains the last `numEntries` of `Log` events. If
    51     *  the buffer type is fixed, the log buffer contains the first
    52     *  `numEntries` events.
    53     *
    54     *  LoggerBuf supports routing of 'STATUS' events (errors and warnings) to a
    55     *  separate ILogger instance. This is helpful in preserving these critical
    56     *  events, which may otherwise be overwritten by lower priority events. This
    57     *  feature is disabled by default. See {@link #statusLogger}.
    58     *
    59     *  LoggerBuf implements the {@link IFilterLogger} interface and
    60     *  optionally supports filtering of events based on their detail level. This
    61     *  feature is disabled by default. See {@link IFilterLogger}.
    62     *
    63     *  @a(Examples)
    64     *  Configuration example: The following XDC configuration statements
    65     *  create a logger instance, assign it as the default logger for all
    66     *  modules, and enable `USER1` logging in all modules of the package
    67     *  `my.pkg`. See the `{@link Diags#setMaskMeta Diags.setMaskMeta()}` function
    68     *  for details on specifying the module names.
    69     *
    70     *  @p(code)
    71     *  var Defaults = xdc.useModule('xdc.runtime.Defaults');
    72     *  var Diags = xdc.useModule('xdc.runtime.Diags');
    73     *  var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
    74     *
    75     *  LoggerBuf.enableFlush = true;
    76     *  var LoggerBufParams = new LoggerBuf.Params();
    77     *  LoggerBufParams.exitFlush = true;
    78     *  Defaults.common$.logger = LoggerBuf.create(LoggerBufParams);
    79     *  Diags.setMaskMeta("my.pkg.%", Diags.USER1, Diags.RUNTIME_ON);
    80     *  @p
    81     */
    82
    83    @ModuleStartup      /* Initialize static instances */
    84    @InstanceFinalize   /* this mod has cleanup fxn when instances are deleted */
    85    @InstanceInitError  /* instance create can fail */
    86    @Gated
    87
    88    module LoggerBuf inherits IFilterLogger {
    89
    90        /*!
    91         *  ======== BufType ========
    92         *  Type of log buffer
    93         */
    94        enum BufType {
    95            BufType_CIRCULAR,  /*! The log buffer wraps, overwriting old entries */
    96            BufType_FIXED      /*! The log buffer halts collection when full */
    97        };
    98
    99        metaonly struct BasicView {
   100            String label;
   101            Int lastSerial;
   102            UInt numEntries;
   103            String type;
   104            Bool enabledFlag;
   105        };
   106
   107        metaonly struct RecordView {
   108            Int     serial;
   109            Long    timestampRaw;
   110            String  modName;
   111            String  text;
   112            Int     eventId;
   113            String  eventName;
   114            IArg    arg0;
   115            IArg    arg1;
   116            IArg    arg2;
   117            IArg    arg3;
   118            IArg    arg4;
   119            IArg    arg5;
   120            IArg    arg6;
   121            IArg    arg7;
   122        }
   123
   124        /*!
   125         *  ======== rovViewInfo ========
   126         *  @_nodoc
   127         */
   128        @Facet
   129        metaonly config xdc.rov.ViewInfo.Instance rovViewInfo =
   130            xdc.rov.ViewInfo.create({
   131                viewMap: [
   132                    ['Basic',
   133                        {
   134                            type: xdc.rov.ViewInfo.INSTANCE,
   135                            viewInitFxn: 'viewInitBasic',
   136                            structName: 'BasicView'
   137                        }
   138                    ],
   139                    ['Records',
   140                        {
   141                            type: xdc.rov.ViewInfo.INSTANCE_DATA,
   142                            viewInitFxn: 'viewInitRecords',
   143                            structName: 'RecordView'
   144                        }
   145                    ]
   146                ]
   147            });
   148
   149        /*!
   150         *  ======== StopModeData ========
   151         *  Data added to the RTA MetaData file to support stop mode RTA
   152         */
   153        @XmlDtd metaonly struct StopModeData {
   154            String bufferSymbol;
   155            Int bufferSize;
   156        }
   157
   158        /*!
   159         *  ======== E_badLevel ========
   160         *  Error raised if get or setFilterLevel receives a bad level value
   161         */
   162        config Error.Id E_badLevel =
   163            {msg: "E_badLevel: Bad filter level value: %d"};
   164
   165        /*!
   166         *  ======== TimestampProxy ========
   167         *  User supplied time-stamp proxy
   168         *
   169         *  This proxy allows `LoggerBuf` to use a timestamp server different
   170         *  from the server used by `{@link xdc.runtime.Timestamp}`. However, if
   171         *  not supplied by a user, this proxy defaults to whichever timestamp
   172         *  server is used by `Timestamp`.
   173         */
   174        proxy TimestampProxy inherits ITimestampClient;
   175
   176        /*!
   177         *  ======== enableFlush ========
   178         *  Flush all logs at system exit
   179         */
   180        config Bool enableFlush = false;
   181
   182        /*!
   183         *  ======== statusLogger ========
   184         *  Route all 'STATUS' (error and warning) events to this logger.
   185         *
   186         *  If a statusLogger is specified, all LoggerBuf instances will check to
   187         *  determine if any of the events they receive are errors or warnings (if
   188         *  their diags mask includes the STATUS category), and will log these
   189         *  events to the statusLogger.
   190         *
   191         *  Error events are infrequent, but it's generally critical that they be
   192         *  seen. In a typical system, non-error events easily outnumber any error
   193         *  events, and the logger is likely to wrap, overwriting any error events.
   194         *  To protect these events from being overwritten and lost, they can be
   195         *  sent to their own separate logger to preserve them.
   196         *
   197         *  The default value is null, indicating that the STATUS events will just
   198         *  be logged by the logger they were sent to.
   199         */
   200        config ILogger.Handle statusLogger = null;
   201
   202        /*!
   203         *  ======== level1Mask ========
   204         *  Mask of diags categories whose initial filtering level is Diags.LEVEL1
   205         *
   206         *  See '{@link #level4Mask}' for details.
   207         */
   208        config Diags.Mask level1Mask = 0;
   209
   210        /*!
   211         *  ======== level2Mask ========
   212         *  Mask of diags categories whose initial filtering level is Diags.LEVEL2
   213         *
   214         *  See '{@link #level4Mask}' for details.
   215         */
   216        config Diags.Mask level2Mask = 0;
   217
   218        /*!
   219         *  ======== level3Mask ========
   220         *  Mask of diags categories whose initial filtering level is Diags.LEVEL3
   221         *
   222         *  See '{@link #level4Mask}' for details.
   223         */
   224        config Diags.Mask level3Mask = 0;
   225
   226        /*!
   227         *  ======== level4Mask ========
   228         *  Mask of diags categories whose initial filtering level is Diags.LEVEL4
   229         *
   230         *  If `{@link IFilterLogger.filterByLevel}` is `true`, then all
   231         *  `LoggerBuf` instances will filter incoming events based on their
   232         *  event level.
   233         *
   234         *  The `LoggerBuf` module allows for specifying a different filter level
   235         *  for every `Diags` bit. These filtering levels are module wide;
   236         *  `LoggerBuf` does not support specifying the levels on a per-instance
   237         *  basis.
   238         *
   239         *  The `{@link IFilterLogger.setFilterLevel}` function can be used to
   240         *  change the filtering levels at runtime.
   241         *
   242         *  The default filtering levels are assigned using the `level1Mask` -
   243         *  `level4Mask` config parameters. These are used to specify, for each of
   244         *  the four event levels, the set of bits which should filter at that
   245         *  level by default.
   246         *
   247         *  The default filtering configuration sets the filter level to
   248         *  `Diags.LEVEL4` for all logging-related diags bits so that all events
   249         *  are logged by default.
   250         */
   251        config Diags.Mask level4Mask = Diags.ALL_LOGGING;
   252
   253        /*!
   254         *  ======== flushAll ========
   255         *  Flush logs of all instances that set `exitFlush` to true
   256         *
   257         *  The user is responsible for making sure that no `LoggerBuf` instances
   258         *  are created or deleted during the execution of this function.
   259         */
   260        Void flushAll();
   261
   262        /*!
   263         *  ======== flushAllInternal ========
   264         *  @_nodoc
   265         */
   266        Void flushAllInternal(Int stat);
   267
   268        /*!
   269         *  ======== initDecoder ========
   270         * @_nodoc
   271         *  Initialize the LoggerBufDecoder for use in the LoggerBuf 'Records' ROV
   272         *  view.
   273         */
   274        function initDecoder();
   275
   276    instance:
   277        /*!
   278         *  ======== create ========
   279         *  Create a `LoggerBuf` logger
   280         *
   281         *  @see LoggerBuf#Params
   282         */
   283        create();
   284
   285        /*!
   286         *  ======== numEntries ========
   287         *  Number of entries in buffer
   288         *
   289         *  Each entry is large enough to store one `Log` event containing up to
   290         *  4 optional arguments.  Events containing more than 4 arguments (such
   291         *  as those from `{@link Log#write5}`) use 2 entries.
   292         *
   293         *  `numEntries` must be a power of 2.
   294         */
   295        config UInt numEntries = 64;
   296
   297        /*!
   298         *  ======== bufType ========
   299         *  Log buffer type
   300         */
   301        config BufType bufType = BufType_CIRCULAR;
   302
   303        /*!
   304         *  ======== exitFlush ========
   305         *  Flush log at system exit
   306         *
   307         *  Only used when module parameter `{@link #enableFlush}` is `true`.
   308         */
   309        config Bool exitFlush = false;
   310
   311        /*!
   312         *  ======== bufSection ========
   313         *  Section name for the buffer managed by the static instance.
   314         *
   315         *  The default section is the 'dataSection' in the platform.
   316         */
   317        metaonly config String bufSection = null;
   318
   319        /*!
   320         *  ======== bufHeap ========
   321         *  The heap that contains the `Log` buffer for dynamic instances.
   322         *
   323         *  The default value `null` means the buffer will be allocated from
   324         *  the `{@link Memory#defaultHeapInstance}` heap.
   325         */
   326        config IHeap.Handle bufHeap = null;
   327
   328        /*!
   329         *  ======== reset ========
   330         *  Reset a log to empty state and enable it
   331         *
   332         *  @a(WARNING)  This method is not synchronized with other instance
   333         *  methods and, as a result, it must never be called when there is a
   334         *  chance that another instance method is currently in operation or
   335         *  when another method on this instance may preempt this call.
   336         */
   337        Void reset();
   338
   339        /*!
   340         *  ======== flush ========
   341         *  Read, clear, and output the contents of the log
   342         *
   343         *  This method reads, clears, and "prints" each `Log` event (via
   344         *  `{@link System#printf}`) in the log.
   345         */
   346        Void flush();
   347
   348        /*!
   349         *  ======== getNextEntry ========
   350         *  Fills the passed `{@link Log#EventRec}` with the next entry in the log.
   351         *
   352         *  This function is used to read and clear `Log` events from the
   353         *  buffer maintained by the `LoggerBuf` instance. The `Log` event can
   354         *  then be transmitted and displayed on a host.
   355         *
   356         *  A read pointer is maintained in the `LoggerBuf` instance and
   357         *  points to the next record to read.  Entries are not necessarily
   358         *  returned in chronological order, since buffers of type
   359         *  `{@link #BufType_CIRCULAR}` can wrap.
   360         *
   361         *  @param(evtRec) pointer to a supplied `EventRec` object where the next
   362         *                 entry in the log is copied to
   363         *
   364         *  @a(returns)
   365         *  This function reports the number of entries actually read. The only
   366         *  values that can be returned are:
   367         *  @p(blist)
   368         *      - 0   no more entries to read
   369         *      - 1 or 2 read a complete entry written by `write4` or `write8`
   370         *      - -1  cleared an incomplete/overwritten entry, more entries to read
   371         */
   372        Int getNextEntry(Log.EventRec *evtRec);
   373
   374    internal:
   375
   376        Bool filterOutEvent(Diags.Mask mask);
   377
   378        const Int8 FULL = -1;
   379        const Int8 WRAP = 0;
   380
   381        const Int8 NEXT = 1;
   382
   383        struct Entry {
   384            Types.Timestamp64 tstamp;
   385            Bits32 serial;
   386            Types.Event evt;
   387            IArg arg1;
   388            IArg arg2;
   389            IArg arg3;
   390            IArg arg4;
   391        };
   392
   393        struct Module_State {
   394            Diags.Mask level1;
   395            Diags.Mask level2;
   396            Diags.Mask level3;
   397        };
   398
   399        struct Instance_State {
   400            IHeap.Handle bufHeap;
   401            Entry entryArr[];
   402            Entry *curEntry;
   403            Entry *endEntry;
   404            Entry *readEntry;
   405            Bits32 serial;
   406            UInt16 numEntries;
   407            Int8 advance;
   408            Bool enabled;
   409            Bool flush;
   410        };
   411
   412    }
   413    /*
   414     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   415     */
   416


module xdc.runtime.LoggerCallback

     1    /*
     2     *  Copyright (c) 2012-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== LoggerCallback.xdc ========
    15     */
    16    package xdc.runtime;
    17    /*!
    18     *  ======== LoggerCallback ========
    19     *  A logger that passes events to a user supplied callback function
    20     *
    21     *  @a(Examples)
    22     *  Configuration example: The following XDC configuration statements
    23     *  create a logger instance, plug in the user defined functions, assign it as
    24     *  the default logger for all modules, and enable `USER1` logging in all
    25     *  modules of the package `my.pkg`. See the
    26     *  `{@link Diags#setMaskMeta Diags.setMaskMeta()}` function for details on
    27     *  specifying the module names.
    28     *
    29     *  @p(code)
    30     *  var Defaults = xdc.useModule('xdc.runtime.Defaults');
    31     *  var Diags = xdc.useModule('xdc.runtime.Diags');
    32     *  var LoggerCallback = xdc.useModule('xdc.runtime.LoggerCallback');
    33     *  LoggerCallback.outputFxn = "&userOutputFunc";
    34     *  LoggerCallback.createInstFxn = "&userCreateInstFunc";
    35     *
    36     *  var loggerParams = new Logger.Params();
    37     *  loggerParams.arg = 1;
    38     *  Defaults.common$.logger = LoggerCallback.create(loggerParams);
    39     *  Diags.setMaskMeta("my.pkg.%", Diags.USER1, Diags.RUNTIME_ON);
    40     *  @p
    41     */
    42    @ModuleStartup
    43    module LoggerCallback inherits ILogger {
    44
    45        /*!
    46         *  ======== OutputFxn ========
    47         *  Character output callback function signature
    48         *
    49         *  The first argument is the parameter returned by the call to
    50         *  `createInstFxn`.
    51         *  The second argument is a pointer to `{@link Log#EventRec}` record.
    52         *  The third argument is the number of arguments in`{@link Log#EventRec}`
    53         *
    54         *  Note: Only evt and arg fields in `Log_EventRec` record are filled and
    55         *        passed to the user supplied function.
    56         */
    57        typedef Void (*OutputFxn)(UArg, Log.EventRec *, Int);
    58
    59        /*!
    60         *  ======== defaultOutput ========
    61         *  Default output function (always does nothing)
    62         */
    63        extern Void defaultOutput(UArg, Log.EventRec *, Int)
    64            = xdc_runtime_LoggerCallback_defaultOutput;
    65
    66        /*!
    67         *  ======== CreateInstFxn ========
    68         *  Logger instance create callback function signature
    69         *
    70         *  `{@link LoggerCallback#arg}` is passed as an argument to this function.
    71         *  The return value from this function will be passed as an argument
    72         *  to the `outputFxn`. In case of multiple LoggerCallback instances, the
    73         *  return value can be used in `outputFxn` to differentiate among the
    74         *  instances.
    75         */
    76        typedef UArg (*CreateInstFxn)(UArg);
    77
    78        /*!
    79         *  ======== defaultCreate ========
    80         *  Default create function (always returns 0)
    81         */
    82        extern UArg defaultCreate(UArg) = xdc_runtime_LoggerCallback_defaultCreate;
    83
    84        /*!
    85         *  ======== outputFxn ========
    86         *  User supplied character callback function
    87         *
    88         *  This function is called when the `Log` module needs to output an event.
    89         *  e.g. `{@link Log#write4()}` or `{@link Log#print2()}`
    90         *
    91         *  By default, this function is configured with a default output function.
    92         *  The default function does nothing and returns.
    93         */
    94        config OutputFxn outputFxn = "&xdc_runtime_LoggerCallback_defaultOutput";
    95
    96        /*!
    97         *  ======== createInstFxn ========
    98         *  User supplied logger instance create function
    99         *
   100         *  This function is called when the `{@link LoggerCallback#create}` is
   101         *  called.
   102         *
   103         *  By default, this function is configured with a default create function.
   104         *  The default create function always returns `0`.
   105         */
   106        config CreateInstFxn createInstFxn = "&xdc_runtime_LoggerCallback_defaultCreate";
   107
   108    instance:
   109
   110        /*!
   111         *  ======== create ========
   112         *  Create a `LoggerCallback` logger instance
   113         */
   114        create();
   115
   116        /*!
   117         *  ======== arg ========
   118         *  User supplied argument for the user supplied create function.
   119         *
   120         *  This user supplied argument will be passed back as an argument to the
   121         *  `createInstFxn` function. It can be used by the
   122         *  `{@link LoggerCallback#createInstFxn}` function at runtime to
   123         *  differentiate between the multiple logger instances configured in the
   124         *  user config script.
   125         *
   126         *  The user can skip configuring this argument. In such a case, the
   127         *  default value `0` will be passed back as an argument to the
   128         *  `createInstFxn` function.
   129         */
   130        config UArg arg = 0;
   131
   132    internal:
   133
   134        struct Instance_State {
   135            Bool enabled;  /* Logger state */
   136            UArg context;  /* Logger instance */
   137            UArg arg;      /* Logger instance create argument */
   138        };
   139    }
   140    /*
   141     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   142     */
   143


module xdc.runtime.LoggerSys

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== LoggerSys.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== LoggerSys ========
    19     *  A logger which routes events to the `System_printf` function.
    20     *
    21     *  This logger processes log events as they are generated and routes
    22     *  them through the `{@link System#printf System_printf()}` function.
    23     *  The final disposition of the log event is dependent on which system
    24     *  provider has been assigned to the
    25     *  `{@link System#SupportProxy System.SupportProxy}` configuration parameter.
    26     *
    27     *  Note that the log events are processed within the runtime context
    28     *  of the `{@link Log Log_write()}` or `{@link Log Log_print()}` function
    29     *  that generated the event. It is important to account for the processing
    30     *  overhead and stack usage imposed on the runtime context. The cost of
    31     *  this processing is defined by the implementation of the system provider.
    32     *
    33     *  @a(Examples)
    34     *  Configuration example: The following XDC configuration statements
    35     *  create a logger instance, assign it as the default logger for all
    36     *  modules, and enable `USER1` logging in all modules of the package
    37     *  `my.pkg`. See the `{@link Diags#setMaskMeta Diags.setMaskMeta()}` function
    38     *  for details on specifying the module names.
    39     *
    40     *  @p(code)
    41     *  var Defaults = xdc.useModule('xdc.runtime.Defaults');
    42     *  var Diags = xdc.useModule('xdc.runtime.Diags');
    43     *  var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
    44     *
    45     *  var LoggerSysParams = new LoggerSys.Params();
    46     *  Defaults.common$.logger = LoggerSys.create(LoggerSysParams);
    47     *  Diags.setMaskMeta("my.pkg.%", Diags.USER1, Diags.RUNTIME_ON);
    48     *  @p
    49     */
    50
    51    module LoggerSys inherits ILogger {
    52
    53        /*!
    54         *  ======== ITimestampProxy ========
    55         *  User supplied time-stamp proxy
    56         *
    57         *  This proxy allows `LoggerSys` to use a timestamp server different
    58         *  from the server used by `{@link xdc.runtime.Timestamp}`. However, if
    59         *  not supplied by a user, this proxy defaults to whichever timestamp
    60         *  server is used by `Timestamp`.
    61         */
    62        proxy TimestampProxy inherits ITimestampClient;
    63
    64    instance:
    65
    66        /*!
    67         *  ======== create ========
    68         *  Create a `LoggerSys` logger
    69         *
    70         *  The logger instance will route all log events it receives to
    71         *  the {@link System#printf} function.
    72         */
    73        create();
    74
    75    internal:
    76
    77        struct Instance_State {
    78            Bool enabled;
    79        };
    80    }
    81    /*
    82     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    83     */
    84


module xdc.runtime.Main

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Main.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Main ========
    21     *  Configuration "stand-in" for application code.
    22     *
    23     *  This module is used to enable "module" configuration of application code
    24     *  that is not part of a module.  Configuration of this `Main` module is
    25     *  used for all code not in a module.
    26     *
    27     *  For example, an `ILogger` "service provider" for all code that is not in
    28     *  a RTSC module can be configured by setting this module's `logger`;  when
    29     *  code that is not in a module calls `Log_print()`, for example, this
    30     *  module's `ILogger` handles the event.
    31     *
    32     *  Since this module is "gated", the user can also assign a gate to this
    33     *  module for use by any code that is not in a module.  This gate can be used
    34     *  to serialize access to global data by multiple threads in the system.
    35     *  @p(code)
    36     *      #include <xdc/runtime/Main.h>
    37     *      #include <xdc/runtime/Gate.h>
    38     *          :
    39     *      int global = 0;
    40     *      int main() {
    41     *          :       // create a bunch of threads
    42     *      }
    43     *
    44     *      void thread() {
    45     *          IArg key = Gate_enterModule();  // enter critical section
    46     *          global++;                       // safely update global data
    47     *          Gate_leaveModule(key);          // leave critical section
    48     *      }
    49     *  @p
    50     */
    51    @Gated
    52    module Main {
    53    };
    54
    55    /*
    56     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    57     */
    58


module xdc.runtime.Memory

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Memory.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== Memory ========
    19     *  Static and run-time memory manager
    20     *
    21     *  All memory allocations are performed either by
    22     *  `{@link #staticPlace Memory.staticPlace()}` at build time or through
    23     *  `{@link #alloc Memory_alloc()}` (or its varients `Memory_calloc()`,
    24     *  `Memory_valloc()`, etc.) at run-time.
    25     *
    26     *  Run-time memory management is performed by modules that
    27     *  implement the `{@link xdc.runtime.IHeap}` interface.  The `Memory` module
    28     *  itself simply provides a common interface for any variety of system and
    29     *  application specific memory management policies implemented by `IHeap`
    30     *  modules; for example, `{@link HeadStd}` and `{@link HeadMin}`.
    31     *
    32     *  Heap instances are created statically or dynamically via heap specific
    33     *  create functions and these instances are then passed as an input
    34     *  parameter to the `Memory` calls that have a
    35     *  `{@link xdc.runtime.IHeap#Handle}` parameter.
    36     */
    37    @DirectCall
    38    module Memory {
    39
    40        /*!
    41         *  ======== Q_BLOCKING ========
    42         *  Blocking quality
    43         *
    44         *  `{@link xdc.runtime.IHeap}`s with this "quality" may cause the
    45         *  calling thread to block; i.e., suspend execution until another thread
    46         *  leaves the gate.
    47         */
    48        const Int Q_BLOCKING = 1;
    49
    50        /*!
    51         *  ======== Size ========
    52         *  Type to be used to specify heap buffer sizes
    53         */
    54        typedef UArg Size;
    55
    56        /*!
    57         *  ======== Stats ========
    58         *  Memory heap statistics
    59         *
    60         *  This structure defines generic statistics that must be supplied
    61         *  by each module that implements the `{@link xdc.runtime.IHeap}`
    62         *  interface.
    63         *
    64         *  @field(totalSize)         total size (in MADUs) of heap.
    65         *  @field(totalFreeSize)     current size (in MADUs) of free memory in
    66         *                            the heap
    67         *  @field(largestFreeSize)   current largest contiguous free block
    68         *                            (in MADUs)
    69         */
    70        struct Stats {
    71            Size totalSize;
    72            Size totalFreeSize;
    73            Size largestFreeSize;
    74        };
    75
    76        /*! @_nodoc */
    77        @XmlDtd
    78        metaonly struct Module_View {
    79            SizeT maxDefaultTypeAlignment;
    80        };
    81
    82        /*!
    83         *  ======== defaultHeapInstance ========
    84         *  The default heap.
    85         *
    86         *  If no heap is specified in the `Memory` module's methods (i.e.
    87         *  heap == `NULL`) `defaultHeapInstance` is used. If
    88         *  `defaultHeapInstance` is not set (or set to `null`), a
    89         *  `{@link xdc.runtime.HeapStd}` heap instance is created and assigned
    90         *  to this configuration parameter. The size of the heap is determined
    91         *  by the `{@link #xdc.runtime.HeapStd.HEAP_MAX}` parameter.
    92         *
    93         *  By default, all modules are configured with a `null` instance heap.
    94         *  Instances created by modules with a `null` instance heap are
    95         *  allocated from the `defaultHeapInstance` heap.
    96         */
    97        config IHeap.Handle defaultHeapInstance;
    98
    99        /*!
   100         *  ======== defaultHeapSize ========
   101         *  The size (in target MADUs) of the `defaultHeapInstance`.
   102         *
   103         *  This parameters is used when the `{@link #defaultHeapInstance}`
   104         *  is not configured.
   105         */
   106        metaonly config int defaultHeapSize = 0x1000;
   107
   108        /*!
   109         *  ======== alloc ========
   110         *  Allocate a block of memory from a heap.
   111         *
   112         *  @param(heap)    heap from which the memory is allocated
   113         *
   114         *                  The `heap` is created by a module that implements
   115         *                  the `{@link xdc.runtime.IHeap}` interface.
   116         *                  If `heap` is `NULL`, the
   117         *                  `{@link #defaultHeapInstance}` is used.
   118         *
   119         *  @param(size)    requested memory block size (in MADUs)
   120         *  @param(align)   alignment (in MADUs) of the block of memory
   121         *
   122         *                  A value of 0 denotes maximum default type alignment.
   123         *
   124         *  @param(eb)      pointer to error block
   125         *
   126         *  @a(returns)
   127         *  If the allocation was successful, `Memory_alloc()` returns non-`NULL`
   128         *  pointer to the allocated and uninitialized block; otherwise it returns
   129         *  `NULL` and the error block will indicate the cause of the error.
   130         */
   131        Ptr alloc(IHeap.Handle heap, SizeT size, SizeT align, Error.Block *eb);
   132
   133        /*!
   134         *  ======== calloc ========
   135         *  Allocate a block of memory from a heap and zero out the contents.
   136         *
   137         *  @param(heap)    heap from which the memory is allocated
   138         *
   139         *                  The `heap` is created by a module that implements
   140         *                  the `{@link xdc.runtime.IHeap}` interface.
   141         *                  If `heap` is `NULL`, the
   142         *                  `{@link #defaultHeapInstance}` is used.
   143         *
   144         *  @param(size)    requested memory block size (in MADUs)
   145         *  @param(align)   alignment (in MADUs) of the block of memory
   146         *
   147         *                  A value of 0 denotes maximum default type alignment.
   148         *
   149         *  @param(eb)      pointer to error block
   150         *
   151         *  @a(returns)
   152         *  If the allocation was successful, `Memory_calloc()` returns non-`NULL`
   153         *  pointer to the allocated and initialized block; otherwise it returns
   154         *  `NULL` and the error block will indicate the cause of the error.
   155         */
   156        Ptr calloc(IHeap.Handle heap, SizeT size, SizeT align, Error.Block *eb);
   157
   158        /*!
   159         *  ======== free ========
   160         *  Frees the space if the heap manager offers such functionality.
   161         *
   162         *  @param(heap)   heap that the block of memory will be freed back to.
   163         *
   164         *                 The `heap` is created by a module that implements
   165         *                 the `{@link xdc.runtime.IHeap}` interface.
   166         *                 If `heap` is `NULL`, the
   167         *                 `{@link #defaultHeapInstance}` is used.
   168         *
   169         *  @param(block)  block of memory to free back to the heap
   170         *  @param(size)   size (in MADUs) of the block of memory to free.
   171         *
   172         */
   173        Void free(IHeap.Handle heap, Ptr block, SizeT size);
   174
   175        /*!
   176         *  ======== getStats ========
   177         *  Obtain statistics from a heap.
   178         *
   179         *  @param(heap)    the heap to get the statistics from
   180         *
   181         *                  The `heap` is created by a module that implements
   182         *                  the `{@link xdc.runtime.IHeap}` interface.
   183         *                  If `heap` is `NULL`, the
   184         *                  `{@link #defaultHeapInstance}` is used.
   185         *
   186         *  @param(stats)   the output buffer for the returned statistics
   187         */
   188        Void getStats(IHeap.Handle heap, Stats *stats);
   189
   190        /*!
   191         *  ======== query ========
   192         *  Test for a particular `{@link xdc.runtime.IHeap}` quality.
   193         *
   194         *  There currently is only one quality, namely `{@link #Q_BLOCKING}`.
   195         *
   196         *  @param(heap)    the heap to query
   197         *
   198         *                  The `heap` is created by a module that implements
   199         *                  the `{@link xdc.runtime.IHeap}` interface.  If `heap`
   200         *                  is `NULL`, the `{@link #defaultHeapInstance}`
   201         *                  is queried
   202         *
   203         *  @param(qual)    quality to test
   204         *
   205         *                   For example: `{@link #Q_BLOCKING}`.
   206         *
   207         *  @a(returns)
   208         *  If `heap` has the `qual` quality, this method returns `TRUE`,
   209         *  otherwise it returns `FALSE`.
   210         */
   211        Bool query(IHeap.Handle heap, Int qual);
   212
   213        /*!
   214         *  ======== getMaxDefaultTypeAlignMeta ========
   215         *  Return the largest alignment required by the target
   216         *
   217         *  This method scans the standard base types supported by the current
   218         *  configuration's target
   219         *  (`{@link xdc.cfg.Program#build Program.build.target}`) and returns
   220         *  the largest alignment required for these types.
   221         *
   222         *  @a(returns)     Returns target-specific alignment in MADUs.
   223         *
   224         *  @see xdc.bld.ITarget#stdTypes
   225         */
   226        metaonly SizeT getMaxDefaultTypeAlignMeta();
   227
   228        /*!
   229         *  ======== getMaxDefaultTypeAlign ========
   230         *  Return the largest alignment required by the target
   231         *
   232         *  `getMaxDefaultTypeAlign` returns the largest alignment
   233         *   required for all the standard base types supported by the current
   234         *  configuration's target
   235         *  (`{@link xdc.cfg.Program#build Program.build.target}`)
   236         *
   237         *  This is the runtime version of the
   238         *  `{@link #getMaxDefaultTypeAlignMeta}` function.
   239         *
   240         *  @a(returns)     Returns target-specific alignment in MADUs.
   241         *
   242         *  @see #getMaxDefaultTypeAlignMeta
   243         */
   244        SizeT getMaxDefaultTypeAlign();
   245
   246        /*!
   247         *  ======== staticPlace ========
   248         *  Statically places buffers.
   249         *
   250         *  This function places the object specified by `obj` into the specified
   251         *  memory section. The section string is a target-specific name that is
   252         *  interpreted by the underlying target tool-chain.  In the case of TI
   253         *  tool-chains, this section can be a subsection (e.g.
   254         *  ".data:someSection").
   255         *
   256         *  The amount of memory that is created for `obj` is dependent on its
   257         *  size and the value of the property `length`. The length (number
   258         *  of elements in an array) is set before the `staticPlace()` is called.
   259         *  For example, setting `obj.length = 5;` before calling `staticPlace()`,
   260         *  will create `5 * sizeof (obj)` MADUs of memory.
   261         *
   262         *  If 0 is specified for the alignment, the allocated buffer is aligned
   263         *  as determined by the target toolchain. For instance, if `obj` is an
   264         *  array of structs that have only 16-bit integers, the alignment would
   265         *  be on a 16-bit boundary.
   266         *
   267         *  All non-zero alignments must be a power of 2. Not all targets support
   268         *  directives that allow one to specify alignment. The readonly config
   269         *  parameter
   270         *  `{@link xdc.cfg.Program#build Program.build.target.alignDirectiveSupported}`
   271         *  can be used to determine if the target supports alignment directives.
   272         *
   273         *  @param(obj)     object to place
   274         *
   275         *      This object always has the `length` property; `obj.length`
   276         *      determines the size of the allocated buffer for `obj`
   277         *
   278         *  @param(align)   the alignment required by `obj`
   279         *
   280         *  @param(section) section name to contain `obj`
   281         *
   282         *      This parameter names the section where `obj` will be placed.  If
   283         *      this parameter is `null`, no explicit placement is done.
   284         *
   285         *  @a(returns)
   286         *  Returns `false` if the alignment request cannot be honored. The `obj`
   287         *  is still placed regardless of the return code.
   288         */
   289        metaonly Bool staticPlace(any obj, SizeT align, String section);
   290
   291        /*!
   292         *  ======== valloc ========
   293         *  Allocate a block of memory from a heap and initialize the contents
   294         *  to the value specified.
   295         *
   296         *  @param(heap)    heap from which the memory is allocated
   297         *
   298         *                  The `heap` is created by a module that implements
   299         *                  the `{@link xdc.runtime.IHeap}` interface.
   300         *                  If `heap` is `NULL`, the
   301         *                  `{@link #defaultHeapInstance}` is used.
   302         *
   303         *  @param(size)    requested memory block size (in MADUs)
   304         *  @param(align)   alignment (in MADUs) of the block of memory
   305         *
   306         *                  A value of 0 denotes maximum default type alignment.
   307         *
   308         *  @param(value)   value to initialize the contents of the block
   309         *  @param(eb)      pointer to error block
   310         *
   311         *  @a(returns)
   312         *  If the allocation was successful, `Memory_valloc()` returns non-`NULL`
   313         *  pointer to the allocated and initialized block; otherwise it returns
   314         *  `NULL` and the error block will indicate the cause of the error.
   315         */
   316        Ptr valloc(IHeap.Handle heap, SizeT size, SizeT align, Char value,
   317                   Error.Block *eb);
   318
   319    internal:
   320
   321        proxy HeapProxy inherits IHeap;
   322
   323        struct Module_State {
   324            SizeT maxDefaultTypeAlign;
   325        }
   326    }
   327    /*
   328     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   329     */
   330


package xdc.runtime

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*!
    14     *  ======== xdc.runtime ========
    15     *  Basic runtime support for RTSC programs
    16     *
    17     *  The modules and interfaces in the `xdc.runtime` package form the "core"
    18     *  RTSC target runtime support library which provides basic system services
    19     *  required by virtually all applications.
    20     *
    21     *  Since this package's services are intended to be available to any
    22     *  C/C++ client, this package does not contain any pre-compiled libraries.
    23     *  Instead, this package provides complete sources which are built and
    24     *  supplied by a target-specific package named by the
    25     *  `{@link xdc.bld.ITarget#rts rts}` parameter of the target used to build
    26     *  the client sources.  This "indirection" make it possible for new targets
    27     *  to be added by interested parties whithout ever having to update this
    28     *  package.
    29     *
    30     *  The functionality provided by this package can be roughly partitioned
    31     *  into four categories:
    32     *  @p(nlist)
    33     *      - Diagnostics and Logs
    34     *      - Memory Management
    35     *      - Concurrency Support
    36     *      - Startup and Shutdown
    37     *  @p
    38     *  @a(Diagnostics and Logs)
    39     *  This package provides for diagnostics with a set of modules that operate
    40     *  together to configure and implement diagnostics.
    41     *
    42     *  The modules can be partitioned into three groups: modules that
    43     *  generate events, a module that allows precise control over when
    44     *  (or if) various events are generated, and modules that manage the
    45     *  output or display of the events.
    46     *
    47     *  `{@link Assert}`, `{@link Error}`, and `{@link Log}` provide methods that
    48     *  are added to source code and generate events. The `{@link Diags}` module
    49     *  provides both configuration and runtime methods to selectively enable or
    50     *  disable different types of events on a per module basis. Finally,
    51     *  `{@link LoggerBuf}`, `{@link LoggerSys}` and `{@link LoggerCallback}` are
    52     *  simple alternative implementations of the `{@link ILogger}` event "handler"
    53     *  interface. You can provide more sophisticated or platform-specific
    54     *  implementations of `ILogger` without making any changes to code that
    55     *  uses `Assert`, `Log`, `Error`, or `Diags`.
    56     *
    57     *  The diagnostics and logger modules include the following:
    58     *  @p(blist)
    59     *  - `{@link Assert}`         - Add integrity checks to the code.
    60     *  - `{@link Diags}`          - Manage a module's diagnostics mask.
    61     *  - `{@link Error}`          - Raise error events.
    62     *  - `{@link Log}`            - Generate log events in realtime.
    63     *  - `{@link LoggerBuf}`      - A logger using a buffer for log events.
    64     *  - `{@link LoggerCallback}` - A logger using user defined callback function
    65     *                               for log events.
    66     *  - `{@link LoggerSys}`      - A logger using printf for log events.
    67     *  - `{@link Types}`          - Define diagnostics configuration parameters.
    68     *  - `{@link Timestamp}`      - Simple timestamp service
    69     *  @p
    70     *
    71     *  @a(Memory Management)
    72     *  The memory management modules include the following:
    73     *  @p(blist)
    74     *  - `{@link Memory}`  - module used by clients to allocate and free memory
    75     *  - `{@link HeapMin}` - Deterministic implementation that minimizes code
    76     *                        size footprint by not supporting reuse of allocated
    77     *                        memory.
    78     *  - `{@link HeapStd}` - Implementation that builds atop ANSI C `malloc()`
    79     *                        and `free()`
    80     *  @p
    81     *
    82     *  @a(Concurrency Support)
    83     *  The concurency support modules include the following:
    84     *  @p(blist)
    85     *  - `{@link Gate}`     -  module used by clients to serialize access to
    86     *                          shared data structures
    87     *  - `{@link GateNull}` - "null" implementation for applications that
    88     *                         don't need serialization; e.g., single threaded
    89     *                         applications
    90     *  @p
    91     *
    92     *  @a(Startup and Shutdown)
    93     *  The system startup and shutdown support modules include:
    94     *  @p(blist)
    95     *  - `{@link Reset}`       - Manages platform-specific startup initialization
    96     *                            before `main()` is called
    97     *  - `{@link Startup}`     - Manages "portable" startup initialization before
    98     *                            `main()` is called
    99     *  - `{@link System}`      - In addition to other basic services (such as
   100     *                            `printf`), this module provides an `atexit`
   101     *                            capability that allows modules to cleanly exit
   102     *                            during normal application terminiation.
   103     *  - `{@link SysCallback}` - Implementation of `{@link ISystemSupport}`
   104     *                            that calls back user defined functions.
   105     *  - `{@link SysMin}`      - Minimal implementation of `{@link ISystemSupport}`
   106     *                            required by the `System` module, suitable for
   107     *                            deeply embedded applications.
   108     *  - `{@link SysStd}`      - Implementation of `{@link ISystemSupport}`
   109     *                            that relies on ANSI C Standard I/O Library
   110     *                            functions.
   111     *  @p
   112     */
   113    package xdc.runtime [2, 1, 0] {
   114        interface IModule, IInstance;
   115        interface IHeap, ILogger, IFilterLogger;
   116        interface ISystemSupport;
   117        interface IGateProvider;
   118        interface ITimestampClient, ITimestampProvider;
   119        module Assert;
   120        module Core;
   121        module Defaults;
   122        module Diags;
   123        module Error;
   124        module Gate, GateNull;
   125        module Log, LoggerBuf, LoggerCallback, LoggerSys;
   126        module Main;
   127        module Memory, HeapMin, HeapStd;
   128        module Registry;
   129        module Rta;
   130        module Startup, Reset;
   131        module System, SysCallback, SysMin, SysStd;
   132        module Text;
   133        module Timestamp, TimestampNull, TimestampStd;
   134        module Types;
   135    }
   136    /*
   137     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   138     */
   139


module xdc.runtime.Registry

     1    /*
     2     *  Copyright (c) 2016-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Registry.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== Registry ========
    19     *  Register modules that are not statically configured
    20     *
    21     *  This module provides a mechanism by which legacy C code can have its own
    22     *  module logging support, including having a name and its own diags mask.
    23     *
    24     *  Without the `Registry`, all logging done by legacy C code is handled by the
    25     *  `xdc.runtime.Main` module. This means that all `{@link Log}` events will
    26     *  be marked as coming from "`xdc.runtime.Main`", and there is only a single
    27     *  diagnostics mask for the runtime control of logging across all legacy C
    28     *  code. The `Registry` module allows legacy C code to have the same granular
    29     *  control over logging as statically defined RTSC modules.
    30     *
    31     *  To use the `Registry` module, legacy code must define the symbol
    32     *  `Registry_CURDESC` to be the name of an externally declared
    33     *  `Registery_Desc` structure.  This symbol must be defined before the
    34     *  inclusion of any `xdc/runtime` header files. If any `xdc/runtime` header
    35     *  files are included before the definition of this symbol, the `Registry`
    36     *  module may not function properly.
    37     *
    38     *  Note: by defining this symbol on the compile line, rather than in the
    39     *  file, one can easily compile code to be used in one of two environments:
    40     *  @p(nlist)
    41     *    - a fixed configuration environment where modules are registered
    42     *      via `{@link #addModule Registry_addModule()}`, or
    43     *
    44     *    - a "normal" configurable environment in which this code is
    45     *      assumed to be part of the `{@link Main}` module.
    46     *  @p
    47     *  The `Registry_Desc` structure must then be registered by calling
    48     *  `{@link #addModule Registry_addModule()}`. The structure is typically
    49     *  registered and initialized within `main()`.
    50     *
    51     *  For example:
    52     *
    53     *  @p(code)
    54     *  //Define the required symbol, Registry_CURDESC, to this file's
    55     *  //Registry_Desc object
    56     *  #define Registry_CURDESC    mainDesc
    57     *  #include <xdc/runtime/Registry.h>
    58     *
    59     *  //Declare the Registry_Desc object, the name is unimportant
    60     *  Registry_Desc mainDesc;
    61     *
    62     *  Int main(Int argc, String argv[]) {
    63     *
    64     *  //Register this file as a module "main"
    65     *  Registry_addModule(&mainDesc, "main");
    66     *  @p
    67     *
    68     *  Once registered, the legacy code may call `{@link Log}` APIs without any
    69     *  other change and the formatted `Log` events will show as coming from the
    70     *  registered modules. Also, the logging by the legacy code is now filtered
    71     *  by its own diagnostic mask. The bits of this mask can be set using
    72     *  `{@link Diags#setMask Diags_setMask}`.
    73     *
    74     *  Continuing the previous example:
    75     *  @p(code)
    76     *  //Initialize the legacy code's diags mask to enable USER1.
    77     *  Diags_setMask("main=1");
    78     *  }
    79     *  @p
    80     *
    81     *  All events logged by registered modules will be sent to the logger
    82     *  configured for the `Registry` module. For example, to configure the
    83     *  logger for use by all modules managed by `Registry`:
    84     *  @p(code)
    85     *  Registry.common$.logger = LoggerBuf.create();
    86     *  @p
    87     *
    88     *  Since the registered modules are not known until runtime, it is not
    89     *  possible to statically configure the diagnostics masks for individual
    90     *  registered modules. However, it is possible to configure diagnostics
    91     *  categories to be permanently off or on for ALL registered modules. This
    92     *  is done by configuring the diagnostic mask for the `Registry` module.
    93     *  Diagnostic categories set to `{@link Diags#ALWAYS_OFF Diags.ALWAYS_OFF}`
    94     *  will be permanently off for all `Registry` modules. Categories set to
    95     *  `{@link Diags#ALWAYS_ON Diags.ALWAYS_ON}` will be permanently on for all
    96     *  modules managed by `Registry`.
    97     *
    98     *  In order to enable runtime configuration of individual `Registry` module
    99     *  masks, all relevant diagnostic categories must be set to
   100     *  `{@link Diags#RUNTIME_OFF Diags.RUNTIME_OFF}` or
   101     *  `{@link Diags#RUNTIME_ON Diags.RUNTIME_ON}` in the `Registry` module's
   102     *  mask.
   103     */
   104    @CustomHeader
   105    @DirectCall
   106    module Registry
   107    {
   108        /*!
   109         *  ======== RegisteredModuleView ========
   110         *  @_nodoc
   111         *  View element for the 'Registered Modules' ROV view.
   112         */
   113        metaonly struct RegisteredModuleView {
   114            String modName;
   115            Int id;
   116            String mask;
   117            Ptr descAddr;
   118        }
   119
   120        /*!
   121         *  ======== rovViewInfo ========
   122         *  @_nodoc
   123         */
   124        @Facet
   125        metaonly config xdc.rov.ViewInfo.Instance rovViewInfo =
   126            xdc.rov.ViewInfo.create({
   127                viewMap: [
   128                    ['Registered Modules',
   129                        {
   130                            type: xdc.rov.ViewInfo.MODULE_DATA,
   131                            viewInitFxn: 'viewInitRegisteredModules',
   132                            structName: 'RegisteredModuleView'
   133                        }
   134                    ]
   135                ]
   136            });
   137
   138        /*!
   139         *  ======== Result ========
   140         *  Status codes
   141         */
   142        enum Result {
   143            SUCCESS,        /*! The module was added successfully */
   144            ALLOC_FAILED,   /*! reserved */
   145            ALREADY_ADDED,  /*! The module has already been added or another
   146                             *  module with the same name is present
   147                             */
   148            ALL_IDS_USED    /*! No more module ids available for new modules */
   149        };
   150
   151        /*!
   152         *  ======== RegDesc ========
   153         *  Registry module descriptor
   154         */
   155        typedef Types.RegDesc Desc;
   156
   157        /*!
   158         *  ======== addModule ========
   159         *  Add a runtime module to the registry with the specified name
   160         *
   161         *  The `desc` parameter and the `modName` string provided must both be
   162         *  permanent since the `Registry` will maintain references to both of
   163         *  these.
   164         *
   165         *  @param(desc)    non-`NULL` pointer to a `{#Desc Registry_Desc}`
   166         *                  structure.
   167         *  @param(modName) non-`NULL` string name of the module being registered.
   168         *
   169         *  @a(returns)
   170         *  `Registry_addModule` returns one of the following
   171         *  `{@link #Result Result}` status values indicating success or the
   172         *  cause of failure:
   173         *  @p(blist)
   174         *  - `{@link #SUCCESS SUCCESS}`
   175         *  - `{@link #ALREADY_ADDED ALREADY_ADDED}`
   176         *  - `{@link #ALL_IDS_USED ALL_IDS_USED}`  There are a total of 16,384 - 1
   177         *    module ids available for use by `Registry`.
   178         *  @p
   179         */
   180        Result addModule(Desc *desc, CString modName);
   181
   182        /*!
   183         *  ======== findByName ========
   184         *  Find the registered module with the given name
   185         *
   186         *  @param(modName) non-`NULL` string name of a registered module
   187         *
   188         *  @a(returns)
   189         *  If the name `modName` is registered via
   190         *  `{@link #addModule Registry_addModule()}`, this function
   191         *  returns the pointer to the registered `Registry_Desc` structure;
   192         *  otherwise it returns `NULL`.
   193         */
   194        Desc *findByName(CString modName);
   195
   196        /*!
   197         *  ======== findByNamePattern ========
   198         *  @_nodoc
   199         *  Find all registered modules matching the specified pattern.
   200         *
   201         *  This API is intended for use by Diags_setMask.
   202         *
   203         *  The name pattern can be an exact module name or it can contain '%'
   204         *  as a wildcard. The `len` parameter is the string length of the pattern.
   205         *
   206         *  This function returns one module at a time, but can be called
   207         *  repeatedly to find all modules matching the pattern. On the first
   208         *  call, pass `NULL` as the `prev` parameter. In all following calls,
   209         *  pass the last returned descriptor. This function returns `NULL` when
   210         *  it can't find any more modules matching the name pattern.
   211         */
   212        Desc *findByNamePattern(CString namePat, UShort len, Desc *prev);
   213
   214        /*!
   215         *  ======== findById ========
   216         *  Find registered module's descriptor from its module ID
   217         *
   218         *  @param(mid) any module id
   219         *
   220         *  @a(returns)
   221         *  If the ID `mid` is registered via
   222         *  `{@link #addModule Registry_addModule()}`, this function
   223         *  returns the pointer to the registered `Registry_Desc` structure;
   224         *  otherwise it returns `NULL`.
   225         */
   226        Desc *findById(Types.ModuleId mid);
   227
   228        /*!
   229         *  ======== getMask ========
   230         *  Get the specified module's diagnostic mask
   231         *
   232         *  @param(modName) non-`NULL` string name of a registered module
   233         *  @param(mask)    non-`NULL` pointer to a mask to be initialized
   234         *                  to the the current state of the diagnostics mask
   235         *                  associated with `modName`
   236         *
   237         *  @a(returns)
   238         *  The function returns `TRUE` if `name` identifies a registered module;
   239         *  otherwise, it return `FALSE`.
   240         */
   241        Bool getMask(CString name, Types.DiagsMask *mask);
   242
   243        /*!
   244         *  ======== isMember ========
   245         *  Determines if the specified module ID belongs to a registered module
   246         *
   247         *  @param(mid) any module id
   248         *
   249         *  @a(returns)
   250         *  This function returns `TRUE` if and only if the specified module id
   251         *  is a valid `Registry` module id. It does not search registered
   252         *  module ids, but simply checks if the id is within the range of valid
   253         *  `Registry` module ids.
   254         */
   255        Bool isMember(Types.ModuleId mid);
   256
   257        /*!
   258         *  ======== getNextModule ========
   259         *  Scan the current list of registered modules
   260         *
   261         *  This function used to scan the list of all `Registry_Desc` structures
   262         *  currently being managed by the `Registry` module.
   263         *
   264         *  @param(desc)    optionally `NULL` pointer to a `Registry_Desc`
   265         *                  structure.  If `desc` is `NULL`, a pointer to the
   266         *                  first structure is returned.  If `desc` is non-`NULL`
   267         *                  and equal to a previous return value of this function,
   268         *                  a pointer to the "next" `Registry_Desc` structure
   269         *                  is returned.
   270         *
   271         *  @a(returns)
   272         *  This function returns a non-`NULL` pointer to one of the
   273         *  `Registry_Desc` structures added via `Registry_Desc` structures or
   274         *  `NULL` in the case that
   275         *  @p(blist)
   276         *      - there are no more module's in the list after `desc`, or
   277         *      - there are no modules registered
   278         *  @p
   279         */
   280        Desc *getNextModule(Desc *desc);
   281
   282        /*!
   283         *  ======== getModuleName ========
   284         *  Get the module name associated with a specified module descriptor
   285         *
   286         *  @param(desc)    non-`NULL` pointer to a `{#Desc Registry_Desc}`
   287         *                  structure.
   288         *
   289         *  @a(returns)
   290         *  If the specified module descriptor has been initialized via a
   291         *  successful call to `{@link #addModule Registry_addModule()}`, this
   292         *  function returns the module name passed `Registry_addModule()`;
   293         *  otherwise, its return value is indeterminate.
   294         */
   295        CString getModuleName(Desc *desc);
   296
   297        /*!
   298         *  ======== getModuleId ========
   299         *  Get the module id associated with a specified module descriptor
   300         *
   301         *  @param(desc)    non-`NULL` pointer to a `{#Desc Registry_Desc}`
   302         *                  structure.
   303         *
   304         *  @a(returns)
   305         *  If the specified module descriptor has been initialized via a
   306         *  successful call to `{@link #addModule Registry_addModule()}`, this
   307         *  function returns the module id assigned by `Registry_addModule()`;
   308         *  otherwise, its return value is indeterminate.
   309         */
   310        Types.ModuleId getModuleId(Desc *desc);
   311
   312    internal:
   313
   314        Desc *findByNameInList(CString name, Desc *listHead);
   315        Void newModule(Desc *desc, CString modName);
   316        Bool matchPattern(CString pattern, UShort len, CString modName);
   317
   318        /* Functions for accessing the Registry at ROV-time. */
   319        function isMemberRov(modId);
   320        function lookupModIdRov(modId);
   321
   322        /*
   323         *  ======== Module_State ========
   324         */
   325        struct Module_State {
   326            Desc            *listHead;
   327            Types.ModuleId  curId;
   328        }
   329    }
   330    /*
   331     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   332     */
   333


module xdc.runtime.Reset

     1    /*
     2     *  Copyright (c) 2016 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Reset.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Reset ========
    21     *  Startup reset function manager
    22     *
    23     *  This module defines an initial reset function and can be used without
    24     *  requiring any other `xdc.runtime` module.  The reset function is called
    25     *  as early as possible in the application startup and is intended for
    26     *  platform-specific hardware initialization.
    27     *
    28     *  The reset function sequentially calls each of the functions added to the
    29     *  `{@link #fxns}` array starting from index 0.  If
    30     *  `{@link Startup#resetFxn Startup.resetFxn}` is defined, it is called
    31     *  before any of the functions defined by the `fxns` array.
    32     *
    33     *  By providing an array of startup functions, rather than a single function
    34     *  as `{@link Startup}` does, modules that need very early initialization
    35     *  can simply add their initialization to the list of functions to be called
    36     *  without having to implement a "chaining" mechanism or requiring the user
    37     *  to implement and maintain an application reset function.
    38     *
    39     *  @a(Warning)
    40     *  The reset function is _not_ supported on all platforms and, as a result,
    41     *  you should never place any "portable" code that is required for your
    42     *  application in this function.  Use the `{@link Startup}` module to
    43     *  define required application startup functions.
    44     *
    45     *  @see Startup
    46     */
    47    @Template("xdc/runtime/Reset.xdt")
    48    metaonly module Reset
    49    {
    50        /*!
    51         *  ======== fxns ========
    52         *  List of functions to call at reset
    53         *
    54         *  This array defines the functions that will be executed by the reset
    55         *  initialization function (`xdc_runtime_Startup_reset__I`) _in addition
    56         *  to_ the function specified by `{@link Startup#resetFxn}`.
    57         *
    58         *  The following code fragment shows how to add the externally defined
    59         *  function `myReset()` to this array.
    60         *  @p(code)
    61         *      var Reset = xdc.useModule("xdc.runtime.Reset");
    62         *      Reset.fxns[Reset.fxns.length++] = "&myReset";
    63         *  @p
    64         *
    65         *  @a(Warning)
    66         *  Although the functions specified in `fxns[]` are ordinary C functions,
    67         *  they are often called _before_ the C runtime is fully initialized;
    68         *  e.g., they may be called _before_ static variables are initialized.
    69         *  Reset functions should only assume that a minimal execution stack has
    70         *  initialized.
    71         *
    72         *  @see Startup#resetFxn
    73         */
    74        metaonly config xdc.runtime.Startup.InitFxn fxns[] = [];
    75    }
    76    /*
    77     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    78     */
    79


module xdc.runtime.Rta

     1    /*
     2     *  Copyright (c) 2016 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Rta.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Rta ========
    21     *  The Rta module contains target and configuration code for providing RTA
    22     *  support.
    23     *
    24     *  The 'Command' enum defines the available control commands, and the
    25     *  'CommandPacket' structure defines the format of commands received from
    26     *  the host.
    27     *
    28     *  All commands should send back a response, even if only to acknowledge
    29     *  receipt and completion of the command. The format of the response
    30     *  is defined by the 'ResponsePacket' structure.
    31     *
    32     *  The Rta_processCommand can be used to process commands received from a
    33     *  host to call the appropriate API. Alternatively, the individual APIs can
    34     *  be called if not all of the defined commands are used.
    35     */
    36    @DirectCall
    37    module Rta {
    38
    39        /*! Logged when the Agent receives a command */
    40        config Log.Event LD_cmdRcvd = {
    41            mask: Diags.USER2,
    42            msg: "LD_cmdRcvd: Received command: %d, arg0: 0x%x, arg1: 0x%x"
    43        };
    44
    45        /*! Logged when a diags mask is changed */
    46        config Log.Event LD_writeMask = {
    47            mask: Diags.USER2,
    48            msg: "LD_writeMask: Mask addres: 0x%x, New mask value: 0x%x"
    49        };
    50
    51        /*! Assert if logger id in control command is invalid. */
    52        config Assert.Id A_invalidLogger = {
    53            msg: "A_invalidLogger: The logger id %d is invalid."
    54        };
    55
    56        /*! Error raised if Agent receives an invalid command. */
    57        config Error.Id E_badCommand  = {
    58            msg: "E_badCommand: Received invalid command, id: %d."
    59        };
    60
    61        /*! Command ids */
    62        enum Command : Int {
    63            Command_READ_MASK = 0,
    64            Command_WRITE_MASK = 1,
    65            Command_LOGGER_OFF = 2,
    66            Command_LOGGER_ON = 3,
    67            Command_GET_CPU_SPEED = 4,
    68            Command_RESET_LOGGER = 5,
    69            Command_CHANGE_PERIOD = 6,
    70            Command_START_TX = 7,
    71            Command_STOP_TX = 8
    72        };
    73
    74        /*!
    75         * Structure of command received from host
    76         * TODO - Either the types should be changed to 32-bits, or the packet
    77         * size information should be added to the RTA XML file.
    78         */
    79        struct CommandPacket {
    80            Command  cmdId;
    81            UArg     arg0;
    82            UArg     arg1;
    83        }
    84
    85        /*! Structure of response packet sent back to host */
    86        struct ResponsePacket {
    87            Command  cmdId;
    88            UArg     resp0;
    89            UArg     resp1;
    90        }
    91
    92        /*!
    93         *  ======== dataTransportClassName =========
    94         *  The name of the xdc.rta.IDataTransport class to use.
    95         *
    96         *  The class specified here can be used on the host for reading RTA data
    97         *  from this target application.
    98         */
    99        config String dataTransportClassName = "";
   100
   101        /*!
   102         *  ======== controlTransportClassName ========
   103         *  The name of the xdc.rta.IControlTransport class to use.
   104         *
   105         *  The class specified here can be used on the host for communicating with
   106         *  this target application to send control commands and receive responses.
   107         */
   108        config String controlTransportClassName = "";
   109
   110        /*!
   111         *  ======== processCommand ========
   112         *  Executes a command packet and prepares the response packet.
   113         *
   114         *  This API will execute the command specified by the command packet
   115         *  argument, and will store the response information in the response
   116         *  packet argument.
   117         *
   118         *  @param(cmd)    The CommandPacket to execute.
   119         *  @param(resp)   The ResponsePacket to populate with the response.
   120         */
   121        Void processCommand(CommandPacket *cmd, ResponsePacket *resp);
   122
   123        /*!
   124         *  ======== acknowledgeCmd ========
   125         */
   126        Void acknowledgeCmd(ResponsePacket *resp);
   127
   128        /*!
   129         *  ======== readMask ========
   130         */
   131        Void readMask(ResponsePacket *resp, UArg addr);
   132
   133        /*!
   134         *  ======== writeMask ========
   135         */
   136        Void writeMask(ResponsePacket *resp, UArg addr, UArg val);
   137
   138        /*!
   139         *  ======== enableLog ========
   140         */
   141        Void enableLog(ResponsePacket *resp, UArg log);
   142
   143        /*!
   144         *  ======== disableLog ========
   145         */
   146        Void disableLog(ResponsePacket *resp, UArg log);
   147
   148        /*!
   149         *  ======== getCpuSpeed ========
   150         */
   151        Void getCpuSpeed(ResponsePacket *resp);
   152
   153        /*!
   154         *  ======== resetLog ========
   155         */
   156        Void resetLog(ResponsePacket *resp, UArg log);
   157
   158        /*!
   159         *  ======== changePeriod ========
   160         */
   161        Void changePeriod(ResponsePacket *resp, UArg period);
   162
   163        /*!
   164         *  @_nodoc
   165         *  ======== genRta ========
   166         *  Generates the Rta XML file.
   167         */
   168        function genRta(outputFileName);
   169
   170    }
   171    /*
   172     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   173     */
   174


module xdc.runtime.Startup

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Startup.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Startup ========
    21     *  The `xdc.runtime` startup bootstrap
    22     *
    23     *  This module manages the very early startup initialization that occurs
    24     *  before C's `main()` function is invoked.  This initialization typically
    25     *  consists of setting hardware specific registers that control watchdog
    26     *  timers, access to memory, cache settings, clock speeds, etc.
    27     *
    28     *  In addition to configuration parameters that allow the user to add custom
    29     *  startup functions, this module also provides services that allow modules
    30     *  to automatically add initialiazation functions to the startup sequence.
    31     *
    32     *  @a(Startup Sequence)
    33     *  The following list defines the startup sequence and, in particular, when
    34     *  user provided startup functions are invoked:
    35     *  @p(nlist)
    36     *   - CPU is initialized and initial C stack setup is performed.
    37     *   - The function specified by `Startup.resetFxn` is called.
    38     *     `Startup.resetFxn` is called only on platforms where reset is performed
    39     *     before running a program. For example, boot code for all TI targets
    40     *     invokes `Startup.resetFxn`, but this function is not invoked on
    41     *     Microsoft targets.
    42     *   - C runtime initialization is performed.
    43     *   - Functions from the array `Startup.firstFxns` are called.
    44     *   - All `Mod_Module_startup` functions (see Module Initialization below)
    45     *     are called in a loop until all such functions return
    46     *     `{@link #Startup_DONE}` or the `{@link #maxPasses}` threshold is
    47     *     reached.
    48     *   - Functions from the array `Startup.lastFxns` are called.
    49     *   - The function `main` is called.
    50     *  @p
    51     *     The steps 4 - 6 occur during C++ static object initialization. Since
    52     *     the ANSI C++ Language Standard does not provide a means to control
    53     *     the order of C++ constructors, if a C++ constructor uses an XDC module,
    54     *     there is no guarantee that the module's startup function already ran.
    55     *     Therefore, any C++ constructor that needs XDC modules' services should
    56     *     call `Startup_exec` first to force all startup related functions from
    57     *     steps 4 - 6 to run, before the constructor uses any XDC module.
    58     *  @p
    59     *     Also, if a target does not support C++, the steps 4 - 6 will not run
    60     *     automatically. It is then up to a user's code to invoke `Startup_exec`,
    61     *     possibly as the first step in `main`.
    62     *  @p
    63     *
    64     *  @a(Module Initialization)
    65     *  Every module can optionally define a startup function which is called
    66     *  before `main()`.  Modules declare that they want to participate in this
    67     *  startup sequence via the `@ModuleStartup` attribute in the module's spec
    68     *  file.  Modules that use this attribute must also implement the following
    69     *  startup function:
    70     *  @p(code)
    71     *      Int Mod_Module_startup(Int state);
    72     *  @p
    73     *  where "Mod" is the name of the module requesting startup support.
    74     *
    75     *  The parameter to the startup function serves as "state variable" whose
    76     *  initial value will be `Startup_NOTDONE`. If `startup()` returns a value
    77     *  other than `Startup_DONE`, it will be called in a subsequent pass with this
    78     *  return value passed in as `state`.  To ensure this process terminates,
    79     *  no startup function is ever called more than `{@link #maxPasses}`
    80     *  times.
    81     *
    82     *  For situations in which the startup of one module depends upon another
    83     *  having completed its startup processing, the following function is
    84     *  automatically defined for all modules and proxies:
    85     *  @p(code)
    86     *      Bool Mod_Module_startupDone();
    87     *  @p
    88     *  where "Mod" is the name of some module or proxy.  These predicates can
    89     *  be used as guards inside of a startup function to probe whether a
    90     *  particular module has completed its own startup processing.  As a
    91     *  convenience, the function `Startup_rtsDone()` probes the necessary set of
    92     *  `xdc.runtime` modules required to support instance `create()` functions, and
    93     *  should be called before any startup-time instance creation and/or
    94     *  memory allocation is performed.
    95     *  @p(code)
    96     *      Int Mod_Module_startup(Int state)
    97     *      {
    98     *          if (!Startup_rtsDone()) {
    99     *              return (Startup_NOTDONE);
   100     *          }
   101     *              .
   102     *              .
   103     *              .
   104     *          return (Startup_DONE);
   105     *      }
   106     *  @p
   107     *
   108     *  @a(Examples)
   109     *  The following code shows how to add custom startup functions to this module.
   110     *  @p(code)
   111     *      var Startup = xdc.useModule('xdc.runtime.Startup');
   112     *      Startup.resetFxn = "&myResetFxn";
   113     *      Startup.firstFxns[Startup.firstFxns.length++] = "&myFirst";
   114     *      Startup.lastFxns[Startup.lastFxns.length++] = "&myLast";
   115     *  @p
   116     *
   117     */
   118    @Template("./Startup.xdt")
   119    @DirectCall
   120
   121    module Startup {
   122
   123        /*!
   124         *  ======== DONE ========
   125         *  Returned from module startup functions no further calls are required
   126         */
   127        const Int DONE = -1;
   128
   129        /*!
   130         *  ======== NOTDONE ========
   131         *  Initial value of state argument passed to module startup functions
   132         */
   133        const Int NOTDONE = 0;
   134
   135        /*!
   136         *  ======== ModuleView ========
   137         *  @_nodoc
   138         */
   139        metaonly struct ModuleView {
   140            Bool    rtsStartupDone;
   141            Bool    startupBegun;
   142            String  resetFxn;
   143            String  firstFxns[];
   144            String  lastFxns[];
   145        }
   146
   147        /*!
   148         *  ======== StartupStateView ========
   149         *  @_nodoc
   150         */
   151        metaonly struct StartupStateView {
   152            Int     order;
   153            String  moduleName;
   154            String  done;
   155        }
   156
   157        /*!
   158         *  ======== rovViewInfo ========
   159         *  @_nodoc
   160         */
   161        @Facet
   162        metaonly config xdc.rov.ViewInfo.Instance rovViewInfo =
   163            xdc.rov.ViewInfo.create({
   164                viewMap: [
   165                    ['Module',
   166                        {
   167                            type: xdc.rov.ViewInfo.MODULE,
   168                            viewInitFxn: 'viewInitModule',
   169                            structName: 'ModuleView'
   170                        }
   171                    ],
   172                    ['Startup State',
   173                        {
   174                            type: xdc.rov.ViewInfo.MODULE_DATA,
   175                            viewInitFxn: 'viewInitStartupState',
   176                            structName: 'StartupStateView'
   177                        }
   178                    ]
   179                ]
   180            });
   181
   182        /*!
   183         *  ======== maxPasses ========
   184         *  Max number of iterations over the set of startup functions
   185         */
   186        config Int maxPasses = 32;
   187
   188        /*!
   189         *  ======== InitFxn ========
   190         *  Type of function assignable to `firstFxns`, `lastFxns`, or `resetFxn`
   191         */
   192        typedef Void (*InitFxn)();
   193
   194        /*!
   195         *  ======== firstFxns ========
   196         *  List of functions called before module startup
   197         *
   198         *  @see
   199         *      #xdoc-sect-2 Startup Sequence
   200         */
   201        config InitFxn firstFxns[length] = [];
   202
   203        /*!
   204         *  ======== lastFxns ========
   205         *  List of functions called after module startup
   206         *
   207         *  @see
   208         *      #xdoc-sect-2 Startup Sequence
   209         */
   210        config InitFxn lastFxns[length] = [];
   211
   212        /*!
   213         *  ======== resetFxn ========
   214         *  Function to be called by during initialization
   215         *
   216         *  This function is called only on platforms where reset is performed
   217         *  before running the program. The purpose of this function is to set up
   218         *  the hardware registers (cache, external memory interface, etc.) before
   219         *  any other code executes.
   220         *
   221         *  This function is called as early as possible in the
   222         *  {@link #xdoc-sect-2 program initialization} process.
   223         *
   224         *  @see
   225         *      #xdoc-sect-2 Startup Sequence
   226         */
   227        metaonly config InitFxn resetFxn = null;
   228
   229        /*!
   230         *  ======== exec ========
   231         *  Execute the startup functions of all resident modules
   232         *
   233         *  Note that this function is idempotent, and can be called at any point
   234         *  in the platform/target startup sequence in which "ordinary" C functions
   235         *  can execute.  By default, this function is called as part of the
   236         *  standard C++ static initialization sequence.
   237         *
   238         *  If your target compiler does not support C++, this function must be
   239         *  called at least once prior to using any `xdc.runtime` modules.
   240         *  Simply call this function at the very beginning of `main()`.
   241         */
   242        Void exec();
   243
   244        /*!
   245         *  ======== rtsDone ========
   246         *  Query the state of the `xdc.runtime` package
   247         *
   248         *  This function is used by module startup functions to determine
   249         *  when it is possible to use the `xdc.runtime` modules; e.g. to
   250         *  allocate memory, create instances managed by some module (even
   251         *  those outside the `xdc.runtime` package), call a `Log` function,
   252         *  etc.
   253         *
   254         *  @a(returns)
   255         *  Returns `TRUE` when all `xdc.runtime` modules have completed
   256         *  initialization.
   257         */
   258        Bool rtsDone();
   259
   260    internal:
   261
   262        /*!
   263         *  ======== reset ========
   264         *  Application-specific reset function
   265         *
   266         *  This function is defined in `Startup.xdt`
   267         *  (`xdc_runtime_Startup_reset__I`) and is called as early as
   268         *  possible in the {@link #xdoc-sect-2 program initialization}
   269         *  process; for many platforms, it is called prior the the
   270         *  initialization of the C runtime environment.
   271         *
   272         *  @see
   273         *      #xdoc-sect-2 Startup Sequence
   274         */
   275        Void reset();
   276
   277        Void startMods(Int state[], Int len);
   278        readonly config Void (*startModsFxn)(Int[], Int) = startMods;
   279
   280        extern Void execImplFxn() = xdc_runtime_Startup_exec__I;
   281
   282        readonly config Void (*execImpl)() = execImplFxn;
   283
   284        typedef Int (*SFxn)(Int);
   285        config SFxn sfxnTab[];
   286
   287        /*!
   288         *  ======== sfxnRts ========
   289         *  Array of runtime modules' startup functions
   290         *
   291         *  This array also contains startup functions of the modules that inherit
   292         *  from interfaces in `xdc.runtime`. Functions added to this array are
   293         *  called only once before the startup procedure for all modules begins.
   294         *
   295         *  @see
   296         *      #xdoc-sect-2 Startup Sequence
   297         */
   298        config Bool sfxnRts[];
   299
   300        /*!
   301         *  ======== getState ========
   302         *  Function that returns the value of the startup state.
   303         *
   304         *  Modules for which the config C code is generated separately, and
   305         *  possibly before the configuration step is run, must call a function
   306         *  to get their startup state. They cannot reach into the state array
   307         *  directly because they don't know their indices in that array.
   308         */
   309        Int getState(Types.ModuleId id);
   310
   311        /*!
   312         *  ======== IdMap ========
   313         *  keeps track of modules in stateTab and their module IDs for purposes
   314         *  of the function getState.
   315         */
   316        struct IdMap {
   317            UInt           ind;
   318            Types.ModuleId modId;
   319        }
   320
   321        struct Module_State {
   322            Int *stateTab;      /* initially null */
   323            Bool execFlag;      /* if true, startup code processing started */
   324            Bool rtsDoneFlag;
   325        };
   326
   327    }
   328    /*
   329     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   330     */
   331


module xdc.runtime.SysCallback

     1    /*
     2     *  Copyright (c) 2012 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SysCallback.xdc ========
    15     */
    16    package xdc.runtime;
    17
    18    /*!
    19     *  ======== SysCallback ========
    20     *  ISystemSupport implementation for user callback functions
    21     *
    22     *  This module provides a implementation of the `{@link ISystemSupport}`
    23     *  interface that simply calls back the user defined functions to enable the
    24     *  System module's functionality.
    25     *
    26     *  Configuration is as shown below.
    27     *  @p(code)
    28     *
    29     *  var SysCallback = xdc.useModule('xdc.runtime.SysCallback');
    30     *  SysCallback.abortFxn = "&userAbort";
    31     *  SysCallback.exitFxn  = "&userExit";
    32     *  SysCallback.flushFxn = "&userFlush";
    33     *  SysCallback.putchFxn = "&userPutch";
    34     *  SysCallback.readyFxn = "&userReady";
    35     *
    36     *  @p
    37     *
    38     */
    39    module SysCallback inherits xdc.runtime.ISystemSupport
    40    {
    41        /*!
    42         *  ======== AbortFxn ========
    43         *  Abort function signature
    44         */
    45        typedef Void (*AbortFxn)(CString);
    46
    47        /*!
    48         *  ======== defaultAbort ========
    49         *  Default abort function that does nothing
    50         *
    51         *  This default abort function spins forever and never returns.
    52         */
    53        extern Void defaultAbort(CString) = xdc_runtime_SysCallback_defaultAbort;
    54
    55        /*!
    56         *  ======== ExitFxn ========
    57         *  Exit function signature
    58         */
    59        typedef Void (*ExitFxn)(Int);
    60
    61        /*!
    62         *  ======== defaultExit ========
    63         *  Default exit function that does nothing
    64         *
    65         *  The default exit function does nothing and returns.
    66         */
    67        extern Void defaultExit(Int) = xdc_runtime_SysCallback_defaultExit;
    68
    69        /*!
    70         *  ======== FlushFxn ========
    71         *  Flush function signature
    72         */
    73        typedef Void (*FlushFxn)();
    74
    75        /*!
    76         *  ======== defaultFlush ========
    77         *  Default flush function that does nothing
    78         *
    79         *  The default flush function does nothing and returns.
    80         */
    81        extern Void defaultFlush() = xdc_runtime_SysCallback_defaultFlush;
    82
    83        /*!
    84         *  ======== PutchFxn ========
    85         *  Putch function signature
    86         */
    87        typedef Void (*PutchFxn)(Char);
    88
    89        /*!
    90         *  ======== defaultPutch ========
    91         *  Default putch function that does nothing
    92         *
    93         *  The default putch function drops the characters.
    94         */
    95        extern Void defaultPutch(Char) = xdc_runtime_SysCallback_defaultPutch;
    96
    97        /*!
    98         *  ======== ReadyFxn ========
    99         *  Ready function signature
   100         */
   101        typedef Bool (*ReadyFxn)();
   102
   103        /*!
   104         *  ======== defaultReady ========
   105         *  Default ready function that does nothing
   106         *
   107         *  The default ready function returns `TRUE` always.
   108         */
   109        extern Bool defaultReady() = xdc_runtime_SysCallback_defaultReady;
   110
   111        /*!
   112         *  ======== abortFxn =========
   113         *  User supplied abort function
   114         *
   115         *  This function is called when the application calls
   116         *  `{@link System#abort()}` function. If the user supplied funtion
   117         *  returns, the abort function of the ANSI C Standard library is called.
   118         *  For more information see the `{@link System#abort()}` documentation.
   119         *
   120         *  By default, this function is configured with a default abort function.
   121         *  This default abort function spins forever and never returns.
   122         */
   123        config AbortFxn abortFxn = "&xdc_runtime_SysCallback_defaultAbort";
   124
   125        /*!
   126         *  ======== exitFxn =========
   127         *  User supplied exit function
   128         *
   129         *  This function is called when the application calls
   130         *  `{@link System#exit()}` function. If the user supplied function
   131         *  returns, the ANSI C Standard Library atexit processing will be
   132         *  completed. For more information see the `{@link System#exit()}`
   133         *  documentation.
   134         *
   135         *  By default, this function is configured with a default exit function.
   136         *  The default exit function does nothing and returns.
   137         */
   138        config ExitFxn exitFxn = "&xdc_runtime_SysCallback_defaultExit";
   139
   140        /*!
   141         *  ======== flushFxn =========
   142         *  User supplied flush function
   143         *
   144         *  This function is called when the application calls
   145         *  `{@link System#flush()}` function.
   146         *
   147         *  By default, this function is configured with a default flush function.
   148         *  The default flush function does nothing and returns.
   149         */
   150        config FlushFxn flushFxn = "&xdc_runtime_SysCallback_defaultFlush";
   151
   152        /*!
   153         *  ======== putchFxn =========
   154         *  User supplied character output function
   155         *
   156         *  This function is called whenever the `System` module needs to output
   157         *  a character; e.g., during `{@link System#printf()}` or
   158         *  `{@link System#putch()}`.
   159         *
   160         *  By default, this function is configured with a default putch function.
   161         *  The default putch function drops the characters.
   162         */
   163        config PutchFxn putchFxn = "&xdc_runtime_SysCallback_defaultPutch";
   164
   165        /*!
   166         *  ======== readyFxn =========
   167         *  User supplied ready function
   168         *
   169         *  This function is called by the `System` module prior to performing any
   170         *  character output to check if the `SystemSupport` module is ready to
   171         *  accept the character. For more information see the
   172         * `{@link ISystemSupport#ready()}` documentation.
   173         *
   174         *  By default, this function is configured with a default ready function.
   175         *  The default ready function returns `TRUE` always.
   176         */
   177        config ReadyFxn readyFxn = "&xdc_runtime_SysCallback_defaultReady";
   178    }
   179    /*
   180     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   181     */
   182


module xdc.runtime.SysMin

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SysMin.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== SysMin ========
    19     *
    20     *  Minimal implementation of `{@link ISystemSupport}`
    21     *
    22     *  This implementation provides a fully functional implementation of
    23     *  all methods specified by `ISystemSupport`.
    24     *
    25     *  The module maintains an internal buffer (with a configurable size)
    26     *  that stores on the "output". When full, the data is over-written.  When
    27     *  `System_flush()` is called the characters in the internal buffer are
    28     *  "output" using the user configurable `{@link #outputFxn}`.
    29     *
    30     *  As with all `ISystemSupport` modules, this module is the back-end for the
    31     *  `{@link System}` module; application code does not directly call these
    32     *  functions.
    33     */
    34
    35    @Template("./SysMin.xdt")
    36    @ModuleStartup
    37    module SysMin inherits xdc.runtime.ISystemSupport {
    38
    39        metaonly struct ModuleView {
    40            Ptr outBuf;
    41            UInt outBufIndex;
    42            Bool wrapped;    /* has the buffer wrapped */
    43        };
    44
    45        metaonly struct BufferEntryView {
    46            String entry;
    47        }
    48
    49        /*!
    50         *  ======== rovViewInfo ========
    51         *  @_nodoc
    52         */
    53        @Facet
    54        metaonly config xdc.rov.ViewInfo.Instance rovViewInfo =
    55            xdc.rov.ViewInfo.create({
    56                viewMap: [
    57                    ['Module',
    58                        {
    59                            type: xdc.rov.ViewInfo.MODULE,
    60                            viewInitFxn: 'viewInitModule',
    61                            structName: 'ModuleView'
    62                        }
    63                    ],
    64                    ['OutputBuffer',
    65                        {
    66                            type: xdc.rov.ViewInfo.MODULE_DATA,
    67                            viewInitFxn: 'viewInitOutputBuffer',
    68                            structName: 'BufferEntryView'
    69                        }
    70                    ]
    71                ]
    72            });
    73
    74        /*!
    75         *  ======== bufSize ========
    76         *  Size (in MAUs) of the output.
    77         *
    78         *  An internal buffer of this size is allocated. All output is stored
    79         *  in this internal buffer.
    80         *
    81         *  If 0 is specified for the size, no buffer is created, all output
    82         *  is dropped, and `{@link SysMin#ready()}` always returns `FALSE`.
    83         */
    84        config SizeT bufSize = 1024;
    85
    86        /*!
    87         *  ======== flushAtExit ========
    88         *  Flush the internal buffer during `{@link #exit}` or `{@link #abort}`.
    89         *
    90         *  If the application's target is a TI target, the internal buffer is
    91         *  flushed via the `HOSTwrite` function in the TI C Run Time Support
    92         *  (RTS) library.
    93         *
    94         *  If the application's target is not a TI target, the internal buffer
    95         *  is flushed to `stdout` via `fwrite(..., stdout)`.
    96         *
    97         *  Setting this parameter to `false` reduces the footprint of the
    98         *  application at the expense of not getting output when the application
    99         *  ends via a `System_exit()`, `System_abort()`, `exit()` or `abort()`.
   100         */
   101        config Bool flushAtExit = true;
   102
   103        /*!
   104         *  ======== sectionName ========
   105         *  Section where the internal character output buffer is placed
   106         *
   107         *  The default is to have no explicit placement; i.e., the linker is
   108         *  free to place it anywhere in the memory map.
   109         */
   110        metaonly config String sectionName = null;
   111
   112        /*!
   113         *  ======== OutputFxn ========
   114         *  Output characters in the specified buffer
   115         *
   116         *  The first parameter is a pointer to a buffer of characters to be
   117         *  output.  The second parameter is the number of characters in the
   118         *  buffer to output.
   119         *
   120         *  This function may be called with 0 as the second parameter.  In this
   121         *  case, the function should simply return.
   122         *
   123         */
   124        typedef Void (*OutputFxn)(Char *, UInt);
   125
   126        /*!
   127         *  ======== outputFxn ========
   128         *  User supplied character output function
   129         *
   130         *  If this parameter is set to a non-`null` value, the specified
   131         *  function will be called by `{@link System#flush()}` to output
   132         *  any characters buffered within `SysMin`.
   133         *
   134         *  For example, if you define a function named `myOutputFxn`, the
   135         *  following configuration fragment will cause `SysMin` to call
   136         *  `myOutputFxn` whenever the character buffer is flushed.
   137         *  @p(code)
   138         *      var SysMin = xdc.useModule("xdc.runtime.SysMin");
   139         *      SysMin.outputFxn = "&myOutputFxn";
   140         *  @p
   141         *
   142         *  If this parameter is not set, a default function will be used which
   143         *  uses the ANSI C Standard Library function `fwrite()` (or `HOSTwrite`
   144         *  in the TI C Run Time Support library) to output
   145         *  accumulated output characters.
   146         *
   147         *  @see #OutputFxn
   148         */
   149        config OutputFxn outputFxn = null;
   150
   151        /*!
   152         *  ======== abort ========
   153         *  Backend for `{@link System#abort()}`
   154         *
   155         *  This abort function writes the string to the internal
   156         *  output buffer and then gives all internal output to the
   157         *  `{@link #outputFxn}` function if the `{@link #flushAtExit}`
   158         *  configuration parameter is true.
   159         *
   160         *  @param(str)  message to output just prior to aborting
   161         *
   162         *      If non-`NULL`, this string should be output just prior to
   163         *      terminating.
   164         *
   165         *  @see ISystemSupport#abort
   166         */
   167        override Void abort(CString str);
   168
   169        /*!
   170         *  ======== exit ========
   171         *  Backend for `{@link System#exit()}`
   172         *
   173         *  This exit function gives all internal output to the
   174         *  `{@link #outputFxn}` function if the `{@link #flushAtExit}`
   175         *  configuration parameter is true.
   176         *
   177         *  @see ISystemSupport#exit
   178         */
   179        override Void exit(Int stat);
   180
   181        /*!
   182         *  ======== flush ========
   183         *  Backend for `{@link System#flush()}`
   184         *
   185         *  The `flush` writes the contents of the internal character buffer
   186         *  via the `{@link #outputFxn}` function.
   187         *
   188         *  @a(Warning)
   189         *  The `{@link System}` gate is used for thread safety during the
   190         *  entire flush operation, so care must be taken when flushing with
   191         *  this `ISystemSupport` module.  Depending on the nature of the
   192         *  `System` gate, your application's interrupt latency
   193         *  may become a function of the `bufSize` parameter!
   194         *
   195         *  @see ISystemSupport#flush
   196         */
   197        override Void flush();
   198
   199        /*!
   200         *  ======== putch ========
   201         *  Backend for `{@link System#printf()}` and `{@link System#putch()}`
   202         *
   203         *  This function appends the character to an internal circular buffer.
   204         *  In the event that this buffer is not "flushed" (via `{@link #flush}`)
   205         *  before the output pointer wraps, the oldest previously put character
   206         *  will be overwritten.
   207         *
   208         *  `SysMin_flush` passes the internal buffer to the
   209         *  `{@link #outputFxn}` function and resets the internal buffer.
   210         *
   211         *  If the `{@link #flushAtExit}` configuration parameter is true,
   212         *  `SysMin_flush` is implicitly called by `{@link #exit}` and
   213         *  `{@link #abort}`.
   214         *
   215         *  @see ISystemSupport#putch
   216         */
   217        override Void putch(Char ch);
   218
   219        /*!
   220         *  ======== ready ========
   221         *  Test if character output can proceed
   222         *
   223         *  This function returns true if the internal buffer is non-zero.
   224         *
   225         *  @see ISystemSupport#ready
   226         */
   227        override Bool ready();
   228
   229    internal:
   230
   231        /*
   232         * ======== output ========
   233         *  SysMin_output__I is generated based on bufSize.
   234         *
   235         *  This function is generated so that the code does not contain a call to
   236         *  HOSTwrite if bufSize is 0. Otherwise, if bufSize is 0, the compiler
   237         *  would optimize out the HOSTwrite function, leaving a 0-length symbol.
   238         *  If the a client later tried to pull in HOSTwrite, there would be a
   239         *  symbol error.
   240         *
   241         *  This generated function is accessed through an internal config so
   242         *  that it is an indirect call in the ROM case, but optimized to a direct
   243         *  call in the RAM case.
   244         */
   245        Void output(Char *buf, UInt size);
   246        readonly config OutputFxn outputFunc = '&xdc_runtime_SysMin_output__I';
   247
   248        struct Module_State {
   249            Char outbuf[];  /* the output buffer */
   250            UInt outidx;    /* index within outbuf to next Char to write */
   251            Bool wrapped;   /* has the index (outidx) wrapped */
   252        }
   253    }
   254    /*
   255     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   256     */
   257


module xdc.runtime.SysStd

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SysStd.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== SysStd ========
    21     *  Implementation of `{@link ISystemSupport}` using ANSI C Standard Library
    22     *
    23     *  This implementation provides a fully functional implementation of
    24     *  all methods specified by `ISystemSupport`. As with all
    25     *  `ISystemSupport` modules, this module is the back-end for the
    26     *  `{@link System}` module.
    27     *
    28     *  This implementation relies on the target's runtime support libraries
    29     *  (i.e. `fflush()` and `putchar()`). Therefore the  functions are re-entrant
    30     *  (thread-safe) if the underlying rts library is re-entrant.
    31     */
    32    module SysStd inherits xdc.runtime.ISystemSupport {
    33        /*!
    34         *  ======== abort ========
    35         *  Backend for `{@link System#abort()}`
    36         *
    37         *  This abort function writes the string via `putchar()`
    38         *  and flushes via `fflush()` to `stdout`.
    39         *
    40         *  @see ISystemSupport#abort
    41         */
    42        override Void abort(CString str);
    43
    44        /*!
    45         *  ======== exit ========
    46         *  Backend for `{@link System#exit()}`
    47         *
    48         *  This exit function flushes via `fflush()` to `stdout`.
    49         *
    50         *  @see ISystemSupport#exit
    51         */
    52        override Void exit(Int stat);
    53
    54        /*!
    55         *  ======== flush ========
    56         *  Backend for `{@link System#flush()}`
    57         *
    58         *  This flush function flushes via `fflush()` to `stdout`.
    59         *
    60         *  @see ISystemSupport#flush
    61         */
    62        override Void flush();
    63
    64        /*!
    65         *  ======== putch ========
    66         *  Backend for `{@link System#printf()}` and `{@link System#putch()}`
    67         *
    68         *  This function outputs the character via `putchar()`.
    69         *
    70         *  @see ISystemSupport#putch
    71         */
    72        override Void putch(Char ch);
    73
    74        /*!
    75         *  ======== ready ========
    76         *  Test if character output can proceed
    77         *
    78         *  This always returns TRUE.
    79         *
    80         *  @see ISystemSupport#ready
    81         */
    82        override Bool ready();
    83    }
    84    /*
    85     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    86     */
    87


module xdc.runtime.System

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== System.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== System ========
    21     *  Basic system services
    22     *
    23     *  This module provides basic low-level "system" services; e.g.,
    24     *  character output, `printf`-like output, and exit handling.
    25     *
    26     *  This module is gated and other modules use its gate via the
    27     *  `{@link Gate#enterSystem}` and `{@link Gate#leaveSystem}`. The `System`
    28     *  gate must be enterable by any thread in a multi-threaded environments.  For
    29     *  example, in many real-time multi-threaded environments some types of
    30     *  threads, such as Interrupt Service Routines (ISRs), are not allowed to call
    31     *  operations that block the caller.  In such an environment, either the
    32     *  `System` gate must disable all interrupts or ISRs must never call a function
    33     *  in the `xdc.runtime` package.
    34     */
    35
    36    @Template("./System.xdt")
    37    @Gated
    38    @ModuleStartup
    39    @DirectCall
    40    module System {
    41
    42        /*!
    43         *  ======== AtexitHandler ========
    44         *  `System`'s atexit function prototype.
    45         *
    46         *  Functions of this type can be added to the list of functions that
    47         *  are executed during application termination.
    48         *
    49         *  @see #atexit
    50         */
    51        typedef Void (*AtexitHandler)(Int);
    52
    53        /*!
    54         *  ======== STATUS_UNKNOWN ========
    55         *  Unknown exit status value
    56         *
    57         *  When the program exits by calling {@link #exit System_exit()} the
    58         *  `System`'s `atexit` functions are passed the status value passed to
    59         *  `System_exit()`.  However, if the program exits using
    60         *  the ANSI C Standard Library `exit()` function, the `System`'s `atexit`
    61         *  functions are passed `System_STATUS_UNKNOWN`; ANSI C `atexit`
    62         *  functions are not passed the exit status.
    63         */
    64        const Int STATUS_UNKNOWN = 0xCAFE;
    65
    66        /*!
    67         *  ======== AbortFxn ========
    68         *  System abort function prototype.
    69         *
    70         *  Functions of this type can be plugged into `System`'s abort function
    71         *  that will be executed during abnormal application termination.
    72         *
    73         *  @see #abort
    74         */
    75        typedef Void (*AbortFxn)();
    76
    77        /*!
    78         *  ======== ExitFxn ========
    79         *  System exit function prototype.
    80         *
    81         *  Functions of this type can be plugged into `System`'s exit function that
    82         *  will be executed during normal application termination.
    83         *
    84         *  @see #exit
    85         */
    86        typedef Void (*ExitFxn)(Int);
    87
    88        /*! @_nodoc */
    89        @XmlDtd
    90        metaonly struct Module_View {
    91            String  atexitHandlers[];
    92            Int     numAtexitHandlers;
    93        };
    94
    95        /*! @_nodoc */
    96        metaonly struct PathEntryView {
    97            String entry;
    98        }
    99
   100        /*!
   101         *  ======== rovViewInfo ========
   102         *  @_nodoc
   103         */
   104        @Facet
   105        metaonly config xdc.rov.ViewInfo.Instance rovViewInfo =
   106            xdc.rov.ViewInfo.create({
   107                viewMap: [
   108                    ['XDCROOT',
   109                        {
   110                            type: xdc.rov.ViewInfo.MODULE_DATA,
   111                            viewInitFxn: 'viewInitXdcRoot',
   112                            structName: 'PathEntryView'
   113                        }
   114                    ],
   115                    ['XDCPATH',
   116                        {
   117                            type: xdc.rov.ViewInfo.MODULE_DATA,
   118                            viewInitFxn: 'viewInitXdcPath',
   119                            structName: 'PathEntryView'
   120                        }
   121                    ],
   122                ]
   123            });
   124
   125        /*!
   126         *  ======== A_cannotFitIntoArg ========
   127         *  Assert that the target's `Float` type fits in an `IArg`
   128         *
   129         *  This assertion is triggered when the `%f` format specifier is used,
   130         *  the argument treated as an `IArg`, but for the current target
   131         *  `sizeof(Float)` > `sizeof(IArg)`.
   132         */
   133        config Assert.Id A_cannotFitIntoArg = {
   134            msg: "A_cannotFitIntoArg: sizeof(Float) > sizeof(Arg)"
   135        };
   136
   137        /*!
   138         *  ======== extendedFormats ========
   139         *  Optional conversions supported by `{@link #printf System_printf}`
   140         *
   141         *  This string specifies the set of optional argument conversion
   142         *  specifiers required by the application.  By reducing the number of
   143         *  optional conversions understood by the `System {@link #printf}`
   144         *  methods, it is possible to significantly reduce the code size
   145         *  footprint of the `System` module.  This configuration parameter
   146         *  enables one to balance `printf` functionality against code size
   147         *  footprint.
   148         *
   149         *  The format of this string is simply a concatenated list of the desired
   150         *  conversion specifiers (with the leading `%` character).  For example,
   151         *  to support both `%f` and `%$L` set `extendedFormats` to `"%$L%f"`.
   152         *
   153         *  To disable all optional converstions, set `extendedFormats` to `null`
   154         *  or the empty string ("").
   155         *
   156         *  For a complete list of supported extensions, see the
   157         *  `{@link #printf System_printf}` "Extended_Format_Specifiers" section.
   158         *
   159         *  @a(Note)
   160         *  If an optional conversion is used by some part of the application and
   161         *  it is not specified in `extendedFormats`, the conversion character(s)
   162         *  and leading `%` are treated as ordinary characters to be output.  As
   163         *  a result, all subsequent arguments will almost certainly be converted
   164         *  using the wrong conversion specifier!
   165         *
   166         *  @see #printf
   167         */
   168        metaonly config String extendedFormats = "%$L%$S%$F";
   169
   170        /*!
   171         *  ======== SupportProxy ========
   172         *  The implementation module of the low-level system functions.
   173         *
   174         *  This configuration parameter allows one to "bind" a different
   175         *  implementation of the low-level services required to implement
   176         *  `System`.
   177         *  @p(code)
   178         *      var System = xdc.useModule("xdc.runtime.System");
   179         *      var SysStd = xdc.useModule("xdc.runtime.SysStd");
   180         *      System.SupportProxy = SysStd;
   181         *  @p
   182         *
   183         *  If this parameter is not set, it defaults to `{@link SysMin}`.
   184         */
   185        proxy SupportProxy inherits ISystemSupport;
   186
   187        /*!
   188         *  ======== maxAtexitHandlers ========
   189         *  Maximum number of dynamic atexit handlers allowed in the system.
   190         *
   191         *  Maximum number of `System` `atexit` handlers set during runtime via
   192         *  the `{@link System#atexit}` function.
   193         *
   194         */
   195        config Int maxAtexitHandlers = 8;
   196
   197        /*!
   198         *  ======== abortFxn ========
   199         *  Abort handler function
   200         *
   201         *  This configuration parameter allows user to plug in their own abort
   202         *  function. By default `{@link #abortStd}` which calls ANSI C Standard
   203         *  `abort()` is plugged in. Alternatively `{@link #abortSpin}` can be
   204         *  plugged which loops infinitely.
   205         *
   206         */
   207        config AbortFxn abortFxn = System.abortStd;
   208
   209        /*!
   210         *  ======== exitFxn ========
   211         *  Exit handler function
   212         *
   213         *  This configuration parameter allows user to plug in their own exit
   214         *  function. By default `{@link #exitStd}` which calls ANSI C Standard
   215         *  `exit()` is plugged in. Alternatively `{@link #exitSpin}` can be
   216         *  plugged which loops infinitely.
   217         *
   218         */
   219        config ExitFxn exitFxn = System.exitStd;
   220
   221        /*!
   222         *  ======== abort ========
   223         *  Print a message and abort currently running executable.
   224         *
   225         *  This is called when an executable abnormally terminates.
   226         *  The `System` gate is entered, the
   227         *  `{@link #SupportProxy}`'s `abort` function is called
   228         *  and then `{@link #abortFxn}` is called.
   229         *  No exit functions bound via `System_atexit()` or the ANSI C Standard
   230         *  Library `atexit()` functions are executed.
   231         *
   232         *  @param(str) abort message (not a format string)
   233         */
   234        Void abort(CString str);
   235
   236        /*!
   237         *  ======== abortStd ========
   238         *  ANSI C Standard implementation of abortFxn function
   239         *
   240         *  This function calls ANSI C Standard `abort()` to terminate currently
   241         *  running executable. This function is used by default in
   242         *  `{@link #abortFxn}`.
   243         *
   244         */
   245        Void abortStd();
   246
   247        /*!
   248         *  ======== abortSpin ========
   249         *  Lightweight implementation of abortFxn function
   250         *
   251         *  This functions loops indefinitely. This can used as an alternative
   252         *  `{@link #abortFxn}` when a lightweight implementation is
   253         *  required instead of the ANSI C Standard `abort()`.
   254         */
   255        Void abortSpin();
   256
   257        /*!
   258         *  ======== atexit ========
   259         *  Add an exit handler
   260         *
   261         *  `System_atexit` pushes `handler` onto an internal stack of functions
   262         *  to be executed when system is exiting (e.g. `System_exit` is called).
   263         *  Up to `{@link #maxAtexitHandlers}` functions can be specified in this
   264         *  manner.  During the exit processing, the functions are popped off the
   265         *  internal stack and called until the stack is empty.
   266         *
   267         *  The `System` gate is entered before the `System_atexit` functions
   268         *  are called.
   269         *
   270         *  The `SupportProxy`'s `{@link ISystemSupport#exit}` function is called
   271         *  after all the atexit functions are called.
   272         *
   273         *  @param(handler) the `AtexitHandler` to invoke during system
   274         *                  exit processing.
   275         *
   276         *  @a(returns)
   277         *  If `FALSE` is returned, the exit handler was not added and it will
   278         *  not be called during an exit.
   279         */
   280        Bool atexit(AtexitHandler handler);
   281
   282        /*!
   283         *  ======== atexitMeta ========
   284         *  Add an exit handler during configuration
   285         *
   286         *  This is the static counterpart to `System_atexit()`. This method can
   287         *  be used to add `atexit` handlers at configuration time.  These
   288         *  handlers do not count against the `maxAtexitHandlers`.
   289         *
   290         *  @param(handler) the `AtexitHandler` to invoke during system
   291         *                  exit processing.
   292         */
   293        metaonly Void atexitMeta(AtexitHandler handler);
   294
   295        /*!
   296         *  ======== exit ========
   297         *  Exit currently running executable.
   298         *
   299         *  This function is called when an executable needs to terminate
   300         *  normally.  This function processes all functions bound via
   301         *  `System_atexit` and then calls `{@link #exitFxn}`. The
   302         *  `{@link #SupportProxy}`'s `exit` function is called during this time.
   303         *
   304         *  @param(stat)    exit status to return to calling environment.
   305         */
   306        Void exit(Int stat);
   307
   308        /*!
   309         *  ======== exitStd ========
   310         *  Implements an `exitFxn` function
   311         *
   312         *  This function calls ANSI C Standard `exit()` to terminate currently
   313         *  running executable normally. This function is used by default in
   314         *  `{@link #exitFxn}`.
   315         *
   316         *  @param(stat)    exit status to return to calling environment.
   317         */
   318        Void exitStd(Int stat);
   319
   320        /*!
   321         *  ======== exitSpin ========
   322         *  Implements an `exitFxn` function
   323         *
   324         *  This functions loops indefinitely. This can used as an alternative
   325         *  `{@link #exitFxn}` when a light weight implementation is
   326         *  required instead of the ANSI C Standard `exit()`.
   327         *
   328         *  @param(stat)    exit status to return to calling environment.
   329         */
   330        Void exitSpin(Int stat);
   331
   332        /*!
   333         *  ======== processAtExit ========
   334         *  Processes all functions bound via `System_atexit`
   335         *
   336         *  This function is called by `System_exit` to process all functions
   337         *  bound via `System_atexit`. User can add this to ANSI C standard
   338         *  `atexit` function so that all functions bound via `System_atexit` are
   339         *  processed when ANSI C standard `exit` function is called.
   340         *
   341         *  @param(stat)    exit status which will passed to all functions
   342         *                  processed.
   343         */
   344        Void processAtExit(Int stat);
   345
   346        /*!
   347         *  ======== putch ========
   348         *  Output a single character
   349         *
   350         *  The `{@link #SupportProxy}`'s `putch` function is called
   351         *  by this function.
   352         *
   353         *  @param(ch) character to be output.
   354         */
   355        Void putch(Char ch);
   356
   357        /*!
   358         *  ======== flush ========
   359         *  Flush standard System I/O
   360         *
   361         *  This function causes any buffered output characters are "written"
   362         *  to the output device.
   363         *
   364         *  The `{@link #SupportProxy}`'s `flush` function is called
   365         *  by this function.
   366         */
   367        Void flush();
   368
   369        /*!
   370         *  ======== printf ========
   371         *  A smaller faster printf
   372         *
   373         *  This function behaves much like the ANSI C Standard `printf`
   374         *  but does not support the full range of format strings specified by
   375         *  the C Standard.  In addition, several non-standard format specifiers
   376         *  are recognized.
   377         *
   378         *  @a(Format Strings)
   379         *  The format string is a character string composed of zero or
   380         *  more directives: ordinary characters (not %), which are copied
   381         *  unchanged to the output stream; and conversion specifications, each of
   382         *  which results in fetching zero or more subsequent arguments.  Each
   383         *  conversion specification is introduced by the character %, and ends
   384         *  with a conversion specifier.  In between there may be (in this order)
   385         *  zero or more flags, an optional minimum field width, an optional
   386         *  precision and an optional length modifier.
   387         *
   388         *  @a(Flags)
   389         *  The following flags are supported:
   390         *  @p(dlist)
   391         *      - `-`
   392         *          The converted value is to be left adjusted on the field
   393         *          boundary (the default is right justification.)
   394         *      - `0`
   395         *          The value should be zero padded. For d, i, o, u, and x
   396         *          conversions, the converted value is padded on the left
   397         *          with zeros rather than blanks.
   398         *  @p
   399         *
   400         *  @a(Field Width)
   401         *  The optional field width specifier is a decimal digit string (with
   402         *  nonzero first digit) specifying a minimum field width. If the
   403         *  converted value has fewer characters than the field width, it will
   404         *  be padded with spaces on the left (or right, if the left-adjustment
   405         *  flag has been given).  Instead of a decimal digit string one may
   406         *  write `*` to specify that the field width is given in the next
   407         *  argument.  A negative field width is taken as a '-' flag followed
   408         *  by a positive field width.
   409         *
   410         *  @a(Precision)
   411         *  The optional precision specifier is a period ('.') followed by an
   412         *  optional decimal digit string.  Instead of a decimal digit string
   413         *  one may write `*` to specify that the precision is given in the
   414         *  next argument which must be of type int.
   415         *
   416         *  If the precision is given as just '.', or the precision is
   417         *  negative, the precision is taken to be zero.  This gives the
   418         *  minimum number of digits to appear for d, i, o, u, and x
   419         *  conversions, or the maximum number of characters to be printed from
   420         *  a string for s conversions.
   421         *
   422         *  @a(Length Modifiers)
   423         *  The optional length modifier is a single character from the following
   424         *  list.
   425         *  @p(dlist)
   426         *      - `l`
   427         *          A  following integer conversion corresponds to a long int
   428         *          or unsigned long int argument
   429         *
   430         *  @p
   431         *
   432         *  @a(Conversion Specifiers)
   433         *  The following conversion specifiers are supported.
   434         *  @p(dlist)
   435         *      - `d`, `i`
   436         *          signed integer
   437         *      - `u`
   438         *          unsigned decimal
   439         *      - `x`
   440         *          unsigned hex
   441         *      - `o`
   442         *          unsigned octal
   443         *      - `p`
   444         *          pointer (@ + hex num)
   445         *      - `c`
   446         *          character
   447         *      - `s`
   448         *          string
   449         *  @p
   450         *  @a(Extended Conversion Specifiers)
   451         *  The following conversion specifiers are optionally supported.  See
   452         *  the `{@link #extendedFormats}` configuration parameter for more
   453         *  information about how to enable these conversion specifiers.
   454         *
   455         *  @p(dlist)
   456         *      - `f`
   457         *          decimal floating point.
   458         *      - `$`
   459         *          non-ANSI conversion prefix.  This prefix indicates that the
   460         *          next character identifies a non-ANSI standard conversion. See
   461         *          the next section for details.
   462         *  @p
   463         *
   464         *  @a(Non ANSI Conversion Specifiers)
   465         *  Among the extended conversion specifiers are unique specifiers which
   466         *  are not part of ANSI printf. These are specified using a $, for
   467         *  example %$L.
   468         *
   469         *  These unique specifiers do not support the minimum field width
   470         *  attribute. Certain specifiers have additional restrictions; see below.
   471         *
   472         *  @p(dlist)
   473         *      - '$L'
   474         *          The argument is treated as a pointer to a `{@link Types#Label}`
   475         *          and is converted to an appropriate string.
   476         *      - '$F'
   477         *          Displays a file and line number; used for displaying the call
   478         *          site. This specifier consumes two arguments, the file and line
   479         *          number, in that order. See an example below.
   480         *      - '$S'
   481         *          The argument is treated as a format string, and is recursively
   482         *          formatted using any following arguments. This specifier does
   483         *          not support the use of the "precision" field for specifying
   484         *          maximum string length.
   485         *  @p
   486         *
   487         *  The following are example uses of the %$F and %$S format specifiers.
   488         *
   489         *  In this call using %$F, the compiler recognizes these symbols and
   490         *  fills in the file and line number.
   491         *  @p(code)
   492         *  System_printf("%$F", __FILE__, __LINE__);
   493         *  @p
   494         *  This call outputs, for example,
   495         *  @p(code)
   496         *  "MyCode.c", line 35:
   497         *  @p
   498         *  Here is an example using %$S, passing a recursive format string.
   499         *  @p(code)
   500         *  System_printf("Msg: %$S", "My msg, code: %d", 5);
   501         *  @p
   502         *  This outputs:
   503         *  @p(code)
   504         *  Msg: My msg, code: 5
   505         *  @p
   506         *
   507         *  @param(fmt) a 'printf-style' format string
   508         *
   509         *  @a(returns)
   510         *  `printf` returns the number of characters printed.
   511         */
   512        Int printf(CString fmt, ...);
   513
   514        /*!
   515         *  ======== aprintf ========
   516         *  `{@link #printf}` where all optional arguments are `IArg`s
   517         *
   518         *  This function will treat each argument as though it was widened to be
   519         *  of type `IArg` prior to being passed to the `{@link #printf}` function
   520         *
   521         *  @see #printf
   522         */
   523        Int aprintf(CString fmt, ...);
   524
   525        /*!
   526         *  ======== sprintf ========
   527         *  Write formated output to a character buffer
   528         *
   529         *  This function is identical to `{@link #printf}` except that the
   530         *  output is copied to the specified character buffer `buf` followed
   531         *  by a terminating '\0' character.
   532         *
   533         *  @param(buf) a character output buffer
   534         *  @param(fmt) a 'printf-style' format string
   535         *
   536         *  @a(returns)
   537         *  `sprintf` returns the number of characters output not including the
   538         *  '\0' termination character.
   539         */
   540        Int sprintf(Char buf[], CString fmt, ...);
   541
   542        /*!
   543         *  ======== asprintf ========
   544         *  `{@link #sprintf}` where all optional arguments are `IArg`s
   545         *
   546         *  This function will treat each argument as though it was widened to be
   547         *  of type `IArg` prior to being passed to the `{@link #sprintf}`
   548         *  function.
   549         *
   550         *  @see #sprintf
   551         */
   552        Int asprintf(Char buf[], CString fmt, ...);
   553
   554        /*!
   555         *  ======== vprintf ========
   556         *  A VaList printf
   557         *
   558         *  This function is identical to `{@link #printf}` except that its
   559         *  arguments are passed via a VaList (a "varargs list").
   560         *
   561         *  @param(fmt) a standard 'printf-style' format string.
   562         *  @param(va)  an args list that points to the arguments referenced
   563         *              by the fmt string
   564         *
   565         *  @a(returns)
   566         *  `vprintf` returns the number of characters output.
   567         */
   568        Int vprintf(CString fmt, VaList va);
   569
   570        /*!
   571         *  ======== avprintf ========
   572         *  `{@link #vprintf}` where all optional arguments are `IArg`s
   573         *
   574         *  This function will treat each argument as though it was widened to be
   575         *  of type `IArg` prior to being passed to the `{@link #vprintf}`
   576         *  function.
   577         *
   578         *  @see #vprintf
   579         */
   580        Int avprintf(CString fmt, VaList va);
   581
   582        /*!
   583         *  ======== vsprintf ========
   584         *  A `VaList` sprintf
   585         *
   586         *  This function is identical to `{@link #sprintf}` except that
   587         *  its arguments are passed via a `VaList` (a "varargs list").
   588         *
   589         *  @param(buf) a character output buffer
   590         *  @param(fmt) a standard '`printf`-style' format string.
   591         *  @param(va)  an arguments list that points to the arguments referenced
   592         *              by the `fmt` string
   593         *
   594         *  @a(returns)
   595         *  `vsprintf` returns the number of characters output.
   596         */
   597        Int vsprintf(Char buf[], CString fmt, VaList va);
   598
   599        /*!
   600         *  ======== avsprintf ========
   601         *  `{@link #vsprintf}` where all optional arguments are `IArg`s
   602         *
   603         *  This function is identical to `{@link #sprintf}` except that
   604         *  its arguments are passed via a `VaList` (a "varargs list").
   605         *
   606         *  This function will treat each argument as though it was widened to be
   607         *  of type `IArg` prior to being passed to the `vsprintf` function
   608         *
   609         *  @see #vsprintf
   610         */
   611        Int avsprintf(Char buf[], CString fmt, VaList va);
   612
   613        /*!
   614         *  ======== snprintf ========
   615         *  Write formated output to a character buffer
   616         *
   617         *  This function is identical to `{@link #sprintf}` except that at most
   618         *  `n` characters are copied to the specified character buffer `buf`.
   619         *  If n is zero, nothing is written to character buffer. Otherwise,
   620         *  output characters beyond the `n` - 1 are discarded rather than
   621         *  being written to the character buf, and a null character is written
   622         *  at the end of the characters written into the buffer.
   623         *
   624         *  @param(buf) a character output buffer
   625         *  @param(n)   the maximum number of characters, including '\0', written to
   626         *              the output buffer `buf`
   627         *  @param(fmt) a 'printf-style' format string
   628         *
   629         *  @a(returns)
   630         *  `snprintf` returns the number of characters that would have been
   631         *  written had `n` been sufficiently large, not counting the terminating
   632         *  '\0' character.
   633         */
   634        Int snprintf(Char buf[], SizeT n, CString fmt, ...);
   635
   636        /*!
   637         *  ======== vsnprintf ========
   638         *  A `VaList` snprintf
   639         *
   640         *  This function is identical to `{@link #snprintf}` except that
   641         *  its arguments are passed via a `VaList` (a "varargs list").
   642         *
   643         *  @param(buf) a character output buffer
   644         *  @param(n)   at most number of characters including '\0' written to
   645         *              output buffer
   646         *  @param(fmt) a standard '`printf`-style' format string.
   647         *  @param(va)  an arguments list that points to the arguments referenced
   648         *              by the `fmt` string
   649         *
   650         *  @a(returns)
   651         *  `vsnprintf` returns the number of characters that would have been
   652         *  written had `n` been sufficiently large, not counting the terminating
   653         *  '\0' character.
   654         */
   655        Int vsnprintf(Char buf[], SizeT n, CString fmt, VaList va);
   656
   657    internal:
   658
   659        /*! struct used to keep track of state during doPrint */
   660        struct ParseData {
   661            Int     width;      /* width in format specifier */
   662            Bool    lFlag;      /* length modifier flag */
   663            Bool    lJust;      /* left justify flag */
   664            Int     precis;     /* precision in format specifier */
   665            UInt    len;        /* length of formatted number */
   666            Int     zpad;       /* leading zero pad flag */
   667            Char    *end;       /* pointer to end of local buf to hold num */
   668            Bool    aFlag;      /* deal with vars on stack as IArgs */
   669            Char    *ptr;       /* ptr to local buf after filling in num */
   670        };
   671
   672        /*! typedef for generated functions to process extended formats */
   673        typedef Int (*ExtendFxn)(Char **, CString *, VaList *, ParseData *);
   674
   675        /*! config parameter used to call generated function  */
   676        readonly config ExtendFxn extendFxn = '&xdc_runtime_System_printfExtend__I';
   677
   678        /*
   679         * ======== printfExtend ========
   680         *  System_printfExtend is generated based on extendedFormats string
   681         *
   682         *  This generated function is accessed through an internal config so
   683         *  that it is an indirect call in the ROM case, but optimized to a direct
   684         *  call in the RAM case.
   685         *
   686         * @_nodoc
   687         */
   688        Int printfExtend (Char **bufp, CString *fmt, VaList *va, ParseData *parse);
   689
   690        /*!
   691         *  ======== exitFxns ========
   692         *  @_nodoc
   693         *  List of functions statically plugged to be called at exit
   694         *
   695         */
   696        metaonly config AtexitHandler exitFxns[];
   697
   698        /*!
   699         *  ======== mprintf ========
   700         *  @_nodoc
   701         */
   702        function mprintf(fmt, args);
   703
   704        /*!
   705         *  ======== doPrint ========
   706         *  @_nodoc
   707         */
   708        Int doPrint(Char buf[], SizeT n, CString fmt, VaList *pva, Bool aFlag);
   709
   710        /*!
   711         *  ======== lastFxn ========
   712         *  @_nodoc
   713         *
   714         *  Calls atexit() after all other modules have been initialized
   715         *  This used to be done in System_Module_startup() but this caused
   716         *  problems since atexit() uses a heap which isn't necessarily
   717         *  initialized.
   718         */
   719        Void lastFxn();
   720
   721        /*!
   722         *  ======== putchar ========
   723         *  @_nodoc
   724         *
   725         *  Write character ch to the buffer and, if the buffer pointer is
   726         *  non-`NULL`, update the buffer pointer.
   727         *
   728         *  Keeps track of the number of characters written into the buffer by
   729         *  modifying bufsize `n`. Atmost, `n` - 1 characters are written.
   730         */
   731        Void putchar(Char **bufp, Char ch, SizeT *n);
   732
   733        /*!
   734         *  ======== rtsExit ========
   735         *  @_nodoc
   736         */
   737        Void rtsExit();
   738
   739        /*!
   740         *  ======== atexitDone ========
   741         *  @_nodoc
   742         */
   743        Bool atexitDone();
   744
   745        /*!
   746         *  ======== Module_State ========
   747         *  @_nodoc
   748         */
   749        struct Module_State {
   750            AtexitHandler  atexitHandlers[];   /* array of atexit handlers       */
   751            Int            numAtexitHandlers;  /* Current num of atexit handlers */
   752        };
   753    }
   754    /*
   755     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   756     */
   757


module xdc.runtime.Text

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ========= Text.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Text ========
    21     *  Runtime text handling services
    22     *
    23     *  This module efficiently manages a collection of strings that have common
    24     *  substrings.  Collections with a high degree of commonality are stored in
    25     *  much less space than as ordinary table of independent C strings.
    26     *
    27     *  To further save space, the "compressed" representation need not even
    28     *  be loaded in the target's memory; see `{@link #isLoaded}`.
    29     *
    30     *  The total space available for the compressed representation of text strings
    31     *  is limited to 64K characters; each string is represented by a 16-bit
    32     *  "rope id".
    33     */
    34    @Template("./Text.xdt")
    35    @DirectCall
    36    module Text {
    37
    38        /*!
    39         *  ======== CordAddr ========
    40         *  @_nodoc
    41         */
    42        typedef Types.CordAddr CordAddr;
    43
    44        /*!
    45         *  ======== Label ========
    46         */
    47        typedef Types.Label Label;
    48
    49        /*!
    50         *  ======== RopeId ========
    51         *  @_nodoc
    52         *
    53         *  A rope id is a 16-bit value whose most-significant bit indicates
    54         *  whether the lower 15-bits are an offset into the string table
    55         *  `charTab` or an offset into the "node" table `nodeTab`.
    56         *
    57         *  The node id 0 represents the empty string "".
    58         */
    59        typedef Types.RopeId RopeId;
    60
    61        /*!
    62         *  ======== Module_View ========
    63         *  @_nodoc
    64         */
    65        @XmlDtd
    66        metaonly struct Module_View {
    67            Ptr charBase;
    68            Ptr nodeBase;
    69        };
    70
    71        /*!
    72         *  ======== nameUnknown ========
    73         *  Default unknowable instance name
    74         *
    75         *  The name of an instance if the module's instances are configured to
    76         *  not have names.
    77         */
    78        config String nameUnknown = "{unknown-instance-name}";
    79
    80        /*!
    81         *  ======== nameEmpty ========
    82         *  Default `NULL` instance name
    83         *
    84         *  The name used if the instance's name has been set to `NULL`.
    85         */
    86        config String nameEmpty = "{empty-instance-name}";
    87
    88        /*!
    89         *  ======== nameStatic ========
    90         *  Default static instance name
    91         *
    92         *  The name of an instance if the name exists but it's not loaded
    93         *  on the target.
    94         */
    95        config String nameStatic = "{static-instance-name}";
    96
    97        /*!
    98         *  ======== isLoaded ========
    99         *  Ensure character-strings are loaded in target memory
   100         *
   101         *  Character strings managed by this module are allocated together
   102         *  with other character strings, and loaded to the target, when this
   103         *  parameter is set to its default value `true`. If this parameter is
   104         *  set to `false`, the character strings managed by Text are removed from
   105         *  the application.
   106         *
   107         * A consequence of setting this parameter to `false` is that all names
   108         * assigned to static instances are set to NULL, and cannot be displayed by
   109         * the code loaded to the target. Also, the Log Events that automatically
   110         * print instance names will print NULL for any static instance. The same
   111         * code would print the pointers to the names if this parameter is set to
   112         * `true` and 'isLoaded` is set to '`false`.
   113         *
   114         * ROV is not affected by this parameter and it will also correctly display
   115         * names of static instances in their modules' views. ROV detects these
   116         * names from the saved configuration files.
   117         *
   118         * Module and event IDs are still unique and Log.Events within one module
   119         * have consecutive IDs.
   120         */
   121        config Bool isLoaded = true;
   122
   123        /*!
   124         *  ======== cordText ========
   125         *  Return `NULL` if cord is in `charTab` and `isLoaded` is `FALSE`
   126         *  @_nodoc
   127         */
   128        String cordText(CordAddr cord);
   129
   130        /*!
   131         *  ======== ropeText ========
   132         *  Convert rope to an ordinary C string
   133         *
   134         *  Convert rope to an ordinary C string or to NULL if rope refers
   135         *  to a node in nodeTab
   136         *
   137         *  @_nodoc
   138         */
   139        CString ropeText(RopeId rope);
   140
   141        /*!
   142         *  ======== matchRope ========
   143         *  Compare pattern string `pat` to String identified by `rope`.
   144         *  @_nodoc
   145         *
   146         *  @a(pre-conditions)
   147         *  @p(blist)
   148         *      - lenp must be less than or equal to the length of pat
   149         *  @p
   150
   151         *  @a(post-conditions)
   152         *  @p(blist)
   153         *      - lenp is decreased by the length of any matching prefix
   154         *  @p
   155         *
   156         *  Returns:
   157         *  @p(blist)
   158         *      - -1  `pat` does not match string
   159         *      - 0   string is a prefix of pattern
   160         *      - 1   wildcard match
   161         *  @p
   162         */
   163        Int matchRope(RopeId rope, CString pat, UShort *lenp);
   164
   165        /*!
   166         *  ======== putLab ========
   167         *  Convert label to an ASCII character sequence
   168         *
   169         *  This function converts a `{@link Types#Label}` to a sequence of
   170         *  ASCII characters, writes the characters to the supplied buffer,
   171         *  updates the buffer pointer to point to the location after the last
   172         *  output character, and returns the number of characters output.
   173         *
   174         *  No more than `len` characters will be output.  If the label would
   175         *  otherwise be longer, the output is truncated at the point where a
   176         *  potential overflow is detected. The return value always reflects the
   177         *  number of characters output, but it may be less than `len`.
   178         *
   179         *  Label structures can be initialized from any module's instance handle
   180         *  using the module's `Mod_Handle_label()` method.  See
   181         *  `{@link Types#Label}` for more information.
   182         *
   183         *  @param(lab)    address of the label to interpret
   184         *  @param(bufp)   address of the output buffer pointer or `NULL`
   185         *
   186         *                 If `bufp` is `NULL`, the label's characters are
   187         *                 output via `{@link System#putch()}`.
   188         *
   189         *  @param(len)    maximum number of characters to generate
   190         *
   191         *                 If `len` is negative, the number of characters to be
   192         *                 generated is not limited.
   193         *
   194         *  @a(returns)
   195         *  The return value always reflects the number of characters output,
   196         *  but it may be less than `len`.
   197         *
   198         *  @see Types#Label
   199         */
   200        Int putLab(Types.Label *lab, Char **bufp, Int len);
   201
   202        /*!
   203         *  ======== putMod ========
   204         *  Convert module ID to its ASCII name
   205         *
   206         *  This function converts a `{@link Types#ModuleId}` to a sequence of
   207         *  ASCII characters, writes the characters to the supplied buffer,
   208         *  updates the buffer pointer to point to the location after the last
   209         *  output character, and returns the number of characters output.
   210         *
   211         *  No more than `len` characters will be output.  If the module name would
   212         *  otherwise be longer, the output is truncated at the point where a
   213         *  potential overflow is detected. The return value always reflects the
   214         *  number of characters output, but it may be less than `len`.
   215         *
   216         *  @param(mid)    ID of the module
   217         *  @param(bufp)   address of the output buffer pointer or `NULL`
   218         *
   219         *                 If `bufp` is `NULL`, the module's name characters are
   220         *                 output via `{@link System#putch()}`.
   221         *
   222         *  @param(len)    maximum number of characters to generate
   223         *
   224         *                 If `len` is negative, the number of characters to be
   225         *                 generated is not limited.
   226         *
   227         *  @a(returns)
   228         *  The return value always reflects the number of characters output,
   229         *  but it may be less than `len`.
   230         */
   231        Int putMod(Types.ModuleId mid, Char **bufp, Int len);
   232
   233        /*!
   234         *  ======== putSite ========
   235         *  Convert call site structure to an ASCII character sequence
   236         *
   237         *  This function converts a `{@link Types#Site}` to a sequence of
   238         *  ASCII characters, writes the characters to the supplied buffer,
   239         *  updates the buffer pointer to point to the location after the last
   240         *  output character, and returns the number of characters output.
   241         *
   242         *  No more than `len` characters will be output.  If the sequence would
   243         *  otherwise be longer, the output is truncated at the point where a
   244         *  potential overflow is detected.
   245         *
   246         *  @param(site)   address of the call site structure to interpret
   247         *  @param(bufp)   address of the output buffer pointer or `NULL`
   248         *
   249         *                 If `bufp` is `NULL`, the site's name characters are
   250         *                 output via `{@link System#putch()}`.
   251         *
   252         *  @param(len)    maximum number of characters to generate
   253         *
   254         *                 If `len` is negative, the number of characters to be
   255         *                 generated is not limited.
   256         *
   257         *  @a(returns)
   258         *  The return value always reflects the number of characters output,
   259         *  but it may be less than `len`.
   260         */
   261        Int putSite(Types.Site *site, Char **bufp, Int len);
   262
   263    internal:
   264
   265        struct Node {
   266            Types.RopeId left;
   267            Types.RopeId right;
   268        };
   269
   270        typedef Bool (*RopeVisitor)(Ptr, CString);
   271
   272        struct MatchVisState {
   273            CString pat;
   274            UShort  *lenp;
   275            Int     res;
   276        };
   277
   278        struct PrintVisState {
   279            Char   **bufp;
   280            UShort len;
   281            Int    res;
   282        };
   283
   284        /* charTab[] and nodeTab[] are the "compressed" representation of
   285         * target strings used to name instances, modules, packages, ...
   286         *
   287         * The predefined node id 0 represents the empty string.
   288         */
   289        config Char charTab[] = [0];
   290        config Node nodeTab[] = [{left: 0, right: 0}];
   291
   292        config Int16 charCnt = 1;
   293        config Int16 nodeCnt = 1;
   294
   295        /*
   296         * The module ids are allocated as follows:
   297         * 0x1 - 0x4000     unnamed modules
   298         * 0x4001 - 0x7FFF  registry modules
   299         * 0x8000 - 0xFFFF  named modules
   300         *
   301         * See 'genModNames' in Text.xs
   302         *
   303         * TODO - We may be able to set unnamedModsLastId based on the config
   304         *        to give the Registry more room, but then the Registry id range
   305         *        would not be a constant.
   306         */
   307        config UInt16 unnamedModsLastId = 0x4000;
   308        config UInt16 registryModsLastId = 0x7FFF;
   309
   310    /* unnamedModCnt can be used to define a constant that allows external
   311     * modules to define their own module IDs that don't conflict with the
   312     * statically configured modules; e.g., the dlog example could use this
   313     */
   314    //    config Int16 unnamedModCnt = 0;
   315
   316        function defineRopeCord(text);
   317        function defineRopeNode(left, right);
   318
   319        function fetchAddr(raddr);
   320        function fetchCord(cid);
   321        function fetchId(rid);
   322        function fetchNode(nid);
   323
   324        function genModNames();
   325        function genPkgName();
   326
   327        Bool matchVisFxn(Ptr p, CString s);
   328        Bool printVisFxn(Ptr p, CString s);
   329
   330        Void visitRope(RopeId rope, Fxn visFxn, Ptr visState);
   331        Void visitRope2(RopeId rope, Fxn visFxn, Ptr visState, CString stack[]);
   332
   333        typedef Void (*VisitRopeFxn)(RopeId, Fxn, Ptr);
   334        typedef Void (*VisitRopeFxn2)(RopeId, Fxn, Ptr, CString[]);
   335
   336        config VisitRopeFxn visitRopeFxn = visitRope;
   337
   338        config VisitRopeFxn2 visitRopeFxn2 = visitRope2;
   339
   340        Int xprintf(Char **bufp, SizeT len, CString fmt, ...);
   341
   342        struct Module_State {
   343            CPtr charBase;
   344            CPtr nodeBase;
   345        };
   346    }
   347    /*
   348     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   349     */
   350


module xdc.runtime.Timestamp

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Timestamp.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Timestamp ========
    21     *  Timestamp services
    22     *
    23     *  This module provides `{@link xdc.runtime.ITimestampClient}` APIs for
    24     *  the xdc Runtime Support Library. Calls to these APIs are forwarded
    25     *  to a platform specific `{@link xdc.runtime.ITimestampProvider}`
    26     *  implementation.
    27     *
    28     *  A user can attach their own ITimestampProvider module
    29     *  using the following config file command:
    30     *  @p(code)
    31     *
    32     *  xdc.runtime.Timestamp.SupportProxy = xdc.useModule("usersTimestampProvider");
    33     *  @p
    34     *  If no such `{@link #SupportProxy SupportProxy}` initialization is done,
    35     *  the `{@link xdc.runtime.TimestampNull}` ITimestampProvider implementation,
    36     *  which provides null stubs for the APIs, will be attached by default.
    37     *
    38     *  If the user is developing code using CCS, the
    39     *  `{@link xdc.runtime.TimestampStd}`
    40     *  ITimestampProvider implementation, which uses the ANSI C clock()
    41     *  function, may provide a satisfactory timestamp source (remember to
    42     *  enable the profile clock in CCS).
    43     *
    44     *  To use the TimestampStd implementation, add the following to
    45     *  your config script:
    46     *  @p(code)
    47     *
    48     *  xdc.runtime.Timestamp.SupportProxy = xdc.useModule("xdc.runtime.TimestampStd");
    49     *  @p
    50     */
    51    module Timestamp inherits ITimestampClient {
    52
    53        /*!
    54         *  ======== SupportProxy ========
    55         *  User supplied time stamp provider module.
    56         *
    57         *  The SupportProxy module provides application/platform
    58         *  specific implementations of the
    59         *  `{@link xdc.runtime.ITimestampProvider}` APIs.
    60         *
    61         *  If not explicitly supplied by the user, this proxy defaults to
    62         *  `{@link xdc.runtime.TimestampNull}`,
    63         *  which provides null stubs for all of the ITimestampProvider APIs.
    64         */
    65        proxy SupportProxy inherits ITimestampProvider;
    66    }
    67    /*
    68     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    69     */
    70


module xdc.runtime.TimestampNull

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    package xdc.runtime;
    14
    15    /*!
    16     *  ======== TimestampNull ========
    17     *  Empty implementation of `{@link ITimestampProvider}`
    18     */
    19    module TimestampNull inherits ITimestampProvider {}
    20    /*
    21     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    22     */
    23


module xdc.runtime.TimestampStd

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    package xdc.runtime;
    14
    15    /*!
    16     *  ======== TimestampStd ========
    17     *  Implementation of `{@link ITimestampProvider}` using ANSI C `clock()`
    18     */
    19    module TimestampStd inherits ITimestampProvider {}
    20    /*
    21     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    22     */
    23


module xdc.runtime.Types

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Types.xdc ========
    15     */
    16
    17    package xdc.runtime;
    18
    19    /*!
    20     *  ======== Types ========
    21     *  Basic constants and types
    22     *
    23     *  This module defines basic constants and types used throughout the
    24     *  `xdc.runtime` package and, in some cases, in every module.
    25     *
    26     *  The `{@link #Common$ Common$}` structure defined by the `Types` module
    27     *  is available for (or common to) all modules. Every field of the
    28     *  `Common$` structure is a configuration parameter that may be set within
    29     *  a configuration script for any module (not just the
    30     *  `xdc.runtime` modules). The fields of this structure are typically read
    31     *  by the modules in the `xdc.runtime` package at configuration time to
    32     *  control the generation of data structures that are embedded in the
    33     *  application and referenced by these modules at runtime.
    34     *
    35     *  Every module has a configuration parameter named
    36     *  `{@link #common$ common$}` that is of type `Common$`. This allows the user
    37     *  of any module to control the module's diagnostics, where its instances
    38     *  are allocated, how they are allocated, and (for gated modules) what
    39     *  gate it should use to protect critical sections.
    40     *
    41     *  @a(Examples)
    42     *  Configuration example: The following configuration script specifies
    43     *  that the instance objects managed by the `Memory` module in the
    44     *  `xdc.runtime` package should be placed in the ".fast" memory section
    45     *  and that `ENTRY` diagnostics should be available at runtime.
    46     *
    47     *  @p(code)
    48     *      var Memory = xdc.useModule('xdc.runtime.Memory");
    49     *      Memory.common$.instanceSection = ".fast";
    50     *      Memory.common$.diags_ENTRY = Diags.RUNTIME_OFF
    51     *  @p
    52     *
    53     *  Note that by setting `Memory.common$.diags_ENTRY` to `Diags.RUNTIME_OFF`
    54     *  we are both enabling `ENTRY` events and specifying that they are initially
    55     *  disabled; they must be explicitly enabled at runtime. See the
    56     *  `{@link Diags}` modules for additional information.
    57     */
    58
    59    @CustomHeader
    60
    61    module Types {
    62
    63        /*!
    64         *  ======== ModuleId ========
    65         *  Unique module identifier
    66         *
    67         *  Module IDs are assigned at configuration time based in the set
    68         *  of modules that are "used" in the application.  So, although each
    69         *  module has a unique 16-bit ID at runtime this ID may vary between
    70         *  configurations of the application.
    71         *
    72         *  To save precious data space, module names are managed by the
    73         *  `{@link Text}` module and it is this table that is used to assign
    74         *  module IDs.  If the table is maintained on the target, the module ID
    75         *  is an "index" into this table; otherwise, the module ID is simply
    76         *  a unique integer less than the total number of modules in the
    77         *  application.
    78         *
    79         *  Although module IDs are not independent of an application's
    80         *  configuration, a module's ID may be compared to a runtime value
    81         *  symbolically.  Every module has a (generated) method that returns
    82         *  the module's ID; e.g., a module named `Task` has a method named
    83         *  `Task_Module_id()` which returns `Task`'s module ID.
    84         *
    85         *  @p(code)
    86         *      #include <xdc/runtime/Types.h>
    87         *      #include <ti/sysbios/knl/Task.h>
    88         *         :
    89         *      void checkId(Types_ModuleId modId) {
    90         *          if (Task_Module_id() == modId) {
    91         *              System_printf("Task module");
    92         *          }
    93         *      }
    94         *  @p
    95         */
    96        typedef Bits16 ModuleId;
    97
    98        typedef Bits16 DiagsMask;
    99
   100        /*!
   101         *  ======== Event ========
   102         *  `{@link ILogger}` event encoding
   103         *
   104         *  Whereas a `{@link Log#Event}` encodes an event ID and a mask, a
   105         *  `Types_Event` encodes the same event ID and the module ID of the
   106         *  module containing the call site that generated the `Types_Event`.
   107         */
   108        typedef Bits32 Event;
   109
   110        /*!
   111         *  ======== getEventId ========
   112         *  Get event ID of the specified event
   113         *
   114         *  This method is used to get an ID that can be compared to other
   115         *  "known" IDs.  For example, after a `{@link #Event Types_Event}` is
   116         *  generated, the following code determines if the event
   117         *  corresponds to a `{@link Log#L_create}` event:
   118         *  @p(code)
   119         *      Bool isCreateEvent(Types_Event evt) {
   120         *          return (Log_getEventId(Log_L_create) == Types_getEventId(evt));
   121         *      }
   122         *  @p
   123         *
   124         *  @param(evt) an event created via `{@link #makeEvent}`
   125         *
   126         *  @a(returns) This function returns the event ID of a specified event.
   127         */
   128        @Macro RopeId getEventId(Event evt);
   129
   130        /*!
   131         *  ======== getModuleId ========
   132         *  Get the module ID for the specified event
   133         *
   134         *  @param(evt) an event created via `{@link #makeEvent}`
   135         *
   136         *  @a(returns) This function returns the module ID of a specified event.
   137         */
   138        @Macro ModuleId getModuleId(Event evt);
   139
   140        /*!
   141         *  ======== makeEvent ========
   142         *  Make an Event from an Event ID and a module ID
   143         *
   144         *  @param(id)          ID of the event itself
   145         *  @param(callSite)    the module from which this event originated
   146         *
   147         *  @a(returns) This function returns an event.
   148         */
   149        @Macro Event makeEvent(RopeId id, ModuleId callSite);
   150
   151        /*!
   152         *  ======== EventId ========
   153         *  @_nodoc
   154         *
   155         *  Deprecated name for `Types.Event`; ids are often encoded as a field
   156         *  in the event itself.
   157         */
   158        typedef Event EventId;
   159
   160        /*! @_nodoc */
   161        struct CordAddr__;
   162
   163        /*! @_nodoc */
   164        typedef CordAddr__ *CordAddr;
   165
   166        /*! @_nodoc */
   167        struct GateRef__;
   168
   169        /*! @_nodoc */
   170        typedef GateRef__ *GateRef;
   171
   172        /*! @_nodoc */
   173        typedef Bits16 RopeId;
   174
   175        /*!
   176         *  ======== CreatePolicy ========
   177         *  Instance creation policy
   178         */
   179        enum CreatePolicy {
   180            STATIC_POLICY,  /*! static creation only; no runtime create/delete */
   181            CREATE_POLICY,  /*! dynamic creation, but no deletion */
   182            DELETE_POLICY   /*! dynamic creation and deletion */
   183        };
   184
   185        /*!
   186         *  ======== OutputPolicy ========
   187         *  Destination file for module's functions
   188         */
   189        enum OutputPolicy {
   190            COMMON_FILE,    /*! functions are in the common C file */
   191            SEPARATE_FILE,  /*! module has its own separate file */
   192            NO_FILE         /*! functions are not generated */
   193        };
   194
   195        /*!
   196         *  ======== Label ========
   197         *  Instance label struct
   198         *
   199         *  Label structures are used to provide human readable names for
   200         *  instance handles.
   201         *
   202         *  It is possible to initialize a `Label` from any instance handle.  All
   203         *  modules that support instances provide a method named
   204         *  `Mod_Handle_label()` which, given an instance handle and a pointer to
   205         *  a `Label` structure, initializes the structure with all available
   206         *  information.  For example, the following code fragment initializes a
   207         *  `Label` from an instance of the `HeapMin` module.
   208         *  @p(code)
   209         *      HeapMin_Handle heap;
   210         *      Types_Label label;
   211         *      HeapMin_Handle_label(heap, &label);
   212         *  @p
   213         *
   214         *  Unless you explicitly disable it, `{@link System#printf System_printf}`
   215         *  can be used to convert a pointer to a `Label` into an human readable
   216         *  "instance name".  Continuing with the example above, the following
   217         *  line can be used to print an instance's label.
   218         *  @p(code)
   219         *      System_printf("heap instance name: %$L\n", &label);
   220         *  @p
   221         *
   222         *  @see System#printf, System#extendedFormats
   223         *  @see Text#putLabel
   224         */
   225        struct Label {
   226            Ptr handle;         /*! instance object address */
   227            ModuleId modId;     /*! corresponding module id */
   228            String iname;       /*! name supplied during instance creation */
   229            Bool named;         /*! true, if `iname` is available */
   230        };
   231
   232        /*!
   233         *  ======== Site ========
   234         *  Error site description struct
   235         *
   236         *  This structure describes the location of the line that raised
   237         *  an error.
   238         *
   239         *  @field(mod) the module id of the module containing the call site
   240         *  @field(file) the name of the file containing the call site or `NULL`;
   241         *               some call sites omit the file name to save data space.
   242         *  @field(line) the line number within the file named
   243         */
   244        struct Site {
   245            ModuleId mod;   /*! module id of this site */
   246            CString file;   /*! filename of this site */
   247            Int line;       /*! line number of this site */
   248        };
   249
   250        /*!
   251         *  ======== Timestamp64 ========
   252         *  64-bit timestamp struct
   253         *
   254         *  Some platforms only support 32-bit timestamps.  In this case,
   255         *  the most significant 32-bits are always set to 0.
   256         */
   257        struct Timestamp64 {
   258            Bits32 hi;      /*! most significant 32-bits of timestamp */
   259            Bits32 lo;      /*! least significant 32-bits of timestamp */
   260        };
   261
   262        /*!
   263         *  ======== FreqHz ========
   264         *  Frequency-in-hertz struct
   265         */
   266        struct FreqHz {
   267            Bits32 hi;      /*! most significant 32-bits of frequency */
   268            Bits32 lo;      /*! least significant 32-bits of frequency */
   269        };
   270
   271        /*!
   272         *  ======== RegDesc ========
   273         *  Registry module descriptor
   274         */
   275        struct RegDesc {
   276            RegDesc         *next;
   277            CString         modName;
   278            Types.ModuleId  id;
   279            DiagsMask       mask;
   280        };
   281
   282        /*!
   283         *  ======== Common$ ========
   284         *  Common module config struct
   285         *
   286         *  Every module contains this structure during the configuration
   287         *  phase. The fields of this structure are set in configuration scripts
   288         *  and referenced by the modules in the `xdc.runtime` package. For default
   289         *  values of these fields, see `{@link Defaults}`.
   290         *
   291         *  @field(diags_ASSERT) The `{@link Diags#ASSERT}` bit of a module's
   292         *  diagnostics mask.
   293         *
   294         *  @field(diags_ENTRY) The `{@link Diags#ENTRY}` category of a module's
   295         *  diagnostics mask.
   296         *
   297         *  @field(diags_EXIT) The `{@link Diags#EXIT}` category of a module's
   298         *  diagnostics mask.
   299         *
   300         *  @field(diags_INTERNAL) The `{@link Diags#INTERNAL}` bit of a module's
   301         *  diagnostics mask.
   302         *
   303         *  @field(diags_LIFECYCLE) The `{@link Diags#LIFECYCLE}` category of a
   304         *  module's diagnostics mask.
   305         *
   306         *  @field(diags_STATUS) The `{@link Diags#STATUS}` category of a module's
   307         *  diagnostics mask.
   308         *
   309         *  @field(diags_USER1) The `{@link Diags#USER1}` category of a module's
   310         *  diagnostics mask.
   311         *
   312         *  @field(diags_USER2) The `{@link Diags#USER2}` category of a module's
   313         *  diagnostics mask.
   314         *
   315         *  @field(diags_USER3) The `{@link Diags#USER3}` category of a module's
   316         *  diagnostics mask.
   317         *
   318         *  @field(diags_USER4) The `{@link Diags#USER4}` category of a module's
   319         *  diagnostics mask.
   320         *
   321         *  @field(diags_USER5) The `{@link Diags#USER5}` category of a module's
   322         *  diagnostics mask.
   323         *
   324         *  @field(diags_USER6) The `{@link Diags#USER6}` category of a module's
   325         *  diagnostics mask.
   326         *
   327         *  @field(diags_USER7) The `{@link Diags#USER7}` category of a module's
   328         *  diagnostics mask. The bit for this category has been repurposed for the
   329         *  `{@link Diags#INFO}` category, so the use of USER7 has been deprecated.
   330         *
   331         *  @field(diags_INFO) The `{@link Diags#INFO}` category of a module's
   332         *  diagnostics mask.
   333         *
   334         *  @field(diags_USER8) The `{@link Diags#USER8}` category of a module's
   335         *  diagnostics mask. The bit for this category has been repurposed for the
   336         *  `{@link Diags#ANALYSIS}` category, so the use of USER8 has been
   337         *  deprecated.
   338         *
   339         *  @field(diags_ANALYSIS) The `{@link Diags#ANALYSIS}` category of a
   340         *  module's diagnostics mask.
   341         *
   342         *  @field(fxntab)
   343         *  This configuration parameter is only applicable to modules that
   344         *  inherit an interface and have instance objects.  Setting `fxntab`
   345         *  to `false` can save some data space but also prevents the
   346         *  application from using instance objects through abstract interfaces.
   347         *
   348         *  Function tables are used whenever it's necessary to call a module's
   349         *  methods via an abstract interface; e.g., the `{@link Memory}` module
   350         *  calls methods defined by the `{@link IHeap}` interface but there may
   351         *  be several distinct modules that implement this interface.  In order
   352         *  for this type of call to be possible, instance objects contain a
   353         *  reference to a function table containing the instance module's
   354         *  functions; the caller gets the module's function from the instance
   355         *  object and calls through a function pointer.  Every module that
   356         *  inherits an interface has such a table and modules that do not
   357         *  inherit an interface do not have a function table.
   358         *
   359         *  If this configuration parameter is set to `false`, the module's
   360         *  instance objects will NOT be initialized with a reference to their
   361         *  module's function table and, since the function table will not
   362         *  be referenced by the application, the resulting executable will be
   363         *  smaller.  However, if this parameter is `false` you must never
   364         *  attempt to use this module's instance objects via reference this
   365         *  module through an abstract interface.  Since this is often hard to
   366         *  determine, especially as an application evolves over time, you should
   367         *  only set this parameter to `false` when you are absolutely sure that
   368         *  the module's functions are always only being directly called and you
   369         *  need to absolutely minimize the data footprint of your application.
   370         *
   371         *  The default for this parameter is `true`.
   372         *
   373         *  @field(gate) A handle to the module-level `{@link IGateProvider}`
   374         *  instance to be used when this module calls functions from
   375         *  `{@link Gate}`
   376         *
   377         *  @field(gateParams) `Gate` parameters used by this module to create
   378         *  the gates used when this module calls
   379         *  `{@link Gate#allocInstance() Gate_allocInstance}`
   380         *
   381         *  @field(instanceHeap) Identifies the heap from which this module
   382         *  should allocate memory.
   383         *
   384         *  @field(instanceSection) Identifies the section in which instances
   385         *  created by this module should be placed.
   386         *
   387         *  @field(logger) The handle of the logger instance used by the module.
   388         *  All log events generated by the module are routed to this logger
   389         *  instance. See `{@link ILogger}` for details on the logger interface.
   390         *  See `{@link LoggerBuf}` and `{@link LoggerSys}` for two examples of
   391         *  logger modules provided by the `{@link xdc.runtime}` package.
   392         *
   393         *  @field(memoryPolicy) Specifies whether this module should allow
   394         *  static object creation only (`{@link #CreatePolicy STATIC_POLICY}`),
   395         *  dynamic object creation but not deletion
   396         *  (`{@link #CreatePolicy CREATE_POLICY}`), or both dynamic object
   397         *  creation and deletion (`{@link #CreatePolicy DELETE_POLICY}`).
   398         *
   399         *  @field(namedInstance) If set to `true`, each instance object is
   400         *  given an additional field to hold a string name that is used
   401         *  when displaying information about an instance. Setting this to
   402         *  `true` increases the size of the module's instance objects by a
   403         *  single word but improves the usability of tools that display
   404         *  instance objects.  If set to `false`, assignments of instance
   405         *  names are silently ignored.  This allows one to remove instance
   406         *  name support to save space without having to change any source code.
   407         *  See `{@link xdc.runtime.IInstance#name IInstance.name}` for details.
   408         *
   409         *  @field(namedModule) If set to `true`, this module's string name
   410         *  is retained on the target so that it can be displayed as part
   411         *  of `{@link Log}` and `{@link Error}` events. Setting this to `false`
   412         *  saves data space in the application at the expense of readability
   413         *  of log and error messages associated with this module.
   414         *
   415         *  Note: setting this to `false` also prevents one from controlling the
   416         *  module's diagnostics at runtime via `{@link Diags#setMask()}`.
   417         *  This method uses the module's name to lookup the module's
   418         *  diagnostics mask.  It is still possible to control the module's
   419         *  diagnostics at design-time from a configuration script.
   420         *
   421         *  @see Diags, Defaults
   422         */
   423        metaonly struct Common$ {
   424            Diags.Mode diags_ASSERT;    /*! module's Diags assert mode */
   425            Diags.Mode diags_ENTRY;     /*! module's function entry Diags mode */
   426            Diags.Mode diags_EXIT;      /*! module's function exit Diags mode */
   427            Diags.Mode diags_INTERNAL;  /*! module's internal assert mode */
   428            Diags.Mode diags_LIFECYCLE; /*! module's instance lifecycle mode */
   429            Diags.Mode diags_STATUS;    /*! module's errors and warnings */
   430            Diags.Mode diags_USER1;     /*! module's user1 Diags mode */
   431            Diags.Mode diags_USER2;     /*! module's user2 Diags mode */
   432            Diags.Mode diags_USER3;     /*! module's user3 Diags mode */
   433            Diags.Mode diags_USER4;     /*! module's user4 Diags mode */
   434            Diags.Mode diags_USER5;     /*! module's user5 Diags mode */
   435            Diags.Mode diags_USER6;     /*! module's user6 Diags mode */
   436            Diags.Mode diags_USER7;     /*! module's user7 Diags mode */
   437            Diags.Mode diags_INFO;      /*! module's informational event mode */
   438            Diags.Mode diags_USER8;     /*! module's user8 Diags mode */
   439            Diags.Mode diags_ANALYSIS;  /*! module's Diags analysis mode */
   440            Bool fxntab;                /*! @_nodoc enable function tables */
   441            IGateProvider.Handle gate;  /*! module's gate */
   442            Ptr gateParams;             /*! gate params for module created gates */
   443            IHeap.Handle instanceHeap;  /*! module's instance heap */
   444            String instanceSection;     /*! memory section for module's instances*/
   445            ILogger.Handle logger;      /*! module's logger */
   446            OutputPolicy outPolicy;     /*! destination file for module's code */
   447            CreatePolicy memoryPolicy;  /*! module's memory policy */
   448            Bool namedInstance;         /*! true => instances have string names */
   449            Bool namedModule;           /*! true => module's name is on target */
   450            Bool romPatchTable;         /*! @_nodoc */
   451        }
   452
   453        /*!
   454         *  ======== RtaDecoderData ========
   455         *  @_nodoc
   456         *
   457         *  loggers
   458         *    name - Used to identify the logger in GUI
   459         *    bufferSym - For stop-mode; symbol at which the logger's entry
   460         *                buffer can be found
   461         *    bufferLen - For stop-mode; length of the logger's entry buffer in
   462         *                MAUs
   463         */
   464        @XmlDtd metaonly struct RtaDecoderData {
   465            String targetName;
   466            String binaryParser;
   467            String endian;
   468            Int bitsPerChar;
   469            Int argSize;
   470            Int eventSize;
   471            String dataTransportClassName;
   472            String controlTransportClassName;
   473            struct {
   474                String name;
   475                String type;
   476                Any metaArgs;
   477            } loggers[ ];
   478            struct {
   479                Int id;
   480                String logger;
   481                String diagsMask;
   482            } modMap[string];
   483            struct {
   484                Int id;
   485                String msg;
   486            } evtMap[string];
   487        };
   488
   489        /*!
   490         *  ======== ViewInfo ========
   491         *  @_nodoc
   492         *  XGconf view descriptor.
   493         */
   494        metaonly struct ViewInfo {
   495            String viewType;
   496            String viewFxn;
   497            String fields[];
   498        }
   499
   500    internal:
   501
   502        typedef Bits32 LogEvent;
   503
   504        typedef Void (*LoggerFxn0)(Ptr, LogEvent, ModuleId);
   505        typedef Void (*LoggerFxn1)(Ptr, LogEvent, ModuleId, IArg);
   506        typedef Void (*LoggerFxn2)(Ptr, LogEvent, ModuleId, IArg, IArg);
   507        typedef Void (*LoggerFxn4)(Ptr, LogEvent, ModuleId, IArg, IArg, IArg, IArg);
   508        typedef Void (*LoggerFxn8)(Ptr, LogEvent, ModuleId, IArg, IArg, IArg, IArg,
   509                                   IArg, IArg, IArg, IArg);
   510
   511        struct Vec {
   512            Int len;
   513            Ptr arr;
   514        };
   515
   516        /*
   517         *  ======== Link ========
   518         *  Link used to maintain atomic linked lists
   519         */
   520        struct Link {
   521            Link *next;
   522            Link *prev;
   523        };
   524
   525        /*
   526         *  ======== InstHdr ========
   527         *  Header for all runtime created instance objects
   528         */
   529        struct InstHdr {
   530            Link link;
   531        }
   532
   533        /*
   534         *  ======== PrmsHdr ========
   535         *  Header for all _Params structures
   536         */
   537        struct PrmsHdr {
   538            SizeT size;     /* size of the entire parameter structure */
   539            Ptr self;       /* pointer to self; used to check params are init'd */
   540            Ptr modFxns;
   541            Ptr instPrms;
   542        }
   543
   544        /*
   545         *  ======== Base ========
   546         *  Header for all module vtables
   547         */
   548        struct Base {
   549            const Base *base;     /* points to inherited interface base */
   550        }
   551
   552        /*
   553         *  ======== SysFxns2 ========
   554         *  System data embedded in module's vtable
   555         */
   556        struct SysFxns2 {
   557
   558            /*
   559             *  ======== __create ========
   560             *  Signature of configuration generated module instance constructor
   561             *
   562             *  This function calls Core_createObject().
   563             *
   564             *  Params:
   565             *      CPtr          - pointer to struct of required create args
   566             *      const UChar * - pointer to struct of default create parameters
   567             *      SizeT         - size of default params structure
   568             *      Error_Block * - caller's error block pointer
   569             */
   570            Ptr (*__create)(CPtr, const UChar *, SizeT, Error.Block *);
   571            // 490928 Ptr (*__create)(CPtr, const UChar *, SizeT, Error.Block *);
   572
   573            Void (*__delete)(Ptr);
   574            Label *(*__label)(Ptr, Label *);
   575            ModuleId __mid;
   576        }
   577    }
   578    /*
   579     *  @(#) xdc.runtime; 2, 1, 0,1; 11-21-2018 13:30:33; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   580     */
   581


module xdc.runtime.knl.Cache

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Cache.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18    import xdc.runtime.knl.ICacheSupport;
    19
    20    /*!
    21     *  ======== Cache ========
    22     *  Cache Services
    23     *
    24     *  The Cache module provide APIs to allow applications to maintain cache
    25     *  coherency.
    26     *
    27     *  This module will use an OS specific delegate (back-end) to manipulate the
    28     *  cache.
    29     *  This module has a module wide config parameter {@link #Proxy} which needs to
    30     *  be bound to an OS specific delegate before this module can be used.
    31     *
    32     *  Here is an example showing how the proxy is bound to an BIOS 6.x specific
    33     *  delegate.
    34     *
    35     *  @p(code)
    36     *  var Cache = xdc.useModule('xdc.runtime.knl.Cache');
    37     *  Cache.Proxy = xdc.useModule('ti.sysbios.xdcruntime.CacheSupport');
    38     *  @p
    39     *
    40     *  Typically the package containing the delegates have a Settings module that
    41     *  will bind all {@link xdc.runtime.knl} proxies. The following
    42     *  example sets up all the xdc.runtime.knl proxies.
    43     *
    44     *  @p(code)
    45     *  xdc.useModule("ti.sysbios.xdcruntime.Settings");
    46     *  @p
    47     */
    48    @DirectCall
    49
    50    module Cache
    51    {
    52        /*!
    53         *  ======== Proxy ========
    54         *  ICacheSupport proxy
    55         *
    56         *  Cache will use this proxy to access the cache hardware using
    57         *  OS specific APIs.
    58         */
    59        proxy Proxy inherits ICacheSupport;
    60
    61        /*!
    62         *  ======== inv ========
    63         *  Invalidate range of memory for all cache(s)
    64         *
    65         *  Invalidate the range of memory within the specified starting
    66         *  address and byte count.  The range of addresses operated on
    67         *  gets quantized to whole cache lines in each cache.  All lines
    68         *  in range are invalidated for all cache types.
    69         *
    70         *  @param(blockPtr) start address of range to be invalidated
    71         *  @param(byteCnt)  number of bytes to be invalidated
    72         *  @param(wait)     wait until the operation is completed
    73         *  @param(eb)       error block
    74         *  @a(returns)  true for success; false for error.
    75         */
    76        Bool inv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
    77
    78        /*!
    79         *  ======== wb ========
    80         *  Writes back a range of memory from all cache(s)
    81         *
    82         *  Writes back the range of memory within the specified starting
    83         *  address and byte count.  The range of addresses operated on
    84         *  gets quantized to whole cache lines in each cache.  All lines
    85         *  within the range are left valid in all caches and the data
    86         *  within the range will be written back to the source memory.
    87         *
    88         *  @param(blockPtr) start address of range to be invalidated
    89         *  @param(byteCnt)  number of bytes to be invalidated
    90         *  @param(wait)     wait until the operation is completed
    91         *  @param(eb)       error block
    92         *  @a(returns)  true for success; false for error.
    93         */
    94        Bool wb(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
    95
    96        /*!
    97         *  ======== wbInv ========
    98         *  Write back and invalidate range of memory.
    99         *
   100         *  Writes back and invalidates the range of memory within the
   101         *  specified starting address and byte count.  The range of
   102         *  addresses operated on gets quantized to whole cache lines in
   103         *  each cache.  All lines within the range are written back to the
   104         *  source memory and then invalidated for all cache types.
   105         *
   106         *  @param(blockPtr) start address of range to be invalidated
   107         *  @param(byteCnt)  number of bytes to be invalidated
   108         *  @param(wait)     wait until the operation is completed
   109         *  @param(eb)       error block
   110         *  @a(returns)  true for success; false for error.
   111         */
   112        Bool wbInv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
   113
   114        /*!
   115         *  ======== wait ========
   116         *  Wait for a previous cache operation to complete
   117         *
   118         *  Wait for the cache wb/wbInv/inv operation to complete.  A cache
   119         *  operation is not truly complete until it has worked its way
   120         *  through all buffering and all memory writes have landed in the
   121         *  source memory.
   122         *
   123         *  @param(eb)       error block
   124         *  @a(returns)  true for success; false for error.
   125         */
   126        Bool wait(Error.Block *eb);
   127    }
   128    /*
   129     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:39; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   130     */
   131


module xdc.runtime.knl.CacheSupportNull

     1    /*!
     2     *  ======== CacheSupport.xdc ========
     3     *  Empty ICacheSupport implementation
     4     */
     5
     6    module CacheSupportNull inherits ICacheSupport
     7    {
     8
     9    }
    10    /*
    11     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:39; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    12     */
    13


module xdc.runtime.knl.GateH

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== GateH.xdc ========
    15     */
    16
    17    import xdc.runtime.IGateProvider;
    18
    19    /*!
    20     *  ======== GateH ========
    21     *  Provides APIs to protect critical sections when an IGate.Handle is
    22     *  available.
    23     *
    24     *  An application can isolate itself from IGate implementations by using
    25     *  this module. The application must first obtain an IGate.Handle.
    26     *  It can get such a handle by directly calling {@link GateThread#create} or
    27     *  {@link GateProcess#create}. Then the application can use the generic
    28     *  APIs provided by this module.
    29     *
    30     *  The underlying gates are nesting in nature and users have to leave
    31     *  the gate as many times as they entered it.
    32     */
    33    @DirectCall
    34
    35    module GateH
    36    {
    37        /*!
    38         *  Proxy used for optimization.
    39         *
    40         *  The GateH.Proxy config param may be used to optimize this module. If all
    41         *  the instances supplied to GateH functions are created using the same
    42         *  module (e.g. GateMutex), then setting this Proxy to that module and
    43         *  disabling abstract instances will allow for better run-time
    44         *  optimization.
    45         *
    46         *  Caution: all instances used by GateH in a given executable must be
    47         *  created by the same module in order to use this optimization technique.
    48         *
    49         * Configuration Script
    50         *
    51         * @p(code)
    52         * var GateH = xdc.useModule('xdc.runtime.knl.GateH');
    53         * GateH.Proxy = xdc.useModule('ti.sysbios.gates.GateMutex');
    54         * GateH.Proxy.abstractInstances$ = false;
    55         * @p
    56         *
    57         * Target Code
    58         *
    59         * @p(code)
    60         * #include <xdc/runtime/IGateProvider.h>
    61         * #include <xdc/runtime/knl/GateH.h>
    62         * #include <ti/sysbios/gates/GateMutex.h>
    63         *
    64         * GateMutex_Handle gate;
    65         * IGateProvider_Handle igate;
    66         * IArg key;
    67         *
    68         * gate = GateMutex_create(NULL, NULL);
    69         * igate = GateMutex_Handle_upCast(gate);
    70         *
    71         * key = GateH_enter(igate);
    72         * ...
    73         * GateH_leave(igate, key);
    74         * @p
    75         */
    76        proxy Proxy inherits IGateProvider;
    77
    78        /*!
    79         * ======== enter ========
    80         * Enter a gate
    81         *
    82         * @param(hdl)    IGateProvider.Handle
    83         * @a(returns)    key
    84         */
    85        IArg enter(IGateProvider.Handle hdl);
    86
    87        /*!
    88         * ======== leave ========
    89         * Leave a gate
    90         *
    91         * @param(hdl)    IGateProvider.Handle
    92         * @param(key)    key returned by enter();
    93         */
    94        Void leave(IGateProvider.Handle hdl, IArg key);
    95    }
    96    /*
    97     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:39; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    98     */
    99


module xdc.runtime.knl.GateProcess

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== GateProcess.xdc ========
    15     */
    16
    17    import xdc.runtime.Assert;
    18    import xdc.runtime.Error;
    19    import xdc.runtime.IGateProvider;
    20    import xdc.runtime.knl.IGateProcessSupport;
    21
    22    /*!
    23     *  ======== GateProcess ========
    24     *  Provides protection of critical sections across processes.
    25     *
    26     *  This module provides services through its proxy
    27     *  IGateProcessSupport interface. It has a module wide config parameter
    28     *  {@link #Proxy} which needs to be bound to an OS specific delegate before
    29     *  this module can be used.
    30     *
    31     *  Here is an example showing how the proxy is bound to an BIOS 6.x specific
    32     *  delegate.
    33     *
    34     *  @p(code)
    35     *  var GateProcess = xdc.useModule('xdc.runtime.knl.GateProcess');
    36     *  GateProcess.Proxy =
    37     *      xdc.useModule('ti.sysbios.xdcruntime.GateProcessSupport');
    38     *  @p
    39     *
    40     *  Typically the package containing the delegates have a Settings module that
    41     *  will bind all {@link xdc.runtime.knl} proxies. The following
    42     *  example sets up all the xdc.runtime.knl proxies.
    43     *
    44     *  @p(code)
    45     *  xdc.useModule("ti.sysbios.xdcruntime.Settings");
    46     *  @p
    47     */
    48    @InstanceInitError      /* because initialization can fail */
    49    @InstanceFinalize       /* have to GateProcess_Proxy_delete(gate) on delete */
    50
    51    module GateProcess inherits IGateProvider
    52    {
    53        /*! Status returned by {@link #getReferenceCount} when there is an error */
    54        const Int GETREFCOUNT_FAILED = -1;
    55
    56        /*! Proxy that needs to be bound to an OS specific delegate. */
    57        proxy Proxy inherits IGateProcessSupport;
    58
    59        /*! Assert when  an invalid key is passed to create */
    60        config Assert.Id A_invalidKey = {
    61            msg: "A_invalidKey: the key must be set to a non-default value"
    62        };
    63
    64    instance:
    65
    66        /*!
    67         *  globally unique key for SysV-style semaphore
    68         *
    69         *  This is a required parameter.
    70         */
    71        config Int key = -1;
    72
    73       /*!
    74        *  ======== create ========
    75        *  Create a GateProcess object.
    76        *
    77        *  This function creates a new `GateProcess` object which is initialized to
    78        *  count.  All gates created with the same key reference the same
    79        *  underlying synchronization object and work between processes.  For
    80        *  compatibility with the IGateProvider interface the argument key is
    81        *  passes in the params struct rather than as a full argument, but it is
    82        *  required.  Therefore calling this function with a `NULL` params struct
    83        *  is illegal.
    84        */
    85        override create();
    86
    87        /*!
    88         *  ======== getReferenceCount ========
    89         *  Get the number of processes with references to this Gate.
    90         *
    91         *  @param(eb)        Pointer to Error.Block
    92         *  @a(returns)       Returns the number of processes that possess a
    93         *                    reference to this gate, or GETREFCOUNT_FAILED if an
    94         *            error occured.
    95         */
    96        Int getReferenceCount(Error.Block *eb);
    97
    98    internal:
    99
   100        struct Instance_State {
   101            Proxy.Handle proxyHandle;
   102        }
   103    }
   104    /*
   105     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:39; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   106     */
   107


module xdc.runtime.knl.GateProcessSupportNull

     1    /*!
     2     *  ======== GateProcessSupportNull.xdc ========
     3     *  Empty IGateProcessSupport implementation
     4     */
     5
     6    module GateProcessSupportNull inherits IGateProcessSupport
     7    {
     8    }
     9    /*
    10     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:39; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    11     */
    12


module xdc.runtime.knl.GateThread

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== GateThread.xdc ========
    15     */
    16
    17    import xdc.runtime.IGateProvider;
    18    import xdc.runtime.knl.IGateThreadSupport;
    19
    20    /*!
    21     *  ======== GateThread ========
    22     *  Provides protection of critical sections across threads.
    23     *
    24     *  This module provides services through its proxy
    25     *  IGateThreadSupport interface. It has a module wide config parameter
    26     *  {@link #Proxy} which needs to be bound to an OS specific delegate before
    27     *  this module can be used.
    28     *
    29     *  Here is an example showing how the proxy is bound to an BIOS 6.x specific
    30     *  delegate.
    31     *
    32     *  @p(code)
    33     *  var GateThread = xdc.useModule('xdc.runtime.knl.GateThread');
    34     *  GateThread.Proxy =
    35     *      xdc.useModule('ti.sysbios.xdcruntime.GateThreadSupport');
    36     *  @p
    37     *
    38     *  Typically the package containing the delegates have a Settings module that
    39     *  will bind all {@link xdc.runtime.knl} proxies. The following
    40     *  example sets up all the xdc.runtime.knl proxies.
    41     *
    42     *  @p(code)
    43     *  xdc.useModule("ti.sysbios.xdcruntime.Settings");
    44     *  @p
    45     */
    46    @InstanceInitError      /* because initialization can fail */
    47    @InstanceFinalize       /* have to Gate_Proxy_delete(sem) on delete */
    48
    49    module GateThread inherits IGateProvider
    50    {
    51        /*! Proxy that needs to be bound to an OS specific delegate. */
    52        proxy Proxy inherits IGateThreadSupport;
    53
    54    internal:
    55
    56        struct Instance_State {
    57            Proxy.Handle proxyHandle;
    58        }
    59
    60    }
    61    /*
    62     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:39; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    63     */
    64


module xdc.runtime.knl.GateThreadSupportNull

     1    /*!
     2     *  ======== GateThreadSupportNull.xdc ========
     3     *  Empty IGateProcessSupport implementation
     4     */
     5
     6    module GateThreadSupportNull inherits IGateThreadSupport
     7    {
     8    }
     9    /*
    10     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    11     */
    12


interface xdc.runtime.knl.ICacheSupport

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== ICacheSupport.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18
    19    /*!
    20     *  ======== ICacheSupport ========
    21     *  Interface for OS specific back-end.
    22     *
    23     *  The {@link xdc.runtime.knl} package contains modules that provide typical
    24     *  OS services. These xdc.runtime.knl modules require proxies to be
    25     *  bound to an OS specific delegate. This specifies the interface to
    26     *  be implemented by the OS specific delegate for
    27     *  {@link xdc.runtime.knl#Cache} module.
    28     *
    29     */
    30    @DirectCall
    31
    32    interface ICacheSupport
    33    {
    34        /*!
    35         *  ======== inv ========
    36         *  Invalidates range of memory.
    37         *
    38         *  Invalidate the range of memory within the specified starting
    39         *  address and byte count.  The range of addresses operated on
    40         *  gets quantized to whole cache lines in each cache.  All lines
    41         *  in range are invalidated for all the 'type' caches.
    42         *
    43         *  @param(blockPtr) start address of range to be invalidated
    44         *  @param(byteCnt)  number of bytes to be invalidated
    45         *  @param(wait)     wait until the operation is completed
    46         *  @param(eb)       error block
    47         *  @a(returns)  true for success; false for error.
    48         */
    49        Bool inv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
    50
    51        /*!
    52         *  ======== wb ========
    53         *  Writes a range of memory from all cache(s)
    54         *
    55         *  Writes the range of memory within the specified starting
    56         *  address and byte count.  The range of addresses operated on
    57         *  gets quantized to whole cache lines in each cache.  All lines
    58         *  within the range are left valid in the 'type' caches and the data
    59         *  within the range will be written      to the source memory.
    60         *
    61         *  @param(blockPtr) start address of range to be invalidated
    62         *  @param(byteCnt)  number of bytes to be invalidated
    63         *  @param(wait)     wait until the operation is completed
    64         *  @param(eb)       error block
    65         *  @a(returns)  true for success; false for error.
    66         */
    67        Bool wb(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
    68
    69        /*!
    70         *  ======== wbInv ========
    71         *  Writes back and invalidates range fo memory.
    72         *
    73         *  Writes and invalidates the range of memory within the
    74         *  specified starting address and byte count.  The range of
    75         *  addresses operated on gets quantized to whole cache lines in
    76         *  each cache.  All lines within the range are written      to the
    77         *  source memory and then invalidated for all 'type' caches.
    78         *
    79         *  @param(blockPtr) start address of range to be invalidated
    80         *  @param(byteCnt)  number of bytes to be invalidated
    81         *  @param(wait)     wait until the operation is completed
    82         *  @param(eb)       error block
    83         *  @a(returns)  true for success; false for error.
    84         */
    85        Bool wbInv(Ptr blockPtr, SizeT byteCnt, Bool wait, Error.Block *eb);
    86
    87        /*!
    88         *  ======== wait ========
    89         *  Wait for a previous cache operation to complete
    90         *
    91         *  Wait for the cache wb/wbInv/inv operation to complete.  A cache
    92         *  operation is not truly complete until it has worked its way
    93         *  through all buffering and all memory writes have landed in the
    94         *  source memory.
    95         *
    96         *  @a(returns)  true for success; false for error.
    97         */
    98        Bool wait(Error.Block *eb);
    99
   100    }
   101    /*
   102     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   103     */
   104


interface xdc.runtime.knl.IGateProcessSupport

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== IGateProcessSupport.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18
    19    /*!
    20     *  ======== IGateProcessSupport ========
    21     *  Interface for OS specific back-end.
    22     *
    23     *  The {@link xdc.runtime.knl} package contains modules that provide typical
    24     *  OS services. These xdc.runtime.knl modules require proxies to be
    25     *  bound to an OS specific delegate. This specifies the interface to
    26     *  be implemented by the OS specific delegate for
    27     *  {@link xdc.runtime.knl#GateProcess} module.
    28     *
    29     *  The implementation of IGateThreadSupport should try to implement a gate
    30     *  that supports priority inversion.
    31     */
    32    interface IGateProcessSupport inherits IGateThreadSupport
    33    {
    34
    35        /*! Status returned by {@link #getReferenceCount} when there is an error */
    36        const Int GETREFCOUNT_FAILED = -1;
    37
    38    instance:
    39
    40        config Int key = -1; /*! globally unique key for SysV-style semaphore */
    41
    42       /*!
    43        *  ======== create ========
    44        *  Create a GateProcess object.
    45        *
    46        *  This function creates a new `GateProcess` object which is initialized to
    47        *  count.  All gates created with the same key reference the same
    48        *  underlying synchronization object and work between processes.  The
    49        *  underlying synchronization object should be automatically deleted when
    50        *  all references to it have been deleted, and the reference count should
    51        *  An implementation for a platform on which this is technically impossible
    52        *  (e.g. an operating system that does not support multiple processes) may
    53        *  provide a 'toy' implemenation with behavior matching that of
    54        *  IGateProcessSupport.
    55        */
    56        override create();
    57
    58        /*!
    59         *  ======== getReferenceCount ========
    60         *  Get the number of processes with references to this Gate.
    61         *
    62         *  @param(err)     Pointer to Error.Block
    63         *  @a(returns)     Returns the number of processes that possess a
    64         *          reference to this gate, or GETREFCOUNT_FAILED if an
    65         *          error occured.
    66         *                  A 'toy' implementation should always return 0.
    67         */
    68        Int getReferenceCount(Error.Block* err);
    69
    70    }
    71    /*
    72     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    73     */
    74


interface xdc.runtime.knl.IGateThreadSupport

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== IGateThreadSupport.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== IGateThreadSupport ========
    19     *  Interface for OS specific back-end.
    20     *
    21     *  The {@link xdc.runtime.knl} package contains modules that provide typical
    22     *  OS services. These xdc.runtime.knl modules require proxies to be
    23     *  bound to an OS specific delegate. This specifies the interface to
    24     *  be implemented by the OS specific delegate for
    25     *  {@link xdc.runtime.knl#GateThread} module.
    26     *
    27     *  The implementation of IGateThreadSupport should try to implement a gate
    28     *  that supports priority inversion.
    29     *
    30     *  See {@link xdc.runtime.knl} for more details.
    31     */
    32    interface IGateThreadSupport inherits xdc.runtime.IGateProvider
    33    {
    34
    35    }
    36    /*
    37     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    38     */
    39


interface xdc.runtime.knl.ISemaphore

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13
    14    /*
    15     *  ======== ISemaphore.xdc ========
    16     */
    17
    18    import xdc.runtime.Error;
    19
    20    /*!
    21     *  ======== ISemaphore ========
    22     *  Interface implemented by all front-end semaphore providers.
    23     *
    24     *  {@link #SemThread} and {@link #SemProcess}. [EXPERIMENTAL]
    25     *  Semaphores can be used for synchronization and mutual exclusion.
    26     *
    27     *  pend() is used to wait for a semaphore. The timeout parameter allows the
    28     *  caller to wait until a timeout, wait indefinitely, or not wait at all.
    29     *  The return value indicates whether or not the wait was successful.
    30     *
    31     *  post() is used to signal a semaphore. If no thread is waiting on the
    32     *  semaphore, then post() increments the semaphore count (for binary
    33     *  semaphores, the count is always 0 or 1).
    34     *
    35     */
    36    @DirectCall
    37    interface ISemaphore {
    38
    39        /*!
    40         *  ======== PendStatus ========
    41         *  Error codes returned by Semaphore_pend
    42         */
    43        enum PendStatus {
    44            PendStatus_ERROR = -1,
    45            PendStatus_TIMEOUT = 0,
    46            PendStatus_SUCCESS = 1
    47        };
    48
    49        /*! Used as the timeout value to specify wait forever */
    50        const UInt FOREVER = ~(0);
    51
    52        /*! Types of semaphores. */
    53        enum Mode {
    54            Mode_COUNTING,  /*! Counting semaphore. */
    55            Mode_BINARY     /*! Binary Semaphore. */
    56        };
    57
    58    instance:
    59
    60        /*!
    61         *  ======== mode ========
    62         *  Semaphore mode. Default is COUNTING.
    63         *
    64         *  When mode is BINARY , the semaphore has only two states, available
    65         *  and unavailable. When mode is COUNTING, the semaphore keeps track of
    66         *  number of times a semaphore is posted.
    67         */
    68        config Mode mode = Mode_COUNTING;
    69
    70        /*!
    71         *  ======== pend ========
    72         *  Wait for the semaphore to become available.
    73         *
    74         *  @p(blist)
    75         *  -{@link #PendStatus_ERROR} if an error occured.
    76         *  -{@link #PendStatus_TIMEOUT} denotes timeout.
    77         *  -{@link #PendStatus_SUCCESS} semaphore was decremented.
    78         *    details.
    79         *  @p
    80         *
    81         *  @param(timeout) timeout in microseconds
    82         *  @param(eb)      error block
    83         *  @a(returns)     refer to description above
    84         */
    85        Int pend(UInt timeout, Error.Block *eb);
    86
    87        /*!
    88         *  ======== post ========
    89         *  Increment the semaphore count.
    90         *
    91         *  @param(eb)      error block
    92         *  @a(returns)     true for success, false for error in error block
    93         */
    94        Bool post(Error.Block *eb);
    95    }
    96    /*
    97     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    98     */
    99


interface xdc.runtime.knl.ISemProcessSupport

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== ISemProcessSupport.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18
    19    /*!
    20     *  ======== ISemProcessSupport ========
    21     *  Interface for OS specific back-end.
    22     *
    23     *  The {@link xdc.runtime.knl} package contains modules that provide typical
    24     *  OS services. These xdc.runtime.knl modules however require proxies to be
    25     *  bound to an OS specific delegate. This specifies the interface to
    26     *  be implemented by the OS specific delegate for
    27     *  {@link xdc.runtime.knl#SemProcess} module.
    28     *
    29     *  create() takes a 32-bit integer key parameter to be used for identifying
    30     *  the semaphore to create across processes. For example, for Linux System V
    31     *  semaphores, the key is necessary so that different processes can access
    32     *  the same semaphore.
    33     */
    34    interface ISemProcessSupport inherits ISemaphore
    35    {
    36
    37    instance:
    38
    39       /*!
    40        *  ======== create ========
    41        *  Create a SemProcess object.
    42        *
    43        *  This function creates a new `SemProcess` object which is
    44        *  initialized to count.
    45        *  All semaphores created with the same key reference the same
    46        *  underlying synchronization object and work between processes.  The
    47        *  underlying synchronization object should be automatically deleted when
    48        *  all references to it have been deleted, and the reference count should
    49        *  be maintained consistently across process forks or similar operations.
    50        *  An implementation for a platform on which this is technically impossible
    51        *  (e.g. an operating system that does not support multiple processes) may
    52        *  provide a 'toy' implementation with behavior matching that of
    53        *  `{@link ISemProcessSupport}`.
    54        *
    55        *  @param(count)    initial semaphore count
    56        *  @param(key)      globally unique key
    57        */
    58        create(Int count, Int key);
    59
    60    }
    61    /*
    62     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    63     */
    64


interface xdc.runtime.knl.ISemThreadSupport

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== ISemThreadSupport.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== ISemThreadSupport ========
    19     *  Interface for OS specific back-end.
    20     *
    21     *  The {@link xdc.runtime.knl} package contains modules that provide typical
    22     *  OS services. These xdc.runtime.knl modules require proxies to be
    23     *  bound to an OS specific delegate. This specifies the interface to
    24     *  be implemented by the OS specific delegate for
    25     *  {@link xdc.runtime.knl#SemThread} module.
    26     *
    27     *  This interface adds the create() function.
    28     */
    29    interface ISemThreadSupport inherits ISemaphore
    30    {
    31
    32    instance:
    33
    34       /*!
    35        *  ======== create ========
    36        *  Create a Semaphore object
    37        *
    38        *  This function creates a new Semaphore object which is initialized to
    39        *  count.
    40        *
    41        *  @param(count)    initial semaphore count
    42        */
    43        create(Int count);
    44    }
    45    /*
    46     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    47     */
    48


interface xdc.runtime.knl.ISync

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== ISync.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18
    19    /*!
    20     *  ======== ISync ========
    21     *  OS independent synchronization
    22     *
    23     *  This interface allows clients to select method of synchronization in an OS
    24     *  independent way.
    25     *
    26     *  Modules that require the user to pick a synchronization method, will
    27     *  request a `{@link #Handle}`. Clients of such modules can pick a blocking
    28     *  `ISync` implementation  or a non-blocking implementation.
    29     *
    30     *  This interface specifies two main functions `{@link #signal}` and
    31     *  `{@link #wait}`. These two functions are always used in pairs in modules
    32     *  that use `ISync` instances. The `signal()` function is used to signal
    33     *  completion of an activity. The `wait()` function will allow the module to
    34     *  block or poll for completion of the same activity.
    35     *
    36     *  `ISync` mandates that the sync mechanism be binary and not support counters.
    37     *  Although the `wait()` function seems meaningless in the case of
    38     *  non-blocking sync, it allows modules to be written generically and support
    39     *  all `ISync` implementations. For non-blocking `ISync` the `wait()` function
    40     *  will return `WaitStatus_TIMEOUT` to denote timeout.
    41     */
    42    @DirectCall
    43
    44    interface ISync
    45    {
    46        /*!
    47         *  ======== WaitStatus ========
    48         *  Error codes returned by ISync_wait
    49         */
    50        enum WaitStatus {
    51            WaitStatus_ERROR = -1,
    52            WaitStatus_TIMEOUT = 0,
    53            WaitStatus_SUCCESS = 1
    54        };
    55
    56        /*!
    57         *  ======== Q_BLOCKING ========
    58         *  Blocking quality
    59         *
    60         *  Implementations with this "quality" may cause the calling thread to
    61         *  block;
    62         */
    63        const Int Q_BLOCKING = 1;
    64
    65        /*! Used to wait forever */
    66        const UInt WAIT_FOREVER = ~(0);
    67
    68        /*! Used to specify no waiting */
    69        const UInt NO_WAIT = 0;
    70
    71    instance:
    72        /*!
    73         *  ======== create ========
    74         *  Create an ISync instance.
    75         */
    76        create();
    77
    78        /*!
    79         *  ======== query ========
    80         *  Query for a particular quality.
    81         *
    82         *  FALSE is returned if quality not supported.
    83         *
    84         *  @param(qual)    quality
    85         *  @b(returns)     TRUE or FALSE.
    86         */
    87        Bool query(Int qual);
    88
    89        /*!
    90         *  ======== signal ========
    91         *  Called at completion of an activity.
    92         *
    93         *  This function is non-blocking. It is also required that the underlying
    94         *  sync be binary in nature.
    95         *
    96         *  This function does not take an Error.Block intentionally because
    97         *  it can be called from ISR context.
    98         */
    99        Void signal();
   100
   101        /*!
   102         *  ======== wait ========
   103         *  Called to wait/poll for completion of an activity.
   104         *
   105         *  This function can block. Non-blocking implementations should return
   106         *  WaitStatus_TIMEOUT to indicate a timeout.
   107         *
   108         *  @p(blist)
   109         *  -{@link #WaitStatus_ERROR} if an error occured.
   110         *  -{@link #WaitStatus_TIMEOUT} denotes timeout.
   111         *  -{@link #WaitStatus_SUCCESS} semaphore was decremented.
   112         *  @p
   113         *
   114         *  @param(timeout)     Timeout in microseconds
   115         *  @param(eb)Hist      Pointer to Error.Block
   116         *  @b(returns)         Refer to description above
   117         */
   118        Int wait(UInt timeout, Error.Block *eb);
   119    }
   120    /*
   121     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   122     */
   123


interface xdc.runtime.knl.IThreadSupport

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== IThreadSupport.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18
    19    /*!
    20     *  ======== IThreadSupport ========
    21     *  Interface for OS specific back-end.
    22     *
    23     *  The {@link xdc.runtime.knl} package contains modules that provide typical
    24     *  OS services. These xdc.runtime.knl modules require proxies to be bound to an
    25     *  OS specific delegate. This specifies the interface to be implemented by the
    26     *  OS specific delegate for {@link xdc.runtime.knl.Thread} module.
    27     *
    28     *  Refer to {@link xdc.runtime.knl.Thread} for more details on the APIs.
    29     */
    30    @DirectCall
    31    interface IThreadSupport
    32    {
    33        /*! Thread priorities which are mapped to OS specific value by Proxy */
    34        enum Priority {
    35        Priority_INVALID,
    36            Priority_LOWEST,
    37            Priority_BELOW_NORMAL,
    38            Priority_NORMAL,
    39            Priority_ABOVE_NORMAL,
    40            Priority_HIGHEST
    41        };
    42
    43        /*! Invalid OS priority value */
    44        const Int INVALID_OS_PRIORITY = 0;
    45
    46        /*!
    47         *  The error status for {@link #getPriority} when an error is captured in
    48         *  the  Error.Block.
    49         */
    50        const Int GETPRI_FAILED = -2;
    51
    52        /*! Status returned by {@link #compareOsPriorities} when an error occurs */
    53        enum CompStatus {
    54            CompStatus_ERROR = -2,
    55        CompStatus_LOWER = -1,
    56        CompStatus_EQUAL = 0,
    57        CompStatus_HIGHER = 1
    58        };
    59
    60        /*! typedef for function that gets called when the Thread runs. */
    61        typedef Void (*RunFxn)(IArg);
    62
    63        /*! Struct to hold thread statistics from {@link #stat} */
    64        struct Stat {
    65            SizeT stackSize;
    66            SizeT stackUsed;
    67        }
    68
    69        /*!
    70         *  ======== self ========
    71         *  Acquire the currently executing thread's handle.
    72         *
    73         *  Refer to {@link xdc.runtime.knl.Thread#self} for more details.
    74         *
    75         *  @param(eb)     Pointer to Error.Block
    76         *  @a(returns)    Handle in case of success; null for error;
    77         */
    78        Handle self(Error.Block* eb);
    79
    80        /*!
    81         *  ======== start ========
    82         *  Start threads running.
    83         *
    84         *  Refer to {@link xdc.runtime.knl.Thread#start} for more details.
    85         *
    86         *  @param(eb)     Pointer to Error.Block
    87         *  @a(returns)    true for success; false for failure
    88         */
    89        Bool start(Error.Block* eb);
    90
    91        /*!
    92         *  ======== yield ========
    93         *  Yield the currently scheduled thread.
    94         *
    95         *  Refer to {@link xdc.runtime.knl.Thread#yield} for more details.
    96         *
    97         *  @param(eb)     Pointer to Error.Block
    98         *  @a(returns)    true for success; false for failure
    99         */
   100        Bool yield(Error.Block* eb);
   101
   102        /*!
   103         *  ======== compareOsPriorities ========
   104         *  Compare two priority values and find out which one represents a
   105         *  higher priority.
   106         *
   107         *  Refer to {@link xdc.runtime.knl.Thread#compareOsPriorities} for more
   108         *  details.
   109         *
   110         *  @p(blist)
   111         *  -{@link #CompStatus_ERROR} if an error occured
   112         *  -{@link #CompStatus_LOWER} if p1 is lower than p2
   113         *  -{@link #CompStatus_EQUAL} if p1=p2
   114         *  -{@link #CompStatus_HIGHER} if p1 is higher than p2
   115         *    details.
   116         *  @p
   117         *
   118         *  @param(p1)      priority one
   119         *  @param(p2)      priority two
   120         *  @param(eb)      Pointer to Error.Block
   121         *  @a(returns)     Refer to description above
   122         */
   123        Int compareOsPriorities(Int p1, Int p2, Error.Block *eb);
   124
   125        /*!
   126         *  ======== sleep ========
   127         *  Sleep for certain number of microseconds
   128         *
   129         *  Refer to {@link xdc.runtime.knl.Thread#sleep} for more details.
   130         *
   131         *  @param(timeout)     timeout in microseconds
   132         *  @param(eb)          Pointer to Error.Block
   133         *  @a(returns)         true for success; false for failure
   134         */
   135        Bool sleep(UInt timeout, Error.Block *eb);
   136
   137    instance:
   138
   139        /*! Thread function argument. Default is NULL. */
   140        config IArg arg = null;
   141
   142        /*!
   143         *  ======== priority ========
   144         *  Thread priority
   145         *
   146         *  Thread defines several constants which allows applications to select
   147         *  a priority in an OS independent way. Priority_LOWEST,
   148         *  Priority_BELOW_NORMAL, Priority_NORMAL, Priority_ABOVE_NORMAL and
   149         *  Priority_HIGHEST. These values get mapped to OS specific priorities
   150         *  by the OS specific delegate.
   151         */
   152        config Priority priority = Priority_NORMAL;
   153
   154        /*!
   155         *  ======== osPriority ========
   156         *  OS specific thread priority
   157         *
   158         *  Used to specify an OS specific value for priority. If set this value
   159         *  takes precedence over {@link #priority}.
   160         */
   161        config Int osPriority = INVALID_OS_PRIORITY;
   162
   163        /*! Thread stack size. If left at zero, OS default is used */
   164        config SizeT stackSize = 0;
   165
   166        /*! User-specified thread local storage data. */
   167        config Ptr tls = null;
   168
   169        /*!
   170         *  ======== create ========
   171         *  Create a Thread object.
   172         *
   173         *  This function spawns a new thread calling the function fxn.
   174         *
   175         *  @param(fxn) function for new thread to begin execution
   176         */
   177        create(RunFxn fxn);
   178
   179        /*!
   180         *  ======== join ========
   181         *  Join on a Thread.
   182         *
   183         *  Refer to {@link xdc.runtime.knl.Thread#join} for more details.
   184         *
   185         *  @param(eb)     Pointer to Error.Block
   186         *  @a(returns)    true for success; false for failure
   187         */
   188        Bool join(Error.Block* eb);
   189
   190        /*!
   191         *  ======== getPriority ========
   192         *  Obtain a thread's priority.
   193         *
   194         *  Refer to {@link xdc.runtime.knl.Thread#getPriority} for more details.
   195         *
   196         *  @param(eb)     Pointer to Error.Block
   197         *  @a(returns)    thread priority in case of success; Priority_INVALID in
   198         *                 case of error;
   199         */
   200        Priority getPriority(Error.Block* eb);
   201
   202        /*!
   203         *  ======== setPriority ========
   204         *  Set a thread's priority.
   205         *
   206         *  Refer to {@link xdc.runtime.knl.Thread#setPriority} for more details.
   207         *
   208         *  @param(newPri)    new thread priority
   209         *  @param(eb)        Pointer to Error.Block
   210         *  @a(returns)       true for success; false for failure
   211         */
   212        Bool setPriority(Priority newPri, Error.Block* eb);
   213
   214        /*!
   215         *  ======== getOsPriority ========
   216         *  Obtain a thread's os specific priority.
   217         *
   218         *  For OSes that support dynamic priority boosting, the value returned
   219         *  is the base priority of the thread.
   220         *
   221         *  Refer to {@link xdc.runtime.knl.Thread#getOsPriority} for more details.
   222         *
   223         *  @param(eb)      Pointer to Error.Block
   224         *  @a(returns)     thread priority in case of success; GETPRI_FAILED in
   225         *                  case of error;
   226         */
   227        Int getOsPriority(Error.Block *eb);
   228
   229        /*!
   230         *  ======== setOsPriority ========
   231         *  Set a thread's priority.
   232         *
   233         *  This API sets the base priority of the thread on OSes that
   234         *  support dynamic priority boosting
   235         *
   236         *  Refer to {@link xdc.runtime.knl.Thread#setOsPriority} for more details.
   237         *
   238         *  @param(newPri)  new thread priority
   239         *  @param(eb)      Pointer to Error.Block
   240         *  @a(returns)     true for success; false for failure
   241         */
   242        Bool setOsPriority(Int newPri, Error.Block *eb);
   243
   244        /*!
   245         *  ======== getOsHandle ========
   246         *  Get the OS thread handle
   247         *
   248         *   @a(returns)     null in case of error
   249         */
   250        Ptr getOsHandle();
   251
   252        /*!
   253         *  ======== getTls ========
   254         *  Obtain a thread's local storage pointer
   255         *
   256         *  @a(returns)     null in case of error
   257         */
   258        Ptr getTls();
   259
   260        /*!
   261         *  ======== setTls ========
   262         *  Set a thread's local storage pointer.
   263         *
   264         *  @param(tls)     thread tls
   265         */
   266        Void setTls(Ptr tls);
   267
   268
   269        /*!
   270         *  ======== stat ========
   271         *  Obtain a thread's stats
   272         *
   273         *  @param(buf)    Pointer to Stat
   274         *  @param(eb)     Pointer to Error.Block
   275         *  @a(returns)    true for success; false for failure
   276         */
   277        Bool stat(Stat* buf, Error.Block* eb);
   278
   279    }
   280    /*
   281     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   282     */
   283


package xdc.runtime.knl

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== package.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== xdc.runtime.knl ========
    19     *  XDC Runtime support for OS-related primitives
    20     */
    21    package xdc.runtime.knl [1, 0, 0]
    22    {
    23        module GateH;
    24        module Semaphore;
    25        module Thread;
    26        module Sync;
    27
    28        module GateThread;
    29        module GateProcess;
    30        module SemThread;
    31        module SemProcess;
    32        module SyncGeneric;
    33        module SyncNull;
    34        module SyncSemThread;
    35        module Cache;
    36        module CacheSupportNull;
    37        module GateThreadSupportNull;
    38        module GateProcessSupportNull;
    39
    40        interface ISemaphore;
    41        interface ISync;
    42
    43        interface IGateThreadSupport;
    44        interface IGateProcessSupport;
    45        interface ISemThreadSupport;
    46        interface ISemProcessSupport;
    47        interface IThreadSupport;
    48        interface ICacheSupport;
    49    }
    50    /*
    51     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    52     */
    53


module xdc.runtime.knl.Semaphore

     1    /*
     2     *  Copyright (c) 2008-2017 Texas Instruments Incorporated
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Semaphore.xdc ========
    15     */
    16
    17    import xdc.runtime.Assert;
    18    import xdc.runtime.Error;
    19    import xdc.runtime.knl.ISemaphore;
    20
    21    /*!
    22     *  ======== Semaphore ========
    23     *  Provides semaphore services when an ISemaphore.Handle is available.
    24     *
    25     *  An application can isolate itself from ISemaphore implementations by using
    26     *  this module. The application must first obtain an ISemaphore.Handle.
    27     *  It make get such a handle by directly calling {@link SemThread#create} or
    28     *  {@link SemProcess#create}. Then the application can use the generic
    29     *  APIs provided by this module.
    30     */
    31    @DirectCall
    32
    33    module Semaphore
    34    {
    35        /*!
    36         *  ======== PendStatus ========
    37         *  Error codes returned by Semaphore_pend
    38         */
    39        enum PendStatus {
    40            PendStatus_ERROR = -1,
    41            PendStatus_TIMEOUT = 0,
    42            PendStatus_SUCCESS = 1
    43        };
    44
    45        /*! Used as the timeout value to specify wait forever */
    46        const UInt FOREVER = ISemaphore.FOREVER;
    47
    48        /*!
    49         *  Proxy used for optimization.
    50         *
    51         *  If ALL ISemaphore.Handles were created using the same module
    52         *  (e.g SemProcess) then setting this Proxy to SemProcess and
    53         *  setting Semaphore.Proxy.abstractInstances$ = false,
    54         *  Semaphore APIs can have better performance.
    55         */
    56        @NoProxyCreate
    57        proxy Proxy inherits ISemaphore;
    58
    59        /*!
    60         *  ======== pend ========
    61         *  Wait for the semaphore to have a nonzero count, then decrement it.
    62         *
    63         *  The function returns one of the following:
    64         *  @p(blist)
    65         *  -{@link #PendStatus_ERROR} if an error occured.
    66         *  -{@link #PendStatus_TIMEOUT} denotes timeout.
    67         *  -{@link #PendStatus_SUCCESS} semaphore was decremented.
    68         *
    69         *  @p
    70         *
    71         *  @param(sem)     ISemaphore.Handle to be used
    72         *  @param(timeout) timeout in microseconds or
    73         *  {@link #FOREVER Semaphore_FOREVER} to wait forever
    74         *  @param(eb)      Pointer to Error.Block
    75         *  @a(returns)     status returned. (refer to above description)
    76         */
    77        Int pend(ISemaphore.Handle sem, UInt timeout, Error.Block *eb);
    78
    79        /*!
    80         *  ======== post ========
    81         *  Increment the semaphore count.
    82         *
    83         *  @param(sem)     ISemaphore.Handle to be used
    84         *  @param(eb)      Pointer to Error.Block
    85         *  @a(returns)     true for success, false for error in Error block.
    86         */
    87        Bool post(ISemaphore.Handle sem, Error.Block *eb);
    88    }
    89    /*
    90     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    91     */
    92


module xdc.runtime.knl.SemProcess

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SemProcess.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18    import xdc.runtime.knl.ISemaphore;
    19    import xdc.runtime.knl.ISemProcessSupport;
    20
    21    /*!
    22     *  ======== SemProcess ========
    23     *  SemProcess Manager
    24     *
    25     *  This module manages multi-process semaphores through its proxy
    26     *  ISemProcessSupport interface. It has a module wide config parameter
    27     *  {@link #Proxy} which needs to be bound to an OS specific delegate before
    28     *  this module can be used.
    29     *
    30     *  Here is an example showing how the proxy is bound to an BIOS 6.x specific
    31     *  delegate.
    32     *
    33     *  @p(code)
    34     *  var SemProcess = xdc.useModule('xdc.runtime.knl.SemProcess');
    35     *  SemProcess.Proxy = xdc.useModule('ti.sysbios.xdcruntime.SemProcessSupport');
    36     *  @p
    37     *
    38     *  Typically the package containing the delegates have a Settings module that
    39     *  will bind all {@link xdc.runtime.knl} proxies. The following
    40     *  example sets up all the xdc.runtime.knl proxies.
    41     *
    42     *  @p(code)
    43     *  xdc.useModule("ti.sysbios.xdcruntime.Settings");
    44     *  @p
    45     */
    46    @InstanceInitError      /* because initialization can fail */
    47    @InstanceFinalize       /* have to Semaphore_Proxy_delete(sem) on delete */
    48
    49    module SemProcess inherits ISemaphore
    50    {
    51
    52        /*! Proxy that needs to be bound to an OS specific delegate. */
    53        proxy Proxy inherits ISemProcessSupport;
    54
    55    instance:
    56
    57       /*!
    58        *  ======== create ========
    59        *  Create a SemProcess object
    60        *
    61        *  This function creates a new `SemProcess` object which is initialized to
    62        *  count.  All semaphores created with the same key reference the same
    63        *  underlying synchronization object and work between processes.
    64        *
    65        *  @param(count)    initial semaphore count
    66        *  @param(key)      globally unique key for SysV-style semaphore
    67        */
    68        create(Int count, UInt32 key);
    69
    70    internal:
    71
    72        struct Instance_State {
    73            Proxy.Handle proxyHandle;
    74        }
    75    }
    76    /*
    77     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    78     */
    79


module xdc.runtime.knl.SemThread

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SemThread.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18    import xdc.runtime.knl.ISemaphore;
    19    import xdc.runtime.knl.ISemThreadSupport;
    20
    21    /*!
    22     *  ======== SemThread ========
    23     *  SemThread Manager.
    24     *
    25     *  This module manages semaphores through its proxy ISemThreadSupport
    26     *  interface. It has a module wide config parameter
    27     *  {@link #Proxy} which needs to be bound to an OS specific delegate before
    28     *  this module can be used.
    29     *
    30     *  Here is an example showing how the proxy is bound to an BIOS 6.x specific
    31     *  delegate.
    32     *
    33     *  @p(code)
    34     *  var SemThread = xdc.useModule('xdc.runtime.knl.SemThread');
    35     *  SemThread.Proxy = xdc.useModule('ti.sysbios.xdcruntime.SemThreadSupport');
    36     *  @p
    37     *
    38     *  Typically the package containing the delegates have a Settings module that
    39     *  will bind all {@link xdc.runtime.knl} proxies. The following
    40     *  example sets up all the xdc.runtime.knl proxies.
    41     *
    42     *  @p(code)
    43     *  xdc.useModule("ti.sysbios.xdcruntime.Settings");
    44     *  @p
    45     */
    46    @InstanceInitError      /* because initialization can fail */
    47    @InstanceFinalize       /* have to SemThread_Proxy_delete(sem) on delete */
    48
    49    module SemThread inherits ISemaphore
    50    {
    51
    52        /*! Proxy that needs to be bound to an OS specific delegate. */
    53        proxy Proxy inherits ISemThreadSupport;
    54
    55    instance:
    56
    57       /*!
    58        *  ======== create ========
    59        *  Create a SemThread object.
    60        *
    61        *  This function creates a new `SemThread` object which is initialized to
    62        *  count.
    63        *
    64        *  @param(count)    initial semaphore count
    65        */
    66        create(Int count);
    67
    68    internal:
    69
    70        struct Instance_State {
    71            Proxy.Handle proxyHandle;
    72        }
    73
    74    }
    75    /*
    76     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    77     */
    78


module xdc.runtime.knl.Sync

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Sync.xdc ========
    15     */
    16    import xdc.runtime.Error;
    17    import xdc.runtime.Assert;
    18    import xdc.runtime.knl.ISync;
    19
    20    /*!
    21     *  ======== Sync ========
    22     *  Provides synchronization APIs when an ISync.Handle is available
    23     *
    24     *  The application must first obtain an ISync.Handle. It can get such a handle
    25     *  by directly calling {@link SyncGeneric#create} or
    26     *  {@link SyncSemThread#create}. Then the application can use the generic APIs
    27     *  provided by this module.
    28     */
    29    @DirectCall
    30
    31    module Sync
    32    {
    33        /*!
    34         *  ======== WaitStatus ========
    35         *  Error codes returned by Sync_wait
    36         */
    37        enum WaitStatus {
    38            WaitStatus_ERROR = -1,
    39            WaitStatus_TIMEOUT = 0,
    40            WaitStatus_SUCCESS = 1
    41        };
    42
    43        /*!
    44         *  ======== WAIT_FOREVER ========
    45         *  Used to wait forever
    46         */
    47        const UInt WAIT_FOREVER = ISync.WAIT_FOREVER;
    48
    49        /*!
    50         *  ======== NO_WAIT ========
    51         *  Used to specify no waiting
    52         */
    53        const UInt NO_WAIT = ISync.NO_WAIT;
    54
    55        /*!
    56         *  ======== Proxy ========
    57         *  Platform-specific implementation
    58         *
    59         *  If ALL `ISync.Handles` were created using the same module
    60         *  (e.g SyncSemProcess), then setting `Proxy` to `SyncSemProcess` and
    61         *  `Sync.Proxy.abstractInstances$` to `false` will improve the
    62         *  performance of the `Sync` APIs.
    63         */
    64        proxy Proxy inherits ISync;
    65
    66        /*!
    67         *  ======== query ========
    68         *  Query for a particular quality
    69         *
    70         *  FALSE is returned if quality not supported.
    71         *
    72         *  @param(sync)    sync handle
    73         *  @param(qual)    quality
    74         *
    75         *  @a(returns)     TRUE or FALSE
    76         */
    77        Bool query(ISync.Handle sync, Int qual);
    78
    79        /*!
    80         *  ======== signal ========
    81         *  Called at completion of an activity.
    82         *
    83         *  This function is non-blocking. It is also required that the underlying
    84         *  sync be binary in nature.
    85         *
    86         *  @param(sync)    sync handle
    87         */
    88        Void signal(ISync.Handle sync);
    89
    90        /*!
    91         *  ======== wait ========
    92         *  Called to wait/poll for completion of an activity.
    93         *
    94         *  This function can block and typically waits for a semaphore to become
    95         *  available.
    96         *
    97         *  Non-blocking implementations should return {@link #WaitStatus_TIMEOUT}.
    98         *
    99         *  @param(sync)        sync handle
   100         *  @param(timeout)     timeout in microseconds
   101         *
   102         *  @a(returns)
   103         *  @p(blist)
   104         *  -{@link #WaitStatus_ERROR} if an error occured.
   105         *  -{@link #WaitStatus_TIMEOUT} denotes timeout.
   106         *  -{@link #WaitStatus_SUCCESS} semaphore was decremented.
   107         *  @p
   108         */
   109        Int wait(ISync.Handle sync, UInt timeout, Error.Block *eb);
   110    }
   111    /*
   112     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   113     */
   114


module xdc.runtime.knl.SyncGeneric

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SyncGeneric.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== SyncGeneric ========
    19     *  Generic ISync implementation
    20     *
    21     *  This module allows users to plug in their own
    22     *  functions for signal, wait and query.
    23     */
    24
    25    module SyncGeneric inherits xdc.runtime.knl.ISync
    26    {
    27        /*! typedef for user specified signal function */
    28        typedef Void (*SignalFunc)(UArg);
    29
    30        /*! typedef for user specified wait function */
    31        typedef Bool (*WaitFunc)(UArg, UInt);
    32
    33        /*! typedef for user specified wait function */
    34        typedef Bool (*QueryFunc)(Int);
    35
    36    instance:
    37        /*! user signal function */
    38        config SignalFunc userSignal = null;
    39
    40        /*! user signal function arg */
    41        config UArg signalArg = null;
    42
    43        /*! user wait function */
    44        config WaitFunc  userWait = null;
    45
    46        /*! user wait function arg */
    47        config UArg waitArg = null;
    48
    49        /*! user query function */
    50        config QueryFunc userQuery = null;
    51
    52    internal:
    53
    54        /* -------- Internal Structures -------- */
    55        struct Instance_State {
    56            SignalFunc  userSignal;
    57            UArg        signalArg;
    58            WaitFunc    userWait;
    59            UArg        waitArg;
    60            QueryFunc   userQuery;
    61        };
    62
    63    }
    64    /*
    65     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    66     */
    67


module xdc.runtime.knl.SyncNull

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SyncNull.xdc ========
    15     */
    16
    17    /*!
    18     *  ======== SyncNull ========
    19     *  Empty ISync implementation used mainly for testing
    20     */
    21
    22    module SyncNull inherits xdc.runtime.knl.ISync
    23    {
    24    }
    25    /*
    26     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    27     */
    28


module xdc.runtime.knl.SyncSemThread

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== SyncSemThread.xdc ========
    15     */
    16
    17    import xdc.runtime.knl.SemThread;
    18
    19    /*!
    20     *  ======== SyncSemThread ========
    21     *  A ISync implementation based on a SemThread. [EXPERIMENTAL]
    22     *
    23     *  This module implements the {@link ti.sdo.utils.ISync} interface
    24     *  using the {@link xdc.runtime.knl.SemThread} module.
    25     */
    26    @InstanceInitError      /* instance initialization can fail */
    27    @InstanceFinalize       /* instances require finalization */
    28
    29    module SyncSemThread inherits xdc.runtime.knl.ISync
    30    {
    31
    32    internal:  /* not for client use */
    33
    34        struct Instance_State {
    35            SemThread.Handle    semThread;
    36        };
    37    }
    38    /*
    39     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    40     */
    41


module xdc.runtime.knl.Thread

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments. All rights reserved.
     3     *  This program and the accompanying materials are made available under the
     4     *  terms of the Eclipse Public License v1.0 and Eclipse Distribution License
     5     *  v. 1.0 which accompanies this distribution. The Eclipse Public License is
     6     *  available at http://www.eclipse.org/legal/epl-v10.html and the Eclipse
     7     *  Distribution License is available at
     8     *  http://www.eclipse.org/org/documents/edl-v10.php.
     9     *
    10     *  Contributors:
    11     *      Texas Instruments - initial implementation
    12     * */
    13    /*
    14     *  ======== Thread.xdc ========
    15     */
    16
    17    import xdc.runtime.Error;
    18    import xdc.runtime.Assert;
    19    import xdc.runtime.knl.IThreadSupport;
    20
    21    /*!
    22     *  ======== Thread ========
    23     *  Thread services.
    24     *
    25     *  This module manages threads through a proxy which inherits from
    26     *  IThreadSupport interface. It has a module wide config parameter
    27     *  {@link #Proxy} which needs to be bound to an OS specific delegate before
    28     *  this module can be used.
    29     *
    30     *  Here is an example showing how the proxy is bound to a BIOS 6.x specific
    31     *  delegate.
    32     *
    33     *  @p(code)
    34     *  var Thread = xdc.useModule('xdc.runtime.knl.Thread');
    35     *  Thread.Proxy = xdc.useModule('ti.sysbios.xdcruntime.ThreadSupport');
    36     *  @p
    37     *
    38     *  Typically a package containing the delegates has a Settings module that
    39     *  will bind all {@link xdc.runtime.knl} proxies. The following
    40     *  example sets up all the xdc.runtime.knl proxies.
    41     *
    42     *  @p(code)
    43     *  xdc.useModule('ti.sysbios.xdcruntime.Settings');
    44     *  @p
    45     */
    46    @InstanceInitError      /* because initialization can fail */
    47    @InstanceFinalize       /* have to Thread_Proxy_delete(sem) on delete */
    48    @DirectCall
    49
    50    module Thread
    51    {
    52        /*! Thread priorities which are mapped to OS specific value by Proxy */
    53        enum Priority {
    54            Priority_INVALID,
    55            Priority_LOWEST,
    56            Priority_BELOW_NORMAL,
    57            Priority_NORMAL,
    58            Priority_ABOVE_NORMAL,
    59            Priority_HIGHEST
    60        };
    61
    62        /*! Invalid OS priority value */
    63        const Int INVALID_OS_PRIORITY = 0;
    64
    65        /*! Status returned by {@link #getPri} when an error occurs */
    66        const Int GETPRI_FAILED = -2;
    67
    68        /*! Status returned by {@link #compareOsPriorities} when an error occurs */
    69        enum CompStatus {
    70            CompStatus_ERROR = -2,
    71            CompStatus_LOWER = -1,
    72            CompStatus_EQUAL = 0,
    73            CompStatus_HIGHER = 1
    74        };
    75
    76        /*! Proxy that needs to be bound to an OS specific delegate. */
    77        proxy Proxy inherits IThreadSupport;
    78
    79        /*! Typedef for thread function */
    80        typedef Void (*RunFxn)(IArg);
    81
    82        /*! Struct to hold thread statistics from {@link #stat} */
    83        struct Stat {
    84            SizeT stackSize;
    85            SizeT stackUsed;
    86        }
    87
    88        /*! Assert when  timeout passed to {@link #sleep} is zero */
    89        config Assert.Id A_zeroTimeout= {
    90            msg: "A_zeroTimeout: Timeout value annot be zero"
    91        };
    92
    93        /*! Default thread stack size. */
    94        config SizeT defaultStackSize = 0;
    95
    96        /*!
    97         *  ======== self ========
    98         *  Return the currently executing thread's handle
    99         *
   100         *  @param(eb)      Pointer to Error.Block
   101         *  @a(returns)     Returns a handle to the currently executing thread.
   102         *                  If the current thread is the main thread, this function
   103         *                  returns `NULL`. NULL is also returned in case of error.
   104         */
   105        Handle self(Error.Block *eb);
   106
   107        /*!
   108         *  ======== start ========
   109         *  Start threads running
   110         *
   111         *  This function can be used to start all statically created threads,
   112         *  and all threads created dynamically before this function is called.
   113         *  Any thread created after this function is called, starts automatically
   114         *  (i.e., there is no need to call Thread_start() more than once).
   115         *
   116         *  @param(eb)      Pointer to Error.Block
   117         *  @a(returns)     true for success; false for error
   118         */
   119        Bool start(Error.Block *eb);
   120
   121        /*!
   122         *  ======== yield ========
   123         *  Yield the currently scheduled thread
   124         *
   125         *  @param(eb)      Pointer to Error.Block
   126         *  @a(returns)     true for success; false for error
   127         */
   128        Bool yield(Error.Block *eb);
   129
   130        /*!
   131         *  ======== compareOsPriorities ========
   132         *  Compare two os specific priority values and find out which one
   133         *  represents a higher priority.
   134         *
   135         *  @p(blist)
   136         *  -{@link #CompStatus_ERROR} if an error occured
   137         *  -{@link #CompStatus_LOWER} if p1 is lower than p2
   138         *  -{@link #CompStatus_EQUAL} if p1=p2
   139         *  -{@link #CompStatus_HIGHER} if p1 is higher than p2
   140         *    details.
   141         *  @p
   142         *
   143         *  @param(p1)      priority one
   144         *  @param(p2)      priority two
   145         *  @param(eb)      Pointer to Error.Block
   146         *  @a(returns)     refer to description above
   147         */
   148        Int compareOsPriorities(Int p1, Int p2, Error.Block *eb);
   149
   150        /*!
   151         *  ======== sleep ========
   152         *  Sleep for given number of microseconds
   153         *
   154         *  This function is gauranteed to sleep for at least as long as the
   155         *  timeout value but the actual sleep time may be longer. NOTE:
   156         *  The timeout value cannot be zero.
   157         *
   158         *  @param(timeout)     timeout in microseconds
   159         *  @param(eb)          Pointer to Error.Block
   160         *  @a(returns)         true for success; false for error
   161         */
   162        Bool sleep(UInt timeout, Error.Block *eb);
   163
   164    instance:
   165
   166        /*! Thread function argument. Default is 0. */
   167        config IArg arg = 0;
   168
   169        /*!
   170         *  ======== priority ========
   171         *  Specify the new thread's priority
   172         *
   173         *  Thread defines several constants which allows applications to select
   174         *  a priority in an OS independent way: Priority_LOWEST,
   175         *  Priority_BELOW_NORMAL, Priority_NORMAL, Priority_ABOVE_NORMAL and
   176         *  Priority_HIGHEST. These values get mapped to OS specific priorities
   177         *  by the OS specific delegate.
   178         */
   179        config Priority priority = Priority_NORMAL;
   180
   181        /*!
   182         *  ======== osPriority ========
   183         *  OS specific thread priority
   184         *
   185         *  Used to specify an OS specific value for priority. If set this value
   186         *  takes precedence over {@link #priority}.
   187         */
   188        config Int osPriority = INVALID_OS_PRIORITY;
   189
   190        /*!
   191         *  ======== stackSize ========
   192         *  Thread stack size
   193         *
   194         *  The default value of 0 means that `{@link #defaultStackSize}` is used.
   195         */
   196        config SizeT stackSize = 0;
   197
   198        /*!
   199         *  ======== tls ========
   200         *  Thread local storage.
   201         *
   202         *  User data associated with a thread. Must persist for the life of
   203         *  the thread.
   204         */
   205        config Ptr tls = null;
   206
   207        /*!
   208         *  ======== create ========
   209         *  Create a Thread object
   210         *
   211         *  This function spawns a new thread calling the function fxn.
   212         *
   213         *  @param(fxn)     function for new thread to begin execution
   214         */
   215        create(RunFxn fxn);
   216
   217        /*!
   218         *  ======== join ========
   219         *  Block calling thread until given thread terminates.
   220         *
   221         *  Use this functions to ensure that a thread has terminated. It is OK to
   222         *  call this function on a thread that has already terminated.
   223         *
   224         *  @param(eb)      Pointer to Error.Block
   225         *  @a(returns)     true for success; false for error
   226         */
   227        Bool join(Error.Block *eb);
   228
   229        /*!
   230         *  ======== getPriority ========
   231         *  Obtain a thread's priority.
   232         *
   233         *  For OSes that support dynamic priority boosting, this function
   234         *  retrieves the base priority of the thread.
   235         *
   236         *  @param(eb)      Pointer to Error.Block
   237         *  @a(returns)     thread priority in case of success; PRIORITY_INVALID in
   238         *                  case of error;
   239         */
   240        Priority getPriority(Error.Block *eb);
   241
   242        /*!
   243         *  ======== setPriority ========
   244         *  Set a thread's priority.
   245         *
   246         *  For OSes that support dynamic priority boosting, this function
   247         *  changes the base priority of the thread.
   248         *
   249         *  @param(newPri)  new thread priority
   250         *  @param(eb)      Pointer to Error.Block
   251         *  @a(returns)     true for success; false for error
   252         */
   253        Bool setPriority(Priority newPri, Error.Block *eb);
   254
   255        /*!
   256         *  ======== getOsPriority ========
   257         *  Obtain a thread's OS specific priority.
   258         *
   259         *  For OSes that support dynamic priority boosting, the value returned
   260         *  is the base priority of the thread.
   261         *
   262         *  @param(eb)      Pointer to Error.Block
   263         *  @a(returns)     thread priority in case of success; GETPRI_FAILED in
   264         *                  case of error;
   265         */
   266        Int getOsPriority(Error.Block *eb);
   267
   268        /*!
   269         *  ======== setOsPriority ========
   270         *  Set a thread's priority.
   271         *
   272         *  This API sets the base priority of the thread on OSes that
   273         *  support dynamic priority boosting
   274         *
   275         *  @param(newPri)  new thread priority
   276         *  @param(eb)      Pointer to Error.Block
   277         *  @a(returns)     true for success; false for error
   278         */
   279        Bool setOsPriority(Int newPri, Error.Block *eb);
   280
   281        /*!
   282         *  ======== getOsHandle ========
   283         *  Get the OS thread handle
   284         *
   285         *   @a(returns)     OS thread handle
   286         */
   287        Ptr getOsHandle();
   288
   289        /*!
   290         *  ======== getTls ========
   291         *  Obtain a thread's local storage.
   292         *
   293         *   @a(returns)     null when tls has not been set.
   294         */
   295        Ptr getTls();
   296
   297        /*!
   298         *  ======== setTls ========
   299         *  Change a thread's local storage.
   300         *
   301         *  @param(tls)     tls
   302         */
   303        Void setTls(Ptr tls);
   304
   305        /*!
   306         *  ======== stat ========
   307         *  Get thread statistics
   308         *
   309         *  @param(buf)     Pointer to Stat
   310         *  @param(eb)      Pointer to Error.Block
   311         *  @a(returns)     true for success; false for failure
   312         */
   313        Bool stat(Stat* buf, Error.Block *eb);
   314
   315    internal:
   316
   317        struct Instance_State {
   318            Thread.Proxy.Handle proxyHandle; /*! handle for real implementation */
   319            Ptr                 tls;         /*! store tls parameter */
   320        }
   321    }
   322    /*
   323     *  @(#) xdc.runtime.knl; 1, 0, 0,1; 11-21-2018 13:30:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   324     */
   325


module xdc.services.getset.GetSet

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12
    13    /*!
    14     *  Callback notification on RTSC config parameters.
    15     *
    16     *  Lets user code receive a notification whenever a
    17     *  config param of a module or instance is read or modified.
    18     *
    19     *  @see ./doc-files/xdc/services/getset/package-summary.html JavaDoc
    20     */
    21    metaonly module GetSet
    22    {
    23        /*!
    24         *  ======== onGet ========
    25         *  Add a getter function to a field.
    26         *
    27         *  Each getter acts like an interrupt that is triggered by a read
    28         *  a field of an object. The field could be a config param of a module
    29         *  or an instance, or a field of a struct.
    30         *
    31         *  @a(example)
    32         *  The following example prints a message on any read of a
    33         *  config param named `cfg` in module `pkg.Mod`:
    34         *  @p(code)
    35         *    GetSet.onGet(Mod, "cfg", function(sel, val) {
    36         *        // prints "pkg.Mod.cfg returned <value>"
    37         *        print(this.$name + "." + sel + " returned " + val);
    38         *    });
    39         *  @p
    40         */
    41        function onGet(obj, sel, getter);
    42
    43        /*!
    44         *  ======== onSet ========
    45         *  Add a setter function to a field.
    46         *
    47         *  Each setter acts like an interrupt that is triggered by modifying
    48         *  a field of an object. The field could be a config param of a module
    49         *  or an instance, or a field of a struct.
    50         *
    51         *  Setters execute only when the field actually changes value. They do
    52         *  not execute if the field's current value is written back to it.
    53         *
    54         *  Setters may themselves modify fields, and so trigger other setters.
    55         *  The original execution flow resumes when all fields stop changing
    56         *  value. In the case of cycles between setters, typically this means
    57         *  that at least one setter executes twice and makes no further
    58         *  changes the second time through.
    59         *
    60         *  If the setter throws a JavaScript Error or Java exception, then
    61         *  the field's original value is restored. The exception bubbles back
    62         *  through the call stack, so that if a setter caused a cascade of
    63         *  changes, all are restored to their original values.
    64         *
    65         *  @a(example)
    66         *  The following example prints a message on any write to a
    67         *  config param named `cfg` in module `pkg.Mod`:
    68         *  @p(code)
    69         *    GetSet.onSet(Mod, "cfg", function(sel, val, oldVal, exception) {
    70         *        // prints "pkg.Mod.cfg set to <value>"
    71         *        print(this.$name + "." + sel + " changed to " + val);
    72         *        // prints previous value before change
    73         *        print("  was " + oldVal);
    74         *    });
    75         *  @p
    76         *
    77         *  @a(example)
    78         *  The following example makes it an error to change `Mod.cfg`:
    79         *  @p(code)
    80         *    GetSet.onSet(Mod, "cfg", function(sel, val, oldVal, exception) {
    81         *        // don't throw an exception if already recovering from one
    82         *        if (!exception) {
    83         *            throw new Error("You'll never change me!");
    84         *        }
    85         *    });
    86         *  @p
    87         */
    88        function onSet(obj, sel, setter);
    89
    90        /*!
    91         *  ======== createGroup ========
    92         *  Create a group of related setter functions.
    93         *
    94         *  The purpose of a group is to control interactions between setters.
    95         *  If each setter acts like an interrupt, then a group is like an
    96         *  interrupt controller that determines when setters are permitted
    97         *  to run.
    98         *
    99         *  Each group is non-reentrant. Once any setter in the group is
   100         *  running, it runs to completion before any other setter in the
   101         *  same group may run. This allows the setters to modify internal
   102         *  state without interference from other setters that operate on
   103         *  the same internal state.
   104         *
   105         *  Each group runs to completion. When a setter in the group runs, it
   106         *  might modify other config params and cause further setters in the
   107         *  same group to run. All of these complete before control is returned
   108         *  to the original execution flow. From the point of view of code
   109         *  outside the group, all the setters ran as an atomic operation.
   110         *
   111         *  Groups may be interrupted. When a setter modifies a config param
   112         *  that is being monitored by a second group, the second group starts
   113         *  running immediately. It will run to completion before returning
   114         *  control to the first group. So the first group sees the second
   115         *  group as atomic. This allows groups to be tested independently,
   116         *  and combined without affecting their behavior.
   117         *
   118         *  Cycles aren't permitted in the execution flow between groups. If a
   119         *  setter gets triggered from a group that has already been interrupted,
   120         *  it is deferred and run when control eventually returns to its own
   121         *  group. Cycles between groups can break the appearance of atomic
   122         *  execution, and so should be avoided when possible.
   123         *
   124         *  @a(returns)
   125         *  A Java object of class
   126         *    {@link ./doc-files/xdc/services/getset/Group.html Group}.
   127         *  Can then use Group.onSet() to add functions to the group.
   128         *
   129         *  @a(example)
   130         *  The following example code forces the values of the config params
   131         *  `ModA.a` and `ModB.b` to be equal:
   132         *  @p(code)
   133         *    var group = GetSet.createGroup();
   134         *    group.onSet(ModA, "a", function aToB(){ ModB.b = ModA.a; });
   135         *    group.onSet(ModB, "b", function bToA(){ ModA.a = ModB.b; });
   136         *  @p
   137         */
   138        function createGroup();
   139
   140        /*!
   141         *  ======== init ========
   142         *  Add support for getters and setters to all fields of an object.
   143         *
   144         *  Initializes getter and setter support for every field of
   145         *  the object. The object can be a module, instance, or structure.
   146         *
   147         *  This is a convenience function. The `onSet` and `onGet` functions
   148         *  already add support to the one field of interest. The `init`
   149         *  function is useful mostly to make fields visible to global setters
   150         *  and getters, for example for debugging.
   151         */
   152        function init(obj);
   153
   154        /*!
   155         *  ======== debug ========
   156         *  Print execution trace info showing the flow of getters and setters.
   157         */
   158        config Bool debug = false;
   159
   160        /*!
   161         *  ======== maxIterations ========
   162         *  Limit the number of iterations allowed for a group to converge, to
   163         *  help debug. The default value of 0 means no limit.
   164         */
   165        config int maxIterations = 0;
   166
   167        /*!
   168         *  ======== maxStackDepth ========
   169         *  Set the maximum allowed depth of recursively nested setters, as
   170         *  a debugging aid. The default value of 0 means no limit.
   171         */
   172        config int maxStackDepth = 0;
   173    }


package xdc.services.getset

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12
    13    /*!
    14     *  Callback notification on RTSC config parameters.
    15     *
    16     *  @see ./doc-files/xdc/services/getset/package-summary.html JavaDoc (No Frames)
    17     *  @see ./doc-files/index.html (Frames)
    18     */
    19    package xdc.services.getset [1, 0, 0] {
    20        module GetSet;
    21    }


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A C E F G H I O R S T X

A

add(Fxn) - Method in class xdc.services.getset.Group
Add a new Fxn to the group, and execute it once.
addAuto(Callable) - Method in class xdc.services.getset.Group
Wrap the given function body as an AutoFxn and add it to the group.
addGlobal(Callable) - Static method in class xdc.services.getset.Getters
addGlobal(Callable) - Static method in class xdc.services.getset.Setters
Add a setter that is called when any field changes value.
addInput(Value.Observable, String) - Method in class xdc.services.getset.Fxn
Mark the given field as a formal input to the Fxn.
addInput(Value.Observable, int) - Method in class xdc.services.getset.Fxn
Mark a given array element as a formal input to the Fxn.
addOutput(Value.Observable, String) - Method in class xdc.services.getset.Fxn
Mark the given field of the object as a formal output of the Fxn.
addOutput(Value.Observable, int) - Method in class xdc.services.getset.Fxn
Mark a given array element as a formal output of the Fxn.
addStale(Fxn) - Method in class xdc.services.getset.Group
Indicate that a Fxn in the group needs to be run.
AutoFxn - Class in xdc.services.getset
A Fxn that automatically determines its own inputs and outputs.
AutoFxn(Group, Callable) - Constructor for class xdc.services.getset.AutoFxn
Create a new AutoFxn that will execute the given body, as scheduled by the given Group.

C

call(Context, Scriptable, Scriptable, Object[]) - Method in class xdc.services.getset.Fxn
A setter that is called whenever one of the inputs of the Fxn changes in value.
call(Context, Scriptable, Scriptable, Object[]) - Method in class xdc.services.getset.Getters
The master getter function called by XDCscript.
call(Context, Scriptable, Scriptable, Object[]) - Method in class xdc.services.getset.Setters
The master setter function called by XDCscript.
createGroup() - Static method in class xdc.services.getset.Scheduler

E

equals(Object) - Method in class xdc.services.getset.Field
Two Field objects compare as equal() if they name the same field of the same XDCscript object instance.

F

Field - Class in xdc.services.getset
An immutable object that identifies a specific field of a specific XDCscript object.
Field(Value.Observable, String) - Constructor for class xdc.services.getset.Field
Field(Value.Observable, int) - Constructor for class xdc.services.getset.Field
Fxn - Class in xdc.services.getset
A scheduled function in a Group.
Fxn(Group, Callable) - Constructor for class xdc.services.getset.Fxn
Create a new Fxn that will execute the given body, as scheduled by the given Group.

G

getData(Value.Observable, Object) - Static method in class xdc.services.getset.GetSetData
Get the private data associated with a field of an object.
getDebug() - Static method in class xdc.services.getset.GetSet
Get whether to print debug trace.
getMaxIterations() - Static method in class xdc.services.getset.Group
Get the maximum number of iterations allowed in each group, as a debugging aid.
getMaxStackDepth() - Static method in class xdc.services.getset.Setters
Get the maximum allowed depth of recursively nested setters.
getName() - Method in class xdc.services.getset.Field
getObject() - Method in class xdc.services.getset.Field
getRunning() - Method in class xdc.services.getset.Group
Get the currently running function (unused?)
getRunningFxn() - Static method in class xdc.services.getset.Scheduler
Get which Fxn is currently running, or null if none.
getRunningGroup() - Static method in class xdc.services.getset.Scheduler
Get which Group is currently running, or null if none.
getScheduled() - Method in class xdc.services.getset.Group
Ask if the Group has already been scheduled to be run
GetSet - Class in xdc.services.getset
A helper class to add getters and setters to a field of an XDCscript object.
GetSet() - Constructor for class xdc.services.getset.GetSet
GetSetData - Class in xdc.services.getset
Private data for the getters and setters.
GetSetData() - Constructor for class xdc.services.getset.GetSetData
getStale() - Method in class xdc.services.getset.Fxn
Get whether this Fxn needs to be executed.
getStale() - Method in class xdc.services.getset.Group
Ask if the group needs to be run.
getStatus() - Method in class xdc.services.getset.Fxn
Get the exit status from the last time this Fxn was executed.
getters - Variable in class xdc.services.getset.GetSetData
Getters - Class in xdc.services.getset
A getter function to be added to a field of an XDCscript Value.Obj object.
Getters(Object) - Constructor for class xdc.services.getset.Getters
Group - Class in xdc.services.getset
A group of Fxns that are each run to completion before any other Fxn in the group.
Group() - Constructor for class xdc.services.getset.Group
Create a new Group governed by the given scheduler

H

hashCode() - Method in class xdc.services.getset.Field
If objects compare equal, also return equal hash codes.

I

init(Value.Observable) - Static method in class xdc.services.getset.GetSet
Initialize getter and setter support on every field.
init(Value.Observable, String) - Static method in class xdc.services.getset.GetSet
Initialize getter and setter support on a field, or other property labeled by an identifier.
init(Value.Observable, int) - Static method in class xdc.services.getset.GetSet
Initialize getter and setter support on an array element, or other property with a numeric index.
init(Value.Observable, Object) - Static method in class xdc.services.getset.Getters
Add getter support to a field of an object.
init(Value.Observable, String) - Static method in class xdc.services.getset.Setters
Add setter support to a field of an object.
init(Value.Observable, int) - Static method in class xdc.services.getset.Setters

O

onGet(Value.Observable, String, Callable) - Static method in class xdc.services.getset.GetSet
Add a user getter to the named field of the object, or other property labeled by an identifier.
onGet(Value.Observable, int, Callable) - Static method in class xdc.services.getset.GetSet
Add a user getter to the indicated array element, or other property with a numeric index.
onSet(Value.Observable, String, Callable) - Static method in class xdc.services.getset.GetSet
Add a user setter to the named field of the object, or other property labeled by an identifier.
onSet(Value.Observable, int, Callable) - Static method in class xdc.services.getset.GetSet
Add a user setter to the indicated array element, or other property with a numeric index.
onSet(Value.Observable, String, Callable) - Method in class xdc.services.getset.Group
Wrap the given function body as a Fxn and specify one input to fire on.
onSet(Value.Observable, int, Callable) - Method in class xdc.services.getset.Group

R

removeStale(Fxn) - Method in class xdc.services.getset.Group
Indicate that a Fxn in the group no longer needs to be run.
removeStale() - Method in class xdc.services.getset.Group
Indicate that no Fxn's in the group need to be run.
run() - Method in class xdc.services.getset.Fxn
Execute the Fxn body.
run() - Method in class xdc.services.getset.Group
Run all the Fxns in the Group that need it.

S

schedule(Fxn) - Method in class xdc.services.getset.Group
Mark the given Fxn as stale, and schedule the whole group to be run at the next opportunity.
schedule(Group) - Static method in class xdc.services.getset.Scheduler
Schedule the group for execution.
Scheduler - Class in xdc.services.getset
Schedules execution of Fxns and Groups.
Scheduler() - Constructor for class xdc.services.getset.Scheduler
setDebug(boolean) - Static method in class xdc.services.getset.GetSet
Set whether to print debug trace.
setMaxIterations(int) - Static method in class xdc.services.getset.Group
Get the maximum number of iterations allowed in each group, as a debugging aid.
setMaxStackDepth(int) - Static method in class xdc.services.getset.Setters
Set the maximum allowed depth of recursively nested setters, as a debugging aid.
setScheduled(boolean) - Method in class xdc.services.getset.Group
Indicate that the Group has now been scheduled to be run
setStale(boolean) - Method in class xdc.services.getset.Fxn
Set whether the Fxn needs to be executed, typically because one of the inputs has changed value.
setters - Variable in class xdc.services.getset.GetSetData
Setters - Class in xdc.services.getset
A setter function to be added to a field of an XDCscript Value.Obj object.
Setters(Object) - Constructor for class xdc.services.getset.Setters

T

toString() - Method in class xdc.services.getset.Fxn

X

xdc.services.getset - package xdc.services.getset
A C E F G H I O R S T X
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Hierarchy For All Packages

Package Hierarchies:
  • xdc.services.getset

Class Hierarchy

  • java.lang.Object
    • xdc.services.getset.Field
    • xdc.services.getset.Fxn (implements org.mozilla.javascript.Callable)
      • xdc.services.getset.AutoFxn
    • xdc.services.getset.GetSet
    • xdc.services.getset.GetSetData
    • xdc.services.getset.Group
    • xdc.services.getset.Scheduler
    • org.mozilla.javascript.ScriptableObject (implements org.mozilla.javascript.ConstProperties, org.mozilla.javascript.debug.DebuggableObject, org.mozilla.javascript.Scriptable, java.io.Serializable)
      • org.mozilla.javascript.IdScriptableObject (implements org.mozilla.javascript.IdFunctionCall)
        • org.mozilla.javascript.BaseFunction (implements org.mozilla.javascript.Function)
          • xdc.services.getset.Getters
          • xdc.services.getset.Setters
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Serialized Form

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Serialized Form

  • Package xdc.services.getset

    • Class xdc.services.getset.Getters extends org.mozilla.javascript.BaseFunction implements Serializable

      serialVersionUID:
      3564481724610600999L

      • Serialized Fields

        • member

          java.lang.Object member

    • Class xdc.services.getset.Setters extends org.mozilla.javascript.BaseFunction implements Serializable

      serialVersionUID:
      5777317095106662549L

      • Serialized Fields

        • member

          java.lang.Object member
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AutoFxn

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xdc.services.getset

Class AutoFxn

  • java.lang.Object
    • xdc.services.getset.Fxn
      • xdc.services.getset.AutoFxn
  • All Implemented Interfaces:
    org.mozilla.javascript.Callable

    public class AutoFxn
extends Fxn
    A Fxn that automatically determines its own inputs and outputs. Eliminates the need for client code to specify these explicitly, or even to know. Useful, for example, when the body calls other functions and doesn't want to track the details of their implementation.

    • Constructor Summary

      Constructors
      Constructor and Description
      AutoFxn(Group group, org.mozilla.javascript.Callable body)
      Create a new AutoFxn that will execute the given body, as scheduled by the given Group.

    • Method Summary

      • Methods inherited from class xdc.services.getset.Fxn

        addInput, addInput, addOutput, addOutput, call, getStale, getStatus, run, setStale, toString

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

    • Constructor Detail

      • AutoFxn

        public AutoFxn(Group group,
       org.mozilla.javascript.Callable body)
        Create a new AutoFxn that will execute the given body, as scheduled by the given Group.
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Field

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xdc.services.getset

Class Field

  • java.lang.Object
    • xdc.services.getset.Field

  • public class Field
extends java.lang.Object
    An immutable object that identifies a specific field of a specific XDCscript object. Used internally as a key to index an object-plus-field pair in a Set.

    • Constructor Summary

      Constructors
      Constructor and Description
      Field(xdc.services.intern.xsr.Value.Observable obj, int prop)
      Field(xdc.services.intern.xsr.Value.Observable obj, java.lang.String prop)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      boolean equals(java.lang.Object x)
      Two Field objects compare as equal() if they name the same field of the same XDCscript object instance.
      java.lang.String | getName()
      xdc.services.intern.xsr.Value.Observable | getObject()
      int hashCode()
      If objects compare equal, also return equal hash codes.

      • Methods inherited from class java.lang.Object

        clone, finalize, getClass, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Field

        public Field(xdc.services.intern.xsr.Value.Observable obj,
     java.lang.String prop)

      • Field

        public Field(xdc.services.intern.xsr.Value.Observable obj,
     int prop)

    • Method Detail

      • getObject

        public xdc.services.intern.xsr.Value.Observable getObject()

      • getName

        public java.lang.String getName()

      • equals

        public boolean equals(java.lang.Object x)
        Two Field objects compare as equal() if they name the same field of the same XDCscript object instance.
        Overrides:
        equals in class java.lang.Object

      • hashCode

        public int hashCode()
        If objects compare equal, also return equal hash codes. If objects are unequal, no requirement on hash codes.
        Overrides:
        hashCode in class java.lang.Object
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Fxn

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xdc.services.getset

Class Fxn

  • java.lang.Object
    • xdc.services.getset.Fxn
  • All Implemented Interfaces:
    org.mozilla.javascript.Callable
    Direct Known Subclasses:
    AutoFxn

    public class Fxn
extends java.lang.Object
implements org.mozilla.javascript.Callable
    A scheduled function in a Group. Each Fxn must be idempotent. That is, if the Fxn has just been run then running it again immediately should have no additional effect; i.e., Fxn f is idempotent iff running "f(); f()" is always equivalent to running just "f()". Examples of such functions are those that just copy a value from one location to another without changing it, or only changing its data representation.

    • Constructor Summary

      Constructors
      Constructor and Description
      Fxn(Group group, org.mozilla.javascript.Callable body)
      Create a new Fxn that will execute the given body, as scheduled by the given Group.

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Fxn addInput(xdc.services.intern.xsr.Value.Observable obj, int index)
      Mark a given array element as a formal input to the Fxn.
      Fxn addInput(xdc.services.intern.xsr.Value.Observable obj, java.lang.String name)
      Mark the given field as a formal input to the Fxn.
      Fxn addOutput(xdc.services.intern.xsr.Value.Observable obj, int index)
      Mark a given array element as a formal output of the Fxn.
      Fxn addOutput(xdc.services.intern.xsr.Value.Observable obj, java.lang.String name)
      Mark the given field of the object as a formal output of the Fxn.
      java.lang.Object call(org.mozilla.javascript.Context cx, org.mozilla.javascript.Scriptable scope, org.mozilla.javascript.Scriptable thisObj, java.lang.Object[] args)
      A setter that is called whenever one of the inputs of the Fxn changes in value.
      boolean getStale()
      Get whether this Fxn needs to be executed.
      java.lang.Object getStatus()
      Get the exit status from the last time this Fxn was executed.
      void run()
      Execute the Fxn body.
      void setStale(boolean stale)
      Set whether the Fxn needs to be executed, typically because one of the inputs has changed value.
      java.lang.String | toString()

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

    • Constructor Detail

      • Fxn

        public Fxn(Group group,
   org.mozilla.javascript.Callable body)
        Create a new Fxn that will execute the given body, as scheduled by the given Group.

    • Method Detail

      • getStatus

        public java.lang.Object getStatus()
        Get the exit status from the last time this Fxn was executed.
        Returns:
        null if the Fxn executed successfully, else an Object.

      • addInput

        public Fxn addInput(xdc.services.intern.xsr.Value.Observable obj,
           java.lang.String name)
        Mark the given field as a formal input to the Fxn. The Fxn will be re-executed whenever the value of the field changes.

      • addInput

        public Fxn addInput(xdc.services.intern.xsr.Value.Observable obj,
           int index)
        Mark a given array element as a formal input to the Fxn.

      • addOutput

        public Fxn addOutput(xdc.services.intern.xsr.Value.Observable obj,
            java.lang.String name)
        Mark the given field of the object as a formal output of the Fxn. A field can't be both an input and output of an Fxn -- if so, it will be ignored as an input. This enables correct scheduling of Fxns with outputs that are updated by read-modify-write, for example if stored as a single bit in an integer.

      • addOutput

        public Fxn addOutput(xdc.services.intern.xsr.Value.Observable obj,
            int index)
        Mark a given array element as a formal output of the Fxn.

      • getStale

        public boolean getStale()
        Get whether this Fxn needs to be executed.

      • setStale

        public void setStale(boolean stale)
        Set whether the Fxn needs to be executed, typically because one of the inputs has changed value. This method should only be called by the Fxn's scheduling Group.

      • run

        public void run()
        Execute the Fxn body.

      • call

        public java.lang.Object call(org.mozilla.javascript.Context cx,
                    org.mozilla.javascript.Scriptable scope,
                    org.mozilla.javascript.Scriptable thisObj,
                    java.lang.Object[] args)
        A setter that is called whenever one of the inputs of the Fxn changes in value. Ignores the change if the input is also an output.
        Specified by:
        call in interface org.mozilla.javascript.Callable

      • toString

        public java.lang.String toString()
        Overrides:
        toString in class java.lang.Object
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GetSet

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xdc.services.getset

Class GetSet

  • java.lang.Object
    • xdc.services.getset.GetSet

  • public class GetSet
extends java.lang.Object
    A helper class to add getters and setters to a field of an XDCscript object.

    • Constructor Summary

      Constructors
      Constructor and Description
      GetSet()

    • Method Summary

      Methods
      Modifier and Type Method and Description
      static boolean getDebug()
      Get whether to print debug trace.
      static void init(xdc.services.intern.xsr.Value.Observable obj)
      Initialize getter and setter support on every field.
      static void init(xdc.services.intern.xsr.Value.Observable obj, int prop)
      Initialize getter and setter support on an array element, or other property with a numeric index.
      static void init(xdc.services.intern.xsr.Value.Observable obj, java.lang.String prop)
      Initialize getter and setter support on a field, or other property labeled by an identifier.
      static void onGet(xdc.services.intern.xsr.Value.Observable obj, int prop, org.mozilla.javascript.Callable getter)
      Add a user getter to the indicated array element, or other property with a numeric index.
      static void onGet(xdc.services.intern.xsr.Value.Observable obj, java.lang.String prop, org.mozilla.javascript.Callable getter)
      Add a user getter to the named field of the object, or other property labeled by an identifier.
      static void onSet(xdc.services.intern.xsr.Value.Observable obj, int prop, org.mozilla.javascript.Callable setter)
      Add a user setter to the indicated array element, or other property with a numeric index.
      static void onSet(xdc.services.intern.xsr.Value.Observable obj, java.lang.String prop, org.mozilla.javascript.Callable setter)
      Add a user setter to the named field of the object, or other property labeled by an identifier.
      static void setDebug(boolean debug)
      Set whether to print debug trace.

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • GetSet

        public GetSet()

    • Method Detail

      • init

        public static void init(xdc.services.intern.xsr.Value.Observable obj)
        Initialize getter and setter support on every field.

      • init

        public static void init(xdc.services.intern.xsr.Value.Observable obj,
        java.lang.String prop)
        Initialize getter and setter support on a field, or other property labeled by an identifier. If it does not already exist, add it.

      • init

        public static void init(xdc.services.intern.xsr.Value.Observable obj,
        int prop)
        Initialize getter and setter support on an array element, or other property with a numeric index. If it does not already exist, add it.

      • onSet

        public static void onSet(xdc.services.intern.xsr.Value.Observable obj,
         java.lang.String prop,
         org.mozilla.javascript.Callable setter)
        Add a user setter to the named field of the object, or other property labeled by an identifier.

      • onSet

        public static void onSet(xdc.services.intern.xsr.Value.Observable obj,
         int prop,
         org.mozilla.javascript.Callable setter)
        Add a user setter to the indicated array element, or other property with a numeric index.

      • onGet

        public static void onGet(xdc.services.intern.xsr.Value.Observable obj,
         java.lang.String prop,
         org.mozilla.javascript.Callable getter)
        Add a user getter to the named field of the object, or other property labeled by an identifier.

      • onGet

        public static void onGet(xdc.services.intern.xsr.Value.Observable obj,
         int prop,
         org.mozilla.javascript.Callable getter)
        Add a user getter to the indicated array element, or other property with a numeric index.

      • getDebug

        public static boolean getDebug()
        Get whether to print debug trace.

      • setDebug

        public static void setDebug(boolean debug)
        Set whether to print debug trace.
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GetSetData

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xdc.services.getset

Class GetSetData

  • java.lang.Object
    • xdc.services.getset.GetSetData

  • public class GetSetData
extends java.lang.Object
    Private data for the getters and setters.

    • Field Summary

      Fields
      Modifier and Type | Field and Description
      java.util.HashSet<org.mozilla.javascript.Callable> | getters
      java.util.HashSet<org.mozilla.javascript.Callable> | setters

    • Constructor Summary

      Constructors
      Constructor and Description
      GetSetData()

    • Method Summary

      Methods
      Modifier and Type Method and Description
      static GetSetData getData(xdc.services.intern.xsr.Value.Observable obj, java.lang.Object mbr)
      Get the private data associated with a field of an object.

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Field Detail

      • getters

        public java.util.HashSet<org.mozilla.javascript.Callable> getters

      • setters

        public java.util.HashSet<org.mozilla.javascript.Callable> setters

    • Constructor Detail

      • GetSetData

        public GetSetData()

    • Method Detail

      • getData

        public static GetSetData getData(xdc.services.intern.xsr.Value.Observable obj,
                 java.lang.Object mbr)
        Get the private data associated with a field of an object. If it doesn't already exist, create it.
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Getters

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xdc.services.getset

Class Getters

  • java.lang.Object
    • org.mozilla.javascript.ScriptableObject
      • org.mozilla.javascript.IdScriptableObject
        • org.mozilla.javascript.BaseFunction
          • xdc.services.getset.Getters
  • All Implemented Interfaces:
    java.io.Serializable, org.mozilla.javascript.Callable, org.mozilla.javascript.ConstProperties, org.mozilla.javascript.debug.DebuggableObject, org.mozilla.javascript.Function, org.mozilla.javascript.IdFunctionCall, org.mozilla.javascript.Scriptable

    public class Getters
extends org.mozilla.javascript.BaseFunction
    A getter function to be added to a field of an XDCscript Value.Obj object. The Getters service manages a set of user-defined getter functions that notifies client code of reads from the field.

    There is also a set of global user-defined getter functions that are notified on any read. This avoids having to manually add such getters to every field. Note, though, that the global getters only apply to fields that have had the Getters service added to them.

    The JavaScript getter functions have the signature:

     this.function(name, value)
     this is set to the object whose field was read
     name is the name of the field that was read
     value is the value that will be returned by the read
    See Also:
    Serialized Form

    • Property Summary

      • Properties inherited from class org.mozilla.javascript.BaseFunction

        hasPrototypeProperty

    • Field Summary

      • Fields inherited from class org.mozilla.javascript.ScriptableObject

        CONST, DONTENUM, EMPTY, PERMANENT, READONLY, UNINITIALIZED_CONST

      • Fields inherited from interface org.mozilla.javascript.Scriptable

        NOT_FOUND

    • Constructor Summary

      Constructors
      Constructor and Description
      Getters(java.lang.Object member)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      static void | addGlobal(org.mozilla.javascript.Callable getter)
      java.lang.Object call(org.mozilla.javascript.Context cx, org.mozilla.javascript.Scriptable scope, org.mozilla.javascript.Scriptable thisObj, java.lang.Object[] args)
      The master getter function called by XDCscript.
      static java.util.Set<org.mozilla.javascript.Callable> init(xdc.services.intern.xsr.Value.Observable obj, java.lang.Object prop)
      Add getter support to a field of an object.

      • Methods inherited from class org.mozilla.javascript.BaseFunction

        construct, createObject, execIdCall, fillConstructorProperties, findInstanceIdInfo, findPrototypeId, getArity, getClassName, getClassPrototype, getFunctionName, getInstanceIdName, getInstanceIdValue, getLength, getMaxInstanceId, getPrototypeProperty, getTypeOf, hasInstance, hasPrototypeProperty, initPrototypeId, setImmunePrototypeProperty, setInstanceIdValue

      • Methods inherited from class org.mozilla.javascript.IdScriptableObject

        activatePrototypeMap, addIdFunctionProperty, defaultGet, defaultPut, defineOwnProperty, delete, exportAsJSClass, get, getAttributes, getOwnPropertyDescriptor, has, hasPrototypeMap, incompatibleCallError, initPrototypeConstructor, initPrototypeMethod, initPrototypeValue, instanceIdInfo, put, setAttributes, setInstanceIdAttributes

      • Methods inherited from class org.mozilla.javascript.ScriptableObject

        applyDescriptorToAttributeBitset, associateValue, avoidObjectDetection, buildDataDescriptor, callMethod, callMethod, checkPropertyChange, checkPropertyDefinition, defineClass, defineClass, defineClass, defineConst, defineConstProperty, defineFunctionProperties, defineOwnProperties, defineOwnProperty, defineProperty, defineProperty, defineProperty, defineProperty, delete, deleteProperty, deleteProperty, ensureScriptable, ensureScriptableObject, equivalentValues, get, get, getAllIds, getArrayPrototype, getAssociatedValue, getAttributes, getAttributes, getAttributes, getClassPrototype, getDefaultValue, getDefaultValue, getFunctionPrototype, getGetterOrSetter, getIds, getObjectPrototype, getParentScope, getProperty, getProperty, getPropertyIds, getPrototype, getSlot, getTopLevelScope, getTopScopeValue, getTypedProperty, getTypedProperty, has, hasProperty, hasProperty, isAccessorDescriptor, isConst, isDataDescriptor, isEmpty, isExtensible, isFalse, isGenericDescriptor, isGetterOrSetter, isSealed, isTrue, preventExtensions, put, putConst, putConstProperty, putProperty, putProperty, redefineProperty, sameValue, sealObject, setAttributes, setAttributes, setAttributes, setGetterOrSetter, setParentScope, setPrototype, size

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

      • Methods inherited from interface org.mozilla.javascript.Scriptable

        delete, delete, get, get, getDefaultValue, getIds, getParentScope, getPrototype, has, has, put, put, setParentScope, setPrototype

    • Constructor Detail

      • Getters

        public Getters(java.lang.Object member)

    • Method Detail

      • init

        public static java.util.Set<org.mozilla.javascript.Callable> init(xdc.services.intern.xsr.Value.Observable obj,
                                                  java.lang.Object prop)
        Add getter support to a field of an object.
        Returns:
        The set of user getters for the field.

      • call

        public java.lang.Object call(org.mozilla.javascript.Context cx,
                    org.mozilla.javascript.Scriptable scope,
                    org.mozilla.javascript.Scriptable thisObj,
                    java.lang.Object[] args)
        The master getter function called by XDCscript. First calls all the global getters, then calls the individual getters registered on this field.
        Specified by:
        call in interface org.mozilla.javascript.Callable
        Specified by:
        call in interface org.mozilla.javascript.Function
        Overrides:
        call in class org.mozilla.javascript.BaseFunction

      • addGlobal

        public static void addGlobal(org.mozilla.javascript.Callable getter)
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Group

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xdc.services.getset

Class Group

  • java.lang.Object
    • xdc.services.getset.Group

  • public class Group
extends java.lang.Object
    A group of Fxns that are each run to completion before any other Fxn in the group. The purpose of a Group is to control interactions between a group of setters. Within each Group the Fxns execute one at a time. Even if a Fxn makes changes that will cause another Fxn in the Group to run, that won't happen until after the first Fxn completes. This allows setters within a group to modify internal state without interference from other setters in the same Group (that may operate on the same internal state). Each group runs to completion. When a setter in the group runs, it might modify other config params and schedule further setters in the same group to run. All of these complete before control is returned to the original execution flow. From the point of view of code outside the group, all the setters ran as an atomic operation. Groups may be interrupted. When a setter modifies a config param that is being monitored by a second group, the second group starts running immediately. It will run to completion before returning control to the first group. So the first group sees the second group as atomic. This allows groups to be tested independently, and combined without affecting their behavior. Cycles aren't permitted in the execution flow between groups. If a setter gets triggered from a group that has already been interrupted, it is deferred and run when control eventually returns to its own group. Cycles between groups can break the appearance of atomic execution, and so should be avoided when possible. Exceptions thrown by a Fxn f in a group only trigger the retraction the value of the Observable associated with f or any Observable that recursively triggered f. Groups only control the order of execution of setters and do not, in the event of an exception, cause retraction of all values set by the setters in the group. Since retractions occur "one value at a time", setters that check consistency amoung multiple values risk triggering an exception during a retraction; this results in a "double fault" fatal error and must be avoided by the setters.

    • Constructor Summary

      Constructors
      Constructor and Description
      Group()
      Create a new Group governed by the given scheduler

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Fxn add(Fxn fxn)
      Add a new Fxn to the group, and execute it once.
      AutoFxn addAuto(org.mozilla.javascript.Callable body)
      Wrap the given function body as an AutoFxn and add it to the group.
      void addStale(Fxn fxn)
      Indicate that a Fxn in the group needs to be run.
      static int getMaxIterations()
      Get the maximum number of iterations allowed in each group, as a debugging aid.
      Fxn getRunning()
      Get the currently running function (unused?)
      boolean getScheduled()
      Ask if the Group has already been scheduled to be run
      boolean getStale()
      Ask if the group needs to be run.
      Fxn | onSet(xdc.services.intern.xsr.Value.Observable obj, int index, org.mozilla.javascript.Callable body)
      Fxn onSet(xdc.services.intern.xsr.Value.Observable obj, java.lang.String name, org.mozilla.javascript.Callable body)
      Wrap the given function body as a Fxn and specify one input to fire on.
      void removeStale()
      Indicate that no Fxn's in the group need to be run.
      void removeStale(Fxn fxn)
      Indicate that a Fxn in the group no longer needs to be run.
      void run()
      Run all the Fxns in the Group that need it.
      void schedule(Fxn fxn)
      Mark the given Fxn as stale, and schedule the whole group to be run at the next opportunity.
      static void setMaxIterations(int maxIterations)
      Get the maximum number of iterations allowed in each group, as a debugging aid.
      void setScheduled(boolean scheduled)
      Indicate that the Group has now been scheduled to be run

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Group

        public Group()
        Create a new Group governed by the given scheduler

    • Method Detail

      • onSet

        public Fxn onSet(xdc.services.intern.xsr.Value.Observable obj,
        java.lang.String name,
        org.mozilla.javascript.Callable body)
        Wrap the given function body as a Fxn and specify one input to fire on. Add it to the group and execute it once.

        Returns:
        the Fxn, so that additional inputs and outputs can be specified.

      • onSet

        public Fxn onSet(xdc.services.intern.xsr.Value.Observable obj,
        int index,
        org.mozilla.javascript.Callable body)

      • addAuto

        public AutoFxn addAuto(org.mozilla.javascript.Callable body)
        Wrap the given function body as an AutoFxn and add it to the group. Executes the function once.

        A typical use is to establish two-way update between related XDCscript fields, say x.a and y.b :

           group.addAuto(function bToA(){ x.a = y.b; });
   group.addAuto(function aToB(){ y.b = x.a; });
        This example constrains x.a and y.b to have the same value. Whenever one of them changes, one AutoFxn in the Group runs and copies the change to the other field. The Group is responsible for deciding when to execute each AutoFxn, based on examining its inputs and outputs.

        Returns:
        the AutoFxn, so that additional inputs and outputs can be specified.

      • add

        public Fxn add(Fxn fxn)
        Add a new Fxn to the group, and execute it once.

      • getStale

        public boolean getStale()
        Ask if the group needs to be run. Should be run whenever any Fxn in the group is stale.

      • addStale

        public void addStale(Fxn fxn)
        Indicate that a Fxn in the group needs to be run.

      • removeStale

        public void removeStale(Fxn fxn)
        Indicate that a Fxn in the group no longer needs to be run.

      • removeStale

        public void removeStale()
        Indicate that no Fxn's in the group need to be run.

      • setScheduled

        public void setScheduled(boolean scheduled)
        Indicate that the Group has now been scheduled to be run

      • getScheduled

        public boolean getScheduled()
        Ask if the Group has already been scheduled to be run

      • getRunning

        public Fxn getRunning()
        Get the currently running function (unused?)

      • run

        public void run()
        Run all the Fxns in the Group that need it.

      • schedule

        public void schedule(Fxn fxn)
        Mark the given Fxn as stale, and schedule the whole group to be run at the next opportunity.

      • getMaxIterations

        public static int getMaxIterations()
        Get the maximum number of iterations allowed in each group, as a debugging aid.

      • setMaxIterations

        public static void setMaxIterations(int maxIterations)
        Get the maximum number of iterations allowed in each group, as a debugging aid.
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xdc.services.getset

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Package xdc.services.getset

  • Class Summary
    Class Description
    AutoFxn
    A Fxn that automatically determines its own inputs and outputs.
    Field
    An immutable object that identifies a specific field of a specific XDCscript object.
    Fxn
    A scheduled function in a Group.
    GetSet
    A helper class to add getters and setters to a field of an XDCscript object.
    GetSetData
    Private data for the getters and setters.
    Getters
    A getter function to be added to a field of an XDCscript Value.Obj object.
    Group
    A group of Fxns that are each run to completion before any other Fxn in the group.
    Scheduler
    Schedules execution of Fxns and Groups.
    Setters
    A setter function to be added to a field of an XDCscript Value.Obj object.
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xdc.services.getset Class Hierarchy

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Hierarchy For Package xdc.services.getset

Class Hierarchy

  • java.lang.Object
    • xdc.services.getset.Field
    • xdc.services.getset.Fxn (implements org.mozilla.javascript.Callable)
      • xdc.services.getset.AutoFxn
    • xdc.services.getset.GetSet
    • xdc.services.getset.GetSetData
    • xdc.services.getset.Group
    • xdc.services.getset.Scheduler
    • org.mozilla.javascript.ScriptableObject (implements org.mozilla.javascript.ConstProperties, org.mozilla.javascript.debug.DebuggableObject, org.mozilla.javascript.Scriptable, java.io.Serializable)
      • org.mozilla.javascript.IdScriptableObject (implements org.mozilla.javascript.IdFunctionCall)
        • org.mozilla.javascript.BaseFunction (implements org.mozilla.javascript.Function)
          • xdc.services.getset.Getters
          • xdc.services.getset.Setters
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Scheduler

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xdc.services.getset

Class Scheduler

  • java.lang.Object
    • xdc.services.getset.Scheduler

  • public class Scheduler
extends java.lang.Object
    Schedules execution of Fxns and Groups. Fxns within a group always run to completion before another function within the group. Groups may interrupt each other.

    Note: Does not support multiple Threads accessing the XDCscript object model.

    • Constructor Summary

      Constructors
      Constructor and Description
      Scheduler()

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      static Group | createGroup()
      static Fxn getRunningFxn()
      Get which Fxn is currently running, or null if none.
      static Group getRunningGroup()
      Get which Group is currently running, or null if none.
      static void schedule(Group group)
      Schedule the group for execution.

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Scheduler

        public Scheduler()

    • Method Detail

      • createGroup

        public static Group createGroup()

      • getRunningGroup

        public static Group getRunningGroup()
        Get which Group is currently running, or null if none.

      • getRunningFxn

        public static Fxn getRunningFxn()
        Get which Fxn is currently running, or null if none.

      • schedule

        public static void schedule(Group group)
        Schedule the group for execution. If the group isn't already running then execute it immediately. Interrupts any other groups that are currently running.

        If a group that is already running anywhere on the stack is rescheduled, ignore the request and let the group complete on it own time.

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Setters

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xdc.services.getset

Class Setters

  • java.lang.Object
    • org.mozilla.javascript.ScriptableObject
      • org.mozilla.javascript.IdScriptableObject
        • org.mozilla.javascript.BaseFunction
          • xdc.services.getset.Setters
  • All Implemented Interfaces:
    java.io.Serializable, org.mozilla.javascript.Callable, org.mozilla.javascript.ConstProperties, org.mozilla.javascript.debug.DebuggableObject, org.mozilla.javascript.Function, org.mozilla.javascript.IdFunctionCall, org.mozilla.javascript.Scriptable

    public class Setters
extends org.mozilla.javascript.BaseFunction
    A setter function to be added to a field of an XDCscript Value.Obj object. The Setters service manages a set of user-defined setter functions that notifies client code of a change to the value of the field. The setter only fires on writes to the field that actually change its value. Writing the current value again doesn't fire the setter.

    There is also a set of global user-defined setter functions that are notified on any change. This avoids having to manually add such setters to every field. Note, though, that the global setters only apply to fields that have had the Setters service added to them.

    Exceptions thrown by a setter are handled as follows: - the original value of the config is restored (without triggering any setters) - any setters for the config called before the exception are called again with the old and new values reversed and an additional exception object (passed as a forth argument) - calls to any setters that had not yet been called are never executed The JavaScript setter functions have the signature:

     this.function(name, newValue, oldValue, exception)
     this is set to the object whose field changed value
     name is the name of the field that changed value
     newValue is the new value of the field
     oldValue was the value of the field before the assignment
     exception is non-null when a value is being reverted
    The new value is assigned to the field before the setter is called. So, newValue is not strictly needed; it can also be obtained by simply reading the value of the field associated with the setter. Following normal JavaScript conventions, unneeded arguments can be omitted from the declaration. So all of the following are valid declarations for a setter function:
     function(name, newValue, oldValue) {}
 function(name, newValue) {}
 function(name) {}
 function() {}
    See Also:
    Serialized Form

    • Property Summary

      • Properties inherited from class org.mozilla.javascript.BaseFunction

        hasPrototypeProperty

    • Field Summary

      • Fields inherited from class org.mozilla.javascript.ScriptableObject

        CONST, DONTENUM, EMPTY, PERMANENT, READONLY, UNINITIALIZED_CONST

      • Fields inherited from interface org.mozilla.javascript.Scriptable

        NOT_FOUND

    • Constructor Summary

      Constructors
      Constructor and Description
      Setters(java.lang.Object member)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      static void addGlobal(org.mozilla.javascript.Callable setter)
      Add a setter that is called when any field changes value.
      java.lang.Object call(org.mozilla.javascript.Context cx, org.mozilla.javascript.Scriptable scope, org.mozilla.javascript.Scriptable thisObj, java.lang.Object[] args)
      The master setter function called by XDCscript.
      static int getMaxStackDepth()
      Get the maximum allowed depth of recursively nested setters.
      static java.util.Set<org.mozilla.javascript.Callable> | init(xdc.services.intern.xsr.Value.Observable obj, int index)
      static java.util.Set<org.mozilla.javascript.Callable> init(xdc.services.intern.xsr.Value.Observable obj, java.lang.String name)
      Add setter support to a field of an object.
      static void setMaxStackDepth(int maxStackDepth)
      Set the maximum allowed depth of recursively nested setters, as a debugging aid.

      • Methods inherited from class org.mozilla.javascript.BaseFunction

        construct, createObject, execIdCall, fillConstructorProperties, findInstanceIdInfo, findPrototypeId, getArity, getClassName, getClassPrototype, getFunctionName, getInstanceIdName, getInstanceIdValue, getLength, getMaxInstanceId, getPrototypeProperty, getTypeOf, hasInstance, hasPrototypeProperty, initPrototypeId, setImmunePrototypeProperty, setInstanceIdValue

      • Methods inherited from class org.mozilla.javascript.IdScriptableObject

        activatePrototypeMap, addIdFunctionProperty, defaultGet, defaultPut, defineOwnProperty, delete, exportAsJSClass, get, getAttributes, getOwnPropertyDescriptor, has, hasPrototypeMap, incompatibleCallError, initPrototypeConstructor, initPrototypeMethod, initPrototypeValue, instanceIdInfo, put, setAttributes, setInstanceIdAttributes

      • Methods inherited from class org.mozilla.javascript.ScriptableObject

        applyDescriptorToAttributeBitset, associateValue, avoidObjectDetection, buildDataDescriptor, callMethod, callMethod, checkPropertyChange, checkPropertyDefinition, defineClass, defineClass, defineClass, defineConst, defineConstProperty, defineFunctionProperties, defineOwnProperties, defineOwnProperty, defineProperty, defineProperty, defineProperty, defineProperty, delete, deleteProperty, deleteProperty, ensureScriptable, ensureScriptableObject, equivalentValues, get, get, getAllIds, getArrayPrototype, getAssociatedValue, getAttributes, getAttributes, getAttributes, getClassPrototype, getDefaultValue, getDefaultValue, getFunctionPrototype, getGetterOrSetter, getIds, getObjectPrototype, getParentScope, getProperty, getProperty, getPropertyIds, getPrototype, getSlot, getTopLevelScope, getTopScopeValue, getTypedProperty, getTypedProperty, has, hasProperty, hasProperty, isAccessorDescriptor, isConst, isDataDescriptor, isEmpty, isExtensible, isFalse, isGenericDescriptor, isGetterOrSetter, isSealed, isTrue, preventExtensions, put, putConst, putConstProperty, putProperty, putProperty, redefineProperty, sameValue, sealObject, setAttributes, setAttributes, setAttributes, setGetterOrSetter, setParentScope, setPrototype, size

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

      • Methods inherited from interface org.mozilla.javascript.Scriptable

        delete, delete, get, get, getDefaultValue, getIds, getParentScope, getPrototype, has, has, put, put, setParentScope, setPrototype

    • Constructor Detail

      • Setters

        public Setters(java.lang.Object member)

    • Method Detail

      • init

        public static java.util.Set<org.mozilla.javascript.Callable> init(xdc.services.intern.xsr.Value.Observable obj,
                                                  java.lang.String name)
        Add setter support to a field of an object.
        Returns:
        The set of user setters for the field.

      • init

        public static java.util.Set<org.mozilla.javascript.Callable> init(xdc.services.intern.xsr.Value.Observable obj,
                                                  int index)

      • call

        public java.lang.Object call(org.mozilla.javascript.Context cx,
                    org.mozilla.javascript.Scriptable scope,
                    org.mozilla.javascript.Scriptable thisObj,
                    java.lang.Object[] args)
        The master setter function called by XDCscript. First calls all the global setters, then calls the individual setters registered on this field.
        Specified by:
        call in interface org.mozilla.javascript.Callable
        Specified by:
        call in interface org.mozilla.javascript.Function
        Overrides:
        call in class org.mozilla.javascript.BaseFunction

      • addGlobal

        public static void addGlobal(org.mozilla.javascript.Callable setter)
        Add a setter that is called when any field changes value.

      • getMaxStackDepth

        public static int getMaxStackDepth()
        Get the maximum allowed depth of recursively nested setters.

      • setMaxStackDepth

        public static void setMaxStackDepth(int maxStackDepth)
        Set the maximum allowed depth of recursively nested setters, as a debugging aid.
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module xdc.services.global.Clock

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Clock ========
    14     *  Elapsed time measurement functions
    15     */
    16    metaonly module Clock {
    17
    18        /*!
    19         *  ======== getElapsedTime ========
    20         *  Get elapsed time from last reset
    21         */
    22        function getElapsedTime();
    23
    24        /*!
    25         *  ======== enable ========
    26         *  Enable output from this module
    27         *
    28         *  If false, all output is suppressed.
    29         *
    30         *  The initial value of this configuration parameter can be set
    31         *  on the `xs` command line.  For example,
    32         *  @p(code)
    33         *      xs -Dxdc.services.global.Clock.enable=true ...
    34         *  @p
    35         *  sets the initial value of `enable` to `true`.
    36         *
    37         *  If the value is not set on the command line, its initial value
    38         *   defaults to `false`.
    39         */
    40        config Bool enable = false;
    41
    42        /*!
    43         *  ======== showMemory ========
    44         *  Enable memory usage output
    45         *
    46         *  If false, memory usage output is suppressed
    47         */
    48        config Bool showMemory = false;
    49
    50        /*!
    51         *  ======== print ========
    52         *  Report elapsed time from last reset
    53         */
    54        void print(String msg);
    55
    56        /*!
    57         *  ======== reset ========
    58         *  Set elapsed time to 0
    59         */
    60        void reset();
    61    }
    62    /*
    63     *  @(#) xdc.services.global; 1, 0, 0,1; 11-21-2018 13:30:55; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    64     */
    65


package xdc.services.global

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== xdc.services.global ========
    14     *  Common XDC utility classes
    15     */
    16    package xdc.services.global [1, 0, 0]
    17    {
    18        module Clock;
    19        module Trace;
    20    }
    21    /*
    22     *  @(#) xdc.services.global; 1, 0, 0,1; 11-21-2018 13:30:55; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    23     */
    24


module xdc.services.global.Trace

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Trace ========
    14     *  Trace support
    15     *
    16     *  This module allows system integrators to selectively enable trace
    17     *  statements, from within XDCscripts. Trace statements can be selected
    18     *  based on the file (capsule) and the package in which they are located.
    19     *  For example, trace statements from file `Mod.xs` in package `myPkgs.pkgA'
    20     *  can be enabled either with `Trace.capsuleEnable(["myPkgs/pkgA/Mod"])` or
    21     *  with `Trace.packageEnable(["myPkgs.pkgA"])`.
    22     *
    23     *  Trace statements can also belong to groups, strings defined by package
    24     *  producers when they need to group related trace statements, distributed
    25     *  across different modules and packages, into trace units that can be
    26     *  disabled or enabled as a whole. If some of the trace statements from file
    27     *  `Mod.xs` are tagged to belong to a group "init", the following will
    28     *  activate them:
    29     *  @p(code)
    30     *  Trace.groupEnable(["init"]);
    31     *  @p
    32     *
    33     *  Each trace statement by default belongs to the group "all". To activate
    34     *  all trace statements:
    35     *  @p(code)
    36     *  Trace.setLevel(2);
    37     *  Trace.groupEnable(["all"]);
    38     *  @p
    39     *
    40     */
    41    metaonly module Trace {
    42
    43        typedef String StringArray[];
    44
    45        /*!
    46         *  ======== level ========
    47         *  @_nodoc
    48         *  Select the amount of printed messages
    49         */
    50        config Int level = 0;
    51
    52        /*!
    53         *  ======== capsules ========
    54         *  @_nodoc
    55         *  Array of regular expressions enabling trace in capsules
    56         */
    57        config StringArray capsules = [];
    58
    59        /*!
    60         *  ======== packages ========
    61         *  @_nodoc
    62         *  Array of regular expressions enabling trace in packages
    63         */
    64        config StringArray packages = [];
    65
    66        /*!
    67         *  ======== groups ========
    68         *  @_nodoc
    69         *  Array of regular expressions enabling trace in groups
    70         */
    71        config StringArray groups = [];
    72
    73        /*!
    74         *  ======== packageLoad ========
    75         *  Enable trace of loaded packages
    76         *
    77         *  This setting enables the messages related to loading packages.
    78         *  If `true`, whenever a package is loaded, the following info is
    79         *  displayed:
    80         *  @p(blist)
    81         *  - name of a package loading another package
    82         *  - name of the loaded package
    83         *  - repository from which the package is being loaded
    84         *  @p
    85         */
    86        config Bool packageLoad = false;
    87
    88        /*!
    89         *  ======== useModule ========
    90         *  Enable trace of used modules
    91         *
    92         *  This setting enables the messages that inform when the function
    93         *  `xdc.useModule()` is invoked on a module, and when a module's
    94         *  `module$use` function is invoked.
    95         */
    96        config Bool useModule = false;
    97
    98        /*!
    99         *  ======== addSupergroup ========
   100         *  Add a group that contains other groups
   101         *
   102         *  This function allows giving a name to an array of existing
   103         *  trace groups.
   104         *
   105         *  @param(supergroup)      name of the new group
   106         *  @param(subgroups)       array of the existing trace groups
   107         */
   108        Void addSupergroup(String supergroup, StringArray subgroups);
   109
   110        /*!
   111         *  ======== capsuleEnable ========
   112         *  Enable trace output from selected capsules
   113         *
   114         *  Capsules are either XDCscript files or Java source files. The
   115         *  function parameter is treated as an array of JavaScript
   116         *  regular expressions, therefore it can contain partial capsule
   117         *  names.
   118         *
   119         *  If this function is invoked repeatedly, each new call replaces
   120         *  the array of currently enabled capsules with the array supplied
   121         *  as the parameter. The array of the currently enabled capsules is
   122         *  returned. If the function is invoked with a zero-length array, it
   123         *  returns the currently enabled capsules, but it also leaves them
   124         *  active. Therefore, the sequence of calls that would add new
   125         *  capsules instead of replacing the current ones is:
   126         *  @p(code)
   127         *  var current = Trace.capsuleEnable([]);
   128         *  current[current.length++] = "pkg/ModA.xs";
   129         *  current[current.length++] = "pkg/ModB.xs";
   130         *  Trace.capsuleEnable(current);
   131         *  @p
   132         *
   133         *  To disable trace for all capsules, the function must be invoked
   134         *  with an empty string as the only element of the array.
   135         *  @p(code)
   136         *  Trace.capsuleEnable([""]);
   137         *  @p
   138         *
   139         *  @param(capsules)        array of capsule names
   140         *
   141         *  @a(return)              array of currently enabled capsule names
   142         */
   143        StringArray capsuleEnable(StringArray capsules);
   144
   145        /*!
   146         *  ======== groupEnable ========
   147         *  Enable trace output from selected groups
   148         *
   149         *  A group is a string defined by package producers when they need to
   150         *  group related trace statements, distributed across different
   151         *  modules and packages, into trace units that can be disabled or
   152         *  enabled as a whole. The function parameter is treated as an array
   153         *  of JavaScript regular expressions, therefore it can contain partial
   154         *  group names.
   155         *
   156         *  If this function is invoked repeatedly, each new call replaces
   157         *  the array of currently enabled groups with the array supplied
   158         *  as the parameter. The array of the currently enabled groups is
   159         *  returned. If the function is invoked with a zero-length array, it
   160         *  returns the currently enabled groups, but it also leaves them
   161         *  active. Therefore, the sequence of calls that would add new groups
   162         *  instead of replacing the current ones is:
   163         *  @p(code)
   164         *  var current = Trace.groupEnable([]);
   165         *  current[current.length++] = "libPkgs";
   166         *  Trace.groupEnable(current);
   167         *  @p
   168         *
   169         *  To disable trace for all groups, the function must be invoked
   170         *  with an empty string as the only element of the array.
   171         *  @p(code)
   172         *  Trace.groupEnable([""]);
   173         *  @p
   174         *
   175         *  @param(groups)  array of groups
   176         *
   177         *  @a(return)      array of currently enabled groups
   178         */
   179        StringArray groupEnable(StringArray groups);
   180
   181        /*!
   182         *  ======== packageEnable ========
   183         *  Enable trace output from selected packages
   184         *
   185         *  Packages that can be enabled through this function are RTSC
   186         *  packages and Java packages. The function parameter is treated as
   187         *  an array of JavaScript regular expressions, therefore it can
   188         *  contain partial package names.
   189         *
   190         *  If this function is invoked repeatedly, each new call replaces
   191         *  the array of currently enabled packages with the array supplied
   192         *  as the parameter. The array of the currently enabled packages is
   193         *  returned. If the function is invoked with a zero-length array, it
   194         *  returns the currently enabled packages, but it also leaves them
   195         *  active. Therefore, the sequence of calls that would add new
   196         *  packages instead of replacing the current ones is:
   197         *  @p(code)
   198         *  var current = Trace.packageEnable([]);
   199         *  current[current.length++] = "ti.targets";
   200         *  Trace.packageEnable(current);
   201         *  @p
   202         *
   203         *  To disable trace for all packages, the function must be invoked
   204         *  with an empty string as the only element of the array.
   205         *  @p(code)
   206         *  Trace.packageEnable([""]);
   207         *  @p
   208         *
   209         *  @param(packages)        array of package names
   210         *
   211         *  @a(return)              array of currently enabled package names
   212         */
   213        StringArray packageEnable(StringArray packages);
   214
   215        /*!
   216         *  ======== setLevel ========
   217         *  Set the verbosity level
   218         *
   219         *  This function limits trace output to trace statement tagged with
   220         *  level equal or lower than this function's parameter. By default,
   221         *  the verbosity level is set to 0, which is the least verbose level.
   222         *  The most verbose level is 2.
   223         */
   224        Int setLevel(Int level);
   225
   226        /*!
   227         *  ======== start ========
   228         *  @_nodoc
   229         *  Activate trace
   230         */
   231        Void start();
   232    }
   233    /*
   234     *  @(#) xdc.services.global; 1, 0, 0,1; 11-21-2018 13:30:55; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   235     */
   236


package xdc.services.mapping

     1    /*
     2     *  Copyright (c) 2014 Texas Instruments
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== xdc.services.mapping ========
    15     *
    16     *  Java classes to support target and platform mapping based on JSON files
    17     */
    18    package xdc.services.mapping [1, 0, 0] {
    19    }
    20
    21    /*
    22     *  @(#) xdc.services.mapping; 1, 0, 0,1; 11-21-2018 13:31:41; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    23     */
    24


package xdc.services.spec

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.shelf;
    13
    14    /*!
    15     *  ======== xdc.services.spec ========
    16     *
    17     *  Java classes to access XDCspec information
    18     *
    19     *  This package contains several Java classes that enable clients to
    20     *  retrieve inforation about modules, interfaces, and packages from their
    21     *  specification files (i.e., `*.xdc` files).  Being Java classes, the APIs
    22     *  provided are available to both Java applications and XDCscripts (via the
    23     *  `$spec` property of the module, interface, or package).
    24     *
    25     *  @p(dlist)
    26     *      - `{@link ./doc-files/javadoc/xdc/services/spec/Pkg.html [Pkg]}`
    27     *        Package related information available from a package's
    28     *        `{@link http://rtsc.eclipse.org/docs/XDCscript_-_Package-Object.undefined4spec $spec}`
    29     *        property.
    30     *      - `{@link ./doc-files/javadoc/xdc/services/spec/Unit.html [Unit]}`
    31     *        Module (or interface) related information available from a
    32     *        module's (or interface's)
    33     *        `{@link http://rtsc.eclipse.org/docs/XDCscript_-_Module-Object.undefined4spec $spec}`
    34     *        property.
    35     *  @p
    36     *
    37     *  @a(Note)
    38     *  When accessing the Java methods provided by this package via XDCscript,
    39     *  you can either either use their liternames (e.g., `getName()`) or use
    40     *  the JavaBeans pattern of getters and setters in which the method
    41     *  `getName()` can be accessed via just `name`.  The examples below provide
    42     *  examples of how this pattern can be used.
    43     *
    44     *  @a(XDCscript Examples)
    45     *  Get the declared name of a module:
    46     *  @p(code)
    47     *      var Mod = xdc.module('pkg.Mod');
    48     *      print("Module declared as " + Mod.$spec.getName());
    49     *  @p
    50     *
    51     *  This same example can be written using the JavaBean pattern as follows:
    52     *  @p(code)
    53     *      var Mod = xdc.module('pkg.Mod');
    54     *      print("Module declared as " + Mod.$spec.name);
    55     *  @p
    56     *
    57     *  @see ./doc-files/javadoc/index.html Javadoc
    58     */
    59    package xdc.services.spec [1, 0, 0] {
    60    }
    61    /*
    62     *  @(#) xdc.services.spec; 1, 0, 0,1; 11-21-2018 13:31:48; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    63     */
    64


All Classes

  • Atom
  • Attr
  • BrowserSession
  • Cache
  • Decl
  • Decl.Annexable
  • Decl.Arg
  • Decl.AuxDef
  • Decl.Config
  • Decl.Const
  • Decl.Enum
  • Decl.EnumVal
  • Decl.Extern
  • Decl.Field
  • Decl.Fxn
  • Decl.IsType
  • Decl.LocalUnit
  • Decl.OverridableDef
  • Decl.Proxy
  • Decl.Signature
  • Decl.Signature.ObjKind
  • Decl.Sizeable
  • Decl.Struct
  • Decl.Typedef
  • DocComment
  • Expr
  • Expr.Aggregate
  • Expr.Array
  • Expr.Binary
  • Expr.Cond
  • Expr.Const
  • Expr.Creat
  • Expr.Hash
  • Expr.Paren
  • Expr.Term
  • Expr.Unary
  • GrammarLexer
  • GrammarParser
  • Import
  • Node
  • ParserSession
  • Persist
  • Persist.Fixup
  • Persist.Input
  • Persist.Output
  • Pkg
  • Qual
  • Ref
  • Reserved
  • Session
  • SessionRuntimeException
  • Sup
  • Test
  • Type
  • Type.Array
  • Type.Array.Kind
  • Type.Creator
  • Type.Declarator
  • Type.Fxn
  • Type.Modifier
  • Type.Paren
  • Type.Ptr
  • Type.Spec
  • Unit
  • XDoc


Constant Field Values

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Constant Field Values

Contents

  • xdc.services.*

xdc.services.*

  • xdc.services.spec.Attr
    Modifier and Type | Constant Field | Value
    public static final java.lang.String | A_Annex | "@Annex"
    public static final java.lang.String | A_CommandOption | "@CommandOption"
    public static final java.lang.String | A_ConstVector | "@ConstVector"
    public static final java.lang.String | A_CustomHeader | "@CustomHeader"
    public static final java.lang.String | A_DirectCall | "@DirectCall"
    public static final java.lang.String | A_Encoded | "@Encoded"
    public static final java.lang.String | A_Facet | "@Facet"
    public static final java.lang.String | A_Gated | "@Gated"
    public static final java.lang.String | A_GlobalNames | "@GlobalNames"
    public static final java.lang.String | A_HeaderName | "@HeaderName"
    public static final java.lang.String | A_InstanceFinalize | "@InstanceFinalize"
    public static final java.lang.String | A_InstanceInitError | "@InstanceInitError"
    public static final java.lang.String | A_InstanceInitStatic | "@InstanceInitStatic"
    public static final java.lang.String | A_Macro | "@Macro"
    public static final java.lang.String | A_ModuleStartup | "@ModuleStartup"
    public static final java.lang.String | A_NoProxyCreate | "@NoProxyCreate"
    public static final java.lang.String | A_NoRuntime | "@NoRuntime"
    public static final java.lang.String | A_Opaque | "@Opaque"
    public static final java.lang.String | A_Prefix | "@Prefix"
    public static final java.lang.String | A_Proxy | "@Proxy"
    public static final java.lang.String | A_System | "@System"
    public static final java.lang.String | A_TargetHeader | "@TargetHeader"
    public static final java.lang.String | A_Template | "@Template"
    public static final java.lang.String | A_Transient | "@Transient"
    public static final java.lang.String | A_XmlDtd | "@XmlDtd"
  • xdc.services.spec.GrammarLexer
    Modifier and Type | Constant Field | Value
    public static final int | AMP | 24
    public static final int | AMPAMP | 25
    public static final int | ATTR | 11
    public static final int | BANG | 41
    public static final int | BANGEQ | 26
    public static final int | BAR | 27
    public static final int | BARBAR | 28
    public static final int | CAR | 29
    public static final int | CHAR | 22
    public static final int | COLON | 19
    public static final int | COMMA | 9
    public static final int | D | 49
    public static final int | DIV | 30
    public static final int | DOC_BLK | 15
    public static final int | DOC_INL | 16
    public static final int | DOC_PRE | 55
    public static final int | DOC_SUF | 56
    public static final int | DOT | 51
    public static final int | E | 50
    public static final int | ELIPSIS | 10
    public static final int | EOF | -1
    public static final int | EQ | 12
    public static final int | EQEQ | 31
    public static final int | GT | 32
    public static final int | GTEQ | 33
    public static final int | GTGT | 34
    public static final int | H | 52
    public static final int | ID | 48
    public static final int | IDENT | 13
    public static final int | LBRK | 7
    public static final int | LCUR | 17
    public static final int | LPAR | 5
    public static final int | LT | 35
    public static final int | LTEQ | 36
    public static final int | LTLT | 37
    public static final int | LU | 53
    public static final int | MIN | 38
    public static final int | ML_COMMENT | 47
    public static final int | NUM | 21
    public static final int | OPER | 57
    public static final int | PATH | 43
    public static final int | PATHSTAR | 44
    public static final int | PCT | 39
    public static final int | PLUS | 40
    public static final int | QUEST | 20
    public static final int | R | 54
    public static final int | RBRK | 8
    public static final int | RCUR | 18
    public static final int | RPAR | 6
    public static final int | SEMI | 14
    public static final int | SL_COMMENT | 46
    public static final int | STAR | 4
    public static final int | STRING | 23
    public static final int | T__100 | 100
    public static final int | T__101 | 101
    public static final int | T__102 | 102
    public static final int | T__103 | 103
    public static final int | T__104 | 104
    public static final int | T__105 | 105
    public static final int | T__106 | 106
    public static final int | T__107 | 107
    public static final int | T__108 | 108
    public static final int | T__109 | 109
    public static final int | T__110 | 110
    public static final int | T__111 | 111
    public static final int | T__112 | 112
    public static final int | T__113 | 113
    public static final int | T__114 | 114
    public static final int | T__115 | 115
    public static final int | T__116 | 116
    public static final int | T__117 | 117
    public static final int | T__118 | 118
    public static final int | T__119 | 119
    public static final int | T__120 | 120
    public static final int | T__121 | 121
    public static final int | T__122 | 122
    public static final int | T__123 | 123
    public static final int | T__124 | 124
    public static final int | T__125 | 125
    public static final int | T__126 | 126
    public static final int | T__127 | 127
    public static final int | T__128 | 128
    public static final int | T__129 | 129
    public static final int | T__130 | 130
    public static final int | T__131 | 131
    public static final int | T__132 | 132
    public static final int | T__133 | 133
    public static final int | T__134 | 134
    public static final int | T__135 | 135
    public static final int | T__136 | 136
    public static final int | T__137 | 137
    public static final int | T__138 | 138
    public static final int | T__58 | 58
    public static final int | T__59 | 59
    public static final int | T__60 | 60
    public static final int | T__61 | 61
    public static final int | T__62 | 62
    public static final int | T__63 | 63
    public static final int | T__64 | 64
    public static final int | T__65 | 65
    public static final int | T__66 | 66
    public static final int | T__67 | 67
    public static final int | T__68 | 68
    public static final int | T__69 | 69
    public static final int | T__70 | 70
    public static final int | T__71 | 71
    public static final int | T__72 | 72
    public static final int | T__73 | 73
    public static final int | T__74 | 74
    public static final int | T__75 | 75
    public static final int | T__76 | 76
    public static final int | T__77 | 77
    public static final int | T__78 | 78
    public static final int | T__79 | 79
    public static final int | T__80 | 80
    public static final int | T__81 | 81
    public static final int | T__82 | 82
    public static final int | T__83 | 83
    public static final int | T__84 | 84
    public static final int | T__85 | 85
    public static final int | T__86 | 86
    public static final int | T__87 | 87
    public static final int | T__88 | 88
    public static final int | T__89 | 89
    public static final int | T__90 | 90
    public static final int | T__91 | 91
    public static final int | T__92 | 92
    public static final int | T__93 | 93
    public static final int | T__94 | 94
    public static final int | T__95 | 95
    public static final int | T__96 | 96
    public static final int | T__97 | 97
    public static final int | T__98 | 98
    public static final int | T__99 | 99
    public static final int | TILDE | 42
    public static final int | WS | 45
  • xdc.services.spec.GrammarParser
    Modifier and Type | Constant Field | Value
    public static final int | AMP | 24
    public static final int | AMPAMP | 25
    public static final int | ATTR | 11
    public static final int | BANG | 41
    public static final int | BANGEQ | 26
    public static final int | BAR | 27
    public static final int | BARBAR | 28
    public static final int | CAR | 29
    public static final int | CHAR | 22
    public static final int | COLON | 19
    public static final int | COMMA | 9
    public static final int | D | 49
    public static final int | DIV | 30
    public static final int | DOC_BLK | 15
    public static final int | DOC_INL | 16
    public static final int | DOC_PRE | 55
    public static final int | DOC_SUF | 56
    public static final int | DOT | 51
    public static final int | E | 50
    public static final int | ELIPSIS | 10
    public static final int | EOF | -1
    public static final int | EQ | 12
    public static final int | EQEQ | 31
    public static final int | GT | 32
    public static final int | GTEQ | 33
    public static final int | GTGT | 34
    public static final int | H | 52
    public static final int | ID | 48
    public static final int | IDENT | 13
    public static final int | LBRK | 7
    public static final int | LCUR | 17
    public static final int | LPAR | 5
    public static final int | LT | 35
    public static final int | LTEQ | 36
    public static final int | LTLT | 37
    public static final int | LU | 53
    public static final int | MIN | 38
    public static final int | ML_COMMENT | 47
    public static final int | NUM | 21
    public static final int | OPER | 57
    public static final int | PATH | 43
    public static final int | PATHSTAR | 44
    public static final int | PCT | 39
    public static final int | PLUS | 40
    public static final int | QUEST | 20
    public static final int | R | 54
    public static final int | RBRK | 8
    public static final int | RCUR | 18
    public static final int | RPAR | 6
    public static final int | SEMI | 14
    public static final int | SL_COMMENT | 46
    public static final int | STAR | 4
    public static final int | STRING | 23
    public static final int | T__100 | 100
    public static final int | T__101 | 101
    public static final int | T__102 | 102
    public static final int | T__103 | 103
    public static final int | T__104 | 104
    public static final int | T__105 | 105
    public static final int | T__106 | 106
    public static final int | T__107 | 107
    public static final int | T__108 | 108
    public static final int | T__109 | 109
    public static final int | T__110 | 110
    public static final int | T__111 | 111
    public static final int | T__112 | 112
    public static final int | T__113 | 113
    public static final int | T__114 | 114
    public static final int | T__115 | 115
    public static final int | T__116 | 116
    public static final int | T__117 | 117
    public static final int | T__118 | 118
    public static final int | T__119 | 119
    public static final int | T__120 | 120
    public static final int | T__121 | 121
    public static final int | T__122 | 122
    public static final int | T__123 | 123
    public static final int | T__124 | 124
    public static final int | T__125 | 125
    public static final int | T__126 | 126
    public static final int | T__127 | 127
    public static final int | T__128 | 128
    public static final int | T__129 | 129
    public static final int | T__130 | 130
    public static final int | T__131 | 131
    public static final int | T__132 | 132
    public static final int | T__133 | 133
    public static final int | T__134 | 134
    public static final int | T__135 | 135
    public static final int | T__136 | 136
    public static final int | T__137 | 137
    public static final int | T__138 | 138
    public static final int | T__58 | 58
    public static final int | T__59 | 59
    public static final int | T__60 | 60
    public static final int | T__61 | 61
    public static final int | T__62 | 62
    public static final int | T__63 | 63
    public static final int | T__64 | 64
    public static final int | T__65 | 65
    public static final int | T__66 | 66
    public static final int | T__67 | 67
    public static final int | T__68 | 68
    public static final int | T__69 | 69
    public static final int | T__70 | 70
    public static final int | T__71 | 71
    public static final int | T__72 | 72
    public static final int | T__73 | 73
    public static final int | T__74 | 74
    public static final int | T__75 | 75
    public static final int | T__76 | 76
    public static final int | T__77 | 77
    public static final int | T__78 | 78
    public static final int | T__79 | 79
    public static final int | T__80 | 80
    public static final int | T__81 | 81
    public static final int | T__82 | 82
    public static final int | T__83 | 83
    public static final int | T__84 | 84
    public static final int | T__85 | 85
    public static final int | T__86 | 86
    public static final int | T__87 | 87
    public static final int | T__88 | 88
    public static final int | T__89 | 89
    public static final int | T__90 | 90
    public static final int | T__91 | 91
    public static final int | T__92 | 92
    public static final int | T__93 | 93
    public static final int | T__94 | 94
    public static final int | T__95 | 95
    public static final int | T__96 | 96
    public static final int | T__97 | 97
    public static final int | T__98 | 98
    public static final int | T__99 | 99
    public static final int | TILDE | 42
    public static final int | WS | 45
  • xdc.services.spec.Type
    Modifier and Type | Constant Field | Value
    public static final java.lang.String | ARG | "IArg"
    public static final java.lang.String | CHAR | "Char"
    public static final java.lang.String | DOUBLE | "Double"
    public static final java.lang.String | FLOAT | "Float"
    public static final java.lang.String | FXN | "Fxn"
    public static final java.lang.String | INT | "Int"
    public static final java.lang.String | INT16 | "Int16"
    public static final java.lang.String | INT32 | "Int32"
    public static final java.lang.String | INT40 | "Int40"
    public static final java.lang.String | INT64 | "Int64"
    public static final java.lang.String | INT8 | "Int8"
    public static final java.lang.String | LONG | "Long"
    public static final java.lang.String | LONGDOUBLE | "LDouble"
    public static final java.lang.String | LONGLONG | "LLong"
    public static final java.lang.String | PTR | "Ptr"
    public static final java.lang.String | SHORT | "Short"
    public static final java.lang.String | SIZE | "Size"
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Deprecated API

Contents

  • Deprecated Methods
  • Deprecated Methods
    Method and Description
    xdc.services.spec.Unit.decl(String)
    replaced by Unit.getDecl(String)
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A B C D E F G H I L M N O P Q R S T U V W X

A

A_Annex - Static variable in class xdc.services.spec.Attr
A_CommandOption - Static variable in class xdc.services.spec.Attr
A_ConstVector - Static variable in class xdc.services.spec.Attr
A_CustomHeader - Static variable in class xdc.services.spec.Attr
A_DirectCall - Static variable in class xdc.services.spec.Attr
A_Encoded - Static variable in class xdc.services.spec.Attr
A_Facet - Static variable in class xdc.services.spec.Attr
A_Gated - Static variable in class xdc.services.spec.Attr
A_GlobalNames - Static variable in class xdc.services.spec.Attr
A_HeaderName - Static variable in class xdc.services.spec.Attr
A_InstanceFinalize - Static variable in class xdc.services.spec.Attr
A_InstanceInitError - Static variable in class xdc.services.spec.Attr
A_InstanceInitStatic - Static variable in class xdc.services.spec.Attr
A_Macro - Static variable in class xdc.services.spec.Attr
A_ModuleStartup - Static variable in class xdc.services.spec.Attr
A_NoProxyCreate - Static variable in class xdc.services.spec.Attr
A_NoRuntime - Static variable in class xdc.services.spec.Attr
A_Opaque - Static variable in class xdc.services.spec.Attr
A_Prefix - Static variable in class xdc.services.spec.Attr
A_Proxy - Static variable in class xdc.services.spec.Attr
A_System - Static variable in class xdc.services.spec.Attr
A_TargetHeader - Static variable in class xdc.services.spec.Attr
A_Template - Static variable in class xdc.services.spec.Attr
A_Transient - Static variable in class xdc.services.spec.Attr
A_XmlDtd - Static variable in class xdc.services.spec.Attr
absArgDecl() - Method in class xdc.services.spec.GrammarParser
absArgDeclListOpt() - Method in class xdc.services.spec.GrammarParser
absDeclarator() - Method in class xdc.services.spec.GrammarParser
absDeclarator_tail(Type) - Method in class xdc.services.spec.GrammarParser
addBeforeSect(String, String) - Method in class xdc.services.spec.XDoc
addChild(String, String) - Method in class xdc.services.spec.XDoc
addNums(Integer...) - Method in class xdc.services.spec.Test
AMP - Static variable in class xdc.services.spec.GrammarLexer
AMP - Static variable in class xdc.services.spec.GrammarParser
AMPAMP - Static variable in class xdc.services.spec.GrammarLexer
AMPAMP - Static variable in class xdc.services.spec.GrammarParser
annotation() - Method in class xdc.services.spec.GrammarParser
annotAttr(ArrayList<Attr>) - Method in class xdc.services.spec.GrammarParser
ARG - Static variable in class xdc.services.spec.Type
argDecl() - Method in class xdc.services.spec.GrammarParser
argDeclListOpt() - Method in class xdc.services.spec.GrammarParser
Atom - Class in xdc.services.spec
The class that represents a token in a specification file.
Attr - Class in xdc.services.spec
ATTR - Static variable in class xdc.services.spec.GrammarLexer
ATTR - Static variable in class xdc.services.spec.GrammarParser
attrBool(String) - Method in class xdc.services.spec.Node
attrInt(String) - Method in class xdc.services.spec.Node
attrString(String) - Method in class xdc.services.spec.Node

B

BANG - Static variable in class xdc.services.spec.GrammarLexer
BANG - Static variable in class xdc.services.spec.GrammarParser
BANGEQ - Static variable in class xdc.services.spec.GrammarLexer
BANGEQ - Static variable in class xdc.services.spec.GrammarParser
BAR - Static variable in class xdc.services.spec.GrammarLexer
BAR - Static variable in class xdc.services.spec.GrammarParser
BARBAR - Static variable in class xdc.services.spec.GrammarLexer
BARBAR - Static variable in class xdc.services.spec.GrammarParser
basicDeclarator() - Method in class xdc.services.spec.GrammarParser
BrowserSession - Class in xdc.services.spec
BrowserSession() - Constructor for class xdc.services.spec.BrowserSession
Create a session to browse the current package path.
BrowserSession(Env) - Constructor for class xdc.services.spec.BrowserSession
Create a new session with a given environment
BrowserSession(Env, Cache) - Constructor for class xdc.services.spec.BrowserSession
BrowserSession(String[]) - Constructor for class xdc.services.spec.BrowserSession
Create a new session with a given package path
BrowserSession(String[], Env) - Constructor for class xdc.services.spec.BrowserSession
Create a new session with a given package path and environment

C

Cache - Class in xdc.services.spec
Cache of spec objects for a session.
Cache() - Constructor for class xdc.services.spec.Cache
CAR - Static variable in class xdc.services.spec.GrammarLexer
CAR - Static variable in class xdc.services.spec.GrammarParser
CHAR - Static variable in class xdc.services.spec.GrammarLexer
CHAR - Static variable in class xdc.services.spec.GrammarParser
CHAR - Static variable in class xdc.services.spec.Type
COLON - Static variable in class xdc.services.spec.GrammarLexer
COLON - Static variable in class xdc.services.spec.GrammarParser
COMMA - Static variable in class xdc.services.spec.GrammarLexer
COMMA - Static variable in class xdc.services.spec.GrammarParser
compareTo(Node) - Method in class xdc.services.spec.Node
compile(String) - Method in class xdc.services.spec.ParserSession
configDecl() - Method in class xdc.services.spec.GrammarParser
constDecl() - Method in class xdc.services.spec.GrammarParser
contains(Node) - Method in class xdc.services.spec.Cache
Poll whether the cache contains an object.
contains(String) - Method in class xdc.services.spec.Cache
Poll whether the cache contains the named object.
copy() - Method in class xdc.services.spec.XDoc

D

D - Static variable in class xdc.services.spec.GrammarLexer
D - Static variable in class xdc.services.spec.GrammarParser
Decl - Class in xdc.services.spec
Decl() - Constructor for class xdc.services.spec.Decl
decl(String) - Method in class xdc.services.spec.Unit
Deprecated.
replaced by Unit.getDecl(String)
Decl.Annexable - Interface in xdc.services.spec
Decl.Arg - Class in xdc.services.spec
Decl.AuxDef - Interface in xdc.services.spec
Decl.Config - Class in xdc.services.spec
Decl.Const - Class in xdc.services.spec
Decl.Enum - Class in xdc.services.spec
Decl.EnumVal - Class in xdc.services.spec
Decl.Extern - Class in xdc.services.spec
Decl.Field - Class in xdc.services.spec
Decl.Fxn - Class in xdc.services.spec
Decl.IsType - Interface in xdc.services.spec
Decl.LocalUnit - Interface in xdc.services.spec
Decl.OverridableDef - Interface in xdc.services.spec
Decl.Proxy - Class in xdc.services.spec
Decl.Signature - Interface in xdc.services.spec
Decl.Signature.ObjKind - Enum in xdc.services.spec
Decl.Sizeable - Interface in xdc.services.spec
Decl.Struct - Class in xdc.services.spec
Decl.Typedef - Class in xdc.services.spec
declarator() - Method in class xdc.services.spec.GrammarParser
declarator_tail(Type) - Method in class xdc.services.spec.GrammarParser
declarator_term() - Method in class xdc.services.spec.GrammarParser
declQuals() - Method in class xdc.services.spec.GrammarParser
delegatesTo() - Method in class xdc.services.spec.Unit
dfa10 - Variable in class xdc.services.spec.GrammarParser
dfa11 - Variable in class xdc.services.spec.GrammarParser
dfa12 - Variable in class xdc.services.spec.GrammarParser
dfa13 - Variable in class xdc.services.spec.GrammarParser
dfa14 - Variable in class xdc.services.spec.GrammarParser
dfa20 - Variable in class xdc.services.spec.GrammarParser
dfa21 - Variable in class xdc.services.spec.GrammarParser
dfa22 - Variable in class xdc.services.spec.GrammarParser
dfa24 - Variable in class xdc.services.spec.GrammarParser
dfa27 - Variable in class xdc.services.spec.GrammarParser
dfa28 - Variable in class xdc.services.spec.GrammarParser
dfa3 - Variable in class xdc.services.spec.GrammarParser
dfa30 - Variable in class xdc.services.spec.GrammarParser
dfa35 - Variable in class xdc.services.spec.GrammarLexer
dfa36 - Variable in class xdc.services.spec.GrammarLexer
dfa36 - Variable in class xdc.services.spec.GrammarParser
dfa37 - Variable in class xdc.services.spec.GrammarParser
dfa39 - Variable in class xdc.services.spec.GrammarParser
dfa41 - Variable in class xdc.services.spec.GrammarParser
dfa42 - Variable in class xdc.services.spec.GrammarParser
dfa43 - Variable in class xdc.services.spec.GrammarParser
dfa44 - Variable in class xdc.services.spec.GrammarParser
dfa45 - Variable in class xdc.services.spec.GrammarParser
dfa47 - Variable in class xdc.services.spec.GrammarParser
dfa48 - Variable in class xdc.services.spec.GrammarParser
dfa51 - Variable in class xdc.services.spec.GrammarParser
dfa53 - Variable in class xdc.services.spec.GrammarParser
dfa54 - Variable in class xdc.services.spec.GrammarParser
dfa55 - Variable in class xdc.services.spec.GrammarParser
dfa56 - Variable in class xdc.services.spec.GrammarParser
dfa57 - Variable in class xdc.services.spec.GrammarParser
dfa6 - Variable in class xdc.services.spec.GrammarParser
dfa61 - Variable in class xdc.services.spec.GrammarParser
dfa62 - Variable in class xdc.services.spec.GrammarParser
dfa77 - Variable in class xdc.services.spec.GrammarParser
dfa78 - Variable in class xdc.services.spec.GrammarParser
dfa79 - Variable in class xdc.services.spec.GrammarParser
dfa80 - Variable in class xdc.services.spec.GrammarParser
dfa82 - Variable in class xdc.services.spec.GrammarParser
dfa83 - Variable in class xdc.services.spec.GrammarParser
dfa84 - Variable in class xdc.services.spec.GrammarParser
dfa85 - Variable in class xdc.services.spec.GrammarParser
dfa9 - Variable in class xdc.services.spec.GrammarParser
dfa95 - Variable in class xdc.services.spec.GrammarParser
dfa96 - Variable in class xdc.services.spec.GrammarParser
dfa98 - Variable in class xdc.services.spec.GrammarParser
DIV - Static variable in class xdc.services.spec.GrammarLexer
DIV - Static variable in class xdc.services.spec.GrammarParser
DOC_BLK - Static variable in class xdc.services.spec.GrammarLexer
DOC_BLK - Static variable in class xdc.services.spec.GrammarParser
doc_block(ArrayList<DocComment>) - Method in class xdc.services.spec.GrammarParser
DOC_INL - Static variable in class xdc.services.spec.GrammarLexer
DOC_INL - Static variable in class xdc.services.spec.GrammarParser
doc_inline(ArrayList<DocComment>) - Method in class xdc.services.spec.GrammarParser
DOC_PRE - Static variable in class xdc.services.spec.GrammarLexer
DOC_PRE - Static variable in class xdc.services.spec.GrammarParser
DOC_SUF - Static variable in class xdc.services.spec.GrammarLexer
DOC_SUF - Static variable in class xdc.services.spec.GrammarParser
DocComment - Class in xdc.services.spec
DOT - Static variable in class xdc.services.spec.GrammarLexer
DOT - Static variable in class xdc.services.spec.GrammarParser
DOUBLE - Static variable in class xdc.services.spec.Type

E

E - Static variable in class xdc.services.spec.GrammarLexer
E - Static variable in class xdc.services.spec.GrammarParser
eBOP() - Method in class xdc.services.spec.GrammarParser
ELIPSIS - Static variable in class xdc.services.spec.GrammarLexer
ELIPSIS - Static variable in class xdc.services.spec.GrammarParser
enumDecl() - Method in class xdc.services.spec.GrammarParser
enumRep() - Method in class xdc.services.spec.GrammarParser
enumVal() - Method in class xdc.services.spec.GrammarParser
enumValList(ArrayList<Decl.EnumVal>) - Method in class xdc.services.spec.GrammarParser
EOF - Static variable in class xdc.services.spec.GrammarLexer
EOF - Static variable in class xdc.services.spec.GrammarParser
EQ - Static variable in class xdc.services.spec.GrammarLexer
EQ - Static variable in class xdc.services.spec.GrammarParser
EQEQ - Static variable in class xdc.services.spec.GrammarLexer
EQEQ - Static variable in class xdc.services.spec.GrammarParser
eUOP() - Method in class xdc.services.spec.GrammarParser
Expr - Class in xdc.services.spec
Expr() - Constructor for class xdc.services.spec.Expr
expr() - Method in class xdc.services.spec.GrammarParser
Expr.Aggregate - Interface in xdc.services.spec
Expr.Array - Class in xdc.services.spec
Expr.Binary - Class in xdc.services.spec
Expr.Cond - Class in xdc.services.spec
Expr.Const - Class in xdc.services.spec
Expr.Creat - Class in xdc.services.spec
Expr.Hash - Class in xdc.services.spec
Expr.Paren - Class in xdc.services.spec
Expr.Term - Class in xdc.services.spec
Expr.Unary - Class in xdc.services.spec
exprBin() - Method in class xdc.services.spec.GrammarParser
exprCnd() - Method in class xdc.services.spec.GrammarParser
exprList() - Method in class xdc.services.spec.GrammarParser
exprProp(List<Atom>, List<Expr>) - Method in class xdc.services.spec.GrammarParser
exprTrm() - Method in class xdc.services.spec.GrammarParser
exprUry() - Method in class xdc.services.spec.GrammarParser
externDecl() - Method in class xdc.services.spec.GrammarParser

F

fieldDecl() - Method in class xdc.services.spec.GrammarParser
fieldDeclList(List<Decl.Field>) - Method in class xdc.services.spec.GrammarParser
findDecl(Unit, String) - Method in class xdc.services.spec.Session
findDecl(String) - Method in class xdc.services.spec.Session
findPkg(String) - Method in class xdc.services.spec.BrowserSession
findPkg(String) - Method in class xdc.services.spec.Session
findUnit(Pkg, String) - Method in class xdc.services.spec.Session
findUnit(String) - Method in class xdc.services.spec.Session
FLOAT - Static variable in class xdc.services.spec.Type
FOLLOW_100_in_typeSpecG6125 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_101_in_typeSpecG6170 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_102_in_typeSpecG6218 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_103_in_typeSpecG6265 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_104_in_typeSpecG6312 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_105_in_typeSpecG6358 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_106_in_typeSpecG6404 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_107_in_typeSpecG6449 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_108_in_typeSpecG6495 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_109_in_typeSpecG6540 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_110_in_typeSpecG6584 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_111_in_typeSpecG6630 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_112_in_typeSpecG6683 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_113_in_typeSpecG6699 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_114_in_typeSpecG6746 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_115_in_typeSpecG6793 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_116_in_typeSpecG6839 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_117_in_typeSpecG6884 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_118_in_typeSpecG6929 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_119_in_typeSpecG6974 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_120_in_typeSpecG7021 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_121_in_typeSpecG7069 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_122_in_typeSpecG7116 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_123_in_typeSpecG7162 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_124_in_typeSpecG7208 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_125_in_typeSpecG7254 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_126_in_typeSpecG7302 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_127_in_typeSpecG7349 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_128_in_typeSpecG7394 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_129_in_typeSpecG7438 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_130_in_typeSpecG7484 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_131_in_typeSpecG7529 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_132_in_typeSpecG7574 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_133_in_typeSpecG7634 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_134_in_typeSpecG7682 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_135_in_unitImp7806 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_136_in_unitImp7813 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_137_in_unitSpec8042 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_138_in_unitSpec8088 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_58_in_absDeclarator128 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_58_in_constDecl930 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_58_in_typeMods5063 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_59_in_configDecl855 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_60_in_configDecl869 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_61_in_declQuals983 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_62_in_declQuals998 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_63_in_declQuals1013 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_63_in_unitSpec7981 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_64_in_declarator_tail1245 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_64_in_typeSpecG7729 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_65_in_declarator_tail1262 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_66_in_enumDecl1517 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_67_in_exprTrm2199 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_68_in_exprTrm2227 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_69_in_exprTrm2255 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_70_in_exprTrm2283 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_71_in_externDecl3010 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_72_in_fxnHdr3273 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_73_in_methodDecl3727 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_74_in_pkgSpec4234 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_74_in_unitSpec7867 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_75_in_pkgReqList4345 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_76_in_pkgReqList4348 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_76_in_unitSpec8142 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_77_in_pkgUnit4447 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_77_in_unitSpec7996 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_78_in_pkgUnit4453 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_78_in_unitSpec8002 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_79_in_proxyDecl4637 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_80_in_proxyDecl4643 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_80_in_unitSpec8033 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_81_in_structDecl4805 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_81_in_structFieldDecl4901 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_82_in_structDecl4809 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_82_in_structFieldDecl4905 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_83_in_typeDecl5015 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_84_in_typeMods5074 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_85_in_typeMods5085 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_86_in_typeSpecG5237 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_87_in_typeSpecG5284 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_87_in_typeSpecG5333 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_88_in_typeSpecG5331 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_88_in_typeSpecG5415 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_88_in_typeSpecG5500 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_88_in_typeSpecG5543 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_88_in_typeSpecG5629 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_88_in_typeSpecG5709 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_89_in_typeSpecG5369 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_89_in_typeSpecG5417 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_90_in_typeSpecG5452 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_90_in_typeSpecG5545 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_91_in_typeSpecG5582 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_91_in_typeSpecG5631 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_91_in_typeSpecG5667 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_91_in_typeSpecG5669 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_91_in_typeSpecG5711 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_91_in_typeSpecG5713 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_91_in_typeSpecG5833 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_92_in_typeSpecG5742 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_93_in_typeSpecG5788 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_93_in_typeSpecG5835 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_94_in_typeSpecG5873 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_95_in_typeSpecG5918 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_96_in_typeSpecG5970 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_97_in_typeSpecG5986 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_98_in_typeSpecG6033 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_99_in_typeSpecG6079 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absArgDecl_in_absArgDeclListOpt425 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absArgDecl_in_absArgDeclListOpt434 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absArgDeclListOpt_in_absDeclarator_tail351 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absArgDeclListOpt_in_declarator_tail1329 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absDeclarator_in_absArgDecl476 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absDeclarator_in_absDeclarator134 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absDeclarator_in_absDeclarator164 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_absDeclarator_tail_in_absDeclarator193 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_AMP_in_eBOP2519 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_AMP_in_eUOP2883 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_AMPAMP_in_eBOP2537 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_annotation_in_instDeclSpec3405 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_annotation_in_internDeclSpec3669 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_annotation_in_modDeclSpec4088 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_annotAttr_in_annotation523 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_annotAttr_in_pkgSpec4201 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_annotAttr_in_unitSpec7958 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_argDecl_in_argDeclListOpt638 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_argDecl_in_argDeclListOpt647 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_argDeclListOpt_in_fxnDecl3182 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_ATTR_in_annotAttr566 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_BANG_in_eUOP2901 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_BANGEQ_in_eBOP2555 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_BAR_in_eBOP2573 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_BARBAR_in_eBOP2591 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_basicDeclarator_in_basicDeclarator778 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_basicDeclarator_in_fxnHdr3245 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_CAR_in_eBOP2609 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_CHAR_in_exprTrm2339 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COLON_in_enumRep1578 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COLON_in_exprCnd2016 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COLON_in_exprProp1963 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COLON_in_unitSpec8090 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COLON_in_unitSpec8144 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_absArgDeclListOpt430 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_absDeclarator_tail355 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_argDeclListOpt643 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_declarator_tail1333 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_enumValList1645 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_expr1855 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_expr1863 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_expr1905 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_expr1916 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_exprList2467 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_fxnDecl3186 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_metArgDeclListOpt3814 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_pkgReqList4358 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_pkgUnit4471 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_COMMA_in_pkgVers4585 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_configDecl_in_instDecl3327 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_configDecl_in_internDecl3465 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_configDecl_in_modDecl3884 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_constDecl_in_internDecl3485 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_constDecl_in_modDecl3904 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_argDecl689 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_basicDeclarator808 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_configDecl875 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_constDecl936 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_declarator_term1164 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_externDecl3016 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_fieldDecl3118 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_in_typeDecl5021 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_tail_in_declarator1060 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_tail_in_declarator_tail1298 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_tail_in_declarator_tail1346 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_term_in_declarator1056 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declarator_term_in_declarator_term1106 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declQuals_in_instDeclSpec3409 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declQuals_in_internDeclSpec3673 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_declQuals_in_modDeclSpec4092 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_DIV_in_eBOP2627 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_DOC_BLK_in_one_doc_block1439 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_block_in_enumValList1717 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_block_in_instDeclSpec3399 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_block_in_internDeclSpec3663 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_block_in_modDeclSpec4082 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_block_in_pkgSpec4303 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_block_in_unitSpec8226 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_DOC_INL_in_doc_inline1479 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_inline_in_enumValList1661 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_inline_in_fieldDeclList3074 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_inline_in_instDeclSpec3417 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_inline_in_internDeclSpec3681 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_doc_inline_in_modDeclSpec4100 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_eBOP_in_exprBin2067 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_ELIPSIS_in_absDeclarator_tail357 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_ELIPSIS_in_declarator_tail1335 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_ELIPSIS_in_fxnDecl3188 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_enumDecl_in_internDecl3505 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_enumDecl_in_modDecl3924 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_enumRep_in_enumDecl1526 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_enumVal_in_enumValList1610 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_enumVal_in_enumValList1680 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_enumValList_in_enumDecl1532 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_EQ_in_argDecl692 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_EQ_in_configDecl878 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_EQ_in_constDecl939 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_EQ_in_eBOP2645 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_EQ_in_enumVal1768 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_EQ_in_externDecl3019 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_EQEQ_in_eBOP2663 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_eUOP_in_exprUry2116 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_absDeclarator247 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_absDeclarator_tail317 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_annotAttr573 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_argDecl696 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_configDecl882 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_constDecl943 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_declarator_tail1281 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_enumVal1772 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_expr1898 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_expr1909 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_exprList2462 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_exprList2471 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_exprProp1967 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_expr_in_exprTrm2405 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprBin_in_exprBin2071 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprBin_in_exprCnd2005 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprCnd_in_expr1820 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprCnd_in_exprCnd2014 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprCnd_in_exprCnd2020 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprList_in_exprTrm2169 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprProp_in_expr1849 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprProp_in_expr1857 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprTrm_in_exprUry2122 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_exprUry_in_exprBin2060 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_externDecl_in_internDecl3525 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_externDecl_in_modDecl3944 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_fieldDecl_in_fieldDeclList3070 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_fieldDeclList_in_structDecl4835 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_fieldDeclList_in_structFieldDecl4916 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_fxnDecl_in_instDecl3344 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_fxnDecl_in_internDecl3545 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_fxnDecl_in_modDecl3964 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_fxnHdr_in_fxnDecl3166 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_GT_in_eBOP2681 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_GTEQ_in_eBOP2699 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_GTGT_in_eBOP2717 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_basicDeclarator744 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_declarator_term1134 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_enumDecl1521 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_enumVal1765 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_exprProp1959 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_externDecl3023 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_metArg3849 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_methodDecl3731 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_pkgUnitName4512 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_proxyDecl4641 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_qualName4701 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_qualNameStar4751 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_structDecl4817 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_unitImp7817 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_IDENT_in_unitSpec8017 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_instDecl_in_instDeclSpec3413 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_instDeclSpec_in_unitSpec8116 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_internDecl_in_internDeclSpec3677 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_internDeclSpec_in_unitSpec8180 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LBRK_in_absDeclarator242 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LBRK_in_absDeclarator_tail312 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LBRK_in_declarator_tail1241 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LBRK_in_expr1893 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LBRK_in_pkgVers4550 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LCUR_in_enumDecl1530 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LCUR_in_expr1846 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LCUR_in_pkgSpec4258 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LCUR_in_structDecl4830 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LCUR_in_structFieldDecl4911 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LCUR_in_unitSpec8058 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_absDeclarator160 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_absDeclarator_tail347 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_annotAttr569 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_basicDeclarator804 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_declarator_tail1325 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_declarator_term1160 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_exprList2457 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_exprTrm2400 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_fxnDecl3178 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LPAR_in_methodDecl3734 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LT_in_eBOP2735 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LTEQ_in_eBOP2753 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_LTLT_in_eBOP2771 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_metArg_in_metArgDeclListOpt3809 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_metArg_in_metArgDeclListOpt3818 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_metArgDeclListOpt_in_methodDecl3738 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_methodDecl_in_instDecl3361 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_methodDecl_in_internDecl3565 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_methodDecl_in_modDecl3984 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_MIN_in_eBOP2789 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_MIN_in_eUOP2919 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_modDecl_in_modDeclSpec4096 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_modDeclSpec_in_unitSpec8073 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_NUM_in_exprTrm2311 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_NUM_in_pkgVers4567 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_NUM_in_pkgVers4589 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_one_doc_block_in_doc_block1396 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_one_doc_block_in_pkgSpec4180 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_one_doc_block_in_unitSpec7937 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_PATH_in_qualName4709 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_PATH_in_qualNameStar4759 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_PATHSTAR_in_qualNameStar4767 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_PCT_in_eBOP2807 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgReq_in_pkgReqList4354 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgReq_in_pkgReqList4360 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgReqList_in_pkgSpec4159 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgUnit_in_pkgSpec4273 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgUnitName_in_pkgUnit4467 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgUnitName_in_pkgUnit4473 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgVers_in_pkgReq4401 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_pkgVers_in_pkgSpec4246 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_PLUS_in_eBOP2825 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_PLUS_in_eUOP2937 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_proxyDecl_in_internDecl3585 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_proxyDecl_in_modDecl4004 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_qualName_in_exprTrm2164 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_qualName_in_pkgReq4396 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_qualName_in_pkgSpec4239 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_qualName_in_superInt4971 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_qualName_in_typeSpecG5201 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_qualName_in_unitSpec7871 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_qualNameStar_in_unitImp7810 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_QUEST_in_exprCnd2010 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RBRK_in_absDeclarator251 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RBRK_in_absDeclarator_tail321 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RBRK_in_declarator_tail1294 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RBRK_in_expr1920 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RBRK_in_pkgVers4603 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RCUR_in_enumDecl1535 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RCUR_in_expr1867 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RCUR_in_pkgSpec4286 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RCUR_in_structDecl4840 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RCUR_in_structFieldDecl4921 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RCUR_in_unitSpec8209 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_absDeclarator166 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_absDeclarator_tail364 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_annotAttr575 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_basicDeclarator810 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_declarator_tail1342 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_declarator_term1166 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_exprList2479 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_exprTrm2409 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_fxnDecl3195 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_RPAR_in_methodDecl3740 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_configDecl886 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_constDecl947 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_enumDecl1538 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_externDecl3029 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_fieldDecl3120 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_fxnDecl3197 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_methodDecl3744 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_pkgReqList4365 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_pkgSpec4289 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_pkgUnit4478 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_proxyDecl4649 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_structDecl4843 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_structDecl4851 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_typeDecl5023 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_unitImp7823 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_unitSpec7874 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_SEMI_in_unitSpec8212 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_STAR_in_absDeclarator125 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_STAR_in_basicDeclarator770 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_STAR_in_declarator_term1098 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_STAR_in_eBOP2843 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_STAR_in_eUOP2955 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_STRING_in_exprTrm2367 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_structDecl_in_internDecl3605 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_structDecl_in_modDecl4024 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_structFieldDecl_in_typeSpecF5153 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_superInt_in_proxyDecl4647 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_superInt_in_unitSpec8037 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_superInt_in_unitSpec8046 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_TILDE_in_eUOP2973 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeDecl_in_internDecl3625 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeDecl_in_modDecl4044 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeMods_in_basicDeclarator774 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeMods_in_declarator_term1102 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeMods_in_typeSpecC5125 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpec_in_configDecl871 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpec_in_constDecl932 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpec_in_enumRep1580 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpec_in_fxnHdr3241 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecC_in_absArgDecl472 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecC_in_argDecl685 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecC_in_externDecl3012 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecC_in_typeDecl5017 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecC_in_typeSpecF5144 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecF_in_fieldDecl3114 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecG_in_typeSpec5102 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_typeSpecG_in_typeSpecC5127 - Static variable in class xdc.services.spec.GrammarParser
FOLLOW_unitImp_in_unitSpec7907 - Static variable in class xdc.services.spec.GrammarParser
FXN - Static variable in class xdc.services.spec.Type
fxnDecl() - Method in class xdc.services.spec.GrammarParser
fxnHdr() - Method in class xdc.services.spec.GrammarParser

G

get(String) - Method in class xdc.services.spec.Cache
Get the cached copy of an object.
getAllFxns() - Method in class xdc.services.spec.Unit
getArg() - Method in class xdc.services.spec.DocComment
getArgs() - Method in class xdc.services.spec.Decl.Fxn
getArgs() - Method in class xdc.services.spec.Expr.Creat
getArgs() - Method in class xdc.services.spec.Type.Fxn
getAtom() - Method in class xdc.services.spec.Node
getAttrMap() - Method in class xdc.services.spec.Node
getBase() - Method in class xdc.services.spec.Type.Array
getBase() - Method in class xdc.services.spec.Type.Fxn
getBase() - Method in class xdc.services.spec.Type.Paren
getBase() - Method in class xdc.services.spec.Type.Ptr
getBaseDir() - Method in class xdc.services.spec.Pkg
getBody() - Method in class xdc.services.spec.DocComment
getBody() - Method in class xdc.services.spec.Expr.Paren
getChild() - Method in class xdc.services.spec.XDoc
getChildren() - Method in class xdc.services.spec.Decl.Enum
getChildren() - Method in class xdc.services.spec.Decl.Fxn
getChildren() - Method in class xdc.services.spec.Decl
getChildren() - Method in class xdc.services.spec.Decl.Struct
getChildren() - Method in class xdc.services.spec.Node
getChildren() - Method in class xdc.services.spec.Pkg
getChildren() - Method in class xdc.services.spec.Unit
getColor() - Method in class xdc.services.spec.Test
getCond() - Method in class xdc.services.spec.Expr.Cond
getConfigs() - Method in class xdc.services.spec.Unit
getConstElem() - Method in class xdc.services.spec.Type.Array
getCreator() - Method in class xdc.services.spec.Unit
Get the instance creation function for this unit.
getDecl(String) - Method in class xdc.services.spec.Unit
Get the named declaration from this unit.
getDeclName() - Method in class xdc.services.spec.Persist.Fixup
getDecls() - Method in class xdc.services.spec.Unit
Get all the declarations defined for this unit.
getDetails() - Method in class xdc.services.spec.XDoc
getDim() - Method in class xdc.services.spec.Type.Array
getDocs() - Method in class xdc.services.spec.Node
getElems() - Method in class xdc.services.spec.Expr.Array
getEmbeds() - Method in class xdc.services.spec.Unit
getEnv() - Method in class xdc.services.spec.Session
getFields() - Method in class xdc.services.spec.Decl.Struct
getFile() - Method in class xdc.services.spec.Atom
getFxns() - Method in class xdc.services.spec.Unit
getGrammarFileName() - Method in class xdc.services.spec.GrammarLexer
getGrammarFileName() - Method in class xdc.services.spec.GrammarParser
getHeaders() - Method in class xdc.services.spec.XDoc
getId() - Method in class xdc.services.spec.Ref
getId() - Method in class xdc.services.spec.Type.Declarator
getIds() - Method in class xdc.services.spec.Expr.Hash
getInherits() - Method in class xdc.services.spec.Decl.Proxy
getInherits() - Method in class xdc.services.spec.Unit
getInit() - Method in class xdc.services.spec.Decl.Arg
getInit() - Method in class xdc.services.spec.Decl.Config
getInit() - Method in class xdc.services.spec.Decl.Const
getInit() - Method in class xdc.services.spec.Decl.EnumVal
getInterNames() - Method in class xdc.services.spec.Pkg
getInternFxns() - Method in class xdc.services.spec.Unit
getKey() - Method in class xdc.services.spec.Pkg
getKind() - Method in class xdc.services.spec.Type.Array
getLeft() - Method in class xdc.services.spec.Expr.Binary
getLeft() - Method in class xdc.services.spec.Expr.Cond
getLine() - Method in class xdc.services.spec.Atom
getLoadDocs() - Method in class xdc.services.spec.BrowserSession
Return whether documentation is available in this session.
getLocalSpecs() - Method in class xdc.services.spec.Pkg
getMinArgc() - Method in class xdc.services.spec.Decl.Fxn
getMiscSrcs() - Method in class xdc.services.spec.Pkg
getMod() - Method in class xdc.services.spec.Expr.Creat
getMode() - Method in class xdc.services.spec.DocComment
getModNames() - Method in class xdc.services.spec.Pkg
getMods() - Method in class xdc.services.spec.Type.Ptr
getMods() - Method in class xdc.services.spec.Type.Spec
getName() - Method in class xdc.services.spec.Attr
getName() - Method in class xdc.services.spec.Node
getNode() - Method in class xdc.services.spec.Ref
getOp() - Method in class xdc.services.spec.Expr.Binary
getOp() - Method in class xdc.services.spec.Expr.Unary
getOthers() - Method in class xdc.services.spec.XDoc
getOtherSpecs() - Method in class xdc.services.spec.Pkg
getParent() - Method in class xdc.services.spec.Node
getParId() - Method in class xdc.services.spec.DocComment
getPkgName() - Method in class xdc.services.spec.Node
getPkgName() - Method in class xdc.services.spec.Persist.Fixup
getPkgName() - Method in class xdc.services.spec.Pkg
getPkgName() - Method in class xdc.services.spec.Unit
getProviderId() - Method in class xdc.services.spec.Pkg
getProxies() - Method in class xdc.services.spec.Unit
getProxy() - Method in class xdc.services.spec.Ref
getQualName() - Method in class xdc.services.spec.Decl
getQualName() - Method in class xdc.services.spec.Node
getQualName() - Method in class xdc.services.spec.Persist.Fixup
getQualName() - Method in class xdc.services.spec.Pkg
getQualName() - Method in class xdc.services.spec.Unit
getRef() - Method in class xdc.services.spec.Expr.Term
getRef() - Method in class xdc.services.spec.Type.Spec
getReleaseVersion() - Method in class xdc.services.spec.Pkg
getRep() - Method in class xdc.services.spec.Decl.Enum
getRepository() - Method in class xdc.services.spec.Pkg
getRequires() - Method in class xdc.services.spec.Pkg
getRight() - Method in class xdc.services.spec.Expr.Binary
getRight() - Method in class xdc.services.spec.Expr.Cond
getRight() - Method in class xdc.services.spec.Expr.Unary
getScope() - Method in class xdc.services.spec.Ref
getSession() - Method in class xdc.services.spec.Node
getSizes() - Method in class xdc.services.spec.Decl.Struct
getStd() - Method in class xdc.services.spec.Type.Spec
getSummary() - Method in class xdc.services.spec.Node
getSummary() - Method in class xdc.services.spec.XDoc
getSuper() - Method in class xdc.services.spec.Unit
getTag() - Method in class xdc.services.spec.DocComment
getTerm() - Method in class xdc.services.spec.Expr.Creat
getTerm() - Method in class xdc.services.spec.Expr
getTerm() - Method in class xdc.services.spec.Expr.Paren
getTerm() - Method in class xdc.services.spec.Expr.Term
getText() - Method in class xdc.services.spec.Atom
getTokenNames() - Method in class xdc.services.spec.GrammarParser
getTrailers() - Method in class xdc.services.spec.XDoc
getType() - Method in class xdc.services.spec.Decl.Arg
getType() - Method in class xdc.services.spec.Decl.Config
getType() - Method in class xdc.services.spec.Decl.Const
getType() - Method in class xdc.services.spec.Decl.Extern
getType() - Method in class xdc.services.spec.Decl.Field
getType() - Method in class xdc.services.spec.Decl.Fxn
getType() - Method in interface xdc.services.spec.Decl.Signature
getType() - Method in class xdc.services.spec.Decl.Typedef
getTypeCode() - Method in class xdc.services.spec.Decl.Arg
getTypeCode() - Method in class xdc.services.spec.Decl.Config
getTypeCode() - Method in class xdc.services.spec.Decl.Const
getTypeCode() - Method in class xdc.services.spec.Decl.Extern
getTypeCode() - Method in class xdc.services.spec.Decl.Field
getTypeCode() - Method in class xdc.services.spec.Decl.Fxn
getTypeCode() - Method in interface xdc.services.spec.Decl.Signature
getTypeCode() - Method in class xdc.services.spec.Decl.Typedef
getTypeSig() - Method in class xdc.services.spec.Decl.Arg
getTypeSig() - Method in class xdc.services.spec.Decl.Config
getTypeSig() - Method in class xdc.services.spec.Decl.Const
getTypeSig() - Method in class xdc.services.spec.Decl.Extern
getTypeSig() - Method in class xdc.services.spec.Decl.Field
getTypeSig() - Method in class xdc.services.spec.Decl.Fxn
getTypeSig() - Method in interface xdc.services.spec.Decl.Signature
getTypeSig() - Method in class xdc.services.spec.Decl.Typedef
getUnit() - Method in interface xdc.services.spec.Decl.LocalUnit
getUnit() - Method in class xdc.services.spec.Decl.Proxy
getUnit() - Method in class xdc.services.spec.Sup
getUnits() - Method in class xdc.services.spec.Pkg
getUses() - Method in class xdc.services.spec.Unit
getVal() - Method in class xdc.services.spec.Attr
getVal() - Method in class xdc.services.spec.Expr.Const
getVal() - Method in class xdc.services.spec.Expr.Term
getVals() - Method in class xdc.services.spec.Decl.Enum
getVals() - Method in class xdc.services.spec.Expr.Hash
getValue() - Method in class xdc.services.spec.Decl.Extern
getVec() - Method in class xdc.services.spec.Test
getVers() - Method in class xdc.services.spec.BrowserSession
This function is a replacement for simply reading cmd.Builder.GREEN_VERS.
getVers() - Method in class xdc.services.spec.Session
getVersion() - Method in class xdc.services.spec.Pkg
getXmlTag() - Method in class xdc.services.spec.Decl
getXmlTag() - Method in class xdc.services.spec.Decl.Struct
getXmlTag() - Method in class xdc.services.spec.Node
getXmlTag() - Method in class xdc.services.spec.Pkg
getXmlTag() - Method in class xdc.services.spec.Unit
GrammarLexer - Class in xdc.services.spec
GrammarLexer() - Constructor for class xdc.services.spec.GrammarLexer
GrammarLexer(CharStream) - Constructor for class xdc.services.spec.GrammarLexer
GrammarLexer(CharStream, RecognizerSharedState) - Constructor for class xdc.services.spec.GrammarLexer
GrammarParser - Class in xdc.services.spec
GrammarParser(TokenStream) - Constructor for class xdc.services.spec.GrammarParser
GrammarParser(TokenStream, RecognizerSharedState) - Constructor for class xdc.services.spec.GrammarParser
GT - Static variable in class xdc.services.spec.GrammarLexer
GT - Static variable in class xdc.services.spec.GrammarParser
GTEQ - Static variable in class xdc.services.spec.GrammarLexer
GTEQ - Static variable in class xdc.services.spec.GrammarParser
GTGT - Static variable in class xdc.services.spec.GrammarLexer
GTGT - Static variable in class xdc.services.spec.GrammarParser

H

H - Static variable in class xdc.services.spec.GrammarLexer
H - Static variable in class xdc.services.spec.GrammarParser
hasAttr(String) - Method in class xdc.services.spec.Node
hasCreateArgs() - Method in class xdc.services.spec.Unit
hasCustHdr() - Method in class xdc.services.spec.Unit
hasInstObj() - Method in class xdc.services.spec.Unit

I

ID - Static variable in class xdc.services.spec.GrammarLexer
ID - Static variable in class xdc.services.spec.GrammarParser
IDENT - Static variable in class xdc.services.spec.GrammarLexer
IDENT - Static variable in class xdc.services.spec.GrammarParser
Import - Class in xdc.services.spec
inherit(XDoc) - Method in class xdc.services.spec.XDoc
instDecl() - Method in class xdc.services.spec.GrammarParser
instDeclSpec() - Method in class xdc.services.spec.GrammarParser
INT - Static variable in class xdc.services.spec.Type
INT16 - Static variable in class xdc.services.spec.Type
INT32 - Static variable in class xdc.services.spec.Type
INT40 - Static variable in class xdc.services.spec.Type
INT64 - Static variable in class xdc.services.spec.Type
INT8 - Static variable in class xdc.services.spec.Type
internDecl() - Method in class xdc.services.spec.GrammarParser
internDeclSpec() - Method in class xdc.services.spec.GrammarParser
isAnon() - Method in class xdc.services.spec.Decl.Struct
isC() - Method in class xdc.services.spec.Type.Array
isCurrentPkg(Pkg) - Method in class xdc.services.spec.BrowserSession
isCurrentPkg(String, String) - Method in class xdc.services.spec.BrowserSession
isEmpty() - Method in interface xdc.services.spec.Expr.Aggregate
isEmpty() - Method in class xdc.services.spec.Expr.Array
isEmpty() - Method in class xdc.services.spec.Expr.Hash
isExternal() - Method in class xdc.services.spec.Node
isFinal() - Method in class xdc.services.spec.Node
isForwarding() - Method in class xdc.services.spec.Unit
isGlobal() - Method in class xdc.services.spec.Ref
isHeir() - Method in class xdc.services.spec.Unit
isInst() - Method in class xdc.services.spec.Node
isInter() - Method in class xdc.services.spec.Node
isInternal() - Method in class xdc.services.spec.Node
isLoggable() - Method in class xdc.services.spec.Decl.Fxn
isMap() - Method in class xdc.services.spec.Type.Array
isMeta() - Method in class xdc.services.spec.Node
isMod() - Method in class xdc.services.spec.Node
isNodoc() - Method in class xdc.services.spec.Node
isNodoc() - Method in class xdc.services.spec.XDoc
isOver() - Method in class xdc.services.spec.Node
isParsed(List<DocComment>) - Static method in class xdc.services.spec.DocComment
Identify whether the given list of comments has already been parsed.
isPkg() - Method in class xdc.services.spec.Persist.Fixup
isPkgDir(String) - Method in class xdc.services.spec.BrowserSession
Check whether the named directory contains a built package.
isProxy() - Method in class xdc.services.spec.Unit
isReadonly() - Method in class xdc.services.spec.Node
isSized() - Method in class xdc.services.spec.Unit
isStatic() - Method in class xdc.services.spec.Node
isSys() - Method in class xdc.services.spec.Node
isUnion() - Method in class xdc.services.spec.Decl.Struct
isUns() - Method in class xdc.services.spec.Type.Spec
isVarg() - Method in class xdc.services.spec.Decl.Fxn
isVarg() - Method in class xdc.services.spec.Type.Fxn
isVec() - Method in class xdc.services.spec.Type.Array

L

LBRK - Static variable in class xdc.services.spec.GrammarLexer
LBRK - Static variable in class xdc.services.spec.GrammarParser
LCUR - Static variable in class xdc.services.spec.GrammarLexer
LCUR - Static variable in class xdc.services.spec.GrammarParser
loadPkg(String, String) - Method in class xdc.services.spec.BrowserSession
loadUnit(String) - Method in class xdc.services.spec.BrowserSession
Load the named unit's spec object by searching the package path.
LONG - Static variable in class xdc.services.spec.Type
LONGDOUBLE - Static variable in class xdc.services.spec.Type
LONGLONG - Static variable in class xdc.services.spec.Type
LPAR - Static variable in class xdc.services.spec.GrammarLexer
LPAR - Static variable in class xdc.services.spec.GrammarParser
LT - Static variable in class xdc.services.spec.GrammarLexer
LT - Static variable in class xdc.services.spec.GrammarParser
LTEQ - Static variable in class xdc.services.spec.GrammarLexer
LTEQ - Static variable in class xdc.services.spec.GrammarParser
LTLT - Static variable in class xdc.services.spec.GrammarLexer
LTLT - Static variable in class xdc.services.spec.GrammarParser
LU - Static variable in class xdc.services.spec.GrammarLexer
LU - Static variable in class xdc.services.spec.GrammarParser

M

makeXDoc() - Method in class xdc.services.spec.Node
mAMP() - Method in class xdc.services.spec.GrammarLexer
mAMPAMP() - Method in class xdc.services.spec.GrammarLexer
mATTR() - Method in class xdc.services.spec.GrammarLexer
mBANG() - Method in class xdc.services.spec.GrammarLexer
mBANGEQ() - Method in class xdc.services.spec.GrammarLexer
mBAR() - Method in class xdc.services.spec.GrammarLexer
mBARBAR() - Method in class xdc.services.spec.GrammarLexer
mCAR() - Method in class xdc.services.spec.GrammarLexer
mCHAR() - Method in class xdc.services.spec.GrammarLexer
mCOLON() - Method in class xdc.services.spec.GrammarLexer
mCOMMA() - Method in class xdc.services.spec.GrammarLexer
mD() - Method in class xdc.services.spec.GrammarLexer
mDIV() - Method in class xdc.services.spec.GrammarLexer
mDOC_BLK() - Method in class xdc.services.spec.GrammarLexer
mDOC_INL() - Method in class xdc.services.spec.GrammarLexer
mDOC_PRE() - Method in class xdc.services.spec.GrammarLexer
mDOC_SUF() - Method in class xdc.services.spec.GrammarLexer
mDOT() - Method in class xdc.services.spec.GrammarLexer
mE() - Method in class xdc.services.spec.GrammarLexer
mELIPSIS() - Method in class xdc.services.spec.GrammarLexer
mEQ() - Method in class xdc.services.spec.GrammarLexer
mEQEQ() - Method in class xdc.services.spec.GrammarLexer
metArg() - Method in class xdc.services.spec.GrammarParser
metArgDeclListOpt() - Method in class xdc.services.spec.GrammarParser
methodDecl() - Method in class xdc.services.spec.GrammarParser
mGT() - Method in class xdc.services.spec.GrammarLexer
mGTEQ() - Method in class xdc.services.spec.GrammarLexer
mGTGT() - Method in class xdc.services.spec.GrammarLexer
mH() - Method in class xdc.services.spec.GrammarLexer
mID() - Method in class xdc.services.spec.GrammarLexer
mIDENT() - Method in class xdc.services.spec.GrammarLexer
MIN - Static variable in class xdc.services.spec.GrammarLexer
MIN - Static variable in class xdc.services.spec.GrammarParser
ML_COMMENT - Static variable in class xdc.services.spec.GrammarLexer
ML_COMMENT - Static variable in class xdc.services.spec.GrammarParser
mLBRK() - Method in class xdc.services.spec.GrammarLexer
mLCUR() - Method in class xdc.services.spec.GrammarLexer
mLPAR() - Method in class xdc.services.spec.GrammarLexer
mLT() - Method in class xdc.services.spec.GrammarLexer
mLTEQ() - Method in class xdc.services.spec.GrammarLexer
mLTLT() - Method in class xdc.services.spec.GrammarLexer
mLU() - Method in class xdc.services.spec.GrammarLexer
mMIN() - Method in class xdc.services.spec.GrammarLexer
mML_COMMENT() - Method in class xdc.services.spec.GrammarLexer
mNUM() - Method in class xdc.services.spec.GrammarLexer
modDecl() - Method in class xdc.services.spec.GrammarParser
modDeclSpec() - Method in class xdc.services.spec.GrammarParser
mOPER() - Method in class xdc.services.spec.GrammarLexer
mPATH() - Method in class xdc.services.spec.GrammarLexer
mPATHSTAR() - Method in class xdc.services.spec.GrammarLexer
mPCT() - Method in class xdc.services.spec.GrammarLexer
mPLUS() - Method in class xdc.services.spec.GrammarLexer
mQUEST() - Method in class xdc.services.spec.GrammarLexer
mR() - Method in class xdc.services.spec.GrammarLexer
mRBRK() - Method in class xdc.services.spec.GrammarLexer
mRCUR() - Method in class xdc.services.spec.GrammarLexer
mRPAR() - Method in class xdc.services.spec.GrammarLexer
mSEMI() - Method in class xdc.services.spec.GrammarLexer
msg - Variable in class xdc.services.spec.Session
mSL_COMMENT() - Method in class xdc.services.spec.GrammarLexer
mSTAR() - Method in class xdc.services.spec.GrammarLexer
mSTRING() - Method in class xdc.services.spec.GrammarLexer
mT__100() - Method in class xdc.services.spec.GrammarLexer
mT__101() - Method in class xdc.services.spec.GrammarLexer
mT__102() - Method in class xdc.services.spec.GrammarLexer
mT__103() - Method in class xdc.services.spec.GrammarLexer
mT__104() - Method in class xdc.services.spec.GrammarLexer
mT__105() - Method in class xdc.services.spec.GrammarLexer
mT__106() - Method in class xdc.services.spec.GrammarLexer
mT__107() - Method in class xdc.services.spec.GrammarLexer
mT__108() - Method in class xdc.services.spec.GrammarLexer
mT__109() - Method in class xdc.services.spec.GrammarLexer
mT__110() - Method in class xdc.services.spec.GrammarLexer
mT__111() - Method in class xdc.services.spec.GrammarLexer
mT__112() - Method in class xdc.services.spec.GrammarLexer
mT__113() - Method in class xdc.services.spec.GrammarLexer
mT__114() - Method in class xdc.services.spec.GrammarLexer
mT__115() - Method in class xdc.services.spec.GrammarLexer
mT__116() - Method in class xdc.services.spec.GrammarLexer
mT__117() - Method in class xdc.services.spec.GrammarLexer
mT__118() - Method in class xdc.services.spec.GrammarLexer
mT__119() - Method in class xdc.services.spec.GrammarLexer
mT__120() - Method in class xdc.services.spec.GrammarLexer
mT__121() - Method in class xdc.services.spec.GrammarLexer
mT__122() - Method in class xdc.services.spec.GrammarLexer
mT__123() - Method in class xdc.services.spec.GrammarLexer
mT__124() - Method in class xdc.services.spec.GrammarLexer
mT__125() - Method in class xdc.services.spec.GrammarLexer
mT__126() - Method in class xdc.services.spec.GrammarLexer
mT__127() - Method in class xdc.services.spec.GrammarLexer
mT__128() - Method in class xdc.services.spec.GrammarLexer
mT__129() - Method in class xdc.services.spec.GrammarLexer
mT__130() - Method in class xdc.services.spec.GrammarLexer
mT__131() - Method in class xdc.services.spec.GrammarLexer
mT__132() - Method in class xdc.services.spec.GrammarLexer
mT__133() - Method in class xdc.services.spec.GrammarLexer
mT__134() - Method in class xdc.services.spec.GrammarLexer
mT__135() - Method in class xdc.services.spec.GrammarLexer
mT__136() - Method in class xdc.services.spec.GrammarLexer
mT__137() - Method in class xdc.services.spec.GrammarLexer
mT__138() - Method in class xdc.services.spec.GrammarLexer
mT__58() - Method in class xdc.services.spec.GrammarLexer
mT__59() - Method in class xdc.services.spec.GrammarLexer
mT__60() - Method in class xdc.services.spec.GrammarLexer
mT__61() - Method in class xdc.services.spec.GrammarLexer
mT__62() - Method in class xdc.services.spec.GrammarLexer
mT__63() - Method in class xdc.services.spec.GrammarLexer
mT__64() - Method in class xdc.services.spec.GrammarLexer
mT__65() - Method in class xdc.services.spec.GrammarLexer
mT__66() - Method in class xdc.services.spec.GrammarLexer
mT__67() - Method in class xdc.services.spec.GrammarLexer
mT__68() - Method in class xdc.services.spec.GrammarLexer
mT__69() - Method in class xdc.services.spec.GrammarLexer
mT__70() - Method in class xdc.services.spec.GrammarLexer
mT__71() - Method in class xdc.services.spec.GrammarLexer
mT__72() - Method in class xdc.services.spec.GrammarLexer
mT__73() - Method in class xdc.services.spec.GrammarLexer
mT__74() - Method in class xdc.services.spec.GrammarLexer
mT__75() - Method in class xdc.services.spec.GrammarLexer
mT__76() - Method in class xdc.services.spec.GrammarLexer
mT__77() - Method in class xdc.services.spec.GrammarLexer
mT__78() - Method in class xdc.services.spec.GrammarLexer
mT__79() - Method in class xdc.services.spec.GrammarLexer
mT__80() - Method in class xdc.services.spec.GrammarLexer
mT__81() - Method in class xdc.services.spec.GrammarLexer
mT__82() - Method in class xdc.services.spec.GrammarLexer
mT__83() - Method in class xdc.services.spec.GrammarLexer
mT__84() - Method in class xdc.services.spec.GrammarLexer
mT__85() - Method in class xdc.services.spec.GrammarLexer
mT__86() - Method in class xdc.services.spec.GrammarLexer
mT__87() - Method in class xdc.services.spec.GrammarLexer
mT__88() - Method in class xdc.services.spec.GrammarLexer
mT__89() - Method in class xdc.services.spec.GrammarLexer
mT__90() - Method in class xdc.services.spec.GrammarLexer
mT__91() - Method in class xdc.services.spec.GrammarLexer
mT__92() - Method in class xdc.services.spec.GrammarLexer
mT__93() - Method in class xdc.services.spec.GrammarLexer
mT__94() - Method in class xdc.services.spec.GrammarLexer
mT__95() - Method in class xdc.services.spec.GrammarLexer
mT__96() - Method in class xdc.services.spec.GrammarLexer
mT__97() - Method in class xdc.services.spec.GrammarLexer
mT__98() - Method in class xdc.services.spec.GrammarLexer
mT__99() - Method in class xdc.services.spec.GrammarLexer
mTILDE() - Method in class xdc.services.spec.GrammarLexer
mTokens() - Method in class xdc.services.spec.GrammarLexer
mWS() - Method in class xdc.services.spec.GrammarLexer

N

needsRuntime() - Method in class xdc.services.spec.Unit
Node - Class in xdc.services.spec
Abstract superclass for any formally declared object in a .xdc file.
Node() - Constructor for class xdc.services.spec.Node
NUM - Static variable in class xdc.services.spec.GrammarLexer
NUM - Static variable in class xdc.services.spec.GrammarParser

O

objKind(Decl.Signature) - Static method in class xdc.services.spec.Decl
objKind(Type, String) - Static method in class xdc.services.spec.Decl
one_doc_block(ArrayList<DocComment>) - Method in class xdc.services.spec.GrammarParser
OPER - Static variable in class xdc.services.spec.GrammarLexer
OPER - Static variable in class xdc.services.spec.GrammarParser
overrides() - Method in class xdc.services.spec.Decl.Config
overrides() - Method in class xdc.services.spec.Decl.Fxn
overrides() - Method in class xdc.services.spec.Decl

P

ParserSession - Class in xdc.services.spec
ParserSession() - Constructor for class xdc.services.spec.ParserSession
No arg constructor
ParserSession(Env) - Constructor for class xdc.services.spec.ParserSession
Create a parser session with a given environment
ParserSession(Env, Cache) - Constructor for class xdc.services.spec.ParserSession
PATH - Static variable in class xdc.services.spec.GrammarLexer
PATH - Static variable in class xdc.services.spec.GrammarParser
PATHSTAR - Static variable in class xdc.services.spec.GrammarLexer
PATHSTAR - Static variable in class xdc.services.spec.GrammarParser
PCT - Static variable in class xdc.services.spec.GrammarLexer
PCT - Static variable in class xdc.services.spec.GrammarParser
Persist - Class in xdc.services.spec
Spec serialization and deserialization support.
Persist() - Constructor for class xdc.services.spec.Persist
Persist.Fixup - Class in xdc.services.spec
Serialized form of a reference to a Node in another package.
Persist.Fixup(Node) - Constructor for class xdc.services.spec.Persist.Fixup
Persist.Input - Class in xdc.services.spec
ObjectInputStream that reconstructs references to foreign packages.
Persist.Input(String, InputStream, BrowserSession) - Constructor for class xdc.services.spec.Persist.Input
Persist.Output - Class in xdc.services.spec
ObjectOutputStream that restricts to the current package.
Persist.Output(OutputStream, String) - Constructor for class xdc.services.spec.Persist.Output
Pkg - Class in xdc.services.spec
pkgReq(List<Atom>, boolean) - Method in class xdc.services.spec.GrammarParser
pkgReqList(List<Atom>) - Method in class xdc.services.spec.GrammarParser
pkgSpec(String) - Method in class xdc.services.spec.GrammarParser
pkgUnit(List<Atom>, List<Atom>) - Method in class xdc.services.spec.GrammarParser
pkgUnitName(List<Atom>) - Method in class xdc.services.spec.GrammarParser
pkgVers() - Method in class xdc.services.spec.GrammarParser
PLUS - Static variable in class xdc.services.spec.GrammarLexer
PLUS - Static variable in class xdc.services.spec.GrammarParser
proxyDecl() - Method in class xdc.services.spec.GrammarParser
PTR - Static variable in class xdc.services.spec.Type
ptrsig() - Method in class xdc.services.spec.Type
pushChild(String, String) - Method in class xdc.services.spec.XDoc
pushDetails(String) - Method in class xdc.services.spec.XDoc
put(Node) - Method in class xdc.services.spec.Cache
Add an object to the cache.
put(String, Node) - Method in class xdc.services.spec.Cache
Add a object to the cache with a specific qualified name.
put(String, Node, boolean) - Method in class xdc.services.spec.Cache

Q

Qual - Enum in xdc.services.spec
qualName() - Method in class xdc.services.spec.GrammarParser
qualNameStar() - Method in class xdc.services.spec.GrammarParser
queryFacet(String) - Method in class xdc.services.spec.Unit
Query unit for the specified facet type
QUEST - Static variable in class xdc.services.spec.GrammarLexer
QUEST - Static variable in class xdc.services.spec.GrammarParser

R

R - Static variable in class xdc.services.spec.GrammarLexer
R - Static variable in class xdc.services.spec.GrammarParser
raw() - Method in class xdc.services.spec.Type
RBRK - Static variable in class xdc.services.spec.GrammarLexer
RBRK - Static variable in class xdc.services.spec.GrammarParser
RCUR - Static variable in class xdc.services.spec.GrammarLexer
RCUR - Static variable in class xdc.services.spec.GrammarParser
Ref - Class in xdc.services.spec
Ref(String) - Constructor for class xdc.services.spec.Ref
External constructor.
replaceObject(Object) - Method in class xdc.services.spec.Persist.Output
Inspect each object before serialization.
reportError(RecognitionException) - Method in class xdc.services.spec.GrammarParser
reportError(String) - Method in class xdc.services.spec.GrammarParser
reportError(String, int) - Method in class xdc.services.spec.GrammarParser
Report an error at the given line.
Reserved - Class in xdc.services.spec
Reserved() - Constructor for class xdc.services.spec.Reserved
resolve(Unit, boolean) - Method in class xdc.services.spec.Ref
Resolve this reference.
resolveObject(Object) - Method in class xdc.services.spec.Persist.Input
root() - Method in class xdc.services.spec.Type.Array
root() - Method in class xdc.services.spec.Type.Fxn
root() - Method in class xdc.services.spec.Type.Paren
root() - Method in class xdc.services.spec.Type.Ptr
root() - Method in class xdc.services.spec.Type
RPAR - Static variable in class xdc.services.spec.GrammarLexer
RPAR - Static variable in class xdc.services.spec.GrammarParser

S

save() - Method in class xdc.services.spec.ParserSession
save(File) - Method in class xdc.services.spec.ParserSession
scan(String) - Method in class xdc.services.spec.ParserSession
scanDirectories() - Method in class xdc.services.spec.BrowserSession
Return a Map of package names indexed by the canonical path to the package's base.
scanRepositories() - Method in class xdc.services.spec.BrowserSession
Return a Map all package base directories indexed by the package's name.
SEMI - Static variable in class xdc.services.spec.GrammarLexer
SEMI - Static variable in class xdc.services.spec.GrammarParser
Session - Class in xdc.services.spec
Session() - Constructor for class xdc.services.spec.Session
Session(Env) - Constructor for class xdc.services.spec.Session
Session(Env, Cache) - Constructor for class xdc.services.spec.Session
SessionRuntimeException - Exception in xdc.services.spec
SessionRuntimeException(String) - Constructor for exception xdc.services.spec.SessionRuntimeException
setAtom(String) - Method in class xdc.services.spec.Decl.Arg
setConstElem(boolean) - Method in class xdc.services.spec.Type.Array
setEnv(Env) - Method in class xdc.services.spec.Session
setErr(PrintWriter) - Method in class xdc.services.spec.Session
setLoadDocs(boolean) - Method in class xdc.services.spec.BrowserSession
Set whether this session should preserve docs in Nodes.
setStrict(boolean) - Method in class xdc.services.spec.ParserSession
setSummary(String) - Method in class xdc.services.spec.XDoc
setVerbose(boolean) - Method in class xdc.services.spec.ParserSession
setWarnings(boolean) - Method in class xdc.services.spec.Session
SHORT - Static variable in class xdc.services.spec.Type
sig(int) - Method in class xdc.services.spec.Type.Array
SIZE - Static variable in class xdc.services.spec.Type
sizeof(List<String>) - Method in class xdc.services.spec.Decl.Enum
sizeof(List<String>) - Method in interface xdc.services.spec.Decl.Sizeable
sizeof(List<String>) - Method in class xdc.services.spec.Decl.Struct
sizeof(List<String>) - Method in class xdc.services.spec.Decl.Typedef
sizeof(List<String>) - Method in class xdc.services.spec.Type.Array
sizeof(List<String>) - Method in class xdc.services.spec.Type.Declarator
sizeof(List<String>) - Method in class xdc.services.spec.Type.Fxn
sizeof(List<String>) - Method in class xdc.services.spec.Type.Paren
sizeof(List<String>) - Method in class xdc.services.spec.Type.Ptr
sizeof(List<String>) - Method in class xdc.services.spec.Type
sizeof(List<String>) - Method in class xdc.services.spec.Type.Spec
SL_COMMENT - Static variable in class xdc.services.spec.GrammarLexer
SL_COMMENT - Static variable in class xdc.services.spec.GrammarParser
STAR - Static variable in class xdc.services.spec.GrammarLexer
STAR - Static variable in class xdc.services.spec.GrammarParser
STRING - Static variable in class xdc.services.spec.GrammarLexer
STRING - Static variable in class xdc.services.spec.GrammarParser
structDecl() - Method in class xdc.services.spec.GrammarParser
structFieldDecl() - Method in class xdc.services.spec.GrammarParser
Sup - Class in xdc.services.spec
superInt() - Method in class xdc.services.spec.GrammarParser

T

T__100 - Static variable in class xdc.services.spec.GrammarLexer
T__100 - Static variable in class xdc.services.spec.GrammarParser
T__101 - Static variable in class xdc.services.spec.GrammarLexer
T__101 - Static variable in class xdc.services.spec.GrammarParser
T__102 - Static variable in class xdc.services.spec.GrammarLexer
T__102 - Static variable in class xdc.services.spec.GrammarParser
T__103 - Static variable in class xdc.services.spec.GrammarLexer
T__103 - Static variable in class xdc.services.spec.GrammarParser
T__104 - Static variable in class xdc.services.spec.GrammarLexer
T__104 - Static variable in class xdc.services.spec.GrammarParser
T__105 - Static variable in class xdc.services.spec.GrammarLexer
T__105 - Static variable in class xdc.services.spec.GrammarParser
T__106 - Static variable in class xdc.services.spec.GrammarLexer
T__106 - Static variable in class xdc.services.spec.GrammarParser
T__107 - Static variable in class xdc.services.spec.GrammarLexer
T__107 - Static variable in class xdc.services.spec.GrammarParser
T__108 - Static variable in class xdc.services.spec.GrammarLexer
T__108 - Static variable in class xdc.services.spec.GrammarParser
T__109 - Static variable in class xdc.services.spec.GrammarLexer
T__109 - Static variable in class xdc.services.spec.GrammarParser
T__110 - Static variable in class xdc.services.spec.GrammarLexer
T__110 - Static variable in class xdc.services.spec.GrammarParser
T__111 - Static variable in class xdc.services.spec.GrammarLexer
T__111 - Static variable in class xdc.services.spec.GrammarParser
T__112 - Static variable in class xdc.services.spec.GrammarLexer
T__112 - Static variable in class xdc.services.spec.GrammarParser
T__113 - Static variable in class xdc.services.spec.GrammarLexer
T__113 - Static variable in class xdc.services.spec.GrammarParser
T__114 - Static variable in class xdc.services.spec.GrammarLexer
T__114 - Static variable in class xdc.services.spec.GrammarParser
T__115 - Static variable in class xdc.services.spec.GrammarLexer
T__115 - Static variable in class xdc.services.spec.GrammarParser
T__116 - Static variable in class xdc.services.spec.GrammarLexer
T__116 - Static variable in class xdc.services.spec.GrammarParser
T__117 - Static variable in class xdc.services.spec.GrammarLexer
T__117 - Static variable in class xdc.services.spec.GrammarParser
T__118 - Static variable in class xdc.services.spec.GrammarLexer
T__118 - Static variable in class xdc.services.spec.GrammarParser
T__119 - Static variable in class xdc.services.spec.GrammarLexer
T__119 - Static variable in class xdc.services.spec.GrammarParser
T__120 - Static variable in class xdc.services.spec.GrammarLexer
T__120 - Static variable in class xdc.services.spec.GrammarParser
T__121 - Static variable in class xdc.services.spec.GrammarLexer
T__121 - Static variable in class xdc.services.spec.GrammarParser
T__122 - Static variable in class xdc.services.spec.GrammarLexer
T__122 - Static variable in class xdc.services.spec.GrammarParser
T__123 - Static variable in class xdc.services.spec.GrammarLexer
T__123 - Static variable in class xdc.services.spec.GrammarParser
T__124 - Static variable in class xdc.services.spec.GrammarLexer
T__124 - Static variable in class xdc.services.spec.GrammarParser
T__125 - Static variable in class xdc.services.spec.GrammarLexer
T__125 - Static variable in class xdc.services.spec.GrammarParser
T__126 - Static variable in class xdc.services.spec.GrammarLexer
T__126 - Static variable in class xdc.services.spec.GrammarParser
T__127 - Static variable in class xdc.services.spec.GrammarLexer
T__127 - Static variable in class xdc.services.spec.GrammarParser
T__128 - Static variable in class xdc.services.spec.GrammarLexer
T__128 - Static variable in class xdc.services.spec.GrammarParser
T__129 - Static variable in class xdc.services.spec.GrammarLexer
T__129 - Static variable in class xdc.services.spec.GrammarParser
T__130 - Static variable in class xdc.services.spec.GrammarLexer
T__130 - Static variable in class xdc.services.spec.GrammarParser
T__131 - Static variable in class xdc.services.spec.GrammarLexer
T__131 - Static variable in class xdc.services.spec.GrammarParser
T__132 - Static variable in class xdc.services.spec.GrammarLexer
T__132 - Static variable in class xdc.services.spec.GrammarParser
T__133 - Static variable in class xdc.services.spec.GrammarLexer
T__133 - Static variable in class xdc.services.spec.GrammarParser
T__134 - Static variable in class xdc.services.spec.GrammarLexer
T__134 - Static variable in class xdc.services.spec.GrammarParser
T__135 - Static variable in class xdc.services.spec.GrammarLexer
T__135 - Static variable in class xdc.services.spec.GrammarParser
T__136 - Static variable in class xdc.services.spec.GrammarLexer
T__136 - Static variable in class xdc.services.spec.GrammarParser
T__137 - Static variable in class xdc.services.spec.GrammarLexer
T__137 - Static variable in class xdc.services.spec.GrammarParser
T__138 - Static variable in class xdc.services.spec.GrammarLexer
T__138 - Static variable in class xdc.services.spec.GrammarParser
T__58 - Static variable in class xdc.services.spec.GrammarLexer
T__58 - Static variable in class xdc.services.spec.GrammarParser
T__59 - Static variable in class xdc.services.spec.GrammarLexer
T__59 - Static variable in class xdc.services.spec.GrammarParser
T__60 - Static variable in class xdc.services.spec.GrammarLexer
T__60 - Static variable in class xdc.services.spec.GrammarParser
T__61 - Static variable in class xdc.services.spec.GrammarLexer
T__61 - Static variable in class xdc.services.spec.GrammarParser
T__62 - Static variable in class xdc.services.spec.GrammarLexer
T__62 - Static variable in class xdc.services.spec.GrammarParser
T__63 - Static variable in class xdc.services.spec.GrammarLexer
T__63 - Static variable in class xdc.services.spec.GrammarParser
T__64 - Static variable in class xdc.services.spec.GrammarLexer
T__64 - Static variable in class xdc.services.spec.GrammarParser
T__65 - Static variable in class xdc.services.spec.GrammarLexer
T__65 - Static variable in class xdc.services.spec.GrammarParser
T__66 - Static variable in class xdc.services.spec.GrammarLexer
T__66 - Static variable in class xdc.services.spec.GrammarParser
T__67 - Static variable in class xdc.services.spec.GrammarLexer
T__67 - Static variable in class xdc.services.spec.GrammarParser
T__68 - Static variable in class xdc.services.spec.GrammarLexer
T__68 - Static variable in class xdc.services.spec.GrammarParser
T__69 - Static variable in class xdc.services.spec.GrammarLexer
T__69 - Static variable in class xdc.services.spec.GrammarParser
T__70 - Static variable in class xdc.services.spec.GrammarLexer
T__70 - Static variable in class xdc.services.spec.GrammarParser
T__71 - Static variable in class xdc.services.spec.GrammarLexer
T__71 - Static variable in class xdc.services.spec.GrammarParser
T__72 - Static variable in class xdc.services.spec.GrammarLexer
T__72 - Static variable in class xdc.services.spec.GrammarParser
T__73 - Static variable in class xdc.services.spec.GrammarLexer
T__73 - Static variable in class xdc.services.spec.GrammarParser
T__74 - Static variable in class xdc.services.spec.GrammarLexer
T__74 - Static variable in class xdc.services.spec.GrammarParser
T__75 - Static variable in class xdc.services.spec.GrammarLexer
T__75 - Static variable in class xdc.services.spec.GrammarParser
T__76 - Static variable in class xdc.services.spec.GrammarLexer
T__76 - Static variable in class xdc.services.spec.GrammarParser
T__77 - Static variable in class xdc.services.spec.GrammarLexer
T__77 - Static variable in class xdc.services.spec.GrammarParser
T__78 - Static variable in class xdc.services.spec.GrammarLexer
T__78 - Static variable in class xdc.services.spec.GrammarParser
T__79 - Static variable in class xdc.services.spec.GrammarLexer
T__79 - Static variable in class xdc.services.spec.GrammarParser
T__80 - Static variable in class xdc.services.spec.GrammarLexer
T__80 - Static variable in class xdc.services.spec.GrammarParser
T__81 - Static variable in class xdc.services.spec.GrammarLexer
T__81 - Static variable in class xdc.services.spec.GrammarParser
T__82 - Static variable in class xdc.services.spec.GrammarLexer
T__82 - Static variable in class xdc.services.spec.GrammarParser
T__83 - Static variable in class xdc.services.spec.GrammarLexer
T__83 - Static variable in class xdc.services.spec.GrammarParser
T__84 - Static variable in class xdc.services.spec.GrammarLexer
T__84 - Static variable in class xdc.services.spec.GrammarParser
T__85 - Static variable in class xdc.services.spec.GrammarLexer
T__85 - Static variable in class xdc.services.spec.GrammarParser
T__86 - Static variable in class xdc.services.spec.GrammarLexer
T__86 - Static variable in class xdc.services.spec.GrammarParser
T__87 - Static variable in class xdc.services.spec.GrammarLexer
T__87 - Static variable in class xdc.services.spec.GrammarParser
T__88 - Static variable in class xdc.services.spec.GrammarLexer
T__88 - Static variable in class xdc.services.spec.GrammarParser
T__89 - Static variable in class xdc.services.spec.GrammarLexer
T__89 - Static variable in class xdc.services.spec.GrammarParser
T__90 - Static variable in class xdc.services.spec.GrammarLexer
T__90 - Static variable in class xdc.services.spec.GrammarParser
T__91 - Static variable in class xdc.services.spec.GrammarLexer
T__91 - Static variable in class xdc.services.spec.GrammarParser
T__92 - Static variable in class xdc.services.spec.GrammarLexer
T__92 - Static variable in class xdc.services.spec.GrammarParser
T__93 - Static variable in class xdc.services.spec.GrammarLexer
T__93 - Static variable in class xdc.services.spec.GrammarParser
T__94 - Static variable in class xdc.services.spec.GrammarLexer
T__94 - Static variable in class xdc.services.spec.GrammarParser
T__95 - Static variable in class xdc.services.spec.GrammarLexer
T__95 - Static variable in class xdc.services.spec.GrammarParser
T__96 - Static variable in class xdc.services.spec.GrammarLexer
T__96 - Static variable in class xdc.services.spec.GrammarParser
T__97 - Static variable in class xdc.services.spec.GrammarLexer
T__97 - Static variable in class xdc.services.spec.GrammarParser
T__98 - Static variable in class xdc.services.spec.GrammarLexer
T__98 - Static variable in class xdc.services.spec.GrammarParser
T__99 - Static variable in class xdc.services.spec.GrammarLexer
T__99 - Static variable in class xdc.services.spec.GrammarParser
talk() - Static method in class xdc.services.spec.Test
tcode() - Method in class xdc.services.spec.Type
term() - Method in class xdc.services.spec.Type.Array
term() - Method in class xdc.services.spec.Type.Paren
term() - Method in class xdc.services.spec.Type
Test - Class in xdc.services.spec
Test() - Constructor for class xdc.services.spec.Test
TILDE - Static variable in class xdc.services.spec.GrammarLexer
TILDE - Static variable in class xdc.services.spec.GrammarParser
tokenNames - Static variable in class xdc.services.spec.GrammarParser
toString() - Method in class xdc.services.spec.Attr
toText() - Method in class xdc.services.spec.Attr
toText(Expr) - Static method in class xdc.services.spec.Expr
toXml(Expr) - Static method in class xdc.services.spec.Expr
tsig() - Method in class xdc.services.spec.Type
tspec() - Method in class xdc.services.spec.Type.Array
tspec() - Method in class xdc.services.spec.Type.Declarator
tspec() - Method in class xdc.services.spec.Type.Fxn
tspec() - Method in class xdc.services.spec.Type.Paren
tspec() - Method in class xdc.services.spec.Type.Ptr
tspec() - Method in class xdc.services.spec.Type
Type - Class in xdc.services.spec
Type() - Constructor for class xdc.services.spec.Type
Type.Array - Class in xdc.services.spec
Type.Array.Kind - Enum in xdc.services.spec
Type.Creator - Class in xdc.services.spec
Type.Declarator - Class in xdc.services.spec
Type.Fxn - Class in xdc.services.spec
Type.Modifier - Enum in xdc.services.spec
Type.Paren - Class in xdc.services.spec
Type.Ptr - Class in xdc.services.spec
Type.Spec - Class in xdc.services.spec
typeDecl() - Method in class xdc.services.spec.GrammarParser
typeMods() - Method in class xdc.services.spec.GrammarParser
typeSpec() - Method in class xdc.services.spec.GrammarParser
typeSpecC() - Method in class xdc.services.spec.GrammarParser
typeSpecF() - Method in class xdc.services.spec.GrammarParser
typeSpecG(EnumSet<Type.Modifier>) - Method in class xdc.services.spec.GrammarParser

U

Unit - Class in xdc.services.spec
unitImp(List<Import>) - Method in class xdc.services.spec.GrammarParser
unitSpec(String) - Method in class xdc.services.spec.GrammarParser

V

valueOf(String) - Static method in enum xdc.services.spec.Decl.Signature.ObjKind
Returns the enum constant of this type with the specified name.
valueOf(String) - Static method in enum xdc.services.spec.Qual
Returns the enum constant of this type with the specified name.
valueOf(String) - Static method in enum xdc.services.spec.Type.Array.Kind
Returns the enum constant of this type with the specified name.
valueOf(String) - Static method in enum xdc.services.spec.Type.Modifier
Returns the enum constant of this type with the specified name.
values() - Static method in enum xdc.services.spec.Decl.Signature.ObjKind
Returns an array containing the constants of this enum type, in the order they are declared.
values() - Static method in enum xdc.services.spec.Qual
Returns an array containing the constants of this enum type, in the order they are declared.
values() - Static method in enum xdc.services.spec.Type.Array.Kind
Returns an array containing the constants of this enum type, in the order they are declared.
values() - Static method in enum xdc.services.spec.Type.Modifier
Returns an array containing the constants of this enum type, in the order they are declared.

W

WS - Static variable in class xdc.services.spec.GrammarLexer
WS - Static variable in class xdc.services.spec.GrammarParser

X

xdc.services.spec - package xdc.services.spec
XDoc - Class in xdc.services.spec
xmlsig() - Method in class xdc.services.spec.Type.Creator
xmlsig() - Method in class xdc.services.spec.Type.Spec
xmlsig() - Method in class xdc.services.spec.Type
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Class Hierarchy

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Hierarchy For All Packages

Package Hierarchies:
  • xdc.services.spec

Class Hierarchy

  • java.lang.Object
    • xdc.services.spec.Attr (implements java.io.Serializable)
    • org.antlr.runtime.BaseRecognizer
      • org.antlr.runtime.Lexer (implements org.antlr.runtime.TokenSource)
        • xdc.services.spec.GrammarLexer
      • org.antlr.runtime.Parser
        • xdc.services.spec.GrammarParser
    • xdc.services.spec.Cache
    • org.antlr.runtime.CommonToken (implements java.io.Serializable, org.antlr.runtime.Token)
      • xdc.services.spec.Atom (implements java.io.Serializable)
    • xdc.services.spec.DocComment (implements java.io.Serializable)
    • xdc.services.spec.Expr (implements java.io.Serializable)
      • xdc.services.spec.Expr.Array (implements xdc.services.spec.Expr.Aggregate)
      • xdc.services.spec.Expr.Binary
      • xdc.services.spec.Expr.Cond
      • xdc.services.spec.Expr.Const
      • xdc.services.spec.Expr.Creat
      • xdc.services.spec.Expr.Hash (implements xdc.services.spec.Expr.Aggregate)
      • xdc.services.spec.Expr.Paren
      • xdc.services.spec.Expr.Term
      • xdc.services.spec.Expr.Unary
    • xdc.services.spec.Import (implements java.io.Serializable)
    • java.io.InputStream (implements java.io.Closeable)
      • java.io.ObjectInputStream (implements java.io.ObjectInput, java.io.ObjectStreamConstants)
        • xdc.services.spec.Persist.Input
    • xdc.services.spec.Node (implements java.lang.Comparable<T>, java.io.Serializable)
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Arg (implements xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Config (implements xdc.services.spec.Decl.Annexable, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Const (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.OverridableDef, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Enum (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.IsType, xdc.services.spec.Decl.Sizeable)
        • xdc.services.spec.Decl.EnumVal (implements xdc.services.spec.Decl.AuxDef)
        • xdc.services.spec.Decl.Extern (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Field (implements xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Fxn (implements xdc.services.spec.Decl.Annexable, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Proxy (implements xdc.services.spec.Decl.LocalUnit)
        • xdc.services.spec.Decl.Struct (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.IsType, xdc.services.spec.Decl.Sizeable)
        • xdc.services.spec.Decl.Typedef (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.IsType, xdc.services.spec.Decl.Signature, xdc.services.spec.Decl.Sizeable)
      • xdc.services.spec.Pkg
      • xdc.services.spec.Unit
    • java.io.OutputStream (implements java.io.Closeable, java.io.Flushable)
      • java.io.ObjectOutputStream (implements java.io.ObjectOutput, java.io.ObjectStreamConstants)
        • xdc.services.spec.Persist.Output
    • xdc.services.spec.Persist
    • xdc.services.spec.Persist.Fixup (implements java.io.Serializable)
    • xdc.services.spec.Ref (implements java.io.Serializable)
    • xdc.services.spec.Reserved
    • xdc.services.spec.Session
      • xdc.services.spec.BrowserSession
      • xdc.services.spec.ParserSession
    • xdc.services.spec.Sup (implements java.io.Serializable)
    • xdc.services.spec.Test
    • java.lang.Throwable (implements java.io.Serializable)
      • java.lang.Exception
        • java.lang.RuntimeException
          • org.mozilla.javascript.RhinoException
            • org.mozilla.javascript.EvaluatorException
              • xdc.services.spec.SessionRuntimeException
    • xdc.services.spec.Type (implements java.io.Serializable)
      • xdc.services.spec.Type.Array
      • xdc.services.spec.Type.Creator
      • xdc.services.spec.Type.Declarator
      • xdc.services.spec.Type.Fxn
      • xdc.services.spec.Type.Paren
      • xdc.services.spec.Type.Ptr
      • xdc.services.spec.Type.Spec
    • xdc.services.spec.XDoc

Interface Hierarchy

  • xdc.services.spec.Decl.Annexable
  • xdc.services.spec.Decl.AuxDef
  • xdc.services.spec.Decl.IsType
  • xdc.services.spec.Decl.LocalUnit
  • xdc.services.spec.Decl.OverridableDef
  • xdc.services.spec.Decl.Signature
  • xdc.services.spec.Decl.Sizeable
  • xdc.services.spec.Expr.Aggregate

Enum Hierarchy

  • java.lang.Object
    • java.lang.Enum<E> (implements java.lang.Comparable<T>, java.io.Serializable)
      • xdc.services.spec.Decl.Signature.ObjKind
      • xdc.services.spec.Qual
      • xdc.services.spec.Type.Modifier
      • xdc.services.spec.Type.Array.Kind
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Serialized Form

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Serialized Form

  • Package xdc.services.spec

    • Class xdc.services.spec.Atom extends org.antlr.runtime.CommonToken implements Serializable

      serialVersionUID:
      -9098288411027945023L

      • Serialized Fields

        • file

          java.lang.String file

        • text

          java.lang.String text

        • line

          int line

    • Class xdc.services.spec.Attr extends java.lang.Object implements Serializable

      serialVersionUID:
      7469859191145684496L

      • Serialized Fields

        • name

          Atom name

        • val

          Expr val

    • Class xdc.services.spec.Decl extends Node implements Serializable

      serialVersionUID:
      3468768778188819860L

      • Serialized Fields

        • over

          Decl over

    • Class xdc.services.spec.Decl.Arg extends Decl implements Serializable

      serialVersionUID:
      -7298373774659045568L

      • Serialized Fields

        • type

          Type type

        • init

          Expr init

    • Class xdc.services.spec.Decl.Config extends Decl implements Serializable

      serialVersionUID:
      -3472392753188999914L

      • Serialized Fields

        • type

          Type type

        • init

          Expr init

    • Class xdc.services.spec.Decl.Const extends Decl implements Serializable

      serialVersionUID:
      -5129490619630763331L

      • Serialized Fields

        • type

          Type type

        • init

          Expr init

    • Class xdc.services.spec.Decl.Enum extends Decl implements Serializable

      serialVersionUID:
      -7076604082337550848L

      • Serialized Fields

        • vals

          java.util.List<E> vals

        • rep

          Type.Spec rep

    • Class xdc.services.spec.Decl.EnumVal extends Decl implements Serializable

      serialVersionUID:
      -3594208666128592956L

      • Serialized Fields

        • init

          Expr init

    • Class xdc.services.spec.Decl.Extern extends Decl implements Serializable

      serialVersionUID:
      -5537398406232068500L

      • Serialized Fields

        • type

          Type type

        • init

          Atom init

    • Class xdc.services.spec.Decl.Field extends Decl implements Serializable

      serialVersionUID:
      1865932903245823181L

      • Serialized Fields

        • type

          Type type

    • Class xdc.services.spec.Decl.Fxn extends Decl implements Serializable

      serialVersionUID:
      4734759580216702060L

      • Serialized Fields

        • type

          Type type

        • args

          java.util.List<E> args

        • isVarg

          boolean isVarg

        • minargc

          int minargc

    • Class xdc.services.spec.Decl.Proxy extends Decl implements Serializable

      serialVersionUID:
      -5207411272617839552L

      • Serialized Fields

        • sup

          Sup sup

        • unit

          Unit unit

    • Class xdc.services.spec.Decl.Struct extends Decl implements Serializable

      serialVersionUID:
      8653474625146200716L

      • Serialized Fields

        • flds

          java.util.List<E> flds

        • fldSizes

          java.util.List<E> fldSizes

        • uflag

          boolean uflag

    • Class xdc.services.spec.Decl.Typedef extends Decl implements Serializable

      serialVersionUID:
      -3286912318315178858L

      • Serialized Fields

        • type

          Type type

    • Class xdc.services.spec.DocComment extends java.lang.Object implements Serializable

      serialVersionUID:
      7216773336916227011L

      • Serialized Fields

        • arg

          java.lang.String arg

        • body

          Atom body

        • mode

          java.lang.String mode

        • pid

          int pid

        • tag

          java.lang.String tag

    • Class xdc.services.spec.Expr extends java.lang.Object implements Serializable

      serialVersionUID:
      -6252677966391348100L

    • Class xdc.services.spec.Expr.Array extends Expr implements Serializable

      serialVersionUID:
      -4769465389054526623L

      • Serialized Fields

        • elems

          java.util.List<E> elems

    • Class xdc.services.spec.Expr.Binary extends Expr implements Serializable

      serialVersionUID:
      -8527302494988163510L

      • Serialized Fields

        • op

          Atom op

        • left

          Expr left

        • right

          Expr right

    • Class xdc.services.spec.Expr.Cond extends Expr implements Serializable

      serialVersionUID:
      -3016213789698060325L

      • Serialized Fields

        • cond

          Expr cond

        • left

          Expr left

        • right

          Expr right

    • Class xdc.services.spec.Expr.Const extends Expr implements Serializable

      serialVersionUID:
      3804334373597760702L

      • Serialized Fields

        • val

          Atom val

    • Class xdc.services.spec.Expr.Creat extends Expr implements Serializable

      serialVersionUID:
      5455736916581289951L

      • Serialized Fields

        • mod

          Expr.Term mod

        • args

          java.util.List<E> args

    • Class xdc.services.spec.Expr.Hash extends Expr implements Serializable

      serialVersionUID:
      5610650247782362148L

      • Serialized Fields

        • ids

          java.util.List<E> ids

        • vals

          java.util.List<E> vals

    • Class xdc.services.spec.Expr.Paren extends Expr implements Serializable

      serialVersionUID:
      -8628875245839027888L

      • Serialized Fields

        • body

          Expr body

    • Class xdc.services.spec.Expr.Term extends Expr implements Serializable

      serialVersionUID:
      484911847601585871L

      • Serialized Fields

        • eref

          Ref eref

        • val

          Expr val

    • Class xdc.services.spec.Expr.Unary extends Expr implements Serializable

      serialVersionUID:
      -3418172231763962792L

      • Serialized Fields

        • op

          Atom op

        • right

          Expr right

    • Class xdc.services.spec.Import extends java.lang.Object implements Serializable

      serialVersionUID:
      1L

      • Serialized Fields

        • star

          boolean star

        • uid

          Atom uid

        • unit

          Unit unit

        • alias

          java.lang.String alias

    • Class xdc.services.spec.Node extends java.lang.Object implements Serializable

      serialVersionUID:
      6316800378495184391L

      • Serialized Fields

        • name

          Atom name

        • quals

          java.util.EnumSet<E extends java.lang.Enum<E>> quals

        • attrs

          java.util.List<E> attrs

        • attrMap

          java.util.Map<K,V> attrMap

        • parent

          Node parent

        • summary

          java.lang.String summary

        • isNodoc

          boolean isNodoc

    • Class xdc.services.spec.Persist.Fixup extends java.lang.Object implements Serializable

      serialVersionUID:
      5710009880454690167L

      • Serialized Fields

        • pkg

          java.lang.String pkg

        • decl

          java.lang.String decl

    • Class xdc.services.spec.Pkg extends Node implements Serializable

      serialVersionUID:
      2236555847538118936L

      • Serialized Fields

        • interNames

          java.util.List<E> interNames

        • localSpecs

          java.util.List<E> localSpecs

        • otherSpecs

          java.util.List<E> otherSpecs

        • miscSrcs

          java.util.List<E> miscSrcs

        • modNames

          java.util.List<E> modNames

        • requires

          java.util.List<E> requires

        • units

          java.util.List<E> units

        • key

          java.lang.String key

        • vers

          java.lang.String vers

        • bundle

          java.lang.String bundle

        • baseDir

          java.lang.String baseDir

    • Class xdc.services.spec.Ref extends java.lang.Object implements Serializable

      serialVersionUID:
      6391260877086618330L

      • Serialized Fields

        • scope

          Atom scope

        • id

          Atom id

        • node

          Node node

        • prx

          Decl.Proxy prx

        • local

          boolean local

    • Class xdc.services.spec.SessionRuntimeException extends org.mozilla.javascript.EvaluatorException implements Serializable

      serialVersionUID:
      -7134897190745766939L

      • Serialized Fields

        • SESSION_ERROR

          java.lang.String SESSION_ERROR

    • Class xdc.services.spec.Sup extends java.lang.Object implements Serializable

      serialVersionUID:
      -1373089623744501363L

      • Serialized Fields

        • iid

          Atom iid

        • ref

          Ref ref

        • unit

          Unit unit

    • Class xdc.services.spec.Type extends java.lang.Object implements Serializable

      serialVersionUID:
      5646275176634845046L

    • Class xdc.services.spec.Type.Array extends Type implements Serializable

      serialVersionUID:
      8764930492419867714L

      • Serialized Fields

        • base

          Type base

        • dim

          Expr dim

        • kind

          Type.Array.Kind kind

        • constElem

          boolean constElem

    • Class xdc.services.spec.Type.Creator extends Type implements Serializable

      serialVersionUID:
      -771646166657371561L

    • Class xdc.services.spec.Type.Declarator extends Type implements Serializable

      serialVersionUID:
      -1024790156516858614L

      • Serialized Fields

        • tspec

          Type.Spec tspec

        • id

          Atom id

    • Class xdc.services.spec.Type.Fxn extends Type implements Serializable

      serialVersionUID:
      4714104815468307967L

      • Serialized Fields

        • base

          Type base

        • args

          java.util.List<E> args

        • isVarg

          boolean isVarg

    • Class xdc.services.spec.Type.Paren extends Type implements Serializable

      serialVersionUID:
      2287194647505979584L

      • Serialized Fields

        • base

          Type base

    • Class xdc.services.spec.Type.Ptr extends Type implements Serializable

      serialVersionUID:
      8071706686749097693L

      • Serialized Fields

        • base

          Type base

        • mods

          java.util.EnumSet<E extends java.lang.Enum<E>> mods

    • Class xdc.services.spec.Type.Spec extends Type implements Serializable

      serialVersionUID:
      -1847725876187637108L

      • Serialized Fields

        • tref

          Ref tref

        • std

          java.lang.String std

        • isUns

          boolean isUns

        • mods

          java.util.EnumSet<E extends java.lang.Enum<E>> mods

    • Class xdc.services.spec.Unit extends Node implements Serializable

      serialVersionUID:
      -1475297028398889384L

      • Serialized Fields

        • cfgs

          java.util.List<E> cfgs

        • creator

          Decl.Fxn creator

        • curPass

          int curPass

        • custHdr

          boolean custHdr

        • decls

          java.util.List<E> decls

        • dlg

          Sup dlg

        • fxns

          java.util.List<E> fxns

        • icfgCnt

          int icfgCnt

        • ifxns

          java.util.List<E> ifxns

        • imps

          java.util.List<E> imps

        • inherits

          boolean inherits

        • iobjFlag

          boolean iobjFlag

        • isa

          Sup isa

        • mbrs

          java.util.List<E> mbrs

        • pkgName

          java.lang.String pkgName

        • proxy

          boolean proxy

        • prxs

          java.util.List<E> prxs

        • rtsFlag

          boolean rtsFlag

        • scfgCnt

          int scfgCnt

        • sizeFlag

          boolean sizeFlag

        • uses

          java.util.Set<E> uses
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Atom

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  • Summary:
  • Nested |
  • Field |
  • Constr |
  • Method
  • Detail:
  • Field |
  • Constr |
  • Method
xdc.services.spec

Class Atom

  • java.lang.Object
    • org.antlr.runtime.CommonToken
      • xdc.services.spec.Atom
  • All Implemented Interfaces:
    java.io.Serializable, org.antlr.runtime.Token

    public class Atom
extends org.antlr.runtime.CommonToken
implements java.io.Serializable
    The class that represents a token in a specification file.
    See Also:
    Serialized Form

    • Field Summary

      • Fields inherited from class org.antlr.runtime.CommonToken

        channel, charPositionInLine, index, input, start, stop, type

      • Fields inherited from interface org.antlr.runtime.Token

        DEFAULT_CHANNEL, DOWN, EOF, EOF_TOKEN, EOR_TOKEN_TYPE, HIDDEN_CHANNEL, INVALID_TOKEN, INVALID_TOKEN_TYPE, MIN_TOKEN_TYPE, SKIP_TOKEN, UP

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getFile()
      int | getLine()
      java.lang.String | getText()

      • Methods inherited from class org.antlr.runtime.CommonToken

        getChannel, getCharPositionInLine, getInputStream, getStartIndex, getStopIndex, getTokenIndex, getType, setChannel, setCharPositionInLine, setInputStream, setLine, setStartIndex, setStopIndex, setText, setTokenIndex, setType, toString

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

    • Method Detail

      • getFile

        public java.lang.String getFile()

      • getLine

        public int getLine()
        Specified by:
        getLine in interface org.antlr.runtime.Token
        Overrides:
        getLine in class org.antlr.runtime.CommonToken

      • getText

        public java.lang.String getText()
        Specified by:
        getText in interface org.antlr.runtime.Token
        Overrides:
        getText in class org.antlr.runtime.CommonToken
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Attr

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xdc.services.spec

Class Attr

  • java.lang.Object
    • xdc.services.spec.Attr
  • All Implemented Interfaces:
    java.io.Serializable

    public class Attr
extends java.lang.Object
implements java.io.Serializable
    See Also:
    Serialized Form

    • Field Summary

      Fields
      Modifier and Type | Field and Description
      static java.lang.String | A_Annex
      static java.lang.String | A_CommandOption
      static java.lang.String | A_ConstVector
      static java.lang.String | A_CustomHeader
      static java.lang.String | A_DirectCall
      static java.lang.String | A_Encoded
      static java.lang.String | A_Facet
      static java.lang.String | A_Gated
      static java.lang.String | A_GlobalNames
      static java.lang.String | A_HeaderName
      static java.lang.String | A_InstanceFinalize
      static java.lang.String | A_InstanceInitError
      static java.lang.String | A_InstanceInitStatic
      static java.lang.String | A_Macro
      static java.lang.String | A_ModuleStartup
      static java.lang.String | A_NoProxyCreate
      static java.lang.String | A_NoRuntime
      static java.lang.String | A_Opaque
      static java.lang.String | A_Prefix
      static java.lang.String | A_Proxy
      static java.lang.String | A_System
      static java.lang.String | A_TargetHeader
      static java.lang.String | A_Template
      static java.lang.String | A_Transient
      static java.lang.String | A_XmlDtd

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getName()
      Expr getVal()
      java.lang.String | toString()
      java.lang.String | toText()

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

    • Field Detail

      • A_Annex

        public static final java.lang.String A_Annex
        See Also:
        Constant Field Values

      • A_CommandOption

        public static final java.lang.String A_CommandOption
        See Also:
        Constant Field Values

      • A_ConstVector

        public static final java.lang.String A_ConstVector
        See Also:
        Constant Field Values

      • A_CustomHeader

        public static final java.lang.String A_CustomHeader
        See Also:
        Constant Field Values

      • A_DirectCall

        public static final java.lang.String A_DirectCall
        See Also:
        Constant Field Values

      • A_Encoded

        public static final java.lang.String A_Encoded
        See Also:
        Constant Field Values

      • A_Facet

        public static final java.lang.String A_Facet
        See Also:
        Constant Field Values

      • A_Gated

        public static final java.lang.String A_Gated
        See Also:
        Constant Field Values

      • A_GlobalNames

        public static final java.lang.String A_GlobalNames
        See Also:
        Constant Field Values

      • A_HeaderName

        public static final java.lang.String A_HeaderName
        See Also:
        Constant Field Values

      • A_InstanceFinalize

        public static final java.lang.String A_InstanceFinalize
        See Also:
        Constant Field Values

      • A_InstanceInitError

        public static final java.lang.String A_InstanceInitError
        See Also:
        Constant Field Values

      • A_InstanceInitStatic

        public static final java.lang.String A_InstanceInitStatic
        See Also:
        Constant Field Values

      • A_Macro

        public static final java.lang.String A_Macro
        See Also:
        Constant Field Values

      • A_ModuleStartup

        public static final java.lang.String A_ModuleStartup
        See Also:
        Constant Field Values

      • A_NoProxyCreate

        public static final java.lang.String A_NoProxyCreate
        See Also:
        Constant Field Values

      • A_NoRuntime

        public static final java.lang.String A_NoRuntime
        See Also:
        Constant Field Values

      • A_Opaque

        public static final java.lang.String A_Opaque
        See Also:
        Constant Field Values

      • A_Prefix

        public static final java.lang.String A_Prefix
        See Also:
        Constant Field Values

      • A_Proxy

        public static final java.lang.String A_Proxy
        See Also:
        Constant Field Values

      • A_System

        public static final java.lang.String A_System
        See Also:
        Constant Field Values

      • A_TargetHeader

        public static final java.lang.String A_TargetHeader
        See Also:
        Constant Field Values

      • A_Template

        public static final java.lang.String A_Template
        See Also:
        Constant Field Values

      • A_Transient

        public static final java.lang.String A_Transient
        See Also:
        Constant Field Values

      • A_XmlDtd

        public static final java.lang.String A_XmlDtd
        See Also:
        Constant Field Values

    • Method Detail

      • getName

        public final java.lang.String getName()

      • getVal

        public final Expr getVal()

      • toText

        public java.lang.String toText()

      • toString

        public java.lang.String toString()
        Overrides:
        toString in class java.lang.Object
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BrowserSession

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xdc.services.spec

Class BrowserSession

  • java.lang.Object
    • xdc.services.spec.Session
      • xdc.services.spec.BrowserSession

  • public class BrowserSession
extends Session

    • Field Summary

      • Fields inherited from class xdc.services.spec.Session

        msg

    • Constructor Summary

      Constructors
      Constructor and Description
      BrowserSession()
      Create a session to browse the current package path.
      BrowserSession(xdc.services.global.Env env)
      Create a new session with a given environment
      BrowserSession(xdc.services.global.Env env, Cache cache)
      BrowserSession(java.lang.String[] dirs)
      Create a new session with a given package path
      BrowserSession(java.lang.String[] dirs, xdc.services.global.Env env)
      Create a new session with a given package path and environment

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Pkg | findPkg(java.lang.String qn)
      boolean getLoadDocs()
      Return whether documentation is available in this session.
      int getVers()
      This function is a replacement for simply reading cmd.Builder.GREEN_VERS.
      boolean | isCurrentPkg(Pkg pkg)
      boolean | isCurrentPkg(java.lang.String cpath, java.lang.String qn)
      java.lang.String isPkgDir(java.lang.String dir)
      Check whether the named directory contains a built package.
      Pkg | loadPkg(java.lang.String dir, java.lang.String qn)
      Unit loadUnit(java.lang.String name)
      Load the named unit's spec object by searching the package path.
      java.util.Map<java.lang.String,java.lang.String> scanDirectories()
      Return a Map of package names indexed by the canonical path to the package's base.
      java.util.Map<java.lang.String,java.lang.String> scanRepositories()
      Return a Map all package base directories indexed by the package's name.
      void setLoadDocs(boolean loadDocs)
      Set whether this session should preserve docs in Nodes.

      • Methods inherited from class xdc.services.spec.Session

        findDecl, findDecl, findUnit, findUnit, getEnv, setEnv, setErr, setWarnings

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • BrowserSession

        public BrowserSession()
        Create a session to browse the current package path.

      • BrowserSession

        public BrowserSession(xdc.services.global.Env env)
        Create a new session with a given environment

      • BrowserSession

        public BrowserSession(xdc.services.global.Env env,
              Cache cache)

      • BrowserSession

        public BrowserSession(java.lang.String[] dirs)
        Create a new session with a given package path

      • BrowserSession

        public BrowserSession(java.lang.String[] dirs,
              xdc.services.global.Env env)
        Create a new session with a given package path and environment

    • Method Detail

      • getVers

        public int getVers()
        This function is a replacement for simply reading cmd.Builder.GREEN_VERS. GREEN_VERS is the value from cmd.Builder that was loaded when this class was compiled. That works well in the usual case where all packages are coming from the same version of XDCtools. However, XGconf sometimes mixes core Java classes from the latest release with packages from an older XDCtools release specified for a particular project. In that case, we want to use the green version number that corresponds to the project's XDCtools release. All packages are most likely built with that version of XDCtools and there is no reason to rebuild all packages for the latest version of XDCtools just because some of the core classes from that release are being used.
        Overrides:
        getVers in class Session

      • findPkg

        public Pkg findPkg(java.lang.String qn)
        Overrides:
        findPkg in class Session

      • isCurrentPkg

        public boolean isCurrentPkg(Pkg pkg)

      • isCurrentPkg

        public boolean isCurrentPkg(java.lang.String cpath,
                   java.lang.String qn)

      • loadPkg

        public Pkg loadPkg(java.lang.String dir,
          java.lang.String qn)

      • isPkgDir

        public java.lang.String isPkgDir(java.lang.String dir)
        Check whether the named directory contains a built package.
        Parameters:
        dir - the pathname to the directory to check.
        Returns:
        the fully qualified package name, or else null if the directory is not recognizably a built package.

      • loadUnit

        public Unit loadUnit(java.lang.String name)
        Load the named unit's spec object by searching the package path.
        Parameters:
        name - Package-qualified name of the module or interface.
        Returns:
        unit, or null if not found.

      • scanDirectories

        public java.util.Map<java.lang.String,java.lang.String> scanDirectories()
        Return a Map of package names indexed by the canonical path to the package's base.

      • scanRepositories

        public java.util.Map<java.lang.String,java.lang.String> scanRepositories()
        Return a Map all package base directories indexed by the package's name.

      • setLoadDocs

        public void setLoadDocs(boolean loadDocs)
        Set whether this session should preserve docs in Nodes. If false, spec objects loaded by this session will not contain documentation. This is a Java heap memory optimization. Default is to load documentation.

      • getLoadDocs

        public boolean getLoadDocs()
        Return whether documentation is available in this session. Default is to load documentation.
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Cache

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xdc.services.spec

Class Cache

  • java.lang.Object
    • xdc.services.spec.Cache

  • public class Cache
extends java.lang.Object
    Cache of spec objects for a session. This cache can be shared between related sessions having the same package path. For example, each BrowserSession has an associated ParserSession to handle backwards compatibility cases, and the Cache is shared in this case.

    • Constructor Summary

      Constructors
      Constructor and Description
      Cache()

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      boolean contains(Node n)
      Poll whether the cache contains an object.
      boolean contains(java.lang.String qn)
      Poll whether the cache contains the named object.
      Node get(java.lang.String qn)
      Get the cached copy of an object.
      boolean put(Node n)
      Add an object to the cache.
      boolean put(java.lang.String qn, Node n)
      Add a object to the cache with a specific qualified name.
      boolean | put(java.lang.String qn, Node n, boolean force)

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Cache

        public Cache()

    • Method Detail

      • contains

        public boolean contains(Node n)
        Poll whether the cache contains an object.

      • contains

        public boolean contains(java.lang.String qn)
        Poll whether the cache contains the named object. Useful if the Node may not yet be fully initialized, and it may not yet be possible to call getQualName().

      • put

        public boolean put(Node n)
        Add an object to the cache.
        Returns:
        true if this cache did not already contain the object

      • put

        public boolean put(java.lang.String qn,
          Node n)
        Add a object to the cache with a specific qualified name. Useful if the Node is not yet fully initialized, and it may not yet be possible to call getQualName(). If the name is known by out-of-band means then it can still be added to the cache.
        Returns:
        true if this cache did not already contain the object

      • put

        public boolean put(java.lang.String qn,
          Node n,
          boolean force)

      • get

        public Node get(java.lang.String qn)
        Get the cached copy of an object. If the object is already in the cache, return it.
        Returns:
        the cached equivalent of this object, or null.
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Decl

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xdc.services.spec

Class Decl

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>
    Direct Known Subclasses:
    Decl.Arg, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.Proxy, Decl.Struct, Decl.Typedef

    public class Decl
extends Node
    See Also:
    Serialized Form

    • Nested Class Summary

      Nested Classes
      Modifier and Type | Class and Description
      static interface  | Decl.Annexable
      static class  | Decl.Arg
      static interface  | Decl.AuxDef
      static class  | Decl.Config
      static class  | Decl.Const
      static class  | Decl.Enum
      static class  | Decl.EnumVal
      static class  | Decl.Extern
      static class  | Decl.Field
      static class  | Decl.Fxn
      static interface  | Decl.IsType
      static interface  | Decl.LocalUnit
      static interface  | Decl.OverridableDef
      static class  | Decl.Proxy
      static interface  | Decl.Signature
      static interface  | Decl.Sizeable
      static class  | Decl.Struct
      static class  | Decl.Typedef

    • Constructor Summary

      Constructors
      Constructor and Description
      Decl()

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<? extends Decl> | getChildren()
      java.lang.String | getQualName()
      java.lang.String | getXmlTag()
      static Decl.Signature.ObjKind | objKind(Decl.Signature sig)
      static Decl.Signature.ObjKind | objKind(Type type, java.lang.String tcode)
      Decl overrides()

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Decl

        public Decl()

    • Method Detail

      • overrides

        public Decl overrides()

      • getChildren

        public java.util.List<? extends Decl> getChildren()
        Specified by:
        getChildren in class Node

      • getQualName

        public java.lang.String getQualName()
        Specified by:
        getQualName in class Node

      • getXmlTag

        public java.lang.String getXmlTag()
        Specified by:
        getXmlTag in class Node

      • objKind

        public static final Decl.Signature.ObjKind objKind(Decl.Signature sig)

      • objKind

        public static final Decl.Signature.ObjKind objKind(Type type,
                             java.lang.String tcode)
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Decl.Annexable

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xdc.services.spec

Interface Decl.Annexable

  • All Known Implementing Classes:
    Decl.Config, Decl.Fxn
    Enclosing class:
    Decl

    public static interface Decl.Annexable
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Decl.Arg

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xdc.services.spec

Class Decl.Arg

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Arg
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.Signature
    Enclosing class:
    Decl

    public static class Decl.Arg
extends Decl
implements Decl.Signature
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

      • Nested classes/interfaces inherited from interface xdc.services.spec.Decl.Signature

        Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Expr getInit()
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()
      void | setAtom(java.lang.String name)

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getInit

        public final Expr getInit()

      • getType

        public final Type getType()
        Specified by:
        getType in interface Decl.Signature

      • getTypeCode

        public final java.lang.String getTypeCode()
        Specified by:
        getTypeCode in interface Decl.Signature

      • getTypeSig

        public final java.lang.String getTypeSig()
        Specified by:
        getTypeSig in interface Decl.Signature

      • setAtom

        public final void setAtom(java.lang.String name)
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Decl.AuxDef

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xdc.services.spec

Interface Decl.AuxDef

  • All Known Implementing Classes:
    Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Struct, Decl.Typedef
    Enclosing class:
    Decl

    public static interface Decl.AuxDef
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Decl.Config

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xdc.services.spec

Class Decl.Config

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Config
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.Annexable, Decl.Signature
    Enclosing class:
    Decl

    public static class Decl.Config
extends Decl
implements Decl.Annexable, Decl.Signature
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

      • Nested classes/interfaces inherited from interface xdc.services.spec.Decl.Signature

        Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Expr getInit()
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()
      Decl.Config overrides()

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getInit

        public final Expr getInit()

      • getType

        public final Type getType()
        Specified by:
        getType in interface Decl.Signature

      • getTypeCode

        public final java.lang.String getTypeCode()
        Specified by:
        getTypeCode in interface Decl.Signature

      • getTypeSig

        public final java.lang.String getTypeSig()
        Specified by:
        getTypeSig in interface Decl.Signature

      • overrides

        public final Decl.Config overrides()
        Overrides:
        overrides in class Decl
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Decl.Const

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xdc.services.spec

Class Decl.Const

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Const
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.AuxDef, Decl.OverridableDef, Decl.Signature
    Enclosing class:
    Decl

    public static class Decl.Const
extends Decl
implements Decl.AuxDef, Decl.OverridableDef, Decl.Signature
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

      • Nested classes/interfaces inherited from interface xdc.services.spec.Decl.Signature

        Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Expr getInit()
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getInit

        public final Expr getInit()

      • getType

        public final Type getType()
        Specified by:
        getType in interface Decl.Signature

      • getTypeCode

        public final java.lang.String getTypeCode()
        Specified by:
        getTypeCode in interface Decl.Signature

      • getTypeSig

        public final java.lang.String getTypeSig()
        Specified by:
        getTypeSig in interface Decl.Signature
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Decl.Enum

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xdc.services.spec

Class Decl.Enum

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Enum
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.AuxDef, Decl.IsType, Decl.Sizeable
    Enclosing class:
    Decl

    public static class Decl.Enum
extends Decl
implements Decl.AuxDef, Decl.IsType, Decl.Sizeable
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<Decl.EnumVal> | getChildren()
      Type.Spec getRep()
      java.util.List<Decl.EnumVal> | getVals()
      void | sizeof(java.util.List<java.lang.String> sL)

      • Methods inherited from class xdc.services.spec.Decl

        getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getChildren

        public java.util.List<Decl.EnumVal> getChildren()
        Overrides:
        getChildren in class Decl

      • getRep

        public final Type.Spec getRep()

      • getVals

        public final java.util.List<Decl.EnumVal> getVals()

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Specified by:
        sizeof in interface Decl.Sizeable
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Decl.EnumVal

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xdc.services.spec

Class Decl.EnumVal

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.EnumVal
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.AuxDef
    Enclosing class:
    Decl

    public static class Decl.EnumVal
extends Decl
implements Decl.AuxDef
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

    • Method Summary

      Methods
      Modifier and Type Method and Description
      Expr getInit()

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getInit

        public final Expr getInit()
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Decl.Extern

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xdc.services.spec

Class Decl.Extern

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Extern
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.AuxDef, Decl.Signature
    Enclosing class:
    Decl

    public static class Decl.Extern
extends Decl
implements Decl.AuxDef, Decl.Signature
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

      • Nested classes/interfaces inherited from interface xdc.services.spec.Decl.Signature

        Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()
      java.lang.String | getValue()

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getType

        public final Type getType()
        Specified by:
        getType in interface Decl.Signature

      • getTypeCode

        public final java.lang.String getTypeCode()
        Specified by:
        getTypeCode in interface Decl.Signature

      • getTypeSig

        public final java.lang.String getTypeSig()
        Specified by:
        getTypeSig in interface Decl.Signature

      • getValue

        public final java.lang.String getValue()
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Decl.Field

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xdc.services.spec

Class Decl.Field

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Field
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.Signature
    Enclosing class:
    Decl

    public static class Decl.Field
extends Decl
implements Decl.Signature
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

      • Nested classes/interfaces inherited from interface xdc.services.spec.Decl.Signature

        Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getType

        public final Type getType()
        Specified by:
        getType in interface Decl.Signature

      • getTypeCode

        public final java.lang.String getTypeCode()
        Specified by:
        getTypeCode in interface Decl.Signature

      • getTypeSig

        public final java.lang.String getTypeSig()
        Specified by:
        getTypeSig in interface Decl.Signature
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Decl.Fxn

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xdc.services.spec

Class Decl.Fxn

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Fxn
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.Annexable, Decl.Signature
    Enclosing class:
    Decl

    public static class Decl.Fxn
extends Decl
implements Decl.Annexable, Decl.Signature
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

      • Nested classes/interfaces inherited from interface xdc.services.spec.Decl.Signature

        Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<Decl.Arg> | getArgs()
      java.util.List<Decl.Arg> | getChildren()
      int | getMinArgc()
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()
      boolean | isLoggable()
      boolean | isVarg()
      Decl.Fxn overrides()

      • Methods inherited from class xdc.services.spec.Decl

        getQualName, getXmlTag, objKind, objKind

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getArgs

        public final java.util.List<Decl.Arg> getArgs()

      • getChildren

        public java.util.List<Decl.Arg> getChildren()
        Overrides:
        getChildren in class Decl

      • getMinArgc

        public final int getMinArgc()

      • getType

        public final Type getType()
        Specified by:
        getType in interface Decl.Signature

      • getTypeCode

        public final java.lang.String getTypeCode()
        Specified by:
        getTypeCode in interface Decl.Signature

      • getTypeSig

        public final java.lang.String getTypeSig()
        Specified by:
        getTypeSig in interface Decl.Signature

      • isLoggable

        public final boolean isLoggable()

      • isVarg

        public final boolean isVarg()

      • overrides

        public final Decl.Fxn overrides()
        Overrides:
        overrides in class Decl
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Decl.IsType

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xdc.services.spec

Interface Decl.IsType

  • All Known Implementing Classes:
    Decl.Enum, Decl.Struct, Decl.Typedef
    Enclosing class:
    Decl

    public static interface Decl.IsType
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Decl.LocalUnit

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xdc.services.spec

Interface Decl.LocalUnit

  • All Known Implementing Classes:
    Decl.Proxy
    Enclosing class:
    Decl

    public static interface Decl.LocalUnit

    • Method Summary

      Methods
      Modifier and Type Method and Description
      Unit getUnit()

    • Method Detail

      • getUnit

        Unit getUnit()
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Decl.OverridableDef

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xdc.services.spec

Interface Decl.OverridableDef

  • All Known Implementing Classes:
    Decl.Const
    Enclosing class:
    Decl

    public static interface Decl.OverridableDef
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Decl.Proxy

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xdc.services.spec

Class Decl.Proxy

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Proxy
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.LocalUnit
    Enclosing class:
    Decl

    public static class Decl.Proxy
extends Decl
implements Decl.LocalUnit
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

    • Method Summary

      Methods
      Modifier and Type Method and Description
      Unit getInherits()
      Unit getUnit()

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getInherits

        public final Unit getInherits()

      • getUnit

        public final Unit getUnit()
        Specified by:
        getUnit in interface Decl.LocalUnit
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Decl.Signature

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xdc.services.spec

Interface Decl.Signature

  • All Known Implementing Classes:
    Decl.Arg, Decl.Config, Decl.Const, Decl.Extern, Decl.Field, Decl.Fxn, Decl.Typedef
    Enclosing class:
    Decl

    public static interface Decl.Signature

    • Nested Class Summary

      Nested Classes
      Modifier and Type | Interface and Description
      static class  | Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()

    • Method Detail

      • getType

        Type getType()

      • getTypeCode

        java.lang.String getTypeCode()

      • getTypeSig

        java.lang.String getTypeSig()
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Decl.Signature.ObjKind

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xdc.services.spec

Enum Decl.Signature.ObjKind

  • java.lang.Object
    • java.lang.Enum<Decl.Signature.ObjKind>
      • xdc.services.spec.Decl.Signature.ObjKind
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Decl.Signature.ObjKind>
    Enclosing interface:
    Decl.Signature

    public static enum Decl.Signature.ObjKind
extends java.lang.Enum<Decl.Signature.ObjKind>

    • Enum Constant Summary

      Enum Constants
      Enum Constant and Description
      ARRAY
      NONE
      SINGLE

    • Method Summary

      Methods
      Modifier and Type Method and Description
      static Decl.Signature.ObjKind valueOf(java.lang.String name)
      Returns the enum constant of this type with the specified name.
      static Decl.Signature.ObjKind[] values()
      Returns an array containing the constants of this enum type, in the order they are declared.

      • Methods inherited from class java.lang.Enum

        clone, compareTo, equals, finalize, getDeclaringClass, hashCode, name, ordinal, toString, valueOf

      • Methods inherited from class java.lang.Object

        getClass, notify, notifyAll, wait, wait, wait

    • Enum Constant Detail

      • NONE

        public static final Decl.Signature.ObjKind NONE

      • SINGLE

        public static final Decl.Signature.ObjKind SINGLE

      • ARRAY

        public static final Decl.Signature.ObjKind ARRAY

    • Method Detail

      • values

        public static Decl.Signature.ObjKind[] values()
        Returns an array containing the constants of this enum type, in the order they are declared. This method may be used to iterate over the constants as follows:
        for (Decl.Signature.ObjKind c : Decl.Signature.ObjKind.values())
    System.out.println(c);
        Returns:
        an array containing the constants of this enum type, in the order they are declared

      • valueOf

        public static Decl.Signature.ObjKind valueOf(java.lang.String name)
        Returns the enum constant of this type with the specified name. The string must match exactly an identifier used to declare an enum constant in this type. (Extraneous whitespace characters are not permitted.)
        Parameters:
        name - the name of the enum constant to be returned.
        Returns:
        the enum constant with the specified name
        Throws:
        java.lang.IllegalArgumentException - if this enum type has no constant with the specified name
        java.lang.NullPointerException - if the argument is null
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Decl.Sizeable

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xdc.services.spec

Interface Decl.Sizeable

  • All Known Implementing Classes:
    Decl.Enum, Decl.Struct, Decl.Typedef
    Enclosing class:
    Decl

    public static interface Decl.Sizeable

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      void | sizeof(java.util.List<java.lang.String> sL)

    • Method Detail

      • sizeof

        void sizeof(java.util.List<java.lang.String> sL)
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Decl.Struct

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xdc.services.spec

Class Decl.Struct

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Struct
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.AuxDef, Decl.IsType, Decl.Sizeable
    Enclosing class:
    Decl

    public static class Decl.Struct
extends Decl
implements Decl.AuxDef, Decl.IsType, Decl.Sizeable
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<Decl.Field> | getChildren()
      java.util.List<Decl.Field> | getFields()
      java.util.List<java.lang.String> | getSizes()
      java.lang.String | getXmlTag()
      boolean | isAnon()
      boolean | isUnion()
      void | sizeof(java.util.List<java.lang.String> sL)

      • Methods inherited from class xdc.services.spec.Decl

        getQualName, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getChildren

        public java.util.List<Decl.Field> getChildren()
        Overrides:
        getChildren in class Decl

      • getFields

        public final java.util.List<Decl.Field> getFields()

      • getSizes

        public final java.util.List<java.lang.String> getSizes()

      • getXmlTag

        public java.lang.String getXmlTag()
        Overrides:
        getXmlTag in class Decl

      • isAnon

        public final boolean isAnon()

      • isUnion

        public final boolean isUnion()

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Specified by:
        sizeof in interface Decl.Sizeable
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Decl.Typedef

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xdc.services.spec

Class Decl.Typedef

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Typedef
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>, Decl.AuxDef, Decl.IsType, Decl.Signature, Decl.Sizeable
    Enclosing class:
    Decl

    public static class Decl.Typedef
extends Decl
implements Decl.AuxDef, Decl.IsType, Decl.Signature, Decl.Sizeable
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Decl

        Decl.Annexable, Decl.Arg, Decl.AuxDef, Decl.Config, Decl.Const, Decl.Enum, Decl.EnumVal, Decl.Extern, Decl.Field, Decl.Fxn, Decl.IsType, Decl.LocalUnit, Decl.OverridableDef, Decl.Proxy, Decl.Signature, Decl.Sizeable, Decl.Struct, Decl.Typedef

      • Nested classes/interfaces inherited from interface xdc.services.spec.Decl.Signature

        Decl.Signature.ObjKind

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Type getType()
      java.lang.String | getTypeCode()
      java.lang.String | getTypeSig()
      void | sizeof(java.util.List<java.lang.String> sL)

      • Methods inherited from class xdc.services.spec.Decl

        getChildren, getQualName, getXmlTag, objKind, objKind, overrides

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getPkgName, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getType

        public final Type getType()
        Specified by:
        getType in interface Decl.Signature

      • getTypeCode

        public final java.lang.String getTypeCode()
        Specified by:
        getTypeCode in interface Decl.Signature

      • getTypeSig

        public final java.lang.String getTypeSig()
        Specified by:
        getTypeSig in interface Decl.Signature

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Specified by:
        sizeof in interface Decl.Sizeable
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DocComment

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xdc.services.spec

Class DocComment

  • java.lang.Object
    • xdc.services.spec.DocComment
  • All Implemented Interfaces:
    java.io.Serializable

    public class DocComment
extends java.lang.Object
implements java.io.Serializable
    See Also:
    Serialized Form

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getArg()
      java.lang.String | getBody()
      java.lang.String | getMode()
      int | getParId()
      java.lang.String | getTag()
      static java.lang.Boolean isParsed(java.util.List<DocComment> docs)
      Identify whether the given list of comments has already been parsed.

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getArg

        public final java.lang.String getArg()

      • getBody

        public final java.lang.String getBody()

      • getMode

        public final java.lang.String getMode()

      • getTag

        public final java.lang.String getTag()

      • getParId

        public final int getParId()

      • isParsed

        public static java.lang.Boolean isParsed(java.util.List<DocComment> docs)
        Identify whether the given list of comments has already been parsed.
        Parameters:
        docs - The list of comments to inspect.
        Returns:
        true if the list has already been parsed.
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Expr

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xdc.services.spec

Class Expr

  • java.lang.Object
    • xdc.services.spec.Expr
  • All Implemented Interfaces:
    java.io.Serializable
    Direct Known Subclasses:
    Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    public class Expr
extends java.lang.Object
implements java.io.Serializable
    See Also:
    Serialized Form

    • Nested Class Summary

      Nested Classes
      Modifier and Type | Class and Description
      static interface  | Expr.Aggregate
      static class  | Expr.Array
      static class  | Expr.Binary
      static class  | Expr.Cond
      static class  | Expr.Const
      static class  | Expr.Creat
      static class  | Expr.Hash
      static class  | Expr.Paren
      static class  | Expr.Term
      static class  | Expr.Unary

    • Constructor Summary

      Constructors
      Constructor and Description
      Expr()

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Expr.Term getTerm()
      static java.lang.String | toText(Expr e)
      static java.lang.String | toXml(Expr e)

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Expr

        public Expr()

    • Method Detail

      • getTerm

        public Expr.Term getTerm()

      • toText

        public static final java.lang.String toText(Expr e)

      • toXml

        public static final java.lang.String toXml(Expr e)
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Expr.Aggregate

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xdc.services.spec

Interface Expr.Aggregate

  • All Known Implementing Classes:
    Expr.Array, Expr.Hash
    Enclosing class:
    Expr

    public static interface Expr.Aggregate

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      boolean | isEmpty()

    • Method Detail

      • isEmpty

        boolean isEmpty()
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Expr.Array

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xdc.services.spec

Class Expr.Array

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Array
  • All Implemented Interfaces:
    java.io.Serializable, Expr.Aggregate
    Enclosing class:
    Expr

    public static class Expr.Array
extends Expr
implements Expr.Aggregate
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<Expr> | getElems()
      boolean | isEmpty()

      • Methods inherited from class xdc.services.spec.Expr

        getTerm, toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getElems

        public final java.util.List<Expr> getElems()

      • isEmpty

        public boolean isEmpty()
        Specified by:
        isEmpty in interface Expr.Aggregate
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Expr.Binary

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xdc.services.spec

Class Expr.Binary

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Binary
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Expr

    public static class Expr.Binary
extends Expr
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Expr getLeft()
      java.lang.String | getOp()
      Expr getRight()

      • Methods inherited from class xdc.services.spec.Expr

        getTerm, toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getLeft

        public final Expr getLeft()

      • getOp

        public final java.lang.String getOp()

      • getRight

        public final Expr getRight()
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Expr.Cond

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xdc.services.spec

Class Expr.Cond

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Cond
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Expr

    public static class Expr.Cond
extends Expr
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type Method and Description
      Expr getCond()
      Expr getLeft()
      Expr getRight()

      • Methods inherited from class xdc.services.spec.Expr

        getTerm, toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getCond

        public final Expr getCond()

      • getLeft

        public final Expr getLeft()

      • getRight

        public final Expr getRight()
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Expr.Const

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xdc.services.spec

Class Expr.Const

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Const
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Expr

    public static class Expr.Const
extends Expr
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getVal()

      • Methods inherited from class xdc.services.spec.Expr

        getTerm, toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getVal

        public final java.lang.String getVal()
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Expr.Creat

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xdc.services.spec

Class Expr.Creat

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Creat
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Expr

    public static class Expr.Creat
extends Expr
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<Expr> | getArgs()
      Expr.Term getMod()
      Expr.Term getTerm()

      • Methods inherited from class xdc.services.spec.Expr

        toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getArgs

        public final java.util.List<Expr> getArgs()

      • getMod

        public final Expr.Term getMod()

      • getTerm

        public Expr.Term getTerm()
        Overrides:
        getTerm in class Expr
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Expr.Hash

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xdc.services.spec

Class Expr.Hash

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Hash
  • All Implemented Interfaces:
    java.io.Serializable, Expr.Aggregate
    Enclosing class:
    Expr

    public static class Expr.Hash
extends Expr
implements Expr.Aggregate
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<Atom> | getIds()
      java.util.List<Expr> | getVals()
      boolean | isEmpty()

      • Methods inherited from class xdc.services.spec.Expr

        getTerm, toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getIds

        public final java.util.List<Atom> getIds()

      • getVals

        public final java.util.List<Expr> getVals()

      • isEmpty

        public boolean isEmpty()
        Specified by:
        isEmpty in interface Expr.Aggregate
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Expr.Paren

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xdc.services.spec

Class Expr.Paren

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Paren
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Expr

    public static class Expr.Paren
extends Expr
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type Method and Description
      Expr getBody()
      Expr.Term getTerm()

      • Methods inherited from class xdc.services.spec.Expr

        toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getBody

        public final Expr getBody()

      • getTerm

        public Expr.Term getTerm()
        Overrides:
        getTerm in class Expr
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Expr.Term

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xdc.services.spec

Class Expr.Term

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Term
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Expr

    public static class Expr.Term
extends Expr
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type Method and Description
      Ref getRef()
      Expr.Term getTerm()
      Expr getVal()

      • Methods inherited from class xdc.services.spec.Expr

        toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getRef

        public final Ref getRef()

      • getTerm

        public Expr.Term getTerm()
        Overrides:
        getTerm in class Expr

      • getVal

        public final Expr getVal()
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Expr.Unary

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xdc.services.spec

Class Expr.Unary

  • java.lang.Object
    • xdc.services.spec.Expr
      • xdc.services.spec.Expr.Unary
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Expr

    public static class Expr.Unary
extends Expr
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Expr

        Expr.Aggregate, Expr.Array, Expr.Binary, Expr.Cond, Expr.Const, Expr.Creat, Expr.Hash, Expr.Paren, Expr.Term, Expr.Unary

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getOp()
      Expr getRight()

      • Methods inherited from class xdc.services.spec.Expr

        getTerm, toText, toXml

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getOp

        public final java.lang.String getOp()

      • getRight

        public final Expr getRight()
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GrammarLexer

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xdc.services.spec

Class GrammarLexer

  • java.lang.Object
    • org.antlr.runtime.BaseRecognizer
      • org.antlr.runtime.Lexer
        • xdc.services.spec.GrammarLexer
  • All Implemented Interfaces:
    org.antlr.runtime.TokenSource

    public class GrammarLexer
extends org.antlr.runtime.Lexer

    • Field Summary

      Fields
      Modifier and Type | Field and Description
      static int | AMP
      static int | AMPAMP
      static int | ATTR
      static int | BANG
      static int | BANGEQ
      static int | BAR
      static int | BARBAR
      static int | CAR
      static int | CHAR
      static int | COLON
      static int | COMMA
      static int | D
      protected xdc.services.spec.GrammarLexer.DFA35 | dfa35
      protected xdc.services.spec.GrammarLexer.DFA36 | dfa36
      static int | DIV
      static int | DOC_BLK
      static int | DOC_INL
      static int | DOC_PRE
      static int | DOC_SUF
      static int | DOT
      static int | E
      static int | ELIPSIS
      static int | EOF
      static int | EQ
      static int | EQEQ
      static int | GT
      static int | GTEQ
      static int | GTGT
      static int | H
      static int | ID
      static int | IDENT
      static int | LBRK
      static int | LCUR
      static int | LPAR
      static int | LT
      static int | LTEQ
      static int | LTLT
      static int | LU
      static int | MIN
      static int | ML_COMMENT
      static int | NUM
      static int | OPER
      static int | PATH
      static int | PATHSTAR
      static int | PCT
      static int | PLUS
      static int | QUEST
      static int | R
      static int | RBRK
      static int | RCUR
      static int | RPAR
      static int | SEMI
      static int | SL_COMMENT
      static int | STAR
      static int | STRING
      static int | T__100
      static int | T__101
      static int | T__102
      static int | T__103
      static int | T__104
      static int | T__105
      static int | T__106
      static int | T__107
      static int | T__108
      static int | T__109
      static int | T__110
      static int | T__111
      static int | T__112
      static int | T__113
      static int | T__114
      static int | T__115
      static int | T__116
      static int | T__117
      static int | T__118
      static int | T__119
      static int | T__120
      static int | T__121
      static int | T__122
      static int | T__123
      static int | T__124
      static int | T__125
      static int | T__126
      static int | T__127
      static int | T__128
      static int | T__129
      static int | T__130
      static int | T__131
      static int | T__132
      static int | T__133
      static int | T__134
      static int | T__135
      static int | T__136
      static int | T__137
      static int | T__138
      static int | T__58
      static int | T__59
      static int | T__60
      static int | T__61
      static int | T__62
      static int | T__63
      static int | T__64
      static int | T__65
      static int | T__66
      static int | T__67
      static int | T__68
      static int | T__69
      static int | T__70
      static int | T__71
      static int | T__72
      static int | T__73
      static int | T__74
      static int | T__75
      static int | T__76
      static int | T__77
      static int | T__78
      static int | T__79
      static int | T__80
      static int | T__81
      static int | T__82
      static int | T__83
      static int | T__84
      static int | T__85
      static int | T__86
      static int | T__87
      static int | T__88
      static int | T__89
      static int | T__90
      static int | T__91
      static int | T__92
      static int | T__93
      static int | T__94
      static int | T__95
      static int | T__96
      static int | T__97
      static int | T__98
      static int | T__99
      static int | TILDE
      static int | WS

      • Fields inherited from class org.antlr.runtime.Lexer

        input

      • Fields inherited from class org.antlr.runtime.BaseRecognizer

        DEFAULT_TOKEN_CHANNEL, HIDDEN, INITIAL_FOLLOW_STACK_SIZE, MEMO_RULE_FAILED, MEMO_RULE_UNKNOWN, NEXT_TOKEN_RULE_NAME, state

    • Constructor Summary

      Constructors
      Constructor and Description
      GrammarLexer()
      GrammarLexer(org.antlr.runtime.CharStream input)
      GrammarLexer(org.antlr.runtime.CharStream input, org.antlr.runtime.RecognizerSharedState state)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getGrammarFileName()
      void | mAMP()
      void | mAMPAMP()
      void | mATTR()
      void | mBANG()
      void | mBANGEQ()
      void | mBAR()
      void | mBARBAR()
      void | mCAR()
      void | mCHAR()
      void | mCOLON()
      void | mCOMMA()
      void | mD()
      void | mDIV()
      void | mDOC_BLK()
      void | mDOC_INL()
      void | mDOC_PRE()
      void | mDOC_SUF()
      void | mDOT()
      void | mE()
      void | mELIPSIS()
      void | mEQ()
      void | mEQEQ()
      void | mGT()
      void | mGTEQ()
      void | mGTGT()
      void | mH()
      void | mID()
      void | mIDENT()
      void | mLBRK()
      void | mLCUR()
      void | mLPAR()
      void | mLT()
      void | mLTEQ()
      void | mLTLT()
      void | mLU()
      void | mMIN()
      void | mML_COMMENT()
      void | mNUM()
      void | mOPER()
      void | mPATH()
      void | mPATHSTAR()
      void | mPCT()
      void | mPLUS()
      void | mQUEST()
      void | mR()
      void | mRBRK()
      void | mRCUR()
      void | mRPAR()
      void | mSEMI()
      void | mSL_COMMENT()
      void | mSTAR()
      void | mSTRING()
      void | mT__100()
      void | mT__101()
      void | mT__102()
      void | mT__103()
      void | mT__104()
      void | mT__105()
      void | mT__106()
      void | mT__107()
      void | mT__108()
      void | mT__109()
      void | mT__110()
      void | mT__111()
      void | mT__112()
      void | mT__113()
      void | mT__114()
      void | mT__115()
      void | mT__116()
      void | mT__117()
      void | mT__118()
      void | mT__119()
      void | mT__120()
      void | mT__121()
      void | mT__122()
      void | mT__123()
      void | mT__124()
      void | mT__125()
      void | mT__126()
      void | mT__127()
      void | mT__128()
      void | mT__129()
      void | mT__130()
      void | mT__131()
      void | mT__132()
      void | mT__133()
      void | mT__134()
      void | mT__135()
      void | mT__136()
      void | mT__137()
      void | mT__138()
      void | mT__58()
      void | mT__59()
      void | mT__60()
      void | mT__61()
      void | mT__62()
      void | mT__63()
      void | mT__64()
      void | mT__65()
      void | mT__66()
      void | mT__67()
      void | mT__68()
      void | mT__69()
      void | mT__70()
      void | mT__71()
      void | mT__72()
      void | mT__73()
      void | mT__74()
      void | mT__75()
      void | mT__76()
      void | mT__77()
      void | mT__78()
      void | mT__79()
      void | mT__80()
      void | mT__81()
      void | mT__82()
      void | mT__83()
      void | mT__84()
      void | mT__85()
      void | mT__86()
      void | mT__87()
      void | mT__88()
      void | mT__89()
      void | mT__90()
      void | mT__91()
      void | mT__92()
      void | mT__93()
      void | mT__94()
      void | mT__95()
      void | mT__96()
      void | mT__97()
      void | mT__98()
      void | mT__99()
      void | mTILDE()
      void | mTokens()
      void | mWS()

      • Methods inherited from class org.antlr.runtime.Lexer

        emit, emit, getCharErrorDisplay, getCharIndex, getCharPositionInLine, getCharStream, getErrorMessage, getLine, getSourceName, getText, match, match, matchAny, matchRange, nextToken, recover, reportError, reset, setCharStream, setText, skip, traceIn, traceOut

      • Methods inherited from class org.antlr.runtime.BaseRecognizer

        alreadyParsedRule, beginResync, combineFollows, computeContextSensitiveRuleFOLLOW, computeErrorRecoverySet, consumeUntil, consumeUntil, displayRecognitionError, emitErrorMessage, endResync, getBacktrackingLevel, getCurrentInputSymbol, getErrorHeader, getMissingSymbol, getNumberOfSyntaxErrors, getRuleInvocationStack, getRuleInvocationStack, getRuleMemoization, getRuleMemoizationCacheSize, getTokenErrorDisplay, getTokenNames, match, matchAny, memoize, mismatch, mismatchIsMissingToken, mismatchIsUnwantedToken, pushFollow, recover, recoverFromMismatchedSet, recoverFromMismatchedToken, toStrings, traceIn, traceOut

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Field Detail

      • LU

        public static final int LU
        See Also:
        Constant Field Values

      • LT

        public static final int LT
        See Also:
        Constant Field Values

      • STAR

        public static final int STAR
        See Also:
        Constant Field Values

      • CHAR

        public static final int CHAR
        See Also:
        Constant Field Values

      • EOF

        public static final int EOF
        See Also:
        Constant Field Values

      • GTGT

        public static final int GTGT
        See Also:
        Constant Field Values

      • QUEST

        public static final int QUEST
        See Also:
        Constant Field Values

      • T__93

        public static final int T__93
        See Also:
        Constant Field Values

      • T__94

        public static final int T__94
        See Also:
        Constant Field Values

      • T__91

        public static final int T__91
        See Also:
        Constant Field Values

      • T__92

        public static final int T__92
        See Also:
        Constant Field Values

      • DOC_SUF

        public static final int DOC_SUF
        See Also:
        Constant Field Values

      • T__90

        public static final int T__90
        See Also:
        Constant Field Values

      • LPAR

        public static final int LPAR
        See Also:
        Constant Field Values

      • PATH

        public static final int PATH
        See Also:
        Constant Field Values

      • BARBAR

        public static final int BARBAR
        See Also:
        Constant Field Values

      • EQ

        public static final int EQ
        See Also:
        Constant Field Values

      • AMPAMP

        public static final int AMPAMP
        See Also:
        Constant Field Values

      • RBRK

        public static final int RBRK
        See Also:
        Constant Field Values

      • T__99

        public static final int T__99
        See Also:
        Constant Field Values

      • T__98

        public static final int T__98
        See Also:
        Constant Field Values

      • T__97

        public static final int T__97
        See Also:
        Constant Field Values

      • T__96

        public static final int T__96
        See Also:
        Constant Field Values

      • EQEQ

        public static final int EQEQ
        See Also:
        Constant Field Values

      • T__95

        public static final int T__95
        See Also:
        Constant Field Values

      • D

        public static final int D
        See Also:
        Constant Field Values

      • T__138

        public static final int T__138
        See Also:
        Constant Field Values

      • E

        public static final int E
        See Also:
        Constant Field Values

      • T__137

        public static final int T__137
        See Also:
        Constant Field Values

      • T__136

        public static final int T__136
        See Also:
        Constant Field Values

      • T__80

        public static final int T__80
        See Also:
        Constant Field Values

      • T__81

        public static final int T__81
        See Also:
        Constant Field Values

      • T__82

        public static final int T__82
        See Also:
        Constant Field Values

      • T__83

        public static final int T__83
        See Also:
        Constant Field Values

      • LCUR

        public static final int LCUR
        See Also:
        Constant Field Values

      • H

        public static final int H
        See Also:
        Constant Field Values

      • DOC_INL

        public static final int DOC_INL
        See Also:
        Constant Field Values

      • R

        public static final int R
        See Also:
        Constant Field Values

      • DOC_PRE

        public static final int DOC_PRE
        See Also:
        Constant Field Values

      • T__85

        public static final int T__85
        See Also:
        Constant Field Values

      • T__84

        public static final int T__84
        See Also:
        Constant Field Values

      • T__87

        public static final int T__87
        See Also:
        Constant Field Values

      • T__86

        public static final int T__86
        See Also:
        Constant Field Values

      • T__89

        public static final int T__89
        See Also:
        Constant Field Values

      • T__88

        public static final int T__88
        See Also:
        Constant Field Values

      • T__126

        public static final int T__126
        See Also:
        Constant Field Values

      • T__125

        public static final int T__125
        See Also:
        Constant Field Values

      • T__128

        public static final int T__128
        See Also:
        Constant Field Values

      • T__127

        public static final int T__127
        See Also:
        Constant Field Values

      • WS

        public static final int WS
        See Also:
        Constant Field Values

      • T__71

        public static final int T__71
        See Also:
        Constant Field Values

      • T__72

        public static final int T__72
        See Also:
        Constant Field Values

      • T__129

        public static final int T__129
        See Also:
        Constant Field Values

      • DOC_BLK

        public static final int DOC_BLK
        See Also:
        Constant Field Values

      • T__70

        public static final int T__70
        See Also:
        Constant Field Values

      • SL_COMMENT

        public static final int SL_COMMENT
        See Also:
        Constant Field Values

      • GT

        public static final int GT
        See Also:
        Constant Field Values

      • T__76

        public static final int T__76
        See Also:
        Constant Field Values

      • T__75

        public static final int T__75
        See Also:
        Constant Field Values

      • T__74

        public static final int T__74
        See Also:
        Constant Field Values

      • T__130

        public static final int T__130
        See Also:
        Constant Field Values

      • T__73

        public static final int T__73
        See Also:
        Constant Field Values

      • T__131

        public static final int T__131
        See Also:
        Constant Field Values

      • T__132

        public static final int T__132
        See Also:
        Constant Field Values

      • T__79

        public static final int T__79
        See Also:
        Constant Field Values

      • T__133

        public static final int T__133
        See Also:
        Constant Field Values

      • T__78

        public static final int T__78
        See Also:
        Constant Field Values

      • T__134

        public static final int T__134
        See Also:
        Constant Field Values

      • ELIPSIS

        public static final int ELIPSIS
        See Also:
        Constant Field Values

      • T__77

        public static final int T__77
        See Also:
        Constant Field Values

      • T__135

        public static final int T__135
        See Also:
        Constant Field Values

      • T__68

        public static final int T__68
        See Also:
        Constant Field Values

      • T__69

        public static final int T__69
        See Also:
        Constant Field Values

      • T__66

        public static final int T__66
        See Also:
        Constant Field Values

      • T__67

        public static final int T__67
        See Also:
        Constant Field Values

      • T__64

        public static final int T__64
        See Also:
        Constant Field Values

      • T__65

        public static final int T__65
        See Also:
        Constant Field Values

      • T__62

        public static final int T__62
        See Also:
        Constant Field Values

      • T__63

        public static final int T__63
        See Also:
        Constant Field Values

      • AMP

        public static final int AMP
        See Also:
        Constant Field Values

      • T__118

        public static final int T__118
        See Also:
        Constant Field Values

      • T__119

        public static final int T__119
        See Also:
        Constant Field Values

      • T__116

        public static final int T__116
        See Also:
        Constant Field Values

      • T__117

        public static final int T__117
        See Also:
        Constant Field Values

      • T__114

        public static final int T__114
        See Also:
        Constant Field Values

      • LTEQ

        public static final int LTEQ
        See Also:
        Constant Field Values

      • T__115

        public static final int T__115
        See Also:
        Constant Field Values

      • T__124

        public static final int T__124
        See Also:
        Constant Field Values

      • T__123

        public static final int T__123
        See Also:
        Constant Field Values

      • T__122

        public static final int T__122
        See Also:
        Constant Field Values

      • T__121

        public static final int T__121
        See Also:
        Constant Field Values

      • T__120

        public static final int T__120
        See Also:
        Constant Field Values

      • T__61

        public static final int T__61
        See Also:
        Constant Field Values

      • ID

        public static final int ID
        See Also:
        Constant Field Values

      • T__60

        public static final int T__60
        See Also:
        Constant Field Values

      • CAR

        public static final int CAR
        See Also:
        Constant Field Values

      • RCUR

        public static final int RCUR
        See Also:
        Constant Field Values

      • ML_COMMENT

        public static final int ML_COMMENT
        See Also:
        Constant Field Values

      • T__58

        public static final int T__58
        See Also:
        Constant Field Values

      • T__107

        public static final int T__107
        See Also:
        Constant Field Values

      • COMMA

        public static final int COMMA
        See Also:
        Constant Field Values

      • T__108

        public static final int T__108
        See Also:
        Constant Field Values

      • T__109

        public static final int T__109
        See Also:
        Constant Field Values

      • T__103

        public static final int T__103
        See Also:
        Constant Field Values

      • T__59

        public static final int T__59
        See Also:
        Constant Field Values

      • T__104

        public static final int T__104
        See Also:
        Constant Field Values

      • T__105

        public static final int T__105
        See Also:
        Constant Field Values

      • T__106

        public static final int T__106
        See Also:
        Constant Field Values

      • TILDE

        public static final int TILDE
        See Also:
        Constant Field Values

      • T__111

        public static final int T__111
        See Also:
        Constant Field Values

      • PATHSTAR

        public static final int PATHSTAR
        See Also:
        Constant Field Values

      • T__110

        public static final int T__110
        See Also:
        Constant Field Values

      • T__113

        public static final int T__113
        See Also:
        Constant Field Values

      • IDENT

        public static final int IDENT
        See Also:
        Constant Field Values

      • BANGEQ

        public static final int BANGEQ
        See Also:
        Constant Field Values

      • T__112

        public static final int T__112
        See Also:
        Constant Field Values

      • PLUS

        public static final int PLUS
        See Also:
        Constant Field Values

      • DOT

        public static final int DOT
        See Also:
        Constant Field Values

      • LTLT

        public static final int LTLT
        See Also:
        Constant Field Values

      • ATTR

        public static final int ATTR
        See Also:
        Constant Field Values

      • LBRK

        public static final int LBRK
        See Also:
        Constant Field Values

      • T__102

        public static final int T__102
        See Also:
        Constant Field Values

      • BANG

        public static final int BANG
        See Also:
        Constant Field Values

      • T__101

        public static final int T__101
        See Also:
        Constant Field Values

      • T__100

        public static final int T__100
        See Also:
        Constant Field Values

      • MIN

        public static final int MIN
        See Also:
        Constant Field Values

      • GTEQ

        public static final int GTEQ
        See Also:
        Constant Field Values

      • SEMI

        public static final int SEMI
        See Also:
        Constant Field Values

      • NUM

        public static final int NUM
        See Also:
        Constant Field Values

      • COLON

        public static final int COLON
        See Also:
        Constant Field Values

      • OPER

        public static final int OPER
        See Also:
        Constant Field Values

      • RPAR

        public static final int RPAR
        See Also:
        Constant Field Values

      • PCT

        public static final int PCT
        See Also:
        Constant Field Values

      • DIV

        public static final int DIV
        See Also:
        Constant Field Values

      • BAR

        public static final int BAR
        See Also:
        Constant Field Values

      • STRING

        public static final int STRING
        See Also:
        Constant Field Values

      • dfa35

        protected xdc.services.spec.GrammarLexer.DFA35 dfa35

      • dfa36

        protected xdc.services.spec.GrammarLexer.DFA36 dfa36

    • Constructor Detail

      • GrammarLexer

        public GrammarLexer()

      • GrammarLexer

        public GrammarLexer(org.antlr.runtime.CharStream input)

      • GrammarLexer

        public GrammarLexer(org.antlr.runtime.CharStream input,
            org.antlr.runtime.RecognizerSharedState state)

    • Method Detail

      • getGrammarFileName

        public java.lang.String getGrammarFileName()
        Overrides:
        getGrammarFileName in class org.antlr.runtime.BaseRecognizer

      • mT__58

        public final void mT__58()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__59

        public final void mT__59()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__60

        public final void mT__60()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__61

        public final void mT__61()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__62

        public final void mT__62()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__63

        public final void mT__63()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__64

        public final void mT__64()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__65

        public final void mT__65()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__66

        public final void mT__66()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__67

        public final void mT__67()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__68

        public final void mT__68()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__69

        public final void mT__69()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__70

        public final void mT__70()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__71

        public final void mT__71()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__72

        public final void mT__72()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__73

        public final void mT__73()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__74

        public final void mT__74()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__75

        public final void mT__75()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__76

        public final void mT__76()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__77

        public final void mT__77()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__78

        public final void mT__78()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__79

        public final void mT__79()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__80

        public final void mT__80()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__81

        public final void mT__81()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__82

        public final void mT__82()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__83

        public final void mT__83()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__84

        public final void mT__84()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__85

        public final void mT__85()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__86

        public final void mT__86()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__87

        public final void mT__87()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__88

        public final void mT__88()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__89

        public final void mT__89()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__90

        public final void mT__90()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__91

        public final void mT__91()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__92

        public final void mT__92()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__93

        public final void mT__93()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__94

        public final void mT__94()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__95

        public final void mT__95()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__96

        public final void mT__96()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__97

        public final void mT__97()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__98

        public final void mT__98()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__99

        public final void mT__99()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__100

        public final void mT__100()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__101

        public final void mT__101()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__102

        public final void mT__102()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__103

        public final void mT__103()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__104

        public final void mT__104()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__105

        public final void mT__105()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__106

        public final void mT__106()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__107

        public final void mT__107()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__108

        public final void mT__108()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__109

        public final void mT__109()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__110

        public final void mT__110()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__111

        public final void mT__111()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__112

        public final void mT__112()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__113

        public final void mT__113()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__114

        public final void mT__114()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__115

        public final void mT__115()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__116

        public final void mT__116()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__117

        public final void mT__117()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__118

        public final void mT__118()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__119

        public final void mT__119()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__120

        public final void mT__120()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__121

        public final void mT__121()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__122

        public final void mT__122()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__123

        public final void mT__123()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__124

        public final void mT__124()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__125

        public final void mT__125()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__126

        public final void mT__126()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__127

        public final void mT__127()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__128

        public final void mT__128()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__129

        public final void mT__129()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__130

        public final void mT__130()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__131

        public final void mT__131()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__132

        public final void mT__132()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__133

        public final void mT__133()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__134

        public final void mT__134()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__135

        public final void mT__135()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__136

        public final void mT__136()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__137

        public final void mT__137()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mT__138

        public final void mT__138()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mWS

        public final void mWS()
               throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mSL_COMMENT

        public final void mSL_COMMENT()
                       throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mML_COMMENT

        public final void mML_COMMENT()
                       throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mAMP

        public final void mAMP()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mAMPAMP

        public final void mAMPAMP()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mBANG

        public final void mBANG()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mBANGEQ

        public final void mBANGEQ()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mBAR

        public final void mBAR()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mBARBAR

        public final void mBARBAR()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mCAR

        public final void mCAR()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mCOLON

        public final void mCOLON()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mCOMMA

        public final void mCOMMA()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mDIV

        public final void mDIV()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mEQ

        public final void mEQ()
               throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mEQEQ

        public final void mEQEQ()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mGT

        public final void mGT()
               throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mGTEQ

        public final void mGTEQ()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mGTGT

        public final void mGTGT()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mLBRK

        public final void mLBRK()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mLCUR

        public final void mLCUR()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mLPAR

        public final void mLPAR()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mLT

        public final void mLT()
               throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mLTEQ

        public final void mLTEQ()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mLTLT

        public final void mLTLT()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mMIN

        public final void mMIN()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mPCT

        public final void mPCT()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mPLUS

        public final void mPLUS()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mQUEST

        public final void mQUEST()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mRBRK

        public final void mRBRK()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mRCUR

        public final void mRCUR()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mRPAR

        public final void mRPAR()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mSEMI

        public final void mSEMI()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mSTAR

        public final void mSTAR()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mTILDE

        public final void mTILDE()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mATTR

        public final void mATTR()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mIDENT

        public final void mIDENT()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mCHAR

        public final void mCHAR()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mSTRING

        public final void mSTRING()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mDOT

        public final void mDOT()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mNUM

        public final void mNUM()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mID

        public final void mID()
               throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mD

        public final void mD()
              throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mR

        public final void mR()
              throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mH

        public final void mH()
              throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mE

        public final void mE()
              throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mLU

        public final void mLU()
               throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mDOC_BLK

        public final void mDOC_BLK()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mDOC_INL

        public final void mDOC_INL()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mDOC_PRE

        public final void mDOC_PRE()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mDOC_SUF

        public final void mDOC_SUF()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mELIPSIS

        public final void mELIPSIS()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mOPER

        public final void mOPER()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mPATH

        public final void mPATH()
                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mPATHSTAR

        public final void mPATHSTAR()
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • mTokens

        public void mTokens()
             throws org.antlr.runtime.RecognitionException
        Specified by:
        mTokens in class org.antlr.runtime.Lexer
        Throws:
        org.antlr.runtime.RecognitionException
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GrammarParser

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xdc.services.spec

Class GrammarParser

  • java.lang.Object
    • org.antlr.runtime.BaseRecognizer
      • org.antlr.runtime.Parser
        • xdc.services.spec.GrammarParser

  • public class GrammarParser
extends org.antlr.runtime.Parser

    • Field Summary

      Fields
      Modifier and Type | Field and Description
      static int | AMP
      static int | AMPAMP
      static int | ATTR
      static int | BANG
      static int | BANGEQ
      static int | BAR
      static int | BARBAR
      static int | CAR
      static int | CHAR
      static int | COLON
      static int | COMMA
      static int | D
      protected xdc.services.spec.GrammarParser.DFA10 | dfa10
      protected xdc.services.spec.GrammarParser.DFA11 | dfa11
      protected xdc.services.spec.GrammarParser.DFA12 | dfa12
      protected xdc.services.spec.GrammarParser.DFA13 | dfa13
      protected xdc.services.spec.GrammarParser.DFA14 | dfa14
      protected xdc.services.spec.GrammarParser.DFA20 | dfa20
      protected xdc.services.spec.GrammarParser.DFA21 | dfa21
      protected xdc.services.spec.GrammarParser.DFA22 | dfa22
      protected xdc.services.spec.GrammarParser.DFA24 | dfa24
      protected xdc.services.spec.GrammarParser.DFA27 | dfa27
      protected xdc.services.spec.GrammarParser.DFA28 | dfa28
      protected xdc.services.spec.GrammarParser.DFA3 | dfa3
      protected xdc.services.spec.GrammarParser.DFA30 | dfa30
      protected xdc.services.spec.GrammarParser.DFA36 | dfa36
      protected xdc.services.spec.GrammarParser.DFA37 | dfa37
      protected xdc.services.spec.GrammarParser.DFA39 | dfa39
      protected xdc.services.spec.GrammarParser.DFA41 | dfa41
      protected xdc.services.spec.GrammarParser.DFA42 | dfa42
      protected xdc.services.spec.GrammarParser.DFA43 | dfa43
      protected xdc.services.spec.GrammarParser.DFA44 | dfa44
      protected xdc.services.spec.GrammarParser.DFA45 | dfa45
      protected xdc.services.spec.GrammarParser.DFA47 | dfa47
      protected xdc.services.spec.GrammarParser.DFA48 | dfa48
      protected xdc.services.spec.GrammarParser.DFA51 | dfa51
      protected xdc.services.spec.GrammarParser.DFA53 | dfa53
      protected xdc.services.spec.GrammarParser.DFA54 | dfa54
      protected xdc.services.spec.GrammarParser.DFA55 | dfa55
      protected xdc.services.spec.GrammarParser.DFA56 | dfa56
      protected xdc.services.spec.GrammarParser.DFA57 | dfa57
      protected xdc.services.spec.GrammarParser.DFA6 | dfa6
      protected xdc.services.spec.GrammarParser.DFA61 | dfa61
      protected xdc.services.spec.GrammarParser.DFA62 | dfa62
      protected xdc.services.spec.GrammarParser.DFA77 | dfa77
      protected xdc.services.spec.GrammarParser.DFA78 | dfa78
      protected xdc.services.spec.GrammarParser.DFA79 | dfa79
      protected xdc.services.spec.GrammarParser.DFA80 | dfa80
      protected xdc.services.spec.GrammarParser.DFA82 | dfa82
      protected xdc.services.spec.GrammarParser.DFA83 | dfa83
      protected xdc.services.spec.GrammarParser.DFA84 | dfa84
      protected xdc.services.spec.GrammarParser.DFA85 | dfa85
      protected xdc.services.spec.GrammarParser.DFA9 | dfa9
      protected xdc.services.spec.GrammarParser.DFA95 | dfa95
      protected xdc.services.spec.GrammarParser.DFA96 | dfa96
      protected xdc.services.spec.GrammarParser.DFA98 | dfa98
      static int | DIV
      static int | DOC_BLK
      static int | DOC_INL
      static int | DOC_PRE
      static int | DOC_SUF
      static int | DOT
      static int | E
      static int | ELIPSIS
      static int | EOF
      static int | EQ
      static int | EQEQ
      static org.antlr.runtime.BitSet | FOLLOW_100_in_typeSpecG6125
      static org.antlr.runtime.BitSet | FOLLOW_101_in_typeSpecG6170
      static org.antlr.runtime.BitSet | FOLLOW_102_in_typeSpecG6218
      static org.antlr.runtime.BitSet | FOLLOW_103_in_typeSpecG6265
      static org.antlr.runtime.BitSet | FOLLOW_104_in_typeSpecG6312
      static org.antlr.runtime.BitSet | FOLLOW_105_in_typeSpecG6358
      static org.antlr.runtime.BitSet | FOLLOW_106_in_typeSpecG6404
      static org.antlr.runtime.BitSet | FOLLOW_107_in_typeSpecG6449
      static org.antlr.runtime.BitSet | FOLLOW_108_in_typeSpecG6495
      static org.antlr.runtime.BitSet | FOLLOW_109_in_typeSpecG6540
      static org.antlr.runtime.BitSet | FOLLOW_110_in_typeSpecG6584
      static org.antlr.runtime.BitSet | FOLLOW_111_in_typeSpecG6630
      static org.antlr.runtime.BitSet | FOLLOW_112_in_typeSpecG6683
      static org.antlr.runtime.BitSet | FOLLOW_113_in_typeSpecG6699
      static org.antlr.runtime.BitSet | FOLLOW_114_in_typeSpecG6746
      static org.antlr.runtime.BitSet | FOLLOW_115_in_typeSpecG6793
      static org.antlr.runtime.BitSet | FOLLOW_116_in_typeSpecG6839
      static org.antlr.runtime.BitSet | FOLLOW_117_in_typeSpecG6884
      static org.antlr.runtime.BitSet | FOLLOW_118_in_typeSpecG6929
      static org.antlr.runtime.BitSet | FOLLOW_119_in_typeSpecG6974
      static org.antlr.runtime.BitSet | FOLLOW_120_in_typeSpecG7021
      static org.antlr.runtime.BitSet | FOLLOW_121_in_typeSpecG7069
      static org.antlr.runtime.BitSet | FOLLOW_122_in_typeSpecG7116
      static org.antlr.runtime.BitSet | FOLLOW_123_in_typeSpecG7162
      static org.antlr.runtime.BitSet | FOLLOW_124_in_typeSpecG7208
      static org.antlr.runtime.BitSet | FOLLOW_125_in_typeSpecG7254
      static org.antlr.runtime.BitSet | FOLLOW_126_in_typeSpecG7302
      static org.antlr.runtime.BitSet | FOLLOW_127_in_typeSpecG7349
      static org.antlr.runtime.BitSet | FOLLOW_128_in_typeSpecG7394
      static org.antlr.runtime.BitSet | FOLLOW_129_in_typeSpecG7438
      static org.antlr.runtime.BitSet | FOLLOW_130_in_typeSpecG7484
      static org.antlr.runtime.BitSet | FOLLOW_131_in_typeSpecG7529
      static org.antlr.runtime.BitSet | FOLLOW_132_in_typeSpecG7574
      static org.antlr.runtime.BitSet | FOLLOW_133_in_typeSpecG7634
      static org.antlr.runtime.BitSet | FOLLOW_134_in_typeSpecG7682
      static org.antlr.runtime.BitSet | FOLLOW_135_in_unitImp7806
      static org.antlr.runtime.BitSet | FOLLOW_136_in_unitImp7813
      static org.antlr.runtime.BitSet | FOLLOW_137_in_unitSpec8042
      static org.antlr.runtime.BitSet | FOLLOW_138_in_unitSpec8088
      static org.antlr.runtime.BitSet | FOLLOW_58_in_absDeclarator128
      static org.antlr.runtime.BitSet | FOLLOW_58_in_constDecl930
      static org.antlr.runtime.BitSet | FOLLOW_58_in_typeMods5063
      static org.antlr.runtime.BitSet | FOLLOW_59_in_configDecl855
      static org.antlr.runtime.BitSet | FOLLOW_60_in_configDecl869
      static org.antlr.runtime.BitSet | FOLLOW_61_in_declQuals983
      static org.antlr.runtime.BitSet | FOLLOW_62_in_declQuals998
      static org.antlr.runtime.BitSet | FOLLOW_63_in_declQuals1013
      static org.antlr.runtime.BitSet | FOLLOW_63_in_unitSpec7981
      static org.antlr.runtime.BitSet | FOLLOW_64_in_declarator_tail1245
      static org.antlr.runtime.BitSet | FOLLOW_64_in_typeSpecG7729
      static org.antlr.runtime.BitSet | FOLLOW_65_in_declarator_tail1262
      static org.antlr.runtime.BitSet | FOLLOW_66_in_enumDecl1517
      static org.antlr.runtime.BitSet | FOLLOW_67_in_exprTrm2199
      static org.antlr.runtime.BitSet | FOLLOW_68_in_exprTrm2227
      static org.antlr.runtime.BitSet | FOLLOW_69_in_exprTrm2255
      static org.antlr.runtime.BitSet | FOLLOW_70_in_exprTrm2283
      static org.antlr.runtime.BitSet | FOLLOW_71_in_externDecl3010
      static org.antlr.runtime.BitSet | FOLLOW_72_in_fxnHdr3273
      static org.antlr.runtime.BitSet | FOLLOW_73_in_methodDecl3727
      static org.antlr.runtime.BitSet | FOLLOW_74_in_pkgSpec4234
      static org.antlr.runtime.BitSet | FOLLOW_74_in_unitSpec7867
      static org.antlr.runtime.BitSet | FOLLOW_75_in_pkgReqList4345
      static org.antlr.runtime.BitSet | FOLLOW_76_in_pkgReqList4348
      static org.antlr.runtime.BitSet | FOLLOW_76_in_unitSpec8142
      static org.antlr.runtime.BitSet | FOLLOW_77_in_pkgUnit4447
      static org.antlr.runtime.BitSet | FOLLOW_77_in_unitSpec7996
      static org.antlr.runtime.BitSet | FOLLOW_78_in_pkgUnit4453
      static org.antlr.runtime.BitSet | FOLLOW_78_in_unitSpec8002
      static org.antlr.runtime.BitSet | FOLLOW_79_in_proxyDecl4637
      static org.antlr.runtime.BitSet | FOLLOW_80_in_proxyDecl4643
      static org.antlr.runtime.BitSet | FOLLOW_80_in_unitSpec8033
      static org.antlr.runtime.BitSet | FOLLOW_81_in_structDecl4805
      static org.antlr.runtime.BitSet | FOLLOW_81_in_structFieldDecl4901
      static org.antlr.runtime.BitSet | FOLLOW_82_in_structDecl4809
      static org.antlr.runtime.BitSet | FOLLOW_82_in_structFieldDecl4905
      static org.antlr.runtime.BitSet | FOLLOW_83_in_typeDecl5015
      static org.antlr.runtime.BitSet | FOLLOW_84_in_typeMods5074
      static org.antlr.runtime.BitSet | FOLLOW_85_in_typeMods5085
      static org.antlr.runtime.BitSet | FOLLOW_86_in_typeSpecG5237
      static org.antlr.runtime.BitSet | FOLLOW_87_in_typeSpecG5284
      static org.antlr.runtime.BitSet | FOLLOW_87_in_typeSpecG5333
      static org.antlr.runtime.BitSet | FOLLOW_88_in_typeSpecG5331
      static org.antlr.runtime.BitSet | FOLLOW_88_in_typeSpecG5415
      static org.antlr.runtime.BitSet | FOLLOW_88_in_typeSpecG5500
      static org.antlr.runtime.BitSet | FOLLOW_88_in_typeSpecG5543
      static org.antlr.runtime.BitSet | FOLLOW_88_in_typeSpecG5629
      static org.antlr.runtime.BitSet | FOLLOW_88_in_typeSpecG5709
      static org.antlr.runtime.BitSet | FOLLOW_89_in_typeSpecG5369
      static org.antlr.runtime.BitSet | FOLLOW_89_in_typeSpecG5417
      static org.antlr.runtime.BitSet | FOLLOW_90_in_typeSpecG5452
      static org.antlr.runtime.BitSet | FOLLOW_90_in_typeSpecG5545
      static org.antlr.runtime.BitSet | FOLLOW_91_in_typeSpecG5582
      static org.antlr.runtime.BitSet | FOLLOW_91_in_typeSpecG5631
      static org.antlr.runtime.BitSet | FOLLOW_91_in_typeSpecG5667
      static org.antlr.runtime.BitSet | FOLLOW_91_in_typeSpecG5669
      static org.antlr.runtime.BitSet | FOLLOW_91_in_typeSpecG5711
      static org.antlr.runtime.BitSet | FOLLOW_91_in_typeSpecG5713
      static org.antlr.runtime.BitSet | FOLLOW_91_in_typeSpecG5833
      static org.antlr.runtime.BitSet | FOLLOW_92_in_typeSpecG5742
      static org.antlr.runtime.BitSet | FOLLOW_93_in_typeSpecG5788
      static org.antlr.runtime.BitSet | FOLLOW_93_in_typeSpecG5835
      static org.antlr.runtime.BitSet | FOLLOW_94_in_typeSpecG5873
      static org.antlr.runtime.BitSet | FOLLOW_95_in_typeSpecG5918
      static org.antlr.runtime.BitSet | FOLLOW_96_in_typeSpecG5970
      static org.antlr.runtime.BitSet | FOLLOW_97_in_typeSpecG5986
      static org.antlr.runtime.BitSet | FOLLOW_98_in_typeSpecG6033
      static org.antlr.runtime.BitSet | FOLLOW_99_in_typeSpecG6079
      static org.antlr.runtime.BitSet | FOLLOW_absArgDecl_in_absArgDeclListOpt425
      static org.antlr.runtime.BitSet | FOLLOW_absArgDecl_in_absArgDeclListOpt434
      static org.antlr.runtime.BitSet | FOLLOW_absArgDeclListOpt_in_absDeclarator_tail351
      static org.antlr.runtime.BitSet | FOLLOW_absArgDeclListOpt_in_declarator_tail1329
      static org.antlr.runtime.BitSet | FOLLOW_absDeclarator_in_absArgDecl476
      static org.antlr.runtime.BitSet | FOLLOW_absDeclarator_in_absDeclarator134
      static org.antlr.runtime.BitSet | FOLLOW_absDeclarator_in_absDeclarator164
      static org.antlr.runtime.BitSet | FOLLOW_absDeclarator_tail_in_absDeclarator193
      static org.antlr.runtime.BitSet | FOLLOW_AMP_in_eBOP2519
      static org.antlr.runtime.BitSet | FOLLOW_AMP_in_eUOP2883
      static org.antlr.runtime.BitSet | FOLLOW_AMPAMP_in_eBOP2537
      static org.antlr.runtime.BitSet | FOLLOW_annotation_in_instDeclSpec3405
      static org.antlr.runtime.BitSet | FOLLOW_annotation_in_internDeclSpec3669
      static org.antlr.runtime.BitSet | FOLLOW_annotation_in_modDeclSpec4088
      static org.antlr.runtime.BitSet | FOLLOW_annotAttr_in_annotation523
      static org.antlr.runtime.BitSet | FOLLOW_annotAttr_in_pkgSpec4201
      static org.antlr.runtime.BitSet | FOLLOW_annotAttr_in_unitSpec7958
      static org.antlr.runtime.BitSet | FOLLOW_argDecl_in_argDeclListOpt638
      static org.antlr.runtime.BitSet | FOLLOW_argDecl_in_argDeclListOpt647
      static org.antlr.runtime.BitSet | FOLLOW_argDeclListOpt_in_fxnDecl3182
      static org.antlr.runtime.BitSet | FOLLOW_ATTR_in_annotAttr566
      static org.antlr.runtime.BitSet | FOLLOW_BANG_in_eUOP2901
      static org.antlr.runtime.BitSet | FOLLOW_BANGEQ_in_eBOP2555
      static org.antlr.runtime.BitSet | FOLLOW_BAR_in_eBOP2573
      static org.antlr.runtime.BitSet | FOLLOW_BARBAR_in_eBOP2591
      static org.antlr.runtime.BitSet | FOLLOW_basicDeclarator_in_basicDeclarator778
      static org.antlr.runtime.BitSet | FOLLOW_basicDeclarator_in_fxnHdr3245
      static org.antlr.runtime.BitSet | FOLLOW_CAR_in_eBOP2609
      static org.antlr.runtime.BitSet | FOLLOW_CHAR_in_exprTrm2339
      static org.antlr.runtime.BitSet | FOLLOW_COLON_in_enumRep1578
      static org.antlr.runtime.BitSet | FOLLOW_COLON_in_exprCnd2016
      static org.antlr.runtime.BitSet | FOLLOW_COLON_in_exprProp1963
      static org.antlr.runtime.BitSet | FOLLOW_COLON_in_unitSpec8090
      static org.antlr.runtime.BitSet | FOLLOW_COLON_in_unitSpec8144
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_absArgDeclListOpt430
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_absDeclarator_tail355
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_argDeclListOpt643
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_declarator_tail1333
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_enumValList1645
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_expr1855
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_expr1863
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_expr1905
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_expr1916
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_exprList2467
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_fxnDecl3186
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_metArgDeclListOpt3814
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_pkgReqList4358
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_pkgUnit4471
      static org.antlr.runtime.BitSet | FOLLOW_COMMA_in_pkgVers4585
      static org.antlr.runtime.BitSet | FOLLOW_configDecl_in_instDecl3327
      static org.antlr.runtime.BitSet | FOLLOW_configDecl_in_internDecl3465
      static org.antlr.runtime.BitSet | FOLLOW_configDecl_in_modDecl3884
      static org.antlr.runtime.BitSet | FOLLOW_constDecl_in_internDecl3485
      static org.antlr.runtime.BitSet | FOLLOW_constDecl_in_modDecl3904
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_argDecl689
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_basicDeclarator808
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_configDecl875
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_constDecl936
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_declarator_term1164
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_externDecl3016
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_fieldDecl3118
      static org.antlr.runtime.BitSet | FOLLOW_declarator_in_typeDecl5021
      static org.antlr.runtime.BitSet | FOLLOW_declarator_tail_in_declarator_tail1298
      static org.antlr.runtime.BitSet | FOLLOW_declarator_tail_in_declarator_tail1346
      static org.antlr.runtime.BitSet | FOLLOW_declarator_tail_in_declarator1060
      static org.antlr.runtime.BitSet | FOLLOW_declarator_term_in_declarator_term1106
      static org.antlr.runtime.BitSet | FOLLOW_declarator_term_in_declarator1056
      static org.antlr.runtime.BitSet | FOLLOW_declQuals_in_instDeclSpec3409
      static org.antlr.runtime.BitSet | FOLLOW_declQuals_in_internDeclSpec3673
      static org.antlr.runtime.BitSet | FOLLOW_declQuals_in_modDeclSpec4092
      static org.antlr.runtime.BitSet | FOLLOW_DIV_in_eBOP2627
      static org.antlr.runtime.BitSet | FOLLOW_DOC_BLK_in_one_doc_block1439
      static org.antlr.runtime.BitSet | FOLLOW_doc_block_in_enumValList1717
      static org.antlr.runtime.BitSet | FOLLOW_doc_block_in_instDeclSpec3399
      static org.antlr.runtime.BitSet | FOLLOW_doc_block_in_internDeclSpec3663
      static org.antlr.runtime.BitSet | FOLLOW_doc_block_in_modDeclSpec4082
      static org.antlr.runtime.BitSet | FOLLOW_doc_block_in_pkgSpec4303
      static org.antlr.runtime.BitSet | FOLLOW_doc_block_in_unitSpec8226
      static org.antlr.runtime.BitSet | FOLLOW_DOC_INL_in_doc_inline1479
      static org.antlr.runtime.BitSet | FOLLOW_doc_inline_in_enumValList1661
      static org.antlr.runtime.BitSet | FOLLOW_doc_inline_in_fieldDeclList3074
      static org.antlr.runtime.BitSet | FOLLOW_doc_inline_in_instDeclSpec3417
      static org.antlr.runtime.BitSet | FOLLOW_doc_inline_in_internDeclSpec3681
      static org.antlr.runtime.BitSet | FOLLOW_doc_inline_in_modDeclSpec4100
      static org.antlr.runtime.BitSet | FOLLOW_eBOP_in_exprBin2067
      static org.antlr.runtime.BitSet | FOLLOW_ELIPSIS_in_absDeclarator_tail357
      static org.antlr.runtime.BitSet | FOLLOW_ELIPSIS_in_declarator_tail1335
      static org.antlr.runtime.BitSet | FOLLOW_ELIPSIS_in_fxnDecl3188
      static org.antlr.runtime.BitSet | FOLLOW_enumDecl_in_internDecl3505
      static org.antlr.runtime.BitSet | FOLLOW_enumDecl_in_modDecl3924
      static org.antlr.runtime.BitSet | FOLLOW_enumRep_in_enumDecl1526
      static org.antlr.runtime.BitSet | FOLLOW_enumVal_in_enumValList1610
      static org.antlr.runtime.BitSet | FOLLOW_enumVal_in_enumValList1680
      static org.antlr.runtime.BitSet | FOLLOW_enumValList_in_enumDecl1532
      static org.antlr.runtime.BitSet | FOLLOW_EQ_in_argDecl692
      static org.antlr.runtime.BitSet | FOLLOW_EQ_in_configDecl878
      static org.antlr.runtime.BitSet | FOLLOW_EQ_in_constDecl939
      static org.antlr.runtime.BitSet | FOLLOW_EQ_in_eBOP2645
      static org.antlr.runtime.BitSet | FOLLOW_EQ_in_enumVal1768
      static org.antlr.runtime.BitSet | FOLLOW_EQ_in_externDecl3019
      static org.antlr.runtime.BitSet | FOLLOW_EQEQ_in_eBOP2663
      static org.antlr.runtime.BitSet | FOLLOW_eUOP_in_exprUry2116
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_absDeclarator_tail317
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_absDeclarator247
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_annotAttr573
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_argDecl696
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_configDecl882
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_constDecl943
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_declarator_tail1281
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_enumVal1772
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_expr1898
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_expr1909
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_exprList2462
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_exprList2471
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_exprProp1967
      static org.antlr.runtime.BitSet | FOLLOW_expr_in_exprTrm2405
      static org.antlr.runtime.BitSet | FOLLOW_exprBin_in_exprBin2071
      static org.antlr.runtime.BitSet | FOLLOW_exprBin_in_exprCnd2005
      static org.antlr.runtime.BitSet | FOLLOW_exprCnd_in_expr1820
      static org.antlr.runtime.BitSet | FOLLOW_exprCnd_in_exprCnd2014
      static org.antlr.runtime.BitSet | FOLLOW_exprCnd_in_exprCnd2020
      static org.antlr.runtime.BitSet | FOLLOW_exprList_in_exprTrm2169
      static org.antlr.runtime.BitSet | FOLLOW_exprProp_in_expr1849
      static org.antlr.runtime.BitSet | FOLLOW_exprProp_in_expr1857
      static org.antlr.runtime.BitSet | FOLLOW_exprTrm_in_exprUry2122
      static org.antlr.runtime.BitSet | FOLLOW_exprUry_in_exprBin2060
      static org.antlr.runtime.BitSet | FOLLOW_externDecl_in_internDecl3525
      static org.antlr.runtime.BitSet | FOLLOW_externDecl_in_modDecl3944
      static org.antlr.runtime.BitSet | FOLLOW_fieldDecl_in_fieldDeclList3070
      static org.antlr.runtime.BitSet | FOLLOW_fieldDeclList_in_structDecl4835
      static org.antlr.runtime.BitSet | FOLLOW_fieldDeclList_in_structFieldDecl4916
      static org.antlr.runtime.BitSet | FOLLOW_fxnDecl_in_instDecl3344
      static org.antlr.runtime.BitSet | FOLLOW_fxnDecl_in_internDecl3545
      static org.antlr.runtime.BitSet | FOLLOW_fxnDecl_in_modDecl3964
      static org.antlr.runtime.BitSet | FOLLOW_fxnHdr_in_fxnDecl3166
      static org.antlr.runtime.BitSet | FOLLOW_GT_in_eBOP2681
      static org.antlr.runtime.BitSet | FOLLOW_GTEQ_in_eBOP2699
      static org.antlr.runtime.BitSet | FOLLOW_GTGT_in_eBOP2717
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_basicDeclarator744
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_declarator_term1134
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_enumDecl1521
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_enumVal1765
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_exprProp1959
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_externDecl3023
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_metArg3849
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_methodDecl3731
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_pkgUnitName4512
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_proxyDecl4641
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_qualName4701
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_qualNameStar4751
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_structDecl4817
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_unitImp7817
      static org.antlr.runtime.BitSet | FOLLOW_IDENT_in_unitSpec8017
      static org.antlr.runtime.BitSet | FOLLOW_instDecl_in_instDeclSpec3413
      static org.antlr.runtime.BitSet | FOLLOW_instDeclSpec_in_unitSpec8116
      static org.antlr.runtime.BitSet | FOLLOW_internDecl_in_internDeclSpec3677
      static org.antlr.runtime.BitSet | FOLLOW_internDeclSpec_in_unitSpec8180
      static org.antlr.runtime.BitSet | FOLLOW_LBRK_in_absDeclarator_tail312
      static org.antlr.runtime.BitSet | FOLLOW_LBRK_in_absDeclarator242
      static org.antlr.runtime.BitSet | FOLLOW_LBRK_in_declarator_tail1241
      static org.antlr.runtime.BitSet | FOLLOW_LBRK_in_expr1893
      static org.antlr.runtime.BitSet | FOLLOW_LBRK_in_pkgVers4550
      static org.antlr.runtime.BitSet | FOLLOW_LCUR_in_enumDecl1530
      static org.antlr.runtime.BitSet | FOLLOW_LCUR_in_expr1846
      static org.antlr.runtime.BitSet | FOLLOW_LCUR_in_pkgSpec4258
      static org.antlr.runtime.BitSet | FOLLOW_LCUR_in_structDecl4830
      static org.antlr.runtime.BitSet | FOLLOW_LCUR_in_structFieldDecl4911
      static org.antlr.runtime.BitSet | FOLLOW_LCUR_in_unitSpec8058
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_absDeclarator_tail347
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_absDeclarator160
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_annotAttr569
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_basicDeclarator804
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_declarator_tail1325
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_declarator_term1160
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_exprList2457
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_exprTrm2400
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_fxnDecl3178
      static org.antlr.runtime.BitSet | FOLLOW_LPAR_in_methodDecl3734
      static org.antlr.runtime.BitSet | FOLLOW_LT_in_eBOP2735
      static org.antlr.runtime.BitSet | FOLLOW_LTEQ_in_eBOP2753
      static org.antlr.runtime.BitSet | FOLLOW_LTLT_in_eBOP2771
      static org.antlr.runtime.BitSet | FOLLOW_metArg_in_metArgDeclListOpt3809
      static org.antlr.runtime.BitSet | FOLLOW_metArg_in_metArgDeclListOpt3818
      static org.antlr.runtime.BitSet | FOLLOW_metArgDeclListOpt_in_methodDecl3738
      static org.antlr.runtime.BitSet | FOLLOW_methodDecl_in_instDecl3361
      static org.antlr.runtime.BitSet | FOLLOW_methodDecl_in_internDecl3565
      static org.antlr.runtime.BitSet | FOLLOW_methodDecl_in_modDecl3984
      static org.antlr.runtime.BitSet | FOLLOW_MIN_in_eBOP2789
      static org.antlr.runtime.BitSet | FOLLOW_MIN_in_eUOP2919
      static org.antlr.runtime.BitSet | FOLLOW_modDecl_in_modDeclSpec4096
      static org.antlr.runtime.BitSet | FOLLOW_modDeclSpec_in_unitSpec8073
      static org.antlr.runtime.BitSet | FOLLOW_NUM_in_exprTrm2311
      static org.antlr.runtime.BitSet | FOLLOW_NUM_in_pkgVers4567
      static org.antlr.runtime.BitSet | FOLLOW_NUM_in_pkgVers4589
      static org.antlr.runtime.BitSet | FOLLOW_one_doc_block_in_doc_block1396
      static org.antlr.runtime.BitSet | FOLLOW_one_doc_block_in_pkgSpec4180
      static org.antlr.runtime.BitSet | FOLLOW_one_doc_block_in_unitSpec7937
      static org.antlr.runtime.BitSet | FOLLOW_PATH_in_qualName4709
      static org.antlr.runtime.BitSet | FOLLOW_PATH_in_qualNameStar4759
      static org.antlr.runtime.BitSet | FOLLOW_PATHSTAR_in_qualNameStar4767
      static org.antlr.runtime.BitSet | FOLLOW_PCT_in_eBOP2807
      static org.antlr.runtime.BitSet | FOLLOW_pkgReq_in_pkgReqList4354
      static org.antlr.runtime.BitSet | FOLLOW_pkgReq_in_pkgReqList4360
      static org.antlr.runtime.BitSet | FOLLOW_pkgReqList_in_pkgSpec4159
      static org.antlr.runtime.BitSet | FOLLOW_pkgUnit_in_pkgSpec4273
      static org.antlr.runtime.BitSet | FOLLOW_pkgUnitName_in_pkgUnit4467
      static org.antlr.runtime.BitSet | FOLLOW_pkgUnitName_in_pkgUnit4473
      static org.antlr.runtime.BitSet | FOLLOW_pkgVers_in_pkgReq4401
      static org.antlr.runtime.BitSet | FOLLOW_pkgVers_in_pkgSpec4246
      static org.antlr.runtime.BitSet | FOLLOW_PLUS_in_eBOP2825
      static org.antlr.runtime.BitSet | FOLLOW_PLUS_in_eUOP2937
      static org.antlr.runtime.BitSet | FOLLOW_proxyDecl_in_internDecl3585
      static org.antlr.runtime.BitSet | FOLLOW_proxyDecl_in_modDecl4004
      static org.antlr.runtime.BitSet | FOLLOW_qualName_in_exprTrm2164
      static org.antlr.runtime.BitSet | FOLLOW_qualName_in_pkgReq4396
      static org.antlr.runtime.BitSet | FOLLOW_qualName_in_pkgSpec4239
      static org.antlr.runtime.BitSet | FOLLOW_qualName_in_superInt4971
      static org.antlr.runtime.BitSet | FOLLOW_qualName_in_typeSpecG5201
      static org.antlr.runtime.BitSet | FOLLOW_qualName_in_unitSpec7871
      static org.antlr.runtime.BitSet | FOLLOW_qualNameStar_in_unitImp7810
      static org.antlr.runtime.BitSet | FOLLOW_QUEST_in_exprCnd2010
      static org.antlr.runtime.BitSet | FOLLOW_RBRK_in_absDeclarator_tail321
      static org.antlr.runtime.BitSet | FOLLOW_RBRK_in_absDeclarator251
      static org.antlr.runtime.BitSet | FOLLOW_RBRK_in_declarator_tail1294
      static org.antlr.runtime.BitSet | FOLLOW_RBRK_in_expr1920
      static org.antlr.runtime.BitSet | FOLLOW_RBRK_in_pkgVers4603
      static org.antlr.runtime.BitSet | FOLLOW_RCUR_in_enumDecl1535
      static org.antlr.runtime.BitSet | FOLLOW_RCUR_in_expr1867
      static org.antlr.runtime.BitSet | FOLLOW_RCUR_in_pkgSpec4286
      static org.antlr.runtime.BitSet | FOLLOW_RCUR_in_structDecl4840
      static org.antlr.runtime.BitSet | FOLLOW_RCUR_in_structFieldDecl4921
      static org.antlr.runtime.BitSet | FOLLOW_RCUR_in_unitSpec8209
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_absDeclarator_tail364
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_absDeclarator166
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_annotAttr575
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_basicDeclarator810
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_declarator_tail1342
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_declarator_term1166
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_exprList2479
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_exprTrm2409
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_fxnDecl3195
      static org.antlr.runtime.BitSet | FOLLOW_RPAR_in_methodDecl3740
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_configDecl886
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_constDecl947
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_enumDecl1538
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_externDecl3029
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_fieldDecl3120
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_fxnDecl3197
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_methodDecl3744
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_pkgReqList4365
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_pkgSpec4289
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_pkgUnit4478
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_proxyDecl4649
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_structDecl4843
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_structDecl4851
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_typeDecl5023
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_unitImp7823
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_unitSpec7874
      static org.antlr.runtime.BitSet | FOLLOW_SEMI_in_unitSpec8212
      static org.antlr.runtime.BitSet | FOLLOW_STAR_in_absDeclarator125
      static org.antlr.runtime.BitSet | FOLLOW_STAR_in_basicDeclarator770
      static org.antlr.runtime.BitSet | FOLLOW_STAR_in_declarator_term1098
      static org.antlr.runtime.BitSet | FOLLOW_STAR_in_eBOP2843
      static org.antlr.runtime.BitSet | FOLLOW_STAR_in_eUOP2955
      static org.antlr.runtime.BitSet | FOLLOW_STRING_in_exprTrm2367
      static org.antlr.runtime.BitSet | FOLLOW_structDecl_in_internDecl3605
      static org.antlr.runtime.BitSet | FOLLOW_structDecl_in_modDecl4024
      static org.antlr.runtime.BitSet | FOLLOW_structFieldDecl_in_typeSpecF5153
      static org.antlr.runtime.BitSet | FOLLOW_superInt_in_proxyDecl4647
      static org.antlr.runtime.BitSet | FOLLOW_superInt_in_unitSpec8037
      static org.antlr.runtime.BitSet | FOLLOW_superInt_in_unitSpec8046
      static org.antlr.runtime.BitSet | FOLLOW_TILDE_in_eUOP2973
      static org.antlr.runtime.BitSet | FOLLOW_typeDecl_in_internDecl3625
      static org.antlr.runtime.BitSet | FOLLOW_typeDecl_in_modDecl4044
      static org.antlr.runtime.BitSet | FOLLOW_typeMods_in_basicDeclarator774
      static org.antlr.runtime.BitSet | FOLLOW_typeMods_in_declarator_term1102
      static org.antlr.runtime.BitSet | FOLLOW_typeMods_in_typeSpecC5125
      static org.antlr.runtime.BitSet | FOLLOW_typeSpec_in_configDecl871
      static org.antlr.runtime.BitSet | FOLLOW_typeSpec_in_constDecl932
      static org.antlr.runtime.BitSet | FOLLOW_typeSpec_in_enumRep1580
      static org.antlr.runtime.BitSet | FOLLOW_typeSpec_in_fxnHdr3241
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecC_in_absArgDecl472
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecC_in_argDecl685
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecC_in_externDecl3012
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecC_in_typeDecl5017
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecC_in_typeSpecF5144
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecF_in_fieldDecl3114
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecG_in_typeSpec5102
      static org.antlr.runtime.BitSet | FOLLOW_typeSpecG_in_typeSpecC5127
      static org.antlr.runtime.BitSet | FOLLOW_unitImp_in_unitSpec7907
      static int | GT
      static int | GTEQ
      static int | GTGT
      static int | H
      static int | ID
      static int | IDENT
      static int | LBRK
      static int | LCUR
      static int | LPAR
      static int | LT
      static int | LTEQ
      static int | LTLT
      static int | LU
      static int | MIN
      static int | ML_COMMENT
      static int | NUM
      static int | OPER
      static int | PATH
      static int | PATHSTAR
      static int | PCT
      static int | PLUS
      static int | QUEST
      static int | R
      static int | RBRK
      static int | RCUR
      static int | RPAR
      static int | SEMI
      static int | SL_COMMENT
      static int | STAR
      static int | STRING
      static int | T__100
      static int | T__101
      static int | T__102
      static int | T__103
      static int | T__104
      static int | T__105
      static int | T__106
      static int | T__107
      static int | T__108
      static int | T__109
      static int | T__110
      static int | T__111
      static int | T__112
      static int | T__113
      static int | T__114
      static int | T__115
      static int | T__116
      static int | T__117
      static int | T__118
      static int | T__119
      static int | T__120
      static int | T__121
      static int | T__122
      static int | T__123
      static int | T__124
      static int | T__125
      static int | T__126
      static int | T__127
      static int | T__128
      static int | T__129
      static int | T__130
      static int | T__131
      static int | T__132
      static int | T__133
      static int | T__134
      static int | T__135
      static int | T__136
      static int | T__137
      static int | T__138
      static int | T__58
      static int | T__59
      static int | T__60
      static int | T__61
      static int | T__62
      static int | T__63
      static int | T__64
      static int | T__65
      static int | T__66
      static int | T__67
      static int | T__68
      static int | T__69
      static int | T__70
      static int | T__71
      static int | T__72
      static int | T__73
      static int | T__74
      static int | T__75
      static int | T__76
      static int | T__77
      static int | T__78
      static int | T__79
      static int | T__80
      static int | T__81
      static int | T__82
      static int | T__83
      static int | T__84
      static int | T__85
      static int | T__86
      static int | T__87
      static int | T__88
      static int | T__89
      static int | T__90
      static int | T__91
      static int | T__92
      static int | T__93
      static int | T__94
      static int | T__95
      static int | T__96
      static int | T__97
      static int | T__98
      static int | T__99
      static int | TILDE
      static java.lang.String[] | tokenNames
      static int | WS

      • Fields inherited from class org.antlr.runtime.Parser

        input

      • Fields inherited from class org.antlr.runtime.BaseRecognizer

        DEFAULT_TOKEN_CHANNEL, HIDDEN, INITIAL_FOLLOW_STACK_SIZE, MEMO_RULE_FAILED, MEMO_RULE_UNKNOWN, NEXT_TOKEN_RULE_NAME, state

    • Constructor Summary

      Constructors
      Constructor and Description
      GrammarParser(org.antlr.runtime.TokenStream input)
      GrammarParser(org.antlr.runtime.TokenStream input, org.antlr.runtime.RecognizerSharedState state)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Decl absArgDecl()
      java.util.ArrayList<Decl.Arg> | absArgDeclListOpt()
      Type | absDeclarator_tail(Type base)
      Type absDeclarator()
      java.util.ArrayList<Attr> | annotation()
      java.util.ArrayList<Attr> | annotAttr(java.util.ArrayList<Attr> aL)
      Decl argDecl()
      java.util.ArrayList<Decl.Arg> | argDeclListOpt()
      Type basicDeclarator()
      Decl configDecl()
      Decl constDecl()
      Type | declarator_tail(Type base)
      Type declarator_term()
      Type declarator()
      void | declQuals()
      java.util.ArrayList<DocComment> | doc_block(java.util.ArrayList<DocComment> dL)
      java.util.ArrayList<DocComment> | doc_inline(java.util.ArrayList<DocComment> dL)
      Atom eBOP()
      Decl enumDecl()
      Type.Spec enumRep()
      Decl enumVal()
      void | enumValList(java.util.ArrayList<Decl.EnumVal> evL)
      Atom eUOP()
      Expr expr()
      Expr exprBin()
      Expr exprCnd()
      java.util.List<Expr> | exprList()
      void | exprProp(java.util.List<Atom> iL, java.util.List<Expr> eL)
      Expr exprTrm()
      Expr exprUry()
      Decl externDecl()
      Decl fieldDecl()
      void | fieldDeclList(java.util.List<Decl.Field> fL)
      Decl fxnDecl()
      Type fxnHdr()
      java.lang.String | getGrammarFileName()
      java.lang.String[] | getTokenNames()
      Decl instDecl()
      Decl instDeclSpec()
      Decl internDecl()
      Decl internDeclSpec()
      Decl.Arg metArg()
      java.util.ArrayList<Decl.Arg> | metArgDeclListOpt()
      Decl methodDecl()
      Decl modDecl()
      Decl modDeclSpec()
      java.util.ArrayList<DocComment> | one_doc_block(java.util.ArrayList<DocComment> dL)
      void | pkgReq(java.util.List<Atom> rlist, boolean iFlg)
      void | pkgReqList(java.util.List<Atom> rL)
      Pkg | pkgSpec(java.lang.String pkgFile)
      void | pkgUnit(java.util.List<Atom> mlist, java.util.List<Atom> ilist)
      void | pkgUnitName(java.util.List<Atom> l)
      java.lang.String | pkgVers()
      Decl proxyDecl()
      Atom qualName()
      Atom qualNameStar()
      void | reportError(org.antlr.runtime.RecognitionException e)
      void | reportError(java.lang.String message)
      void reportError(java.lang.String message, int line)
      Report an error at the given line.
      Decl structDecl()
      Decl structFieldDecl()
      Sup superInt()
      Decl typeDecl()
      java.util.EnumSet<Type.Modifier> | typeMods()
      void | typeSpec()
      void | typeSpecC()
      void | typeSpecF()
      void | typeSpecG(java.util.EnumSet<Type.Modifier> mods)
      void | unitImp(java.util.List<Import> iL)
      Unit | unitSpec(java.lang.String pname)

      • Methods inherited from class org.antlr.runtime.Parser

        getCurrentInputSymbol, getMissingSymbol, getSourceName, getTokenStream, reset, setTokenStream, traceIn, traceOut

      • Methods inherited from class org.antlr.runtime.BaseRecognizer

        alreadyParsedRule, beginResync, combineFollows, computeContextSensitiveRuleFOLLOW, computeErrorRecoverySet, consumeUntil, consumeUntil, displayRecognitionError, emitErrorMessage, endResync, getBacktrackingLevel, getErrorHeader, getErrorMessage, getNumberOfSyntaxErrors, getRuleInvocationStack, getRuleInvocationStack, getRuleMemoization, getRuleMemoizationCacheSize, getTokenErrorDisplay, match, matchAny, memoize, mismatch, mismatchIsMissingToken, mismatchIsUnwantedToken, pushFollow, recover, recoverFromMismatchedSet, recoverFromMismatchedToken, toStrings, traceIn, traceOut

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Field Detail

      • tokenNames

        public static final java.lang.String[] tokenNames

      • LU

        public static final int LU
        See Also:
        Constant Field Values

      • LT

        public static final int LT
        See Also:
        Constant Field Values

      • STAR

        public static final int STAR
        See Also:
        Constant Field Values

      • CHAR

        public static final int CHAR
        See Also:
        Constant Field Values

      • GTGT

        public static final int GTGT
        See Also:
        Constant Field Values

      • EOF

        public static final int EOF
        See Also:
        Constant Field Values

      • QUEST

        public static final int QUEST
        See Also:
        Constant Field Values

      • T__93

        public static final int T__93
        See Also:
        Constant Field Values

      • T__94

        public static final int T__94
        See Also:
        Constant Field Values

      • T__91

        public static final int T__91
        See Also:
        Constant Field Values

      • T__92

        public static final int T__92
        See Also:
        Constant Field Values

      • DOC_SUF

        public static final int DOC_SUF
        See Also:
        Constant Field Values

      • T__90

        public static final int T__90
        See Also:
        Constant Field Values

      • LPAR

        public static final int LPAR
        See Also:
        Constant Field Values

      • PATH

        public static final int PATH
        See Also:
        Constant Field Values

      • BARBAR

        public static final int BARBAR
        See Also:
        Constant Field Values

      • EQ

        public static final int EQ
        See Also:
        Constant Field Values

      • AMPAMP

        public static final int AMPAMP
        See Also:
        Constant Field Values

      • T__99

        public static final int T__99
        See Also:
        Constant Field Values

      • RBRK

        public static final int RBRK
        See Also:
        Constant Field Values

      • T__98

        public static final int T__98
        See Also:
        Constant Field Values

      • T__97

        public static final int T__97
        See Also:
        Constant Field Values

      • EQEQ

        public static final int EQEQ
        See Also:
        Constant Field Values

      • T__96

        public static final int T__96
        See Also:
        Constant Field Values

      • T__95

        public static final int T__95
        See Also:
        Constant Field Values

      • D

        public static final int D
        See Also:
        Constant Field Values

      • E

        public static final int E
        See Also:
        Constant Field Values

      • T__138

        public static final int T__138
        See Also:
        Constant Field Values

      • T__137

        public static final int T__137
        See Also:
        Constant Field Values

      • T__136

        public static final int T__136
        See Also:
        Constant Field Values

      • T__80

        public static final int T__80
        See Also:
        Constant Field Values

      • T__81

        public static final int T__81
        See Also:
        Constant Field Values

      • T__82

        public static final int T__82
        See Also:
        Constant Field Values

      • T__83

        public static final int T__83
        See Also:
        Constant Field Values

      • LCUR

        public static final int LCUR
        See Also:
        Constant Field Values

      • H

        public static final int H
        See Also:
        Constant Field Values

      • DOC_INL

        public static final int DOC_INL
        See Also:
        Constant Field Values

      • DOC_PRE

        public static final int DOC_PRE
        See Also:
        Constant Field Values

      • R

        public static final int R
        See Also:
        Constant Field Values

      • T__85

        public static final int T__85
        See Also:
        Constant Field Values

      • T__84

        public static final int T__84
        See Also:
        Constant Field Values

      • T__87

        public static final int T__87
        See Also:
        Constant Field Values

      • T__86

        public static final int T__86
        See Also:
        Constant Field Values

      • T__89

        public static final int T__89
        See Also:
        Constant Field Values

      • T__88

        public static final int T__88
        See Also:
        Constant Field Values

      • T__126

        public static final int T__126
        See Also:
        Constant Field Values

      • T__125

        public static final int T__125
        See Also:
        Constant Field Values

      • T__128

        public static final int T__128
        See Also:
        Constant Field Values

      • T__127

        public static final int T__127
        See Also:
        Constant Field Values

      • WS

        public static final int WS
        See Also:
        Constant Field Values

      • T__71

        public static final int T__71
        See Also:
        Constant Field Values

      • T__72

        public static final int T__72
        See Also:
        Constant Field Values

      • T__129

        public static final int T__129
        See Also:
        Constant Field Values

      • DOC_BLK

        public static final int DOC_BLK
        See Also:
        Constant Field Values

      • T__70

        public static final int T__70
        See Also:
        Constant Field Values

      • SL_COMMENT

        public static final int SL_COMMENT
        See Also:
        Constant Field Values

      • GT

        public static final int GT
        See Also:
        Constant Field Values

      • T__76

        public static final int T__76
        See Also:
        Constant Field Values

      • T__75

        public static final int T__75
        See Also:
        Constant Field Values

      • T__74

        public static final int T__74
        See Also:
        Constant Field Values

      • T__130

        public static final int T__130
        See Also:
        Constant Field Values

      • T__73

        public static final int T__73
        See Also:
        Constant Field Values

      • T__131

        public static final int T__131
        See Also:
        Constant Field Values

      • T__132

        public static final int T__132
        See Also:
        Constant Field Values

      • T__79

        public static final int T__79
        See Also:
        Constant Field Values

      • T__133

        public static final int T__133
        See Also:
        Constant Field Values

      • T__78

        public static final int T__78
        See Also:
        Constant Field Values

      • T__134

        public static final int T__134
        See Also:
        Constant Field Values

      • ELIPSIS

        public static final int ELIPSIS
        See Also:
        Constant Field Values

      • T__77

        public static final int T__77
        See Also:
        Constant Field Values

      • T__135

        public static final int T__135
        See Also:
        Constant Field Values

      • T__68

        public static final int T__68
        See Also:
        Constant Field Values

      • T__69

        public static final int T__69
        See Also:
        Constant Field Values

      • T__66

        public static final int T__66
        See Also:
        Constant Field Values

      • T__67

        public static final int T__67
        See Also:
        Constant Field Values

      • T__64

        public static final int T__64
        See Also:
        Constant Field Values

      • T__65

        public static final int T__65
        See Also:
        Constant Field Values

      • T__62

        public static final int T__62
        See Also:
        Constant Field Values

      • T__63

        public static final int T__63
        See Also:
        Constant Field Values

      • AMP

        public static final int AMP
        See Also:
        Constant Field Values

      • T__118

        public static final int T__118
        See Also:
        Constant Field Values

      • T__119

        public static final int T__119
        See Also:
        Constant Field Values

      • T__116

        public static final int T__116
        See Also:
        Constant Field Values

      • T__117

        public static final int T__117
        See Also:
        Constant Field Values

      • T__114

        public static final int T__114
        See Also:
        Constant Field Values

      • LTEQ

        public static final int LTEQ
        See Also:
        Constant Field Values

      • T__115

        public static final int T__115
        See Also:
        Constant Field Values

      • T__124

        public static final int T__124
        See Also:
        Constant Field Values

      • T__123

        public static final int T__123
        See Also:
        Constant Field Values

      • T__122

        public static final int T__122
        See Also:
        Constant Field Values

      • T__121

        public static final int T__121
        See Also:
        Constant Field Values

      • T__120

        public static final int T__120
        See Also:
        Constant Field Values

      • ID

        public static final int ID
        See Also:
        Constant Field Values

      • T__61

        public static final int T__61
        See Also:
        Constant Field Values

      • CAR

        public static final int CAR
        See Also:
        Constant Field Values

      • T__60

        public static final int T__60
        See Also:
        Constant Field Values

      • RCUR

        public static final int RCUR
        See Also:
        Constant Field Values

      • ML_COMMENT

        public static final int ML_COMMENT
        See Also:
        Constant Field Values

      • T__58

        public static final int T__58
        See Also:
        Constant Field Values

      • T__107

        public static final int T__107
        See Also:
        Constant Field Values

      • T__108

        public static final int T__108
        See Also:
        Constant Field Values

      • COMMA

        public static final int COMMA
        See Also:
        Constant Field Values

      • T__109

        public static final int T__109
        See Also:
        Constant Field Values

      • T__59

        public static final int T__59
        See Also:
        Constant Field Values

      • T__103

        public static final int T__103
        See Also:
        Constant Field Values

      • T__104

        public static final int T__104
        See Also:
        Constant Field Values

      • T__105

        public static final int T__105
        See Also:
        Constant Field Values

      • TILDE

        public static final int TILDE
        See Also:
        Constant Field Values

      • T__106

        public static final int T__106
        See Also:
        Constant Field Values

      • PATHSTAR

        public static final int PATHSTAR
        See Also:
        Constant Field Values

      • T__111

        public static final int T__111
        See Also:
        Constant Field Values

      • T__110

        public static final int T__110
        See Also:
        Constant Field Values

      • BANGEQ

        public static final int BANGEQ
        See Also:
        Constant Field Values

      • IDENT

        public static final int IDENT
        See Also:
        Constant Field Values

      • T__113

        public static final int T__113
        See Also:
        Constant Field Values

      • PLUS

        public static final int PLUS
        See Also:
        Constant Field Values

      • T__112

        public static final int T__112
        See Also:
        Constant Field Values

      • DOT

        public static final int DOT
        See Also:
        Constant Field Values

      • LTLT

        public static final int LTLT
        See Also:
        Constant Field Values

      • ATTR

        public static final int ATTR
        See Also:
        Constant Field Values

      • LBRK

        public static final int LBRK
        See Also:
        Constant Field Values

      • BANG

        public static final int BANG
        See Also:
        Constant Field Values

      • T__102

        public static final int T__102
        See Also:
        Constant Field Values

      • T__101

        public static final int T__101
        See Also:
        Constant Field Values

      • MIN

        public static final int MIN
        See Also:
        Constant Field Values

      • T__100

        public static final int T__100
        See Also:
        Constant Field Values

      • GTEQ

        public static final int GTEQ
        See Also:
        Constant Field Values

      • SEMI

        public static final int SEMI
        See Also:
        Constant Field Values

      • NUM

        public static final int NUM
        See Also:
        Constant Field Values

      • COLON

        public static final int COLON
        See Also:
        Constant Field Values

      • OPER

        public static final int OPER
        See Also:
        Constant Field Values

      • RPAR

        public static final int RPAR
        See Also:
        Constant Field Values

      • PCT

        public static final int PCT
        See Also:
        Constant Field Values

      • DIV

        public static final int DIV
        See Also:
        Constant Field Values

      • BAR

        public static final int BAR
        See Also:
        Constant Field Values

      • STRING

        public static final int STRING
        See Also:
        Constant Field Values

      • dfa3

        protected xdc.services.spec.GrammarParser.DFA3 dfa3

      • dfa6

        protected xdc.services.spec.GrammarParser.DFA6 dfa6

      • dfa10

        protected xdc.services.spec.GrammarParser.DFA10 dfa10

      • dfa9

        protected xdc.services.spec.GrammarParser.DFA9 dfa9

      • dfa11

        protected xdc.services.spec.GrammarParser.DFA11 dfa11

      • dfa12

        protected xdc.services.spec.GrammarParser.DFA12 dfa12

      • dfa14

        protected xdc.services.spec.GrammarParser.DFA14 dfa14

      • dfa13

        protected xdc.services.spec.GrammarParser.DFA13 dfa13

      • dfa20

        protected xdc.services.spec.GrammarParser.DFA20 dfa20

      • dfa21

        protected xdc.services.spec.GrammarParser.DFA21 dfa21

      • dfa22

        protected xdc.services.spec.GrammarParser.DFA22 dfa22

      • dfa24

        protected xdc.services.spec.GrammarParser.DFA24 dfa24

      • dfa27

        protected xdc.services.spec.GrammarParser.DFA27 dfa27

      • dfa28

        protected xdc.services.spec.GrammarParser.DFA28 dfa28

      • dfa30

        protected xdc.services.spec.GrammarParser.DFA30 dfa30

      • dfa39

        protected xdc.services.spec.GrammarParser.DFA39 dfa39

      • dfa36

        protected xdc.services.spec.GrammarParser.DFA36 dfa36

      • dfa37

        protected xdc.services.spec.GrammarParser.DFA37 dfa37

      • dfa41

        protected xdc.services.spec.GrammarParser.DFA41 dfa41

      • dfa42

        protected xdc.services.spec.GrammarParser.DFA42 dfa42

      • dfa45

        protected xdc.services.spec.GrammarParser.DFA45 dfa45

      • dfa43

        protected xdc.services.spec.GrammarParser.DFA43 dfa43

      • dfa44

        protected xdc.services.spec.GrammarParser.DFA44 dfa44

      • dfa47

        protected xdc.services.spec.GrammarParser.DFA47 dfa47

      • dfa48

        protected xdc.services.spec.GrammarParser.DFA48 dfa48

      • dfa51

        protected xdc.services.spec.GrammarParser.DFA51 dfa51

      • dfa53

        protected xdc.services.spec.GrammarParser.DFA53 dfa53

      • dfa54

        protected xdc.services.spec.GrammarParser.DFA54 dfa54

      • dfa55

        protected xdc.services.spec.GrammarParser.DFA55 dfa55

      • dfa56

        protected xdc.services.spec.GrammarParser.DFA56 dfa56

      • dfa57

        protected xdc.services.spec.GrammarParser.DFA57 dfa57

      • dfa61

        protected xdc.services.spec.GrammarParser.DFA61 dfa61

      • dfa62

        protected xdc.services.spec.GrammarParser.DFA62 dfa62

      • dfa80

        protected xdc.services.spec.GrammarParser.DFA80 dfa80

      • dfa79

        protected xdc.services.spec.GrammarParser.DFA79 dfa79

      • dfa77

        protected xdc.services.spec.GrammarParser.DFA77 dfa77

      • dfa78

        protected xdc.services.spec.GrammarParser.DFA78 dfa78

      • dfa82

        protected xdc.services.spec.GrammarParser.DFA82 dfa82

      • dfa83

        protected xdc.services.spec.GrammarParser.DFA83 dfa83

      • dfa84

        protected xdc.services.spec.GrammarParser.DFA84 dfa84

      • dfa85

        protected xdc.services.spec.GrammarParser.DFA85 dfa85

      • dfa95

        protected xdc.services.spec.GrammarParser.DFA95 dfa95

      • dfa96

        protected xdc.services.spec.GrammarParser.DFA96 dfa96

      • dfa98

        protected xdc.services.spec.GrammarParser.DFA98 dfa98

      • FOLLOW_STAR_in_absDeclarator125

        public static final org.antlr.runtime.BitSet FOLLOW_STAR_in_absDeclarator125

      • FOLLOW_58_in_absDeclarator128

        public static final org.antlr.runtime.BitSet FOLLOW_58_in_absDeclarator128

      • FOLLOW_absDeclarator_in_absDeclarator134

        public static final org.antlr.runtime.BitSet FOLLOW_absDeclarator_in_absDeclarator134

      • FOLLOW_LPAR_in_absDeclarator160

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_absDeclarator160

      • FOLLOW_absDeclarator_in_absDeclarator164

        public static final org.antlr.runtime.BitSet FOLLOW_absDeclarator_in_absDeclarator164

      • FOLLOW_RPAR_in_absDeclarator166

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_absDeclarator166

      • FOLLOW_absDeclarator_tail_in_absDeclarator193

        public static final org.antlr.runtime.BitSet FOLLOW_absDeclarator_tail_in_absDeclarator193

      • FOLLOW_LBRK_in_absDeclarator242

        public static final org.antlr.runtime.BitSet FOLLOW_LBRK_in_absDeclarator242

      • FOLLOW_expr_in_absDeclarator247

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_absDeclarator247

      • FOLLOW_RBRK_in_absDeclarator251

        public static final org.antlr.runtime.BitSet FOLLOW_RBRK_in_absDeclarator251

      • FOLLOW_LBRK_in_absDeclarator_tail312

        public static final org.antlr.runtime.BitSet FOLLOW_LBRK_in_absDeclarator_tail312

      • FOLLOW_expr_in_absDeclarator_tail317

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_absDeclarator_tail317

      • FOLLOW_RBRK_in_absDeclarator_tail321

        public static final org.antlr.runtime.BitSet FOLLOW_RBRK_in_absDeclarator_tail321

      • FOLLOW_LPAR_in_absDeclarator_tail347

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_absDeclarator_tail347

      • FOLLOW_absArgDeclListOpt_in_absDeclarator_tail351

        public static final org.antlr.runtime.BitSet FOLLOW_absArgDeclListOpt_in_absDeclarator_tail351

      • FOLLOW_COMMA_in_absDeclarator_tail355

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_absDeclarator_tail355

      • FOLLOW_ELIPSIS_in_absDeclarator_tail357

        public static final org.antlr.runtime.BitSet FOLLOW_ELIPSIS_in_absDeclarator_tail357

      • FOLLOW_RPAR_in_absDeclarator_tail364

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_absDeclarator_tail364

      • FOLLOW_absArgDecl_in_absArgDeclListOpt425

        public static final org.antlr.runtime.BitSet FOLLOW_absArgDecl_in_absArgDeclListOpt425

      • FOLLOW_COMMA_in_absArgDeclListOpt430

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_absArgDeclListOpt430

      • FOLLOW_absArgDecl_in_absArgDeclListOpt434

        public static final org.antlr.runtime.BitSet FOLLOW_absArgDecl_in_absArgDeclListOpt434

      • FOLLOW_typeSpecC_in_absArgDecl472

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecC_in_absArgDecl472

      • FOLLOW_absDeclarator_in_absArgDecl476

        public static final org.antlr.runtime.BitSet FOLLOW_absDeclarator_in_absArgDecl476

      • FOLLOW_annotAttr_in_annotation523

        public static final org.antlr.runtime.BitSet FOLLOW_annotAttr_in_annotation523

      • FOLLOW_ATTR_in_annotAttr566

        public static final org.antlr.runtime.BitSet FOLLOW_ATTR_in_annotAttr566

      • FOLLOW_LPAR_in_annotAttr569

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_annotAttr569

      • FOLLOW_expr_in_annotAttr573

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_annotAttr573

      • FOLLOW_RPAR_in_annotAttr575

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_annotAttr575

      • FOLLOW_argDecl_in_argDeclListOpt638

        public static final org.antlr.runtime.BitSet FOLLOW_argDecl_in_argDeclListOpt638

      • FOLLOW_COMMA_in_argDeclListOpt643

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_argDeclListOpt643

      • FOLLOW_argDecl_in_argDeclListOpt647

        public static final org.antlr.runtime.BitSet FOLLOW_argDecl_in_argDeclListOpt647

      • FOLLOW_typeSpecC_in_argDecl685

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecC_in_argDecl685

      • FOLLOW_declarator_in_argDecl689

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_argDecl689

      • FOLLOW_EQ_in_argDecl692

        public static final org.antlr.runtime.BitSet FOLLOW_EQ_in_argDecl692

      • FOLLOW_expr_in_argDecl696

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_argDecl696

      • FOLLOW_IDENT_in_basicDeclarator744

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_basicDeclarator744

      • FOLLOW_STAR_in_basicDeclarator770

        public static final org.antlr.runtime.BitSet FOLLOW_STAR_in_basicDeclarator770

      • FOLLOW_typeMods_in_basicDeclarator774

        public static final org.antlr.runtime.BitSet FOLLOW_typeMods_in_basicDeclarator774

      • FOLLOW_basicDeclarator_in_basicDeclarator778

        public static final org.antlr.runtime.BitSet FOLLOW_basicDeclarator_in_basicDeclarator778

      • FOLLOW_LPAR_in_basicDeclarator804

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_basicDeclarator804

      • FOLLOW_declarator_in_basicDeclarator808

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_basicDeclarator808

      • FOLLOW_RPAR_in_basicDeclarator810

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_basicDeclarator810

      • FOLLOW_59_in_configDecl855

        public static final org.antlr.runtime.BitSet FOLLOW_59_in_configDecl855

      • FOLLOW_60_in_configDecl869

        public static final org.antlr.runtime.BitSet FOLLOW_60_in_configDecl869

      • FOLLOW_typeSpec_in_configDecl871

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpec_in_configDecl871

      • FOLLOW_declarator_in_configDecl875

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_configDecl875

      • FOLLOW_EQ_in_configDecl878

        public static final org.antlr.runtime.BitSet FOLLOW_EQ_in_configDecl878

      • FOLLOW_expr_in_configDecl882

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_configDecl882

      • FOLLOW_SEMI_in_configDecl886

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_configDecl886

      • FOLLOW_58_in_constDecl930

        public static final org.antlr.runtime.BitSet FOLLOW_58_in_constDecl930

      • FOLLOW_typeSpec_in_constDecl932

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpec_in_constDecl932

      • FOLLOW_declarator_in_constDecl936

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_constDecl936

      • FOLLOW_EQ_in_constDecl939

        public static final org.antlr.runtime.BitSet FOLLOW_EQ_in_constDecl939

      • FOLLOW_expr_in_constDecl943

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_constDecl943

      • FOLLOW_SEMI_in_constDecl947

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_constDecl947

      • FOLLOW_61_in_declQuals983

        public static final org.antlr.runtime.BitSet FOLLOW_61_in_declQuals983

      • FOLLOW_62_in_declQuals998

        public static final org.antlr.runtime.BitSet FOLLOW_62_in_declQuals998

      • FOLLOW_63_in_declQuals1013

        public static final org.antlr.runtime.BitSet FOLLOW_63_in_declQuals1013

      • FOLLOW_declarator_term_in_declarator1056

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_term_in_declarator1056

      • FOLLOW_declarator_tail_in_declarator1060

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_tail_in_declarator1060

      • FOLLOW_STAR_in_declarator_term1098

        public static final org.antlr.runtime.BitSet FOLLOW_STAR_in_declarator_term1098

      • FOLLOW_typeMods_in_declarator_term1102

        public static final org.antlr.runtime.BitSet FOLLOW_typeMods_in_declarator_term1102

      • FOLLOW_declarator_term_in_declarator_term1106

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_term_in_declarator_term1106

      • FOLLOW_IDENT_in_declarator_term1134

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_declarator_term1134

      • FOLLOW_LPAR_in_declarator_term1160

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_declarator_term1160

      • FOLLOW_declarator_in_declarator_term1164

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_declarator_term1164

      • FOLLOW_RPAR_in_declarator_term1166

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_declarator_term1166

      • FOLLOW_LBRK_in_declarator_tail1241

        public static final org.antlr.runtime.BitSet FOLLOW_LBRK_in_declarator_tail1241

      • FOLLOW_64_in_declarator_tail1245

        public static final org.antlr.runtime.BitSet FOLLOW_64_in_declarator_tail1245

      • FOLLOW_65_in_declarator_tail1262

        public static final org.antlr.runtime.BitSet FOLLOW_65_in_declarator_tail1262

      • FOLLOW_expr_in_declarator_tail1281

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_declarator_tail1281

      • FOLLOW_RBRK_in_declarator_tail1294

        public static final org.antlr.runtime.BitSet FOLLOW_RBRK_in_declarator_tail1294

      • FOLLOW_declarator_tail_in_declarator_tail1298

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_tail_in_declarator_tail1298

      • FOLLOW_LPAR_in_declarator_tail1325

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_declarator_tail1325

      • FOLLOW_absArgDeclListOpt_in_declarator_tail1329

        public static final org.antlr.runtime.BitSet FOLLOW_absArgDeclListOpt_in_declarator_tail1329

      • FOLLOW_COMMA_in_declarator_tail1333

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_declarator_tail1333

      • FOLLOW_ELIPSIS_in_declarator_tail1335

        public static final org.antlr.runtime.BitSet FOLLOW_ELIPSIS_in_declarator_tail1335

      • FOLLOW_RPAR_in_declarator_tail1342

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_declarator_tail1342

      • FOLLOW_declarator_tail_in_declarator_tail1346

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_tail_in_declarator_tail1346

      • FOLLOW_one_doc_block_in_doc_block1396

        public static final org.antlr.runtime.BitSet FOLLOW_one_doc_block_in_doc_block1396

      • FOLLOW_DOC_BLK_in_one_doc_block1439

        public static final org.antlr.runtime.BitSet FOLLOW_DOC_BLK_in_one_doc_block1439

      • FOLLOW_DOC_INL_in_doc_inline1479

        public static final org.antlr.runtime.BitSet FOLLOW_DOC_INL_in_doc_inline1479

      • FOLLOW_66_in_enumDecl1517

        public static final org.antlr.runtime.BitSet FOLLOW_66_in_enumDecl1517

      • FOLLOW_IDENT_in_enumDecl1521

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_enumDecl1521

      • FOLLOW_enumRep_in_enumDecl1526

        public static final org.antlr.runtime.BitSet FOLLOW_enumRep_in_enumDecl1526

      • FOLLOW_LCUR_in_enumDecl1530

        public static final org.antlr.runtime.BitSet FOLLOW_LCUR_in_enumDecl1530

      • FOLLOW_enumValList_in_enumDecl1532

        public static final org.antlr.runtime.BitSet FOLLOW_enumValList_in_enumDecl1532

      • FOLLOW_RCUR_in_enumDecl1535

        public static final org.antlr.runtime.BitSet FOLLOW_RCUR_in_enumDecl1535

      • FOLLOW_SEMI_in_enumDecl1538

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_enumDecl1538

      • FOLLOW_COLON_in_enumRep1578

        public static final org.antlr.runtime.BitSet FOLLOW_COLON_in_enumRep1578

      • FOLLOW_typeSpec_in_enumRep1580

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpec_in_enumRep1580

      • FOLLOW_enumVal_in_enumValList1610

        public static final org.antlr.runtime.BitSet FOLLOW_enumVal_in_enumValList1610

      • FOLLOW_COMMA_in_enumValList1645

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_enumValList1645

      • FOLLOW_doc_inline_in_enumValList1661

        public static final org.antlr.runtime.BitSet FOLLOW_doc_inline_in_enumValList1661

      • FOLLOW_enumVal_in_enumValList1680

        public static final org.antlr.runtime.BitSet FOLLOW_enumVal_in_enumValList1680

      • FOLLOW_doc_block_in_enumValList1717

        public static final org.antlr.runtime.BitSet FOLLOW_doc_block_in_enumValList1717

      • FOLLOW_IDENT_in_enumVal1765

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_enumVal1765

      • FOLLOW_EQ_in_enumVal1768

        public static final org.antlr.runtime.BitSet FOLLOW_EQ_in_enumVal1768

      • FOLLOW_expr_in_enumVal1772

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_enumVal1772

      • FOLLOW_exprCnd_in_expr1820

        public static final org.antlr.runtime.BitSet FOLLOW_exprCnd_in_expr1820

      • FOLLOW_LCUR_in_expr1846

        public static final org.antlr.runtime.BitSet FOLLOW_LCUR_in_expr1846

      • FOLLOW_exprProp_in_expr1849

        public static final org.antlr.runtime.BitSet FOLLOW_exprProp_in_expr1849

      • FOLLOW_COMMA_in_expr1855

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_expr1855

      • FOLLOW_exprProp_in_expr1857

        public static final org.antlr.runtime.BitSet FOLLOW_exprProp_in_expr1857

      • FOLLOW_COMMA_in_expr1863

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_expr1863

      • FOLLOW_RCUR_in_expr1867

        public static final org.antlr.runtime.BitSet FOLLOW_RCUR_in_expr1867

      • FOLLOW_LBRK_in_expr1893

        public static final org.antlr.runtime.BitSet FOLLOW_LBRK_in_expr1893

      • FOLLOW_expr_in_expr1898

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_expr1898

      • FOLLOW_COMMA_in_expr1905

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_expr1905

      • FOLLOW_expr_in_expr1909

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_expr1909

      • FOLLOW_COMMA_in_expr1916

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_expr1916

      • FOLLOW_RBRK_in_expr1920

        public static final org.antlr.runtime.BitSet FOLLOW_RBRK_in_expr1920

      • FOLLOW_IDENT_in_exprProp1959

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_exprProp1959

      • FOLLOW_COLON_in_exprProp1963

        public static final org.antlr.runtime.BitSet FOLLOW_COLON_in_exprProp1963

      • FOLLOW_expr_in_exprProp1967

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_exprProp1967

      • FOLLOW_exprBin_in_exprCnd2005

        public static final org.antlr.runtime.BitSet FOLLOW_exprBin_in_exprCnd2005

      • FOLLOW_QUEST_in_exprCnd2010

        public static final org.antlr.runtime.BitSet FOLLOW_QUEST_in_exprCnd2010

      • FOLLOW_exprCnd_in_exprCnd2014

        public static final org.antlr.runtime.BitSet FOLLOW_exprCnd_in_exprCnd2014

      • FOLLOW_COLON_in_exprCnd2016

        public static final org.antlr.runtime.BitSet FOLLOW_COLON_in_exprCnd2016

      • FOLLOW_exprCnd_in_exprCnd2020

        public static final org.antlr.runtime.BitSet FOLLOW_exprCnd_in_exprCnd2020

      • FOLLOW_exprUry_in_exprBin2060

        public static final org.antlr.runtime.BitSet FOLLOW_exprUry_in_exprBin2060

      • FOLLOW_eBOP_in_exprBin2067

        public static final org.antlr.runtime.BitSet FOLLOW_eBOP_in_exprBin2067

      • FOLLOW_exprBin_in_exprBin2071

        public static final org.antlr.runtime.BitSet FOLLOW_exprBin_in_exprBin2071

      • FOLLOW_eUOP_in_exprUry2116

        public static final org.antlr.runtime.BitSet FOLLOW_eUOP_in_exprUry2116

      • FOLLOW_exprTrm_in_exprUry2122

        public static final org.antlr.runtime.BitSet FOLLOW_exprTrm_in_exprUry2122

      • FOLLOW_qualName_in_exprTrm2164

        public static final org.antlr.runtime.BitSet FOLLOW_qualName_in_exprTrm2164

      • FOLLOW_exprList_in_exprTrm2169

        public static final org.antlr.runtime.BitSet FOLLOW_exprList_in_exprTrm2169

      • FOLLOW_67_in_exprTrm2199

        public static final org.antlr.runtime.BitSet FOLLOW_67_in_exprTrm2199

      • FOLLOW_68_in_exprTrm2227

        public static final org.antlr.runtime.BitSet FOLLOW_68_in_exprTrm2227

      • FOLLOW_69_in_exprTrm2255

        public static final org.antlr.runtime.BitSet FOLLOW_69_in_exprTrm2255

      • FOLLOW_70_in_exprTrm2283

        public static final org.antlr.runtime.BitSet FOLLOW_70_in_exprTrm2283

      • FOLLOW_NUM_in_exprTrm2311

        public static final org.antlr.runtime.BitSet FOLLOW_NUM_in_exprTrm2311

      • FOLLOW_CHAR_in_exprTrm2339

        public static final org.antlr.runtime.BitSet FOLLOW_CHAR_in_exprTrm2339

      • FOLLOW_STRING_in_exprTrm2367

        public static final org.antlr.runtime.BitSet FOLLOW_STRING_in_exprTrm2367

      • FOLLOW_LPAR_in_exprTrm2400

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_exprTrm2400

      • FOLLOW_expr_in_exprTrm2405

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_exprTrm2405

      • FOLLOW_RPAR_in_exprTrm2409

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_exprTrm2409

      • FOLLOW_LPAR_in_exprList2457

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_exprList2457

      • FOLLOW_expr_in_exprList2462

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_exprList2462

      • FOLLOW_COMMA_in_exprList2467

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_exprList2467

      • FOLLOW_expr_in_exprList2471

        public static final org.antlr.runtime.BitSet FOLLOW_expr_in_exprList2471

      • FOLLOW_RPAR_in_exprList2479

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_exprList2479

      • FOLLOW_AMP_in_eBOP2519

        public static final org.antlr.runtime.BitSet FOLLOW_AMP_in_eBOP2519

      • FOLLOW_AMPAMP_in_eBOP2537

        public static final org.antlr.runtime.BitSet FOLLOW_AMPAMP_in_eBOP2537

      • FOLLOW_BANGEQ_in_eBOP2555

        public static final org.antlr.runtime.BitSet FOLLOW_BANGEQ_in_eBOP2555

      • FOLLOW_BAR_in_eBOP2573

        public static final org.antlr.runtime.BitSet FOLLOW_BAR_in_eBOP2573

      • FOLLOW_BARBAR_in_eBOP2591

        public static final org.antlr.runtime.BitSet FOLLOW_BARBAR_in_eBOP2591

      • FOLLOW_CAR_in_eBOP2609

        public static final org.antlr.runtime.BitSet FOLLOW_CAR_in_eBOP2609

      • FOLLOW_DIV_in_eBOP2627

        public static final org.antlr.runtime.BitSet FOLLOW_DIV_in_eBOP2627

      • FOLLOW_EQ_in_eBOP2645

        public static final org.antlr.runtime.BitSet FOLLOW_EQ_in_eBOP2645

      • FOLLOW_EQEQ_in_eBOP2663

        public static final org.antlr.runtime.BitSet FOLLOW_EQEQ_in_eBOP2663

      • FOLLOW_GT_in_eBOP2681

        public static final org.antlr.runtime.BitSet FOLLOW_GT_in_eBOP2681

      • FOLLOW_GTEQ_in_eBOP2699

        public static final org.antlr.runtime.BitSet FOLLOW_GTEQ_in_eBOP2699

      • FOLLOW_GTGT_in_eBOP2717

        public static final org.antlr.runtime.BitSet FOLLOW_GTGT_in_eBOP2717

      • FOLLOW_LT_in_eBOP2735

        public static final org.antlr.runtime.BitSet FOLLOW_LT_in_eBOP2735

      • FOLLOW_LTEQ_in_eBOP2753

        public static final org.antlr.runtime.BitSet FOLLOW_LTEQ_in_eBOP2753

      • FOLLOW_LTLT_in_eBOP2771

        public static final org.antlr.runtime.BitSet FOLLOW_LTLT_in_eBOP2771

      • FOLLOW_MIN_in_eBOP2789

        public static final org.antlr.runtime.BitSet FOLLOW_MIN_in_eBOP2789

      • FOLLOW_PCT_in_eBOP2807

        public static final org.antlr.runtime.BitSet FOLLOW_PCT_in_eBOP2807

      • FOLLOW_PLUS_in_eBOP2825

        public static final org.antlr.runtime.BitSet FOLLOW_PLUS_in_eBOP2825

      • FOLLOW_STAR_in_eBOP2843

        public static final org.antlr.runtime.BitSet FOLLOW_STAR_in_eBOP2843

      • FOLLOW_AMP_in_eUOP2883

        public static final org.antlr.runtime.BitSet FOLLOW_AMP_in_eUOP2883

      • FOLLOW_BANG_in_eUOP2901

        public static final org.antlr.runtime.BitSet FOLLOW_BANG_in_eUOP2901

      • FOLLOW_MIN_in_eUOP2919

        public static final org.antlr.runtime.BitSet FOLLOW_MIN_in_eUOP2919

      • FOLLOW_PLUS_in_eUOP2937

        public static final org.antlr.runtime.BitSet FOLLOW_PLUS_in_eUOP2937

      • FOLLOW_STAR_in_eUOP2955

        public static final org.antlr.runtime.BitSet FOLLOW_STAR_in_eUOP2955

      • FOLLOW_TILDE_in_eUOP2973

        public static final org.antlr.runtime.BitSet FOLLOW_TILDE_in_eUOP2973

      • FOLLOW_71_in_externDecl3010

        public static final org.antlr.runtime.BitSet FOLLOW_71_in_externDecl3010

      • FOLLOW_typeSpecC_in_externDecl3012

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecC_in_externDecl3012

      • FOLLOW_declarator_in_externDecl3016

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_externDecl3016

      • FOLLOW_EQ_in_externDecl3019

        public static final org.antlr.runtime.BitSet FOLLOW_EQ_in_externDecl3019

      • FOLLOW_IDENT_in_externDecl3023

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_externDecl3023

      • FOLLOW_SEMI_in_externDecl3029

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_externDecl3029

      • FOLLOW_fieldDecl_in_fieldDeclList3070

        public static final org.antlr.runtime.BitSet FOLLOW_fieldDecl_in_fieldDeclList3070

      • FOLLOW_doc_inline_in_fieldDeclList3074

        public static final org.antlr.runtime.BitSet FOLLOW_doc_inline_in_fieldDeclList3074

      • FOLLOW_typeSpecF_in_fieldDecl3114

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecF_in_fieldDecl3114

      • FOLLOW_declarator_in_fieldDecl3118

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_fieldDecl3118

      • FOLLOW_SEMI_in_fieldDecl3120

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_fieldDecl3120

      • FOLLOW_fxnHdr_in_fxnDecl3166

        public static final org.antlr.runtime.BitSet FOLLOW_fxnHdr_in_fxnDecl3166

      • FOLLOW_LPAR_in_fxnDecl3178

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_fxnDecl3178

      • FOLLOW_argDeclListOpt_in_fxnDecl3182

        public static final org.antlr.runtime.BitSet FOLLOW_argDeclListOpt_in_fxnDecl3182

      • FOLLOW_COMMA_in_fxnDecl3186

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_fxnDecl3186

      • FOLLOW_ELIPSIS_in_fxnDecl3188

        public static final org.antlr.runtime.BitSet FOLLOW_ELIPSIS_in_fxnDecl3188

      • FOLLOW_RPAR_in_fxnDecl3195

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_fxnDecl3195

      • FOLLOW_SEMI_in_fxnDecl3197

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_fxnDecl3197

      • FOLLOW_typeSpec_in_fxnHdr3241

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpec_in_fxnHdr3241

      • FOLLOW_basicDeclarator_in_fxnHdr3245

        public static final org.antlr.runtime.BitSet FOLLOW_basicDeclarator_in_fxnHdr3245

      • FOLLOW_72_in_fxnHdr3273

        public static final org.antlr.runtime.BitSet FOLLOW_72_in_fxnHdr3273

      • FOLLOW_configDecl_in_instDecl3327

        public static final org.antlr.runtime.BitSet FOLLOW_configDecl_in_instDecl3327

      • FOLLOW_fxnDecl_in_instDecl3344

        public static final org.antlr.runtime.BitSet FOLLOW_fxnDecl_in_instDecl3344

      • FOLLOW_methodDecl_in_instDecl3361

        public static final org.antlr.runtime.BitSet FOLLOW_methodDecl_in_instDecl3361

      • FOLLOW_doc_block_in_instDeclSpec3399

        public static final org.antlr.runtime.BitSet FOLLOW_doc_block_in_instDeclSpec3399

      • FOLLOW_annotation_in_instDeclSpec3405

        public static final org.antlr.runtime.BitSet FOLLOW_annotation_in_instDeclSpec3405

      • FOLLOW_declQuals_in_instDeclSpec3409

        public static final org.antlr.runtime.BitSet FOLLOW_declQuals_in_instDeclSpec3409

      • FOLLOW_instDecl_in_instDeclSpec3413

        public static final org.antlr.runtime.BitSet FOLLOW_instDecl_in_instDeclSpec3413

      • FOLLOW_doc_inline_in_instDeclSpec3417

        public static final org.antlr.runtime.BitSet FOLLOW_doc_inline_in_instDeclSpec3417

      • FOLLOW_configDecl_in_internDecl3465

        public static final org.antlr.runtime.BitSet FOLLOW_configDecl_in_internDecl3465

      • FOLLOW_constDecl_in_internDecl3485

        public static final org.antlr.runtime.BitSet FOLLOW_constDecl_in_internDecl3485

      • FOLLOW_enumDecl_in_internDecl3505

        public static final org.antlr.runtime.BitSet FOLLOW_enumDecl_in_internDecl3505

      • FOLLOW_externDecl_in_internDecl3525

        public static final org.antlr.runtime.BitSet FOLLOW_externDecl_in_internDecl3525

      • FOLLOW_fxnDecl_in_internDecl3545

        public static final org.antlr.runtime.BitSet FOLLOW_fxnDecl_in_internDecl3545

      • FOLLOW_methodDecl_in_internDecl3565

        public static final org.antlr.runtime.BitSet FOLLOW_methodDecl_in_internDecl3565

      • FOLLOW_proxyDecl_in_internDecl3585

        public static final org.antlr.runtime.BitSet FOLLOW_proxyDecl_in_internDecl3585

      • FOLLOW_structDecl_in_internDecl3605

        public static final org.antlr.runtime.BitSet FOLLOW_structDecl_in_internDecl3605

      • FOLLOW_typeDecl_in_internDecl3625

        public static final org.antlr.runtime.BitSet FOLLOW_typeDecl_in_internDecl3625

      • FOLLOW_doc_block_in_internDeclSpec3663

        public static final org.antlr.runtime.BitSet FOLLOW_doc_block_in_internDeclSpec3663

      • FOLLOW_annotation_in_internDeclSpec3669

        public static final org.antlr.runtime.BitSet FOLLOW_annotation_in_internDeclSpec3669

      • FOLLOW_declQuals_in_internDeclSpec3673

        public static final org.antlr.runtime.BitSet FOLLOW_declQuals_in_internDeclSpec3673

      • FOLLOW_internDecl_in_internDeclSpec3677

        public static final org.antlr.runtime.BitSet FOLLOW_internDecl_in_internDeclSpec3677

      • FOLLOW_doc_inline_in_internDeclSpec3681

        public static final org.antlr.runtime.BitSet FOLLOW_doc_inline_in_internDeclSpec3681

      • FOLLOW_73_in_methodDecl3727

        public static final org.antlr.runtime.BitSet FOLLOW_73_in_methodDecl3727

      • FOLLOW_IDENT_in_methodDecl3731

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_methodDecl3731

      • FOLLOW_LPAR_in_methodDecl3734

        public static final org.antlr.runtime.BitSet FOLLOW_LPAR_in_methodDecl3734

      • FOLLOW_metArgDeclListOpt_in_methodDecl3738

        public static final org.antlr.runtime.BitSet FOLLOW_metArgDeclListOpt_in_methodDecl3738

      • FOLLOW_RPAR_in_methodDecl3740

        public static final org.antlr.runtime.BitSet FOLLOW_RPAR_in_methodDecl3740

      • FOLLOW_SEMI_in_methodDecl3744

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_methodDecl3744

      • FOLLOW_metArg_in_metArgDeclListOpt3809

        public static final org.antlr.runtime.BitSet FOLLOW_metArg_in_metArgDeclListOpt3809

      • FOLLOW_COMMA_in_metArgDeclListOpt3814

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_metArgDeclListOpt3814

      • FOLLOW_metArg_in_metArgDeclListOpt3818

        public static final org.antlr.runtime.BitSet FOLLOW_metArg_in_metArgDeclListOpt3818

      • FOLLOW_IDENT_in_metArg3849

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_metArg3849

      • FOLLOW_configDecl_in_modDecl3884

        public static final org.antlr.runtime.BitSet FOLLOW_configDecl_in_modDecl3884

      • FOLLOW_constDecl_in_modDecl3904

        public static final org.antlr.runtime.BitSet FOLLOW_constDecl_in_modDecl3904

      • FOLLOW_enumDecl_in_modDecl3924

        public static final org.antlr.runtime.BitSet FOLLOW_enumDecl_in_modDecl3924

      • FOLLOW_externDecl_in_modDecl3944

        public static final org.antlr.runtime.BitSet FOLLOW_externDecl_in_modDecl3944

      • FOLLOW_fxnDecl_in_modDecl3964

        public static final org.antlr.runtime.BitSet FOLLOW_fxnDecl_in_modDecl3964

      • FOLLOW_methodDecl_in_modDecl3984

        public static final org.antlr.runtime.BitSet FOLLOW_methodDecl_in_modDecl3984

      • FOLLOW_proxyDecl_in_modDecl4004

        public static final org.antlr.runtime.BitSet FOLLOW_proxyDecl_in_modDecl4004

      • FOLLOW_structDecl_in_modDecl4024

        public static final org.antlr.runtime.BitSet FOLLOW_structDecl_in_modDecl4024

      • FOLLOW_typeDecl_in_modDecl4044

        public static final org.antlr.runtime.BitSet FOLLOW_typeDecl_in_modDecl4044

      • FOLLOW_doc_block_in_modDeclSpec4082

        public static final org.antlr.runtime.BitSet FOLLOW_doc_block_in_modDeclSpec4082

      • FOLLOW_annotation_in_modDeclSpec4088

        public static final org.antlr.runtime.BitSet FOLLOW_annotation_in_modDeclSpec4088

      • FOLLOW_declQuals_in_modDeclSpec4092

        public static final org.antlr.runtime.BitSet FOLLOW_declQuals_in_modDeclSpec4092

      • FOLLOW_modDecl_in_modDeclSpec4096

        public static final org.antlr.runtime.BitSet FOLLOW_modDecl_in_modDeclSpec4096

      • FOLLOW_doc_inline_in_modDeclSpec4100

        public static final org.antlr.runtime.BitSet FOLLOW_doc_inline_in_modDeclSpec4100

      • FOLLOW_pkgReqList_in_pkgSpec4159

        public static final org.antlr.runtime.BitSet FOLLOW_pkgReqList_in_pkgSpec4159

      • FOLLOW_one_doc_block_in_pkgSpec4180

        public static final org.antlr.runtime.BitSet FOLLOW_one_doc_block_in_pkgSpec4180

      • FOLLOW_annotAttr_in_pkgSpec4201

        public static final org.antlr.runtime.BitSet FOLLOW_annotAttr_in_pkgSpec4201

      • FOLLOW_74_in_pkgSpec4234

        public static final org.antlr.runtime.BitSet FOLLOW_74_in_pkgSpec4234

      • FOLLOW_qualName_in_pkgSpec4239

        public static final org.antlr.runtime.BitSet FOLLOW_qualName_in_pkgSpec4239

      • FOLLOW_pkgVers_in_pkgSpec4246

        public static final org.antlr.runtime.BitSet FOLLOW_pkgVers_in_pkgSpec4246

      • FOLLOW_LCUR_in_pkgSpec4258

        public static final org.antlr.runtime.BitSet FOLLOW_LCUR_in_pkgSpec4258

      • FOLLOW_pkgUnit_in_pkgSpec4273

        public static final org.antlr.runtime.BitSet FOLLOW_pkgUnit_in_pkgSpec4273

      • FOLLOW_RCUR_in_pkgSpec4286

        public static final org.antlr.runtime.BitSet FOLLOW_RCUR_in_pkgSpec4286

      • FOLLOW_SEMI_in_pkgSpec4289

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_pkgSpec4289

      • FOLLOW_doc_block_in_pkgSpec4303

        public static final org.antlr.runtime.BitSet FOLLOW_doc_block_in_pkgSpec4303

      • FOLLOW_75_in_pkgReqList4345

        public static final org.antlr.runtime.BitSet FOLLOW_75_in_pkgReqList4345

      • FOLLOW_76_in_pkgReqList4348

        public static final org.antlr.runtime.BitSet FOLLOW_76_in_pkgReqList4348

      • FOLLOW_pkgReq_in_pkgReqList4354

        public static final org.antlr.runtime.BitSet FOLLOW_pkgReq_in_pkgReqList4354

      • FOLLOW_COMMA_in_pkgReqList4358

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_pkgReqList4358

      • FOLLOW_pkgReq_in_pkgReqList4360

        public static final org.antlr.runtime.BitSet FOLLOW_pkgReq_in_pkgReqList4360

      • FOLLOW_SEMI_in_pkgReqList4365

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_pkgReqList4365

      • FOLLOW_qualName_in_pkgReq4396

        public static final org.antlr.runtime.BitSet FOLLOW_qualName_in_pkgReq4396

      • FOLLOW_pkgVers_in_pkgReq4401

        public static final org.antlr.runtime.BitSet FOLLOW_pkgVers_in_pkgReq4401

      • FOLLOW_77_in_pkgUnit4447

        public static final org.antlr.runtime.BitSet FOLLOW_77_in_pkgUnit4447

      • FOLLOW_78_in_pkgUnit4453

        public static final org.antlr.runtime.BitSet FOLLOW_78_in_pkgUnit4453

      • FOLLOW_pkgUnitName_in_pkgUnit4467

        public static final org.antlr.runtime.BitSet FOLLOW_pkgUnitName_in_pkgUnit4467

      • FOLLOW_COMMA_in_pkgUnit4471

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_pkgUnit4471

      • FOLLOW_pkgUnitName_in_pkgUnit4473

        public static final org.antlr.runtime.BitSet FOLLOW_pkgUnitName_in_pkgUnit4473

      • FOLLOW_SEMI_in_pkgUnit4478

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_pkgUnit4478

      • FOLLOW_IDENT_in_pkgUnitName4512

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_pkgUnitName4512

      • FOLLOW_LBRK_in_pkgVers4550

        public static final org.antlr.runtime.BitSet FOLLOW_LBRK_in_pkgVers4550

      • FOLLOW_NUM_in_pkgVers4567

        public static final org.antlr.runtime.BitSet FOLLOW_NUM_in_pkgVers4567

      • FOLLOW_COMMA_in_pkgVers4585

        public static final org.antlr.runtime.BitSet FOLLOW_COMMA_in_pkgVers4585

      • FOLLOW_NUM_in_pkgVers4589

        public static final org.antlr.runtime.BitSet FOLLOW_NUM_in_pkgVers4589

      • FOLLOW_RBRK_in_pkgVers4603

        public static final org.antlr.runtime.BitSet FOLLOW_RBRK_in_pkgVers4603

      • FOLLOW_79_in_proxyDecl4637

        public static final org.antlr.runtime.BitSet FOLLOW_79_in_proxyDecl4637

      • FOLLOW_IDENT_in_proxyDecl4641

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_proxyDecl4641

      • FOLLOW_80_in_proxyDecl4643

        public static final org.antlr.runtime.BitSet FOLLOW_80_in_proxyDecl4643

      • FOLLOW_superInt_in_proxyDecl4647

        public static final org.antlr.runtime.BitSet FOLLOW_superInt_in_proxyDecl4647

      • FOLLOW_SEMI_in_proxyDecl4649

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_proxyDecl4649

      • FOLLOW_IDENT_in_qualName4701

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_qualName4701

      • FOLLOW_PATH_in_qualName4709

        public static final org.antlr.runtime.BitSet FOLLOW_PATH_in_qualName4709

      • FOLLOW_IDENT_in_qualNameStar4751

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_qualNameStar4751

      • FOLLOW_PATH_in_qualNameStar4759

        public static final org.antlr.runtime.BitSet FOLLOW_PATH_in_qualNameStar4759

      • FOLLOW_PATHSTAR_in_qualNameStar4767

        public static final org.antlr.runtime.BitSet FOLLOW_PATHSTAR_in_qualNameStar4767

      • FOLLOW_81_in_structDecl4805

        public static final org.antlr.runtime.BitSet FOLLOW_81_in_structDecl4805

      • FOLLOW_82_in_structDecl4809

        public static final org.antlr.runtime.BitSet FOLLOW_82_in_structDecl4809

      • FOLLOW_IDENT_in_structDecl4817

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_structDecl4817

      • FOLLOW_LCUR_in_structDecl4830

        public static final org.antlr.runtime.BitSet FOLLOW_LCUR_in_structDecl4830

      • FOLLOW_fieldDeclList_in_structDecl4835

        public static final org.antlr.runtime.BitSet FOLLOW_fieldDeclList_in_structDecl4835

      • FOLLOW_RCUR_in_structDecl4840

        public static final org.antlr.runtime.BitSet FOLLOW_RCUR_in_structDecl4840

      • FOLLOW_SEMI_in_structDecl4843

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_structDecl4843

      • FOLLOW_SEMI_in_structDecl4851

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_structDecl4851

      • FOLLOW_81_in_structFieldDecl4901

        public static final org.antlr.runtime.BitSet FOLLOW_81_in_structFieldDecl4901

      • FOLLOW_82_in_structFieldDecl4905

        public static final org.antlr.runtime.BitSet FOLLOW_82_in_structFieldDecl4905

      • FOLLOW_LCUR_in_structFieldDecl4911

        public static final org.antlr.runtime.BitSet FOLLOW_LCUR_in_structFieldDecl4911

      • FOLLOW_fieldDeclList_in_structFieldDecl4916

        public static final org.antlr.runtime.BitSet FOLLOW_fieldDeclList_in_structFieldDecl4916

      • FOLLOW_RCUR_in_structFieldDecl4921

        public static final org.antlr.runtime.BitSet FOLLOW_RCUR_in_structFieldDecl4921

      • FOLLOW_qualName_in_superInt4971

        public static final org.antlr.runtime.BitSet FOLLOW_qualName_in_superInt4971

      • FOLLOW_83_in_typeDecl5015

        public static final org.antlr.runtime.BitSet FOLLOW_83_in_typeDecl5015

      • FOLLOW_typeSpecC_in_typeDecl5017

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecC_in_typeDecl5017

      • FOLLOW_declarator_in_typeDecl5021

        public static final org.antlr.runtime.BitSet FOLLOW_declarator_in_typeDecl5021

      • FOLLOW_SEMI_in_typeDecl5023

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_typeDecl5023

      • FOLLOW_58_in_typeMods5063

        public static final org.antlr.runtime.BitSet FOLLOW_58_in_typeMods5063

      • FOLLOW_84_in_typeMods5074

        public static final org.antlr.runtime.BitSet FOLLOW_84_in_typeMods5074

      • FOLLOW_85_in_typeMods5085

        public static final org.antlr.runtime.BitSet FOLLOW_85_in_typeMods5085

      • FOLLOW_typeSpecG_in_typeSpec5102

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecG_in_typeSpec5102

      • FOLLOW_typeMods_in_typeSpecC5125

        public static final org.antlr.runtime.BitSet FOLLOW_typeMods_in_typeSpecC5125

      • FOLLOW_typeSpecG_in_typeSpecC5127

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecG_in_typeSpecC5127

      • FOLLOW_typeSpecC_in_typeSpecF5144

        public static final org.antlr.runtime.BitSet FOLLOW_typeSpecC_in_typeSpecF5144

      • FOLLOW_structFieldDecl_in_typeSpecF5153

        public static final org.antlr.runtime.BitSet FOLLOW_structFieldDecl_in_typeSpecF5153

      • FOLLOW_qualName_in_typeSpecG5201

        public static final org.antlr.runtime.BitSet FOLLOW_qualName_in_typeSpecG5201

      • FOLLOW_86_in_typeSpecG5237

        public static final org.antlr.runtime.BitSet FOLLOW_86_in_typeSpecG5237

      • FOLLOW_87_in_typeSpecG5284

        public static final org.antlr.runtime.BitSet FOLLOW_87_in_typeSpecG5284

      • FOLLOW_88_in_typeSpecG5331

        public static final org.antlr.runtime.BitSet FOLLOW_88_in_typeSpecG5331

      • FOLLOW_87_in_typeSpecG5333

        public static final org.antlr.runtime.BitSet FOLLOW_87_in_typeSpecG5333

      • FOLLOW_89_in_typeSpecG5369

        public static final org.antlr.runtime.BitSet FOLLOW_89_in_typeSpecG5369

      • FOLLOW_88_in_typeSpecG5415

        public static final org.antlr.runtime.BitSet FOLLOW_88_in_typeSpecG5415

      • FOLLOW_89_in_typeSpecG5417

        public static final org.antlr.runtime.BitSet FOLLOW_89_in_typeSpecG5417

      • FOLLOW_90_in_typeSpecG5452

        public static final org.antlr.runtime.BitSet FOLLOW_90_in_typeSpecG5452

      • FOLLOW_88_in_typeSpecG5500

        public static final org.antlr.runtime.BitSet FOLLOW_88_in_typeSpecG5500

      • FOLLOW_88_in_typeSpecG5543

        public static final org.antlr.runtime.BitSet FOLLOW_88_in_typeSpecG5543

      • FOLLOW_90_in_typeSpecG5545

        public static final org.antlr.runtime.BitSet FOLLOW_90_in_typeSpecG5545

      • FOLLOW_91_in_typeSpecG5582

        public static final org.antlr.runtime.BitSet FOLLOW_91_in_typeSpecG5582

      • FOLLOW_88_in_typeSpecG5629

        public static final org.antlr.runtime.BitSet FOLLOW_88_in_typeSpecG5629

      • FOLLOW_91_in_typeSpecG5631

        public static final org.antlr.runtime.BitSet FOLLOW_91_in_typeSpecG5631

      • FOLLOW_91_in_typeSpecG5667

        public static final org.antlr.runtime.BitSet FOLLOW_91_in_typeSpecG5667

      • FOLLOW_91_in_typeSpecG5669

        public static final org.antlr.runtime.BitSet FOLLOW_91_in_typeSpecG5669

      • FOLLOW_88_in_typeSpecG5709

        public static final org.antlr.runtime.BitSet FOLLOW_88_in_typeSpecG5709

      • FOLLOW_91_in_typeSpecG5711

        public static final org.antlr.runtime.BitSet FOLLOW_91_in_typeSpecG5711

      • FOLLOW_91_in_typeSpecG5713

        public static final org.antlr.runtime.BitSet FOLLOW_91_in_typeSpecG5713

      • FOLLOW_92_in_typeSpecG5742

        public static final org.antlr.runtime.BitSet FOLLOW_92_in_typeSpecG5742

      • FOLLOW_93_in_typeSpecG5788

        public static final org.antlr.runtime.BitSet FOLLOW_93_in_typeSpecG5788

      • FOLLOW_91_in_typeSpecG5833

        public static final org.antlr.runtime.BitSet FOLLOW_91_in_typeSpecG5833

      • FOLLOW_93_in_typeSpecG5835

        public static final org.antlr.runtime.BitSet FOLLOW_93_in_typeSpecG5835

      • FOLLOW_94_in_typeSpecG5873

        public static final org.antlr.runtime.BitSet FOLLOW_94_in_typeSpecG5873

      • FOLLOW_95_in_typeSpecG5918

        public static final org.antlr.runtime.BitSet FOLLOW_95_in_typeSpecG5918

      • FOLLOW_96_in_typeSpecG5970

        public static final org.antlr.runtime.BitSet FOLLOW_96_in_typeSpecG5970

      • FOLLOW_97_in_typeSpecG5986

        public static final org.antlr.runtime.BitSet FOLLOW_97_in_typeSpecG5986

      • FOLLOW_98_in_typeSpecG6033

        public static final org.antlr.runtime.BitSet FOLLOW_98_in_typeSpecG6033

      • FOLLOW_99_in_typeSpecG6079

        public static final org.antlr.runtime.BitSet FOLLOW_99_in_typeSpecG6079

      • FOLLOW_100_in_typeSpecG6125

        public static final org.antlr.runtime.BitSet FOLLOW_100_in_typeSpecG6125

      • FOLLOW_101_in_typeSpecG6170

        public static final org.antlr.runtime.BitSet FOLLOW_101_in_typeSpecG6170

      • FOLLOW_102_in_typeSpecG6218

        public static final org.antlr.runtime.BitSet FOLLOW_102_in_typeSpecG6218

      • FOLLOW_103_in_typeSpecG6265

        public static final org.antlr.runtime.BitSet FOLLOW_103_in_typeSpecG6265

      • FOLLOW_104_in_typeSpecG6312

        public static final org.antlr.runtime.BitSet FOLLOW_104_in_typeSpecG6312

      • FOLLOW_105_in_typeSpecG6358

        public static final org.antlr.runtime.BitSet FOLLOW_105_in_typeSpecG6358

      • FOLLOW_106_in_typeSpecG6404

        public static final org.antlr.runtime.BitSet FOLLOW_106_in_typeSpecG6404

      • FOLLOW_107_in_typeSpecG6449

        public static final org.antlr.runtime.BitSet FOLLOW_107_in_typeSpecG6449

      • FOLLOW_108_in_typeSpecG6495

        public static final org.antlr.runtime.BitSet FOLLOW_108_in_typeSpecG6495

      • FOLLOW_109_in_typeSpecG6540

        public static final org.antlr.runtime.BitSet FOLLOW_109_in_typeSpecG6540

      • FOLLOW_110_in_typeSpecG6584

        public static final org.antlr.runtime.BitSet FOLLOW_110_in_typeSpecG6584

      • FOLLOW_111_in_typeSpecG6630

        public static final org.antlr.runtime.BitSet FOLLOW_111_in_typeSpecG6630

      • FOLLOW_112_in_typeSpecG6683

        public static final org.antlr.runtime.BitSet FOLLOW_112_in_typeSpecG6683

      • FOLLOW_113_in_typeSpecG6699

        public static final org.antlr.runtime.BitSet FOLLOW_113_in_typeSpecG6699

      • FOLLOW_114_in_typeSpecG6746

        public static final org.antlr.runtime.BitSet FOLLOW_114_in_typeSpecG6746

      • FOLLOW_115_in_typeSpecG6793

        public static final org.antlr.runtime.BitSet FOLLOW_115_in_typeSpecG6793

      • FOLLOW_116_in_typeSpecG6839

        public static final org.antlr.runtime.BitSet FOLLOW_116_in_typeSpecG6839

      • FOLLOW_117_in_typeSpecG6884

        public static final org.antlr.runtime.BitSet FOLLOW_117_in_typeSpecG6884

      • FOLLOW_118_in_typeSpecG6929

        public static final org.antlr.runtime.BitSet FOLLOW_118_in_typeSpecG6929

      • FOLLOW_119_in_typeSpecG6974

        public static final org.antlr.runtime.BitSet FOLLOW_119_in_typeSpecG6974

      • FOLLOW_120_in_typeSpecG7021

        public static final org.antlr.runtime.BitSet FOLLOW_120_in_typeSpecG7021

      • FOLLOW_121_in_typeSpecG7069

        public static final org.antlr.runtime.BitSet FOLLOW_121_in_typeSpecG7069

      • FOLLOW_122_in_typeSpecG7116

        public static final org.antlr.runtime.BitSet FOLLOW_122_in_typeSpecG7116

      • FOLLOW_123_in_typeSpecG7162

        public static final org.antlr.runtime.BitSet FOLLOW_123_in_typeSpecG7162

      • FOLLOW_124_in_typeSpecG7208

        public static final org.antlr.runtime.BitSet FOLLOW_124_in_typeSpecG7208

      • FOLLOW_125_in_typeSpecG7254

        public static final org.antlr.runtime.BitSet FOLLOW_125_in_typeSpecG7254

      • FOLLOW_126_in_typeSpecG7302

        public static final org.antlr.runtime.BitSet FOLLOW_126_in_typeSpecG7302

      • FOLLOW_127_in_typeSpecG7349

        public static final org.antlr.runtime.BitSet FOLLOW_127_in_typeSpecG7349

      • FOLLOW_128_in_typeSpecG7394

        public static final org.antlr.runtime.BitSet FOLLOW_128_in_typeSpecG7394

      • FOLLOW_129_in_typeSpecG7438

        public static final org.antlr.runtime.BitSet FOLLOW_129_in_typeSpecG7438

      • FOLLOW_130_in_typeSpecG7484

        public static final org.antlr.runtime.BitSet FOLLOW_130_in_typeSpecG7484

      • FOLLOW_131_in_typeSpecG7529

        public static final org.antlr.runtime.BitSet FOLLOW_131_in_typeSpecG7529

      • FOLLOW_132_in_typeSpecG7574

        public static final org.antlr.runtime.BitSet FOLLOW_132_in_typeSpecG7574

      • FOLLOW_133_in_typeSpecG7634

        public static final org.antlr.runtime.BitSet FOLLOW_133_in_typeSpecG7634

      • FOLLOW_134_in_typeSpecG7682

        public static final org.antlr.runtime.BitSet FOLLOW_134_in_typeSpecG7682

      • FOLLOW_64_in_typeSpecG7729

        public static final org.antlr.runtime.BitSet FOLLOW_64_in_typeSpecG7729

      • FOLLOW_135_in_unitImp7806

        public static final org.antlr.runtime.BitSet FOLLOW_135_in_unitImp7806

      • FOLLOW_qualNameStar_in_unitImp7810

        public static final org.antlr.runtime.BitSet FOLLOW_qualNameStar_in_unitImp7810

      • FOLLOW_136_in_unitImp7813

        public static final org.antlr.runtime.BitSet FOLLOW_136_in_unitImp7813

      • FOLLOW_IDENT_in_unitImp7817

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_unitImp7817

      • FOLLOW_SEMI_in_unitImp7823

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_unitImp7823

      • FOLLOW_74_in_unitSpec7867

        public static final org.antlr.runtime.BitSet FOLLOW_74_in_unitSpec7867

      • FOLLOW_qualName_in_unitSpec7871

        public static final org.antlr.runtime.BitSet FOLLOW_qualName_in_unitSpec7871

      • FOLLOW_SEMI_in_unitSpec7874

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_unitSpec7874

      • FOLLOW_unitImp_in_unitSpec7907

        public static final org.antlr.runtime.BitSet FOLLOW_unitImp_in_unitSpec7907

      • FOLLOW_one_doc_block_in_unitSpec7937

        public static final org.antlr.runtime.BitSet FOLLOW_one_doc_block_in_unitSpec7937

      • FOLLOW_annotAttr_in_unitSpec7958

        public static final org.antlr.runtime.BitSet FOLLOW_annotAttr_in_unitSpec7958

      • FOLLOW_63_in_unitSpec7981

        public static final org.antlr.runtime.BitSet FOLLOW_63_in_unitSpec7981

      • FOLLOW_77_in_unitSpec7996

        public static final org.antlr.runtime.BitSet FOLLOW_77_in_unitSpec7996

      • FOLLOW_78_in_unitSpec8002

        public static final org.antlr.runtime.BitSet FOLLOW_78_in_unitSpec8002

      • FOLLOW_IDENT_in_unitSpec8017

        public static final org.antlr.runtime.BitSet FOLLOW_IDENT_in_unitSpec8017

      • FOLLOW_80_in_unitSpec8033

        public static final org.antlr.runtime.BitSet FOLLOW_80_in_unitSpec8033

      • FOLLOW_superInt_in_unitSpec8037

        public static final org.antlr.runtime.BitSet FOLLOW_superInt_in_unitSpec8037

      • FOLLOW_137_in_unitSpec8042

        public static final org.antlr.runtime.BitSet FOLLOW_137_in_unitSpec8042

      • FOLLOW_superInt_in_unitSpec8046

        public static final org.antlr.runtime.BitSet FOLLOW_superInt_in_unitSpec8046

      • FOLLOW_LCUR_in_unitSpec8058

        public static final org.antlr.runtime.BitSet FOLLOW_LCUR_in_unitSpec8058

      • FOLLOW_modDeclSpec_in_unitSpec8073

        public static final org.antlr.runtime.BitSet FOLLOW_modDeclSpec_in_unitSpec8073

      • FOLLOW_138_in_unitSpec8088

        public static final org.antlr.runtime.BitSet FOLLOW_138_in_unitSpec8088

      • FOLLOW_COLON_in_unitSpec8090

        public static final org.antlr.runtime.BitSet FOLLOW_COLON_in_unitSpec8090

      • FOLLOW_instDeclSpec_in_unitSpec8116

        public static final org.antlr.runtime.BitSet FOLLOW_instDeclSpec_in_unitSpec8116

      • FOLLOW_76_in_unitSpec8142

        public static final org.antlr.runtime.BitSet FOLLOW_76_in_unitSpec8142

      • FOLLOW_COLON_in_unitSpec8144

        public static final org.antlr.runtime.BitSet FOLLOW_COLON_in_unitSpec8144

      • FOLLOW_internDeclSpec_in_unitSpec8180

        public static final org.antlr.runtime.BitSet FOLLOW_internDeclSpec_in_unitSpec8180

      • FOLLOW_RCUR_in_unitSpec8209

        public static final org.antlr.runtime.BitSet FOLLOW_RCUR_in_unitSpec8209

      • FOLLOW_SEMI_in_unitSpec8212

        public static final org.antlr.runtime.BitSet FOLLOW_SEMI_in_unitSpec8212

      • FOLLOW_doc_block_in_unitSpec8226

        public static final org.antlr.runtime.BitSet FOLLOW_doc_block_in_unitSpec8226

    • Constructor Detail

      • GrammarParser

        public GrammarParser(org.antlr.runtime.TokenStream input)

      • GrammarParser

        public GrammarParser(org.antlr.runtime.TokenStream input,
             org.antlr.runtime.RecognizerSharedState state)

    • Method Detail

      • getTokenNames

        public java.lang.String[] getTokenNames()
        Overrides:
        getTokenNames in class org.antlr.runtime.BaseRecognizer

      • getGrammarFileName

        public java.lang.String getGrammarFileName()
        Overrides:
        getGrammarFileName in class org.antlr.runtime.BaseRecognizer

      • reportError

        public void reportError(org.antlr.runtime.RecognitionException e)
        Overrides:
        reportError in class org.antlr.runtime.BaseRecognizer

      • reportError

        public void reportError(java.lang.String message)

      • reportError

        public void reportError(java.lang.String message,
               int line)
        Report an error at the given line.

      • absDeclarator

        public final Type absDeclarator()
                         throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • absDeclarator_tail

        public final Type absDeclarator_tail(Type base)
                              throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • absArgDeclListOpt

        public final java.util.ArrayList<Decl.Arg> absArgDeclListOpt()
                                                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • absArgDecl

        public final Decl absArgDecl()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • annotation

        public final java.util.ArrayList<Attr> annotation()
                                           throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • annotAttr

        public final java.util.ArrayList<Attr> annotAttr(java.util.ArrayList<Attr> aL)
                                          throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • argDeclListOpt

        public final java.util.ArrayList<Decl.Arg> argDeclListOpt()
                                                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • argDecl

        public final Decl argDecl()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • basicDeclarator

        public final Type basicDeclarator()
                           throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • configDecl

        public final Decl configDecl()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • constDecl

        public final Decl constDecl()
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • declQuals

        public final void declQuals()
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • declarator

        public final Type declarator()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • declarator_term

        public final Type declarator_term()
                           throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • declarator_tail

        public final Type declarator_tail(Type base)
                           throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • doc_block

        public final java.util.ArrayList<DocComment> doc_block(java.util.ArrayList<DocComment> dL)
                                                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • one_doc_block

        public final java.util.ArrayList<DocComment> one_doc_block(java.util.ArrayList<DocComment> dL)
                                                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • doc_inline

        public final java.util.ArrayList<DocComment> doc_inline(java.util.ArrayList<DocComment> dL)
                                                 throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • enumDecl

        public final Decl enumDecl()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • enumRep

        public final Type.Spec enumRep()
                        throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • enumValList

        public final void enumValList(java.util.ArrayList<Decl.EnumVal> evL)
                       throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • enumVal

        public final Decl enumVal()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • expr

        public final Expr expr()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • exprProp

        public final void exprProp(java.util.List<Atom> iL,
            java.util.List<Expr> eL)
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • exprCnd

        public final Expr exprCnd()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • exprBin

        public final Expr exprBin()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • exprUry

        public final Expr exprUry()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • exprTrm

        public final Expr exprTrm()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • exprList

        public final java.util.List<Expr> exprList()
                                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • eBOP

        public final Atom eBOP()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • eUOP

        public final Atom eUOP()
                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • externDecl

        public final Decl externDecl()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • fieldDeclList

        public final void fieldDeclList(java.util.List<Decl.Field> fL)
                         throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • fieldDecl

        public final Decl fieldDecl()
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • fxnDecl

        public final Decl fxnDecl()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • fxnHdr

        public final Type fxnHdr()
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • instDecl

        public final Decl instDecl()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • instDeclSpec

        public final Decl instDeclSpec()
                        throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • internDecl

        public final Decl internDecl()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • internDeclSpec

        public final Decl internDeclSpec()
                          throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • methodDecl

        public final Decl methodDecl()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • metArgDeclListOpt

        public final java.util.ArrayList<Decl.Arg> metArgDeclListOpt()
                                                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • metArg

        public final Decl.Arg metArg()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • modDecl

        public final Decl modDecl()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • modDeclSpec

        public final Decl modDeclSpec()
                       throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • pkgSpec

        public final Pkg pkgSpec(java.lang.String pkgFile)
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • pkgReqList

        public final void pkgReqList(java.util.List<Atom> rL)
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • pkgReq

        public final void pkgReq(java.util.List<Atom> rlist,
          boolean iFlg)
                  throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • pkgUnit

        public final void pkgUnit(java.util.List<Atom> mlist,
           java.util.List<Atom> ilist)
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • pkgUnitName

        public final void pkgUnitName(java.util.List<Atom> l)
                       throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • pkgVers

        public final java.lang.String pkgVers()
                               throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • proxyDecl

        public final Decl proxyDecl()
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • qualName

        public final Atom qualName()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • qualNameStar

        public final Atom qualNameStar()
                        throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • structDecl

        public final Decl structDecl()
                      throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • structFieldDecl

        public final Decl structFieldDecl()
                           throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • superInt

        public final Sup superInt()
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • typeDecl

        public final Decl typeDecl()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • typeMods

        public final java.util.EnumSet<Type.Modifier> typeMods()
                                                throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • typeSpec

        public final void typeSpec()
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • typeSpecC

        public final void typeSpecC()
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • typeSpecF

        public final void typeSpecF()
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • typeSpecG

        public final void typeSpecG(java.util.EnumSet<Type.Modifier> mods)
                     throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • unitImp

        public final void unitImp(java.util.List<Import> iL)
                   throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException

      • unitSpec

        public final Unit unitSpec(java.lang.String pname)
                    throws org.antlr.runtime.RecognitionException
        Throws:
        org.antlr.runtime.RecognitionException
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Import

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xdc.services.spec

Class Import

  • java.lang.Object
    • xdc.services.spec.Import
  • All Implemented Interfaces:
    java.io.Serializable

    public class Import
extends java.lang.Object
implements java.io.Serializable
    See Also:
    Serialized Form

    • Method Summary

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait
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Node

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xdc.services.spec

Class Node

  • java.lang.Object
    • xdc.services.spec.Node
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>
    Direct Known Subclasses:
    Decl, Pkg, Unit

    public abstract class Node
extends java.lang.Object
implements java.lang.Comparable<Node>, java.io.Serializable
    Abstract superclass for any formally declared object in a .xdc file.
    See Also:
    Serialized Form

    • Constructor Summary

      Constructors
      Constructor and Description
      Node()

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      boolean | attrBool(java.lang.String id)
      int | attrInt(java.lang.String id)
      java.lang.String | attrString(java.lang.String id)
      int | compareTo(Node n)
      Atom getAtom()
      java.util.Map<java.lang.String,Attr> | getAttrMap()
      abstract java.util.List<? extends Node> | getChildren()
      java.util.List<DocComment> | getDocs()
      java.lang.String | getName()
      Node getParent()
      java.lang.String | getPkgName()
      abstract java.lang.String | getQualName()
      Session getSession()
      java.lang.String | getSummary()
      abstract java.lang.String | getXmlTag()
      boolean | hasAttr(java.lang.String id)
      boolean | isExternal()
      boolean | isFinal()
      boolean | isInst()
      boolean | isInter()
      boolean | isInternal()
      boolean | isMeta()
      boolean | isMod()
      boolean | isNodoc()
      boolean | isOver()
      boolean | isReadonly()
      boolean | isStatic()
      boolean | isSys()
      XDoc makeXDoc()

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Node

        public Node()

    • Method Detail

      • attrBool

        public boolean attrBool(java.lang.String id)

      • attrInt

        public int attrInt(java.lang.String id)

      • attrString

        public java.lang.String attrString(java.lang.String id)

      • compareTo

        public int compareTo(Node n)
        Specified by:
        compareTo in interface java.lang.Comparable<Node>

      • getAttrMap

        public final java.util.Map<java.lang.String,Attr> getAttrMap()

      • getChildren

        public abstract java.util.List<? extends Node> getChildren()

      • getDocs

        public final java.util.List<DocComment> getDocs()

      • getName

        public java.lang.String getName()

      • getAtom

        public Atom getAtom()

      • getSummary

        public final java.lang.String getSummary()

      • getParent

        public Node getParent()

      • getPkgName

        public java.lang.String getPkgName()

      • getSession

        public Session getSession()

      • getQualName

        public abstract java.lang.String getQualName()

      • getXmlTag

        public abstract java.lang.String getXmlTag()

      • hasAttr

        public boolean hasAttr(java.lang.String id)

      • isExternal

        public final boolean isExternal()

      • isFinal

        public final boolean isFinal()

      • isInter

        public final boolean isInter()

      • isInternal

        public final boolean isInternal()

      • isInst

        public final boolean isInst()

      • isMeta

        public final boolean isMeta()

      • isMod

        public final boolean isMod()

      • isNodoc

        public final boolean isNodoc()

      • isOver

        public final boolean isOver()

      • isReadonly

        public final boolean isReadonly()

      • isStatic

        public final boolean isStatic()

      • isSys

        public final boolean isSys()

      • makeXDoc

        public final XDoc makeXDoc()
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xdc.services.spec

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Package xdc.services.spec

  • Interface Summary
    Interface Description
    Decl.Annexable
    Decl.AuxDef
    Decl.IsType
    Decl.LocalUnit
    Decl.OverridableDef
    Decl.Signature
    Decl.Sizeable
    Expr.Aggregate
  • Class Summary
    Class Description
    Atom
    The class that represents a token in a specification file.
    Attr
    BrowserSession
    Cache
    Cache of spec objects for a session.
    Decl
    Decl.Arg
    Decl.Config
    Decl.Const
    Decl.Enum
    Decl.EnumVal
    Decl.Extern
    Decl.Field
    Decl.Fxn
    Decl.Proxy
    Decl.Struct
    Decl.Typedef
    DocComment
    Expr
    Expr.Array
    Expr.Binary
    Expr.Cond
    Expr.Const
    Expr.Creat
    Expr.Hash
    Expr.Paren
    Expr.Term
    Expr.Unary
    GrammarLexer
    GrammarParser
    Import
    Node
    Abstract superclass for any formally declared object in a .xdc file.
    ParserSession
    Persist
    Spec serialization and deserialization support.
    Persist.Fixup
    Serialized form of a reference to a Node in another package.
    Persist.Input
    ObjectInputStream that reconstructs references to foreign packages.
    Persist.Output
    ObjectOutputStream that restricts to the current package.
    Pkg
    Ref
    Reserved
    Session
    Sup
    Test
    Type
    Type.Array
    Type.Creator
    Type.Declarator
    Type.Fxn
    Type.Paren
    Type.Ptr
    Type.Spec
    Unit
    XDoc
  • Enum Summary
    Enum Description
    Decl.Signature.ObjKind
    Qual
    Type.Array.Kind
    Type.Modifier
  • Exception Summary
    Exception Description
    SessionRuntimeException
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xdc.services.spec Class Hierarchy

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Hierarchy For Package xdc.services.spec

Class Hierarchy

  • java.lang.Object
    • xdc.services.spec.Attr (implements java.io.Serializable)
    • org.antlr.runtime.BaseRecognizer
      • org.antlr.runtime.Lexer (implements org.antlr.runtime.TokenSource)
        • xdc.services.spec.GrammarLexer
      • org.antlr.runtime.Parser
        • xdc.services.spec.GrammarParser
    • xdc.services.spec.Cache
    • org.antlr.runtime.CommonToken (implements java.io.Serializable, org.antlr.runtime.Token)
      • xdc.services.spec.Atom (implements java.io.Serializable)
    • xdc.services.spec.DocComment (implements java.io.Serializable)
    • xdc.services.spec.Expr (implements java.io.Serializable)
      • xdc.services.spec.Expr.Array (implements xdc.services.spec.Expr.Aggregate)
      • xdc.services.spec.Expr.Binary
      • xdc.services.spec.Expr.Cond
      • xdc.services.spec.Expr.Const
      • xdc.services.spec.Expr.Creat
      • xdc.services.spec.Expr.Hash (implements xdc.services.spec.Expr.Aggregate)
      • xdc.services.spec.Expr.Paren
      • xdc.services.spec.Expr.Term
      • xdc.services.spec.Expr.Unary
    • xdc.services.spec.Import (implements java.io.Serializable)
    • java.io.InputStream (implements java.io.Closeable)
      • java.io.ObjectInputStream (implements java.io.ObjectInput, java.io.ObjectStreamConstants)
        • xdc.services.spec.Persist.Input
    • xdc.services.spec.Node (implements java.lang.Comparable<T>, java.io.Serializable)
      • xdc.services.spec.Decl
        • xdc.services.spec.Decl.Arg (implements xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Config (implements xdc.services.spec.Decl.Annexable, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Const (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.OverridableDef, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Enum (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.IsType, xdc.services.spec.Decl.Sizeable)
        • xdc.services.spec.Decl.EnumVal (implements xdc.services.spec.Decl.AuxDef)
        • xdc.services.spec.Decl.Extern (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Field (implements xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Fxn (implements xdc.services.spec.Decl.Annexable, xdc.services.spec.Decl.Signature)
        • xdc.services.spec.Decl.Proxy (implements xdc.services.spec.Decl.LocalUnit)
        • xdc.services.spec.Decl.Struct (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.IsType, xdc.services.spec.Decl.Sizeable)
        • xdc.services.spec.Decl.Typedef (implements xdc.services.spec.Decl.AuxDef, xdc.services.spec.Decl.IsType, xdc.services.spec.Decl.Signature, xdc.services.spec.Decl.Sizeable)
      • xdc.services.spec.Pkg
      • xdc.services.spec.Unit
    • java.io.OutputStream (implements java.io.Closeable, java.io.Flushable)
      • java.io.ObjectOutputStream (implements java.io.ObjectOutput, java.io.ObjectStreamConstants)
        • xdc.services.spec.Persist.Output
    • xdc.services.spec.Persist
    • xdc.services.spec.Persist.Fixup (implements java.io.Serializable)
    • xdc.services.spec.Ref (implements java.io.Serializable)
    • xdc.services.spec.Reserved
    • xdc.services.spec.Session
      • xdc.services.spec.BrowserSession
      • xdc.services.spec.ParserSession
    • xdc.services.spec.Sup (implements java.io.Serializable)
    • xdc.services.spec.Test
    • java.lang.Throwable (implements java.io.Serializable)
      • java.lang.Exception
        • java.lang.RuntimeException
          • org.mozilla.javascript.RhinoException
            • org.mozilla.javascript.EvaluatorException
              • xdc.services.spec.SessionRuntimeException
    • xdc.services.spec.Type (implements java.io.Serializable)
      • xdc.services.spec.Type.Array
      • xdc.services.spec.Type.Creator
      • xdc.services.spec.Type.Declarator
      • xdc.services.spec.Type.Fxn
      • xdc.services.spec.Type.Paren
      • xdc.services.spec.Type.Ptr
      • xdc.services.spec.Type.Spec
    • xdc.services.spec.XDoc

Interface Hierarchy

  • xdc.services.spec.Decl.Annexable
  • xdc.services.spec.Decl.AuxDef
  • xdc.services.spec.Decl.IsType
  • xdc.services.spec.Decl.LocalUnit
  • xdc.services.spec.Decl.OverridableDef
  • xdc.services.spec.Decl.Signature
  • xdc.services.spec.Decl.Sizeable
  • xdc.services.spec.Expr.Aggregate

Enum Hierarchy

  • java.lang.Object
    • java.lang.Enum<E> (implements java.lang.Comparable<T>, java.io.Serializable)
      • xdc.services.spec.Type.Modifier
      • xdc.services.spec.Qual
      • xdc.services.spec.Decl.Signature.ObjKind
      • xdc.services.spec.Type.Array.Kind
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ParserSession

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xdc.services.spec

Class ParserSession

  • java.lang.Object
    • xdc.services.spec.Session
      • xdc.services.spec.ParserSession

  • public class ParserSession
extends Session

    • Field Summary

      • Fields inherited from class xdc.services.spec.Session

        msg

    • Constructor Summary

      Constructors
      Constructor and Description
      ParserSession()
      No arg constructor
      ParserSession(xdc.services.global.Env env)
      Create a parser session with a given environment
      ParserSession(xdc.services.global.Env env, Cache cache)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Pkg | compile(java.lang.String pkgFile)
      void | save()
      void | save(java.io.File pdir)
      Pkg | scan(java.lang.String pkgFile)
      boolean | setStrict(boolean strict)
      void | setVerbose(boolean verbose)

      • Methods inherited from class xdc.services.spec.Session

        findDecl, findDecl, findPkg, findUnit, findUnit, getEnv, getVers, setEnv, setErr, setWarnings

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • ParserSession

        public ParserSession()
        No arg constructor

      • ParserSession

        public ParserSession(xdc.services.global.Env env)
        Create a parser session with a given environment

      • ParserSession

        public ParserSession(xdc.services.global.Env env,
             Cache cache)

    • Method Detail

      • compile

        public Pkg compile(java.lang.String pkgFile)

      • save

        public void save()

      • save

        public void save(java.io.File pdir)

      • scan

        public Pkg scan(java.lang.String pkgFile)

      • setVerbose

        public void setVerbose(boolean verbose)

      • setStrict

        public boolean setStrict(boolean strict)
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Persist

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xdc.services.spec

Class Persist

  • java.lang.Object
    • xdc.services.spec.Persist

  • public class Persist
extends java.lang.Object
    Spec serialization and deserialization support. On serialization, prunes references to spec objects in other packages and fixes them up on deserialization.

    • Nested Class Summary

      Nested Classes
      Modifier and Type Class and Description
      static class  Persist.Fixup
      Serialized form of a reference to a Node in another package.
      static class  Persist.Input
      ObjectInputStream that reconstructs references to foreign packages.
      static class  Persist.Output
      ObjectOutputStream that restricts to the current package.

    • Constructor Summary

      Constructors
      Constructor and Description
      Persist()

    • Method Summary

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Persist

        public Persist()
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Persist.Fixup

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xdc.services.spec

Class Persist.Fixup

  • java.lang.Object
    • xdc.services.spec.Persist.Fixup
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Persist

    public static class Persist.Fixup
extends java.lang.Object
implements java.io.Serializable
    Serialized form of a reference to a Node in another package.
    See Also:
    Serialized Form

    • Constructor Summary

      Constructors
      Constructor and Description
      Persist.Fixup(Node n)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getDeclName()
      java.lang.String | getPkgName()
      java.lang.String | getQualName()
      boolean | isPkg()

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Persist.Fixup

        public Persist.Fixup(Node n)

    • Method Detail

      • getPkgName

        public java.lang.String getPkgName()

      • getQualName

        public java.lang.String getQualName()

      • getDeclName

        public java.lang.String getDeclName()

      • isPkg

        public boolean isPkg()
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Persist.Input

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xdc.services.spec

Class Persist.Input

  • java.lang.Object
    • java.io.InputStream
      • java.io.ObjectInputStream
        • xdc.services.spec.Persist.Input
  • All Implemented Interfaces:
    java.io.Closeable, java.io.DataInput, java.io.ObjectInput, java.io.ObjectStreamConstants, java.lang.AutoCloseable
    Enclosing class:
    Persist

    public static class Persist.Input
extends java.io.ObjectInputStream
    ObjectInputStream that reconstructs references to foreign packages.

    • Nested Class Summary

      • Nested classes/interfaces inherited from class java.io.ObjectInputStream

        java.io.ObjectInputStream.GetField

    • Field Summary

      • Fields inherited from interface java.io.ObjectStreamConstants

        baseWireHandle, PROTOCOL_VERSION_1, PROTOCOL_VERSION_2, SC_BLOCK_DATA, SC_ENUM, SC_EXTERNALIZABLE, SC_SERIALIZABLE, SC_WRITE_METHOD, STREAM_MAGIC, STREAM_VERSION, SUBCLASS_IMPLEMENTATION_PERMISSION, SUBSTITUTION_PERMISSION, TC_ARRAY, TC_BASE, TC_BLOCKDATA, TC_BLOCKDATALONG, TC_CLASS, TC_CLASSDESC, TC_ENDBLOCKDATA, TC_ENUM, TC_EXCEPTION, TC_LONGSTRING, TC_MAX, TC_NULL, TC_OBJECT, TC_PROXYCLASSDESC, TC_REFERENCE, TC_RESET, TC_STRING

    • Constructor Summary

      Constructors
      Constructor and Description
      Persist.Input(java.lang.String pkgName, java.io.InputStream in, BrowserSession ses)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      protected java.lang.Object | resolveObject(java.lang.Object obj)

      • Methods inherited from class java.io.ObjectInputStream

        available, close, defaultReadObject, enableResolveObject, read, read, readBoolean, readByte, readChar, readClassDescriptor, readDouble, readFields, readFloat, readFully, readFully, readInt, readLine, readLong, readObject, readObjectOverride, readShort, readStreamHeader, readUnshared, readUnsignedByte, readUnsignedShort, readUTF, registerValidation, resolveClass, resolveProxyClass, skipBytes

      • Methods inherited from class java.io.InputStream

        mark, markSupported, read, reset, skip

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

      • Methods inherited from interface java.io.ObjectInput

        read, skip

    • Constructor Detail

      • Persist.Input

        public Persist.Input(java.lang.String pkgName,
             java.io.InputStream in,
             BrowserSession ses)
              throws java.io.IOException
        Throws:
        java.io.IOException

    • Method Detail

      • resolveObject

        protected java.lang.Object resolveObject(java.lang.Object obj)
                                  throws java.io.IOException
        Overrides:
        resolveObject in class java.io.ObjectInputStream
        Throws:
        java.io.IOException
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Persist.Output

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xdc.services.spec

Class Persist.Output

  • java.lang.Object
    • java.io.OutputStream
      • java.io.ObjectOutputStream
        • xdc.services.spec.Persist.Output
  • All Implemented Interfaces:
    java.io.Closeable, java.io.DataOutput, java.io.Flushable, java.io.ObjectOutput, java.io.ObjectStreamConstants, java.lang.AutoCloseable
    Enclosing class:
    Persist

    public static class Persist.Output
extends java.io.ObjectOutputStream
    ObjectOutputStream that restricts to the current package. Whenever this ObjectOutputStream sees a reference to a node in another package, it replaces the referenced Node with instructions to fix up that reference on deserialization.

    • Nested Class Summary

      • Nested classes/interfaces inherited from class java.io.ObjectOutputStream

        java.io.ObjectOutputStream.PutField

    • Field Summary

      • Fields inherited from interface java.io.ObjectStreamConstants

        baseWireHandle, PROTOCOL_VERSION_1, PROTOCOL_VERSION_2, SC_BLOCK_DATA, SC_ENUM, SC_EXTERNALIZABLE, SC_SERIALIZABLE, SC_WRITE_METHOD, STREAM_MAGIC, STREAM_VERSION, SUBCLASS_IMPLEMENTATION_PERMISSION, SUBSTITUTION_PERMISSION, TC_ARRAY, TC_BASE, TC_BLOCKDATA, TC_BLOCKDATALONG, TC_CLASS, TC_CLASSDESC, TC_ENDBLOCKDATA, TC_ENUM, TC_EXCEPTION, TC_LONGSTRING, TC_MAX, TC_NULL, TC_OBJECT, TC_PROXYCLASSDESC, TC_REFERENCE, TC_RESET, TC_STRING

    • Constructor Summary

      Constructors
      Constructor and Description
      Persist.Output(java.io.OutputStream out, java.lang.String curPkg)

    • Method Summary

      Methods
      Modifier and Type Method and Description
      protected java.lang.Object replaceObject(java.lang.Object obj)
      Inspect each object before serialization.

      • Methods inherited from class java.io.ObjectOutputStream

        annotateClass, annotateProxyClass, close, defaultWriteObject, drain, enableReplaceObject, flush, putFields, reset, useProtocolVersion, write, write, write, writeBoolean, writeByte, writeBytes, writeChar, writeChars, writeClassDescriptor, writeDouble, writeFields, writeFloat, writeInt, writeLong, writeObject, writeObjectOverride, writeShort, writeStreamHeader, writeUnshared, writeUTF

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Persist.Output

        public Persist.Output(java.io.OutputStream out,
              java.lang.String curPkg)
               throws java.io.IOException
        Throws:
        java.io.IOException

    • Method Detail

      • replaceObject

        protected java.lang.Object replaceObject(java.lang.Object obj)
                                  throws java.io.IOException
        Inspect each object before serialization. If the object is a reference to a node in a different package, replace it with a Fixup.
        Overrides:
        replaceObject in class java.io.ObjectOutputStream
        Throws:
        java.io.IOException
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Pkg

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xdc.services.spec

Class Pkg

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Pkg
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>

    public class Pkg
extends Node
    See Also:
    Serialized Form

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getBaseDir()
      java.util.List<Unit> | getChildren()
      java.util.List<Atom> | getInterNames()
      java.lang.String | getKey()
      java.util.List<java.lang.String> | getLocalSpecs()
      java.util.List<java.lang.String> | getMiscSrcs()
      java.util.List<Atom> | getModNames()
      java.util.List<java.lang.String> | getOtherSpecs()
      java.lang.String | getPkgName()
      java.lang.String | getProviderId()
      java.lang.String | getQualName()
      java.lang.String | getReleaseVersion()
      java.lang.String | getRepository()
      java.util.List<Atom> | getRequires()
      java.util.List<Unit> | getUnits()
      java.lang.String | getVersion()
      java.lang.String | getXmlTag()

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getBaseDir

        public final java.lang.String getBaseDir()

      • getRepository

        public final java.lang.String getRepository()

      • getChildren

        public final java.util.List<Unit> getChildren()
        Specified by:
        getChildren in class Node

      • getInterNames

        public final java.util.List<Atom> getInterNames()

      • getModNames

        public final java.util.List<Atom> getModNames()

      • getRequires

        public final java.util.List<Atom> getRequires()

      • getQualName

        public final java.lang.String getQualName()
        Specified by:
        getQualName in class Node

      • getPkgName

        public final java.lang.String getPkgName()
        Overrides:
        getPkgName in class Node

      • getLocalSpecs

        public final java.util.List<java.lang.String> getLocalSpecs()

      • getMiscSrcs

        public final java.util.List<java.lang.String> getMiscSrcs()

      • getOtherSpecs

        public final java.util.List<java.lang.String> getOtherSpecs()

      • getUnits

        public final java.util.List<Unit> getUnits()

      • getKey

        public final java.lang.String getKey()

      • getVersion

        public final java.lang.String getVersion()

      • getReleaseVersion

        public final java.lang.String getReleaseVersion()

      • getProviderId

        public final java.lang.String getProviderId()

      • getXmlTag

        public final java.lang.String getXmlTag()
        Specified by:
        getXmlTag in class Node
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Qual

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xdc.services.spec

Enum Qual

  • java.lang.Object
    • java.lang.Enum<Qual>
      • xdc.services.spec.Qual
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Qual>

    public enum Qual
extends java.lang.Enum<Qual>

    • Enum Constant Summary

      Enum Constants
      Enum Constant and Description
      FINAL
      INSTANCE
      INTERFACE
      INTERNAL
      METAONLY
      MODULE
      OVERRIDE
      READONLY
      SYSTEM

    • Method Summary

      Methods
      Modifier and Type Method and Description
      static Qual valueOf(java.lang.String name)
      Returns the enum constant of this type with the specified name.
      static Qual[] values()
      Returns an array containing the constants of this enum type, in the order they are declared.

      • Methods inherited from class java.lang.Enum

        clone, compareTo, equals, finalize, getDeclaringClass, hashCode, name, ordinal, toString, valueOf

      • Methods inherited from class java.lang.Object

        getClass, notify, notifyAll, wait, wait, wait

    • Enum Constant Detail

      • FINAL

        public static final Qual FINAL

      • INSTANCE

        public static final Qual INSTANCE

      • INTERFACE

        public static final Qual INTERFACE

      • INTERNAL

        public static final Qual INTERNAL

      • METAONLY

        public static final Qual METAONLY

      • MODULE

        public static final Qual MODULE

      • OVERRIDE

        public static final Qual OVERRIDE

      • READONLY

        public static final Qual READONLY

      • SYSTEM

        public static final Qual SYSTEM

    • Method Detail

      • values

        public static Qual[] values()
        Returns an array containing the constants of this enum type, in the order they are declared. This method may be used to iterate over the constants as follows:
        for (Qual c : Qual.values())
    System.out.println(c);
        Returns:
        an array containing the constants of this enum type, in the order they are declared

      • valueOf

        public static Qual valueOf(java.lang.String name)
        Returns the enum constant of this type with the specified name. The string must match exactly an identifier used to declare an enum constant in this type. (Extraneous whitespace characters are not permitted.)
        Parameters:
        name - the name of the enum constant to be returned.
        Returns:
        the enum constant with the specified name
        Throws:
        java.lang.IllegalArgumentException - if this enum type has no constant with the specified name
        java.lang.NullPointerException - if the argument is null
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Ref

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xdc.services.spec

Class Ref

  • java.lang.Object
    • xdc.services.spec.Ref
  • All Implemented Interfaces:
    java.io.Serializable

    public class Ref
extends java.lang.Object
implements java.io.Serializable
    See Also:
    Serialized Form

    • Constructor Summary

      Constructors
      Constructor and Description
      Ref(java.lang.String name)
      External constructor.

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getId()
      Node getNode()
      Decl.Proxy getProxy()
      java.lang.String | getScope()
      boolean | isGlobal()
      Unit resolve(Unit uspec, boolean local)
      Resolve this reference.

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Ref

        public Ref(java.lang.String name)
        External constructor. Simple constructor that provides no file or line number information for the source of the reference.

    • Method Detail

      • getId

        public final java.lang.String getId()

      • getNode

        public final Node getNode()

      • getProxy

        public final Decl.Proxy getProxy()

      • getScope

        public final java.lang.String getScope()

      • isGlobal

        public final boolean isGlobal()

      • resolve

        public Unit resolve(Unit uspec,
           boolean local)
        Resolve this reference.
        Parameters:
        uspec - the module or interface making this reference.
        local - if true, the reference is to a decl within the same unit making the reference. The text of the reference excludes the name of the unit.
        Returns:
        the unit that exports the referenced declaration. It is up to the caller to descend into the unit to find the actual declaration.
        Throws:
        SessionRuntimeException - if can't be resolved.
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Reserved

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xdc.services.spec

Class Reserved

  • java.lang.Object
    • xdc.services.spec.Reserved

  • public class Reserved
extends java.lang.Object

    • Constructor Summary

      Constructors
      Constructor and Description
      Reserved()

    • Method Summary

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Reserved

        public Reserved()
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Session

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xdc.services.spec

Class Session

  • java.lang.Object
    • xdc.services.spec.Session
  • Direct Known Subclasses:
    BrowserSession, ParserSession

    public abstract class Session
extends java.lang.Object

    • Field Summary

      Fields
      Modifier and Type | Field and Description
      protected xdc.services.spec.Msg | msg

    • Constructor Summary

      Constructors
      Constructor and Description
      Session()
      Session(xdc.services.global.Env env)
      Session(xdc.services.global.Env env, Cache cache)

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Decl | findDecl(java.lang.String qn)
      Decl | findDecl(Unit unit, java.lang.String n)
      Pkg | findPkg(java.lang.String qn)
      Unit | findUnit(Pkg pkg, java.lang.String n)
      Unit | findUnit(java.lang.String qn)
      xdc.services.global.Env | getEnv()
      int | getVers()
      void | setEnv(xdc.services.global.Env env)
      void | setErr(java.io.PrintWriter err)
      boolean | setWarnings(boolean warnings)

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Field Detail

      • msg

        protected xdc.services.spec.Msg msg

    • Constructor Detail

      • Session

        public Session()

      • Session

        public Session(xdc.services.global.Env env)

      • Session

        public Session(xdc.services.global.Env env,
       Cache cache)

    • Method Detail

      • setEnv

        public void setEnv(xdc.services.global.Env env)

      • getEnv

        public xdc.services.global.Env getEnv()

      • setErr

        public void setErr(java.io.PrintWriter err)

      • setWarnings

        public boolean setWarnings(boolean warnings)

      • findDecl

        public Decl findDecl(Unit unit,
            java.lang.String n)

      • findDecl

        public Decl findDecl(java.lang.String qn)

      • findPkg

        public Pkg findPkg(java.lang.String qn)

      • findUnit

        public Unit findUnit(Pkg pkg,
            java.lang.String n)

      • findUnit

        public Unit findUnit(java.lang.String qn)

      • getVers

        public int getVers()
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SessionRuntimeException

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xdc.services.spec

Class SessionRuntimeException

  • java.lang.Object
    • java.lang.Throwable
      • java.lang.Exception
        • java.lang.RuntimeException
          • org.mozilla.javascript.RhinoException
            • org.mozilla.javascript.EvaluatorException
              • xdc.services.spec.SessionRuntimeException
  • All Implemented Interfaces:
    java.io.Serializable

    public class SessionRuntimeException
extends org.mozilla.javascript.EvaluatorException
    See Also:
    Serialized Form

    • Constructor Summary

      Constructors
      Constructor and Description
      SessionRuntimeException(java.lang.String message)

    • Method Summary

      • Methods inherited from class org.mozilla.javascript.EvaluatorException

        getColumnNumber, getLineNumber, getLineSource, getSourceName

      • Methods inherited from class org.mozilla.javascript.RhinoException

        columnNumber, details, getMessage, getScriptStack, getScriptStackTrace, getScriptStackTrace, initColumnNumber, initLineNumber, initLineSource, initSourceName, lineNumber, lineSource, printStackTrace, printStackTrace, sourceName, useMozillaStackStyle, usesMozillaStackStyle

      • Methods inherited from class java.lang.Throwable

        addSuppressed, fillInStackTrace, getCause, getLocalizedMessage, getStackTrace, getSuppressed, initCause, printStackTrace, setStackTrace, toString

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, wait, wait, wait

    • Constructor Detail

      • SessionRuntimeException

        public SessionRuntimeException(java.lang.String message)
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Sup

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xdc.services.spec

Class Sup

  • java.lang.Object
    • xdc.services.spec.Sup
  • All Implemented Interfaces:
    java.io.Serializable

    public class Sup
extends java.lang.Object
implements java.io.Serializable
    See Also:
    Serialized Form

    • Method Summary

      Methods
      Modifier and Type Method and Description
      Unit getUnit()

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getUnit

        public final Unit getUnit()
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Test

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xdc.services.spec

Class Test

  • java.lang.Object
    • xdc.services.spec.Test

  • public class Test
extends java.lang.Object

    • Constructor Summary

      Constructors
      Constructor and Description
      Test()

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      void | addNums(java.lang.Integer... vals)
      xdc.services.spec.Test.Color | getColor()
      java.util.Vector<java.lang.Integer> | getVec()
      static void | talk()

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Constructor Detail

      • Test

        public Test()

    • Method Detail

      • talk

        public static void talk()

      • addNums

        public void addNums(java.lang.Integer... vals)

      • getVec

        public java.util.Vector<java.lang.Integer> getVec()

      • getColor

        public xdc.services.spec.Test.Color getColor()
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Type

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xdc.services.spec

Class Type

  • java.lang.Object
    • xdc.services.spec.Type
  • All Implemented Interfaces:
    java.io.Serializable
    Direct Known Subclasses:
    Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Paren, Type.Ptr, Type.Spec

    public class Type
extends java.lang.Object
implements java.io.Serializable
    See Also:
    Serialized Form

    • Nested Class Summary

      Nested Classes
      Modifier and Type | Class and Description
      static class  | Type.Array
      static class  | Type.Creator
      static class  | Type.Declarator
      static class  | Type.Fxn
      static class  | Type.Modifier
      static class  | Type.Paren
      static class  | Type.Ptr
      static class  | Type.Spec

    • Field Summary

      Fields
      Modifier and Type | Field and Description
      static java.lang.String | ARG
      static java.lang.String | CHAR
      static java.lang.String | DOUBLE
      static java.lang.String | FLOAT
      static java.lang.String | FXN
      static java.lang.String | INT
      static java.lang.String | INT16
      static java.lang.String | INT32
      static java.lang.String | INT40
      static java.lang.String | INT64
      static java.lang.String | INT8
      static java.lang.String | LONG
      static java.lang.String | LONGDOUBLE
      static java.lang.String | LONGLONG
      static java.lang.String | PTR
      static java.lang.String | SHORT
      static java.lang.String | SIZE

    • Constructor Summary

      Constructors
      Constructor and Description
      Type()

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | ptrsig()
      Type raw()
      Type root()
      void | sizeof(java.util.List<java.lang.String> sL)
      java.lang.String | tcode()
      Type term()
      java.lang.String | tsig()
      Type.Spec tspec()
      java.lang.String | xmlsig()

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Field Detail

      • ARG

        public static final java.lang.String ARG
        See Also:
        Constant Field Values

      • CHAR

        public static final java.lang.String CHAR
        See Also:
        Constant Field Values

      • DOUBLE

        public static final java.lang.String DOUBLE
        See Also:
        Constant Field Values

      • FLOAT

        public static final java.lang.String FLOAT
        See Also:
        Constant Field Values

      • FXN

        public static final java.lang.String FXN
        See Also:
        Constant Field Values

      • INT

        public static final java.lang.String INT
        See Also:
        Constant Field Values

      • INT8

        public static final java.lang.String INT8
        See Also:
        Constant Field Values

      • INT16

        public static final java.lang.String INT16
        See Also:
        Constant Field Values

      • INT32

        public static final java.lang.String INT32
        See Also:
        Constant Field Values

      • INT40

        public static final java.lang.String INT40
        See Also:
        Constant Field Values

      • INT64

        public static final java.lang.String INT64
        See Also:
        Constant Field Values

      • LONG

        public static final java.lang.String LONG
        See Also:
        Constant Field Values

      • LONGDOUBLE

        public static final java.lang.String LONGDOUBLE
        See Also:
        Constant Field Values

      • LONGLONG

        public static final java.lang.String LONGLONG
        See Also:
        Constant Field Values

      • PTR

        public static final java.lang.String PTR
        See Also:
        Constant Field Values

      • SHORT

        public static final java.lang.String SHORT
        See Also:
        Constant Field Values

      • SIZE

        public static final java.lang.String SIZE
        See Also:
        Constant Field Values

    • Constructor Detail

      • Type

        public Type()

    • Method Detail

      • ptrsig

        public java.lang.String ptrsig()

      • raw

        public Type raw()

      • root

        public Type root()

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)

      • tcode

        public final java.lang.String tcode()

      • tsig

        public final java.lang.String tsig()

      • term

        public Type term()

      • tspec

        public Type.Spec tspec()

      • xmlsig

        public java.lang.String xmlsig()
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Type.Array

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xdc.services.spec

Class Type.Array

  • java.lang.Object
    • xdc.services.spec.Type
      • xdc.services.spec.Type.Array
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Type

    public static class Type.Array
extends Type
    See Also:
    Serialized Form

    • Nested Class Summary

      Nested Classes
      Modifier and Type | Class and Description
      static class  | Type.Array.Kind

      • Nested classes/interfaces inherited from class xdc.services.spec.Type

        Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Modifier, Type.Paren, Type.Ptr, Type.Spec

    • Field Summary

      • Fields inherited from class xdc.services.spec.Type

        ARG, CHAR, DOUBLE, FLOAT, FXN, INT, INT16, INT32, INT40, INT64, INT8, LONG, LONGDOUBLE, LONGLONG, PTR, SHORT, SIZE

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Type getBase()
      boolean | getConstElem()
      Expr getDim()
      Type.Array.Kind getKind()
      boolean | isC()
      boolean | isMap()
      boolean | isVec()
      Type root()
      void | setConstElem(boolean ce)
      java.lang.String | sig(int kind)
      void | sizeof(java.util.List<java.lang.String> sL)
      Type term()
      Type.Spec tspec()

      • Methods inherited from class xdc.services.spec.Type

        ptrsig, raw, tcode, tsig, xmlsig

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getBase

        public final Type getBase()

      • getConstElem

        public final boolean getConstElem()

      • getDim

        public final Expr getDim()

      • getKind

        public final Type.Array.Kind getKind()

      • isC

        public final boolean isC()

      • isMap

        public final boolean isMap()

      • isVec

        public final boolean isVec()

      • root

        public Type root()
        Overrides:
        root in class Type

      • setConstElem

        public final void setConstElem(boolean ce)

      • sig

        public java.lang.String sig(int kind)

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Overrides:
        sizeof in class Type

      • term

        public Type term()
        Overrides:
        term in class Type

      • tspec

        public Type.Spec tspec()
        Overrides:
        tspec in class Type
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Type.Array.Kind

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xdc.services.spec

Enum Type.Array.Kind

  • java.lang.Object
    • java.lang.Enum<Type.Array.Kind>
      • xdc.services.spec.Type.Array.Kind
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Type.Array.Kind>
    Enclosing class:
    Type.Array

    public static enum Type.Array.Kind
extends java.lang.Enum<Type.Array.Kind>

    • Enum Constant Summary

      Enum Constants
      Enum Constant and Description
      CARR
      MAP
      VEC

    • Method Summary

      Methods
      Modifier and Type Method and Description
      static Type.Array.Kind valueOf(java.lang.String name)
      Returns the enum constant of this type with the specified name.
      static Type.Array.Kind[] values()
      Returns an array containing the constants of this enum type, in the order they are declared.

      • Methods inherited from class java.lang.Enum

        clone, compareTo, equals, finalize, getDeclaringClass, hashCode, name, ordinal, toString, valueOf

      • Methods inherited from class java.lang.Object

        getClass, notify, notifyAll, wait, wait, wait

    • Enum Constant Detail

      • CARR

        public static final Type.Array.Kind CARR

      • MAP

        public static final Type.Array.Kind MAP

      • VEC

        public static final Type.Array.Kind VEC

    • Method Detail

      • values

        public static Type.Array.Kind[] values()
        Returns an array containing the constants of this enum type, in the order they are declared. This method may be used to iterate over the constants as follows:
        for (Type.Array.Kind c : Type.Array.Kind.values())
    System.out.println(c);
        Returns:
        an array containing the constants of this enum type, in the order they are declared

      • valueOf

        public static Type.Array.Kind valueOf(java.lang.String name)
        Returns the enum constant of this type with the specified name. The string must match exactly an identifier used to declare an enum constant in this type. (Extraneous whitespace characters are not permitted.)
        Parameters:
        name - the name of the enum constant to be returned.
        Returns:
        the enum constant with the specified name
        Throws:
        java.lang.IllegalArgumentException - if this enum type has no constant with the specified name
        java.lang.NullPointerException - if the argument is null
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Type.Creator

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xdc.services.spec

Class Type.Creator

  • java.lang.Object
    • xdc.services.spec.Type
      • xdc.services.spec.Type.Creator
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Type

    public static class Type.Creator
extends Type
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Type

        Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Modifier, Type.Paren, Type.Ptr, Type.Spec

    • Field Summary

      • Fields inherited from class xdc.services.spec.Type

        ARG, CHAR, DOUBLE, FLOAT, FXN, INT, INT16, INT32, INT40, INT64, INT8, LONG, LONGDOUBLE, LONGLONG, PTR, SHORT, SIZE

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | xmlsig()

      • Methods inherited from class xdc.services.spec.Type

        ptrsig, raw, root, sizeof, tcode, term, tsig, tspec

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • xmlsig

        public java.lang.String xmlsig()
        Overrides:
        xmlsig in class Type
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Type.Declarator

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xdc.services.spec

Class Type.Declarator

  • java.lang.Object
    • xdc.services.spec.Type
      • xdc.services.spec.Type.Declarator
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Type

    public static class Type.Declarator
extends Type
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Type

        Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Modifier, Type.Paren, Type.Ptr, Type.Spec

    • Field Summary

      • Fields inherited from class xdc.services.spec.Type

        ARG, CHAR, DOUBLE, FLOAT, FXN, INT, INT16, INT32, INT40, INT64, INT8, LONG, LONGDOUBLE, LONGLONG, PTR, SHORT, SIZE

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.lang.String | getId()
      void | sizeof(java.util.List<java.lang.String> sL)
      Type.Spec tspec()

      • Methods inherited from class xdc.services.spec.Type

        ptrsig, raw, root, tcode, term, tsig, xmlsig

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getId

        public final java.lang.String getId()

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Overrides:
        sizeof in class Type

      • tspec

        public Type.Spec tspec()
        Overrides:
        tspec in class Type
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Type.Fxn

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xdc.services.spec

Class Type.Fxn

  • java.lang.Object
    • xdc.services.spec.Type
      • xdc.services.spec.Type.Fxn
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Type

    public static class Type.Fxn
extends Type
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Type

        Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Modifier, Type.Paren, Type.Ptr, Type.Spec

    • Field Summary

      • Fields inherited from class xdc.services.spec.Type

        ARG, CHAR, DOUBLE, FLOAT, FXN, INT, INT16, INT32, INT40, INT64, INT8, LONG, LONGDOUBLE, LONGLONG, PTR, SHORT, SIZE

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.List<Decl.Arg> | getArgs()
      Type getBase()
      boolean | isVarg()
      Type root()
      void | sizeof(java.util.List<java.lang.String> sL)
      Type.Spec tspec()

      • Methods inherited from class xdc.services.spec.Type

        ptrsig, raw, tcode, term, tsig, xmlsig

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getArgs

        public final java.util.List<Decl.Arg> getArgs()

      • getBase

        public final Type getBase()

      • isVarg

        public final boolean isVarg()

      • root

        public Type root()
        Overrides:
        root in class Type

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Overrides:
        sizeof in class Type

      • tspec

        public Type.Spec tspec()
        Overrides:
        tspec in class Type
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Type.Modifier

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xdc.services.spec

Enum Type.Modifier

  • java.lang.Object
    • java.lang.Enum<Type.Modifier>
      • xdc.services.spec.Type.Modifier
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Type.Modifier>
    Enclosing class:
    Type

    public static enum Type.Modifier
extends java.lang.Enum<Type.Modifier>

    • Enum Constant Summary

      Enum Constants
      Enum Constant and Description
      CONST
      RESTRICT
      VOLATILE

    • Method Summary

      Methods
      Modifier and Type Method and Description
      static Type.Modifier valueOf(java.lang.String name)
      Returns the enum constant of this type with the specified name.
      static Type.Modifier[] values()
      Returns an array containing the constants of this enum type, in the order they are declared.

      • Methods inherited from class java.lang.Enum

        clone, compareTo, equals, finalize, getDeclaringClass, hashCode, name, ordinal, toString, valueOf

      • Methods inherited from class java.lang.Object

        getClass, notify, notifyAll, wait, wait, wait

    • Enum Constant Detail

      • CONST

        public static final Type.Modifier CONST

      • RESTRICT

        public static final Type.Modifier RESTRICT

      • VOLATILE

        public static final Type.Modifier VOLATILE

    • Method Detail

      • values

        public static Type.Modifier[] values()
        Returns an array containing the constants of this enum type, in the order they are declared. This method may be used to iterate over the constants as follows:
        for (Type.Modifier c : Type.Modifier.values())
    System.out.println(c);
        Returns:
        an array containing the constants of this enum type, in the order they are declared

      • valueOf

        public static Type.Modifier valueOf(java.lang.String name)
        Returns the enum constant of this type with the specified name. The string must match exactly an identifier used to declare an enum constant in this type. (Extraneous whitespace characters are not permitted.)
        Parameters:
        name - the name of the enum constant to be returned.
        Returns:
        the enum constant with the specified name
        Throws:
        java.lang.IllegalArgumentException - if this enum type has no constant with the specified name
        java.lang.NullPointerException - if the argument is null
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Type.Paren

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xdc.services.spec

Class Type.Paren

  • java.lang.Object
    • xdc.services.spec.Type
      • xdc.services.spec.Type.Paren
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Type

    public static class Type.Paren
extends Type
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Type

        Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Modifier, Type.Paren, Type.Ptr, Type.Spec

    • Field Summary

      • Fields inherited from class xdc.services.spec.Type

        ARG, CHAR, DOUBLE, FLOAT, FXN, INT, INT16, INT32, INT40, INT64, INT8, LONG, LONGDOUBLE, LONGLONG, PTR, SHORT, SIZE

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Type getBase()
      Type root()
      void | sizeof(java.util.List<java.lang.String> sL)
      Type term()
      Type.Spec tspec()

      • Methods inherited from class xdc.services.spec.Type

        ptrsig, raw, tcode, tsig, xmlsig

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getBase

        public final Type getBase()

      • root

        public Type root()
        Overrides:
        root in class Type

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Overrides:
        sizeof in class Type

      • term

        public Type term()
        Overrides:
        term in class Type

      • tspec

        public Type.Spec tspec()
        Overrides:
        tspec in class Type
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Type.Ptr

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xdc.services.spec

Class Type.Ptr

  • java.lang.Object
    • xdc.services.spec.Type
      • xdc.services.spec.Type.Ptr
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Type

    public static class Type.Ptr
extends Type
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Type

        Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Modifier, Type.Paren, Type.Ptr, Type.Spec

    • Field Summary

      • Fields inherited from class xdc.services.spec.Type

        ARG, CHAR, DOUBLE, FLOAT, FXN, INT, INT16, INT32, INT40, INT64, INT8, LONG, LONGDOUBLE, LONGLONG, PTR, SHORT, SIZE

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Type getBase()
      java.util.EnumSet<Type.Modifier> | getMods()
      Type root()
      void | sizeof(java.util.List<java.lang.String> sL)
      Type.Spec tspec()

      • Methods inherited from class xdc.services.spec.Type

        ptrsig, raw, tcode, term, tsig, xmlsig

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getBase

        public final Type getBase()

      • getMods

        public final java.util.EnumSet<Type.Modifier> getMods()

      • root

        public Type root()
        Overrides:
        root in class Type

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Overrides:
        sizeof in class Type

      • tspec

        public Type.Spec tspec()
        Overrides:
        tspec in class Type
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Type.Spec

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xdc.services.spec

Class Type.Spec

  • java.lang.Object
    • xdc.services.spec.Type
      • xdc.services.spec.Type.Spec
  • All Implemented Interfaces:
    java.io.Serializable
    Enclosing class:
    Type

    public static class Type.Spec
extends Type
    See Also:
    Serialized Form

    • Nested Class Summary

      • Nested classes/interfaces inherited from class xdc.services.spec.Type

        Type.Array, Type.Creator, Type.Declarator, Type.Fxn, Type.Modifier, Type.Paren, Type.Ptr, Type.Spec

    • Field Summary

      • Fields inherited from class xdc.services.spec.Type

        ARG, CHAR, DOUBLE, FLOAT, FXN, INT, INT16, INT32, INT40, INT64, INT8, LONG, LONGDOUBLE, LONGLONG, PTR, SHORT, SIZE

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      java.util.EnumSet<Type.Modifier> | getMods()
      Ref getRef()
      java.lang.String | getStd()
      boolean | isUns()
      void | sizeof(java.util.List<java.lang.String> sL)
      java.lang.String | xmlsig()

      • Methods inherited from class xdc.services.spec.Type

        ptrsig, raw, root, tcode, term, tsig, tspec

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • getMods

        public final java.util.EnumSet<Type.Modifier> getMods()

      • getRef

        public final Ref getRef()

      • getStd

        public final java.lang.String getStd()

      • isUns

        public final boolean isUns()

      • sizeof

        public void sizeof(java.util.List<java.lang.String> sL)
        Overrides:
        sizeof in class Type

      • xmlsig

        public java.lang.String xmlsig()
        Overrides:
        xmlsig in class Type
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Unit

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xdc.services.spec

Class Unit

  • java.lang.Object
    • xdc.services.spec.Node
      • xdc.services.spec.Unit
  • All Implemented Interfaces:
    java.io.Serializable, java.lang.Comparable<Node>

    public class Unit
extends Node
    See Also:
    Serialized Form

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      Decl decl(java.lang.String name)
      Deprecated.
      replaced by getDecl(String)
      Unit delegatesTo()
      java.util.List<Decl.Fxn> | getAllFxns()
      java.util.List<Decl> | getChildren()
      java.util.List<Decl.Config> | getConfigs()
      Decl.Fxn getCreator()
      Get the instance creation function for this unit.
      Decl getDecl(java.lang.String name)
      Get the named declaration from this unit.
      java.util.List<Decl> getDecls()
      Get all the declarations defined for this unit.
      java.util.Set<Unit> | getEmbeds()
      java.util.List<Decl.Fxn> | getFxns()
      java.util.List<Unit> | getInherits()
      java.util.List<Decl.Fxn> | getInternFxns()
      java.lang.String | getPkgName()
      java.util.List<Unit> | getProxies()
      java.lang.String | getQualName()
      Unit getSuper()
      java.util.Set<Unit> | getUses()
      java.lang.String | getXmlTag()
      boolean | hasCreateArgs()
      boolean | hasCustHdr()
      boolean | hasInstObj()
      boolean | isForwarding()
      boolean | isHeir()
      boolean | isProxy()
      boolean | isSized()
      boolean | needsRuntime()
      java.lang.String queryFacet(java.lang.String tName)
      Query unit for the specified facet type

      • Methods inherited from class xdc.services.spec.Node

        attrBool, attrInt, attrString, compareTo, getAtom, getAttrMap, getDocs, getName, getParent, getSession, getSummary, hasAttr, isExternal, isFinal, isInst, isInter, isInternal, isMeta, isMod, isNodoc, isOver, isReadonly, isStatic, isSys, makeXDoc

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • decl

        @Deprecated
public final Decl decl(java.lang.String name)
        Deprecated. replaced by getDecl(String)

      • delegatesTo

        public final Unit delegatesTo()

      • getAllFxns

        public final java.util.List<Decl.Fxn> getAllFxns()

      • getCreator

        public final Decl.Fxn getCreator()
        Get the instance creation function for this unit. This method returns the most specific constructor for this unit. If this unit does not support instances, null is returned.

      • getChildren

        public java.util.List<Decl> getChildren()
        Specified by:
        getChildren in class Node

      • getConfigs

        public final java.util.List<Decl.Config> getConfigs()

      • getDecl

        public final Decl getDecl(java.lang.String name)
        Get the named declaration from this unit. This method returns the most specific declaration named by name for this unit. If the named declaration does not exist, null is returned.

      • getDecls

        public final java.util.List<Decl> getDecls()
        Get all the declarations defined for this unit. This method returns the most specific declarations defined for this unit. Declarations include functions, config parameters, constants, etc.

      • getEmbeds

        public final java.util.Set<Unit> getEmbeds()

      • getFxns

        public final java.util.List<Decl.Fxn> getFxns()

      • getInherits

        public final java.util.List<Unit> getInherits()

      • getInternFxns

        public final java.util.List<Decl.Fxn> getInternFxns()

      • getProxies

        public final java.util.List<Unit> getProxies()

      • getPkgName

        public final java.lang.String getPkgName()
        Overrides:
        getPkgName in class Node

      • getQualName

        public final java.lang.String getQualName()
        Specified by:
        getQualName in class Node

      • getSuper

        public final Unit getSuper()

      • getUses

        public final java.util.Set<Unit> getUses()

      • getXmlTag

        public final java.lang.String getXmlTag()
        Specified by:
        getXmlTag in class Node

      • hasCustHdr

        public final boolean hasCustHdr()

      • hasCreateArgs

        public boolean hasCreateArgs()

      • isForwarding

        public final boolean isForwarding()

      • isHeir

        public final boolean isHeir()

      • isProxy

        public final boolean isProxy()

      • isSized

        public final boolean isSized()

      • hasInstObj

        public final boolean hasInstObj()

      • needsRuntime

        public final boolean needsRuntime()

      • queryFacet

        public java.lang.String queryFacet(java.lang.String tName)
        Query unit for the specified facet type
        Returns:
        the name of the config parameter that corresponds to the type named by tName
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XDoc

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xdc.services.spec

Class XDoc

  • java.lang.Object
    • xdc.services.spec.XDoc

  • public class XDoc
extends java.lang.Object

    • Method Summary

      Methods
      Modifier and Type | Method and Description
      void | addBeforeSect(java.lang.String key, java.lang.String lines)
      void | addChild(java.lang.String key, java.lang.String lines)
      XDoc copy()
      java.util.Map<java.lang.String,java.util.List<java.lang.String>> | getChild()
      java.util.List<java.lang.String> | getDetails()
      java.util.Map<java.lang.String,java.util.List<java.lang.String>> | getHeaders()
      java.util.Map<java.lang.String,java.util.List<java.lang.String>> | getOthers()
      java.lang.String | getSummary()
      java.util.Map<java.lang.String,java.util.List<java.lang.String>> | getTrailers()
      void | inherit(XDoc xdi)
      boolean | isNodoc()
      void | pushChild(java.lang.String key, java.lang.String lines)
      void | pushDetails(java.lang.String lines)
      void | setSummary(java.lang.String s)

      • Methods inherited from class java.lang.Object

        clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

    • Method Detail

      • addBeforeSect

        public void addBeforeSect(java.lang.String key,
                 java.lang.String lines)

      • addChild

        public void addChild(java.lang.String key,
            java.lang.String lines)

      • copy

        public XDoc copy()

      • getDetails

        public final java.util.List<java.lang.String> getDetails()

      • getChild

        public final java.util.Map<java.lang.String,java.util.List<java.lang.String>> getChild()

      • getHeaders

        public final java.util.Map<java.lang.String,java.util.List<java.lang.String>> getHeaders()

      • getOthers

        public final java.util.Map<java.lang.String,java.util.List<java.lang.String>> getOthers()

      • getSummary

        public final java.lang.String getSummary()

      • getTrailers

        public final java.util.Map<java.lang.String,java.util.List<java.lang.String>> getTrailers()

      • inherit

        public final void inherit(XDoc xdi)

      • isNodoc

        public final boolean isNodoc()

      • pushChild

        public void pushChild(java.lang.String key,
             java.lang.String lines)

      • pushDetails

        public void pushDetails(java.lang.String lines)

      • setSummary

        public final void setSummary(java.lang.String s)
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package xdc.shelf

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008-2018 Texas Instruments Incorporated
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    /*!
    13     *  ======== xdc.shelf ========
    14     *  Third party open source tools required by XDCtools
    15     *
    16     *  The following jars are part of this package:
    17     *  @p(html)
    18         <table border="1">
    19         <tr>
    20           <th>Jar</th>
    21           <th>Version</th>
    22           <th>License</th>
    23           <th>From</th>
    24           <th>Description</th>
    25         </tr>
    26         <tr>
    27           <td>js.jar</td>
    28           <td>1.7R4</td>
    29           <td><a href="./doc-files/rhino/LICENSE.txt">MPL 2.0</a>
    30               (<a href="./doc-files/rhino/Rhino_License.htm">note</a>)</td>
    31           <td><a href="http://www.mozilla.org/rhino">
    32               http://www.mozilla.org/rhino</a></td>
    33           <td>Java implementation of JavaScript 1.5</td>
    34         </tr>
    35         <tr>
    36           <td>antlr.jar</td>
    37           <td>3.1.1</td>
    38           <td><a href="./doc-files/antlr/LICENSE.txt">BSD</a></td>
    39           <td><a href="http://www.antlr.org">http://www.antlr.org</a></td>
    40           <td>LR parser generator used to implement the RTSC IDL</td>
    41         </tr>
    42         <tr>
    43           <td>tar.jar</td>
    44           <td>2.5</td>
    45           <td>Public Domain</td>
    46           <td><a href="http://www.trustice.com/java/tar">
    47               http://www.trustice.com/java/tar</a></td>
    48           <td>tar file reader</td>
    49         </tr>
    50         </table>
    51
    52     *  @p
    53     *  In addition to the jars above, XDCtools requires the following
    54     *  third-party software:
    55     *  @p(html)
    56
    57         <table border="1">
    58         <tr>
    59           <th>Name</th>
    60           <th>Version</th>
    61           <th>License</th>
    62           <th>From</th>
    63           <th>Description</th>
    64         </tr>
    65         <tr>
    66           <td>gmake</td>
    67           <td>4.2.1</td>
    68           <td><a href="./doc-files/gmake/COPYING">GPL v3</a></td>
    69           <td><a href="http://savannah.gnu.org/projects/make">
    70               http://savannah.gnu.org/projects/make</a></td>
    71           <td>command run by the `xdc` command to create and build packages</td>
    72         </tr>
    73         <tr>
    74           <td>J2SE Runtime Environment(JRE)</td>
    75           <td>1.7.0_80</td>
    76           <td><a href="http://java.com/license">Oracle Binary Code License Agreement for the Java SE Platform Products and JavaFX</a></td>
    77           <td><a href="http://www.oracle.com/technetwork/java/javase/">
    78               http://www.oracle.com/technetwork/java/javase/</a></td>
    79           <td>XDCtools core functionality is implemented in Java. Also required by the Rhino JavaScript engine shipped with XDCtools.</td>
    80         </tr>
    81         </table>
    82     *  @p
    83     *
    84     *  Although the following tools are not required, they are optionally shipped
    85     *  with XDCtools distributions to ensure consistent behavior across various
    86     *  development platforms.
    87     *  @p(html)
    88         <table border="1">
    89         <tr>
    90           <th>Exe</th>
    91           <th>Version</th>
    92           <th>License</th>
    93           <th>From</th>
    94           <th>Description</th>
    95         </tr>
    96         <tr>
    97           <td>zip, unzip</td>
    98           <td>2.32 and 5.52</td>
    99           <td><a href="./doc-files/zip/LICENSE.txt">info-zip</a></td>
   100           <td><a href="http://www.info-zip.org">http://www.info-zip.org</a></td>
   101           <td>command line utilities to zip and unzip package releases</td>
   102         </tr>
   103         <tr>
   104           <td>tar</td>
   105           <td>1.29</td>
   106           <td><a href="./doc-files/tar/COPYING">GPL v3</a></td>
   107           <td><a href="http://www.gnu.org/software/tar">
   108               http://www.gnu.org/software/tar</a></td>
   109           <td>command line utilities to archive package directories</td>
   110         </tr>
   111         <tr>
   112           <td>sh, gunzip, gzip, sed</td>
   113           <td>cygwin 1.5.25-15</td>
   114           <td><a href="./doc-files/cygwin/COPYING.txt">GPL v3</a></td>
   115           <td><a href="http://cygwin.com">http://cygwin.com</a></td>
   116           <td>(Windows only) korn shell compatible shell used by GNU make</td>
   117         </tr>
   118         <tr>
   119           <td>cat, cp, date, echo, mkdir, mv, pwd, rm, touch</td>
   120           <td>cygwin 1.5.25-15 (coreutils 6.10)</td>
   121           <td><a href="./doc-files/coreutils/COPYING.txt">GPL v3</a></td>
   122           <td><a href="http://cygwin.com">http://cygwin.com</a></td>
   123           <td>(Windows only) common utilites called from GNU make makefiles</td>
   124         </tr>
   125         </table>
   126     *  @p
   127     *  All other files that are part of XDCtools are licensed under either
   128     *  {@link ./doc-files/eclipse/epl-v10.html EPL v1.0} or dual-licensed under
   129     *  {@link ./doc-files/eclipse/edl-v10.html EDL v1.0}.
   130     */
   131    package xdc.shelf [1, 0, 0] {
   132    }


[The "BSD licence"]
Copyright (c) 2003-2008 Terence Parr
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:

 1. Redistributions of source code must retain the above copyright
    notice, this list of conditions and the following disclaimer.
 2. Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.
 3. The name of the author may not be used to endorse or promote products
    derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


            GNU GENERAL PUBLIC LICENSE
               Version 3, 29 June 2007

 Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
 Everyone is permitted to copy and distribute verbatim copies
 of this license document, but changing it is not allowed.

                Preamble

  The GNU General Public License is a free, copyleft license for
software and other kinds of works.

  The licenses for most software and other practical works are designed
to take away your freedom to share and change the works.  By contrast,
the GNU General Public License is intended to guarantee your freedom to
share and change all versions of a program--to make sure it remains free
software for all its users.  We, the Free Software Foundation, use the
GNU General Public License for most of our software; it applies also to
any other work released this way by its authors.  You can apply it to
your programs, too.

  When we speak of free software, we are referring to freedom, not
price.  Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
them if you wish), that you receive source code or can get it if you
want it, that you can change the software or use pieces of it in new
free programs, and that you know you can do these things.

  To protect your rights, we need to prevent others from denying you
these rights or asking you to surrender the rights.  Therefore, you have
certain responsibilities if you distribute copies of the software, or if
you modify it: responsibilities to respect the freedom of others.

  For example, if you distribute copies of such a program, whether
gratis or for a fee, you must pass on to the recipients the same
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know their rights.

  Developers that use the GNU GPL protect your rights with two steps:
(1) assert copyright on the software, and (2) offer you this License
giving you legal permission to copy, distribute and/or modify it.

  For the developers' and authors' protection, the GPL clearly explains
that there is no warranty for this free software.  For both users' and
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authors of previous versions.

  Some devices are designed to deny users access to install or run
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  Finally, every program is threatened constantly by software patents.
States should not allow patents to restrict development and use of
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patents cannot be used to render the program non-free.

  The precise terms and conditions for copying, distribution and
modification follow.

               TERMS AND CONDITIONS

  0. Definitions.

  "This License" refers to version 3 of the GNU General Public License.

  "Copyright" also means copyright-like laws that apply to other kinds of
works, such as semiconductor masks.

  "The Program" refers to any copyrightable work licensed under this
License.  Each licensee is addressed as "you".  "Licensees" and
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  A "covered work" means either the unmodified Program or a work based
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  To "propagate" a work means to do anything with it that, without
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is widely used among developers working in that language.

  The "System Libraries" of an executable work include anything, other
than the work as a whole, that (a) is included in the normal form of
packaging a Major Component, but which is not part of that Major
Component, and (b) serves only to enable use of the work with that
Major Component, or to implement a Standard Interface for which an
implementation is available to the public in source code form.  A
"Major Component", in this context, means a major essential component
(kernel, window system, and so on) of the specific operating system
(if any) on which the executable work runs, or a compiler used to
produce the work, or an object code interpreter used to run it.

  The "Corresponding Source" for a work in object code form means all
the source code needed to generate, install, and (for an executable
work) run the object code and to modify the work, including scripts to
control those activities.  However, it does not include the work's
System Libraries, or general-purpose tools or generally available free
programs which are used unmodified in performing those activities but
which are not part of the work.  For example, Corresponding Source
includes interface definition files associated with source files for
the work, and the source code for shared libraries and dynamically
linked subprograms that the work is specifically designed to require,
such as by intimate data communication or control flow between those
subprograms and other parts of the work.

  The Corresponding Source need not include anything that users
can regenerate automatically from other parts of the Corresponding
Source.

  The Corresponding Source for a work in source code form is that
same work.

  2. Basic Permissions.

  All rights granted under this License are granted for the term of
copyright on the Program, and are irrevocable provided the stated
conditions are met.  This License explicitly affirms your unlimited
permission to run the unmodified Program.  The output from running a
covered work is covered by this License only if the output, given its
content, constitutes a covered work.  This License acknowledges your
rights of fair use or other equivalent, as provided by copyright law.

  You may make, run and propagate covered works that you do not
convey, without conditions so long as your license otherwise remains
in force.  You may convey covered works to others for the sole purpose
of having them make modifications exclusively for you, or provide you
with facilities for running those works, provided that you comply with
the terms of this License in conveying all material for which you do
not control copyright.  Those thus making or running the covered works
for you must do so exclusively on your behalf, under your direction
and control, on terms that prohibit them from making any copies of
your copyrighted material outside their relationship with you.

  Conveying under any other circumstances is permitted solely under
the conditions stated below.  Sublicensing is not allowed; section 10
makes it unnecessary.

  3. Protecting Users' Legal Rights From Anti-Circumvention Law.

  No covered work shall be deemed part of an effective technological
measure under any applicable law fulfilling obligations under article
11 of the WIPO copyright treaty adopted on 20 December 1996, or
similar laws prohibiting or restricting circumvention of such
measures.

  When you convey a covered work, you waive any legal power to forbid
circumvention of technological measures to the extent such circumvention
is effected by exercising rights under this License with respect to
the covered work, and you disclaim any intention to limit operation or
modification of the work as a means of enforcing, against the work's
users, your or third parties' legal rights to forbid circumvention of
technological measures.

  4. Conveying Verbatim Copies.

  You may convey verbatim copies of the Program's source code as you
receive it, in any medium, provided that you conspicuously and
appropriately publish on each copy an appropriate copyright notice;
keep intact all notices stating that this License and any
non-permissive terms added in accord with section 7 apply to the code;
keep intact all notices of the absence of any warranty; and give all
recipients a copy of this License along with the Program.

  You may charge any price or no price for each copy that you convey,
and you may offer support or warranty protection for a fee.

  5. Conveying Modified Source Versions.

  You may convey a work based on the Program, or the modifications to
produce it from the Program, in the form of source code under the
terms of section 4, provided that you also meet all of these conditions:

    a) The work must carry prominent notices stating that you modified
    it, and giving a relevant date.

    b) The work must carry prominent notices stating that it is
    released under this License and any conditions added under section
    7.  This requirement modifies the requirement in section 4 to
    "keep intact all notices".

    c) You must license the entire work, as a whole, under this
    License to anyone who comes into possession of a copy.  This
    License will therefore apply, along with any applicable section 7
    additional terms, to the whole of the work, and all its parts,
    regardless of how they are packaged.  This License gives no
    permission to license the work in any other way, but it does not
    invalidate such permission if you have separately received it.

    d) If the work has interactive user interfaces, each must display
    Appropriate Legal Notices; however, if the Program has interactive
    interfaces that do not display Appropriate Legal Notices, your
    work need not make them do so.

  A compilation of a covered work with other separate and independent
works, which are not by their nature extensions of the covered work,
and which are not combined with it such as to form a larger program,
in or on a volume of a storage or distribution medium, is called an
"aggregate" if the compilation and its resulting copyright are not
used to limit the access or legal rights of the compilation's users
beyond what the individual works permit.  Inclusion of a covered work
in an aggregate does not cause this License to apply to the other
parts of the aggregate.

  6. Conveying Non-Source Forms.

  You may convey a covered work in object code form under the terms
of sections 4 and 5, provided that you also convey the
machine-readable Corresponding Source under the terms of this License,
in one of these ways:

    a) Convey the object code in, or embodied in, a physical product
    (including a physical distribution medium), accompanied by the
    Corresponding Source fixed on a durable physical medium
    customarily used for software interchange.

    b) Convey the object code in, or embodied in, a physical product
    (including a physical distribution medium), accompanied by a
    written offer, valid for at least three years and valid for as
    long as you offer spare parts or customer support for that product
    model, to give anyone who possesses the object code either (1) a
    copy of the Corresponding Source for all the software in the
    product that is covered by this License, on a durable physical
    medium customarily used for software interchange, for a price no
    more than your reasonable cost of physically performing this
    conveying of source, or (2) access to copy the
    Corresponding Source from a network server at no charge.

    c) Convey individual copies of the object code with a copy of the
    written offer to provide the Corresponding Source.  This
    alternative is allowed only occasionally and noncommercially, and
    only if you received the object code with such an offer, in accord
    with subsection 6b.

    d) Convey the object code by offering access from a designated
    place (gratis or for a charge), and offer equivalent access to the
    Corresponding Source in the same way through the same place at no
    further charge.  You need not require recipients to copy the
    Corresponding Source along with the object code.  If the place to
    copy the object code is a network server, the Corresponding Source
    may be on a different server (operated by you or a third party)
    that supports equivalent copying facilities, provided you maintain
    clear directions next to the object code saying where to find the
    Corresponding Source.  Regardless of what server hosts the
    Corresponding Source, you remain obligated to ensure that it is
    available for as long as needed to satisfy these requirements.

    e) Convey the object code using peer-to-peer transmission, provided
    you inform other peers where the object code and Corresponding
    Source of the work are being offered to the general public at no
    charge under subsection 6d.

  A separable portion of the object code, whose source code is excluded
from the Corresponding Source as a System Library, need not be
included in conveying the object code work.

  A "User Product" is either (1) a "consumer product", which means any
tangible personal property which is normally used for personal, family,
or household purposes, or (2) anything designed or sold for incorporation
into a dwelling.  In determining whether a product is a consumer product,
doubtful cases shall be resolved in favor of coverage.  For a particular
product received by a particular user, "normally used" refers to a
typical or common use of that class of product, regardless of the status
of the particular user or of the way in which the particular user
actually uses, or expects or is expected to use, the product.  A product
is a consumer product regardless of whether the product has substantial
commercial, industrial or non-consumer uses, unless such uses represent
the only significant mode of use of the product.

  "Installation Information" for a User Product means any methods,
procedures, authorization keys, or other information required to install
and execute modified versions of a covered work in that User Product from
a modified version of its Corresponding Source.  The information must
suffice to ensure that the continued functioning of the modified object
code is in no case prevented or interfered with solely because
modification has been made.

  If you convey an object code work under this section in, or with, or
specifically for use in, a User Product, and the conveying occurs as
part of a transaction in which the right of possession and use of the
User Product is transferred to the recipient in perpetuity or for a
fixed term (regardless of how the transaction is characterized), the
Corresponding Source conveyed under this section must be accompanied
by the Installation Information.  But this requirement does not apply
if neither you nor any third party retains the ability to install
modified object code on the User Product (for example, the work has
been installed in ROM).

  The requirement to provide Installation Information does not include a
requirement to continue to provide support service, warranty, or updates
for a work that has been modified or installed by the recipient, or for
the User Product in which it has been modified or installed.  Access to a
network may be denied when the modification itself materially and
adversely affects the operation of the network or violates the rules and
protocols for communication across the network.

  Corresponding Source conveyed, and Installation Information provided,
in accord with this section must be in a format that is publicly
documented (and with an implementation available to the public in
source code form), and must require no special password or key for
unpacking, reading or copying.

  7. Additional Terms.

  "Additional permissions" are terms that supplement the terms of this
License by making exceptions from one or more of its conditions.
Additional permissions that are applicable to the entire Program shall
be treated as though they were included in this License, to the extent
that they are valid under applicable law.  If additional permissions
apply only to part of the Program, that part may be used separately
under those permissions, but the entire Program remains governed by
this License without regard to the additional permissions.

  When you convey a copy of a covered work, you may at your option
remove any additional permissions from that copy, or from any part of
it.  (Additional permissions may be written to require their own
removal in certain cases when you modify the work.)  You may place
additional permissions on material, added by you to a covered work,
for which you have or can give appropriate copyright permission.

  Notwithstanding any other provision of this License, for material you
add to a covered work, you may (if authorized by the copyright holders of
that material) supplement the terms of this License with terms:

    a) Disclaiming warranty or limiting liability differently from the
    terms of sections 15 and 16 of this License; or

    b) Requiring preservation of specified reasonable legal notices or
    author attributions in that material or in the Appropriate Legal
    Notices displayed by works containing it; or

    c) Prohibiting misrepresentation of the origin of that material, or
    requiring that modified versions of such material be marked in
    reasonable ways as different from the original version; or

    d) Limiting the use for publicity purposes of names of licensors or
    authors of the material; or

    e) Declining to grant rights under trademark law for use of some
    trade names, trademarks, or service marks; or

    f) Requiring indemnification of licensors and authors of that
    material by anyone who conveys the material (or modified versions of
    it) with contractual assumptions of liability to the recipient, for
    any liability that these contractual assumptions directly impose on
    those licensors and authors.

  All other non-permissive additional terms are considered "further
restrictions" within the meaning of section 10.  If the Program as you
received it, or any part of it, contains a notice stating that it is
governed by this License along with a term that is a further
restriction, you may remove that term.  If a license document contains
a further restriction but permits relicensing or conveying under this
License, you may add to a covered work material governed by the terms
of that license document, provided that the further restriction does
not survive such relicensing or conveying.

  If you add terms to a covered work in accord with this section, you
must place, in the relevant source files, a statement of the
additional terms that apply to those files, or a notice indicating
where to find the applicable terms.

  Additional terms, permissive or non-permissive, may be stated in the
form of a separately written license, or stated as exceptions;
the above requirements apply either way.

  8. Termination.

  You may not propagate or modify a covered work except as expressly
provided under this License.  Any attempt otherwise to propagate or
modify it is void, and will automatically terminate your rights under
this License (including any patent licenses granted under the third
paragraph of section 11).

  However, if you cease all violation of this License, then your
license from a particular copyright holder is reinstated (a)
provisionally, unless and until the copyright holder explicitly and
finally terminates your license, and (b) permanently, if the copyright
holder fails to notify you of the violation by some reasonable means
prior to 60 days after the cessation.

  Moreover, your license from a particular copyright holder is
reinstated permanently if the copyright holder notifies you of the
violation by some reasonable means, this is the first time you have
received notice of violation of this License (for any work) from that
copyright holder, and you cure the violation prior to 30 days after
your receipt of the notice.

  Termination of your rights under this section does not terminate the
licenses of parties who have received copies or rights from you under
this License.  If your rights have been terminated and not permanently
reinstated, you do not qualify to receive new licenses for the same
material under section 10.

  9. Acceptance Not Required for Having Copies.

  You are not required to accept this License in order to receive or
run a copy of the Program.  Ancillary propagation of a covered work
occurring solely as a consequence of using peer-to-peer transmission
to receive a copy likewise does not require acceptance.  However,
nothing other than this License grants you permission to propagate or
modify any covered work.  These actions infringe copyright if you do
not accept this License.  Therefore, by modifying or propagating a
covered work, you indicate your acceptance of this License to do so.

  10. Automatic Licensing of Downstream Recipients.

  Each time you convey a covered work, the recipient automatically
receives a license from the original licensors, to run, modify and
propagate that work, subject to this License.  You are not responsible
for enforcing compliance by third parties with this License.

  An "entity transaction" is a transaction transferring control of an
organization, or substantially all assets of one, or subdividing an
organization, or merging organizations.  If propagation of a covered
work results from an entity transaction, each party to that
transaction who receives a copy of the work also receives whatever
licenses to the work the party's predecessor in interest had or could
give under the previous paragraph, plus a right to possession of the
Corresponding Source of the work from the predecessor in interest, if
the predecessor has it or can get it with reasonable efforts.

  You may not impose any further restrictions on the exercise of the
rights granted or affirmed under this License.  For example, you may
not impose a license fee, royalty, or other charge for exercise of
rights granted under this License, and you may not initiate litigation
(including a cross-claim or counterclaim in a lawsuit) alleging that
any patent claim is infringed by making, using, selling, offering for
sale, or importing the Program or any portion of it.

  11. Patents.

  A "contributor" is a copyright holder who authorizes use under this
License of the Program or a work on which the Program is based.  The
work thus licensed is called the contributor's "contributor version".

  A contributor's "essential patent claims" are all patent claims
owned or controlled by the contributor, whether already acquired or
hereafter acquired, that would be infringed by some manner, permitted
by this License, of making, using, or selling its contributor version,
but do not include claims that would be infringed only as a
consequence of further modification of the contributor version.  For
purposes of this definition, "control" includes the right to grant
patent sublicenses in a manner consistent with the requirements of
this License.

  Each contributor grants you a non-exclusive, worldwide, royalty-free
patent license under the contributor's essential patent claims, to
make, use, sell, offer for sale, import and otherwise run, modify and
propagate the contents of its contributor version.

  In the following three paragraphs, a "patent license" is any express
agreement or commitment, however denominated, not to enforce a patent
(such as an express permission to practice a patent or covenant not to
sue for patent infringement).  To "grant" such a patent license to a
party means to make such an agreement or commitment not to enforce a
patent against the party.

  If you convey a covered work, knowingly relying on a patent license,
and the Corresponding Source of the work is not available for anyone
to copy, free of charge and under the terms of this License, through a
publicly available network server or other readily accessible means,
then you must either (1) cause the Corresponding Source to be so
available, or (2) arrange to deprive yourself of the benefit of the
patent license for this particular work, or (3) arrange, in a manner
consistent with the requirements of this License, to extend the patent
license to downstream recipients.  "Knowingly relying" means you have
actual knowledge that, but for the patent license, your conveying the
covered work in a country, or your recipient's use of the covered work
in a country, would infringe one or more identifiable patents in that
country that you have reason to believe are valid.

  If, pursuant to or in connection with a single transaction or
arrangement, you convey, or propagate by procuring conveyance of, a
covered work, and grant a patent license to some of the parties
receiving the covered work authorizing them to use, propagate, modify
or convey a specific copy of the covered work, then the patent license
you grant is automatically extended to all recipients of the covered
work and works based on it.

  A patent license is "discriminatory" if it does not include within
the scope of its coverage, prohibits the exercise of, or is
conditioned on the non-exercise of one or more of the rights that are
specifically granted under this License.  You may not convey a covered
work if you are a party to an arrangement with a third party that is
in the business of distributing software, under which you make payment
to the third party based on the extent of your activity of conveying
the work, and under which the third party grants, to any of the
parties who would receive the covered work from you, a discriminatory
patent license (a) in connection with copies of the covered work
conveyed by you (or copies made from those copies), or (b) primarily
for and in connection with specific products or compilations that
contain the covered work, unless you entered into that arrangement,
or that patent license was granted, prior to 28 March 2007.

  Nothing in this License shall be construed as excluding or limiting
any implied license or other defenses to infringement that may
otherwise be available to you under applicable patent law.

  12. No Surrender of Others' Freedom.

  If conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License.  If you cannot convey a
covered work so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you may
not convey it at all.  For example, if you agree to terms that obligate you
to collect a royalty for further conveying from those to whom you convey
the Program, the only way you could satisfy both those terms and this
License would be to refrain entirely from conveying the Program.

  13. Use with the GNU Affero General Public License.

  Notwithstanding any other provision of this License, you have
permission to link or combine any covered work with a work licensed
under version 3 of the GNU Affero General Public License into a single
combined work, and to convey the resulting work.  The terms of this
License will continue to apply to the part which is the covered work,
but the special requirements of the GNU Affero General Public License,
section 13, concerning interaction through a network will apply to the
combination as such.

  14. Revised Versions of this License.

  The Free Software Foundation may publish revised and/or new versions of
the GNU General Public License from time to time.  Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.

  Each version is given a distinguishing version number.  If the
Program specifies that a certain numbered version of the GNU General
Public License "or any later version" applies to it, you have the
option of following the terms and conditions either of that numbered
version or of any later version published by the Free Software
Foundation.  If the Program does not specify a version number of the
GNU General Public License, you may choose any version ever published
by the Free Software Foundation.

  If the Program specifies that a proxy can decide which future
versions of the GNU General Public License can be used, that proxy's
public statement of acceptance of a version permanently authorizes you
to choose that version for the Program.

  Later license versions may give you additional or different
permissions.  However, no additional obligations are imposed on any
author or copyright holder as a result of your choosing to follow a
later version.

  15. Disclaimer of Warranty.

  THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE.  THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
IS WITH YOU.  SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
ALL NECESSARY SERVICING, REPAIR OR CORRECTION.

  16. Limitation of Liability.

  IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES.

  17. Interpretation of Sections 15 and 16.

  If the disclaimer of warranty and limitation of liability provided
above cannot be given local legal effect according to their terms,
reviewing courts shall apply local law that most closely approximates
an absolute waiver of all civil liability in connection with the
Program, unless a warranty or assumption of liability accompanies a
copy of the Program in return for a fee.

             END OF TERMS AND CONDITIONS

        How to Apply These Terms to Your New Programs

  If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.

  To do so, attach the following notices to the program.  It is safest
to attach them to the start of each source file to most effectively
state the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.

    <one line to give the program's name and a brief idea of what it does.>
    Copyright (C) <year>  <name of author>

    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.

Also add information on how to contact you by electronic and paper mail.

  If the program does terminal interaction, make it output a short
notice like this when it starts in an interactive mode:

    <program>  Copyright (C) <year>  <name of author>
    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
    This is free software, and you are welcome to redistribute it
    under certain conditions; type `show c' for details.

The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License.  Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".

  You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<http://www.gnu.org/licenses/>.

  The GNU General Public License does not permit incorporating your program
into proprietary programs.  If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library.  If this is what you want to do, use the GNU Lesser General
Public License instead of this License.  But first, please read
<http://www.gnu.org/philosophy/why-not-lgpl.html>.


Eclipse Distribution License - Version 1.0

Eclipse Distribution License - v 1.0

Copyright (c) 2007, Eclipse Foundation, Inc. and its licensors.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  • Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  • Neither the name of the Eclipse Foundation, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


Eclipse Public License - Version 1.0

Eclipse Public License - v 1.0

THE ACCOMPANYING PROGRAM IS PROVIDED UNDER THE TERMS OF THIS ECLIPSE PUBLIC LICENSE ("AGREEMENT"). ANY USE, REPRODUCTION OR DISTRIBUTION OF THE PROGRAM CONSTITUTES RECIPIENT'S ACCEPTANCE OF THIS AGREEMENT.

1. DEFINITIONS

"Contribution" means:

a) in the case of the initial Contributor, the initial code and documentation distributed under this Agreement, and

b) in the case of each subsequent Contributor:

i) changes to the Program, and

ii) additions to the Program;

where such changes and/or additions to the Program originate from and are distributed by that particular Contributor. A Contribution 'originates' from a Contributor if it was added to the Program by such Contributor itself or anyone acting on such Contributor's behalf. Contributions do not include additions to the Program which: (i) are separate modules of software distributed in conjunction with the Program under their own license agreement, and (ii) are not derivative works of the Program.

"Contributor" means any person or entity that distributes the Program.

"Licensed Patents" mean patent claims licensable by a Contributor which are necessarily infringed by the use or sale of its Contribution alone or when combined with the Program.

"Program" means the Contributions distributed in accordance with this Agreement.

"Recipient" means anyone who receives the Program under this Agreement, including all Contributors.

2. GRANT OF RIGHTS

a) Subject to the terms of this Agreement, each Contributor hereby grants Recipient a non-exclusive, worldwide, royalty-free copyright license to reproduce, prepare derivative works of, publicly display, publicly perform, distribute and sublicense the Contribution of such Contributor, if any, and such derivative works, in source code and object code form.

b) Subject to the terms of this Agreement, each Contributor hereby grants Recipient a non-exclusive, worldwide, royalty-free patent license under Licensed Patents to make, use, sell, offer to sell, import and otherwise transfer the Contribution of such Contributor, if any, in source code and object code form. This patent license shall apply to the combination of the Contribution and the Program if, at the time the Contribution is added by the Contributor, such addition of the Contribution causes such combination to be covered by the Licensed Patents. The patent license shall not apply to any other combinations which include the Contribution. No hardware per se is licensed hereunder.

c) Recipient understands that although each Contributor grants the licenses to its Contributions set forth herein, no assurances are provided by any Contributor that the Program does not infringe the patent or other intellectual property rights of any other entity. Each Contributor disclaims any liability to Recipient for claims brought by any other entity based on infringement of intellectual property rights or otherwise. As a condition to exercising the rights and licenses granted hereunder, each Recipient hereby assumes sole responsibility to secure any other intellectual property rights needed, if any. For example, if a third party patent license is required to allow Recipient to distribute the Program, it is Recipient's responsibility to acquire that license before distributing the Program.

d) Each Contributor represents that to its knowledge it has sufficient copyright rights in its Contribution, if any, to grant the copyright license set forth in this Agreement.

3. REQUIREMENTS

A Contributor may choose to distribute the Program in object code form under its own license agreement, provided that:

a) it complies with the terms and conditions of this Agreement; and

b) its license agreement:

i) effectively disclaims on behalf of all Contributors all warranties and conditions, express and implied, including warranties or conditions of title and non-infringement, and implied warranties or conditions of merchantability and fitness for a particular purpose;

ii) effectively excludes on behalf of all Contributors all liability for damages, including direct, indirect, special, incidental and consequential damages, such as lost profits;

iii) states that any provisions which differ from this Agreement are offered by that Contributor alone and not by any other party; and

iv) states that source code for the Program is available from such Contributor, and informs licensees how to obtain it in a reasonable manner on or through a medium customarily used for software exchange.

When the Program is made available in source code form:

a) it must be made available under this Agreement; and

b) a copy of this Agreement must be included with each copy of the Program.

Contributors may not remove or alter any copyright notices contained within the Program.

Each Contributor must identify itself as the originator of its Contribution, if any, in a manner that reasonably allows subsequent Recipients to identify the originator of the Contribution.

4. COMMERCIAL DISTRIBUTION

Commercial distributors of software may accept certain responsibilities with respect to end users, business partners and the like. While this license is intended to facilitate the commercial use of the Program, the Contributor who includes the Program in a commercial product offering should do so in a manner which does not create potential liability for other Contributors. Therefore, if a Contributor includes the Program in a commercial product offering, such Contributor ("Commercial Contributor") hereby agrees to defend and indemnify every other Contributor ("Indemnified Contributor") against any losses, damages and costs (collectively "Losses") arising from claims, lawsuits and other legal actions brought by a third party against the Indemnified Contributor to the extent caused by the acts or omissions of such Commercial Contributor in connection with its distribution of the Program in a commercial product offering. The obligations in this section do not apply to any claims or Losses relating to any actual or alleged intellectual property infringement. In order to qualify, an Indemnified Contributor must: a) promptly notify the Commercial Contributor in writing of such claim, and b) allow the Commercial Contributor to control, and cooperate with the Commercial Contributor in, the defense and any related settlement negotiations. The Indemnified Contributor may participate in any such claim at its own expense.

For example, a Contributor might include the Program in a commercial product offering, Product X. That Contributor is then a Commercial Contributor. If that Commercial Contributor then makes performance claims, or offers warranties related to Product X, those performance claims and warranties are such Commercial Contributor's responsibility alone. Under this section, the Commercial Contributor would have to defend claims against the other Contributors related to those performance claims and warranties, and if a court requires any other Contributor to pay any damages as a result, the Commercial Contributor must pay those damages.

5. NO WARRANTY

EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is solely responsible for determining the appropriateness of using and distributing the Program and assumes all risks associated with its exercise of rights under this Agreement , including but not limited to the risks and costs of program errors, compliance with applicable laws, damage to or loss of data, programs or equipment, and unavailability or interruption of operations.

6. DISCLAIMER OF LIABILITY

EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

7. GENERAL

If any provision of this Agreement is invalid or unenforceable under applicable law, it shall not affect the validity or enforceability of the remainder of the terms of this Agreement, and without further action by the parties hereto, such provision shall be reformed to the minimum extent necessary to make such provision valid and enforceable.

If Recipient institutes patent litigation against any entity (including a cross-claim or counterclaim in a lawsuit) alleging that the Program itself (excluding combinations of the Program with other software or hardware) infringes such Recipient's patent(s), then such Recipient's rights granted under Section 2(b) shall terminate as of the date such litigation is filed.

All Recipient's rights under this Agreement shall terminate if it fails to comply with any of the material terms or conditions of this Agreement and does not cure such failure in a reasonable period of time after becoming aware of such noncompliance. If all Recipient's rights under this Agreement terminate, Recipient agrees to cease use and distribution of the Program as soon as reasonably practicable. However, Recipient's obligations under this Agreement and any licenses granted by Recipient relating to the Program shall continue and survive.

Everyone is permitted to copy and distribute copies of this Agreement, but in order to avoid inconsistency the Agreement is copyrighted and may only be modified in the following manner. The Agreement Steward reserves the right to publish new versions (including revisions) of this Agreement from time to time. No one other than the Agreement Steward has the right to modify this Agreement. The Eclipse Foundation is the initial Agreement Steward. The Eclipse Foundation may assign the responsibility to serve as the Agreement Steward to a suitable separate entity. Each new version of the Agreement will be given a distinguishing version number. The Program (including Contributions) may always be distributed subject to the version of the Agreement under which it was received. In addition, after a new version of the Agreement is published, Contributor may elect to distribute the Program (including its Contributions) under the new version. Except as expressly stated in Sections 2(a) and 2(b) above, Recipient receives no rights or licenses to the intellectual property of any Contributor under this Agreement, whether expressly, by implication, estoppel or otherwise. All rights in the Program not expressly granted under this Agreement are reserved.

This Agreement is governed by the laws of the State of New York and the intellectual property laws of the United States of America. No party to this Agreement will bring a legal action under this Agreement more than one year after the cause of action arose. Each party waives its rights to a jury trial in any resulting litigation.


The majority of Rhino is licensed under the MPL 2.0:

Mozilla Public License Version 2.0
==================================

1. Definitions
--------------

1.1. "Contributor"
    means each individual or legal entity that creates, contributes to
    the creation of, or owns Covered Software.

1.2. "Contributor Version"
    means the combination of the Contributions of others (if any) used
    by a Contributor and that particular Contributor's Contribution.

1.3. "Contribution"
    means Covered Software of a particular Contributor.

1.4. "Covered Software"
    means Source Code Form to which the initial Contributor has attached
    the notice in Exhibit A, the Executable Form of such Source Code
    Form, and Modifications of such Source Code Form, in each case
    including portions thereof.

1.5. "Incompatible With Secondary Licenses"
    means

    (a) that the initial Contributor has attached the notice described
        in Exhibit B to the Covered Software; or

    (b) that the Covered Software was made available under the terms of
        version 1.1 or earlier of the License, but not also under the
        terms of a Secondary License.

1.6. "Executable Form"
    means any form of the work other than Source Code Form.

1.7. "Larger Work"
    means a work that combines Covered Software with other material, in
    a separate file or files, that is not Covered Software.

1.8. "License"
    means this document.

1.9. "Licensable"
    means having the right to grant, to the maximum extent possible,
    whether at the time of the initial grant or subsequently, any and
    all of the rights conveyed by this License.

1.10. "Modifications"
    means any of the following:

    (a) any file in Source Code Form that results from an addition to,
        deletion from, or modification of the contents of Covered
        Software; or

    (b) any new file in Source Code Form that contains any Covered
        Software.

1.11. "Patent Claims" of a Contributor
    means any patent claim(s), including without limitation, method,
    process, and apparatus claims, in any patent Licensable by such
    Contributor that would be infringed, but for the grant of the
    License, by the making, using, selling, offering for sale, having
    made, import, or transfer of either its Contributions or its
    Contributor Version.

1.12. "Secondary License"
    means either the GNU General Public License, Version 2.0, the GNU
    Lesser General Public License, Version 2.1, the GNU Affero General
    Public License, Version 3.0, or any later versions of those
    licenses.

1.13. "Source Code Form"
    means the form of the work preferred for making modifications.

1.14. "You" (or "Your")
    means an individual or a legal entity exercising rights under this
    License. For legal entities, "You" includes any entity that
    controls, is controlled by, or is under common control with You. For
    purposes of this definition, "control" means (a) the power, direct
    or indirect, to cause the direction or management of such entity,
    whether by contract or otherwise, or (b) ownership of more than
    fifty percent (50%) of the outstanding shares or beneficial
    ownership of such entity.

2. License Grants and Conditions
--------------------------------

2.1. Grants

Each Contributor hereby grants You a world-wide, royalty-free,
non-exclusive license:

(a) under intellectual property rights (other than patent or trademark)
    Licensable by such Contributor to use, reproduce, make available,
    modify, display, perform, distribute, and otherwise exploit its
    Contributions, either on an unmodified basis, with Modifications, or
    as part of a Larger Work; and

(b) under Patent Claims of such Contributor to make, use, sell, offer
    for sale, have made, import, and otherwise transfer either its
    Contributions or its Contributor Version.

2.2. Effective Date

The licenses granted in Section 2.1 with respect to any Contribution
become effective for each Contribution on the date the Contributor first
distributes such Contribution.

2.3. Limitations on Grant Scope

The licenses granted in this Section 2 are the only rights granted under
this License. No additional rights or licenses will be implied from the
distribution or licensing of Covered Software under this License.
Notwithstanding Section 2.1(b) above, no patent license is granted by a
Contributor:

(a) for any code that a Contributor has removed from Covered Software;
    or

(b) for infringements caused by: (i) Your and any other third party's
    modifications of Covered Software, or (ii) the combination of its
    Contributions with other software (except as part of its Contributor
    Version); or

(c) under Patent Claims infringed by Covered Software in the absence of
    its Contributions.

This License does not grant any rights in the trademarks, service marks,
or logos of any Contributor (except as may be necessary to comply with
the notice requirements in Section 3.4).

2.4. Subsequent Licenses

No Contributor makes additional grants as a result of Your choice to
distribute the Covered Software under a subsequent version of this
License (see Section 10.2) or under the terms of a Secondary License (if
permitted under the terms of Section 3.3).

2.5. Representation

Each Contributor represents that the Contributor believes its
Contributions are its original creation(s) or it has sufficient rights
to grant the rights to its Contributions conveyed by this License.

2.6. Fair Use

This License is not intended to limit any rights You have under
applicable copyright doctrines of fair use, fair dealing, or other
equivalents.

2.7. Conditions

Sections 3.1, 3.2, 3.3, and 3.4 are conditions of the licenses granted
in Section 2.1.

3. Responsibilities
-------------------

3.1. Distribution of Source Form

All distribution of Covered Software in Source Code Form, including any
Modifications that You create or to which You contribute, must be under
the terms of this License. You must inform recipients that the Source
Code Form of the Covered Software is governed by the terms of this
License, and how they can obtain a copy of this License. You may not
attempt to alter or restrict the recipients' rights in the Source Code
Form.

3.2. Distribution of Executable Form

If You distribute Covered Software in Executable Form then:

(a) such Covered Software must also be made available in Source Code
    Form, as described in Section 3.1, and You must inform recipients of
    the Executable Form how they can obtain a copy of such Source Code
    Form by reasonable means in a timely manner, at a charge no more
    than the cost of distribution to the recipient; and

(b) You may distribute such Executable Form under the terms of this
    License, or sublicense it under different terms, provided that the
    license for the Executable Form does not attempt to limit or alter
    the recipients' rights in the Source Code Form under this License.

3.3. Distribution of a Larger Work

You may create and distribute a Larger Work under terms of Your choice,
provided that You also comply with the requirements of this License for
the Covered Software. If the Larger Work is a combination of Covered
Software with a work governed by one or more Secondary Licenses, and the
Covered Software is not Incompatible With Secondary Licenses, this
License permits You to additionally distribute such Covered Software
under the terms of such Secondary License(s), so that the recipient of
the Larger Work may, at their option, further distribute the Covered
Software under the terms of either this License or such Secondary
License(s).

3.4. Notices

You may not remove or alter the substance of any license notices
(including copyright notices, patent notices, disclaimers of warranty,
or limitations of liability) contained within the Source Code Form of
the Covered Software, except that You may alter any license notices to
the extent required to remedy known factual inaccuracies.

3.5. Application of Additional Terms

You may choose to offer, and to charge a fee for, warranty, support,
indemnity or liability obligations to one or more recipients of Covered
Software. However, You may do so only on Your own behalf, and not on
behalf of any Contributor. You must make it absolutely clear that any
such warranty, support, indemnity, or liability obligation is offered by
You alone, and You hereby agree to indemnify every Contributor for any
liability incurred by such Contributor as a result of warranty, support,
indemnity or liability terms You offer. You may include additional
disclaimers of warranty and limitations of liability specific to any
jurisdiction.

4. Inability to Comply Due to Statute or Regulation
---------------------------------------------------

If it is impossible for You to comply with any of the terms of this
License with respect to some or all of the Covered Software due to
statute, judicial order, or regulation then You must: (a) comply with
the terms of this License to the maximum extent possible; and (b)
describe the limitations and the code they affect. Such description must
be placed in a text file included with all distributions of the Covered
Software under this License. Except to the extent prohibited by statute
or regulation, such description must be sufficiently detailed for a
recipient of ordinary skill to be able to understand it.

5. Termination
--------------

5.1. The rights granted under this License will terminate automatically
if You fail to comply with any of its terms. However, if You become
compliant, then the rights granted under this License from a particular
Contributor are reinstated (a) provisionally, unless and until such
Contributor explicitly and finally terminates Your grants, and (b) on an
ongoing basis, if such Contributor fails to notify You of the
non-compliance by some reasonable means prior to 60 days after You have
come back into compliance. Moreover, Your grants from a particular
Contributor are reinstated on an ongoing basis if such Contributor
notifies You of the non-compliance by some reasonable means, this is the
first time You have received notice of non-compliance with this License
from such Contributor, and You become compliant prior to 30 days after
Your receipt of the notice.

5.2. If You initiate litigation against any entity by asserting a patent
infringement claim (excluding declaratory judgment actions,
counter-claims, and cross-claims) alleging that a Contributor Version
directly or indirectly infringes any patent, then the rights granted to
You by any and all Contributors for the Covered Software under Section
2.1 of this License shall terminate.

5.3. In the event of termination under Sections 5.1 or 5.2 above, all
end user license agreements (excluding distributors and resellers) which
have been validly granted by You or Your distributors under this License
prior to termination shall survive termination.

************************************************************************
*                                                                      *
*  6. Disclaimer of Warranty                                           *
*  -------------------------                                           *
*                                                                      *
*  Covered Software is provided under this License on an "as is"       *
*  basis, without warranty of any kind, either expressed, implied, or  *
*  statutory, including, without limitation, warranties that the       *
*  Covered Software is free of defects, merchantable, fit for a        *
*  particular purpose or non-infringing. The entire risk as to the     *
*  quality and performance of the Covered Software is with You.        *
*  Should any Covered Software prove defective in any respect, You     *
*  (not any Contributor) assume the cost of any necessary servicing,   *
*  repair, or correction. This disclaimer of warranty constitutes an   *
*  essential part of this License. No use of any Covered Software is   *
*  authorized under this License except under this disclaimer.         *
*                                                                      *
************************************************************************

************************************************************************
*                                                                      *
*  7. Limitation of Liability                                          *
*  --------------------------                                          *
*                                                                      *
*  Under no circumstances and under no legal theory, whether tort      *
*  (including negligence), contract, or otherwise, shall any           *
*  Contributor, or anyone who distributes Covered Software as          *
*  permitted above, be liable to You for any direct, indirect,         *
*  special, incidental, or consequential damages of any character      *
*  including, without limitation, damages for lost profits, loss of    *
*  goodwill, work stoppage, computer failure or malfunction, or any    *
*  and all other commercial damages or losses, even if such party      *
*  shall have been informed of the possibility of such damages. This   *
*  limitation of liability shall not apply to liability for death or   *
*  personal injury resulting from such party's negligence to the       *
*  extent applicable law prohibits such limitation. Some               *
*  jurisdictions do not allow the exclusion or limitation of           *
*  incidental or consequential damages, so this exclusion and          *
*  limitation may not apply to You.                                    *
*                                                                      *
************************************************************************

8. Litigation
-------------

Any litigation relating to this License may be brought only in the
courts of a jurisdiction where the defendant maintains its principal
place of business and such litigation shall be governed by laws of that
jurisdiction, without reference to its conflict-of-law provisions.
Nothing in this Section shall prevent a party's ability to bring
cross-claims or counter-claims.

9. Miscellaneous
----------------

This License represents the complete agreement concerning the subject
matter hereof. If any provision of this License is held to be
unenforceable, such provision shall be reformed only to the extent
necessary to make it enforceable. Any law or regulation which provides
that the language of a contract shall be construed against the drafter
shall not be used to construe this License against a Contributor.

10. Versions of the License
---------------------------

10.1. New Versions

Mozilla Foundation is the license steward. Except as provided in Section
10.3, no one other than the license steward has the right to modify or
publish new versions of this License. Each version will be given a
distinguishing version number.

10.2. Effect of New Versions

You may distribute the Covered Software under the terms of the version
of the License under which You originally received the Covered Software,
or under the terms of any subsequent version published by the license
steward.

10.3. Modified Versions

If you create software not governed by this License, and you want to
create a new license for such software, you may create and use a
modified version of this License if you rename the license and remove
any references to the name of the license steward (except to note that
such modified license differs from this License).

10.4. Distributing Source Code Form that is Incompatible With Secondary
Licenses

If You choose to distribute Source Code Form that is Incompatible With
Secondary Licenses under the terms of this version of the License, the
notice described in Exhibit B of this License must be attached.

Exhibit A - Source Code Form License Notice
-------------------------------------------

  This Source Code Form is subject to the terms of the Mozilla Public
  License, v. 2.0. If a copy of the MPL was not distributed with this
  file, You can obtain one at http://mozilla.org/MPL/2.0/.

If it is not possible or desirable to put the notice in a particular
file, then You may include the notice in a location (such as a LICENSE
file in a relevant directory) where a recipient would be likely to look
for such a notice.

You may add additional accurate notices of copyright ownership.

Exhibit B - "Incompatible With Secondary Licenses" Notice
---------------------------------------------------------

  This Source Code Form is "Incompatible With Secondary Licenses", as
  defined by the Mozilla Public License, v. 2.0.


 As of Rhino 1.7R4, the majority of the source code for Rhino is available under the MPL 2.0 license.

License for portions of the Rhino debugger

Additionally, some files (currently the contents of toolsrc/org/mozilla/javascript/tools/debugger/treetable/) are available under the following license:

 * Copyright 1997, 1998 Sun Microsystems, Inc.  All Rights Reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *   - Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *
 *   - Redistributions in binary form must reproduce the above copyright
 *     notice, this list of conditions and the following disclaimer in the
 *     documentation and/or other materials provided with the distribution.
 *
 *   - Neither the name of Sun Microsystems nor the names of its
 *     contributors may be used to endorse or promote products derived
 *     from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Norrisboyd 06:16, 14 April 2008 (PDT)

Retrieved from "https://developer.mozilla.org/En/Rhino_License"


This is version 2007-Mar-4 of the Info-ZIP license.
The definitive version of this document should be available at
ftp://ftp.info-zip.org/pub/infozip/license.html indefinitely and
a copy at http://www.info-zip.org/pub/infozip/license.html.

Copyright (c) 1990-2007 Info-ZIP.  All rights reserved.

For the purposes of this copyright and license, "Info-ZIP" is defined as
the following set of individuals:

   Mark Adler, John Bush, Karl Davis, Harald Denker, Jean-Michel Dubois,
   Jean-loup Gailly, Hunter Goatley, Ed Gordon, Ian Gorman, Chris Herborth,
   Dirk Haase, Greg Hartwig, Robert Heath, Jonathan Hudson, Paul Kienitz,
   David Kirschbaum, Johnny Lee, Onno van der Linden, Igor Mandrichenko,
   Steve P. Miller, Sergio Monesi, Keith Owens, George Petrov, Greg Roelofs,
   Kai Uwe Rommel, Steve Salisbury, Dave Smith, Steven M. Schweda,
   Christian Spieler, Cosmin Truta, Antoine Verheijen, Paul von Behren,
   Rich Wales, Mike White.

This software is provided "as is," without warranty of any kind, express
or implied.  In no event shall Info-ZIP or its contributors be held liable
for any direct, indirect, incidental, special or consequential damages
arising out of the use of or inability to use this software.

Permission is granted to anyone to use this software for any purpose,
including commercial applications, and to alter it and redistribute it
freely, subject to the above disclaimer and the following restrictions:

    1. Redistributions of source code (in whole or in part) must retain
       the above copyright notice, definition, disclaimer, and this list
       of conditions.

    2. Redistributions in binary form (compiled executables and libraries)
       must reproduce the above copyright notice, definition, disclaimer,
       and this list of conditions in documentation and/or other materials
       provided with the distribution.  The sole exception to this condition
       is redistribution of a standard UnZipSFX binary (including SFXWiz) as
       part of a self-extracting archive; that is permitted without inclusion
       of this license, as long as the normal SFX banner has not been removed
       from the binary or disabled.

    3. Altered versions--including, but not limited to, ports to new operating
       systems, existing ports with new graphical interfaces, versions with
       modified or added functionality, and dynamic, shared, or static library
       versions not from Info-ZIP--must be plainly marked as such and must not
       be misrepresented as being the original source or, if binaries,
       compiled from the original source.  Such altered versions also must not
       be misrepresented as being Info-ZIP releases--including, but not
       limited to, labeling of the altered versions with the names "Info-ZIP"
       (or any variation thereof, including, but not limited to, different
       capitalizations), "Pocket UnZip," "WiZ" or "MacZip" without the
       explicit permission of Info-ZIP.  Such altered versions are further
       prohibited from misrepresentative use of the Zip-Bugs or Info-ZIP
       e-mail addresses or the Info-ZIP URL(s), such as to imply Info-ZIP
       will provide support for the altered versions.

    4. Info-ZIP retains the right to use the names "Info-ZIP," "Zip," "UnZip,"
       "UnZipSFX," "WiZ," "Pocket UnZip," "Pocket Zip," and "MacZip" for its
       own source and binary releases.


package xdc.shelf.local

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12
    13    /*!
    14     *  ======== xdc.shelf.local ========
    15     *  Container for third party jars required to rebuild XDCtools
    16     */
    17    package xdc.shelf.local [1, 0, 0] {
    18    }


package xdc.targets.omf

     1    /* --COPYRIGHT--,EPL
     2     * Copyright (c) 2018 Texas Instruments Incorporated - http://www.ti.com
     3     * All rights reserved.
     4     *
     5     * Redistribution and use in source and binary forms, with or without
     6     * modification, are permitted provided that the following conditions are met:
     7     *
     8     * *  Redistributions of source code must retain the above copyright
     9     *    notice, this list of conditions and the following disclaimer.
    10     *
    11     * *  Redistributions in binary form must reproduce the above copyright
    12     *    notice, this list of conditions and the following disclaimer in the
    13     *    documentation and/or other materials provided with the distribution.
    14     *
    15     * *  Neither the name of Texas Instruments Incorporated nor the names of
    16     *    its contributors may be used to endorse or promote products derived
    17     *    from this software without specific prior written permission.
    18     *
    19     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    20     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    21     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    22     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    23     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    24     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    25     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    26     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    27     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    28     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    29     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    30     *
    31     * --/COPYRIGHT--*/
    32
    33    /*!
    34     *  ======== xdc.targets.omf ========
    35     *  ELF parser support
    36     */
    37    package xdc.targets.omf {
    38    }


module xdc.tools.Cmdr

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Cmdr ========
    14     *  Command line tool context
    15     */
    16    metaonly module Cmdr {
    17
    18        enum Context { SHELL, SCRIPT };
    19
    20    instance:
    21
    22        /*!
    23         *  ======== context ========
    24         *  @_nodoc
    25         */
    26        config Context context = SHELL;
    27
    28        /*
    29         *  ======== tid ========
    30         *  @_nodoc
    31         */
    32        config Int tid = 0;
    33
    34        /*!
    35         *  ======== socket ========
    36         *  @_nodoc
    37         */
    38        config Any socket = null;
    39
    40        /*
    41         *  ======== create ========
    42         */
    43        create(Any cmdmod);
    44
    45        /*!
    46         *  ======== error ========
    47         *  Throw an error exception with the specified message
    48         *
    49         *  If `msg` is null or the empty string (""), the message
    50         *  `"fatal error"` is used.
    51         */
    52        function error(msg);
    53
    54        /*!
    55         *  ======== getopts ========
    56         *  Parse command-line arguments into config params.
    57         *
    58         *  This function accepts an array of command-line arguments, and
    59         *  uses them to set the values of config parameters in a module
    60         *  instance. Parsing is controlled by the XDC declarations of the
    61         *  instance config params.
    62         *
    63         *  @a(Usage)
    64         *  The following command-line argument syntaxes are supported,
    65         *  following the syntax supported by GNU getopt() and getopt_long():
    66         *
    67         *  @p(code)
    68         *    -f                a boolean flag with short name
    69         *    -f value          a number or string with short name
    70         *    -fvalue
    71         *    -f=value
    72         *    --longname        a boolean flag with long name
    73         *    --longname value  a number or string with long name
    74         *    --longname=value  a number or string with long name
    75         *  @p
    76         *
    77         *  In addition the following non-standard syntaxes are supported:
    78         *  @p(code)
    79         *    -f:value
    80         *    --longnamevalue
    81         *    --longname:value
    82         *  @p
    83         *
    84         *  @a(Declaration)
    85         *  The long and short names of the config parameter are declared
    86         *  by the @CommandOption() attribute of the XDC spec language. For
    87         *  example to declare a boolean flag with a short name of "-f" and
    88         *  a long name of "--flag", and a default value of false:
    89         *  @p(code)
    90         *     @ CommandOption("f,flag")
    91         *     config Bool myFlag = false;
    92         *  @p
    93         *
    94         *  Options of type Bool with no argument are assigned the value
    95         *  "true". The types String and Int can also be used, and always
    96         *  require an argument to be given on the command line.
    97         *
    98         *  @a(Combining Short Flags)
    99         *  Short-name options can be combined on the command line where there
   100         *  is no ambiguity, for example the following usages are equivalent:
   101         *  @p(code)
   102         *    -a -b -c -f filename
   103         *    -abcf filename
   104         *  @p
   105         *
   106         *  @a(Multiple Occurrences)
   107         *  If the config param is declared as an array, the option may
   108         *  be used multiple times on the command line and each occurence
   109         *  will be recorded. For example the following records all -I
   110         *  options, in order:
   111         *  @p(code)
   112         *    @ CommandOption("I")
   113         *    config String includeDirs[] = [];
   114         *  @p
   115         *
   116         *  @a(Required Options)
   117         *  If the config param has no default value declared, then it
   118         *  is required on the command line.
   119         *
   120         *  @a(Returns)
   121         *  The following return values are used to determine whether or not to
   122         *  proceed with the command and, if not, what the exit status of the
   123         *  command should be.
   124         *  @p(dlist)
   125         *      - `undefined`
   126         *        the command options have been successfully parsed and the
   127         *        command should be run.
   128         *      - `0` (zero)
   129         *        the command options have been successfully parsed and the
   130         *        command does not need to be run and should exit with a
   131         *        successful exit status (0).
   132         *      - non-zero integral value
   133         *        an error occured in the parsing the options and the
   134         *        command should not be run and should exit with a non-zero
   135         *        exit status.
   136         *
   137         *  @param(inst)  instance with config parameters to set
   138         *  @param(args)  an array of command-line arguments
   139         */
   140        function getopts(inst, args);
   141
   142        /*!
   143         *  ======== info ========
   144         *  Output informational message to stdout
   145         */
   146        function info(msg);
   147
   148        /*!
   149         *  ======== read ========
   150         *  @_nodoc
   151         */
   152        function read();
   153
   154        /*!
   155         *  ======== time ========
   156         *  Output elapsed time since command start to stderr
   157         */
   158        function time(msg);
   159
   160        /*!
   161         *  ======== usage ========
   162         *  Output command usage message to stderr
   163         *
   164         *  If `msg` is defined and non-empty, the command name and `msg` are
   165         *  output before the usage information.
   166         */
   167        function usage(msg);
   168
   169        /*!
   170         *  ======== verbose ========
   171         *  Set verbose flag as specified
   172         */
   173        function verbose(flag);
   174
   175        /*!
   176         *  ======== warning ========
   177         *  Output specified warning message to stderr
   178         */
   179        function warning(msg);
   180
   181        /*!
   182         *  ======== write ========
   183         *  @_nodoc
   184         */
   185        function write(s);
   186    }
   187    /*
   188     *  @(#) xdc.tools; 1, 0, 0,1; 11-21-2018 13:32:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   189     */
   190


interface xdc.tools.ICmd

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== ICmd ========
    15     *  Generic xdc-script (xs) command
    16     *
    17     *  Modules that implement this interface can serve as "commands" that
    18     *  can be executed from the command line (via `xs`) or from within
    19     *  XDCscript scripts (without having to fork a separate process to run
    20     *  `xs`).
    21     *
    22     *  @a(Command Line Example)
    23     *  The following example runs the `xdc.tools.path` tool from the command
    24     *  line to get an array of names of all packages below the current
    25     *  working directory (".").
    26     *  @p(code)
    27     *      xs xdc.tools.path -n -a -PR .
    28     *  @p
    29     *
    30     *  @a(XDCscript Example)
    31     *  The following example runs the `xdc.tools.path` tool from within
    32     *  a script to get an array of names of all packages below the current
    33     *  working directory (".").
    34     *  @p(code)
    35     *      var Main = xdc.module('xdc.tools.path.Main');
    36     *      var result = Main.exec(["-n", "-a", "-PR", "."]);
    37     *  @p
    38     */
    39    metaonly interface ICmd {
    40
    41        //! Usage for this command
    42        config String usage[] = [];
    43
    44        /*!
    45         *  ======== main ========
    46         *  `xs` shell entry point
    47         *
    48         *  This function
    49         *  @p(blist)
    50         *   - creates a no-arg instance, `inst`, of the module inheriting
    51         *     this interface;
    52         *   - parses command line arguments placing all options in the config
    53         *     params of the inheriting module;
    54         *   - creates a `{@link xdc.tools.Cmdr}` instance, `cmdr`;
    55         *   - calls `{@link #run inst.run()}` with the `cmdr` and any command
    56         *     line command line arguments not parsed as options; and
    57         *   - outputs the return result from `inst.run()`
    58         *   @p
    59         */
    60        final function main(args);
    61
    62        /*!
    63         *  ======== exec ========
    64         *  `xs` script entry point
    65         *
    66         *  This function is called from within other XDCscript scripts and
    67         *  performs the same operations as `{@link #main()}` except that,
    68         *  rather than output the return value of `inst.run()`, this value
    69         *  is simply returned to the caller of `exec()`.
    70         */
    71        final function exec(args);
    72
    73    instance:
    74
    75        /*!
    76         *  ======== run ========
    77         *  Underlying implementation of the command
    78         *
    79         *  Since this method is used to support both command line tools and
    80         *  other XDCscript scripts, it is important to avoid explicit
    81         *  termination of the JVM via `java.lang.System.exit()`; doing so
    82         *  precludes callers from handling failures.
    83         *
    84         *  Implementations should instead call
    85         *  @p(blist)
    86         *  - `{@link xdc.tools.Cmdr#error cmdr.error()}` when encountering a
    87         *     fatal error.
    88         *  - `{@link xdc.tools.Cmdr#warning cmdr.warning()}` when encountering a
    89         *     non-fatal error.
    90         *  - `{@link xdc.tools.Cmdr#info cmdr.info()}` when simply generating
    91         *     an informative message.
    92         *  @p
    93         */
    94        Any run(Cmdr.Instance cmdr, String args[]);
    95    }
    96    /*
    97     *  @(#) xdc.tools; 1, 0, 0,1; 11-21-2018 13:32:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    98     */
    99


package xdc.tools

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== xdc.tools ========
    14     *  Command line tool support
    15     */
    16    package xdc.tools [1, 0, 0] {
    17        interface ICmd;
    18        interface IProductView;
    19        interface IRtscProductTemplate;
    20        module Cmdr;
    21        module ResourceBundle;
    22    }
    23    /*
    24     *  @(#) xdc.tools; 1, 0, 0,1; 11-21-2018 13:32:32; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    25     */
    26


module xdc.tools.cdoc.Example

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.tools.cdoc;
    13
    14    /*!
    15     *  ======== Example ========
    16     *  XDOC markup language examples for modules and interfaces
    17     *
    18     *  This module demonstrates the features of XDOC on the declarations
    19     *  of an XDC module. View the source text of this .xdc file for details
    20     *  on how to use these examples.
    21     */
    22    module Example {
    23        /*!
    24         *  ======== AStruct ========
    25         *  Example structure declaration
    26         *
    27         * @field(aField) example field documentation
    28         */
    29        struct AStruct {
    30            Int aField;
    31        };
    32
    33        /*!
    34         *  ======== aFunction ========
    35         *  Example function documentation
    36         *
    37         * @param(aParam) example function parameter documentation
    38         */
    39        Void aFunction(Int aParam);
    40
    41        /*!
    42         *  ======== AnEnum ========
    43         *  Example enum documentation
    44         *
    45         *  @value(AVALUE)  example enum value documentation
    46         */
    47        enum AnEnum {
    48            AVALUE
    49        };
    50        /*!
    51         *  ======== AUnion ========
    52         *  Example union documentation
    53         *
    54         *  @field(aString) example union field documentation
    55         */
    56        union AUnion {
    57            String aString;
    58            Int anInt;
    59        };
    60
    61        /*!
    62         *  ======== u ========
    63         *  Example statically initialized union documentation
    64         */
    65        config AUnion u = {aString: 'hello', anInt: 1234};
    66
    67        /*!
    68         *  ======== ATypedEnum ========
    69         *  Example typed enumeration
    70         *
    71         *  This declaration defines a new type named ATypedEnum which is
    72         *  an alias of Int and two constants of type ATypedEnum.
    73         *
    74         *  Unlike ordinary C enums, where the compiler is free to choose an
    75         *  arbitrary type for enums, this declaration ensures that the new
    76         *  type is of a specific named type (in this case, Int).
    77         *
    78         *  @value(LOOP)  example "typed" enum value documentation
    79         */
    80        enum ATypedEnum : Int {
    81            LOOP = 6,
    82            PRINT = 28
    83        };
    84
    85        /*!
    86         *  ======== ACmd ========
    87         *  Example "tagged union" documentation
    88         *
    89         *  This structure illustrates the "tagged union" pattern: one
    90         *  field of the structure indicates how to interpret the rest of the
    91         *  structure.
    92         *
    93         * @field(args) example structure field documentation
    94         */
    95        struct ACmd {
    96            ATypedEnum cmdId;
    97            union  {
    98                struct {
    99                    Int count;
   100                } loop;
   101
   102                struct {
   103                    String msg;
   104                } print;
   105            } args;
   106        };
   107
   108    }
   109    /*
   110     *  @(#) xdc.tools.cdoc; 1, 0, 0,1; 11-21-2018 13:32:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   111     */
   112


module xdc.tools.cdoc.Main

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.tools.cdoc;
    13
    14    /*!
    15     *  ======== xdc.tools.cdoc.Main ========
    16     *  RTSC documentation generator
    17     *
    18     *  cdoc is a package documentation generation utility. It builds a
    19     *  directory of browsable HTML documentation using the meta-
    20     *  information stored in RTSC packages.
    21     *
    22     *  This utility is invoked via the XDCtools `xs` command.  In the
    23     *  examples below we assume that the alias `cdoc` is defined as
    24     *  follows:
    25     *  @p(code)
    26     *      $(XDCROOT)/xs xdc.tools.cdoc
    27     *  @p
    28     *  where $(XDCROOT) is the installation directory of the XDCtools toolset.
    29     *
    30     *  @a(Examples)
    31     *  In the examples below we assume that the alias `cdoc` is defined as
    32     *  `$(XDCROOT)/xs xdc.tools.cdoc`, where `$(XDCROOT)` is the installation
    33     *  directory of the XDCtools toolset.
    34     *
    35     *  1. To generate documentation for the package in the current working
    36     *  directory:
    37     *  @p(code)
    38     *      cdoc
    39     *  @p
    40     *  Since no package is specified and no output directory is specified,
    41     *  documentation is generated for the package in the current working
    42     *  directory and the output is placed in the package's `./package/cdoc`
    43     *  sub-directory.
    44     *
    45     *  2. To generate documentation with the title "My Packages" for all
    46     *  packages installed in the `myPackages` repository:
    47     *  @p(code)
    48     *      cdoc -title "My Packages" -Pr myPackages
    49     *  @p
    50     *  Since no output directory was specified and documentation will be for
    51     *  more than one package, the generated files are placed in the directory
    52     *  `./cdoc`.
    53     *
    54     *  3. To generate documentation for the package located in `./ti/bios` and
    55     *  put results in the directory `./html`.
    56     *  @p(code)
    57     *      cdoc -od:html -P ti/bios
    58     *  @p
    59     *
    60     *  @a(Note)
    61     *  `cdoc` processes the XML files that are generated *after* a package
    62     *  is built (actually after the `.interfaces` goal is built).  One must first
    63     *  build a package before generating its documentation.  If you change a
    64     *  `.xdc` file and re-run `cdoc` without rebuilding the package, the change
    65     *  in the `.xdc` file will not show up in the generated docs.
    66     *
    67     *  When interatively updating a package's .xdc files and examining the
    68     *  generated documentation, it is useful to define a command alias that
    69     *  first "compiles" the package's .xdc files and then runs the cdoc tool.
    70     *  For example, if your shell is Korn shell compatible, the following
    71     *  command alias ensures that any changes in .xdc files will show up in the
    72     *  generated documents:
    73     *  @p(code)
    74     *      function cdoc {
    75     *          $XDCROOT/xdc .interfaces
    76     *          $XDCROOT/xs xdc.tools.cdoc $*
    77     *      }
    78     *  @p
    79     */
    80
    81    metaonly module Main inherits xdc.tools.ICmd {
    82        override config String usage[] = [
    83            '[-od:dir] [-title text] [--start package] [--indexonly] [--doxytags file] [--doxybase dir] [-h] [-n] [-b] [-s] [-P pkg-dir...|-Pr repo-dir...|-A]'
    84        ];
    85
    86    instance:
    87
    88        /*!
    89         * Place the generated files in the named directory.
    90         */
    91        @CommandOption("-od")
    92        config String outdir = null;
    93
    94        /*!
    95         *  Generated HTML pages will show the string in the page title
    96         */
    97        @CommandOption("-title")
    98        config String title = null;
    99
   100        /*!
   101         *  Set start page to specified package
   102         *
   103         *  The opening page is, by default, the documentation for the
   104         *  alphabetically first package processed.  This option allows
   105         *  you to explicitly specify the package used.
   106         *
   107         *  If "" is specified, the start page will be blank.
   108         *
   109         *  If the package specified is not processed, no warning or error
   110         *  results; it is assumed that when the documentation is used the
   111         *  specified package documentation will exist.
   112         */
   113        @CommandOption("--start")
   114        config String start = null;
   115
   116        /*!
   117         *  Include .xdc file sources
   118         *
   119         *  In the generated documentation for each .xdc file, link
   120         *  to a pretty-printed view of the .xdc file source text.
   121         */
   122        @CommandOption("s")
   123        config Bool sopt = false;
   124
   125        /*!
   126         * The subsequent directories are package directories.
   127         *
   128         * Generates documentation for each of the specified packages.
   129         */
   130        @CommandOption("P")
   131        config Bool popt = false;
   132
   133        /*!
   134         * The subsequent directories are repositories of packages.
   135         *
   136         * Generates documentation for all packages rooted in each of
   137         * the specified repositories.
   138         */
   139        @CommandOption("-Pr")
   140        config Bool ropt = false;
   141
   142        /*!
   143         * Generate documentation for all packages on the package path.
   144         */
   145        @CommandOption("A")
   146        config Bool aopt = false;
   147
   148        /*!
   149         *  Generate a single "big" output
   150         */
   151        @CommandOption("b")
   152        config Bool bopt = false;
   153
   154        /*!
   155         *  Generate html pages only, not table of contents or index
   156         */
   157        @CommandOption("h")
   158        config Bool hopt = false;
   159
   160        /*!
   161         *  Generate nodoc'd docs
   162         */
   163        @CommandOption("n")
   164        config Bool nopt = false;
   165
   166        /*!
   167         *  Quiet mode
   168         */
   169        @CommandOption("--quiet")
   170        config Bool qopt = false;
   171
   172        /*!
   173         *  Generate index and table of contents only
   174         */
   175        @CommandOption("--indexonly")
   176        config Bool iopt = false;
   177
   178        /*!
   179         *  Process doxygen links, using this argument
   180         *  as the tag file
   181         */
   182        @CommandOption("--doxytags")
   183        config String doxytags = null;
   184
   185        /*!
   186         *  The directory containing doxygen html files
   187         */
   188        @CommandOption("--doxybase")
   189        config String doxybase = null;
   190
   191        /*!
   192         *  Use specified style sheet
   193         */
   194        @CommandOption("--style")
   195        config String style = null;
   196    }
   197
   198
   199    /*
   200     *  @(#) xdc.tools.cdoc; 1, 0, 0,1; 11-21-2018 13:32:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   201     */
   202


module xdc.tools.cdoc.Markup

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.tools.cdoc;
    13
    14    /*!
    15     * XDCspec doc markup language examples
    16     *
    17     * This module demonstrates the features of XDCspec doc and gives usage
    18     * examples for the XDCspec doc markup language. View the source text of this
    19     * .xdc file for details on how to use these examples.
    20     *
    21     * @a(HEADINGS)
    22     * Major headings can be inserted into the document using the following
    23     * syntax:
    24     * @p(code)
    25     *    @@tag(headingText)
    26     * @p
    27     *
    28     * The available tags are:
    29     * @p(dlist)
    30     *    - `@@a(headingText)`
    31     *      Add a heading to the end ("a" for "after") of the details section.
    32     *    - `@@b(headingText)`
    33     *      Add a heading to the start ("b" for "before") of the details section.
    34     * @p
    35     *
    36     * Since XDCtools 3.05, @@a and @@b tags can accept space characters in headings.
    37     * Prior to this, heading text could contain no spaces.
    38     *
    39     * @a(PARAGRAPH FORMATTING)
    40     * Paragraphs can be marked in several different styles using the
    41     * following syntax:
    42     * @p(code)
    43     * @@p(style)
    44     *  paragraph text here...
    45     *
    46     *  another paragraph...
    47     * @@p
    48     * @p
    49     *
    50     * The available paragraph styles are:
    51     * @p(dlist)
    52     *    - `@@p(text) or @@p`
    53     *       Plain text -- this is the default.
    54     *    - `@@p(code)`
    55     *       Fragments of source code or pseudo-code. Paragraphs of this
    56     *       type are rendered in a fixed-width font.
    57     *    - `@@p(html)`
    58     *       HTML markup. Paragraphs of this type are copied directly into the
    59     *       XDCspec doc output, with no interpretation.
    60     * @p
    61     *
    62     * @a(CHARACTER FORMATTING)
    63     *
    64     * @a(LIST TYPES)
    65     * Lists in several styles can be created using the syntax:
    66     * @p(code)
    67     * @@p(style)
    68     *  - first list item
    69     *    continued...
    70     *  - second list item
    71     * @@p
    72     * @p
    73     * The available list styles are bulleted list, numbered list, and
    74     * definition list, and they look like this:
    75     * @p(blist)
    76     *    -  The `blist` bulleted list style is an unnumbered, unordered list
    77     *    -  Rendered using the HTML `<UL>` element.
    78     * @p
    79     * @p(nlist)
    80     *    - The `nlist` numbered list style is an ordered, numbered list
    81     *    - Rendered using the HTML `<OL>` element.
    82     * @p
    83     * @p(dlist)
    84     *    - `Definition List`
    85     *       The `dlist` definition list style has a minor heading for
    86     *       each item in the list
    87     *    - `Rendering`
    88     *       Rendered using the HTML `<DL>` element.
    89     * @p
    90     *
    91     * @a(CDOC HYPERLINKS)
    92     * HTML hyperlinks between XDCspec doc pages can be inserted using the
    93     * `{@link}` inline keyword. `link` takes as a parameter the name of an XDCspec
    94     * element, and optionally some additional formatting text. The
    95     * XDCspec element can name a package, a module or interface, or a
    96     * declaration within a module or interface. The general syntax is:
    97     * @p(code)
    98     *    {@@link [pkgName.][modName][#decl][suffText] [altText]}
    99     * @p
   100     * where:
   101     * @p(dlist)
   102     *    - `pkgName`
   103     *       is the name of a package.
   104     *    - `modName`
   105     *       is the name of a module or interface within the package.
   106     *    - `decl`
   107     *       is the name of a declaration within the module or interface,
   108     *       for example a function or config parameter.
   109     *       Note that `decl` is delimited by a '`#`' character to distinguish
   110     *       it from the name of a package, module or interface.
   111     *    - `suffText`
   112     *       is text to be appended to the text of the link. For example, '`()`'
   113     *       might be appended to denote a void function. The suffix text must
   114     *       contain no spaces.
   115     *    - `altText`
   116     *       is alternate text to be used instead of the XDCspec name of the
   117     *       link target.
   118     * @p
   119     *
   120     * @p(html)
   121     * <table cellSpacing="2" cellPadding="2" width="100%" border="1">
   122     *   <tbody>
   123     *   <tr>
   124     *     <th><B>Write this:</B></th>
   125     *     <th><B>To reference this:</B></th></tr>
   126     *   <tr>
   127     *     <td>{@@link <i>pkgName</i>}</td>
   128     *     <td>a package</td></tr>
   129     *   <tr>
   130     *     <td>{@@link <i>pkgName</i>.<i>moduleName</i>}</td>
   131     *     <td>a module</td></tr>
   132     *   <tr>
   133     *     <td>{@@link <i>moduleName</i>}</td>
   134     *     <td>a module in the same package</td></tr>
   135     *   <tr>
   136     *     <td>{@@link <i>pkgName</i>.<i>moduleName</i>#<i>declName</i>}</td>
   137     *     <td>a decl in a module</td></tr>
   138     *   <tr>
   139     *     <td>{@@link <i>moduleName</i>#<i>declName</i>}</td>
   140     *     <td>a decl in the same package</td></tr>
   141     *   <tr>
   142     *     <td>{@@link #<i>declName</i>}</td>
   143     *     <td>a decl in the same module</td></tr>
   144     *   <tr>
   145     *     <td>{@@link #<i>declName</i>(<i>arg1</i>,<i>arg2</i>)}</td>
   146     *     <td>a function with explicit args given in <i>suffText</i></td></tr>
   147     *   <tr>
   148     *     <td>{@@link #<i>declName</i> defined here}</td>
   149     *     <td>a decl with the explicit link text "defined here"</td></tr>
   150     *   </tbody>
   151     * </table>
   152     * @p
   153     *
   154     * Examples are:
   155     * @p(dlist)
   156     *    - {@link Example#AStruct}
   157     *    - {@link xdc.tools.cdoc.Example}
   158     *    - {@link Example#AStruct a struct with alternate text}
   159     * @p
   160     *
   161     * @see Example#AStruct
   162     *
   163     * @a(EXTERNAL HTML LINKS)
   164     * Documentation can also include HTML hyperlinks to web sites, using
   165     * the syntax:
   166     * @p(code)
   167     *    {@@link http://serverName/pathName[#anchor] [altText]}
   168     * @p
   169     * The URL must include a resource type, typically "http:" or "ftp:".
   170     *
   171     * Examples are:
   172     * @p(dlist)
   173     *    - {@link http://ti.com}
   174     *    - {@link http://ti.com Texas Instruments}
   175     * @p
   176     *
   177     * @a(LINKING TO OTHER DOCUMENTATION FILES)
   178     * It is possible to deliver other documentation files along with a
   179     * package, and link to it from XDCspec doc. The documentation files must
   180     * be placed in a subdirectory of the package with the name `'doc-files'`.
   181     * Hyperlinks to files in this directory are created using the syntax:
   182     * @p(code)
   183     *    {@@link ./doc-files/filename[#anchor] [altText]}
   184     *    {@@link pkgDir/doc-files/fileName[#anchor] [altText]}
   185     * @p
   186     *
   187     * The file name is specified using the same syntax as the `xdc.findFile()`
   188     * function. That is, filenames within the current package must begin with "./".
   189     * Links to files in other packages must use the fully qualified package name,
   190     * with slashes ('/') instead of dots ('.') in the name.
   191     *
   192     * @p(html)
   193     * <table cellSpacing="2" cellPadding="2" border="1">
   194     *   <tbody>
   195     *   <tr>
   196     *     <th><B>Write this:</B></th>
   197     *     <th><B>To reference this:</B></th></tr>
   198     *   <tr>
   199     *     <td>{@@link ./doc-files/<i>filename</i> }</td>
   200     *     <td>a file in the current package</td></tr>
   201     *   <tr>
   202     *     <td>{@@link <i>pkgDir</i>/doc-files/<i>filename</i> }</td>
   203     *     <td>a file in another package</td></tr>
   204     *   </tbody>
   205     * </table>
   206     * @p
   207     *
   208     * Examples are:
   209     * @p(dlist)
   210     *    - {@link ./doc-files/example.html}
   211     *    - {@link xdc/tools/cdoc/doc-files/example.html}
   212     * @p
   213     *
   214     * @a(LINKING TO DOXYGEN DOCUMENTATION)
   215     * It is possible to link to Doxygen documentation.
   216     * Hyperlinks to are created using the syntax:
   217     * @p(code)
   218     *    {@@link doxy(name)}
   219     * @p
   220     * In a SEE section use:
   221     * @p(code)
   222     *    doxy(name)
   223     * @p
   224     *
   225     * @p(html)
   226     * <table cellSpacing="2" cellPadding="2" border="1">
   227     *   <tbody>
   228     *   <tr>
   229     *     <th><B>To link to:</B></th>
   230     *     <th><B>Use:</B></th>
   231     *     <th><B>Example:</B></th></tr>
   232     *   <tr>
   233     *     <td>File</td>
   234     *     <td><i>filePrefix</i><B>.</B><i>fileSuffix</i></td>
   235     *     <td>doxy(Engine.h)</td></tr>
   236     *     <td>Function</td>
   237     *     <td><i>functionName</i><B>()</B></td>
   238     *     <td>doxy(Engine_open())</td></tr>
   239     *     <td>#define</td>
   240     *     <td><B>#</B><i>defineName</i></td>
   241     *     <td>doxy(#Engine_GTNAME)</td></tr>
   242     *     <td>Struct</td>
   243     *     <td><i>structName</i></td>
   244     *     <td>doxy(IALG_Fxns)</td></tr>
   245     *     <td>Struct field</td>
   246     *     <td><i>structName</i><B>::</B><i>structField</i></td>
   247     *     <td>doxy(IALG_Fxns::algAlloc)</td></tr>
   248     *     <td>Enum</td>
   249     *     <td><i>enumName</i></td>
   250     *     <td>doxy(IALG_MemAttrs)</td></tr>
   251     *     <td>Enumerator</td>
   252     *     <td><i>enumName</i><B>::</B><i>enumerator</i></td>
   253     *     <td>doxy(IALG_MemAttrs::IALG_PERSIST)</td></tr>
   254     *     <td>Typedef</td>
   255     *     <td><B>::</B><i>typedefName</i></td>
   256     *     <td>doxy(::Engine_Handle)</td></tr>
   257     *     <td>Variable</td>
   258     *     <td><B>#</B><i>variableName</i></td>
   259     *     <td>doxy(#Engine_ATTRS)</td></tr>
   260     *   </tbody>
   261     * </table>
   262     * @p
   263     *
   264     * See xdc.tools.cdoc usage for how to specify the location of the Doxygen files.
   265     *
   266     */
   267    metaonly module Markup {
   268    }
   269    /*
   270     *  @(#) xdc.tools.cdoc; 1, 0, 0,1; 11-21-2018 13:32:40; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
   271     */
   272


package xdc.tools.cdoc

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== xdc.tools.cdoc ========
    15     *  RTSC Document Generator Tool
    16     */
    17    package xdc.tools.cdoc [1, 0, 0] {
    18        module Main;
    19        module Markup;
    20        module Example;
    21    }
    22
    23    /*
    24     *  @(#) xdc.tools.cdoc; 1, 0, 0,1; 11-21-2018 13:32:41; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    25     */
    26


HTML Example

Example of embedded HTML documentation

This HTML page is delivered in the 'doc-files' directory of the package 'xdc.tools.cdoc'.


module xdc.tools.cdoc.sg.Main

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Main ========
    14     *  Interactive Package Documentation Browser
    15     */
    16    metaonly module Main {
    17
    18        function main(args);
    19    }
    20    /*
    21     *  @(#) xdc.tools.cdoc.sg; 1,0,0,1; 11-21-2018 13:32:45; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    22     */
    23


package xdc.tools.cdoc.sg

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.tools.sg;
    13
    14    /*!
    15     *  ======== xdc.tools.cdoc.sg ========
    16     *  Interactive Package Documentation Browser
    17     *
    18     *  @b(Usage)
    19     *  @p(code)
    20     *      xs xdc.tools.cdoc.sg [unit-name ...] [-Pr rdir ...]
    21     *  @p
    22     *
    23     *  This tool is used to interactively browse package documentation for
    24     *  all packages found in the specified repositories `rdir ...`.  If no
    25     *  repositories are specified after the optional `-Pr` flag, the
    26     *  repositories in the current package path are used.
    27     *
    28     *  If one or more "unit-names" are specified, the corresponding package,
    29     *  module, or interface reference pages are opened during startup.
    30     *
    31     *  This utility is invoked via the XDC `xs` command, where the
    32     *  alias `xs` is defined as follows:
    33     *  @p(code)
    34     *      $XDCROOT/xs
    35     *  @p
    36     *  and $XDCROOT is the installation directory of the XDC toolset.
    37     */
    38    package xdc.tools.cdoc.sg {
    39        module Main;
    40    }
    41    /*
    42     *  @(#) xdc.tools.cdoc.sg; 1,0,0,1; 11-21-2018 13:32:46; /db/ztree/library/trees/xdc/xdc-F07/src/packages/
    43     */
    44


module xdc.tools.check.Main

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Main.xdc ========
    14     *  Check compatibility of specified packages
    15     *
    16     *  This tools scans the specified repositories looking for package
    17     *  incompatibilities.
    18     *
    19     *  By default, if a package appears in more than one repository, only the
    20     *  package in the first repository is added to the set of packages to check.
    21     *  This allows one to check the consistency of all packages that can be found
    22     *  along a specified package path by simply listing the package path
    23     *  repositories on the command line.
    24     *
    25     *  This tool performs the following checks:
    26     *  @p(blist)
    27     *      - the latest version of each target used by any package is compatible
    28     *        with all other versions used; and
    29     *      - the "built-with" versions of all packages are compatible with the
    30     *        versions of the packages contained in the specified repositories
    31     *  @p
    32     *
    33     *  If no repositories are specified, the repositories named in the current
    34     *  package path are checked.
    35     */
    36    metaonly module Main inherits xdc.tools.ICmd {
    37
    38        /*!
    39         *  ======== usage ========
    40         *  Usage message
    41         */
    42        override config String usage[] = [
    43            '[-[ax]] [-v] [-t target] [-e exclude_pattern] [-H header] [repository ...]',
    44        ];
    45
    46        /*!
    47         *  ======== Results ========
    48         *  XML output format
    49         *
    50         *  This structure defines the "schema" for the XML output.
    51         */
    52        @XmlDtd
    53        struct Results {
    54            String header;      /*! user specified header */
    55            String errors[];    /*! array of all errors detected */
    56            String warnings[];  /*! array of all warnings detected */
    57            Target targets[];
    58        }
    59        struct Target {
    60            String name;            /*! target name */
    61            struct {
    62                String key;         /*! target compatibility key used */
    63                String packages[];  /*! all packages using target with this key */
    64            } keys[];
    65        }
    66
    67    instance:
    68
    69        /*!
    70         *  ======== arrFlag ========
    71         *  Return an array of strings
    72         */
    73        @CommandOption('a')
    74        config Bool arrFlag = false;
    75
    76        /*!
    77         *  ======== verboseFlag ========
    78         *  Print informative messages during execution
    79         */
    80        @CommandOption('v')
    81        config Bool verboseFlag = false;
    82
    83        /*!
    84         *  ======== xmlFlag ========
    85         *  Return a Results struct as XML
    86         */
    87        @CommandOption('x')
    88        config Bool xmlFlag = false;
    89
    90        /*!
    91         *  ======== header ========
    92         *  Prepend Header label to output
    93         */
    94        @CommandOption('H')
    95        config String header = null;
    96
    97        /*!
    98         *  ======== exclude ========
    99         *  Exclude packages or targets from checks
   100         *
   101         *  Do not check compatibility of packages or targets whose names match
   102         *  the regular expression `exclude`.
   103         */
   104        @CommandOption('e')
   105        config String exclude = null;
   106
   107        /*!
   108         *  ======== multipleFlag ========
   109         *  Allow checking multiple versions of the same package
   110         *
   111         *  By default, when a package appears in more than repository named on
   112         *  the command line, this tool only checks the first occurance
   113         *  of the package.  Setting this option forces all versions of all
   114         *  packages in the specified repositories to be included in the checks.
   115         */
   116        @CommandOption('m')
   117        config Bool multipleFlag = false;
   118
   119        /*!
   120         *  ======== target ========
   121         *  Target to check
   122         *
   123         *  During the compatibility checks this tool ensures that for all
   124         *  targets used by all packages are compatible with the latest target
   125         *  referenced by any package.  If this option is set, the check tool
   126         *  will only validate compatibility for the specified target.  In
   127         *  addition, if the target string contains a target compatibility key,
   128         *  all packages that reference the target will be checked for
   129         *  compatibility with the specified key.
   130         *
   131         *  The format of this string is either
   132         *  @p(code)
   133         *      <target_name>:<target_key>
   134         *  @p
   135         *  or
   136         *  @p(code)
   137         *      <target_name>
   138         *  @p
   139         *  where `<target_name>` is the full name of a target and `<target_key>`
   140         *  is an optional target-specific compatibility key.  The optional
   141         *  target compatibility key can be used to validate the set of packages
   142         *  against a specific compiler tool chain.
   143         */
   144        @CommandOption('t')
   145        config String target = null;
   146    }
   147    /*
   148     *  @(#) xdc.tools.check; 1, 0, 0,0; 1-9-2017 12:51:20; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   149     */
   150


package xdc.tools.check

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*
    14     *  ======== xdc.tools.check ========
    15     *  Package compatibility checking tool
    16     */
    17    package xdc.tools.check [1, 0, 0]
    18    {
    19        module Main;
    20    }
    21    /*
    22     *  @(#) xdc.tools.check; 1, 0, 0,0; 1-9-2017 12:51:20; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    23     */
    24


module xdc.tools.closure.Main

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    package xdc.tools.closure;
    14
    15    /*!
    16     *  ======== xdc.tools.closure.Main ========
    17     *  Creates a directory containing all packages/files referenced by a
    18     *  configuration
    19     *
    20     *  The purpose of this tool is to build a single directory containing all
    21     *  packages loaded in the process of configuring an application. The bundle
    22     *  is built in a user-selected repository, which can be then relocated to
    23     *  a different location or to a different host, where the application
    24     *  being configured can be recompiled and relinked.
    25     *
    26     *  The closure tool can run only after {@link xdc.tools.configuro} runs
    27     *  and finishes the configuration step. Then, `xdc.tools.closure' detects
    28     *  all packages involved in the configuration and copies them to a new
    29     *  repository. All absolute paths in the relevant generated files that
    30     *  could be accessed by the user's makefile, when the application is
    31     *  rebuilt, are transformed into the paths relative to the the directory
    32     *  containing the closed bundle.
    33     *
    34     *  Some files in the copied packages are deleted to keep the size of
    35     *  the closed bundle manageable. The default filtering setting causes only
    36     *  selected files to be deleted, for example C sources or object files that
    37     *  are copied into a library. A user has an option of requesting other
    38     *  evels of filtering from not filtering anything to the most aggressive
    39     *  filtering of files, which leaves in the closed bundle only header files
    40     *  and libraries referenced by linker command files. Here are the filtering
    41     *  levels:
    42     *  @p(blist)
    43     *  - 0   - all files are preserved
    44     *  - 1   - C/C++ sources, object files, Java sources and class files,
    45     *          PDF files and internal RTSC files are deleted
    46     *  - 2   - left for future expansion, currently same as 1
    47     *  - 3   - libraries not referenced by the linker command file
    48     *          are also deleted
    49     *  - 4   - same as 3
    50     *  - 5   - only rov.xs file used by the ROV tools is left
    51     *  - 6   - all nonessential file are removed
    52     *  - 7+  - same as 6
    53     *  @p
    54     *
    55     *  @a(Examples)
    56     *  @p(code)
    57     *      xs xdc.tools.configuro -t gnu.targets.arm.GCArmv6 -o configPkg
    58     *      xs xdc.tools.closure -d D:/bundle C:/examples/memory/configPkg
    59     *  @p
    60     *
    61     *  After `xdc.tools.configuro` creates a configuration in `configPkg`,
    62     *  `xdc.tools.closure` gathers all packages loaded during the
    63     *  configuration into a repository located in `D:/bundle`.
    64     */
    65    metaonly module Main inherits xdc.tools.ICmd {
    66
    67        override config String usage[] = [
    68            '[-v] [--filter=N] [-i pkg1 [-i pkg2 ...]] [-d dst_dir] package_base_dir'
    69        ];
    70
    71    instance:
    72
    73        //!Print informative messages during execution
    74        @CommandOption('v')
    75        config Bool verboseFlag = false;
    76
    77        /*!
    78         * ======== aggFilter ========
    79         * Alias for --filter=5
    80         *
    81         * This flag was used for requesting aggressive filtering. It was
    82         * superceded by 'filter'.
    83         */
    84        @CommandOption('f')
    85        config Bool aggFilter = false;
    86
    87        /*!
    88         * ======== filter ========
    89         * Set the level of deleting nonessential files
    90         *
    91         * Library and header files are the only files that must be present for the
    92         * bundle generated by this tool to be used when building an application.
    93         * Other files are optional, and might be used by other tools if present.
    94         * The levels of filtering that can be specified by this parameter are:
    95         * 0   - all files are preserved
    96         * 1   - C sources, object files, Java sources and class files, PDF files
    97         *       and internal RTSC files are deleted
    98         * 2   - left for future expansion, currently same as 1
    99         * 3   - libraries not referenced by the linker command file are also
   100         *       deleted
   101         * 4   - same as 3
   102         * 5   - only rov.xs file used by the ROV tools is left
   103         * 6   - all nonessential file are removed
   104         * 7+  - same as 6
   105         */
   106        @CommandOption('filter')
   107        config UInt filter = 3;
   108
   109        //!Name of the destination directory
   110        @CommandOption('d')
   111        config String destination = "";
   112
   113        //!Additional packages to be included in the bundle
   114        @CommandOption('i')
   115        config String includes[] = [];
   116    }
   117
   118
   119    /*
   120     *  @(#) xdc.tools.closure; 1, 0, 0,0; 1-9-2017 12:51:22; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   121     */
   122


package xdc.tools.closure

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    requires xdc.tools.path;
    14    requires xdc.tools.repoman;
    15
    16    /*!
    17     *  ======== xdc.tools.closure ========
    18     *  A command line tool that creates 100% self-contained configurations
    19     *
    20     *  This package contains a command line tool that creates a "closure"
    21     *  containing all packages loaded in the process of configuring an
    22     *  application and replaces all absolute path references with references
    23     *  withing the closure.
    24     */
    25    package xdc.tools.closure [1, 0, 0] {
    26        module Main;
    27    }
    28
    29    /*
    30     *  @(#) xdc.tools.closure; 1, 0, 0,0; 1-9-2017 12:51:22; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    31     */
    32


module xdc.tools.configuro.Main

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    /*!
    13     *  ======== Main ========
    14     *  Command-line configuration tool
    15     *
    16     *  This command allows RTSC content, in the form of reusable modules built
    17     *  using the XDCtools tooling, to be imported into a system integrator's
    18     *  embedded application. It is the recommended method for integrating RTSC
    19     *  content into non-RTSC application build environments.
    20     *
    21     *  Configuro lets the system integrator identify and customize the RTSC
    22     *  content they wish to use, and computes a set of libraries, command-line
    23     *  flags and other artifacts to include in their application build. By
    24     *  changing the values of configuration settings, the integrator can
    25     *  trade off the functionality, memory footprint, and even performance of
    26     *  the RTSC content to best meet the needs of their application.
    27     *
    28     *  @a(INPUTS)
    29     *  @p(dlist)
    30     *    - `infile.cfg`
    31     *      A user-supplied configuration script that names a set of RTSC
    32     *      modules, and optionally changes their configuration settings.
    33     *  @p
    34     *
    35     *  @a(OUTPUTS)
    36     *  @p(dlist)
    37     *    - `outdir/`
    38     *      A directory containing all generated build artifacts.
    39     *    - `outdir/compiler.opt`
    40     *      A file containing C compiler command-line flags. These flags must
    41     *      included on the compiler command line for any C source file that
    42     *      directly accesses the RTSC content. The flags define the header file
    43     *      include paths, and machine-mode compiler flags to ensure object code
    44     *      compatibility between all included content.
    45     *    - `outdir/linker.cmd`
    46     *      A file containing linker command-line flags. These flags must be
    47     *      included on the linker command line for the final link of the
    48     *      application. The flags list needed libraries and object files,
    49     *      and on some platforms define the embedded system memory map.
    50     *  @p
    51     *
    52     *  For example:
    53     *  @p(code)
    54     *      xs xdc.tools.configuro myconfig.cfg
    55     *  @p
    56     */
    57    metaonly module Main inherits xdc.tools.ICmd {
    58
    59        /*!
    60         * usage help message
    61         */
    62        override config String usage[] = [
    63            '[-v | -q]',
    64            '[-@ optionsfile]',
    65            '[-o outdir]',
    66            '[-b config_bld | -c codegen_dir | --cb]',
    67            '[-t target] [-p platform[:instance]] [-r profile]',
    68            '[-Dname=value]',
    69            '[-w | -x regexp]',
    70            '[--rtsName pkg_name]',
    71            '[--cfgArgs args_string]',
    72            '[--linkTemplate linker_template]',
    73            '[--pkg] [--generationOnly]',
    74            '[--compileOptions compile_options_string]',
    75            '[--linkOptions linker_options_string]',
    76            '[--oc compiler.opt] [--ol linker.cmd]',
    77            'infile.cfg'
    78        ];
    79
    80    instance:
    81        /*!
    82         *  Pathname of the output directory
    83         *
    84         *  A directory containing the generated build artifacts, in particular
    85         *  the `compiler.opt` and `linker.cmd` files.
    86         *
    87         *  The last component of the output directory path must be a valid
    88         *  ANSI C identifier; i.e., it must consist entirely of alphanumeric or
    89         *  '_' characters and must not start with a number.  So, the names
    90         *  '0app' and 'app-test' are not valid but '0app/config' and
    91         *  'app-test/config' are valid.
    92         *
    93         *  By default, the output directory has the same name as the
    94         *  configuration script, minus the `.cfg` extension, within the same
    95         *  parent directory as this script.  As a result, the directory name
    96         *  constraint above applies to the name of the configuration script.
    97         */
    98        @CommandOption("o")
    99        config String output = null;
   100
   101        /*!
   102         *  Name of the RTSC target module
   103         *
   104         *  The name of a RTSC target module to use, for example
   105         *  `ti.targets.C64P`.
   106         *
   107         *  If no `config.bld` file is given, then this is a required
   108         *  parameter.
   109         *
   110         *  If a `config.bld` file is given then this parameter is optional,
   111         *  and by default the target will be
   112         *  {@link xdc.bld.BuildEnvironment#targets `Build.targets[0]`} from the
   113         *  user's `config.bld`. If `Build.targets` contains more than one entry,
   114         *  then this option can be used to override that default.
   115         */
   116        @CommandOption("t")
   117        config String target = null;
   118
   119        /*!
   120         *  Root directory of the code generation tools
   121         *
   122         *  The path to the installation directory of the compiler and linker
   123         *  for the selected target. The definition of "installation directory"
   124         *  can vary from compiler to compiler, but is most commonly the
   125         *  directory that contains a "bin" subdirectory.
   126         *
   127         *  If no `config.bld` file is given, then this is a required
   128         *  parameter.
   129         *
   130         *  If a `config.bld` file is given then this parameter is optional,
   131         *  and by default the compiler will be the one configured there.
   132         *  This option can still be used, to override the default established
   133         *  in `config.bld`.
   134         */
   135        @CommandOption("c")
   136        config String rootdir = null;
   137
   138        /*!
   139         *  Name of the RTSC platform package (and optionally instance)
   140         *
   141         *  The name of a RTSC platform package to use, using the syntax
   142         *  `my.pkg.name` or `my.pkg.name:instanceName`. For example,
   143         *  `ti.platforms.sim64Pxx` or `ti.platforms.generic:custom`.
   144         *
   145         *  This is an optional parameter, and by default the platform is
   146         *  the one that the selected target names as its default. The user
   147         *  may override this default in their `config.bld` or by using this
   148         *  parameter.
   149         *
   150         *  The optional `:instanceName` suffix names a pre-configured variant
   151         *  of the platform, which can be set up either in the user's
   152         *  `config.bld` or in the platform package itself. For more details, see
   153         *  {@link xdc.bld.BuildEnvironment#platformTable `Build.platformTable`}
   154         *  and the {@link xdc.platform.IPlatform `IPlatform`} interface.
   155         */
   156        @CommandOption("p")
   157        config String platform = null;
   158
   159        /*!
   160         *  Build profile to use
   161         *
   162         *  The name of the build profile to use for the RTSC content, for
   163         *  example 'release' or 'debug'. The list of allowed profiles is
   164         *  determined by the RTSC target module named.
   165         */
   166        @CommandOption("r")
   167        config String profile = 'release';
   168
   169        /*!
   170         *  Read build environment from the named `config.bld` file
   171         *
   172         *  A `config.bld` file can optionally be used to hold the values
   173         *  of the target, compiler root directory, platform, and other
   174         *  more advanced options. This is a convenient way to share a common
   175         *  build environment between multiple projects.
   176         *
   177         *  The format of the file is JavaScript statements with the XDCscript
   178         *  extensions. The script should set the properties of the
   179         *  {@link xdc.bld.BuildEnvironment `Build`} global object.
   180         *
   181         *  If no `config.bld` file is given then the target and compiler
   182         *  root directory are required command-line parameters.
   183         */
   184        @CommandOption("b")
   185        config String configbld = null;
   186
   187        /*!
   188         *  Use a `config.bld` found along the package path
   189         *
   190         *  Find a `config.bld` by searching the package path, instead of
   191         *  via an explicit pathname. Looks for a file named `config.bld` in
   192         *  any of the directories named along the package path, in order. The
   193         *  directories are not searched recursively.
   194         */
   195        @CommandOption("cb")
   196        config Bool searchForConfigBld = false;
   197
   198        /*!
   199         *  Set a Java property in the configuration script
   200         *
   201         *  Allows values to be injected from the command line into the
   202         *  `config.bld` file. For example, the option `-Dmyprop=myval`
   203         *  creates a property named `myprop` with string value `"myval"`.
   204         *  This can be read in `config.bld` using the XDCscript syntax
   205         *  `environment["myprop"]`.
   206         */
   207        @CommandOption("D")
   208        config String defines[] = [];
   209
   210        /*!
   211         *  Set the name of the RTSC runtime package
   212         *
   213         *  The name of a package containing pre-built libraries containing
   214         *  the {@link xdc.runtime} modules.  If this parameter is `null` (or
   215         *  `undefined`) the name of the rts package is taken from the target
   216         *  (`{@link xdc.bld.ITarget#rtsName}`).  If this parameter is set to
   217         *  the empty string (""), then no rts package is included in the
   218         *  configuration.  Finally, if this parameter is non-`null` and
   219         *  non-empty, it should be the name of a package along the package
   220         *  path that can supply pre-built versions of the modules in the
   221         *  `{@link xdc.runtime}` package.
   222         *
   223         *  @see xdc.bld.ITarget#rtsName
   224         *  @see xdc.bld.Executable#Attrs
   225         */
   226        @CommandOption("rtsName")
   227        config String rtsName = null;
   228
   229        /*!
   230         *  ======== cfgArgs ========
   231         *  Optional arguments passed to configuration script
   232         *
   233         *  This option lets the user pass values into the configuration script
   234         *  from the command line. The argument is an expression in JavaScript
   235         *  syntax.  Its value is available in the configuration script under the
   236         *  name `Program.build.cfgArgs`.
   237         *
   238         *  The JavaScript expression is evaluated in the configuration domain
   239         *  after the platform package is imported, immediately before calling
   240         *  the user's configuration script.
   241         *
   242         *  This string has the same effect as the `cfgArgs` string in
   243         *  `{@link xdc.bld.Executable#Attrs}`.
   244         *
   245         *  You can pass multiple values to configuration scripts using the
   246         *  syntax of a JavaScript `Object` constant:
   247         *  @p(code)
   248         *      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ... app.cfg
   249         *  @p
   250         *
   251         *  The configuration script can read the various fields as, e.g.:
   252         *  @p(code)
   253         *      if (Program.build.cfgArgs.foo == "hello") {
   254         *          :
   255         *      }
   256         *  @p
   257         *
   258         *  @a(Note)
   259         *  Different command line shells, such as UNIX `bash` verses Windows
   260         *  `cmd.exe`, interpret quotes on the command line very differently.
   261         *  As a result, the syntax necessary to pass a string such as "hello"
   262         *  to `configuro` can vary depending on the shell you use.
   263         *
   264         *  For most UNIX shells, it is possible to use single quotes around the
   265         *  use of double quotes as in the example above.  However, since Windows
   266         *  `cmd.exe` does not treat the single quote as a special character, it
   267         *  is necessary to use a backslash, '\', to ensure that the double quote
   268         *  characters are passed to the configuro tool.
   269         *
   270         *  Windows `cmd.exe`:
   271         *  @p(code)
   272         *      xs xdc.tools.configuro --cfgArgs "{foo:\"hello\", bar:2}" ...
   273         *  @p
   274         *
   275         *  UNIX `bash`, `ksh`, `csh`, ...:
   276         *  @p(code)
   277         *      xs xdc.tools.configuro --cfgArgs '{foo:"hello", bar:2}' ...
   278         *  @p
   279         *
   280         *  @see xdc.bld.Executable#Attrs
   281         */
   282        @CommandOption("cfgArgs")
   283        config String cfgArgs = null;
   284
   285        /*!
   286         *  Linker command file template
   287         *
   288         *  If this option is provided it overrides the template supplied by
   289         *  the platform, giving the caller complete control over the generated
   290         *  linker command file.
   291         *
   292         *  @see xdc.cfg.Program#linkTemplate
   293         */
   294        @CommandOption("linkTemplate")
   295        config String linkTemplate = null;
   296
   297        /*!
   298         *  Show verbose details during build
   299         *
   300         *  This option produces the same verbose output as the `xdc` command
   301         *  with the `XDCOPTIONS=v` parameter.
   302         */
   303        @CommandOption("v")
   304        config Bool verbose = false;
   305
   306        /*!
   307         *  Minimize details during build
   308         *
   309         *  This option produces the same output as the `xdc` command
   310         *  with the `XDCOPTIONS=qq` parameter.
   311         */
   312        @CommandOption("q")
   313        config Bool quiet = false;
   314
   315        /*!
   316         *  Exclude packages matching regexp from compatibility checking
   317         *
   318         *  A JavaScript regular expression that is used to select packages that
   319         *  should be excluded from the set of packages checked during
   320         *  configuration.
   321         *
   322         *  @see xdc.cfg
   323         */
   324        @CommandOption("x")
   325        config String exclude = null;
   326
   327        /*!
   328         *  Treat package version incompatibilites as warnings
   329         *
   330         *  If set to "`true`", force any incompatibilities detected to be
   331         *  treated as warnings only; otherwise incompatibilities are fatal.
   332         *
   333         *  @see xdc.cfg
   334         */
   335        @CommandOption("w")
   336        config Bool warn = false;
   337
   338        /*!
   339         *  Create the build model generated output files but do not build
   340         *
   341         *  This option creates the output directory and key generated files
   342         *  but does not process the user's configuration script. It is used
   343         *  by internal tooling to snapshot the RTSC build settings implied by
   344         *  the configuro command line parameters.
   345         */
   346        @CommandOption("pkg")
   347        config Bool mkPkgOnly = false;
   348
   349        /*!
   350         *  Create the configuration generated source files but do not build
   351         *
   352         *  This option runs the configuration step but does not compile the
   353         *  generated source files.  This option is used
   354         *  by internal tooling to eliminate unnecessary build steps.
   355         */
   356        @CommandOption("generationOnly")
   357        config Bool generationOnly = false;
   358
   359        /*!
   360         *  Add compile options for C files in the configuration package
   361         *
   362         *  This option accepts one or more compiler options that are added to
   363         *  the compiler command line when compiling C files in the generated
   364         *  configuration package.
   365         *  If multiple compiler options are given, the whole string containing
   366         *  options must be surrounded by quotes.
   367         */
   368        @CommandOption("compileOptions")
   369        config String compileOptions = "";
   370
   371        /*!
   372         *  Add linker options for libraries in the configuration package
   373         *
   374         *  This option accepts one or more linker options which are used to
   375         *  pull in the correct libraries during link.
   376         *  If multiple linker options are given, the whole string containing
   377         *  options must be surrounded by quotes.
   378         */
   379        @CommandOption("linkOptions")
   380        config String linkOptions = "";
   381
   382        /*!
   383         *  Set the name of the compiler options file (default is "compiler.opt")
   384         */
   385        @CommandOption("oc")
   386        config String compilerOptionsFile = "compiler.opt";
   387
   388        /*!
   389         *  Set the name of the linker command file (default is "linker.cmd")
   390         */
   391        @CommandOption("ol")
   392        config String linkerCommandFile = "linker.cmd";
   393
   394        /*!
   395         *  Generate and build the configuration package
   396         */
   397        int gen(String infile);
   398    }


package xdc.tools.configuro

     1    /* --COPYRIGHT--,EPL
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * --/COPYRIGHT--*/
    12    requires xdc.tools.mkpkg;
    13
    14    /*
    15     *  ======== xdc.tools.configuro ========
    16     *  Command-line configuration tool
    17     */
    18    package xdc.tools.configuro [1, 0, 0] {
    19        module Main;
    20    }


module xdc.tools.path.Main

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.tools.path;
    13
    14    /*!
    15     *  ======== xdc.tools.path.Main ========
    16     *  Package Repository Path Display Tool
    17     *
    18     *  This tool displays the packages located along the specified package
    19     *  repository path.  Repositories can be specified by explicitly naming
    20     *  them via the `-Pr` option or implicitly by not passing `-Pr`; in
    21     *  this case, the set of repositories searched corresponds to the set of
    22     *  repositories defined by the current package path:
    23     *  @p(code)
    24     *      $XDCPATH;$XDCROOT/packages;^
    25     *  @p
    26     *
    27     *  where `$XDCPATH` is the value of the the user settable prefix of
    28     *  the package path, `$XDCROOT` is the installation directory of the
    29     *  XDC tools, and `^` is the repository of the package in the current
    30     *  working directory (if it exists).
    31     *
    32     *  @a(Examples)
    33     *
    34     *    1. To display information about the packages on the package path
    35     *    (in this example, the package path is just `C:/xdc-o00/packages`):
    36     *  @p(code)
    37     *    xs xdc.tools.path
    38     *  @p
    39     *
    40     *    Output:
    41     *  @p(code)
    42     *    Package Name:      gnu.gdb.jserver
    43     *    Repository:        C:/xdc-o00/packages
    44     *    Release Name:      gnu_gdb_jserver
    45     *    Label:             default
    46     *    Compatibility Key: 1, 0, 0, 0, 87
    47     *    Date:              11/20/2006  20:38
    48     *
    49     *    Package Name:      gnu.targets
    50     *    Repository:        C:/xdc-o00/packages
    51     *    Release Name:      gnu_targets
    52     *    Label:             default
    53     *    Compatibility Key: 1, 0, 0, 0, 194
    54     *    Date:              11/20/2006  20:38
    55     *
    56     *  @p
    57     *
    58     *    2. To display the names of the packages on the package path
    59     *    (in this example, the package path is just `C:/xdc-o00/packages`):
    60     *  @p(code)
    61     *    xs xdc.tools.path -n
    62     *  @p
    63     *
    64     *    Output:
    65     *  @p(code)
    66     *    gnu.gdb.jserver
    67     *    gnu.targets
    68     *    gnu.targets.rts470MV
    69     *    gnu.targets.rts470uC
    70     *    gnu.targets.rts5
    71     *
    72     *  @p
    73     *
    74     *    3. To simply, echo the current package path:
    75     *  @p(code)
    76     *    xs xdc.tools.path -p
    77     *  @p
    78     *
    79     *    Output:
    80     *  @p(code)
    81     *    C:/xdc-o00/packages
    82     *  @p
    83     *
    84     *    4. To display information about the packages "rooted" in the repository
    85     *    `C:/CCStudio_v3.3/bios_5_31/packages`:
    86     *  @p(code)
    87     *    xs xdc.tools.path -Pr C:/CCStudio_v3.3/bios_5_31/packages
    88     *  @p
    89     *
    90     *    Output:
    91     *  @p(code)
    92     *    Package Name:      ti.platforms.dsk5402
    93     *    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
    94     *    Release Name:      ti_platforms_dsk5402
    95     *    Label:             default
    96     *    Compatibility Key: 1, 0, 0, 24
    97     *    Date:              05/11/2006  19:10
    98     *
    99     *    Package Name:      ti.platforms.dsk5416
   100     *    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
   101     *    Release Name:      ti_platforms_dsk5416
   102     *    Label:             default
   103     *    Compatibility Key: 1, 0, 0, 24
   104     *    Date:              05/11/2006  19:10
   105     *
   106     *    Package Name:      ti.platforms.dsk5510
   107     *    Repository:        C:/CCStudio_v3.3/bios_5_31/packages
   108     *    Release Name:      ti_platforms_dsk5510
   109     *    Label:             default
   110     *    Compatibility Key: 1, 0, 0, 24
   111     *    Date:              05/11/2006  19:10
   112     *
   113     *  @p
   114     *
   115     *    5. To display the names of all packages in or below the directory
   116     *    `C:/CCStudio_v3.3/bios_5_31/packages`:
   117     *  @p(code)
   118     *    xs xdc.tools.path -n -PR C:/CCStudio_v3.3/bios_5_31/packages
   119     *  @p
   120     *
   121     *    Output:
   122     *  @p(code)
   123     *    ti.platforms.dsk5402
   124     *    ti.platforms.dsk5416
   125     *    ti.platforms.dsk5510
   126     *    ti.platforms.dsk6211
   127     *
   128     *  @p
   129     *
   130     *  @see xdc.tools.path
   131     */
   132    metaonly module Main inherits xdc.tools.ICmd {
   133
   134        override config String usage[] = [
   135           '[-n] [-x] [-v] [-H header] [-p] [-c] [-P package_base_dir ...|-Pr repository ...|-PR directory ...]'
   136        ];
   137
   138        /*!
   139         *  ======== Pkg ========
   140         *  struct used for xml package info
   141         */
   142        @XmlDtd
   143        metaonly struct Pkg {
   144            String name;
   145            String repository;
   146            String release;
   147            String label;
   148            String key;
   149            String date;
   150            String providerId;
   151            String originalProviderId;
   152            String producerId;
   153        }
   154
   155        @XmlDtd
   156        metaonly struct CheckResults {
   157            String repository;
   158            String warnings[];
   159        }
   160
   161        /*!
   162         *  ======== Results ========
   163         *  return value for xml package info
   164         */
   165        @XmlDtd
   166        metaonly struct Results {
   167            String header;     /*! user-specified header */
   168            String path;       /*! package path */
   169            Pkg pkg[];         /*! array of packages */
   170            CheckResults checkResults[];
   171        }
   172
   173        /*!
   174         *  ======== NameResults ========
   175         *  return value for xml package names
   176         */
   177        @XmlDtd
   178        metaonly struct NameResults {
   179            String header;     /*! user-specified header */
   180            String path;       /*! package path */
   181            String name[];     /*! array of names */
   182            CheckResults checkResults[];
   183        }
   184
   185        /*!
   186         *  ======== PathResults ========
   187         *  return value for xml package path
   188         */
   189        @XmlDtd
   190        metaonly struct PathResults {
   191            String header;     /*! user-specified header */
   192            String path;       /*! package path */
   193            CheckResults checkResults[];
   194        }
   195
   196        /*!
   197         *  ======== DirResults ========
   198         *  return value for xml directory echo
   199         */
   200        @XmlDtd
   201        metaonly struct DirResults {
   202            String header;     /*! user-specified header */
   203            String dir[];      /*! array of package base directories */
   204            CheckResults checkResults[];
   205        }
   206
   207    instance:
   208
   209        /*!
   210         * Echo path
   211         */
   212        @CommandOption('p')
   213        config Bool pathFlag = false;
   214
   215        /*!
   216         * Display package names only
   217         */
   218        @CommandOption('n')
   219        config Bool shortFlag = false;
   220
   221        /*!
   222         * Return an array of strings
   223         */
   224        @CommandOption('a')
   225        config Bool arrFlag = false;
   226
   227        /*!
   228         * Return a Results struct as XML
   229         */
   230        @CommandOption('x')
   231        config Bool xmlFlag = false;
   232
   233        /*!
   234         * Print informative messages during execution
   235         */
   236        @CommandOption('v')
   237        config Bool verboseFlag = false;
   238
   239        /*!
   240         * Header label
   241         */
   242        @CommandOption('H')
   243        config String header = null;
   244
   245        /*!
   246         * Use specified directory args instead of xdc.path
   247         */
   248        @CommandOption('-Pr,d')
   249        config Bool repositoriesFlag = false;
   250
   251        /*!
   252         * Recursively find all packages
   253         *
   254         * Recursively descend into specified directories and find every
   255         * package, including packages whose repository is not one of
   256         * the specified directories.
   257         */
   258        @CommandOption('-PR')
   259        config Bool recurseFlag = false;
   260
   261        /*!
   262         * Only display information for the package directories
   263         */
   264        @CommandOption('-P')
   265        config Bool directoriesFlag = false;
   266
   267        /*!
   268         * Check repositories for possible errors
   269         */
   270        @CommandOption('c,--checkpath')
   271        config Bool checkFlag = false;
   272
   273    }
   274
   275    /*
   276     *  @(#) xdc.tools.path; 1, 0, 0,0; 1-9-2017 12:51:40; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   277     */
   278


package xdc.tools.path

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.tools;
    13
    14    /*
    15     *  ======== xdc.tools.path ========
    16     *  Package Repository Path Display Tool
    17     */
    18    package xdc.tools.path [1, 0, 0] {
    19        module Main;    /* the main entry point to the path tool itself */
    20    }
    21
    22    /*
    23     *  @(#) xdc.tools.path; 1, 0, 0,0; 1-9-2017 12:51:40; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    24     */
    25


module xdc.tools.path.sg.Main

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== Main ========
    14     *  Graphical interface to path tool
    15     *
    16     *  This graphical interactive tool displays the packages located along any
    17     *  specified package repository path.
    18     *
    19     *  At startup, this tool shows the packages located along the current package
    20     *  path; i.e.,
    21     *  @p(code)
    22     *      $XDCPATH;$XDCROOT/packages;^
    23     *  @p
    24     *
    25     *  where `$XDCPATH` is the value of the the user settable prefix of the
    26     *  package path, `$XDCROOT` is the installation directory of the XDC tools,
    27     *  and `^` is the repository of the package in the current working directory
    28     *  (if it exists). To specify a package path other than the current package
    29     *  path, use the --packagepath option. Only semicolon delimited canonical
    30     *  paths should be specifed as arguments with the --packagepath option.
    31     *  Environment variables such as $XDCROOT and special designators such as
    32     *  '^' should not be used.
    33     *
    34     *  @b(Usage)
    35     *  @p(code)
    36     *    xs xdc.tools.path.sg [--packagepath PATH]
    37     *  @p
    38     *
    39     *  @a(Bugs)
    40     *
    41     *  This tool scans all packages available along the current
    42     *  package path before displaying the user interface.  So, a repository in
    43     *  the package path that contains a large number of sub-directories, such
    44     *  as '/', causes very long delays before the user interface is displayed.
    45     *
    46     *  While it is easy to see that you should not put '/' in the package path,
    47     *  it is less obvious that installing a package at '/' has the same effect.
    48     */
    49    metaonly module Main inherits xdc.tools.ICmd {
    50
    51        override config String usage[] = [
    52           '[--packagepath PATH]'
    53        ];
    54
    55        /*!
    56         *  ======== createPartControl ========
    57         *  @_nodoc
    58         */
    59        function createPartControl(parent);
    60
    61    instance:
    62
    63        //! package path to scan for packages
    64        @CommandOption('packagepath')
    65        config string pathArg = null;
    66
    67    }
    68    /*
    69     *  @(#) xdc.tools.path.sg; 1, 0, 0,0; 1-9-2017 12:51:42; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    70     */
    71


package xdc.tools.path.sg

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.tools.sg;
    13    requires xdc.tools.path;
    14    requires xdc.tools.sg.widgets;
    15
    16    /*
    17     *  ======== xdc.tools.path.sg ========
    18     *  Graphical front-end to the path tool
    19     */
    20    package xdc.tools.path.sg [1, 0, 0]
    21    {
    22        module Main;
    23    }
    24    /*
    25     *  @(#) xdc.tools.path.sg; 1, 0, 0,0; 1-9-2017 12:51:42; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    26     */
    27


interface xdc.tools.product.IProduct

     1    /*
     2     *  Copyright (c) 2009 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== IProduct ========
    15     *  Interface specifying product details.
    16     *
    17     *  This interface allows products describe themselves for the benefit
    18     *  of development tools such as IDE's.  For example, a tool
    19     *  can read the information provided by a product that implements this
    20     *  interface and generate an eclipse plugin that leverages the product's
    21     *  "resources".
    22     *
    23     *  By expressing the product's information in this interface, a product
    24     *  can be delivered into multiple development tools without explicit
    25     *  knowledge of these tools.  For example, an online "product repository"
    26     *  can extract sufficient information from this interface to enable it
    27     *  to provide a searchable catalog of interesting products.
    28     *
    29     *  This is an experimental interface and is subject to change
    30     */
    31    metaonly interface IProduct
    32    {
    33        /*!
    34         *  ======== HelpToc ========
    35         *  Help table of contents (TOC) element
    36         *
    37         *  A help TOC element defines a file, URL, or a secondary table of
    38         *  contents that is referenced from a global table of contents.
    39         *
    40         *  @field(label)    Summary description of help element which
    41         *                   is displayed in the global table of contents.
    42         *  @field(filePath) Relative path to help documentation file or a
    43         *                   secondary table of contents file or a URL. Relative
    44         *                   paths are relative to the directories specified in
    45         *                   {@link #docsLocArr}; files are searched for, in
    46         *                   order, within each directory and the first file
    47         *                   found that matches the name is used.
    48         *  @field(tocFile)  Flag indicates whether the element is a
    49         *                   table of contents (TOC) file. Tools may
    50         *                   process TOC files in a special way. For
    51         *                   example, a tool to generate eclipse plugins
    52         *                   must copy the TOC file to the plugin folder
    53         *                   for integrating with eclipse help.
    54         */
    55        struct HelpToc {
    56            String label;       /*! Help element description */
    57            String filePath;    /*! Path to help doc */
    58            Bool   tocFile;     /*! Indicates whether element is a TOC file  */
    59        };
    60
    61        /*!
    62         *  ========= Target ==============
    63         *  Structure containing information on RTSC targets
    64         *
    65         *  Products specify the mapping between device names and/or device
    66         *  family names and a RTSC target module in a JSON file located in the
    67         *  product itself. The field `sourceFile` contains the file name including
    68         *  the path relative to the top directory of the product.
    69         *
    70         *  The content of the file is read whenever a product is used in a project
    71         *  and the information from the file is leveraged by tools to derive an
    72         *  appropriate RTSC target when given a device name, device family,
    73         *  endiness, and OMF selection (COFF verses ELF).
    74         *
    75         *  The JSON file contains objects, and each object is matched against the
    76         *  device and build options selected for a particular project. If all
    77         *  object attributes, except for the target specification, are matched by
    78         *  supplied options, the target represented by the object is returned.
    79         *  Objects are matched against the options in the order they are listed in
    80         *  the JSON file. As soon as a match is found, the search stops.
    81         *
    82         *  Currently used object attributes that are matched against build options
    83         *  are `deviceFamily`, `deviceName`, `deviceVariant`, `endianness` and
    84         *  `elf`. Object attributes that specify a target are `packageName` and
    85         *  `baseTargetName`, where `packageName` is the name of a package that
    86         *  contains targets, while `baseTargetName` is a name of a target module
    87         *  in that package.
    88         *
    89         *  In particular, if the device name and family name selected for a project
    90         *  match `deviceNamePattern` and `deviceFamilyPattern` in an object, the
    91         *  target name generated will be:
    92         *  @p(code)
    93         *      <packageName>[.elf].<baseTargetName>[_big_endian]
    94         *  @p
    95         *  The strings ".elf" and "_big_endian" are added if the corresponding
    96         *  project options are specified.
    97         *
    98         *  Suppose, for example, a product specifies the following target mapping:
    99         *  @p(code)
   100         *  {
   101         *      deviceName:          "MSP430F5.*",
   102         *      deviceFamily:        "MSP430.*",
   103         *      packageName:         "ti.targets.msp430",
   104         *      baseTargetName:      "MSP430X"
   105         *  }
   106         *  @p
   107         *  If the device specified is "`MSP430F5529`", the family is "`MSP430`",
   108         *  and the OMF is COFF, the generated target will be:
   109         *  @p(code)
   110         *      ti.targets.msp430.MSP430X
   111         *  @p
   112         *  On the other hand, if the OMF is ELF the target will be:
   113         *  @p(code)
   114         *      ti.targets.msp430.elf.MSP430X
   115         *  @p
   116         *
   117         *  @field(sourceFile)          The path to a file that defines the mapping
   118         *                              in a JSON file
   119         */
   120        struct Target {
   121            String sourceFile;          /*! Name of a file with target mapping */
   122        };
   123
   124        /*!
   125         *  ======== UrlDescriptor ========
   126         *  URL Descriptor structure
   127         *
   128         *  @field(url)         Uniform Resource Locator(URL)
   129         *  @field(text)        Summary text for the URL
   130         *  @field(targetText)  Optional summary text for any target content
   131         *                      portion
   132         */
   133        struct UrlDescriptor {
   134            String url;         /*! Uniform Resource Locator(URL) */
   135            String text;        /*! Summary text for the URL */
   136            String targetText;  /*! (optional) Summary for target portion */
   137        };
   138
   139        /*!
   140         *  ======== PluginDescriptor ========
   141         *  Plugin Descriptor structure
   142         *
   143         *  @field(id)      Plugin id
   144         *  @field(version) Plugin version
   145         *  @field(path)    Path to plugin relative to `IProduct` implementation
   146         */
   147        struct PluginDescriptor {
   148            String id;          /*! Plugin id */
   149            String version;     /*! Plugin version */
   150            String path;        /*! Plugin path */
   151        };
   152
   153        /*!
   154         *  ======== MacroDescriptor ========
   155         *  Macro Descriptor structure
   156         */
   157        struct MacroDescriptor {
   158            String name;     /*! Macro name */
   159            String desc;     /*! Macro description */
   160        };
   161
   162        /*!
   163         *  ======== name ========
   164         *  Product name
   165         *
   166         *  String containing product name eg. System BIOS
   167         */
   168        config String name;
   169
   170        /*!
   171         *  ======== id ========
   172         *  A unique product id
   173         *
   174         *  For example, product developers may choose to  follow namespace
   175         *  conventions for Java packages or Eclipse plugins to specify a
   176         *  unique id like `org.eclipse.rtsc.xdctools.product`.
   177         */
   178        config String id;
   179
   180        /*!
   181         *  ======== version ========
   182         *  Product version
   183         *
   184         *  The product version should follow the format
   185         *  -`major.minor.service.qualifier`  where
   186         *  `major`,`minor` and `service` are integers and
   187         *  `qualifier` is a string. Example - 3.16.02.31-eng.
   188         *
   189         *  Products may  specify their own guidelines for
   190         *  updating `major`,`minor`,`service` and `qualifier` portions of the
   191         *  version number as long as they are unique for the product.
   192         *  Products may also choose to follow popular versioning conventions
   193         *  like those followed for versioning Eclipse plugins.
   194         */
   195        config String version;
   196
   197        /*!
   198         *  ======== featureId ========
   199         *  A unique feature id
   200         *
   201         *  @_nodoc - Deprecated
   202         *
   203         *  Feature ids are used by a system to install product upgrades.
   204         *  Typically a system will look at various versions of a
   205         *  feature available in the system and allow the user to upgrade
   206         *  to the latest version. The product developer can use the `featureId`
   207         *  to manage the granularity of product upgrades in a system. For
   208         *  example the version `3.20.0.00` for product
   209         *  `org.eclipse.rtsc.xdctools.product` may have the `featureId`
   210         *  `org.eclipse.rtsc.xdctools.product_3.20`.
   211         *  The product developer may allow the upgrade system to pick up
   212         *  patch releases to `3.20.0.00` release by specifying different
   213         *  versions of the product (eg. 3.20.0.01) with `featureId`
   214         *  `org.eclipse.rtsc.xdctools.product_3.20`
   215         */
   216        config String featureId;
   217
   218        /*!
   219         *  ======== updateSite ========
   220         *  Update site for product
   221         *
   222         *  @field(url) the `url` field should contain the URL containing
   223         *  product upgrades.
   224         *
   225         *  @field(text) the `text` field should contain summary description of
   226         *  the update site
   227         */
   228        config  UrlDescriptor updateSite;
   229
   230        /*!
   231         *  ======== companyName ========
   232         *  Name of company releasing product
   233         *
   234         *  Example : "Texas Instruments"
   235         */
   236        config String companyName;
   237
   238        /*!
   239         *  ======== productDescriptor ========
   240         *  Product description
   241         *
   242         *  @field(url) the `url` field should contain a product-specific "home"
   243         *  page URL or, if there is none, the URL of organization
   244         *  releasing the product.
   245         *
   246         *  @field(text) the `text` field should contain summary description of
   247         *  the target content portion of the product.
   248         */
   249        config UrlDescriptor productDescriptor;
   250
   251        /*!
   252         *  ======== licenseDescriptor ========
   253         *  License information for product
   254         *
   255         *  @field(url) field should contain the URL containing the
   256         *  license text.
   257         *
   258         *  @field(text) field should contain a summary description of the license
   259         */
   260        config UrlDescriptor licenseDescriptor;
   261
   262        /*!
   263         *  ======== copyRightNotice ========
   264         *  Copyright notice for product
   265         */
   266        config String copyRightNotice;
   267
   268        /*!
   269         *  ======== repositoryArr ========
   270         *  Repositories contained in the product
   271         *
   272         *  Repositories are specified relative to the product installation
   273         *  directory.
   274         */
   275        config String repositoryArr[];
   276
   277        /*!
   278         *  ======== docsLocArr ========
   279         *  Directories containing documents in the product
   280         *
   281         *  Directories are specified relative to the product installation
   282         *  directory.  These directories are searched when resolving URI links
   283         *  to specific pages within the docs.
   284         */
   285        config String docsLocArr[];
   286
   287        /*!
   288         *  ======== templateModule ========
   289         *  Name of module implementing {@link xdc.tools.product.IProductTemplate}
   290         *
   291         *  Products that deliver examples provide a module that implements the
   292         *  {@link xdc.tools.product.IProductTemplate} interface.  This module
   293         *  must be delivered in one of the repositories defined in
   294         *  {@link #repositoryArr}.
   295         */
   296        config String templateModule;
   297
   298        /*!
   299         *  ======== productViewModule ========
   300         *  Name of module implementing {@link xdc.tools.product.IProductView}
   301         *
   302         *  Products must provide a module that implements the
   303         *  {@link xdc.tools.product.IProductView} interface.  This
   304         *  module defines the "top-level" modules that are visible to the user
   305         *  and must be delivered in the repositories defined in
   306         *  {@link #repositoryArr}.
   307         */
   308        config String productViewModule;
   309
   310        /*!
   311         *  ======== bundleName ========
   312         *  Product bundle name
   313         *
   314         *  Product bundle name is embedded in the top level folder name of
   315         *  the product. Example: The top level folder for XDCtools version
   316         *  3.16.02.31-eng is `xdctools_3_16_02_31-eng`. In this case the
   317         *  bundle name is `xdctools`.
   318         *  The bundle name is used by tools to discover the product
   319         *  installed on a filesystem.
   320         */
   321        config String bundleName;
   322
   323        /*!
   324         *  ======== targetFile ========
   325         *  File with available RTSC target modules
   326         *
   327         *  The RTSC target modules should be delivered
   328         *  in the repositories defined in {@link #repositoryArr}
   329         */
   330        config Target targetFile;
   331
   332        /*!
   333         *  ======== platformSourceFile ========
   334         *  File with available RTSC platforms
   335         *
   336         *  This parameter points to a JSON file that contains names of platform
   337         *  packages, and project properties that must be matched for a specific
   338         *  platform to be selected.
   339         *  The file path is relative to the top directory of the product.
   340         *  The RTSC platforms should be delivered in the repositories defined in
   341         *  {@link #repositoryArr}
   342         */
   343        config String platformSourceFile;
   344
   345        /*!
   346         *  ======== helpTocArr ========
   347         *  Array of table of contents elements in product
   348         *
   349         *  Tools generating table of contents are required
   350         *  to preserve the order of elements specified in this array.
   351         */
   352        config HelpToc helpTocArr[];
   353
   354        /*!
   355         *  ======== tocIndexFile ========
   356         *  Top level help index file
   357         *
   358         *  In eclipse help, for example, this file is displayed when the
   359         *  product's top-level entry is selected in eclipse's help table of
   360         *  contents.  If this file is not provided a very basic list of links
   361         *  to the entries listed in `@{link #helpTocArr}` is displayed.
   362         */
   363        config String tocIndexFile;
   364
   365        /*!
   366         *  ======== icon ========
   367         *  Icon to be displayed alongside the product description
   368         *
   369         *  In TIREX, this file is used in the top page, where all products are
   370         *  listed, with their icons and names under icons.
   371         */
   372        config String icon;
   373
   374        /*!
   375         *  ======== exclusive ========
   376         *  This product is a singleton
   377         *
   378         *  This flag indicates whether multiple versions of this product are
   379         *  accessable within the IDE or whether only the latest version is
   380         *  available.
   381         *
   382         *  When flag is set to `true` it indicates that only one
   383         *  version of the product can be active in the system. Otherwise
   384         *  the system can handle multiple versions of the same product.
   385         */
   386        config Bool exclusive = false;
   387
   388        /*!
   389         *  ======== otherFiles ========
   390         *  Array of paths to files or directories to copy into the product
   391         *
   392         *  A product may need to contain "arbitrary" files important to its
   393         *  operation. For example a product may provide text, images and video
   394         *  files that provide templates or branding information for the product.
   395         *  These files may then be consumed by tools like IDE's via
   396         *  hooks defined in the IDE framework.
   397         *
   398         *  The source file path is defined relative to the directory containing
   399         *  the implementation  of `IProduct`.  All files or directories are
   400         *  copied to the base directory of the plugin; e.g.,
   401         *  "../branding/about.ini" is copied to "about.ini" at the top of the
   402         *  plugin.
   403         *
   404         *  Path names that begin with the prefix "tc:" are copied into "target
   405         *  content" plugin whereas path names with any other prefix (such as
   406         *  "ui:" or no prefix) are copied into the "IDE plugin".
   407         */
   408        config String otherFiles[];
   409
   410        /*!
   411         *  ======== macro ========
   412         *  Macro associated with the product
   413         *
   414         *  Product macros are often used in IDEs for providing
   415         *  portable build environments. A unique macro name should
   416         *  be selected for the product.
   417         */
   418        config MacroDescriptor macro;
   419
   420        /*!
   421         *  ======== externalPlugins ========
   422         *  External plugins delivered with the product
   423         */
   424        config PluginDescriptor externalPlugins[];
   425
   426        /*!
   427         *  ======== externalRequirements ========
   428         *  External plugins required by this product
   429         */
   430        config String externalRequirements[];
   431
   432        /*!
   433         *  ======== projectSpecPath ========
   434         *  Directory containing project spec files
   435         *
   436         *  This path is relative to the product install location.
   437         */
   438        config String projectSpecPath = "resources";
   439    }
   440    /*
   441     *  @(#) xdc.tools.product; 1, 0, 0,0; 1-9-2017 12:51:47; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   442     */
   443


interface xdc.tools.product.IProductTemplate

     1    /*
     2     *  Copyright (c) 2009 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.tools.product;
    13
    14    /*!
    15     *  ======== IProductTemplate ========
    16     *  Interface to provide examples for a product
    17     *
    18     *  This interface allows products to contribute examples to
    19     *  development environments like IDE's. This is an experimental
    20     *  interface and is subject to change.
    21     */
    22    metaonly interface IProductTemplate
    23    {
    24        /*!
    25         *  ======== FileDesc ========
    26         *  Structure defining properties of a file included in an example
    27         *
    28         *  @field(path)                    Path to file or folder relative to the
    29         *                                  package containing the implementation
    30         *                                  of `IProductTemplate`.
    31         *                                  If the path points to a file then the
    32         *                                  file is copied or linked into the
    33         *                                  project.
    34         *                                  If the path points to a directory then
    35         *                                  the entire directory and contents are
    36         *                                  copied into the project.
    37         *  @field(excludeFromBuild)        Flag indicating whether file should be
    38         *                                  excluded from build inside an IDE
    39         *                                  project
    40         *  @field(openOnCreation)          Flag indicating whether the file should
    41         *                                  be opened when a project containing the
    42         *                                  example file is created by the IDE.
    43         *  @field(copyIntoConfiguration)   Flag indicating whether the file should
    44         *                                  be copied into RTSC configuration. This
    45         *                                  flag applies only when the `isHybrid`
    46         *                                  flag of the
    47         *                                  {@link #TemplateInfo template} is set
    48         *                                  to `false`.
    49         *
    50         *  @field(action)                  Flag indicating whether the file
    51         *                                  should be copied into the project or
    52         *                                  linked in.  For example, the
    53         *                                  `{@link xdc.tools.product.trexgen trexgen}`
    54         *                                  tool recognizes the following flags:
    55         *                                  "COPY" - copy the file into the project
    56         *                                  "LINK" - link the file into the project
    57         *
    58         *  @field(targetDirectory)         The file or folder from the `path` field
    59         *                                  will be copied into this target
    60         *                                  directory within the project folder.
    61         */
    62        struct FileDesc {
    63            String path;                    /*! path to file or folder */
    64            Bool   excludeFromBuild;        /*! exclude from build */
    65            Bool   openOnCreation;          /*! open on project creation */
    66            Bool   copyIntoConfiguration;   /*! copy into RTSC configuration */
    67            String action;                  /*! Flag indicating whether the file
    68                                             *  should be copied into the project
    69                                             *  or linked to.
    70                                             */
    71            String   targetDirectory;       /*! directory into which the path
    72                                             *  file/folder should be copied into
    73                                             */
    74        };
    75
    76        /*!
    77         *  ======== Board ========
    78         *  Structure defining properties of a board used in the example
    79         *
    80         *  @field(tirexName)               TIREX on Cloud recognizes board under
    81         *                                  its previously defined name. We have to
    82         *                                  use these names to get the tree
    83         *                                  structure that uses the names.
    84         */
    85        struct Board {
    86            String tiCloudName;               /*! name used in TI Cloud TIREX */
    87        };
    88
    89        /*!
    90         *  ======== Filter ========
    91         *  Structure defining filter properties for an example
    92         *
    93         *  This structure allows products to define constraints for their
    94         *  examples. IDEs use the `Filter` properties of an example
    95         *  to decide whether the example should be presented to the user.
    96         *
    97         *  The filter is evaluated by performing an 'AND' operation on its
    98         *  individual elements. In other words, all the defined elements must
    99         *  evaluate to `true` for the filter to evaluate to `true`.
   100         *
   101         *  Each example typically defines an array of more than one filter;
   102         *  see {@link #TemplateInfo TemplateInfo.filterArr}. This filter array
   103         *  is evaluated using the 'OR' operation.  In other words, the example
   104         *  is presented to the user when any one of the filters evaluate
   105         *  to `true`.
   106         *
   107         *  Each filter property can be an arbitrary Java regular expression.
   108         *  In addition, each allows the user to define the NOT property
   109         *  by inserting a "~" character at the start of the string. For
   110         *  example, if the deviceFamily field is set to "~MSP430", the example
   111         *  will be displayed for all device families except "MSP430".
   112         *
   113         *  @field(deviceFamily)   String indicating the device family
   114         *                         eg. "MSP430","C6000"
   115         *  @field(deviceVariant)  String indicating device variant
   116         *                         eg. "C674X", "CortexA8"
   117         *  @field(deviceId)       String indicating the device part number
   118         *                         eg. "TMS320C6747"
   119         *  @field(endianness)     String indicating the device endianness
   120         *                         eg. "little", "big"
   121         *  @field(toolChain)      String indicating the tool chain
   122         *                         eg. "TI", "GNU"
   123         *  @field(outputFormat)   String indicating the object file format
   124         *                         eg. "COFF", "ELF"
   125         */
   126        struct Filter {
   127            String deviceFamily;
   128            String deviceVariant;
   129            String deviceId;
   130            String endianness;
   131            String toolChain;
   132            String outputFormat;
   133        };
   134
   135        /*!
   136         *  ======== TemplateInfo ========
   137         *  TemplateInfo structure
   138         *
   139         *  @field(title)             String containing the title of the template
   140         *  @field(name)              String containing the name of the project
   141         *                            created from this template
   142         *  @field(fileList)          Array of {@link #FileDesc} defining the
   143         *                            properties of the files contributed by this
   144         *                            example.
   145         *  @field(description)       String containing  description of example
   146         *  @field(target)            String containing RTSC target
   147         *  @field(platform)          String containing RTSC platform
   148         *  @field(buildProfile)      String containing RTSC build profile
   149         *  @field(linkerCommandFile) Linker command file for the example. If
   150         *                            this is set to the empty string then no
   151         *                            linker command file is added by the IDE
   152         *                            to the example. If this is not defined,
   153         *                            then the wizard picks the default
   154         *                            linker command file for the selected device.
   155         *  @field(compilerBuildOptions) Special compiler options required to
   156         *                               build template. For example the template
   157         *                               may need special -I and -D options
   158         *                               to build and these may be specified
   159         *                               here.
   160         *  @field(linkerBuildOptions)   Special linker options to build template
   161         *  @field(requiredProducts)  Products required to build this
   162         *                            example. Products are  identified by
   163         *                            their globally unique
   164         *                            {@link xdc.tools.product.IProduct#id}
   165         *                            eg. 'com.ti.bios'. Dependency on a
   166         *                            minimum version of a product may be
   167         *                            defined in the following manner
   168         *                            : <product-id>:<min-version>
   169         *  @field(xdcToolsVersion)   String containing XDCTools the exact version
   170         *                            required eg. '3.24.6.63'.  Note that this
   171         *                            number must be an 'eclipse' version number:
   172         *                            no leading 0's in the first three segments
   173         *                            and the forth is treated as an arbitrary
   174         *                            string.
   175         *
   176         *                            If this string is `undefined`, any
   177         *                            version of XDCtools will be allowed.
   178         *
   179         *                            If the exact version doesn't exist for some
   180         *                            reason, the project will still be
   181         *                            created, but the project will give a 'this
   182         *                            version of XDCtools doesn't exist' warning.
   183         *                            The user can then select a version that is
   184         *                            hopefully compatible.
   185         *
   186         *  @field(groups)            Array of strings referring example groups
   187         *                            that a particular example may
   188         *                            belong. Products may
   189         *                            provide examples that are part of an
   190         *                            existing example group eg."Empty Projects"
   191         *                            that are defined elsewhere. The
   192         *                            groups are identified by an unique id.
   193         *  @field(configOnly)        Flag indicating to the IDE
   194         *                            whether example contributes only
   195         *                            to a RTSC configuration project.
   196         *  @field(configuroOptions)  This string contains options that are passed
   197         *                            to `xdc.tools.configuro`.  You must be
   198         *                            careful to quote embedded special characters
   199         *                            in this string in such a way that they can
   200         *                            be directly embedded in an XML file.  For
   201         *                            example, to pass '-foo "bar"' to `configuro`
   202         *                            you must use the string
   203         *                            '-foo &quot;bar&quot;'.
   204         *
   205         *  @field(isHybrid)          Flag indicating to the IDE whether example
   206         *                            contains RTSC configuration and target
   207         *                            content files in one project.
   208         *                            If this field is set to `true`, then the IDE
   209         *                            consuming this example will create one project
   210         *                            with all the files. Otherwise, multiple
   211         *                            projects will be created - one containing the
   212         *                            target content and the other containing the
   213         *                            RTSC configuration files. This flag applies
   214         *                            only when `configOnly` flag is set to `false`.
   215         *
   216         *  @field(filterArr)         Array of {@link #Filter}. Used to specify
   217         *                            the constraints for a particular
   218         *                            example. The filter array is evaluated using
   219         *                            an OR operation on the individual array
   220         *                            elements. Note that individual elements
   221         *                            within a {@link #Filter filter} is evaluated
   222         *                            with the 'AND' operation.
   223         *
   224         *  @field(ignoreDefaults)    Property {@link #Filter filter} commonly
   225         *                            specifies a device. Each device has an XML
   226         *                            file with default settings, which are applied
   227         *                            to a project, in addition to properties
   228         *                            specified here. Whe this parameter is set to
   229         *                            'true', these default options are ignored.
   230         *
   231         *  @field(options)           Comma separated list of options used to
   232         *                            specify various configurable items for this
   233         *                            template.  For example, the
   234         *                            `{@link xdc.tools.product.trexgen trexgen}`
   235         *                            tool recognizes the following flags:
   236         *                                "NPW" - display this example in the New
   237         *                                        Project Wizard, and
   238         *                                "TREX" - display this example in the
   239         *                                         Resource Explorer
   240         *
   241         *  @field(references)        Comma separated list of referenced project
   242         *                            names
   243         *
   244         *  @field(buildCommandFlags) Comma separated list of build-command flags.
   245         *
   246         *  @field(launchWizard)      Flag indicating to launch the New Project
   247         *                            wizard allowing the user to adjust the
   248         *                            details.
   249         *
   250         *  @field(preBuildStep)      Shell cmd to run before the build. Cmd is
   251         *                            run within the debug/release directory
   252         *
   253         *  @field(postBuildStep)     Shell cmd to run after the build. Cmd is run
   254         *                            within the debug/release directory
   255         */
   256        struct TemplateInfo {
   257            String   title;              /*! Title of this example */
   258            String   name;               /*! Name of the project imported from
   259                                          *  this template
   260                                          */
   261            FileDesc fileList[];         /*! List of files along with properties
   262                                          *  for this example
   263                                          */
   264            String   description;        /*! Description of this example */
   265            String   target;             /*! RTSC target */
   266            String   platform;           /*! RTSC platform */
   267            Board    board;              /*! Properties of the board */
   268            String   buildProfile;       /*! RTSC build profile */
   269            String   linkerCommandFile;  /*! Linker file for this example */
   270            String   compilerBuildOptions; /*! Special compiler options */
   271            String   linkerBuildOptions; /*! Special linker options */
   272            String   requiredProducts[]; /*! List of products required to build
   273                                          *  this example
   274                                          */
   275            String   xdcToolsVersion;    /*! Version of xdctools this template
   276                                          *  requires eg. '3.24.6.63' */
   277            String   groups[];           /*! Array of group ids for groups
   278                                          * containing this example */
   279            Bool     legacyTcf;          /* obsolete option */
   280            String   configuroOptions;   /*! configuro options */
   281            Bool     configOnly;         /*! Indicates whether only a RTSC
   282                                          *  configuration project should
   283                                          *  be created for this example.
   284                                          */
   285            Bool     isHybrid;           /*! Indicates whether application and
   286                                          * configuration content exists in
   287                                          * one project
   288                                          */
   289            Bool     isFragment;         /*! Indicates whether this template
   290                                          *  can be applied "incrementally"
   291                                          *  to an already existing project
   292                                          */
   293            Filter   filterArr[];        /*! Array of filters for this example */
   294            Bool     ignoreDefaults;     /*! Indicates if settings from the
   295                                          * device XML file are ignored.
   296                                          */
   297            String   options;            /*! Comma separated attributes */
   298            String   references;         /*! Comma separated list of referenced
   299                                          * project names */
   300            String   buildCommandFlags;  /*! Comma seperated list of build-command
   301                                          * flags */
   302            Bool     launchWizard;       /*! Flag indicating to launch the New
   303                                          * Project Wizard allowing the user to
   304                                          * adjust the details */
   305            String   preBuildStep;       /*! Shell cmd to run before the build.
   306                                          * Cmd is run within the debug/release
   307                                          * directory */
   308            String   postBuildStep;      /*! Shell cmd to run after the build. Cmd
   309                                          * is run within the debug/release
   310                                          * directory */
   311            String   projectType;        /*! type of project.  If this field is
   312                                          *  not set, a default will be used that
   313                                          *  is based on other settings.  If it is
   314                                          *  set to "ccs", the project will be a
   315                                          *  "Code Composer Studio" project.
   316                                          */
   317            String   outputType;         /*! type of output produced by this
   318                                          *  project: "executable" or
   319                                          *  "staticLibrary", or "any".  The "any"
   320                                          *  type indicates that this project
   321                                          *  template applies to type of output,
   322                                          *  executable, library, etc.
   323                                          *
   324                                          *  If this field is not set "any" is
   325                                          *  used.
   326                                          */
   327        };
   328
   329        /*!
   330         *  ======== TemplateGroup ========
   331         *  TemplateGroup structure
   332         *
   333         *  This structure may be used to define a hierarchy of examples for the
   334         *  product. Examples may be logically organized into groups with a unique
   335         *  `id` and may specify membership of other groups by referring to their
   336         *  ids in the `groups` array. In this manner, the example producer
   337         *  can define a tree topology of examples for their product. Once the
   338         *  template groups are defined, the individual examples may specify their
   339         *  membership within a template group in the `groups` array of
   340         *  {@link #TemplateInfo}. The example provider may specify all the defined
   341         *  groups for their product in {@link #templateGroupArr}.
   342         *
   343         *  @field(id) Unique id for the template group
   344         *  @field(name) Name of the group
   345         *  @field(description) Description of the group
   346         *  @field(groups) Array of group ids used to specify
   347         *                 membership of other groups.
   348         */
   349        struct TemplateGroup {
   350            String id;
   351            String name;
   352            String description;
   353            String groups[];
   354        };
   355
   356        /*!
   357         *  ======== templateArr ========
   358         *  Examples contained in the product
   359         */
   360        config TemplateInfo templateArr[];
   361
   362        /*!
   363         *  ======== templateGroupArr ========
   364         *  Array of template group ids
   365         *
   366         *  This array may be optionally specified by Products that
   367         *  organize their examples into groups.
   368         */
   369        config TemplateGroup templateGroupArr[] = [];
   370    }
   371    /*
   372     *  @(#) xdc.tools.product; 1, 0, 0,0; 1-9-2017 12:51:47; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   373     */
   374


interface xdc.tools.product.IProductView

     1    /*
     2     *  Copyright (c) 2009 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    package xdc.tools.product;
    13
    14    /*!
    15     *  ======== IProductView ========
    16     *  Define a product as a logical group of RTSC modules
    17     *
    18     *  This interface allows a product to define logical groups of RTSC
    19     *  modules delivered with it. Implementations of this interface are
    20     *  typically consumed within development environments like IDE's to
    21     *  render a graphical tree view of the product consisting of these
    22     *  groups.
    23     *
    24     *  This is an experimental interface and is subject to change.
    25     */
    26    metaonly interface IProductView
    27    {
    28        /*!
    29         *  ======== ProductElemDesc ========
    30         *  ProductElemDesc structure
    31         *
    32         *  This structure is used to define the logical tree "view" of a
    33         *  product. This view is composed of elements that are either modules
    34         *  or groups: modules at the leaves of the tree and groups elsewhere.
    35         *
    36         *  @field(elemName)        Name of element. Elements can be either
    37         *                          groups or modules
    38         *  @field(moduleName)      In case of a leaf node this field will
    39         *                          contain the module name. For intermediate
    40         *                          tree nodes the module name will be set to
    41         *                          `null`
    42         *  @field(iconFileName)    The name of the icon file that is associated
    43         *                          with this element.  In xdctools 3.23, this path
    44         *                          must be relative to the package containing the
    45         *                          `IProductView` implementation.
    46         *
    47         *                          In xdctools 3.24.01 (or above), this path may
    48         *                          be relative or absolute.  If it's relative,
    49         *                          it's first searched for in the package
    50         *                          containing the `IProductView` implementation
    51         *                          module and, if this fails, the relative path
    52         *                          is searched via `xdc.findFile()`.  If the icon
    53         *                          is still not found, a default icon will be
    54         *                          used.
    55         *  @field(elemArray)       Array used to define children of a node.
    56         */
    57        struct ProductElemDesc {
    58            String elemName;             /*! Name of group or module */
    59            String moduleName;           /*! Name of module */
    60            String iconFileName;         /*! Icon file name representing element */
    61            ProductElemDesc elemArray[]; /*! Array of `ProductElemDesc` */
    62        };
    63
    64        /*!
    65         *  ======== homeModule ========
    66         *  Top-level module for this product
    67         *
    68         *  The `homeModule` is a distinguished "top-level" module that is used
    69         *  by GUI's as a starting point, or "home page", to navigate to the
    70         *  other content managed by this product.
    71         */
    72        config String homeModule;
    73
    74        /*!
    75         *  ======== linksToArray ========
    76         *  Array of IDs of products accessable from this product's home module
    77         *
    78         *  This array of product IDs is used to determine a hierarchical
    79         *  relationship between products and if a product's modules can be
    80         *  reached from another product's home page. If product A "links to"
    81         *  product B, then product B's home page can be closed so long as
    82         *  product A's home page is open.
    83         */
    84        config String linksToArray[];
    85
    86        /*!
    87         *  ======== getProductDescriptor ========
    88         *  Return this product's tree view
    89         *
    90         *  This method is typically invoked by development tools like IDE's
    91         *  to get the product view tree structure.
    92         *
    93         *  @a(returns)
    94         *  Returns root node of tree of `{@link #ProductElemDesc}` structures
    95         */
    96        ProductElemDesc getProductDescriptor();
    97    }
    98    /*
    99     *  @(#) xdc.tools.product; 1, 0, 0,0; 1-9-2017 12:51:47; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   100     */
   101


package xdc.tools.product

     1    /*
     2     *  Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    /*!
    13     *  ======== xdc.tools.product ========
    14     *  Interfaces for products contributing RTSC packages
    15     */
    16    package xdc.tools.product [1, 0, 0] {
    17        interface IProductView;
    18        interface IProduct;
    19        interface IProductTemplate;
    20    }
    21    /*
    22     *  @(#) xdc.tools.product; 1, 0, 0,0; 1-9-2017 12:51:47; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    23     */
    24


module xdc.tools.product.plugingen.Main

     1    /*
     2     *  Copyright 2017 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*!
     7     *  ======== Main ========
     8     *  Command-line tool for generating eclipse plugins for RTSC content
     9     *
    10     *  The `plugingen` tool allows RTSC content producers to
    11     *  create eclipse plugins that allows their content to be
    12     *  integrated in the CCS environment. As input, the tool requires
    13     *  @p(blist)
    14     *      - a RTSC module implementing {@link xdc.tools.product.IProduct}
    15     *  @p
    16     *  Refer to {@link ./doc-files/ExampleProduct.xdc ExampleProduct}
    17     *  for an implementation of {@link xdc.tools.product.IProduct IProduct}.
    18     *
    19     *  The tool may also be used to generate starter examples that will showup
    20     *  in the new project wizard. This is accomplished by implementing
    21     *  {@link xdc.tools.product.IProductTemplate IProductTemplate} and setting
    22     *  the {@link xdc.tools.product.IProduct#templateModule templateModule}
    23     *  configuration parameter of the {@link xdc.tools.product.IProduct IProduct}
    24     *  implementation to the name of the implementation module.
    25     *  Refer to {@link ./doc-files/Examples.xdc Examples}
    26     *  for a sample implementation of {@link
    27     *  xdc.tools.product.IProductTemplate IProductTemplate}.
    28     *
    29     *  The XGCONF product view maybe developed by implementing
    30     *  {@link xdc.tools.product.IProductView IProductView} and setting
    31     *  the {@link xdc.tools.product.IProduct#productViewModule productViewModule}
    32     *  configuration parameter of the {@link xdc.tools.product.IProduct IProduct}
    33     *  implementation to the name of the implementation module.
    34     *  Refer to {@link ./doc-files/ProductView.xdc ProductView.xdc} and
    35     *  {@link ./doc-files/ProductView.xs ProductView.xs}
    36     *  for a sample implementation of {@link
    37     *  xdc.tools.product.IProductView IProductView}.
    38     *
    39     *  The tool operates on a product that is either specified by the `-p`
    40     *  option or is present in the folder from which the tool is executed.
    41     *  The tool will create the plugin in a sub-folder named `eclipse`
    42     *  in the output directory specified with `-o` option. If the `-o`
    43     *  option is not specified the plugin is created in the product root
    44     *  directory.
    45     *
    46     *  @a(Example)
    47     *  @p(code)
    48     *      xs xdc.tools.product.plugingen
    49     *                      -p exampleprod_1_0_0_00
    50     *                      -m xdc.tools.product.plugingen.examples.ExampleProduct
    51     *  @p
    52     */
    53    metaonly module Main inherits xdc.tools.ICmd
    54    {
    55        override config String usage[] = [
    56            '[-p product_root_directory]',
    57            ' -m module',
    58            '[-o outdir]',
    59            '[-f pluginFragment]'
    60        ];
    61
    62    instance:
    63
    64        /*!
    65         *  ======== productDir ========
    66         *  Product root directory
    67         *
    68         *  This option names the product root directory that is used by the
    69         *  tool to generate the plugin.  For example, its declared repositories
    70         *  are added to the package path and are searched for contributed
    71         *  platforms.
    72         *
    73         *  If the '-o' option is not specified, the tool generates the plugin
    74         *  in a sub-directory named `eclipse` in the product root directory.
    75         *
    76         *  If this option is not specified, the product root directory is
    77         *  assumed to be `./`.
    78         *
    79         */
    80        @CommandOption("p")
    81        config String productDir = "./";
    82
    83        /*!
    84         *  ======== productModule ========
    85         *  Input description of the plug-in to be specified
    86         *
    87         *  This required option names a module that implements
    88         *  `{@link xdc.tools.product.IProduct}`.
    89         */
    90        @CommandOption("m")
    91        config String productModule;
    92
    93        /*!
    94         *  ======== outputDir ========
    95         *  Output directory in which the plugin will be generated.
    96         *
    97         *  This option names the directory in which the plugin
    98         *  will be generated in a sub-directory named `eclipse`.
    99         *  If this option is not specified the tool will generate
   100         *  the plugin in the product root directory specified with
   101         *  the '-p' option.
   102         */
   103        @CommandOption("o")
   104        config String outputDir = null;
   105
   106        /*!
   107         *  ======== pluginFragment ========
   108         *  Text file containing plugin fragment
   109         *
   110         *  This option names the text file containing a plugin fragment.
   111         *  This allows users to contribute extensions to the UI plugins
   112         *  generated by the tool.
   113         *
   114         *  The tool does not perform syntax checking of the contributed
   115         *  fragment. Users need to ensure the correctness of the
   116         *  contributed fragment. Note that syntactically incorrect
   117         *  fragments can disable the plugin completely in the eclipse
   118         *  platform.
   119         */
   120        @CommandOption("f")
   121        config String pluginFragment = null;
   122
   123        /*!
   124         *  ======== generationFormat ========
   125         *  Plugin generation format
   126         */
   127        @CommandOption("generation_format")
   128        config String generationFormat = null;
   129
   130        /*!
   131         *  ======== suppress_product_type_info ========
   132         *  This Option is now removed from PluginGen.
   133         *  We shall throw an error to flag this change to users.
   134         *
   135         *  Suppress generation of product type information
   136         *
   137         *  This option generates eclipse plugin without the product
   138         *  type information. Should only be invoked to generate plugins
   139         *  whose product type information was hard coded into CCS 4.x prior
   140         *  to the creation of this tool.
   141         *
   142         *  This option should not be used by _any_ new products.
   143         */
   144        @CommandOption("suppress_product_type_info")
   145        config Bool suppressProductTypeInfo = false;
   146
   147        /*!
   148         *  ======== dynamic_toc ========
   149         *  @_nodoc
   150         *
   151         *  This switch allows us to enable the new (to 3.30) dynamic TOC provider
   152         *  which can read TOC files that are _not_ in any of the signed plugins.
   153         *  Which means we can completely encapsulate the docs in a product's
   154         *  directories and there is no possibility of using a TOC that doesn't
   155         *  match the docs provided.
   156         *
   157         *  This option should only be used for products that will only be used
   158         *  with versions of XDCtools 3.30 or later (unless we backport this
   159         *  provider to 3.26, for example).
   160         *
   161         *  Someday we may ignore this switch as default to using dynamic_toc.
   162         *  But for now (3.30), dynamic_toc is only used by xdctools itself.
   163         */
   164        @CommandOption("dynamic_toc")
   165        config Bool dynamicToc = false;
   166
   167        /*!
   168         *  ======== run ========
   169         */
   170        override Any run(xdc.tools.Cmdr.Instance cmdr, String args[]);
   171    }
   172    /*
   173     *  @(#) xdc.tools.product.plugingen; 1, 0, 0,0; 1-9-2017 12:51:48; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   174     */
   175


package xdc.tools.product.plugingen

     1    /*
     2     *  Copyright 2017 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  ======== xdc.tools.product.plugingen ========
     8     *  Generate eclipse plugins for RTSC content
     9     */
    10    package xdc.tools.product.plugingen [1,0,0] {
    11        module Main;
    12    }
    13    /*
    14     *  @(#) xdc.tools.product.plugingen; 1, 0, 0,0; 1-9-2017 12:51:49; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    15     */
    16


module xdc.tools.product.trexgen.Main

     1    /*
     2     *  Copyright 2017 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*!
     7     *  ======== Main ========
     8     *  Command-line tool for generating projectspec files for RTSC content
     9     *
    10     *  The `trexgen` tool allows RTSC content producers to
    11     *  create projectspec files that allow their content to be
    12     *  integrated in the CCS Resource Explorer environment. As input,
    13     *  the tool requires
    14     *  @p(blist)
    15     *      - a RTSC module implementing {@link xdc.tools.product.IProduct}
    16     *  @p
    17     *  Refer to {@link ./doc-files/ExampleProduct.xdc ExampleProduct}
    18     *  for an implementation of {@link xdc.tools.product.IProduct IProduct}.
    19     *
    20     *  The tool generates starter examples that will show up
    21     *  in the Resource explorer. This is accomplished by implementing
    22     *  {@link xdc.tools.product.IProductTemplate IProductTemplate} and setting
    23     *  the {@link xdc.tools.product.IProduct#templateModule templateModule}
    24     *  configuration parameter of the {@link xdc.tools.product.IProduct IProduct}
    25     *  implementation to the name of the implementation module.
    26     *  Refer to {@link ./doc-files/Examples.xdc Examples}
    27     *  for a sample implementation of {@link
    28     *  xdc.tools.product.IProductTemplate IProductTemplate}.
    29     *
    30     *  The tool operates on a product that is either specified by the `-p`
    31     *  option or is present in the folder from which the tool is executed.
    32     *  The tool will create the resources sub-folder in the output directory
    33     *  specified with `-o` option. If the `-o`
    34     *  option is not specified the resources is created in the product root
    35     *  directory.
    36     *
    37     *  The tool will search the repositories specified in the module
    38     *  implementing {@link xdc.tools.product.IProduct} for RTSC platforms.
    39     *  This search can be disabled by specifying the`--disable_repo_search`
    40     *  option. The user needs to ensure that the repositories are installed
    41     *  in the product root directory before using the tool.
    42     *
    43     *  @a(Example)
    44     *  @p(code)
    45     *      xs xdc.tools.product.trexgen
    46     *                      -p exampleprod_1_0_0_00
    47     *                      -m xdc.tools.product.plugingen.examples.ExampleProduct
    48     *  @p
    49     */
    50    metaonly module Main inherits xdc.tools.ICmd
    51    {
    52        override config String usage[] = [
    53            '[-p product_root_directory]',
    54            ' -m module',
    55            '[-o outdir]'
    56        ];
    57
    58    instance:
    59
    60        /*!
    61         *  ======== productDir ========
    62         *  Product root directory
    63         *
    64         *  This option names the product root directory that is used by the
    65         *  tool to generate the projectspec files.  For example, it's declared
    66         *  repositories are added to the package path and are searched for
    67         *  contributed platforms.
    68         *
    69         *  If the '-o' option is not specified, the tool generates the resources
    70         *  directory in the product root directory.
    71         *
    72         *  If this option is not specified, the product root directory is
    73         *  assumed to be `./`.
    74         *
    75         */
    76        @CommandOption("p")
    77        config String productDir = "./";
    78
    79        /*!
    80         *  ======== productModule ========
    81         *  Input description of the plug-in to be specified
    82         *
    83         *  This required option names a module that implements
    84         *  `{@link xdc.tools.product.IProduct}`.
    85         */
    86        @CommandOption("m")
    87        config String productModule;
    88
    89        /*!
    90         *  ======== outputDir ========
    91         *  Output directory in which the plugin will be generated.
    92         *
    93         *  This option names the directory in which the project spec
    94         *  will be generated in a sub-directory named `eclipse`.
    95         *  If this option is not specified the tool will generate
    96         *  the plugin in the product root directory specified with
    97         *  the '-p' option.
    98         */
    99        @CommandOption("o")
   100        config String outputDir = null;
   101
   102        /*!
   103         *  ======== generationFormat ========
   104         *  Plugin generation format
   105         */
   106        @CommandOption("generation_format")
   107        config String generationFormat = null;
   108
   109        /*!
   110         *  ======== run ========
   111         */
   112        override Any run(xdc.tools.Cmdr.Instance cmdr, String args[]);
   113    }
   114    /*
   115     *  @(#) xdc.tools.product.trexgen; 1, 0, 0,0; 1-9-2017 12:51:50; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   116     */
   117


package xdc.tools.product.trexgen

     1    /*
     2     *  Copyright 2017 by Texas Instruments Incorporated.
     3     *
     4     */
     5
     6    /*
     7     *  ======== xdc.tools.product.trexgen ========
     8     *  Generate project spec files for CCS resource explorer
     9     */
    10    package xdc.tools.product.trexgen [1,0,0] {
    11        module Main;
    12    }
    13    /*
    14     *  @(#) xdc.tools.product.trexgen; 1, 0, 0,0; 1-9-2017 12:51:50; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    15     */
    16


module xdc.tools.repoman.Main

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    package xdc.tools.repoman;
    14
    15    /*!
    16     *  ======== xdc.tools.repoman.Main ========
    17     *  Repository Manager tool
    18     *
    19     *  This tool creates and manages package repositories.  It displays
    20     *  information about archived packages, extracts archived packages,
    21     *  extracts repositories from bundles and deletes packages from
    22     *  repositories.
    23     *
    24     *  Information about archived packages can be displayed with
    25     *  the '-t' and '-n' options. The '-p' argument is used to
    26     *  specify a directory in which to search. If the '-p' arg is omitted,
    27     *  the current directory is searched. Specific packages can searched
    28     *  for by specifying one or more package names, or one or more package
    29     *  archives at the end of the command line.  If no packages are specified,
    30     *  information on all packages found in the search directory will be
    31     *  displayed.
    32     *
    33     *  Archived packages can be extracted to a repository with the '-x'
    34     *  option. '-x -D' will extract dependent packages, too. '-x -R' will
    35     *  recursively extract dependent packages. If any of the packages in
    36     *  the specified package list are not compatible, the operation will
    37     *  be aborted. '-F' can be used to force all packages to be extracted,
    38     *  regardles of compatibility. The '-p' arg is used to specify a
    39     *  directory to search in. If not specified, the current directory will
    40     *  be searched. The '-x' option also extracts a repository or packages
    41     *  from a bundle. In this case, the last argument specifies the bundle
    42     *  from which to extract the repository. The repository to be extracted
    43     *  is specified with the '-b' arg. If just packages are to be extracted,
    44     *  one or more package names should follow the name of the repository
    45     *  that they should be extracted from.
    46     *
    47     *  Packages can be deleted from a repository with '-d'. If the package
    48     *  has any subdirectores that contain packages, they will be left intact.
    49     *  After the package is deleted, if the package has no subdirectories
    50     *  with packages, empty directories that are part of the fully qualified
    51     *  package will be deleted, too.
    52     *
    53     *  Packages can be copied between repositories with '-c'. If the package
    54     *  being copied already exists in the destination repository, it will be
    55     *  deleted prior to being replaced.
    56     *
    57     *  The '-r' argument specifies a destination repository. If '-r' is
    58     *  omitted, the repository of the current package is used. If there is
    59     *  no current package, the current directory is used.
    60     *
    61     *  When a package name is given, it can be specified in full, such as
    62     *  'ti.platforms.sim6xxx', or the wildcard characters '*' and '?' may be
    63     *  used, as in 'ti.platforms.*' or 'ti.catalog.c??00'. A version/key can
    64     *  also be attached to a package name in the following manner:
    65     *  'ti.platforms.c6000[1,0,0,0,313835]'.  A prefix of the full version/key
    66     *  may also be used: 'ti.platforms.c6000[1,0]'.
    67     *
    68     *  If a package name has multiple matches either with or without a
    69     *  version/key specified, the most recent will be selected. Wildcards may
    70     *  also be used when naming a package archive file.
    71     *
    72     *  @a(Examples)
    73     *  xs xdc.tools.repoman -t
    74     *  @p(dlist)
    75     *  Displays all info on all archived packages in the current directory
    76     *  @p
    77     *
    78     *  xs xdc.tools.repoman -t -p C:\xdc-o19\exports
    79     *  @p(dlist)
    80     *  Displays all info on all archived packages in C:\xdc-o19\exports
    81     *  @p
    82     *
    83     *  xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti.platforms.*
    84     *  @p(dlist)
    85     *  Displays all info on archived packages whose names begin with
    86     *  ti.platforms. in C:\xdc-o19\exports
    87     *  @p
    88     *
    89     *  xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti_platforms*.tar
    90     *  @p(dlist)
    91     *  Displays all info on packages in files that match ti_platforms*.tar
    92     *  in C:\xdc-o19\exports
    93     *  @p
    94     *
    95     *  xs xdc.tools.repoman -t -p C:\xdc-o19\exports ti.catalog.c6000 ti.catalog.sim6xxx
    96     *  @p(dlist)
    97     *  Displays all info on archived packages ti.catalog.c6000 and
    98     *  ti.catalog.sim6xxx in C:\xdc-o19\exports
    99     *  @p
   100     *
   101     *  xs xdc.tools.repoman -t http://www.sanb.design.ti.com/ti_sdo_ce_wizards_genserver.tar
   102     *  @p(dlist)
   103     *  Displays all info on archived package ti_sdo_ce_wizards_genserver.tar
   104     *  at URL http://www.sanb.design.ti.com
   105     *  @p
   106     *
   107     *  xs xdc.tools.repoman -x
   108     *  @p(dlist)
   109     *  Extracts all archived packages in the current directory to the current
   110     *  repository
   111     *  @p
   112     *
   113     *  xs xdc.tools.repoman -x -r C:\myrepo\packages -p C:\exports
   114     *  @p(dlist)
   115     *  Extracts all archived packages in C:\exports to C:\myrepo\packages
   116     *  repository
   117     *  @p
   118     *
   119     *  xs xdc.tools.repoman -x -r C:\myrepo\packages -p C:\exports ti.catalog.*
   120     *  @p(dlist)
   121     *  Extracts packages matching ti.catalog.* from c:\exports to
   122     *  c:\myrepo\packages
   123     *  @p
   124     *
   125     *  xs xdc.tools.repoman -x -r C:\myrepo\packages C:\exports\ti_catalog*.tar
   126     *  @p(dlist)
   127     *  Extracts packages from files matching C:\exports\ti_catalog*.tar
   128     *  to c:\myrepo\packages
   129     *  @p
   130     *
   131     *  xs xdc.tools.repoman -x -r C:\myrepo\packages C:\exports\ti_catalog*.tar
   132     *  @p(dlist)
   133     *  Extracts packages from files matching C:\exports\ti_catalog*.tar
   134     *  to c:\myrepo\packages
   135     *  @p
   136     *
   137     *  xs xdc.tools.repoman -x -R -r C:\myrepo -p C:\xdc-o19\exports ti.platforms.sim6xxx
   138     *  @p(dlist)
   139     *  Extracts the package ti.platforms.sim6xxx and all recursively
   140     *  dependent packages from C:\xdc-o19\exports to C:\myrepo
   141     *  @p
   142     *
   143     *  xs xdc.tools.repoman -x -r C:\ -b packages C:\exports\xdc_core.tar.gz
   144     *  @p(dlist)
   145     *  Extracts the repository 'packages' from bundle
   146     *  C:\exports\xdc_core.tar.gz to C:\
   147     *  @p
   148     *
   149     *  xs xdc.tools.repoman -x -r C:\myrepo -b examples ti.xdais.dm.examples.videnc1_copy
   150     *  C:\xdais_6_24.tar.gz
   151     *  @p(dlist)
   152     *  Extracts the package ti.xdais.dm.examples.videnc1_copy from repository
   153     *  'examples' in bundle
   154     *  C:\xdais_6_24.tar.gz to C:\myrepo
   155     *  @p
   156     *
   157     *  xs xdc.tools.repoman -x -r C:\myrepo http://www.sanb.design.ti.com/ti_sdo_ce_wizards_genserver.tar
   158     *  @p(dlist)
   159     *  Extracts package ti_sdo_ce_wizards_genserver.tar at URL http://www.sanb.design.ti.com
   160     *  to c:\myrepo
   161     *  @p
   162     *
   163     *  xs xdc.tools.repoman -r C:\myrepo -b examples
   164     *  http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/xdais/7_10/exports/xdais_7_10.tar.gz
   165     *  @p(dlist)
   166     *  Extracts all of the packages in repository 'examples' from bundle xdais_7_10.tar.gz at URL
   167     *  http://... to C:\myrepo
   168     *  @p
   169     *
   170     *  xs xdc.tools.repoman -x -r C:\myrepo -b examples ti.xdais.dm.examples.videnc1_copy
   171     *  http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/xdais/6_24/exports/xdais_6_24.tar.gz
   172     *  @p(dlist)
   173     *  Extracts the package ti.xdais.dm.examples.videnc1_copy in repository
   174     *  'examples' from bundle xdais_7_10.tar.gz at URL http://... to C:\myrepo
   175     *  @p
   176     *
   177     *  xs xdc.tools.repoman -c -r C:\destdir\packages -p C:\srcdir\packages ti.catalog.c6000
   178     *  @p(dlist)
   179     *  Copies the package ti.catalog.c6000 from C:\srcdir\packages to
   180     *  C:\destdir\packages
   181     *  @p
   182     *
   183     *  xs xdc.tools.repoman --rsave -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs c:/myrepo
   184     *  @p(dlist)
   185     *  Saves package information for repository c:/myrepo to file c:/repoinfo.rmn.
   186     *  Also saves the search path c:/pkgarchives;c:/testpkgs
   187     *  @p
   188     *
   189     *  xs xdc.tools.repoman --rrestore -f c:/repoinfo.rmn -p c:/pkgarchives;c:/testpkgs
   190     *  @p(dlist)
   191     *  Restores all of the packages in the repository referenced in
   192     *  c:/repoinfo.rmn. Uses the search path c:/pkgarchives;c:/testpkgs to find
   193     *  and copy packages. Will create the repository if it doesn't exist.
   194     *  @p
   195     *
   196     *  xs xdc.tools.repoman --rcreate -f c:/repoinfo.rmn -p
   197     *                       c:/pkgarchives;c:/testpkgs c:/mynewrepo
   198     *  @p(dlist)
   199     *  Creates the new repository c:/mynewrepo from the repository referenced in
   200     *  the file c:/repoinfo.rmn.  Uses the search path c:/pkgarchives;c:/testpkgs
   201     *  to find and copy packages. If successful, the newly created repository
   202     *  will be identical to its predecessor referenced in c:/repoinfo.rmn.
   203     *  @p
   204     *
   205     *  xs xdc.tools.repoman --providerId my_codec_engine c:/codec_engine_2_23/mypackages
   206     *  @p(dlist)
   207     *  Assigns the providerId attribute in  c:/codec_engine_2_23/mypackages/.repo.xml
   208     *  the value my_codec_engine. If c:/codec_engine_2_23/mypackages/.repo.xml does not
   209     *  exist, it will be created.
   210     *  @p
   211     *
   212     */
   213    metaonly module Main inherits xdc.tools.ICmd {
   214
   215        override config String usage[] = [
   216            '-t [-v] [-p pathname] [packagename...|packagefile...]',
   217            '-n [-v] [-p pathname] [packagename...|packagefile...]',
   218            '-x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] packagename...|packagefile...',
   219            '-x [-v] [-D] [-R] [-F] [-r destrepo] [-p path] -b bundlerepository [packagename...] bundleFile',
   220            '-d [-v] [-F] [-r destrepo] packagename...',
   221            '-c [-v] [-F] [--providerId] [-r destrepo] [-p pathname] packagename...',
   222            '--rsave -f file [-p searchpath] repository...',
   223            '--rrestore -f file [-p searchpath] [index-spec]',
   224            '--rcreate -f file [-p searchpath] [index-spec] destrepository...',
   225            '[-F] --providerId providerId [repository...]'
   226        ];
   227
   228       /*! represents a repository in a bundle */
   229        @XmlDtd
   230        metaonly struct Repo {
   231            String name;
   232            String pkg[];
   233        }
   234
   235        @XmlDtd
   236        metaonly struct Pkg {
   237            String name;
   238            String file;
   239            String release;
   240            String label;
   241            String version;
   242            String date;
   243            String buildable;
   244            String originalProviderId;
   245            String producerId;
   246            String reqs[];
   247            String refs[];
   248            Repo repository[];
   249        }
   250
   251        @XmlDtd
   252        metaonly struct Results {
   253            String repository;
   254            String providerId;
   255            String producerId;
   256            Bool writable;
   257            Pkg pkg[];         /*! array of package info structures */
   258        }
   259
   260        @XmlDtd
   261        metaonly struct PkgName {
   262            String name;
   263            Repo repository[];
   264        }
   265
   266        @XmlDtd
   267        metaonly struct NameResults {
   268            PkgName pkgName[];     /*! array of PkgName structures */
   269        }
   270
   271    instance:
   272
   273        //!Display package info
   274        @CommandOption('t')
   275        config Bool infoFlag = false;
   276
   277        //!Display package names only
   278        @CommandOption('n')
   279        config Bool namesFlag = false;
   280
   281        //!Extract package(s)
   282        @CommandOption('x')
   283        config Bool extractFlag = false;
   284
   285        //!Delete package(s)
   286        @CommandOption('d')
   287        config Bool deleteFlag = false;
   288
   289        //!Path arg
   290        @CommandOption('p')
   291        config String pathArg = null;
   292
   293        //!Repository arg
   294        @CommandOption('r')
   295        config String repositoryArg = null;
   296
   297        //!Include package dependencies
   298        @CommandOption('D')
   299        config Bool dependentFlag = false;
   300
   301        //!Recursive include package dependencies
   302        @CommandOption('R')
   303        config Bool recursiveDepFlag = false;
   304
   305        //!Return an array of strings
   306        @CommandOption('a')
   307        config Bool arrFlag = false;
   308
   309        //!Return a Results struct as XML
   310        @CommandOption('X')
   311        config Bool xmlFlag = false;
   312
   313        //!Print informative messages during execution
   314        @CommandOption('v')
   315        config Bool verboseFlag = false;
   316
   317        //!Bundle repository arg
   318        @CommandOption('b')
   319        config String bundleRepositoryArg = null;
   320
   321        //!Force incompatible packages
   322        @CommandOption('F')
   323        config Bool forceFlag = false;
   324
   325        //!Copy package(s)
   326        @CommandOption('c')
   327        config Bool copyFlag = false;
   328
   329        //!file arg to save/restore repository
   330        @CommandOption('f')
   331        config String fileArg = null;
   332
   333        //!Save a repository's information to file
   334        @CommandOption('rsave')
   335        config Bool rsaveFlag = false;
   336
   337        //!Restore one or more repositories from information in file
   338        @CommandOption('rrestore')
   339        config Bool rrestoreFlag = false;
   340
   341        //!Create one or more repositories from information in file
   342        @CommandOption('rcreate')
   343        config Bool rcreateFlag = false;
   344
   345        //! providerId for a repository
   346        @CommandOption('providerId')
   347        config string provIdArg = null;
   348
   349    }
   350
   351
   352
   353    /*
   354     *  @(#) xdc.tools.repoman; 1, 0, 0,0; 1-9-2017 12:51:52; /db/ztree/library/trees/xdctools/xdctools-h00/src/
   355     */
   356


package xdc.tools.repoman

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    requires xdc.tools;
    14    requires xdc.shelf;
    15    requires xdc.services.global;
    16
    17    /*
    18     *  ======== xdc.tools.repoman ========
    19     *  Repository Management Tool
    20     */
    21    package xdc.tools.repoman [1, 0, 0]
    22    {
    23        module Main;
    24    }
    25
    26    /*
    27     *  @(#) xdc.tools.repoman; 1, 0, 0,0; 1-9-2017 12:51:52; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    28     */
    29


module xdc.tools.repoman.sg.Main

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12
    13    /*!
    14     *  ======== Main ========
    15     *  Graphical interface to repoman tool
    16     *
    17     *  For more information about how to use this tool, see the
    18     *  {@link http://rtsc.eclipse.org/docs-tip/Command_-_xdc.tools.repoman.sg xdc.tools.repoman.sg User's Guide}.
    19     *
    20     *  @see xdc.tools.repoman
    21     */
    22    metaonly module Main inherits xdc.tools.ICmd {
    23
    24        override config String usage[] = [
    25           '[--packagepath PATH]'
    26        ];
    27        /*!
    28         *  ======== createPartControl ========
    29         *  @_nodoc
    30         */
    31        function createPartControl(parent);
    32    instance:
    33        //! repositories to scan for packages
    34        @CommandOption('packagepath')
    35        config string pathArg = null;
    36    }
    37    /*
    38     *  @(#) xdc.tools.repoman.sg; 1, 0, 0,0; 1-9-2017 12:51:54; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    39     */
    40


package xdc.tools.repoman.sg

     1    /*
     2     *Copyright (c) 2008 Texas Instruments and others.
     3     *  All rights reserved. This program and the accompanying materials
     4     *  are made available under the terms of the Eclipse Public License v1.0
     5     *  which accompanies this distribution, and is available at
     6     *  http://www.eclipse.org/legal/epl-v10.html
     7     *
     8     *  Contributors:
     9     *      Texas Instruments - initial implementation
    10     *
    11     * */
    12    requires xdc.tools.sg;
    13
    14    /*
    15     *  ======== xdc.tools.repoman.sg ========
    16     */
    17    package xdc.tools.repoman.sg [1, 0, 0] {
    18        module Main;
    19    }
    20
    21    /*
    22     *  @(#) xdc.tools.repoman.sg; 1, 0, 0,0; 1-9-2017 12:51:54; /db/ztree/library/trees/xdctools/xdctools-h00/src/
    23     */
    24


 Previous Release Notes
  • xdctools_3_20_00_41_release_notes
  • xdctools_3_20_01_51_release_notes
  • xdctools_3_20_02_59_release_notes
  • xdctools_3_20_03_63_release_notes
  • xdctools_3_20_04_68_release_notes
  • xdctools_3_20_05_76_release_notes
  • xdctools_3_20_06_81_release_notes
  • xdctools_3_20_07_86_release_notes
  • xdctools_3_20_08_88_release_notes
  • xdctools_3_22_00_09_release_notes
  • xdctools_3_22_01_21_release_notes
  • xdctools_3_22_02_27_release_notes
  • xdctools_3_22_03_41_release_notes
  • xdctools_3_22_04_46_release_notes
  • xdctools_3_23_00_32_release_notes
  • xdctools_3_23_01_43_release_notes
  • xdctools_3_23_02_47_release_notes
  • xdctools_3_23_03_53_release_notes
  • xdctools_3_23_04_60_release_notes
  • xdctools_3_24_00_08_release_notes
  • xdctools_3_24_01_29_release_notes
  • xdctools_3_24_02_30_release_notes
  • xdctools_3_24_03_33_release_notes
  • xdctools_3_24_04_38_release_notes
  • xdctools_3_24_05_48_release_notes and supported targets
  • xdctools_3_24_06_63_release_notes and supported targets
  • xdctools_3_24_07_73_release_notes
  • xdctools_3_25_00_48_release_notes and supported targets
  • xdctools_3_25_01_65_release_notes and supported targets
  • xdctools_3_25_02_70_release_notes and supported targets
  • xdctools_3_25_03_72_release_notes and supported targets
  • xdctools_3_25_04_88_release_notes and supported targets
  • xdctools_3_25_05_94_release_notes and supported targets
  • xdctools_3_30_00_21_release_notes and supported targets
  • xdctools_3_30_01_25_release_notes and supported targets
  • xdctools_3_30_02_44_release_notes and supported targets
  • xdctools_3_30_03_47_release_notes and supported targets
  • xdctools_3_30_04_52_release_notes and supported targets
  • xdctools_3_30_05_60_release_notes
  • xdctools_3_30_06_67_release_notes
  • xdctools_3_31_00_24_release_notes and supported targets
  • xdctools_3_31_01_33_release_notes and supported targets
  • xdctools_3_31_02_38_release_notes and supported targets
  • xdctools_3_32_00_06_release_notes and supported targets
  • xdctools_3_32_01_22_release_notes
  • xdctools_3_50_00_10_release_notes and supported targets
  • xdctools_3_50_01_12_release_notes and supported targets


XDCtools 3.20.00.41 GA Release Notes

May 28, 2010

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS4 (Code Composer Studio v4.0) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed on-line at:

  • http://rtsc.eclipse.org/docs-tip

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in 3.20.00.41:

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.00.41 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL280878 | xgconf: Deleting project with cfg file open doesn't close the window
ECL280854 | XGCONF: On changing Configuro –D options, config is not re-validated, need to re-save script
ECL309211 | configuro exit status is 0 even when command usage is wrong
ECL306433 | a second package release that specifies "exportAll" has an incomplete manifest
ECL287731 | Updating XDC version fails to regenerate package/rel/*.tar.dep files
ECL289229 | When xs xdc.tools.repoman fails it should exit with non-zero exit status
ECL289144 | cdoc: @_nodoc on per-instance config is ignored
ECL285460 | cdoc does not properly escape '<' in strings
ECL285331 | XGCONF gives NullPointerException when certain modules are used.
ECL280875 | xgconf: hand-editing to add ti.bios.MEM throws NPE
ECL280861 | xgconf: Renaming an instance does not create a Program.global entry if the instance has no Params struct
ECL276101 | xgconf: hover help text does not properly format xdoc text
ECL304758 | microsoft.targets.arm.WinCE's default platform is incorrectly an x86 device
ECL280858 | xgconf: Can't double-click on Problems view to go to offending module/instance
ECL301761 | xgconf should add the project cfg path when processing app.cfg file
ECL303793 | Platform wizard does not support c28xx devices
ECL313408 | package whose repository is in the current directory can cause NullPointer exception
ECL264025 | cannot define an interface instance as a global variable
ECL312963 | SysMin_ready fails
ECL307806 | the config error for uninitialized array values is confusing
ECL312965 | ROV view of SysMin outbuf is garbled
ECL302355 | Closure tool gives erroneous message
ECL296749 | Dereferencing undefined object in user's Build.targets array leads to confusing error msg
ECL312648 | When assigning Pkg.libTemplate, compile options need extra space padding.
ECL309514 | System_printf bug with extended specifiers
ECL302614 | Incomprehensible error message when incorrect package name is loaded
ECL291830 | can't use modules that have @NoRuntime attribute set

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3 . CCSv4 IDE integration is not supported on Linux.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.1.2 , 4.2.0.08029
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.0
  • TI C6x Code Generation Tools version 7.0.0 and 7.2.0A
  • TI MSP430 Code Generation Tools version 3.3.0B2
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.1
  • GCC for x86 version 4.1.0
  • GCC for ARM version 3.4.3 and 4.2.1
back to top

Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314909 | Closing the Path app (launched from CCS) with File|Exit crashes CCS
ECL314790 | Default JVM memory not enough for cdoc

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA, beta, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng or 3.15.01.58-beta).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup.

back to top

Last updated: May 28, 2010 Build Ver: 3.20.00.41 Rev: m41


XDCtools 3.20.01.51 Release Notes

June 25, 2010

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS4 (Code Composer Studio v4.0) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in 3.20.01.51:

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.01.51 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL314886 | xgconf: javascript var gets confused with config param and causes NPE
ECL314909 | Closing the Path app (launched from CCS) with File|Exit crashes CCS
ECL315705 | Path tool does not scan all the packages on the package path
ECL315822 | Errant xdc.runtime dependency during config
ECL316841 | Platform wizard does not support setting cache modes for custom memory maps
ECL317192 | gnu.targets.arm fails if xdc.runtime not loaded

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3 . CCSv4 IDE integration is not supported on Linux.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.1.2 , 4.2.0.08029
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.0
  • TI C6x Code Generation Tools version 7.0.0 and 7.2.0A
  • TI MSP430 Code Generation Tools version 3.3.0B2
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.1
  • GCC for x86 version 4.1.0
  • GCC for ARM version 3.4.3 and 4.2.1
back to top

Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA, beta, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng or 3.15.01.58-beta).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: June 25, 2010 Build Ver: 3.20.01.51 Rev: m51


XDCtools 3.20.02.59 GA Release Notes

August 09, 2010

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS4 (Code Composer Studio v4.0) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.20 :

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.02.59 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL309028 | Launching XGCONF from CCS4.20(Linux) causes CCS4 to crash
ECL317341 | configuro generates linker.cmd file with restricted permissions on Windows7
ECL317526 | Thread instance name not passed to proxy
ECL318369 | TMS320DA802 module has inconsistent IRAM and cache sizes
ECL319331 | RTA Decoder issue with Log_print records
ECL320682 | In cdoc, doxy() links don't work for doxygen module and page objects

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3 . CCSv4 IDE integration is not supported on Linux.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.09000. Note that this release will not work with CCS 4.1.3 and earlier releases.
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.09000
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.1
  • TI C6x Code Generation Tools version 7.0.0,7.1.0B2 ,7.2.0A
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 3.4.3 and 4.2.1
back to top

Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: August 09, 2010 Build Ver: 3.20.02.59 Rev: m59


XDCtools 3.20.03.63 Release Notes

August 24, 2010

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS4 (Code Composer Studio v4.0) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.20 :

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.03.63 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL276792 | ROV shouldn't require all packages to be found
ECL322305 | it is not possible to change common$ LOG bits using xgconf
ECL322947 | Complete list of RTSC platforms do not showup

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3 . CCSv4 IDE integration is not supported on Linux.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.09000. Note that this release will not work with CCS 4.1.3 and earlier releases.
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.09000
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.1
  • TI C6x Code Generation Tools version 7.0.0,7.1.0B2 ,7.2.0A
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 3.4.3 and 4.2.1
back to top

Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: August 24, 2010 Build Ver: 3.20.03.63 Rev: m63


XDCtools 3.20.04.68 GA Release Notes

September 20, 2010

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS4 (Code Composer Studio v4.0) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.20 :

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.04.68 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL325138 | Incorrect platform shows up in new project wizard
ECL323523 | Exception loading module with incomplete path
ECL315697 | xdc clean should 'just work'
ECL325173 | Registry de-references NULL if no loggers are configured
ECL324921 | ROV problems with 28x (sign extend 0x8xxx yields wrong addr)
ECL324915 | ti.platforms.evmDM8148 has incorrect clock frequencies

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3 . CCSv4 IDE integration is not supported on Linux.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10012. Note that this release will not work with CCS 4.1.3 and earlier releases.
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.09000
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.1
  • TI C6x Code Generation Tools version 7.0.0,7.1.0B2 ,7.2.0A
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 3.4.3 and 4.2.1
back to top

Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: September 20, 2010 Build Ver: 3.20.04.68 Rev: m68


XDCtools 3.20.05.76 GA Release Notes

November 18, 2010

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.20 :

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.05.76 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL322274 | ti.platforms.evm6472 should allow changing the external memory map
ECL325508 | evmDM6467 has a busted getCpuDataSheet function
ECL326459 | RTSC platform combo box is empty in new project wizard
ECL328989 | setting Text.isLoaded to true causes Diags_setMask() to access random memory
ECL329837 | Platform wizard throws an exception while using the TMS320DM365 device

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00091. Note that this release will not work with CCS 4.1.3 and earlier releases.
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00091
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.1
  • TI C6x Code Generation Tools version 7.0.0,7.1.0B2 ,7.2.0A
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
back to top

Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: November 18, 2010 Build Ver: 3.20.05.76 Rev: m76


XDCtools 3.20.06.81 GA Release Notes

December 08, 2010

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. Refer to the RTSC-pedia for the latest documentation on the RTSC technology and XDCtools.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.20 :

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.06.81 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL330487 | C++ ELF targets get linker warning for non-placed ".init_array" section
ECL331578 | SYS/BIOS and IPC do not show up in XGCONF "Available Packages" view

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00091. Note that this release will not work with CCS 4.1.3 and earlier releases.
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00091
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.1
  • TI C6x Code Generation Tools version 7.0.0,7.1.0B2 ,7.2.0A
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
back to top

Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: December 08, 2010 Build Ver: 3.20.06.81 Rev: m81


XDCtools 3.20.07.86 GA Release Notes

January 17, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. Refer to the RTSC-pedia for the latest documentation on the RTSC technology and XDCtools.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.20 :

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model
The following changes have been included in the patch release XDCtools 3.20.07.86
  • Support for TMS320C2806x devices
  • Bug fixes

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.07.86 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL332570 | xdc.tools.Server SecurityManager can cause CCSv5 to refuse to close
ECL332985 | gnu.targets link fails if a filename contains '-'
ECL333928 | Bad code generated for SysMin_putch() on ARM M3 target

back to top

Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3
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Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.1
  • TI C6x Code Generation Tools version 7.0.0,7.1.0B2 ,7.2.0B1
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C62,C64,C64P,C64P_big_endian,C67,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.0 (TMS320C6x)
ti.targets.C54 | 4.2.0 (TMS320C54x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.TMS470;ti.targets.arm.[Arm7,Arm9,Arm11,Arm11_big_endian,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian] | 4.5.0 (ARM/TMS470)
ti.targets.C66;ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C67P,C66,C66_big_endian] | 7.2.0B1 (TMS320C6x)
ti.targets.elf.C674_big_endian | 7.1.0B2(TMS320C6x)
ti.targets.elf.TMS470 | 4.6.0 (ARM/TMS470)
ti.targets.arm.elf.[Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.6.1 (ARM/TMS470)
ti.targets.[C55,C55_huge] | 3.3.2 (TMS320C55x)
ti.targets.C55P_word | 4.0.0A (TMS320C55x)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00

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Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

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Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

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Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

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Last updated: January 17, 2011 Build Ver: 3.20.07.86 Rev: m86


XDCtools 3.20.08.88 GA Release Notes

January 31, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio to provide support for integrating RTSC content in the IDE environment.
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Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. Refer to the RTSC-pedia for the latest documentation on the RTSC technology and XDCtools.

Release notes from previous product releases are available in the relnotes_archive directory.

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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.20 :

  • Data Memory Footprint Reduction
  • Tool Performance Improvements
  • Enhanced Logging Capabilities
  • Platform Wizard Enhancements
  • Support for Peripherals in RTSC Platform Model
The following changes have been included in the patch release XDCtools 3.20.08.88
  • Bug Fixes

Data Memory Footprint Reduction

Release implements optimizations in the generated target code that result in data memory footprint reduction. Refer to ECL278643
for more details.

Tool Performance Improvements

Refer to this link for details on performance improvements in RTSC configuration.

Enhanced Logging Capabilities

The logging capabilities of the xdc.runtime package has been enhanced with the following new functionality
  • New Log APIs - Log_info, Log_warning, and Log_error- enable applications to easily emit events that communicate basic status information and automatically include file and line number information
  • The Error module now includes built-in support to log all errors
  • The new Registry module allows any C code to use Log and have its own diagnostics mask and name without requiring a reconfiguration of xdc.runtime.
  • Diags enhancements:
    • new categories added for errors and warnings, benchmarks, and basic information
    • diagnostic masks now include a 2-bit "priority" field which allows events of the same "category" to be prioritized
  • ILogger extended incompatibly to
    • allow more efficient logging of events with few (or no) arguments and
    • enable filtering based on an event's diagnostics mask (including the new priority bits)

Platform Wizard Enhancements

An improved platform wizard is available with this release

Support for Peripherals in RTSC Platform Model

The RTSC platform model has been extended to support peripherals.
  • Added support for devices to declare the peripherals they include. This enables driver packages to automatically detect the presence of specific peripherals.
  • Added rudimentary resource management support for these peripherals, allowing configuration frameworks to coordinate access to and control of each peripheral

Defect history for 3.20.08.88 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL292207 | HeapStd should be friendlier to C runtimes where there is no "heap size"
ECL334936 | ti.targets.elf.C66 should list e64P and e674 as compatible suffixes
ECL334938 | gconf tool throws errors during file save

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Upgrade and Compatibility Information

This release contains some compatibility breaks in order to introduce new features. The following section describes those compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed. Implementors of this interface need to make source code changes. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • The package ti.catalog.c470 (deprecated since XDCtools 3.10.04) has been removed. The package ti.catalog.arm. should be used instead.
  • C6000 compiler has been upgraded to 7.0. Consumers of C6000 RTSC content built with the whole_program or whole_program_debug profile need to upgrade their compiler version to 7.0 or later.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP
  • RedHat Enterprise Linux 3
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Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C67, C64P, C64, C62, C66
  • C5000 family - C55P, C55, C54
  • C2000 family - C28
  • ARM processors - TMS470, ARM9, ARM Cortex M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095
  • TI ARM Code Generation Tools version 4.5.0 and 4.6.1
  • TI C6x Code Generation Tools version 7.0.0,7.1.0B2 ,7.2.0B1
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C55 Code Generation Tools version 3.3.2
  • TI C54 Code Generation Tools version 4.2.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C62,C64,C64P,C64P_big_endian,C67,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.0 (TMS320C6x)
ti.targets.C54 | 4.2.0 (TMS320C54x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.TMS470;ti.targets.arm.[Arm7,Arm9,Arm11,Arm11_big_endian,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian] | 4.5.0 (ARM/TMS470)
ti.targets.C66;ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C67P,C66,C66_big_endian] | 7.2.0B1 (TMS320C6x)
ti.targets.elf.C674_big_endian | 7.1.0B2(TMS320C6x)
ti.targets.elf.TMS470 | 4.6.0 (ARM/TMS470)
ti.targets.arm.elf.[Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.6.1 (ARM/TMS470)
ti.targets.[C55,C55_huge] | 3.3.2 (TMS320C55x)
ti.targets.C55P_word | 4.0.0A (TMS320C55x)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00

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Known Issues

The following issues are known to affect this release:

ID | Headline
ECL314790 | Default JVM memory not enough for cdoc

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Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

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Last updated: January 31, 2011 Build Ver: 3.20.08.88 Rev: m88


XDCtools 3.22.00.09 GA Release Notes

May 02, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
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Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory. Note that XDCtools 3.21 (supports only the MSP430 device family) is shipped only with the Grace product.

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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.22 :

  • XGCONF Enhancements
  • New Platform Support
  • Eclipse Integration Enhancements

XGCONF Enhancements

The following enhancements have been made to the XGCONF tool
  • Script generation now produces shorter more readable scripts
  • Real-time validation is now possible; this makes it possible to validate user input before re-building
  • Modules can now provide graphical view of their configuration parameters
  • The available packages view can now show a device specific subset

New Host Support

  • XDCtools now supports Windows 7 and Ubuntu 10.04

Eclipse Integration Enhancements

  • Product supports CCSv5 on Linux(Ubuntu 10.04) and Windows XP/7
  • An enhanced error parser is provided with this release
  • Standard make project integration allows users to leverage RTSC build within CCS.

Defect history for 3.22.00.09 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL283354 | Templates that throw exceptions can corrupt the config model
ECL291248 | Closing XGCONF "Available Packages" view before it is populated causes an exception
ECL291845 | mod__prologue.h and mod__epilogue.h are not automatically added to pkg
ECL293232 | gconf: closing the outline view of a config corrupts the GUI lists
ECL303338 | xgconf: should remember previous property page when configuring a module
ECL315708 | cannot set 'fxn' field in ti.sysbios.family.c64p.EventCombiner array
ECL317527 | IInstance.name needs link to common$.namedInstance
ECL321075 | XDCtool error parser should filter out stack traceback error
ECL321158 | Config crash when XDCBUILDCFG assigned a file with a space in its path
ECL322858 | Building Java code in packages fails if pathnames have spaces
ECL328989 | setting Text.isLoaded to true causes Diags_setMask() to access random memory
ECL329837 | Platform wizard throws an exception while using the TMS320DM365 device
ECL331949 | gnu.targets.ITarget.xs's link cmd should first rm the generated .map file (in case it's read only)
ECL332570 | xdc.tools.Server SecurityManager can cause CCSv5 to refuse to close
ECL332985 | gnu.targets link fails if a filename contains '-'
ECL334317 | trailing white space in XDCTARGETS corrupts the environment
ECL340213 | Platform wizard does not search user repository while importing platforms

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed in XDCtools 3.20. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.20 and later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
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Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI C54 Code Generation Tools version 4.2.0. or later
  • TI C28 Code Generation Tools version 5.2.1 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0B1 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3,7.2.0
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)

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Known Issues

ID | Headline
ECL280863 | xgconf: If instances have required args, should force user to enter something
ECL280869 | xgconf: Can create two instances with the same name
ECL305948 | xgconf does not respond to config file rename
ECL321074 | xgconf and XDCtools error parser add duplicate errors to Problems view
ECL342651 | XGCONF should allow disable static creation in a RTSC modules

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: May 02, 2011 Build Ver: 3.22.00.09 Rev:


XDCtools 3.22.01.21 GA Release Notes

June 16, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory. Note that XDCtools 3.21 (supports only the MSP430 device family) is shipped only with the Grace product.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.22 :

  • XGCONF Enhancements
  • New Platform Support
  • Eclipse Integration Enhancements

XGCONF Enhancements

The following enhancements have been made to the XGCONF tool
  • Script generation now produces shorter more readable scripts
  • Real-time validation is now possible; this makes it possible to validate user input before re-building
  • Modules can now provide graphical view of their configuration parameters
  • The available packages view can now show a device specific subset

New Host Support

  • XDCtools now supports Windows 7 and Ubuntu 10.04

Eclipse Integration Enhancements

  • Product supports CCSv5 on Linux(Ubuntu 10.04) and Windows XP/7
  • An enhanced error parser is provided with this release
  • Standard make project integration allows users to leverage RTSC build within CCS.

Defect history for 3.22.01.21 (This Release)

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

The following defects were resolved in this release:

ID | Headline
ECL325514 | Platform wizard should remember the last repository selected by the user
ECL342651 | XGCONF should disable static creation in RTSC modules

back to top

Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed in XDCtools 3.20. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.20 and later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
 back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
 back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3,7.2.0
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)

back to top

Known Issues

ID | Headline
ECL280863 | xgconf: If instances have required args, should force user to enter something
ECL280869 | xgconf: Can create two instances with the same name
ECL305948 | xgconf does not respond to config file rename
ECL321074 | xgconf and XDCtools error parser add duplicate errors to Problems view

Editing RTSC .cfg file while using ROV can cause Java out of memory error

The RTSC editor for .cfg files (XGCONF), and the Runtime Object Viewer debug window (ROV) both consume a lot of Java heap memory. Using both at the same time, or editing multiple .cfg files at the same time, can cause CCS (v4 or v5) to run out of Java heap memory and crash during heavy use. Workaround is to edit only one .cfg file at a time, and close XGCONF while using ROV.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: June 16, 2011 Build Ver: 3.22.01.21 Rev:


XDCtools 3.22.02.27 GA Release Notes

July 20, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory. Note that XDCtools 3.21 (supports only the MSP430 device family) is shipped only with the Grace product.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.22 :

  • XGCONF Enhancements
  • New Platform Support
  • Eclipse Integration Enhancements

XGCONF Enhancements

The following enhancements have been made to the XGCONF tool
  • Script generation now produces shorter more readable scripts
  • Real-time validation is now possible; this makes it possible to validate user input before re-building
  • Modules can now provide graphical view of their configuration parameters
  • The available packages view can now show a device specific subset

New Host Support

  • XDCtools now supports Windows 7 and Ubuntu 10.04

Eclipse Integration Enhancements

  • Product supports CCSv5 on Linux(Ubuntu 10.04) and Windows XP/7
  • An enhanced error parser is provided with this release
  • Standard make project integration allows users to leverage RTSC build within CCS.

Defect history and changes in 3.22.02.27 (This Release)

This release supports the Concerto dual core MCU devices.

Bugs against the XDCtools product maybe filed in the eclipse bugzilla.

back to top

Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed in XDCtools 3.20. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.20 and later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
 back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
 back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3,7.2.0
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)

back to top

Known Issues

ID | Headline
ECL280863 | xgconf: If instances have required args, should force user to enter something
ECL280869 | xgconf: Can create two instances with the same name
ECL305948 | xgconf does not respond to config file rename
ECL321074 | xgconf and XDCtools error parser add duplicate errors to Problems view

Editing RTSC .cfg file while using ROV can cause Java out of memory error

The RTSC editor for .cfg files (XGCONF), and the Runtime Object Viewer debug window (ROV) both consume a lot of Java heap memory. Using both at the same time, or editing multiple .cfg files at the same time, can cause CCS (v4 or v5) to run out of Java heap memory and crash during heavy use. Workaround is to edit only one .cfg file at a time, and close XGCONF while using ROV.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: July 20, 2011 Build Ver: 3.22.02.27 Rev:


XDCtools 3.22.03.41 GA Release Notes

September 16, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts as well as core packages used during the configuration and target execution of RTSC modules;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products; and finally
  • Eclipse (eclipse) - a set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed online in the RTSC-Pedia.

Release notes from previous product releases are available in the relnotes_archive directory. Note that XDCtools 3.21 (which supports only the MSP430 device family) is shipped only with the Grace product.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.22 :

  • XGCONF Enhancements
  • New Platform Support
  • Eclipse Integration Enhancements

XGCONF Enhancements

  • Script generation now produces shorter more readable scripts
  • Real-time validation is now possible; this makes it possible to validate user input before re-building
  • Modules can now provide graphical view of their configuration parameters
  • The available packages view can now show a device specific subset

New Host and Target Platform Support

  • XDCtools now supports Windows 7 and Ubuntu 10.04
  • added support for the evm5525, evmAM3359, ezdsp5502, and ezdsp5535 hardware platforms (ti.platforms.evm5525, ti.platforms.evmAM3359, ti.platforms.ezdsp5502, ti.platforms.ezdsp5535)
  • added Arm A8 Neon, vector floating point target (ti.targets.arm.elf.A8Fnv)
  • added support for TI's MSP430 4.0 compiler (COFF only)
  • added support for TI's Arm 4.9 compiler

Eclipse Integration Enhancements

  • Product supports CCSv5 on Linux(Ubuntu 10.04) and Windows XP/7
  • An enhanced error parser is provided with this release
  • Standard make project integration allows users to leverage RTSC build within CCS.

Defect history and changes in 3.22.03.41 (This Release)

ID | Headline
351983 | dependencies between executables and imported libraries is broken
291686 | multiple imports of the same named module do not trigger error
344740 | Error when SourceDir.outputDir is set to a relative path within a directory with spaces
355425 | configuro output directory names can't end with a slash
347085 | configuro syntax error in generated config.bld
354063 | Concerto 28x memory map needs to reserve FLASH/password section

Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available.
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed in XDCtools 3.20. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.20 and later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
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Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3,7.2.0
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian,C66,C66_big_endian] | 7.0.3 (TMS320C6x, COFF)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C66,C66_big_endian,C674,C674_big_endian,C67P] | 7.2.0 (TMS320C6x, ELF)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | 14.01.60511 (Microsoft WinCE 6.00)
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0 (MSP430)

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Known Issues

ID | Headline
280863 | xgconf: If instances have required args, should force user to enter something
280869 | xgconf: Can create two instances with the same name
305948 | xgconf does not respond to config file rename
321074 | xgconf and XDCtools error parser add duplicate errors to Problems view

Editing RTSC .cfg file while using ROV can cause Java out of memory error

The RTSC editor for .cfg files (XGCONF), and the Runtime Object Viewer debug window (ROV) both consume a lot of Java heap memory. Using both at the same time, or editing multiple .cfg files at the same time, can cause CCS (v4 or v5) to run out of Java heap memory and crash during heavy use. Workaround is to edit only one .cfg file at a time, and close XGCONF while using ROV.

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Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

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Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases and RTSC-Pedia (http://rtsc.eclipse.org/docs) for the latest documentation.

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Last updated: September 16, 2011 Build Ver: 3.22.03.41 Rev:


XDCtools 3.22.04.46 GA Release Notes

October 10, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts as well as core packages used during the configuration and target execution of RTSC modules;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products; and finally
  • Eclipse (eclipse) - a set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
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Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed online in the RTSC-Pedia.

Release notes from previous product releases are available in the relnotes_archive directory. Note that XDCtools 3.21 (which supports only the MSP430 device family) is shipped only with the Grace product.

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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.22 :

  • XGCONF Enhancements
  • New Platform Support
  • Eclipse Integration Enhancements

XGCONF Enhancements

  • Script generation now produces shorter more readable scripts
  • Real-time validation is now possible; this makes it possible to validate user input before re-building
  • Modules can now provide graphical view of their configuration parameters
  • The available packages view can now show a device specific subset

New Host and Target Platform Support

  • XDCtools now supports Windows 7 and Ubuntu 10.04
  • added support for the evm5525, evmAM3359, ezdsp5502, and ezdsp5535 hardware platforms (ti.platforms.evm5525, ti.platforms.evmAM3359, ti.platforms.ezdsp5502, ti.platforms.ezdsp5535)
  • added Arm A8 Neon, vector floating point target (ti.targets.arm.elf.A8Fnv)
  • added support for TI's MSP430 4.0 compiler (COFF only)
  • added support for TI's Arm 4.9 compiler

Eclipse Integration Enhancements

  • Product supports CCSv5 on Linux(Ubuntu 10.04) and Windows XP/7
  • An enhanced error parser is provided with this release
  • Standard make project integration allows users to leverage RTSC build within CCS.

Defect history and changes in 3.22.04.46 (This Release)

ID | Headline
351983 | dependencies between executables and imported libraries is broken
291686 | multiple imports of the same named module do not trigger error
344740 | Error when SourceDir.outputDir is set to a relative path within a directory with spaces
355425 | configuro output directory names can't end with a slash
347085 | configuro syntax error in generated config.bld
354063 | Concerto 28x memory map needs to reserve FLASH/password section

Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available.
  • Packages with meta-only content are forwards and backwards compatible starting from XDCtools 2.95.01
  • xdc.runtime.ILogger interface has changed in XDCtools 3.20. The rest of the xdc.runtime package is source compatible with XDCtools releases starting from version 3.00. Target content using this package needs to be recompiled from source.
  • xdc.runtime.knl package is source compatible with XDCtools releases starting from version 3.15. Target content using this package needs to be recompiled from source.
  • Compatibility with specific products
    • SYS/BIOS 6.2x or earlier- Incompatible due to changes in xdc.runtime and C6000 compiler versions
    • SYS/BIOS 6.30 - Compatible
    • DSP/BIOS 5.33.05 or earlier - Compatible but some users may see references to ti.catalog.c470
    • DSP/BIOS 5.33.06 or later - Compatible
    • Codec Engine 3.20 and later - Compatible
    • Codec Engine 3.00 - Incompatible because of SYS/BIOS 6.2x and changes to xdc.runtime.ILogger
    • Codec Engine 2.24,2.25 - Compatible
    • Codec Engine 2.20,2.10 - Requires upgrade to DSP/BIOS 5.33.06 or later for compatibility
    • Codec Engine 2.00,1.x - Incompatible because of xdc.runtime changes

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
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Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI C55 Code Generation Tools version 3.2.0. or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3,7.2.0
  • TI MSP430 Code Generation Tools version 3.3.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian,C66,C66_big_endian] | 7.0.3 (TMS320C6x, COFF)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C66,C66_big_endian,C674,C674_big_endian,C67P] | 7.2.0 (TMS320C6x, ELF)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | 14.01.60511 (Microsoft WinCE 6.00)
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0 (MSP430)

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Known Issues

ID | Headline
280863 | xgconf: If instances have required args, should force user to enter something
280869 | xgconf: Can create two instances with the same name
305948 | xgconf does not respond to config file rename
321074 | xgconf and XDCtools error parser add duplicate errors to Problems view

Editing .cfg files with XGCONF while using ROV can cause Java out of memory error

The graphical editor for .cfg files (XGCONF) and the Runtime Object Viewer debug window (ROV) both consume a lot of Java heap memory. Using both at the same time, or editing multiple .cfg files at the same time, can cause CCS (v4 or v5) to run out of Java heap memory and crash during heavy use. Workaround is to edit only one .cfg file at a time, and close XGCONF while using ROV.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases and RTSC-Pedia (http://rtsc.eclipse.org/docs) for the latest documentation.

back to top

Last updated: October 10, 2011 Build Ver: 3.22.04.46 Rev:


XDCtools 3.23.00.32 GA Release Notes

November 16, 2011

Introduction, Documentation, License, What's New, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
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Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory. Note that XDCtools 3.21 (supports only the MSP430 device family) is shipped only with the Grace product.

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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

The following significant changes are included in XDCtools 3.23 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.1.0. However, note that this release will no longer work with versions of CCS prior to v5.1.0.
  • To align XDCtools with Code Composer Studio 5.1.0, the default directory of its installers are as follows:
Host OS | Default Install Directory
MS Windows (XP and 7) | C:\ti
Linux root user | /opt/ti
Linux non-root user | $HOME/ti
  • Calls to Mod_construct() are now permissable in static-only systems.
  • Added Android target support (google.targets.arm.Bionic)
  • Added gcc ARM Cortex M3/M4 target support (gnu.targets.arm.M3, gnu.targets.arm.M4, gnu.targets.arm.M4F, gnu.targets.arm.rtsv7M)
  • Added gcc Stellaris target support (ti.platforms.stellaris)

Defect history for 3.23.00.32 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

The following defects were resolved in this release:

ID | Headline
361975 | add targets for gcc M3/M4 and update ti.platforms.stellaris to support gcc
324012 | Support for RTSC integration for standard make projects in eclipse
345297 | Program.sectMap should be editable in XGCONF
349505 | static only policy should allow runtime constructs
361185 | update SourceDir's makefile.lib to make the clean rule work better for custom build
363228 | Setting Hwi/Swi stack size in Hwi grace page does not work
345462 | MSP430 Generic Platform linker command files should add add " --args 0" by default
360296 | Incorrect memory page attribute handling in Utils.checkFit
360297 | Incorrect page attribute for simArctic platform
361972 | update SysMin to support HOSTwrite during flushAtExit for gcc
363104 | Add gnu alignment support to obj.$$alloc
282605 | platform getExec should support repositories with spaces

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
 back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
 back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.1.0.90000
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3, 7.2.0B2
  • TI MSP430 Code Generation Tools version 3.4.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

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Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: November 16, 2011 Build Ver: 3.23.00.32 Rev:


XDCtools 3.23.01.43 GA Release Notes

February 10, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory. Note that XDCtools 3.21 (supports only the MSP430 device family) is shipped only with the Grace product.

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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

back to top

Special Notes

The following significant changes are included in XDCtools 3.23 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.1.0. However, note that this release will no longer work with versions of CCS prior to v5.1.0.
  • To align XDCtools with Code Composer Studio 5.1.0, the default directory of its installers are as follows:
Host OS | Default Install Directory
MS Windows (XP and 7) | C:\ti
Linux root user | /opt/ti
Linux non-root user | $HOME/ti

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What's New

  • Added new platform support for OMAPL138 Low Cost Development Kit (LCDK) board
  • Added new platform support for C6748 Low Cost Development Kit (LCDK) board
  • Added new target support for the QNX real-time operating system

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Defect history for 3.23.01.43 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

The following defects and enhancement requests were resolved in this release. For more information on these bugs, or to see a more up to date list, go here.

ID | Description
360745 | remove --symbol_map from linker.cmd (.xdl) files for TI/ELF targets
364431 | xdc.runtime Grace .xml files need to be updated to use new instance scheme
366639 | move 'atexit()' call in System to a "lastFxn" instead of module_startup
366646 | Add new platforms for OMAPL138 and C6748 Low cost development kit (LCDK) boards
367139 | M3 and C28 frequencies need to be shown on the Concerto Boot config page
367140 | The flash is slow on Concerto's M3 with SYS/BIOS
367520 | MSP430F2618 timer interrupts and number of interrupts in peripheral definitions is incorrect
367674 | A command line passed to xdc.exec works on Windows but fails on Linux
367805 | tar-based release archives may include excluded directories.
369158 | generated instance create function sometimes contains unnecessary initialized variables
369572 | google.targets's remoteHost support should switch from rsh to ssh
369719 | Enable targets to create/set new env vars when executing cmds
370016 | Add QNX target

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
 back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.1.0.90000
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3, 7.2.0B2
  • TI MSP430 Code Generation Tools version 3.4.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

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Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: February 10, 2012 Build Ver: 3.23.01.43 Rev:


XDCtools 3.23.02.47 GA Release Notes

March 21, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

back to top

Special Notes

The following significant changes are included in XDCtools 3.23 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0. However, note that this release will no longer work with versions of CCS prior to v5.1.0.

back to top

What's New

  • Added new target support for the TMS320C6671 device.
  • Added new target support for ARP32.
  • Added new platform support for the TMS320TCI6614 EVM.

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Defect history for 3.23.02.47 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

The following defects and enhancement requests were resolved in this release. For more information on these bugs, or to see a more up to date list, go here.

ID | Description
373395 | Allow targets to be mapped by device XML files
372067 | Stellaris generic platform for GNU target has insufficient VECS section length for LM4F232H5QD

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 4.2.0.10017 and 5.0.0.00095. Note that this release will not work with CCS 4.1.3 and earlier releases.
 back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
 back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.2.0.
  • TI ARM Code Generation Tools version 4.9.0
  • TI C6x Code Generation Tools version 7.0.3, 7.2.0B2
  • TI MSP430 Code Generation Tools version 3.4.0
  • TI C28 Code Generation Tools version 5.2.3
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

back to top

Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: March 21, 2012 Build Ver: 3.23.02.47 Rev:


XDCtools 3.23.03.53 GA Release Notes

April 30, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

back to top

Special Notes

The following significant changes are included in XDCtools 3.23 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0. However, note that this release will no longer work with versions of CCS prior to v5.1.1.

back to top

What's New

  • Added C6A8149 catalog files and evmC6A8149 platform package (CentEVE).
  • Added Vayu catalog files and simVayu platform package
  • Added support for TI ARM Codegen tools version 5.x

back to top

Defect history for 3.23.03.53 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

The following defects and enhancement requests were resolved in this release. For more information on these bugs, or to see a more up to date list, go here.

ID | Description
376327 | ROV can hang CCS when single-stepping thru assembly code
376538 | CDOC for @NoRuntime modules is wrong
376795 | UInt64 is incorrectly defined in ti/targets/std.h
377588 | install .zip files for CCS are missing the M4 and gcc libraries for M3/M4.

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 5.1.1 (or later).
 back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
 back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.2.0.
  • TI ARM Code Generation Tools version 4.9.1
  • TI C6x Code Generation Tools version 7.3.4
  • TI MSP430 Code Generation Tools version 4.1.0
  • TI C28 Code Generation Tools version 6.1.0
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

back to top

Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: April 30, 2012 Build Ver: 3.23.03.53 Rev:


XDCtools 3.23.04.60 GA Release Notes

July 09, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

back to top

Special Notes

The following significant changes are included in XDCtools 3.23 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0. However, note that this release will no longer work with versions of CCS prior to v5.1.1.

back to top

What's New

  • Add FLASH configuration support to the C28x Boot module

back to top

Defect history for 3.23.04.60 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

The following defects and enhancement requests were resolved in this release. For more information on these bugs, or to see a more up to date list, go here.

ID | Description
380759 | xdc.loadXML() should ignore leading white space in XML files
371035 | Vers and What fail in locales with wide characters
377712 | XDCspec parser does not recognize '**/' as the end of a comment
366475 | configuro generates a wrong linker.cmd when a tcf file is present
369573 | Migrate .remoteHost support for all targets (gnu.targets, etc) from rsh to ssh
361992 | update Concerto Boot modules to show all clocks and config FLASH wait states
367140 | The flash is slow on Concerto's M3 with SYS/BIOS
349519 | ti.catalog.c2800.init.Boot.xs this.$logError() needs to be updated

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 5.1.1 (or later).
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.2.0.
  • TI ARM Code Generation Tools version 4.9.1
  • TI C6x Code Generation Tools version 7.3.4
  • TI MSP430 Code Generation Tools version 4.1.0
  • TI C28 Code Generation Tools version 6.1.0
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

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Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

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Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

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Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

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Last updated: July 09, 2012 Build Ver: 3.23.04.60 Rev:


XDCtools 3.24.00.08 GA Release Notes

February 06, 2012

Introduction, License, What's New, Upgrade & Compatibility Information, Host Support, Device Support, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

What's New

This release of XDCtools is exclusively for use with the MSP430 Grace stand-alone product.

Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7

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Device Support

This release is solely for use within the MSP430 Grace stand-alone product.

 back to top

Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

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Technical Support

We encourage you to alert the Grace development team to any issues you may find. Post any issues or questions to the TI E2E forum at: http://www.ti.com/gracefeedback.

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Last updated: February 06, 2012 Build Ver: 3.24.00.08 Rev:


XDCtools 3.24.01.29 GA Release Notes

September 05, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

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Special Notes

The following significant changes are included in XDCtools 3.24 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0 and above. However, note that this release will no longer work with versions of CCS prior to v5.1.1.

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What's New

The following Eclipse Bugzilla items have been resolved in this release:
  • 353148 - Provide a XDC spec'd Logger implementation with classic C callouts
  • 375981 - list of nonsplittable sections for TI compilers is poorly organized
  • 285097 - consecutive ';' in package path causes compiler errors
  • 301038 - Text_putMod can overflow when Text.isLoaded = false
  • 311291 - improve the compiler version compatibility warning
  • 335495 - HeapStd should be friendlier to C runtimes where there is no "heap size"
  • 336662 - xdc.runtime.System should have System_snprintf
  • 364526 - System_printf float conversion differs from the standard C library
  • 340586 - Semaphore_pend() timeout = FOREVER

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Defect history for 3.24.01.29 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 5.1.1 (or later).
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.2.0.
  • TI ARM Code Generation Tools version 4.9.1
  • TI C6x Code Generation Tools version 7.3.4
  • TI MSP430 Code Generation Tools version 4.1.0
  • TI C28 Code Generation Tools version 6.1.0
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

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Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: September 05, 2012 Build Ver: __BUILDVER__ Rev: q29


XDCtools 3.24.02.30 GA Release Notes

September 14, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

back to top

Special Notes

The following significant changes are included in XDCtools 3.24 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0 and above. However, note that this release will no longer work with versions of CCS prior to v5.1.1.

back to top

What's New

This release has been updated to allow the Grace 1.x and 2.x products to work in Code Composer Studio 5.3.0.

back to top

Defect history for 3.24.02.30 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

back to top

Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 5.1.1 (or later).
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
back to top

Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.2.0.
  • TI ARM Code Generation Tools version 4.9.1
  • TI C6x Code Generation Tools version 7.3.4
  • TI MSP430 Code Generation Tools version 4.1.0
  • TI C28 Code Generation Tools version 6.1.0
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

back to top

Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: September 14, 2012 Build Ver: __BUILDVER__ Rev: q30


XDCtools 3.24.03.33 GA Release Notes

September 27, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

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License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

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Special Notes

The following significant changes are included in XDCtools 3.24 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0 and above. However, note that this release will no longer work with versions of CCS prior to v5.1.1.

back to top

What's New

This release has been updated to support the Grace 2.0 Beta and SYS/BIOS 6.34 GA products to work in Code Composer Studio 5.3.0.

back to top

Defect history for 3.24.03.33 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

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Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
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Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 5.1.1 (or later).
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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.2.0.
  • TI ARM Code Generation Tools version 4.9.1
  • TI C6x Code Generation Tools version 7.3.4
  • TI MSP430 Code Generation Tools version 4.1.0
  • TI C28 Code Generation Tools version 6.1.0
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

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Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

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Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

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Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

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Last updated: September 27, 2012 Build Ver: __BUILDVER__ Rev: q33


XDCtools 3.24.04.38 GA Release Notes

October 16, 2012

Introduction, Documentation, License, Special Notes, What's New, Defect History, Upgrade & Compatibility Information, Host Support, Dependencies, Device Support, Validation Info, Known Issues, Version Information, Technical Support.

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by CCS (Code Composer Studio) to provide support for integrating RTSC content in the IDE environment.
back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

License

XDCtools contains elements released under the Eclipse Public License v1.0 and a number of other open-source licenses, detailed here.

back to top

Special Notes

The following significant changes are included in XDCtools 3.24 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0 and above. However, note that this release will no longer work with versions of CCS prior to v5.1.1.

back to top

What's New

This release has been updated to support the Grace 2.0 GA and SYS/BIOS 6.34 GA products to work in Code Composer Studio 5.3.0.

back to top

Defect history for 3.24.04.38 (This Release)

Bugs against the XDCtools product may be filed in Eclipse Bugzilla.

back to top

Upgrade and Compatibility Information

The following section describes compatibility breaks, and workarounds where available
  • Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDC product release numbers.

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.
back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 5.1.1 (or later).
back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)
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Validation Information

This release was built and validated against using the following components:

  • Code Composer Studio version 5.2.0.
  • TI ARM Code Generation Tools version 4.9.1
  • TI C6x Code Generation Tools version 7.3.4
  • TI MSP430 Code Generation Tools version 4.1.0
  • TI C28 Code Generation Tools version 6.1.0
  • GCC for ARM version 4.3.2 (CodeSourcery), 4.2.1 and 3.4.3 (Montavista)
The code generation tools used for the various RTSC targets shipped with the product are shown below:

RTSC Target | Code Generation Tools
ti.targets.[C64P,C64P_big_endian,C67P,C674,C674_big_endian,C64T,C64T_big_endian] | 7.0.3 (TMS320C6x)
ti.targets.[C28,C28_large,C28_float] | 5.2.3 (TMS320C2000)
ti.targets.[C66,C66_big_endian];ti.targets.elf.[C64P,C64P_big_endian,C64T,C64T_big_endian,C674,C674_big_endian,C67P,C66,C66_big_endian] | 7.2.0 (TMS320C6x)
ti.targets.arm.elf.[TMS470,Arm7,Arm9,Arm9t,A8Ft,M3,M3_big_endian,R4,R4_big_endian,R4t,R4t_big_endian,R4F,R4F_big_endian,R4Ft_big_endian] | 4.9.0 (ARM/TMS470)
gnu.targets.MVArm9,gnu.targets.arm.GCArmv5T | 3.4.3 (GCC Montavista)
gnu.targets.UCArm9 | 4.2.1 (GCC Opensource)
gnu.targets.arm.GCArmv6,GCArmv7A | 4.3.2 (GCC Codesourcery)
gnu.targets.[Linux86,Sparc] | 4.1.0 (GCC Opensource)
gnu.targets.Mingw | 4.4.0 (GCC MingW)
microsoft.targets.Net32 | 13.10.3052 (Microsoft .NET C/C++)
microsoft.targets.Win32 | 14.00.50727.42 (Microsoft Visual C/C++)
microsoft.targets.VC98 | 12.00.8168 (Microsoft Visual C/C++)
microsoft.targets.arm.WinCE | Microsoft WinCE 6.00
ti.targets.msp430.[MSP430,MSP430X,MSP430X_small] | 3.3.0(MSP430)
Android Bionic | 4.4.3

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Known Issues

To see a complete list of XDCTools issues, see the Eclipse Bugzilla.

back to top

Version Information

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support

Support questions on the product should be posted to the RTSC newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: October 16, 2012 Build Ver: __BUILDVER__ Rev: q38


XDCtools 3.24.05.48 GA Release Notes

November 07, 2012

Introduction Licensing Documentation What's New Upgrade & Compatibility Information Host Support Dependencies Device Support Validation Information Known Issues Versioning Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses, detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following significant changes are included in XDCtools 3.24 :

  • The XDCtools product has been extended to work with Code Composer Studio v5.2.0 and above. However, note that this release will no longer work with versions of CCS prior to v5.1.1.
  • This release has been updated to support the Grace 2.0 and SYS/BIOS 6.34 products within Code Composer Studio 5.3.0 as well as the Grace Stand-Alone Tool.

The following defects were resolved in this release:

ID | Headline
282572 | Assert_isTrue(cond,NULL) fails
323520 | IAR target should be provided
340586 | Semaphore_pend() timeout = FOREVER
353148 | Provide a XDC spec'd Logger implementation with classic C callouts
392368 | configuro fails with mysterious error if cfgArgs has quotes
393694 | configuro should log errors to enhance error reporting by other tools

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Upgrade and Compatibility Information

Packages are forwards and backwards compatible starting from XDCtools 3.20

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below).

Package compatibility keys are intended to:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey a level of compatibility between different releases to set end user expectations.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer’s source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0 or later
  • TI ARM Code Generation Tools version 4.5 or later
  • TI MSP430 Code Generation Tools version 3.3.0 or later
  • GCC for x86 version 3.2.3 or later
  • GCC for ARM version 3.2.3 or later
  • Code Composer Studio version 5.1.1 (or later).

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

back to top

Validation Information

This release was built and validated using Code Composer Studio version 5.3.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

back to top

Known Issues

To see a complete list of XDCTools issues, go to the Eclipse RTSC project's Bugzilla database.

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, EA etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng).

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: November 07, 2012 Build Ver: 3.24.05.48 Rev: q48


XDCtools 3.24.06.63 GA Release Notes

January 25, 2013

Introduction Licensing Documentation What's New Upgrade & Compatibility Information Host Support Dependencies Device Support Validation Information Known Issues Versioning Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete list is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following significant changes are included in XDCtools 3.24 :

To make sure that this release of XDCTools is aligned with the Code Composer Studio 5.4 release, the GCC ARM toolchains has been changed to Linaro 4.7. If you are building your product with the GCC ARM compiler, you should migrate to this toolchain.

The following defects and enhancements were resolved in this release:

ID | Headline
397044 | IAR targets should set shortEnums to true
394584 | issues with "TREX/NPW" in trexgen and plugingen
394586 | trexgen needs to support the "name" property for .xml files
396957 | Linux86 target improperly defines Int32 and Bits32 for LP64 Linux
397928 | ti.catalog.arm.cortexm4 package doesn't instantiate peripheral for VAYU
389911 | boot.c for arp32 requires 'near' qualifiers for _cleanup_ptr and _dtors_ptr
393596 | Stellaris LM4F defaults at 40MHz instead of 80MHz
396676 | document getLibs() support for libs that don't yet exist
SDOCM00097826 | Add platform file and support for BeagleBone AM335x

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Upgrade and Compatibility Information

The ti.targets.arm and ti.targets.rts470 packages have been removed. If you are using any of the targets supported by these packages, you'll need to use the equivalient targets that are in the ti.targets.arm.elf package and their corresponding runtime support package ti.targets.arm.rtsarm.

All generated package internal files are forwards and backwards compatible starting from XDCtools 3.20. So, packages created using this release can be consumed by XDCtools 3.20 or later. Conversely, packages created using XDCtools 3.20 or later can be consumed using this release. See XDCtools Internal Version Numbers for additional details.

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below).

Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible
  • If you are using Code Composer Studio, then you should CCS 5.1.1 (or later).

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

back to top

Validation Information

This release was built and validated using Code Composer Studio version 5.3.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see some highlighted issues with some targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of XDCTools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail
399007 | gnu.targets.M3/M4/M4F do not support 'clock()' and possibly other POSIX APIs
399006 | ti.targets.*.C6* linker command files are missing .ppinfo and .ppdata sections

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

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Last updated: January 25, 2013 Build Ver: 3.24.06.63 Rev: q63


XDCtools 3.24.07.73 GA Release Notes

March 28, 2013

Introduction Licensing Documentation What's New Upgrade & Compatibility Information Host Support Dependencies Device Support Validation Information Known Issues Versioning Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

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Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete list is detailed here.

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Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

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What's New

The following significant changes are included in XDCtools 3.24 :

  • Added support for TCI663x (Keystone II) devices.

In addition, the following defects resolved in this release:

ID | Headline
399006 | ti.targets.*.C6* linker command files are missing .ppinfo and .ppdata sections
399007 | gnu.targets.M3/M4/M4F do not support 'clock()' and possibly other POSIX APIs
399012 | ti.targets.arm.ARP32_far link may fail
400245 | Boot.xml file in catalog.arm.cortexm3.lm3init has bad copyright header
403849 | update MSP430 target to support 4.2.0 compiler (_cleanup_ptr -> __TI_cleanup_ptr name change)

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Upgrade and Compatibility Information

The ti.targets.arm and ti.targets.rts470 packages have been removed. If you are using any of the targets supported by these packages, you'll need to use the equivalient targets that are in the ti.targets.arm.elf package and their corresponding runtime support package ti.targets.arm.rtsarm.

All generated package internal files are forwards and backwards compatible starting from XDCtools 3.20. So, packages created using this release can be consumed by XDCtools 3.20 or later. Conversely, packages created using XDCtools 3.20 or later can be consumed using this release. See XDCtools Internal Version Numbers for additional details.

Package Compatibility Keys

The packages comprising the XDCtools release are uniquely identified by a compatibility key defined in the package.xdc file of a package. Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below).

Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch - A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

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Dependencies

This release requires the following other software components and tools versions to successfully function:

  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible
  • If you are using Code Composer Studio, then you should CCS 5.1.1 (or later).

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Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

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Validation Information

This release was built and validated using Code Composer Studio version 5.3.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

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Known Issues

To see a complete list of XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

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Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: March 28, 2013 Build Ver: 3.24.07.73 Rev: q73


XDCtools 3.25.00.48 GA Release Notes

March 13, 2013

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following significant changes are included in this release:

ID | Headline
288370 | xdc_String should be const char*
398836 | remove C54 and C55 targets from ti.targets
400376 | remove legacy platforms
400375 | remove legacy BIOS 5 tconf support

The following notable defects and enhancements were also resolved in this release:

ID | Headline
335495 | HeapStd should support unlimited "heap size"
336662 | xdc.runtime.System should have System_snprintf

To see a complete list of issues fixed in this release, click here.

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Upgrade and Compatibility Information

Additions

The following table lists the targets, platforms, and other packages that have been added (relative to XDCtools 3.24.x).

Category | Packages
Targets |
Platforms | ti.platforms.arm, ti.platforms.arp32, ti.platforms.c6000, ti.platforms.evmTCI6638K2K
Other |

Deletions

The legacy BIOS 5 tconf configuration utility has been removed along will all support for .tcf configuration scripts.

The following table lists the targets, platforms, and other packages that have been removed (relative to XDCtools 3.24.x).

Category | Packages
Targets | gnu.targets.arm.rts470MV gnu.targets.arm.rts470uC, gnu.targets.rts470MV, gnu.targets.rts470uC, ti.targets.rts5400, ti.targets.rts5500
Platforms | ti.platforms.app510, ti.platforms.control28055, ti.platforms.doc, ti.platforms.dsk5402, ti.platforms.dsk5416, ti.platforms.dsk5505, ti.platforms.dsk5510, ti.platforms.dsk6211, ti.platforms.dsk6416, ti.platforms.dsk6711, ti.platforms.dsk6713, ti.platforms.evm2530, ti.platforms.evm5471, ti.platforms.evm5505, ti.platforms.evm5505ext, ti.platforms.evm5509, ti.platforms.evm5509A, ti.platforms.evm5515, ti.platforms.evm5517, ti.platforms.evm5525, ti.platforms.evmC6A8168, ti.platforms.evmDM357, ti.platforms.evmDM420, ti.platforms.evmDM642, ti.platforms.evmDM6446, ti.platforms.evmDM6467, ti.platforms.evmDM6467T, ti.platforms.evmDRA416, ti.platforms.evmDRA446, ti.platforms.evmDRA459, ti.platforms.expOMAPL138, ti.platforms.ezdsp2808, ti.platforms.ezdsp2812, ti.platforms.ezdsp5502, ti.platforms.ezdsp5505, ti.platforms.ezdsp5535, ti.platforms.h2omap1610, ti.platforms.h3omap1710, ti.platforms.h4omap2420, ti.platforms.innovator1510, ti.platforms.osk5912, ti.platforms.padk6727, ti.platforms.sdbTitan, ti.platforms.sdp2430, ti.platforms.sim2810, ti.platforms.sim54xx, ti.platforms.sim55xx, ti.platforms.sim62xx, ti.platforms.sim64xx, ti.platforms.sim67xx, ti.platforms.simDM420, ti.platforms.simDM730, ti.platforms.simDM740, ti.platforms.simDucati, ti.platforms.simTCI6498, ti.platforms.skAM3358, ti.platforms.teb5561, ti.platforms.teb6416, ti.platforms.app510
Other | xdc.tools.configuro.ccs, ti.catalog.c5400, ti.catalog.c5500

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the new target type CString, packages created with this release that contain non-metaonly modules can not be used with earlier XDCtools releases. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

With the exception of a C compiler, XDCtools is q fully self-contained set of development tools to build and run embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 5.4 (or later).
  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • TI C28x Code Generation Tools version 5.2.3 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 5.4.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail
399007 | gnu.targets.M3/M4/M4F do not support 'clock()' and possibly other POSIX APIs

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: March 13, 2013 Build Ver: 3.25.00.48 Rev: r48


XDCtools 3.25.01.65 GA Release Notes

June 11, 2013

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following significant changes are included in this release:

  • Added support for MSP430F5259 devices
  • Added support for MSP430FR58xx and MSP430FR59xx devices
  • Added support in ROV threads to use DSS packages for stack backtrace feature

The following notable defects and enhancements were also resolved in this release:

ID | Headline
407679 | memory is setup incorrectly in TMS320F28332.cmd file
405824 | When loading jvm.dll, xs.exe should find msvcr71.dll in jre/bin

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Additions

The following table lists the targets, platforms, and other packages that have been added (relative to XDCtools 3.24.x).

Category | Packages
Targets |
Platforms | ti.platforms.arm, ti.platforms.arp32, ti.platforms.c6000, ti.platforms.evmTCI6638K2K, ti.platforms.evmDRA7XX
Other |

Deletions

The legacy BIOS 5 tconf configuration utility has been removed along will all support for .tcf configuration scripts.

The following table lists the targets, platforms, and other packages that have been removed (relative to XDCtools 3.24.x).

Category | Packages
Targets | gnu.targets.arm.rts470MV gnu.targets.arm.rts470uC, gnu.targets.rts470MV, gnu.targets.rts470uC, ti.targets.rts5400, ti.targets.rts5500
Platforms | ti.platforms.app510, ti.platforms.control28055, ti.platforms.doc, ti.platforms.dsk5402, ti.platforms.dsk5416, ti.platforms.dsk5505, ti.platforms.dsk5510, ti.platforms.dsk6211, ti.platforms.dsk6416, ti.platforms.dsk6711, ti.platforms.dsk6713, ti.platforms.evm2530, ti.platforms.evm5471, ti.platforms.evm5505, ti.platforms.evm5505ext, ti.platforms.evm5509, ti.platforms.evm5509A, ti.platforms.evm5515, ti.platforms.evm5517, ti.platforms.evm5525, ti.platforms.evmC6A8168, ti.platforms.evmDM357, ti.platforms.evmDM420, ti.platforms.evmDM642, ti.platforms.evmDM6446, ti.platforms.evmDM6467, ti.platforms.evmDM6467T, ti.platforms.evmDRA416, ti.platforms.evmDRA446, ti.platforms.evmDRA459, ti.platforms.expOMAPL138, ti.platforms.ezdsp2808, ti.platforms.ezdsp2812, ti.platforms.ezdsp5502, ti.platforms.ezdsp5505, ti.platforms.ezdsp5535, ti.platforms.h2omap1610, ti.platforms.h3omap1710, ti.platforms.h4omap2420, ti.platforms.innovator1510, ti.platforms.osk5912, ti.platforms.padk6727, ti.platforms.sdbTitan, ti.platforms.sdp2430, ti.platforms.sim2810, ti.platforms.sim54xx, ti.platforms.sim55xx, ti.platforms.sim62xx, ti.platforms.sim64xx, ti.platforms.sim67xx, ti.platforms.simDM420, ti.platforms.simDM730, ti.platforms.simDM740, ti.platforms.simDucati, ti.platforms.simTCI6498, ti.platforms.skAM3358, ti.platforms.teb5561, ti.platforms.teb6416, ti.platforms.app510
Other | xdc.tools.configuro.ccs, ti.catalog.c5400, ti.catalog.c5500

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the new target type CString, packages created with this release that contain non-metaonly modules can not be used with earlier XDCtools releases. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to build and run embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 5.4 (or later).
  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • TI C28x Code Generation Tools version 5.2.3 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 5.4.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: June 11, 2013 Build Ver: 3.25.01.65 Rev: r65


XDCtools 3.25.02.70 GA Release Notes

July 11, 2013

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following notable defects and enhancements were also resolved in this release:

ID | Headline
411544 | C++ global object constructors do not get called in apps built for Cortex-A GNU targets
411828 | Need to add ti.platforms.evmTCI6636K2H platform
364371 | opening a .cfg file in a standard make project triggers NPE
409620 | Platform Wizard doesn't offer evm6670 as a base platform when the selected device is TMS320C6670
410545 | Wizard-generated platforms used with 3.25 do not work correctly with c64p.Cache in SYS/BIOS

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the new target type CString, packages created with this release that contain non-metaonly modules can not be used with earlier XDCtools releases. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to build and run embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 5.4 (or later).
  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • TI C28x Code Generation Tools version 5.2.3 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 5.4.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: July 11, 2013 Build Ver: 3.25.02.70 Rev: r70


XDCtools 3.25.03.72 GA Release Notes

July 26, 2013

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following notable defects and enhancements were also resolved in this release:

ID | Headline
412803 | Codegen 5.1.0 fails to build and link for A8Fnv

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the new target type CString, packages created with this release that contain non-metaonly modules can not be used with earlier XDCtools releases. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to build and run embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 5.4 (or later).
  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • TI C28x Code Generation Tools version 5.2.3 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio versions 5.4.0 and 5.5.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: July 26, 2013 Build Ver: 3.25.03.72 Rev: r72


XDCtools 3.25.04.88 GA Release Notes

October 17, 2013

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

  • Added semi-hosting support for ARM Cortex-M GNU targets (semi-hosting supported in CCS v6+)
  • Added device and EVM platform support for K2E and K2L

The following notable defects and enhancements were also resolved in this release:

ID | Severity | Headline
417736 | critical | ErrorParser fails to add errors/warnings from config to Problems View
414529 | major | GNU target linkercmd templates do not add symbol aliases for static instance objects
418559 | normal | ti.targets.arm.elf.M4 should show em3 as a compatible suffix
413841 | normal | Remove suppress _producttype_ option from PluginGen
343592 | normal | RTSC platform wizard difficulties entering 'Base' and 'Length' for memory segment
417049 | normal | xdc.tools.loader uses an invalid Platform.create() call
407029 | normal | configuro should update compiler.opt if the generated header changes
418142 | normal | configuro fails when a full path to .cfg is passed
415391 | normal | linkcmd_bm_v7a.xdt linker command template should place intial .data values in REGION_TEXT
416976 | normal | The ti.catalog.arm.cortexm4.tiva.ce.Boot module incorrectly configures snowflake parts
414895 | normal | xdctools error parser has a dependency to com.ti.ccstudio
414047 | normal | TM4E11* devices have 6 timers, but are only assigned 4 by ti.catalog.arm.cortexm4.Stellaris"
415178 | normal | Request to add example to xdc.runtime.Startup module's cdoc

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the new target type CString, packages created with this release that contain non-metaonly modules can not be used with earlier XDCtools releases. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to build and run embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 5.4 (or later).
  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • TI C28x Code Generation Tools version 5.2.3 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio versions 5.4.0 and 5.5.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: October 17, 2013 Build Ver: 3.25.04.88 Rev: r88


XDCtools 3.25.05.94 GA Release Notes

December 20, 2013

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

  • Added support for the new Delfino F2837xD MCU Devices.

The following notable defects and enhancements were also resolved in this release:

ID | Severity | Headline
411148 | normal | cdoc omits + operator in generated docs
421566 | normal | products should allow the root directory to be declared as a repository
422502 | normal | configuro fails to update compiler.opt timestamp on A15 host
422514 | normal | xdc.tools.configuro fails to update compiler.opt when target is specified in a config.bld
419750 | normal | F1 context-sensitive help in C/C++ editor should work for all modules
421665 | major | gmake in 3.25.04 for Linux is a 64-bit app that won't run on 32-bit Linux

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the new target type CString, packages created with this release that contain non-metaonly modules can not be used with earlier XDCtools releases. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7
  • RedHat Enterprise Linux 3 and Ubuntu 10.04 . Note that IDE integration on Linux is only supported for CCSv5 on Ubuntu 10.04.

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to build and run embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 5.4 (or later).
  • TI C6x Code Generation Tools version 7.0.3 or compatible
  • TI ARM Code Generation Tools version 4.9.0 or compatible
  • TI MSP430 Code Generation Tools version 4.1.0 or compatible
  • TI C28x Code Generation Tools version 5.2.3 or compatible
  • GCC for x86 version 4.1.0 or compatible
  • GCC for ARM version 4.3.2 or compatible

back to top

Device Support

This release supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio versions 5.4.0 and 5.5.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: December 20, 2013 Build Ver: 3.25.05.94 Rev: r94


XDCtools 3.30.00.21 GA Release Notes

March 23, 2014

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

XDCtools releases prior to release 3.30 also included the following components:

  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
For more information about where these components are now available, see the Upgrade & Compatibility Information section below.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

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Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

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What's New

  • Improvements to Runtime Object Viewer tool
  • Better support for building for ROM

Over 50 issues have been addressed in this release. The following notable defects and enhancements were resolved in this release:

ID | Severity | Headline
417736 | critical | ErrorParser fails to add errors/warnings from config to Problems View
314748 | critical | xgconf: names of new instances don't always stick; sometimes rename required
425836 | major | Place all Big.c constants and data in their own section for GNU targets
280867 | major | xgconf: Add module instance while script is validating is ignored
426201 | major | GCC rtsv7M/startup.c should copy initial .data values only if load and run addresses are different
427431 | normal | "When loading jvm.dll, xs.exe can fail to find msvcr71.dll
425917 | normal | require new #define to access deprecated std.h types
425832 | normal | xdc.tools.configuro -D option does not work
424486 | normal | Products that have their own XDC runtime support need a way to disable the standard implementation
424399 | normal | Add support for new ROM build
423117 | normal | Add DWARF parser for ROV Mod_Construct support
413743 | normal | New RTSC Config wizard does not use selected project to create new cfg file.
365673 | normal | remove references to atexit(), exit() and abort() from System module
423119 | normal | iar.tools.configuro fails when multiple .cfg files are in a project.
324022 | normal | Time optimization for RTSC configuration
428926 | normal | cdoc meta-domain instance creation Params structure links to target-domain Params
427404 | normal | MSP430 rts library needs auto_init_hold_wdt to work with new --cinit_hold_wdt link option
428830 | normal | cdoc generates 'null' name for C SYNOPSIS links of instance config params
428953 | normal | cdoc meta-domain metaonly per-instance config parameters have broken links
324468 | enhancement | ROV top level views
323548 | enhancement | Reduce module list clicks in ROV
423076 | normal | Cntrl - C and Cntrl - V functionality within ROV cells does not work.
423341 | normal | HeapMin needs an ROV view
428051 | normal | LoggerBuf should set it's timestamp proxy in package close()
320943 | normal | Can't use a Module API name as a project name if xdc/cfg/globals.h is included
309891 | minor | Viewing ROV "UArg" fields in ROV should allow choosing radix

To see a complete list of issues fixed in this release, click here.

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Upgrade and Compatibility Information

Deleted Content

Beginning with the 3.30 release, all embedded targets and platforms have been removed from the default release (a.k.a. the "Core" release) so they can be delivered with middleware products, such as TI-RTOS and Grace, that have dependencies only on specific targets and platforms. This has the advantage of greatly reducing the size of XDtools for users who are only interested in a relatively small number of embedded architectures. But, it also breaks compatibility for users who expect to always have their favorite architecture's support included in XDCtools releases.

To simplify the migration to this new distribution and to support size reduced installations, XDCtools 3.30 is available in several different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
  • Legacy XDCtools: as with prior releases of XDCtools, this release is wrapped in an installer and includes both XDCtools Core and all TI supported embedded targets and platforms along with their pre-built libraries. This bundle will be eliminated in a subsequent XDCtools release.

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

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Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv5 and CCSv6 on Ubuntu 12.04.1 LTS

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Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.0 (or later): XDCtools 3.30 (or later) cannot be used in CCS 5.x.
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

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Device Support

Starting with release 3.30, each release of XDCtools is available in one of several distribution bundles each supporting a varying number of device families. This allows products (such as CCS) to selectively embed a distribution that is as small as possible.

The "Core" distribution (identified by the "_core" qualifier in installation directory name) has no embedded device support. As a result, "Core" users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The "full" distribution (identified by the lack of any qualifier in the installation directory name) supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

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Validation Information

This release was built and validated using Code Composer Studio version 6.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

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Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

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Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

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Last updated: March 23, 2014 Build Ver: 3.30.00.21 Rev: t21


XDCtools 3.30.01.25 GA Release Notes

April 08, 2014

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

XDCtools releases prior to release 3.30 also included the following components:

  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
For more information about where these components are now available, see the Upgrade & Compatibility Information section below.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

This release is virtually identical to XDCtools 3.30.00.21; the only difference is a partial fix for Bug 432052 - target mapping definitions should be found along the package path. This fix makes it easier for existing target content products released for CCS 5.x to be used within CCS 6.x.

The remainder of this section reiterates the changes between XDCtools 3.30.00 and XDCtools 3.25.05.

  • Improvements to Runtime Object Viewer tool
  • Better support for building for ROM

Over 50 issues have been addressed in this release. The following notable defects and enhancements were resolved in this release:

ID | Severity | Headline
417736 | critical | ErrorParser fails to add errors/warnings from config to Problems View
314748 | critical | xgconf: names of new instances don't always stick; sometimes rename required
425836 | major | Place all Big.c constants and data in their own section for GNU targets
280867 | major | xgconf: Add module instance while script is validating is ignored
426201 | major | GCC rtsv7M/startup.c should copy initial .data values only if load and run addresses are different
427431 | normal | "When loading jvm.dll, xs.exe can fail to find msvcr71.dll
425917 | normal | require new #define to access deprecated std.h types
425832 | normal | xdc.tools.configuro -D option does not work
424486 | normal | Products that have their own XDC runtime support need a way to disable the standard implementation
424399 | normal | Add support for new ROM build
423117 | normal | Add DWARF parser for ROV Mod_Construct support
413743 | normal | New RTSC Config wizard does not use selected project to create new cfg file.
365673 | normal | remove references to atexit(), exit() and abort() from System module
423119 | normal | iar.tools.configuro fails when multiple .cfg files are in a project.
324022 | normal | Time optimization for RTSC configuration
428926 | normal | cdoc meta-domain instance creation Params structure links to target-domain Params
427404 | normal | MSP430 rts library needs auto_init_hold_wdt to work with new --cinit_hold_wdt link option
428830 | normal | cdoc generates 'null' name for C SYNOPSIS links of instance config params
428953 | normal | cdoc meta-domain metaonly per-instance config parameters have broken links
324468 | enhancement | ROV top level views
323548 | enhancement | Reduce module list clicks in ROV
423076 | normal | Cntrl - C and Cntrl - V functionality within ROV cells does not work.
423341 | normal | HeapMin needs an ROV view
428051 | normal | LoggerBuf should set it's timestamp proxy in package close()
320943 | normal | Can't use a Module API name as a project name if xdc/cfg/globals.h is included
309891 | minor | Viewing ROV "UArg" fields in ROV should allow choosing radix

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Deleted Content

Beginning with the 3.30 release, all embedded targets and platforms have been removed from the default release (a.k.a. the "Core" release) so they can be delivered with middleware products, such as TI-RTOS and Grace, that have dependencies only on specific targets and platforms. This has the advantage of greatly reducing the size of XDtools for users who are only interested in a relatively small number of embedded architectures. But, it also breaks compatibility for users who expect to always have their favorite architecture's support included in XDCtools releases.

To simplify the migration to this new distribution and to support size reduced installations, XDCtools 3.30 is available in several different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
  • Legacy XDCtools: as with prior releases of XDCtools, this release is wrapped in an installer and includes both XDCtools Core and all TI supported embedded targets and platforms along with their pre-built libraries. This bundle will be eliminated in a subsequent XDCtools release.

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.0 (or later): XDCtools 3.30 (or later) cannot be used in CCS 5.x.
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.30, each release of XDCtools is available in one of several distribution bundles each supporting a varying number of device families. This allows products (such as CCS) to selectively embed a distribution that is as small as possible.

The "Core" distribution (identified by the "_core" qualifier in installation directory name) has no embedded device support. As a result, "Core" users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The "full" distribution (identified by the lack of any qualifier in the installation directory name) supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets supported by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
399012 | ti.targets.arm.ARP32_far link may fail

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include critical bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: April 08, 2014 Build Ver: 3.30.01.25 Rev: t25


XDCtools 3.30.02.44 GA Release Notes

June 05, 2014

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

XDCtools releases prior to release 3.30 also included the following components:

  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
For more information about where these components are now available, see the Upgrade & Compatibility Information section below.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following notable defects and enhancements were resolved in this release:

ID | Severity | Headline
433961 | critical | platformWizard can't find devices and platforms
350204 | normal | va_list assignment in printfExtend__I is unsafe for 64-bit Linux targets
431821 | normal | add explicit (Void) to parameter for implmentation of SysCallback_abort() and ready() (IAR warning)
432478 | normal | Program.linkTemplate does not properly handle paths that use Windows directory separators
433892 | normal | cdoc links can't reference doc sub-sections that contain '-' in their name
436105 | normal | add support for 64-bit targets
431745 | enhancement | need support for platform mappings in JSON files
431849 | enhancement | add a dynamic macro that looks for files along package path

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.30 should only be used in CCS 6.x (or above). Installation into CCS 5.5 (or earlier) will necessitate a re-installation of CCS 5.5.

XDCtools 3.30 releases are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.30 release, all embedded targets and platforms have been removed from the default release (a.k.a. the "Core" release) so they can be delivered with middleware products, such as TI-RTOS and Grace, that have dependencies only on specific targets and platforms. This has the advantage of greatly reducing the size of XDtools for users who are only interested in a relatively small number of embedded architectures. But, it also breaks compatibility for users who expect to always have their favorite architecture's support included in XDCtools releases.

To simplify the migration to this new distribution and to support size reduced installations, XDCtools 3.30 is available in several different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).
  • Legacy XDCtools: as with prior releases of XDCtools, this release is wrapped in an installer and includes both XDCtools Core and all TI supported embedded targets and platforms along with their pre-built libraries. This bundle will be eliminated in a subsequent XDCtools release.

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.0 (or later): XDCtools 3.30 (or later) cannot be used in CCS 5.x.
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.30, each release of XDCtools is available in one of several distribution bundles each supporting a varying number of device families. This allows products (such as CCS) to selectively embed a distribution that is as small as possible.

The "Core" distribution (identified by the "_core" qualifier in installation directory name) has no embedded device support. As a result, "Core" users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The "full" distribution (identified by the lack of any qualifier in the installation directory name) supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: June 05, 2014 Build Ver: 3.30.02.44 Rev: t44


XDCtools 3.30.03.47 GA Release Notes

June 17, 2014

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

XDCtools releases prior to release 3.30 also included the following components:

  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
For more information about where these components are now available, see the Upgrade & Compatibility Information section below.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

This release contains a number of enhancements to support the Grace 3.x product. In addition, the following bugs were resolved in this release.

ID | Severity | Headline
437226 | minor | xdc.services.mapping package is missing from the product

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.30 should only be used in CCS 6.x (or above). Installation into CCS 5.5 (or earlier) will necessitate a re-installation of CCS 5.5.

XDCtools 3.30 releases are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.30 release, all embedded targets and platforms have been removed from the default release (a.k.a. the "Core" release) so they can be delivered with middleware products, such as TI-RTOS and Grace, that have dependencies only on specific targets and platforms. This has the advantage of greatly reducing the size of XDtools for users who are only interested in a relatively small number of embedded architectures. But, it also breaks compatibility for users who expect to always have their favorite architecture's support included in XDCtools releases.

To simplify the migration to this new distribution and to support size reduced installations, XDCtools 3.30 is available in several different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).
  • Legacy XDCtools: as with prior releases of XDCtools, this release is wrapped in an installer and includes both XDCtools Core and all TI supported embedded targets and platforms along with their pre-built libraries. This bundle will be eliminated in a subsequent XDCtools release.

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.0 (or later): XDCtools 3.30 (or later) cannot be used in CCS 5.x.
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.30, each release of XDCtools is available in one of several distribution bundles each supporting a varying number of device families. This allows products (such as CCS) to selectively embed a distribution that is as small as possible.

The "Core" distribution (identified by the "_core" qualifier in installation directory name) has no embedded device support. As a result, "Core" users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The "full" distribution (identified by the lack of any qualifier in the installation directory name) supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: June 17, 2014 Build Ver: 3.30.03.47 Rev: t47


XDCtools 3.30.04.52 GA Release Notes

July 29, 2014

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

XDCtools releases prior to release 3.30 also included the following components:

  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
For more information about where these components are now available, see the Upgrade & Compatibility Information section below.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

This release contains a number of enhancements to support the Grace 3.x product. In addition, the following bugs were resolved in this release.

ID | Severity | Headline
437301 | major | xdc.cfg package.xs validate function should be implemented differently for GCC
437222 | major | c2800/initF2837x's initFlash() function needs to flush the pipeline before returning
439931 | normal | updates xdc.tools.closure to support IAR toolchain
436631 | normal | closure "Cannot read property "length" from null" error
301988 | normal | closure tool: file paths in generated linker.cmd file need to be preceded by -l
390877 | minor | Closure tool should produce deterministic output

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.30 should only be used in CCS 6.x (or above). Installation into CCS 5.5 (or earlier) will necessitate a re-installation of CCS 5.5.

XDCtools 3.30 releases are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.30 release, all embedded targets and platforms have been removed from the default release (a.k.a. the "Core" release) so they can be delivered with middleware products, such as TI-RTOS and Grace, that have dependencies only on specific targets and platforms. This has the advantage of greatly reducing the size of XDtools for users who are only interested in a relatively small number of embedded architectures. But, it also breaks compatibility for users who expect to always have their favorite architecture's support included in XDCtools releases.

To simplify the migration to this new distribution and to support size reduced installations, XDCtools 3.30 is available in several different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).
  • Legacy XDCtools: as with prior releases of XDCtools, this release is wrapped in an installer and includes both XDCtools Core and all TI supported embedded targets and platforms along with their pre-built libraries. This bundle will be eliminated in a subsequent XDCtools release.

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.0 (or later): XDCtools 3.30 (or later) cannot be used in CCS 5.x.
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.30, each release of XDCtools is available in one of several distribution bundles each supporting a varying number of device families. This allows products (such as CCS) to selectively embed a distribution that is as small as possible.

The "Core" distribution (identified by the "_core" qualifier in installation directory name) has no embedded device support. As a result, "Core" users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The "full" distribution (identified by the lack of any qualifier in the installation directory name) supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: July 29, 2014 Build Ver: 3.30.04.52 Rev: t52


XDCtools 3.30.05.60 GA Release Notes

November 04, 2014

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

XDCtools releases prior to release 3.30 also included the following components:

  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
For more information about where these components are now available, see the Upgrade & Compatibility Information section below.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

This release contains a number of bug fixes for the benefit of the MSP430 Grace peripheral configuration tool. In addition, the following is a list of bug fixes and enhancments made to the product.

ID | Severity | Headline
441537 | normal | xdc parallel build of the release goal may fail
436754 | normal | remove the hardcoded list of generic platforms
443859 | enhancement | add a dynamic macro that looks for files along package path
440170 | enhancment | gnu targets should stop using LONGNAME and the directory /bin

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.30.x should only be used in CCS 6.x (or above). Installation into CCS 5.5 (or earlier) will necessitate a re-installation of CCS 5.5.

XDCtools 3.30 releases are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.30 release, all embedded targets and platforms have been removed from the default release (a.k.a. the "Core" release) so they can be delivered with middleware products, such as TI-RTOS and Grace, that have dependencies only on specific targets and platforms. This has the advantage of greatly reducing the size of XDtools for users who are only interested in a relatively small number of embedded architectures. But, it also breaks compatibility for users who expect to always have their favorite architecture's support included in XDCtools releases.

To simplify the migration to this new distribution and to support size reduced installations, XDCtools 3.30 is available in several different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).
  • Legacy XDCtools: as with prior releases of XDCtools, this release is wrapped in an installer and includes both XDCtools Core and all TI supported embedded targets and platforms along with their pre-built libraries. This bundle will be eliminated in a subsequent XDCtools release.

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.0 (or later): XDCtools 3.30 (or later) cannot be used in CCS 5.x.
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.30, each release of XDCtools is available in one of several distribution bundles each supporting a varying number of device families. This allows products (such as CCS) to selectively embed a distribution that is as small as possible.

The "Core" distribution (identified by the "_core" qualifier in installation directory name) has no embedded device support. As a result, "Core" users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The "full" distribution (identified by the lack of any qualifier in the installation directory name) supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: November 04, 2014 Build Ver: 3.30.05.60 Rev: t60


XDCtools 3.30.06.67 GA Release Notes

January 28, 2015

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

XDCtools releases prior to release 3.30 also included the following components:

  • Targets (*.targets.*) - definitions for using various TI and third-party compiler tool chains;
  • Platforms (*.platforms.*) - definitions for linking and running code on various TI and third-party board-level hardware and simulator products.
For more information about where these components are now available, see the Upgrade & Compatibility Information section below.

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Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

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What's New

The following is a list of bug fixes and enhancments made to the product.

ID | Severity | Headline
457999 | normal | wrong type for arrays embedded in structures
454836 | normal | xdc.bld.Repository.Attrs.search does not work on Windows
449403 | normal | Text module should have an option to disable charTab array generation
451694 | enhancement | add wildcard support to the xdc_find macro

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.30.x should only be used in CCS 6.x (or above). Installation into CCS 5.5 (or earlier) will necessitate a re-installation of CCS 5.5.

XDCtools 3.30 releases are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.30 release, all embedded targets and platforms have been removed from the default release (a.k.a. the "Core" release) so they can be delivered with middleware products, such as TI-RTOS and Grace, that have dependencies only on specific targets and platforms. This has the advantage of greatly reducing the size of XDtools for users who are only interested in a relatively small number of embedded architectures. But, it also breaks compatibility for users who expect to always have their favorite architecture's support included in XDCtools releases.

To simplify the migration to this new distribution and to support size reduced installations, XDCtools 3.30 is available in several different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).
  • Legacy XDCtools: as with prior releases of XDCtools, this release is wrapped in an installer and includes both XDCtools Core and all TI supported embedded targets and platforms along with their pre-built libraries. This bundle will be eliminated in a subsequent XDCtools release.

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.0 (or later): XDCtools 3.30 (or later) cannot be used in CCS 5.x.
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.30, each release of XDCtools is available in one of several distribution bundles each supporting a varying number of device families. This allows products (such as CCS) to selectively embed a distribution that is as small as possible.

The "Core" distribution (identified by the "_core" qualifier in installation directory name) has no embedded device support. As a result, "Core" users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The "full" distribution (identified by the lack of any qualifier in the installation directory name) supports the following device families:

  • C6000 family - C674, C67P, C64P, C66, C64T
  • C2000 family - C28
  • ARM processors - TMS470, ARM7/9, Cortex A8/M3/R4
  • MSP430
  • Native development host (Windows, Linux)

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: January 28, 2015 Build Ver: 3.30.06.67 Rev: t67


XDCtools 3.31.00.24 GA Release Notes

February 09, 2015

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following bugs/enhancements were resolved in this release.

ID | Severity | Headline
456564 | Major | if xdc/cfg/global.h appears in big.c, absolute .cfg paths trigger bad makefile generation
450586 | Major | Section placement of module instances only works for TI toolchain
459270 | Normal | platformWizard generates platforms with zero-sized memory objects
458990 | Normal | plugingen should add repoMacroName to all products
458000 | Normal | wrong type for arrays embedded in structures
456955 | Normal | Text module should have an option to disable charTab array generation
456563 | Normal | if xdc/cfg/global.h appears in big.c, a package build always triggers the config step
455413 | Normal | xdc.bld.Repository.Attrs.search does not work on Windows
443437 | Normal | cdoc index.html does not have the left-pane tree navigation thingie when using Chrome
435569 | Normal | F1-help on module create/delete does not map to the right section of the cdoc
450582 | enhancement | add wildcard support to the xdc_find macro
449085 | enhancement | Add support for MacOS
446083 | enhancement | Need option for xdc.exec to execute command asynchronously

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.31 must only be used in CCS 6.1.x (or above). Installation into CCS 6.0 (or earlier) will necessitate a re-installation of CCS 6.0.

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS and Grace, that have dependencies on specific targets and platforms.

This new distribution is available in two different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.30.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS
  • Mac OS X Mavericks (10.9)

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.1 (or later): XDCtools 3.31 (or later) cannot be used in CCS 6.0.x (or earlier).
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.1.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: February 09, 2015 Build Ver: 3.31.00.24 Rev: u24


XDCtools 3.31.01.33 GA Release Notes

April 27, 2015

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following bugs/enhancements were resolved in this release.

ID | Severity | Headline
464628 | Major | Generated files sometimes use short names
459948 | Normal | xdc.tools.closure deletes libraries that contain repeated '/'s
464635 | Normal | SourceDir throws an exception when null config script is specified
465257 | Normal | xdc.cfg.SourceDir should support locating "make" along the path
465351 | Normal | parallel builds of packages that use SourceDir generate make warnings
453357 | Normal | Unresolved reference for unimplemented interface
454493 | Normal | System_flush() gets stuck on __iar_get_ttio: on a CC26XX
464429 | Normal | ROV attempts to read *_Module__root__V symbol with address 0 and generates an exception

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.31 must only be used in CCS 6.1.x (or above). Installation into CCS 6.0 (or earlier) will necessitate a re-installation of CCS 6.0.

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS and Grace, that have dependencies on specific targets and platforms.

This new distribution is available in two different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.31.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS
  • Mac OS X Mavericks (10.9)

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.1 (or later): XDCtools 3.31 (or later) cannot be used in CCS 6.0.x (or earlier).
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.1.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: April 27, 2015 Build Ver: 3.31.01.33 Rev: u33


XDCtools 3.31.02.38 GA Release Notes

June 23, 2015

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Dependencies
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following bugs/enhancements were resolved in this release.

ID | Severity | Headline
468708 | Major | calling xdc.useModule on metaonly interfaces generates an invalid C file
459949 | Normal | xdc.tools.closure can use hash tables to simplify and improve performance
470756 | Normal | xdc.useModule of a metaonly interface triggers bogus "$used is sealed" error
469046 | Normal | ROV tree views should have a mechanism to tag fields with errors
466882 | Normal | xdc.tools.closure deletes libraries for packages added on the command line

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.31 must only be used in CCS 6.1.x (or above). Installation into CCS 6.0 (or earlier) will necessitate a re-installation of CCS 6.0.

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS and Grace, that have dependencies on specific targets and platforms.

This new distribution is available in two different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.31.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows XP, Windows 7, Windows 8
  • Suse Linux Enterprise Server 10 and Ubuntu 12.04.1 LTS. Note that IDE integration on Linux is only supported for CCSv6 on Ubuntu 12.04.1 LTS
  • Mac OS X Mavericks (10.9)

back to top

Dependencies

With the exception of a C compiler, XDCtools is a fully self-contained set of development tools to create, build, run, and monitor embedded target content. If you use any of the tool sets listed below, you should use the version named in order to successfully use this version of XDCtools:

  • Code Composer Studio 6.1 (or later): XDCtools 3.31 (or later) cannot be used in CCS 6.0.x (or earlier).
  • TI C6x Code Generation Tools version 7.4.7 or compatible
  • TI ARM Code Generation Tools version 5.1.0 or compatible
  • TI MSP430 Code Generation Tools version 4.3.1 or compatible
  • TI C28x Code Generation Tools version 6.2.5 or compatible
  • GCC for x86 version 4.7.0 or compatible
  • GCC for ARM version 4.4.0 or compatible

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS 2.0) which includes any necessary device support or explicitly add a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.1.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

The following table highlights known issues of particular importance.

ID | Headline
--- | ---

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: June 23, 2015 Build Ver: 3.31.02.38 Rev: u38


XDCtools 3.32.00.06 GA Release Notes

December 10, 2015

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following bugs/enhancements were resolved in this release.

ID | Severity | Headline
481455 | Minimal | generated C config file contains unused variable iStat in some cases
477517 | Minimal | xdc.tools.closure needs an option that deletes rov.xs files
469207 | Normal | initF2837x Boot module does not show Boot.disableWatchdog in xgconf
475187 | Normal | Configuro generated Mod_config.c file names should be unique
430325 | Normal | ROV displays junk values for constructed objects within other objects
479089 | Normal | System_snprintf cdoc contains poor grammar
479711 | Normal | Migrate XDCTools to support 64-bit Linux
443437 | Normal | cdoc index.html does not have the left-pane tree navigation thingie when using Chrome

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.32 must only be used in CCS 6.1.x (or above). Installation into CCS 6.0 (or earlier) will necessitate a re-installation of CCS 6.0.

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS and Grace, that have dependencies on specific targets and platforms.

This new distribution is available in two different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.31.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows 7, Windows 8, Windows 10
  • Linux Ubuntu 12.04 (64bit), Ubuntu 14.04 (64bit), Ubuntu 15.10 (64bit)
  • Mac OS X Yosemite 10.10 (64bit), Mavericks 10.9 (64bit), El Capitan 10.11 (64bit)

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS 2.x), which includes any necessary device support or explicitly adds a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.1.1.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: December 10, 2015 Build Ver: 3.32.00.06 Rev: v06


XDCtools 3.32.01.22 GA Release Notes

August 01, 2016

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

The following bugs/enhancements were resolved in this release.

ID | Severity | Headline
497323 | Major | ROV leaks memory with simple "resetMods; scanModuleView" loop
484439 | Normal | ROV Elf parser should allow lookup of local data symbols
490538 | Normal | configuro doesn't allow setting compiler options on command line unless target is also specified
497433 | Normal | SysMin signed unsigned comparison needs unnecessary cast
497434 | Normal | externs in *Callback.xdc files can result in useless #defines
488895 | Normal | xdc.tools.closure should delete .cpp files
XDCTOOLS-50 | Enhancement | Request to move menu item RTSC Tools (currently under Tools menu) to CCS Edit perspective
XDCTOOLS-34 | Minor | Configuro does not allow dashes in the output directory
XDCTOOLS-44 | Minor | Constructed Tasks do not always show up in ROV
XDCTOOLS-47 | Major | ROV: xdc.runtime.Registry view fails if raw view modState is null
XDCTOOLS-67 | Major | 32bit libraries in xdctools on 64-bit Linux

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.32.1 must only be used in CCS 6.1.x (or above). Installation into CCS 6.0 (or earlier) will necessitate a re-installation of CCS 6.0.

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31.0 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS and Grace, that have dependencies on specific targets and platforms.

This new distribution is available in two different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).

Target Runtime APIs

The xdc.runtime package: As part of the effort to enable xdc.runtime to more easily fit into the ROM of most devices (Bug 424399), several significant optimizations had to be made made that break strict binary compatibility with target content libraries built with XDCtools 3.25.x (or earlier). In particular, target content built against XDCtools 3.25.x xdc.runtime can be

  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.31.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows 7, Windows 8, Windows 10
  • Linux Ubuntu 12.04 (64bit), Ubuntu 14.04 (64bit), Ubuntu 15.10 (64bit)
  • Mac OS X Yosemite 10.10 (64bit), Mavericks 10.9 (64bit), El Capitan 10.11 (64bit)

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS 2.x), which includes any necessary device support or explicitly adds a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.2.0.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: August 01, 2016 Build Ver: 3.32.01.22 Rev: v22


XDCtools 3.50.00.10 GA Release Notes

February 09, 2017

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available in two formats:

  • Compressed .zip file archive
  • Microsoft HTML Help .chm file

Both formats are delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

This release enables the use of the ROV 2 tool. In addition, the following bugs/enhancements were resolved in this release.

ID | Severity | Headline
490928 | Normal | xdc.runtime.Types.SysFxns2.create should use CPtr where possible
506855 | Enhancement | config generated files should be const clean
506859 | Enhancement | need smaller and optional non-fatal dont care Error_Blocks
433467 | Enhancement | IInstance_name should be xdc_CString

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.50 must only be used in CCS 7.1.x (or above).

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS, that have dependencies on specific targets and platforms.

This new distribution is available in two different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).
  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.31.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows 7, Windows 8, Windows 10
  • Linux Ubuntu 12.04 (64bit), Ubuntu 14.04 (64bit), Ubuntu 15.10 (64bit)
  • Mac OS X Mavericks 10.9 (64bit), Yosemite 10.10 (64bit), El Capitan 10.11 (64bit)

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS), which includes any necessary device support or explicitly adds a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.1.1.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: February 09, 2017 Build Ver: 3.50.00.10 Rev: x10


XDCtools 3.50.01.12 GA Release Notes

February 20, 2017

Contents

  • Introduction
  • Licensing
  • Documentation
  • What's New
  • Upgrade & Compatibility Information
  • Host Support
  • Device Support
  • Validation Information
  • Known Issues
  • Versioning
  • Technical Support

Introduction

RTSC / XDC (eXpanDed C) is a standard for reusable software components, optimized for real-time embedded systems. RTSC components have hardware-neutral formal interfaces, are configurable offline to optimize memory and performance, and support custom automation in the development environment via a scripting language.

The XDCtools product includes the following components:

  • Core (xdc.*) - the xdc and xs command line utilities for building packages and executing scripts respectively; packages that implement the RTSC standard;
  • User tools (xdc.tools.*) - command-line and graphical utilities for working with packages and repositories;
  • Eclipse (eclipse) - A set of integration plugins for RTSC for the eclipse platform. These plugins are leveraged by Code Composer Studio (CCS) to provide support for RTSC content in an integrated development environment.

back to top

Licensing

Almost all of XDCtools is released under either EPL v1.0 or dual-licensed under EPL or EDL v1.0. However, there are also a number of third-party components included which are made available under a number of other open-source licenses. A complete manifest along with export control information is detailed here.

back to top

Documentation

The product documentation for this release is available as:

  • Compressed .zip file archive

All documentation is delivered with the product in the docs subdirectory. The most up-to-date docs can also be viewed in the RTSC-pedia.

Release notes from previous product releases are available in the relnotes_archive directory.

back to top

What's New

This release includes changes to ROV2 that enable it to be used on MacOS within CCS 7.1. This release includes the following bugs/enhancements resolved in the 3.50.00.10 release.

ID | Severity | Headline
490928 | Normal | xdc.runtime.Types.SysFxns2.create should use CPtr where possible
506855 | Enhancement | config generated files should be const clean
506859 | Enhancement | need smaller and optional non-fatal dont care Error_Blocks
433467 | Enhancement | IInstance_name should be xdc_CString

To see a complete list of issues fixed in this release, click here.

back to top

Upgrade and Compatibility Information

Code Composer Studio (CCS)

XDCtools 3.50 must only be used in CCS 7.1.x (or above).

XDCtools 3.30 releases (and later) are no longer released in an installer, they are simply provided as .zip files which can be extracted into any directory that CCS uses to discover new products (e.g., c:/ti).

Note for Windows users: When you unzip an XDCtools release using Windows Explorer simply double click on the .zip file and drag the single top-level folder it contains to the folder containing ccsv6/ (typically c:/ti). If, instead, you right-click the .zip file and select "Extract All ...", Windows Explorer adds the name of the zip file itself to the default output folder. Do not use this output name. You must extract the contents of the zip file into, say, c:/ti, not a new folder named after the zip file itself.

Deleted Content

Beginning with the 3.31 release, all embedded targets and platforms have been removed. They are now delivered with middleware products, such as TI-RTOS, that have dependencies on specific targets and platforms.

This new distribution is available in two different release bundles:

  • XDCtools Core: the default release that does not include any embedded targets or platforms. This release is 100% self contained and can be used in virtually any development environment: standalone command line based environments as well as in non-Java based GUI IDEs.
  • XDCtools Core - JRE: the same as XDCtools Core but without an included Java Runtime Environment (JRE). This bundle is significantly smaller but, in order to use this release at the command line, it also requires the user to set the environment variable XDCTOOLS_JAVA_HOME to the installation directory of either an existing JRE or Java Developers Kit (JDK).
    Note: If this release is only used within CCS, there is no need to define XDCTOOLS_JAVA_HOME; CCS automatically defines this variable to reference the JRE that CCS provides (<ccs_installation_directory>/ccsv6/eclipse/jre).
  • used without rebuilding provided it does not include any modules that inherit from an interface defined by xdc.runtime
  • rebuilt against XDCtools 3.31.x xdc.runtime without any source code changes

Deprecated types: To reduce conflicts with target content produced by other groups, the deprecated types Uns, Uint, Uint16, etc. are no longer defined by default. If you still need to use these types, you must now define the symbol xdc__deprecated_types when compiling sources that reference these types. See Bug 425917 for details.

Package Compatibility

Package internal files: All generated package internal files are backwards compatible starting from XDCtools 3.20. So, packages created using XDCtools 3.20 or later can be consumed using this release. Because of the addition of the target type CString to XDCtools 3.25.x, packages created with this release that contain non-metaonly modules cannot be used with XDCtools releases earlier than XDCtools 3.25.x. This includes the xdc.runtime package. See XDCtools Internal Version Numbers for additional details.

Package-specific APIs: Each package has a compatibility key defined in its package.xdc specification file. No package compatibility keys were changed in this release.

Please note that the package compatibility keys are independent of XDCtools product release numbers (described in Versioning below). Package compatibility keys:

  1. Enable tooling to identify incompatibilities between components, and
  2. Convey end-user requirements when re-integrating specific components.

Package compatibility keys are composed of 4 comma-delimited numbers - M, S, R, P - where:

  • M = Major - A difference in M indicates a break in compatibility. The package consumer is required to re-write its source code in order to use the package.
  • S = Source - A difference in S indicates source compatibility. The package consumer's source code doesn't require change, but does require a recompile.
  • R = Radix - A difference in R indicates an introduction of new features, but compatibility with previous interfaces is not broken. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.
  • P = Patch -A difference in P indicates that only bugs have been fixed in the latest package and no new features have been introduced. If libraries are provided by the package, an application must re-link with the new libraries, but is not required to recompile its source.

back to top

Host Support

This release supports the following hosts:

  • Windows 7, Windows 8, Windows 10
  • Linux Ubuntu 12.04 (64bit), Ubuntu 14.04 (64bit), Ubuntu 15.10 (64bit)
  • Mac OS X Mavericks 10.9 (64bit), Yosemite 10.10 (64bit), El Capitan 10.11 (64bit)

back to top

Device Support

Starting with release 3.31, XDCtools no longer includes specific embedded device support. As a result, users must either use another product (such as TI-RTOS), which includes any necessary device support or explicitly adds a repository containing the desired device support to the package path of their projects.

The complete list of targets tested by this release can be found here.

back to top

Validation Information

This release was built and validated using Code Composer Studio version 6.1.1.

The targets supported by this release and the versions of the compilers used to validate them are listed here.

Go to the Known Issues section of these release notes to see any issues with the supported targets that were found during the validation of this release.

back to top

Known Issues

To see a complete list of open XDCtools issues, go to the Eclipse RTSC project's Bugzilla database.

To file a new bug in this database, click here.

back to top

Versioning

All releases have 4 digits (M.mm.pp.bb). This includes GA and pre-releases (engineering, release candidates, etc.). Pre-releases are denoted with a suffix (e.g. 3.15.01.51-eng) and should not be used in a production environment.

This product's version follows a version format, M.mm.pp.bb, where M is a single digit Major number, mm is 2 digit minor number, pp is a 2 digit patch number, and b is an unrestricted set of digits used as an incrementing build counter.

To support multiple side-by-side installations of the product, the product version is encoded in the top level directory, ex. xdctools_3_15_00_50.

Subsequent releases of patch upgrades will be identified by the patch number, ex. XDCtools 3.15.01.67 with directory xdctools_3_15_01_67. Typically, these patches only include bug fixes.

Please note that version numbers and compatibility keys are NOT the same. For an explanation of compatibility keys, please refer to the 'Upgrade and Compatibility Information' section.

back to top

Technical Support and Product Updates

Support questions on the product should be posted to the Eclipse RTSC project's newsgroup. Check the XDCtools download site for the latest releases.

back to top

Last updated: February 20, 2017 Build Ver: 3.50.01.12 Rev: x12


Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.Sparc | gnu.targets.rts5 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Sparc
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.5.2 | 4.5.2 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.5.2 | 4.5.2 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.MVArm9 | gnu.targets.arm.rts470MV | 3.4.3 | 3.4.3 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=MVArm9
gnu.targets.arm.UCArm9 | gnu.targets.arm.rts470uC | 4.2.1 | 4.2.1 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=UCArm9
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.40.2 | 5.50.0 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.40.2 | 5.50.0 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.40.2 | 5.50.0 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.elf.TMS470 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=TMS470
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-b17) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.


Supported Targets

XDCtools 3.24.06.63 Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.5.2 | 4.5.2 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.5.2 | 4.5.2 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.MVArm9 | gnu.targets.arm.rts470MV | 3.4.3 | 3.4.3 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=MVArm9
gnu.targets.arm.UCArm9 | gnu.targets.arm.rts470uC | 4.2.1 | 4.2.1 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=UCArm9
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.40.2 | 5.50.0 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.40.2 | 5.50.0 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.40.2 | 5.50.0 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-b18) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 69 supported targets above, there are 21 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.MVArm9 | this target disabled generation of its docs
gnu.targets.UCArm9 | this target disabled generation of its docs
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.arm.A15 | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.C54 | no pre-built xdc.runtime is supplied for this target
ti.targets.C54_far | no pre-built xdc.runtime is supplied for this target
ti.targets.C55 | no pre-built xdc.runtime is supplied for this target
ti.targets.C55P_word | no pre-built xdc.runtime is supplied for this target
ti.targets.C55_huge | no pre-built xdc.runtime is supplied for this target
ti.targets.C55_large | no pre-built xdc.runtime is supplied for this target
ti.targets.C62 | no pre-built xdc.runtime is supplied for this target
ti.targets.C62_big_endian | no pre-built xdc.runtime is supplied for this target
ti.targets.C64_big_endian | no pre-built xdc.runtime is supplied for this target
ti.targets.C67 | no pre-built xdc.runtime is supplied for this target
ti.targets.C67_big_endian | no pre-built xdc.runtime is supplied for this target
ti.targets.arm.elf.R4F | no pre-built xdc.runtime is supplied for this target


Supported Targets

XDCtools 3.25.00.46 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.40.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.40.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.40.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-c05) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 67 supported targets above, there are 14 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.arm.A15 | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.A15Fnv | not configured for Linux testing


Supported Targets

XDCtools 3.25.01.62 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.40.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.40.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.40.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-c06) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 67 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
iar.targets.arm.M4 | not configured for Linux testing
iar.targets.arm.M4F | not configured for Linux testing
ti.targets.arm.elf.A15Fnv | not configured for Linux testing


Supported Targets

XDCtools 3.25.02.69 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.51.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.51.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.51.2 | 5.51.2 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-c07) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 67 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
iar.targets.arm.M4 | not configured for Linux testing
iar.targets.arm.M4F | not configured for Linux testing
ti.targets.arm.elf.A15Fnv | not configured for Linux testing


Supported Targets

XDCtools 3.25.04.87 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.1.0 | 4.1.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-c09) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 70 supported targets above, there are 13 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.arm.elf.A15Fnv | not configured for Linux testing


Supported Targets

XDCtools 3.25.05.92 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 4.9.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-c10) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 70 supported targets above, there are 13 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.arm.elf.A15Fnv | not configured for Linux testing


Supported Targets

XDCtools 3.30.00.16 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 4.9.0 | 5.1.1 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.0 | 1.0.0 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-d02) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 70 supported targets above, there are 13 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.C62 | no pre-built xdc.runtime is supplied for this target
ti.targets.arm.elf.A15Fnv | not configured for Linux testing


Supported Targets

XDCtools 3.30.02.42 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-d03) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 70 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.Linux86_64 | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.C62 | no pre-built xdc.runtime is supplied for this target
ti.targets.arm.elf.A15Fnv | not configured for Linux testing
ti.targets.arm.elf.M0 | not configured for Linux testing


Supported Targets

XDCtools 3.30.02.42 ENG Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-d04) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 70 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Sparc | this target disabled generation of its docs
gnu.targets.Linux86_64 | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.C62 | no pre-built xdc.runtime is supplied for this target
ti.targets.arm.elf.A15Fnv | not configured for Linux testing
ti.targets.arm.elf.M0 | not configured for Linux testing


Supported Targets

XDCtools 3.31.00.19. Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7AF | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-d08) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 71 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Linux86_64 | this target disabled generation of its docs
gnu.targets.MacOS86_64 | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.arm.elf.A15Fnv | not configured for Linux testing
ti.targets.arm.elf.M0 | not configured for Linux testing


Supported Targets

XDCtools 3.31.01.32. Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7AF | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C64T_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm7 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7
ti.targets.arm.elf.Arm7_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm7_big_endian
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9t
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3_big_endian
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R4 | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4
ti.targets.arm.elf.R4F_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4F_big_endian
ti.targets.arm.elf.R4Ft | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft
ti.targets.arm.elf.R4Ft_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4Ft_big_endian
ti.targets.arm.elf.R4_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4_big_endian
ti.targets.arm.elf.R4t | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t
ti.targets.arm.elf.R4t_big_endian | ti.targets.arm.rtsarm | 5.1.5 | 5.1.5 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R4t_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C64T_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T_big_endian
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-d09) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 71 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.M4F | this target disabled generation of its docs
gnu.targets.Linux86_64 | this target disabled generation of its docs
gnu.targets.MacOS86_64 | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.arm.elf.A15Fnv | not configured for Linux testing
ti.targets.arm.elf.M0 | not configured for Linux testing


Supported Targets

XDCtools 3.31.02.35. Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7AF | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.M4F | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4F
google.targets.arm.Bionic | google.targets.arm.rts | 4.4.3 | 4.4.3 | -Dxdc_target_types__=google/targets/arm/std.h -Dxdc_target_name__=Bionic
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
qnx.targets.arm.Qnx | qnx.targets.arm.rts | 4.4.2 | 4.4.2 | -Dxdc_target_types__=qnx/targets/arm/std.h -Dxdc_target_name__=Qnx
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C64 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64
ti.targets.C64P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P
ti.targets.C64P_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.C64T | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C64T
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8F | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8F
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Ft | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Ft
ti.targets.arm.elf.A8Fv | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fv
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.R5F | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R5F
ti.targets.arm.elf.R5F_big_endian | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=R5F_big_endian
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C64P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P
ti.targets.elf.C64P_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64P_big_endian
ti.targets.elf.C64T | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C64T
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.2.0 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-d11) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 60 supported targets above, there are 13 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.Linux86_64 | this target disabled generation of its docs
gnu.targets.MacOS86_64 | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv5T | this target disabled generation of its docs
gnu.targets.codesourcery.GCArmv6 | this target disabled generation of its docs
microsoft.targets.arm.WinCE | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
ti.targets.arm.elf.M0 | not configured for Linux testing
ti.targets.msp430.MSP430 | no pre-built xdc.runtime is supplied for this target


Supported Targets

XDCtools 3.32.00.02. Supported Targets (build host: Linux)
Target Name | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.arm.A15F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7AF | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.M3 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.M4F | gnu.targets.arm.rtsv7M | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.arm.M3 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F | iar.targets.arm.rts | 6.60.1 | 6.60.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small | iar.targets.msp430.rts | 5.60.1 | 5.60.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.C28 | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large | ti.targets.rts2800 | 5.2.3 | 6.1.0 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C67P | ti.targets.rts6000 | 7.0.3 | 7.3.5 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C67P
ti.targets.arm.elf.A8Fnv | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.Arm9 | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.M0 | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M0
ti.targets.arm.elf.M3 | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M4 | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F | ti.targets.arm.rtsarm | 5.2.4 | 5.2.4 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arp32.elf.ARP32 | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C66 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C67P | ti.targets.rts6000 | 7.2.0 | 7.3.5 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C67P
ti.targets.msp430.MSP430X | ti.targets.msp430.rts430 | 4.4.5 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430 | ti.targets.msp430.rts430 | 4.4.5 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X | ti.targets.msp430.rts430 | 4.4.5 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small | ti.targets.msp430.rts430 | 4.4.5 | 4.2.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-f01) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an application.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 42 supported targets above, there are 26 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.Linux86_64 | this target disabled generation of its docs
gnu.targets.MacOS86_64 | this target disabled generation of its docs
ti.targets.arm.elf.A8F | this target disabled generation of its docs
ti.targets.arm.elf.A8Ft | this target disabled generation of its docs
ti.targets.arm.elf.A8Fv | this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs
ti.targets.elf.C64P | this target disabled generation of its docs
ti.targets.elf.C64T | this target disabled generation of its docs
ti.targets.elf.C64P_big_endian | this target disabled generation of its docs
ti.targets.msp430.MSP430X_small | this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs
ti.targets.C64P | this target disabled generation of its docs
ti.targets.C64P_big_endian | this target disabled generation of its docs
ti.targets.C64T | this target disabled generation of its docs
ti.targets.C62 | this target disabled generation of its docs
ti.targets.C62_big_endian | this target disabled generation of its docs
ti.targets.C64 | this target disabled generation of its docs
ti.targets.C64_big_endian | this target disabled generation of its docs
ti.targets.C67 | this target disabled generation of its docs
ti.targets.C67_big_endian | this target disabled generation of its docs
gnu.targets.Mingw | no linker version
microsoft.targets.Net32 | no linker version
microsoft.targets.VC98 | no linker version
microsoft.targets.Win32 | no linker version
ti.targets.arm.elf.R5F | not configured for Linux testing
ti.targets.msp430.MSP430 | no pre-built xdc.runtime is supplied for this target


Supported Targets

XDCtools 3.50.00.02 ENG Supported Targets (build host: Linux)
Target Name (suffix) | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 (86U) | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Linux86 (86U) | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw (86GW) | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.Mingw (86GW) | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F (a15fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A15F (a15fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F (a8fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A8F (a8fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F (a9fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.A9F (a9fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T (v5T) | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv5T (v5T) | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 (v6) | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv6 (v6) | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A (v7A) | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7A (v7A) | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7AF (v7AF) | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.GCArmv7AF (v7AF) | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.M3 (m3g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M3 (m3g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 (m4g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.M4 (m4g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.M4F (m4fg) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4F
gnu.targets.arm.M4F (m4fg) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.arm.M3 (rm3) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M3 (rm3) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 (rm4) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4 (rm4) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F (rm4f) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.arm.M4F (rm4f) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 (r430) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430 (r430) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large (r430XL) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_large (r430XL) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small (r430XS) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
iar.targets.msp430.MSP430X_small (r430XS) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 (86N) | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.Net32 (86N) | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 (86) | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.VC98 (86) | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 (86W) | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
microsoft.targets.Win32 (86W) | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
ti.targets.C28 (28) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28 (28) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float (28FP) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_float (28FP) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large (28L) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C28_large (28L) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C66 (66) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66 (66) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian (66e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C66_big_endian (66e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 (674) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674 (674) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian (674e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C674_big_endian (674e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.arm.elf.A8Fnv (ea8fnv) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Fnv (ea8fnv) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.Arm9 (e9) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9 (e9) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.M0 (em0) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M0
ti.targets.arm.elf.M0 (em0) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M0
ti.targets.arm.elf.M3 (em3) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3 (em3) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M4 (em4) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4 (em4) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F (em4f) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.M4F (em4f) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arp32.elf.ARP32 (earp32) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32 (earp32) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far (earp32F) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.arp32.elf.ARP32_far (earp32F) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C66 (e66) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66 (e66) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian (e66e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C66_big_endian (e66e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 (e674) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674 (e674) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian (e674e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C674_big_endian (e674e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.msp430.MSP430X (430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X (430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430 (e430) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430 (e430) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X (e430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X (e430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small (e430XS) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430X_small (e430XS) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-f06) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name (suffix)
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an executable. Each target has a unique "suffix" that is appended to a single letter qualifier ('a', 'o', and 'x') to form a file extension for target-specific files:
  *.a<suffix> - archives (libraries),
  *.o<suffix> - object files, and
  *.x<suffix> - executable files.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 88 supported targets above, there are 15 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.A53F | this target disabled generation of its docs,this target disabled generation of its docs
gnu.targets.Linux86_64 | this target disabled generation of its docs,this target disabled generation of its docs
gnu.targets.MacOS86_64 | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.A8F | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.A8Ft | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.A8Fv | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.elf.C64P | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.elf.C64P_big_endian | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.msp430.MSP430X_small | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.C64P | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.C64P_big_endian | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.R5F | not configured for Linux testing,not configured for Linux testing
ti.targets.msp430.MSP430 | no pre-built xdc.runtime is supplied for this target,no pre-built xdc.runtime is supplied for this target


Supported Targets

XDCtools 3.50.00.09 ENG Supported Targets (build host: Linux)
Target Name (suffix) | rts Package | Code Gen Version |  | Required -D Options
 |  | compile | link
gnu.targets.Linux86 (86U) | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Linux86 (86U) | gnu.targets.rts86U | 4.1.0 | 4.1.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Linux86
gnu.targets.Mingw (86GW) | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.Mingw (86GW) | gnu.targets.rts86GW | 4.4.0 | 4.4.0 | -Dxdc_target_types__=gnu/targets/std.h -Dxdc_target_name__=Mingw
gnu.targets.arm.A15F (a15fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A15F (a15fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A15F
gnu.targets.arm.A8F (a8fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A8F (a8fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A8F
gnu.targets.arm.A9F (a9fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.A9F (a9fg) | gnu.targets.arm.rtsv7A | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=A9F
gnu.targets.arm.GCArmv5T (v5T) | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv5T (v5T) | gnu.targets.arm.rtsv5T | 3.4.3 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv5T
gnu.targets.arm.GCArmv6 (v6) | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv6 (v6) | gnu.targets.arm.rtsv6 | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv6
gnu.targets.arm.GCArmv7A (v7A) | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7A (v7A) | gnu.targets.arm.rtsv7A | 4.3.2 | 4.4.1 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7A
gnu.targets.arm.GCArmv7AF (v7AF) | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.GCArmv7AF (v7AF) | gnu.targets.arm.rtsv7A | 4.7.3 | 4.7.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=GCArmv7AF
gnu.targets.arm.M3 (m3g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M3 (m3g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M3
gnu.targets.arm.M4 (m4g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.M4 (m4g) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4
gnu.targets.arm.M4F (m4fg) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4F
gnu.targets.arm.M4F (m4fg) | gnu.targets.arm.rtsv7M | 4.9.3 | 4.9.3 | -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.arm.M3 (rm3) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M3 (rm3) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M3
iar.targets.arm.M4 (rm4) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4 (rm4) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4
iar.targets.arm.M4F (rm4f) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.arm.M4F (rm4f) | iar.targets.arm.rts | 6.60.1 | 7.70.1 | -Dxdc_target_types__=iar/targets/arm/std.h -Dxdc_target_name__=M4F
iar.targets.msp430.MSP430 (r430) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430 (r430) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430
iar.targets.msp430.MSP430X_large (r430XL) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_large (r430XL) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_large
iar.targets.msp430.MSP430X_small (r430XS) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
iar.targets.msp430.MSP430X_small (r430XS) | iar.targets.msp430.rts | 6.40.1 | 6.50.1 | -Dxdc_target_types__=iar/targets/msp430/std.h -Dxdc_target_name__=MSP430X_small
microsoft.targets.Net32 (86N) | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.Net32 (86N) | microsoft.targets.rts | 13.10.3052 | 13.10.3052 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Net32
microsoft.targets.VC98 (86) | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.VC98 (86) | microsoft.targets.rts | 12.00.8168 | 12.00.8168 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=VC98
microsoft.targets.Win32 (86W) | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
microsoft.targets.Win32 (86W) | microsoft.targets.rts | 14.00.50727 | 14.00.50727 | -Dxdc_target_types__=microsoft/targets/std.h -Dxdc_target_name__=Win32
ti.targets.C28 (28) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28 (28) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28
ti.targets.C28_float (28FP) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_float (28FP) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_float
ti.targets.C28_large (28L) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C28_large (28L) | ti.targets.rts2800 | 16.9.1 | 16.9.1 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C28_large
ti.targets.C66 (66) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66 (66) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66
ti.targets.C66_big_endian (66e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C66_big_endian (66e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.C674 (674) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674 (674) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674
ti.targets.C674_big_endian (674e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.C674_big_endian (674e) | ti.targets.rts6000 | 7.4.17 | 7.4.17 | -Dxdc_target_types__=ti/targets/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.arm.elf.A8Fnv (ea8fnv) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.A8Fnv (ea8fnv) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=A8Fnv
ti.targets.arm.elf.Arm9 (e9) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.Arm9 (e9) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=Arm9
ti.targets.arm.elf.M0 (em0) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M0
ti.targets.arm.elf.M0 (em0) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M0
ti.targets.arm.elf.M3 (em3) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M3 (em3) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M3
ti.targets.arm.elf.M4 (em4) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4 (em4) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4
ti.targets.arm.elf.M4F (em4f) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arm.elf.M4F (em4f) | ti.targets.arm.rtsarm | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/arm/elf/std.h -Dxdc_target_name__=M4F
ti.targets.arp32.elf.ARP32 (earp32) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32 (earp32) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32
ti.targets.arp32.elf.ARP32_far (earp32F) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.arp32.elf.ARP32_far (earp32F) | ti.targets.arp32.rts | 1.0.2 | 1.0.2 | -Dxdc_target_types__=ti/targets/arp32/elf/std.h -Dxdc_target_name__=ARP32_far
ti.targets.elf.C66 (e66) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66 (e66) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66
ti.targets.elf.C66_big_endian (e66e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C66_big_endian (e66e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C66_big_endian
ti.targets.elf.C674 (e674) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674 (e674) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674
ti.targets.elf.C674_big_endian (e674e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.elf.C674_big_endian (e674e) | ti.targets.rts6000 | 8.1.2 | 8.1.2 | -Dxdc_target_types__=ti/targets/elf/std.h -Dxdc_target_name__=C674_big_endian
ti.targets.msp430.MSP430X (430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.MSP430X (430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430 (e430) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430 (e430) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430
ti.targets.msp430.elf.MSP430X (e430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X (e430X) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X
ti.targets.msp430.elf.MSP430X_small (e430XS) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small
ti.targets.msp430.elf.MSP430X_small (e430XS) | ti.targets.msp430.rts430 | 16.9.0 | 16.9.0 | -Dxdc_target_types__=ti/targets/msp430/elf/std.h -Dxdc_target_name__=MSP430X_small

Column Definitions

Supported Targets
The targets that have been validated via a suite of regression tests (xdctest-g02) that utilize the specified rts package and toolchain versions from a Linux development host.
Target Name (suffix)
The name of the module that specifies a particular compiler toolchain and runtime model supported by that compiler. Sources built with the same target can be linked together to create an executable. Each target has a unique "suffix" that is appended to a single letter qualifier ('a', 'o', and 'x') to form a file extension for target-specific files:
  *.a<suffix> - archives (libraries),
  *.o<suffix> - object files, and
  *.x<suffix> - executable files.
rts Package
The name of a package that contains a pre-built library of the xdc.runtime sources using the specified target.
Code Gen Version
The version of the compiler used to build the rts package and the version of the linker used to link an application that uses the rts package. The version of the compiler is less than or equal to the version of the linker. These two versions bound the range of toolchain versions that have been verified to work with the pre-built libraries provided by the rts package.
Required -D Options
The options that must be added to the complier's command line when compiling any C/C++ source file that references a RTSC module. These options ensure that the portable data types defined by xdc/std.h are appropriate for the specified target.

Experimental or Deprecated Targets

In addition to the 88 supported targets above, there are 16 experimental or deprecated targets included in this release. These targets may be incompatibly changed or removed in subsequent releases.

Target Name | Note
gnu.targets.arm.A53F | this target disabled generation of its docs,this target disabled generation of its docs
gnu.targets.Linux86_64 | this target disabled generation of its docs,this target disabled generation of its docs
gnu.targets.MacOS86_64 | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.A8F | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.A8Ft | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.A8Fv | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.R4F | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.elf.C64P | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.elf.C64P_big_endian | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.elf.C28_float | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.msp430.MSP430X_small | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.msp430.Generic | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.C64P | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.C64P_big_endian | this target disabled generation of its docs,this target disabled generation of its docs
ti.targets.arm.elf.R5F | not configured for Linux testing,not configured for Linux testing
ti.targets.msp430.MSP430 | no pre-built xdc.runtime is supplied for this target,no pre-built xdc.runtime is supplied for this target